From 8b43e9c765df04a3b793d71c06eda6fb0d033bcf Mon Sep 17 00:00:00 2001 From: Hadar Epstein Date: Sat, 2 Jan 2021 11:50:11 -0800 Subject: [PATCH 0001/4650] test --- clang.c | 3 + clang_tidy_output.txt | 1083 +++++++++++++++++++++++++++++++++++++++++ out.xml | 2 - output.txt | 45 ++ s.bashrc | 9 +- 5 files changed, 1138 insertions(+), 4 deletions(-) create mode 100644 clang_tidy_output.txt delete mode 100644 out.xml create mode 100644 output.txt diff --git a/clang.c b/clang.c index 204d85dc..0205f652 100644 --- a/clang.c +++ b/clang.c @@ -1,6 +1,9 @@ void f1(struct fred_t *p) { // dereference p and then check if it's NULL + + + int x = p->x; if (p) do_something(x); diff --git a/clang_tidy_output.txt b/clang_tidy_output.txt new file mode 100644 index 00000000..65ca3ce5 --- /dev/null +++ b/clang_tidy_output.txt @@ -0,0 +1,1083 @@ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc.c:67:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c:52:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc_ex.c:52:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2s.c:138:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp_ex.c:53:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac_ex.c:56:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lcd.c:89:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr_ex.c:42:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rng.c:58:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c:96:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_irda.c:140:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lptim.c:123:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c:42:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tsc.c:111:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard.c:134:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smbus.c:126:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard_ex.c:57:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c:257:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c:127:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac.c:188:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c:169:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c:88:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.c:84:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd_ex.c:42:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp.c:151:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c:66:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr.c:43:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c:101:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c:110:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c:80:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c:52:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c:36:10: error: 'stm32l0xx_ll_rcc.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_ll_rcc.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c:61:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c:242:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_firewall.c:64:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd.c:73:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc_ex.c:113:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_msp_template.c:48:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c:55:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_usart.c:84:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc.c:112:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c:67:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c:130:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_wwdg.c:125:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c:151:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c:49:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f64.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q31.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q31.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q15.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix8_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/CommonTables/arm_const_structs.c:43:10: error: 'arm_const_structs.h' file not found [clang-diagnostic-error] +#include "arm_const_structs.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_opt_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error] +#include "arm_math.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c:64:10: error: 'stm32l0xx.h' file not found [clang-diagnostic-error] +#include "stm32l0xx.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:1:16: warning: declaration of 'struct fred_t' will not be visible outside of this function [clang-diagnostic-visibility] +void f1(struct fred_t *p) + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:4:14: error: incomplete definition of type 'struct fred_t' [clang-diagnostic-error] + int x = p->x; + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:1:16: note: forward declaration of 'struct fred_t' +void f1(struct fred_t *p) + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:6:9: warning: implicit declaration of function 'do_something' is invalid in C99 [clang-diagnostic-implicit-function-declaration] + do_something(x); + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:11:21: error: use of undeclared identifier 'NULL' [clang-diagnostic-error] + const char *p = NULL; + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:12:21: error: use of undeclared identifier 'str' [clang-diagnostic-error] + for (int i = 0; str[i] != '\0'; i++) + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:14:13: error: use of undeclared identifier 'str' [clang-diagnostic-error] + if (str[i] == ' ') + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:16:17: error: use of undeclared identifier 'str' [clang-diagnostic-error] + p = str + i; + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:28:24: error: use of undeclared identifier 'NULL' [clang-diagnostic-error] + struct fred_t *p = NULL; + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:30:13: error: use of undeclared identifier 'fred1' [clang-diagnostic-error] + p = fred1; + ^ +/Users/hadar/Desktop/test_github/test-repo/test-clang.c:1:1: error: unknown type name 'test' [clang-diagnostic-error] +test-clang.c +^ +/Users/hadar/Desktop/test_github/test-repo/test-clang.c:1:5: error: expected identifier or '(' [clang-diagnostic-error] +test-clang.c + ^ +/Users/hadar/Desktop/test_github/test-repo/test2.c:7:8: warning: Dereference of undefined pointer value [clang-analyzer-core.NullDereference] + *p = 0; + ^ +/Users/hadar/Desktop/test_github/test-repo/test2.c:3:5: note: 'p' declared without an initial value + char *p; + ^ +/Users/hadar/Desktop/test_github/test-repo/test2.c:7:8: note: Dereference of undefined pointer value + *p = 0; + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/radio.c:24:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/parameters.c:28:10: error: 'parameters.h' file not found [clang-diagnostic-error] +#include "parameters.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/common.c:25:10: error: 'common.h' file not found [clang-diagnostic-error] +#include "common.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/modbus_impl.c:29:10: error: 'stdio.h' file not found [clang-diagnostic-error] +#include "stdio.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/GW_BRProtocolsImp.c:24:10: error: 'GW_BRProtocolsImp.h' file not found [clang-diagnostic-error] +#include "GW_BRProtocolsImp.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/spi.c:41:10: error: 'spi.h' file not found [clang-diagnostic-error] +#include "spi.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/receive_interrupt.c:21:10: error: 'string.h' file not found [clang-diagnostic-error] +#include + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/rtc.c:24:10: error: 'rtc.h' file not found [clang-diagnostic-error] +#include "rtc.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/stm32l0xx_hal_msp.c:40:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/cc1101.c:23:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/State_machine.c:1:10: error: 'State_machine.h' file not found [clang-diagnostic-error] +#include "State_machine.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/gpio.c:24:10: error: 'gpio.h' file not found [clang-diagnostic-error] +#include "gpio.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/Logger.c:26:10: error: 'logger.h' file not found [clang-diagnostic-error] +#include "logger.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/W3_Flash.c:24:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/EEPROM.c:23:10: error: 'eeprom.h' file not found [clang-diagnostic-error] +#include "eeprom.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/watchdog.c:23:10: error: 'watchdog.h' file not found [clang-diagnostic-error] +#include "watchdog.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/main.c:40:10: error: 'main.h' file not found [clang-diagnostic-error] +#include "main.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/PC_GW_ProtocolFunctions.c:25:10: error: 'PC_GW_ProtocolFunctions.h' file not found [clang-diagnostic-error] +#include "PC_GW_ProtocolFunctions.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/modbus_driver.c:27:10: error: 'modbus_driver.h' file not found [clang-diagnostic-error] +#include "modbus_driver.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/power_management.c:23:10: error: 'power_management.h' file not found [clang-diagnostic-error] +#include "power_management.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/modbus_app_layer.c:26:10: error: 'modbus_app_layer.h' file not found [clang-diagnostic-error] +#include "modbus_app_layer.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/usart.c:41:10: error: 'usart.h' file not found [clang-diagnostic-error] +#include "usart.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/system_stm32l0xx.c:64:10: error: 'stm32l0xx.h' file not found [clang-diagnostic-error] +#include "stm32l0xx.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/BIT.c:24:10: error: 'BIT.h' file not found [clang-diagnostic-error] +#include "BIT.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/app_main.c:24:10: error: 'app_main.h' file not found [clang-diagnostic-error] +#include "app_main.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/encryption.c:23:10: error: 'encryption.h' file not found [clang-diagnostic-error] +#include "encryption.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/external_flash.c:24:10: error: 'external_flash.h' file not found [clang-diagnostic-error] +#include "external_flash.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/stm32l0xx_it.c:34:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error] +#include "stm32l0xx_hal.h" + ^ +/Users/hadar/Desktop/test_github/test-repo/Src/bootloader_support.c:23:10: error: 'bootloader_support.h' file not found [clang-diagnostic-error] +#include "bootloader_support.h" + ^ diff --git a/out.xml b/out.xml deleted file mode 100644 index e662b19f..00000000 --- a/out.xml +++ /dev/null @@ -1,2 +0,0 @@ -out.xml -Loops Rule\! diff --git a/output.txt b/output.txt new file mode 100644 index 00000000..b37aebc4 --- /dev/null +++ b/output.txt @@ -0,0 +1,45 @@ +/Users/hadar/Desktop/test_github/test-repo/clang.c:1:16: warning: declaration of 'struct fred_t' will not be visible outside of this function [clang-diagnostic-visibility] +void f1(struct fred_t *p) + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:4:14: error: incomplete definition of type 'struct fred_t' [clang-diagnostic-error] + int x = p->x; + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:1:16: note: forward declaration of 'struct fred_t' +void f1(struct fred_t *p) + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:6:9: warning: implicit declaration of function 'do_something' is invalid in C99 [clang-diagnostic-implicit-function-declaration] + do_something(x); + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:11:21: error: use of undeclared identifier 'NULL' [clang-diagnostic-error] + const char *p = NULL; + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:12:21: error: use of undeclared identifier 'str' [clang-diagnostic-error] + for (int i = 0; str[i] != '\0'; i++) + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:14:13: error: use of undeclared identifier 'str' [clang-diagnostic-error] + if (str[i] == ' ') + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:16:17: error: use of undeclared identifier 'str' [clang-diagnostic-error] + p = str + i; + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:28:24: error: use of undeclared identifier 'NULL' [clang-diagnostic-error] + struct fred_t *p = NULL; + ^ +/Users/hadar/Desktop/test_github/test-repo/clang.c:30:13: error: use of undeclared identifier 'fred1' [clang-diagnostic-error] + p = fred1; + ^ +/Users/hadar/Desktop/test_github/test-repo/test-clang.c:1:1: error: unknown type name 'test' [clang-diagnostic-error] +test-clang.c +^ +/Users/hadar/Desktop/test_github/test-repo/test-clang.c:1:5: error: expected identifier or '(' [clang-diagnostic-error] +test-clang.c + ^ +/Users/hadar/Desktop/test_github/test-repo/test2.c:7:8: warning: Dereference of undefined pointer value [clang-analyzer-core.NullDereference] + *p = 0; + ^ +/Users/hadar/Desktop/test_github/test-repo/test2.c:3:5: note: 'p' declared without an initial value + char *p; + ^ +/Users/hadar/Desktop/test_github/test-repo/test2.c:7:8: note: Dereference of undefined pointer value + *p = 0; + ^ diff --git a/s.bashrc b/s.bashrc index 3cdecdd9..9e67f8e0 100755 --- a/s.bashrc +++ b/s.bashrc @@ -1,4 +1,9 @@ #!/bin/bash +rm -rf $1/clang_tidy_output.txt +touch $1/clang_tidy_output.txt +for FILE in $(find $1 -name "*.c" -or -name "*.cpp"); -for FILE in *; do echo $FILE; done - +# for FILE in $(find $1 -name "*.c" -or -name "*.cpp" -or -name "*.h"); +do + clang-tidy $FILE >> $1/clang_tidy_output.txt; + done From ab6c265d602cd4a177d4bf23200e3013ecf49462 Mon Sep 17 00:00:00 2001 From: Hadar Epstein Date: Mon, 4 Jan 2021 21:21:56 -0800 Subject: [PATCH 0002/4650] s --- clang.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/clang.c b/clang.c index 0205f652..6702aae7 100644 --- a/clang.c +++ b/clang.c @@ -2,8 +2,6 @@ void f1(struct fred_t *p) { // dereference p and then check if it's NULL - - int x = p->x; if (p) do_something(x); From c0616c6135e6596f81f3e20236cbc2bc91169798 Mon Sep 17 00:00:00 2001 From: Hadar Epstein Date: Fri, 5 Mar 2021 07:53:51 -0800 Subject: [PATCH 0003/4650] testing softacheck --- clang.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/clang.c b/clang.c index 6702aae7..cbe2ef5a 100644 --- a/clang.c +++ b/clang.c @@ -2,6 +2,9 @@ void f1(struct fred_t *p) { // dereference p and then check if it's NULL + + + int x = p->x; if (p) do_something(x); From 062998c59b2fad05dd185bdecac8812e87c02c20 Mon Sep 17 00:00:00 2001 From: Hadar Epstein Date: Fri, 5 Mar 2021 07:54:45 -0800 Subject: [PATCH 0004/4650] s --- clang.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/clang.c b/clang.c index cbe2ef5a..204d85dc 100644 --- a/clang.c +++ b/clang.c @@ -1,10 +1,6 @@ void f1(struct fred_t *p) { // dereference p and then check if it's NULL - - - - int x = p->x; if (p) do_something(x); From dff1b4a08d0b2a447d06f3f1457e38b07fd4c93a Mon Sep 17 00:00:00 2001 From: Hadar Epstein Date: Fri, 5 Mar 2021 08:35:44 -0800 Subject: [PATCH 0005/4650] test softacheck --- .../Source/BasicMathFunctions/arm_abs_f32.c | 165 - .../Source/BasicMathFunctions/arm_abs_q15.c | 179 - .../Source/BasicMathFunctions/arm_abs_q31.c | 130 - .../Source/BasicMathFunctions/arm_abs_q7.c | 157 - .../Source/BasicMathFunctions/arm_add_f32.c | 150 - .../Source/BasicMathFunctions/arm_add_q15.c | 140 - .../Source/BasicMathFunctions/arm_add_q31.c | 148 - .../Source/BasicMathFunctions/arm_add_q7.c | 134 - .../BasicMathFunctions/arm_dot_prod_f32.c | 135 - .../BasicMathFunctions/arm_dot_prod_q15.c | 140 - .../BasicMathFunctions/arm_dot_prod_q31.c | 143 - .../BasicMathFunctions/arm_dot_prod_q7.c | 159 - .../Source/BasicMathFunctions/arm_mult_f32.c | 174 - .../Source/BasicMathFunctions/arm_mult_q15.c | 154 - .../Source/BasicMathFunctions/arm_mult_q31.c | 160 - .../Source/BasicMathFunctions/arm_mult_q7.c | 127 - .../BasicMathFunctions/arm_negate_f32.c | 146 - .../BasicMathFunctions/arm_negate_q15.c | 142 - .../BasicMathFunctions/arm_negate_q31.c | 129 - .../Source/BasicMathFunctions/arm_negate_q7.c | 125 - .../BasicMathFunctions/arm_offset_f32.c | 165 - .../BasicMathFunctions/arm_offset_q15.c | 136 - .../BasicMathFunctions/arm_offset_q31.c | 140 - .../Source/BasicMathFunctions/arm_offset_q7.c | 135 - .../Source/BasicMathFunctions/arm_scale_f32.c | 169 - .../Source/BasicMathFunctions/arm_scale_q15.c | 162 - .../Source/BasicMathFunctions/arm_scale_q31.c | 239 - .../Source/BasicMathFunctions/arm_scale_q7.c | 149 - .../Source/BasicMathFunctions/arm_shift_q15.c | 248 - .../Source/BasicMathFunctions/arm_shift_q31.c | 203 - .../Source/BasicMathFunctions/arm_shift_q7.c | 220 - .../Source/BasicMathFunctions/arm_sub_f32.c | 150 - .../Source/BasicMathFunctions/arm_sub_q15.c | 140 - .../Source/BasicMathFunctions/arm_sub_q31.c | 146 - .../Source/BasicMathFunctions/arm_sub_q7.c | 131 - .../Source/CommonTables/arm_common_tables.c | 27251 ---------------- .../Source/CommonTables/arm_const_structs.c | 156 - .../ComplexMathFunctions/arm_cmplx_conj_f32.c | 182 - .../ComplexMathFunctions/arm_cmplx_conj_q15.c | 161 - .../ComplexMathFunctions/arm_cmplx_conj_q31.c | 180 - .../arm_cmplx_dot_prod_f32.c | 203 - .../arm_cmplx_dot_prod_q15.c | 189 - .../arm_cmplx_dot_prod_q31.c | 187 - .../ComplexMathFunctions/arm_cmplx_mag_f32.c | 165 - .../ComplexMathFunctions/arm_cmplx_mag_q15.c | 153 - .../ComplexMathFunctions/arm_cmplx_mag_q31.c | 185 - .../arm_cmplx_mag_squared_f32.c | 215 - .../arm_cmplx_mag_squared_q15.c | 148 - .../arm_cmplx_mag_squared_q31.c | 161 - .../arm_cmplx_mult_cmplx_f32.c | 207 - .../arm_cmplx_mult_cmplx_q15.c | 193 - .../arm_cmplx_mult_cmplx_q31.c | 326 - .../arm_cmplx_mult_real_f32.c | 225 - .../arm_cmplx_mult_real_q15.c | 203 - .../arm_cmplx_mult_real_q31.c | 223 - .../ControllerFunctions/arm_pid_init_f32.c | 87 - .../ControllerFunctions/arm_pid_init_q15.c | 122 - .../ControllerFunctions/arm_pid_init_q31.c | 107 - .../ControllerFunctions/arm_pid_reset_f32.c | 65 - .../ControllerFunctions/arm_pid_reset_q15.c | 64 - .../ControllerFunctions/arm_pid_reset_q31.c | 65 - .../ControllerFunctions/arm_sin_cos_f32.c | 149 - .../ControllerFunctions/arm_sin_cos_q31.c | 122 - .../Source/FastMathFunctions/arm_cos_f32.c | 127 - .../Source/FastMathFunctions/arm_cos_q15.c | 96 - .../Source/FastMathFunctions/arm_cos_q31.c | 96 - .../Source/FastMathFunctions/arm_sin_f32.c | 133 - .../Source/FastMathFunctions/arm_sin_q15.c | 88 - .../Source/FastMathFunctions/arm_sin_q31.c | 87 - .../Source/FastMathFunctions/arm_sqrt_q15.c | 155 - .../Source/FastMathFunctions/arm_sqrt_q31.c | 153 - .../arm_biquad_cascade_df1_32x64_init_q31.c | 110 - .../arm_biquad_cascade_df1_32x64_q31.c | 561 - .../arm_biquad_cascade_df1_f32.c | 425 - .../arm_biquad_cascade_df1_fast_q15.c | 286 - .../arm_biquad_cascade_df1_fast_q31.c | 305 - .../arm_biquad_cascade_df1_init_f32.c | 109 - .../arm_biquad_cascade_df1_init_q15.c | 111 - .../arm_biquad_cascade_df1_init_q31.c | 111 - .../arm_biquad_cascade_df1_q15.c | 411 - .../arm_biquad_cascade_df1_q31.c | 405 - .../arm_biquad_cascade_df2T_f32.c | 603 - .../arm_biquad_cascade_df2T_f64.c | 603 - .../arm_biquad_cascade_df2T_init_f32.c | 102 - .../arm_biquad_cascade_df2T_init_f64.c | 102 - .../arm_biquad_cascade_stereo_df2T_f32.c | 683 - .../arm_biquad_cascade_stereo_df2T_init_f32.c | 102 - .../Source/FilteringFunctions/arm_conv_f32.c | 647 - .../arm_conv_fast_opt_q15.c | 543 - .../FilteringFunctions/arm_conv_fast_q15.c | 1410 - .../FilteringFunctions/arm_conv_fast_q31.c | 577 - .../FilteringFunctions/arm_conv_opt_q15.c | 545 - .../FilteringFunctions/arm_conv_opt_q7.c | 435 - .../FilteringFunctions/arm_conv_partial_f32.c | 669 - .../arm_conv_partial_fast_opt_q15.c | 768 - .../arm_conv_partial_fast_q15.c | 1492 - .../arm_conv_partial_fast_q31.c | 611 - .../arm_conv_partial_opt_q15.c | 765 - .../arm_conv_partial_opt_q7.c | 803 - .../FilteringFunctions/arm_conv_partial_q15.c | 786 - .../FilteringFunctions/arm_conv_partial_q31.c | 607 - .../FilteringFunctions/arm_conv_partial_q7.c | 741 - .../Source/FilteringFunctions/arm_conv_q15.c | 734 - .../Source/FilteringFunctions/arm_conv_q31.c | 565 - .../Source/FilteringFunctions/arm_conv_q7.c | 690 - .../FilteringFunctions/arm_correlate_f32.c | 739 - .../arm_correlate_fast_opt_q15.c | 512 - .../arm_correlate_fast_q15.c | 1319 - .../arm_correlate_fast_q31.c | 612 - .../arm_correlate_opt_q15.c | 513 - .../FilteringFunctions/arm_correlate_opt_q7.c | 464 - .../FilteringFunctions/arm_correlate_q15.c | 719 - .../FilteringFunctions/arm_correlate_q31.c | 665 - .../FilteringFunctions/arm_correlate_q7.c | 790 - .../FilteringFunctions/arm_fir_decimate_f32.c | 524 - .../arm_fir_decimate_fast_q15.c | 598 - .../arm_fir_decimate_fast_q31.c | 351 - .../arm_fir_decimate_init_f32.c | 117 - .../arm_fir_decimate_init_q15.c | 119 - .../arm_fir_decimate_init_q31.c | 117 - .../FilteringFunctions/arm_fir_decimate_q15.c | 696 - .../FilteringFunctions/arm_fir_decimate_q31.c | 311 - .../Source/FilteringFunctions/arm_fir_f32.c | 997 - .../FilteringFunctions/arm_fir_fast_q15.c | 345 - .../FilteringFunctions/arm_fir_fast_q31.c | 305 - .../FilteringFunctions/arm_fir_init_f32.c | 96 - .../FilteringFunctions/arm_fir_init_q15.c | 154 - .../FilteringFunctions/arm_fir_init_q31.c | 96 - .../FilteringFunctions/arm_fir_init_q7.c | 94 - .../arm_fir_interpolate_f32.c | 581 - .../arm_fir_interpolate_init_f32.c | 121 - .../arm_fir_interpolate_init_q15.c | 120 - .../arm_fir_interpolate_init_q31.c | 121 - .../arm_fir_interpolate_q15.c | 508 - .../arm_fir_interpolate_q31.c | 504 - .../FilteringFunctions/arm_fir_lattice_f32.c | 506 - .../arm_fir_lattice_init_f32.c | 83 - .../arm_fir_lattice_init_q15.c | 83 - .../arm_fir_lattice_init_q31.c | 83 - .../FilteringFunctions/arm_fir_lattice_q15.c | 536 - .../FilteringFunctions/arm_fir_lattice_q31.c | 353 - .../Source/FilteringFunctions/arm_fir_q15.c | 691 - .../Source/FilteringFunctions/arm_fir_q31.c | 365 - .../Source/FilteringFunctions/arm_fir_q7.c | 397 - .../FilteringFunctions/arm_fir_sparse_f32.c | 444 - .../arm_fir_sparse_init_f32.c | 107 - .../arm_fir_sparse_init_q15.c | 107 - .../arm_fir_sparse_init_q31.c | 106 - .../arm_fir_sparse_init_q7.c | 107 - .../FilteringFunctions/arm_fir_sparse_q15.c | 481 - .../FilteringFunctions/arm_fir_sparse_q31.c | 461 - .../FilteringFunctions/arm_fir_sparse_q7.c | 480 - .../FilteringFunctions/arm_iir_lattice_f32.c | 447 - .../arm_iir_lattice_init_f32.c | 91 - .../arm_iir_lattice_init_q15.c | 91 - .../arm_iir_lattice_init_q31.c | 91 - .../FilteringFunctions/arm_iir_lattice_q15.c | 464 - .../FilteringFunctions/arm_iir_lattice_q31.c | 350 - .../Source/FilteringFunctions/arm_lms_f32.c | 442 - .../FilteringFunctions/arm_lms_init_f32.c | 95 - .../FilteringFunctions/arm_lms_init_q15.c | 105 - .../FilteringFunctions/arm_lms_init_q31.c | 105 - .../FilteringFunctions/arm_lms_norm_f32.c | 466 - .../arm_lms_norm_init_f32.c | 105 - .../arm_lms_norm_init_q15.c | 112 - .../arm_lms_norm_init_q31.c | 111 - .../FilteringFunctions/arm_lms_norm_q15.c | 440 - .../FilteringFunctions/arm_lms_norm_q31.c | 431 - .../Source/FilteringFunctions/arm_lms_q15.c | 380 - .../Source/FilteringFunctions/arm_lms_q31.c | 369 - .../Source/MatrixFunctions/arm_mat_add_f32.c | 208 - .../Source/MatrixFunctions/arm_mat_add_q15.c | 163 - .../Source/MatrixFunctions/arm_mat_add_q31.c | 207 - .../MatrixFunctions/arm_mat_cmplx_mult_f32.c | 283 - .../MatrixFunctions/arm_mat_cmplx_mult_q15.c | 424 - .../MatrixFunctions/arm_mat_cmplx_mult_q31.c | 293 - .../Source/MatrixFunctions/arm_mat_init_f32.c | 88 - .../Source/MatrixFunctions/arm_mat_init_q15.c | 80 - .../Source/MatrixFunctions/arm_mat_init_q31.c | 84 - .../MatrixFunctions/arm_mat_inverse_f32.c | 703 - .../MatrixFunctions/arm_mat_inverse_f64.c | 703 - .../Source/MatrixFunctions/arm_mat_mult_f32.c | 286 - .../MatrixFunctions/arm_mat_mult_fast_q15.c | 369 - .../MatrixFunctions/arm_mat_mult_fast_q31.c | 226 - .../Source/MatrixFunctions/arm_mat_mult_q15.c | 469 - .../Source/MatrixFunctions/arm_mat_mult_q31.c | 294 - .../MatrixFunctions/arm_mat_scale_f32.c | 181 - .../MatrixFunctions/arm_mat_scale_q15.c | 183 - .../MatrixFunctions/arm_mat_scale_q31.c | 202 - .../Source/MatrixFunctions/arm_mat_sub_f32.c | 209 - .../Source/MatrixFunctions/arm_mat_sub_q15.c | 160 - .../Source/MatrixFunctions/arm_mat_sub_q31.c | 208 - .../MatrixFunctions/arm_mat_trans_f32.c | 218 - .../MatrixFunctions/arm_mat_trans_q15.c | 284 - .../MatrixFunctions/arm_mat_trans_q31.c | 210 - .../Source/StatisticsFunctions/arm_max_f32.c | 186 - .../Source/StatisticsFunctions/arm_max_q15.c | 176 - .../Source/StatisticsFunctions/arm_max_q31.c | 177 - .../Source/StatisticsFunctions/arm_max_q7.c | 177 - .../Source/StatisticsFunctions/arm_mean_f32.c | 139 - .../Source/StatisticsFunctions/arm_mean_q15.c | 133 - .../Source/StatisticsFunctions/arm_mean_q31.c | 136 - .../Source/StatisticsFunctions/arm_mean_q7.c | 133 - .../Source/StatisticsFunctions/arm_min_f32.c | 183 - .../Source/StatisticsFunctions/arm_min_q15.c | 177 - .../Source/StatisticsFunctions/arm_min_q31.c | 176 - .../Source/StatisticsFunctions/arm_min_q7.c | 178 - .../StatisticsFunctions/arm_power_f32.c | 143 - .../StatisticsFunctions/arm_power_q15.c | 152 - .../StatisticsFunctions/arm_power_q31.c | 143 - .../Source/StatisticsFunctions/arm_power_q7.c | 141 - .../Source/StatisticsFunctions/arm_rms_f32.c | 141 - .../Source/StatisticsFunctions/arm_rms_q15.c | 153 - .../Source/StatisticsFunctions/arm_rms_q31.c | 150 - .../Source/StatisticsFunctions/arm_std_f32.c | 208 - .../Source/StatisticsFunctions/arm_std_q15.c | 195 - .../Source/StatisticsFunctions/arm_std_q31.c | 186 - .../Source/StatisticsFunctions/arm_var_f32.c | 204 - .../Source/StatisticsFunctions/arm_var_q15.c | 195 - .../Source/StatisticsFunctions/arm_var_q31.c | 187 - .../Source/SupportFunctions/arm_copy_f32.c | 135 - .../Source/SupportFunctions/arm_copy_q15.c | 114 - .../Source/SupportFunctions/arm_copy_q31.c | 123 - .../Source/SupportFunctions/arm_copy_q7.c | 115 - .../Source/SupportFunctions/arm_fill_f32.c | 134 - .../Source/SupportFunctions/arm_fill_q15.c | 120 - .../Source/SupportFunctions/arm_fill_q31.c | 121 - .../Source/SupportFunctions/arm_fill_q7.c | 118 - .../SupportFunctions/arm_float_to_q15.c | 204 - .../SupportFunctions/arm_float_to_q31.c | 211 - .../Source/SupportFunctions/arm_float_to_q7.c | 203 - .../SupportFunctions/arm_q15_to_float.c | 134 - .../Source/SupportFunctions/arm_q15_to_q31.c | 156 - .../Source/SupportFunctions/arm_q15_to_q7.c | 154 - .../SupportFunctions/arm_q31_to_float.c | 131 - .../Source/SupportFunctions/arm_q31_to_q15.c | 145 - .../Source/SupportFunctions/arm_q31_to_q7.c | 136 - .../Source/SupportFunctions/arm_q7_to_float.c | 131 - .../Source/SupportFunctions/arm_q7_to_q15.c | 157 - .../Source/SupportFunctions/arm_q7_to_q31.c | 142 - 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Src/PC_GW_ProtocolFunctions.c | 126 - Src/State_machine.c | 203 - Src/W3_Flash.c | 432 - Src/app_main.c | 200 - Src/bootloader_support.c | 201 - Src/cc1101.c | 909 - Src/cc1101regs.h | 48 - Src/common.c | 70 - Src/encryption.c | 95 - Src/external_flash.c | 865 - Src/gpio.c | 406 - Src/main.c | 728 - Src/modbus_app_layer.c | 645 - Src/modbus_driver.c | 331 - Src/modbus_impl.c | 108 - Src/parameters.c | 172 - Src/power_management.c | 304 - Src/radio.c | 112 - Src/receive_interrupt.c | 287 - Src/rtc.c | 213 - Src/spi.c | 272 - Src/stm32l0xx_hal_msp.c | 516 - Src/stm32l0xx_it.c | 195 - Src/sys_debug.c | 43 - Src/system_stm32l0xx.c | 285 - Src/usart.c | 111 - Src/watchdog.c | 101 - 561 files changed, 443808 deletions(-) delete mode 100755 Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c delete mode 100755 Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c delete mode 100755 Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c delete mode 100755 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All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_abs_f32.c -* -* Description: Vector absolute value. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" -#include - -/** - * @ingroup groupMath - */ - -/** - * @defgroup BasicAbs Vector Absolute Value - * - * Computes the absolute value of a vector on an element-by-element basis. - * - * 
        
- *     pDst[n] = abs(pSrc[n]),   0 <= n < blockSize.        
- *
- * - * The functions support in-place computation allowing the source and - * destination pointers to reference the same memory buffer. - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup BasicAbs - * @{ - */ - -/** - * @brief Floating-point vector absolute value. - * @param[in] *pSrc points to the input buffer - * @param[out] *pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - * @return none. - */ - -void arm_abs_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0_FAMILY - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t in1, in2, in3, in4; /* temporary variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = |A| */ - /* Calculate absolute and then store the results in the destination buffer. */ - /* read sample from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - - /* find absolute value */ - in1 = fabsf(in1); - - /* read sample from source */ - in4 = *(pSrc + 3); - - /* find absolute value */ - in2 = fabsf(in2); - - /* read sample from source */ - *pDst = in1; - - /* find absolute value */ - in3 = fabsf(in3); - - /* find absolute value */ - in4 = fabsf(in4); - - /* store result to destination */ - *(pDst + 1) = in2; - - /* store result to destination */ - *(pDst + 2) = in3; - - /* store result to destination */ - *(pDst + 3) = in4; - - - /* Update source pointer to process next sampels */ - pSrc += 4u; - - /* Update destination pointer to process next sampels */ - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - while(blkCnt > 0u) - { - /* C = |A| */ - /* Calculate absolute and then store the results in the destination buffer. */ - *pDst++ = fabsf(*pSrc++); - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicAbs group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c deleted file mode 100755 index f0af0911..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c +++ /dev/null @@ -1,179 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_abs_q15.c -* -* Description: Q15 vector absolute value. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAbs - * @{ - */ - -/** - * @brief Q15 vector absolute value. - * @param[in] *pSrc points to the input buffer - * @param[out] *pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF. - */ - -void arm_abs_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0_FAMILY - __SIMD32_TYPE *simd; - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - q15_t in1; /* Input value1 */ - q15_t in2; /* Input value2 */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - simd = __SIMD32_CONST(pDst); - while(blkCnt > 0u) - { - /* C = |A| */ - /* Read two inputs */ - in1 = *pSrc++; - in2 = *pSrc++; - - - /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */ -#ifndef ARM_MATH_BIG_ENDIAN - *simd++ = - __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), - ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16); - -#else - - - *simd++ = - __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), - ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - in1 = *pSrc++; - in2 = *pSrc++; - - -#ifndef ARM_MATH_BIG_ENDIAN - - *simd++ = - __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), - ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16); - -#else - - - *simd++ = - __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), - ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Decrement the loop counter */ - blkCnt--; - } - pDst = (q15_t *)simd; - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = |A| */ - /* Read the input */ - in1 = *pSrc++; - - /* Calculate absolute value of input and then store the result in the destination buffer. */ - *pDst++ = (in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - q15_t in; /* Temporary input variable */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = |A| */ - /* Read the input */ - in = *pSrc++; - - /* Calculate absolute value of input and then store the result in the destination buffer. */ - *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - -} - -/** - * @} end of BasicAbs group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c deleted file mode 100755 index 294ba75a..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c +++ /dev/null @@ -1,130 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_abs_q31.c -* -* Description: Q31 vector absolute value. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAbs - * @{ - */ - - -/** - * @brief Q31 vector absolute value. - * @param[in] *pSrc points to the input buffer - * @param[out] *pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF. - */ - -void arm_abs_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - q31_t in; /* Input value */ - -#ifndef ARM_MATH_CM0_FAMILY - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2, in3, in4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = |A| */ - /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - *pDst++ = (in1 > 0) ? in1 : (q31_t)__QSUB(0, in1); - *pDst++ = (in2 > 0) ? in2 : (q31_t)__QSUB(0, in2); - *pDst++ = (in3 > 0) ? in3 : (q31_t)__QSUB(0, in3); - *pDst++ = (in4 > 0) ? in4 : (q31_t)__QSUB(0, in4); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - while(blkCnt > 0u) - { - /* C = |A| */ - /* Calculate absolute value of the input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */ - in = *pSrc++; - *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in); - - /* Decrement the loop counter */ - blkCnt--; - } - -} - -/** - * @} end of BasicAbs group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c deleted file mode 100755 index 54c6f710..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c +++ /dev/null @@ -1,157 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_abs_q7.c -* -* Description: Q7 vector absolute value. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAbs - * @{ - */ - -/** - * @brief Q7 vector absolute value. - * @param[in] *pSrc points to the input buffer - * @param[out] *pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - * @return none. - * - * \par Conditions for optimum performance - * Input and output buffers should be aligned by 32-bit - * - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F. - */ - -void arm_abs_q7( - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - q7_t in; /* Input value1 */ - -#ifndef ARM_MATH_CM0_FAMILY - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2, in3, in4; /* temporary input variables */ - q31_t out1, out2, out3, out4; /* temporary output variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = |A| */ - /* Read inputs */ - in1 = (q31_t) * pSrc; - in2 = (q31_t) * (pSrc + 1); - in3 = (q31_t) * (pSrc + 2); - - /* find absolute value */ - out1 = (in1 > 0) ? in1 : (q31_t)__QSUB8(0, in1); - - /* read input */ - in4 = (q31_t) * (pSrc + 3); - - /* find absolute value */ - out2 = (in2 > 0) ? in2 : (q31_t)__QSUB8(0, in2); - - /* store result to destination */ - *pDst = (q7_t) out1; - - /* find absolute value */ - out3 = (in3 > 0) ? in3 : (q31_t)__QSUB8(0, in3); - - /* find absolute value */ - out4 = (in4 > 0) ? in4 : (q31_t)__QSUB8(0, in4); - - /* store result to destination */ - *(pDst + 1) = (q7_t) out2; - - /* store result to destination */ - *(pDst + 2) = (q7_t) out3; - - /* store result to destination */ - *(pDst + 3) = (q7_t) out4; - - /* update pointers to process next samples */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; -#else - - /* Run the below code for Cortex-M0 */ - blkCnt = blockSize; - -#endif /* #define ARM_MATH_CM0_FAMILY */ - - while(blkCnt > 0u) - { - /* C = |A| */ - /* Read the input */ - in = *pSrc++; - - /* Store the Absolute result in the destination buffer */ - *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? 0x7f : -in); - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicAbs group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c deleted file mode 100755 index 3430e83e..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c +++ /dev/null @@ -1,150 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_add_f32.c -* -* Description: Floating-point vector addition. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup BasicAdd Vector Addition - * - * Element-by-element addition of two vectors. - * - * 
        
- *     pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.        
- *
- * - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup BasicAdd - * @{ - */ - -/** - * @brief Floating-point vector addition. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - */ - -void arm_add_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t inA1, inA2, inA3, inA4; /* temporary input variabels */ - float32_t inB1, inB2, inB3, inB4; /* temporary input variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - - /* read four inputs from sourceA and four inputs from sourceB */ - inA1 = *pSrcA; - inB1 = *pSrcB; - inA2 = *(pSrcA + 1); - inB2 = *(pSrcB + 1); - inA3 = *(pSrcA + 2); - inB3 = *(pSrcB + 2); - inA4 = *(pSrcA + 3); - inB4 = *(pSrcB + 3); - - /* C = A + B */ - /* add and store result to destination */ - *pDst = inA1 + inB1; - *(pDst + 1) = inA2 + inB2; - *(pDst + 2) = inA3 + inB3; - *(pDst + 3) = inA4 + inB4; - - /* update pointers to process next samples */ - pSrcA += 4u; - pSrcB += 4u; - pDst += 4u; - - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (*pSrcA++) + (*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicAdd group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c deleted file mode 100755 index 570aa4c8..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c +++ /dev/null @@ -1,140 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_add_q15.c -* -* Description: Q15 vector addition -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAdd - * @{ - */ - -/** - * @brief Q15 vector addition. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. - */ - -void arm_add_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inB1, inB2; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - inA1 = *__SIMD32(pSrcA)++; - inA2 = *__SIMD32(pSrcA)++; - inB1 = *__SIMD32(pSrcB)++; - inB2 = *__SIMD32(pSrcB)++; - - *__SIMD32(pDst)++ = __QADD16(inA1, inB1); - *__SIMD32(pDst)++ = __QADD16(inA2, inB2); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - -} - -/** - * @} end of BasicAdd group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c deleted file mode 100755 index 63d83a8e..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c +++ /dev/null @@ -1,148 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_add_q31.c -* -* Description: Q31 vector addition. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAdd - * @{ - */ - - -/** - * @brief Q31 vector addition. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated. - */ - -void arm_add_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inA3, inA4; - q31_t inB1, inB2, inB3, inB4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - inA1 = *pSrcA++; - inA2 = *pSrcA++; - inB1 = *pSrcB++; - inB2 = *pSrcB++; - - inA3 = *pSrcA++; - inA4 = *pSrcA++; - inB3 = *pSrcB++; - inB4 = *pSrcB++; - - *pDst++ = __QADD(inA1, inB1); - *pDst++ = __QADD(inA2, inB2); - *pDst++ = __QADD(inA3, inB3); - *pDst++ = __QADD(inA4, inB4); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = __QADD(*pSrcA++, *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - -} - -/** - * @} end of BasicAdd group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c deleted file mode 100755 index 66e1e23c..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c +++ /dev/null @@ -1,134 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_add_q7.c -* -* Description: Q7 vector addition. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicAdd - * @{ - */ - -/** - * @brief Q7 vector addition. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. - */ - -void arm_add_q7( - q7_t * pSrcA, - q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - -} - -/** - * @} end of BasicAdd group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c deleted file mode 100755 index d7f7bdcb..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c +++ /dev/null @@ -1,135 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_dot_prod_f32.c -* -* Description: Floating-point dot product. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup dot_prod Vector Dot Product - * - * Computes the dot product of two vectors. - * The vectors are multiplied element-by-element and then summed. - * - * 
- *     sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
- *
- * - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup dot_prod - * @{ - */ - -/** - * @brief Dot product of floating-point vectors. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] *result output result returned here - * @return none. - */ - - -void arm_dot_prod_f32( - float32_t * pSrcA, - float32_t * pSrcB, - uint32_t blockSize, - float32_t * result) -{ - float32_t sum = 0.0f; /* Temporary result storage */ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the result in a temporary buffer */ - sum += (*pSrcA++) * (*pSrcB++); - sum += (*pSrcA++) * (*pSrcB++); - sum += (*pSrcA++) * (*pSrcB++); - sum += (*pSrcA++) * (*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the result in a temporary buffer. */ - sum += (*pSrcA++) * (*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - /* Store the result back in the destination buffer */ - *result = sum; -} - -/** - * @} end of dot_prod group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c deleted file mode 100755 index 6f04ed1b..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c +++ /dev/null @@ -1,140 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_dot_prod_q15.c -* -* Description: Q15 dot product. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup dot_prod - * @{ - */ - -/** - * @brief Dot product of Q15 vectors. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] *result output result returned here - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these - * results are added to a 64-bit accumulator in 34.30 format. - * Nonsaturating additions are used and given that there are 33 guard bits in the accumulator - * there is no risk of overflow. - * The return result is in 34.30 format. - */ - -void arm_dot_prod_q15( - q15_t * pSrcA, - q15_t * pSrcB, - uint32_t blockSize, - q63_t * result) -{ - q63_t sum = 0; /* Temporary result storage */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the result in a temporary buffer. */ - sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum); - sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the results in a temporary buffer. */ - sum = __SMLALD(*pSrcA++, *pSrcB++, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the results in a temporary buffer. */ - sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - /* Store the result in the destination buffer in 34.30 format */ - *result = sum; - -} - -/** - * @} end of dot_prod group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c deleted file mode 100755 index b199f8b8..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c +++ /dev/null @@ -1,143 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_dot_prod_q31.c -* -* Description: Q31 dot product. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup dot_prod - * @{ - */ - -/** - * @brief Dot product of Q31 vectors. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] *result output result returned here - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these - * are truncated to 2.48 format by discarding the lower 14 bits. - * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. - * There are 15 guard bits in the accumulator and there is no risk of overflow as long as - * the length of the vectors is less than 2^16 elements. - * The return result is in 16.48 format. - */ - -void arm_dot_prod_q31( - q31_t * pSrcA, - q31_t * pSrcB, - uint32_t blockSize, - q63_t * result) -{ - q63_t sum = 0; /* Temporary result storage */ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inA3, inA4; - q31_t inB1, inB2, inB3, inB4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the result in a temporary buffer. */ - inA1 = *pSrcA++; - inA2 = *pSrcA++; - inA3 = *pSrcA++; - inA4 = *pSrcA++; - inB1 = *pSrcB++; - inB2 = *pSrcB++; - inB3 = *pSrcB++; - inB4 = *pSrcB++; - - sum += ((q63_t) inA1 * inB1) >> 14u; - sum += ((q63_t) inA2 * inB2) >> 14u; - sum += ((q63_t) inA3 * inB3) >> 14u; - sum += ((q63_t) inA4 * inB4) >> 14u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Calculate dot product and then store the result in a temporary buffer. */ - sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* Store the result in the destination buffer in 16.48 format */ - *result = sum; -} - -/** - * @} end of dot_prod group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c deleted file mode 100755 index 0ad6ae47..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c +++ /dev/null @@ -1,159 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_dot_prod_q7.c -* -* Description: Q7 dot product. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup dot_prod - * @{ - */ - -/** - * @brief Dot product of Q7 vectors. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] *result output result returned here - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these - * results are added to an accumulator in 18.14 format. - * Nonsaturating additions are used and there is no danger of wrap around as long as - * the vectors are less than 2^18 elements long. - * The return result is in 18.14 format. - */ - -void arm_dot_prod_q7( - q7_t * pSrcA, - q7_t * pSrcB, - uint32_t blockSize, - q31_t * result) -{ - uint32_t blkCnt; /* loop counter */ - - q31_t sum = 0; /* Temporary variables to store output */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t input1, input2; /* Temporary variables to store input */ - q31_t inA1, inA2, inB1, inB2; /* Temporary variables to store input */ - - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* read 4 samples at a time from sourceA */ - input1 = *__SIMD32(pSrcA)++; - /* read 4 samples at a time from sourceB */ - input2 = *__SIMD32(pSrcB)++; - - /* extract two q7_t samples to q15_t samples */ - inA1 = __SXTB16(__ROR(input1, 8)); - /* extract reminaing two samples */ - inA2 = __SXTB16(input1); - /* extract two q7_t samples to q15_t samples */ - inB1 = __SXTB16(__ROR(input2, 8)); - /* extract reminaing two samples */ - inB2 = __SXTB16(input2); - - /* multiply and accumulate two samples at a time */ - sum = __SMLAD(inA1, inB1, sum); - sum = __SMLAD(inA2, inB2, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Dot product and then store the results in a temporary buffer. */ - sum = __SMLAD(*pSrcA++, *pSrcB++, sum); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ - /* Dot product and then store the results in a temporary buffer. */ - sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - - /* Store the result in the destination buffer in 18.14 format */ - *result = sum; -} - -/** - * @} end of dot_prod group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c deleted file mode 100755 index 27eca680..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c +++ /dev/null @@ -1,174 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_mult_f32.c -* -* Description: Floating-point vector multiplication. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup BasicMult Vector Multiplication - * - * Element-by-element multiplication of two vectors. - * - * 
        
- *     pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.        
- *
- * - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup BasicMult - * @{ - */ - -/** - * @brief Floating-point vector multiplication. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - */ - -void arm_mult_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ -#ifndef ARM_MATH_CM0_FAMILY - - /* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t inA1, inA2, inA3, inA4; /* temporary input variables */ - float32_t inB1, inB2, inB3, inB4; /* temporary input variables */ - float32_t out1, out2, out3, out4; /* temporary output variables */ - - /* loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and store the results in output buffer */ - /* read sample from sourceA */ - inA1 = *pSrcA; - /* read sample from sourceB */ - inB1 = *pSrcB; - /* read sample from sourceA */ - inA2 = *(pSrcA + 1); - /* read sample from sourceB */ - inB2 = *(pSrcB + 1); - - /* out = sourceA * sourceB */ - out1 = inA1 * inB1; - - /* read sample from sourceA */ - inA3 = *(pSrcA + 2); - /* read sample from sourceB */ - inB3 = *(pSrcB + 2); - - /* out = sourceA * sourceB */ - out2 = inA2 * inB2; - - /* read sample from sourceA */ - inA4 = *(pSrcA + 3); - - /* store result to destination buffer */ - *pDst = out1; - - /* read sample from sourceB */ - inB4 = *(pSrcB + 3); - - /* out = sourceA * sourceB */ - out3 = inA3 * inB3; - - /* store result to destination buffer */ - *(pDst + 1) = out2; - - /* out = sourceA * sourceB */ - out4 = inA4 * inB4; - /* store result to destination buffer */ - *(pDst + 2) = out3; - /* store result to destination buffer */ - *(pDst + 3) = out4; - - - /* update pointers to process next samples */ - pSrcA += 4u; - pSrcB += 4u; - pDst += 4u; - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and store the results in output buffer */ - *pDst++ = (*pSrcA++) * (*pSrcB++); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicMult group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c deleted file mode 100755 index 99e36bb3..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c +++ /dev/null @@ -1,154 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. October 2015 -* $Revision: V.1.4.5 a -* -* Project: CMSIS DSP Library -* Title: arm_mult_q15.c -* -* Description: Q15 vector multiplication. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicMult - * @{ - */ - - -/** - * @brief Q15 vector multiplication - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. - */ - -void arm_mult_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inB1, inB2; /* temporary input variables */ - q15_t out1, out2, out3, out4; /* temporary output variables */ - q31_t mul1, mul2, mul3, mul4; /* temporary variables */ - - /* loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* read two samples at a time from sourceA */ - inA1 = *__SIMD32(pSrcA)++; - /* read two samples at a time from sourceB */ - inB1 = *__SIMD32(pSrcB)++; - /* read two samples at a time from sourceA */ - inA2 = *__SIMD32(pSrcA)++; - /* read two samples at a time from sourceB */ - inB2 = *__SIMD32(pSrcB)++; - - /* multiply mul = sourceA * sourceB */ - mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); - mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1); - mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16)); - mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2); - - /* saturate result to 16 bit */ - out1 = (q15_t) __SSAT(mul1 >> 15, 16); - out2 = (q15_t) __SSAT(mul2 >> 15, 16); - out3 = (q15_t) __SSAT(mul3 >> 15, 16); - out4 = (q15_t) __SSAT(mul4 >> 15, 16); - - /* store the result */ -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16); - *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16); - -#else - - *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16); - *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and store the result in the destination buffer */ - *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicMult group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c deleted file mode 100755 index ca8b07b9..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c +++ /dev/null @@ -1,160 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_mult_q31.c -* -* Description: Q31 vector multiplication. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicMult - * @{ - */ - -/** - * @brief Q31 vector multiplication. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated. - */ - -void arm_mult_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inA3, inA4; /* temporary input variables */ - q31_t inB1, inB2, inB3, inB4; /* temporary input variables */ - q31_t out1, out2, out3, out4; /* temporary output variables */ - - /* loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and then store the results in the destination buffer. */ - inA1 = *pSrcA++; - inA2 = *pSrcA++; - inA3 = *pSrcA++; - inA4 = *pSrcA++; - inB1 = *pSrcB++; - inB2 = *pSrcB++; - inB3 = *pSrcB++; - inB4 = *pSrcB++; - - out1 = ((q63_t) inA1 * inB1) >> 32; - out2 = ((q63_t) inA2 * inB2) >> 32; - out3 = ((q63_t) inA3 * inB3) >> 32; - out4 = ((q63_t) inA4 * inB4) >> 32; - - out1 = __SSAT(out1, 31); - out2 = __SSAT(out2, 31); - out3 = __SSAT(out3, 31); - out4 = __SSAT(out4, 31); - - *pDst++ = out1 << 1u; - *pDst++ = out2 << 1u; - *pDst++ = out3 << 1u; - *pDst++ = out4 << 1u; - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and then store the results in the destination buffer. */ - inA1 = *pSrcA++; - inB1 = *pSrcB++; - out1 = ((q63_t) inA1 * inB1) >> 32; - out1 = __SSAT(out1, 31); - *pDst++ = out1 << 1u; - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and then store the results in the destination buffer. */ - *pDst++ = - (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ -} - -/** - * @} end of BasicMult group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c deleted file mode 100755 index c2b50b67..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c +++ /dev/null @@ -1,127 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_mult_q7.c -* -* Description: Q7 vector multiplication. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicMult - * @{ - */ - -/** - * @brief Q7 vector multiplication - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. - */ - -void arm_mult_q7( - q7_t * pSrcA, - q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counters */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q7_t out1, out2, out3, out4; /* Temporary variables to store the product */ - - /* loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and store the results in temporary variables */ - out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - - /* Store the results of 4 inputs in the destination buffer in single cycle by packing */ - *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - - while(blkCnt > 0u) - { - /* C = A * B */ - /* Multiply the inputs and store the result in the destination buffer */ - *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8); - - /* Decrement the blockSize loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicMult group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c deleted file mode 100755 index 4a260b05..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c +++ /dev/null @@ -1,146 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_negate_f32.c -* -* Description: Negates floating-point vectors. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup negate Vector Negate - * - * Negates the elements of a vector. - * - * 
        
- *     pDst[n] = -pSrc[n],   0 <= n < blockSize.        
- *
- * - * The functions support in-place computation allowing the source and - * destination pointers to reference the same memory buffer. - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup negate - * @{ - */ - -/** - * @brief Negates the elements of a floating-point vector. - * @param[in] *pSrc points to the input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - */ - -void arm_negate_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t in1, in2, in3, in4; /* temporary variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* read inputs from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - /* negate the input */ - in1 = -in1; - in2 = -in2; - in3 = -in3; - in4 = -in4; - - /* store the result to destination */ - *pDst = in1; - *(pDst + 1) = in2; - *(pDst + 2) = in3; - *(pDst + 3) = in4; - - /* update pointers to process next samples */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - while(blkCnt > 0u) - { - /* C = -A */ - /* Negate and then store the results in the destination buffer. */ - *pDst++ = -*pSrc++; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of negate group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c deleted file mode 100755 index b130e7b5..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c +++ /dev/null @@ -1,142 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_negate_q15.c -* -* Description: Negates Q15 vectors. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup negate - * @{ - */ - -/** - * @brief Negates the elements of a Q15 vector. - * @param[in] *pSrc points to the input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * \par Conditions for optimum performance - * Input and output buffers should be aligned by 32-bit - * - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF. - */ - -void arm_negate_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - q15_t in; - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t in1, in2; /* Temporary variables */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = -A */ - /* Read two inputs at a time */ - in1 = _SIMD32_OFFSET(pSrc); - in2 = _SIMD32_OFFSET(pSrc + 2); - - /* negate two samples at a time */ - in1 = __QSUB16(0, in1); - - /* negate two samples at a time */ - in2 = __QSUB16(0, in2); - - /* store the result to destination 2 samples at a time */ - _SIMD32_OFFSET(pDst) = in1; - /* store the result to destination 2 samples at a time */ - _SIMD32_OFFSET(pDst + 2) = in2; - - - /* update pointers to process next samples */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - while(blkCnt > 0u) - { - /* C = -A */ - /* Negate and then store the result in the destination buffer. */ - in = *pSrc++; - *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of negate group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c deleted file mode 100755 index 470e151c..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c +++ /dev/null @@ -1,129 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_negate_q31.c -* -* Description: Negates Q31 vectors. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup negate - * @{ - */ - -/** - * @brief Negates the elements of a Q31 vector. - * @param[in] *pSrc points to the input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF. - */ - -void arm_negate_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) -{ - q31_t in; /* Temporary variable */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2, in3, in4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = -A */ - /* Negate and then store the results in the destination buffer. */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - *pDst++ = __QSUB(0, in1); - *pDst++ = __QSUB(0, in2); - *pDst++ = __QSUB(0, in3); - *pDst++ = __QSUB(0, in4); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - - while(blkCnt > 0u) - { - /* C = -A */ - /* Negate and then store the result in the destination buffer. */ - in = *pSrc++; - *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of negate group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c deleted file mode 100755 index e1ba06dd..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c +++ /dev/null @@ -1,125 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_negate_q7.c -* -* Description: Negates Q7 vectors. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup negate - * @{ - */ - -/** - * @brief Negates the elements of a Q7 vector. - * @param[in] *pSrc points to the input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F. - */ - -void arm_negate_q7( - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - q7_t in; - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t input; /* Input values1-4 */ - q31_t zero = 0x00000000; - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = -A */ - /* Read four inputs */ - input = *__SIMD32(pSrc)++; - - /* Store the Negated results in the destination buffer in a single cycle by packing the results */ - *__SIMD32(pDst)++ = __QSUB8(zero, input); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - while(blkCnt > 0u) - { - /* C = -A */ - /* Negate and then store the results in the destination buffer. */ \ - in = *pSrc++; - *pDst++ = (in == (q7_t) 0x80) ? 0x7f : -in; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of negate group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c deleted file mode 100755 index 4f3f593d..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c +++ /dev/null @@ -1,165 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_offset_f32.c -* -* Description: Floating-point vector offset. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* ---------------------------------------------------------------------------- */ -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup offset Vector Offset - * - * Adds a constant offset to each element of a vector. - * - * 
        
- *     pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.        
- *
- * - * The functions support in-place computation allowing the source and - * destination pointers to reference the same memory buffer. - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup offset - * @{ - */ - -/** - * @brief Adds a constant offset to a floating-point vector. - * @param[in] *pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - */ - - -void arm_offset_f32( - float32_t * pSrc, - float32_t offset, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t in1, in2, in3, in4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination buffer. */ - /* read samples from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - - /* add offset to input */ - in1 = in1 + offset; - - /* read samples from source */ - in3 = *(pSrc + 2); - - /* add offset to input */ - in2 = in2 + offset; - - /* read samples from source */ - in4 = *(pSrc + 3); - - /* add offset to input */ - in3 = in3 + offset; - - /* store result to destination */ - *pDst = in1; - - /* add offset to input */ - in4 = in4 + offset; - - /* store result to destination */ - *(pDst + 1) = in2; - - /* store result to destination */ - *(pDst + 2) = in3; - - /* store result to destination */ - *(pDst + 3) = in4; - - /* update pointers to process next samples */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the result in the destination buffer. */ - *pDst++ = (*pSrc++) + offset; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of offset group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c deleted file mode 100755 index 81247533..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c +++ /dev/null @@ -1,136 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_offset_q15.c -* -* Description: Q15 vector offset. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup offset - * @{ - */ - -/** - * @brief Adds a constant offset to a Q15 vector. - * @param[in] *pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. - */ - -void arm_offset_q15( - q15_t * pSrc, - q15_t offset, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t offset_packed; /* Offset packed to 32 bit */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* Offset is packed to 32 bit in order to use SIMD32 for addition */ - offset_packed = __PKHBT(offset, offset, 16); - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination buffer, 2 samples at a time. */ - *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed); - *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination buffer. */ - *pDst++ = (q15_t) __QADD16(*pSrc++, offset); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination buffer. */ - *pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - -} - -/** - * @} end of offset group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c deleted file mode 100755 index 49516efb..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c +++ /dev/null @@ -1,140 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_offset_q31.c -* -* Description: Q31 vector offset. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup offset - * @{ - */ - -/** - * @brief Adds a constant offset to a Q31 vector. - * @param[in] *pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. - */ - -void arm_offset_q31( - q31_t * pSrc, - q31_t offset, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t in1, in2, in3, in4; - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination buffer. */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - *pDst++ = __QADD(in1, offset); - *pDst++ = __QADD(in2, offset); - *pDst++ = __QADD(in3, offset); - *pDst++ = __QADD(in4, offset); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the result in the destination buffer. */ - *pDst++ = __QADD(*pSrc++, offset); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the result in the destination buffer. */ - *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - -} - -/** - * @} end of offset group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c deleted file mode 100755 index 111b9b42..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c +++ /dev/null @@ -1,135 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_offset_q7.c -* -* Description: Q7 vector offset. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup offset - * @{ - */ - -/** - * @brief Adds a constant offset to a Q7 vector. - * @param[in] *pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x80 0x7F] are saturated. - */ - -void arm_offset_q7( - q7_t * pSrc, - q7_t offset, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t offset_packed; /* Offset packed to 32 bit */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* Offset is packed to 32 bit in order to use SIMD32 for addition */ - offset_packed = __PACKq7(offset, offset, offset, offset); - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the results in the destination bufferfor 4 samples at a time. */ - *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrc)++, offset_packed); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the result in the destination buffer. */ - *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A + offset */ - /* Add offset and then store the result in the destination buffer. */ - *pDst++ = (q7_t) __SSAT((q15_t) * pSrc++ + offset, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - -} - -/** - * @} end of offset group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c deleted file mode 100755 index 2c4febc9..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c +++ /dev/null @@ -1,169 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_scale_f32.c -* -* Description: Multiplies a floating-point vector by a scalar. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup scale Vector Scale - * - * Multiply a vector by a scalar value. For floating-point data, the algorithm used is: - * - * 
        
- *     pDst[n] = pSrc[n] * scale,   0 <= n < blockSize.        
- *
- * - * In the fixed-point Q7, Q15, and Q31 functions, scale is represented by - * a fractional multiplication scaleFract and an arithmetic shift shift. - * The shift allows the gain of the scaling operation to exceed 1.0. - * The algorithm used with fixed-point data is: - * - * 
        
- *     pDst[n] = (pSrc[n] * scaleFract) << shift,   0 <= n < blockSize.        
- *
- * - * The overall scale factor applied to the fixed-point data is - * 
        
- *     scale = scaleFract * 2^shift.        
- *
- * - * The functions support in-place computation allowing the source and destination - * pointers to reference the same memory buffer. - */ - -/** - * @addtogroup scale - * @{ - */ - -/** - * @brief Multiplies a floating-point vector by a scalar. - * @param[in] *pSrc points to the input vector - * @param[in] scale scale factor to be applied - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - */ - - -void arm_scale_f32( - float32_t * pSrc, - float32_t scale, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t in1, in2, in3, in4; /* temporary variabels */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the results in the destination buffer. */ - /* read input samples from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - - /* multiply with scaling factor */ - in1 = in1 * scale; - - /* read input sample from source */ - in3 = *(pSrc + 2); - - /* multiply with scaling factor */ - in2 = in2 * scale; - - /* read input sample from source */ - in4 = *(pSrc + 3); - - /* multiply with scaling factor */ - in3 = in3 * scale; - in4 = in4 * scale; - /* store the result to destination */ - *pDst = in1; - *(pDst + 1) = in2; - *(pDst + 2) = in3; - *(pDst + 3) = in4; - - /* update pointers to process next samples */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - *pDst++ = (*pSrc++) * scale; - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of scale group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c deleted file mode 100755 index 4587cce2..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c +++ /dev/null @@ -1,162 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_scale_q15.c -* -* Description: Multiplies a Q15 vector by a scalar. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup scale - * @{ - */ - -/** - * @brief Multiplies a Q15 vector by a scalar. - * @param[in] *pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The input data *pSrc and scaleFract are in 1.15 format. - * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format. - */ - - -void arm_scale_q15( - q15_t * pSrc, - q15_t scaleFract, - int8_t shift, - q15_t * pDst, - uint32_t blockSize) -{ - int8_t kShift = 15 - shift; /* shift to apply after scaling */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q15_t in1, in2, in3, in4; - q31_t inA1, inA2; /* Temporary variables */ - q31_t out1, out2, out3, out4; - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Reading 2 inputs from memory */ - inA1 = *__SIMD32(pSrc)++; - inA2 = *__SIMD32(pSrc)++; - - /* C = A * scale */ - /* Scale the inputs and then store the 2 results in the destination buffer - * in single cycle by packing the outputs */ - out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract); - out2 = (q31_t) ((q15_t) inA1 * scaleFract); - out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract); - out4 = (q31_t) ((q15_t) inA2 * scaleFract); - - /* apply shifting */ - out1 = out1 >> kShift; - out2 = out2 >> kShift; - out3 = out3 >> kShift; - out4 = out4 >> kShift; - - /* saturate the output */ - in1 = (q15_t) (__SSAT(out1, 16)); - in2 = (q15_t) (__SSAT(out2, 16)); - in3 = (q15_t) (__SSAT(out3, 16)); - in4 = (q15_t) (__SSAT(out4, 16)); - - /* store the result to destination */ - *__SIMD32(pDst)++ = __PKHBT(in2, in1, 16); - *__SIMD32(pDst)++ = __PKHBT(in4, in3, 16); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - *pDst++ = (q15_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 16)); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - *pDst++ = (q15_t) (__SSAT(((q31_t) * pSrc++ * scaleFract) >> kShift, 16)); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - -} - -/** - * @} end of scale group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c deleted file mode 100755 index 2dba5bd7..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c +++ /dev/null @@ -1,239 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_scale_q31.c -* -* Description: Multiplies a Q31 vector by a scalar. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup scale - * @{ - */ - -/** - * @brief Multiplies a Q31 vector by a scalar. - * @param[in] *pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The input data *pSrc and scaleFract are in 1.31 format. - * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format. - */ - -void arm_scale_q31( - q31_t * pSrc, - q31_t scaleFract, - int8_t shift, - q31_t * pDst, - uint32_t blockSize) -{ - int8_t kShift = shift + 1; /* Shift to apply after scaling */ - int8_t sign = (kShift & 0x80); - uint32_t blkCnt; /* loop counter */ - q31_t in, out; - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - q31_t in1, in2, in3, in4; /* temporary input variables */ - q31_t out1, out2, out3, out4; /* temporary output variabels */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - if(sign == 0u) - { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* read four inputs from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - /* multiply input with scaler value */ - in1 = ((q63_t) in1 * scaleFract) >> 32; - in2 = ((q63_t) in2 * scaleFract) >> 32; - in3 = ((q63_t) in3 * scaleFract) >> 32; - in4 = ((q63_t) in4 * scaleFract) >> 32; - - /* apply shifting */ - out1 = in1 << kShift; - out2 = in2 << kShift; - - /* saturate the results. */ - if(in1 != (out1 >> kShift)) - out1 = 0x7FFFFFFF ^ (in1 >> 31); - - if(in2 != (out2 >> kShift)) - out2 = 0x7FFFFFFF ^ (in2 >> 31); - - out3 = in3 << kShift; - out4 = in4 << kShift; - - *pDst = out1; - *(pDst + 1) = out2; - - if(in3 != (out3 >> kShift)) - out3 = 0x7FFFFFFF ^ (in3 >> 31); - - if(in4 != (out4 >> kShift)) - out4 = 0x7FFFFFFF ^ (in4 >> 31); - - /* Store result destination */ - *(pDst + 2) = out3; - *(pDst + 3) = out4; - - /* Update pointers to process next sampels */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - } - else - { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* read four inputs from source */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - /* multiply input with scaler value */ - in1 = ((q63_t) in1 * scaleFract) >> 32; - in2 = ((q63_t) in2 * scaleFract) >> 32; - in3 = ((q63_t) in3 * scaleFract) >> 32; - in4 = ((q63_t) in4 * scaleFract) >> 32; - - /* apply shifting */ - out1 = in1 >> -kShift; - out2 = in2 >> -kShift; - - out3 = in3 >> -kShift; - out4 = in4 >> -kShift; - - /* Store result destination */ - *pDst = out1; - *(pDst + 1) = out2; - - *(pDst + 2) = out3; - *(pDst + 3) = out4; - - /* Update pointers to process next sampels */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - } - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - if(sign == 0) - { - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - in = *pSrc++; - in = ((q63_t) in * scaleFract) >> 32; - - out = in << kShift; - - if(in != (out >> kShift)) - out = 0x7FFFFFFF ^ (in >> 31); - - *pDst++ = out; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - in = *pSrc++; - in = ((q63_t) in * scaleFract) >> 32; - - out = in >> -kShift; - - *pDst++ = out; - - /* Decrement the loop counter */ - blkCnt--; - } - - } -} - -/** - * @} end of scale group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c deleted file mode 100755 index 330c739c..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c +++ /dev/null @@ -1,149 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_scale_q7.c -* -* Description: Multiplies a Q7 vector by a scalar. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup scale - * @{ - */ - -/** - * @brief Multiplies a Q7 vector by a scalar. - * @param[in] *pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The input data *pSrc and scaleFract are in 1.7 format. - * These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format. - */ - -void arm_scale_q7( - q7_t * pSrc, - q7_t scaleFract, - int8_t shift, - q7_t * pDst, - uint32_t blockSize) -{ - int8_t kShift = 7 - shift; /* shift to apply after scaling */ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q7_t in1, in2, in3, in4, out1, out2, out3, out4; /* Temporary variables to store input & output */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Reading 4 inputs from memory */ - in1 = *pSrc++; - in2 = *pSrc++; - in3 = *pSrc++; - in4 = *pSrc++; - - /* C = A * scale */ - /* Scale the inputs and then store the results in the temporary variables. */ - out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8)); - out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8)); - out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8)); - out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8)); - - /* Packing the individual outputs into 32bit and storing in - * destination buffer in single write */ - *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - *pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8)); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - *pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8)); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - -} - -/** - * @} end of scale group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c deleted file mode 100755 index b2d27e60..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c +++ /dev/null @@ -1,248 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_shift_q15.c -* -* Description: Shifts the elements of a Q15 vector by a specified number of bits. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup shift - * @{ - */ - -/** - * @brief Shifts the elements of a Q15 vector a specified number of bits. - * @param[in] *pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. - */ - -void arm_shift_q15( - q15_t * pSrc, - int8_t shiftBits, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - uint8_t sign; /* Sign of shiftBits */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - q15_t in1, in2; /* Temporary variables */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* Getting the sign of shiftBits */ - sign = (shiftBits & 0x80); - - /* If the shift value is positive then do right shift else left shift */ - if(sign == 0u) - { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Read 2 inputs */ - in1 = *pSrc++; - in2 = *pSrc++; - /* C = A << shiftBits */ - /* Shift the inputs and then store the results in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16), - __SSAT((in2 << shiftBits), 16), 16); - -#else - - *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16), - __SSAT((in1 << shiftBits), 16), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - in1 = *pSrc++; - in2 = *pSrc++; - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16), - __SSAT((in2 << shiftBits), 16), 16); - -#else - - *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16), - __SSAT((in1 << shiftBits), 16), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Shift and then store the results in the destination buffer. */ - *pDst++ = __SSAT((*pSrc++ << shiftBits), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* Read 2 inputs */ - in1 = *pSrc++; - in2 = *pSrc++; - - /* C = A >> shiftBits */ - /* Shift the inputs and then store the results in the destination buffer. */ -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits), - (in2 >> -shiftBits), 16); - -#else - - *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits), - (in1 >> -shiftBits), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - in1 = *pSrc++; - in2 = *pSrc++; - -#ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits), - (in2 >> -shiftBits), 16); - -#else - - *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits), - (in1 >> -shiftBits), 16); - -#endif /* #ifndef ARM_MATH_BIG_ENDIAN */ - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Shift the inputs and then store the results in the destination buffer. */ - *pDst++ = (*pSrc++ >> -shiftBits); - - /* Decrement the loop counter */ - blkCnt--; - } - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Getting the sign of shiftBits */ - sign = (shiftBits & 0x80); - - /* If the shift value is positive then do right shift else left shift */ - if(sign == 0u) - { - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Shift and then store the results in the destination buffer. */ - *pDst++ = __SSAT(((q31_t) * pSrc++ << shiftBits), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Shift the inputs and then store the results in the destination buffer. */ - *pDst++ = (*pSrc++ >> -shiftBits); - - /* Decrement the loop counter */ - blkCnt--; - } - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - -} - -/** - * @} end of shift group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c deleted file mode 100755 index 59904911..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c +++ /dev/null @@ -1,203 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_shift_q31.c -* -* Description: Shifts the elements of a Q31 vector by a specified number of bits. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ -/** - * @defgroup shift Vector Shift - * - * Shifts the elements of a fixed-point vector by a specified number of bits. - * There are separate functions for Q7, Q15, and Q31 data types. - * The underlying algorithm used is: - * - * 
        
- *     pDst[n] = pSrc[n] << shift,   0 <= n < blockSize.        
- *
- * - * If shift is positive then the elements of the vector are shifted to the left. - * If shift is negative then the elements of the vector are shifted to the right. - * - * The functions support in-place computation allowing the source and destination - * pointers to reference the same memory buffer. - */ - -/** - * @addtogroup shift - * @{ - */ - -/** - * @brief Shifts the elements of a Q31 vector a specified number of bits. - * @param[in] *pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. - */ - -void arm_shift_q31( - q31_t * pSrc, - int8_t shiftBits, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */ - -#ifndef ARM_MATH_CM0_FAMILY - - q31_t in1, in2, in3, in4; /* Temporary input variables */ - q31_t out1, out2, out3, out4; /* Temporary output variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - - if(sign == 0u) - { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Shift the input and then store the results in the destination buffer. */ - in1 = *pSrc; - in2 = *(pSrc + 1); - out1 = in1 << shiftBits; - in3 = *(pSrc + 2); - out2 = in2 << shiftBits; - in4 = *(pSrc + 3); - if(in1 != (out1 >> shiftBits)) - out1 = 0x7FFFFFFF ^ (in1 >> 31); - - if(in2 != (out2 >> shiftBits)) - out2 = 0x7FFFFFFF ^ (in2 >> 31); - - *pDst = out1; - out3 = in3 << shiftBits; - *(pDst + 1) = out2; - out4 = in4 << shiftBits; - - if(in3 != (out3 >> shiftBits)) - out3 = 0x7FFFFFFF ^ (in3 >> 31); - - if(in4 != (out4 >> shiftBits)) - out4 = 0x7FFFFFFF ^ (in4 >> 31); - - *(pDst + 2) = out3; - *(pDst + 3) = out4; - - /* Update destination pointer to process next sampels */ - pSrc += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Shift the input and then store the results in the destination buffer. */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - *pDst = (in1 >> -shiftBits); - *(pDst + 1) = (in2 >> -shiftBits); - *(pDst + 2) = (in3 >> -shiftBits); - *(pDst + 3) = (in4 >> -shiftBits); - - - pSrc += 4u; - pDst += 4u; - - blkCnt--; - } - - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - - while(blkCnt > 0u) - { - /* C = A (>> or <<) shiftBits */ - /* Shift the input and then store the result in the destination buffer. */ - *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) : - (*pSrc++ >> -shiftBits); - - /* Decrement the loop counter */ - blkCnt--; - } - - -} - -/** - * @} end of shift group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c deleted file mode 100755 index f9250540..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c +++ /dev/null @@ -1,220 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_shift_q7.c -* -* Description: Processing function for the Q7 Shifting -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup shift - * @{ - */ - - -/** - * @brief Shifts the elements of a Q7 vector a specified number of bits. - * @param[in] *pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * \par Conditions for optimum performance - * Input and output buffers should be aligned by 32-bit - * - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x8 0x7F] will be saturated. - */ - -void arm_shift_q7( - q7_t * pSrc, - int8_t shiftBits, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - uint8_t sign; /* Sign of shiftBits */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q7_t in1; /* Input value1 */ - q7_t in2; /* Input value2 */ - q7_t in3; /* Input value3 */ - q7_t in4; /* Input value4 */ - - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* Getting the sign of shiftBits */ - sign = (shiftBits & 0x80); - - /* If the shift value is positive then do right shift else left shift */ - if(sign == 0u) - { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Read 4 inputs */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */ - *__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8), - __SSAT((in2 << shiftBits), 8), - __SSAT((in3 << shiftBits), 8), - __SSAT((in4 << shiftBits), 8)); - /* Update source pointer to process next sampels */ - pSrc += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Shift the input and then store the result in the destination buffer. */ - *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8); - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - shiftBits = -shiftBits; - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Read 4 inputs */ - in1 = *pSrc; - in2 = *(pSrc + 1); - in3 = *(pSrc + 2); - in4 = *(pSrc + 3); - - /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */ - *__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits), - (in3 >> shiftBits), (in4 >> shiftBits)); - - - pSrc += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Shift the input and then store the result in the destination buffer. */ - in1 = *pSrc++; - *pDst++ = (in1 >> shiftBits); - - /* Decrement the loop counter */ - blkCnt--; - } - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Getting the sign of shiftBits */ - sign = (shiftBits & 0x80); - - /* If the shift value is positive then do right shift else left shift */ - if(sign == 0u) - { - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A << shiftBits */ - /* Shift the input and then store the result in the destination buffer. */ - *pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8); - - /* Decrement the loop counter */ - blkCnt--; - } - } - else - { - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A >> shiftBits */ - /* Shift the input and then store the result in the destination buffer. */ - *pDst++ = (*pSrc++ >> -shiftBits); - - /* Decrement the loop counter */ - blkCnt--; - } - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ -} - -/** - * @} end of shift group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c deleted file mode 100755 index e7ff234a..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c +++ /dev/null @@ -1,150 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_sub_f32.c -* -* Description: Floating-point vector subtraction. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* ---------------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @defgroup BasicSub Vector Subtraction - * - * Element-by-element subtraction of two vectors. - * - * 
        
- *     pDst[n] = pSrcA[n] - pSrcB[n],   0 <= n < blockSize.        
- *
- * - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. - */ - -/** - * @addtogroup BasicSub - * @{ - */ - - -/** - * @brief Floating-point vector subtraction. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - */ - -void arm_sub_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t inA1, inA2, inA3, inA4; /* temporary variables */ - float32_t inB1, inB2, inB3, inB4; /* temporary variables */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the results in the destination buffer. */ - /* Read 4 input samples from sourceA and sourceB */ - inA1 = *pSrcA; - inB1 = *pSrcB; - inA2 = *(pSrcA + 1); - inB2 = *(pSrcB + 1); - inA3 = *(pSrcA + 2); - inB3 = *(pSrcB + 2); - inA4 = *(pSrcA + 3); - inB4 = *(pSrcB + 3); - - /* dst = srcA - srcB */ - /* subtract and store the result */ - *pDst = inA1 - inB1; - *(pDst + 1) = inA2 - inB2; - *(pDst + 2) = inA3 - inB3; - *(pDst + 3) = inA4 - inB4; - - - /* Update pointers to process next sampels */ - pSrcA += 4u; - pSrcB += 4u; - pDst += 4u; - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the results in the destination buffer. */ - *pDst++ = (*pSrcA++) - (*pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } -} - -/** - * @} end of BasicSub group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c deleted file mode 100755 index 420db7f7..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c +++ /dev/null @@ -1,140 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_sub_q15.c -* -* Description: Q15 vector subtraction. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicSub - * @{ - */ - -/** - * @brief Q15 vector subtraction. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. - */ - -void arm_sub_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2; - q31_t inB1, inB2; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the results in the destination buffer two samples at a time. */ - inA1 = *__SIMD32(pSrcA)++; - inA2 = *__SIMD32(pSrcA)++; - inB1 = *__SIMD32(pSrcB)++; - inB2 = *__SIMD32(pSrcB)++; - - *__SIMD32(pDst)++ = __QSUB16(inA1, inB1); - *__SIMD32(pDst)++ = __QSUB16(inA2, inB2); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ - *pSrcB++), 16); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - -} - -/** - * @} end of BasicSub group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c deleted file mode 100755 index 40ee7e10..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c +++ /dev/null @@ -1,146 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_sub_q31.c -* -* Description: Q31 vector subtraction. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicSub - * @{ - */ - -/** - * @brief Q31 vector subtraction. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. - */ - -void arm_sub_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - q31_t inA1, inA2, inA3, inA4; - q31_t inB1, inB2, inB3, inB4; - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the results in the destination buffer. */ - inA1 = *pSrcA++; - inA2 = *pSrcA++; - inB1 = *pSrcB++; - inB2 = *pSrcB++; - - inA3 = *pSrcA++; - inA4 = *pSrcA++; - inB3 = *pSrcB++; - inB4 = *pSrcB++; - - *pDst++ = __QSUB(inA1, inB1); - *pDst++ = __QSUB(inA2, inB2); - *pDst++ = __QSUB(inA3, inB3); - *pDst++ = __QSUB(inA4, inB4); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = __QSUB(*pSrcA++, *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ - *pSrcB++); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - -} - -/** - * @} end of BasicSub group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c b/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c deleted file mode 100755 index 2a2cb5e3..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c +++ /dev/null @@ -1,131 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_sub_q7.c -* -* Description: Q7 vector subtraction. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_math.h" - -/** - * @ingroup groupMath - */ - -/** - * @addtogroup BasicSub - * @{ - */ - -/** - * @brief Q7 vector subtraction. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The function uses saturating arithmetic. - * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. - */ - -void arm_sub_q7( - q7_t * pSrcA, - q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize) -{ - uint32_t blkCnt; /* loop counter */ - -#ifndef ARM_MATH_CM0_FAMILY - -/* Run the below code for Cortex-M4 and Cortex-M3 */ - - /*loop Unrolling */ - blkCnt = blockSize >> 2u; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the results in the destination buffer 4 samples at a time. */ - *__SIMD32(pDst)++ = __QSUB8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++); - - /* Decrement the loop counter */ - blkCnt--; - } - - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ - blkCnt = blockSize % 0x4u; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = __SSAT(*pSrcA++ - *pSrcB++, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#else - - /* Run the below code for Cortex-M0 */ - - /* Initialize blkCnt with number of samples */ - blkCnt = blockSize; - - while(blkCnt > 0u) - { - /* C = A - B */ - /* Subtract and then store the result in the destination buffer. */ - *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ - *pSrcB++, 8); - - /* Decrement the loop counter */ - blkCnt--; - } - -#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - - -} - -/** - * @} end of BasicSub group - */ diff --git a/Drivers/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c b/Drivers/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c deleted file mode 100755 index 79fe976e..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c +++ /dev/null @@ -1,27251 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_common_tables.c -* -* Description: This file has common tables like fft twiddle factors, Bitreverse, reciprocal etc which are used across different functions -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - - -#include "arm_math.h" -#include "arm_common_tables.h" - -/** - * @ingroup groupTransforms - */ - -/** - * @addtogroup CFFT_CIFFT Complex FFT Tables - * @{ - */ - -/** -* \par -* Pseudo code for Generation of Bit reversal Table is -* \par -* 
for(l=1;l <= N/4;l++)    
-* {    
-*   for(i=0;i> 1;    
-*  }
-* \par -* where N = 4096 logN2 = 12 -* \par -* N is the maximum FFT Size supported -*/ - -/* -* @brief Table for bit reversal process -*/ -const uint16_t armBitRevTable[1024] = { - 0x400, 0x200, 0x600, 0x100, 0x500, 0x300, 0x700, 0x80, 0x480, 0x280, - 0x680, 0x180, 0x580, 0x380, 0x780, 0x40, 0x440, 0x240, 0x640, 0x140, - 0x540, 0x340, 0x740, 0xc0, 0x4c0, 0x2c0, 0x6c0, 0x1c0, 0x5c0, 0x3c0, - 0x7c0, 0x20, 0x420, 0x220, 0x620, 0x120, 0x520, 0x320, 0x720, 0xa0, - 0x4a0, 0x2a0, 0x6a0, 0x1a0, 0x5a0, 0x3a0, 0x7a0, 0x60, 0x460, 0x260, - 0x660, 0x160, 0x560, 0x360, 0x760, 0xe0, 0x4e0, 0x2e0, 0x6e0, 0x1e0, - 0x5e0, 0x3e0, 0x7e0, 0x10, 0x410, 0x210, 0x610, 0x110, 0x510, 0x310, - 0x710, 0x90, 0x490, 0x290, 0x690, 0x190, 0x590, 0x390, 0x790, 0x50, - 0x450, 0x250, 0x650, 0x150, 0x550, 0x350, 0x750, 0xd0, 0x4d0, 0x2d0, - 0x6d0, 0x1d0, 0x5d0, 0x3d0, 0x7d0, 0x30, 0x430, 0x230, 0x630, 0x130, - 0x530, 0x330, 0x730, 0xb0, 0x4b0, 0x2b0, 0x6b0, 0x1b0, 0x5b0, 0x3b0, - 0x7b0, 0x70, 0x470, 0x270, 0x670, 0x170, 0x570, 0x370, 0x770, 0xf0, - 0x4f0, 0x2f0, 0x6f0, 0x1f0, 0x5f0, 0x3f0, 0x7f0, 0x8, 0x408, 0x208, - 0x608, 0x108, 0x508, 0x308, 0x708, 0x88, 0x488, 0x288, 0x688, 0x188, - 0x588, 0x388, 0x788, 0x48, 0x448, 0x248, 0x648, 0x148, 0x548, 0x348, - 0x748, 0xc8, 0x4c8, 0x2c8, 0x6c8, 0x1c8, 0x5c8, 0x3c8, 0x7c8, 0x28, - 0x428, 0x228, 0x628, 0x128, 0x528, 0x328, 0x728, 0xa8, 0x4a8, 0x2a8, - 0x6a8, 0x1a8, 0x5a8, 0x3a8, 0x7a8, 0x68, 0x468, 0x268, 0x668, 0x168, - 0x568, 0x368, 0x768, 0xe8, 0x4e8, 0x2e8, 0x6e8, 0x1e8, 0x5e8, 0x3e8, - 0x7e8, 0x18, 0x418, 0x218, 0x618, 0x118, 0x518, 0x318, 0x718, 0x98, - 0x498, 0x298, 0x698, 0x198, 0x598, 0x398, 0x798, 0x58, 0x458, 0x258, - 0x658, 0x158, 0x558, 0x358, 0x758, 0xd8, 0x4d8, 0x2d8, 0x6d8, 0x1d8, - 0x5d8, 0x3d8, 0x7d8, 0x38, 0x438, 0x238, 0x638, 0x138, 0x538, 0x338, - 0x738, 0xb8, 0x4b8, 0x2b8, 0x6b8, 0x1b8, 0x5b8, 0x3b8, 0x7b8, 0x78, - 0x478, 0x278, 0x678, 0x178, 0x578, 0x378, 0x778, 0xf8, 0x4f8, 0x2f8, - 0x6f8, 0x1f8, 0x5f8, 0x3f8, 0x7f8, 0x4, 0x404, 0x204, 0x604, 0x104, - 0x504, 0x304, 0x704, 0x84, 0x484, 0x284, 0x684, 0x184, 0x584, 0x384, - 0x784, 0x44, 0x444, 0x244, 0x644, 0x144, 0x544, 0x344, 0x744, 0xc4, - 0x4c4, 0x2c4, 0x6c4, 0x1c4, 0x5c4, 0x3c4, 0x7c4, 0x24, 0x424, 0x224, - 0x624, 0x124, 0x524, 0x324, 0x724, 0xa4, 0x4a4, 0x2a4, 0x6a4, 0x1a4, - 0x5a4, 0x3a4, 0x7a4, 0x64, 0x464, 0x264, 0x664, 0x164, 0x564, 0x364, - 0x764, 0xe4, 0x4e4, 0x2e4, 0x6e4, 0x1e4, 0x5e4, 0x3e4, 0x7e4, 0x14, - 0x414, 0x214, 0x614, 0x114, 0x514, 0x314, 0x714, 0x94, 0x494, 0x294, - 0x694, 0x194, 0x594, 0x394, 0x794, 0x54, 0x454, 0x254, 0x654, 0x154, - 0x554, 0x354, 0x754, 0xd4, 0x4d4, 0x2d4, 0x6d4, 0x1d4, 0x5d4, 0x3d4, - 0x7d4, 0x34, 0x434, 0x234, 0x634, 0x134, 0x534, 0x334, 0x734, 0xb4, - 0x4b4, 0x2b4, 0x6b4, 0x1b4, 0x5b4, 0x3b4, 0x7b4, 0x74, 0x474, 0x274, - 0x674, 0x174, 0x574, 0x374, 0x774, 0xf4, 0x4f4, 0x2f4, 0x6f4, 0x1f4, - 0x5f4, 0x3f4, 0x7f4, 0xc, 0x40c, 0x20c, 0x60c, 0x10c, 0x50c, 0x30c, - 0x70c, 0x8c, 0x48c, 0x28c, 0x68c, 0x18c, 0x58c, 0x38c, 0x78c, 0x4c, - 0x44c, 0x24c, 0x64c, 0x14c, 0x54c, 0x34c, 0x74c, 0xcc, 0x4cc, 0x2cc, - 0x6cc, 0x1cc, 0x5cc, 0x3cc, 0x7cc, 0x2c, 0x42c, 0x22c, 0x62c, 0x12c, - 0x52c, 0x32c, 0x72c, 0xac, 0x4ac, 0x2ac, 0x6ac, 0x1ac, 0x5ac, 0x3ac, - 0x7ac, 0x6c, 0x46c, 0x26c, 0x66c, 0x16c, 0x56c, 0x36c, 0x76c, 0xec, - 0x4ec, 0x2ec, 0x6ec, 0x1ec, 0x5ec, 0x3ec, 0x7ec, 0x1c, 0x41c, 0x21c, - 0x61c, 0x11c, 0x51c, 0x31c, 0x71c, 0x9c, 0x49c, 0x29c, 0x69c, 0x19c, - 0x59c, 0x39c, 0x79c, 0x5c, 0x45c, 0x25c, 0x65c, 0x15c, 0x55c, 0x35c, - 0x75c, 0xdc, 0x4dc, 0x2dc, 0x6dc, 0x1dc, 0x5dc, 0x3dc, 0x7dc, 0x3c, - 0x43c, 0x23c, 0x63c, 0x13c, 0x53c, 0x33c, 0x73c, 0xbc, 0x4bc, 0x2bc, - 0x6bc, 0x1bc, 0x5bc, 0x3bc, 0x7bc, 0x7c, 0x47c, 0x27c, 0x67c, 0x17c, - 0x57c, 0x37c, 0x77c, 0xfc, 0x4fc, 0x2fc, 0x6fc, 0x1fc, 0x5fc, 0x3fc, - 0x7fc, 0x2, 0x402, 0x202, 0x602, 0x102, 0x502, 0x302, 0x702, 0x82, - 0x482, 0x282, 0x682, 0x182, 0x582, 0x382, 0x782, 0x42, 0x442, 0x242, - 0x642, 0x142, 0x542, 0x342, 0x742, 0xc2, 0x4c2, 0x2c2, 0x6c2, 0x1c2, - 0x5c2, 0x3c2, 0x7c2, 0x22, 0x422, 0x222, 0x622, 0x122, 0x522, 0x322, - 0x722, 0xa2, 0x4a2, 0x2a2, 0x6a2, 0x1a2, 0x5a2, 0x3a2, 0x7a2, 0x62, - 0x462, 0x262, 0x662, 0x162, 0x562, 0x362, 0x762, 0xe2, 0x4e2, 0x2e2, - 0x6e2, 0x1e2, 0x5e2, 0x3e2, 0x7e2, 0x12, 0x412, 0x212, 0x612, 0x112, - 0x512, 0x312, 0x712, 0x92, 0x492, 0x292, 0x692, 0x192, 0x592, 0x392, - 0x792, 0x52, 0x452, 0x252, 0x652, 0x152, 0x552, 0x352, 0x752, 0xd2, - 0x4d2, 0x2d2, 0x6d2, 0x1d2, 0x5d2, 0x3d2, 0x7d2, 0x32, 0x432, 0x232, - 0x632, 0x132, 0x532, 0x332, 0x732, 0xb2, 0x4b2, 0x2b2, 0x6b2, 0x1b2, - 0x5b2, 0x3b2, 0x7b2, 0x72, 0x472, 0x272, 0x672, 0x172, 0x572, 0x372, - 0x772, 0xf2, 0x4f2, 0x2f2, 0x6f2, 0x1f2, 0x5f2, 0x3f2, 0x7f2, 0xa, - 0x40a, 0x20a, 0x60a, 0x10a, 0x50a, 0x30a, 0x70a, 0x8a, 0x48a, 0x28a, - 0x68a, 0x18a, 0x58a, 0x38a, 0x78a, 0x4a, 0x44a, 0x24a, 0x64a, 0x14a, - 0x54a, 0x34a, 0x74a, 0xca, 0x4ca, 0x2ca, 0x6ca, 0x1ca, 0x5ca, 0x3ca, - 0x7ca, 0x2a, 0x42a, 0x22a, 0x62a, 0x12a, 0x52a, 0x32a, 0x72a, 0xaa, - 0x4aa, 0x2aa, 0x6aa, 0x1aa, 0x5aa, 0x3aa, 0x7aa, 0x6a, 0x46a, 0x26a, - 0x66a, 0x16a, 0x56a, 0x36a, 0x76a, 0xea, 0x4ea, 0x2ea, 0x6ea, 0x1ea, - 0x5ea, 0x3ea, 0x7ea, 0x1a, 0x41a, 0x21a, 0x61a, 0x11a, 0x51a, 0x31a, - 0x71a, 0x9a, 0x49a, 0x29a, 0x69a, 0x19a, 0x59a, 0x39a, 0x79a, 0x5a, - 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0x736, 0xb6, 0x4b6, 0x2b6, 0x6b6, 0x1b6, 0x5b6, 0x3b6, 0x7b6, 0x76, - 0x476, 0x276, 0x676, 0x176, 0x576, 0x376, 0x776, 0xf6, 0x4f6, 0x2f6, - 0x6f6, 0x1f6, 0x5f6, 0x3f6, 0x7f6, 0xe, 0x40e, 0x20e, 0x60e, 0x10e, - 0x50e, 0x30e, 0x70e, 0x8e, 0x48e, 0x28e, 0x68e, 0x18e, 0x58e, 0x38e, - 0x78e, 0x4e, 0x44e, 0x24e, 0x64e, 0x14e, 0x54e, 0x34e, 0x74e, 0xce, - 0x4ce, 0x2ce, 0x6ce, 0x1ce, 0x5ce, 0x3ce, 0x7ce, 0x2e, 0x42e, 0x22e, - 0x62e, 0x12e, 0x52e, 0x32e, 0x72e, 0xae, 0x4ae, 0x2ae, 0x6ae, 0x1ae, - 0x5ae, 0x3ae, 0x7ae, 0x6e, 0x46e, 0x26e, 0x66e, 0x16e, 0x56e, 0x36e, - 0x76e, 0xee, 0x4ee, 0x2ee, 0x6ee, 0x1ee, 0x5ee, 0x3ee, 0x7ee, 0x1e, - 0x41e, 0x21e, 0x61e, 0x11e, 0x51e, 0x31e, 0x71e, 0x9e, 0x49e, 0x29e, - 0x69e, 0x19e, 0x59e, 0x39e, 0x79e, 0x5e, 0x45e, 0x25e, 0x65e, 0x15e, - 0x55e, 0x35e, 0x75e, 0xde, 0x4de, 0x2de, 0x6de, 0x1de, 0x5de, 0x3de, - 0x7de, 0x3e, 0x43e, 0x23e, 0x63e, 0x13e, 0x53e, 0x33e, 0x73e, 0xbe, - 0x4be, 0x2be, 0x6be, 0x1be, 0x5be, 0x3be, 0x7be, 0x7e, 0x47e, 0x27e, - 0x67e, 0x17e, 0x57e, 0x37e, 0x77e, 0xfe, 0x4fe, 0x2fe, 0x6fe, 0x1fe, - 0x5fe, 0x3fe, 0x7fe, 0x1 -}; - - -/* -* @brief Floating-point Twiddle factors Table Generation -*/ - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 16 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float32_t twiddleCoef_16[32] = { - 1.000000000f, 0.000000000f, - 0.923879533f, 0.382683432f, - 0.707106781f, 0.707106781f, - 0.382683432f, 0.923879533f, - 0.000000000f, 1.000000000f, - -0.382683432f, 0.923879533f, - -0.707106781f, 0.707106781f, - -0.923879533f, 0.382683432f, - -1.000000000f, 0.000000000f, - -0.923879533f, -0.382683432f, - -0.707106781f, -0.707106781f, - -0.382683432f, -0.923879533f, - -0.000000000f, -1.000000000f, - 0.382683432f, -0.923879533f, - 0.707106781f, -0.707106781f, - 0.923879533f, -0.382683432f -}; - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 32 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float32_t twiddleCoef_32[64] = { - 1.000000000f, 0.000000000f, - 0.980785280f, 0.195090322f, - 0.923879533f, 0.382683432f, - 0.831469612f, 0.555570233f, - 0.707106781f, 0.707106781f, - 0.555570233f, 0.831469612f, - 0.382683432f, 0.923879533f, - 0.195090322f, 0.980785280f, - 0.000000000f, 1.000000000f, - -0.195090322f, 0.980785280f, - -0.382683432f, 0.923879533f, - -0.555570233f, 0.831469612f, - -0.707106781f, 0.707106781f, - -0.831469612f, 0.555570233f, - -0.923879533f, 0.382683432f, - -0.980785280f, 0.195090322f, - -1.000000000f, 0.000000000f, - -0.980785280f, -0.195090322f, - -0.923879533f, -0.382683432f, - -0.831469612f, -0.555570233f, - -0.707106781f, -0.707106781f, - -0.555570233f, -0.831469612f, - -0.382683432f, -0.923879533f, - -0.195090322f, -0.980785280f, - -0.000000000f, -1.000000000f, - 0.195090322f, -0.980785280f, - 0.382683432f, -0.923879533f, - 0.555570233f, -0.831469612f, - 0.707106781f, -0.707106781f, - 0.831469612f, -0.555570233f, - 0.923879533f, -0.382683432f, - 0.980785280f, -0.195090322f -}; - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 64 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float32_t twiddleCoef_64[128] = { - 1.000000000f, 0.000000000f, - 0.995184727f, 0.098017140f, - 0.980785280f, 0.195090322f, - 0.956940336f, 0.290284677f, - 0.923879533f, 0.382683432f, - 0.881921264f, 0.471396737f, - 0.831469612f, 0.555570233f, - 0.773010453f, 0.634393284f, - 0.707106781f, 0.707106781f, - 0.634393284f, 0.773010453f, - 0.555570233f, 0.831469612f, - 0.471396737f, 0.881921264f, - 0.382683432f, 0.923879533f, - 0.290284677f, 0.956940336f, - 0.195090322f, 0.980785280f, - 0.098017140f, 0.995184727f, - 0.000000000f, 1.000000000f, - -0.098017140f, 0.995184727f, - -0.195090322f, 0.980785280f, - -0.290284677f, 0.956940336f, - -0.382683432f, 0.923879533f, - -0.471396737f, 0.881921264f, - -0.555570233f, 0.831469612f, - -0.634393284f, 0.773010453f, - -0.707106781f, 0.707106781f, - -0.773010453f, 0.634393284f, - -0.831469612f, 0.555570233f, - -0.881921264f, 0.471396737f, - -0.923879533f, 0.382683432f, - -0.956940336f, 0.290284677f, - -0.980785280f, 0.195090322f, - -0.995184727f, 0.098017140f, - -1.000000000f, 0.000000000f, - -0.995184727f, -0.098017140f, - -0.980785280f, -0.195090322f, - -0.956940336f, -0.290284677f, - -0.923879533f, -0.382683432f, - -0.881921264f, -0.471396737f, - -0.831469612f, -0.555570233f, - -0.773010453f, -0.634393284f, - -0.707106781f, -0.707106781f, - -0.634393284f, -0.773010453f, - -0.555570233f, -0.831469612f, - -0.471396737f, -0.881921264f, - -0.382683432f, -0.923879533f, - -0.290284677f, -0.956940336f, - -0.195090322f, -0.980785280f, - -0.098017140f, -0.995184727f, - -0.000000000f, -1.000000000f, - 0.098017140f, -0.995184727f, - 0.195090322f, -0.980785280f, - 0.290284677f, -0.956940336f, - 0.382683432f, -0.923879533f, - 0.471396737f, -0.881921264f, - 0.555570233f, -0.831469612f, - 0.634393284f, -0.773010453f, - 0.707106781f, -0.707106781f, - 0.773010453f, -0.634393284f, - 0.831469612f, -0.555570233f, - 0.881921264f, -0.471396737f, - 0.923879533f, -0.382683432f, - 0.956940336f, -0.290284677f, - 0.980785280f, -0.195090322f, - 0.995184727f, -0.098017140f -}; - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 128 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ - -const float32_t twiddleCoef_128[256] = { - 1.000000000f , 0.000000000f , - 0.998795456f , 0.049067674f , - 0.995184727f , 0.098017140f , - 0.989176510f , 0.146730474f , - 0.980785280f , 0.195090322f , - 0.970031253f , 0.242980180f , - 0.956940336f , 0.290284677f , - 0.941544065f , 0.336889853f , - 0.923879533f , 0.382683432f , - 0.903989293f , 0.427555093f , - 0.881921264f , 0.471396737f , - 0.857728610f , 0.514102744f , - 0.831469612f , 0.555570233f , - 0.803207531f , 0.595699304f , - 0.773010453f , 0.634393284f , - 0.740951125f , 0.671558955f , - 0.707106781f , 0.707106781f , - 0.671558955f , 0.740951125f , - 0.634393284f , 0.773010453f , - 0.595699304f , 0.803207531f , - 0.555570233f , 0.831469612f , - 0.514102744f , 0.857728610f , - 0.471396737f , 0.881921264f , - 0.427555093f , 0.903989293f , - 0.382683432f , 0.923879533f , - 0.336889853f , 0.941544065f , - 0.290284677f , 0.956940336f , - 0.242980180f , 0.970031253f , - 0.195090322f , 0.980785280f , - 0.146730474f , 0.989176510f , - 0.098017140f , 0.995184727f , - 0.049067674f , 0.998795456f , - 0.000000000f , 1.000000000f , - -0.049067674f , 0.998795456f , - -0.098017140f , 0.995184727f , - -0.146730474f , 0.989176510f , - -0.195090322f , 0.980785280f , - -0.242980180f , 0.970031253f , - -0.290284677f , 0.956940336f , - -0.336889853f , 0.941544065f , - -0.382683432f , 0.923879533f , - -0.427555093f , 0.903989293f , - -0.471396737f , 0.881921264f , - -0.514102744f , 0.857728610f , - -0.555570233f , 0.831469612f , - -0.595699304f , 0.803207531f , - -0.634393284f , 0.773010453f , - -0.671558955f , 0.740951125f , - -0.707106781f , 0.707106781f , - -0.740951125f , 0.671558955f , - -0.773010453f , 0.634393284f , - -0.803207531f , 0.595699304f , - -0.831469612f , 0.555570233f , - -0.857728610f , 0.514102744f , - -0.881921264f , 0.471396737f , - -0.903989293f , 0.427555093f , - -0.923879533f , 0.382683432f , - -0.941544065f , 0.336889853f , - -0.956940336f , 0.290284677f , - -0.970031253f , 0.242980180f , - -0.980785280f , 0.195090322f , - -0.989176510f , 0.146730474f , - -0.995184727f , 0.098017140f , - -0.998795456f , 0.049067674f , - -1.000000000f , 0.000000000f , - -0.998795456f , -0.049067674f , - -0.995184727f , -0.098017140f , - -0.989176510f , -0.146730474f , - -0.980785280f , -0.195090322f , - -0.970031253f , -0.242980180f , - -0.956940336f , -0.290284677f , - -0.941544065f , -0.336889853f , - -0.923879533f , -0.382683432f , - -0.903989293f , -0.427555093f , - -0.881921264f , -0.471396737f , - -0.857728610f , -0.514102744f , - -0.831469612f , -0.555570233f , - -0.803207531f , -0.595699304f , - -0.773010453f , -0.634393284f , - -0.740951125f , -0.671558955f , - -0.707106781f , -0.707106781f , - -0.671558955f , -0.740951125f , - -0.634393284f , -0.773010453f , - -0.595699304f , -0.803207531f , - -0.555570233f , -0.831469612f , - -0.514102744f , -0.857728610f , - -0.471396737f , -0.881921264f , - -0.427555093f , -0.903989293f , - -0.382683432f , -0.923879533f , - -0.336889853f , -0.941544065f , - -0.290284677f , -0.956940336f , - -0.242980180f , -0.970031253f , - -0.195090322f , -0.980785280f , - -0.146730474f , -0.989176510f , - -0.098017140f , -0.995184727f , - -0.049067674f , -0.998795456f , - -0.000000000f , -1.000000000f , - 0.049067674f , -0.998795456f , - 0.098017140f , -0.995184727f , - 0.146730474f , -0.989176510f , - 0.195090322f , -0.980785280f , - 0.242980180f , -0.970031253f , - 0.290284677f , -0.956940336f , - 0.336889853f , -0.941544065f , - 0.382683432f , -0.923879533f , - 0.427555093f , -0.903989293f , - 0.471396737f , -0.881921264f , - 0.514102744f , -0.857728610f , - 0.555570233f , -0.831469612f , - 0.595699304f , -0.803207531f , - 0.634393284f , -0.773010453f , - 0.671558955f , -0.740951125f , - 0.707106781f , -0.707106781f , - 0.740951125f , -0.671558955f , - 0.773010453f , -0.634393284f , - 0.803207531f , -0.595699304f , - 0.831469612f , -0.555570233f , - 0.857728610f , -0.514102744f , - 0.881921264f , -0.471396737f , - 0.903989293f , -0.427555093f , - 0.923879533f , -0.382683432f , - 0.941544065f , -0.336889853f , - 0.956940336f , -0.290284677f , - 0.970031253f , -0.242980180f , - 0.980785280f , -0.195090322f , - 0.989176510f , -0.146730474f , - 0.995184727f , -0.098017140f , - 0.998795456f , -0.049067674f -}; - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 256 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float32_t twiddleCoef_256[512] = { - 1.000000000f, 0.000000000f, - 0.999698819f, 0.024541229f, - 0.998795456f, 0.049067674f, - 0.997290457f, 0.073564564f, - 0.995184727f, 0.098017140f, - 0.992479535f, 0.122410675f, - 0.989176510f, 0.146730474f, - 0.985277642f, 0.170961889f, - 0.980785280f, 0.195090322f, - 0.975702130f, 0.219101240f, - 0.970031253f, 0.242980180f, - 0.963776066f, 0.266712757f, - 0.956940336f, 0.290284677f, - 0.949528181f, 0.313681740f, - 0.941544065f, 0.336889853f, - 0.932992799f, 0.359895037f, - 0.923879533f, 0.382683432f, - 0.914209756f, 0.405241314f, - 0.903989293f, 0.427555093f, - 0.893224301f, 0.449611330f, - 0.881921264f, 0.471396737f, - 0.870086991f, 0.492898192f, - 0.857728610f, 0.514102744f, - 0.844853565f, 0.534997620f, - 0.831469612f, 0.555570233f, - 0.817584813f, 0.575808191f, - 0.803207531f, 0.595699304f, - 0.788346428f, 0.615231591f, - 0.773010453f, 0.634393284f, - 0.757208847f, 0.653172843f, - 0.740951125f, 0.671558955f, - 0.724247083f, 0.689540545f, - 0.707106781f, 0.707106781f, - 0.689540545f, 0.724247083f, - 0.671558955f, 0.740951125f, - 0.653172843f, 0.757208847f, - 0.634393284f, 0.773010453f, - 0.615231591f, 0.788346428f, - 0.595699304f, 0.803207531f, - 0.575808191f, 0.817584813f, - 0.555570233f, 0.831469612f, - 0.534997620f, 0.844853565f, - 0.514102744f, 0.857728610f, - 0.492898192f, 0.870086991f, - 0.471396737f, 0.881921264f, - 0.449611330f, 0.893224301f, - 0.427555093f, 0.903989293f, - 0.405241314f, 0.914209756f, - 0.382683432f, 0.923879533f, - 0.359895037f, 0.932992799f, - 0.336889853f, 0.941544065f, - 0.313681740f, 0.949528181f, - 0.290284677f, 0.956940336f, - 0.266712757f, 0.963776066f, - 0.242980180f, 0.970031253f, - 0.219101240f, 0.975702130f, - 0.195090322f, 0.980785280f, - 0.170961889f, 0.985277642f, - 0.146730474f, 0.989176510f, - 0.122410675f, 0.992479535f, - 0.098017140f, 0.995184727f, - 0.073564564f, 0.997290457f, - 0.049067674f, 0.998795456f, - 0.024541229f, 0.999698819f, - 0.000000000f, 1.000000000f, - -0.024541229f, 0.999698819f, - -0.049067674f, 0.998795456f, - -0.073564564f, 0.997290457f, - -0.098017140f, 0.995184727f, - -0.122410675f, 0.992479535f, - -0.146730474f, 0.989176510f, - -0.170961889f, 0.985277642f, - -0.195090322f, 0.980785280f, - -0.219101240f, 0.975702130f, - -0.242980180f, 0.970031253f, - -0.266712757f, 0.963776066f, - -0.290284677f, 0.956940336f, - -0.313681740f, 0.949528181f, - -0.336889853f, 0.941544065f, - -0.359895037f, 0.932992799f, - -0.382683432f, 0.923879533f, - -0.405241314f, 0.914209756f, - -0.427555093f, 0.903989293f, - -0.449611330f, 0.893224301f, - -0.471396737f, 0.881921264f, - -0.492898192f, 0.870086991f, - -0.514102744f, 0.857728610f, - -0.534997620f, 0.844853565f, - -0.555570233f, 0.831469612f, - -0.575808191f, 0.817584813f, - -0.595699304f, 0.803207531f, - -0.615231591f, 0.788346428f, - -0.634393284f, 0.773010453f, - -0.653172843f, 0.757208847f, - -0.671558955f, 0.740951125f, - -0.689540545f, 0.724247083f, - -0.707106781f, 0.707106781f, - -0.724247083f, 0.689540545f, - -0.740951125f, 0.671558955f, - -0.757208847f, 0.653172843f, - -0.773010453f, 0.634393284f, - -0.788346428f, 0.615231591f, - -0.803207531f, 0.595699304f, - -0.817584813f, 0.575808191f, - -0.831469612f, 0.555570233f, - -0.844853565f, 0.534997620f, - -0.857728610f, 0.514102744f, - -0.870086991f, 0.492898192f, - -0.881921264f, 0.471396737f, - -0.893224301f, 0.449611330f, - -0.903989293f, 0.427555093f, - -0.914209756f, 0.405241314f, - -0.923879533f, 0.382683432f, - -0.932992799f, 0.359895037f, - -0.941544065f, 0.336889853f, - -0.949528181f, 0.313681740f, - -0.956940336f, 0.290284677f, - -0.963776066f, 0.266712757f, - -0.970031253f, 0.242980180f, - -0.975702130f, 0.219101240f, - -0.980785280f, 0.195090322f, - -0.985277642f, 0.170961889f, - -0.989176510f, 0.146730474f, - -0.992479535f, 0.122410675f, - -0.995184727f, 0.098017140f, - -0.997290457f, 0.073564564f, - -0.998795456f, 0.049067674f, - -0.999698819f, 0.024541229f, - -1.000000000f, 0.000000000f, - -0.999698819f, -0.024541229f, - -0.998795456f, -0.049067674f, - -0.997290457f, -0.073564564f, - -0.995184727f, -0.098017140f, - -0.992479535f, -0.122410675f, - -0.989176510f, -0.146730474f, - -0.985277642f, -0.170961889f, - -0.980785280f, -0.195090322f, - -0.975702130f, -0.219101240f, - -0.970031253f, -0.242980180f, - -0.963776066f, -0.266712757f, - -0.956940336f, -0.290284677f, - -0.949528181f, -0.313681740f, - -0.941544065f, -0.336889853f, - -0.932992799f, -0.359895037f, - -0.923879533f, -0.382683432f, - -0.914209756f, -0.405241314f, - -0.903989293f, -0.427555093f, - -0.893224301f, -0.449611330f, - -0.881921264f, -0.471396737f, - -0.870086991f, -0.492898192f, - -0.857728610f, -0.514102744f, - -0.844853565f, -0.534997620f, - -0.831469612f, -0.555570233f, - -0.817584813f, -0.575808191f, - -0.803207531f, -0.595699304f, - -0.788346428f, -0.615231591f, - -0.773010453f, -0.634393284f, - -0.757208847f, -0.653172843f, - -0.740951125f, -0.671558955f, - -0.724247083f, -0.689540545f, - -0.707106781f, -0.707106781f, - -0.689540545f, -0.724247083f, - -0.671558955f, -0.740951125f, - -0.653172843f, -0.757208847f, - -0.634393284f, -0.773010453f, - -0.615231591f, -0.788346428f, - -0.595699304f, -0.803207531f, - -0.575808191f, -0.817584813f, - -0.555570233f, -0.831469612f, - -0.534997620f, -0.844853565f, - -0.514102744f, -0.857728610f, - -0.492898192f, -0.870086991f, - -0.471396737f, -0.881921264f, - -0.449611330f, -0.893224301f, - -0.427555093f, -0.903989293f, - -0.405241314f, -0.914209756f, - -0.382683432f, -0.923879533f, - -0.359895037f, -0.932992799f, - -0.336889853f, -0.941544065f, - -0.313681740f, -0.949528181f, - -0.290284677f, -0.956940336f, - -0.266712757f, -0.963776066f, - -0.242980180f, -0.970031253f, - -0.219101240f, -0.975702130f, - -0.195090322f, -0.980785280f, - -0.170961889f, -0.985277642f, - -0.146730474f, -0.989176510f, - -0.122410675f, -0.992479535f, - -0.098017140f, -0.995184727f, - -0.073564564f, -0.997290457f, - -0.049067674f, -0.998795456f, - -0.024541229f, -0.999698819f, - -0.000000000f, -1.000000000f, - 0.024541229f, -0.999698819f, - 0.049067674f, -0.998795456f, - 0.073564564f, -0.997290457f, - 0.098017140f, -0.995184727f, - 0.122410675f, -0.992479535f, - 0.146730474f, -0.989176510f, - 0.170961889f, -0.985277642f, - 0.195090322f, -0.980785280f, - 0.219101240f, -0.975702130f, - 0.242980180f, -0.970031253f, - 0.266712757f, -0.963776066f, - 0.290284677f, -0.956940336f, - 0.313681740f, -0.949528181f, - 0.336889853f, -0.941544065f, - 0.359895037f, -0.932992799f, - 0.382683432f, -0.923879533f, - 0.405241314f, -0.914209756f, - 0.427555093f, -0.903989293f, - 0.449611330f, -0.893224301f, - 0.471396737f, -0.881921264f, - 0.492898192f, -0.870086991f, - 0.514102744f, -0.857728610f, - 0.534997620f, -0.844853565f, - 0.555570233f, -0.831469612f, - 0.575808191f, -0.817584813f, - 0.595699304f, -0.803207531f, - 0.615231591f, -0.788346428f, - 0.634393284f, -0.773010453f, - 0.653172843f, -0.757208847f, - 0.671558955f, -0.740951125f, - 0.689540545f, -0.724247083f, - 0.707106781f, -0.707106781f, - 0.724247083f, -0.689540545f, - 0.740951125f, -0.671558955f, - 0.757208847f, -0.653172843f, - 0.773010453f, -0.634393284f, - 0.788346428f, -0.615231591f, - 0.803207531f, -0.595699304f, - 0.817584813f, -0.575808191f, - 0.831469612f, -0.555570233f, - 0.844853565f, -0.534997620f, - 0.857728610f, -0.514102744f, - 0.870086991f, -0.492898192f, - 0.881921264f, -0.471396737f, - 0.893224301f, -0.449611330f, - 0.903989293f, -0.427555093f, - 0.914209756f, -0.405241314f, - 0.923879533f, -0.382683432f, - 0.932992799f, -0.359895037f, - 0.941544065f, -0.336889853f, - 0.949528181f, -0.313681740f, - 0.956940336f, -0.290284677f, - 0.963776066f, -0.266712757f, - 0.970031253f, -0.242980180f, - 0.975702130f, -0.219101240f, - 0.980785280f, -0.195090322f, - 0.985277642f, -0.170961889f, - 0.989176510f, -0.146730474f, - 0.992479535f, -0.122410675f, - 0.995184727f, -0.098017140f, - 0.997290457f, -0.073564564f, - 0.998795456f, -0.049067674f, - 0.999698819f, -0.024541229f -}; - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 512 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float32_t twiddleCoef_512[1024] = { - 1.000000000f, 0.000000000f, - 0.999924702f, 0.012271538f, - 0.999698819f, 0.024541229f, - 0.999322385f, 0.036807223f, - 0.998795456f, 0.049067674f, - 0.998118113f, 0.061320736f, - 0.997290457f, 0.073564564f, - 0.996312612f, 0.085797312f, - 0.995184727f, 0.098017140f, - 0.993906970f, 0.110222207f, - 0.992479535f, 0.122410675f, - 0.990902635f, 0.134580709f, - 0.989176510f, 0.146730474f, - 0.987301418f, 0.158858143f, - 0.985277642f, 0.170961889f, - 0.983105487f, 0.183039888f, - 0.980785280f, 0.195090322f, - 0.978317371f, 0.207111376f, - 0.975702130f, 0.219101240f, - 0.972939952f, 0.231058108f, - 0.970031253f, 0.242980180f, - 0.966976471f, 0.254865660f, - 0.963776066f, 0.266712757f, - 0.960430519f, 0.278519689f, - 0.956940336f, 0.290284677f, - 0.953306040f, 0.302005949f, - 0.949528181f, 0.313681740f, - 0.945607325f, 0.325310292f, - 0.941544065f, 0.336889853f, - 0.937339012f, 0.348418680f, - 0.932992799f, 0.359895037f, - 0.928506080f, 0.371317194f, - 0.923879533f, 0.382683432f, - 0.919113852f, 0.393992040f, - 0.914209756f, 0.405241314f, - 0.909167983f, 0.416429560f, - 0.903989293f, 0.427555093f, - 0.898674466f, 0.438616239f, - 0.893224301f, 0.449611330f, - 0.887639620f, 0.460538711f, - 0.881921264f, 0.471396737f, - 0.876070094f, 0.482183772f, - 0.870086991f, 0.492898192f, - 0.863972856f, 0.503538384f, - 0.857728610f, 0.514102744f, - 0.851355193f, 0.524589683f, - 0.844853565f, 0.534997620f, - 0.838224706f, 0.545324988f, - 0.831469612f, 0.555570233f, - 0.824589303f, 0.565731811f, - 0.817584813f, 0.575808191f, - 0.810457198f, 0.585797857f, - 0.803207531f, 0.595699304f, - 0.795836905f, 0.605511041f, - 0.788346428f, 0.615231591f, - 0.780737229f, 0.624859488f, - 0.773010453f, 0.634393284f, - 0.765167266f, 0.643831543f, - 0.757208847f, 0.653172843f, - 0.749136395f, 0.662415778f, - 0.740951125f, 0.671558955f, - 0.732654272f, 0.680600998f, - 0.724247083f, 0.689540545f, - 0.715730825f, 0.698376249f, - 0.707106781f, 0.707106781f, - 0.698376249f, 0.715730825f, - 0.689540545f, 0.724247083f, - 0.680600998f, 0.732654272f, - 0.671558955f, 0.740951125f, - 0.662415778f, 0.749136395f, - 0.653172843f, 0.757208847f, - 0.643831543f, 0.765167266f, - 0.634393284f, 0.773010453f, - 0.624859488f, 0.780737229f, - 0.615231591f, 0.788346428f, - 0.605511041f, 0.795836905f, - 0.595699304f, 0.803207531f, - 0.585797857f, 0.810457198f, - 0.575808191f, 0.817584813f, - 0.565731811f, 0.824589303f, - 0.555570233f, 0.831469612f, - 0.545324988f, 0.838224706f, - 0.534997620f, 0.844853565f, - 0.524589683f, 0.851355193f, - 0.514102744f, 0.857728610f, - 0.503538384f, 0.863972856f, - 0.492898192f, 0.870086991f, - 0.482183772f, 0.876070094f, - 0.471396737f, 0.881921264f, - 0.460538711f, 0.887639620f, - 0.449611330f, 0.893224301f, - 0.438616239f, 0.898674466f, - 0.427555093f, 0.903989293f, - 0.416429560f, 0.909167983f, - 0.405241314f, 0.914209756f, - 0.393992040f, 0.919113852f, - 0.382683432f, 0.923879533f, - 0.371317194f, 0.928506080f, - 0.359895037f, 0.932992799f, - 0.348418680f, 0.937339012f, - 0.336889853f, 0.941544065f, - 0.325310292f, 0.945607325f, - 0.313681740f, 0.949528181f, - 0.302005949f, 0.953306040f, - 0.290284677f, 0.956940336f, - 0.278519689f, 0.960430519f, - 0.266712757f, 0.963776066f, - 0.254865660f, 0.966976471f, - 0.242980180f, 0.970031253f, - 0.231058108f, 0.972939952f, - 0.219101240f, 0.975702130f, - 0.207111376f, 0.978317371f, - 0.195090322f, 0.980785280f, - 0.183039888f, 0.983105487f, - 0.170961889f, 0.985277642f, - 0.158858143f, 0.987301418f, - 0.146730474f, 0.989176510f, - 0.134580709f, 0.990902635f, - 0.122410675f, 0.992479535f, - 0.110222207f, 0.993906970f, - 0.098017140f, 0.995184727f, - 0.085797312f, 0.996312612f, - 0.073564564f, 0.997290457f, - 0.061320736f, 0.998118113f, - 0.049067674f, 0.998795456f, - 0.036807223f, 0.999322385f, - 0.024541229f, 0.999698819f, - 0.012271538f, 0.999924702f, - 0.000000000f, 1.000000000f, - -0.012271538f, 0.999924702f, - -0.024541229f, 0.999698819f, - -0.036807223f, 0.999322385f, - -0.049067674f, 0.998795456f, - -0.061320736f, 0.998118113f, - -0.073564564f, 0.997290457f, - -0.085797312f, 0.996312612f, - -0.098017140f, 0.995184727f, - -0.110222207f, 0.993906970f, - -0.122410675f, 0.992479535f, - -0.134580709f, 0.990902635f, - -0.146730474f, 0.989176510f, - -0.158858143f, 0.987301418f, - -0.170961889f, 0.985277642f, - -0.183039888f, 0.983105487f, - -0.195090322f, 0.980785280f, - -0.207111376f, 0.978317371f, - -0.219101240f, 0.975702130f, - -0.231058108f, 0.972939952f, - -0.242980180f, 0.970031253f, - -0.254865660f, 0.966976471f, - -0.266712757f, 0.963776066f, - -0.278519689f, 0.960430519f, - -0.290284677f, 0.956940336f, - -0.302005949f, 0.953306040f, - -0.313681740f, 0.949528181f, - -0.325310292f, 0.945607325f, - -0.336889853f, 0.941544065f, - -0.348418680f, 0.937339012f, - -0.359895037f, 0.932992799f, - -0.371317194f, 0.928506080f, - -0.382683432f, 0.923879533f, - -0.393992040f, 0.919113852f, - -0.405241314f, 0.914209756f, - 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-0.945607325f, 0.325310292f, - -0.949528181f, 0.313681740f, - -0.953306040f, 0.302005949f, - -0.956940336f, 0.290284677f, - -0.960430519f, 0.278519689f, - -0.963776066f, 0.266712757f, - -0.966976471f, 0.254865660f, - -0.970031253f, 0.242980180f, - -0.972939952f, 0.231058108f, - -0.975702130f, 0.219101240f, - -0.978317371f, 0.207111376f, - -0.980785280f, 0.195090322f, - -0.983105487f, 0.183039888f, - -0.985277642f, 0.170961889f, - -0.987301418f, 0.158858143f, - -0.989176510f, 0.146730474f, - -0.990902635f, 0.134580709f, - -0.992479535f, 0.122410675f, - -0.993906970f, 0.110222207f, - -0.995184727f, 0.098017140f, - -0.996312612f, 0.085797312f, - -0.997290457f, 0.073564564f, - -0.998118113f, 0.061320736f, - -0.998795456f, 0.049067674f, - -0.999322385f, 0.036807223f, - -0.999698819f, 0.024541229f, - -0.999924702f, 0.012271538f, - -1.000000000f, 0.000000000f, - -0.999924702f, -0.012271538f, - -0.999698819f, -0.024541229f, - -0.999322385f, -0.036807223f, - -0.998795456f, -0.049067674f, - -0.998118113f, -0.061320736f, - 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0.460538711f, -0.887639620f, - 0.471396737f, -0.881921264f, - 0.482183772f, -0.876070094f, - 0.492898192f, -0.870086991f, - 0.503538384f, -0.863972856f, - 0.514102744f, -0.857728610f, - 0.524589683f, -0.851355193f, - 0.534997620f, -0.844853565f, - 0.545324988f, -0.838224706f, - 0.555570233f, -0.831469612f, - 0.565731811f, -0.824589303f, - 0.575808191f, -0.817584813f, - 0.585797857f, -0.810457198f, - 0.595699304f, -0.803207531f, - 0.605511041f, -0.795836905f, - 0.615231591f, -0.788346428f, - 0.624859488f, -0.780737229f, - 0.634393284f, -0.773010453f, - 0.643831543f, -0.765167266f, - 0.653172843f, -0.757208847f, - 0.662415778f, -0.749136395f, - 0.671558955f, -0.740951125f, - 0.680600998f, -0.732654272f, - 0.689540545f, -0.724247083f, - 0.698376249f, -0.715730825f, - 0.707106781f, -0.707106781f, - 0.715730825f, -0.698376249f, - 0.724247083f, -0.689540545f, - 0.732654272f, -0.680600998f, - 0.740951125f, -0.671558955f, - 0.749136395f, -0.662415778f, - 0.757208847f, -0.653172843f, - 0.765167266f, -0.643831543f, - 0.773010453f, -0.634393284f, - 0.780737229f, -0.624859488f, - 0.788346428f, -0.615231591f, - 0.795836905f, -0.605511041f, - 0.803207531f, -0.595699304f, - 0.810457198f, -0.585797857f, - 0.817584813f, -0.575808191f, - 0.824589303f, -0.565731811f, - 0.831469612f, -0.555570233f, - 0.838224706f, -0.545324988f, - 0.844853565f, -0.534997620f, - 0.851355193f, -0.524589683f, - 0.857728610f, -0.514102744f, - 0.863972856f, -0.503538384f, - 0.870086991f, -0.492898192f, - 0.876070094f, -0.482183772f, - 0.881921264f, -0.471396737f, - 0.887639620f, -0.460538711f, - 0.893224301f, -0.449611330f, - 0.898674466f, -0.438616239f, - 0.903989293f, -0.427555093f, - 0.909167983f, -0.416429560f, - 0.914209756f, -0.405241314f, - 0.919113852f, -0.393992040f, - 0.923879533f, -0.382683432f, - 0.928506080f, -0.371317194f, - 0.932992799f, -0.359895037f, - 0.937339012f, -0.348418680f, - 0.941544065f, -0.336889853f, - 0.945607325f, -0.325310292f, - 0.949528181f, -0.313681740f, - 0.953306040f, -0.302005949f, - 0.956940336f, -0.290284677f, - 0.960430519f, -0.278519689f, - 0.963776066f, -0.266712757f, - 0.966976471f, -0.254865660f, - 0.970031253f, -0.242980180f, - 0.972939952f, -0.231058108f, - 0.975702130f, -0.219101240f, - 0.978317371f, -0.207111376f, - 0.980785280f, -0.195090322f, - 0.983105487f, -0.183039888f, - 0.985277642f, -0.170961889f, - 0.987301418f, -0.158858143f, - 0.989176510f, -0.146730474f, - 0.990902635f, -0.134580709f, - 0.992479535f, -0.122410675f, - 0.993906970f, -0.110222207f, - 0.995184727f, -0.098017140f, - 0.996312612f, -0.085797312f, - 0.997290457f, -0.073564564f, - 0.998118113f, -0.061320736f, - 0.998795456f, -0.049067674f, - 0.999322385f, -0.036807223f, - 0.999698819f, -0.024541229f, - 0.999924702f, -0.012271538f -}; -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 1024 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float32_t twiddleCoef_1024[2048] = { -1.000000000f , 0.000000000f , -0.999981175f , 0.006135885f , -0.999924702f , 0.012271538f , -0.999830582f , 0.018406730f , -0.999698819f , 0.024541229f , -0.999529418f , 0.030674803f , -0.999322385f , 0.036807223f , -0.999077728f , 0.042938257f , -0.998795456f , 0.049067674f , -0.998475581f , 0.055195244f , -0.998118113f , 0.061320736f , -0.997723067f , 0.067443920f , -0.997290457f , 0.073564564f , -0.996820299f , 0.079682438f , -0.996312612f , 0.085797312f , -0.995767414f , 0.091908956f , -0.995184727f , 0.098017140f , -0.994564571f , 0.104121634f , -0.993906970f , 0.110222207f , -0.993211949f , 0.116318631f , -0.992479535f , 0.122410675f , -0.991709754f , 0.128498111f , -0.990902635f , 0.134580709f , -0.990058210f , 0.140658239f , -0.989176510f , 0.146730474f , -0.988257568f , 0.152797185f , -0.987301418f , 0.158858143f , -0.986308097f , 0.164913120f , -0.985277642f , 0.170961889f , -0.984210092f , 0.177004220f , -0.983105487f , 0.183039888f , -0.981963869f , 0.189068664f , -0.980785280f , 0.195090322f , -0.979569766f , 0.201104635f , -0.978317371f , 0.207111376f , -0.977028143f , 0.213110320f , -0.975702130f , 0.219101240f , -0.974339383f , 0.225083911f , -0.972939952f , 0.231058108f , -0.971503891f , 0.237023606f , -0.970031253f , 0.242980180f , -0.968522094f , 0.248927606f , -0.966976471f , 0.254865660f , -0.965394442f , 0.260794118f , -0.963776066f , 0.266712757f , -0.962121404f , 0.272621355f , -0.960430519f , 0.278519689f , -0.958703475f , 0.284407537f , -0.956940336f , 0.290284677f , -0.955141168f , 0.296150888f , -0.953306040f , 0.302005949f , -0.951435021f , 0.307849640f , -0.949528181f , 0.313681740f , -0.947585591f , 0.319502031f , -0.945607325f , 0.325310292f , -0.943593458f , 0.331106306f , -0.941544065f , 0.336889853f , -0.939459224f , 0.342660717f , -0.937339012f , 0.348418680f , -0.935183510f , 0.354163525f , -0.932992799f , 0.359895037f , -0.930766961f , 0.365612998f , -0.928506080f , 0.371317194f , -0.926210242f , 0.377007410f , -0.923879533f , 0.382683432f , -0.921514039f , 0.388345047f , -0.919113852f , 0.393992040f , -0.916679060f , 0.399624200f , -0.914209756f , 0.405241314f , -0.911706032f , 0.410843171f , -0.909167983f , 0.416429560f , -0.906595705f , 0.422000271f , -0.903989293f , 0.427555093f , -0.901348847f , 0.433093819f , -0.898674466f , 0.438616239f , -0.895966250f , 0.444122145f , -0.893224301f , 0.449611330f , -0.890448723f , 0.455083587f , -0.887639620f , 0.460538711f , -0.884797098f , 0.465976496f , -0.881921264f , 0.471396737f , -0.879012226f , 0.476799230f , -0.876070094f , 0.482183772f , -0.873094978f , 0.487550160f , -0.870086991f , 0.492898192f , -0.867046246f , 0.498227667f , -0.863972856f , 0.503538384f , -0.860866939f , 0.508830143f , -0.857728610f , 0.514102744f , -0.854557988f , 0.519355990f , -0.851355193f , 0.524589683f , -0.848120345f , 0.529803625f , -0.844853565f , 0.534997620f , -0.841554977f , 0.540171473f , -0.838224706f , 0.545324988f , -0.834862875f , 0.550457973f , -0.831469612f , 0.555570233f , -0.828045045f , 0.560661576f , -0.824589303f , 0.565731811f , -0.821102515f , 0.570780746f , -0.817584813f , 0.575808191f , -0.814036330f , 0.580813958f , -0.810457198f , 0.585797857f , -0.806847554f , 0.590759702f , -0.803207531f , 0.595699304f , -0.799537269f , 0.600616479f , -0.795836905f , 0.605511041f , -0.792106577f , 0.610382806f , -0.788346428f , 0.615231591f , -0.784556597f , 0.620057212f , -0.780737229f , 0.624859488f , -0.776888466f , 0.629638239f , -0.773010453f , 0.634393284f , -0.769103338f , 0.639124445f , -0.765167266f , 0.643831543f , -0.761202385f , 0.648514401f , -0.757208847f , 0.653172843f , -0.753186799f , 0.657806693f , -0.749136395f , 0.662415778f , -0.745057785f , 0.666999922f , -0.740951125f , 0.671558955f , -0.736816569f , 0.676092704f , -0.732654272f , 0.680600998f , -0.728464390f , 0.685083668f , -0.724247083f , 0.689540545f , -0.720002508f , 0.693971461f , -0.715730825f , 0.698376249f , -0.711432196f , 0.702754744f , -0.707106781f , 0.707106781f , -0.702754744f , 0.711432196f , -0.698376249f , 0.715730825f , -0.693971461f , 0.720002508f , -0.689540545f , 0.724247083f , -0.685083668f , 0.728464390f , -0.680600998f , 0.732654272f , -0.676092704f , 0.736816569f , -0.671558955f , 0.740951125f , -0.666999922f , 0.745057785f , -0.662415778f , 0.749136395f , -0.657806693f , 0.753186799f , -0.653172843f , 0.757208847f , -0.648514401f , 0.761202385f , -0.643831543f , 0.765167266f , -0.639124445f , 0.769103338f , -0.634393284f , 0.773010453f , -0.629638239f , 0.776888466f , -0.624859488f , 0.780737229f , -0.620057212f , 0.784556597f , -0.615231591f , 0.788346428f , -0.610382806f , 0.792106577f , -0.605511041f , 0.795836905f , -0.600616479f , 0.799537269f , -0.595699304f , 0.803207531f , -0.590759702f , 0.806847554f , -0.585797857f , 0.810457198f , -0.580813958f , 0.814036330f , -0.575808191f , 0.817584813f , -0.570780746f , 0.821102515f , -0.565731811f , 0.824589303f , -0.560661576f , 0.828045045f , -0.555570233f , 0.831469612f , -0.550457973f , 0.834862875f , -0.545324988f , 0.838224706f , -0.540171473f , 0.841554977f , -0.534997620f , 0.844853565f , -0.529803625f , 0.848120345f , -0.524589683f , 0.851355193f , -0.519355990f , 0.854557988f , -0.514102744f , 0.857728610f , -0.508830143f , 0.860866939f , -0.503538384f , 0.863972856f , -0.498227667f , 0.867046246f , -0.492898192f , 0.870086991f , -0.487550160f , 0.873094978f , -0.482183772f , 0.876070094f , -0.476799230f , 0.879012226f , -0.471396737f , 0.881921264f , -0.465976496f , 0.884797098f , -0.460538711f , 0.887639620f , -0.455083587f , 0.890448723f , -0.449611330f , 0.893224301f , -0.444122145f , 0.895966250f , -0.438616239f , 0.898674466f , -0.433093819f , 0.901348847f , -0.427555093f , 0.903989293f , -0.422000271f , 0.906595705f , -0.416429560f , 0.909167983f , -0.410843171f , 0.911706032f , -0.405241314f , 0.914209756f , -0.399624200f , 0.916679060f , -0.393992040f , 0.919113852f , -0.388345047f , 0.921514039f , -0.382683432f , 0.923879533f , -0.377007410f , 0.926210242f , -0.371317194f , 0.928506080f , -0.365612998f , 0.930766961f , -0.359895037f , 0.932992799f , -0.354163525f , 0.935183510f , -0.348418680f , 0.937339012f , -0.342660717f , 0.939459224f , -0.336889853f , 0.941544065f , -0.331106306f , 0.943593458f , -0.325310292f , 0.945607325f , -0.319502031f , 0.947585591f , -0.313681740f , 0.949528181f , -0.307849640f , 0.951435021f , -0.302005949f , 0.953306040f , -0.296150888f , 0.955141168f , -0.290284677f , 0.956940336f , -0.284407537f , 0.958703475f , -0.278519689f , 0.960430519f , -0.272621355f , 0.962121404f , -0.266712757f , 0.963776066f , -0.260794118f , 0.965394442f , -0.254865660f , 0.966976471f , -0.248927606f , 0.968522094f , -0.242980180f , 0.970031253f , -0.237023606f , 0.971503891f , -0.231058108f , 0.972939952f , -0.225083911f , 0.974339383f , -0.219101240f , 0.975702130f , -0.213110320f , 0.977028143f , -0.207111376f , 0.978317371f , -0.201104635f , 0.979569766f , -0.195090322f , 0.980785280f , -0.189068664f , 0.981963869f , -0.183039888f , 0.983105487f , -0.177004220f , 0.984210092f , -0.170961889f , 0.985277642f , -0.164913120f , 0.986308097f , -0.158858143f , 0.987301418f , -0.152797185f , 0.988257568f , -0.146730474f , 0.989176510f , -0.140658239f , 0.990058210f , -0.134580709f , 0.990902635f , -0.128498111f , 0.991709754f , -0.122410675f , 0.992479535f , -0.116318631f , 0.993211949f , -0.110222207f , 0.993906970f , -0.104121634f , 0.994564571f , -0.098017140f , 0.995184727f , -0.091908956f , 0.995767414f , -0.085797312f , 0.996312612f , -0.079682438f , 0.996820299f , -0.073564564f , 0.997290457f , -0.067443920f , 0.997723067f , -0.061320736f , 0.998118113f , -0.055195244f , 0.998475581f , -0.049067674f , 0.998795456f , -0.042938257f , 0.999077728f , -0.036807223f , 0.999322385f , -0.030674803f , 0.999529418f , -0.024541229f , 0.999698819f , -0.018406730f , 0.999830582f , -0.012271538f , 0.999924702f , -0.006135885f , 0.999981175f , -0.000000000f , 1.000000000f , --0.006135885f , 0.999981175f , --0.012271538f , 0.999924702f , --0.018406730f , 0.999830582f , --0.024541229f , 0.999698819f , --0.030674803f , 0.999529418f , --0.036807223f , 0.999322385f , --0.042938257f , 0.999077728f , --0.049067674f , 0.998795456f , --0.055195244f , 0.998475581f , --0.061320736f , 0.998118113f , --0.067443920f , 0.997723067f , --0.073564564f , 0.997290457f , --0.079682438f , 0.996820299f , --0.085797312f , 0.996312612f , --0.091908956f , 0.995767414f , --0.098017140f , 0.995184727f , --0.104121634f , 0.994564571f , --0.110222207f , 0.993906970f , --0.116318631f , 0.993211949f , --0.122410675f , 0.992479535f , --0.128498111f , 0.991709754f , --0.134580709f , 0.990902635f , --0.140658239f , 0.990058210f , --0.146730474f , 0.989176510f , --0.152797185f , 0.988257568f , --0.158858143f , 0.987301418f , --0.164913120f , 0.986308097f , --0.170961889f , 0.985277642f , --0.177004220f , 0.984210092f , --0.183039888f , 0.983105487f , --0.189068664f , 0.981963869f , --0.195090322f , 0.980785280f , --0.201104635f , 0.979569766f , --0.207111376f , 0.978317371f , --0.213110320f , 0.977028143f , --0.219101240f , 0.975702130f , --0.225083911f , 0.974339383f , --0.231058108f , 0.972939952f , --0.237023606f , 0.971503891f , --0.242980180f , 0.970031253f , --0.248927606f , 0.968522094f , --0.254865660f , 0.966976471f , --0.260794118f , 0.965394442f , --0.266712757f , 0.963776066f , --0.272621355f , 0.962121404f , --0.278519689f , 0.960430519f , --0.284407537f , 0.958703475f , --0.290284677f , 0.956940336f , --0.296150888f , 0.955141168f , --0.302005949f , 0.953306040f , --0.307849640f , 0.951435021f , --0.313681740f , 0.949528181f , --0.319502031f , 0.947585591f , --0.325310292f , 0.945607325f , --0.331106306f , 0.943593458f , --0.336889853f , 0.941544065f , --0.342660717f , 0.939459224f , --0.348418680f , 0.937339012f , --0.354163525f , 0.935183510f , --0.359895037f , 0.932992799f , --0.365612998f , 0.930766961f , --0.371317194f , 0.928506080f , --0.377007410f , 0.926210242f , --0.382683432f , 0.923879533f , --0.388345047f , 0.921514039f , --0.393992040f , 0.919113852f , --0.399624200f , 0.916679060f , --0.405241314f , 0.914209756f , --0.410843171f , 0.911706032f , --0.416429560f , 0.909167983f , --0.422000271f , 0.906595705f , --0.427555093f , 0.903989293f , --0.433093819f , 0.901348847f , --0.438616239f , 0.898674466f , --0.444122145f , 0.895966250f , --0.449611330f , 0.893224301f , --0.455083587f , 0.890448723f , --0.460538711f , 0.887639620f , --0.465976496f , 0.884797098f , --0.471396737f , 0.881921264f , --0.476799230f , 0.879012226f , --0.482183772f , 0.876070094f , --0.487550160f , 0.873094978f , --0.492898192f , 0.870086991f , --0.498227667f , 0.867046246f , --0.503538384f , 0.863972856f , --0.508830143f , 0.860866939f , --0.514102744f , 0.857728610f , --0.519355990f , 0.854557988f , --0.524589683f , 0.851355193f , --0.529803625f , 0.848120345f , --0.534997620f , 0.844853565f , --0.540171473f , 0.841554977f , --0.545324988f , 0.838224706f , --0.550457973f , 0.834862875f , --0.555570233f , 0.831469612f , --0.560661576f , 0.828045045f , --0.565731811f , 0.824589303f , --0.570780746f , 0.821102515f , --0.575808191f , 0.817584813f , --0.580813958f , 0.814036330f , --0.585797857f , 0.810457198f , --0.590759702f , 0.806847554f , --0.595699304f , 0.803207531f , --0.600616479f , 0.799537269f , --0.605511041f , 0.795836905f , --0.610382806f , 0.792106577f , --0.615231591f , 0.788346428f , --0.620057212f , 0.784556597f , --0.624859488f , 0.780737229f , --0.629638239f , 0.776888466f , --0.634393284f , 0.773010453f , --0.639124445f , 0.769103338f , --0.643831543f , 0.765167266f , --0.648514401f , 0.761202385f , --0.653172843f , 0.757208847f , --0.657806693f , 0.753186799f , --0.662415778f , 0.749136395f , --0.666999922f , 0.745057785f , --0.671558955f , 0.740951125f , --0.676092704f , 0.736816569f , --0.680600998f , 0.732654272f , --0.685083668f , 0.728464390f , --0.689540545f , 0.724247083f , --0.693971461f , 0.720002508f , --0.698376249f , 0.715730825f , --0.702754744f , 0.711432196f , --0.707106781f , 0.707106781f , --0.711432196f , 0.702754744f , --0.715730825f , 0.698376249f , --0.720002508f , 0.693971461f , --0.724247083f , 0.689540545f , --0.728464390f , 0.685083668f , --0.732654272f , 0.680600998f , --0.736816569f , 0.676092704f , --0.740951125f , 0.671558955f , --0.745057785f , 0.666999922f , --0.749136395f , 0.662415778f , --0.753186799f , 0.657806693f , --0.757208847f , 0.653172843f , --0.761202385f , 0.648514401f , --0.765167266f , 0.643831543f , --0.769103338f , 0.639124445f , --0.773010453f , 0.634393284f , --0.776888466f , 0.629638239f , --0.780737229f , 0.624859488f , --0.784556597f , 0.620057212f , --0.788346428f , 0.615231591f , --0.792106577f , 0.610382806f , --0.795836905f , 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-0.550457973f , -0.834862875f , -0.555570233f , -0.831469612f , -0.560661576f , -0.828045045f , -0.565731811f , -0.824589303f , -0.570780746f , -0.821102515f , -0.575808191f , -0.817584813f , -0.580813958f , -0.814036330f , -0.585797857f , -0.810457198f , -0.590759702f , -0.806847554f , -0.595699304f , -0.803207531f , -0.600616479f , -0.799537269f , -0.605511041f , -0.795836905f , -0.610382806f , -0.792106577f , -0.615231591f , -0.788346428f , -0.620057212f , -0.784556597f , -0.624859488f , -0.780737229f , -0.629638239f , -0.776888466f , -0.634393284f , -0.773010453f , -0.639124445f , -0.769103338f , -0.643831543f , -0.765167266f , -0.648514401f , -0.761202385f , -0.653172843f , -0.757208847f , -0.657806693f , -0.753186799f , -0.662415778f , -0.749136395f , -0.666999922f , -0.745057785f , -0.671558955f , -0.740951125f , -0.676092704f , -0.736816569f , -0.680600998f , -0.732654272f , -0.685083668f , -0.728464390f , -0.689540545f , -0.724247083f , -0.693971461f , -0.720002508f , -0.698376249f , -0.715730825f , -0.702754744f , -0.711432196f , -0.707106781f , -0.707106781f , -0.711432196f , -0.702754744f , -0.715730825f , -0.698376249f , -0.720002508f , -0.693971461f , -0.724247083f , -0.689540545f , -0.728464390f , -0.685083668f , -0.732654272f , -0.680600998f , -0.736816569f , -0.676092704f , -0.740951125f , -0.671558955f , -0.745057785f , -0.666999922f , -0.749136395f , -0.662415778f , -0.753186799f , -0.657806693f , -0.757208847f , -0.653172843f , -0.761202385f , -0.648514401f , -0.765167266f , -0.643831543f , -0.769103338f , -0.639124445f , -0.773010453f , -0.634393284f , -0.776888466f , -0.629638239f , -0.780737229f , -0.624859488f , -0.784556597f , -0.620057212f , -0.788346428f , -0.615231591f , -0.792106577f , -0.610382806f , -0.795836905f , -0.605511041f , -0.799537269f , -0.600616479f , -0.803207531f , -0.595699304f , -0.806847554f , -0.590759702f , -0.810457198f , -0.585797857f , -0.814036330f , -0.580813958f , -0.817584813f , -0.575808191f , -0.821102515f , -0.570780746f , -0.824589303f , -0.565731811f , -0.828045045f , -0.560661576f , -0.831469612f , -0.555570233f , -0.834862875f , -0.550457973f , -0.838224706f , -0.545324988f , -0.841554977f , -0.540171473f , -0.844853565f , -0.534997620f , -0.848120345f , -0.529803625f , -0.851355193f , -0.524589683f , -0.854557988f , -0.519355990f , -0.857728610f , -0.514102744f , -0.860866939f , -0.508830143f , -0.863972856f , -0.503538384f , -0.867046246f , -0.498227667f , -0.870086991f , -0.492898192f , -0.873094978f , -0.487550160f , -0.876070094f , -0.482183772f , -0.879012226f , -0.476799230f , -0.881921264f , -0.471396737f , -0.884797098f , -0.465976496f , -0.887639620f , -0.460538711f , -0.890448723f , -0.455083587f , -0.893224301f , -0.449611330f , -0.895966250f , -0.444122145f , -0.898674466f , -0.438616239f , -0.901348847f , -0.433093819f , -0.903989293f , -0.427555093f , -0.906595705f , -0.422000271f , -0.909167983f , -0.416429560f , -0.911706032f , -0.410843171f , -0.914209756f , -0.405241314f , -0.916679060f , -0.399624200f , -0.919113852f , -0.393992040f , -0.921514039f , -0.388345047f , -0.923879533f , -0.382683432f , -0.926210242f , -0.377007410f , -0.928506080f , -0.371317194f , -0.930766961f , -0.365612998f , -0.932992799f , -0.359895037f , -0.935183510f , -0.354163525f , -0.937339012f , -0.348418680f , -0.939459224f , -0.342660717f , -0.941544065f , -0.336889853f , -0.943593458f , -0.331106306f , -0.945607325f , -0.325310292f , -0.947585591f , -0.319502031f , -0.949528181f , -0.313681740f , -0.951435021f , -0.307849640f , -0.953306040f , -0.302005949f , -0.955141168f , -0.296150888f , -0.956940336f , -0.290284677f , -0.958703475f , -0.284407537f , -0.960430519f , -0.278519689f , -0.962121404f , -0.272621355f , -0.963776066f , -0.266712757f , -0.965394442f , -0.260794118f , -0.966976471f , -0.254865660f , -0.968522094f , -0.248927606f , -0.970031253f , -0.242980180f , -0.971503891f , -0.237023606f , -0.972939952f , -0.231058108f , -0.974339383f , -0.225083911f , -0.975702130f , -0.219101240f , -0.977028143f , -0.213110320f , -0.978317371f , -0.207111376f , -0.979569766f , -0.201104635f , -0.980785280f , -0.195090322f , -0.981963869f , -0.189068664f , -0.983105487f , -0.183039888f , -0.984210092f , -0.177004220f , -0.985277642f , -0.170961889f , -0.986308097f , -0.164913120f , -0.987301418f , -0.158858143f , -0.988257568f , -0.152797185f , -0.989176510f , -0.146730474f , -0.990058210f , -0.140658239f , -0.990902635f , -0.134580709f , -0.991709754f , -0.128498111f , -0.992479535f , -0.122410675f , -0.993211949f , -0.116318631f , -0.993906970f , -0.110222207f , -0.994564571f , -0.104121634f , -0.995184727f , -0.098017140f , -0.995767414f , -0.091908956f , -0.996312612f , -0.085797312f , -0.996820299f , -0.079682438f , -0.997290457f , -0.073564564f , -0.997723067f , -0.067443920f , -0.998118113f , -0.061320736f , -0.998475581f , -0.055195244f , -0.998795456f , -0.049067674f , -0.999077728f , -0.042938257f , -0.999322385f , -0.036807223f , -0.999529418f , -0.030674803f , -0.999698819f , -0.024541229f , -0.999830582f , -0.018406730f , -0.999924702f , -0.012271538f , -0.999981175f , -0.006135885f -}; - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 2048 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float32_t twiddleCoef_2048[4096] = { - 1.000000000f, 0.000000000f, - 0.999995294f, 0.003067957f, - 0.999981175f, 0.006135885f, - 0.999957645f, 0.009203755f, - 0.999924702f, 0.012271538f, - 0.999882347f, 0.015339206f, - 0.999830582f, 0.018406730f, - 0.999769405f, 0.021474080f, - 0.999698819f, 0.024541229f, - 0.999618822f, 0.027608146f, - 0.999529418f, 0.030674803f, - 0.999430605f, 0.033741172f, - 0.999322385f, 0.036807223f, - 0.999204759f, 0.039872928f, - 0.999077728f, 0.042938257f, - 0.998941293f, 0.046003182f, - 0.998795456f, 0.049067674f, - 0.998640218f, 0.052131705f, - 0.998475581f, 0.055195244f, - 0.998301545f, 0.058258265f, - 0.998118113f, 0.061320736f, - 0.997925286f, 0.064382631f, - 0.997723067f, 0.067443920f, - 0.997511456f, 0.070504573f, - 0.997290457f, 0.073564564f, - 0.997060070f, 0.076623861f, - 0.996820299f, 0.079682438f, - 0.996571146f, 0.082740265f, - 0.996312612f, 0.085797312f, - 0.996044701f, 0.088853553f, - 0.995767414f, 0.091908956f, - 0.995480755f, 0.094963495f, - 0.995184727f, 0.098017140f, - 0.994879331f, 0.101069863f, - 0.994564571f, 0.104121634f, - 0.994240449f, 0.107172425f, - 0.993906970f, 0.110222207f, - 0.993564136f, 0.113270952f, - 0.993211949f, 0.116318631f, - 0.992850414f, 0.119365215f, - 0.992479535f, 0.122410675f, - 0.992099313f, 0.125454983f, - 0.991709754f, 0.128498111f, - 0.991310860f, 0.131540029f, - 0.990902635f, 0.134580709f, - 0.990485084f, 0.137620122f, - 0.990058210f, 0.140658239f, - 0.989622017f, 0.143695033f, - 0.989176510f, 0.146730474f, - 0.988721692f, 0.149764535f, - 0.988257568f, 0.152797185f, - 0.987784142f, 0.155828398f, - 0.987301418f, 0.158858143f, - 0.986809402f, 0.161886394f, - 0.986308097f, 0.164913120f, - 0.985797509f, 0.167938295f, - 0.985277642f, 0.170961889f, - 0.984748502f, 0.173983873f, - 0.984210092f, 0.177004220f, - 0.983662419f, 0.180022901f, - 0.983105487f, 0.183039888f, - 0.982539302f, 0.186055152f, - 0.981963869f, 0.189068664f, - 0.981379193f, 0.192080397f, - 0.980785280f, 0.195090322f, - 0.980182136f, 0.198098411f, - 0.979569766f, 0.201104635f, - 0.978948175f, 0.204108966f, - 0.978317371f, 0.207111376f, - 0.977677358f, 0.210111837f, - 0.977028143f, 0.213110320f, - 0.976369731f, 0.216106797f, - 0.975702130f, 0.219101240f, - 0.975025345f, 0.222093621f, - 0.974339383f, 0.225083911f, - 0.973644250f, 0.228072083f, - 0.972939952f, 0.231058108f, - 0.972226497f, 0.234041959f, - 0.971503891f, 0.237023606f, - 0.970772141f, 0.240003022f, - 0.970031253f, 0.242980180f, - 0.969281235f, 0.245955050f, - 0.968522094f, 0.248927606f, - 0.967753837f, 0.251897818f, - 0.966976471f, 0.254865660f, - 0.966190003f, 0.257831102f, - 0.965394442f, 0.260794118f, - 0.964589793f, 0.263754679f, - 0.963776066f, 0.266712757f, - 0.962953267f, 0.269668326f, - 0.962121404f, 0.272621355f, - 0.961280486f, 0.275571819f, - 0.960430519f, 0.278519689f, - 0.959571513f, 0.281464938f, - 0.958703475f, 0.284407537f, - 0.957826413f, 0.287347460f, - 0.956940336f, 0.290284677f, - 0.956045251f, 0.293219163f, - 0.955141168f, 0.296150888f, - 0.954228095f, 0.299079826f, - 0.953306040f, 0.302005949f, - 0.952375013f, 0.304929230f, - 0.951435021f, 0.307849640f, - 0.950486074f, 0.310767153f, - 0.949528181f, 0.313681740f, - 0.948561350f, 0.316593376f, - 0.947585591f, 0.319502031f, - 0.946600913f, 0.322407679f, - 0.945607325f, 0.325310292f, - 0.944604837f, 0.328209844f, - 0.943593458f, 0.331106306f, - 0.942573198f, 0.333999651f, - 0.941544065f, 0.336889853f, - 0.940506071f, 0.339776884f, - 0.939459224f, 0.342660717f, - 0.938403534f, 0.345541325f, - 0.937339012f, 0.348418680f, - 0.936265667f, 0.351292756f, - 0.935183510f, 0.354163525f, - 0.934092550f, 0.357030961f, - 0.932992799f, 0.359895037f, - 0.931884266f, 0.362755724f, - 0.930766961f, 0.365612998f, - 0.929640896f, 0.368466830f, - 0.928506080f, 0.371317194f, - 0.927362526f, 0.374164063f, - 0.926210242f, 0.377007410f, - 0.925049241f, 0.379847209f, - 0.923879533f, 0.382683432f, - 0.922701128f, 0.385516054f, - 0.921514039f, 0.388345047f, - 0.920318277f, 0.391170384f, - 0.919113852f, 0.393992040f, - 0.917900776f, 0.396809987f, - 0.916679060f, 0.399624200f, - 0.915448716f, 0.402434651f, - 0.914209756f, 0.405241314f, - 0.912962190f, 0.408044163f, - 0.911706032f, 0.410843171f, - 0.910441292f, 0.413638312f, - 0.909167983f, 0.416429560f, - 0.907886116f, 0.419216888f, - 0.906595705f, 0.422000271f, - 0.905296759f, 0.424779681f, - 0.903989293f, 0.427555093f, - 0.902673318f, 0.430326481f, - 0.901348847f, 0.433093819f, - 0.900015892f, 0.435857080f, - 0.898674466f, 0.438616239f, - 0.897324581f, 0.441371269f, - 0.895966250f, 0.444122145f, - 0.894599486f, 0.446868840f, - 0.893224301f, 0.449611330f, - 0.891840709f, 0.452349587f, - 0.890448723f, 0.455083587f, - 0.889048356f, 0.457813304f, - 0.887639620f, 0.460538711f, - 0.886222530f, 0.463259784f, - 0.884797098f, 0.465976496f, - 0.883363339f, 0.468688822f, - 0.881921264f, 0.471396737f, - 0.880470889f, 0.474100215f, - 0.879012226f, 0.476799230f, - 0.877545290f, 0.479493758f, - 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0.991709754f, -0.128498111f, - 0.992099313f, -0.125454983f, - 0.992479535f, -0.122410675f, - 0.992850414f, -0.119365215f, - 0.993211949f, -0.116318631f, - 0.993564136f, -0.113270952f, - 0.993906970f, -0.110222207f, - 0.994240449f, -0.107172425f, - 0.994564571f, -0.104121634f, - 0.994879331f, -0.101069863f, - 0.995184727f, -0.098017140f, - 0.995480755f, -0.094963495f, - 0.995767414f, -0.091908956f, - 0.996044701f, -0.088853553f, - 0.996312612f, -0.085797312f, - 0.996571146f, -0.082740265f, - 0.996820299f, -0.079682438f, - 0.997060070f, -0.076623861f, - 0.997290457f, -0.073564564f, - 0.997511456f, -0.070504573f, - 0.997723067f, -0.067443920f, - 0.997925286f, -0.064382631f, - 0.998118113f, -0.061320736f, - 0.998301545f, -0.058258265f, - 0.998475581f, -0.055195244f, - 0.998640218f, -0.052131705f, - 0.998795456f, -0.049067674f, - 0.998941293f, -0.046003182f, - 0.999077728f, -0.042938257f, - 0.999204759f, -0.039872928f, - 0.999322385f, -0.036807223f, - 0.999430605f, -0.033741172f, - 0.999529418f, -0.030674803f, - 0.999618822f, -0.027608146f, - 0.999698819f, -0.024541229f, - 0.999769405f, -0.021474080f, - 0.999830582f, -0.018406730f, - 0.999882347f, -0.015339206f, - 0.999924702f, -0.012271538f, - 0.999957645f, -0.009203755f, - 0.999981175f, -0.006135885f, - 0.999995294f, -0.003067957f -}; - -/** -* \par -* Example code for Floating-point Twiddle factors Generation: -* \par -* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 4096 and PI = 3.14159265358979 -* \par -* Cos and Sin values are in interleaved fashion -* -*/ -const float32_t twiddleCoef_4096[8192] = { - 1.000000000f, 0.000000000f, - 0.999998823f, 0.001533980f, - 0.999995294f, 0.003067957f, - 0.999989411f, 0.004601926f, - 0.999981175f, 0.006135885f, - 0.999970586f, 0.007669829f, - 0.999957645f, 0.009203755f, - 0.999942350f, 0.010737659f, - 0.999924702f, 0.012271538f, - 0.999904701f, 0.013805389f, - 0.999882347f, 0.015339206f, - 0.999857641f, 0.016872988f, - 0.999830582f, 0.018406730f, - 0.999801170f, 0.019940429f, - 0.999769405f, 0.021474080f, - 0.999735288f, 0.023007681f, - 0.999698819f, 0.024541229f, - 0.999659997f, 0.026074718f, - 0.999618822f, 0.027608146f, - 0.999575296f, 0.029141509f, - 0.999529418f, 0.030674803f, - 0.999481187f, 0.032208025f, - 0.999430605f, 0.033741172f, - 0.999377670f, 0.035274239f, - 0.999322385f, 0.036807223f, - 0.999264747f, 0.038340120f, - 0.999204759f, 0.039872928f, - 0.999142419f, 0.041405641f, - 0.999077728f, 0.042938257f, - 0.999010686f, 0.044470772f, - 0.998941293f, 0.046003182f, - 0.998869550f, 0.047535484f, - 0.998795456f, 0.049067674f, - 0.998719012f, 0.050599749f, - 0.998640218f, 0.052131705f, - 0.998559074f, 0.053663538f, - 0.998475581f, 0.055195244f, - 0.998389737f, 0.056726821f, - 0.998301545f, 0.058258265f, - 0.998211003f, 0.059789571f, - 0.998118113f, 0.061320736f, - 0.998022874f, 0.062851758f, - 0.997925286f, 0.064382631f, - 0.997825350f, 0.065913353f, - 0.997723067f, 0.067443920f, - 0.997618435f, 0.068974328f, - 0.997511456f, 0.070504573f, - 0.997402130f, 0.072034653f, - 0.997290457f, 0.073564564f, - 0.997176437f, 0.075094301f, - 0.997060070f, 0.076623861f, - 0.996941358f, 0.078153242f, - 0.996820299f, 0.079682438f, - 0.996696895f, 0.081211447f, - 0.996571146f, 0.082740265f, - 0.996443051f, 0.084268888f, - 0.996312612f, 0.085797312f, - 0.996179829f, 0.087325535f, - 0.996044701f, 0.088853553f, - 0.995907229f, 0.090381361f, - 0.995767414f, 0.091908956f, - 0.995625256f, 0.093436336f, - 0.995480755f, 0.094963495f, - 0.995333912f, 0.096490431f, - 0.995184727f, 0.098017140f, - 0.995033199f, 0.099543619f, - 0.994879331f, 0.101069863f, - 0.994723121f, 0.102595869f, - 0.994564571f, 0.104121634f, - 0.994403680f, 0.105647154f, - 0.994240449f, 0.107172425f, - 0.994074879f, 0.108697444f, - 0.993906970f, 0.110222207f, - 0.993736722f, 0.111746711f, - 0.993564136f, 0.113270952f, - 0.993389211f, 0.114794927f, - 0.993211949f, 0.116318631f, - 0.993032350f, 0.117842062f, - 0.992850414f, 0.119365215f, - 0.992666142f, 0.120888087f, - 0.992479535f, 0.122410675f, - 0.992290591f, 0.123932975f, - 0.992099313f, 0.125454983f, - 0.991905700f, 0.126976696f, - 0.991709754f, 0.128498111f, - 0.991511473f, 0.130019223f, - 0.991310860f, 0.131540029f, - 0.991107914f, 0.133060525f, - 0.990902635f, 0.134580709f, - 0.990695025f, 0.136100575f, - 0.990485084f, 0.137620122f, - 0.990272812f, 0.139139344f, - 0.990058210f, 0.140658239f, - 0.989841278f, 0.142176804f, - 0.989622017f, 0.143695033f, - 0.989400428f, 0.145212925f, - 0.989176510f, 0.146730474f, - 0.988950265f, 0.148247679f, - 0.988721692f, 0.149764535f, - 0.988490793f, 0.151281038f, - 0.988257568f, 0.152797185f, - 0.988022017f, 0.154312973f, - 0.987784142f, 0.155828398f, - 0.987543942f, 0.157343456f, - 0.987301418f, 0.158858143f, - 0.987056571f, 0.160372457f, - 0.986809402f, 0.161886394f, - 0.986559910f, 0.163399949f, - 0.986308097f, 0.164913120f, - 0.986053963f, 0.166425904f, - 0.985797509f, 0.167938295f, - 0.985538735f, 0.169450291f, - 0.985277642f, 0.170961889f, - 0.985014231f, 0.172473084f, - 0.984748502f, 0.173983873f, - 0.984480455f, 0.175494253f, - 0.984210092f, 0.177004220f, - 0.983937413f, 0.178513771f, - 0.983662419f, 0.180022901f, - 0.983385110f, 0.181531608f, - 0.983105487f, 0.183039888f, - 0.982823551f, 0.184547737f, - 0.982539302f, 0.186055152f, - 0.982252741f, 0.187562129f, - 0.981963869f, 0.189068664f, - 0.981672686f, 0.190574755f, - 0.981379193f, 0.192080397f, - 0.981083391f, 0.193585587f, - 0.980785280f, 0.195090322f, - 0.980484862f, 0.196594598f, - 0.980182136f, 0.198098411f, - 0.979877104f, 0.199601758f, - 0.979569766f, 0.201104635f, - 0.979260123f, 0.202607039f, - 0.978948175f, 0.204108966f, - 0.978633924f, 0.205610413f, - 0.978317371f, 0.207111376f, - 0.977998515f, 0.208611852f, - 0.977677358f, 0.210111837f, - 0.977353900f, 0.211611327f, - 0.977028143f, 0.213110320f, - 0.976700086f, 0.214608811f, - 0.976369731f, 0.216106797f, - 0.976037079f, 0.217604275f, - 0.975702130f, 0.219101240f, - 0.975364885f, 0.220597690f, - 0.975025345f, 0.222093621f, - 0.974683511f, 0.223589029f, - 0.974339383f, 0.225083911f, - 0.973992962f, 0.226578264f, - 0.973644250f, 0.228072083f, - 0.973293246f, 0.229565366f, - 0.972939952f, 0.231058108f, - 0.972584369f, 0.232550307f, - 0.972226497f, 0.234041959f, - 0.971866337f, 0.235533059f, - 0.971503891f, 0.237023606f, - 0.971139158f, 0.238513595f, - 0.970772141f, 0.240003022f, - 0.970402839f, 0.241491885f, - 0.970031253f, 0.242980180f, - 0.969657385f, 0.244467903f, - 0.969281235f, 0.245955050f, - 0.968902805f, 0.247441619f, - 0.968522094f, 0.248927606f, - 0.968139105f, 0.250413007f, - 0.967753837f, 0.251897818f, - 0.967366292f, 0.253382037f, - 0.966976471f, 0.254865660f, - 0.966584374f, 0.256348682f, - 0.966190003f, 0.257831102f, - 0.965793359f, 0.259312915f, - 0.965394442f, 0.260794118f, - 0.964993253f, 0.262274707f, - 0.964589793f, 0.263754679f, - 0.964184064f, 0.265234030f, - 0.963776066f, 0.266712757f, - 0.963365800f, 0.268190857f, - 0.962953267f, 0.269668326f, - 0.962538468f, 0.271145160f, - 0.962121404f, 0.272621355f, - 0.961702077f, 0.274096910f, - 0.961280486f, 0.275571819f, - 0.960856633f, 0.277046080f, - 0.960430519f, 0.278519689f, - 0.960002146f, 0.279992643f, - 0.959571513f, 0.281464938f, - 0.959138622f, 0.282936570f, - 0.958703475f, 0.284407537f, - 0.958266071f, 0.285877835f, - 0.957826413f, 0.287347460f, - 0.957384501f, 0.288816408f, - 0.956940336f, 0.290284677f, - 0.956493919f, 0.291752263f, - 0.956045251f, 0.293219163f, - 0.955594334f, 0.294685372f, - 0.955141168f, 0.296150888f, - 0.954685755f, 0.297615707f, - 0.954228095f, 0.299079826f, - 0.953768190f, 0.300543241f, - 0.953306040f, 0.302005949f, - 0.952841648f, 0.303467947f, - 0.952375013f, 0.304929230f, - 0.951906137f, 0.306389795f, - 0.951435021f, 0.307849640f, - 0.950961666f, 0.309308760f, - 0.950486074f, 0.310767153f, - 0.950008245f, 0.312224814f, - 0.949528181f, 0.313681740f, - 0.949045882f, 0.315137929f, - 0.948561350f, 0.316593376f, - 0.948074586f, 0.318048077f, - 0.947585591f, 0.319502031f, - 0.947094366f, 0.320955232f, - 0.946600913f, 0.322407679f, - 0.946105232f, 0.323859367f, - 0.945607325f, 0.325310292f, - 0.945107193f, 0.326760452f, - 0.944604837f, 0.328209844f, - 0.944100258f, 0.329658463f, - 0.943593458f, 0.331106306f, - 0.943084437f, 0.332553370f, - 0.942573198f, 0.333999651f, - 0.942059740f, 0.335445147f, - 0.941544065f, 0.336889853f, - 0.941026175f, 0.338333767f, - 0.940506071f, 0.339776884f, - 0.939983753f, 0.341219202f, - 0.939459224f, 0.342660717f, - 0.938932484f, 0.344101426f, - 0.938403534f, 0.345541325f, - 0.937872376f, 0.346980411f, - 0.937339012f, 0.348418680f, - 0.936803442f, 0.349856130f, - 0.936265667f, 0.351292756f, - 0.935725689f, 0.352728556f, - 0.935183510f, 0.354163525f, - 0.934639130f, 0.355597662f, - 0.934092550f, 0.357030961f, - 0.933543773f, 0.358463421f, - 0.932992799f, 0.359895037f, - 0.932439629f, 0.361325806f, - 0.931884266f, 0.362755724f, - 0.931326709f, 0.364184790f, - 0.930766961f, 0.365612998f, - 0.930205023f, 0.367040346f, - 0.929640896f, 0.368466830f, - 0.929074581f, 0.369892447f, - 0.928506080f, 0.371317194f, - 0.927935395f, 0.372741067f, - 0.927362526f, 0.374164063f, - 0.926787474f, 0.375586178f, - 0.926210242f, 0.377007410f, - 0.925630831f, 0.378427755f, - 0.925049241f, 0.379847209f, - 0.924465474f, 0.381265769f, - 0.923879533f, 0.382683432f, - 0.923291417f, 0.384100195f, - 0.922701128f, 0.385516054f, - 0.922108669f, 0.386931006f, - 0.921514039f, 0.388345047f, - 0.920917242f, 0.389758174f, - 0.920318277f, 0.391170384f, - 0.919717146f, 0.392581674f, - 0.919113852f, 0.393992040f, - 0.918508394f, 0.395401479f, - 0.917900776f, 0.396809987f, - 0.917290997f, 0.398217562f, - 0.916679060f, 0.399624200f, - 0.916064966f, 0.401029897f, - 0.915448716f, 0.402434651f, - 0.914830312f, 0.403838458f, - 0.914209756f, 0.405241314f, - 0.913587048f, 0.406643217f, - 0.912962190f, 0.408044163f, - 0.912335185f, 0.409444149f, - 0.911706032f, 0.410843171f, - 0.911074734f, 0.412241227f, - 0.910441292f, 0.413638312f, - 0.909805708f, 0.415034424f, - 0.909167983f, 0.416429560f, - 0.908528119f, 0.417823716f, - 0.907886116f, 0.419216888f, - 0.907241978f, 0.420609074f, - 0.906595705f, 0.422000271f, - 0.905947298f, 0.423390474f, - 0.905296759f, 0.424779681f, - 0.904644091f, 0.426167889f, - 0.903989293f, 0.427555093f, - 0.903332368f, 0.428941292f, - 0.902673318f, 0.430326481f, - 0.902012144f, 0.431710658f, - 0.901348847f, 0.433093819f, - 0.900683429f, 0.434475961f, - 0.900015892f, 0.435857080f, - 0.899346237f, 0.437237174f, - 0.898674466f, 0.438616239f, - 0.898000580f, 0.439994271f, - 0.897324581f, 0.441371269f, - 0.896646470f, 0.442747228f, - 0.895966250f, 0.444122145f, - 0.895283921f, 0.445496017f, - 0.894599486f, 0.446868840f, - 0.893912945f, 0.448240612f, - 0.893224301f, 0.449611330f, - 0.892533555f, 0.450980989f, - 0.891840709f, 0.452349587f, - 0.891145765f, 0.453717121f, - 0.890448723f, 0.455083587f, - 0.889749586f, 0.456448982f, - 0.889048356f, 0.457813304f, - 0.888345033f, 0.459176548f, - 0.887639620f, 0.460538711f, - 0.886932119f, 0.461899791f, - 0.886222530f, 0.463259784f, - 0.885510856f, 0.464618686f, - 0.884797098f, 0.465976496f, - 0.884081259f, 0.467333209f, - 0.883363339f, 0.468688822f, - 0.882643340f, 0.470043332f, - 0.881921264f, 0.471396737f, - 0.881197113f, 0.472749032f, - 0.880470889f, 0.474100215f, - 0.879742593f, 0.475450282f, - 0.879012226f, 0.476799230f, - 0.878279792f, 0.478147056f, - 0.877545290f, 0.479493758f, - 0.876808724f, 0.480839331f, - 0.876070094f, 0.482183772f, - 0.875329403f, 0.483527079f, - 0.874586652f, 0.484869248f, - 0.873841843f, 0.486210276f, - 0.873094978f, 0.487550160f, - 0.872346059f, 0.488888897f, - 0.871595087f, 0.490226483f, - 0.870842063f, 0.491562916f, - 0.870086991f, 0.492898192f, - 0.869329871f, 0.494232309f, - 0.868570706f, 0.495565262f, - 0.867809497f, 0.496897049f, - 0.867046246f, 0.498227667f, - 0.866280954f, 0.499557113f, - 0.865513624f, 0.500885383f, - 0.864744258f, 0.502212474f, - 0.863972856f, 0.503538384f, - 0.863199422f, 0.504863109f, - 0.862423956f, 0.506186645f, - 0.861646461f, 0.507508991f, - 0.860866939f, 0.508830143f, - 0.860085390f, 0.510150097f, - 0.859301818f, 0.511468850f, - 0.858516224f, 0.512786401f, - 0.857728610f, 0.514102744f, - 0.856938977f, 0.515417878f, - 0.856147328f, 0.516731799f, - 0.855353665f, 0.518044504f, - 0.854557988f, 0.519355990f, - 0.853760301f, 0.520666254f, - 0.852960605f, 0.521975293f, - 0.852158902f, 0.523283103f, - 0.851355193f, 0.524589683f, - 0.850549481f, 0.525895027f, - 0.849741768f, 0.527199135f, - 0.848932055f, 0.528502002f, - 0.848120345f, 0.529803625f, - 0.847306639f, 0.531104001f, - 0.846490939f, 0.532403128f, - 0.845673247f, 0.533701002f, - 0.844853565f, 0.534997620f, - 0.844031895f, 0.536292979f, - 0.843208240f, 0.537587076f, - 0.842382600f, 0.538879909f, - 0.841554977f, 0.540171473f, - 0.840725375f, 0.541461766f, - 0.839893794f, 0.542750785f, - 0.839060237f, 0.544038527f, - 0.838224706f, 0.545324988f, - 0.837387202f, 0.546610167f, - 0.836547727f, 0.547894059f, - 0.835706284f, 0.549176662f, - 0.834862875f, 0.550457973f, - 0.834017501f, 0.551737988f, - 0.833170165f, 0.553016706f, - 0.832320868f, 0.554294121f, - 0.831469612f, 0.555570233f, - 0.830616400f, 0.556845037f, - 0.829761234f, 0.558118531f, - 0.828904115f, 0.559390712f, - 0.828045045f, 0.560661576f, - 0.827184027f, 0.561931121f, - 0.826321063f, 0.563199344f, - 0.825456154f, 0.564466242f, - 0.824589303f, 0.565731811f, - 0.823720511f, 0.566996049f, - 0.822849781f, 0.568258953f, - 0.821977115f, 0.569520519f, - 0.821102515f, 0.570780746f, - 0.820225983f, 0.572039629f, - 0.819347520f, 0.573297167f, - 0.818467130f, 0.574553355f, - 0.817584813f, 0.575808191f, - 0.816700573f, 0.577061673f, - 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0.997511456f, -0.070504573f, - 0.997618435f, -0.068974328f, - 0.997723067f, -0.067443920f, - 0.997825350f, -0.065913353f, - 0.997925286f, -0.064382631f, - 0.998022874f, -0.062851758f, - 0.998118113f, -0.061320736f, - 0.998211003f, -0.059789571f, - 0.998301545f, -0.058258265f, - 0.998389737f, -0.056726821f, - 0.998475581f, -0.055195244f, - 0.998559074f, -0.053663538f, - 0.998640218f, -0.052131705f, - 0.998719012f, -0.050599749f, - 0.998795456f, -0.049067674f, - 0.998869550f, -0.047535484f, - 0.998941293f, -0.046003182f, - 0.999010686f, -0.044470772f, - 0.999077728f, -0.042938257f, - 0.999142419f, -0.041405641f, - 0.999204759f, -0.039872928f, - 0.999264747f, -0.038340120f, - 0.999322385f, -0.036807223f, - 0.999377670f, -0.035274239f, - 0.999430605f, -0.033741172f, - 0.999481187f, -0.032208025f, - 0.999529418f, -0.030674803f, - 0.999575296f, -0.029141509f, - 0.999618822f, -0.027608146f, - 0.999659997f, -0.026074718f, - 0.999698819f, -0.024541229f, - 0.999735288f, -0.023007681f, - 0.999769405f, -0.021474080f, - 0.999801170f, -0.019940429f, - 0.999830582f, -0.018406730f, - 0.999857641f, -0.016872988f, - 0.999882347f, -0.015339206f, - 0.999904701f, -0.013805389f, - 0.999924702f, -0.012271538f, - 0.999942350f, -0.010737659f, - 0.999957645f, -0.009203755f, - 0.999970586f, -0.007669829f, - 0.999981175f, -0.006135885f, - 0.999989411f, -0.004601926f, - 0.999995294f, -0.003067957f, - 0.999998823f, -0.001533980f -}; - -/* -* @brief Q31 Twiddle factors Table -*/ - - -/** -* \par -* Example code for Q31 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 16 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to Q31(Fixed point 1.31): -* round(twiddleCoefQ31(i) * pow(2, 31)) -* -*/ -const q31_t twiddleCoef_16_q31[24] = { - 0x7FFFFFFF, 0x00000000, - 0x7641AF3C, 0x30FBC54D, - 0x5A82799A, 0x5A82799A, - 0x30FBC54D, 0x7641AF3C, - 0x00000000, 0x7FFFFFFF, - 0xCF043AB2, 0x7641AF3C, - 0xA57D8666, 0x5A82799A, - 0x89BE50C3, 0x30FBC54D, - 0x80000000, 0x00000000, - 0x89BE50C3, 0xCF043AB2, - 0xA57D8666, 0xA57D8666, - 0xCF043AB2, 0x89BE50C3 -}; - -/** -* \par -* Example code for Q31 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 32 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to Q31(Fixed point 1.31): -* round(twiddleCoefQ31(i) * pow(2, 31)) -* -*/ -const q31_t twiddleCoef_32_q31[48] = { - 0x7FFFFFFF, 0x00000000, - 0x7D8A5F3F, 0x18F8B83C, - 0x7641AF3C, 0x30FBC54D, - 0x6A6D98A4, 0x471CECE6, - 0x5A82799A, 0x5A82799A, - 0x471CECE6, 0x6A6D98A4, - 0x30FBC54D, 0x7641AF3C, - 0x18F8B83C, 0x7D8A5F3F, - 0x00000000, 0x7FFFFFFF, - 0xE70747C3, 0x7D8A5F3F, - 0xCF043AB2, 0x7641AF3C, - 0xB8E31319, 0x6A6D98A4, - 0xA57D8666, 0x5A82799A, - 0x9592675B, 0x471CECE6, - 0x89BE50C3, 0x30FBC54D, - 0x8275A0C0, 0x18F8B83C, - 0x80000000, 0x00000000, - 0x8275A0C0, 0xE70747C3, - 0x89BE50C3, 0xCF043AB2, - 0x9592675B, 0xB8E31319, - 0xA57D8666, 0xA57D8666, - 0xB8E31319, 0x9592675B, - 0xCF043AB2, 0x89BE50C3, - 0xE70747C3, 0x8275A0C0 -}; - -/** -* \par -* Example code for Q31 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 64 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to Q31(Fixed point 1.31): -* round(twiddleCoefQ31(i) * pow(2, 31)) -* -*/ -const q31_t twiddleCoef_64_q31[96] = { - 0x7FFFFFFF, 0x00000000, - 0x7F62368F, 0x0C8BD35E, - 0x7D8A5F3F, 0x18F8B83C, - 0x7A7D055B, 0x25280C5D, - 0x7641AF3C, 0x30FBC54D, - 0x70E2CBC6, 0x3C56BA70, - 0x6A6D98A4, 0x471CECE6, - 0x62F201AC, 0x5133CC94, - 0x5A82799A, 0x5A82799A, - 0x5133CC94, 0x62F201AC, - 0x471CECE6, 0x6A6D98A4, - 0x3C56BA70, 0x70E2CBC6, - 0x30FBC54D, 0x7641AF3C, - 0x25280C5D, 0x7A7D055B, - 0x18F8B83C, 0x7D8A5F3F, - 0x0C8BD35E, 0x7F62368F, - 0x00000000, 0x7FFFFFFF, - 0xF3742CA1, 0x7F62368F, - 0xE70747C3, 0x7D8A5F3F, - 0xDAD7F3A2, 0x7A7D055B, - 0xCF043AB2, 0x7641AF3C, - 0xC3A9458F, 0x70E2CBC6, - 0xB8E31319, 0x6A6D98A4, - 0xAECC336B, 0x62F201AC, - 0xA57D8666, 0x5A82799A, - 0x9D0DFE53, 0x5133CC94, - 0x9592675B, 0x471CECE6, - 0x8F1D343A, 0x3C56BA70, - 0x89BE50C3, 0x30FBC54D, - 0x8582FAA4, 0x25280C5D, - 0x8275A0C0, 0x18F8B83C, - 0x809DC970, 0x0C8BD35E, - 0x80000000, 0x00000000, - 0x809DC970, 0xF3742CA1, - 0x8275A0C0, 0xE70747C3, - 0x8582FAA4, 0xDAD7F3A2, - 0x89BE50C3, 0xCF043AB2, - 0x8F1D343A, 0xC3A9458F, - 0x9592675B, 0xB8E31319, - 0x9D0DFE53, 0xAECC336B, - 0xA57D8666, 0xA57D8666, - 0xAECC336B, 0x9D0DFE53, - 0xB8E31319, 0x9592675B, - 0xC3A9458F, 0x8F1D343A, - 0xCF043AB2, 0x89BE50C3, - 0xDAD7F3A2, 0x8582FAA4, - 0xE70747C3, 0x8275A0C0, - 0xF3742CA1, 0x809DC970 -}; - -/** -* \par -* Example code for Q31 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 128 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to Q31(Fixed point 1.31): -* round(twiddleCoefQ31(i) * pow(2, 31)) -* -*/ -const q31_t twiddleCoef_128_q31[192] = { - 0x7FFFFFFF, 0x00000000, - 0x7FD8878D, 0x0647D97C, - 0x7F62368F, 0x0C8BD35E, - 0x7E9D55FC, 0x12C8106E, - 0x7D8A5F3F, 0x18F8B83C, - 0x7C29FBEE, 0x1F19F97B, - 0x7A7D055B, 0x25280C5D, - 0x78848413, 0x2B1F34EB, - 0x7641AF3C, 0x30FBC54D, - 0x73B5EBD0, 0x36BA2013, - 0x70E2CBC6, 0x3C56BA70, - 0x6DCA0D14, 0x41CE1E64, - 0x6A6D98A4, 0x471CECE6, - 0x66CF811F, 0x4C3FDFF3, - 0x62F201AC, 0x5133CC94, - 0x5ED77C89, 0x55F5A4D2, - 0x5A82799A, 0x5A82799A, - 0x55F5A4D2, 0x5ED77C89, - 0x5133CC94, 0x62F201AC, - 0x4C3FDFF3, 0x66CF811F, - 0x471CECE6, 0x6A6D98A4, - 0x41CE1E64, 0x6DCA0D14, - 0x3C56BA70, 0x70E2CBC6, - 0x36BA2013, 0x73B5EBD0, - 0x30FBC54D, 0x7641AF3C, - 0x2B1F34EB, 0x78848413, - 0x25280C5D, 0x7A7D055B, - 0x1F19F97B, 0x7C29FBEE, - 0x18F8B83C, 0x7D8A5F3F, - 0x12C8106E, 0x7E9D55FC, - 0x0C8BD35E, 0x7F62368F, - 0x0647D97C, 0x7FD8878D, - 0x00000000, 0x7FFFFFFF, - 0xF9B82683, 0x7FD8878D, - 0xF3742CA1, 0x7F62368F, - 0xED37EF91, 0x7E9D55FC, - 0xE70747C3, 0x7D8A5F3F, - 0xE0E60684, 0x7C29FBEE, - 0xDAD7F3A2, 0x7A7D055B, - 0xD4E0CB14, 0x78848413, - 0xCF043AB2, 0x7641AF3C, - 0xC945DFEC, 0x73B5EBD0, - 0xC3A9458F, 0x70E2CBC6, - 0xBE31E19B, 0x6DCA0D14, - 0xB8E31319, 0x6A6D98A4, - 0xB3C0200C, 0x66CF811F, - 0xAECC336B, 0x62F201AC, - 0xAA0A5B2D, 0x5ED77C89, - 0xA57D8666, 0x5A82799A, - 0xA1288376, 0x55F5A4D2, - 0x9D0DFE53, 0x5133CC94, - 0x99307EE0, 0x4C3FDFF3, - 0x9592675B, 0x471CECE6, - 0x9235F2EB, 0x41CE1E64, - 0x8F1D343A, 0x3C56BA70, - 0x8C4A142F, 0x36BA2013, - 0x89BE50C3, 0x30FBC54D, - 0x877B7BEC, 0x2B1F34EB, - 0x8582FAA4, 0x25280C5D, - 0x83D60411, 0x1F19F97B, - 0x8275A0C0, 0x18F8B83C, - 0x8162AA03, 0x12C8106E, - 0x809DC970, 0x0C8BD35E, - 0x80277872, 0x0647D97C, - 0x80000000, 0x00000000, - 0x80277872, 0xF9B82683, - 0x809DC970, 0xF3742CA1, - 0x8162AA03, 0xED37EF91, - 0x8275A0C0, 0xE70747C3, - 0x83D60411, 0xE0E60684, - 0x8582FAA4, 0xDAD7F3A2, - 0x877B7BEC, 0xD4E0CB14, - 0x89BE50C3, 0xCF043AB2, - 0x8C4A142F, 0xC945DFEC, - 0x8F1D343A, 0xC3A9458F, - 0x9235F2EB, 0xBE31E19B, - 0x9592675B, 0xB8E31319, - 0x99307EE0, 0xB3C0200C, - 0x9D0DFE53, 0xAECC336B, - 0xA1288376, 0xAA0A5B2D, - 0xA57D8666, 0xA57D8666, - 0xAA0A5B2D, 0xA1288376, - 0xAECC336B, 0x9D0DFE53, - 0xB3C0200C, 0x99307EE0, - 0xB8E31319, 0x9592675B, - 0xBE31E19B, 0x9235F2EB, - 0xC3A9458F, 0x8F1D343A, - 0xC945DFEC, 0x8C4A142F, - 0xCF043AB2, 0x89BE50C3, - 0xD4E0CB14, 0x877B7BEC, - 0xDAD7F3A2, 0x8582FAA4, - 0xE0E60684, 0x83D60411, - 0xE70747C3, 0x8275A0C0, - 0xED37EF91, 0x8162AA03, - 0xF3742CA1, 0x809DC970, - 0xF9B82683, 0x80277872 -}; - -/** -* \par -* Example code for Q31 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 256 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to Q31(Fixed point 1.31): -* round(twiddleCoefQ31(i) * pow(2, 31)) -* -*/ -const q31_t twiddleCoef_256_q31[384] = { - 0x7FFFFFFF, 0x00000000, - 0x7FF62182, 0x03242ABF, - 0x7FD8878D, 0x0647D97C, - 0x7FA736B4, 0x096A9049, - 0x7F62368F, 0x0C8BD35E, - 0x7F0991C3, 0x0FAB272B, - 0x7E9D55FC, 0x12C8106E, - 0x7E1D93E9, 0x15E21444, - 0x7D8A5F3F, 0x18F8B83C, - 0x7CE3CEB1, 0x1C0B826A, - 0x7C29FBEE, 0x1F19F97B, - 0x7B5D039D, 0x2223A4C5, - 0x7A7D055B, 0x25280C5D, - 0x798A23B1, 0x2826B928, - 0x78848413, 0x2B1F34EB, - 0x776C4EDB, 0x2E110A62, - 0x7641AF3C, 0x30FBC54D, - 0x7504D345, 0x33DEF287, - 0x73B5EBD0, 0x36BA2013, - 0x72552C84, 0x398CDD32, - 0x70E2CBC6, 0x3C56BA70, - 0x6F5F02B1, 0x3F1749B7, - 0x6DCA0D14, 0x41CE1E64, - 0x6C242960, 0x447ACD50, - 0x6A6D98A4, 0x471CECE6, - 0x68A69E81, 0x49B41533, - 0x66CF811F, 0x4C3FDFF3, - 0x64E88926, 0x4EBFE8A4, - 0x62F201AC, 0x5133CC94, - 0x60EC3830, 0x539B2AEF, - 0x5ED77C89, 0x55F5A4D2, - 0x5CB420DF, 0x5842DD54, - 0x5A82799A, 0x5A82799A, - 0x5842DD54, 0x5CB420DF, - 0x55F5A4D2, 0x5ED77C89, - 0x539B2AEF, 0x60EC3830, - 0x5133CC94, 0x62F201AC, - 0x4EBFE8A4, 0x64E88926, - 0x4C3FDFF3, 0x66CF811F, - 0x49B41533, 0x68A69E81, - 0x471CECE6, 0x6A6D98A4, - 0x447ACD50, 0x6C242960, - 0x41CE1E64, 0x6DCA0D14, - 0x3F1749B7, 0x6F5F02B1, - 0x3C56BA70, 0x70E2CBC6, - 0x398CDD32, 0x72552C84, - 0x36BA2013, 0x73B5EBD0, - 0x33DEF287, 0x7504D345, - 0x30FBC54D, 0x7641AF3C, - 0x2E110A62, 0x776C4EDB, - 0x2B1F34EB, 0x78848413, - 0x2826B928, 0x798A23B1, - 0x25280C5D, 0x7A7D055B, - 0x2223A4C5, 0x7B5D039D, - 0x1F19F97B, 0x7C29FBEE, - 0x1C0B826A, 0x7CE3CEB1, - 0x18F8B83C, 0x7D8A5F3F, - 0x15E21444, 0x7E1D93E9, - 0x12C8106E, 0x7E9D55FC, - 0x0FAB272B, 0x7F0991C3, - 0x0C8BD35E, 0x7F62368F, - 0x096A9049, 0x7FA736B4, - 0x0647D97C, 0x7FD8878D, - 0x03242ABF, 0x7FF62182, - 0x00000000, 0x7FFFFFFF, - 0xFCDBD541, 0x7FF62182, - 0xF9B82683, 0x7FD8878D, - 0xF6956FB6, 0x7FA736B4, - 0xF3742CA1, 0x7F62368F, - 0xF054D8D4, 0x7F0991C3, - 0xED37EF91, 0x7E9D55FC, - 0xEA1DEBBB, 0x7E1D93E9, - 0xE70747C3, 0x7D8A5F3F, - 0xE3F47D95, 0x7CE3CEB1, - 0xE0E60684, 0x7C29FBEE, - 0xDDDC5B3A, 0x7B5D039D, - 0xDAD7F3A2, 0x7A7D055B, - 0xD7D946D7, 0x798A23B1, - 0xD4E0CB14, 0x78848413, - 0xD1EEF59E, 0x776C4EDB, - 0xCF043AB2, 0x7641AF3C, - 0xCC210D78, 0x7504D345, - 0xC945DFEC, 0x73B5EBD0, - 0xC67322CD, 0x72552C84, - 0xC3A9458F, 0x70E2CBC6, - 0xC0E8B648, 0x6F5F02B1, - 0xBE31E19B, 0x6DCA0D14, - 0xBB8532AF, 0x6C242960, - 0xB8E31319, 0x6A6D98A4, - 0xB64BEACC, 0x68A69E81, - 0xB3C0200C, 0x66CF811F, - 0xB140175B, 0x64E88926, - 0xAECC336B, 0x62F201AC, - 0xAC64D510, 0x60EC3830, - 0xAA0A5B2D, 0x5ED77C89, - 0xA7BD22AB, 0x5CB420DF, - 0xA57D8666, 0x5A82799A, - 0xA34BDF20, 0x5842DD54, - 0xA1288376, 0x55F5A4D2, - 0x9F13C7D0, 0x539B2AEF, - 0x9D0DFE53, 0x5133CC94, - 0x9B1776D9, 0x4EBFE8A4, - 0x99307EE0, 0x4C3FDFF3, - 0x9759617E, 0x49B41533, - 0x9592675B, 0x471CECE6, - 0x93DBD69F, 0x447ACD50, - 0x9235F2EB, 0x41CE1E64, - 0x90A0FD4E, 0x3F1749B7, - 0x8F1D343A, 0x3C56BA70, - 0x8DAAD37B, 0x398CDD32, - 0x8C4A142F, 0x36BA2013, - 0x8AFB2CBA, 0x33DEF287, - 0x89BE50C3, 0x30FBC54D, - 0x8893B124, 0x2E110A62, - 0x877B7BEC, 0x2B1F34EB, - 0x8675DC4E, 0x2826B928, - 0x8582FAA4, 0x25280C5D, - 0x84A2FC62, 0x2223A4C5, - 0x83D60411, 0x1F19F97B, - 0x831C314E, 0x1C0B826A, - 0x8275A0C0, 0x18F8B83C, - 0x81E26C16, 0x15E21444, - 0x8162AA03, 0x12C8106E, - 0x80F66E3C, 0x0FAB272B, - 0x809DC970, 0x0C8BD35E, - 0x8058C94C, 0x096A9049, - 0x80277872, 0x0647D97C, - 0x8009DE7D, 0x03242ABF, - 0x80000000, 0x00000000, - 0x8009DE7D, 0xFCDBD541, - 0x80277872, 0xF9B82683, - 0x8058C94C, 0xF6956FB6, - 0x809DC970, 0xF3742CA1, - 0x80F66E3C, 0xF054D8D4, - 0x8162AA03, 0xED37EF91, - 0x81E26C16, 0xEA1DEBBB, - 0x8275A0C0, 0xE70747C3, - 0x831C314E, 0xE3F47D95, - 0x83D60411, 0xE0E60684, - 0x84A2FC62, 0xDDDC5B3A, - 0x8582FAA4, 0xDAD7F3A2, - 0x8675DC4E, 0xD7D946D7, - 0x877B7BEC, 0xD4E0CB14, - 0x8893B124, 0xD1EEF59E, - 0x89BE50C3, 0xCF043AB2, - 0x8AFB2CBA, 0xCC210D78, - 0x8C4A142F, 0xC945DFEC, - 0x8DAAD37B, 0xC67322CD, - 0x8F1D343A, 0xC3A9458F, - 0x90A0FD4E, 0xC0E8B648, - 0x9235F2EB, 0xBE31E19B, - 0x93DBD69F, 0xBB8532AF, - 0x9592675B, 0xB8E31319, - 0x9759617E, 0xB64BEACC, - 0x99307EE0, 0xB3C0200C, - 0x9B1776D9, 0xB140175B, - 0x9D0DFE53, 0xAECC336B, - 0x9F13C7D0, 0xAC64D510, - 0xA1288376, 0xAA0A5B2D, - 0xA34BDF20, 0xA7BD22AB, - 0xA57D8666, 0xA57D8666, - 0xA7BD22AB, 0xA34BDF20, - 0xAA0A5B2D, 0xA1288376, - 0xAC64D510, 0x9F13C7D0, - 0xAECC336B, 0x9D0DFE53, - 0xB140175B, 0x9B1776D9, - 0xB3C0200C, 0x99307EE0, - 0xB64BEACC, 0x9759617E, - 0xB8E31319, 0x9592675B, - 0xBB8532AF, 0x93DBD69F, - 0xBE31E19B, 0x9235F2EB, - 0xC0E8B648, 0x90A0FD4E, - 0xC3A9458F, 0x8F1D343A, - 0xC67322CD, 0x8DAAD37B, - 0xC945DFEC, 0x8C4A142F, - 0xCC210D78, 0x8AFB2CBA, - 0xCF043AB2, 0x89BE50C3, - 0xD1EEF59E, 0x8893B124, - 0xD4E0CB14, 0x877B7BEC, - 0xD7D946D7, 0x8675DC4E, - 0xDAD7F3A2, 0x8582FAA4, - 0xDDDC5B3A, 0x84A2FC62, - 0xE0E60684, 0x83D60411, - 0xE3F47D95, 0x831C314E, - 0xE70747C3, 0x8275A0C0, - 0xEA1DEBBB, 0x81E26C16, - 0xED37EF91, 0x8162AA03, - 0xF054D8D4, 0x80F66E3C, - 0xF3742CA1, 0x809DC970, - 0xF6956FB6, 0x8058C94C, - 0xF9B82683, 0x80277872, - 0xFCDBD541, 0x8009DE7D -}; - -/** -* \par -* Example code for Q31 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 512 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to Q31(Fixed point 1.31): -* round(twiddleCoefQ31(i) * pow(2, 31)) -* -*/ -const q31_t twiddleCoef_512_q31[768] = { - 0x7FFFFFFF, 0x00000000, - 0x7FFD885A, 0x01921D1F, - 0x7FF62182, 0x03242ABF, - 0x7FE9CBC0, 0x04B6195D, - 0x7FD8878D, 0x0647D97C, - 0x7FC25596, 0x07D95B9E, - 0x7FA736B4, 0x096A9049, - 0x7F872BF3, 0x0AFB6805, - 0x7F62368F, 0x0C8BD35E, - 0x7F3857F5, 0x0E1BC2E3, - 0x7F0991C3, 0x0FAB272B, - 0x7ED5E5C6, 0x1139F0CE, - 0x7E9D55FC, 0x12C8106E, - 0x7E5FE493, 0x145576B1, - 0x7E1D93E9, 0x15E21444, - 0x7DD6668E, 0x176DD9DE, - 0x7D8A5F3F, 0x18F8B83C, - 0x7D3980EC, 0x1A82A025, - 0x7CE3CEB1, 0x1C0B826A, - 0x7C894BDD, 0x1D934FE5, - 0x7C29FBEE, 0x1F19F97B, - 0x7BC5E28F, 0x209F701C, - 0x7B5D039D, 0x2223A4C5, - 0x7AEF6323, 0x23A6887E, - 0x7A7D055B, 0x25280C5D, - 0x7A05EEAD, 0x26A82185, - 0x798A23B1, 0x2826B928, - 0x7909A92C, 0x29A3C484, - 0x78848413, 0x2B1F34EB, - 0x77FAB988, 0x2C98FBBA, - 0x776C4EDB, 0x2E110A62, - 0x76D94988, 0x2F875262, - 0x7641AF3C, 0x30FBC54D, - 0x75A585CF, 0x326E54C7, - 0x7504D345, 0x33DEF287, - 0x745F9DD1, 0x354D9056, - 0x73B5EBD0, 0x36BA2013, - 0x7307C3D0, 0x382493B0, - 0x72552C84, 0x398CDD32, - 0x719E2CD2, 0x3AF2EEB7, - 0x70E2CBC6, 0x3C56BA70, - 0x70231099, 0x3DB832A5, - 0x6F5F02B1, 0x3F1749B7, - 0x6E96A99C, 0x4073F21D, - 0x6DCA0D14, 0x41CE1E64, - 0x6CF934FB, 0x4325C135, - 0x6C242960, 0x447ACD50, - 0x6B4AF278, 0x45CD358F, - 0x6A6D98A4, 0x471CECE6, - 0x698C246C, 0x4869E664, - 0x68A69E81, 0x49B41533, - 0x67BD0FBC, 0x4AFB6C97, - 0x66CF811F, 0x4C3FDFF3, - 0x65DDFBD3, 0x4D8162C4, - 0x64E88926, 0x4EBFE8A4, - 0x63EF328F, 0x4FFB654D, - 0x62F201AC, 0x5133CC94, - 0x61F1003E, 0x5269126E, - 0x60EC3830, 0x539B2AEF, - 0x5FE3B38D, 0x54CA0A4A, - 0x5ED77C89, 0x55F5A4D2, - 0x5DC79D7C, 0x571DEEF9, - 0x5CB420DF, 0x5842DD54, - 0x5B9D1153, 0x59646497, - 0x5A82799A, 0x5A82799A, - 0x59646497, 0x5B9D1153, - 0x5842DD54, 0x5CB420DF, - 0x571DEEF9, 0x5DC79D7C, - 0x55F5A4D2, 0x5ED77C89, - 0x54CA0A4A, 0x5FE3B38D, - 0x539B2AEF, 0x60EC3830, - 0x5269126E, 0x61F1003E, - 0x5133CC94, 0x62F201AC, - 0x4FFB654D, 0x63EF328F, - 0x4EBFE8A4, 0x64E88926, - 0x4D8162C4, 0x65DDFBD3, - 0x4C3FDFF3, 0x66CF811F, - 0x4AFB6C97, 0x67BD0FBC, - 0x49B41533, 0x68A69E81, - 0x4869E664, 0x698C246C, - 0x471CECE6, 0x6A6D98A4, - 0x45CD358F, 0x6B4AF278, - 0x447ACD50, 0x6C242960, - 0x4325C135, 0x6CF934FB, - 0x41CE1E64, 0x6DCA0D14, - 0x4073F21D, 0x6E96A99C, - 0x3F1749B7, 0x6F5F02B1, - 0x3DB832A5, 0x70231099, - 0x3C56BA70, 0x70E2CBC6, - 0x3AF2EEB7, 0x719E2CD2, - 0x398CDD32, 0x72552C84, - 0x382493B0, 0x7307C3D0, - 0x36BA2013, 0x73B5EBD0, - 0x354D9056, 0x745F9DD1, - 0x33DEF287, 0x7504D345, - 0x326E54C7, 0x75A585CF, - 0x30FBC54D, 0x7641AF3C, - 0x2F875262, 0x76D94988, - 0x2E110A62, 0x776C4EDB, - 0x2C98FBBA, 0x77FAB988, - 0x2B1F34EB, 0x78848413, - 0x29A3C484, 0x7909A92C, - 0x2826B928, 0x798A23B1, - 0x26A82185, 0x7A05EEAD, - 0x25280C5D, 0x7A7D055B, - 0x23A6887E, 0x7AEF6323, - 0x2223A4C5, 0x7B5D039D, - 0x209F701C, 0x7BC5E28F, - 0x1F19F97B, 0x7C29FBEE, - 0x1D934FE5, 0x7C894BDD, - 0x1C0B826A, 0x7CE3CEB1, - 0x1A82A025, 0x7D3980EC, - 0x18F8B83C, 0x7D8A5F3F, - 0x176DD9DE, 0x7DD6668E, - 0x15E21444, 0x7E1D93E9, - 0x145576B1, 0x7E5FE493, - 0x12C8106E, 0x7E9D55FC, - 0x1139F0CE, 0x7ED5E5C6, - 0x0FAB272B, 0x7F0991C3, - 0x0E1BC2E3, 0x7F3857F5, - 0x0C8BD35E, 0x7F62368F, - 0x0AFB6805, 0x7F872BF3, - 0x096A9049, 0x7FA736B4, - 0x07D95B9E, 0x7FC25596, - 0x0647D97C, 0x7FD8878D, - 0x04B6195D, 0x7FE9CBC0, - 0x03242ABF, 0x7FF62182, - 0x01921D1F, 0x7FFD885A, - 0x00000000, 0x7FFFFFFF, - 0xFE6DE2E0, 0x7FFD885A, - 0xFCDBD541, 0x7FF62182, - 0xFB49E6A2, 0x7FE9CBC0, - 0xF9B82683, 0x7FD8878D, - 0xF826A461, 0x7FC25596, - 0xF6956FB6, 0x7FA736B4, - 0xF50497FA, 0x7F872BF3, - 0xF3742CA1, 0x7F62368F, - 0xF1E43D1C, 0x7F3857F5, - 0xF054D8D4, 0x7F0991C3, - 0xEEC60F31, 0x7ED5E5C6, - 0xED37EF91, 0x7E9D55FC, - 0xEBAA894E, 0x7E5FE493, - 0xEA1DEBBB, 0x7E1D93E9, - 0xE8922621, 0x7DD6668E, - 0xE70747C3, 0x7D8A5F3F, - 0xE57D5FDA, 0x7D3980EC, - 0xE3F47D95, 0x7CE3CEB1, - 0xE26CB01A, 0x7C894BDD, - 0xE0E60684, 0x7C29FBEE, - 0xDF608FE3, 0x7BC5E28F, - 0xDDDC5B3A, 0x7B5D039D, - 0xDC597781, 0x7AEF6323, - 0xDAD7F3A2, 0x7A7D055B, - 0xD957DE7A, 0x7A05EEAD, - 0xD7D946D7, 0x798A23B1, - 0xD65C3B7B, 0x7909A92C, - 0xD4E0CB14, 0x78848413, - 0xD3670445, 0x77FAB988, - 0xD1EEF59E, 0x776C4EDB, - 0xD078AD9D, 0x76D94988, - 0xCF043AB2, 0x7641AF3C, - 0xCD91AB38, 0x75A585CF, - 0xCC210D78, 0x7504D345, - 0xCAB26FA9, 0x745F9DD1, - 0xC945DFEC, 0x73B5EBD0, - 0xC7DB6C50, 0x7307C3D0, - 0xC67322CD, 0x72552C84, - 0xC50D1148, 0x719E2CD2, - 0xC3A9458F, 0x70E2CBC6, - 0xC247CD5A, 0x70231099, - 0xC0E8B648, 0x6F5F02B1, - 0xBF8C0DE2, 0x6E96A99C, - 0xBE31E19B, 0x6DCA0D14, - 0xBCDA3ECA, 0x6CF934FB, - 0xBB8532AF, 0x6C242960, - 0xBA32CA70, 0x6B4AF278, - 0xB8E31319, 0x6A6D98A4, - 0xB796199B, 0x698C246C, - 0xB64BEACC, 0x68A69E81, - 0xB5049368, 0x67BD0FBC, - 0xB3C0200C, 0x66CF811F, - 0xB27E9D3B, 0x65DDFBD3, - 0xB140175B, 0x64E88926, - 0xB0049AB2, 0x63EF328F, - 0xAECC336B, 0x62F201AC, - 0xAD96ED91, 0x61F1003E, - 0xAC64D510, 0x60EC3830, - 0xAB35F5B5, 0x5FE3B38D, - 0xAA0A5B2D, 0x5ED77C89, - 0xA8E21106, 0x5DC79D7C, - 0xA7BD22AB, 0x5CB420DF, - 0xA69B9B68, 0x5B9D1153, - 0xA57D8666, 0x5A82799A, - 0xA462EEAC, 0x59646497, - 0xA34BDF20, 0x5842DD54, - 0xA2386283, 0x571DEEF9, - 0xA1288376, 0x55F5A4D2, - 0xA01C4C72, 0x54CA0A4A, - 0x9F13C7D0, 0x539B2AEF, - 0x9E0EFFC1, 0x5269126E, - 0x9D0DFE53, 0x5133CC94, - 0x9C10CD70, 0x4FFB654D, - 0x9B1776D9, 0x4EBFE8A4, - 0x9A22042C, 0x4D8162C4, - 0x99307EE0, 0x4C3FDFF3, - 0x9842F043, 0x4AFB6C97, - 0x9759617E, 0x49B41533, - 0x9673DB94, 0x4869E664, - 0x9592675B, 0x471CECE6, - 0x94B50D87, 0x45CD358F, - 0x93DBD69F, 0x447ACD50, - 0x9306CB04, 0x4325C135, - 0x9235F2EB, 0x41CE1E64, - 0x91695663, 0x4073F21D, - 0x90A0FD4E, 0x3F1749B7, - 0x8FDCEF66, 0x3DB832A5, - 0x8F1D343A, 0x3C56BA70, - 0x8E61D32D, 0x3AF2EEB7, - 0x8DAAD37B, 0x398CDD32, - 0x8CF83C30, 0x382493B0, - 0x8C4A142F, 0x36BA2013, - 0x8BA0622F, 0x354D9056, - 0x8AFB2CBA, 0x33DEF287, - 0x8A5A7A30, 0x326E54C7, - 0x89BE50C3, 0x30FBC54D, - 0x8926B677, 0x2F875262, - 0x8893B124, 0x2E110A62, - 0x88054677, 0x2C98FBBA, - 0x877B7BEC, 0x2B1F34EB, - 0x86F656D3, 0x29A3C484, - 0x8675DC4E, 0x2826B928, - 0x85FA1152, 0x26A82185, - 0x8582FAA4, 0x25280C5D, - 0x85109CDC, 0x23A6887E, - 0x84A2FC62, 0x2223A4C5, - 0x843A1D70, 0x209F701C, - 0x83D60411, 0x1F19F97B, - 0x8376B422, 0x1D934FE5, - 0x831C314E, 0x1C0B826A, - 0x82C67F13, 0x1A82A025, - 0x8275A0C0, 0x18F8B83C, - 0x82299971, 0x176DD9DE, - 0x81E26C16, 0x15E21444, - 0x81A01B6C, 0x145576B1, - 0x8162AA03, 0x12C8106E, - 0x812A1A39, 0x1139F0CE, - 0x80F66E3C, 0x0FAB272B, - 0x80C7A80A, 0x0E1BC2E3, - 0x809DC970, 0x0C8BD35E, - 0x8078D40D, 0x0AFB6805, - 0x8058C94C, 0x096A9049, - 0x803DAA69, 0x07D95B9E, - 0x80277872, 0x0647D97C, - 0x80163440, 0x04B6195D, - 0x8009DE7D, 0x03242ABF, - 0x800277A5, 0x01921D1F, - 0x80000000, 0x00000000, - 0x800277A5, 0xFE6DE2E0, - 0x8009DE7D, 0xFCDBD541, - 0x80163440, 0xFB49E6A2, - 0x80277872, 0xF9B82683, - 0x803DAA69, 0xF826A461, - 0x8058C94C, 0xF6956FB6, - 0x8078D40D, 0xF50497FA, - 0x809DC970, 0xF3742CA1, - 0x80C7A80A, 0xF1E43D1C, - 0x80F66E3C, 0xF054D8D4, - 0x812A1A39, 0xEEC60F31, - 0x8162AA03, 0xED37EF91, - 0x81A01B6C, 0xEBAA894E, - 0x81E26C16, 0xEA1DEBBB, - 0x82299971, 0xE8922621, - 0x8275A0C0, 0xE70747C3, - 0x82C67F13, 0xE57D5FDA, - 0x831C314E, 0xE3F47D95, - 0x8376B422, 0xE26CB01A, - 0x83D60411, 0xE0E60684, - 0x843A1D70, 0xDF608FE3, - 0x84A2FC62, 0xDDDC5B3A, - 0x85109CDC, 0xDC597781, - 0x8582FAA4, 0xDAD7F3A2, - 0x85FA1152, 0xD957DE7A, - 0x8675DC4E, 0xD7D946D7, - 0x86F656D3, 0xD65C3B7B, - 0x877B7BEC, 0xD4E0CB14, - 0x88054677, 0xD3670445, - 0x8893B124, 0xD1EEF59E, - 0x8926B677, 0xD078AD9D, - 0x89BE50C3, 0xCF043AB2, - 0x8A5A7A30, 0xCD91AB38, - 0x8AFB2CBA, 0xCC210D78, - 0x8BA0622F, 0xCAB26FA9, - 0x8C4A142F, 0xC945DFEC, - 0x8CF83C30, 0xC7DB6C50, - 0x8DAAD37B, 0xC67322CD, - 0x8E61D32D, 0xC50D1148, - 0x8F1D343A, 0xC3A9458F, - 0x8FDCEF66, 0xC247CD5A, - 0x90A0FD4E, 0xC0E8B648, - 0x91695663, 0xBF8C0DE2, - 0x9235F2EB, 0xBE31E19B, - 0x9306CB04, 0xBCDA3ECA, - 0x93DBD69F, 0xBB8532AF, - 0x94B50D87, 0xBA32CA70, - 0x9592675B, 0xB8E31319, - 0x9673DB94, 0xB796199B, - 0x9759617E, 0xB64BEACC, - 0x9842F043, 0xB5049368, - 0x99307EE0, 0xB3C0200C, - 0x9A22042C, 0xB27E9D3B, - 0x9B1776D9, 0xB140175B, - 0x9C10CD70, 0xB0049AB2, - 0x9D0DFE53, 0xAECC336B, - 0x9E0EFFC1, 0xAD96ED91, - 0x9F13C7D0, 0xAC64D510, - 0xA01C4C72, 0xAB35F5B5, - 0xA1288376, 0xAA0A5B2D, - 0xA2386283, 0xA8E21106, - 0xA34BDF20, 0xA7BD22AB, - 0xA462EEAC, 0xA69B9B68, - 0xA57D8666, 0xA57D8666, - 0xA69B9B68, 0xA462EEAC, - 0xA7BD22AB, 0xA34BDF20, - 0xA8E21106, 0xA2386283, - 0xAA0A5B2D, 0xA1288376, - 0xAB35F5B5, 0xA01C4C72, - 0xAC64D510, 0x9F13C7D0, - 0xAD96ED91, 0x9E0EFFC1, - 0xAECC336B, 0x9D0DFE53, - 0xB0049AB2, 0x9C10CD70, - 0xB140175B, 0x9B1776D9, - 0xB27E9D3B, 0x9A22042C, - 0xB3C0200C, 0x99307EE0, - 0xB5049368, 0x9842F043, - 0xB64BEACC, 0x9759617E, - 0xB796199B, 0x9673DB94, - 0xB8E31319, 0x9592675B, - 0xBA32CA70, 0x94B50D87, - 0xBB8532AF, 0x93DBD69F, - 0xBCDA3ECA, 0x9306CB04, - 0xBE31E19B, 0x9235F2EB, - 0xBF8C0DE2, 0x91695663, - 0xC0E8B648, 0x90A0FD4E, - 0xC247CD5A, 0x8FDCEF66, - 0xC3A9458F, 0x8F1D343A, - 0xC50D1148, 0x8E61D32D, - 0xC67322CD, 0x8DAAD37B, - 0xC7DB6C50, 0x8CF83C30, - 0xC945DFEC, 0x8C4A142F, - 0xCAB26FA9, 0x8BA0622F, - 0xCC210D78, 0x8AFB2CBA, - 0xCD91AB38, 0x8A5A7A30, - 0xCF043AB2, 0x89BE50C3, - 0xD078AD9D, 0x8926B677, - 0xD1EEF59E, 0x8893B124, - 0xD3670445, 0x88054677, - 0xD4E0CB14, 0x877B7BEC, - 0xD65C3B7B, 0x86F656D3, - 0xD7D946D7, 0x8675DC4E, - 0xD957DE7A, 0x85FA1152, - 0xDAD7F3A2, 0x8582FAA4, - 0xDC597781, 0x85109CDC, - 0xDDDC5B3A, 0x84A2FC62, - 0xDF608FE3, 0x843A1D70, - 0xE0E60684, 0x83D60411, - 0xE26CB01A, 0x8376B422, - 0xE3F47D95, 0x831C314E, - 0xE57D5FDA, 0x82C67F13, - 0xE70747C3, 0x8275A0C0, - 0xE8922621, 0x82299971, - 0xEA1DEBBB, 0x81E26C16, - 0xEBAA894E, 0x81A01B6C, - 0xED37EF91, 0x8162AA03, - 0xEEC60F31, 0x812A1A39, - 0xF054D8D4, 0x80F66E3C, - 0xF1E43D1C, 0x80C7A80A, - 0xF3742CA1, 0x809DC970, - 0xF50497FA, 0x8078D40D, - 0xF6956FB6, 0x8058C94C, - 0xF826A461, 0x803DAA69, - 0xF9B82683, 0x80277872, - 0xFB49E6A2, 0x80163440, - 0xFCDBD541, 0x8009DE7D, - 0xFE6DE2E0, 0x800277A5 -}; - -/** -* \par -* Example code for Q31 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 1024 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to Q31(Fixed point 1.31): -* round(twiddleCoefQ31(i) * pow(2, 31)) -* -*/ -const q31_t twiddleCoef_1024_q31[1536] = { - 0x7FFFFFFF, 0x00000000, - 0x7FFF6216, 0x00C90F88, - 0x7FFD885A, 0x01921D1F, - 0x7FFA72D1, 0x025B26D7, - 0x7FF62182, 0x03242ABF, - 0x7FF09477, 0x03ED26E6, - 0x7FE9CBC0, 0x04B6195D, - 0x7FE1C76B, 0x057F0034, - 0x7FD8878D, 0x0647D97C, - 0x7FCE0C3E, 0x0710A344, - 0x7FC25596, 0x07D95B9E, - 0x7FB563B2, 0x08A2009A, - 0x7FA736B4, 0x096A9049, - 0x7F97CEBC, 0x0A3308BC, - 0x7F872BF3, 0x0AFB6805, - 0x7F754E7F, 0x0BC3AC35, - 0x7F62368F, 0x0C8BD35E, - 0x7F4DE450, 0x0D53DB92, - 0x7F3857F5, 0x0E1BC2E3, - 0x7F2191B4, 0x0EE38765, - 0x7F0991C3, 0x0FAB272B, - 0x7EF0585F, 0x1072A047, - 0x7ED5E5C6, 0x1139F0CE, - 0x7EBA3A39, 0x120116D4, - 0x7E9D55FC, 0x12C8106E, - 0x7E7F3956, 0x138EDBB0, - 0x7E5FE493, 0x145576B1, - 0x7E3F57FE, 0x151BDF85, - 0x7E1D93E9, 0x15E21444, - 0x7DFA98A7, 0x16A81305, - 0x7DD6668E, 0x176DD9DE, - 0x7DB0FDF7, 0x183366E8, - 0x7D8A5F3F, 0x18F8B83C, - 0x7D628AC5, 0x19BDCBF2, - 0x7D3980EC, 0x1A82A025, - 0x7D0F4218, 0x1B4732EF, - 0x7CE3CEB1, 0x1C0B826A, - 0x7CB72724, 0x1CCF8CB3, - 0x7C894BDD, 0x1D934FE5, - 0x7C5A3D4F, 0x1E56CA1E, - 0x7C29FBEE, 0x1F19F97B, - 0x7BF88830, 0x1FDCDC1A, - 0x7BC5E28F, 0x209F701C, - 0x7B920B89, 0x2161B39F, - 0x7B5D039D, 0x2223A4C5, - 0x7B26CB4F, 0x22E541AE, - 0x7AEF6323, 0x23A6887E, - 0x7AB6CBA3, 0x24677757, - 0x7A7D055B, 0x25280C5D, - 0x7A4210D8, 0x25E845B5, - 0x7A05EEAD, 0x26A82185, - 0x79C89F6D, 0x27679DF4, - 0x798A23B1, 0x2826B928, - 0x794A7C11, 0x28E5714A, - 0x7909A92C, 0x29A3C484, - 0x78C7ABA1, 0x2A61B101, - 0x78848413, 0x2B1F34EB, - 0x78403328, 0x2BDC4E6F, - 0x77FAB988, 0x2C98FBBA, - 0x77B417DF, 0x2D553AFB, - 0x776C4EDB, 0x2E110A62, - 0x77235F2D, 0x2ECC681E, - 0x76D94988, 0x2F875262, - 0x768E0EA5, 0x3041C760, - 0x7641AF3C, 0x30FBC54D, - 0x75F42C0A, 0x31B54A5D, - 0x75A585CF, 0x326E54C7, - 0x7555BD4B, 0x3326E2C2, - 0x7504D345, 0x33DEF287, - 0x74B2C883, 0x3496824F, - 0x745F9DD1, 0x354D9056, - 0x740B53FA, 0x36041AD9, - 0x73B5EBD0, 0x36BA2013, - 0x735F6626, 0x376F9E46, - 0x7307C3D0, 0x382493B0, - 0x72AF05A6, 0x38D8FE93, - 0x72552C84, 0x398CDD32, - 0x71FA3948, 0x3A402DD1, - 0x719E2CD2, 0x3AF2EEB7, - 0x71410804, 0x3BA51E29, - 0x70E2CBC6, 0x3C56BA70, - 0x708378FE, 0x3D07C1D5, - 0x70231099, 0x3DB832A5, - 0x6FC19385, 0x3E680B2C, - 0x6F5F02B1, 0x3F1749B7, - 0x6EFB5F12, 0x3FC5EC97, - 0x6E96A99C, 0x4073F21D, - 0x6E30E349, 0x4121589A, - 0x6DCA0D14, 0x41CE1E64, - 0x6D6227FA, 0x427A41D0, - 0x6CF934FB, 0x4325C135, - 0x6C8F351C, 0x43D09AEC, - 0x6C242960, 0x447ACD50, - 0x6BB812D0, 0x452456BC, - 0x6B4AF278, 0x45CD358F, - 0x6ADCC964, 0x46756827, - 0x6A6D98A4, 0x471CECE6, - 0x69FD614A, 0x47C3C22E, - 0x698C246C, 0x4869E664, - 0x6919E320, 0x490F57EE, - 0x68A69E81, 0x49B41533, - 0x683257AA, 0x4A581C9D, - 0x67BD0FBC, 0x4AFB6C97, - 0x6746C7D7, 0x4B9E038F, - 0x66CF811F, 0x4C3FDFF3, - 0x66573CBB, 0x4CE10034, - 0x65DDFBD3, 0x4D8162C4, - 0x6563BF92, 0x4E210617, - 0x64E88926, 0x4EBFE8A4, - 0x646C59BF, 0x4F5E08E3, - 0x63EF328F, 0x4FFB654D, - 0x637114CC, 0x5097FC5E, - 0x62F201AC, 0x5133CC94, - 0x6271FA69, 0x51CED46E, - 0x61F1003E, 0x5269126E, - 0x616F146B, 0x53028517, - 0x60EC3830, 0x539B2AEF, - 0x60686CCE, 0x5433027D, - 0x5FE3B38D, 0x54CA0A4A, - 0x5F5E0DB3, 0x556040E2, - 0x5ED77C89, 0x55F5A4D2, - 0x5E50015D, 0x568A34A9, - 0x5DC79D7C, 0x571DEEF9, - 0x5D3E5236, 0x57B0D256, - 0x5CB420DF, 0x5842DD54, - 0x5C290ACC, 0x58D40E8C, - 0x5B9D1153, 0x59646497, - 0x5B1035CF, 0x59F3DE12, - 0x5A82799A, 0x5A82799A, - 0x59F3DE12, 0x5B1035CF, - 0x59646497, 0x5B9D1153, - 0x58D40E8C, 0x5C290ACC, - 0x5842DD54, 0x5CB420DF, - 0x57B0D256, 0x5D3E5236, - 0x571DEEF9, 0x5DC79D7C, - 0x568A34A9, 0x5E50015D, - 0x55F5A4D2, 0x5ED77C89, - 0x556040E2, 0x5F5E0DB3, - 0x54CA0A4A, 0x5FE3B38D, - 0x5433027D, 0x60686CCE, - 0x539B2AEF, 0x60EC3830, - 0x53028517, 0x616F146B, - 0x5269126E, 0x61F1003E, - 0x51CED46E, 0x6271FA69, - 0x5133CC94, 0x62F201AC, - 0x5097FC5E, 0x637114CC, - 0x4FFB654D, 0x63EF328F, - 0x4F5E08E3, 0x646C59BF, - 0x4EBFE8A4, 0x64E88926, - 0x4E210617, 0x6563BF92, - 0x4D8162C4, 0x65DDFBD3, - 0x4CE10034, 0x66573CBB, - 0x4C3FDFF3, 0x66CF811F, - 0x4B9E038F, 0x6746C7D7, - 0x4AFB6C97, 0x67BD0FBC, - 0x4A581C9D, 0x683257AA, - 0x49B41533, 0x68A69E81, - 0x490F57EE, 0x6919E320, - 0x4869E664, 0x698C246C, - 0x47C3C22E, 0x69FD614A, - 0x471CECE6, 0x6A6D98A4, - 0x46756827, 0x6ADCC964, - 0x45CD358F, 0x6B4AF278, - 0x452456BC, 0x6BB812D0, - 0x447ACD50, 0x6C242960, - 0x43D09AEC, 0x6C8F351C, - 0x4325C135, 0x6CF934FB, - 0x427A41D0, 0x6D6227FA, - 0x41CE1E64, 0x6DCA0D14, - 0x4121589A, 0x6E30E349, - 0x4073F21D, 0x6E96A99C, - 0x3FC5EC97, 0x6EFB5F12, - 0x3F1749B7, 0x6F5F02B1, - 0x3E680B2C, 0x6FC19385, - 0x3DB832A5, 0x70231099, - 0x3D07C1D5, 0x708378FE, - 0x3C56BA70, 0x70E2CBC6, - 0x3BA51E29, 0x71410804, - 0x3AF2EEB7, 0x719E2CD2, - 0x3A402DD1, 0x71FA3948, - 0x398CDD32, 0x72552C84, - 0x38D8FE93, 0x72AF05A6, - 0x382493B0, 0x7307C3D0, - 0x376F9E46, 0x735F6626, - 0x36BA2013, 0x73B5EBD0, - 0x36041AD9, 0x740B53FA, - 0x354D9056, 0x745F9DD1, - 0x3496824F, 0x74B2C883, - 0x33DEF287, 0x7504D345, - 0x3326E2C2, 0x7555BD4B, - 0x326E54C7, 0x75A585CF, - 0x31B54A5D, 0x75F42C0A, - 0x30FBC54D, 0x7641AF3C, - 0x3041C760, 0x768E0EA5, - 0x2F875262, 0x76D94988, - 0x2ECC681E, 0x77235F2D, - 0x2E110A62, 0x776C4EDB, - 0x2D553AFB, 0x77B417DF, - 0x2C98FBBA, 0x77FAB988, - 0x2BDC4E6F, 0x78403328, - 0x2B1F34EB, 0x78848413, - 0x2A61B101, 0x78C7ABA1, - 0x29A3C484, 0x7909A92C, - 0x28E5714A, 0x794A7C11, - 0x2826B928, 0x798A23B1, - 0x27679DF4, 0x79C89F6D, - 0x26A82185, 0x7A05EEAD, - 0x25E845B5, 0x7A4210D8, - 0x25280C5D, 0x7A7D055B, - 0x24677757, 0x7AB6CBA3, - 0x23A6887E, 0x7AEF6323, - 0x22E541AE, 0x7B26CB4F, - 0x2223A4C5, 0x7B5D039D, - 0x2161B39F, 0x7B920B89, - 0x209F701C, 0x7BC5E28F, - 0x1FDCDC1A, 0x7BF88830, - 0x1F19F97B, 0x7C29FBEE, - 0x1E56CA1E, 0x7C5A3D4F, - 0x1D934FE5, 0x7C894BDD, - 0x1CCF8CB3, 0x7CB72724, - 0x1C0B826A, 0x7CE3CEB1, - 0x1B4732EF, 0x7D0F4218, - 0x1A82A025, 0x7D3980EC, - 0x19BDCBF2, 0x7D628AC5, - 0x18F8B83C, 0x7D8A5F3F, - 0x183366E8, 0x7DB0FDF7, - 0x176DD9DE, 0x7DD6668E, - 0x16A81305, 0x7DFA98A7, - 0x15E21444, 0x7E1D93E9, - 0x151BDF85, 0x7E3F57FE, - 0x145576B1, 0x7E5FE493, - 0x138EDBB0, 0x7E7F3956, - 0x12C8106E, 0x7E9D55FC, - 0x120116D4, 0x7EBA3A39, - 0x1139F0CE, 0x7ED5E5C6, - 0x1072A047, 0x7EF0585F, - 0x0FAB272B, 0x7F0991C3, - 0x0EE38765, 0x7F2191B4, - 0x0E1BC2E3, 0x7F3857F5, - 0x0D53DB92, 0x7F4DE450, - 0x0C8BD35E, 0x7F62368F, - 0x0BC3AC35, 0x7F754E7F, - 0x0AFB6805, 0x7F872BF3, - 0x0A3308BC, 0x7F97CEBC, - 0x096A9049, 0x7FA736B4, - 0x08A2009A, 0x7FB563B2, - 0x07D95B9E, 0x7FC25596, - 0x0710A344, 0x7FCE0C3E, - 0x0647D97C, 0x7FD8878D, - 0x057F0034, 0x7FE1C76B, - 0x04B6195D, 0x7FE9CBC0, - 0x03ED26E6, 0x7FF09477, - 0x03242ABF, 0x7FF62182, - 0x025B26D7, 0x7FFA72D1, - 0x01921D1F, 0x7FFD885A, - 0x00C90F88, 0x7FFF6216, - 0x00000000, 0x7FFFFFFF, - 0xFF36F078, 0x7FFF6216, - 0xFE6DE2E0, 0x7FFD885A, - 0xFDA4D928, 0x7FFA72D1, - 0xFCDBD541, 0x7FF62182, - 0xFC12D919, 0x7FF09477, - 0xFB49E6A2, 0x7FE9CBC0, - 0xFA80FFCB, 0x7FE1C76B, - 0xF9B82683, 0x7FD8878D, - 0xF8EF5CBB, 0x7FCE0C3E, - 0xF826A461, 0x7FC25596, - 0xF75DFF65, 0x7FB563B2, - 0xF6956FB6, 0x7FA736B4, - 0xF5CCF743, 0x7F97CEBC, - 0xF50497FA, 0x7F872BF3, - 0xF43C53CA, 0x7F754E7F, - 0xF3742CA1, 0x7F62368F, - 0xF2AC246D, 0x7F4DE450, - 0xF1E43D1C, 0x7F3857F5, - 0xF11C789A, 0x7F2191B4, - 0xF054D8D4, 0x7F0991C3, - 0xEF8D5FB8, 0x7EF0585F, - 0xEEC60F31, 0x7ED5E5C6, - 0xEDFEE92B, 0x7EBA3A39, - 0xED37EF91, 0x7E9D55FC, - 0xEC71244F, 0x7E7F3956, - 0xEBAA894E, 0x7E5FE493, - 0xEAE4207A, 0x7E3F57FE, - 0xEA1DEBBB, 0x7E1D93E9, - 0xE957ECFB, 0x7DFA98A7, - 0xE8922621, 0x7DD6668E, - 0xE7CC9917, 0x7DB0FDF7, - 0xE70747C3, 0x7D8A5F3F, - 0xE642340D, 0x7D628AC5, - 0xE57D5FDA, 0x7D3980EC, - 0xE4B8CD10, 0x7D0F4218, - 0xE3F47D95, 0x7CE3CEB1, - 0xE330734C, 0x7CB72724, - 0xE26CB01A, 0x7C894BDD, - 0xE1A935E1, 0x7C5A3D4F, - 0xE0E60684, 0x7C29FBEE, - 0xE02323E5, 0x7BF88830, - 0xDF608FE3, 0x7BC5E28F, - 0xDE9E4C60, 0x7B920B89, - 0xDDDC5B3A, 0x7B5D039D, - 0xDD1ABE51, 0x7B26CB4F, - 0xDC597781, 0x7AEF6323, - 0xDB9888A8, 0x7AB6CBA3, - 0xDAD7F3A2, 0x7A7D055B, - 0xDA17BA4A, 0x7A4210D8, - 0xD957DE7A, 0x7A05EEAD, - 0xD898620C, 0x79C89F6D, - 0xD7D946D7, 0x798A23B1, - 0xD71A8EB5, 0x794A7C11, - 0xD65C3B7B, 0x7909A92C, - 0xD59E4EFE, 0x78C7ABA1, - 0xD4E0CB14, 0x78848413, - 0xD423B190, 0x78403328, - 0xD3670445, 0x77FAB988, - 0xD2AAC504, 0x77B417DF, - 0xD1EEF59E, 0x776C4EDB, - 0xD13397E1, 0x77235F2D, - 0xD078AD9D, 0x76D94988, - 0xCFBE389F, 0x768E0EA5, - 0xCF043AB2, 0x7641AF3C, - 0xCE4AB5A2, 0x75F42C0A, - 0xCD91AB38, 0x75A585CF, - 0xCCD91D3D, 0x7555BD4B, - 0xCC210D78, 0x7504D345, - 0xCB697DB0, 0x74B2C883, - 0xCAB26FA9, 0x745F9DD1, - 0xC9FBE527, 0x740B53FA, - 0xC945DFEC, 0x73B5EBD0, - 0xC89061BA, 0x735F6626, - 0xC7DB6C50, 0x7307C3D0, - 0xC727016C, 0x72AF05A6, - 0xC67322CD, 0x72552C84, - 0xC5BFD22E, 0x71FA3948, - 0xC50D1148, 0x719E2CD2, - 0xC45AE1D7, 0x71410804, - 0xC3A9458F, 0x70E2CBC6, - 0xC2F83E2A, 0x708378FE, - 0xC247CD5A, 0x70231099, - 0xC197F4D3, 0x6FC19385, - 0xC0E8B648, 0x6F5F02B1, - 0xC03A1368, 0x6EFB5F12, - 0xBF8C0DE2, 0x6E96A99C, - 0xBEDEA765, 0x6E30E349, - 0xBE31E19B, 0x6DCA0D14, - 0xBD85BE2F, 0x6D6227FA, - 0xBCDA3ECA, 0x6CF934FB, - 0xBC2F6513, 0x6C8F351C, - 0xBB8532AF, 0x6C242960, - 0xBADBA943, 0x6BB812D0, - 0xBA32CA70, 0x6B4AF278, - 0xB98A97D8, 0x6ADCC964, - 0xB8E31319, 0x6A6D98A4, - 0xB83C3DD1, 0x69FD614A, - 0xB796199B, 0x698C246C, - 0xB6F0A811, 0x6919E320, - 0xB64BEACC, 0x68A69E81, - 0xB5A7E362, 0x683257AA, - 0xB5049368, 0x67BD0FBC, - 0xB461FC70, 0x6746C7D7, - 0xB3C0200C, 0x66CF811F, - 0xB31EFFCB, 0x66573CBB, - 0xB27E9D3B, 0x65DDFBD3, - 0xB1DEF9E8, 0x6563BF92, - 0xB140175B, 0x64E88926, - 0xB0A1F71C, 0x646C59BF, - 0xB0049AB2, 0x63EF328F, - 0xAF6803A1, 0x637114CC, - 0xAECC336B, 0x62F201AC, - 0xAE312B91, 0x6271FA69, - 0xAD96ED91, 0x61F1003E, - 0xACFD7AE8, 0x616F146B, - 0xAC64D510, 0x60EC3830, - 0xABCCFD82, 0x60686CCE, - 0xAB35F5B5, 0x5FE3B38D, - 0xAA9FBF1D, 0x5F5E0DB3, - 0xAA0A5B2D, 0x5ED77C89, - 0xA975CB56, 0x5E50015D, - 0xA8E21106, 0x5DC79D7C, - 0xA84F2DA9, 0x5D3E5236, - 0xA7BD22AB, 0x5CB420DF, - 0xA72BF173, 0x5C290ACC, - 0xA69B9B68, 0x5B9D1153, - 0xA60C21ED, 0x5B1035CF, - 0xA57D8666, 0x5A82799A, - 0xA4EFCA31, 0x59F3DE12, - 0xA462EEAC, 0x59646497, - 0xA3D6F533, 0x58D40E8C, - 0xA34BDF20, 0x5842DD54, - 0xA2C1ADC9, 0x57B0D256, - 0xA2386283, 0x571DEEF9, - 0xA1AFFEA2, 0x568A34A9, - 0xA1288376, 0x55F5A4D2, - 0xA0A1F24C, 0x556040E2, - 0xA01C4C72, 0x54CA0A4A, - 0x9F979331, 0x5433027D, - 0x9F13C7D0, 0x539B2AEF, - 0x9E90EB94, 0x53028517, - 0x9E0EFFC1, 0x5269126E, - 0x9D8E0596, 0x51CED46E, - 0x9D0DFE53, 0x5133CC94, - 0x9C8EEB33, 0x5097FC5E, - 0x9C10CD70, 0x4FFB654D, - 0x9B93A640, 0x4F5E08E3, - 0x9B1776D9, 0x4EBFE8A4, - 0x9A9C406D, 0x4E210617, - 0x9A22042C, 0x4D8162C4, - 0x99A8C344, 0x4CE10034, - 0x99307EE0, 0x4C3FDFF3, - 0x98B93828, 0x4B9E038F, - 0x9842F043, 0x4AFB6C97, - 0x97CDA855, 0x4A581C9D, - 0x9759617E, 0x49B41533, - 0x96E61CDF, 0x490F57EE, - 0x9673DB94, 0x4869E664, - 0x96029EB5, 0x47C3C22E, - 0x9592675B, 0x471CECE6, - 0x9523369B, 0x46756827, - 0x94B50D87, 0x45CD358F, - 0x9447ED2F, 0x452456BC, - 0x93DBD69F, 0x447ACD50, - 0x9370CAE4, 0x43D09AEC, - 0x9306CB04, 0x4325C135, - 0x929DD805, 0x427A41D0, - 0x9235F2EB, 0x41CE1E64, - 0x91CF1CB6, 0x4121589A, - 0x91695663, 0x4073F21D, - 0x9104A0ED, 0x3FC5EC97, - 0x90A0FD4E, 0x3F1749B7, - 0x903E6C7A, 0x3E680B2C, - 0x8FDCEF66, 0x3DB832A5, - 0x8F7C8701, 0x3D07C1D5, - 0x8F1D343A, 0x3C56BA70, - 0x8EBEF7FB, 0x3BA51E29, - 0x8E61D32D, 0x3AF2EEB7, - 0x8E05C6B7, 0x3A402DD1, - 0x8DAAD37B, 0x398CDD32, - 0x8D50FA59, 0x38D8FE93, - 0x8CF83C30, 0x382493B0, - 0x8CA099D9, 0x376F9E46, - 0x8C4A142F, 0x36BA2013, - 0x8BF4AC05, 0x36041AD9, - 0x8BA0622F, 0x354D9056, - 0x8B4D377C, 0x3496824F, - 0x8AFB2CBA, 0x33DEF287, - 0x8AAA42B4, 0x3326E2C2, - 0x8A5A7A30, 0x326E54C7, - 0x8A0BD3F5, 0x31B54A5D, - 0x89BE50C3, 0x30FBC54D, - 0x8971F15A, 0x3041C760, - 0x8926B677, 0x2F875262, - 0x88DCA0D3, 0x2ECC681E, - 0x8893B124, 0x2E110A62, - 0x884BE820, 0x2D553AFB, - 0x88054677, 0x2C98FBBA, - 0x87BFCCD7, 0x2BDC4E6F, - 0x877B7BEC, 0x2B1F34EB, - 0x8738545E, 0x2A61B101, - 0x86F656D3, 0x29A3C484, - 0x86B583EE, 0x28E5714A, - 0x8675DC4E, 0x2826B928, - 0x86376092, 0x27679DF4, - 0x85FA1152, 0x26A82185, - 0x85BDEF27, 0x25E845B5, - 0x8582FAA4, 0x25280C5D, - 0x8549345C, 0x24677757, - 0x85109CDC, 0x23A6887E, - 0x84D934B0, 0x22E541AE, - 0x84A2FC62, 0x2223A4C5, - 0x846DF476, 0x2161B39F, - 0x843A1D70, 0x209F701C, - 0x840777CF, 0x1FDCDC1A, - 0x83D60411, 0x1F19F97B, - 0x83A5C2B0, 0x1E56CA1E, - 0x8376B422, 0x1D934FE5, - 0x8348D8DB, 0x1CCF8CB3, - 0x831C314E, 0x1C0B826A, - 0x82F0BDE8, 0x1B4732EF, - 0x82C67F13, 0x1A82A025, - 0x829D753A, 0x19BDCBF2, - 0x8275A0C0, 0x18F8B83C, - 0x824F0208, 0x183366E8, - 0x82299971, 0x176DD9DE, - 0x82056758, 0x16A81305, - 0x81E26C16, 0x15E21444, - 0x81C0A801, 0x151BDF85, - 0x81A01B6C, 0x145576B1, - 0x8180C6A9, 0x138EDBB0, - 0x8162AA03, 0x12C8106E, - 0x8145C5C6, 0x120116D4, - 0x812A1A39, 0x1139F0CE, - 0x810FA7A0, 0x1072A047, - 0x80F66E3C, 0x0FAB272B, - 0x80DE6E4C, 0x0EE38765, - 0x80C7A80A, 0x0E1BC2E3, - 0x80B21BAF, 0x0D53DB92, - 0x809DC970, 0x0C8BD35E, - 0x808AB180, 0x0BC3AC35, - 0x8078D40D, 0x0AFB6805, - 0x80683143, 0x0A3308BC, - 0x8058C94C, 0x096A9049, - 0x804A9C4D, 0x08A2009A, - 0x803DAA69, 0x07D95B9E, - 0x8031F3C1, 0x0710A344, - 0x80277872, 0x0647D97C, - 0x801E3894, 0x057F0034, - 0x80163440, 0x04B6195D, - 0x800F6B88, 0x03ED26E6, - 0x8009DE7D, 0x03242ABF, - 0x80058D2E, 0x025B26D7, - 0x800277A5, 0x01921D1F, - 0x80009DE9, 0x00C90F88, - 0x80000000, 0x00000000, - 0x80009DE9, 0xFF36F078, - 0x800277A5, 0xFE6DE2E0, - 0x80058D2E, 0xFDA4D928, - 0x8009DE7D, 0xFCDBD541, - 0x800F6B88, 0xFC12D919, - 0x80163440, 0xFB49E6A2, - 0x801E3894, 0xFA80FFCB, - 0x80277872, 0xF9B82683, - 0x8031F3C1, 0xF8EF5CBB, - 0x803DAA69, 0xF826A461, - 0x804A9C4D, 0xF75DFF65, - 0x8058C94C, 0xF6956FB6, - 0x80683143, 0xF5CCF743, - 0x8078D40D, 0xF50497FA, - 0x808AB180, 0xF43C53CA, - 0x809DC970, 0xF3742CA1, - 0x80B21BAF, 0xF2AC246D, - 0x80C7A80A, 0xF1E43D1C, - 0x80DE6E4C, 0xF11C789A, - 0x80F66E3C, 0xF054D8D4, - 0x810FA7A0, 0xEF8D5FB8, - 0x812A1A39, 0xEEC60F31, - 0x8145C5C6, 0xEDFEE92B, - 0x8162AA03, 0xED37EF91, - 0x8180C6A9, 0xEC71244F, - 0x81A01B6C, 0xEBAA894E, - 0x81C0A801, 0xEAE4207A, - 0x81E26C16, 0xEA1DEBBB, - 0x82056758, 0xE957ECFB, - 0x82299971, 0xE8922621, - 0x824F0208, 0xE7CC9917, - 0x8275A0C0, 0xE70747C3, - 0x829D753A, 0xE642340D, - 0x82C67F13, 0xE57D5FDA, - 0x82F0BDE8, 0xE4B8CD10, - 0x831C314E, 0xE3F47D95, - 0x8348D8DB, 0xE330734C, - 0x8376B422, 0xE26CB01A, - 0x83A5C2B0, 0xE1A935E1, - 0x83D60411, 0xE0E60684, - 0x840777CF, 0xE02323E5, - 0x843A1D70, 0xDF608FE3, - 0x846DF476, 0xDE9E4C60, - 0x84A2FC62, 0xDDDC5B3A, - 0x84D934B0, 0xDD1ABE51, - 0x85109CDC, 0xDC597781, - 0x8549345C, 0xDB9888A8, - 0x8582FAA4, 0xDAD7F3A2, - 0x85BDEF27, 0xDA17BA4A, - 0x85FA1152, 0xD957DE7A, - 0x86376092, 0xD898620C, - 0x8675DC4E, 0xD7D946D7, - 0x86B583EE, 0xD71A8EB5, - 0x86F656D3, 0xD65C3B7B, - 0x8738545E, 0xD59E4EFE, - 0x877B7BEC, 0xD4E0CB14, - 0x87BFCCD7, 0xD423B190, - 0x88054677, 0xD3670445, - 0x884BE820, 0xD2AAC504, - 0x8893B124, 0xD1EEF59E, - 0x88DCA0D3, 0xD13397E1, - 0x8926B677, 0xD078AD9D, - 0x8971F15A, 0xCFBE389F, - 0x89BE50C3, 0xCF043AB2, - 0x8A0BD3F5, 0xCE4AB5A2, - 0x8A5A7A30, 0xCD91AB38, - 0x8AAA42B4, 0xCCD91D3D, - 0x8AFB2CBA, 0xCC210D78, - 0x8B4D377C, 0xCB697DB0, - 0x8BA0622F, 0xCAB26FA9, - 0x8BF4AC05, 0xC9FBE527, - 0x8C4A142F, 0xC945DFEC, - 0x8CA099D9, 0xC89061BA, - 0x8CF83C30, 0xC7DB6C50, - 0x8D50FA59, 0xC727016C, - 0x8DAAD37B, 0xC67322CD, - 0x8E05C6B7, 0xC5BFD22E, - 0x8E61D32D, 0xC50D1148, - 0x8EBEF7FB, 0xC45AE1D7, - 0x8F1D343A, 0xC3A9458F, - 0x8F7C8701, 0xC2F83E2A, - 0x8FDCEF66, 0xC247CD5A, - 0x903E6C7A, 0xC197F4D3, - 0x90A0FD4E, 0xC0E8B648, - 0x9104A0ED, 0xC03A1368, - 0x91695663, 0xBF8C0DE2, - 0x91CF1CB6, 0xBEDEA765, - 0x9235F2EB, 0xBE31E19B, - 0x929DD805, 0xBD85BE2F, - 0x9306CB04, 0xBCDA3ECA, - 0x9370CAE4, 0xBC2F6513, - 0x93DBD69F, 0xBB8532AF, - 0x9447ED2F, 0xBADBA943, - 0x94B50D87, 0xBA32CA70, - 0x9523369B, 0xB98A97D8, - 0x9592675B, 0xB8E31319, - 0x96029EB5, 0xB83C3DD1, - 0x9673DB94, 0xB796199B, - 0x96E61CDF, 0xB6F0A811, - 0x9759617E, 0xB64BEACC, - 0x97CDA855, 0xB5A7E362, - 0x9842F043, 0xB5049368, - 0x98B93828, 0xB461FC70, - 0x99307EE0, 0xB3C0200C, - 0x99A8C344, 0xB31EFFCB, - 0x9A22042C, 0xB27E9D3B, - 0x9A9C406D, 0xB1DEF9E8, - 0x9B1776D9, 0xB140175B, - 0x9B93A640, 0xB0A1F71C, - 0x9C10CD70, 0xB0049AB2, - 0x9C8EEB33, 0xAF6803A1, - 0x9D0DFE53, 0xAECC336B, - 0x9D8E0596, 0xAE312B91, - 0x9E0EFFC1, 0xAD96ED91, - 0x9E90EB94, 0xACFD7AE8, - 0x9F13C7D0, 0xAC64D510, - 0x9F979331, 0xABCCFD82, - 0xA01C4C72, 0xAB35F5B5, - 0xA0A1F24C, 0xAA9FBF1D, - 0xA1288376, 0xAA0A5B2D, - 0xA1AFFEA2, 0xA975CB56, - 0xA2386283, 0xA8E21106, - 0xA2C1ADC9, 0xA84F2DA9, - 0xA34BDF20, 0xA7BD22AB, - 0xA3D6F533, 0xA72BF173, - 0xA462EEAC, 0xA69B9B68, - 0xA4EFCA31, 0xA60C21ED, - 0xA57D8666, 0xA57D8666, - 0xA60C21ED, 0xA4EFCA31, - 0xA69B9B68, 0xA462EEAC, - 0xA72BF173, 0xA3D6F533, - 0xA7BD22AB, 0xA34BDF20, - 0xA84F2DA9, 0xA2C1ADC9, - 0xA8E21106, 0xA2386283, - 0xA975CB56, 0xA1AFFEA2, - 0xAA0A5B2D, 0xA1288376, - 0xAA9FBF1D, 0xA0A1F24C, - 0xAB35F5B5, 0xA01C4C72, - 0xABCCFD82, 0x9F979331, - 0xAC64D510, 0x9F13C7D0, - 0xACFD7AE8, 0x9E90EB94, - 0xAD96ED91, 0x9E0EFFC1, - 0xAE312B91, 0x9D8E0596, - 0xAECC336B, 0x9D0DFE53, - 0xAF6803A1, 0x9C8EEB33, - 0xB0049AB2, 0x9C10CD70, - 0xB0A1F71C, 0x9B93A640, - 0xB140175B, 0x9B1776D9, - 0xB1DEF9E8, 0x9A9C406D, - 0xB27E9D3B, 0x9A22042C, - 0xB31EFFCB, 0x99A8C344, - 0xB3C0200C, 0x99307EE0, - 0xB461FC70, 0x98B93828, - 0xB5049368, 0x9842F043, - 0xB5A7E362, 0x97CDA855, - 0xB64BEACC, 0x9759617E, - 0xB6F0A811, 0x96E61CDF, - 0xB796199B, 0x9673DB94, - 0xB83C3DD1, 0x96029EB5, - 0xB8E31319, 0x9592675B, - 0xB98A97D8, 0x9523369B, - 0xBA32CA70, 0x94B50D87, - 0xBADBA943, 0x9447ED2F, - 0xBB8532AF, 0x93DBD69F, - 0xBC2F6513, 0x9370CAE4, - 0xBCDA3ECA, 0x9306CB04, - 0xBD85BE2F, 0x929DD805, - 0xBE31E19B, 0x9235F2EB, - 0xBEDEA765, 0x91CF1CB6, - 0xBF8C0DE2, 0x91695663, - 0xC03A1368, 0x9104A0ED, - 0xC0E8B648, 0x90A0FD4E, - 0xC197F4D3, 0x903E6C7A, - 0xC247CD5A, 0x8FDCEF66, - 0xC2F83E2A, 0x8F7C8701, - 0xC3A9458F, 0x8F1D343A, - 0xC45AE1D7, 0x8EBEF7FB, - 0xC50D1148, 0x8E61D32D, - 0xC5BFD22E, 0x8E05C6B7, - 0xC67322CD, 0x8DAAD37B, - 0xC727016C, 0x8D50FA59, - 0xC7DB6C50, 0x8CF83C30, - 0xC89061BA, 0x8CA099D9, - 0xC945DFEC, 0x8C4A142F, - 0xC9FBE527, 0x8BF4AC05, - 0xCAB26FA9, 0x8BA0622F, - 0xCB697DB0, 0x8B4D377C, - 0xCC210D78, 0x8AFB2CBA, - 0xCCD91D3D, 0x8AAA42B4, - 0xCD91AB38, 0x8A5A7A30, - 0xCE4AB5A2, 0x8A0BD3F5, - 0xCF043AB2, 0x89BE50C3, - 0xCFBE389F, 0x8971F15A, - 0xD078AD9D, 0x8926B677, - 0xD13397E1, 0x88DCA0D3, - 0xD1EEF59E, 0x8893B124, - 0xD2AAC504, 0x884BE820, - 0xD3670445, 0x88054677, - 0xD423B190, 0x87BFCCD7, - 0xD4E0CB14, 0x877B7BEC, - 0xD59E4EFE, 0x8738545E, - 0xD65C3B7B, 0x86F656D3, - 0xD71A8EB5, 0x86B583EE, - 0xD7D946D7, 0x8675DC4E, - 0xD898620C, 0x86376092, - 0xD957DE7A, 0x85FA1152, - 0xDA17BA4A, 0x85BDEF27, - 0xDAD7F3A2, 0x8582FAA4, - 0xDB9888A8, 0x8549345C, - 0xDC597781, 0x85109CDC, - 0xDD1ABE51, 0x84D934B0, - 0xDDDC5B3A, 0x84A2FC62, - 0xDE9E4C60, 0x846DF476, - 0xDF608FE3, 0x843A1D70, - 0xE02323E5, 0x840777CF, - 0xE0E60684, 0x83D60411, - 0xE1A935E1, 0x83A5C2B0, - 0xE26CB01A, 0x8376B422, - 0xE330734C, 0x8348D8DB, - 0xE3F47D95, 0x831C314E, - 0xE4B8CD10, 0x82F0BDE8, - 0xE57D5FDA, 0x82C67F13, - 0xE642340D, 0x829D753A, - 0xE70747C3, 0x8275A0C0, - 0xE7CC9917, 0x824F0208, - 0xE8922621, 0x82299971, - 0xE957ECFB, 0x82056758, - 0xEA1DEBBB, 0x81E26C16, - 0xEAE4207A, 0x81C0A801, - 0xEBAA894E, 0x81A01B6C, - 0xEC71244F, 0x8180C6A9, - 0xED37EF91, 0x8162AA03, - 0xEDFEE92B, 0x8145C5C6, - 0xEEC60F31, 0x812A1A39, - 0xEF8D5FB8, 0x810FA7A0, - 0xF054D8D4, 0x80F66E3C, - 0xF11C789A, 0x80DE6E4C, - 0xF1E43D1C, 0x80C7A80A, - 0xF2AC246D, 0x80B21BAF, - 0xF3742CA1, 0x809DC970, - 0xF43C53CA, 0x808AB180, - 0xF50497FA, 0x8078D40D, - 0xF5CCF743, 0x80683143, - 0xF6956FB6, 0x8058C94C, - 0xF75DFF65, 0x804A9C4D, - 0xF826A461, 0x803DAA69, - 0xF8EF5CBB, 0x8031F3C1, - 0xF9B82683, 0x80277872, - 0xFA80FFCB, 0x801E3894, - 0xFB49E6A2, 0x80163440, - 0xFC12D919, 0x800F6B88, - 0xFCDBD541, 0x8009DE7D, - 0xFDA4D928, 0x80058D2E, - 0xFE6DE2E0, 0x800277A5, - 0xFF36F078, 0x80009DE9 -}; - -/** -* \par -* Example code for Q31 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 2048 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to Q31(Fixed point 1.31): -* round(twiddleCoefQ31(i) * pow(2, 31)) -* -*/ -const q31_t twiddleCoef_2048_q31[3072] = { - 0x7FFFFFFF, 0x00000000, - 0x7FFFD885, 0x006487E3, - 0x7FFF6216, 0x00C90F88, - 0x7FFE9CB2, 0x012D96B0, - 0x7FFD885A, 0x01921D1F, - 0x7FFC250F, 0x01F6A296, - 0x7FFA72D1, 0x025B26D7, - 0x7FF871A1, 0x02BFA9A4, - 0x7FF62182, 0x03242ABF, - 0x7FF38273, 0x0388A9E9, - 0x7FF09477, 0x03ED26E6, - 0x7FED5790, 0x0451A176, - 0x7FE9CBC0, 0x04B6195D, - 0x7FE5F108, 0x051A8E5C, - 0x7FE1C76B, 0x057F0034, - 0x7FDD4EEC, 0x05E36EA9, - 0x7FD8878D, 0x0647D97C, - 0x7FD37152, 0x06AC406F, - 0x7FCE0C3E, 0x0710A344, - 0x7FC85853, 0x077501BE, - 0x7FC25596, 0x07D95B9E, - 0x7FBC040A, 0x083DB0A7, - 0x7FB563B2, 0x08A2009A, - 0x7FAE7494, 0x09064B3A, - 0x7FA736B4, 0x096A9049, - 0x7F9FAA15, 0x09CECF89, - 0x7F97CEBC, 0x0A3308BC, - 0x7F8FA4AF, 0x0A973BA5, - 0x7F872BF3, 0x0AFB6805, - 0x7F7E648B, 0x0B5F8D9F, - 0x7F754E7F, 0x0BC3AC35, - 0x7F6BE9D4, 0x0C27C389, - 0x7F62368F, 0x0C8BD35E, - 0x7F5834B6, 0x0CEFDB75, - 0x7F4DE450, 0x0D53DB92, - 0x7F434563, 0x0DB7D376, - 0x7F3857F5, 0x0E1BC2E3, - 0x7F2D1C0E, 0x0E7FA99D, - 0x7F2191B4, 0x0EE38765, - 0x7F15B8EE, 0x0F475BFE, - 0x7F0991C3, 0x0FAB272B, - 0x7EFD1C3C, 0x100EE8AD, - 0x7EF0585F, 0x1072A047, - 0x7EE34635, 0x10D64DBC, - 0x7ED5E5C6, 0x1139F0CE, - 0x7EC8371A, 0x119D8940, - 0x7EBA3A39, 0x120116D4, - 0x7EABEF2C, 0x1264994E, - 0x7E9D55FC, 0x12C8106E, - 0x7E8E6EB1, 0x132B7BF9, - 0x7E7F3956, 0x138EDBB0, - 0x7E6FB5F3, 0x13F22F57, - 0x7E5FE493, 0x145576B1, - 0x7E4FC53E, 0x14B8B17F, - 0x7E3F57FE, 0x151BDF85, - 0x7E2E9CDF, 0x157F0086, - 0x7E1D93E9, 0x15E21444, - 0x7E0C3D29, 0x16451A83, - 0x7DFA98A7, 0x16A81305, - 0x7DE8A670, 0x170AFD8D, - 0x7DD6668E, 0x176DD9DE, - 0x7DC3D90D, 0x17D0A7BB, - 0x7DB0FDF7, 0x183366E8, - 0x7D9DD55A, 0x18961727, - 0x7D8A5F3F, 0x18F8B83C, - 0x7D769BB5, 0x195B49E9, - 0x7D628AC5, 0x19BDCBF2, - 0x7D4E2C7E, 0x1A203E1B, - 0x7D3980EC, 0x1A82A025, - 0x7D24881A, 0x1AE4F1D6, - 0x7D0F4218, 0x1B4732EF, - 0x7CF9AEF0, 0x1BA96334, - 0x7CE3CEB1, 0x1C0B826A, - 0x7CCDA168, 0x1C6D9053, - 0x7CB72724, 0x1CCF8CB3, - 0x7CA05FF1, 0x1D31774D, - 0x7C894BDD, 0x1D934FE5, - 0x7C71EAF8, 0x1DF5163F, - 0x7C5A3D4F, 0x1E56CA1E, - 0x7C4242F2, 0x1EB86B46, - 0x7C29FBEE, 0x1F19F97B, - 0x7C116853, 0x1F7B7480, - 0x7BF88830, 0x1FDCDC1A, - 0x7BDF5B94, 0x203E300D, - 0x7BC5E28F, 0x209F701C, - 0x7BAC1D31, 0x21009C0B, - 0x7B920B89, 0x2161B39F, - 0x7B77ADA8, 0x21C2B69C, - 0x7B5D039D, 0x2223A4C5, - 0x7B420D7A, 0x22847DDF, - 0x7B26CB4F, 0x22E541AE, - 0x7B0B3D2C, 0x2345EFF7, - 0x7AEF6323, 0x23A6887E, - 0x7AD33D45, 0x24070B07, - 0x7AB6CBA3, 0x24677757, - 0x7A9A0E4F, 0x24C7CD32, - 0x7A7D055B, 0x25280C5D, - 0x7A5FB0D8, 0x2588349D, - 0x7A4210D8, 0x25E845B5, - 0x7A24256E, 0x26483F6C, - 0x7A05EEAD, 0x26A82185, - 0x79E76CA6, 0x2707EBC6, - 0x79C89F6D, 0x27679DF4, - 0x79A98715, 0x27C737D2, - 0x798A23B1, 0x2826B928, - 0x796A7554, 0x288621B9, - 0x794A7C11, 0x28E5714A, - 0x792A37FE, 0x2944A7A2, - 0x7909A92C, 0x29A3C484, - 0x78E8CFB1, 0x2A02C7B8, - 0x78C7ABA1, 0x2A61B101, - 0x78A63D10, 0x2AC08025, - 0x78848413, 0x2B1F34EB, - 0x786280BF, 0x2B7DCF17, - 0x78403328, 0x2BDC4E6F, - 0x781D9B64, 0x2C3AB2B9, - 0x77FAB988, 0x2C98FBBA, - 0x77D78DAA, 0x2CF72939, - 0x77B417DF, 0x2D553AFB, - 0x7790583D, 0x2DB330C7, - 0x776C4EDB, 0x2E110A62, - 0x7747FBCE, 0x2E6EC792, - 0x77235F2D, 0x2ECC681E, - 0x76FE790E, 0x2F29EBCC, - 0x76D94988, 0x2F875262, - 0x76B3D0B3, 0x2FE49BA6, - 0x768E0EA5, 0x3041C760, - 0x76680376, 0x309ED555, - 0x7641AF3C, 0x30FBC54D, - 0x761B1211, 0x3158970D, - 0x75F42C0A, 0x31B54A5D, - 0x75CCFD42, 0x3211DF03, - 0x75A585CF, 0x326E54C7, - 0x757DC5CA, 0x32CAAB6F, - 0x7555BD4B, 0x3326E2C2, - 0x752D6C6C, 0x3382FA88, - 0x7504D345, 0x33DEF287, - 0x74DBF1EF, 0x343ACA87, - 0x74B2C883, 0x3496824F, - 0x7489571B, 0x34F219A7, - 0x745F9DD1, 0x354D9056, - 0x74359CBD, 0x35A8E624, - 0x740B53FA, 0x36041AD9, - 0x73E0C3A3, 0x365F2E3B, - 0x73B5EBD0, 0x36BA2013, - 0x738ACC9E, 0x3714F02A, - 0x735F6626, 0x376F9E46, - 0x7333B883, 0x37CA2A30, - 0x7307C3D0, 0x382493B0, - 0x72DB8828, 0x387EDA8E, - 0x72AF05A6, 0x38D8FE93, - 0x72823C66, 0x3932FF87, - 0x72552C84, 0x398CDD32, - 0x7227D61C, 0x39E6975D, - 0x71FA3948, 0x3A402DD1, - 0x71CC5626, 0x3A99A057, - 0x719E2CD2, 0x3AF2EEB7, - 0x716FBD68, 0x3B4C18BA, - 0x71410804, 0x3BA51E29, - 0x71120CC5, 0x3BFDFECD, - 0x70E2CBC6, 0x3C56BA70, - 0x70B34524, 0x3CAF50DA, - 0x708378FE, 0x3D07C1D5, - 0x70536771, 0x3D600D2B, - 0x70231099, 0x3DB832A5, - 0x6FF27496, 0x3E10320D, - 0x6FC19385, 0x3E680B2C, - 0x6F906D84, 0x3EBFBDCC, - 0x6F5F02B1, 0x3F1749B7, - 0x6F2D532C, 0x3F6EAEB8, - 0x6EFB5F12, 0x3FC5EC97, - 0x6EC92682, 0x401D0320, - 0x6E96A99C, 0x4073F21D, - 0x6E63E87F, 0x40CAB957, - 0x6E30E349, 0x4121589A, - 0x6DFD9A1B, 0x4177CFB0, - 0x6DCA0D14, 0x41CE1E64, - 0x6D963C54, 0x42244480, - 0x6D6227FA, 0x427A41D0, - 0x6D2DD027, 0x42D0161E, - 0x6CF934FB, 0x4325C135, - 0x6CC45697, 0x437B42E1, - 0x6C8F351C, 0x43D09AEC, - 0x6C59D0A9, 0x4425C923, - 0x6C242960, 0x447ACD50, - 0x6BEE3F62, 0x44CFA73F, - 0x6BB812D0, 0x452456BC, - 0x6B81A3CD, 0x4578DB93, - 0x6B4AF278, 0x45CD358F, - 0x6B13FEF5, 0x4621647C, - 0x6ADCC964, 0x46756827, - 0x6AA551E8, 0x46C9405C, - 0x6A6D98A4, 0x471CECE6, - 0x6A359DB9, 0x47706D93, - 0x69FD614A, 0x47C3C22E, - 0x69C4E37A, 0x4816EA85, - 0x698C246C, 0x4869E664, - 0x69532442, 0x48BCB598, - 0x6919E320, 0x490F57EE, - 0x68E06129, 0x4961CD32, - 0x68A69E81, 0x49B41533, - 0x686C9B4B, 0x4A062FBD, - 0x683257AA, 0x4A581C9D, - 0x67F7D3C4, 0x4AA9DBA1, - 0x67BD0FBC, 0x4AFB6C97, - 0x67820BB6, 0x4B4CCF4D, - 0x6746C7D7, 0x4B9E038F, - 0x670B4443, 0x4BEF092D, - 0x66CF811F, 0x4C3FDFF3, - 0x66937E90, 0x4C9087B1, - 0x66573CBB, 0x4CE10034, - 0x661ABBC5, 0x4D31494B, - 0x65DDFBD3, 0x4D8162C4, - 0x65A0FD0B, 0x4DD14C6E, - 0x6563BF92, 0x4E210617, - 0x6526438E, 0x4E708F8F, - 0x64E88926, 0x4EBFE8A4, - 0x64AA907F, 0x4F0F1126, - 0x646C59BF, 0x4F5E08E3, - 0x642DE50D, 0x4FACCFAB, - 0x63EF328F, 0x4FFB654D, - 0x63B0426D, 0x5049C999, - 0x637114CC, 0x5097FC5E, - 0x6331A9D4, 0x50E5FD6C, - 0x62F201AC, 0x5133CC94, - 0x62B21C7B, 0x518169A4, - 0x6271FA69, 0x51CED46E, - 0x62319B9D, 0x521C0CC1, - 0x61F1003E, 0x5269126E, - 0x61B02876, 0x52B5E545, - 0x616F146B, 0x53028517, - 0x612DC446, 0x534EF1B5, - 0x60EC3830, 0x539B2AEF, - 0x60AA704F, 0x53E73097, - 0x60686CCE, 0x5433027D, - 0x60262DD5, 0x547EA073, - 0x5FE3B38D, 0x54CA0A4A, - 0x5FA0FE1E, 0x55153FD4, - 0x5F5E0DB3, 0x556040E2, - 0x5F1AE273, 0x55AB0D46, - 0x5ED77C89, 0x55F5A4D2, - 0x5E93DC1F, 0x56400757, - 0x5E50015D, 0x568A34A9, - 0x5E0BEC6E, 0x56D42C99, - 0x5DC79D7C, 0x571DEEF9, - 0x5D8314B0, 0x57677B9D, - 0x5D3E5236, 0x57B0D256, - 0x5CF95638, 0x57F9F2F7, - 0x5CB420DF, 0x5842DD54, - 0x5C6EB258, 0x588B913F, - 0x5C290ACC, 0x58D40E8C, - 0x5BE32A67, 0x591C550E, - 0x5B9D1153, 0x59646497, - 0x5B56BFBD, 0x59AC3CFD, - 0x5B1035CF, 0x59F3DE12, - 0x5AC973B4, 0x5A3B47AA, - 0x5A82799A, 0x5A82799A, - 0x5A3B47AA, 0x5AC973B4, - 0x59F3DE12, 0x5B1035CF, - 0x59AC3CFD, 0x5B56BFBD, - 0x59646497, 0x5B9D1153, - 0x591C550E, 0x5BE32A67, - 0x58D40E8C, 0x5C290ACC, - 0x588B913F, 0x5C6EB258, - 0x5842DD54, 0x5CB420DF, - 0x57F9F2F7, 0x5CF95638, - 0x57B0D256, 0x5D3E5236, - 0x57677B9D, 0x5D8314B0, - 0x571DEEF9, 0x5DC79D7C, - 0x56D42C99, 0x5E0BEC6E, - 0x568A34A9, 0x5E50015D, - 0x56400757, 0x5E93DC1F, - 0x55F5A4D2, 0x5ED77C89, - 0x55AB0D46, 0x5F1AE273, - 0x556040E2, 0x5F5E0DB3, - 0x55153FD4, 0x5FA0FE1E, - 0x54CA0A4A, 0x5FE3B38D, - 0x547EA073, 0x60262DD5, - 0x5433027D, 0x60686CCE, - 0x53E73097, 0x60AA704F, - 0x539B2AEF, 0x60EC3830, - 0x534EF1B5, 0x612DC446, - 0x53028517, 0x616F146B, - 0x52B5E545, 0x61B02876, - 0x5269126E, 0x61F1003E, - 0x521C0CC1, 0x62319B9D, - 0x51CED46E, 0x6271FA69, - 0x518169A4, 0x62B21C7B, - 0x5133CC94, 0x62F201AC, - 0x50E5FD6C, 0x6331A9D4, - 0x5097FC5E, 0x637114CC, - 0x5049C999, 0x63B0426D, - 0x4FFB654D, 0x63EF328F, - 0x4FACCFAB, 0x642DE50D, - 0x4F5E08E3, 0x646C59BF, - 0x4F0F1126, 0x64AA907F, - 0x4EBFE8A4, 0x64E88926, - 0x4E708F8F, 0x6526438E, - 0x4E210617, 0x6563BF92, - 0x4DD14C6E, 0x65A0FD0B, - 0x4D8162C4, 0x65DDFBD3, - 0x4D31494B, 0x661ABBC5, - 0x4CE10034, 0x66573CBB, - 0x4C9087B1, 0x66937E90, - 0x4C3FDFF3, 0x66CF811F, - 0x4BEF092D, 0x670B4443, - 0x4B9E038F, 0x6746C7D7, - 0x4B4CCF4D, 0x67820BB6, - 0x4AFB6C97, 0x67BD0FBC, - 0x4AA9DBA1, 0x67F7D3C4, - 0x4A581C9D, 0x683257AA, - 0x4A062FBD, 0x686C9B4B, - 0x49B41533, 0x68A69E81, - 0x4961CD32, 0x68E06129, - 0x490F57EE, 0x6919E320, - 0x48BCB598, 0x69532442, - 0x4869E664, 0x698C246C, - 0x4816EA85, 0x69C4E37A, - 0x47C3C22E, 0x69FD614A, - 0x47706D93, 0x6A359DB9, - 0x471CECE6, 0x6A6D98A4, - 0x46C9405C, 0x6AA551E8, - 0x46756827, 0x6ADCC964, - 0x4621647C, 0x6B13FEF5, - 0x45CD358F, 0x6B4AF278, - 0x4578DB93, 0x6B81A3CD, - 0x452456BC, 0x6BB812D0, - 0x44CFA73F, 0x6BEE3F62, - 0x447ACD50, 0x6C242960, - 0x4425C923, 0x6C59D0A9, - 0x43D09AEC, 0x6C8F351C, - 0x437B42E1, 0x6CC45697, - 0x4325C135, 0x6CF934FB, - 0x42D0161E, 0x6D2DD027, - 0x427A41D0, 0x6D6227FA, - 0x42244480, 0x6D963C54, - 0x41CE1E64, 0x6DCA0D14, - 0x4177CFB0, 0x6DFD9A1B, - 0x4121589A, 0x6E30E349, - 0x40CAB957, 0x6E63E87F, - 0x4073F21D, 0x6E96A99C, - 0x401D0320, 0x6EC92682, - 0x3FC5EC97, 0x6EFB5F12, - 0x3F6EAEB8, 0x6F2D532C, - 0x3F1749B7, 0x6F5F02B1, - 0x3EBFBDCC, 0x6F906D84, - 0x3E680B2C, 0x6FC19385, - 0x3E10320D, 0x6FF27496, - 0x3DB832A5, 0x70231099, - 0x3D600D2B, 0x70536771, - 0x3D07C1D5, 0x708378FE, - 0x3CAF50DA, 0x70B34524, - 0x3C56BA70, 0x70E2CBC6, - 0x3BFDFECD, 0x71120CC5, - 0x3BA51E29, 0x71410804, - 0x3B4C18BA, 0x716FBD68, - 0x3AF2EEB7, 0x719E2CD2, - 0x3A99A057, 0x71CC5626, - 0x3A402DD1, 0x71FA3948, - 0x39E6975D, 0x7227D61C, - 0x398CDD32, 0x72552C84, - 0x3932FF87, 0x72823C66, - 0x38D8FE93, 0x72AF05A6, - 0x387EDA8E, 0x72DB8828, - 0x382493B0, 0x7307C3D0, - 0x37CA2A30, 0x7333B883, - 0x376F9E46, 0x735F6626, - 0x3714F02A, 0x738ACC9E, - 0x36BA2013, 0x73B5EBD0, - 0x365F2E3B, 0x73E0C3A3, - 0x36041AD9, 0x740B53FA, - 0x35A8E624, 0x74359CBD, - 0x354D9056, 0x745F9DD1, - 0x34F219A7, 0x7489571B, - 0x3496824F, 0x74B2C883, - 0x343ACA87, 0x74DBF1EF, - 0x33DEF287, 0x7504D345, - 0x3382FA88, 0x752D6C6C, - 0x3326E2C2, 0x7555BD4B, - 0x32CAAB6F, 0x757DC5CA, - 0x326E54C7, 0x75A585CF, - 0x3211DF03, 0x75CCFD42, - 0x31B54A5D, 0x75F42C0A, - 0x3158970D, 0x761B1211, - 0x30FBC54D, 0x7641AF3C, - 0x309ED555, 0x76680376, - 0x3041C760, 0x768E0EA5, - 0x2FE49BA6, 0x76B3D0B3, - 0x2F875262, 0x76D94988, - 0x2F29EBCC, 0x76FE790E, - 0x2ECC681E, 0x77235F2D, - 0x2E6EC792, 0x7747FBCE, - 0x2E110A62, 0x776C4EDB, - 0x2DB330C7, 0x7790583D, - 0x2D553AFB, 0x77B417DF, - 0x2CF72939, 0x77D78DAA, - 0x2C98FBBA, 0x77FAB988, - 0x2C3AB2B9, 0x781D9B64, - 0x2BDC4E6F, 0x78403328, - 0x2B7DCF17, 0x786280BF, - 0x2B1F34EB, 0x78848413, - 0x2AC08025, 0x78A63D10, - 0x2A61B101, 0x78C7ABA1, - 0x2A02C7B8, 0x78E8CFB1, - 0x29A3C484, 0x7909A92C, - 0x2944A7A2, 0x792A37FE, - 0x28E5714A, 0x794A7C11, - 0x288621B9, 0x796A7554, - 0x2826B928, 0x798A23B1, - 0x27C737D2, 0x79A98715, - 0x27679DF4, 0x79C89F6D, - 0x2707EBC6, 0x79E76CA6, - 0x26A82185, 0x7A05EEAD, - 0x26483F6C, 0x7A24256E, - 0x25E845B5, 0x7A4210D8, - 0x2588349D, 0x7A5FB0D8, - 0x25280C5D, 0x7A7D055B, - 0x24C7CD32, 0x7A9A0E4F, - 0x24677757, 0x7AB6CBA3, - 0x24070B07, 0x7AD33D45, - 0x23A6887E, 0x7AEF6323, - 0x2345EFF7, 0x7B0B3D2C, - 0x22E541AE, 0x7B26CB4F, - 0x22847DDF, 0x7B420D7A, - 0x2223A4C5, 0x7B5D039D, - 0x21C2B69C, 0x7B77ADA8, - 0x2161B39F, 0x7B920B89, - 0x21009C0B, 0x7BAC1D31, - 0x209F701C, 0x7BC5E28F, - 0x203E300D, 0x7BDF5B94, - 0x1FDCDC1A, 0x7BF88830, - 0x1F7B7480, 0x7C116853, - 0x1F19F97B, 0x7C29FBEE, - 0x1EB86B46, 0x7C4242F2, - 0x1E56CA1E, 0x7C5A3D4F, - 0x1DF5163F, 0x7C71EAF8, - 0x1D934FE5, 0x7C894BDD, - 0x1D31774D, 0x7CA05FF1, - 0x1CCF8CB3, 0x7CB72724, - 0x1C6D9053, 0x7CCDA168, - 0x1C0B826A, 0x7CE3CEB1, - 0x1BA96334, 0x7CF9AEF0, - 0x1B4732EF, 0x7D0F4218, - 0x1AE4F1D6, 0x7D24881A, - 0x1A82A025, 0x7D3980EC, - 0x1A203E1B, 0x7D4E2C7E, - 0x19BDCBF2, 0x7D628AC5, - 0x195B49E9, 0x7D769BB5, - 0x18F8B83C, 0x7D8A5F3F, - 0x18961727, 0x7D9DD55A, - 0x183366E8, 0x7DB0FDF7, - 0x17D0A7BB, 0x7DC3D90D, - 0x176DD9DE, 0x7DD6668E, - 0x170AFD8D, 0x7DE8A670, - 0x16A81305, 0x7DFA98A7, - 0x16451A83, 0x7E0C3D29, - 0x15E21444, 0x7E1D93E9, - 0x157F0086, 0x7E2E9CDF, - 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0x9235F2EB, 0x41CE1E64, - 0x920265E4, 0x4177CFB0, - 0x91CF1CB6, 0x4121589A, - 0x919C1780, 0x40CAB957, - 0x91695663, 0x4073F21D, - 0x9136D97D, 0x401D0320, - 0x9104A0ED, 0x3FC5EC97, - 0x90D2ACD3, 0x3F6EAEB8, - 0x90A0FD4E, 0x3F1749B7, - 0x906F927B, 0x3EBFBDCC, - 0x903E6C7A, 0x3E680B2C, - 0x900D8B69, 0x3E10320D, - 0x8FDCEF66, 0x3DB832A5, - 0x8FAC988E, 0x3D600D2B, - 0x8F7C8701, 0x3D07C1D5, - 0x8F4CBADB, 0x3CAF50DA, - 0x8F1D343A, 0x3C56BA70, - 0x8EEDF33B, 0x3BFDFECD, - 0x8EBEF7FB, 0x3BA51E29, - 0x8E904298, 0x3B4C18BA, - 0x8E61D32D, 0x3AF2EEB7, - 0x8E33A9D9, 0x3A99A057, - 0x8E05C6B7, 0x3A402DD1, - 0x8DD829E4, 0x39E6975D, - 0x8DAAD37B, 0x398CDD32, - 0x8D7DC399, 0x3932FF87, - 0x8D50FA59, 0x38D8FE93, - 0x8D2477D8, 0x387EDA8E, - 0x8CF83C30, 0x382493B0, - 0x8CCC477D, 0x37CA2A30, - 0x8CA099D9, 0x376F9E46, - 0x8C753361, 0x3714F02A, - 0x8C4A142F, 0x36BA2013, - 0x8C1F3C5C, 0x365F2E3B, - 0x8BF4AC05, 0x36041AD9, - 0x8BCA6342, 0x35A8E624, - 0x8BA0622F, 0x354D9056, - 0x8B76A8E4, 0x34F219A7, - 0x8B4D377C, 0x3496824F, - 0x8B240E10, 0x343ACA87, - 0x8AFB2CBA, 0x33DEF287, - 0x8AD29393, 0x3382FA88, - 0x8AAA42B4, 0x3326E2C2, - 0x8A823A35, 0x32CAAB6F, - 0x8A5A7A30, 0x326E54C7, - 0x8A3302BD, 0x3211DF03, - 0x8A0BD3F5, 0x31B54A5D, - 0x89E4EDEE, 0x3158970D, - 0x89BE50C3, 0x30FBC54D, - 0x8997FC89, 0x309ED555, - 0x8971F15A, 0x3041C760, - 0x894C2F4C, 0x2FE49BA6, - 0x8926B677, 0x2F875262, - 0x890186F1, 0x2F29EBCC, - 0x88DCA0D3, 0x2ECC681E, - 0x88B80431, 0x2E6EC792, - 0x8893B124, 0x2E110A62, - 0x886FA7C2, 0x2DB330C7, - 0x884BE820, 0x2D553AFB, - 0x88287255, 0x2CF72939, - 0x88054677, 0x2C98FBBA, - 0x87E2649B, 0x2C3AB2B9, - 0x87BFCCD7, 0x2BDC4E6F, - 0x879D7F40, 0x2B7DCF17, - 0x877B7BEC, 0x2B1F34EB, - 0x8759C2EF, 0x2AC08025, - 0x8738545E, 0x2A61B101, - 0x8717304E, 0x2A02C7B8, - 0x86F656D3, 0x29A3C484, - 0x86D5C802, 0x2944A7A2, - 0x86B583EE, 0x28E5714A, - 0x86958AAB, 0x288621B9, - 0x8675DC4E, 0x2826B928, - 0x865678EA, 0x27C737D2, - 0x86376092, 0x27679DF4, - 0x86189359, 0x2707EBC6, - 0x85FA1152, 0x26A82185, - 0x85DBDA91, 0x26483F6C, - 0x85BDEF27, 0x25E845B5, - 0x85A04F28, 0x2588349D, - 0x8582FAA4, 0x25280C5D, - 0x8565F1B0, 0x24C7CD32, - 0x8549345C, 0x24677757, - 0x852CC2BA, 0x24070B07, - 0x85109CDC, 0x23A6887E, - 0x84F4C2D3, 0x2345EFF7, - 0x84D934B0, 0x22E541AE, - 0x84BDF285, 0x22847DDF, - 0x84A2FC62, 0x2223A4C5, - 0x84885257, 0x21C2B69C, - 0x846DF476, 0x2161B39F, - 0x8453E2CE, 0x21009C0B, - 0x843A1D70, 0x209F701C, - 0x8420A46B, 0x203E300D, - 0x840777CF, 0x1FDCDC1A, - 0x83EE97AC, 0x1F7B7480, - 0x83D60411, 0x1F19F97B, - 0x83BDBD0D, 0x1EB86B46, - 0x83A5C2B0, 0x1E56CA1E, - 0x838E1507, 0x1DF5163F, - 0x8376B422, 0x1D934FE5, - 0x835FA00E, 0x1D31774D, - 0x8348D8DB, 0x1CCF8CB3, - 0x83325E97, 0x1C6D9053, - 0x831C314E, 0x1C0B826A, - 0x8306510F, 0x1BA96334, - 0x82F0BDE8, 0x1B4732EF, - 0x82DB77E5, 0x1AE4F1D6, - 0x82C67F13, 0x1A82A025, - 0x82B1D381, 0x1A203E1B, - 0x829D753A, 0x19BDCBF2, - 0x8289644A, 0x195B49E9, - 0x8275A0C0, 0x18F8B83C, - 0x82622AA5, 0x18961727, - 0x824F0208, 0x183366E8, - 0x823C26F2, 0x17D0A7BB, - 0x82299971, 0x176DD9DE, - 0x8217598F, 0x170AFD8D, - 0x82056758, 0x16A81305, - 0x81F3C2D7, 0x16451A83, - 0x81E26C16, 0x15E21444, - 0x81D16320, 0x157F0086, - 0x81C0A801, 0x151BDF85, - 0x81B03AC1, 0x14B8B17F, - 0x81A01B6C, 0x145576B1, - 0x81904A0C, 0x13F22F57, - 0x8180C6A9, 0x138EDBB0, - 0x8171914E, 0x132B7BF9, - 0x8162AA03, 0x12C8106E, - 0x815410D3, 0x1264994E, - 0x8145C5C6, 0x120116D4, - 0x8137C8E6, 0x119D8940, - 0x812A1A39, 0x1139F0CE, - 0x811CB9CA, 0x10D64DBC, - 0x810FA7A0, 0x1072A047, - 0x8102E3C3, 0x100EE8AD, - 0x80F66E3C, 0x0FAB272B, - 0x80EA4712, 0x0F475BFE, - 0x80DE6E4C, 0x0EE38765, - 0x80D2E3F1, 0x0E7FA99D, - 0x80C7A80A, 0x0E1BC2E3, - 0x80BCBA9C, 0x0DB7D376, - 0x80B21BAF, 0x0D53DB92, - 0x80A7CB49, 0x0CEFDB75, - 0x809DC970, 0x0C8BD35E, - 0x8094162B, 0x0C27C389, - 0x808AB180, 0x0BC3AC35, - 0x80819B74, 0x0B5F8D9F, - 0x8078D40D, 0x0AFB6805, - 0x80705B50, 0x0A973BA5, - 0x80683143, 0x0A3308BC, - 0x806055EA, 0x09CECF89, - 0x8058C94C, 0x096A9049, - 0x80518B6B, 0x09064B3A, - 0x804A9C4D, 0x08A2009A, - 0x8043FBF6, 0x083DB0A7, - 0x803DAA69, 0x07D95B9E, - 0x8037A7AC, 0x077501BE, - 0x8031F3C1, 0x0710A344, - 0x802C8EAD, 0x06AC406F, - 0x80277872, 0x0647D97C, - 0x8022B113, 0x05E36EA9, - 0x801E3894, 0x057F0034, - 0x801A0EF7, 0x051A8E5C, - 0x80163440, 0x04B6195D, - 0x8012A86F, 0x0451A176, - 0x800F6B88, 0x03ED26E6, - 0x800C7D8C, 0x0388A9E9, - 0x8009DE7D, 0x03242ABF, - 0x80078E5E, 0x02BFA9A4, - 0x80058D2E, 0x025B26D7, - 0x8003DAF0, 0x01F6A296, - 0x800277A5, 0x01921D1F, - 0x8001634D, 0x012D96B0, - 0x80009DE9, 0x00C90F88, - 0x8000277A, 0x006487E3, - 0x80000000, 0x00000000, - 0x8000277A, 0xFF9B781D, - 0x80009DE9, 0xFF36F078, - 0x8001634D, 0xFED2694F, - 0x800277A5, 0xFE6DE2E0, - 0x8003DAF0, 0xFE095D69, - 0x80058D2E, 0xFDA4D928, - 0x80078E5E, 0xFD40565B, - 0x8009DE7D, 0xFCDBD541, - 0x800C7D8C, 0xFC775616, - 0x800F6B88, 0xFC12D919, - 0x8012A86F, 0xFBAE5E89, - 0x80163440, 0xFB49E6A2, - 0x801A0EF7, 0xFAE571A4, - 0x801E3894, 0xFA80FFCB, - 0x8022B113, 0xFA1C9156, - 0x80277872, 0xF9B82683, - 0x802C8EAD, 0xF953BF90, - 0x8031F3C1, 0xF8EF5CBB, - 0x8037A7AC, 0xF88AFE41, - 0x803DAA69, 0xF826A461, - 0x8043FBF6, 0xF7C24F58, - 0x804A9C4D, 0xF75DFF65, - 0x80518B6B, 0xF6F9B4C5, - 0x8058C94C, 0xF6956FB6, - 0x806055EA, 0xF6313076, - 0x80683143, 0xF5CCF743, - 0x80705B50, 0xF568C45A, - 0x8078D40D, 0xF50497FA, - 0x80819B74, 0xF4A07260, - 0x808AB180, 0xF43C53CA, - 0x8094162B, 0xF3D83C76, - 0x809DC970, 0xF3742CA1, - 0x80A7CB49, 0xF310248A, - 0x80B21BAF, 0xF2AC246D, - 0x80BCBA9C, 0xF2482C89, - 0x80C7A80A, 0xF1E43D1C, - 0x80D2E3F1, 0xF1805662, - 0x80DE6E4C, 0xF11C789A, - 0x80EA4712, 0xF0B8A401, - 0x80F66E3C, 0xF054D8D4, - 0x8102E3C3, 0xEFF11752, - 0x810FA7A0, 0xEF8D5FB8, - 0x811CB9CA, 0xEF29B243, - 0x812A1A39, 0xEEC60F31, - 0x8137C8E6, 0xEE6276BF, - 0x8145C5C6, 0xEDFEE92B, - 0x815410D3, 0xED9B66B2, - 0x8162AA03, 0xED37EF91, - 0x8171914E, 0xECD48406, - 0x8180C6A9, 0xEC71244F, - 0x81904A0C, 0xEC0DD0A8, - 0x81A01B6C, 0xEBAA894E, - 0x81B03AC1, 0xEB474E80, - 0x81C0A801, 0xEAE4207A, - 0x81D16320, 0xEA80FF79, - 0x81E26C16, 0xEA1DEBBB, - 0x81F3C2D7, 0xE9BAE57C, - 0x82056758, 0xE957ECFB, - 0x8217598F, 0xE8F50273, - 0x82299971, 0xE8922621, - 0x823C26F2, 0xE82F5844, - 0x824F0208, 0xE7CC9917, - 0x82622AA5, 0xE769E8D8, - 0x8275A0C0, 0xE70747C3, - 0x8289644A, 0xE6A4B616, - 0x829D753A, 0xE642340D, - 0x82B1D381, 0xE5DFC1E4, - 0x82C67F13, 0xE57D5FDA, - 0x82DB77E5, 0xE51B0E2A, - 0x82F0BDE8, 0xE4B8CD10, - 0x8306510F, 0xE4569CCB, - 0x831C314E, 0xE3F47D95, - 0x83325E97, 0xE3926FAC, - 0x8348D8DB, 0xE330734C, - 0x835FA00E, 0xE2CE88B2, - 0x8376B422, 0xE26CB01A, - 0x838E1507, 0xE20AE9C1, - 0x83A5C2B0, 0xE1A935E1, - 0x83BDBD0D, 0xE14794B9, - 0x83D60411, 0xE0E60684, - 0x83EE97AC, 0xE0848B7F, - 0x840777CF, 0xE02323E5, - 0x8420A46B, 0xDFC1CFF2, - 0x843A1D70, 0xDF608FE3, - 0x8453E2CE, 0xDEFF63F4, - 0x846DF476, 0xDE9E4C60, - 0x84885257, 0xDE3D4963, - 0x84A2FC62, 0xDDDC5B3A, - 0x84BDF285, 0xDD7B8220, - 0x84D934B0, 0xDD1ABE51, - 0x84F4C2D3, 0xDCBA1008, - 0x85109CDC, 0xDC597781, - 0x852CC2BA, 0xDBF8F4F8, - 0x8549345C, 0xDB9888A8, - 0x8565F1B0, 0xDB3832CD, - 0x8582FAA4, 0xDAD7F3A2, - 0x85A04F28, 0xDA77CB62, - 0x85BDEF27, 0xDA17BA4A, - 0x85DBDA91, 0xD9B7C093, - 0x85FA1152, 0xD957DE7A, - 0x86189359, 0xD8F81439, - 0x86376092, 0xD898620C, - 0x865678EA, 0xD838C82D, - 0x8675DC4E, 0xD7D946D7, - 0x86958AAB, 0xD779DE46, - 0x86B583EE, 0xD71A8EB5, - 0x86D5C802, 0xD6BB585D, - 0x86F656D3, 0xD65C3B7B, - 0x8717304E, 0xD5FD3847, - 0x8738545E, 0xD59E4EFE, - 0x8759C2EF, 0xD53F7FDA, - 0x877B7BEC, 0xD4E0CB14, - 0x879D7F40, 0xD48230E8, - 0x87BFCCD7, 0xD423B190, - 0x87E2649B, 0xD3C54D46, - 0x88054677, 0xD3670445, - 0x88287255, 0xD308D6C6, - 0x884BE820, 0xD2AAC504, - 0x886FA7C2, 0xD24CCF38, - 0x8893B124, 0xD1EEF59E, - 0x88B80431, 0xD191386D, - 0x88DCA0D3, 0xD13397E1, - 0x890186F1, 0xD0D61433, - 0x8926B677, 0xD078AD9D, - 0x894C2F4C, 0xD01B6459, - 0x8971F15A, 0xCFBE389F, - 0x8997FC89, 0xCF612AAA, - 0x89BE50C3, 0xCF043AB2, - 0x89E4EDEE, 0xCEA768F2, - 0x8A0BD3F5, 0xCE4AB5A2, - 0x8A3302BD, 0xCDEE20FC, - 0x8A5A7A30, 0xCD91AB38, - 0x8A823A35, 0xCD355490, - 0x8AAA42B4, 0xCCD91D3D, - 0x8AD29393, 0xCC7D0577, - 0x8AFB2CBA, 0xCC210D78, - 0x8B240E10, 0xCBC53578, - 0x8B4D377C, 0xCB697DB0, - 0x8B76A8E4, 0xCB0DE658, - 0x8BA0622F, 0xCAB26FA9, - 0x8BCA6342, 0xCA5719DB, - 0x8BF4AC05, 0xC9FBE527, - 0x8C1F3C5C, 0xC9A0D1C4, - 0x8C4A142F, 0xC945DFEC, - 0x8C753361, 0xC8EB0FD6, - 0x8CA099D9, 0xC89061BA, - 0x8CCC477D, 0xC835D5D0, - 0x8CF83C30, 0xC7DB6C50, - 0x8D2477D8, 0xC7812571, - 0x8D50FA59, 0xC727016C, - 0x8D7DC399, 0xC6CD0079, - 0x8DAAD37B, 0xC67322CD, - 0x8DD829E4, 0xC61968A2, - 0x8E05C6B7, 0xC5BFD22E, - 0x8E33A9D9, 0xC5665FA8, - 0x8E61D32D, 0xC50D1148, - 0x8E904298, 0xC4B3E746, - 0x8EBEF7FB, 0xC45AE1D7, - 0x8EEDF33B, 0xC4020132, - 0x8F1D343A, 0xC3A9458F, - 0x8F4CBADB, 0xC350AF25, - 0x8F7C8701, 0xC2F83E2A, - 0x8FAC988E, 0xC29FF2D4, - 0x8FDCEF66, 0xC247CD5A, - 0x900D8B69, 0xC1EFCDF2, - 0x903E6C7A, 0xC197F4D3, - 0x906F927B, 0xC1404233, - 0x90A0FD4E, 0xC0E8B648, - 0x90D2ACD3, 0xC0915147, - 0x9104A0ED, 0xC03A1368, - 0x9136D97D, 0xBFE2FCDF, - 0x91695663, 0xBF8C0DE2, - 0x919C1780, 0xBF3546A8, - 0x91CF1CB6, 0xBEDEA765, - 0x920265E4, 0xBE88304F, - 0x9235F2EB, 0xBE31E19B, - 0x9269C3AC, 0xBDDBBB7F, - 0x929DD805, 0xBD85BE2F, - 0x92D22FD8, 0xBD2FE9E1, - 0x9306CB04, 0xBCDA3ECA, - 0x933BA968, 0xBC84BD1E, - 0x9370CAE4, 0xBC2F6513, - 0x93A62F56, 0xBBDA36DC, - 0x93DBD69F, 0xBB8532AF, - 0x9411C09D, 0xBB3058C0, - 0x9447ED2F, 0xBADBA943, - 0x947E5C32, 0xBA87246C, - 0x94B50D87, 0xBA32CA70, - 0x94EC010B, 0xB9DE9B83, - 0x9523369B, 0xB98A97D8, - 0x955AAE17, 0xB936BFA3, - 0x9592675B, 0xB8E31319, - 0x95CA6246, 0xB88F926C, - 0x96029EB5, 0xB83C3DD1, - 0x963B1C85, 0xB7E9157A, - 0x9673DB94, 0xB796199B, - 0x96ACDBBD, 0xB7434A67, - 0x96E61CDF, 0xB6F0A811, - 0x971F9ED6, 0xB69E32CD, - 0x9759617E, 0xB64BEACC, - 0x979364B5, 0xB5F9D042, - 0x97CDA855, 0xB5A7E362, - 0x98082C3B, 0xB556245E, - 0x9842F043, 0xB5049368, - 0x987DF449, 0xB4B330B2, - 0x98B93828, 0xB461FC70, - 0x98F4BBBC, 0xB410F6D2, - 0x99307EE0, 0xB3C0200C, - 0x996C816F, 0xB36F784E, - 0x99A8C344, 0xB31EFFCB, - 0x99E5443A, 0xB2CEB6B5, - 0x9A22042C, 0xB27E9D3B, - 0x9A5F02F5, 0xB22EB392, - 0x9A9C406D, 0xB1DEF9E8, - 0x9AD9BC71, 0xB18F7070, - 0x9B1776D9, 0xB140175B, - 0x9B556F80, 0xB0F0EEDA, - 0x9B93A640, 0xB0A1F71C, - 0x9BD21AF2, 0xB0533055, - 0x9C10CD70, 0xB0049AB2, - 0x9C4FBD92, 0xAFB63667, - 0x9C8EEB33, 0xAF6803A1, - 0x9CCE562B, 0xAF1A0293, - 0x9D0DFE53, 0xAECC336B, - 0x9D4DE384, 0xAE7E965B, - 0x9D8E0596, 0xAE312B91, - 0x9DCE6462, 0xADE3F33E, - 0x9E0EFFC1, 0xAD96ED91, - 0x9E4FD789, 0xAD4A1ABA, - 0x9E90EB94, 0xACFD7AE8, - 0x9ED23BB9, 0xACB10E4A, - 0x9F13C7D0, 0xAC64D510, - 0x9F558FB0, 0xAC18CF68, - 0x9F979331, 0xABCCFD82, - 0x9FD9D22A, 0xAB815F8C, - 0xA01C4C72, 0xAB35F5B5, - 0xA05F01E1, 0xAAEAC02B, - 0xA0A1F24C, 0xAA9FBF1D, - 0xA0E51D8C, 0xAA54F2B9, - 0xA1288376, 0xAA0A5B2D, - 0xA16C23E1, 0xA9BFF8A8, - 0xA1AFFEA2, 0xA975CB56, - 0xA1F41391, 0xA92BD366, - 0xA2386283, 0xA8E21106, - 0xA27CEB4F, 0xA8988463, - 0xA2C1ADC9, 0xA84F2DA9, - 0xA306A9C7, 0xA8060D08, - 0xA34BDF20, 0xA7BD22AB, - 0xA3914DA7, 0xA7746EC0, - 0xA3D6F533, 0xA72BF173, - 0xA41CD598, 0xA6E3AAF2, - 0xA462EEAC, 0xA69B9B68, - 0xA4A94042, 0xA653C302, - 0xA4EFCA31, 0xA60C21ED, - 0xA5368C4B, 0xA5C4B855, - 0xA57D8666, 0xA57D8666, - 0xA5C4B855, 0xA5368C4B, - 0xA60C21ED, 0xA4EFCA31, - 0xA653C302, 0xA4A94042, - 0xA69B9B68, 0xA462EEAC, - 0xA6E3AAF2, 0xA41CD598, - 0xA72BF173, 0xA3D6F533, - 0xA7746EC0, 0xA3914DA7, - 0xA7BD22AB, 0xA34BDF20, - 0xA8060D08, 0xA306A9C7, - 0xA84F2DA9, 0xA2C1ADC9, - 0xA8988463, 0xA27CEB4F, - 0xA8E21106, 0xA2386283, - 0xA92BD366, 0xA1F41391, - 0xA975CB56, 0xA1AFFEA2, - 0xA9BFF8A8, 0xA16C23E1, - 0xAA0A5B2D, 0xA1288376, - 0xAA54F2B9, 0xA0E51D8C, - 0xAA9FBF1D, 0xA0A1F24C, - 0xAAEAC02B, 0xA05F01E1, - 0xAB35F5B5, 0xA01C4C72, - 0xAB815F8C, 0x9FD9D22A, - 0xABCCFD82, 0x9F979331, - 0xAC18CF68, 0x9F558FB0, - 0xAC64D510, 0x9F13C7D0, - 0xACB10E4A, 0x9ED23BB9, - 0xACFD7AE8, 0x9E90EB94, - 0xAD4A1ABA, 0x9E4FD789, - 0xAD96ED91, 0x9E0EFFC1, - 0xADE3F33E, 0x9DCE6462, - 0xAE312B91, 0x9D8E0596, - 0xAE7E965B, 0x9D4DE384, - 0xAECC336B, 0x9D0DFE53, - 0xAF1A0293, 0x9CCE562B, - 0xAF6803A1, 0x9C8EEB33, - 0xAFB63667, 0x9C4FBD92, - 0xB0049AB2, 0x9C10CD70, - 0xB0533055, 0x9BD21AF2, - 0xB0A1F71C, 0x9B93A640, - 0xB0F0EEDA, 0x9B556F80, - 0xB140175B, 0x9B1776D9, - 0xB18F7070, 0x9AD9BC71, - 0xB1DEF9E8, 0x9A9C406D, - 0xB22EB392, 0x9A5F02F5, - 0xB27E9D3B, 0x9A22042C, - 0xB2CEB6B5, 0x99E5443A, - 0xB31EFFCB, 0x99A8C344, - 0xB36F784E, 0x996C816F, - 0xB3C0200C, 0x99307EE0, - 0xB410F6D2, 0x98F4BBBC, - 0xB461FC70, 0x98B93828, - 0xB4B330B2, 0x987DF449, - 0xB5049368, 0x9842F043, - 0xB556245E, 0x98082C3B, - 0xB5A7E362, 0x97CDA855, - 0xB5F9D042, 0x979364B5, - 0xB64BEACC, 0x9759617E, - 0xB69E32CD, 0x971F9ED6, - 0xB6F0A811, 0x96E61CDF, - 0xB7434A67, 0x96ACDBBD, - 0xB796199B, 0x9673DB94, - 0xB7E9157A, 0x963B1C85, - 0xB83C3DD1, 0x96029EB5, - 0xB88F926C, 0x95CA6246, - 0xB8E31319, 0x9592675B, - 0xB936BFA3, 0x955AAE17, - 0xB98A97D8, 0x9523369B, - 0xB9DE9B83, 0x94EC010B, - 0xBA32CA70, 0x94B50D87, - 0xBA87246C, 0x947E5C32, - 0xBADBA943, 0x9447ED2F, - 0xBB3058C0, 0x9411C09D, - 0xBB8532AF, 0x93DBD69F, - 0xBBDA36DC, 0x93A62F56, - 0xBC2F6513, 0x9370CAE4, - 0xBC84BD1E, 0x933BA968, - 0xBCDA3ECA, 0x9306CB04, - 0xBD2FE9E1, 0x92D22FD8, - 0xBD85BE2F, 0x929DD805, - 0xBDDBBB7F, 0x9269C3AC, - 0xBE31E19B, 0x9235F2EB, - 0xBE88304F, 0x920265E4, - 0xBEDEA765, 0x91CF1CB6, - 0xBF3546A8, 0x919C1780, - 0xBF8C0DE2, 0x91695663, - 0xBFE2FCDF, 0x9136D97D, - 0xC03A1368, 0x9104A0ED, - 0xC0915147, 0x90D2ACD3, - 0xC0E8B648, 0x90A0FD4E, - 0xC1404233, 0x906F927B, - 0xC197F4D3, 0x903E6C7A, - 0xC1EFCDF2, 0x900D8B69, - 0xC247CD5A, 0x8FDCEF66, - 0xC29FF2D4, 0x8FAC988E, - 0xC2F83E2A, 0x8F7C8701, - 0xC350AF25, 0x8F4CBADB, - 0xC3A9458F, 0x8F1D343A, - 0xC4020132, 0x8EEDF33B, - 0xC45AE1D7, 0x8EBEF7FB, - 0xC4B3E746, 0x8E904298, - 0xC50D1148, 0x8E61D32D, - 0xC5665FA8, 0x8E33A9D9, - 0xC5BFD22E, 0x8E05C6B7, - 0xC61968A2, 0x8DD829E4, - 0xC67322CD, 0x8DAAD37B, - 0xC6CD0079, 0x8D7DC399, - 0xC727016C, 0x8D50FA59, - 0xC7812571, 0x8D2477D8, - 0xC7DB6C50, 0x8CF83C30, - 0xC835D5D0, 0x8CCC477D, - 0xC89061BA, 0x8CA099D9, - 0xC8EB0FD6, 0x8C753361, - 0xC945DFEC, 0x8C4A142F, - 0xC9A0D1C4, 0x8C1F3C5C, - 0xC9FBE527, 0x8BF4AC05, - 0xCA5719DB, 0x8BCA6342, - 0xCAB26FA9, 0x8BA0622F, - 0xCB0DE658, 0x8B76A8E4, - 0xCB697DB0, 0x8B4D377C, - 0xCBC53578, 0x8B240E10, - 0xCC210D78, 0x8AFB2CBA, - 0xCC7D0577, 0x8AD29393, - 0xCCD91D3D, 0x8AAA42B4, - 0xCD355490, 0x8A823A35, - 0xCD91AB38, 0x8A5A7A30, - 0xCDEE20FC, 0x8A3302BD, - 0xCE4AB5A2, 0x8A0BD3F5, - 0xCEA768F2, 0x89E4EDEE, - 0xCF043AB2, 0x89BE50C3, - 0xCF612AAA, 0x8997FC89, - 0xCFBE389F, 0x8971F15A, - 0xD01B6459, 0x894C2F4C, - 0xD078AD9D, 0x8926B677, - 0xD0D61433, 0x890186F1, - 0xD13397E1, 0x88DCA0D3, - 0xD191386D, 0x88B80431, - 0xD1EEF59E, 0x8893B124, - 0xD24CCF38, 0x886FA7C2, - 0xD2AAC504, 0x884BE820, - 0xD308D6C6, 0x88287255, - 0xD3670445, 0x88054677, - 0xD3C54D46, 0x87E2649B, - 0xD423B190, 0x87BFCCD7, - 0xD48230E8, 0x879D7F40, - 0xD4E0CB14, 0x877B7BEC, - 0xD53F7FDA, 0x8759C2EF, - 0xD59E4EFE, 0x8738545E, - 0xD5FD3847, 0x8717304E, - 0xD65C3B7B, 0x86F656D3, - 0xD6BB585D, 0x86D5C802, - 0xD71A8EB5, 0x86B583EE, - 0xD779DE46, 0x86958AAB, - 0xD7D946D7, 0x8675DC4E, - 0xD838C82D, 0x865678EA, - 0xD898620C, 0x86376092, - 0xD8F81439, 0x86189359, - 0xD957DE7A, 0x85FA1152, - 0xD9B7C093, 0x85DBDA91, - 0xDA17BA4A, 0x85BDEF27, - 0xDA77CB62, 0x85A04F28, - 0xDAD7F3A2, 0x8582FAA4, - 0xDB3832CD, 0x8565F1B0, - 0xDB9888A8, 0x8549345C, - 0xDBF8F4F8, 0x852CC2BA, - 0xDC597781, 0x85109CDC, - 0xDCBA1008, 0x84F4C2D3, - 0xDD1ABE51, 0x84D934B0, - 0xDD7B8220, 0x84BDF285, - 0xDDDC5B3A, 0x84A2FC62, - 0xDE3D4963, 0x84885257, - 0xDE9E4C60, 0x846DF476, - 0xDEFF63F4, 0x8453E2CE, - 0xDF608FE3, 0x843A1D70, - 0xDFC1CFF2, 0x8420A46B, - 0xE02323E5, 0x840777CF, - 0xE0848B7F, 0x83EE97AC, - 0xE0E60684, 0x83D60411, - 0xE14794B9, 0x83BDBD0D, - 0xE1A935E1, 0x83A5C2B0, - 0xE20AE9C1, 0x838E1507, - 0xE26CB01A, 0x8376B422, - 0xE2CE88B2, 0x835FA00E, - 0xE330734C, 0x8348D8DB, - 0xE3926FAC, 0x83325E97, - 0xE3F47D95, 0x831C314E, - 0xE4569CCB, 0x8306510F, - 0xE4B8CD10, 0x82F0BDE8, - 0xE51B0E2A, 0x82DB77E5, - 0xE57D5FDA, 0x82C67F13, - 0xE5DFC1E4, 0x82B1D381, - 0xE642340D, 0x829D753A, - 0xE6A4B616, 0x8289644A, - 0xE70747C3, 0x8275A0C0, - 0xE769E8D8, 0x82622AA5, - 0xE7CC9917, 0x824F0208, - 0xE82F5844, 0x823C26F2, - 0xE8922621, 0x82299971, - 0xE8F50273, 0x8217598F, - 0xE957ECFB, 0x82056758, - 0xE9BAE57C, 0x81F3C2D7, - 0xEA1DEBBB, 0x81E26C16, - 0xEA80FF79, 0x81D16320, - 0xEAE4207A, 0x81C0A801, - 0xEB474E80, 0x81B03AC1, - 0xEBAA894E, 0x81A01B6C, - 0xEC0DD0A8, 0x81904A0C, - 0xEC71244F, 0x8180C6A9, - 0xECD48406, 0x8171914E, - 0xED37EF91, 0x8162AA03, - 0xED9B66B2, 0x815410D3, - 0xEDFEE92B, 0x8145C5C6, - 0xEE6276BF, 0x8137C8E6, - 0xEEC60F31, 0x812A1A39, - 0xEF29B243, 0x811CB9CA, - 0xEF8D5FB8, 0x810FA7A0, - 0xEFF11752, 0x8102E3C3, - 0xF054D8D4, 0x80F66E3C, - 0xF0B8A401, 0x80EA4712, - 0xF11C789A, 0x80DE6E4C, - 0xF1805662, 0x80D2E3F1, - 0xF1E43D1C, 0x80C7A80A, - 0xF2482C89, 0x80BCBA9C, - 0xF2AC246D, 0x80B21BAF, - 0xF310248A, 0x80A7CB49, - 0xF3742CA1, 0x809DC970, - 0xF3D83C76, 0x8094162B, - 0xF43C53CA, 0x808AB180, - 0xF4A07260, 0x80819B74, - 0xF50497FA, 0x8078D40D, - 0xF568C45A, 0x80705B50, - 0xF5CCF743, 0x80683143, - 0xF6313076, 0x806055EA, - 0xF6956FB6, 0x8058C94C, - 0xF6F9B4C5, 0x80518B6B, - 0xF75DFF65, 0x804A9C4D, - 0xF7C24F58, 0x8043FBF6, - 0xF826A461, 0x803DAA69, - 0xF88AFE41, 0x8037A7AC, - 0xF8EF5CBB, 0x8031F3C1, - 0xF953BF90, 0x802C8EAD, - 0xF9B82683, 0x80277872, - 0xFA1C9156, 0x8022B113, - 0xFA80FFCB, 0x801E3894, - 0xFAE571A4, 0x801A0EF7, - 0xFB49E6A2, 0x80163440, - 0xFBAE5E89, 0x8012A86F, - 0xFC12D919, 0x800F6B88, - 0xFC775616, 0x800C7D8C, - 0xFCDBD541, 0x8009DE7D, - 0xFD40565B, 0x80078E5E, - 0xFDA4D928, 0x80058D2E, - 0xFE095D69, 0x8003DAF0, - 0xFE6DE2E0, 0x800277A5, - 0xFED2694F, 0x8001634D, - 0xFF36F078, 0x80009DE9, - 0xFF9B781D, 0x8000277A -}; - -/** -* \par -* Example code for Q31 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 4096 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to Q31(Fixed point 1.31): -* round(twiddleCoefQ31(i) * pow(2, 31)) -* -*/ -const q31_t twiddleCoef_4096_q31[6144] = -{ - 0x7FFFFFFF, 0x00000000, - 0x7FFFF621, 0x003243F5, - 0x7FFFD885, 0x006487E3, - 0x7FFFA72C, 0x0096CBC1, - 0x7FFF6216, 0x00C90F88, - 0x7FFF0942, 0x00FB532F, - 0x7FFE9CB2, 0x012D96B0, - 0x7FFE1C64, 0x015FDA03, - 0x7FFD885A, 0x01921D1F, - 0x7FFCE093, 0x01C45FFE, - 0x7FFC250F, 0x01F6A296, - 0x7FFB55CE, 0x0228E4E1, - 0x7FFA72D1, 0x025B26D7, - 0x7FF97C17, 0x028D6870, - 0x7FF871A1, 0x02BFA9A4, - 0x7FF7536F, 0x02F1EA6B, - 0x7FF62182, 0x03242ABF, - 0x7FF4DBD8, 0x03566A96, - 0x7FF38273, 0x0388A9E9, - 0x7FF21553, 0x03BAE8B1, - 0x7FF09477, 0x03ED26E6, - 0x7FEEFFE1, 0x041F647F, - 0x7FED5790, 0x0451A176, - 0x7FEB9B85, 0x0483DDC3, - 0x7FE9CBC0, 0x04B6195D, - 0x7FE7E840, 0x04E8543D, - 0x7FE5F108, 0x051A8E5C, - 0x7FE3E616, 0x054CC7B0, - 0x7FE1C76B, 0x057F0034, - 0x7FDF9508, 0x05B137DF, - 0x7FDD4EEC, 0x05E36EA9, - 0x7FDAF518, 0x0615A48A, - 0x7FD8878D, 0x0647D97C, - 0x7FD6064B, 0x067A0D75, - 0x7FD37152, 0x06AC406F, - 0x7FD0C8A3, 0x06DE7261, - 0x7FCE0C3E, 0x0710A344, - 0x7FCB3C23, 0x0742D310, - 0x7FC85853, 0x077501BE, - 0x7FC560CF, 0x07A72F45, - 0x7FC25596, 0x07D95B9E, - 0x7FBF36A9, 0x080B86C1, - 0x7FBC040A, 0x083DB0A7, - 0x7FB8BDB7, 0x086FD947, - 0x7FB563B2, 0x08A2009A, - 0x7FB1F5FC, 0x08D42698, - 0x7FAE7494, 0x09064B3A, - 0x7FAADF7C, 0x09386E77, - 0x7FA736B4, 0x096A9049, - 0x7FA37A3C, 0x099CB0A7, - 0x7F9FAA15, 0x09CECF89, - 0x7F9BC63F, 0x0A00ECE8, - 0x7F97CEBC, 0x0A3308BC, - 0x7F93C38C, 0x0A6522FE, - 0x7F8FA4AF, 0x0A973BA5, - 0x7F8B7226, 0x0AC952AA, - 0x7F872BF3, 0x0AFB6805, - 0x7F82D214, 0x0B2D7BAE, - 0x7F7E648B, 0x0B5F8D9F, - 0x7F79E35A, 0x0B919DCE, - 0x7F754E7F, 0x0BC3AC35, - 0x7F70A5FD, 0x0BF5B8CB, - 0x7F6BE9D4, 0x0C27C389, - 0x7F671A04, 0x0C59CC67, - 0x7F62368F, 0x0C8BD35E, - 0x7F5D3F75, 0x0CBDD865, - 0x7F5834B6, 0x0CEFDB75, - 0x7F531654, 0x0D21DC87, - 0x7F4DE450, 0x0D53DB92, - 0x7F489EAA, 0x0D85D88F, - 0x7F434563, 0x0DB7D376, - 0x7F3DD87C, 0x0DE9CC3F, - 0x7F3857F5, 0x0E1BC2E3, - 0x7F32C3D0, 0x0E4DB75B, - 0x7F2D1C0E, 0x0E7FA99D, - 0x7F2760AF, 0x0EB199A3, - 0x7F2191B4, 0x0EE38765, - 0x7F1BAF1E, 0x0F1572DC, - 0x7F15B8EE, 0x0F475BFE, - 0x7F0FAF24, 0x0F7942C6, - 0x7F0991C3, 0x0FAB272B, - 0x7F0360CB, 0x0FDD0925, - 0x7EFD1C3C, 0x100EE8AD, - 0x7EF6C418, 0x1040C5BB, - 0x7EF0585F, 0x1072A047, - 0x7EE9D913, 0x10A4784A, - 0x7EE34635, 0x10D64DBC, - 0x7EDC9FC6, 0x11082096, - 0x7ED5E5C6, 0x1139F0CE, - 0x7ECF1837, 0x116BBE5F, - 0x7EC8371A, 0x119D8940, - 0x7EC1426F, 0x11CF516A, - 0x7EBA3A39, 0x120116D4, - 0x7EB31E77, 0x1232D978, - 0x7EABEF2C, 0x1264994E, - 0x7EA4AC58, 0x1296564D, - 0x7E9D55FC, 0x12C8106E, - 0x7E95EC19, 0x12F9C7AA, - 0x7E8E6EB1, 0x132B7BF9, - 0x7E86DDC5, 0x135D2D53, - 0x7E7F3956, 0x138EDBB0, - 0x7E778165, 0x13C0870A, - 0x7E6FB5F3, 0x13F22F57, - 0x7E67D702, 0x1423D492, - 0x7E5FE493, 0x145576B1, - 0x7E57DEA6, 0x148715AD, - 0x7E4FC53E, 0x14B8B17F, - 0x7E47985B, 0x14EA4A1F, - 0x7E3F57FE, 0x151BDF85, - 0x7E37042A, 0x154D71AA, - 0x7E2E9CDF, 0x157F0086, - 0x7E26221E, 0x15B08C11, - 0x7E1D93E9, 0x15E21444, - 0x7E14F242, 0x16139917, - 0x7E0C3D29, 0x16451A83, - 0x7E03749F, 0x1676987F, - 0x7DFA98A7, 0x16A81305, - 0x7DF1A942, 0x16D98A0C, - 0x7DE8A670, 0x170AFD8D, - 0x7DDF9034, 0x173C6D80, - 0x7DD6668E, 0x176DD9DE, - 0x7DCD2981, 0x179F429F, - 0x7DC3D90D, 0x17D0A7BB, - 0x7DBA7534, 0x1802092C, - 0x7DB0FDF7, 0x183366E8, - 0x7DA77359, 0x1864C0E9, - 0x7D9DD55A, 0x18961727, - 0x7D9423FB, 0x18C7699B, - 0x7D8A5F3F, 0x18F8B83C, - 0x7D808727, 0x192A0303, - 0x7D769BB5, 0x195B49E9, - 0x7D6C9CE9, 0x198C8CE6, - 0x7D628AC5, 0x19BDCBF2, - 0x7D58654C, 0x19EF0706, - 0x7D4E2C7E, 0x1A203E1B, - 0x7D43E05E, 0x1A517127, - 0x7D3980EC, 0x1A82A025, - 0x7D2F0E2A, 0x1AB3CB0C, - 0x7D24881A, 0x1AE4F1D6, - 0x7D19EEBE, 0x1B161479, - 0x7D0F4218, 0x1B4732EF, - 0x7D048228, 0x1B784D30, - 0x7CF9AEF0, 0x1BA96334, - 0x7CEEC873, 0x1BDA74F5, - 0x7CE3CEB1, 0x1C0B826A, - 0x7CD8C1AD, 0x1C3C8B8C, - 0x7CCDA168, 0x1C6D9053, - 0x7CC26DE5, 0x1C9E90B8, - 0x7CB72724, 0x1CCF8CB3, - 0x7CABCD27, 0x1D00843C, - 0x7CA05FF1, 0x1D31774D, - 0x7C94DF82, 0x1D6265DD, - 0x7C894BDD, 0x1D934FE5, - 0x7C7DA504, 0x1DC4355D, - 0x7C71EAF8, 0x1DF5163F, - 0x7C661DBB, 0x1E25F281, - 0x7C5A3D4F, 0x1E56CA1E, - 0x7C4E49B6, 0x1E879D0C, - 0x7C4242F2, 0x1EB86B46, - 0x7C362904, 0x1EE934C2, - 0x7C29FBEE, 0x1F19F97B, - 0x7C1DBBB2, 0x1F4AB967, - 0x7C116853, 0x1F7B7480, - 0x7C0501D1, 0x1FAC2ABF, - 0x7BF88830, 0x1FDCDC1A, - 0x7BEBFB70, 0x200D888C, - 0x7BDF5B94, 0x203E300D, - 0x7BD2A89E, 0x206ED295, - 0x7BC5E28F, 0x209F701C, - 0x7BB9096A, 0x20D0089B, - 0x7BAC1D31, 0x21009C0B, - 0x7B9F1DE5, 0x21312A65, - 0x7B920B89, 0x2161B39F, - 0x7B84E61E, 0x219237B4, - 0x7B77ADA8, 0x21C2B69C, - 0x7B6A6227, 0x21F3304E, - 0x7B5D039D, 0x2223A4C5, - 0x7B4F920E, 0x225413F8, - 0x7B420D7A, 0x22847DDF, - 0x7B3475E4, 0x22B4E274, - 0x7B26CB4F, 0x22E541AE, - 0x7B190DBB, 0x23159B87, - 0x7B0B3D2C, 0x2345EFF7, - 0x7AFD59A3, 0x23763EF7, - 0x7AEF6323, 0x23A6887E, - 0x7AE159AE, 0x23D6CC86, - 0x7AD33D45, 0x24070B07, - 0x7AC50DEB, 0x243743FA, - 0x7AB6CBA3, 0x24677757, - 0x7AA8766E, 0x2497A517, - 0x7A9A0E4F, 0x24C7CD32, - 0x7A8B9348, 0x24F7EFA1, - 0x7A7D055B, 0x25280C5D, - 0x7A6E648A, 0x2558235E, - 0x7A5FB0D8, 0x2588349D, - 0x7A50EA46, 0x25B84012, - 0x7A4210D8, 0x25E845B5, - 0x7A33248F, 0x26184581, - 0x7A24256E, 0x26483F6C, - 0x7A151377, 0x26783370, - 0x7A05EEAD, 0x26A82185, - 0x79F6B711, 0x26D809A5, - 0x79E76CA6, 0x2707EBC6, - 0x79D80F6F, 0x2737C7E3, - 0x79C89F6D, 0x27679DF4, - 0x79B91CA4, 0x27976DF1, - 0x79A98715, 0x27C737D2, - 0x7999DEC3, 0x27F6FB92, - 0x798A23B1, 0x2826B928, - 0x797A55E0, 0x2856708C, - 0x796A7554, 0x288621B9, - 0x795A820E, 0x28B5CCA5, - 0x794A7C11, 0x28E5714A, - 0x793A6360, 0x29150FA1, - 0x792A37FE, 0x2944A7A2, - 0x7919F9EB, 0x29743945, - 0x7909A92C, 0x29A3C484, - 0x78F945C3, 0x29D34958, - 0x78E8CFB1, 0x2A02C7B8, - 0x78D846FB, 0x2A323F9D, - 0x78C7ABA1, 0x2A61B101, - 0x78B6FDA8, 0x2A911BDB, - 0x78A63D10, 0x2AC08025, - 0x789569DE, 0x2AEFDDD8, - 0x78848413, 0x2B1F34EB, - 0x78738BB3, 0x2B4E8558, - 0x786280BF, 0x2B7DCF17, - 0x7851633B, 0x2BAD1221, - 0x78403328, 0x2BDC4E6F, - 0x782EF08B, 0x2C0B83F9, - 0x781D9B64, 0x2C3AB2B9, - 0x780C33B8, 0x2C69DAA6, - 0x77FAB988, 0x2C98FBBA, - 0x77E92CD8, 0x2CC815ED, - 0x77D78DAA, 0x2CF72939, - 0x77C5DC01, 0x2D263595, - 0x77B417DF, 0x2D553AFB, - 0x77A24148, 0x2D843963, - 0x7790583D, 0x2DB330C7, - 0x777E5CC3, 0x2DE2211E, - 0x776C4EDB, 0x2E110A62, - 0x775A2E88, 0x2E3FEC8B, - 0x7747FBCE, 0x2E6EC792, - 0x7735B6AE, 0x2E9D9B70, - 0x77235F2D, 0x2ECC681E, - 0x7710F54B, 0x2EFB2D94, - 0x76FE790E, 0x2F29EBCC, - 0x76EBEA77, 0x2F58A2BD, - 0x76D94988, 0x2F875262, - 0x76C69646, 0x2FB5FAB2, - 0x76B3D0B3, 0x2FE49BA6, - 0x76A0F8D2, 0x30133538, - 0x768E0EA5, 0x3041C760, - 0x767B1230, 0x30705217, - 0x76680376, 0x309ED555, - 0x7654E279, 0x30CD5114, - 0x7641AF3C, 0x30FBC54D, - 0x762E69C3, 0x312A31F8, - 0x761B1211, 0x3158970D, - 0x7607A827, 0x3186F487, - 0x75F42C0A, 0x31B54A5D, - 0x75E09DBD, 0x31E39889, - 0x75CCFD42, 0x3211DF03, - 0x75B94A9C, 0x32401DC5, - 0x75A585CF, 0x326E54C7, - 0x7591AEDD, 0x329C8402, - 0x757DC5CA, 0x32CAAB6F, - 0x7569CA98, 0x32F8CB07, - 0x7555BD4B, 0x3326E2C2, - 0x75419DE6, 0x3354F29A, - 0x752D6C6C, 0x3382FA88, - 0x751928E0, 0x33B0FA84, - 0x7504D345, 0x33DEF287, - 0x74F06B9E, 0x340CE28A, - 0x74DBF1EF, 0x343ACA87, - 0x74C7663A, 0x3468AA76, - 0x74B2C883, 0x3496824F, - 0x749E18CD, 0x34C4520D, - 0x7489571B, 0x34F219A7, - 0x74748371, 0x351FD917, - 0x745F9DD1, 0x354D9056, - 0x744AA63E, 0x357B3F5D, - 0x74359CBD, 0x35A8E624, - 0x74208150, 0x35D684A5, - 0x740B53FA, 0x36041AD9, - 0x73F614C0, 0x3631A8B7, - 0x73E0C3A3, 0x365F2E3B, - 0x73CB60A7, 0x368CAB5C, - 0x73B5EBD0, 0x36BA2013, - 0x73A06522, 0x36E78C5A, - 0x738ACC9E, 0x3714F02A, - 0x73752249, 0x37424B7A, - 0x735F6626, 0x376F9E46, - 0x73499838, 0x379CE884, - 0x7333B883, 0x37CA2A30, - 0x731DC709, 0x37F76340, - 0x7307C3D0, 0x382493B0, - 0x72F1AED8, 0x3851BB76, - 0x72DB8828, 0x387EDA8E, - 0x72C54FC0, 0x38ABF0EF, - 0x72AF05A6, 0x38D8FE93, - 0x7298A9DC, 0x39060372, - 0x72823C66, 0x3932FF87, - 0x726BBD48, 0x395FF2C9, - 0x72552C84, 0x398CDD32, - 0x723E8A1F, 0x39B9BEBB, - 0x7227D61C, 0x39E6975D, - 0x7211107D, 0x3A136712, - 0x71FA3948, 0x3A402DD1, - 0x71E3507F, 0x3A6CEB95, - 0x71CC5626, 0x3A99A057, - 0x71B54A40, 0x3AC64C0F, - 0x719E2CD2, 0x3AF2EEB7, - 0x7186FDDE, 0x3B1F8847, - 0x716FBD68, 0x3B4C18BA, - 0x71586B73, 0x3B78A007, - 0x71410804, 0x3BA51E29, - 0x7129931E, 0x3BD19317, - 0x71120CC5, 0x3BFDFECD, - 0x70FA74FB, 0x3C2A6142, - 0x70E2CBC6, 0x3C56BA70, - 0x70CB1127, 0x3C830A4F, - 0x70B34524, 0x3CAF50DA, - 0x709B67C0, 0x3CDB8E09, - 0x708378FE, 0x3D07C1D5, - 0x706B78E3, 0x3D33EC39, - 0x70536771, 0x3D600D2B, - 0x703B44AC, 0x3D8C24A7, - 0x70231099, 0x3DB832A5, - 0x700ACB3B, 0x3DE4371F, - 0x6FF27496, 0x3E10320D, - 0x6FDA0CAD, 0x3E3C2369, - 0x6FC19385, 0x3E680B2C, - 0x6FA90920, 0x3E93E94F, - 0x6F906D84, 0x3EBFBDCC, - 0x6F77C0B3, 0x3EEB889C, - 0x6F5F02B1, 0x3F1749B7, - 0x6F463383, 0x3F430118, - 0x6F2D532C, 0x3F6EAEB8, - 0x6F1461AF, 0x3F9A528F, - 0x6EFB5F12, 0x3FC5EC97, - 0x6EE24B57, 0x3FF17CCA, - 0x6EC92682, 0x401D0320, - 0x6EAFF098, 0x40487F93, - 0x6E96A99C, 0x4073F21D, - 0x6E7D5193, 0x409F5AB6, - 0x6E63E87F, 0x40CAB957, - 0x6E4A6E65, 0x40F60DFB, - 0x6E30E349, 0x4121589A, - 0x6E17472F, 0x414C992E, - 0x6DFD9A1B, 0x4177CFB0, - 0x6DE3DC11, 0x41A2FC1A, - 0x6DCA0D14, 0x41CE1E64, - 0x6DB02D29, 0x41F93688, - 0x6D963C54, 0x42244480, - 0x6D7C3A98, 0x424F4845, - 0x6D6227FA, 0x427A41D0, - 0x6D48047E, 0x42A5311A, - 0x6D2DD027, 0x42D0161E, - 0x6D138AFA, 0x42FAF0D4, - 0x6CF934FB, 0x4325C135, - 0x6CDECE2E, 0x4350873C, - 0x6CC45697, 0x437B42E1, - 0x6CA9CE3A, 0x43A5F41E, - 0x6C8F351C, 0x43D09AEC, - 0x6C748B3F, 0x43FB3745, - 0x6C59D0A9, 0x4425C923, - 0x6C3F055D, 0x4450507E, - 0x6C242960, 0x447ACD50, - 0x6C093CB6, 0x44A53F93, - 0x6BEE3F62, 0x44CFA73F, - 0x6BD3316A, 0x44FA044F, - 0x6BB812D0, 0x452456BC, - 0x6B9CE39B, 0x454E9E80, - 0x6B81A3CD, 0x4578DB93, - 0x6B66536A, 0x45A30DF0, - 0x6B4AF278, 0x45CD358F, - 0x6B2F80FA, 0x45F7526B, - 0x6B13FEF5, 0x4621647C, - 0x6AF86C6C, 0x464B6BBD, - 0x6ADCC964, 0x46756827, - 0x6AC115E1, 0x469F59B4, - 0x6AA551E8, 0x46C9405C, - 0x6A897D7D, 0x46F31C1A, - 0x6A6D98A4, 0x471CECE6, - 0x6A51A361, 0x4746B2BC, - 0x6A359DB9, 0x47706D93, - 0x6A1987B0, 0x479A1D66, - 0x69FD614A, 0x47C3C22E, - 0x69E12A8C, 0x47ED5BE6, - 0x69C4E37A, 0x4816EA85, - 0x69A88C18, 0x48406E07, - 0x698C246C, 0x4869E664, - 0x696FAC78, 0x48935397, - 0x69532442, 0x48BCB598, - 0x69368BCE, 0x48E60C62, - 0x6919E320, 0x490F57EE, - 0x68FD2A3D, 0x49389836, - 0x68E06129, 0x4961CD32, - 0x68C387E9, 0x498AF6DE, - 0x68A69E81, 0x49B41533, - 0x6889A4F5, 0x49DD282A, - 0x686C9B4B, 0x4A062FBD, - 0x684F8186, 0x4A2F2BE5, - 0x683257AA, 0x4A581C9D, - 0x68151DBE, 0x4A8101DE, - 0x67F7D3C4, 0x4AA9DBA1, - 0x67DA79C2, 0x4AD2A9E1, - 0x67BD0FBC, 0x4AFB6C97, - 0x679F95B7, 0x4B2423BD, - 0x67820BB6, 0x4B4CCF4D, - 0x676471C0, 0x4B756F3F, - 0x6746C7D7, 0x4B9E038F, - 0x67290E02, 0x4BC68C36, - 0x670B4443, 0x4BEF092D, - 0x66ED6AA1, 0x4C177A6E, - 0x66CF811F, 0x4C3FDFF3, - 0x66B187C3, 0x4C6839B6, - 0x66937E90, 0x4C9087B1, - 0x6675658C, 0x4CB8C9DD, - 0x66573CBB, 0x4CE10034, - 0x66390422, 0x4D092AB0, - 0x661ABBC5, 0x4D31494B, - 0x65FC63A9, 0x4D595BFE, - 0x65DDFBD3, 0x4D8162C4, - 0x65BF8447, 0x4DA95D96, - 0x65A0FD0B, 0x4DD14C6E, - 0x65826622, 0x4DF92F45, - 0x6563BF92, 0x4E210617, - 0x6545095F, 0x4E48D0DC, - 0x6526438E, 0x4E708F8F, - 0x65076E24, 0x4E984229, - 0x64E88926, 0x4EBFE8A4, - 0x64C99498, 0x4EE782FA, - 0x64AA907F, 0x4F0F1126, - 0x648B7CDF, 0x4F369320, - 0x646C59BF, 0x4F5E08E3, - 0x644D2722, 0x4F857268, - 0x642DE50D, 0x4FACCFAB, - 0x640E9385, 0x4FD420A3, - 0x63EF328F, 0x4FFB654D, - 0x63CFC230, 0x50229DA0, - 0x63B0426D, 0x5049C999, - 0x6390B34A, 0x5070E92F, - 0x637114CC, 0x5097FC5E, - 0x635166F8, 0x50BF031F, - 0x6331A9D4, 0x50E5FD6C, - 0x6311DD63, 0x510CEB40, - 0x62F201AC, 0x5133CC94, - 0x62D216B2, 0x515AA162, - 0x62B21C7B, 0x518169A4, - 0x6292130C, 0x51A82555, - 0x6271FA69, 0x51CED46E, - 0x6251D297, 0x51F576E9, - 0x62319B9D, 0x521C0CC1, - 0x6211557D, 0x524295EF, - 0x61F1003E, 0x5269126E, - 0x61D09BE5, 0x528F8237, - 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0x8022B113, 0x05E36EA9, - 0x80206AF8, 0x05B137DF, - 0x801E3894, 0x057F0034, - 0x801C19E9, 0x054CC7B0, - 0x801A0EF7, 0x051A8E5C, - 0x801817BF, 0x04E8543D, - 0x80163440, 0x04B6195D, - 0x8014647A, 0x0483DDC3, - 0x8012A86F, 0x0451A176, - 0x8011001E, 0x041F647F, - 0x800F6B88, 0x03ED26E6, - 0x800DEAAC, 0x03BAE8B1, - 0x800C7D8C, 0x0388A9E9, - 0x800B2427, 0x03566A96, - 0x8009DE7D, 0x03242ABF, - 0x8008AC90, 0x02F1EA6B, - 0x80078E5E, 0x02BFA9A4, - 0x800683E8, 0x028D6870, - 0x80058D2E, 0x025B26D7, - 0x8004AA31, 0x0228E4E1, - 0x8003DAF0, 0x01F6A296, - 0x80031F6C, 0x01C45FFE, - 0x800277A5, 0x01921D1F, - 0x8001E39B, 0x015FDA03, - 0x8001634D, 0x012D96B0, - 0x8000F6BD, 0x00FB532F, - 0x80009DE9, 0x00C90F88, - 0x800058D3, 0x0096CBC1, - 0x8000277A, 0x006487E3, - 0x800009DE, 0x003243F5, - 0x80000000, 0x00000000, - 0x800009DE, 0xFFCDBC0A, - 0x8000277A, 0xFF9B781D, - 0x800058D3, 0xFF69343E, - 0x80009DE9, 0xFF36F078, - 0x8000F6BD, 0xFF04ACD0, - 0x8001634D, 0xFED2694F, - 0x8001E39B, 0xFEA025FC, - 0x800277A5, 0xFE6DE2E0, - 0x80031F6C, 0xFE3BA001, - 0x8003DAF0, 0xFE095D69, - 0x8004AA31, 0xFDD71B1E, - 0x80058D2E, 0xFDA4D928, - 0x800683E8, 0xFD72978F, - 0x80078E5E, 0xFD40565B, - 0x8008AC90, 0xFD0E1594, - 0x8009DE7D, 0xFCDBD541, - 0x800B2427, 0xFCA99569, - 0x800C7D8C, 0xFC775616, - 0x800DEAAC, 0xFC45174E, - 0x800F6B88, 0xFC12D919, - 0x8011001E, 0xFBE09B80, - 0x8012A86F, 0xFBAE5E89, - 0x8014647A, 0xFB7C223C, - 0x80163440, 0xFB49E6A2, - 0x801817BF, 0xFB17ABC2, - 0x801A0EF7, 0xFAE571A4, - 0x801C19E9, 0xFAB3384F, - 0x801E3894, 0xFA80FFCB, - 0x80206AF8, 0xFA4EC820, - 0x8022B113, 0xFA1C9156, - 0x80250AE7, 0xF9EA5B75, - 0x80277872, 0xF9B82683, - 0x8029F9B4, 0xF985F28A, - 0x802C8EAD, 0xF953BF90, - 0x802F375C, 0xF9218D9E, - 0x8031F3C1, 0xF8EF5CBB, - 0x8034C3DC, 0xF8BD2CEF, - 0x8037A7AC, 0xF88AFE41, - 0x803A9F31, 0xF858D0BA, - 0x803DAA69, 0xF826A461, - 0x8040C956, 0xF7F4793E, - 0x8043FBF6, 0xF7C24F58, - 0x80474248, 0xF79026B8, - 0x804A9C4D, 0xF75DFF65, - 0x804E0A03, 0xF72BD967, - 0x80518B6B, 0xF6F9B4C5, - 0x80552083, 0xF6C79188, - 0x8058C94C, 0xF6956FB6, - 0x805C85C3, 0xF6634F58, - 0x806055EA, 0xF6313076, - 0x806439C0, 0xF5FF1317, - 0x80683143, 0xF5CCF743, - 0x806C3C73, 0xF59ADD01, - 0x80705B50, 0xF568C45A, - 0x80748DD9, 0xF536AD55, - 0x8078D40D, 0xF50497FA, - 0x807D2DEB, 0xF4D28451, - 0x80819B74, 0xF4A07260, - 0x80861CA5, 0xF46E6231, - 0x808AB180, 0xF43C53CA, - 0x808F5A02, 0xF40A4734, - 0x8094162B, 0xF3D83C76, - 0x8098E5FB, 0xF3A63398, - 0x809DC970, 0xF3742CA1, - 0x80A2C08B, 0xF342279A, - 0x80A7CB49, 0xF310248A, - 0x80ACE9AB, 0xF2DE2378, - 0x80B21BAF, 0xF2AC246D, - 0x80B76155, 0xF27A2770, - 0x80BCBA9C, 0xF2482C89, - 0x80C22783, 0xF21633C0, - 0x80C7A80A, 0xF1E43D1C, - 0x80CD3C2F, 0xF1B248A5, - 0x80D2E3F1, 0xF1805662, - 0x80D89F51, 0xF14E665C, - 0x80DE6E4C, 0xF11C789A, - 0x80E450E2, 0xF0EA8D23, - 0x80EA4712, 0xF0B8A401, - 0x80F050DB, 0xF086BD39, - 0x80F66E3C, 0xF054D8D4, - 0x80FC9F35, 0xF022F6DA, - 0x8102E3C3, 0xEFF11752, - 0x81093BE8, 0xEFBF3A44, - 0x810FA7A0, 0xEF8D5FB8, - 0x811626EC, 0xEF5B87B5, - 0x811CB9CA, 0xEF29B243, - 0x81236039, 0xEEF7DF6A, - 0x812A1A39, 0xEEC60F31, - 0x8130E7C8, 0xEE9441A0, - 0x8137C8E6, 0xEE6276BF, - 0x813EBD90, 0xEE30AE95, - 0x8145C5C6, 0xEDFEE92B, - 0x814CE188, 0xEDCD2687, - 0x815410D3, 0xED9B66B2, - 0x815B53A8, 0xED69A9B2, - 0x8162AA03, 0xED37EF91, - 0x816A13E6, 0xED063855, - 0x8171914E, 0xECD48406, - 0x8179223A, 0xECA2D2AC, - 0x8180C6A9, 0xEC71244F, - 0x81887E9A, 0xEC3F78F5, - 0x81904A0C, 0xEC0DD0A8, - 0x819828FD, 0xEBDC2B6D, - 0x81A01B6C, 0xEBAA894E, - 0x81A82159, 0xEB78EA52, - 0x81B03AC1, 0xEB474E80, - 0x81B867A4, 0xEB15B5E0, - 0x81C0A801, 0xEAE4207A, - 0x81C8FBD5, 0xEAB28E55, - 0x81D16320, 0xEA80FF79, - 0x81D9DDE1, 0xEA4F73EE, - 0x81E26C16, 0xEA1DEBBB, - 0x81EB0DBD, 0xE9EC66E8, - 0x81F3C2D7, 0xE9BAE57C, - 0x81FC8B60, 0xE9896780, - 0x82056758, 0xE957ECFB, - 0x820E56BE, 0xE92675F4, - 0x8217598F, 0xE8F50273, - 0x82206FCB, 0xE8C3927F, - 0x82299971, 0xE8922621, - 0x8232D67E, 0xE860BD60, - 0x823C26F2, 0xE82F5844, - 0x82458ACB, 0xE7FDF6D3, - 0x824F0208, 0xE7CC9917, - 0x82588CA6, 0xE79B3F16, - 0x82622AA5, 0xE769E8D8, - 0x826BDC04, 0xE7389664, - 0x8275A0C0, 0xE70747C3, - 0x827F78D8, 0xE6D5FCFC, - 0x8289644A, 0xE6A4B616, - 0x82936316, 0xE6737319, - 0x829D753A, 0xE642340D, - 0x82A79AB3, 0xE610F8F9, - 0x82B1D381, 0xE5DFC1E4, - 0x82BC1FA1, 0xE5AE8ED8, - 0x82C67F13, 0xE57D5FDA, - 0x82D0F1D5, 0xE54C34F3, - 0x82DB77E5, 0xE51B0E2A, - 0x82E61141, 0xE4E9EB86, - 0x82F0BDE8, 0xE4B8CD10, - 0x82FB7DD8, 0xE487B2CF, - 0x8306510F, 0xE4569CCB, - 0x8311378C, 0xE4258B0A, - 0x831C314E, 0xE3F47D95, - 0x83273E52, 0xE3C37473, - 0x83325E97, 0xE3926FAC, - 0x833D921A, 0xE3616F47, - 0x8348D8DB, 0xE330734C, - 0x835432D8, 0xE2FF7BC3, - 0x835FA00E, 0xE2CE88B2, - 0x836B207D, 0xE29D9A22, - 0x8376B422, 0xE26CB01A, - 0x83825AFB, 0xE23BCAA2, - 0x838E1507, 0xE20AE9C1, - 0x8399E244, 0xE1DA0D7E, - 0x83A5C2B0, 0xE1A935E1, - 0x83B1B649, 0xE17862F3, - 0x83BDBD0D, 0xE14794B9, - 0x83C9D6FB, 0xE116CB3D, - 0x83D60411, 0xE0E60684, - 0x83E2444D, 0xE0B54698, - 0x83EE97AC, 0xE0848B7F, - 0x83FAFE2E, 0xE053D541, - 0x840777CF, 0xE02323E5, - 0x8414048F, 0xDFF27773, - 0x8420A46B, 0xDFC1CFF2, - 0x842D5761, 0xDF912D6A, - 0x843A1D70, 0xDF608FE3, - 0x8446F695, 0xDF2FF764, - 0x8453E2CE, 0xDEFF63F4, - 0x8460E21A, 0xDECED59B, - 0x846DF476, 0xDE9E4C60, - 0x847B19E1, 0xDE6DC84B, - 0x84885257, 0xDE3D4963, - 0x84959DD9, 0xDE0CCFB1, - 0x84A2FC62, 0xDDDC5B3A, - 0x84B06DF1, 0xDDABEC07, - 0x84BDF285, 0xDD7B8220, - 0x84CB8A1B, 0xDD4B1D8B, - 0x84D934B0, 0xDD1ABE51, - 0x84E6F244, 0xDCEA6478, - 0x84F4C2D3, 0xDCBA1008, - 0x8502A65C, 0xDC89C108, - 0x85109CDC, 0xDC597781, - 0x851EA652, 0xDC293379, - 0x852CC2BA, 0xDBF8F4F8, - 0x853AF214, 0xDBC8BC05, - 0x8549345C, 0xDB9888A8, - 0x85578991, 0xDB685AE8, - 0x8565F1B0, 0xDB3832CD, - 0x85746CB7, 0xDB08105E, - 0x8582FAA4, 0xDAD7F3A2, - 0x85919B75, 0xDAA7DCA1, - 0x85A04F28, 0xDA77CB62, - 0x85AF15B9, 0xDA47BFED, - 0x85BDEF27, 0xDA17BA4A, - 0x85CCDB70, 0xD9E7BA7E, - 0x85DBDA91, 0xD9B7C093, - 0x85EAEC88, 0xD987CC8F, - 0x85FA1152, 0xD957DE7A, - 0x860948EE, 0xD927F65B, - 0x86189359, 0xD8F81439, - 0x8627F090, 0xD8C8381C, - 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0x88CA4951, 0xD162648F, - 0x88DCA0D3, 0xD13397E1, - 0x88EF0AB4, 0xD104D26B, - 0x890186F1, 0xD0D61433, - 0x89141589, 0xD0A75D42, - 0x8926B677, 0xD078AD9D, - 0x893969B9, 0xD04A054D, - 0x894C2F4C, 0xD01B6459, - 0x895F072D, 0xCFECCAC7, - 0x8971F15A, 0xCFBE389F, - 0x8984EDCF, 0xCF8FADE8, - 0x8997FC89, 0xCF612AAA, - 0x89AB1D86, 0xCF32AEEB, - 0x89BE50C3, 0xCF043AB2, - 0x89D1963C, 0xCED5CE08, - 0x89E4EDEE, 0xCEA768F2, - 0x89F857D8, 0xCE790B78, - 0x8A0BD3F5, 0xCE4AB5A2, - 0x8A1F6242, 0xCE1C6776, - 0x8A3302BD, 0xCDEE20FC, - 0x8A46B563, 0xCDBFE23A, - 0x8A5A7A30, 0xCD91AB38, - 0x8A6E5122, 0xCD637BFD, - 0x8A823A35, 0xCD355490, - 0x8A963567, 0xCD0734F8, - 0x8AAA42B4, 0xCCD91D3D, - 0x8ABE6219, 0xCCAB0D65, - 0x8AD29393, 0xCC7D0577, - 0x8AE6D71F, 0xCC4F057B, - 0x8AFB2CBA, 0xCC210D78, - 0x8B0F9461, 0xCBF31D75, - 0x8B240E10, 0xCBC53578, - 0x8B3899C5, 0xCB975589, - 0x8B4D377C, 0xCB697DB0, - 0x8B61E732, 0xCB3BADF2, - 0x8B76A8E4, 0xCB0DE658, - 0x8B8B7C8F, 0xCAE026E8, - 0x8BA0622F, 0xCAB26FA9, - 0x8BB559C1, 0xCA84C0A2, - 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0x8F34EED8, 0xC37CF5B0, - 0x8F4CBADB, 0xC350AF25, - 0x8F64983F, 0xC32471F6, - 0x8F7C8701, 0xC2F83E2A, - 0x8F94871D, 0xC2CC13C7, - 0x8FAC988E, 0xC29FF2D4, - 0x8FC4BB53, 0xC273DB58, - 0x8FDCEF66, 0xC247CD5A, - 0x8FF534C4, 0xC21BC8E0, - 0x900D8B69, 0xC1EFCDF2, - 0x9025F352, 0xC1C3DC96, - 0x903E6C7A, 0xC197F4D3, - 0x9056F6DF, 0xC16C16B0, - 0x906F927B, 0xC1404233, - 0x90883F4C, 0xC1147763, - 0x90A0FD4E, 0xC0E8B648, - 0x90B9CC7C, 0xC0BCFEE7, - 0x90D2ACD3, 0xC0915147, - 0x90EB9E50, 0xC065AD70, - 0x9104A0ED, 0xC03A1368, - 0x911DB4A8, 0xC00E8335, - 0x9136D97D, 0xBFE2FCDF, - 0x91500F67, 0xBFB7806C, - 0x91695663, 0xBF8C0DE2, - 0x9182AE6C, 0xBF60A54A, - 0x919C1780, 0xBF3546A8, - 0x91B5919A, 0xBF09F204, - 0x91CF1CB6, 0xBEDEA765, - 0x91E8B8D0, 0xBEB366D1, - 0x920265E4, 0xBE88304F, - 0x921C23EE, 0xBE5D03E5, - 0x9235F2EB, 0xBE31E19B, - 0x924FD2D6, 0xBE06C977, - 0x9269C3AC, 0xBDDBBB7F, - 0x9283C567, 0xBDB0B7BA, - 0x929DD805, 0xBD85BE2F, - 0x92B7FB82, 0xBD5ACEE5, - 0x92D22FD8, 0xBD2FE9E1, - 0x92EC7505, 0xBD050F2C, - 0x9306CB04, 0xBCDA3ECA, - 0x932131D1, 0xBCAF78C3, - 0x933BA968, 0xBC84BD1E, - 0x935631C5, 0xBC5A0BE1, - 0x9370CAE4, 0xBC2F6513, - 0x938B74C0, 0xBC04C8BA, - 0x93A62F56, 0xBBDA36DC, - 0x93C0FAA2, 0xBBAFAF81, - 0x93DBD69F, 0xBB8532AF, - 0x93F6C34A, 0xBB5AC06C, - 0x9411C09D, 0xBB3058C0, - 0x942CCE95, 0xBB05FBB0, - 0x9447ED2F, 0xBADBA943, - 0x94631C64, 0xBAB1617F, - 0x947E5C32, 0xBA87246C, - 0x9499AC95, 0xBA5CF210, - 0x94B50D87, 0xBA32CA70, - 0x94D07F05, 0xBA08AD94, - 0x94EC010B, 0xB9DE9B83, - 0x95079393, 0xB9B49442, - 0x9523369B, 0xB98A97D8, - 0x953EEA1E, 0xB960A64B, - 0x955AAE17, 0xB936BFA3, - 0x95768282, 0xB90CE3E6, - 0x9592675B, 0xB8E31319, - 0x95AE5C9E, 0xB8B94D44, - 0x95CA6246, 0xB88F926C, - 0x95E6784F, 0xB865E299, - 0x96029EB5, 0xB83C3DD1, - 0x961ED573, 0xB812A419, - 0x963B1C85, 0xB7E9157A, - 0x965773E7, 0xB7BF91F8, - 0x9673DB94, 0xB796199B, - 0x96905387, 0xB76CAC68, - 0x96ACDBBD, 0xB7434A67, - 0x96C97431, 0xB719F39D, - 0x96E61CDF, 0xB6F0A811, - 0x9702D5C2, 0xB6C767CA, - 0x971F9ED6, 0xB69E32CD, - 0x973C7816, 0xB6750921, - 0x9759617E, 0xB64BEACC, - 0x97765B0A, 0xB622D7D5, - 0x979364B5, 0xB5F9D042, - 0x97B07E7A, 0xB5D0D41A, - 0x97CDA855, 0xB5A7E362, - 0x97EAE241, 0xB57EFE21, - 0x98082C3B, 0xB556245E, - 0x9825863D, 0xB52D561E, - 0x9842F043, 0xB5049368, - 0x98606A48, 0xB4DBDC42, - 0x987DF449, 0xB4B330B2, - 0x989B8E3F, 0xB48A90C0, - 0x98B93828, 0xB461FC70, - 0x98D6F1FE, 0xB43973C9, - 0x98F4BBBC, 0xB410F6D2, - 0x9912955E, 0xB3E88591, - 0x99307EE0, 0xB3C0200C, - 0x994E783C, 0xB397C649, - 0x996C816F, 0xB36F784E, - 0x998A9A73, 0xB3473622, - 0x99A8C344, 0xB31EFFCB, - 0x99C6FBDE, 0xB2F6D54F, - 0x99E5443A, 0xB2CEB6B5, - 0x9A039C56, 0xB2A6A401, - 0x9A22042C, 0xB27E9D3B, - 0x9A407BB8, 0xB256A26A, - 0x9A5F02F5, 0xB22EB392, - 0x9A7D99DD, 0xB206D0BA, - 0x9A9C406D, 0xB1DEF9E8, - 0x9ABAF6A0, 0xB1B72F23, - 0x9AD9BC71, 0xB18F7070, - 0x9AF891DB, 0xB167BDD6, - 0x9B1776D9, 0xB140175B, - 0x9B366B67, 0xB1187D05, - 0x9B556F80, 0xB0F0EEDA, - 0x9B748320, 0xB0C96CDF, - 0x9B93A640, 0xB0A1F71C, - 0x9BB2D8DD, 0xB07A8D97, - 0x9BD21AF2, 0xB0533055, - 0x9BF16C7A, 0xB02BDF5C, - 0x9C10CD70, 0xB0049AB2, - 0x9C303DCF, 0xAFDD625F, - 0x9C4FBD92, 0xAFB63667, - 0x9C6F4CB5, 0xAF8F16D0, - 0x9C8EEB33, 0xAF6803A1, - 0x9CAE9907, 0xAF40FCE0, - 0x9CCE562B, 0xAF1A0293, - 0x9CEE229C, 0xAEF314BF, - 0x9D0DFE53, 0xAECC336B, - 0x9D2DE94D, 0xAEA55E9D, - 0x9D4DE384, 0xAE7E965B, - 0x9D6DECF4, 0xAE57DAAA, - 0x9D8E0596, 0xAE312B91, - 0x9DAE2D68, 0xAE0A8916, - 0x9DCE6462, 0xADE3F33E, - 0x9DEEAA82, 0xADBD6A10, - 0x9E0EFFC1, 0xAD96ED91, - 0x9E2F641A, 0xAD707DC8, - 0x9E4FD789, 0xAD4A1ABA, - 0x9E705A09, 0xAD23C46D, - 0x9E90EB94, 0xACFD7AE8, - 0x9EB18C26, 0xACD73E30, - 0x9ED23BB9, 0xACB10E4A, - 0x9EF2FA48, 0xAC8AEB3E, - 0x9F13C7D0, 0xAC64D510, - 0x9F34A449, 0xAC3ECBC7, - 0x9F558FB0, 0xAC18CF68, - 0x9F7689FF, 0xABF2DFFA, - 0x9F979331, 0xABCCFD82, - 0x9FB8AB41, 0xABA72806, - 0x9FD9D22A, 0xAB815F8C, - 0x9FFB07E7, 0xAB5BA41A, - 0xA01C4C72, 0xAB35F5B5, - 0xA03D9FC7, 0xAB105464, - 0xA05F01E1, 0xAAEAC02B, - 0xA08072BA, 0xAAC53912, - 0xA0A1F24C, 0xAA9FBF1D, - 0xA0C38094, 0xAA7A5253, - 0xA0E51D8C, 0xAA54F2B9, - 0xA106C92E, 0xAA2FA055, - 0xA1288376, 0xAA0A5B2D, - 0xA14A4C5E, 0xA9E52347, - 0xA16C23E1, 0xA9BFF8A8, - 0xA18E09F9, 0xA99ADB56, - 0xA1AFFEA2, 0xA975CB56, - 0xA1D201D7, 0xA950C8AF, - 0xA1F41391, 0xA92BD366, - 0xA21633CD, 0xA906EB81, - 0xA2386283, 0xA8E21106, - 0xA25A9FB1, 0xA8BD43FA, - 0xA27CEB4F, 0xA8988463, - 0xA29F4559, 0xA873D246, - 0xA2C1ADC9, 0xA84F2DA9, - 0xA2E4249A, 0xA82A9693, - 0xA306A9C7, 0xA8060D08, - 0xA3293D4B, 0xA7E1910E, - 0xA34BDF20, 0xA7BD22AB, - 0xA36E8F40, 0xA798C1E4, - 0xA3914DA7, 0xA7746EC0, - 0xA3B41A4F, 0xA7502943, - 0xA3D6F533, 0xA72BF173, - 0xA3F9DE4D, 0xA707C756, - 0xA41CD598, 0xA6E3AAF2, - 0xA43FDB0F, 0xA6BF9C4B, - 0xA462EEAC, 0xA69B9B68, - 0xA4861069, 0xA677A84E, - 0xA4A94042, 0xA653C302, - 0xA4CC7E31, 0xA62FEB8B, - 0xA4EFCA31, 0xA60C21ED, - 0xA513243B, 0xA5E8662F, - 0xA5368C4B, 0xA5C4B855, - 0xA55A025B, 0xA5A11865, - 0xA57D8666, 0xA57D8666, - 0xA5A11865, 0xA55A025B, - 0xA5C4B855, 0xA5368C4B, - 0xA5E8662F, 0xA513243B, - 0xA60C21ED, 0xA4EFCA31, - 0xA62FEB8B, 0xA4CC7E31, - 0xA653C302, 0xA4A94042, - 0xA677A84E, 0xA4861069, - 0xA69B9B68, 0xA462EEAC, - 0xA6BF9C4B, 0xA43FDB0F, - 0xA6E3AAF2, 0xA41CD598, - 0xA707C756, 0xA3F9DE4D, - 0xA72BF173, 0xA3D6F533, - 0xA7502943, 0xA3B41A4F, - 0xA7746EC0, 0xA3914DA7, - 0xA798C1E4, 0xA36E8F40, - 0xA7BD22AB, 0xA34BDF20, - 0xA7E1910E, 0xA3293D4B, - 0xA8060D08, 0xA306A9C7, - 0xA82A9693, 0xA2E4249A, - 0xA84F2DA9, 0xA2C1ADC9, - 0xA873D246, 0xA29F4559, - 0xA8988463, 0xA27CEB4F, - 0xA8BD43FA, 0xA25A9FB1, - 0xA8E21106, 0xA2386283, - 0xA906EB81, 0xA21633CD, - 0xA92BD366, 0xA1F41391, - 0xA950C8AF, 0xA1D201D7, - 0xA975CB56, 0xA1AFFEA2, - 0xA99ADB56, 0xA18E09F9, - 0xA9BFF8A8, 0xA16C23E1, - 0xA9E52347, 0xA14A4C5E, - 0xAA0A5B2D, 0xA1288376, - 0xAA2FA055, 0xA106C92E, - 0xAA54F2B9, 0xA0E51D8C, - 0xAA7A5253, 0xA0C38094, - 0xAA9FBF1D, 0xA0A1F24C, - 0xAAC53912, 0xA08072BA, - 0xAAEAC02B, 0xA05F01E1, - 0xAB105464, 0xA03D9FC7, - 0xAB35F5B5, 0xA01C4C72, - 0xAB5BA41A, 0x9FFB07E7, - 0xAB815F8C, 0x9FD9D22A, - 0xABA72806, 0x9FB8AB41, - 0xABCCFD82, 0x9F979331, - 0xABF2DFFA, 0x9F7689FF, - 0xAC18CF68, 0x9F558FB0, - 0xAC3ECBC7, 0x9F34A449, - 0xAC64D510, 0x9F13C7D0, - 0xAC8AEB3E, 0x9EF2FA48, - 0xACB10E4A, 0x9ED23BB9, - 0xACD73E30, 0x9EB18C26, - 0xACFD7AE8, 0x9E90EB94, - 0xAD23C46D, 0x9E705A09, - 0xAD4A1ABA, 0x9E4FD789, - 0xAD707DC8, 0x9E2F641A, - 0xAD96ED91, 0x9E0EFFC1, - 0xADBD6A10, 0x9DEEAA82, - 0xADE3F33E, 0x9DCE6462, - 0xAE0A8916, 0x9DAE2D68, - 0xAE312B91, 0x9D8E0596, - 0xAE57DAAA, 0x9D6DECF4, - 0xAE7E965B, 0x9D4DE384, - 0xAEA55E9D, 0x9D2DE94D, - 0xAECC336B, 0x9D0DFE53, - 0xAEF314BF, 0x9CEE229C, - 0xAF1A0293, 0x9CCE562B, - 0xAF40FCE0, 0x9CAE9907, - 0xAF6803A1, 0x9C8EEB33, - 0xAF8F16D0, 0x9C6F4CB5, - 0xAFB63667, 0x9C4FBD92, - 0xAFDD625F, 0x9C303DCF, - 0xB0049AB2, 0x9C10CD70, - 0xB02BDF5C, 0x9BF16C7A, - 0xB0533055, 0x9BD21AF2, - 0xB07A8D97, 0x9BB2D8DD, - 0xB0A1F71C, 0x9B93A640, - 0xB0C96CDF, 0x9B748320, - 0xB0F0EEDA, 0x9B556F80, - 0xB1187D05, 0x9B366B67, - 0xB140175B, 0x9B1776D9, - 0xB167BDD6, 0x9AF891DB, - 0xB18F7070, 0x9AD9BC71, - 0xB1B72F23, 0x9ABAF6A0, - 0xB1DEF9E8, 0x9A9C406D, - 0xB206D0BA, 0x9A7D99DD, - 0xB22EB392, 0x9A5F02F5, - 0xB256A26A, 0x9A407BB8, - 0xB27E9D3B, 0x9A22042C, - 0xB2A6A401, 0x9A039C56, - 0xB2CEB6B5, 0x99E5443A, - 0xB2F6D54F, 0x99C6FBDE, - 0xB31EFFCB, 0x99A8C344, - 0xB3473622, 0x998A9A73, - 0xB36F784E, 0x996C816F, - 0xB397C649, 0x994E783C, - 0xB3C0200C, 0x99307EE0, - 0xB3E88591, 0x9912955E, - 0xB410F6D2, 0x98F4BBBC, - 0xB43973C9, 0x98D6F1FE, - 0xB461FC70, 0x98B93828, - 0xB48A90C0, 0x989B8E3F, - 0xB4B330B2, 0x987DF449, - 0xB4DBDC42, 0x98606A48, - 0xB5049368, 0x9842F043, - 0xB52D561E, 0x9825863D, - 0xB556245E, 0x98082C3B, - 0xB57EFE21, 0x97EAE241, - 0xB5A7E362, 0x97CDA855, - 0xB5D0D41A, 0x97B07E7A, - 0xB5F9D042, 0x979364B5, - 0xB622D7D5, 0x97765B0A, - 0xB64BEACC, 0x9759617E, - 0xB6750921, 0x973C7816, - 0xB69E32CD, 0x971F9ED6, - 0xB6C767CA, 0x9702D5C2, - 0xB6F0A811, 0x96E61CDF, - 0xB719F39D, 0x96C97431, - 0xB7434A67, 0x96ACDBBD, - 0xB76CAC68, 0x96905387, - 0xB796199B, 0x9673DB94, - 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0xBE31E19B, 0x9235F2EB, - 0xBE5D03E5, 0x921C23EE, - 0xBE88304F, 0x920265E4, - 0xBEB366D1, 0x91E8B8D0, - 0xBEDEA765, 0x91CF1CB6, - 0xBF09F204, 0x91B5919A, - 0xBF3546A8, 0x919C1780, - 0xBF60A54A, 0x9182AE6C, - 0xBF8C0DE2, 0x91695663, - 0xBFB7806C, 0x91500F67, - 0xBFE2FCDF, 0x9136D97D, - 0xC00E8335, 0x911DB4A8, - 0xC03A1368, 0x9104A0ED, - 0xC065AD70, 0x90EB9E50, - 0xC0915147, 0x90D2ACD3, - 0xC0BCFEE7, 0x90B9CC7C, - 0xC0E8B648, 0x90A0FD4E, - 0xC1147763, 0x90883F4C, - 0xC1404233, 0x906F927B, - 0xC16C16B0, 0x9056F6DF, - 0xC197F4D3, 0x903E6C7A, - 0xC1C3DC96, 0x9025F352, - 0xC1EFCDF2, 0x900D8B69, - 0xC21BC8E0, 0x8FF534C4, - 0xC247CD5A, 0x8FDCEF66, - 0xC273DB58, 0x8FC4BB53, - 0xC29FF2D4, 0x8FAC988E, - 0xC2CC13C7, 0x8F94871D, - 0xC2F83E2A, 0x8F7C8701, - 0xC32471F6, 0x8F64983F, - 0xC350AF25, 0x8F4CBADB, - 0xC37CF5B0, 0x8F34EED8, - 0xC3A9458F, 0x8F1D343A, - 0xC3D59EBD, 0x8F058B04, - 0xC4020132, 0x8EEDF33B, - 0xC42E6CE8, 0x8ED66CE1, - 0xC45AE1D7, 0x8EBEF7FB, - 0xC4875FF8, 0x8EA7948C, - 0xC4B3E746, 0x8E904298, - 0xC4E077B8, 0x8E790222, - 0xC50D1148, 0x8E61D32D, - 0xC539B3F0, 0x8E4AB5BF, - 0xC5665FA8, 0x8E33A9D9, - 0xC593146A, 0x8E1CAF80, - 0xC5BFD22E, 0x8E05C6B7, - 0xC5EC98ED, 0x8DEEEF82, - 0xC61968A2, 0x8DD829E4, - 0xC6464144, 0x8DC175E0, - 0xC67322CD, 0x8DAAD37B, - 0xC6A00D36, 0x8D9442B7, - 0xC6CD0079, 0x8D7DC399, - 0xC6F9FC8D, 0x8D675623, - 0xC727016C, 0x8D50FA59, - 0xC7540F10, 0x8D3AB03F, - 0xC7812571, 0x8D2477D8, - 0xC7AE4489, 0x8D0E5127, - 0xC7DB6C50, 0x8CF83C30, - 0xC8089CBF, 0x8CE238F6, - 0xC835D5D0, 0x8CCC477D, - 0xC863177B, 0x8CB667C7, - 0xC89061BA, 0x8CA099D9, - 0xC8BDB485, 0x8C8ADDB6, - 0xC8EB0FD6, 0x8C753361, - 0xC91873A5, 0x8C5F9ADD, - 0xC945DFEC, 0x8C4A142F, - 0xC97354A3, 0x8C349F58, - 0xC9A0D1C4, 0x8C1F3C5C, - 0xC9CE5748, 0x8C09EB40, - 0xC9FBE527, 0x8BF4AC05, - 0xCA297B5A, 0x8BDF7EAF, - 0xCA5719DB, 0x8BCA6342, - 0xCA84C0A2, 0x8BB559C1, - 0xCAB26FA9, 0x8BA0622F, - 0xCAE026E8, 0x8B8B7C8F, - 0xCB0DE658, 0x8B76A8E4, - 0xCB3BADF2, 0x8B61E732, - 0xCB697DB0, 0x8B4D377C, - 0xCB975589, 0x8B3899C5, - 0xCBC53578, 0x8B240E10, - 0xCBF31D75, 0x8B0F9461, - 0xCC210D78, 0x8AFB2CBA, - 0xCC4F057B, 0x8AE6D71F, - 0xCC7D0577, 0x8AD29393, - 0xCCAB0D65, 0x8ABE6219, - 0xCCD91D3D, 0x8AAA42B4, - 0xCD0734F8, 0x8A963567, - 0xCD355490, 0x8A823A35, - 0xCD637BFD, 0x8A6E5122, - 0xCD91AB38, 0x8A5A7A30, - 0xCDBFE23A, 0x8A46B563, - 0xCDEE20FC, 0x8A3302BD, - 0xCE1C6776, 0x8A1F6242, - 0xCE4AB5A2, 0x8A0BD3F5, - 0xCE790B78, 0x89F857D8, - 0xCEA768F2, 0x89E4EDEE, - 0xCED5CE08, 0x89D1963C, - 0xCF043AB2, 0x89BE50C3, - 0xCF32AEEB, 0x89AB1D86, - 0xCF612AAA, 0x8997FC89, - 0xCF8FADE8, 0x8984EDCF, - 0xCFBE389F, 0x8971F15A, - 0xCFECCAC7, 0x895F072D, - 0xD01B6459, 0x894C2F4C, - 0xD04A054D, 0x893969B9, - 0xD078AD9D, 0x8926B677, - 0xD0A75D42, 0x89141589, - 0xD0D61433, 0x890186F1, - 0xD104D26B, 0x88EF0AB4, - 0xD13397E1, 0x88DCA0D3, - 0xD162648F, 0x88CA4951, - 0xD191386D, 0x88B80431, - 0xD1C01374, 0x88A5D177, - 0xD1EEF59E, 0x8893B124, - 0xD21DDEE1, 0x8881A33C, - 0xD24CCF38, 0x886FA7C2, - 0xD27BC69C, 0x885DBEB7, - 0xD2AAC504, 0x884BE820, - 0xD2D9CA6A, 0x883A23FE, - 0xD308D6C6, 0x88287255, - 0xD337EA12, 0x8816D327, - 0xD3670445, 0x88054677, - 0xD3962559, 0x87F3CC47, - 0xD3C54D46, 0x87E2649B, - 0xD3F47C06, 0x87D10F75, - 0xD423B190, 0x87BFCCD7, - 0xD452EDDE, 0x87AE9CC5, - 0xD48230E8, 0x879D7F40, - 0xD4B17AA7, 0x878C744C, - 0xD4E0CB14, 0x877B7BEC, - 0xD5102227, 0x876A9621, - 0xD53F7FDA, 0x8759C2EF, - 0xD56EE424, 0x87490257, - 0xD59E4EFE, 0x8738545E, - 0xD5CDC062, 0x8727B904, - 0xD5FD3847, 0x8717304E, - 0xD62CB6A7, 0x8706BA3C, - 0xD65C3B7B, 0x86F656D3, - 0xD68BC6BA, 0x86E60614, - 0xD6BB585D, 0x86D5C802, - 0xD6EAF05E, 0x86C59C9F, - 0xD71A8EB5, 0x86B583EE, - 0xD74A335A, 0x86A57DF1, - 0xD779DE46, 0x86958AAB, - 0xD7A98F73, 0x8685AA1F, - 0xD7D946D7, 0x8675DC4E, - 0xD809046D, 0x8666213C, - 0xD838C82D, 0x865678EA, - 0xD868920F, 0x8646E35B, - 0xD898620C, 0x86376092, - 0xD8C8381C, 0x8627F090, - 0xD8F81439, 0x86189359, - 0xD927F65B, 0x860948EE, - 0xD957DE7A, 0x85FA1152, - 0xD987CC8F, 0x85EAEC88, - 0xD9B7C093, 0x85DBDA91, - 0xD9E7BA7E, 0x85CCDB70, - 0xDA17BA4A, 0x85BDEF27, - 0xDA47BFED, 0x85AF15B9, - 0xDA77CB62, 0x85A04F28, - 0xDAA7DCA1, 0x85919B75, - 0xDAD7F3A2, 0x8582FAA4, - 0xDB08105E, 0x85746CB7, - 0xDB3832CD, 0x8565F1B0, - 0xDB685AE8, 0x85578991, - 0xDB9888A8, 0x8549345C, - 0xDBC8BC05, 0x853AF214, - 0xDBF8F4F8, 0x852CC2BA, - 0xDC293379, 0x851EA652, - 0xDC597781, 0x85109CDC, - 0xDC89C108, 0x8502A65C, - 0xDCBA1008, 0x84F4C2D3, - 0xDCEA6478, 0x84E6F244, - 0xDD1ABE51, 0x84D934B0, - 0xDD4B1D8B, 0x84CB8A1B, - 0xDD7B8220, 0x84BDF285, - 0xDDABEC07, 0x84B06DF1, - 0xDDDC5B3A, 0x84A2FC62, - 0xDE0CCFB1, 0x84959DD9, - 0xDE3D4963, 0x84885257, - 0xDE6DC84B, 0x847B19E1, - 0xDE9E4C60, 0x846DF476, - 0xDECED59B, 0x8460E21A, - 0xDEFF63F4, 0x8453E2CE, - 0xDF2FF764, 0x8446F695, - 0xDF608FE3, 0x843A1D70, - 0xDF912D6A, 0x842D5761, - 0xDFC1CFF2, 0x8420A46B, - 0xDFF27773, 0x8414048F, - 0xE02323E5, 0x840777CF, - 0xE053D541, 0x83FAFE2E, - 0xE0848B7F, 0x83EE97AC, - 0xE0B54698, 0x83E2444D, - 0xE0E60684, 0x83D60411, - 0xE116CB3D, 0x83C9D6FB, - 0xE14794B9, 0x83BDBD0D, - 0xE17862F3, 0x83B1B649, - 0xE1A935E1, 0x83A5C2B0, - 0xE1DA0D7E, 0x8399E244, - 0xE20AE9C1, 0x838E1507, - 0xE23BCAA2, 0x83825AFB, - 0xE26CB01A, 0x8376B422, - 0xE29D9A22, 0x836B207D, - 0xE2CE88B2, 0x835FA00E, - 0xE2FF7BC3, 0x835432D8, - 0xE330734C, 0x8348D8DB, - 0xE3616F47, 0x833D921A, - 0xE3926FAC, 0x83325E97, - 0xE3C37473, 0x83273E52, - 0xE3F47D95, 0x831C314E, - 0xE4258B0A, 0x8311378C, - 0xE4569CCB, 0x8306510F, - 0xE487B2CF, 0x82FB7DD8, - 0xE4B8CD10, 0x82F0BDE8, - 0xE4E9EB86, 0x82E61141, - 0xE51B0E2A, 0x82DB77E5, - 0xE54C34F3, 0x82D0F1D5, - 0xE57D5FDA, 0x82C67F13, - 0xE5AE8ED8, 0x82BC1FA1, - 0xE5DFC1E4, 0x82B1D381, - 0xE610F8F9, 0x82A79AB3, - 0xE642340D, 0x829D753A, - 0xE6737319, 0x82936316, - 0xE6A4B616, 0x8289644A, - 0xE6D5FCFC, 0x827F78D8, - 0xE70747C3, 0x8275A0C0, - 0xE7389664, 0x826BDC04, - 0xE769E8D8, 0x82622AA5, - 0xE79B3F16, 0x82588CA6, - 0xE7CC9917, 0x824F0208, - 0xE7FDF6D3, 0x82458ACB, - 0xE82F5844, 0x823C26F2, - 0xE860BD60, 0x8232D67E, - 0xE8922621, 0x82299971, - 0xE8C3927F, 0x82206FCB, - 0xE8F50273, 0x8217598F, - 0xE92675F4, 0x820E56BE, - 0xE957ECFB, 0x82056758, - 0xE9896780, 0x81FC8B60, - 0xE9BAE57C, 0x81F3C2D7, - 0xE9EC66E8, 0x81EB0DBD, - 0xEA1DEBBB, 0x81E26C16, - 0xEA4F73EE, 0x81D9DDE1, - 0xEA80FF79, 0x81D16320, - 0xEAB28E55, 0x81C8FBD5, - 0xEAE4207A, 0x81C0A801, - 0xEB15B5E0, 0x81B867A4, - 0xEB474E80, 0x81B03AC1, - 0xEB78EA52, 0x81A82159, - 0xEBAA894E, 0x81A01B6C, - 0xEBDC2B6D, 0x819828FD, - 0xEC0DD0A8, 0x81904A0C, - 0xEC3F78F5, 0x81887E9A, - 0xEC71244F, 0x8180C6A9, - 0xECA2D2AC, 0x8179223A, - 0xECD48406, 0x8171914E, - 0xED063855, 0x816A13E6, - 0xED37EF91, 0x8162AA03, - 0xED69A9B2, 0x815B53A8, - 0xED9B66B2, 0x815410D3, - 0xEDCD2687, 0x814CE188, - 0xEDFEE92B, 0x8145C5C6, - 0xEE30AE95, 0x813EBD90, - 0xEE6276BF, 0x8137C8E6, - 0xEE9441A0, 0x8130E7C8, - 0xEEC60F31, 0x812A1A39, - 0xEEF7DF6A, 0x81236039, - 0xEF29B243, 0x811CB9CA, - 0xEF5B87B5, 0x811626EC, - 0xEF8D5FB8, 0x810FA7A0, - 0xEFBF3A44, 0x81093BE8, - 0xEFF11752, 0x8102E3C3, - 0xF022F6DA, 0x80FC9F35, - 0xF054D8D4, 0x80F66E3C, - 0xF086BD39, 0x80F050DB, - 0xF0B8A401, 0x80EA4712, - 0xF0EA8D23, 0x80E450E2, - 0xF11C789A, 0x80DE6E4C, - 0xF14E665C, 0x80D89F51, - 0xF1805662, 0x80D2E3F1, - 0xF1B248A5, 0x80CD3C2F, - 0xF1E43D1C, 0x80C7A80A, - 0xF21633C0, 0x80C22783, - 0xF2482C89, 0x80BCBA9C, - 0xF27A2770, 0x80B76155, - 0xF2AC246D, 0x80B21BAF, - 0xF2DE2378, 0x80ACE9AB, - 0xF310248A, 0x80A7CB49, - 0xF342279A, 0x80A2C08B, - 0xF3742CA1, 0x809DC970, - 0xF3A63398, 0x8098E5FB, - 0xF3D83C76, 0x8094162B, - 0xF40A4734, 0x808F5A02, - 0xF43C53CA, 0x808AB180, - 0xF46E6231, 0x80861CA5, - 0xF4A07260, 0x80819B74, - 0xF4D28451, 0x807D2DEB, - 0xF50497FA, 0x8078D40D, - 0xF536AD55, 0x80748DD9, - 0xF568C45A, 0x80705B50, - 0xF59ADD01, 0x806C3C73, - 0xF5CCF743, 0x80683143, - 0xF5FF1317, 0x806439C0, - 0xF6313076, 0x806055EA, - 0xF6634F58, 0x805C85C3, - 0xF6956FB6, 0x8058C94C, - 0xF6C79188, 0x80552083, - 0xF6F9B4C5, 0x80518B6B, - 0xF72BD967, 0x804E0A03, - 0xF75DFF65, 0x804A9C4D, - 0xF79026B8, 0x80474248, - 0xF7C24F58, 0x8043FBF6, - 0xF7F4793E, 0x8040C956, - 0xF826A461, 0x803DAA69, - 0xF858D0BA, 0x803A9F31, - 0xF88AFE41, 0x8037A7AC, - 0xF8BD2CEF, 0x8034C3DC, - 0xF8EF5CBB, 0x8031F3C1, - 0xF9218D9E, 0x802F375C, - 0xF953BF90, 0x802C8EAD, - 0xF985F28A, 0x8029F9B4, - 0xF9B82683, 0x80277872, - 0xF9EA5B75, 0x80250AE7, - 0xFA1C9156, 0x8022B113, - 0xFA4EC820, 0x80206AF8, - 0xFA80FFCB, 0x801E3894, - 0xFAB3384F, 0x801C19E9, - 0xFAE571A4, 0x801A0EF7, - 0xFB17ABC2, 0x801817BF, - 0xFB49E6A2, 0x80163440, - 0xFB7C223C, 0x8014647A, - 0xFBAE5E89, 0x8012A86F, - 0xFBE09B80, 0x8011001E, - 0xFC12D919, 0x800F6B88, - 0xFC45174E, 0x800DEAAC, - 0xFC775616, 0x800C7D8C, - 0xFCA99569, 0x800B2427, - 0xFCDBD541, 0x8009DE7D, - 0xFD0E1594, 0x8008AC90, - 0xFD40565B, 0x80078E5E, - 0xFD72978F, 0x800683E8, - 0xFDA4D928, 0x80058D2E, - 0xFDD71B1E, 0x8004AA31, - 0xFE095D69, 0x8003DAF0, - 0xFE3BA001, 0x80031F6C, - 0xFE6DE2E0, 0x800277A5, - 0xFEA025FC, 0x8001E39B, - 0xFED2694F, 0x8001634D, - 0xFF04ACD0, 0x8000F6BD, - 0xFF36F078, 0x80009DE9, - 0xFF69343E, 0x800058D3, - 0xFF9B781D, 0x8000277A, - 0xFFCDBC0A, 0x800009DE -}; - - - -/* -* @brief q15 Twiddle factors Table -*/ - - -/** -* \par -* Example code for q15 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 16 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to q15(Fixed point 1.15): -* round(twiddleCoefq15(i) * pow(2, 15)) -* -*/ -const q15_t twiddleCoef_16_q15[24] = { - 0x7FFF, 0x0000, - 0x7641, 0x30FB, - 0x5A82, 0x5A82, - 0x30FB, 0x7641, - 0x0000, 0x7FFF, - 0xCF04, 0x7641, - 0xA57D, 0x5A82, - 0x89BE, 0x30FB, - 0x8000, 0x0000, - 0x89BE, 0xCF04, - 0xA57D, 0xA57D, - 0xCF04, 0x89BE -}; - -/** -* \par -* Example code for q15 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 32 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to q15(Fixed point 1.15): -* round(twiddleCoefq15(i) * pow(2, 15)) -* -*/ -const q15_t twiddleCoef_32_q15[48] = { - 0x7FFF, 0x0000, - 0x7D8A, 0x18F8, - 0x7641, 0x30FB, - 0x6A6D, 0x471C, - 0x5A82, 0x5A82, - 0x471C, 0x6A6D, - 0x30FB, 0x7641, - 0x18F8, 0x7D8A, - 0x0000, 0x7FFF, - 0xE707, 0x7D8A, - 0xCF04, 0x7641, - 0xB8E3, 0x6A6D, - 0xA57D, 0x5A82, - 0x9592, 0x471C, - 0x89BE, 0x30FB, - 0x8275, 0x18F8, - 0x8000, 0x0000, - 0x8275, 0xE707, - 0x89BE, 0xCF04, - 0x9592, 0xB8E3, - 0xA57D, 0xA57D, - 0xB8E3, 0x9592, - 0xCF04, 0x89BE, - 0xE707, 0x8275 -}; - -/** -* \par -* Example code for q15 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 64 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to q15(Fixed point 1.15): -* round(twiddleCoefq15(i) * pow(2, 15)) -* -*/ -const q15_t twiddleCoef_64_q15[96] = { - 0x7FFF, 0x0000, - 0x7F62, 0x0C8B, - 0x7D8A, 0x18F8, - 0x7A7D, 0x2528, - 0x7641, 0x30FB, - 0x70E2, 0x3C56, - 0x6A6D, 0x471C, - 0x62F2, 0x5133, - 0x5A82, 0x5A82, - 0x5133, 0x62F2, - 0x471C, 0x6A6D, - 0x3C56, 0x70E2, - 0x30FB, 0x7641, - 0x2528, 0x7A7D, - 0x18F8, 0x7D8A, - 0x0C8B, 0x7F62, - 0x0000, 0x7FFF, - 0xF374, 0x7F62, - 0xE707, 0x7D8A, - 0xDAD7, 0x7A7D, - 0xCF04, 0x7641, - 0xC3A9, 0x70E2, - 0xB8E3, 0x6A6D, - 0xAECC, 0x62F2, - 0xA57D, 0x5A82, - 0x9D0D, 0x5133, - 0x9592, 0x471C, - 0x8F1D, 0x3C56, - 0x89BE, 0x30FB, - 0x8582, 0x2528, - 0x8275, 0x18F8, - 0x809D, 0x0C8B, - 0x8000, 0x0000, - 0x809D, 0xF374, - 0x8275, 0xE707, - 0x8582, 0xDAD7, - 0x89BE, 0xCF04, - 0x8F1D, 0xC3A9, - 0x9592, 0xB8E3, - 0x9D0D, 0xAECC, - 0xA57D, 0xA57D, - 0xAECC, 0x9D0D, - 0xB8E3, 0x9592, - 0xC3A9, 0x8F1D, - 0xCF04, 0x89BE, - 0xDAD7, 0x8582, - 0xE707, 0x8275, - 0xF374, 0x809D -}; - -/** -* \par -* Example code for q15 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 128 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to q15(Fixed point 1.15): -* round(twiddleCoefq15(i) * pow(2, 15)) -* -*/ -const q15_t twiddleCoef_128_q15[192] = { - 0x7FFF, 0x0000, - 0x7FD8, 0x0647, - 0x7F62, 0x0C8B, - 0x7E9D, 0x12C8, - 0x7D8A, 0x18F8, - 0x7C29, 0x1F19, - 0x7A7D, 0x2528, - 0x7884, 0x2B1F, - 0x7641, 0x30FB, - 0x73B5, 0x36BA, - 0x70E2, 0x3C56, - 0x6DCA, 0x41CE, - 0x6A6D, 0x471C, - 0x66CF, 0x4C3F, - 0x62F2, 0x5133, - 0x5ED7, 0x55F5, - 0x5A82, 0x5A82, - 0x55F5, 0x5ED7, - 0x5133, 0x62F2, - 0x4C3F, 0x66CF, - 0x471C, 0x6A6D, - 0x41CE, 0x6DCA, - 0x3C56, 0x70E2, - 0x36BA, 0x73B5, - 0x30FB, 0x7641, - 0x2B1F, 0x7884, - 0x2528, 0x7A7D, - 0x1F19, 0x7C29, - 0x18F8, 0x7D8A, - 0x12C8, 0x7E9D, - 0x0C8B, 0x7F62, - 0x0647, 0x7FD8, - 0x0000, 0x7FFF, - 0xF9B8, 0x7FD8, - 0xF374, 0x7F62, - 0xED37, 0x7E9D, - 0xE707, 0x7D8A, - 0xE0E6, 0x7C29, - 0xDAD7, 0x7A7D, - 0xD4E0, 0x7884, - 0xCF04, 0x7641, - 0xC945, 0x73B5, - 0xC3A9, 0x70E2, - 0xBE31, 0x6DCA, - 0xB8E3, 0x6A6D, - 0xB3C0, 0x66CF, - 0xAECC, 0x62F2, - 0xAA0A, 0x5ED7, - 0xA57D, 0x5A82, - 0xA128, 0x55F5, - 0x9D0D, 0x5133, - 0x9930, 0x4C3F, - 0x9592, 0x471C, - 0x9235, 0x41CE, - 0x8F1D, 0x3C56, - 0x8C4A, 0x36BA, - 0x89BE, 0x30FB, - 0x877B, 0x2B1F, - 0x8582, 0x2528, - 0x83D6, 0x1F19, - 0x8275, 0x18F8, - 0x8162, 0x12C8, - 0x809D, 0x0C8B, - 0x8027, 0x0647, - 0x8000, 0x0000, - 0x8027, 0xF9B8, - 0x809D, 0xF374, - 0x8162, 0xED37, - 0x8275, 0xE707, - 0x83D6, 0xE0E6, - 0x8582, 0xDAD7, - 0x877B, 0xD4E0, - 0x89BE, 0xCF04, - 0x8C4A, 0xC945, - 0x8F1D, 0xC3A9, - 0x9235, 0xBE31, - 0x9592, 0xB8E3, - 0x9930, 0xB3C0, - 0x9D0D, 0xAECC, - 0xA128, 0xAA0A, - 0xA57D, 0xA57D, - 0xAA0A, 0xA128, - 0xAECC, 0x9D0D, - 0xB3C0, 0x9930, - 0xB8E3, 0x9592, - 0xBE31, 0x9235, - 0xC3A9, 0x8F1D, - 0xC945, 0x8C4A, - 0xCF04, 0x89BE, - 0xD4E0, 0x877B, - 0xDAD7, 0x8582, - 0xE0E6, 0x83D6, - 0xE707, 0x8275, - 0xED37, 0x8162, - 0xF374, 0x809D, - 0xF9B8, 0x8027 -}; - -/** -* \par -* Example code for q15 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 256 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to q15(Fixed point 1.15): -* round(twiddleCoefq15(i) * pow(2, 15)) -* -*/ -const q15_t twiddleCoef_256_q15[384] = { - 0x7FFF, 0x0000, - 0x7FF6, 0x0324, - 0x7FD8, 0x0647, - 0x7FA7, 0x096A, - 0x7F62, 0x0C8B, - 0x7F09, 0x0FAB, - 0x7E9D, 0x12C8, - 0x7E1D, 0x15E2, - 0x7D8A, 0x18F8, - 0x7CE3, 0x1C0B, - 0x7C29, 0x1F19, - 0x7B5D, 0x2223, - 0x7A7D, 0x2528, - 0x798A, 0x2826, - 0x7884, 0x2B1F, - 0x776C, 0x2E11, - 0x7641, 0x30FB, - 0x7504, 0x33DE, - 0x73B5, 0x36BA, - 0x7255, 0x398C, - 0x70E2, 0x3C56, - 0x6F5F, 0x3F17, - 0x6DCA, 0x41CE, - 0x6C24, 0x447A, - 0x6A6D, 0x471C, - 0x68A6, 0x49B4, - 0x66CF, 0x4C3F, - 0x64E8, 0x4EBF, - 0x62F2, 0x5133, - 0x60EC, 0x539B, - 0x5ED7, 0x55F5, - 0x5CB4, 0x5842, - 0x5A82, 0x5A82, - 0x5842, 0x5CB4, - 0x55F5, 0x5ED7, - 0x539B, 0x60EC, - 0x5133, 0x62F2, - 0x4EBF, 0x64E8, - 0x4C3F, 0x66CF, - 0x49B4, 0x68A6, - 0x471C, 0x6A6D, - 0x447A, 0x6C24, - 0x41CE, 0x6DCA, - 0x3F17, 0x6F5F, - 0x3C56, 0x70E2, - 0x398C, 0x7255, - 0x36BA, 0x73B5, - 0x33DE, 0x7504, - 0x30FB, 0x7641, - 0x2E11, 0x776C, - 0x2B1F, 0x7884, - 0x2826, 0x798A, - 0x2528, 0x7A7D, - 0x2223, 0x7B5D, - 0x1F19, 0x7C29, - 0x1C0B, 0x7CE3, - 0x18F8, 0x7D8A, - 0x15E2, 0x7E1D, - 0x12C8, 0x7E9D, - 0x0FAB, 0x7F09, - 0x0C8B, 0x7F62, - 0x096A, 0x7FA7, - 0x0647, 0x7FD8, - 0x0324, 0x7FF6, - 0x0000, 0x7FFF, - 0xFCDB, 0x7FF6, - 0xF9B8, 0x7FD8, - 0xF695, 0x7FA7, - 0xF374, 0x7F62, - 0xF054, 0x7F09, - 0xED37, 0x7E9D, - 0xEA1D, 0x7E1D, - 0xE707, 0x7D8A, - 0xE3F4, 0x7CE3, - 0xE0E6, 0x7C29, - 0xDDDC, 0x7B5D, - 0xDAD7, 0x7A7D, - 0xD7D9, 0x798A, - 0xD4E0, 0x7884, - 0xD1EE, 0x776C, - 0xCF04, 0x7641, - 0xCC21, 0x7504, - 0xC945, 0x73B5, - 0xC673, 0x7255, - 0xC3A9, 0x70E2, - 0xC0E8, 0x6F5F, - 0xBE31, 0x6DCA, - 0xBB85, 0x6C24, - 0xB8E3, 0x6A6D, - 0xB64B, 0x68A6, - 0xB3C0, 0x66CF, - 0xB140, 0x64E8, - 0xAECC, 0x62F2, - 0xAC64, 0x60EC, - 0xAA0A, 0x5ED7, - 0xA7BD, 0x5CB4, - 0xA57D, 0x5A82, - 0xA34B, 0x5842, - 0xA128, 0x55F5, - 0x9F13, 0x539B, - 0x9D0D, 0x5133, - 0x9B17, 0x4EBF, - 0x9930, 0x4C3F, - 0x9759, 0x49B4, - 0x9592, 0x471C, - 0x93DB, 0x447A, - 0x9235, 0x41CE, - 0x90A0, 0x3F17, - 0x8F1D, 0x3C56, - 0x8DAA, 0x398C, - 0x8C4A, 0x36BA, - 0x8AFB, 0x33DE, - 0x89BE, 0x30FB, - 0x8893, 0x2E11, - 0x877B, 0x2B1F, - 0x8675, 0x2826, - 0x8582, 0x2528, - 0x84A2, 0x2223, - 0x83D6, 0x1F19, - 0x831C, 0x1C0B, - 0x8275, 0x18F8, - 0x81E2, 0x15E2, - 0x8162, 0x12C8, - 0x80F6, 0x0FAB, - 0x809D, 0x0C8B, - 0x8058, 0x096A, - 0x8027, 0x0647, - 0x8009, 0x0324, - 0x8000, 0x0000, - 0x8009, 0xFCDB, - 0x8027, 0xF9B8, - 0x8058, 0xF695, - 0x809D, 0xF374, - 0x80F6, 0xF054, - 0x8162, 0xED37, - 0x81E2, 0xEA1D, - 0x8275, 0xE707, - 0x831C, 0xE3F4, - 0x83D6, 0xE0E6, - 0x84A2, 0xDDDC, - 0x8582, 0xDAD7, - 0x8675, 0xD7D9, - 0x877B, 0xD4E0, - 0x8893, 0xD1EE, - 0x89BE, 0xCF04, - 0x8AFB, 0xCC21, - 0x8C4A, 0xC945, - 0x8DAA, 0xC673, - 0x8F1D, 0xC3A9, - 0x90A0, 0xC0E8, - 0x9235, 0xBE31, - 0x93DB, 0xBB85, - 0x9592, 0xB8E3, - 0x9759, 0xB64B, - 0x9930, 0xB3C0, - 0x9B17, 0xB140, - 0x9D0D, 0xAECC, - 0x9F13, 0xAC64, - 0xA128, 0xAA0A, - 0xA34B, 0xA7BD, - 0xA57D, 0xA57D, - 0xA7BD, 0xA34B, - 0xAA0A, 0xA128, - 0xAC64, 0x9F13, - 0xAECC, 0x9D0D, - 0xB140, 0x9B17, - 0xB3C0, 0x9930, - 0xB64B, 0x9759, - 0xB8E3, 0x9592, - 0xBB85, 0x93DB, - 0xBE31, 0x9235, - 0xC0E8, 0x90A0, - 0xC3A9, 0x8F1D, - 0xC673, 0x8DAA, - 0xC945, 0x8C4A, - 0xCC21, 0x8AFB, - 0xCF04, 0x89BE, - 0xD1EE, 0x8893, - 0xD4E0, 0x877B, - 0xD7D9, 0x8675, - 0xDAD7, 0x8582, - 0xDDDC, 0x84A2, - 0xE0E6, 0x83D6, - 0xE3F4, 0x831C, - 0xE707, 0x8275, - 0xEA1D, 0x81E2, - 0xED37, 0x8162, - 0xF054, 0x80F6, - 0xF374, 0x809D, - 0xF695, 0x8058, - 0xF9B8, 0x8027, - 0xFCDB, 0x8009 -}; - -/** -* \par -* Example code for q15 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 512 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to q15(Fixed point 1.15): -* round(twiddleCoefq15(i) * pow(2, 15)) -* -*/ -const q15_t twiddleCoef_512_q15[768] = { - 0x7FFF, 0x0000, - 0x7FFD, 0x0192, - 0x7FF6, 0x0324, - 0x7FE9, 0x04B6, - 0x7FD8, 0x0647, - 0x7FC2, 0x07D9, - 0x7FA7, 0x096A, - 0x7F87, 0x0AFB, - 0x7F62, 0x0C8B, - 0x7F38, 0x0E1B, - 0x7F09, 0x0FAB, - 0x7ED5, 0x1139, - 0x7E9D, 0x12C8, - 0x7E5F, 0x1455, - 0x7E1D, 0x15E2, - 0x7DD6, 0x176D, - 0x7D8A, 0x18F8, - 0x7D39, 0x1A82, - 0x7CE3, 0x1C0B, - 0x7C89, 0x1D93, - 0x7C29, 0x1F19, - 0x7BC5, 0x209F, - 0x7B5D, 0x2223, - 0x7AEF, 0x23A6, - 0x7A7D, 0x2528, - 0x7A05, 0x26A8, - 0x798A, 0x2826, - 0x7909, 0x29A3, - 0x7884, 0x2B1F, - 0x77FA, 0x2C98, - 0x776C, 0x2E11, - 0x76D9, 0x2F87, - 0x7641, 0x30FB, - 0x75A5, 0x326E, - 0x7504, 0x33DE, - 0x745F, 0x354D, - 0x73B5, 0x36BA, - 0x7307, 0x3824, - 0x7255, 0x398C, - 0x719E, 0x3AF2, - 0x70E2, 0x3C56, - 0x7023, 0x3DB8, - 0x6F5F, 0x3F17, - 0x6E96, 0x4073, - 0x6DCA, 0x41CE, - 0x6CF9, 0x4325, - 0x6C24, 0x447A, - 0x6B4A, 0x45CD, - 0x6A6D, 0x471C, - 0x698C, 0x4869, - 0x68A6, 0x49B4, - 0x67BD, 0x4AFB, - 0x66CF, 0x4C3F, - 0x65DD, 0x4D81, - 0x64E8, 0x4EBF, - 0x63EF, 0x4FFB, - 0x62F2, 0x5133, - 0x61F1, 0x5269, - 0x60EC, 0x539B, - 0x5FE3, 0x54CA, - 0x5ED7, 0x55F5, - 0x5DC7, 0x571D, - 0x5CB4, 0x5842, - 0x5B9D, 0x5964, - 0x5A82, 0x5A82, - 0x5964, 0x5B9D, - 0x5842, 0x5CB4, - 0x571D, 0x5DC7, - 0x55F5, 0x5ED7, - 0x54CA, 0x5FE3, - 0x539B, 0x60EC, - 0x5269, 0x61F1, - 0x5133, 0x62F2, - 0x4FFB, 0x63EF, - 0x4EBF, 0x64E8, - 0x4D81, 0x65DD, - 0x4C3F, 0x66CF, - 0x4AFB, 0x67BD, - 0x49B4, 0x68A6, - 0x4869, 0x698C, - 0x471C, 0x6A6D, - 0x45CD, 0x6B4A, - 0x447A, 0x6C24, - 0x4325, 0x6CF9, - 0x41CE, 0x6DCA, - 0x4073, 0x6E96, - 0x3F17, 0x6F5F, - 0x3DB8, 0x7023, - 0x3C56, 0x70E2, - 0x3AF2, 0x719E, - 0x398C, 0x7255, - 0x3824, 0x7307, - 0x36BA, 0x73B5, - 0x354D, 0x745F, - 0x33DE, 0x7504, - 0x326E, 0x75A5, - 0x30FB, 0x7641, - 0x2F87, 0x76D9, - 0x2E11, 0x776C, - 0x2C98, 0x77FA, - 0x2B1F, 0x7884, - 0x29A3, 0x7909, - 0x2826, 0x798A, - 0x26A8, 0x7A05, - 0x2528, 0x7A7D, - 0x23A6, 0x7AEF, - 0x2223, 0x7B5D, - 0x209F, 0x7BC5, - 0x1F19, 0x7C29, - 0x1D93, 0x7C89, - 0x1C0B, 0x7CE3, - 0x1A82, 0x7D39, - 0x18F8, 0x7D8A, - 0x176D, 0x7DD6, - 0x15E2, 0x7E1D, - 0x1455, 0x7E5F, - 0x12C8, 0x7E9D, - 0x1139, 0x7ED5, - 0x0FAB, 0x7F09, - 0x0E1B, 0x7F38, - 0x0C8B, 0x7F62, - 0x0AFB, 0x7F87, - 0x096A, 0x7FA7, - 0x07D9, 0x7FC2, - 0x0647, 0x7FD8, - 0x04B6, 0x7FE9, - 0x0324, 0x7FF6, - 0x0192, 0x7FFD, - 0x0000, 0x7FFF, - 0xFE6D, 0x7FFD, - 0xFCDB, 0x7FF6, - 0xFB49, 0x7FE9, - 0xF9B8, 0x7FD8, - 0xF826, 0x7FC2, - 0xF695, 0x7FA7, - 0xF504, 0x7F87, - 0xF374, 0x7F62, - 0xF1E4, 0x7F38, - 0xF054, 0x7F09, - 0xEEC6, 0x7ED5, - 0xED37, 0x7E9D, - 0xEBAA, 0x7E5F, - 0xEA1D, 0x7E1D, - 0xE892, 0x7DD6, - 0xE707, 0x7D8A, - 0xE57D, 0x7D39, - 0xE3F4, 0x7CE3, - 0xE26C, 0x7C89, - 0xE0E6, 0x7C29, - 0xDF60, 0x7BC5, - 0xDDDC, 0x7B5D, - 0xDC59, 0x7AEF, - 0xDAD7, 0x7A7D, - 0xD957, 0x7A05, - 0xD7D9, 0x798A, - 0xD65C, 0x7909, - 0xD4E0, 0x7884, - 0xD367, 0x77FA, - 0xD1EE, 0x776C, - 0xD078, 0x76D9, - 0xCF04, 0x7641, - 0xCD91, 0x75A5, - 0xCC21, 0x7504, - 0xCAB2, 0x745F, - 0xC945, 0x73B5, - 0xC7DB, 0x7307, - 0xC673, 0x7255, - 0xC50D, 0x719E, - 0xC3A9, 0x70E2, - 0xC247, 0x7023, - 0xC0E8, 0x6F5F, - 0xBF8C, 0x6E96, - 0xBE31, 0x6DCA, - 0xBCDA, 0x6CF9, - 0xBB85, 0x6C24, - 0xBA32, 0x6B4A, - 0xB8E3, 0x6A6D, - 0xB796, 0x698C, - 0xB64B, 0x68A6, - 0xB504, 0x67BD, - 0xB3C0, 0x66CF, - 0xB27E, 0x65DD, - 0xB140, 0x64E8, - 0xB004, 0x63EF, - 0xAECC, 0x62F2, - 0xAD96, 0x61F1, - 0xAC64, 0x60EC, - 0xAB35, 0x5FE3, - 0xAA0A, 0x5ED7, - 0xA8E2, 0x5DC7, - 0xA7BD, 0x5CB4, - 0xA69B, 0x5B9D, - 0xA57D, 0x5A82, - 0xA462, 0x5964, - 0xA34B, 0x5842, - 0xA238, 0x571D, - 0xA128, 0x55F5, - 0xA01C, 0x54CA, - 0x9F13, 0x539B, - 0x9E0E, 0x5269, - 0x9D0D, 0x5133, - 0x9C10, 0x4FFB, - 0x9B17, 0x4EBF, - 0x9A22, 0x4D81, - 0x9930, 0x4C3F, - 0x9842, 0x4AFB, - 0x9759, 0x49B4, - 0x9673, 0x4869, - 0x9592, 0x471C, - 0x94B5, 0x45CD, - 0x93DB, 0x447A, - 0x9306, 0x4325, - 0x9235, 0x41CE, - 0x9169, 0x4073, - 0x90A0, 0x3F17, - 0x8FDC, 0x3DB8, - 0x8F1D, 0x3C56, - 0x8E61, 0x3AF2, - 0x8DAA, 0x398C, - 0x8CF8, 0x3824, - 0x8C4A, 0x36BA, - 0x8BA0, 0x354D, - 0x8AFB, 0x33DE, - 0x8A5A, 0x326E, - 0x89BE, 0x30FB, - 0x8926, 0x2F87, - 0x8893, 0x2E11, - 0x8805, 0x2C98, - 0x877B, 0x2B1F, - 0x86F6, 0x29A3, - 0x8675, 0x2826, - 0x85FA, 0x26A8, - 0x8582, 0x2528, - 0x8510, 0x23A6, - 0x84A2, 0x2223, - 0x843A, 0x209F, - 0x83D6, 0x1F19, - 0x8376, 0x1D93, - 0x831C, 0x1C0B, - 0x82C6, 0x1A82, - 0x8275, 0x18F8, - 0x8229, 0x176D, - 0x81E2, 0x15E2, - 0x81A0, 0x1455, - 0x8162, 0x12C8, - 0x812A, 0x1139, - 0x80F6, 0x0FAB, - 0x80C7, 0x0E1B, - 0x809D, 0x0C8B, - 0x8078, 0x0AFB, - 0x8058, 0x096A, - 0x803D, 0x07D9, - 0x8027, 0x0647, - 0x8016, 0x04B6, - 0x8009, 0x0324, - 0x8002, 0x0192, - 0x8000, 0x0000, - 0x8002, 0xFE6D, - 0x8009, 0xFCDB, - 0x8016, 0xFB49, - 0x8027, 0xF9B8, - 0x803D, 0xF826, - 0x8058, 0xF695, - 0x8078, 0xF504, - 0x809D, 0xF374, - 0x80C7, 0xF1E4, - 0x80F6, 0xF054, - 0x812A, 0xEEC6, - 0x8162, 0xED37, - 0x81A0, 0xEBAA, - 0x81E2, 0xEA1D, - 0x8229, 0xE892, - 0x8275, 0xE707, - 0x82C6, 0xE57D, - 0x831C, 0xE3F4, - 0x8376, 0xE26C, - 0x83D6, 0xE0E6, - 0x843A, 0xDF60, - 0x84A2, 0xDDDC, - 0x8510, 0xDC59, - 0x8582, 0xDAD7, - 0x85FA, 0xD957, - 0x8675, 0xD7D9, - 0x86F6, 0xD65C, - 0x877B, 0xD4E0, - 0x8805, 0xD367, - 0x8893, 0xD1EE, - 0x8926, 0xD078, - 0x89BE, 0xCF04, - 0x8A5A, 0xCD91, - 0x8AFB, 0xCC21, - 0x8BA0, 0xCAB2, - 0x8C4A, 0xC945, - 0x8CF8, 0xC7DB, - 0x8DAA, 0xC673, - 0x8E61, 0xC50D, - 0x8F1D, 0xC3A9, - 0x8FDC, 0xC247, - 0x90A0, 0xC0E8, - 0x9169, 0xBF8C, - 0x9235, 0xBE31, - 0x9306, 0xBCDA, - 0x93DB, 0xBB85, - 0x94B5, 0xBA32, - 0x9592, 0xB8E3, - 0x9673, 0xB796, - 0x9759, 0xB64B, - 0x9842, 0xB504, - 0x9930, 0xB3C0, - 0x9A22, 0xB27E, - 0x9B17, 0xB140, - 0x9C10, 0xB004, - 0x9D0D, 0xAECC, - 0x9E0E, 0xAD96, - 0x9F13, 0xAC64, - 0xA01C, 0xAB35, - 0xA128, 0xAA0A, - 0xA238, 0xA8E2, - 0xA34B, 0xA7BD, - 0xA462, 0xA69B, - 0xA57D, 0xA57D, - 0xA69B, 0xA462, - 0xA7BD, 0xA34B, - 0xA8E2, 0xA238, - 0xAA0A, 0xA128, - 0xAB35, 0xA01C, - 0xAC64, 0x9F13, - 0xAD96, 0x9E0E, - 0xAECC, 0x9D0D, - 0xB004, 0x9C10, - 0xB140, 0x9B17, - 0xB27E, 0x9A22, - 0xB3C0, 0x9930, - 0xB504, 0x9842, - 0xB64B, 0x9759, - 0xB796, 0x9673, - 0xB8E3, 0x9592, - 0xBA32, 0x94B5, - 0xBB85, 0x93DB, - 0xBCDA, 0x9306, - 0xBE31, 0x9235, - 0xBF8C, 0x9169, - 0xC0E8, 0x90A0, - 0xC247, 0x8FDC, - 0xC3A9, 0x8F1D, - 0xC50D, 0x8E61, - 0xC673, 0x8DAA, - 0xC7DB, 0x8CF8, - 0xC945, 0x8C4A, - 0xCAB2, 0x8BA0, - 0xCC21, 0x8AFB, - 0xCD91, 0x8A5A, - 0xCF04, 0x89BE, - 0xD078, 0x8926, - 0xD1EE, 0x8893, - 0xD367, 0x8805, - 0xD4E0, 0x877B, - 0xD65C, 0x86F6, - 0xD7D9, 0x8675, - 0xD957, 0x85FA, - 0xDAD7, 0x8582, - 0xDC59, 0x8510, - 0xDDDC, 0x84A2, - 0xDF60, 0x843A, - 0xE0E6, 0x83D6, - 0xE26C, 0x8376, - 0xE3F4, 0x831C, - 0xE57D, 0x82C6, - 0xE707, 0x8275, - 0xE892, 0x8229, - 0xEA1D, 0x81E2, - 0xEBAA, 0x81A0, - 0xED37, 0x8162, - 0xEEC6, 0x812A, - 0xF054, 0x80F6, - 0xF1E4, 0x80C7, - 0xF374, 0x809D, - 0xF504, 0x8078, - 0xF695, 0x8058, - 0xF826, 0x803D, - 0xF9B8, 0x8027, - 0xFB49, 0x8016, - 0xFCDB, 0x8009, - 0xFE6D, 0x8002 -}; - -/** -* \par -* Example code for q15 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 1024 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to q15(Fixed point 1.15): -* round(twiddleCoefq15(i) * pow(2, 15)) -* -*/ -const q15_t twiddleCoef_1024_q15[1536] = { - 0x7FFF, 0x0000, - 0x7FFF, 0x00C9, - 0x7FFD, 0x0192, - 0x7FFA, 0x025B, - 0x7FF6, 0x0324, - 0x7FF0, 0x03ED, - 0x7FE9, 0x04B6, - 0x7FE1, 0x057F, - 0x7FD8, 0x0647, - 0x7FCE, 0x0710, - 0x7FC2, 0x07D9, - 0x7FB5, 0x08A2, - 0x7FA7, 0x096A, - 0x7F97, 0x0A33, - 0x7F87, 0x0AFB, - 0x7F75, 0x0BC3, - 0x7F62, 0x0C8B, - 0x7F4D, 0x0D53, - 0x7F38, 0x0E1B, - 0x7F21, 0x0EE3, - 0x7F09, 0x0FAB, - 0x7EF0, 0x1072, - 0x7ED5, 0x1139, - 0x7EBA, 0x1201, - 0x7E9D, 0x12C8, - 0x7E7F, 0x138E, - 0x7E5F, 0x1455, - 0x7E3F, 0x151B, - 0x7E1D, 0x15E2, - 0x7DFA, 0x16A8, - 0x7DD6, 0x176D, - 0x7DB0, 0x1833, - 0x7D8A, 0x18F8, - 0x7D62, 0x19BD, - 0x7D39, 0x1A82, - 0x7D0F, 0x1B47, - 0x7CE3, 0x1C0B, - 0x7CB7, 0x1CCF, - 0x7C89, 0x1D93, - 0x7C5A, 0x1E56, - 0x7C29, 0x1F19, - 0x7BF8, 0x1FDC, - 0x7BC5, 0x209F, - 0x7B92, 0x2161, - 0x7B5D, 0x2223, - 0x7B26, 0x22E5, - 0x7AEF, 0x23A6, - 0x7AB6, 0x2467, - 0x7A7D, 0x2528, - 0x7A42, 0x25E8, - 0x7A05, 0x26A8, - 0x79C8, 0x2767, - 0x798A, 0x2826, - 0x794A, 0x28E5, - 0x7909, 0x29A3, - 0x78C7, 0x2A61, - 0x7884, 0x2B1F, - 0x7840, 0x2BDC, - 0x77FA, 0x2C98, - 0x77B4, 0x2D55, - 0x776C, 0x2E11, - 0x7723, 0x2ECC, - 0x76D9, 0x2F87, - 0x768E, 0x3041, - 0x7641, 0x30FB, - 0x75F4, 0x31B5, - 0x75A5, 0x326E, - 0x7555, 0x3326, - 0x7504, 0x33DE, - 0x74B2, 0x3496, - 0x745F, 0x354D, - 0x740B, 0x3604, - 0x73B5, 0x36BA, - 0x735F, 0x376F, - 0x7307, 0x3824, - 0x72AF, 0x38D8, - 0x7255, 0x398C, - 0x71FA, 0x3A40, - 0x719E, 0x3AF2, - 0x7141, 0x3BA5, - 0x70E2, 0x3C56, - 0x7083, 0x3D07, - 0x7023, 0x3DB8, - 0x6FC1, 0x3E68, - 0x6F5F, 0x3F17, - 0x6EFB, 0x3FC5, - 0x6E96, 0x4073, - 0x6E30, 0x4121, - 0x6DCA, 0x41CE, - 0x6D62, 0x427A, - 0x6CF9, 0x4325, - 0x6C8F, 0x43D0, - 0x6C24, 0x447A, - 0x6BB8, 0x4524, - 0x6B4A, 0x45CD, - 0x6ADC, 0x4675, - 0x6A6D, 0x471C, - 0x69FD, 0x47C3, - 0x698C, 0x4869, - 0x6919, 0x490F, - 0x68A6, 0x49B4, - 0x6832, 0x4A58, - 0x67BD, 0x4AFB, - 0x6746, 0x4B9E, - 0x66CF, 0x4C3F, - 0x6657, 0x4CE1, - 0x65DD, 0x4D81, - 0x6563, 0x4E21, - 0x64E8, 0x4EBF, - 0x646C, 0x4F5E, - 0x63EF, 0x4FFB, - 0x6371, 0x5097, - 0x62F2, 0x5133, - 0x6271, 0x51CE, - 0x61F1, 0x5269, - 0x616F, 0x5302, - 0x60EC, 0x539B, - 0x6068, 0x5433, - 0x5FE3, 0x54CA, - 0x5F5E, 0x5560, - 0x5ED7, 0x55F5, - 0x5E50, 0x568A, - 0x5DC7, 0x571D, - 0x5D3E, 0x57B0, - 0x5CB4, 0x5842, - 0x5C29, 0x58D4, - 0x5B9D, 0x5964, - 0x5B10, 0x59F3, - 0x5A82, 0x5A82, - 0x59F3, 0x5B10, - 0x5964, 0x5B9D, - 0x58D4, 0x5C29, - 0x5842, 0x5CB4, - 0x57B0, 0x5D3E, - 0x571D, 0x5DC7, - 0x568A, 0x5E50, - 0x55F5, 0x5ED7, - 0x5560, 0x5F5E, - 0x54CA, 0x5FE3, - 0x5433, 0x6068, - 0x539B, 0x60EC, - 0x5302, 0x616F, - 0x5269, 0x61F1, - 0x51CE, 0x6271, - 0x5133, 0x62F2, - 0x5097, 0x6371, - 0x4FFB, 0x63EF, - 0x4F5E, 0x646C, - 0x4EBF, 0x64E8, - 0x4E21, 0x6563, - 0x4D81, 0x65DD, - 0x4CE1, 0x6657, - 0x4C3F, 0x66CF, - 0x4B9E, 0x6746, - 0x4AFB, 0x67BD, - 0x4A58, 0x6832, - 0x49B4, 0x68A6, - 0x490F, 0x6919, - 0x4869, 0x698C, - 0x47C3, 0x69FD, - 0x471C, 0x6A6D, - 0x4675, 0x6ADC, - 0x45CD, 0x6B4A, - 0x4524, 0x6BB8, - 0x447A, 0x6C24, - 0x43D0, 0x6C8F, - 0x4325, 0x6CF9, - 0x427A, 0x6D62, - 0x41CE, 0x6DCA, - 0x4121, 0x6E30, - 0x4073, 0x6E96, - 0x3FC5, 0x6EFB, - 0x3F17, 0x6F5F, - 0x3E68, 0x6FC1, - 0x3DB8, 0x7023, - 0x3D07, 0x7083, - 0x3C56, 0x70E2, - 0x3BA5, 0x7141, - 0x3AF2, 0x719E, - 0x3A40, 0x71FA, - 0x398C, 0x7255, - 0x38D8, 0x72AF, - 0x3824, 0x7307, - 0x376F, 0x735F, - 0x36BA, 0x73B5, - 0x3604, 0x740B, - 0x354D, 0x745F, - 0x3496, 0x74B2, - 0x33DE, 0x7504, - 0x3326, 0x7555, - 0x326E, 0x75A5, - 0x31B5, 0x75F4, - 0x30FB, 0x7641, - 0x3041, 0x768E, - 0x2F87, 0x76D9, - 0x2ECC, 0x7723, - 0x2E11, 0x776C, - 0x2D55, 0x77B4, - 0x2C98, 0x77FA, - 0x2BDC, 0x7840, - 0x2B1F, 0x7884, - 0x2A61, 0x78C7, - 0x29A3, 0x7909, - 0x28E5, 0x794A, - 0x2826, 0x798A, - 0x2767, 0x79C8, - 0x26A8, 0x7A05, - 0x25E8, 0x7A42, - 0x2528, 0x7A7D, - 0x2467, 0x7AB6, - 0x23A6, 0x7AEF, - 0x22E5, 0x7B26, - 0x2223, 0x7B5D, - 0x2161, 0x7B92, - 0x209F, 0x7BC5, - 0x1FDC, 0x7BF8, - 0x1F19, 0x7C29, - 0x1E56, 0x7C5A, - 0x1D93, 0x7C89, - 0x1CCF, 0x7CB7, - 0x1C0B, 0x7CE3, - 0x1B47, 0x7D0F, - 0x1A82, 0x7D39, - 0x19BD, 0x7D62, - 0x18F8, 0x7D8A, - 0x1833, 0x7DB0, - 0x176D, 0x7DD6, - 0x16A8, 0x7DFA, - 0x15E2, 0x7E1D, - 0x151B, 0x7E3F, - 0x1455, 0x7E5F, - 0x138E, 0x7E7F, - 0x12C8, 0x7E9D, - 0x1201, 0x7EBA, - 0x1139, 0x7ED5, - 0x1072, 0x7EF0, - 0x0FAB, 0x7F09, - 0x0EE3, 0x7F21, - 0x0E1B, 0x7F38, - 0x0D53, 0x7F4D, - 0x0C8B, 0x7F62, - 0x0BC3, 0x7F75, - 0x0AFB, 0x7F87, - 0x0A33, 0x7F97, - 0x096A, 0x7FA7, - 0x08A2, 0x7FB5, - 0x07D9, 0x7FC2, - 0x0710, 0x7FCE, - 0x0647, 0x7FD8, - 0x057F, 0x7FE1, - 0x04B6, 0x7FE9, - 0x03ED, 0x7FF0, - 0x0324, 0x7FF6, - 0x025B, 0x7FFA, - 0x0192, 0x7FFD, - 0x00C9, 0x7FFF, - 0x0000, 0x7FFF, - 0xFF36, 0x7FFF, - 0xFE6D, 0x7FFD, - 0xFDA4, 0x7FFA, - 0xFCDB, 0x7FF6, - 0xFC12, 0x7FF0, - 0xFB49, 0x7FE9, - 0xFA80, 0x7FE1, - 0xF9B8, 0x7FD8, - 0xF8EF, 0x7FCE, - 0xF826, 0x7FC2, - 0xF75D, 0x7FB5, - 0xF695, 0x7FA7, - 0xF5CC, 0x7F97, - 0xF504, 0x7F87, - 0xF43C, 0x7F75, - 0xF374, 0x7F62, - 0xF2AC, 0x7F4D, - 0xF1E4, 0x7F38, - 0xF11C, 0x7F21, - 0xF054, 0x7F09, - 0xEF8D, 0x7EF0, - 0xEEC6, 0x7ED5, - 0xEDFE, 0x7EBA, - 0xED37, 0x7E9D, - 0xEC71, 0x7E7F, - 0xEBAA, 0x7E5F, - 0xEAE4, 0x7E3F, - 0xEA1D, 0x7E1D, - 0xE957, 0x7DFA, - 0xE892, 0x7DD6, - 0xE7CC, 0x7DB0, - 0xE707, 0x7D8A, - 0xE642, 0x7D62, - 0xE57D, 0x7D39, - 0xE4B8, 0x7D0F, - 0xE3F4, 0x7CE3, - 0xE330, 0x7CB7, - 0xE26C, 0x7C89, - 0xE1A9, 0x7C5A, - 0xE0E6, 0x7C29, - 0xE023, 0x7BF8, - 0xDF60, 0x7BC5, - 0xDE9E, 0x7B92, - 0xDDDC, 0x7B5D, - 0xDD1A, 0x7B26, - 0xDC59, 0x7AEF, - 0xDB98, 0x7AB6, - 0xDAD7, 0x7A7D, - 0xDA17, 0x7A42, - 0xD957, 0x7A05, - 0xD898, 0x79C8, - 0xD7D9, 0x798A, - 0xD71A, 0x794A, - 0xD65C, 0x7909, - 0xD59E, 0x78C7, - 0xD4E0, 0x7884, - 0xD423, 0x7840, - 0xD367, 0x77FA, - 0xD2AA, 0x77B4, - 0xD1EE, 0x776C, - 0xD133, 0x7723, - 0xD078, 0x76D9, - 0xCFBE, 0x768E, - 0xCF04, 0x7641, - 0xCE4A, 0x75F4, - 0xCD91, 0x75A5, - 0xCCD9, 0x7555, - 0xCC21, 0x7504, - 0xCB69, 0x74B2, - 0xCAB2, 0x745F, - 0xC9FB, 0x740B, - 0xC945, 0x73B5, - 0xC890, 0x735F, - 0xC7DB, 0x7307, - 0xC727, 0x72AF, - 0xC673, 0x7255, - 0xC5BF, 0x71FA, - 0xC50D, 0x719E, - 0xC45A, 0x7141, - 0xC3A9, 0x70E2, - 0xC2F8, 0x7083, - 0xC247, 0x7023, - 0xC197, 0x6FC1, - 0xC0E8, 0x6F5F, - 0xC03A, 0x6EFB, - 0xBF8C, 0x6E96, - 0xBEDE, 0x6E30, - 0xBE31, 0x6DCA, - 0xBD85, 0x6D62, - 0xBCDA, 0x6CF9, - 0xBC2F, 0x6C8F, - 0xBB85, 0x6C24, - 0xBADB, 0x6BB8, - 0xBA32, 0x6B4A, - 0xB98A, 0x6ADC, - 0xB8E3, 0x6A6D, - 0xB83C, 0x69FD, - 0xB796, 0x698C, - 0xB6F0, 0x6919, - 0xB64B, 0x68A6, - 0xB5A7, 0x6832, - 0xB504, 0x67BD, - 0xB461, 0x6746, - 0xB3C0, 0x66CF, - 0xB31E, 0x6657, - 0xB27E, 0x65DD, - 0xB1DE, 0x6563, - 0xB140, 0x64E8, - 0xB0A1, 0x646C, - 0xB004, 0x63EF, - 0xAF68, 0x6371, - 0xAECC, 0x62F2, - 0xAE31, 0x6271, - 0xAD96, 0x61F1, - 0xACFD, 0x616F, - 0xAC64, 0x60EC, - 0xABCC, 0x6068, - 0xAB35, 0x5FE3, - 0xAA9F, 0x5F5E, - 0xAA0A, 0x5ED7, - 0xA975, 0x5E50, - 0xA8E2, 0x5DC7, - 0xA84F, 0x5D3E, - 0xA7BD, 0x5CB4, - 0xA72B, 0x5C29, - 0xA69B, 0x5B9D, - 0xA60C, 0x5B10, - 0xA57D, 0x5A82, - 0xA4EF, 0x59F3, - 0xA462, 0x5964, - 0xA3D6, 0x58D4, - 0xA34B, 0x5842, - 0xA2C1, 0x57B0, - 0xA238, 0x571D, - 0xA1AF, 0x568A, - 0xA128, 0x55F5, - 0xA0A1, 0x5560, - 0xA01C, 0x54CA, - 0x9F97, 0x5433, - 0x9F13, 0x539B, - 0x9E90, 0x5302, - 0x9E0E, 0x5269, - 0x9D8E, 0x51CE, - 0x9D0D, 0x5133, - 0x9C8E, 0x5097, - 0x9C10, 0x4FFB, - 0x9B93, 0x4F5E, - 0x9B17, 0x4EBF, - 0x9A9C, 0x4E21, - 0x9A22, 0x4D81, - 0x99A8, 0x4CE1, - 0x9930, 0x4C3F, - 0x98B9, 0x4B9E, - 0x9842, 0x4AFB, - 0x97CD, 0x4A58, - 0x9759, 0x49B4, - 0x96E6, 0x490F, - 0x9673, 0x4869, - 0x9602, 0x47C3, - 0x9592, 0x471C, - 0x9523, 0x4675, - 0x94B5, 0x45CD, - 0x9447, 0x4524, - 0x93DB, 0x447A, - 0x9370, 0x43D0, - 0x9306, 0x4325, - 0x929D, 0x427A, - 0x9235, 0x41CE, - 0x91CF, 0x4121, - 0x9169, 0x4073, - 0x9104, 0x3FC5, - 0x90A0, 0x3F17, - 0x903E, 0x3E68, - 0x8FDC, 0x3DB8, - 0x8F7C, 0x3D07, - 0x8F1D, 0x3C56, - 0x8EBE, 0x3BA5, - 0x8E61, 0x3AF2, - 0x8E05, 0x3A40, - 0x8DAA, 0x398C, - 0x8D50, 0x38D8, - 0x8CF8, 0x3824, - 0x8CA0, 0x376F, - 0x8C4A, 0x36BA, - 0x8BF4, 0x3604, - 0x8BA0, 0x354D, - 0x8B4D, 0x3496, - 0x8AFB, 0x33DE, - 0x8AAA, 0x3326, - 0x8A5A, 0x326E, - 0x8A0B, 0x31B5, - 0x89BE, 0x30FB, - 0x8971, 0x3041, - 0x8926, 0x2F87, - 0x88DC, 0x2ECC, - 0x8893, 0x2E11, - 0x884B, 0x2D55, - 0x8805, 0x2C98, - 0x87BF, 0x2BDC, - 0x877B, 0x2B1F, - 0x8738, 0x2A61, - 0x86F6, 0x29A3, - 0x86B5, 0x28E5, - 0x8675, 0x2826, - 0x8637, 0x2767, - 0x85FA, 0x26A8, - 0x85BD, 0x25E8, - 0x8582, 0x2528, - 0x8549, 0x2467, - 0x8510, 0x23A6, - 0x84D9, 0x22E5, - 0x84A2, 0x2223, - 0x846D, 0x2161, - 0x843A, 0x209F, - 0x8407, 0x1FDC, - 0x83D6, 0x1F19, - 0x83A5, 0x1E56, - 0x8376, 0x1D93, - 0x8348, 0x1CCF, - 0x831C, 0x1C0B, - 0x82F0, 0x1B47, - 0x82C6, 0x1A82, - 0x829D, 0x19BD, - 0x8275, 0x18F8, - 0x824F, 0x1833, - 0x8229, 0x176D, - 0x8205, 0x16A8, - 0x81E2, 0x15E2, - 0x81C0, 0x151B, - 0x81A0, 0x1455, - 0x8180, 0x138E, - 0x8162, 0x12C8, - 0x8145, 0x1201, - 0x812A, 0x1139, - 0x810F, 0x1072, - 0x80F6, 0x0FAB, - 0x80DE, 0x0EE3, - 0x80C7, 0x0E1B, - 0x80B2, 0x0D53, - 0x809D, 0x0C8B, - 0x808A, 0x0BC3, - 0x8078, 0x0AFB, - 0x8068, 0x0A33, - 0x8058, 0x096A, - 0x804A, 0x08A2, - 0x803D, 0x07D9, - 0x8031, 0x0710, - 0x8027, 0x0647, - 0x801E, 0x057F, - 0x8016, 0x04B6, - 0x800F, 0x03ED, - 0x8009, 0x0324, - 0x8005, 0x025B, - 0x8002, 0x0192, - 0x8000, 0x00C9, - 0x8000, 0x0000, - 0x8000, 0xFF36, - 0x8002, 0xFE6D, - 0x8005, 0xFDA4, - 0x8009, 0xFCDB, - 0x800F, 0xFC12, - 0x8016, 0xFB49, - 0x801E, 0xFA80, - 0x8027, 0xF9B8, - 0x8031, 0xF8EF, - 0x803D, 0xF826, - 0x804A, 0xF75D, - 0x8058, 0xF695, - 0x8068, 0xF5CC, - 0x8078, 0xF504, - 0x808A, 0xF43C, - 0x809D, 0xF374, - 0x80B2, 0xF2AC, - 0x80C7, 0xF1E4, - 0x80DE, 0xF11C, - 0x80F6, 0xF054, - 0x810F, 0xEF8D, - 0x812A, 0xEEC6, - 0x8145, 0xEDFE, - 0x8162, 0xED37, - 0x8180, 0xEC71, - 0x81A0, 0xEBAA, - 0x81C0, 0xEAE4, - 0x81E2, 0xEA1D, - 0x8205, 0xE957, - 0x8229, 0xE892, - 0x824F, 0xE7CC, - 0x8275, 0xE707, - 0x829D, 0xE642, - 0x82C6, 0xE57D, - 0x82F0, 0xE4B8, - 0x831C, 0xE3F4, - 0x8348, 0xE330, - 0x8376, 0xE26C, - 0x83A5, 0xE1A9, - 0x83D6, 0xE0E6, - 0x8407, 0xE023, - 0x843A, 0xDF60, - 0x846D, 0xDE9E, - 0x84A2, 0xDDDC, - 0x84D9, 0xDD1A, - 0x8510, 0xDC59, - 0x8549, 0xDB98, - 0x8582, 0xDAD7, - 0x85BD, 0xDA17, - 0x85FA, 0xD957, - 0x8637, 0xD898, - 0x8675, 0xD7D9, - 0x86B5, 0xD71A, - 0x86F6, 0xD65C, - 0x8738, 0xD59E, - 0x877B, 0xD4E0, - 0x87BF, 0xD423, - 0x8805, 0xD367, - 0x884B, 0xD2AA, - 0x8893, 0xD1EE, - 0x88DC, 0xD133, - 0x8926, 0xD078, - 0x8971, 0xCFBE, - 0x89BE, 0xCF04, - 0x8A0B, 0xCE4A, - 0x8A5A, 0xCD91, - 0x8AAA, 0xCCD9, - 0x8AFB, 0xCC21, - 0x8B4D, 0xCB69, - 0x8BA0, 0xCAB2, - 0x8BF4, 0xC9FB, - 0x8C4A, 0xC945, - 0x8CA0, 0xC890, - 0x8CF8, 0xC7DB, - 0x8D50, 0xC727, - 0x8DAA, 0xC673, - 0x8E05, 0xC5BF, - 0x8E61, 0xC50D, - 0x8EBE, 0xC45A, - 0x8F1D, 0xC3A9, - 0x8F7C, 0xC2F8, - 0x8FDC, 0xC247, - 0x903E, 0xC197, - 0x90A0, 0xC0E8, - 0x9104, 0xC03A, - 0x9169, 0xBF8C, - 0x91CF, 0xBEDE, - 0x9235, 0xBE31, - 0x929D, 0xBD85, - 0x9306, 0xBCDA, - 0x9370, 0xBC2F, - 0x93DB, 0xBB85, - 0x9447, 0xBADB, - 0x94B5, 0xBA32, - 0x9523, 0xB98A, - 0x9592, 0xB8E3, - 0x9602, 0xB83C, - 0x9673, 0xB796, - 0x96E6, 0xB6F0, - 0x9759, 0xB64B, - 0x97CD, 0xB5A7, - 0x9842, 0xB504, - 0x98B9, 0xB461, - 0x9930, 0xB3C0, - 0x99A8, 0xB31E, - 0x9A22, 0xB27E, - 0x9A9C, 0xB1DE, - 0x9B17, 0xB140, - 0x9B93, 0xB0A1, - 0x9C10, 0xB004, - 0x9C8E, 0xAF68, - 0x9D0D, 0xAECC, - 0x9D8E, 0xAE31, - 0x9E0E, 0xAD96, - 0x9E90, 0xACFD, - 0x9F13, 0xAC64, - 0x9F97, 0xABCC, - 0xA01C, 0xAB35, - 0xA0A1, 0xAA9F, - 0xA128, 0xAA0A, - 0xA1AF, 0xA975, - 0xA238, 0xA8E2, - 0xA2C1, 0xA84F, - 0xA34B, 0xA7BD, - 0xA3D6, 0xA72B, - 0xA462, 0xA69B, - 0xA4EF, 0xA60C, - 0xA57D, 0xA57D, - 0xA60C, 0xA4EF, - 0xA69B, 0xA462, - 0xA72B, 0xA3D6, - 0xA7BD, 0xA34B, - 0xA84F, 0xA2C1, - 0xA8E2, 0xA238, - 0xA975, 0xA1AF, - 0xAA0A, 0xA128, - 0xAA9F, 0xA0A1, - 0xAB35, 0xA01C, - 0xABCC, 0x9F97, - 0xAC64, 0x9F13, - 0xACFD, 0x9E90, - 0xAD96, 0x9E0E, - 0xAE31, 0x9D8E, - 0xAECC, 0x9D0D, - 0xAF68, 0x9C8E, - 0xB004, 0x9C10, - 0xB0A1, 0x9B93, - 0xB140, 0x9B17, - 0xB1DE, 0x9A9C, - 0xB27E, 0x9A22, - 0xB31E, 0x99A8, - 0xB3C0, 0x9930, - 0xB461, 0x98B9, - 0xB504, 0x9842, - 0xB5A7, 0x97CD, - 0xB64B, 0x9759, - 0xB6F0, 0x96E6, - 0xB796, 0x9673, - 0xB83C, 0x9602, - 0xB8E3, 0x9592, - 0xB98A, 0x9523, - 0xBA32, 0x94B5, - 0xBADB, 0x9447, - 0xBB85, 0x93DB, - 0xBC2F, 0x9370, - 0xBCDA, 0x9306, - 0xBD85, 0x929D, - 0xBE31, 0x9235, - 0xBEDE, 0x91CF, - 0xBF8C, 0x9169, - 0xC03A, 0x9104, - 0xC0E8, 0x90A0, - 0xC197, 0x903E, - 0xC247, 0x8FDC, - 0xC2F8, 0x8F7C, - 0xC3A9, 0x8F1D, - 0xC45A, 0x8EBE, - 0xC50D, 0x8E61, - 0xC5BF, 0x8E05, - 0xC673, 0x8DAA, - 0xC727, 0x8D50, - 0xC7DB, 0x8CF8, - 0xC890, 0x8CA0, - 0xC945, 0x8C4A, - 0xC9FB, 0x8BF4, - 0xCAB2, 0x8BA0, - 0xCB69, 0x8B4D, - 0xCC21, 0x8AFB, - 0xCCD9, 0x8AAA, - 0xCD91, 0x8A5A, - 0xCE4A, 0x8A0B, - 0xCF04, 0x89BE, - 0xCFBE, 0x8971, - 0xD078, 0x8926, - 0xD133, 0x88DC, - 0xD1EE, 0x8893, - 0xD2AA, 0x884B, - 0xD367, 0x8805, - 0xD423, 0x87BF, - 0xD4E0, 0x877B, - 0xD59E, 0x8738, - 0xD65C, 0x86F6, - 0xD71A, 0x86B5, - 0xD7D9, 0x8675, - 0xD898, 0x8637, - 0xD957, 0x85FA, - 0xDA17, 0x85BD, - 0xDAD7, 0x8582, - 0xDB98, 0x8549, - 0xDC59, 0x8510, - 0xDD1A, 0x84D9, - 0xDDDC, 0x84A2, - 0xDE9E, 0x846D, - 0xDF60, 0x843A, - 0xE023, 0x8407, - 0xE0E6, 0x83D6, - 0xE1A9, 0x83A5, - 0xE26C, 0x8376, - 0xE330, 0x8348, - 0xE3F4, 0x831C, - 0xE4B8, 0x82F0, - 0xE57D, 0x82C6, - 0xE642, 0x829D, - 0xE707, 0x8275, - 0xE7CC, 0x824F, - 0xE892, 0x8229, - 0xE957, 0x8205, - 0xEA1D, 0x81E2, - 0xEAE4, 0x81C0, - 0xEBAA, 0x81A0, - 0xEC71, 0x8180, - 0xED37, 0x8162, - 0xEDFE, 0x8145, - 0xEEC6, 0x812A, - 0xEF8D, 0x810F, - 0xF054, 0x80F6, - 0xF11C, 0x80DE, - 0xF1E4, 0x80C7, - 0xF2AC, 0x80B2, - 0xF374, 0x809D, - 0xF43C, 0x808A, - 0xF504, 0x8078, - 0xF5CC, 0x8068, - 0xF695, 0x8058, - 0xF75D, 0x804A, - 0xF826, 0x803D, - 0xF8EF, 0x8031, - 0xF9B8, 0x8027, - 0xFA80, 0x801E, - 0xFB49, 0x8016, - 0xFC12, 0x800F, - 0xFCDB, 0x8009, - 0xFDA4, 0x8005, - 0xFE6D, 0x8002, - 0xFF36, 0x8000 -}; - -/** -* \par -* Example code for q15 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 2048 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to q15(Fixed point 1.15): -* round(twiddleCoefq15(i) * pow(2, 15)) -* -*/ -const q15_t twiddleCoef_2048_q15[3072] = { - 0x7FFF, 0x0000, - 0x7FFF, 0x0064, - 0x7FFF, 0x00C9, - 0x7FFE, 0x012D, - 0x7FFD, 0x0192, - 0x7FFC, 0x01F6, - 0x7FFA, 0x025B, - 0x7FF8, 0x02BF, - 0x7FF6, 0x0324, - 0x7FF3, 0x0388, - 0x7FF0, 0x03ED, - 0x7FED, 0x0451, - 0x7FE9, 0x04B6, - 0x7FE5, 0x051A, - 0x7FE1, 0x057F, - 0x7FDD, 0x05E3, - 0x7FD8, 0x0647, - 0x7FD3, 0x06AC, - 0x7FCE, 0x0710, - 0x7FC8, 0x0775, - 0x7FC2, 0x07D9, - 0x7FBC, 0x083D, - 0x7FB5, 0x08A2, - 0x7FAE, 0x0906, - 0x7FA7, 0x096A, - 0x7F9F, 0x09CE, - 0x7F97, 0x0A33, - 0x7F8F, 0x0A97, - 0x7F87, 0x0AFB, - 0x7F7E, 0x0B5F, - 0x7F75, 0x0BC3, - 0x7F6B, 0x0C27, - 0x7F62, 0x0C8B, - 0x7F58, 0x0CEF, - 0x7F4D, 0x0D53, - 0x7F43, 0x0DB7, - 0x7F38, 0x0E1B, - 0x7F2D, 0x0E7F, - 0x7F21, 0x0EE3, - 0x7F15, 0x0F47, - 0x7F09, 0x0FAB, - 0x7EFD, 0x100E, - 0x7EF0, 0x1072, - 0x7EE3, 0x10D6, - 0x7ED5, 0x1139, - 0x7EC8, 0x119D, - 0x7EBA, 0x1201, - 0x7EAB, 0x1264, - 0x7E9D, 0x12C8, - 0x7E8E, 0x132B, - 0x7E7F, 0x138E, - 0x7E6F, 0x13F2, - 0x7E5F, 0x1455, - 0x7E4F, 0x14B8, - 0x7E3F, 0x151B, - 0x7E2E, 0x157F, - 0x7E1D, 0x15E2, - 0x7E0C, 0x1645, - 0x7DFA, 0x16A8, - 0x7DE8, 0x170A, - 0x7DD6, 0x176D, - 0x7DC3, 0x17D0, - 0x7DB0, 0x1833, - 0x7D9D, 0x1896, - 0x7D8A, 0x18F8, - 0x7D76, 0x195B, - 0x7D62, 0x19BD, - 0x7D4E, 0x1A20, - 0x7D39, 0x1A82, - 0x7D24, 0x1AE4, - 0x7D0F, 0x1B47, - 0x7CF9, 0x1BA9, - 0x7CE3, 0x1C0B, - 0x7CCD, 0x1C6D, - 0x7CB7, 0x1CCF, - 0x7CA0, 0x1D31, - 0x7C89, 0x1D93, - 0x7C71, 0x1DF5, - 0x7C5A, 0x1E56, - 0x7C42, 0x1EB8, - 0x7C29, 0x1F19, - 0x7C11, 0x1F7B, - 0x7BF8, 0x1FDC, - 0x7BDF, 0x203E, - 0x7BC5, 0x209F, - 0x7BAC, 0x2100, - 0x7B92, 0x2161, - 0x7B77, 0x21C2, - 0x7B5D, 0x2223, - 0x7B42, 0x2284, - 0x7B26, 0x22E5, - 0x7B0B, 0x2345, - 0x7AEF, 0x23A6, - 0x7AD3, 0x2407, - 0x7AB6, 0x2467, - 0x7A9A, 0x24C7, - 0x7A7D, 0x2528, - 0x7A5F, 0x2588, - 0x7A42, 0x25E8, - 0x7A24, 0x2648, - 0x7A05, 0x26A8, - 0x79E7, 0x2707, - 0x79C8, 0x2767, - 0x79A9, 0x27C7, - 0x798A, 0x2826, - 0x796A, 0x2886, - 0x794A, 0x28E5, - 0x792A, 0x2944, - 0x7909, 0x29A3, - 0x78E8, 0x2A02, - 0x78C7, 0x2A61, - 0x78A6, 0x2AC0, - 0x7884, 0x2B1F, - 0x7862, 0x2B7D, - 0x7840, 0x2BDC, - 0x781D, 0x2C3A, - 0x77FA, 0x2C98, - 0x77D7, 0x2CF7, - 0x77B4, 0x2D55, - 0x7790, 0x2DB3, - 0x776C, 0x2E11, - 0x7747, 0x2E6E, - 0x7723, 0x2ECC, - 0x76FE, 0x2F29, - 0x76D9, 0x2F87, - 0x76B3, 0x2FE4, - 0x768E, 0x3041, - 0x7668, 0x309E, - 0x7641, 0x30FB, - 0x761B, 0x3158, - 0x75F4, 0x31B5, - 0x75CC, 0x3211, - 0x75A5, 0x326E, - 0x757D, 0x32CA, - 0x7555, 0x3326, - 0x752D, 0x3382, - 0x7504, 0x33DE, - 0x74DB, 0x343A, - 0x74B2, 0x3496, - 0x7489, 0x34F2, - 0x745F, 0x354D, - 0x7435, 0x35A8, - 0x740B, 0x3604, - 0x73E0, 0x365F, - 0x73B5, 0x36BA, - 0x738A, 0x3714, - 0x735F, 0x376F, - 0x7333, 0x37CA, - 0x7307, 0x3824, - 0x72DB, 0x387E, - 0x72AF, 0x38D8, - 0x7282, 0x3932, - 0x7255, 0x398C, - 0x7227, 0x39E6, - 0x71FA, 0x3A40, - 0x71CC, 0x3A99, - 0x719E, 0x3AF2, - 0x716F, 0x3B4C, - 0x7141, 0x3BA5, - 0x7112, 0x3BFD, - 0x70E2, 0x3C56, - 0x70B3, 0x3CAF, - 0x7083, 0x3D07, - 0x7053, 0x3D60, - 0x7023, 0x3DB8, - 0x6FF2, 0x3E10, - 0x6FC1, 0x3E68, - 0x6F90, 0x3EBF, - 0x6F5F, 0x3F17, - 0x6F2D, 0x3F6E, - 0x6EFB, 0x3FC5, - 0x6EC9, 0x401D, - 0x6E96, 0x4073, - 0x6E63, 0x40CA, - 0x6E30, 0x4121, - 0x6DFD, 0x4177, - 0x6DCA, 0x41CE, - 0x6D96, 0x4224, - 0x6D62, 0x427A, - 0x6D2D, 0x42D0, - 0x6CF9, 0x4325, - 0x6CC4, 0x437B, - 0x6C8F, 0x43D0, - 0x6C59, 0x4425, - 0x6C24, 0x447A, - 0x6BEE, 0x44CF, - 0x6BB8, 0x4524, - 0x6B81, 0x4578, - 0x6B4A, 0x45CD, - 0x6B13, 0x4621, - 0x6ADC, 0x4675, - 0x6AA5, 0x46C9, - 0x6A6D, 0x471C, - 0x6A35, 0x4770, - 0x69FD, 0x47C3, - 0x69C4, 0x4816, - 0x698C, 0x4869, - 0x6953, 0x48BC, - 0x6919, 0x490F, - 0x68E0, 0x4961, - 0x68A6, 0x49B4, - 0x686C, 0x4A06, - 0x6832, 0x4A58, - 0x67F7, 0x4AA9, - 0x67BD, 0x4AFB, - 0x6782, 0x4B4C, - 0x6746, 0x4B9E, - 0x670B, 0x4BEF, - 0x66CF, 0x4C3F, - 0x6693, 0x4C90, - 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0x9602, 0xB83C, - 0x963B, 0xB7E9, - 0x9673, 0xB796, - 0x96AC, 0xB743, - 0x96E6, 0xB6F0, - 0x971F, 0xB69E, - 0x9759, 0xB64B, - 0x9793, 0xB5F9, - 0x97CD, 0xB5A7, - 0x9808, 0xB556, - 0x9842, 0xB504, - 0x987D, 0xB4B3, - 0x98B9, 0xB461, - 0x98F4, 0xB410, - 0x9930, 0xB3C0, - 0x996C, 0xB36F, - 0x99A8, 0xB31E, - 0x99E5, 0xB2CE, - 0x9A22, 0xB27E, - 0x9A5F, 0xB22E, - 0x9A9C, 0xB1DE, - 0x9AD9, 0xB18F, - 0x9B17, 0xB140, - 0x9B55, 0xB0F0, - 0x9B93, 0xB0A1, - 0x9BD2, 0xB053, - 0x9C10, 0xB004, - 0x9C4F, 0xAFB6, - 0x9C8E, 0xAF68, - 0x9CCE, 0xAF1A, - 0x9D0D, 0xAECC, - 0x9D4D, 0xAE7E, - 0x9D8E, 0xAE31, - 0x9DCE, 0xADE3, - 0x9E0E, 0xAD96, - 0x9E4F, 0xAD4A, - 0x9E90, 0xACFD, - 0x9ED2, 0xACB1, - 0x9F13, 0xAC64, - 0x9F55, 0xAC18, - 0x9F97, 0xABCC, - 0x9FD9, 0xAB81, - 0xA01C, 0xAB35, - 0xA05F, 0xAAEA, - 0xA0A1, 0xAA9F, - 0xA0E5, 0xAA54, - 0xA128, 0xAA0A, - 0xA16C, 0xA9BF, - 0xA1AF, 0xA975, - 0xA1F4, 0xA92B, - 0xA238, 0xA8E2, - 0xA27C, 0xA898, - 0xA2C1, 0xA84F, - 0xA306, 0xA806, - 0xA34B, 0xA7BD, - 0xA391, 0xA774, - 0xA3D6, 0xA72B, - 0xA41C, 0xA6E3, - 0xA462, 0xA69B, - 0xA4A9, 0xA653, - 0xA4EF, 0xA60C, - 0xA536, 0xA5C4, - 0xA57D, 0xA57D, - 0xA5C4, 0xA536, - 0xA60C, 0xA4EF, - 0xA653, 0xA4A9, - 0xA69B, 0xA462, - 0xA6E3, 0xA41C, - 0xA72B, 0xA3D6, - 0xA774, 0xA391, - 0xA7BD, 0xA34B, - 0xA806, 0xA306, - 0xA84F, 0xA2C1, - 0xA898, 0xA27C, - 0xA8E2, 0xA238, - 0xA92B, 0xA1F4, - 0xA975, 0xA1AF, - 0xA9BF, 0xA16C, - 0xAA0A, 0xA128, - 0xAA54, 0xA0E5, - 0xAA9F, 0xA0A1, - 0xAAEA, 0xA05F, - 0xAB35, 0xA01C, - 0xAB81, 0x9FD9, - 0xABCC, 0x9F97, - 0xAC18, 0x9F55, - 0xAC64, 0x9F13, - 0xACB1, 0x9ED2, - 0xACFD, 0x9E90, - 0xAD4A, 0x9E4F, - 0xAD96, 0x9E0E, - 0xADE3, 0x9DCE, - 0xAE31, 0x9D8E, - 0xAE7E, 0x9D4D, - 0xAECC, 0x9D0D, - 0xAF1A, 0x9CCE, - 0xAF68, 0x9C8E, - 0xAFB6, 0x9C4F, - 0xB004, 0x9C10, - 0xB053, 0x9BD2, - 0xB0A1, 0x9B93, - 0xB0F0, 0x9B55, - 0xB140, 0x9B17, - 0xB18F, 0x9AD9, - 0xB1DE, 0x9A9C, - 0xB22E, 0x9A5F, - 0xB27E, 0x9A22, - 0xB2CE, 0x99E5, - 0xB31E, 0x99A8, - 0xB36F, 0x996C, - 0xB3C0, 0x9930, - 0xB410, 0x98F4, - 0xB461, 0x98B9, - 0xB4B3, 0x987D, - 0xB504, 0x9842, - 0xB556, 0x9808, - 0xB5A7, 0x97CD, - 0xB5F9, 0x9793, - 0xB64B, 0x9759, - 0xB69E, 0x971F, - 0xB6F0, 0x96E6, - 0xB743, 0x96AC, - 0xB796, 0x9673, - 0xB7E9, 0x963B, - 0xB83C, 0x9602, - 0xB88F, 0x95CA, - 0xB8E3, 0x9592, - 0xB936, 0x955A, - 0xB98A, 0x9523, - 0xB9DE, 0x94EC, - 0xBA32, 0x94B5, - 0xBA87, 0x947E, - 0xBADB, 0x9447, - 0xBB30, 0x9411, - 0xBB85, 0x93DB, - 0xBBDA, 0x93A6, - 0xBC2F, 0x9370, - 0xBC84, 0x933B, - 0xBCDA, 0x9306, - 0xBD2F, 0x92D2, - 0xBD85, 0x929D, - 0xBDDB, 0x9269, - 0xBE31, 0x9235, - 0xBE88, 0x9202, - 0xBEDE, 0x91CF, - 0xBF35, 0x919C, - 0xBF8C, 0x9169, - 0xBFE2, 0x9136, - 0xC03A, 0x9104, - 0xC091, 0x90D2, - 0xC0E8, 0x90A0, - 0xC140, 0x906F, - 0xC197, 0x903E, - 0xC1EF, 0x900D, - 0xC247, 0x8FDC, - 0xC29F, 0x8FAC, - 0xC2F8, 0x8F7C, - 0xC350, 0x8F4C, - 0xC3A9, 0x8F1D, - 0xC402, 0x8EED, - 0xC45A, 0x8EBE, - 0xC4B3, 0x8E90, - 0xC50D, 0x8E61, - 0xC566, 0x8E33, - 0xC5BF, 0x8E05, - 0xC619, 0x8DD8, - 0xC673, 0x8DAA, - 0xC6CD, 0x8D7D, - 0xC727, 0x8D50, - 0xC781, 0x8D24, - 0xC7DB, 0x8CF8, - 0xC835, 0x8CCC, - 0xC890, 0x8CA0, - 0xC8EB, 0x8C75, - 0xC945, 0x8C4A, - 0xC9A0, 0x8C1F, - 0xC9FB, 0x8BF4, - 0xCA57, 0x8BCA, - 0xCAB2, 0x8BA0, - 0xCB0D, 0x8B76, - 0xCB69, 0x8B4D, - 0xCBC5, 0x8B24, - 0xCC21, 0x8AFB, - 0xCC7D, 0x8AD2, - 0xCCD9, 0x8AAA, - 0xCD35, 0x8A82, - 0xCD91, 0x8A5A, - 0xCDEE, 0x8A33, - 0xCE4A, 0x8A0B, - 0xCEA7, 0x89E4, - 0xCF04, 0x89BE, - 0xCF61, 0x8997, - 0xCFBE, 0x8971, - 0xD01B, 0x894C, - 0xD078, 0x8926, - 0xD0D6, 0x8901, - 0xD133, 0x88DC, - 0xD191, 0x88B8, - 0xD1EE, 0x8893, - 0xD24C, 0x886F, - 0xD2AA, 0x884B, - 0xD308, 0x8828, - 0xD367, 0x8805, - 0xD3C5, 0x87E2, - 0xD423, 0x87BF, - 0xD482, 0x879D, - 0xD4E0, 0x877B, - 0xD53F, 0x8759, - 0xD59E, 0x8738, - 0xD5FD, 0x8717, - 0xD65C, 0x86F6, - 0xD6BB, 0x86D5, - 0xD71A, 0x86B5, - 0xD779, 0x8695, - 0xD7D9, 0x8675, - 0xD838, 0x8656, - 0xD898, 0x8637, - 0xD8F8, 0x8618, - 0xD957, 0x85FA, - 0xD9B7, 0x85DB, - 0xDA17, 0x85BD, - 0xDA77, 0x85A0, - 0xDAD7, 0x8582, - 0xDB38, 0x8565, - 0xDB98, 0x8549, - 0xDBF8, 0x852C, - 0xDC59, 0x8510, - 0xDCBA, 0x84F4, - 0xDD1A, 0x84D9, - 0xDD7B, 0x84BD, - 0xDDDC, 0x84A2, - 0xDE3D, 0x8488, - 0xDE9E, 0x846D, - 0xDEFF, 0x8453, - 0xDF60, 0x843A, - 0xDFC1, 0x8420, - 0xE023, 0x8407, - 0xE084, 0x83EE, - 0xE0E6, 0x83D6, - 0xE147, 0x83BD, - 0xE1A9, 0x83A5, - 0xE20A, 0x838E, - 0xE26C, 0x8376, - 0xE2CE, 0x835F, - 0xE330, 0x8348, - 0xE392, 0x8332, - 0xE3F4, 0x831C, - 0xE456, 0x8306, - 0xE4B8, 0x82F0, - 0xE51B, 0x82DB, - 0xE57D, 0x82C6, - 0xE5DF, 0x82B1, - 0xE642, 0x829D, - 0xE6A4, 0x8289, - 0xE707, 0x8275, - 0xE769, 0x8262, - 0xE7CC, 0x824F, - 0xE82F, 0x823C, - 0xE892, 0x8229, - 0xE8F5, 0x8217, - 0xE957, 0x8205, - 0xE9BA, 0x81F3, - 0xEA1D, 0x81E2, - 0xEA80, 0x81D1, - 0xEAE4, 0x81C0, - 0xEB47, 0x81B0, - 0xEBAA, 0x81A0, - 0xEC0D, 0x8190, - 0xEC71, 0x8180, - 0xECD4, 0x8171, - 0xED37, 0x8162, - 0xED9B, 0x8154, - 0xEDFE, 0x8145, - 0xEE62, 0x8137, - 0xEEC6, 0x812A, - 0xEF29, 0x811C, - 0xEF8D, 0x810F, - 0xEFF1, 0x8102, - 0xF054, 0x80F6, - 0xF0B8, 0x80EA, - 0xF11C, 0x80DE, - 0xF180, 0x80D2, - 0xF1E4, 0x80C7, - 0xF248, 0x80BC, - 0xF2AC, 0x80B2, - 0xF310, 0x80A7, - 0xF374, 0x809D, - 0xF3D8, 0x8094, - 0xF43C, 0x808A, - 0xF4A0, 0x8081, - 0xF504, 0x8078, - 0xF568, 0x8070, - 0xF5CC, 0x8068, - 0xF631, 0x8060, - 0xF695, 0x8058, - 0xF6F9, 0x8051, - 0xF75D, 0x804A, - 0xF7C2, 0x8043, - 0xF826, 0x803D, - 0xF88A, 0x8037, - 0xF8EF, 0x8031, - 0xF953, 0x802C, - 0xF9B8, 0x8027, - 0xFA1C, 0x8022, - 0xFA80, 0x801E, - 0xFAE5, 0x801A, - 0xFB49, 0x8016, - 0xFBAE, 0x8012, - 0xFC12, 0x800F, - 0xFC77, 0x800C, - 0xFCDB, 0x8009, - 0xFD40, 0x8007, - 0xFDA4, 0x8005, - 0xFE09, 0x8003, - 0xFE6D, 0x8002, - 0xFED2, 0x8001, - 0xFF36, 0x8000, - 0xFF9B, 0x8000 -}; - -/** -* \par -* Example code for q15 Twiddle factors Generation:: -* \par -* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* }
-* \par -* where N = 4096 and PI = 3.14159265358979 -* \par -* Cos and Sin values are interleaved fashion -* \par -* Convert Floating point to q15(Fixed point 1.15): -* round(twiddleCoefq15(i) * pow(2, 15)) -* -*/ -const q15_t twiddleCoef_4096_q15[6144] = -{ - 0x7FFF, 0x0000, - 0x7FFF, 0x0032, - 0x7FFF, 0x0064, - 0x7FFF, 0x0096, - 0x7FFF, 0x00C9, - 0x7FFF, 0x00FB, - 0x7FFE, 0x012D, - 0x7FFE, 0x015F, - 0x7FFD, 0x0192, - 0x7FFC, 0x01C4, - 0x7FFC, 0x01F6, - 0x7FFB, 0x0228, - 0x7FFA, 0x025B, - 0x7FF9, 0x028D, - 0x7FF8, 0x02BF, - 0x7FF7, 0x02F1, - 0x7FF6, 0x0324, - 0x7FF4, 0x0356, - 0x7FF3, 0x0388, - 0x7FF2, 0x03BA, - 0x7FF0, 0x03ED, - 0x7FEE, 0x041F, - 0x7FED, 0x0451, - 0x7FEB, 0x0483, - 0x7FE9, 0x04B6, - 0x7FE7, 0x04E8, - 0x7FE5, 0x051A, - 0x7FE3, 0x054C, - 0x7FE1, 0x057F, - 0x7FDF, 0x05B1, - 0x7FDD, 0x05E3, - 0x7FDA, 0x0615, - 0x7FD8, 0x0647, - 0x7FD6, 0x067A, - 0x7FD3, 0x06AC, - 0x7FD0, 0x06DE, - 0x7FCE, 0x0710, - 0x7FCB, 0x0742, - 0x7FC8, 0x0775, - 0x7FC5, 0x07A7, - 0x7FC2, 0x07D9, - 0x7FBF, 0x080B, - 0x7FBC, 0x083D, - 0x7FB8, 0x086F, - 0x7FB5, 0x08A2, - 0x7FB1, 0x08D4, - 0x7FAE, 0x0906, - 0x7FAA, 0x0938, - 0x7FA7, 0x096A, - 0x7FA3, 0x099C, - 0x7F9F, 0x09CE, - 0x7F9B, 0x0A00, - 0x7F97, 0x0A33, - 0x7F93, 0x0A65, - 0x7F8F, 0x0A97, - 0x7F8B, 0x0AC9, - 0x7F87, 0x0AFB, - 0x7F82, 0x0B2D, - 0x7F7E, 0x0B5F, - 0x7F79, 0x0B91, - 0x7F75, 0x0BC3, - 0x7F70, 0x0BF5, - 0x7F6B, 0x0C27, - 0x7F67, 0x0C59, - 0x7F62, 0x0C8B, - 0x7F5D, 0x0CBD, - 0x7F58, 0x0CEF, - 0x7F53, 0x0D21, - 0x7F4D, 0x0D53, - 0x7F48, 0x0D85, - 0x7F43, 0x0DB7, - 0x7F3D, 0x0DE9, - 0x7F38, 0x0E1B, - 0x7F32, 0x0E4D, - 0x7F2D, 0x0E7F, - 0x7F27, 0x0EB1, - 0x7F21, 0x0EE3, - 0x7F1B, 0x0F15, - 0x7F15, 0x0F47, - 0x7F0F, 0x0F79, - 0x7F09, 0x0FAB, - 0x7F03, 0x0FDD, - 0x7EFD, 0x100E, - 0x7EF6, 0x1040, - 0x7EF0, 0x1072, - 0x7EE9, 0x10A4, - 0x7EE3, 0x10D6, - 0x7EDC, 0x1108, - 0x7ED5, 0x1139, - 0x7ECF, 0x116B, - 0x7EC8, 0x119D, - 0x7EC1, 0x11CF, - 0x7EBA, 0x1201, - 0x7EB3, 0x1232, - 0x7EAB, 0x1264, - 0x7EA4, 0x1296, - 0x7E9D, 0x12C8, - 0x7E95, 0x12F9, - 0x7E8E, 0x132B, - 0x7E86, 0x135D, - 0x7E7F, 0x138E, - 0x7E77, 0x13C0, - 0x7E6F, 0x13F2, - 0x7E67, 0x1423, - 0x7E5F, 0x1455, - 0x7E57, 0x1487, - 0x7E4F, 0x14B8, - 0x7E47, 0x14EA, - 0x7E3F, 0x151B, - 0x7E37, 0x154D, - 0x7E2E, 0x157F, - 0x7E26, 0x15B0, - 0x7E1D, 0x15E2, - 0x7E14, 0x1613, - 0x7E0C, 0x1645, - 0x7E03, 0x1676, - 0x7DFA, 0x16A8, - 0x7DF1, 0x16D9, - 0x7DE8, 0x170A, - 0x7DDF, 0x173C, - 0x7DD6, 0x176D, - 0x7DCD, 0x179F, - 0x7DC3, 0x17D0, - 0x7DBA, 0x1802, - 0x7DB0, 0x1833, - 0x7DA7, 0x1864, - 0x7D9D, 0x1896, - 0x7D94, 0x18C7, - 0x7D8A, 0x18F8, - 0x7D80, 0x192A, - 0x7D76, 0x195B, - 0x7D6C, 0x198C, - 0x7D62, 0x19BD, - 0x7D58, 0x19EF, - 0x7D4E, 0x1A20, - 0x7D43, 0x1A51, - 0x7D39, 0x1A82, - 0x7D2F, 0x1AB3, - 0x7D24, 0x1AE4, - 0x7D19, 0x1B16, - 0x7D0F, 0x1B47, - 0x7D04, 0x1B78, - 0x7CF9, 0x1BA9, - 0x7CEE, 0x1BDA, - 0x7CE3, 0x1C0B, - 0x7CD8, 0x1C3C, - 0x7CCD, 0x1C6D, - 0x7CC2, 0x1C9E, - 0x7CB7, 0x1CCF, - 0x7CAB, 0x1D00, - 0x7CA0, 0x1D31, - 0x7C94, 0x1D62, - 0x7C89, 0x1D93, - 0x7C7D, 0x1DC4, - 0x7C71, 0x1DF5, - 0x7C66, 0x1E25, - 0x7C5A, 0x1E56, - 0x7C4E, 0x1E87, - 0x7C42, 0x1EB8, - 0x7C36, 0x1EE9, - 0x7C29, 0x1F19, - 0x7C1D, 0x1F4A, - 0x7C11, 0x1F7B, - 0x7C05, 0x1FAC, - 0x7BF8, 0x1FDC, - 0x7BEB, 0x200D, - 0x7BDF, 0x203E, - 0x7BD2, 0x206E, - 0x7BC5, 0x209F, - 0x7BB9, 0x20D0, - 0x7BAC, 0x2100, - 0x7B9F, 0x2131, - 0x7B92, 0x2161, - 0x7B84, 0x2192, - 0x7B77, 0x21C2, - 0x7B6A, 0x21F3, - 0x7B5D, 0x2223, - 0x7B4F, 0x2254, - 0x7B42, 0x2284, - 0x7B34, 0x22B4, - 0x7B26, 0x22E5, - 0x7B19, 0x2315, - 0x7B0B, 0x2345, - 0x7AFD, 0x2376, - 0x7AEF, 0x23A6, - 0x7AE1, 0x23D6, - 0x7AD3, 0x2407, - 0x7AC5, 0x2437, - 0x7AB6, 0x2467, - 0x7AA8, 0x2497, - 0x7A9A, 0x24C7, - 0x7A8B, 0x24F7, - 0x7A7D, 0x2528, - 0x7A6E, 0x2558, - 0x7A5F, 0x2588, - 0x7A50, 0x25B8, - 0x7A42, 0x25E8, - 0x7A33, 0x2618, - 0x7A24, 0x2648, - 0x7A15, 0x2678, - 0x7A05, 0x26A8, - 0x79F6, 0x26D8, - 0x79E7, 0x2707, - 0x79D8, 0x2737, - 0x79C8, 0x2767, - 0x79B9, 0x2797, - 0x79A9, 0x27C7, - 0x7999, 0x27F6, - 0x798A, 0x2826, - 0x797A, 0x2856, - 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0xDE3D, 0x8488, - 0xDE6D, 0x847B, - 0xDE9E, 0x846D, - 0xDECE, 0x8460, - 0xDEFF, 0x8453, - 0xDF2F, 0x8446, - 0xDF60, 0x843A, - 0xDF91, 0x842D, - 0xDFC1, 0x8420, - 0xDFF2, 0x8414, - 0xE023, 0x8407, - 0xE053, 0x83FA, - 0xE084, 0x83EE, - 0xE0B5, 0x83E2, - 0xE0E6, 0x83D6, - 0xE116, 0x83C9, - 0xE147, 0x83BD, - 0xE178, 0x83B1, - 0xE1A9, 0x83A5, - 0xE1DA, 0x8399, - 0xE20A, 0x838E, - 0xE23B, 0x8382, - 0xE26C, 0x8376, - 0xE29D, 0x836B, - 0xE2CE, 0x835F, - 0xE2FF, 0x8354, - 0xE330, 0x8348, - 0xE361, 0x833D, - 0xE392, 0x8332, - 0xE3C3, 0x8327, - 0xE3F4, 0x831C, - 0xE425, 0x8311, - 0xE456, 0x8306, - 0xE487, 0x82FB, - 0xE4B8, 0x82F0, - 0xE4E9, 0x82E6, - 0xE51B, 0x82DB, - 0xE54C, 0x82D0, - 0xE57D, 0x82C6, - 0xE5AE, 0x82BC, - 0xE5DF, 0x82B1, - 0xE610, 0x82A7, - 0xE642, 0x829D, - 0xE673, 0x8293, - 0xE6A4, 0x8289, - 0xE6D5, 0x827F, - 0xE707, 0x8275, - 0xE738, 0x826B, - 0xE769, 0x8262, - 0xE79B, 0x8258, - 0xE7CC, 0x824F, - 0xE7FD, 0x8245, - 0xE82F, 0x823C, - 0xE860, 0x8232, - 0xE892, 0x8229, - 0xE8C3, 0x8220, - 0xE8F5, 0x8217, - 0xE926, 0x820E, - 0xE957, 0x8205, - 0xE989, 0x81FC, - 0xE9BA, 0x81F3, - 0xE9EC, 0x81EB, - 0xEA1D, 0x81E2, - 0xEA4F, 0x81D9, - 0xEA80, 0x81D1, - 0xEAB2, 0x81C8, - 0xEAE4, 0x81C0, - 0xEB15, 0x81B8, - 0xEB47, 0x81B0, - 0xEB78, 0x81A8, - 0xEBAA, 0x81A0, - 0xEBDC, 0x8198, - 0xEC0D, 0x8190, - 0xEC3F, 0x8188, - 0xEC71, 0x8180, - 0xECA2, 0x8179, - 0xECD4, 0x8171, - 0xED06, 0x816A, - 0xED37, 0x8162, - 0xED69, 0x815B, - 0xED9B, 0x8154, - 0xEDCD, 0x814C, - 0xEDFE, 0x8145, - 0xEE30, 0x813E, - 0xEE62, 0x8137, - 0xEE94, 0x8130, - 0xEEC6, 0x812A, - 0xEEF7, 0x8123, - 0xEF29, 0x811C, - 0xEF5B, 0x8116, - 0xEF8D, 0x810F, - 0xEFBF, 0x8109, - 0xEFF1, 0x8102, - 0xF022, 0x80FC, - 0xF054, 0x80F6, - 0xF086, 0x80F0, - 0xF0B8, 0x80EA, - 0xF0EA, 0x80E4, - 0xF11C, 0x80DE, - 0xF14E, 0x80D8, - 0xF180, 0x80D2, - 0xF1B2, 0x80CD, - 0xF1E4, 0x80C7, - 0xF216, 0x80C2, - 0xF248, 0x80BC, - 0xF27A, 0x80B7, - 0xF2AC, 0x80B2, - 0xF2DE, 0x80AC, - 0xF310, 0x80A7, - 0xF342, 0x80A2, - 0xF374, 0x809D, - 0xF3A6, 0x8098, - 0xF3D8, 0x8094, - 0xF40A, 0x808F, - 0xF43C, 0x808A, - 0xF46E, 0x8086, - 0xF4A0, 0x8081, - 0xF4D2, 0x807D, - 0xF504, 0x8078, - 0xF536, 0x8074, - 0xF568, 0x8070, - 0xF59A, 0x806C, - 0xF5CC, 0x8068, - 0xF5FF, 0x8064, - 0xF631, 0x8060, - 0xF663, 0x805C, - 0xF695, 0x8058, - 0xF6C7, 0x8055, - 0xF6F9, 0x8051, - 0xF72B, 0x804E, - 0xF75D, 0x804A, - 0xF790, 0x8047, - 0xF7C2, 0x8043, - 0xF7F4, 0x8040, - 0xF826, 0x803D, - 0xF858, 0x803A, - 0xF88A, 0x8037, - 0xF8BD, 0x8034, - 0xF8EF, 0x8031, - 0xF921, 0x802F, - 0xF953, 0x802C, - 0xF985, 0x8029, - 0xF9B8, 0x8027, - 0xF9EA, 0x8025, - 0xFA1C, 0x8022, - 0xFA4E, 0x8020, - 0xFA80, 0x801E, - 0xFAB3, 0x801C, - 0xFAE5, 0x801A, - 0xFB17, 0x8018, - 0xFB49, 0x8016, - 0xFB7C, 0x8014, - 0xFBAE, 0x8012, - 0xFBE0, 0x8011, - 0xFC12, 0x800F, - 0xFC45, 0x800D, - 0xFC77, 0x800C, - 0xFCA9, 0x800B, - 0xFCDB, 0x8009, - 0xFD0E, 0x8008, - 0xFD40, 0x8007, - 0xFD72, 0x8006, - 0xFDA4, 0x8005, - 0xFDD7, 0x8004, - 0xFE09, 0x8003, - 0xFE3B, 0x8003, - 0xFE6D, 0x8002, - 0xFEA0, 0x8001, - 0xFED2, 0x8001, - 0xFF04, 0x8000, - 0xFF36, 0x8000, - 0xFF69, 0x8000, - 0xFF9B, 0x8000, - 0xFFCD, 0x8000 -}; - - -/** -* @} end of CFFT_CIFFT group -*/ - -/* -* @brief Q15 table for reciprocal -*/ -const q15_t ALIGN4 armRecipTableQ15[64] = { - 0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0, - 0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82, - 0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484, - 0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0, - 0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E, - 0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255, - 0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6, - 0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978, - 0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8, - 0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255, - 0x41CC, 0x4146, 0x40C2, 0x4040 -}; - -/* -* @brief Q31 table for reciprocal -*/ -const q31_t armRecipTableQ31[64] = { - 0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928, - 0x7434554D, 0x72943B4B, 0x70FF9C40, 0x6F760031, 0x6DF6F593, 0x6C8210E3, - 0x6B16EC3A, 0x69B526F6, 0x685C655F, 0x670C505D, 0x65C4952D, 0x6484E519, - 0x634CF53E, 0x621C7E4F, 0x60F33C61, 0x5FD0EEB3, 0x5EB55785, 0x5DA03BEB, - 0x5C9163A1, 0x5B8898E6, 0x5A85A85A, 0x598860DF, 0x58909373, 0x579E1318, - 0x56B0B4B8, 0x55C84F0B, 0x54E4BA80, 0x5405D124, 0x532B6E8F, 0x52556FD0, - 0x5183B35A, 0x50B618F3, 0x4FEC81A2, 0x4F26CFA2, 0x4E64E64E, 0x4DA6AA1D, - 0x4CEC008B, 0x4C34D010, 0x4B810016, 0x4AD078EF, 0x4A2323C4, 0x4978EA96, - 0x48D1B827, 0x482D77FE, 0x478C1657, 0x46ED801D, 0x4651A2E5, 0x45B86CE2, - 0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426, - 0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102 -}; - -const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH] = -{ - //8x2, size 20 - 8,64, 24,72, 16,64, 40,80, 32,64, 56,88, 48,72, 88,104, 72,96, 104,112 -}; - -const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH] = -{ - //8x4, size 48 - 8,64, 16,128, 24,192, 32,64, 40,72, 48,136, 56,200, 64,128, 72,80, 88,208, - 80,144, 96,192, 104,208, 112,152, 120,216, 136,192, 144,160, 168,208, - 152,224, 176,208, 184,232, 216,240, 200,224, 232,240 -}; - -const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH] = -{ - //radix 8, size 56 - 8,64, 16,128, 24,192, 32,256, 40,320, 48,384, 56,448, 80,136, 88,200, - 96,264, 104,328, 112,392, 120,456, 152,208, 160,272, 168,336, 176,400, - 184,464, 224,280, 232,344, 240,408, 248,472, 296,352, 304,416, 312,480, - 368,424, 376,488, 440,496 -}; - -const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH] = -{ - //8x2, size 208 - 8,512, 16,64, 24,576, 32,128, 40,640, 48,192, 56,704, 64,256, 72,768, - 80,320, 88,832, 96,384, 104,896, 112,448, 120,960, 128,512, 136,520, - 144,768, 152,584, 160,520, 168,648, 176,200, 184,712, 192,264, 200,776, - 208,328, 216,840, 224,392, 232,904, 240,456, 248,968, 264,528, 272,320, - 280,592, 288,768, 296,656, 304,328, 312,720, 328,784, 344,848, 352,400, - 360,912, 368,464, 376,976, 384,576, 392,536, 400,832, 408,600, 416,584, - 424,664, 432,840, 440,728, 448,592, 456,792, 464,848, 472,856, 480,600, - 488,920, 496,856, 504,984, 520,544, 528,576, 536,608, 552,672, 560,608, - 568,736, 576,768, 584,800, 592,832, 600,864, 608,800, 616,928, 624,864, - 632,992, 648,672, 656,896, 664,928, 688,904, 696,744, 704,896, 712,808, - 720,912, 728,872, 736,928, 744,936, 752,920, 760,1000, 776,800, 784,832, - 792,864, 808,904, 816,864, 824,920, 840,864, 856,880, 872,944, 888,1008, - 904,928, 912,960, 920,992, 944,968, 952,1000, 968,992, 984,1008 -}; - -const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH] = -{ - //8x4, size 440 - 8,512, 16,1024, 24,1536, 32,64, 40,576, 48,1088, 56,1600, 64,128, 72,640, - 80,1152, 88,1664, 96,192, 104,704, 112,1216, 120,1728, 128,256, 136,768, - 144,1280, 152,1792, 160,320, 168,832, 176,1344, 184,1856, 192,384, - 200,896, 208,1408, 216,1920, 224,448, 232,960, 240,1472, 248,1984, - 256,512, 264,520, 272,1032, 280,1544, 288,640, 296,584, 304,1096, 312,1608, - 320,768, 328,648, 336,1160, 344,1672, 352,896, 360,712, 368,1224, 376,1736, - 384,520, 392,776, 400,1288, 408,1800, 416,648, 424,840, 432,1352, 440,1864, - 448,776, 456,904, 464,1416, 472,1928, 480,904, 488,968, 496,1480, 504,1992, - 520,528, 512,1024, 528,1040, 536,1552, 544,1152, 552,592, 560,1104, - 568,1616, 576,1280, 584,656, 592,1168, 600,1680, 608,1408, 616,720, - 624,1232, 632,1744, 640,1032, 648,784, 656,1296, 664,1808, 672,1160, - 680,848, 688,1360, 696,1872, 704,1288, 712,912, 720,1424, 728,1936, - 736,1416, 744,976, 752,1488, 760,2000, 768,1536, 776,1552, 784,1048, - 792,1560, 800,1664, 808,1680, 816,1112, 824,1624, 832,1792, 840,1808, - 848,1176, 856,1688, 864,1920, 872,1936, 880,1240, 888,1752, 896,1544, - 904,1560, 912,1304, 920,1816, 928,1672, 936,1688, 944,1368, 952,1880, - 960,1800, 968,1816, 976,1432, 984,1944, 992,1928, 1000,1944, 1008,1496, - 1016,2008, 1032,1152, 1040,1056, 1048,1568, 1064,1408, 1072,1120, - 1080,1632, 1088,1536, 1096,1160, 1104,1184, 1112,1696, 1120,1552, - 1128,1416, 1136,1248, 1144,1760, 1160,1664, 1168,1312, 1176,1824, - 1184,1544, 1192,1920, 1200,1376, 1208,1888, 1216,1568, 1224,1672, - 1232,1440, 1240,1952, 1248,1560, 1256,1928, 1264,1504, 1272,2016, - 1288,1312, 1296,1408, 1304,1576, 1320,1424, 1328,1416, 1336,1640, - 1344,1792, 1352,1824, 1360,1920, 1368,1704, 1376,1800, 1384,1432, - 1392,1928, 1400,1768, 1416,1680, 1432,1832, 1440,1576, 1448,1936, - 1456,1832, 1464,1896, 1472,1808, 1480,1688, 1488,1936, 1496,1960, - 1504,1816, 1512,1944, 1520,1944, 1528,2024, 1560,1584, 1592,1648, - 1600,1792, 1608,1920, 1616,1800, 1624,1712, 1632,1808, 1640,1936, - 1648,1816, 1656,1776, 1672,1696, 1688,1840, 1704,1952, 1712,1928, - 1720,1904, 1728,1824, 1736,1952, 1744,1832, 1752,1968, 1760,1840, - 1768,1960, 1776,1944, 1784,2032, 1864,1872, 1848,1944, 1872,1888, - 1880,1904, 1888,1984, 1896,2000, 1912,2032, 1904,2016, 1976,2032, - 1960,1968, 2008,2032, 1992,2016, 2024,2032 -}; - -const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH] = -{ - //radix 8, size 448 - 8,512, 16,1024, 24,1536, 32,2048, 40,2560, 48,3072, 56,3584, 72,576, - 80,1088, 88,1600, 96,2112, 104,2624, 112,3136, 120,3648, 136,640, 144,1152, - 152,1664, 160,2176, 168,2688, 176,3200, 184,3712, 200,704, 208,1216, - 216,1728, 224,2240, 232,2752, 240,3264, 248,3776, 264,768, 272,1280, - 280,1792, 288,2304, 296,2816, 304,3328, 312,3840, 328,832, 336,1344, - 344,1856, 352,2368, 360,2880, 368,3392, 376,3904, 392,896, 400,1408, - 408,1920, 416,2432, 424,2944, 432,3456, 440,3968, 456,960, 464,1472, - 472,1984, 480,2496, 488,3008, 496,3520, 504,4032, 528,1032, 536,1544, - 544,2056, 552,2568, 560,3080, 568,3592, 592,1096, 600,1608, 608,2120, - 616,2632, 624,3144, 632,3656, 656,1160, 664,1672, 672,2184, 680,2696, - 688,3208, 696,3720, 720,1224, 728,1736, 736,2248, 744,2760, 752,3272, - 760,3784, 784,1288, 792,1800, 800,2312, 808,2824, 816,3336, 824,3848, - 848,1352, 856,1864, 864,2376, 872,2888, 880,3400, 888,3912, 912,1416, - 920,1928, 928,2440, 936,2952, 944,3464, 952,3976, 976,1480, 984,1992, - 992,2504, 1000,3016, 1008,3528, 1016,4040, 1048,1552, 1056,2064, 1064,2576, - 1072,3088, 1080,3600, 1112,1616, 1120,2128, 1128,2640, 1136,3152, - 1144,3664, 1176,1680, 1184,2192, 1192,2704, 1200,3216, 1208,3728, - 1240,1744, 1248,2256, 1256,2768, 1264,3280, 1272,3792, 1304,1808, - 1312,2320, 1320,2832, 1328,3344, 1336,3856, 1368,1872, 1376,2384, - 1384,2896, 1392,3408, 1400,3920, 1432,1936, 1440,2448, 1448,2960, - 1456,3472, 1464,3984, 1496,2000, 1504,2512, 1512,3024, 1520,3536, - 1528,4048, 1568,2072, 1576,2584, 1584,3096, 1592,3608, 1632,2136, - 1640,2648, 1648,3160, 1656,3672, 1696,2200, 1704,2712, 1712,3224, - 1720,3736, 1760,2264, 1768,2776, 1776,3288, 1784,3800, 1824,2328, - 1832,2840, 1840,3352, 1848,3864, 1888,2392, 1896,2904, 1904,3416, - 1912,3928, 1952,2456, 1960,2968, 1968,3480, 1976,3992, 2016,2520, - 2024,3032, 2032,3544, 2040,4056, 2088,2592, 2096,3104, 2104,3616, - 2152,2656, 2160,3168, 2168,3680, 2216,2720, 2224,3232, 2232,3744, - 2280,2784, 2288,3296, 2296,3808, 2344,2848, 2352,3360, 2360,3872, - 2408,2912, 2416,3424, 2424,3936, 2472,2976, 2480,3488, 2488,4000, - 2536,3040, 2544,3552, 2552,4064, 2608,3112, 2616,3624, 2672,3176, - 2680,3688, 2736,3240, 2744,3752, 2800,3304, 2808,3816, 2864,3368, - 2872,3880, 2928,3432, 2936,3944, 2992,3496, 3000,4008, 3056,3560, - 3064,4072, 3128,3632, 3192,3696, 3256,3760, 3320,3824, 3384,3888, - 3448,3952, 3512,4016, 3576,4080 -}; - -const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH] = -{ - //8x2, size 1800 - 8,4096, 16,512, 24,4608, 32,1024, 40,5120, 48,1536, 56,5632, 64,2048, - 72,6144, 80,2560, 88,6656, 96,3072, 104,7168, 112,3584, 120,7680, 128,2048, - 136,4160, 144,576, 152,4672, 160,1088, 168,5184, 176,1600, 184,5696, - 192,2112, 200,6208, 208,2624, 216,6720, 224,3136, 232,7232, 240,3648, - 248,7744, 256,2048, 264,4224, 272,640, 280,4736, 288,1152, 296,5248, - 304,1664, 312,5760, 320,2176, 328,6272, 336,2688, 344,6784, 352,3200, - 360,7296, 368,3712, 376,7808, 384,2112, 392,4288, 400,704, 408,4800, - 416,1216, 424,5312, 432,1728, 440,5824, 448,2240, 456,6336, 464,2752, - 472,6848, 480,3264, 488,7360, 496,3776, 504,7872, 512,2048, 520,4352, - 528,768, 536,4864, 544,1280, 552,5376, 560,1792, 568,5888, 576,2304, - 584,6400, 592,2816, 600,6912, 608,3328, 616,7424, 624,3840, 632,7936, - 640,2176, 648,4416, 656,832, 664,4928, 672,1344, 680,5440, 688,1856, - 696,5952, 704,2368, 712,6464, 720,2880, 728,6976, 736,3392, 744,7488, - 752,3904, 760,8000, 768,2112, 776,4480, 784,896, 792,4992, 800,1408, - 808,5504, 816,1920, 824,6016, 832,2432, 840,6528, 848,2944, 856,7040, - 864,3456, 872,7552, 880,3968, 888,8064, 896,2240, 904,4544, 912,960, - 920,5056, 928,1472, 936,5568, 944,1984, 952,6080, 960,2496, 968,6592, - 976,3008, 984,7104, 992,3520, 1000,7616, 1008,4032, 1016,8128, 1024,4096, - 1032,4104, 1040,4352, 1048,4616, 1056,4104, 1064,5128, 1072,1544, - 1080,5640, 1088,2056, 1096,6152, 1104,2568, 1112,6664, 1120,3080, - 1128,7176, 1136,3592, 1144,7688, 1152,6144, 1160,4168, 1168,6400, - 1176,4680, 1184,6152, 1192,5192, 1200,1608, 1208,5704, 1216,2120, - 1224,6216, 1232,2632, 1240,6728, 1248,3144, 1256,7240, 1264,3656, - 1272,7752, 1280,4160, 1288,4232, 1296,4416, 1304,4744, 1312,4168, - 1320,5256, 1328,1672, 1336,5768, 1344,2184, 1352,6280, 1360,2696, - 1368,6792, 1376,3208, 1384,7304, 1392,3720, 1400,7816, 1408,6208, - 1416,4296, 1424,6464, 1432,4808, 1440,6216, 1448,5320, 1456,1736, - 1464,5832, 1472,2248, 1480,6344, 1488,2760, 1496,6856, 1504,3272, - 1512,7368, 1520,3784, 1528,7880, 1536,4224, 1544,4360, 1552,4480, - 1560,4872, 1568,4232, 1576,5384, 1584,1800, 1592,5896, 1600,2312, - 1608,6408, 1616,2824, 1624,6920, 1632,3336, 1640,7432, 1648,3848, - 1656,7944, 1664,6272, 1672,4424, 1680,6528, 1688,4936, 1696,6280, - 1704,5448, 1712,1864, 1720,5960, 1728,2376, 1736,6472, 1744,2888, - 1752,6984, 1760,3400, 1768,7496, 1776,3912, 1784,8008, 1792,4288, - 1800,4488, 1808,4544, 1816,5000, 1824,4296, 1832,5512, 1840,1928, - 1848,6024, 1856,2440, 1864,6536, 1872,2952, 1880,7048, 1888,3464, - 1896,7560, 1904,3976, 1912,8072, 1920,6336, 1928,4552, 1936,6592, - 1944,5064, 1952,6344, 1960,5576, 1968,1992, 1976,6088, 1984,2504, - 1992,6600, 2000,3016, 2008,7112, 2016,3528, 2024,7624, 2032,4040, - 2040,8136, 2056,4112, 2064,2112, 2072,4624, 2080,4352, 2088,5136, - 2096,4480, 2104,5648, 2120,6160, 2128,2576, 2136,6672, 2144,3088, - 2152,7184, 2160,3600, 2168,7696, 2176,2560, 2184,4176, 2192,2816, - 2200,4688, 2208,2568, 2216,5200, 2224,2824, 2232,5712, 2240,2576, - 2248,6224, 2256,2640, 2264,6736, 2272,3152, 2280,7248, 2288,3664, - 2296,7760, 2312,4240, 2320,2432, 2328,4752, 2336,6400, 2344,5264, - 2352,6528, 2360,5776, 2368,2816, 2376,6288, 2384,2704, 2392,6800, - 2400,3216, 2408,7312, 2416,3728, 2424,7824, 2432,2624, 2440,4304, - 2448,2880, 2456,4816, 2464,2632, 2472,5328, 2480,2888, 2488,5840, - 2496,2640, 2504,6352, 2512,2768, 2520,6864, 2528,3280, 2536,7376, - 2544,3792, 2552,7888, 2568,4368, 2584,4880, 2592,4416, 2600,5392, - 2608,4544, 2616,5904, 2632,6416, 2640,2832, 2648,6928, 2656,3344, - 2664,7440, 2672,3856, 2680,7952, 2696,4432, 2704,2944, 2712,4944, - 2720,4432, 2728,5456, 2736,2952, 2744,5968, 2752,2944, 2760,6480, - 2768,2896, 2776,6992, 2784,3408, 2792,7504, 2800,3920, 2808,8016, - 2824,4496, 2840,5008, 2848,6464, 2856,5520, 2864,6592, 2872,6032, - 2888,6544, 2896,2960, 2904,7056, 2912,3472, 2920,7568, 2928,3984, - 2936,8080, 2952,4560, 2960,3008, 2968,5072, 2976,6480, 2984,5584, - 2992,3016, 3000,6096, 3016,6608, 3032,7120, 3040,3536, 3048,7632, - 3056,4048, 3064,8144, 3072,4608, 3080,4120, 3088,4864, 3096,4632, - 3104,4616, 3112,5144, 3120,4872, 3128,5656, 3136,4624, 3144,6168, - 3152,4880, 3160,6680, 3168,4632, 3176,7192, 3184,3608, 3192,7704, - 3200,6656, 3208,4184, 3216,6912, 3224,4696, 3232,6664, 3240,5208, - 3248,6920, 3256,5720, 3264,6672, 3272,6232, 3280,6928, 3288,6744, - 3296,6680, 3304,7256, 3312,3672, 3320,7768, 3328,4672, 3336,4248, - 3344,4928, 3352,4760, 3360,4680, 3368,5272, 3376,4936, 3384,5784, - 3392,4688, 3400,6296, 3408,4944, 3416,6808, 3424,4696, 3432,7320, - 3440,3736, 3448,7832, 3456,6720, 3464,4312, 3472,6976, 3480,4824, - 3488,6728, 3496,5336, 3504,6984, 3512,5848, 3520,6736, 3528,6360, - 3536,6992, 3544,6872, 3552,6744, 3560,7384, 3568,3800, 3576,7896, - 3584,4736, 3592,4376, 3600,4992, 3608,4888, 3616,4744, 3624,5400, - 3632,5000, 3640,5912, 3648,4752, 3656,6424, 3664,5008, 3672,6936, - 3680,4760, 3688,7448, 3696,3864, 3704,7960, 3712,6784, 3720,4440, - 3728,7040, 3736,4952, 3744,6792, 3752,5464, 3760,7048, 3768,5976, - 3776,6800, 3784,6488, 3792,7056, 3800,7000, 3808,6808, 3816,7512, - 3824,3928, 3832,8024, 3840,4800, 3848,4504, 3856,5056, 3864,5016, - 3872,4808, 3880,5528, 3888,5064, 3896,6040, 3904,4816, 3912,6552, - 3920,5072, 3928,7064, 3936,4824, 3944,7576, 3952,3992, 3960,8088, - 3968,6848, 3976,4568, 3984,7104, 3992,5080, 4000,6856, 4008,5592, - 4016,7112, 4024,6104, 4032,6864, 4040,6616, 4048,7120, 4056,7128, - 4064,6872, 4072,7640, 4080,7128, 4088,8152, 4104,4128, 4112,4160, - 4120,4640, 4136,5152, 4144,4232, 4152,5664, 4160,4352, 4168,6176, - 4176,4416, 4184,6688, 4192,4616, 4200,7200, 4208,4744, 4216,7712, - 4224,4608, 4232,4616, 4240,4672, 4248,4704, 4256,4640, 4264,5216, - 4272,4704, 4280,5728, 4288,4864, 4296,6240, 4304,4928, 4312,6752, - 4320,4632, 4328,7264, 4336,4760, 4344,7776, 4360,4640, 4368,4416, - 4376,4768, 4384,6152, 4392,5280, 4400,6280, 4408,5792, 4424,6304, - 4440,6816, 4448,6664, 4456,7328, 4464,6792, 4472,7840, 4480,4624, - 4488,4632, 4496,4688, 4504,4832, 4512,6168, 4520,5344, 4528,6296, - 4536,5856, 4544,4880, 4552,6368, 4560,4944, 4568,6880, 4576,6680, - 4584,7392, 4592,6808, 4600,7904, 4608,6144, 4616,6152, 4624,6208, - 4632,4896, 4640,6176, 4648,5408, 4656,6240, 4664,5920, 4672,6400, - 4680,6432, 4688,6464, 4696,6944, 4704,6432, 4712,7456, 4720,4808, - 4728,7968, 4736,6656, 4744,6664, 4752,6720, 4760,4960, 4768,6688, - 4776,5472, 4784,6752, 4792,5984, 4800,6912, 4808,6496, 4816,6976, - 4824,7008, 4832,6944, 4840,7520, 4848,7008, 4856,8032, 4864,6160, - 4872,6168, 4880,6224, 4888,5024, 4896,6216, 4904,5536, 4912,6344, - 4920,6048, 4928,6416, 4936,6560, 4944,6480, 4952,7072, 4960,6728, - 4968,7584, 4976,6856, 4984,8096, 4992,6672, 5000,6680, 5008,6736, - 5016,5088, 5024,6232, 5032,5600, 5040,6360, 5048,6112, 5056,6928, - 5064,6624, 5072,6992, 5080,7136, 5088,6744, 5096,7648, 5104,6872, - 5112,8160, 5128,5152, 5136,5376, 5144,5408, 5168,5384, 5176,5672, - 5184,5376, 5192,6184, 5200,5392, 5208,6696, 5216,5408, 5224,7208, - 5232,5400, 5240,7720, 5248,7168, 5256,7200, 5264,7424, 5272,7456, - 5280,7176, 5288,7208, 5296,7432, 5304,5736, 5312,7184, 5320,6248, - 5328,7440, 5336,6760, 5344,7192, 5352,7272, 5360,7448, 5368,7784, - 5384,5408, 5392,5440, 5400,5472, 5408,6184, 5416,7208, 5424,5448, - 5432,5800, 5448,6312, 5464,6824, 5472,6696, 5480,7336, 5488,6824, - 5496,7848, 5504,7232, 5512,7264, 5520,7488, 5528,7520, 5536,7240, - 5544,7272, 5552,7496, 5560,5864, 5568,7248, 5576,6376, 5584,7504, - 5592,6888, 5600,7256, 5608,7400, 5616,7512, 5624,7912, 5632,7168, - 5640,7176, 5648,7232, 5656,7240, 5664,7200, 5672,7208, 5680,7264, - 5688,5928, 5696,7424, 5704,6440, 5712,7488, 5720,6952, 5728,7456, - 5736,7464, 5744,7520, 5752,7976, 5760,7296, 5768,7328, 5776,7552, - 5784,7584, 5792,7304, 5800,7336, 5808,7560, 5816,5992, 5824,7312, - 5832,6504, 5840,7568, 5848,7016, 5856,7320, 5864,7528, 5872,7576, - 5880,8040, 5888,7184, 5896,7192, 5904,7248, 5912,7256, 5920,6248, - 5928,7272, 5936,6376, 5944,6056, 5952,7440, 5960,6568, 5968,7504, - 5976,7080, 5984,6760, 5992,7592, 6000,6888, 6008,8104, 6016,7360, - 6024,7392, 6032,7616, 6040,7648, 6048,7368, 6056,7400, 6064,7624, - 6072,6120, 6080,7376, 6088,6632, 6096,7632, 6104,7144, 6112,7384, - 6120,7656, 6128,7640, 6136,8168, 6168,6240, 6192,6216, 6200,7264, - 6232,6704, 6248,7216, 6256,6680, 6264,7728, 6272,6656, 6280,6664, - 6288,6912, 6296,6496, 6304,6688, 6312,6696, 6320,6944, 6328,7520, - 6336,6672, 6344,6680, 6352,6928, 6360,6768, 6368,6704, 6376,7280, - 6384,6744, 6392,7792, 6408,6432, 6424,6752, 6440,7432, 6448,6536, - 6456,7560, 6472,6944, 6488,6832, 6496,6920, 6504,7344, 6512,7048, - 6520,7856, 6528,6720, 6536,6728, 6544,6976, 6552,7008, 6560,6752, - 6568,7448, 6576,7008, 6584,7576, 6592,6736, 6600,6744, 6608,6992, - 6616,6896, 6624,6936, 6632,7408, 6640,7064, 6648,7920, 6712,7280, - 6744,6960, 6760,7472, 6768,6936, 6776,7984, 6800,6848, 6808,6856, - 6832,6880, 6840,6888, 6848,7040, 6856,7048, 6864,7104, 6872,7024, - 6880,7072, 6888,7536, 6896,7136, 6904,8048, 6952,7496, 6968,7624, - 6984,7008, 7000,7088, 7016,7600, 7024,7112, 7032,8112, 7056,7104, - 7064,7112, 7080,7512, 7088,7136, 7096,7640, 7128,7152, 7144,7664, - 7160,8176, 7176,7200, 7192,7216, 7224,7272, 7240,7264, 7256,7280, - 7288,7736, 7296,7680, 7304,7712, 7312,7936, 7320,7968, 7328,7688, - 7336,7720, 7344,7944, 7352,7976, 7360,7696, 7368,7728, 7376,7952, - 7384,7984, 7392,7704, 7400,7736, 7408,7960, 7416,7800, 7432,7456, - 7448,7472, 7480,7592, 7496,7520, 7512,7536, 7528,7976, 7544,7864, - 7552,7744, 7560,7776, 7568,8000, 7576,8032, 7584,7752, 7592,7784, - 7600,8008, 7608,8040, 7616,7760, 7624,7792, 7632,8016, 7640,8048, - 7648,7768, 7656,7800, 7664,8024, 7672,7928, 7688,7712, 7704,7728, - 7752,7776, 7768,7792, 7800,7992, 7816,7840, 7824,8064, 7832,8096, - 7856,8072, 7864,8104, 7872,8064, 7880,8072, 7888,8080, 7896,8112, - 7904,8096, 7912,8104, 7920,8088, 7928,8056, 7944,7968, 7960,7984, - 8008,8032, 8024,8048, 8056,8120, 8072,8096, 8080,8128, 8088,8160, - 8112,8136, 8120,8168, 8136,8160, 8152,8176 -}; - -const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH] = -{ - //8x2, size 3808 - 8,4096, 16,8192, 24,12288, 32,512, 40,4608, 48,8704, 56,12800, 64,1024, - 72,5120, 80,9216, 88,13312, 96,1536, 104,5632, 112,9728, 120,13824, - 128,2048, 136,6144, 144,10240, 152,14336, 160,2560, 168,6656, 176,10752, - 184,14848, 192,3072, 200,7168, 208,11264, 216,15360, 224,3584, 232,7680, - 240,11776, 248,15872, 256,1024, 264,4160, 272,8256, 280,12352, 288,576, - 296,4672, 304,8768, 312,12864, 320,1088, 328,5184, 336,9280, 344,13376, - 352,1600, 360,5696, 368,9792, 376,13888, 384,2112, 392,6208, 400,10304, - 408,14400, 416,2624, 424,6720, 432,10816, 440,14912, 448,3136, 456,7232, - 464,11328, 472,15424, 480,3648, 488,7744, 496,11840, 504,15936, 512,2048, - 520,4224, 528,8320, 536,12416, 544,640, 552,4736, 560,8832, 568,12928, - 576,1152, 584,5248, 592,9344, 600,13440, 608,1664, 616,5760, 624,9856, - 632,13952, 640,2176, 648,6272, 656,10368, 664,14464, 672,2688, 680,6784, - 688,10880, 696,14976, 704,3200, 712,7296, 720,11392, 728,15488, 736,3712, - 744,7808, 752,11904, 760,16000, 768,3072, 776,4288, 784,8384, 792,12480, - 800,3200, 808,4800, 816,8896, 824,12992, 832,1216, 840,5312, 848,9408, - 856,13504, 864,1728, 872,5824, 880,9920, 888,14016, 896,2240, 904,6336, - 912,10432, 920,14528, 928,2752, 936,6848, 944,10944, 952,15040, 960,3264, - 968,7360, 976,11456, 984,15552, 992,3776, 1000,7872, 1008,11968, 1016,16064, - 1032,4352, 1040,8448, 1048,12544, 1056,3072, 1064,4864, 1072,8960, - 1080,13056, 1088,1280, 1096,5376, 1104,9472, 1112,13568, 1120,1792, - 1128,5888, 1136,9984, 1144,14080, 1152,2304, 1160,6400, 1168,10496, - 1176,14592, 1184,2816, 1192,6912, 1200,11008, 1208,15104, 1216,3328, - 1224,7424, 1232,11520, 1240,15616, 1248,3840, 1256,7936, 1264,12032, - 1272,16128, 1288,4416, 1296,8512, 1304,12608, 1312,3328, 1320,4928, - 1328,9024, 1336,13120, 1352,5440, 1360,9536, 1368,13632, 1376,1856, - 1384,5952, 1392,10048, 1400,14144, 1408,2368, 1416,6464, 1424,10560, - 1432,14656, 1440,2880, 1448,6976, 1456,11072, 1464,15168, 1472,3392, - 1480,7488, 1488,11584, 1496,15680, 1504,3904, 1512,8000, 1520,12096, - 1528,16192, 1536,2112, 1544,4480, 1552,8576, 1560,12672, 1568,2240, - 1576,4992, 1584,9088, 1592,13184, 1600,2368, 1608,5504, 1616,9600, - 1624,13696, 1632,1920, 1640,6016, 1648,10112, 1656,14208, 1664,2432, - 1672,6528, 1680,10624, 1688,14720, 1696,2944, 1704,7040, 1712,11136, - 1720,15232, 1728,3456, 1736,7552, 1744,11648, 1752,15744, 1760,3968, - 1768,8064, 1776,12160, 1784,16256, 1792,3136, 1800,4544, 1808,8640, - 1816,12736, 1824,3264, 1832,5056, 1840,9152, 1848,13248, 1856,3392, - 1864,5568, 1872,9664, 1880,13760, 1888,1984, 1896,6080, 1904,10176, - 1912,14272, 1920,2496, 1928,6592, 1936,10688, 1944,14784, 1952,3008, - 1960,7104, 1968,11200, 1976,15296, 1984,3520, 1992,7616, 2000,11712, - 2008,15808, 2016,4032, 2024,8128, 2032,12224, 2040,16320, 2048,4096, - 2056,4104, 2064,8200, 2072,12296, 2080,4224, 2088,4616, 2096,8712, - 2104,12808, 2112,4352, 2120,5128, 2128,9224, 2136,13320, 2144,4480, - 2152,5640, 2160,9736, 2168,13832, 2176,4104, 2184,6152, 2192,10248, - 2200,14344, 2208,2568, 2216,6664, 2224,10760, 2232,14856, 2240,3080, - 2248,7176, 2256,11272, 2264,15368, 2272,3592, 2280,7688, 2288,11784, - 2296,15880, 2304,5120, 2312,4168, 2320,8264, 2328,12360, 2336,5248, - 2344,4680, 2352,8776, 2360,12872, 2368,5376, 2376,5192, 2384,9288, - 2392,13384, 2400,5504, 2408,5704, 2416,9800, 2424,13896, 2432,5128, - 2440,6216, 2448,10312, 2456,14408, 2464,2632, 2472,6728, 2480,10824, - 2488,14920, 2496,3144, 2504,7240, 2512,11336, 2520,15432, 2528,3656, - 2536,7752, 2544,11848, 2552,15944, 2560,6144, 2568,4232, 2576,8328, - 2584,12424, 2592,6272, 2600,4744, 2608,8840, 2616,12936, 2624,6400, - 2632,5256, 2640,9352, 2648,13448, 2656,6528, 2664,5768, 2672,9864, - 2680,13960, 2688,6152, 2696,6280, 2704,10376, 2712,14472, 2720,6280, - 2728,6792, 2736,10888, 2744,14984, 2752,3208, 2760,7304, 2768,11400, - 2776,15496, 2784,3720, 2792,7816, 2800,11912, 2808,16008, 2816,7168, - 2824,4296, 2832,8392, 2840,12488, 2848,7296, 2856,4808, 2864,8904, - 2872,13000, 2880,7424, 2888,5320, 2896,9416, 2904,13512, 2912,7552, - 2920,5832, 2928,9928, 2936,14024, 2944,7176, 2952,6344, 2960,10440, - 2968,14536, 2976,7304, 2984,6856, 2992,10952, 3000,15048, 3008,3272, - 3016,7368, 3024,11464, 3032,15560, 3040,3784, 3048,7880, 3056,11976, - 3064,16072, 3072,4160, 3080,4360, 3088,8456, 3096,12552, 3104,4288, - 3112,4872, 3120,8968, 3128,13064, 3136,4416, 3144,5384, 3152,9480, - 3160,13576, 3168,4544, 3176,5896, 3184,9992, 3192,14088, 3200,4168, - 3208,6408, 3216,10504, 3224,14600, 3232,4296, 3240,6920, 3248,11016, - 3256,15112, 3264,3336, 3272,7432, 3280,11528, 3288,15624, 3296,3848, - 3304,7944, 3312,12040, 3320,16136, 3328,5184, 3336,4424, 3344,8520, - 3352,12616, 3360,5312, 3368,4936, 3376,9032, 3384,13128, 3392,5440, - 3400,5448, 3408,9544, 3416,13640, 3424,5568, 3432,5960, 3440,10056, - 3448,14152, 3456,5192, 3464,6472, 3472,10568, 3480,14664, 3488,5320, - 3496,6984, 3504,11080, 3512,15176, 3520,5448, 3528,7496, 3536,11592, - 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11096,13544, 11104,15432, 11112,15464, 11120,15560, 11128,14056, - 11136,14416, 11144,12696, 11152,14544, 11160,14568, 11168,14424, - 11176,14744, 11184,14552, 11192,15080, 11200,15440, 11208,12760, - 11216,11496, 11224,15592, 11232,15448, 11240,14808, 11248,12008, - 11256,16104, 11272,11296, 11280,11392, 11288,12584, 11304,11408, - 11312,12688, 11320,13096, 11328,11520, 11336,11552, 11344,11648, - 11352,13608, 11360,11528, 11368,11472, 11376,11656, 11384,14120, - 11400,13456, 11416,14632, 11424,12392, 11432,15504, 11440,14440, - 11448,15144, 11456,11536, 11464,13520, 11472,11560, 11480,15656, - 11488,11544, 11496,15568, 11504,12072, 11512,16168, 11528,11552, - 11536,11648, 11544,12648, 11560,11664, 11568,12752, 11576,13160, - 11592,11616, 11600,11712, 11608,13672, 11624,11728, 11632,11720, - 11640,14184, 11656,13712, 11672,14696, 11680,13416, 11688,15760, - 11696,15464, 11704,15208, 11720,13776, 11736,15720, 11744,13672, - 11752,15824, 11760,12136, 11768,16232, 11776,14592, 11784,14624, - 11792,14720, 11800,12712, 11808,14600, 11816,14632, 11824,14728, - 11832,13224, 11840,15616, 11848,15648, 11856,15744, 11864,13736, - 11872,15624, 11880,15656, 11888,15752, 11896,14248, 11904,14608, - 11912,13464, 11920,14736, 11928,14760, 11936,14616, 11944,15512, - 11952,14744, 11960,15272, 11968,15632, 11976,13528, 11984,15760, - 11992,15784, 12000,15640, 12008,15576, 12016,12200, 12024,16296, - 12032,14656, 12040,14688, 12048,14784, 12056,12776, 12064,14664, - 12072,14696, 12080,14792, 12088,13288, 12096,15680, 12104,15712, - 12112,15808, 12120,13800, 12128,15688, 12136,15720, 12144,15816, - 12152,14312, 12160,14672, 12168,13720, 12176,14800, 12184,14824, - 12192,14680, 12200,15768, 12208,14808, 12216,15336, 12224,15696, - 12232,13784, 12240,15824, 12248,15848, 12256,15704, 12264,15832, - 12272,15832, 12280,16360, 12312,12336, 12344,12848, 12352,12544, - 12360,12552, 12368,12560, 12376,13360, 12384,12576, 12392,12584, - 12400,13336, 12408,13872, 12424,12448, 12440,14384, 12456,14496, - 12464,14472, 12472,14896, 12480,12672, 12488,12512, 12496,12688, - 12504,15408, 12512,12680, 12520,14560, 12528,14728, 12536,15920, - 12544,13312, 12552,13320, 12560,13328, 12568,13336, 12576,13344, - 12584,13352, 12592,13360, 12600,12912, 12608,13568, 12616,13576, - 12624,13584, 12632,13424, 12640,13600, 12648,13608, 12656,13400, - 12664,13936, 12672,13440, 12680,12704, 12688,13456, 12696,14448, - 12704,13448, 12712,14752, 12720,15496, 12728,14960, 12736,13696, - 12744,12768, 12752,13712, 12760,15472, 12768,13704, 12776,14816, - 12784,15752, 12792,15984, 12800,14336, 12808,14464, 12816,14344, - 12824,14472, 12832,14352, 12840,14480, 12848,14360, 12856,12976, - 12864,14400, 12872,14528, 12880,14408, 12888,13488, 12896,14416, - 12904,14544, 12912,14424, 12920,14000, 12928,14368, 12936,14496, - 12944,14376, 12952,14512, 12960,14384, 12968,14504, 12976,14488, - 12984,15024, 12992,14432, 13000,14560, 13008,14440, 13016,15536, - 13024,14448, 13032,14568, 13040,14744, 13048,16048, 13056,14592, - 13064,14720, 13072,14600, 13080,14728, 13088,14608, 13096,14736, - 13104,14616, 13112,14744, 13120,14656, 13128,14784, 13136,14664, - 13144,13552, 13152,14672, 13160,14800, 13168,14680, 13176,14064, - 13184,14624, 13192,14752, 13200,14632, 13208,14576, 13216,13464, - 13224,14760, 13232,15512, 13240,15088, 13248,14688, 13256,14816, - 13264,14696, 13272,15600, 13280,13720, 13288,14824, 13296,15768, - 13304,16112, 13336,13360, 13368,14616, 13376,13568, 13384,13576, - 13392,13584, 13400,13616, 13408,13600, 13416,13608, 13424,13592, - 13432,14128, 13448,13472, 13464,14640, 13480,15520, 13488,14536, - 13496,15152, 13504,13696, 13512,13536, 13520,13712, 13528,15664, - 13536,13704, 13544,15584, 13552,14792, 13560,16176, 13592,13616, - 13624,14680, 13656,13680, 13688,14192, 13704,13728, 13720,14704, - 13736,15776, 13744,15560, 13752,15216, 13768,13792, 13784,15728, - 13800,15840, 13808,15816, 13816,16240, 13824,15360, 13832,15488, - 13840,15368, 13848,15496, 13856,15376, 13864,15504, 13872,15384, - 13880,15512, 13888,15424, 13896,15552, 13904,15432, 13912,15560, - 13920,15440, 13928,15568, 13936,15448, 13944,14256, 13952,15392, - 13960,15520, 13968,15400, 13976,14768, 13984,15408, 13992,15528, - 14000,14552, 14008,15280, 14016,15456, 14024,15584, 14032,15464, - 14040,15792, 14048,15472, 14056,15592, 14064,14808, 14072,16304, - 14080,15616, 14088,15744, 14096,15624, 14104,15752, 14112,15632, - 14120,15760, 14128,15640, 14136,15768, 14144,15680, 14152,15808, - 14160,15688, 14168,15816, 14176,15696, 14184,15824, 14192,15704, - 14200,14320, 14208,15648, 14216,15776, 14224,15656, 14232,14832, - 14240,15664, 14248,15784, 14256,15576, 14264,15344, 14272,15712, - 14280,15840, 14288,15720, 14296,15856, 14304,15728, 14312,15848, - 14320,15832, 14328,16368, 14392,14488, 14400,14592, 14408,14600, - 14416,14608, 14424,14616, 14432,14624, 14440,14632, 14448,14640, - 14456,15512, 14504,14512, 14520,14904, 14528,14720, 14536,14728, - 14544,14736, 14552,15416, 14560,14752, 14568,14576, 14584,15928, - 14576,14760, 14592,15360, 14600,15368, 14608,15376, 14616,15384, - 14624,15392, 14632,15400, 14640,15408, 14648,15416, 14656,15616, - 14664,15624, 14672,15632, 14680,15640, 14688,15648, 14696,15656, - 14704,15664, 14712,15576, 14720,15488, 14728,15496, 14736,15504, - 14744,15512, 14752,15520, 14760,14768, 14776,14968, 14768,15528, - 14784,15744, 14792,15752, 14800,15760, 14808,15480, 14816,15776, - 14824,14832, 14840,15992, 14832,15784, 14856,14864, 14864,14880, - 14872,14896, 14880,14976, 14888,14992, 14896,15008, 14904,15024, - 14912,15104, 14920,15120, 14928,15136, 14936,15152, 14944,15232, - 14952,15248, 14960,15264, 14968,15280, 14984,15008, 15000,15024, - 15016,15024, 15040,15112, 15048,15128, 15056,15144, 15064,15544, - 15072,15240, 15080,15256, 15088,15272, 15096,16056, 15104,15872, - 15112,15888, 15120,15904, 15128,15920, 15136,16000, 15144,16016, - 15152,16032, 15160,16048, 15168,16128, 15176,16144, 15184,16160, - 15192,16176, 15200,16256, 15208,16272, 15216,16288, 15224,16304, - 15232,15880, 15240,15896, 15248,15912, 15256,15928, 15264,16008, - 15272,16024, 15280,16040, 15288,16056, 15296,16136, 15304,16152, - 15312,16168, 15320,15608, 15328,16264, 15336,16280, 15344,16296, - 15352,16120, 15416,15512, 15424,15616, 15432,15624, 15440,15632, - 15448,15640, 15456,15648, 15464,15656, 15472,15664, 15480,15768, - 15528,15536, 15544,16048, 15552,15744, 15560,15752, 15568,15760, - 15576,15672, 15584,15776, 15592,15600, 15600,15784, 15608,16184, - 15672,15768, 15736,15832, 15784,15792, 15800,16304, 15848,15856, - 15880,16000, 15864,16248, 15888,16000, 15896,16008, 15904,16000, - 15912,16016, 15920,16008, 15928,16024, 15936,16128, 15944,16160, - 15952,16256, 15960,16288, 15968,16136, 15976,16168, 15984,16264, - 15992,16296, 16008,16032, 16024,16040, 16064,16144, 16040,16048, - 16072,16176, 16080,16272, 16088,16304, 16096,16152, 16104,16184, - 16112,16280, 16136,16256, 16120,16312, 16144,16256, 16152,16264, - 16160,16256, 16168,16272, 16176,16264, 16184,16280, 16200,16208, - 16208,16224, 16216,16240, 16224,16320, 16232,16336, 16240,16352, - 16248,16368, 16264,16288, 16280,16296, 16296,16304, 16344,16368, - 16328,16352, 16360,16368 -}; - -const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH] = -{ - //radix 8, size 4032 - 8,4096, 16,8192, 24,12288, 32,16384, 40,20480, 48,24576, 56,28672, 64,512, - 72,4608, 80,8704, 88,12800, 96,16896, 104,20992, 112,25088, 120,29184, - 128,1024, 136,5120, 144,9216, 152,13312, 160,17408, 168,21504, 176,25600, - 184,29696, 192,1536, 200,5632, 208,9728, 216,13824, 224,17920, 232,22016, - 240,26112, 248,30208, 256,2048, 264,6144, 272,10240, 280,14336, 288,18432, - 296,22528, 304,26624, 312,30720, 320,2560, 328,6656, 336,10752, 344,14848, - 352,18944, 360,23040, 368,27136, 376,31232, 384,3072, 392,7168, 400,11264, - 408,15360, 416,19456, 424,23552, 432,27648, 440,31744, 448,3584, 456,7680, - 464,11776, 472,15872, 480,19968, 488,24064, 496,28160, 504,32256, 520,4160, - 528,8256, 536,12352, 544,16448, 552,20544, 560,24640, 568,28736, 584,4672, - 592,8768, 600,12864, 608,16960, 616,21056, 624,25152, 632,29248, 640,1088, - 648,5184, 656,9280, 664,13376, 672,17472, 680,21568, 688,25664, 696,29760, - 704,1600, 712,5696, 720,9792, 728,13888, 736,17984, 744,22080, 752,26176, - 760,30272, 768,2112, 776,6208, 784,10304, 792,14400, 800,18496, 808,22592, - 816,26688, 824,30784, 832,2624, 840,6720, 848,10816, 856,14912, 864,19008, - 872,23104, 880,27200, 888,31296, 896,3136, 904,7232, 912,11328, 920,15424, - 928,19520, 936,23616, 944,27712, 952,31808, 960,3648, 968,7744, 976,11840, - 984,15936, 992,20032, 1000,24128, 1008,28224, 1016,32320, 1032,4224, - 1040,8320, 1048,12416, 1056,16512, 1064,20608, 1072,24704, 1080,28800, - 1096,4736, 1104,8832, 1112,12928, 1120,17024, 1128,21120, 1136,25216, - 1144,29312, 1160,5248, 1168,9344, 1176,13440, 1184,17536, 1192,21632, - 1200,25728, 1208,29824, 1216,1664, 1224,5760, 1232,9856, 1240,13952, - 1248,18048, 1256,22144, 1264,26240, 1272,30336, 1280,2176, 1288,6272, - 1296,10368, 1304,14464, 1312,18560, 1320,22656, 1328,26752, 1336,30848, - 1344,2688, 1352,6784, 1360,10880, 1368,14976, 1376,19072, 1384,23168, - 1392,27264, 1400,31360, 1408,3200, 1416,7296, 1424,11392, 1432,15488, - 1440,19584, 1448,23680, 1456,27776, 1464,31872, 1472,3712, 1480,7808, - 1488,11904, 1496,16000, 1504,20096, 1512,24192, 1520,28288, 1528,32384, - 1544,4288, 1552,8384, 1560,12480, 1568,16576, 1576,20672, 1584,24768, - 1592,28864, 1608,4800, 1616,8896, 1624,12992, 1632,17088, 1640,21184, - 1648,25280, 1656,29376, 1672,5312, 1680,9408, 1688,13504, 1696,17600, - 1704,21696, 1712,25792, 1720,29888, 1736,5824, 1744,9920, 1752,14016, - 1760,18112, 1768,22208, 1776,26304, 1784,30400, 1792,2240, 1800,6336, - 1808,10432, 1816,14528, 1824,18624, 1832,22720, 1840,26816, 1848,30912, - 1856,2752, 1864,6848, 1872,10944, 1880,15040, 1888,19136, 1896,23232, - 1904,27328, 1912,31424, 1920,3264, 1928,7360, 1936,11456, 1944,15552, - 1952,19648, 1960,23744, 1968,27840, 1976,31936, 1984,3776, 1992,7872, - 2000,11968, 2008,16064, 2016,20160, 2024,24256, 2032,28352, 2040,32448, - 2056,4352, 2064,8448, 2072,12544, 2080,16640, 2088,20736, 2096,24832, - 2104,28928, 2120,4864, 2128,8960, 2136,13056, 2144,17152, 2152,21248, - 2160,25344, 2168,29440, 2184,5376, 2192,9472, 2200,13568, 2208,17664, - 2216,21760, 2224,25856, 2232,29952, 2248,5888, 2256,9984, 2264,14080, - 2272,18176, 2280,22272, 2288,26368, 2296,30464, 2312,6400, 2320,10496, - 2328,14592, 2336,18688, 2344,22784, 2352,26880, 2360,30976, 2368,2816, - 2376,6912, 2384,11008, 2392,15104, 2400,19200, 2408,23296, 2416,27392, - 2424,31488, 2432,3328, 2440,7424, 2448,11520, 2456,15616, 2464,19712, - 2472,23808, 2480,27904, 2488,32000, 2496,3840, 2504,7936, 2512,12032, - 2520,16128, 2528,20224, 2536,24320, 2544,28416, 2552,32512, 2568,4416, - 2576,8512, 2584,12608, 2592,16704, 2600,20800, 2608,24896, 2616,28992, - 2632,4928, 2640,9024, 2648,13120, 2656,17216, 2664,21312, 2672,25408, - 2680,29504, 2696,5440, 2704,9536, 2712,13632, 2720,17728, 2728,21824, - 2736,25920, 2744,30016, 2760,5952, 2768,10048, 2776,14144, 2784,18240, - 2792,22336, 2800,26432, 2808,30528, 2824,6464, 2832,10560, 2840,14656, - 2848,18752, 2856,22848, 2864,26944, 2872,31040, 2888,6976, 2896,11072, - 2904,15168, 2912,19264, 2920,23360, 2928,27456, 2936,31552, 2944,3392, - 2952,7488, 2960,11584, 2968,15680, 2976,19776, 2984,23872, 2992,27968, - 3000,32064, 3008,3904, 3016,8000, 3024,12096, 3032,16192, 3040,20288, - 3048,24384, 3056,28480, 3064,32576, 3080,4480, 3088,8576, 3096,12672, - 3104,16768, 3112,20864, 3120,24960, 3128,29056, 3144,4992, 3152,9088, - 3160,13184, 3168,17280, 3176,21376, 3184,25472, 3192,29568, 3208,5504, - 3216,9600, 3224,13696, 3232,17792, 3240,21888, 3248,25984, 3256,30080, - 3272,6016, 3280,10112, 3288,14208, 3296,18304, 3304,22400, 3312,26496, - 3320,30592, 3336,6528, 3344,10624, 3352,14720, 3360,18816, 3368,22912, - 3376,27008, 3384,31104, 3400,7040, 3408,11136, 3416,15232, 3424,19328, - 3432,23424, 3440,27520, 3448,31616, 3464,7552, 3472,11648, 3480,15744, - 3488,19840, 3496,23936, 3504,28032, 3512,32128, 3520,3968, 3528,8064, - 3536,12160, 3544,16256, 3552,20352, 3560,24448, 3568,28544, 3576,32640, - 3592,4544, 3600,8640, 3608,12736, 3616,16832, 3624,20928, 3632,25024, - 3640,29120, 3656,5056, 3664,9152, 3672,13248, 3680,17344, 3688,21440, - 3696,25536, 3704,29632, 3720,5568, 3728,9664, 3736,13760, 3744,17856, - 3752,21952, 3760,26048, 3768,30144, 3784,6080, 3792,10176, 3800,14272, - 3808,18368, 3816,22464, 3824,26560, 3832,30656, 3848,6592, 3856,10688, - 3864,14784, 3872,18880, 3880,22976, 3888,27072, 3896,31168, 3912,7104, - 3920,11200, 3928,15296, 3936,19392, 3944,23488, 3952,27584, 3960,31680, - 3976,7616, 3984,11712, 3992,15808, 4000,19904, 4008,24000, 4016,28096, - 4024,32192, 4040,8128, 4048,12224, 4056,16320, 4064,20416, 4072,24512, - 4080,28608, 4088,32704, 4112,8200, 4120,12296, 4128,16392, 4136,20488, - 4144,24584, 4152,28680, 4168,4616, 4176,8712, 4184,12808, 4192,16904, - 4200,21000, 4208,25096, 4216,29192, 4232,5128, 4240,9224, 4248,13320, - 4256,17416, 4264,21512, 4272,25608, 4280,29704, 4296,5640, 4304,9736, - 4312,13832, 4320,17928, 4328,22024, 4336,26120, 4344,30216, 4360,6152, - 4368,10248, 4376,14344, 4384,18440, 4392,22536, 4400,26632, 4408,30728, - 4424,6664, 4432,10760, 4440,14856, 4448,18952, 4456,23048, 4464,27144, - 4472,31240, 4488,7176, 4496,11272, 4504,15368, 4512,19464, 4520,23560, - 4528,27656, 4536,31752, 4552,7688, 4560,11784, 4568,15880, 4576,19976, - 4584,24072, 4592,28168, 4600,32264, 4624,8264, 4632,12360, 4640,16456, - 4648,20552, 4656,24648, 4664,28744, 4688,8776, 4696,12872, 4704,16968, - 4712,21064, 4720,25160, 4728,29256, 4744,5192, 4752,9288, 4760,13384, - 4768,17480, 4776,21576, 4784,25672, 4792,29768, 4808,5704, 4816,9800, - 4824,13896, 4832,17992, 4840,22088, 4848,26184, 4856,30280, 4872,6216, - 4880,10312, 4888,14408, 4896,18504, 4904,22600, 4912,26696, 4920,30792, - 4936,6728, 4944,10824, 4952,14920, 4960,19016, 4968,23112, 4976,27208, - 4984,31304, 5000,7240, 5008,11336, 5016,15432, 5024,19528, 5032,23624, - 5040,27720, 5048,31816, 5064,7752, 5072,11848, 5080,15944, 5088,20040, - 5096,24136, 5104,28232, 5112,32328, 5136,8328, 5144,12424, 5152,16520, - 5160,20616, 5168,24712, 5176,28808, 5200,8840, 5208,12936, 5216,17032, - 5224,21128, 5232,25224, 5240,29320, 5264,9352, 5272,13448, 5280,17544, - 5288,21640, 5296,25736, 5304,29832, 5320,5768, 5328,9864, 5336,13960, - 5344,18056, 5352,22152, 5360,26248, 5368,30344, 5384,6280, 5392,10376, - 5400,14472, 5408,18568, 5416,22664, 5424,26760, 5432,30856, 5448,6792, - 5456,10888, 5464,14984, 5472,19080, 5480,23176, 5488,27272, 5496,31368, - 5512,7304, 5520,11400, 5528,15496, 5536,19592, 5544,23688, 5552,27784, - 5560,31880, 5576,7816, 5584,11912, 5592,16008, 5600,20104, 5608,24200, - 5616,28296, 5624,32392, 5648,8392, 5656,12488, 5664,16584, 5672,20680, - 5680,24776, 5688,28872, 5712,8904, 5720,13000, 5728,17096, 5736,21192, - 5744,25288, 5752,29384, 5776,9416, 5784,13512, 5792,17608, 5800,21704, - 5808,25800, 5816,29896, 5840,9928, 5848,14024, 5856,18120, 5864,22216, - 5872,26312, 5880,30408, 5896,6344, 5904,10440, 5912,14536, 5920,18632, - 5928,22728, 5936,26824, 5944,30920, 5960,6856, 5968,10952, 5976,15048, - 5984,19144, 5992,23240, 6000,27336, 6008,31432, 6024,7368, 6032,11464, - 6040,15560, 6048,19656, 6056,23752, 6064,27848, 6072,31944, 6088,7880, - 6096,11976, 6104,16072, 6112,20168, 6120,24264, 6128,28360, 6136,32456, - 6160,8456, 6168,12552, 6176,16648, 6184,20744, 6192,24840, 6200,28936, - 6224,8968, 6232,13064, 6240,17160, 6248,21256, 6256,25352, 6264,29448, - 6288,9480, 6296,13576, 6304,17672, 6312,21768, 6320,25864, 6328,29960, - 6352,9992, 6360,14088, 6368,18184, 6376,22280, 6384,26376, 6392,30472, - 6416,10504, 6424,14600, 6432,18696, 6440,22792, 6448,26888, 6456,30984, - 6472,6920, 6480,11016, 6488,15112, 6496,19208, 6504,23304, 6512,27400, - 6520,31496, 6536,7432, 6544,11528, 6552,15624, 6560,19720, 6568,23816, - 6576,27912, 6584,32008, 6600,7944, 6608,12040, 6616,16136, 6624,20232, - 6632,24328, 6640,28424, 6648,32520, 6672,8520, 6680,12616, 6688,16712, - 6696,20808, 6704,24904, 6712,29000, 6736,9032, 6744,13128, 6752,17224, - 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19376,28000, 19384,32096, 19424,20320, 19432,24416, 19440,28512, - 19448,32608, 19496,20896, 19504,24992, 19512,29088, 19560,21408, - 19568,25504, 19576,29600, 19624,21920, 19632,26016, 19640,30112, - 19688,22432, 19696,26528, 19704,30624, 19752,22944, 19760,27040, - 19768,31136, 19816,23456, 19824,27552, 19832,31648, 19880,23968, - 19888,28064, 19896,32160, 19936,20384, 19944,24480, 19952,28576, - 19960,32672, 20008,20960, 20016,25056, 20024,29152, 20072,21472, - 20080,25568, 20088,29664, 20136,21984, 20144,26080, 20152,30176, - 20200,22496, 20208,26592, 20216,30688, 20264,23008, 20272,27104, - 20280,31200, 20328,23520, 20336,27616, 20344,31712, 20392,24032, - 20400,28128, 20408,32224, 20456,24544, 20464,28640, 20472,32736, - 20528,24616, 20536,28712, 20584,21032, 20592,25128, 20600,29224, - 20648,21544, 20656,25640, 20664,29736, 20712,22056, 20720,26152, - 20728,30248, 20776,22568, 20784,26664, 20792,30760, 20840,23080, - 20848,27176, 20856,31272, 20904,23592, 20912,27688, 20920,31784, - 20968,24104, 20976,28200, 20984,32296, 21040,24680, 21048,28776, - 21104,25192, 21112,29288, 21160,21608, 21168,25704, 21176,29800, - 21224,22120, 21232,26216, 21240,30312, 21288,22632, 21296,26728, - 21304,30824, 21352,23144, 21360,27240, 21368,31336, 21416,23656, - 21424,27752, 21432,31848, 21480,24168, 21488,28264, 21496,32360, - 21552,24744, 21560,28840, 21616,25256, 21624,29352, 21680,25768, - 21688,29864, 21736,22184, 21744,26280, 21752,30376, 21800,22696, - 21808,26792, 21816,30888, 21864,23208, 21872,27304, 21880,31400, - 21928,23720, 21936,27816, 21944,31912, 21992,24232, 22000,28328, - 22008,32424, 22064,24808, 22072,28904, 22128,25320, 22136,29416, - 22192,25832, 22200,29928, 22256,26344, 22264,30440, 22312,22760, - 22320,26856, 22328,30952, 22376,23272, 22384,27368, 22392,31464, - 22440,23784, 22448,27880, 22456,31976, 22504,24296, 22512,28392, - 22520,32488, 22576,24872, 22584,28968, 22640,25384, 22648,29480, - 22704,25896, 22712,29992, 22768,26408, 22776,30504, 22832,26920, - 22840,31016, 22888,23336, 22896,27432, 22904,31528, 22952,23848, - 22960,27944, 22968,32040, 23016,24360, 23024,28456, 23032,32552, - 23088,24936, 23096,29032, 23152,25448, 23160,29544, 23216,25960, - 23224,30056, 23280,26472, 23288,30568, 23344,26984, 23352,31080, - 23408,27496, 23416,31592, 23464,23912, 23472,28008, 23480,32104, - 23528,24424, 23536,28520, 23544,32616, 23600,25000, 23608,29096, - 23664,25512, 23672,29608, 23728,26024, 23736,30120, 23792,26536, - 23800,30632, 23856,27048, 23864,31144, 23920,27560, 23928,31656, - 23984,28072, 23992,32168, 24040,24488, 24048,28584, 24056,32680, - 24112,25064, 24120,29160, 24176,25576, 24184,29672, 24240,26088, - 24248,30184, 24304,26600, 24312,30696, 24368,27112, 24376,31208, - 24432,27624, 24440,31720, 24496,28136, 24504,32232, 24560,28648, - 24568,32744, 24632,28720, 24688,25136, 24696,29232, 24752,25648, - 24760,29744, 24816,26160, 24824,30256, 24880,26672, 24888,30768, - 24944,27184, 24952,31280, 25008,27696, 25016,31792, 25072,28208, - 25080,32304, 25144,28784, 25208,29296, 25264,25712, 25272,29808, - 25328,26224, 25336,30320, 25392,26736, 25400,30832, 25456,27248, - 25464,31344, 25520,27760, 25528,31856, 25584,28272, 25592,32368, - 25656,28848, 25720,29360, 25784,29872, 25840,26288, 25848,30384, - 25904,26800, 25912,30896, 25968,27312, 25976,31408, 26032,27824, - 26040,31920, 26096,28336, 26104,32432, 26168,28912, 26232,29424, - 26296,29936, 26360,30448, 26416,26864, 26424,30960, 26480,27376, - 26488,31472, 26544,27888, 26552,31984, 26608,28400, 26616,32496, - 26680,28976, 26744,29488, 26808,30000, 26872,30512, 26936,31024, - 26992,27440, 27000,31536, 27056,27952, 27064,32048, 27120,28464, - 27128,32560, 27192,29040, 27256,29552, 27320,30064, 27384,30576, - 27448,31088, 27512,31600, 27568,28016, 27576,32112, 27632,28528, - 27640,32624, 27704,29104, 27768,29616, 27832,30128, 27896,30640, - 27960,31152, 28024,31664, 28088,32176, 28144,28592, 28152,32688, - 28216,29168, 28280,29680, 28344,30192, 28408,30704, 28472,31216, - 28536,31728, 28600,32240, 28664,32752, 28792,29240, 28856,29752, - 28920,30264, 28984,30776, 29048,31288, 29112,31800, 29176,32312, - 29368,29816, 29432,30328, 29496,30840, 29560,31352, 29624,31864, - 29688,32376, 29944,30392, 30008,30904, 30072,31416, 30136,31928, - 30200,32440, 30520,30968, 30584,31480, 30648,31992, 30712,32504, - 31096,31544, 31160,32056, 31224,32568, 31672,32120, 31736,32632, - 32248,32696 -}; - - -const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH] = -{ - //radix 4, size 12 - 8,64, 16,32, 24,96, 40,80, 56,112, 88,104 -}; - -const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH] = -{ - //4x2, size 24 - 8,128, 16,64, 24,192, 40,160, 48,96, 56,224, 72,144, - 88,208, 104,176, 120,240, 152,200, 184,232 -}; - -const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH] = -{ - //radix 4, size 56 - 8,256, 16,128, 24,384, 32,64, 40,320, 48,192, 56,448, 72,288, 80,160, 88,416, 104,352, - 112,224, 120,480, 136,272, 152,400, 168,336, 176,208, 184,464, 200,304, 216,432, - 232,368, 248,496, 280,392, 296,328, 312,456, 344,424, 376,488, 440,472 -}; - -const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH] = -{ - //4x2, size 112 - 8,512, 16,256, 24,768, 32,128, 40,640, 48,384, 56,896, 72,576, 80,320, 88,832, 96,192, - 104,704, 112,448, 120,960, 136,544, 144,288, 152,800, 168,672, 176,416, 184,928, 200,608, - 208,352, 216,864, 232,736, 240,480, 248,992, 264,528, 280,784, 296,656, 304,400, 312,912, - 328,592, 344,848, 360,720, 368,464, 376,976, 392,560, 408,816, 424,688, 440,944, 456,624, - 472,880, 488,752, 504,1008, 536,776, 552,648, 568,904, 600,840, 616,712, 632,968, - 664,808, 696,936, 728,872, 760,1000, 824,920, 888,984 -}; - -const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH] = -{ - //radix 4, size 240 - 8,1024, 16,512, 24,1536, 32,256, 40,1280, 48,768, 56,1792, 64,128, 72,1152, 80,640, - 88,1664, 96,384, 104,1408, 112,896, 120,1920, 136,1088, 144,576, 152,1600, 160,320, - 168,1344, 176,832, 184,1856, 200,1216, 208,704, 216,1728, 224,448, 232,1472, 240,960, - 248,1984, 264,1056, 272,544, 280,1568, 296,1312, 304,800, 312,1824, 328,1184, 336,672, - 344,1696, 352,416, 360,1440, 368,928, 376,1952, 392,1120, 400,608, 408,1632, 424,1376, - 432,864, 440,1888, 456,1248, 464,736, 472,1760, 488,1504, 496,992, 504,2016, 520,1040, - 536,1552, 552,1296, 560,784, 568,1808, 584,1168, 592,656, 600,1680, 616,1424, 624,912, - 632,1936, 648,1104, 664,1616, 680,1360, 688,848, 696,1872, 712,1232, 728,1744, 744,1488, - 752,976, 760,2000, 776,1072, 792,1584, 808,1328, 824,1840, 840,1200, 856,1712, 872,1456, - 880,944, 888,1968, 904,1136, 920,1648, 936,1392, 952,1904, 968,1264, 984,1776, 1000,1520, - 1016,2032, 1048,1544, 1064,1288, 1080,1800, 1096,1160, 1112,1672, 1128,1416, 1144,1928, - 1176,1608, 1192,1352, 1208,1864, 1240,1736, 1256,1480, 1272,1992, 1304,1576, 1336,1832, - 1368,1704, 1384,1448, 1400,1960, 1432,1640, 1464,1896, 1496,1768, 1528,2024, 1592,1816, - 1624,1688, 1656,1944, 1720,1880, 1784,2008, 1912,1976 -}; - -const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH] = -{ - //4x2, size 480 - 8,2048, 16,1024, 24,3072, 32,512, 40,2560, 48,1536, 56,3584, 64,256, 72,2304, 80,1280, - 88,3328, 96,768, 104,2816, 112,1792, 120,3840, 136,2176, 144,1152, 152,3200, 160,640, - 168,2688, 176,1664, 184,3712, 192,384, 200,2432, 208,1408, 216,3456, 224,896, 232,2944, - 240,1920, 248,3968, 264,2112, 272,1088, 280,3136, 288,576, 296,2624, 304,1600, 312,3648, - 328,2368, 336,1344, 344,3392, 352,832, 360,2880, 368,1856, 376,3904, 392,2240, 400,1216, - 408,3264, 416,704, 424,2752, 432,1728, 440,3776, 456,2496, 464,1472, 472,3520, 480,960, - 488,3008, 496,1984, 504,4032, 520,2080, 528,1056, 536,3104, 552,2592, 560,1568, 568,3616, - 584,2336, 592,1312, 600,3360, 608,800, 616,2848, 624,1824, 632,3872, 648,2208, 656,1184, - 664,3232, 680,2720, 688,1696, 696,3744, 712,2464, 720,1440, 728,3488, 736,928, 744,2976, - 752,1952, 760,4000, 776,2144, 784,1120, 792,3168, 808,2656, 816,1632, 824,3680, 840,2400, - 848,1376, 856,3424, 872,2912, 880,1888, 888,3936, 904,2272, 912,1248, 920,3296, 936,2784, - 944,1760, 952,3808, 968,2528, 976,1504, 984,3552, 1000,3040, 1008,2016, 1016,4064, - 1032,2064, 1048,3088, 1064,2576, 1072,1552, 1080,3600, 1096,2320, 1104,1296, 1112,3344, - 1128,2832, 1136,1808, 1144,3856, 1160,2192, 1176,3216, 1192,2704, 1200,1680, 1208,3728, - 1224,2448, 1232,1424, 1240,3472, 1256,2960, 1264,1936, 1272,3984, 1288,2128, 1304,3152, - 1320,2640, 1328,1616, 1336,3664, 1352,2384, 1368,3408, 1384,2896, 1392,1872, 1400,3920, - 1416,2256, 1432,3280, 1448,2768, 1456,1744, 1464,3792, 1480,2512, 1496,3536, 1512,3024, - 1520,2000, 1528,4048, 1544,2096, 1560,3120, 1576,2608, 1592,3632, 1608,2352, 1624,3376, - 1640,2864, 1648,1840, 1656,3888, 1672,2224, 1688,3248, 1704,2736, 1720,3760, 1736,2480, - 1752,3504, 1768,2992, 1776,1968, 1784,4016, 1800,2160, 1816,3184, 1832,2672, 1848,3696, - 1864,2416, 1880,3440, 1896,2928, 1912,3952, 1928,2288, 1944,3312, 1960,2800, 1976,3824, - 1992,2544, 2008,3568, 2024,3056, 2040,4080, 2072,3080, 2088,2568, 2104,3592, 2120,2312, - 2136,3336, 2152,2824, 2168,3848, 2200,3208, 2216,2696, 2232,3720, 2248,2440, 2264,3464, - 2280,2952, 2296,3976, 2328,3144, 2344,2632, 2360,3656, 2392,3400, 2408,2888, 2424,3912, - 2456,3272, 2472,2760, 2488,3784, 2520,3528, 2536,3016, 2552,4040, 2584,3112, 2616,3624, - 2648,3368, 2664,2856, 2680,3880, 2712,3240, 2744,3752, 2776,3496, 2792,2984, 2808,4008, - 2840,3176, 2872,3688, 2904,3432, 2936,3944, 2968,3304, 3000,3816, 3032,3560, 3064,4072, - 3128,3608, 3160,3352, 3192,3864, 3256,3736, 3288,3480, 3320,3992, 3384,3672, 3448,3928, - 3512,3800, 3576,4056, 3704,3896, 3832,4024 -}; - -const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH] = -{ - //radix 4, size 992 - 8,4096, 16,2048, 24,6144, 32,1024, 40,5120, 48,3072, 56,7168, 64,512, 72,4608, - 80,2560, 88,6656, 96,1536, 104,5632, 112,3584, 120,7680, 128,256, 136,4352, - 144,2304, 152,6400, 160,1280, 168,5376, 176,3328, 184,7424, 192,768, 200,4864, - 208,2816, 216,6912, 224,1792, 232,5888, 240,3840, 248,7936, 264,4224, 272,2176, - 280,6272, 288,1152, 296,5248, 304,3200, 312,7296, 320,640, 328,4736, 336,2688, - 344,6784, 352,1664, 360,5760, 368,3712, 376,7808, 392,4480, 400,2432, 408,6528, - 416,1408, 424,5504, 432,3456, 440,7552, 448,896, 456,4992, 464,2944, 472,7040, - 480,1920, 488,6016, 496,3968, 504,8064, 520,4160, 528,2112, 536,6208, 544,1088, - 552,5184, 560,3136, 568,7232, 584,4672, 592,2624, 600,6720, 608,1600, 616,5696, - 624,3648, 632,7744, 648,4416, 656,2368, 664,6464, 672,1344, 680,5440, 688,3392, - 696,7488, 704,832, 712,4928, 720,2880, 728,6976, 736,1856, 744,5952, 752,3904, - 760,8000, 776,4288, 784,2240, 792,6336, 800,1216, 808,5312, 816,3264, 824,7360, - 840,4800, 848,2752, 856,6848, 864,1728, 872,5824, 880,3776, 888,7872, 904,4544, - 912,2496, 920,6592, 928,1472, 936,5568, 944,3520, 952,7616, 968,5056, 976,3008, - 984,7104, 992,1984, 1000,6080, 1008,4032, 1016,8128, 1032,4128, 1040,2080, - 1048,6176, 1064,5152, 1072,3104, 1080,7200, 1096,4640, 1104,2592, 1112,6688, - 1120,1568, 1128,5664, 1136,3616, 1144,7712, 1160,4384, 1168,2336, 1176,6432, - 1184,1312, 1192,5408, 1200,3360, 1208,7456, 1224,4896, 1232,2848, 1240,6944, - 1248,1824, 1256,5920, 1264,3872, 1272,7968, 1288,4256, 1296,2208, 1304,6304, - 1320,5280, 1328,3232, 1336,7328, 1352,4768, 1360,2720, 1368,6816, 1376,1696, - 1384,5792, 1392,3744, 1400,7840, 1416,4512, 1424,2464, 1432,6560, 1448,5536, - 1456,3488, 1464,7584, 1480,5024, 1488,2976, 1496,7072, 1504,1952, 1512,6048, - 1520,4000, 1528,8096, 1544,4192, 1552,2144, 1560,6240, 1576,5216, 1584,3168, - 1592,7264, 1608,4704, 1616,2656, 1624,6752, 1640,5728, 1648,3680, 1656,7776, - 1672,4448, 1680,2400, 1688,6496, 1704,5472, 1712,3424, 1720,7520, 1736,4960, - 1744,2912, 1752,7008, 1760,1888, 1768,5984, 1776,3936, 1784,8032, 1800,4320, - 1808,2272, 1816,6368, 1832,5344, 1840,3296, 1848,7392, 1864,4832, 1872,2784, - 1880,6880, 1896,5856, 1904,3808, 1912,7904, 1928,4576, 1936,2528, 1944,6624, - 1960,5600, 1968,3552, 1976,7648, 1992,5088, 2000,3040, 2008,7136, 2024,6112, - 2032,4064, 2040,8160, 2056,4112, 2072,6160, 2088,5136, 2096,3088, 2104,7184, - 2120,4624, 2128,2576, 2136,6672, 2152,5648, 2160,3600, 2168,7696, 2184,4368, - 2192,2320, 2200,6416, 2216,5392, 2224,3344, 2232,7440, 2248,4880, 2256,2832, - 2264,6928, 2280,5904, 2288,3856, 2296,7952, 2312,4240, 2328,6288, 2344,5264, - 2352,3216, 2360,7312, 2376,4752, 2384,2704, 2392,6800, 2408,5776, 2416,3728, - 2424,7824, 2440,4496, 2456,6544, 2472,5520, 2480,3472, 2488,7568, 2504,5008, - 2512,2960, 2520,7056, 2536,6032, 2544,3984, 2552,8080, 2568,4176, 2584,6224, - 2600,5200, 2608,3152, 2616,7248, 2632,4688, 2648,6736, 2664,5712, 2672,3664, - 2680,7760, 2696,4432, 2712,6480, 2728,5456, 2736,3408, 2744,7504, 2760,4944, - 2768,2896, 2776,6992, 2792,5968, 2800,3920, 2808,8016, 2824,4304, 2840,6352, - 2856,5328, 2864,3280, 2872,7376, 2888,4816, 2904,6864, 2920,5840, 2928,3792, - 2936,7888, 2952,4560, 2968,6608, 2984,5584, 2992,3536, 3000,7632, 3016,5072, - 3032,7120, 3048,6096, 3056,4048, 3064,8144, 3080,4144, 3096,6192, 3112,5168, - 3128,7216, 3144,4656, 3160,6704, 3176,5680, 3184,3632, 3192,7728, 3208,4400, - 3224,6448, 3240,5424, 3248,3376, 3256,7472, 3272,4912, 3288,6960, 3304,5936, - 3312,3888, 3320,7984, 3336,4272, 3352,6320, 3368,5296, 3384,7344, 3400,4784, - 3416,6832, 3432,5808, 3440,3760, 3448,7856, 3464,4528, 3480,6576, 3496,5552, - 3512,7600, 3528,5040, 3544,7088, 3560,6064, 3568,4016, 3576,8112, 3592,4208, - 3608,6256, 3624,5232, 3640,7280, 3656,4720, 3672,6768, 3688,5744, 3704,7792, - 3720,4464, 3736,6512, 3752,5488, 3768,7536, 3784,4976, 3800,7024, 3816,6000, - 3824,3952, 3832,8048, 3848,4336, 3864,6384, 3880,5360, 3896,7408, 3912,4848, - 3928,6896, 3944,5872, 3960,7920, 3976,4592, 3992,6640, 4008,5616, 4024,7664, - 4040,5104, 4056,7152, 4072,6128, 4088,8176, 4120,6152, 4136,5128, 4152,7176, - 4168,4616, 4184,6664, 4200,5640, 4216,7688, 4232,4360, 4248,6408, 4264,5384, - 4280,7432, 4296,4872, 4312,6920, 4328,5896, 4344,7944, 4376,6280, 4392,5256, - 4408,7304, 4424,4744, 4440,6792, 4456,5768, 4472,7816, 4504,6536, 4520,5512, - 4536,7560, 4552,5000, 4568,7048, 4584,6024, 4600,8072, 4632,6216, 4648,5192, - 4664,7240, 4696,6728, 4712,5704, 4728,7752, 4760,6472, 4776,5448, 4792,7496, - 4808,4936, 4824,6984, 4840,5960, 4856,8008, 4888,6344, 4904,5320, 4920,7368, - 4952,6856, 4968,5832, 4984,7880, 5016,6600, 5032,5576, 5048,7624, 5080,7112, - 5096,6088, 5112,8136, 5144,6184, 5176,7208, 5208,6696, 5224,5672, 5240,7720, - 5272,6440, 5288,5416, 5304,7464, 5336,6952, 5352,5928, 5368,7976, 5400,6312, - 5432,7336, 5464,6824, 5480,5800, 5496,7848, 5528,6568, 5560,7592, 5592,7080, - 5608,6056, 5624,8104, 5656,6248, 5688,7272, 5720,6760, 5752,7784, 5784,6504, - 5816,7528, 5848,7016, 5864,5992, 5880,8040, 5912,6376, 5944,7400, 5976,6888, - 6008,7912, 6040,6632, 6072,7656, 6104,7144, 6136,8168, 6200,7192, 6232,6680, - 6264,7704, 6296,6424, 6328,7448, 6360,6936, 6392,7960, 6456,7320, 6488,6808, - 6520,7832, 6584,7576, 6616,7064, 6648,8088, 6712,7256, 6776,7768, 6840,7512, - 6872,7000, 6904,8024, 6968,7384, 7032,7896, 7096,7640, 7160,8152, 7288,7736, - 7352,7480, 7416,7992, 7544,7864, 7672,8120, 7928,8056 -}; - -const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH] = -{ - //4x2, size 1984 - 8,8192, 16,4096, 24,12288, 32,2048, 40,10240, 48,6144, 56,14336, 64,1024, - 72,9216, 80,5120, 88,13312, 96,3072, 104,11264, 112,7168, 120,15360, 128,512, - 136,8704, 144,4608, 152,12800, 160,2560, 168,10752, 176,6656, 184,14848, - 192,1536, 200,9728, 208,5632, 216,13824, 224,3584, 232,11776, 240,7680, - 248,15872, 264,8448, 272,4352, 280,12544, 288,2304, 296,10496, 304,6400, - 312,14592, 320,1280, 328,9472, 336,5376, 344,13568, 352,3328, 360,11520, - 368,7424, 376,15616, 384,768, 392,8960, 400,4864, 408,13056, 416,2816, - 424,11008, 432,6912, 440,15104, 448,1792, 456,9984, 464,5888, 472,14080, - 480,3840, 488,12032, 496,7936, 504,16128, 520,8320, 528,4224, 536,12416, - 544,2176, 552,10368, 560,6272, 568,14464, 576,1152, 584,9344, 592,5248, - 600,13440, 608,3200, 616,11392, 624,7296, 632,15488, 648,8832, 656,4736, - 664,12928, 672,2688, 680,10880, 688,6784, 696,14976, 704,1664, 712,9856, - 720,5760, 728,13952, 736,3712, 744,11904, 752,7808, 760,16000, 776,8576, - 784,4480, 792,12672, 800,2432, 808,10624, 816,6528, 824,14720, 832,1408, - 840,9600, 848,5504, 856,13696, 864,3456, 872,11648, 880,7552, 888,15744, - 904,9088, 912,4992, 920,13184, 928,2944, 936,11136, 944,7040, 952,15232, - 960,1920, 968,10112, 976,6016, 984,14208, 992,3968, 1000,12160, 1008,8064, - 1016,16256, 1032,8256, 1040,4160, 1048,12352, 1056,2112, 1064,10304, 1072,6208, - 1080,14400, 1096,9280, 1104,5184, 1112,13376, 1120,3136, 1128,11328, 1136,7232, - 1144,15424, 1160,8768, 1168,4672, 1176,12864, 1184,2624, 1192,10816, 1200,6720, - 1208,14912, 1216,1600, 1224,9792, 1232,5696, 1240,13888, 1248,3648, 1256,11840, - 1264,7744, 1272,15936, 1288,8512, 1296,4416, 1304,12608, 1312,2368, 1320,10560, - 1328,6464, 1336,14656, 1352,9536, 1360,5440, 1368,13632, 1376,3392, 1384,11584, - 1392,7488, 1400,15680, 1416,9024, 1424,4928, 1432,13120, 1440,2880, 1448,11072, - 1456,6976, 1464,15168, 1472,1856, 1480,10048, 1488,5952, 1496,14144, 1504,3904, - 1512,12096, 1520,8000, 1528,16192, 1544,8384, 1552,4288, 1560,12480, 1568,2240, - 1576,10432, 1584,6336, 1592,14528, 1608,9408, 1616,5312, 1624,13504, 1632,3264, - 1640,11456, 1648,7360, 1656,15552, 1672,8896, 1680,4800, 1688,12992, 1696,2752, - 1704,10944, 1712,6848, 1720,15040, 1736,9920, 1744,5824, 1752,14016, 1760,3776, - 1768,11968, 1776,7872, 1784,16064, 1800,8640, 1808,4544, 1816,12736, 1824,2496, - 1832,10688, 1840,6592, 1848,14784, 1864,9664, 1872,5568, 1880,13760, 1888,3520, - 1896,11712, 1904,7616, 1912,15808, 1928,9152, 1936,5056, 1944,13248, 1952,3008, - 1960,11200, 1968,7104, 1976,15296, 1992,10176, 2000,6080, 2008,14272, 2016,4032, - 2024,12224, 2032,8128, 2040,16320, 2056,8224, 2064,4128, 2072,12320, 2088,10272, - 2096,6176, 2104,14368, 2120,9248, 2128,5152, 2136,13344, 2144,3104, 2152,11296, - 2160,7200, 2168,15392, 2184,8736, 2192,4640, 2200,12832, 2208,2592, 2216,10784, - 2224,6688, 2232,14880, 2248,9760, 2256,5664, 2264,13856, 2272,3616, 2280,11808, - 2288,7712, 2296,15904, 2312,8480, 2320,4384, 2328,12576, 2344,10528, 2352,6432, - 2360,14624, 2376,9504, 2384,5408, 2392,13600, 2400,3360, 2408,11552, 2416,7456, - 2424,15648, 2440,8992, 2448,4896, 2456,13088, 2464,2848, 2472,11040, 2480,6944, - 2488,15136, 2504,10016, 2512,5920, 2520,14112, 2528,3872, 2536,12064, 2544,7968, - 2552,16160, 2568,8352, 2576,4256, 2584,12448, 2600,10400, 2608,6304, 2616,14496, - 2632,9376, 2640,5280, 2648,13472, 2656,3232, 2664,11424, 2672,7328, 2680,15520, - 2696,8864, 2704,4768, 2712,12960, 2728,10912, 2736,6816, 2744,15008, 2760,9888, - 2768,5792, 2776,13984, 2784,3744, 2792,11936, 2800,7840, 2808,16032, 2824,8608, - 2832,4512, 2840,12704, 2856,10656, 2864,6560, 2872,14752, 2888,9632, 2896,5536, - 2904,13728, 2912,3488, 2920,11680, 2928,7584, 2936,15776, 2952,9120, 2960,5024, - 2968,13216, 2984,11168, 2992,7072, 3000,15264, 3016,10144, 3024,6048, - 3032,14240, 3040,4000, 3048,12192, 3056,8096, 3064,16288, 3080,8288, 3088,4192, - 3096,12384, 3112,10336, 3120,6240, 3128,14432, 3144,9312, 3152,5216, 3160,13408, - 3176,11360, 3184,7264, 3192,15456, 3208,8800, 3216,4704, 3224,12896, 3240,10848, - 3248,6752, 3256,14944, 3272,9824, 3280,5728, 3288,13920, 3296,3680, 3304,11872, - 3312,7776, 3320,15968, 3336,8544, 3344,4448, 3352,12640, 3368,10592, 3376,6496, - 3384,14688, 3400,9568, 3408,5472, 3416,13664, 3432,11616, 3440,7520, 3448,15712, - 3464,9056, 3472,4960, 3480,13152, 3496,11104, 3504,7008, 3512,15200, 3528,10080, - 3536,5984, 3544,14176, 3552,3936, 3560,12128, 3568,8032, 3576,16224, 3592,8416, - 3600,4320, 3608,12512, 3624,10464, 3632,6368, 3640,14560, 3656,9440, 3664,5344, - 3672,13536, 3688,11488, 3696,7392, 3704,15584, 3720,8928, 3728,4832, 3736,13024, - 3752,10976, 3760,6880, 3768,15072, 3784,9952, 3792,5856, 3800,14048, 3816,12000, - 3824,7904, 3832,16096, 3848,8672, 3856,4576, 3864,12768, 3880,10720, 3888,6624, - 3896,14816, 3912,9696, 3920,5600, 3928,13792, 3944,11744, 3952,7648, 3960,15840, - 3976,9184, 3984,5088, 3992,13280, 4008,11232, 4016,7136, 4024,15328, 4040,10208, - 4048,6112, 4056,14304, 4072,12256, 4080,8160, 4088,16352, 4104,8208, 4120,12304, - 4136,10256, 4144,6160, 4152,14352, 4168,9232, 4176,5136, 4184,13328, 4200,11280, - 4208,7184, 4216,15376, 4232,8720, 4240,4624, 4248,12816, 4264,10768, 4272,6672, - 4280,14864, 4296,9744, 4304,5648, 4312,13840, 4328,11792, 4336,7696, 4344,15888, - 4360,8464, 4376,12560, 4392,10512, 4400,6416, 4408,14608, 4424,9488, 4432,5392, - 4440,13584, 4456,11536, 4464,7440, 4472,15632, 4488,8976, 4496,4880, 4504,13072, - 4520,11024, 4528,6928, 4536,15120, 4552,10000, 4560,5904, 4568,14096, - 4584,12048, 4592,7952, 4600,16144, 4616,8336, 4632,12432, 4648,10384, 4656,6288, - 4664,14480, 4680,9360, 4688,5264, 4696,13456, 4712,11408, 4720,7312, 4728,15504, - 4744,8848, 4760,12944, 4776,10896, 4784,6800, 4792,14992, 4808,9872, 4816,5776, - 4824,13968, 4840,11920, 4848,7824, 4856,16016, 4872,8592, 4888,12688, - 4904,10640, 4912,6544, 4920,14736, 4936,9616, 4944,5520, 4952,13712, 4968,11664, - 4976,7568, 4984,15760, 5000,9104, 5016,13200, 5032,11152, 5040,7056, 5048,15248, - 5064,10128, 5072,6032, 5080,14224, 5096,12176, 5104,8080, 5112,16272, 5128,8272, - 5144,12368, 5160,10320, 5168,6224, 5176,14416, 5192,9296, 5208,13392, - 5224,11344, 5232,7248, 5240,15440, 5256,8784, 5272,12880, 5288,10832, 5296,6736, - 5304,14928, 5320,9808, 5328,5712, 5336,13904, 5352,11856, 5360,7760, 5368,15952, - 5384,8528, 5400,12624, 5416,10576, 5424,6480, 5432,14672, 5448,9552, 5464,13648, - 5480,11600, 5488,7504, 5496,15696, 5512,9040, 5528,13136, 5544,11088, 5552,6992, - 5560,15184, 5576,10064, 5584,5968, 5592,14160, 5608,12112, 5616,8016, - 5624,16208, 5640,8400, 5656,12496, 5672,10448, 5680,6352, 5688,14544, 5704,9424, - 5720,13520, 5736,11472, 5744,7376, 5752,15568, 5768,8912, 5784,13008, - 5800,10960, 5808,6864, 5816,15056, 5832,9936, 5848,14032, 5864,11984, 5872,7888, - 5880,16080, 5896,8656, 5912,12752, 5928,10704, 5936,6608, 5944,14800, 5960,9680, - 5976,13776, 5992,11728, 6000,7632, 6008,15824, 6024,9168, 6040,13264, - 6056,11216, 6064,7120, 6072,15312, 6088,10192, 6104,14288, 6120,12240, - 6128,8144, 6136,16336, 6152,8240, 6168,12336, 6184,10288, 6200,14384, 6216,9264, - 6232,13360, 6248,11312, 6256,7216, 6264,15408, 6280,8752, 6296,12848, - 6312,10800, 6320,6704, 6328,14896, 6344,9776, 6360,13872, 6376,11824, 6384,7728, - 6392,15920, 6408,8496, 6424,12592, 6440,10544, 6456,14640, 6472,9520, - 6488,13616, 6504,11568, 6512,7472, 6520,15664, 6536,9008, 6552,13104, - 6568,11056, 6576,6960, 6584,15152, 6600,10032, 6616,14128, 6632,12080, - 6640,7984, 6648,16176, 6664,8368, 6680,12464, 6696,10416, 6712,14512, 6728,9392, - 6744,13488, 6760,11440, 6768,7344, 6776,15536, 6792,8880, 6808,12976, - 6824,10928, 6840,15024, 6856,9904, 6872,14000, 6888,11952, 6896,7856, - 6904,16048, 6920,8624, 6936,12720, 6952,10672, 6968,14768, 6984,9648, - 7000,13744, 7016,11696, 7024,7600, 7032,15792, 7048,9136, 7064,13232, - 7080,11184, 7096,15280, 7112,10160, 7128,14256, 7144,12208, 7152,8112, - 7160,16304, 7176,8304, 7192,12400, 7208,10352, 7224,14448, 7240,9328, - 7256,13424, 7272,11376, 7288,15472, 7304,8816, 7320,12912, 7336,10864, - 7352,14960, 7368,9840, 7384,13936, 7400,11888, 7408,7792, 7416,15984, 7432,8560, - 7448,12656, 7464,10608, 7480,14704, 7496,9584, 7512,13680, 7528,11632, - 7544,15728, 7560,9072, 7576,13168, 7592,11120, 7608,15216, 7624,10096, - 7640,14192, 7656,12144, 7664,8048, 7672,16240, 7688,8432, 7704,12528, - 7720,10480, 7736,14576, 7752,9456, 7768,13552, 7784,11504, 7800,15600, - 7816,8944, 7832,13040, 7848,10992, 7864,15088, 7880,9968, 7896,14064, - 7912,12016, 7928,16112, 7944,8688, 7960,12784, 7976,10736, 7992,14832, - 8008,9712, 8024,13808, 8040,11760, 8056,15856, 8072,9200, 8088,13296, - 8104,11248, 8120,15344, 8136,10224, 8152,14320, 8168,12272, 8184,16368, - 8216,12296, 8232,10248, 8248,14344, 8264,9224, 8280,13320, 8296,11272, - 8312,15368, 8328,8712, 8344,12808, 8360,10760, 8376,14856, 8392,9736, - 8408,13832, 8424,11784, 8440,15880, 8472,12552, 8488,10504, 8504,14600, - 8520,9480, 8536,13576, 8552,11528, 8568,15624, 8584,8968, 8600,13064, - 8616,11016, 8632,15112, 8648,9992, 8664,14088, 8680,12040, 8696,16136, - 8728,12424, 8744,10376, 8760,14472, 8776,9352, 8792,13448, 8808,11400, - 8824,15496, 8856,12936, 8872,10888, 8888,14984, 8904,9864, 8920,13960, - 8936,11912, 8952,16008, 8984,12680, 9000,10632, 9016,14728, 9032,9608, - 9048,13704, 9064,11656, 9080,15752, 9112,13192, 9128,11144, 9144,15240, - 9160,10120, 9176,14216, 9192,12168, 9208,16264, 9240,12360, 9256,10312, - 9272,14408, 9304,13384, 9320,11336, 9336,15432, 9368,12872, 9384,10824, - 9400,14920, 9416,9800, 9432,13896, 9448,11848, 9464,15944, 9496,12616, - 9512,10568, 9528,14664, 9560,13640, 9576,11592, 9592,15688, 9624,13128, - 9640,11080, 9656,15176, 9672,10056, 9688,14152, 9704,12104, 9720,16200, - 9752,12488, 9768,10440, 9784,14536, 9816,13512, 9832,11464, 9848,15560, - 9880,13000, 9896,10952, 9912,15048, 9944,14024, 9960,11976, 9976,16072, - 10008,12744, 10024,10696, 10040,14792, 10072,13768, 10088,11720, 10104,15816, - 10136,13256, 10152,11208, 10168,15304, 10200,14280, 10216,12232, 10232,16328, - 10264,12328, 10296,14376, 10328,13352, 10344,11304, 10360,15400, 10392,12840, - 10408,10792, 10424,14888, 10456,13864, 10472,11816, 10488,15912, 10520,12584, - 10552,14632, 10584,13608, 10600,11560, 10616,15656, 10648,13096, 10664,11048, - 10680,15144, 10712,14120, 10728,12072, 10744,16168, 10776,12456, 10808,14504, - 10840,13480, 10856,11432, 10872,15528, 10904,12968, 10936,15016, 10968,13992, - 10984,11944, 11000,16040, 11032,12712, 11064,14760, 11096,13736, 11112,11688, - 11128,15784, 11160,13224, 11192,15272, 11224,14248, 11240,12200, 11256,16296, - 11288,12392, 11320,14440, 11352,13416, 11384,15464, 11416,12904, 11448,14952, - 11480,13928, 11496,11880, 11512,15976, 11544,12648, 11576,14696, 11608,13672, - 11640,15720, 11672,13160, 11704,15208, 11736,14184, 11752,12136, 11768,16232, - 11800,12520, 11832,14568, 11864,13544, 11896,15592, 11928,13032, 11960,15080, - 11992,14056, 12024,16104, 12056,12776, 12088,14824, 12120,13800, 12152,15848, - 12184,13288, 12216,15336, 12248,14312, 12280,16360, 12344,14360, 12376,13336, - 12408,15384, 12440,12824, 12472,14872, 12504,13848, 12536,15896, 12600,14616, - 12632,13592, 12664,15640, 12696,13080, 12728,15128, 12760,14104, 12792,16152, - 12856,14488, 12888,13464, 12920,15512, 12984,15000, 13016,13976, 13048,16024, - 13112,14744, 13144,13720, 13176,15768, 13240,15256, 13272,14232, 13304,16280, - 13368,14424, 13432,15448, 13496,14936, 13528,13912, 13560,15960, 13624,14680, - 13688,15704, 13752,15192, 13784,14168, 13816,16216, 13880,14552, 13944,15576, - 14008,15064, 14072,16088, 14136,14808, 14200,15832, 14264,15320, 14328,16344, - 14456,15416, 14520,14904, 14584,15928, 14712,15672, 14776,15160, 14840,16184, - 14968,15544, 15096,16056, 15224,15800, 15352,16312, 15608,15992, 15864,16248 -}; - -const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH] = -{ - //radix 4, size 4032 - 8,16384, 16,8192, 24,24576, 32,4096, 40,20480, 48,12288, 56,28672, 64,2048, - 72,18432, 80,10240, 88,26624, 96,6144, 104,22528, 112,14336, 120,30720, - 128,1024, 136,17408, 144,9216, 152,25600, 160,5120, 168,21504, 176,13312, - 184,29696, 192,3072, 200,19456, 208,11264, 216,27648, 224,7168, 232,23552, - 240,15360, 248,31744, 256,512, 264,16896, 272,8704, 280,25088, 288,4608, - 296,20992, 304,12800, 312,29184, 320,2560, 328,18944, 336,10752, 344,27136, - 352,6656, 360,23040, 368,14848, 376,31232, 384,1536, 392,17920, 400,9728, - 408,26112, 416,5632, 424,22016, 432,13824, 440,30208, 448,3584, 456,19968, - 464,11776, 472,28160, 480,7680, 488,24064, 496,15872, 504,32256, 520,16640, - 528,8448, 536,24832, 544,4352, 552,20736, 560,12544, 568,28928, 576,2304, - 584,18688, 592,10496, 600,26880, 608,6400, 616,22784, 624,14592, 632,30976, - 640,1280, 648,17664, 656,9472, 664,25856, 672,5376, 680,21760, 688,13568, - 696,29952, 704,3328, 712,19712, 720,11520, 728,27904, 736,7424, 744,23808, - 752,15616, 760,32000, 776,17152, 784,8960, 792,25344, 800,4864, 808,21248, - 816,13056, 824,29440, 832,2816, 840,19200, 848,11008, 856,27392, 864,6912, - 872,23296, 880,15104, 888,31488, 896,1792, 904,18176, 912,9984, 920,26368, - 928,5888, 936,22272, 944,14080, 952,30464, 960,3840, 968,20224, 976,12032, - 984,28416, 992,7936, 1000,24320, 1008,16128, 1016,32512, 1032,16512, 1040,8320, - 1048,24704, 1056,4224, 1064,20608, 1072,12416, 1080,28800, 1088,2176, - 1096,18560, 1104,10368, 1112,26752, 1120,6272, 1128,22656, 1136,14464, - 1144,30848, 1160,17536, 1168,9344, 1176,25728, 1184,5248, 1192,21632, - 1200,13440, 1208,29824, 1216,3200, 1224,19584, 1232,11392, 1240,27776, - 1248,7296, 1256,23680, 1264,15488, 1272,31872, 1288,17024, 1296,8832, - 1304,25216, 1312,4736, 1320,21120, 1328,12928, 1336,29312, 1344,2688, - 1352,19072, 1360,10880, 1368,27264, 1376,6784, 1384,23168, 1392,14976, - 1400,31360, 1408,1664, 1416,18048, 1424,9856, 1432,26240, 1440,5760, 1448,22144, - 1456,13952, 1464,30336, 1472,3712, 1480,20096, 1488,11904, 1496,28288, - 1504,7808, 1512,24192, 1520,16000, 1528,32384, 1544,16768, 1552,8576, - 1560,24960, 1568,4480, 1576,20864, 1584,12672, 1592,29056, 1600,2432, - 1608,18816, 1616,10624, 1624,27008, 1632,6528, 1640,22912, 1648,14720, - 1656,31104, 1672,17792, 1680,9600, 1688,25984, 1696,5504, 1704,21888, - 1712,13696, 1720,30080, 1728,3456, 1736,19840, 1744,11648, 1752,28032, - 1760,7552, 1768,23936, 1776,15744, 1784,32128, 1800,17280, 1808,9088, - 1816,25472, 1824,4992, 1832,21376, 1840,13184, 1848,29568, 1856,2944, - 1864,19328, 1872,11136, 1880,27520, 1888,7040, 1896,23424, 1904,15232, - 1912,31616, 1928,18304, 1936,10112, 1944,26496, 1952,6016, 1960,22400, - 1968,14208, 1976,30592, 1984,3968, 1992,20352, 2000,12160, 2008,28544, - 2016,8064, 2024,24448, 2032,16256, 2040,32640, 2056,16448, 2064,8256, - 2072,24640, 2080,4160, 2088,20544, 2096,12352, 2104,28736, 2120,18496, - 2128,10304, 2136,26688, 2144,6208, 2152,22592, 2160,14400, 2168,30784, - 2184,17472, 2192,9280, 2200,25664, 2208,5184, 2216,21568, 2224,13376, - 2232,29760, 2240,3136, 2248,19520, 2256,11328, 2264,27712, 2272,7232, - 2280,23616, 2288,15424, 2296,31808, 2312,16960, 2320,8768, 2328,25152, - 2336,4672, 2344,21056, 2352,12864, 2360,29248, 2368,2624, 2376,19008, - 2384,10816, 2392,27200, 2400,6720, 2408,23104, 2416,14912, 2424,31296, - 2440,17984, 2448,9792, 2456,26176, 2464,5696, 2472,22080, 2480,13888, - 2488,30272, 2496,3648, 2504,20032, 2512,11840, 2520,28224, 2528,7744, - 2536,24128, 2544,15936, 2552,32320, 2568,16704, 2576,8512, 2584,24896, - 2592,4416, 2600,20800, 2608,12608, 2616,28992, 2632,18752, 2640,10560, - 2648,26944, 2656,6464, 2664,22848, 2672,14656, 2680,31040, 2696,17728, - 2704,9536, 2712,25920, 2720,5440, 2728,21824, 2736,13632, 2744,30016, 2752,3392, - 2760,19776, 2768,11584, 2776,27968, 2784,7488, 2792,23872, 2800,15680, - 2808,32064, 2824,17216, 2832,9024, 2840,25408, 2848,4928, 2856,21312, - 2864,13120, 2872,29504, 2888,19264, 2896,11072, 2904,27456, 2912,6976, - 2920,23360, 2928,15168, 2936,31552, 2952,18240, 2960,10048, 2968,26432, - 2976,5952, 2984,22336, 2992,14144, 3000,30528, 3008,3904, 3016,20288, - 3024,12096, 3032,28480, 3040,8000, 3048,24384, 3056,16192, 3064,32576, - 3080,16576, 3088,8384, 3096,24768, 3104,4288, 3112,20672, 3120,12480, - 3128,28864, 3144,18624, 3152,10432, 3160,26816, 3168,6336, 3176,22720, - 3184,14528, 3192,30912, 3208,17600, 3216,9408, 3224,25792, 3232,5312, - 3240,21696, 3248,13504, 3256,29888, 3272,19648, 3280,11456, 3288,27840, - 3296,7360, 3304,23744, 3312,15552, 3320,31936, 3336,17088, 3344,8896, - 3352,25280, 3360,4800, 3368,21184, 3376,12992, 3384,29376, 3400,19136, - 3408,10944, 3416,27328, 3424,6848, 3432,23232, 3440,15040, 3448,31424, - 3464,18112, 3472,9920, 3480,26304, 3488,5824, 3496,22208, 3504,14016, - 3512,30400, 3520,3776, 3528,20160, 3536,11968, 3544,28352, 3552,7872, - 3560,24256, 3568,16064, 3576,32448, 3592,16832, 3600,8640, 3608,25024, - 3616,4544, 3624,20928, 3632,12736, 3640,29120, 3656,18880, 3664,10688, - 3672,27072, 3680,6592, 3688,22976, 3696,14784, 3704,31168, 3720,17856, - 3728,9664, 3736,26048, 3744,5568, 3752,21952, 3760,13760, 3768,30144, - 3784,19904, 3792,11712, 3800,28096, 3808,7616, 3816,24000, 3824,15808, - 3832,32192, 3848,17344, 3856,9152, 3864,25536, 3872,5056, 3880,21440, - 3888,13248, 3896,29632, 3912,19392, 3920,11200, 3928,27584, 3936,7104, - 3944,23488, 3952,15296, 3960,31680, 3976,18368, 3984,10176, 3992,26560, - 4000,6080, 4008,22464, 4016,14272, 4024,30656, 4040,20416, 4048,12224, - 4056,28608, 4064,8128, 4072,24512, 4080,16320, 4088,32704, 4104,16416, - 4112,8224, 4120,24608, 4136,20512, 4144,12320, 4152,28704, 4168,18464, - 4176,10272, 4184,26656, 4192,6176, 4200,22560, 4208,14368, 4216,30752, - 4232,17440, 4240,9248, 4248,25632, 4256,5152, 4264,21536, 4272,13344, - 4280,29728, 4296,19488, 4304,11296, 4312,27680, 4320,7200, 4328,23584, - 4336,15392, 4344,31776, 4360,16928, 4368,8736, 4376,25120, 4384,4640, - 4392,21024, 4400,12832, 4408,29216, 4424,18976, 4432,10784, 4440,27168, - 4448,6688, 4456,23072, 4464,14880, 4472,31264, 4488,17952, 4496,9760, - 4504,26144, 4512,5664, 4520,22048, 4528,13856, 4536,30240, 4552,20000, - 4560,11808, 4568,28192, 4576,7712, 4584,24096, 4592,15904, 4600,32288, - 4616,16672, 4624,8480, 4632,24864, 4648,20768, 4656,12576, 4664,28960, - 4680,18720, 4688,10528, 4696,26912, 4704,6432, 4712,22816, 4720,14624, - 4728,31008, 4744,17696, 4752,9504, 4760,25888, 4768,5408, 4776,21792, - 4784,13600, 4792,29984, 4808,19744, 4816,11552, 4824,27936, 4832,7456, - 4840,23840, 4848,15648, 4856,32032, 4872,17184, 4880,8992, 4888,25376, - 4904,21280, 4912,13088, 4920,29472, 4936,19232, 4944,11040, 4952,27424, - 4960,6944, 4968,23328, 4976,15136, 4984,31520, 5000,18208, 5008,10016, - 5016,26400, 5024,5920, 5032,22304, 5040,14112, 5048,30496, 5064,20256, - 5072,12064, 5080,28448, 5088,7968, 5096,24352, 5104,16160, 5112,32544, - 5128,16544, 5136,8352, 5144,24736, 5160,20640, 5168,12448, 5176,28832, - 5192,18592, 5200,10400, 5208,26784, 5216,6304, 5224,22688, 5232,14496, - 5240,30880, 5256,17568, 5264,9376, 5272,25760, 5288,21664, 5296,13472, - 5304,29856, 5320,19616, 5328,11424, 5336,27808, 5344,7328, 5352,23712, - 5360,15520, 5368,31904, 5384,17056, 5392,8864, 5400,25248, 5416,21152, - 5424,12960, 5432,29344, 5448,19104, 5456,10912, 5464,27296, 5472,6816, - 5480,23200, 5488,15008, 5496,31392, 5512,18080, 5520,9888, 5528,26272, - 5536,5792, 5544,22176, 5552,13984, 5560,30368, 5576,20128, 5584,11936, - 5592,28320, 5600,7840, 5608,24224, 5616,16032, 5624,32416, 5640,16800, - 5648,8608, 5656,24992, 5672,20896, 5680,12704, 5688,29088, 5704,18848, - 5712,10656, 5720,27040, 5728,6560, 5736,22944, 5744,14752, 5752,31136, - 5768,17824, 5776,9632, 5784,26016, 5800,21920, 5808,13728, 5816,30112, - 5832,19872, 5840,11680, 5848,28064, 5856,7584, 5864,23968, 5872,15776, - 5880,32160, 5896,17312, 5904,9120, 5912,25504, 5928,21408, 5936,13216, - 5944,29600, 5960,19360, 5968,11168, 5976,27552, 5984,7072, 5992,23456, - 6000,15264, 6008,31648, 6024,18336, 6032,10144, 6040,26528, 6056,22432, - 6064,14240, 6072,30624, 6088,20384, 6096,12192, 6104,28576, 6112,8096, - 6120,24480, 6128,16288, 6136,32672, 6152,16480, 6160,8288, 6168,24672, - 6184,20576, 6192,12384, 6200,28768, 6216,18528, 6224,10336, 6232,26720, - 6248,22624, 6256,14432, 6264,30816, 6280,17504, 6288,9312, 6296,25696, - 6312,21600, 6320,13408, 6328,29792, 6344,19552, 6352,11360, 6360,27744, - 6368,7264, 6376,23648, 6384,15456, 6392,31840, 6408,16992, 6416,8800, - 6424,25184, 6440,21088, 6448,12896, 6456,29280, 6472,19040, 6480,10848, - 6488,27232, 6496,6752, 6504,23136, 6512,14944, 6520,31328, 6536,18016, - 6544,9824, 6552,26208, 6568,22112, 6576,13920, 6584,30304, 6600,20064, - 6608,11872, 6616,28256, 6624,7776, 6632,24160, 6640,15968, 6648,32352, - 6664,16736, 6672,8544, 6680,24928, 6696,20832, 6704,12640, 6712,29024, - 6728,18784, 6736,10592, 6744,26976, 6760,22880, 6768,14688, 6776,31072, - 6792,17760, 6800,9568, 6808,25952, 6824,21856, 6832,13664, 6840,30048, - 6856,19808, 6864,11616, 6872,28000, 6880,7520, 6888,23904, 6896,15712, - 6904,32096, 6920,17248, 6928,9056, 6936,25440, 6952,21344, 6960,13152, - 6968,29536, 6984,19296, 6992,11104, 7000,27488, 7016,23392, 7024,15200, - 7032,31584, 7048,18272, 7056,10080, 7064,26464, 7080,22368, 7088,14176, - 7096,30560, 7112,20320, 7120,12128, 7128,28512, 7136,8032, 7144,24416, - 7152,16224, 7160,32608, 7176,16608, 7184,8416, 7192,24800, 7208,20704, - 7216,12512, 7224,28896, 7240,18656, 7248,10464, 7256,26848, 7272,22752, - 7280,14560, 7288,30944, 7304,17632, 7312,9440, 7320,25824, 7336,21728, - 7344,13536, 7352,29920, 7368,19680, 7376,11488, 7384,27872, 7400,23776, - 7408,15584, 7416,31968, 7432,17120, 7440,8928, 7448,25312, 7464,21216, - 7472,13024, 7480,29408, 7496,19168, 7504,10976, 7512,27360, 7528,23264, - 7536,15072, 7544,31456, 7560,18144, 7568,9952, 7576,26336, 7592,22240, - 7600,14048, 7608,30432, 7624,20192, 7632,12000, 7640,28384, 7648,7904, - 7656,24288, 7664,16096, 7672,32480, 7688,16864, 7696,8672, 7704,25056, - 7720,20960, 7728,12768, 7736,29152, 7752,18912, 7760,10720, 7768,27104, - 7784,23008, 7792,14816, 7800,31200, 7816,17888, 7824,9696, 7832,26080, - 7848,21984, 7856,13792, 7864,30176, 7880,19936, 7888,11744, 7896,28128, - 7912,24032, 7920,15840, 7928,32224, 7944,17376, 7952,9184, 7960,25568, - 7976,21472, 7984,13280, 7992,29664, 8008,19424, 8016,11232, 8024,27616, - 8040,23520, 8048,15328, 8056,31712, 8072,18400, 8080,10208, 8088,26592, - 8104,22496, 8112,14304, 8120,30688, 8136,20448, 8144,12256, 8152,28640, - 8168,24544, 8176,16352, 8184,32736, 8200,16400, 8216,24592, 8232,20496, - 8240,12304, 8248,28688, 8264,18448, 8272,10256, 8280,26640, 8296,22544, - 8304,14352, 8312,30736, 8328,17424, 8336,9232, 8344,25616, 8360,21520, - 8368,13328, 8376,29712, 8392,19472, 8400,11280, 8408,27664, 8424,23568, - 8432,15376, 8440,31760, 8456,16912, 8464,8720, 8472,25104, 8488,21008, - 8496,12816, 8504,29200, 8520,18960, 8528,10768, 8536,27152, 8552,23056, - 8560,14864, 8568,31248, 8584,17936, 8592,9744, 8600,26128, 8616,22032, - 8624,13840, 8632,30224, 8648,19984, 8656,11792, 8664,28176, 8680,24080, - 8688,15888, 8696,32272, 8712,16656, 8728,24848, 8744,20752, 8752,12560, - 8760,28944, 8776,18704, 8784,10512, 8792,26896, 8808,22800, 8816,14608, - 8824,30992, 8840,17680, 8848,9488, 8856,25872, 8872,21776, 8880,13584, - 8888,29968, 8904,19728, 8912,11536, 8920,27920, 8936,23824, 8944,15632, - 8952,32016, 8968,17168, 8984,25360, 9000,21264, 9008,13072, 9016,29456, - 9032,19216, 9040,11024, 9048,27408, 9064,23312, 9072,15120, 9080,31504, - 9096,18192, 9104,10000, 9112,26384, 9128,22288, 9136,14096, 9144,30480, - 9160,20240, 9168,12048, 9176,28432, 9192,24336, 9200,16144, 9208,32528, - 9224,16528, 9240,24720, 9256,20624, 9264,12432, 9272,28816, 9288,18576, - 9296,10384, 9304,26768, 9320,22672, 9328,14480, 9336,30864, 9352,17552, - 9368,25744, 9384,21648, 9392,13456, 9400,29840, 9416,19600, 9424,11408, - 9432,27792, 9448,23696, 9456,15504, 9464,31888, 9480,17040, 9496,25232, - 9512,21136, 9520,12944, 9528,29328, 9544,19088, 9552,10896, 9560,27280, - 9576,23184, 9584,14992, 9592,31376, 9608,18064, 9616,9872, 9624,26256, - 9640,22160, 9648,13968, 9656,30352, 9672,20112, 9680,11920, 9688,28304, - 9704,24208, 9712,16016, 9720,32400, 9736,16784, 9752,24976, 9768,20880, - 9776,12688, 9784,29072, 9800,18832, 9808,10640, 9816,27024, 9832,22928, - 9840,14736, 9848,31120, 9864,17808, 9880,26000, 9896,21904, 9904,13712, - 9912,30096, 9928,19856, 9936,11664, 9944,28048, 9960,23952, 9968,15760, - 9976,32144, 9992,17296, 10008,25488, 10024,21392, 10032,13200, 10040,29584, - 10056,19344, 10064,11152, 10072,27536, 10088,23440, 10096,15248, 10104,31632, - 10120,18320, 10136,26512, 10152,22416, 10160,14224, 10168,30608, 10184,20368, - 10192,12176, 10200,28560, 10216,24464, 10224,16272, 10232,32656, 10248,16464, - 10264,24656, 10280,20560, 10288,12368, 10296,28752, 10312,18512, 10328,26704, - 10344,22608, 10352,14416, 10360,30800, 10376,17488, 10392,25680, 10408,21584, - 10416,13392, 10424,29776, 10440,19536, 10448,11344, 10456,27728, 10472,23632, - 10480,15440, 10488,31824, 10504,16976, 10520,25168, 10536,21072, 10544,12880, - 10552,29264, 10568,19024, 10576,10832, 10584,27216, 10600,23120, 10608,14928, - 10616,31312, 10632,18000, 10648,26192, 10664,22096, 10672,13904, 10680,30288, - 10696,20048, 10704,11856, 10712,28240, 10728,24144, 10736,15952, 10744,32336, - 10760,16720, 10776,24912, 10792,20816, 10800,12624, 10808,29008, 10824,18768, - 10840,26960, 10856,22864, 10864,14672, 10872,31056, 10888,17744, 10904,25936, - 10920,21840, 10928,13648, 10936,30032, 10952,19792, 10960,11600, 10968,27984, - 10984,23888, 10992,15696, 11000,32080, 11016,17232, 11032,25424, 11048,21328, - 11056,13136, 11064,29520, 11080,19280, 11096,27472, 11112,23376, 11120,15184, - 11128,31568, 11144,18256, 11160,26448, 11176,22352, 11184,14160, 11192,30544, - 11208,20304, 11216,12112, 11224,28496, 11240,24400, 11248,16208, 11256,32592, - 11272,16592, 11288,24784, 11304,20688, 11312,12496, 11320,28880, 11336,18640, - 11352,26832, 11368,22736, 11376,14544, 11384,30928, 11400,17616, 11416,25808, - 11432,21712, 11440,13520, 11448,29904, 11464,19664, 11480,27856, 11496,23760, - 11504,15568, 11512,31952, 11528,17104, 11544,25296, 11560,21200, 11568,13008, - 11576,29392, 11592,19152, 11608,27344, 11624,23248, 11632,15056, 11640,31440, - 11656,18128, 11672,26320, 11688,22224, 11696,14032, 11704,30416, 11720,20176, - 11728,11984, 11736,28368, 11752,24272, 11760,16080, 11768,32464, 11784,16848, - 11800,25040, 11816,20944, 11824,12752, 11832,29136, 11848,18896, 11864,27088, - 11880,22992, 11888,14800, 11896,31184, 11912,17872, 11928,26064, 11944,21968, - 11952,13776, 11960,30160, 11976,19920, 11992,28112, 12008,24016, 12016,15824, - 12024,32208, 12040,17360, 12056,25552, 12072,21456, 12080,13264, 12088,29648, - 12104,19408, 12120,27600, 12136,23504, 12144,15312, 12152,31696, 12168,18384, - 12184,26576, 12200,22480, 12208,14288, 12216,30672, 12232,20432, 12248,28624, - 12264,24528, 12272,16336, 12280,32720, 12296,16432, 12312,24624, 12328,20528, - 12344,28720, 12360,18480, 12376,26672, 12392,22576, 12400,14384, 12408,30768, - 12424,17456, 12440,25648, 12456,21552, 12464,13360, 12472,29744, 12488,19504, - 12504,27696, 12520,23600, 12528,15408, 12536,31792, 12552,16944, 12568,25136, - 12584,21040, 12592,12848, 12600,29232, 12616,18992, 12632,27184, 12648,23088, - 12656,14896, 12664,31280, 12680,17968, 12696,26160, 12712,22064, 12720,13872, - 12728,30256, 12744,20016, 12760,28208, 12776,24112, 12784,15920, 12792,32304, - 12808,16688, 12824,24880, 12840,20784, 12856,28976, 12872,18736, 12888,26928, - 12904,22832, 12912,14640, 12920,31024, 12936,17712, 12952,25904, 12968,21808, - 12976,13616, 12984,30000, 13000,19760, 13016,27952, 13032,23856, 13040,15664, - 13048,32048, 13064,17200, 13080,25392, 13096,21296, 13112,29488, 13128,19248, - 13144,27440, 13160,23344, 13168,15152, 13176,31536, 13192,18224, 13208,26416, - 13224,22320, 13232,14128, 13240,30512, 13256,20272, 13272,28464, 13288,24368, - 13296,16176, 13304,32560, 13320,16560, 13336,24752, 13352,20656, 13368,28848, - 13384,18608, 13400,26800, 13416,22704, 13424,14512, 13432,30896, 13448,17584, - 13464,25776, 13480,21680, 13496,29872, 13512,19632, 13528,27824, 13544,23728, - 13552,15536, 13560,31920, 13576,17072, 13592,25264, 13608,21168, 13624,29360, - 13640,19120, 13656,27312, 13672,23216, 13680,15024, 13688,31408, 13704,18096, - 13720,26288, 13736,22192, 13744,14000, 13752,30384, 13768,20144, 13784,28336, - 13800,24240, 13808,16048, 13816,32432, 13832,16816, 13848,25008, 13864,20912, - 13880,29104, 13896,18864, 13912,27056, 13928,22960, 13936,14768, 13944,31152, - 13960,17840, 13976,26032, 13992,21936, 14008,30128, 14024,19888, 14040,28080, - 14056,23984, 14064,15792, 14072,32176, 14088,17328, 14104,25520, 14120,21424, - 14136,29616, 14152,19376, 14168,27568, 14184,23472, 14192,15280, 14200,31664, - 14216,18352, 14232,26544, 14248,22448, 14264,30640, 14280,20400, 14296,28592, - 14312,24496, 14320,16304, 14328,32688, 14344,16496, 14360,24688, 14376,20592, - 14392,28784, 14408,18544, 14424,26736, 14440,22640, 14456,30832, 14472,17520, - 14488,25712, 14504,21616, 14520,29808, 14536,19568, 14552,27760, 14568,23664, - 14576,15472, 14584,31856, 14600,17008, 14616,25200, 14632,21104, 14648,29296, - 14664,19056, 14680,27248, 14696,23152, 14704,14960, 14712,31344, 14728,18032, - 14744,26224, 14760,22128, 14776,30320, 14792,20080, 14808,28272, 14824,24176, - 14832,15984, 14840,32368, 14856,16752, 14872,24944, 14888,20848, 14904,29040, - 14920,18800, 14936,26992, 14952,22896, 14968,31088, 14984,17776, 15000,25968, - 15016,21872, 15032,30064, 15048,19824, 15064,28016, 15080,23920, 15088,15728, - 15096,32112, 15112,17264, 15128,25456, 15144,21360, 15160,29552, 15176,19312, - 15192,27504, 15208,23408, 15224,31600, 15240,18288, 15256,26480, 15272,22384, - 15288,30576, 15304,20336, 15320,28528, 15336,24432, 15344,16240, 15352,32624, - 15368,16624, 15384,24816, 15400,20720, 15416,28912, 15432,18672, 15448,26864, - 15464,22768, 15480,30960, 15496,17648, 15512,25840, 15528,21744, 15544,29936, - 15560,19696, 15576,27888, 15592,23792, 15608,31984, 15624,17136, 15640,25328, - 15656,21232, 15672,29424, 15688,19184, 15704,27376, 15720,23280, 15736,31472, - 15752,18160, 15768,26352, 15784,22256, 15800,30448, 15816,20208, 15832,28400, - 15848,24304, 15856,16112, 15864,32496, 15880,16880, 15896,25072, 15912,20976, - 15928,29168, 15944,18928, 15960,27120, 15976,23024, 15992,31216, 16008,17904, - 16024,26096, 16040,22000, 16056,30192, 16072,19952, 16088,28144, 16104,24048, - 16120,32240, 16136,17392, 16152,25584, 16168,21488, 16184,29680, 16200,19440, - 16216,27632, 16232,23536, 16248,31728, 16264,18416, 16280,26608, 16296,22512, - 16312,30704, 16328,20464, 16344,28656, 16360,24560, 16376,32752, 16408,24584, - 16424,20488, 16440,28680, 16456,18440, 16472,26632, 16488,22536, 16504,30728, - 16520,17416, 16536,25608, 16552,21512, 16568,29704, 16584,19464, 16600,27656, - 16616,23560, 16632,31752, 16648,16904, 16664,25096, 16680,21000, 16696,29192, - 16712,18952, 16728,27144, 16744,23048, 16760,31240, 16776,17928, 16792,26120, - 16808,22024, 16824,30216, 16840,19976, 16856,28168, 16872,24072, 16888,32264, - 16920,24840, 16936,20744, 16952,28936, 16968,18696, 16984,26888, 17000,22792, - 17016,30984, 17032,17672, 17048,25864, 17064,21768, 17080,29960, 17096,19720, - 17112,27912, 17128,23816, 17144,32008, 17176,25352, 17192,21256, 17208,29448, - 17224,19208, 17240,27400, 17256,23304, 17272,31496, 17288,18184, 17304,26376, - 17320,22280, 17336,30472, 17352,20232, 17368,28424, 17384,24328, 17400,32520, - 17432,24712, 17448,20616, 17464,28808, 17480,18568, 17496,26760, 17512,22664, - 17528,30856, 17560,25736, 17576,21640, 17592,29832, 17608,19592, 17624,27784, - 17640,23688, 17656,31880, 17688,25224, 17704,21128, 17720,29320, 17736,19080, - 17752,27272, 17768,23176, 17784,31368, 17800,18056, 17816,26248, 17832,22152, - 17848,30344, 17864,20104, 17880,28296, 17896,24200, 17912,32392, 17944,24968, - 17960,20872, 17976,29064, 17992,18824, 18008,27016, 18024,22920, 18040,31112, - 18072,25992, 18088,21896, 18104,30088, 18120,19848, 18136,28040, 18152,23944, - 18168,32136, 18200,25480, 18216,21384, 18232,29576, 18248,19336, 18264,27528, - 18280,23432, 18296,31624, 18328,26504, 18344,22408, 18360,30600, 18376,20360, - 18392,28552, 18408,24456, 18424,32648, 18456,24648, 18472,20552, 18488,28744, - 18520,26696, 18536,22600, 18552,30792, 18584,25672, 18600,21576, 18616,29768, - 18632,19528, 18648,27720, 18664,23624, 18680,31816, 18712,25160, 18728,21064, - 18744,29256, 18760,19016, 18776,27208, 18792,23112, 18808,31304, 18840,26184, - 18856,22088, 18872,30280, 18888,20040, 18904,28232, 18920,24136, 18936,32328, - 18968,24904, 18984,20808, 19000,29000, 19032,26952, 19048,22856, 19064,31048, - 19096,25928, 19112,21832, 19128,30024, 19144,19784, 19160,27976, 19176,23880, - 19192,32072, 19224,25416, 19240,21320, 19256,29512, 19288,27464, 19304,23368, - 19320,31560, 19352,26440, 19368,22344, 19384,30536, 19400,20296, 19416,28488, - 19432,24392, 19448,32584, 19480,24776, 19496,20680, 19512,28872, 19544,26824, - 19560,22728, 19576,30920, 19608,25800, 19624,21704, 19640,29896, 19672,27848, - 19688,23752, 19704,31944, 19736,25288, 19752,21192, 19768,29384, 19800,27336, - 19816,23240, 19832,31432, 19864,26312, 19880,22216, 19896,30408, 19912,20168, - 19928,28360, 19944,24264, 19960,32456, 19992,25032, 20008,20936, 20024,29128, - 20056,27080, 20072,22984, 20088,31176, 20120,26056, 20136,21960, 20152,30152, - 20184,28104, 20200,24008, 20216,32200, 20248,25544, 20264,21448, 20280,29640, - 20312,27592, 20328,23496, 20344,31688, 20376,26568, 20392,22472, 20408,30664, - 20440,28616, 20456,24520, 20472,32712, 20504,24616, 20536,28712, 20568,26664, - 20584,22568, 20600,30760, 20632,25640, 20648,21544, 20664,29736, 20696,27688, - 20712,23592, 20728,31784, 20760,25128, 20776,21032, 20792,29224, 20824,27176, - 20840,23080, 20856,31272, 20888,26152, 20904,22056, 20920,30248, 20952,28200, - 20968,24104, 20984,32296, 21016,24872, 21048,28968, 21080,26920, 21096,22824, - 21112,31016, 21144,25896, 21160,21800, 21176,29992, 21208,27944, 21224,23848, - 21240,32040, 21272,25384, 21304,29480, 21336,27432, 21352,23336, 21368,31528, - 21400,26408, 21416,22312, 21432,30504, 21464,28456, 21480,24360, 21496,32552, - 21528,24744, 21560,28840, 21592,26792, 21608,22696, 21624,30888, 21656,25768, - 21688,29864, 21720,27816, 21736,23720, 21752,31912, 21784,25256, 21816,29352, - 21848,27304, 21864,23208, 21880,31400, 21912,26280, 21928,22184, 21944,30376, - 21976,28328, 21992,24232, 22008,32424, 22040,25000, 22072,29096, 22104,27048, - 22120,22952, 22136,31144, 22168,26024, 22200,30120, 22232,28072, 22248,23976, - 22264,32168, 22296,25512, 22328,29608, 22360,27560, 22376,23464, 22392,31656, - 22424,26536, 22456,30632, 22488,28584, 22504,24488, 22520,32680, 22552,24680, - 22584,28776, 22616,26728, 22648,30824, 22680,25704, 22712,29800, 22744,27752, - 22760,23656, 22776,31848, 22808,25192, 22840,29288, 22872,27240, 22888,23144, - 22904,31336, 22936,26216, 22968,30312, 23000,28264, 23016,24168, 23032,32360, - 23064,24936, 23096,29032, 23128,26984, 23160,31080, 23192,25960, 23224,30056, - 23256,28008, 23272,23912, 23288,32104, 23320,25448, 23352,29544, 23384,27496, - 23416,31592, 23448,26472, 23480,30568, 23512,28520, 23528,24424, 23544,32616, - 23576,24808, 23608,28904, 23640,26856, 23672,30952, 23704,25832, 23736,29928, - 23768,27880, 23800,31976, 23832,25320, 23864,29416, 23896,27368, 23928,31464, - 23960,26344, 23992,30440, 24024,28392, 24040,24296, 24056,32488, 24088,25064, - 24120,29160, 24152,27112, 24184,31208, 24216,26088, 24248,30184, 24280,28136, - 24312,32232, 24344,25576, 24376,29672, 24408,27624, 24440,31720, 24472,26600, - 24504,30696, 24536,28648, 24568,32744, 24632,28696, 24664,26648, 24696,30744, - 24728,25624, 24760,29720, 24792,27672, 24824,31768, 24856,25112, 24888,29208, - 24920,27160, 24952,31256, 24984,26136, 25016,30232, 25048,28184, 25080,32280, - 25144,28952, 25176,26904, 25208,31000, 25240,25880, 25272,29976, 25304,27928, - 25336,32024, 25400,29464, 25432,27416, 25464,31512, 25496,26392, 25528,30488, - 25560,28440, 25592,32536, 25656,28824, 25688,26776, 25720,30872, 25784,29848, - 25816,27800, 25848,31896, 25912,29336, 25944,27288, 25976,31384, 26008,26264, - 26040,30360, 26072,28312, 26104,32408, 26168,29080, 26200,27032, 26232,31128, - 26296,30104, 26328,28056, 26360,32152, 26424,29592, 26456,27544, 26488,31640, - 26552,30616, 26584,28568, 26616,32664, 26680,28760, 26744,30808, 26808,29784, - 26840,27736, 26872,31832, 26936,29272, 26968,27224, 27000,31320, 27064,30296, - 27096,28248, 27128,32344, 27192,29016, 27256,31064, 27320,30040, 27352,27992, - 27384,32088, 27448,29528, 27512,31576, 27576,30552, 27608,28504, 27640,32600, - 27704,28888, 27768,30936, 27832,29912, 27896,31960, 27960,29400, 28024,31448, - 28088,30424, 28120,28376, 28152,32472, 28216,29144, 28280,31192, 28344,30168, - 28408,32216, 28472,29656, 28536,31704, 28600,30680, 28664,32728, 28792,30776, - 28856,29752, 28920,31800, 28984,29240, 29048,31288, 29112,30264, 29176,32312, - 29304,31032, 29368,30008, 29432,32056, 29560,31544, 29624,30520, 29688,32568, - 29816,30904, 29944,31928, 30072,31416, 30136,30392, 30200,32440, 30328,31160, - 30456,32184, 30584,31672, 30712,32696, 30968,31864, 31096,31352, 31224,32376, - 31480,32120, 31736,32632, 32248,32504 -}; - -/** -* \par -* Example code for Floating-point RFFT Twiddle factors Generation: -* \par -* 
TW = exp(2*pi*i*[0:L/2-1]/L - pi/2*i).'
-* \par -* Real and Imag values are in interleaved fashion -*/ -const float32_t twiddleCoef_rfft_32[32] = { -0.0f , 1.0f , -0.195090322f , 0.98078528f , -0.382683432f , 0.923879533f , -0.555570233f , 0.831469612f , -0.707106781f , 0.707106781f , -0.831469612f , 0.555570233f , -0.923879533f , 0.382683432f , -0.98078528f , 0.195090322f , -1.0f , 0.0f , -0.98078528f , -0.195090322f , -0.923879533f , -0.382683432f , -0.831469612f , -0.555570233f , -0.707106781f , -0.707106781f , -0.555570233f , -0.831469612f , -0.382683432f , -0.923879533f , -0.195090322f , -0.98078528f -}; - -const float32_t twiddleCoef_rfft_64[64] = { -0.0f, 1.0f, -0.098017140329561f, 0.995184726672197f, -0.195090322016128f, 0.98078528040323f, -0.290284677254462f, 0.956940335732209f, -0.38268343236509f, 0.923879532511287f, -0.471396736825998f, 0.881921264348355f, -0.555570233019602f, 0.831469612302545f, -0.634393284163645f, 0.773010453362737f, -0.707106781186547f, 0.707106781186548f, -0.773010453362737f, 0.634393284163645f, -0.831469612302545f, 0.555570233019602f, -0.881921264348355f, 0.471396736825998f, -0.923879532511287f, 0.38268343236509f, -0.956940335732209f, 0.290284677254462f, -0.98078528040323f, 0.195090322016128f, -0.995184726672197f, 0.098017140329561f, -1.0f, 0.0f, -0.995184726672197f, -0.098017140329561f, -0.98078528040323f, -0.195090322016128f, -0.956940335732209f, -0.290284677254462f, -0.923879532511287f, -0.38268343236509f, -0.881921264348355f, -0.471396736825998f, -0.831469612302545f, -0.555570233019602f, -0.773010453362737f, -0.634393284163645f, -0.707106781186548f, -0.707106781186547f, -0.634393284163645f, -0.773010453362737f, -0.555570233019602f, -0.831469612302545f, -0.471396736825998f, -0.881921264348355f, -0.38268343236509f, -0.923879532511287f, -0.290284677254462f, -0.956940335732209f, -0.195090322016129f, -0.98078528040323f, -0.098017140329561f, -0.995184726672197f -}; - -const float32_t twiddleCoef_rfft_128[128] = { - 0.000000000f, 1.000000000f, - 0.049067674f, 0.998795456f, - 0.098017140f, 0.995184727f, - 0.146730474f, 0.989176510f, - 0.195090322f, 0.980785280f, - 0.242980180f, 0.970031253f, - 0.290284677f, 0.956940336f, - 0.336889853f, 0.941544065f, - 0.382683432f, 0.923879533f, - 0.427555093f, 0.903989293f, - 0.471396737f, 0.881921264f, - 0.514102744f, 0.857728610f, - 0.555570233f, 0.831469612f, - 0.595699304f, 0.803207531f, - 0.634393284f, 0.773010453f, - 0.671558955f, 0.740951125f, - 0.707106781f, 0.707106781f, - 0.740951125f, 0.671558955f, - 0.773010453f, 0.634393284f, - 0.803207531f, 0.595699304f, - 0.831469612f, 0.555570233f, - 0.857728610f, 0.514102744f, - 0.881921264f, 0.471396737f, - 0.903989293f, 0.427555093f, - 0.923879533f, 0.382683432f, - 0.941544065f, 0.336889853f, - 0.956940336f, 0.290284677f, - 0.970031253f, 0.242980180f, - 0.980785280f, 0.195090322f, - 0.989176510f, 0.146730474f, - 0.995184727f, 0.098017140f, - 0.998795456f, 0.049067674f, - 1.000000000f, 0.000000000f, - 0.998795456f, -0.049067674f, - 0.995184727f, -0.098017140f, - 0.989176510f, -0.146730474f, - 0.980785280f, -0.195090322f, - 0.970031253f, -0.242980180f, - 0.956940336f, -0.290284677f, - 0.941544065f, -0.336889853f, - 0.923879533f, -0.382683432f, - 0.903989293f, -0.427555093f, - 0.881921264f, -0.471396737f, - 0.857728610f, -0.514102744f, - 0.831469612f, -0.555570233f, - 0.803207531f, -0.595699304f, - 0.773010453f, -0.634393284f, - 0.740951125f, -0.671558955f, - 0.707106781f, -0.707106781f, - 0.671558955f, -0.740951125f, - 0.634393284f, -0.773010453f, - 0.595699304f, -0.803207531f, - 0.555570233f, -0.831469612f, - 0.514102744f, -0.857728610f, - 0.471396737f, -0.881921264f, - 0.427555093f, -0.903989293f, - 0.382683432f, -0.923879533f, - 0.336889853f, -0.941544065f, - 0.290284677f, -0.956940336f, - 0.242980180f, -0.970031253f, - 0.195090322f, -0.980785280f, - 0.146730474f, -0.989176510f, - 0.098017140f, -0.995184727f, - 0.049067674f, -0.998795456f -}; - -const float32_t twiddleCoef_rfft_256[256] = { - 0.000000000f, 1.000000000f, - 0.024541229f, 0.999698819f, - 0.049067674f, 0.998795456f, - 0.073564564f, 0.997290457f, - 0.098017140f, 0.995184727f, - 0.122410675f, 0.992479535f, - 0.146730474f, 0.989176510f, - 0.170961889f, 0.985277642f, - 0.195090322f, 0.980785280f, - 0.219101240f, 0.975702130f, - 0.242980180f, 0.970031253f, - 0.266712757f, 0.963776066f, - 0.290284677f, 0.956940336f, - 0.313681740f, 0.949528181f, - 0.336889853f, 0.941544065f, - 0.359895037f, 0.932992799f, - 0.382683432f, 0.923879533f, - 0.405241314f, 0.914209756f, - 0.427555093f, 0.903989293f, - 0.449611330f, 0.893224301f, - 0.471396737f, 0.881921264f, - 0.492898192f, 0.870086991f, - 0.514102744f, 0.857728610f, - 0.534997620f, 0.844853565f, - 0.555570233f, 0.831469612f, - 0.575808191f, 0.817584813f, - 0.595699304f, 0.803207531f, - 0.615231591f, 0.788346428f, - 0.634393284f, 0.773010453f, - 0.653172843f, 0.757208847f, - 0.671558955f, 0.740951125f, - 0.689540545f, 0.724247083f, - 0.707106781f, 0.707106781f, - 0.724247083f, 0.689540545f, - 0.740951125f, 0.671558955f, - 0.757208847f, 0.653172843f, - 0.773010453f, 0.634393284f, - 0.788346428f, 0.615231591f, - 0.803207531f, 0.595699304f, - 0.817584813f, 0.575808191f, - 0.831469612f, 0.555570233f, - 0.844853565f, 0.534997620f, - 0.857728610f, 0.514102744f, - 0.870086991f, 0.492898192f, - 0.881921264f, 0.471396737f, - 0.893224301f, 0.449611330f, - 0.903989293f, 0.427555093f, - 0.914209756f, 0.405241314f, - 0.923879533f, 0.382683432f, - 0.932992799f, 0.359895037f, - 0.941544065f, 0.336889853f, - 0.949528181f, 0.313681740f, - 0.956940336f, 0.290284677f, - 0.963776066f, 0.266712757f, - 0.970031253f, 0.242980180f, - 0.975702130f, 0.219101240f, - 0.980785280f, 0.195090322f, - 0.985277642f, 0.170961889f, - 0.989176510f, 0.146730474f, - 0.992479535f, 0.122410675f, - 0.995184727f, 0.098017140f, - 0.997290457f, 0.073564564f, - 0.998795456f, 0.049067674f, - 0.999698819f, 0.024541229f, - 1.000000000f, 0.000000000f, - 0.999698819f, -0.024541229f, - 0.998795456f, -0.049067674f, - 0.997290457f, -0.073564564f, - 0.995184727f, -0.098017140f, - 0.992479535f, -0.122410675f, - 0.989176510f, -0.146730474f, - 0.985277642f, -0.170961889f, - 0.980785280f, -0.195090322f, - 0.975702130f, -0.219101240f, - 0.970031253f, -0.242980180f, - 0.963776066f, -0.266712757f, - 0.956940336f, -0.290284677f, - 0.949528181f, -0.313681740f, - 0.941544065f, -0.336889853f, - 0.932992799f, -0.359895037f, - 0.923879533f, -0.382683432f, - 0.914209756f, -0.405241314f, - 0.903989293f, -0.427555093f, - 0.893224301f, -0.449611330f, - 0.881921264f, -0.471396737f, - 0.870086991f, -0.492898192f, - 0.857728610f, -0.514102744f, - 0.844853565f, -0.534997620f, - 0.831469612f, -0.555570233f, - 0.817584813f, -0.575808191f, - 0.803207531f, -0.595699304f, - 0.788346428f, -0.615231591f, - 0.773010453f, -0.634393284f, - 0.757208847f, -0.653172843f, - 0.740951125f, -0.671558955f, - 0.724247083f, -0.689540545f, - 0.707106781f, -0.707106781f, - 0.689540545f, -0.724247083f, - 0.671558955f, -0.740951125f, - 0.653172843f, -0.757208847f, - 0.634393284f, -0.773010453f, - 0.615231591f, -0.788346428f, - 0.595699304f, -0.803207531f, - 0.575808191f, -0.817584813f, - 0.555570233f, -0.831469612f, - 0.534997620f, -0.844853565f, - 0.514102744f, -0.857728610f, - 0.492898192f, -0.870086991f, - 0.471396737f, -0.881921264f, - 0.449611330f, -0.893224301f, - 0.427555093f, -0.903989293f, - 0.405241314f, -0.914209756f, - 0.382683432f, -0.923879533f, - 0.359895037f, -0.932992799f, - 0.336889853f, -0.941544065f, - 0.313681740f, -0.949528181f, - 0.290284677f, -0.956940336f, - 0.266712757f, -0.963776066f, - 0.242980180f, -0.970031253f, - 0.219101240f, -0.975702130f, - 0.195090322f, -0.980785280f, - 0.170961889f, -0.985277642f, - 0.146730474f, -0.989176510f, - 0.122410675f, -0.992479535f, - 0.098017140f, -0.995184727f, - 0.073564564f, -0.997290457f, - 0.049067674f, -0.998795456f, - 0.024541229f, -0.999698819f -}; - -const float32_t twiddleCoef_rfft_512[512] = { - 0.000000000f, 1.000000000f, - 0.012271538f, 0.999924702f, - 0.024541229f, 0.999698819f, - 0.036807223f, 0.999322385f, - 0.049067674f, 0.998795456f, - 0.061320736f, 0.998118113f, - 0.073564564f, 0.997290457f, - 0.085797312f, 0.996312612f, - 0.098017140f, 0.995184727f, - 0.110222207f, 0.993906970f, - 0.122410675f, 0.992479535f, - 0.134580709f, 0.990902635f, - 0.146730474f, 0.989176510f, - 0.158858143f, 0.987301418f, - 0.170961889f, 0.985277642f, - 0.183039888f, 0.983105487f, - 0.195090322f, 0.980785280f, - 0.207111376f, 0.978317371f, - 0.219101240f, 0.975702130f, - 0.231058108f, 0.972939952f, - 0.242980180f, 0.970031253f, - 0.254865660f, 0.966976471f, - 0.266712757f, 0.963776066f, - 0.278519689f, 0.960430519f, - 0.290284677f, 0.956940336f, - 0.302005949f, 0.953306040f, - 0.313681740f, 0.949528181f, - 0.325310292f, 0.945607325f, - 0.336889853f, 0.941544065f, - 0.348418680f, 0.937339012f, - 0.359895037f, 0.932992799f, - 0.371317194f, 0.928506080f, - 0.382683432f, 0.923879533f, - 0.393992040f, 0.919113852f, - 0.405241314f, 0.914209756f, - 0.416429560f, 0.909167983f, - 0.427555093f, 0.903989293f, - 0.438616239f, 0.898674466f, - 0.449611330f, 0.893224301f, - 0.460538711f, 0.887639620f, - 0.471396737f, 0.881921264f, - 0.482183772f, 0.876070094f, - 0.492898192f, 0.870086991f, - 0.503538384f, 0.863972856f, - 0.514102744f, 0.857728610f, - 0.524589683f, 0.851355193f, - 0.534997620f, 0.844853565f, - 0.545324988f, 0.838224706f, - 0.555570233f, 0.831469612f, - 0.565731811f, 0.824589303f, - 0.575808191f, 0.817584813f, - 0.585797857f, 0.810457198f, - 0.595699304f, 0.803207531f, - 0.605511041f, 0.795836905f, - 0.615231591f, 0.788346428f, - 0.624859488f, 0.780737229f, - 0.634393284f, 0.773010453f, - 0.643831543f, 0.765167266f, - 0.653172843f, 0.757208847f, - 0.662415778f, 0.749136395f, - 0.671558955f, 0.740951125f, - 0.680600998f, 0.732654272f, - 0.689540545f, 0.724247083f, - 0.698376249f, 0.715730825f, - 0.707106781f, 0.707106781f, - 0.715730825f, 0.698376249f, - 0.724247083f, 0.689540545f, - 0.732654272f, 0.680600998f, - 0.740951125f, 0.671558955f, - 0.749136395f, 0.662415778f, - 0.757208847f, 0.653172843f, - 0.765167266f, 0.643831543f, - 0.773010453f, 0.634393284f, - 0.780737229f, 0.624859488f, - 0.788346428f, 0.615231591f, - 0.795836905f, 0.605511041f, - 0.803207531f, 0.595699304f, - 0.810457198f, 0.585797857f, - 0.817584813f, 0.575808191f, - 0.824589303f, 0.565731811f, - 0.831469612f, 0.555570233f, - 0.838224706f, 0.545324988f, - 0.844853565f, 0.534997620f, - 0.851355193f, 0.524589683f, - 0.857728610f, 0.514102744f, - 0.863972856f, 0.503538384f, - 0.870086991f, 0.492898192f, - 0.876070094f, 0.482183772f, - 0.881921264f, 0.471396737f, - 0.887639620f, 0.460538711f, - 0.893224301f, 0.449611330f, - 0.898674466f, 0.438616239f, - 0.903989293f, 0.427555093f, - 0.909167983f, 0.416429560f, - 0.914209756f, 0.405241314f, - 0.919113852f, 0.393992040f, - 0.923879533f, 0.382683432f, - 0.928506080f, 0.371317194f, - 0.932992799f, 0.359895037f, - 0.937339012f, 0.348418680f, - 0.941544065f, 0.336889853f, - 0.945607325f, 0.325310292f, - 0.949528181f, 0.313681740f, - 0.953306040f, 0.302005949f, - 0.956940336f, 0.290284677f, - 0.960430519f, 0.278519689f, - 0.963776066f, 0.266712757f, - 0.966976471f, 0.254865660f, - 0.970031253f, 0.242980180f, - 0.972939952f, 0.231058108f, - 0.975702130f, 0.219101240f, - 0.978317371f, 0.207111376f, - 0.980785280f, 0.195090322f, - 0.983105487f, 0.183039888f, - 0.985277642f, 0.170961889f, - 0.987301418f, 0.158858143f, - 0.989176510f, 0.146730474f, - 0.990902635f, 0.134580709f, - 0.992479535f, 0.122410675f, - 0.993906970f, 0.110222207f, - 0.995184727f, 0.098017140f, - 0.996312612f, 0.085797312f, - 0.997290457f, 0.073564564f, - 0.998118113f, 0.061320736f, - 0.998795456f, 0.049067674f, - 0.999322385f, 0.036807223f, - 0.999698819f, 0.024541229f, - 0.999924702f, 0.012271538f, - 1.000000000f, 0.000000000f, - 0.999924702f, -0.012271538f, - 0.999698819f, -0.024541229f, - 0.999322385f, -0.036807223f, - 0.998795456f, -0.049067674f, - 0.998118113f, -0.061320736f, - 0.997290457f, -0.073564564f, - 0.996312612f, -0.085797312f, - 0.995184727f, -0.098017140f, - 0.993906970f, -0.110222207f, - 0.992479535f, -0.122410675f, - 0.990902635f, -0.134580709f, - 0.989176510f, -0.146730474f, - 0.987301418f, -0.158858143f, - 0.985277642f, -0.170961889f, - 0.983105487f, -0.183039888f, - 0.980785280f, -0.195090322f, - 0.978317371f, -0.207111376f, - 0.975702130f, -0.219101240f, - 0.972939952f, -0.231058108f, - 0.970031253f, -0.242980180f, - 0.966976471f, -0.254865660f, - 0.963776066f, -0.266712757f, - 0.960430519f, -0.278519689f, - 0.956940336f, -0.290284677f, - 0.953306040f, -0.302005949f, - 0.949528181f, -0.313681740f, - 0.945607325f, -0.325310292f, - 0.941544065f, -0.336889853f, - 0.937339012f, -0.348418680f, - 0.932992799f, -0.359895037f, - 0.928506080f, -0.371317194f, - 0.923879533f, -0.382683432f, - 0.919113852f, -0.393992040f, - 0.914209756f, -0.405241314f, - 0.909167983f, -0.416429560f, - 0.903989293f, -0.427555093f, - 0.898674466f, -0.438616239f, - 0.893224301f, -0.449611330f, - 0.887639620f, -0.460538711f, - 0.881921264f, -0.471396737f, - 0.876070094f, -0.482183772f, - 0.870086991f, -0.492898192f, - 0.863972856f, -0.503538384f, - 0.857728610f, -0.514102744f, - 0.851355193f, -0.524589683f, - 0.844853565f, -0.534997620f, - 0.838224706f, -0.545324988f, - 0.831469612f, -0.555570233f, - 0.824589303f, -0.565731811f, - 0.817584813f, -0.575808191f, - 0.810457198f, -0.585797857f, - 0.803207531f, -0.595699304f, - 0.795836905f, -0.605511041f, - 0.788346428f, -0.615231591f, - 0.780737229f, -0.624859488f, - 0.773010453f, -0.634393284f, - 0.765167266f, -0.643831543f, - 0.757208847f, -0.653172843f, - 0.749136395f, -0.662415778f, - 0.740951125f, -0.671558955f, - 0.732654272f, -0.680600998f, - 0.724247083f, -0.689540545f, - 0.715730825f, -0.698376249f, - 0.707106781f, -0.707106781f, - 0.698376249f, -0.715730825f, - 0.689540545f, -0.724247083f, - 0.680600998f, -0.732654272f, - 0.671558955f, -0.740951125f, - 0.662415778f, -0.749136395f, - 0.653172843f, -0.757208847f, - 0.643831543f, -0.765167266f, - 0.634393284f, -0.773010453f, - 0.624859488f, -0.780737229f, - 0.615231591f, -0.788346428f, - 0.605511041f, -0.795836905f, - 0.595699304f, -0.803207531f, - 0.585797857f, -0.810457198f, - 0.575808191f, -0.817584813f, - 0.565731811f, -0.824589303f, - 0.555570233f, -0.831469612f, - 0.545324988f, -0.838224706f, - 0.534997620f, -0.844853565f, - 0.524589683f, -0.851355193f, - 0.514102744f, -0.857728610f, - 0.503538384f, -0.863972856f, - 0.492898192f, -0.870086991f, - 0.482183772f, -0.876070094f, - 0.471396737f, -0.881921264f, - 0.460538711f, -0.887639620f, - 0.449611330f, -0.893224301f, - 0.438616239f, -0.898674466f, - 0.427555093f, -0.903989293f, - 0.416429560f, -0.909167983f, - 0.405241314f, -0.914209756f, - 0.393992040f, -0.919113852f, - 0.382683432f, -0.923879533f, - 0.371317194f, -0.928506080f, - 0.359895037f, -0.932992799f, - 0.348418680f, -0.937339012f, - 0.336889853f, -0.941544065f, - 0.325310292f, -0.945607325f, - 0.313681740f, -0.949528181f, - 0.302005949f, -0.953306040f, - 0.290284677f, -0.956940336f, - 0.278519689f, -0.960430519f, - 0.266712757f, -0.963776066f, - 0.254865660f, -0.966976471f, - 0.242980180f, -0.970031253f, - 0.231058108f, -0.972939952f, - 0.219101240f, -0.975702130f, - 0.207111376f, -0.978317371f, - 0.195090322f, -0.980785280f, - 0.183039888f, -0.983105487f, - 0.170961889f, -0.985277642f, - 0.158858143f, -0.987301418f, - 0.146730474f, -0.989176510f, - 0.134580709f, -0.990902635f, - 0.122410675f, -0.992479535f, - 0.110222207f, -0.993906970f, - 0.098017140f, -0.995184727f, - 0.085797312f, -0.996312612f, - 0.073564564f, -0.997290457f, - 0.061320736f, -0.998118113f, - 0.049067674f, -0.998795456f, - 0.036807223f, -0.999322385f, - 0.024541229f, -0.999698819f, - 0.012271538f, -0.999924702f -}; - -const float32_t twiddleCoef_rfft_1024[1024] = { - 0.000000000f, 1.000000000f, - 0.006135885f, 0.999981175f, - 0.012271538f, 0.999924702f, - 0.018406730f, 0.999830582f, - 0.024541229f, 0.999698819f, - 0.030674803f, 0.999529418f, - 0.036807223f, 0.999322385f, - 0.042938257f, 0.999077728f, - 0.049067674f, 0.998795456f, - 0.055195244f, 0.998475581f, - 0.061320736f, 0.998118113f, - 0.067443920f, 0.997723067f, - 0.073564564f, 0.997290457f, - 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0.088853553f, -0.996044701f, - 0.087325535f, -0.996179829f, - 0.085797312f, -0.996312612f, - 0.084268888f, -0.996443051f, - 0.082740265f, -0.996571146f, - 0.081211447f, -0.996696895f, - 0.079682438f, -0.996820299f, - 0.078153242f, -0.996941358f, - 0.076623861f, -0.997060070f, - 0.075094301f, -0.997176437f, - 0.073564564f, -0.997290457f, - 0.072034653f, -0.997402130f, - 0.070504573f, -0.997511456f, - 0.068974328f, -0.997618435f, - 0.067443920f, -0.997723067f, - 0.065913353f, -0.997825350f, - 0.064382631f, -0.997925286f, - 0.062851758f, -0.998022874f, - 0.061320736f, -0.998118113f, - 0.059789571f, -0.998211003f, - 0.058258265f, -0.998301545f, - 0.056726821f, -0.998389737f, - 0.055195244f, -0.998475581f, - 0.053663538f, -0.998559074f, - 0.052131705f, -0.998640218f, - 0.050599749f, -0.998719012f, - 0.049067674f, -0.998795456f, - 0.047535484f, -0.998869550f, - 0.046003182f, -0.998941293f, - 0.044470772f, -0.999010686f, - 0.042938257f, -0.999077728f, - 0.041405641f, -0.999142419f, - 0.039872928f, -0.999204759f, - 0.038340120f, -0.999264747f, - 0.036807223f, -0.999322385f, - 0.035274239f, -0.999377670f, - 0.033741172f, -0.999430605f, - 0.032208025f, -0.999481187f, - 0.030674803f, -0.999529418f, - 0.029141509f, -0.999575296f, - 0.027608146f, -0.999618822f, - 0.026074718f, -0.999659997f, - 0.024541229f, -0.999698819f, - 0.023007681f, -0.999735288f, - 0.021474080f, -0.999769405f, - 0.019940429f, -0.999801170f, - 0.018406730f, -0.999830582f, - 0.016872988f, -0.999857641f, - 0.015339206f, -0.999882347f, - 0.013805389f, -0.999904701f, - 0.012271538f, -0.999924702f, - 0.010737659f, -0.999942350f, - 0.009203755f, -0.999957645f, - 0.007669829f, -0.999970586f, - 0.006135885f, -0.999981175f, - 0.004601926f, -0.999989411f, - 0.003067957f, -0.999995294f, - 0.001533980f, -0.999998823f -}; - - -/** - * \par - * Example code for the generation of the floating-point sine table: - * 
- * tableSize = 512;    
- * for(n = 0; n < (tableSize + 1); n++)    
- * {    
- *	sinTable[n]=sin(2*pi*n/tableSize);    
- * }
- * \par - * where pi value is 3.14159265358979 - */ - -const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1] = { - 0.00000000f, 0.01227154f, 0.02454123f, 0.03680722f, 0.04906767f, 0.06132074f, - 0.07356456f, 0.08579731f, 0.09801714f, 0.11022221f, 0.12241068f, 0.13458071f, - 0.14673047f, 0.15885814f, 0.17096189f, 0.18303989f, 0.19509032f, 0.20711138f, - 0.21910124f, 0.23105811f, 0.24298018f, 0.25486566f, 0.26671276f, 0.27851969f, - 0.29028468f, 0.30200595f, 0.31368174f, 0.32531029f, 0.33688985f, 0.34841868f, - 0.35989504f, 0.37131719f, 0.38268343f, 0.39399204f, 0.40524131f, 0.41642956f, - 0.42755509f, 0.43861624f, 0.44961133f, 0.46053871f, 0.47139674f, 0.48218377f, - 0.49289819f, 0.50353838f, 0.51410274f, 0.52458968f, 0.53499762f, 0.54532499f, - 0.55557023f, 0.56573181f, 0.57580819f, 0.58579786f, 0.59569930f, 0.60551104f, - 0.61523159f, 0.62485949f, 0.63439328f, 0.64383154f, 0.65317284f, 0.66241578f, - 0.67155895f, 0.68060100f, 0.68954054f, 0.69837625f, 0.70710678f, 0.71573083f, - 0.72424708f, 0.73265427f, 0.74095113f, 0.74913639f, 0.75720885f, 0.76516727f, - 0.77301045f, 0.78073723f, 0.78834643f, 0.79583690f, 0.80320753f, 0.81045720f, - 0.81758481f, 0.82458930f, 0.83146961f, 0.83822471f, 0.84485357f, 0.85135519f, - 0.85772861f, 0.86397286f, 0.87008699f, 0.87607009f, 0.88192126f, 0.88763962f, - 0.89322430f, 0.89867447f, 0.90398929f, 0.90916798f, 0.91420976f, 0.91911385f, - 0.92387953f, 0.92850608f, 0.93299280f, 0.93733901f, 0.94154407f, 0.94560733f, - 0.94952818f, 0.95330604f, 0.95694034f, 0.96043052f, 0.96377607f, 0.96697647f, - 0.97003125f, 0.97293995f, 0.97570213f, 0.97831737f, 0.98078528f, 0.98310549f, - 0.98527764f, 0.98730142f, 0.98917651f, 0.99090264f, 0.99247953f, 0.99390697f, - 0.99518473f, 0.99631261f, 0.99729046f, 0.99811811f, 0.99879546f, 0.99932238f, - 0.99969882f, 0.99992470f, 1.00000000f, 0.99992470f, 0.99969882f, 0.99932238f, - 0.99879546f, 0.99811811f, 0.99729046f, 0.99631261f, 0.99518473f, 0.99390697f, - 0.99247953f, 0.99090264f, 0.98917651f, 0.98730142f, 0.98527764f, 0.98310549f, - 0.98078528f, 0.97831737f, 0.97570213f, 0.97293995f, 0.97003125f, 0.96697647f, - 0.96377607f, 0.96043052f, 0.95694034f, 0.95330604f, 0.94952818f, 0.94560733f, - 0.94154407f, 0.93733901f, 0.93299280f, 0.92850608f, 0.92387953f, 0.91911385f, - 0.91420976f, 0.90916798f, 0.90398929f, 0.89867447f, 0.89322430f, 0.88763962f, - 0.88192126f, 0.87607009f, 0.87008699f, 0.86397286f, 0.85772861f, 0.85135519f, - 0.84485357f, 0.83822471f, 0.83146961f, 0.82458930f, 0.81758481f, 0.81045720f, - 0.80320753f, 0.79583690f, 0.78834643f, 0.78073723f, 0.77301045f, 0.76516727f, - 0.75720885f, 0.74913639f, 0.74095113f, 0.73265427f, 0.72424708f, 0.71573083f, - 0.70710678f, 0.69837625f, 0.68954054f, 0.68060100f, 0.67155895f, 0.66241578f, - 0.65317284f, 0.64383154f, 0.63439328f, 0.62485949f, 0.61523159f, 0.60551104f, - 0.59569930f, 0.58579786f, 0.57580819f, 0.56573181f, 0.55557023f, 0.54532499f, - 0.53499762f, 0.52458968f, 0.51410274f, 0.50353838f, 0.49289819f, 0.48218377f, - 0.47139674f, 0.46053871f, 0.44961133f, 0.43861624f, 0.42755509f, 0.41642956f, - 0.40524131f, 0.39399204f, 0.38268343f, 0.37131719f, 0.35989504f, 0.34841868f, - 0.33688985f, 0.32531029f, 0.31368174f, 0.30200595f, 0.29028468f, 0.27851969f, - 0.26671276f, 0.25486566f, 0.24298018f, 0.23105811f, 0.21910124f, 0.20711138f, - 0.19509032f, 0.18303989f, 0.17096189f, 0.15885814f, 0.14673047f, 0.13458071f, - 0.12241068f, 0.11022221f, 0.09801714f, 0.08579731f, 0.07356456f, 0.06132074f, - 0.04906767f, 0.03680722f, 0.02454123f, 0.01227154f, 0.00000000f, -0.01227154f, - -0.02454123f, -0.03680722f, -0.04906767f, -0.06132074f, -0.07356456f, - -0.08579731f, -0.09801714f, -0.11022221f, -0.12241068f, -0.13458071f, - -0.14673047f, -0.15885814f, -0.17096189f, -0.18303989f, -0.19509032f, - -0.20711138f, -0.21910124f, -0.23105811f, -0.24298018f, -0.25486566f, - -0.26671276f, -0.27851969f, -0.29028468f, -0.30200595f, -0.31368174f, - -0.32531029f, -0.33688985f, -0.34841868f, -0.35989504f, -0.37131719f, - -0.38268343f, -0.39399204f, -0.40524131f, -0.41642956f, -0.42755509f, - -0.43861624f, -0.44961133f, -0.46053871f, -0.47139674f, -0.48218377f, - -0.49289819f, -0.50353838f, -0.51410274f, -0.52458968f, -0.53499762f, - -0.54532499f, -0.55557023f, -0.56573181f, -0.57580819f, -0.58579786f, - -0.59569930f, -0.60551104f, -0.61523159f, -0.62485949f, -0.63439328f, - -0.64383154f, -0.65317284f, -0.66241578f, -0.67155895f, -0.68060100f, - -0.68954054f, -0.69837625f, -0.70710678f, -0.71573083f, -0.72424708f, - -0.73265427f, -0.74095113f, -0.74913639f, -0.75720885f, -0.76516727f, - -0.77301045f, -0.78073723f, -0.78834643f, -0.79583690f, -0.80320753f, - -0.81045720f, -0.81758481f, -0.82458930f, -0.83146961f, -0.83822471f, - -0.84485357f, -0.85135519f, -0.85772861f, -0.86397286f, -0.87008699f, - -0.87607009f, -0.88192126f, -0.88763962f, -0.89322430f, -0.89867447f, - -0.90398929f, -0.90916798f, -0.91420976f, -0.91911385f, -0.92387953f, - -0.92850608f, -0.93299280f, -0.93733901f, -0.94154407f, -0.94560733f, - -0.94952818f, -0.95330604f, -0.95694034f, -0.96043052f, -0.96377607f, - -0.96697647f, -0.97003125f, -0.97293995f, -0.97570213f, -0.97831737f, - -0.98078528f, -0.98310549f, -0.98527764f, -0.98730142f, -0.98917651f, - -0.99090264f, -0.99247953f, -0.99390697f, -0.99518473f, -0.99631261f, - -0.99729046f, -0.99811811f, -0.99879546f, -0.99932238f, -0.99969882f, - -0.99992470f, -1.00000000f, -0.99992470f, -0.99969882f, -0.99932238f, - -0.99879546f, -0.99811811f, -0.99729046f, -0.99631261f, -0.99518473f, - -0.99390697f, -0.99247953f, -0.99090264f, -0.98917651f, -0.98730142f, - -0.98527764f, -0.98310549f, -0.98078528f, -0.97831737f, -0.97570213f, - -0.97293995f, -0.97003125f, -0.96697647f, -0.96377607f, -0.96043052f, - -0.95694034f, -0.95330604f, -0.94952818f, -0.94560733f, -0.94154407f, - -0.93733901f, -0.93299280f, -0.92850608f, -0.92387953f, -0.91911385f, - -0.91420976f, -0.90916798f, -0.90398929f, -0.89867447f, -0.89322430f, - -0.88763962f, -0.88192126f, -0.87607009f, -0.87008699f, -0.86397286f, - -0.85772861f, -0.85135519f, -0.84485357f, -0.83822471f, -0.83146961f, - -0.82458930f, -0.81758481f, -0.81045720f, -0.80320753f, -0.79583690f, - -0.78834643f, -0.78073723f, -0.77301045f, -0.76516727f, -0.75720885f, - -0.74913639f, -0.74095113f, -0.73265427f, -0.72424708f, -0.71573083f, - -0.70710678f, -0.69837625f, -0.68954054f, -0.68060100f, -0.67155895f, - -0.66241578f, -0.65317284f, -0.64383154f, -0.63439328f, -0.62485949f, - -0.61523159f, -0.60551104f, -0.59569930f, -0.58579786f, -0.57580819f, - -0.56573181f, -0.55557023f, -0.54532499f, -0.53499762f, -0.52458968f, - -0.51410274f, -0.50353838f, -0.49289819f, -0.48218377f, -0.47139674f, - -0.46053871f, -0.44961133f, -0.43861624f, -0.42755509f, -0.41642956f, - -0.40524131f, -0.39399204f, -0.38268343f, -0.37131719f, -0.35989504f, - -0.34841868f, -0.33688985f, -0.32531029f, -0.31368174f, -0.30200595f, - -0.29028468f, -0.27851969f, -0.26671276f, -0.25486566f, -0.24298018f, - -0.23105811f, -0.21910124f, -0.20711138f, -0.19509032f, -0.18303989f, - -0.17096189f, -0.15885814f, -0.14673047f, -0.13458071f, -0.12241068f, - -0.11022221f, -0.09801714f, -0.08579731f, -0.07356456f, -0.06132074f, - -0.04906767f, -0.03680722f, -0.02454123f, -0.01227154f, -0.00000000f -}; - -/** - * \par - * Table values are in Q31 (1.31 fixed-point format) and generation is done in - * three steps. First, generate sin values in floating point: - * 
- * tableSize = 512;      
- * for(n = 0; n < (tableSize + 1); n++)    
- * {    
- *	sinTable[n]= sin(2*pi*n/tableSize);    
- * }
- * where pi value is 3.14159265358979 - * \par - * Second, convert floating-point to Q31 (Fixed point): - * (sinTable[i] * pow(2, 31)) - * \par - * Finally, round to the nearest integer value: - * sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5); - */ -const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1] = { - 0x00000000, 0x01921D20, 0x03242ABF, 0x04B6195D, 0x0647D97C, 0x07D95B9E, - 0x096A9049, 0x0AFB6805, 0x0C8BD35E, 0x0E1BC2E4, 0x0FAB272B, 0x1139F0CF, - 0x12C8106F, 0x145576B1, 0x15E21445, 0x176DD9DE, 0x18F8B83C, 0x1A82A026, - 0x1C0B826A, 0x1D934FE5, 0x1F19F97B, 0x209F701C, 0x2223A4C5, 0x23A6887F, - 0x25280C5E, 0x26A82186, 0x2826B928, 0x29A3C485, 0x2B1F34EB, 0x2C98FBBA, - 0x2E110A62, 0x2F875262, 0x30FBC54D, 0x326E54C7, 0x33DEF287, 0x354D9057, - 0x36BA2014, 0x382493B0, 0x398CDD32, 0x3AF2EEB7, 0x3C56BA70, 0x3DB832A6, - 0x3F1749B8, 0x4073F21D, 0x41CE1E65, 0x4325C135, 0x447ACD50, 0x45CD358F, - 0x471CECE7, 0x4869E665, 0x49B41533, 0x4AFB6C98, 0x4C3FDFF4, 0x4D8162C4, - 0x4EBFE8A5, 0x4FFB654D, 0x5133CC94, 0x5269126E, 0x539B2AF0, 0x54CA0A4B, - 0x55F5A4D2, 0x571DEEFA, 0x5842DD54, 0x59646498, 0x5A82799A, 0x5B9D1154, - 0x5CB420E0, 0x5DC79D7C, 0x5ED77C8A, 0x5FE3B38D, 0x60EC3830, 0x61F1003F, - 0x62F201AC, 0x63EF3290, 0x64E88926, 0x65DDFBD3, 0x66CF8120, 0x67BD0FBD, - 0x68A69E81, 0x698C246C, 0x6A6D98A4, 0x6B4AF279, 0x6C242960, 0x6CF934FC, - 0x6DCA0D14, 0x6E96A99D, 0x6F5F02B2, 0x7023109A, 0x70E2CBC6, 0x719E2CD2, - 0x72552C85, 0x7307C3D0, 0x73B5EBD1, 0x745F9DD1, 0x7504D345, 0x75A585CF, - 0x7641AF3D, 0x76D94989, 0x776C4EDB, 0x77FAB989, 0x78848414, 0x7909A92D, - 0x798A23B1, 0x7A05EEAD, 0x7A7D055B, 0x7AEF6323, 0x7B5D039E, 0x7BC5E290, - 0x7C29FBEE, 0x7C894BDE, 0x7CE3CEB2, 0x7D3980EC, 0x7D8A5F40, 0x7DD6668F, - 0x7E1D93EA, 0x7E5FE493, 0x7E9D55FC, 0x7ED5E5C6, 0x7F0991C4, 0x7F3857F6, - 0x7F62368F, 0x7F872BF3, 0x7FA736B4, 0x7FC25596, 0x7FD8878E, 0x7FE9CBC0, - 0x7FF62182, 0x7FFD885A, 0x7FFFFFFF, 0x7FFD885A, 0x7FF62182, 0x7FE9CBC0, - 0x7FD8878E, 0x7FC25596, 0x7FA736B4, 0x7F872BF3, 0x7F62368F, 0x7F3857F6, - 0x7F0991C4, 0x7ED5E5C6, 0x7E9D55FC, 0x7E5FE493, 0x7E1D93EA, 0x7DD6668F, - 0x7D8A5F40, 0x7D3980EC, 0x7CE3CEB2, 0x7C894BDE, 0x7C29FBEE, 0x7BC5E290, - 0x7B5D039E, 0x7AEF6323, 0x7A7D055B, 0x7A05EEAD, 0x798A23B1, 0x7909A92D, - 0x78848414, 0x77FAB989, 0x776C4EDB, 0x76D94989, 0x7641AF3D, 0x75A585CF, - 0x7504D345, 0x745F9DD1, 0x73B5EBD1, 0x7307C3D0, 0x72552C85, 0x719E2CD2, - 0x70E2CBC6, 0x7023109A, 0x6F5F02B2, 0x6E96A99D, 0x6DCA0D14, 0x6CF934FC, - 0x6C242960, 0x6B4AF279, 0x6A6D98A4, 0x698C246C, 0x68A69E81, 0x67BD0FBD, - 0x66CF8120, 0x65DDFBD3, 0x64E88926, 0x63EF3290, 0x62F201AC, 0x61F1003F, - 0x60EC3830, 0x5FE3B38D, 0x5ED77C8A, 0x5DC79D7C, 0x5CB420E0, 0x5B9D1154, - 0x5A82799A, 0x59646498, 0x5842DD54, 0x571DEEFA, 0x55F5A4D2, 0x54CA0A4B, - 0x539B2AF0, 0x5269126E, 0x5133CC94, 0x4FFB654D, 0x4EBFE8A5, 0x4D8162C4, - 0x4C3FDFF4, 0x4AFB6C98, 0x49B41533, 0x4869E665, 0x471CECE7, 0x45CD358F, - 0x447ACD50, 0x4325C135, 0x41CE1E65, 0x4073F21D, 0x3F1749B8, 0x3DB832A6, - 0x3C56BA70, 0x3AF2EEB7, 0x398CDD32, 0x382493B0, 0x36BA2014, 0x354D9057, - 0x33DEF287, 0x326E54C7, 0x30FBC54D, 0x2F875262, 0x2E110A62, 0x2C98FBBA, - 0x2B1F34EB, 0x29A3C485, 0x2826B928, 0x26A82186, 0x25280C5E, 0x23A6887F, - 0x2223A4C5, 0x209F701C, 0x1F19F97B, 0x1D934FE5, 0x1C0B826A, 0x1A82A026, - 0x18F8B83C, 0x176DD9DE, 0x15E21445, 0x145576B1, 0x12C8106F, 0x1139F0CF, - 0x0FAB272B, 0x0E1BC2E4, 0x0C8BD35E, 0x0AFB6805, 0x096A9049, 0x07D95B9E, - 0x0647D97C, 0x04B6195D, 0x03242ABF, 0x01921D20, 0x00000000, 0xFE6DE2E0, - 0xFCDBD541, 0xFB49E6A3, 0xF9B82684, 0xF826A462, 0xF6956FB7, 0xF50497FB, - 0xF3742CA2, 0xF1E43D1C, 0xF054D8D5, 0xEEC60F31, 0xED37EF91, 0xEBAA894F, - 0xEA1DEBBB, 0xE8922622, 0xE70747C4, 0xE57D5FDA, 0xE3F47D96, 0xE26CB01B, - 0xE0E60685, 0xDF608FE4, 0xDDDC5B3B, 0xDC597781, 0xDAD7F3A2, 0xD957DE7A, - 0xD7D946D8, 0xD65C3B7B, 0xD4E0CB15, 0xD3670446, 0xD1EEF59E, 0xD078AD9E, - 0xCF043AB3, 0xCD91AB39, 0xCC210D79, 0xCAB26FA9, 0xC945DFEC, 0xC7DB6C50, - 0xC67322CE, 0xC50D1149, 0xC3A94590, 0xC247CD5A, 0xC0E8B648, 0xBF8C0DE3, - 0xBE31E19B, 0xBCDA3ECB, 0xBB8532B0, 0xBA32CA71, 0xB8E31319, 0xB796199B, - 0xB64BEACD, 0xB5049368, 0xB3C0200C, 0xB27E9D3C, 0xB140175B, 0xB0049AB3, - 0xAECC336C, 0xAD96ED92, 0xAC64D510, 0xAB35F5B5, 0xAA0A5B2E, 0xA8E21106, - 0xA7BD22AC, 0xA69B9B68, 0xA57D8666, 0xA462EEAC, 0xA34BDF20, 0xA2386284, - 0xA1288376, 0xA01C4C73, 0x9F13C7D0, 0x9E0EFFC1, 0x9D0DFE54, 0x9C10CD70, - 0x9B1776DA, 0x9A22042D, 0x99307EE0, 0x9842F043, 0x9759617F, 0x9673DB94, - 0x9592675C, 0x94B50D87, 0x93DBD6A0, 0x9306CB04, 0x9235F2EC, 0x91695663, - 0x90A0FD4E, 0x8FDCEF66, 0x8F1D343A, 0x8E61D32E, 0x8DAAD37B, 0x8CF83C30, - 0x8C4A142F, 0x8BA0622F, 0x8AFB2CBB, 0x8A5A7A31, 0x89BE50C3, 0x8926B677, - 0x8893B125, 0x88054677, 0x877B7BEC, 0x86F656D3, 0x8675DC4F, 0x85FA1153, - 0x8582FAA5, 0x85109CDD, 0x84A2FC62, 0x843A1D70, 0x83D60412, 0x8376B422, - 0x831C314E, 0x82C67F14, 0x8275A0C0, 0x82299971, 0x81E26C16, 0x81A01B6D, - 0x8162AA04, 0x812A1A3A, 0x80F66E3C, 0x80C7A80A, 0x809DC971, 0x8078D40D, - 0x8058C94C, 0x803DAA6A, 0x80277872, 0x80163440, 0x8009DE7E, 0x800277A6, - 0x80000000, 0x800277A6, 0x8009DE7E, 0x80163440, 0x80277872, 0x803DAA6A, - 0x8058C94C, 0x8078D40D, 0x809DC971, 0x80C7A80A, 0x80F66E3C, 0x812A1A3A, - 0x8162AA04, 0x81A01B6D, 0x81E26C16, 0x82299971, 0x8275A0C0, 0x82C67F14, - 0x831C314E, 0x8376B422, 0x83D60412, 0x843A1D70, 0x84A2FC62, 0x85109CDD, - 0x8582FAA5, 0x85FA1153, 0x8675DC4F, 0x86F656D3, 0x877B7BEC, 0x88054677, - 0x8893B125, 0x8926B677, 0x89BE50C3, 0x8A5A7A31, 0x8AFB2CBB, 0x8BA0622F, - 0x8C4A142F, 0x8CF83C30, 0x8DAAD37B, 0x8E61D32E, 0x8F1D343A, 0x8FDCEF66, - 0x90A0FD4E, 0x91695663, 0x9235F2EC, 0x9306CB04, 0x93DBD6A0, 0x94B50D87, - 0x9592675C, 0x9673DB94, 0x9759617F, 0x9842F043, 0x99307EE0, 0x9A22042D, - 0x9B1776DA, 0x9C10CD70, 0x9D0DFE54, 0x9E0EFFC1, 0x9F13C7D0, 0xA01C4C73, - 0xA1288376, 0xA2386284, 0xA34BDF20, 0xA462EEAC, 0xA57D8666, 0xA69B9B68, - 0xA7BD22AC, 0xA8E21106, 0xAA0A5B2E, 0xAB35F5B5, 0xAC64D510, 0xAD96ED92, - 0xAECC336C, 0xB0049AB3, 0xB140175B, 0xB27E9D3C, 0xB3C0200C, 0xB5049368, - 0xB64BEACD, 0xB796199B, 0xB8E31319, 0xBA32CA71, 0xBB8532B0, 0xBCDA3ECB, - 0xBE31E19B, 0xBF8C0DE3, 0xC0E8B648, 0xC247CD5A, 0xC3A94590, 0xC50D1149, - 0xC67322CE, 0xC7DB6C50, 0xC945DFEC, 0xCAB26FA9, 0xCC210D79, 0xCD91AB39, - 0xCF043AB3, 0xD078AD9E, 0xD1EEF59E, 0xD3670446, 0xD4E0CB15, 0xD65C3B7B, - 0xD7D946D8, 0xD957DE7A, 0xDAD7F3A2, 0xDC597781, 0xDDDC5B3B, 0xDF608FE4, - 0xE0E60685, 0xE26CB01B, 0xE3F47D96, 0xE57D5FDA, 0xE70747C4, 0xE8922622, - 0xEA1DEBBB, 0xEBAA894F, 0xED37EF91, 0xEEC60F31, 0xF054D8D5, 0xF1E43D1C, - 0xF3742CA2, 0xF50497FB, 0xF6956FB7, 0xF826A462, 0xF9B82684, 0xFB49E6A3, - 0xFCDBD541, 0xFE6DE2E0, 0x00000000 -}; - -/** - * \par - * Table values are in Q15 (1.15 fixed-point format) and generation is done in - * three steps. First, generate sin values in floating point: - * 
- * tableSize = 512;      
- * for(n = 0; n < (tableSize + 1); n++)    
- * {    
- *	sinTable[n]= sin(2*pi*n/tableSize);    
- * }
- * where pi value is 3.14159265358979 - * \par - * Second, convert floating-point to Q15 (Fixed point): - * (sinTable[i] * pow(2, 15)) - * \par - * Finally, round to the nearest integer value: - * sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5); - */ -const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1] = { - 0x0000, 0x0192, 0x0324, 0x04B6, 0x0648, 0x07D9, 0x096B, 0x0AFB, 0x0C8C, 0x0E1C, 0x0FAB, 0x113A, 0x12C8, - 0x1455, 0x15E2, 0x176E, 0x18F9, 0x1A83, 0x1C0C, 0x1D93, 0x1F1A, 0x209F, 0x2224, 0x23A7, 0x2528, 0x26A8, - 0x2827, 0x29A4, 0x2B1F, 0x2C99, 0x2E11, 0x2F87, 0x30FC, 0x326E, 0x33DF, 0x354E, 0x36BA, 0x3825, 0x398D, - 0x3AF3, 0x3C57, 0x3DB8, 0x3F17, 0x4074, 0x41CE, 0x4326, 0x447B, 0x45CD, 0x471D, 0x486A, 0x49B4, 0x4AFB, - 0x4C40, 0x4D81, 0x4EC0, 0x4FFB, 0x5134, 0x5269, 0x539B, 0x54CA, 0x55F6, 0x571E, 0x5843, 0x5964, 0x5A82, - 0x5B9D, 0x5CB4, 0x5DC8, 0x5ED7, 0x5FE4, 0x60EC, 0x61F1, 0x62F2, 0x63EF, 0x64E9, 0x65DE, 0x66D0, 0x67BD, - 0x68A7, 0x698C, 0x6A6E, 0x6B4B, 0x6C24, 0x6CF9, 0x6DCA, 0x6E97, 0x6F5F, 0x7023, 0x70E3, 0x719E, 0x7255, - 0x7308, 0x73B6, 0x7460, 0x7505, 0x75A6, 0x7642, 0x76D9, 0x776C, 0x77FB, 0x7885, 0x790A, 0x798A, 0x7A06, - 0x7A7D, 0x7AEF, 0x7B5D, 0x7BC6, 0x7C2A, 0x7C89, 0x7CE4, 0x7D3A, 0x7D8A, 0x7DD6, 0x7E1E, 0x7E60, 0x7E9D, - 0x7ED6, 0x7F0A, 0x7F38, 0x7F62, 0x7F87, 0x7FA7, 0x7FC2, 0x7FD9, 0x7FEA, 0x7FF6, 0x7FFE, 0x7FFF, 0x7FFE, - 0x7FF6, 0x7FEA, 0x7FD9, 0x7FC2, 0x7FA7, 0x7F87, 0x7F62, 0x7F38, 0x7F0A, 0x7ED6, 0x7E9D, 0x7E60, 0x7E1E, - 0x7DD6, 0x7D8A, 0x7D3A, 0x7CE4, 0x7C89, 0x7C2A, 0x7BC6, 0x7B5D, 0x7AEF, 0x7A7D, 0x7A06, 0x798A, 0x790A, - 0x7885, 0x77FB, 0x776C, 0x76D9, 0x7642, 0x75A6, 0x7505, 0x7460, 0x73B6, 0x7308, 0x7255, 0x719E, 0x70E3, - 0x7023, 0x6F5F, 0x6E97, 0x6DCA, 0x6CF9, 0x6C24, 0x6B4B, 0x6A6E, 0x698C, 0x68A7, 0x67BD, 0x66D0, 0x65DE, - 0x64E9, 0x63EF, 0x62F2, 0x61F1, 0x60EC, 0x5FE4, 0x5ED7, 0x5DC8, 0x5CB4, 0x5B9D, 0x5A82, 0x5964, 0x5843, - 0x571E, 0x55F6, 0x54CA, 0x539B, 0x5269, 0x5134, 0x4FFB, 0x4EC0, 0x4D81, 0x4C40, 0x4AFB, 0x49B4, 0x486A, - 0x471D, 0x45CD, 0x447B, 0x4326, 0x41CE, 0x4074, 0x3F17, 0x3DB8, 0x3C57, 0x3AF3, 0x398D, 0x3825, 0x36BA, - 0x354E, 0x33DF, 0x326E, 0x30FC, 0x2F87, 0x2E11, 0x2C99, 0x2B1F, 0x29A4, 0x2827, 0x26A8, 0x2528, 0x23A7, - 0x2224, 0x209F, 0x1F1A, 0x1D93, 0x1C0C, 0x1A83, 0x18F9, 0x176E, 0x15E2, 0x1455, 0x12C8, 0x113A, 0x0FAB, - 0x0E1C, 0x0C8C, 0x0AFB, 0x096B, 0x07D9, 0x0648, 0x04B6, 0x0324, 0x0192, 0x0000, 0xFE6E, 0xFCDC, 0xFB4A, - 0xF9B8, 0xF827, 0xF695, 0xF505, 0xF374, 0xF1E4, 0xF055, 0xEEC6, 0xED38, 0xEBAB, 0xEA1E, 0xE892, 0xE707, - 0xE57D, 0xE3F4, 0xE26D, 0xE0E6, 0xDF61, 0xDDDC, 0xDC59, 0xDAD8, 0xD958, 0xD7D9, 0xD65C, 0xD4E1, 0xD367, - 0xD1EF, 0xD079, 0xCF04, 0xCD92, 0xCC21, 0xCAB2, 0xC946, 0xC7DB, 0xC673, 0xC50D, 0xC3A9, 0xC248, 0xC0E9, - 0xBF8C, 0xBE32, 0xBCDA, 0xBB85, 0xBA33, 0xB8E3, 0xB796, 0xB64C, 0xB505, 0xB3C0, 0xB27F, 0xB140, 0xB005, - 0xAECC, 0xAD97, 0xAC65, 0xAB36, 0xAA0A, 0xA8E2, 0xA7BD, 0xA69C, 0xA57E, 0xA463, 0xA34C, 0xA238, 0xA129, - 0xA01C, 0x9F14, 0x9E0F, 0x9D0E, 0x9C11, 0x9B17, 0x9A22, 0x9930, 0x9843, 0x9759, 0x9674, 0x9592, 0x94B5, - 0x93DC, 0x9307, 0x9236, 0x9169, 0x90A1, 0x8FDD, 0x8F1D, 0x8E62, 0x8DAB, 0x8CF8, 0x8C4A, 0x8BA0, 0x8AFB, - 0x8A5A, 0x89BE, 0x8927, 0x8894, 0x8805, 0x877B, 0x86F6, 0x8676, 0x85FA, 0x8583, 0x8511, 0x84A3, 0x843A, - 0x83D6, 0x8377, 0x831C, 0x82C6, 0x8276, 0x822A, 0x81E2, 0x81A0, 0x8163, 0x812A, 0x80F6, 0x80C8, 0x809E, - 0x8079, 0x8059, 0x803E, 0x8027, 0x8016, 0x800A, 0x8002, 0x8000, 0x8002, 0x800A, 0x8016, 0x8027, 0x803E, - 0x8059, 0x8079, 0x809E, 0x80C8, 0x80F6, 0x812A, 0x8163, 0x81A0, 0x81E2, 0x822A, 0x8276, 0x82C6, 0x831C, - 0x8377, 0x83D6, 0x843A, 0x84A3, 0x8511, 0x8583, 0x85FA, 0x8676, 0x86F6, 0x877B, 0x8805, 0x8894, 0x8927, - 0x89BE, 0x8A5A, 0x8AFB, 0x8BA0, 0x8C4A, 0x8CF8, 0x8DAB, 0x8E62, 0x8F1D, 0x8FDD, 0x90A1, 0x9169, 0x9236, - 0x9307, 0x93DC, 0x94B5, 0x9592, 0x9674, 0x9759, 0x9843, 0x9930, 0x9A22, 0x9B17, 0x9C11, 0x9D0E, 0x9E0F, - 0x9F14, 0xA01C, 0xA129, 0xA238, 0xA34C, 0xA463, 0xA57E, 0xA69C, 0xA7BD, 0xA8E2, 0xAA0A, 0xAB36, 0xAC65, - 0xAD97, 0xAECC, 0xB005, 0xB140, 0xB27F, 0xB3C0, 0xB505, 0xB64C, 0xB796, 0xB8E3, 0xBA33, 0xBB85, 0xBCDA, - 0xBE32, 0xBF8C, 0xC0E9, 0xC248, 0xC3A9, 0xC50D, 0xC673, 0xC7DB, 0xC946, 0xCAB2, 0xCC21, 0xCD92, 0xCF04, - 0xD079, 0xD1EF, 0xD367, 0xD4E1, 0xD65C, 0xD7D9, 0xD958, 0xDAD8, 0xDC59, 0xDDDC, 0xDF61, 0xE0E6, 0xE26D, - 0xE3F4, 0xE57D, 0xE707, 0xE892, 0xEA1E, 0xEBAB, 0xED38, 0xEEC6, 0xF055, 0xF1E4, 0xF374, 0xF505, 0xF695, - 0xF827, 0xF9B8, 0xFB4A, 0xFCDC, 0xFE6E, 0x0000 -}; diff --git a/Drivers/CMSIS/DSP_Lib/Source/CommonTables/arm_const_structs.c b/Drivers/CMSIS/DSP_Lib/Source/CommonTables/arm_const_structs.c deleted file mode 100755 index f05c1c2f..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/CommonTables/arm_const_structs.c +++ /dev/null @@ -1,156 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_const_structs.c -* -* Description: This file has constant structs that are initialized for -* user convenience. For example, some can be given as -* arguments to the arm_cfft_f32() function. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#include "arm_const_structs.h" - -//Floating-point structs - -const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = { - 16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE__16_TABLE_LENGTH -}; - -const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = { - 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE__32_TABLE_LENGTH -}; - -const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = { - 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE__64_TABLE_LENGTH -}; - -const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = { - 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH -}; - -const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = { - 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH -}; - -const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = { - 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH -}; - -const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = { - 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE1024_TABLE_LENGTH -}; - -const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = { - 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE2048_TABLE_LENGTH -}; - -const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = { - 4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE4096_TABLE_LENGTH -}; - -//Fixed-point structs - -const arm_cfft_instance_q31 arm_cfft_sR_q31_len16 = { - 16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH -}; - -const arm_cfft_instance_q31 arm_cfft_sR_q31_len32 = { - 32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH -}; - -const arm_cfft_instance_q31 arm_cfft_sR_q31_len64 = { - 64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH -}; - -const arm_cfft_instance_q31 arm_cfft_sR_q31_len128 = { - 128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH -}; - -const arm_cfft_instance_q31 arm_cfft_sR_q31_len256 = { - 256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH -}; - -const arm_cfft_instance_q31 arm_cfft_sR_q31_len512 = { - 512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH -}; - -const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024 = { - 1024, twiddleCoef_1024_q31, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH -}; - -const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048 = { - 2048, twiddleCoef_2048_q31, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH -}; - -const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096 = { - 4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH -}; - - -const arm_cfft_instance_q15 arm_cfft_sR_q15_len16 = { - 16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH -}; - -const arm_cfft_instance_q15 arm_cfft_sR_q15_len32 = { - 32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH -}; - -const arm_cfft_instance_q15 arm_cfft_sR_q15_len64 = { - 64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH -}; - -const arm_cfft_instance_q15 arm_cfft_sR_q15_len128 = { - 128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH -}; - -const arm_cfft_instance_q15 arm_cfft_sR_q15_len256 = { - 256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH -}; - -const arm_cfft_instance_q15 arm_cfft_sR_q15_len512 = { - 512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH -}; - -const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024 = { - 1024, twiddleCoef_1024_q15, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH -}; - -const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048 = { - 2048, twiddleCoef_2048_q15, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH -}; - -const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096 = { - 4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH -}; diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c deleted file mode 100755 index c54ae41d..00000000 --- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c +++ /dev/null @@ -1,182 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_cmplx_conj_f32.c -* -* Description: Floating-point complex conjugate. -* -* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* ---------------------------------------------------------------------------- */ -#include "arm_math.h" - -/** - * @ingroup groupCmplxMath - */ - -/** - * @defgroup cmplx_conj Complex Conjugate - * - * Conjugates the elements of a complex data vector. - * - * The pSrc points to the source data and - * pDst points to the where the result should be written. - * numSamples specifies the number of complex samples - * and the data in each array is stored in an interleaved fashion - * (real, imag, real, imag, ...). - * Each array has a total of 2*numSamples values. - * The underlying algorithm is used: - * - * 
        
- * for(n=0; n        
- *        
- * There are separate functions for floating-point, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup cmplx_conj        
- * @{        
- */
-
-/**        
- * @brief  Floating-point complex conjugate.        
- * @param  *pSrc points to the input vector        
- * @param  *pDst points to the output vector        
- * @param  numSamples number of complex samples in each vector        
- * @return none.        
- */
-
-void arm_cmplx_conj_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inR1, inR2, inR3, inR4;
-  float32_t inI1, inI2, inI3, inI4;
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    /* read real input samples */
-    inR1 = pSrc[0];
-    /* store real samples to destination */
-    pDst[0] = inR1;
-    inR2 = pSrc[2];
-    pDst[2] = inR2;
-    inR3 = pSrc[4];
-    pDst[4] = inR3;
-    inR4 = pSrc[6];
-    pDst[6] = inR4;
-
-    /* read imaginary input samples */
-    inI1 = pSrc[1];
-    inI2 = pSrc[3];
-
-    /* conjugate input */
-    inI1 = -inI1;
-
-    /* read imaginary input samples */
-    inI3 = pSrc[5];
-
-    /* conjugate input */
-    inI2 = -inI2;
-
-    /* read imaginary input samples */
-    inI4 = pSrc[7];
-
-    /* conjugate input */
-    inI3 = -inI3;
-
-    /* store imaginary samples to destination */
-    pDst[1] = inI1;
-    pDst[3] = inI2;
-
-    /* conjugate input */
-    inI4 = -inI4;
-
-    /* store imaginary samples to destination */
-    pDst[5] = inI3;
-
-    /* increment source pointer by 8 to process next sampels */
-    pSrc += 8u;
-
-    /* store imaginary sample to destination */
-    pDst[7] = inI4;
-
-    /* increment destination pointer by 8 to store next samples */
-    pDst += 8u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* realOut + j (imagOut) = realIn + j (-1) imagIn */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    *pDst++ = *pSrc++;
-    *pDst++ = -*pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of cmplx_conj group        
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
deleted file mode 100755
index c1ce26cb..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. October 2015
-* $Revision: 	V.1.4.5 a
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_conj_q15.c    
-*    
-* Description:	Q15 complex conjugate.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_conj    
- * @{    
- */
-
-/**    
- * @brief  Q15 complex conjugate.    
- * @param  *pSrc points to the input vector    
- * @param  *pDst points to the output vector    
- * @param  numSamples number of complex samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.    
- */
-
-void arm_cmplx_conj_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples)
-{
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in1, in2, in3, in4;
-  q31_t zero = 0;
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    in1 = *__SIMD32(pSrc)++;
-    in2 = *__SIMD32(pSrc)++;
-    in3 = *__SIMD32(pSrc)++;
-    in4 = *__SIMD32(pSrc)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    in1 = __QASX(zero, in1);
-    in2 = __QASX(zero, in2);
-    in3 = __QASX(zero, in3);
-    in4 = __QASX(zero, in4);
-
-#else
-
-    in1 = __QSAX(zero, in1);
-    in2 = __QSAX(zero, in2);
-    in3 = __QSAX(zero, in3);
-    in4 = __QSAX(zero, in4);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    in1 = ((uint32_t) in1 >> 16) | ((uint32_t) in1 << 16);
-    in2 = ((uint32_t) in2 >> 16) | ((uint32_t) in2 << 16);
-    in3 = ((uint32_t) in3 >> 16) | ((uint32_t) in3 << 16);
-    in4 = ((uint32_t) in4 >> 16) | ((uint32_t) in4 << 16);
-
-    *__SIMD32(pDst)++ = in1;
-    *__SIMD32(pDst)++ = in2;
-    *__SIMD32(pDst)++ = in3;
-    *__SIMD32(pDst)++ = in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    *pDst++ = *pSrc++;
-    *pDst++ = __SSAT(-*pSrc++, 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  q15_t in;
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* realOut + j (imagOut) = realIn+ j (-1) imagIn */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    *pDst++ = *pSrc++;
-    in = *pSrc++;
-    *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of cmplx_conj group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
deleted file mode 100755
index f882f4cd..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
+++ /dev/null
@@ -1,180 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_conj_q31.c    
-*    
-* Description:	Q31 complex conjugate.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @addtogroup cmplx_conj        
- * @{        
- */
-
-/**        
- * @brief  Q31 complex conjugate.        
- * @param  *pSrc points to the input vector        
- * @param  *pDst points to the output vector        
- * @param  numSamples number of complex samples in each vector        
- * @return none.        
- *        
- * Scaling and Overflow Behavior:        
- * \par        
- * The function uses saturating arithmetic.        
- * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.        
- */
-
-void arm_cmplx_conj_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples)
-{
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in;                                      /* Input value */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inR1, inR2, inR3, inR4;                  /* Temporary real variables */
-  q31_t inI1, inI2, inI3, inI4;                  /* Temporary imaginary variables */
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
-    /* read real input sample */
-    inR1 = pSrc[0];
-    /* store real input sample */
-    pDst[0] = inR1;
-
-    /* read imaginary input sample */
-    inI1 = pSrc[1];
-
-    /* read real input sample */
-    inR2 = pSrc[2];
-    /* store real input sample */
-    pDst[2] = inR2;
-
-    /* read imaginary input sample */
-    inI2 = pSrc[3];
-
-    /* negate imaginary input sample */
-    inI1 = __QSUB(0, inI1);
-
-    /* read real input sample */
-    inR3 = pSrc[4];
-    /* store real input sample */
-    pDst[4] = inR3;
-
-    /* read imaginary input sample */
-    inI3 = pSrc[5];
-
-    /* negate imaginary input sample */
-    inI2 = __QSUB(0, inI2);
-
-    /* read real input sample */
-    inR4 = pSrc[6];
-    /* store real input sample */
-    pDst[6] = inR4;
-
-    /* negate imaginary input sample */
-    inI3 = __QSUB(0, inI3);
-
-    /* store imaginary input sample */
-    inI4 = pSrc[7];
-
-    /* store imaginary input samples */
-    pDst[1] = inI1;
-
-    /* negate imaginary input sample */
-    inI4 = __QSUB(0, inI4);
-
-    /* store imaginary input samples */
-    pDst[3] = inI2;
-
-    /* increment source pointer by 8 to proecess next samples */
-    pSrc += 8u;
-
-    /* store imaginary input samples */
-    pDst[5] = inI3;
-    pDst[7] = inI4;
-
-    /* increment destination pointer by 8 to process next samples */
-    pDst += 8u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
-    *pDst++ = *pSrc++;
-    in = *pSrc++;
-    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of cmplx_conj group        
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
deleted file mode 100755
index 1a6acb87..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_dot_prod_f32.c    
-*    
-* Description:	Floating-point complex dot product    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @defgroup cmplx_dot_prod Complex Dot Product    
- *    
- * Computes the dot product of two complex vectors.    
- * The vectors are multiplied element-by-element and then summed.    
- *   
- * The pSrcA points to the first complex input vector and    
- * pSrcB points to the second complex input vector.    
- * numSamples specifies the number of complex samples    
- * and the data in each array is stored in an interleaved fashion    
- * (real, imag, real, imag, ...).    
- * Each array has a total of 2*numSamples values.    
- *    
- * The underlying algorithm is used:    
- * 
    
- * realResult=0;    
- * imagResult=0;    
- * for(n=0; n    
- *    
- * There are separate functions for floating-point, Q15, and Q31 data types.    
- */
-
-/**    
- * @addtogroup cmplx_dot_prod    
- * @{    
- */
-
-/**    
- * @brief  Floating-point complex dot product    
- * @param  *pSrcA points to the first input vector    
- * @param  *pSrcB points to the second input vector    
- * @param  numSamples number of complex samples in each vector    
- * @param  *realResult real part of the result returned here    
- * @param  *imagResult imaginary part of the result returned here    
- * @return none.    
- */
-
-void arm_cmplx_dot_prod_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  uint32_t numSamples,
-  float32_t * realResult,
-  float32_t * imagResult)
-{
-  float32_t real_sum = 0.0f, imag_sum = 0.0f;    /* Temporary result storage */
-  float32_t a0,b0,c0,d0;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
-    
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++; 
-  
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
-      
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
-    
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++; 
-  
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples & 0x3u;
-
-  while(blkCnt > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
-
-      /* Decrement the loop counter */
-      numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  /* Store the real and imaginary results in the destination buffers */
-  *realResult = real_sum;
-  *imagResult = imag_sum;
-}
-
-/**    
- * @} end of cmplx_dot_prod group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
deleted file mode 100755
index d794e2c3..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
+++ /dev/null
@@ -1,189 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_dot_prod_q15.c    
-*    
-* Description:	Processing function for the Q15 Complex Dot product    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_dot_prod    
- * @{    
- */
-
-/**    
- * @brief  Q15 complex dot product    
- * @param  *pSrcA points to the first input vector    
- * @param  *pSrcB points to the second input vector    
- * @param  numSamples number of complex samples in each vector    
- * @param  *realResult real part of the result returned here    
- * @param  *imagResult imaginary part of the result returned here    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.    
- * These are accumulated in a 64-bit accumulator with 34.30 precision.    
- * As a final step, the accumulators are converted to 8.24 format.    
- * The return results realResult and imagResult are in 8.24 format.    
- */
-
-void arm_cmplx_dot_prod_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  uint32_t numSamples,
-  q31_t * realResult,
-  q31_t * imagResult)
-{
-  q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
-  q15_t a0,b0,c0,d0;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += (q31_t)a0 * c0;
-      imag_sum += (q31_t)a0 * d0;
-      real_sum -= (q31_t)b0 * d0;
-      imag_sum += (q31_t)b0 * c0;
-      
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += (q31_t)a0 * c0;
-      imag_sum += (q31_t)a0 * d0;
-      real_sum -= (q31_t)b0 * d0;
-      imag_sum += (q31_t)b0 * c0;
-      
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += (q31_t)a0 * c0;
-      imag_sum += (q31_t)a0 * d0;
-      real_sum -= (q31_t)b0 * d0;
-      imag_sum += (q31_t)b0 * c0;
-      
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += (q31_t)a0 * c0;
-      imag_sum += (q31_t)a0 * d0;
-      real_sum -= (q31_t)b0 * d0;
-      imag_sum += (q31_t)b0 * c0;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += (q31_t)a0 * c0;
-      imag_sum += (q31_t)a0 * d0;
-      real_sum -= (q31_t)b0 * d0;
-      imag_sum += (q31_t)b0 * c0;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
-
-
-      /* Decrement the loop counter */
-      numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  /* Store the real and imaginary results in 8.24 format  */
-  /* Convert real data in 34.30 to 8.24 by 6 right shifts */
-  *realResult = (q31_t) (real_sum >> 6);
-  /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
-  *imagResult = (q31_t) (imag_sum >> 6);
-}
-
-/**    
- * @} end of cmplx_dot_prod group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
deleted file mode 100755
index 6eeafc10..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_dot_prod_q31.c    
-*    
-* Description:	Q31 complex dot product    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_dot_prod    
- * @{    
- */
-
-/**    
- * @brief  Q31 complex dot product    
- * @param  *pSrcA points to the first input vector    
- * @param  *pSrcB points to the second input vector    
- * @param  numSamples number of complex samples in each vector    
- * @param  *realResult real part of the result returned here    
- * @param  *imagResult imaginary part of the result returned here    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.    
- * The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.    
- * Additions are nonsaturating and no overflow will occur as long as numSamples is less than 32768.    
- * The return results realResult and imagResult are in 16.48 format.    
- * Input down scaling is not required.    
- */
-
-void arm_cmplx_dot_prod_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  uint32_t numSamples,
-  q63_t * realResult,
-  q63_t * imagResult)
-{
-  q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
-  q31_t a0,b0,c0,d0;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
-      
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
-      
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
-      
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-  }
-
-  /* If the numSamples  is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
-
-      /* Decrement the loop counter */
-      numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  /* Store the real and imaginary results in 16.48 format  */
-  *realResult = real_sum;
-  *imagResult = imag_sum;
-}
-
-/**    
- * @} end of cmplx_dot_prod group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
deleted file mode 100755
index 497348b3..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
+++ /dev/null
@@ -1,165 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_f32.c    
-*    
-* Description:	Floating-point complex magnitude.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @defgroup cmplx_mag Complex Magnitude    
- *    
- * Computes the magnitude of the elements of a complex data vector.    
- *   
- * The pSrc points to the source data and    
- * pDst points to the where the result should be written.    
- * numSamples specifies the number of complex samples    
- * in the input array and the data is stored in an interleaved fashion    
- * (real, imag, real, imag, ...).    
- * The input array has a total of 2*numSamples values;    
- * the output array has a total of numSamples values.    
- * The underlying algorithm is used:    
- *    
- * 
    
- * for(n=0; n    
- *    
- * There are separate functions for floating-point, Q15, and Q31 data types.    
- */
-
-/**    
- * @addtogroup cmplx_mag    
- * @{    
- */
-/**    
- * @brief Floating-point complex magnitude.    
- * @param[in]       *pSrc points to complex input buffer    
- * @param[out]      *pDst points to real output buffer    
- * @param[in]       numSamples number of complex samples in the input vector    
- * @return none.    
- *    
- */
-
-
-void arm_cmplx_mag_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples)
-{
-  float32_t realIn, imagIn;                      /* Temporary variables to hold input values */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    /* store the result in the destination buffer. */
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    /* store the result in the destination buffer. */
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* out = sqrt((real * real) + (imag * imag)) */
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    /* store the result in the destination buffer. */
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of cmplx_mag group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
deleted file mode 100755
index bfe2a5dc..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_q15.c    
-*    
-* Description:	Q15 complex magnitude.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_mag    
- * @{    
- */
-
-
-/**    
- * @brief  Q15 complex magnitude    
- * @param  *pSrc points to the complex input vector    
- * @param  *pDst points to the real output vector    
- * @param  numSamples number of complex samples in the input vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.    
- */
-
-void arm_cmplx_mag_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t acc0, acc1;                              /* Accumulators */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in1, in2, in3, in4;
-  q31_t acc2, acc3;
-
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    in2 = *__SIMD32(pSrc)++;
-    in3 = *__SIMD32(pSrc)++;
-    in4 = *__SIMD32(pSrc)++;
-
-    acc0 = __SMUAD(in1, in1);
-    acc1 = __SMUAD(in2, in2);
-    acc2 = __SMUAD(in3, in3);
-    acc3 = __SMUAD(in4, in4);
-
-    /* store the result in 2.14 format in the destination buffer. */
-    arm_sqrt_q15((q15_t) ((acc0) >> 17), pDst++);
-    arm_sqrt_q15((q15_t) ((acc1) >> 17), pDst++);
-    arm_sqrt_q15((q15_t) ((acc2) >> 17), pDst++);
-    arm_sqrt_q15((q15_t) ((acc3) >> 17), pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    acc0 = __SMUAD(in1, in1);
-
-    /* store the result in 2.14 format in the destination buffer. */
-    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t real, imag;                              /* Temporary variables to hold input values */
-
-  while(numSamples > 0u)
-  {
-    /* out = sqrt(real * real + imag * imag) */
-    real = *pSrc++;
-    imag = *pSrc++;
-
-    acc0 = (real * real);
-    acc1 = (imag * imag);
-
-    /* store the result in 2.14 format in the destination buffer. */
-    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of cmplx_mag group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
deleted file mode 100755
index 10916739..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
+++ /dev/null
@@ -1,185 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_q31.c    
-*    
-* Description:	Q31 complex magnitude    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @addtogroup cmplx_mag        
- * @{        
- */
-
-/**        
- * @brief  Q31 complex magnitude        
- * @param  *pSrc points to the complex input vector        
- * @param  *pDst points to the real output vector        
- * @param  numSamples number of complex samples in the input vector        
- * @return none.        
- *        
- * Scaling and Overflow Behavior:        
- * \par        
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format.        
- * Input down scaling is not required.        
- */
-
-void arm_cmplx_mag_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t real, imag;                              /* Temporary variables to hold input values */
-  q31_t acc0, acc1;                              /* Accumulators */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t real1, real2, imag1, imag2;              /* Temporary variables to hold input values */
-  q31_t out1, out2, out3, out4;                  /* Accumulators */
-  q63_t mul1, mul2, mul3, mul4;                  /* Temporary variables */
-
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* read complex input from source buffer */
-    real1 = pSrc[0];
-    imag1 = pSrc[1];
-    real2 = pSrc[2];
-    imag2 = pSrc[3];
-
-    /* calculate power of input values */
-    mul1 = (q63_t) real1 *real1;
-    mul2 = (q63_t) imag1 *imag1;
-    mul3 = (q63_t) real2 *real2;
-    mul4 = (q63_t) imag2 *imag2;
-
-    /* get the result to 3.29 format */
-    out1 = (q31_t) (mul1 >> 33);
-    out2 = (q31_t) (mul2 >> 33);
-    out3 = (q31_t) (mul3 >> 33);
-    out4 = (q31_t) (mul4 >> 33);
-
-    /* add real and imaginary accumulators */
-    out1 = out1 + out2;
-    out3 = out3 + out4;
-
-    /* read complex input from source buffer */
-    real1 = pSrc[4];
-    imag1 = pSrc[5];
-    real2 = pSrc[6];
-    imag2 = pSrc[7];
-
-    /* calculate square root */
-    arm_sqrt_q31(out1, &pDst[0]);
-
-    /* calculate power of input values */
-    mul1 = (q63_t) real1 *real1;
-
-    /* calculate square root */
-    arm_sqrt_q31(out3, &pDst[1]);
-
-    /* calculate power of input values */
-    mul2 = (q63_t) imag1 *imag1;
-    mul3 = (q63_t) real2 *real2;
-    mul4 = (q63_t) imag2 *imag2;
-
-    /* get the result to 3.29 format */
-    out1 = (q31_t) (mul1 >> 33);
-    out2 = (q31_t) (mul2 >> 33);
-    out3 = (q31_t) (mul3 >> 33);
-    out4 = (q31_t) (mul4 >> 33);
-
-    /* add real and imaginary accumulators */
-    out1 = out1 + out2;
-    out3 = out3 + out4;
-
-    /* calculate square root */
-    arm_sqrt_q31(out1, &pDst[2]);
-
-    /* increment destination by 8 to process next samples */
-    pSrc += 8u;
-
-    /* calculate square root */
-    arm_sqrt_q31(out3, &pDst[3]);
-
-    /* increment destination by 4 to process next samples */
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 2.30 format in the destination buffer. */
-    arm_sqrt_q31(acc0 + acc1, pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of cmplx_mag group        
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
deleted file mode 100755
index 5bf3f806..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_squared_f32.c    
-*    
-* Description:	Floating-point complex magnitude squared.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @defgroup cmplx_mag_squared Complex Magnitude Squared        
- *        
- * Computes the magnitude squared of the elements of a complex data vector.        
- *       
- * The pSrc points to the source data and        
- * pDst points to the where the result should be written.        
- * numSamples specifies the number of complex samples        
- * in the input array and the data is stored in an interleaved fashion        
- * (real, imag, real, imag, ...).        
- * The input array has a total of 2*numSamples values;        
- * the output array has a total of numSamples values.        
- *        
- * The underlying algorithm is used:        
- *        
- * 
        
- * for(n=0; n        
- *        
- * There are separate functions for floating-point, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup cmplx_mag_squared        
- * @{        
- */
-
-
-/**        
- * @brief  Floating-point complex magnitude squared        
- * @param[in]  *pSrc points to the complex input vector        
- * @param[out]  *pDst points to the real output vector        
- * @param[in]  numSamples number of complex samples in the input vector        
- * @return none.        
- */
-
-void arm_cmplx_mag_squared_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples)
-{
-  float32_t real, imag;                          /* Temporary variables to store real and imaginary values */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-  float32_t real1, real2, real3, real4;          /* Temporary variables to hold real values */
-  float32_t imag1, imag2, imag3, imag4;          /* Temporary variables to hold imaginary values */
-  float32_t mul1, mul2, mul3, mul4;              /* Temporary variables */
-  float32_t mul5, mul6, mul7, mul8;              /* Temporary variables */
-  float32_t out1, out2, out3, out4;              /* Temporary variables to hold output values */
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    /* read real input sample from source buffer */
-    real1 = pSrc[0];
-    /* read imaginary input sample from source buffer */
-    imag1 = pSrc[1];
-
-    /* calculate power of real value */
-    mul1 = real1 * real1;
-
-    /* read real input sample from source buffer */
-    real2 = pSrc[2];
-
-    /* calculate power of imaginary value */
-    mul2 = imag1 * imag1;
-
-    /* read imaginary input sample from source buffer */
-    imag2 = pSrc[3];
-
-    /* calculate power of real value */
-    mul3 = real2 * real2;
-
-    /* read real input sample from source buffer */
-    real3 = pSrc[4];
-
-    /* calculate power of imaginary value */
-    mul4 = imag2 * imag2;
-
-    /* read imaginary input sample from source buffer */
-    imag3 = pSrc[5];
-
-    /* calculate power of real value */
-    mul5 = real3 * real3;
-    /* calculate power of imaginary value */
-    mul6 = imag3 * imag3;
-
-    /* read real input sample from source buffer */
-    real4 = pSrc[6];
-
-    /* accumulate real and imaginary powers */
-    out1 = mul1 + mul2;
-
-    /* read imaginary input sample from source buffer */
-    imag4 = pSrc[7];
-
-    /* accumulate real and imaginary powers */
-    out2 = mul3 + mul4;
-
-    /* calculate power of real value */
-    mul7 = real4 * real4;
-    /* calculate power of imaginary value */
-    mul8 = imag4 * imag4;
-
-    /* store output to destination */
-    pDst[0] = out1;
-
-    /* accumulate real and imaginary powers */
-    out3 = mul5 + mul6;
-
-    /* store output to destination */
-    pDst[1] = out2;
-
-    /* accumulate real and imaginary powers */
-    out4 = mul7 + mul8;
-
-    /* store output to destination */
-    pDst[2] = out3;
-
-    /* increment destination pointer by 8 to process next samples */
-    pSrc += 8u;
-
-    /* store output to destination */
-    pDst[3] = out4;
-
-    /* increment destination pointer by 4 to process next samples */
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-
-    /* out = (real * real) + (imag * imag) */
-    /* store the result in the destination buffer. */
-    *pDst++ = (real * real) + (imag * imag);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of cmplx_mag_squared group        
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
deleted file mode 100755
index f5148ba6..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_squared_q15.c    
-*    
-* Description:	Q15 complex magnitude squared.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_mag_squared    
- * @{    
- */
-
-/**    
- * @brief  Q15 complex magnitude squared    
- * @param  *pSrc points to the complex input vector    
- * @param  *pDst points to the real output vector    
- * @param  numSamples number of complex samples in the input vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.    
- */
-
-void arm_cmplx_mag_squared_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t acc0, acc1;                              /* Accumulators */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in1, in2, in3, in4;
-  q31_t acc2, acc3;
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    in2 = *__SIMD32(pSrc)++;
-    in3 = *__SIMD32(pSrc)++;
-    in4 = *__SIMD32(pSrc)++;
-
-    acc0 = __SMUAD(in1, in1);
-    acc1 = __SMUAD(in2, in2);
-    acc2 = __SMUAD(in3, in3);
-    acc3 = __SMUAD(in4, in4);
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ = (q15_t) (acc0 >> 17);
-    *pDst++ = (q15_t) (acc1 >> 17);
-    *pDst++ = (q15_t) (acc2 >> 17);
-    *pDst++ = (q15_t) (acc3 >> 17);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    acc0 = __SMUAD(in1, in1);
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ = (q15_t) (acc0 >> 17);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t real, imag;                              /* Temporary variables to store real and imaginary values */
-
-  while(numSamples > 0u)
-  {
-    /* out = ((real * real) + (imag * imag)) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (real * real);
-    acc1 = (imag * imag);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of cmplx_mag_squared group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
deleted file mode 100755
index 2cc0b1f3..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_squared_q31.c    
-*    
-* Description:	Q31 complex magnitude squared.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_mag_squared    
- * @{    
- */
-
-
-/**    
- * @brief  Q31 complex magnitude squared    
- * @param  *pSrc points to the complex input vector    
- * @param  *pDst points to the real output vector    
- * @param  numSamples number of complex samples in the input vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.    
- * Input down scaling is not required.    
- */
-
-void arm_cmplx_mag_squared_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t real, imag;                              /* Temporary variables to store real and imaginary values */
-  q31_t acc0, acc1;                              /* Accumulators */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* out = ((real * real) + (imag * imag)) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of cmplx_mag_squared group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
deleted file mode 100755
index bfb7d51c..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
+++ /dev/null
@@ -1,207 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_cmplx_f32.c    
-*    
-* Description:	Floating-point complex-by-complex multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication        
- *        
- * Multiplies a complex vector by another complex vector and generates a complex result.        
- * The data in the complex arrays is stored in an interleaved fashion        
- * (real, imag, real, imag, ...).        
- * The parameter numSamples represents the number of complex        
- * samples processed.  The complex arrays have a total of 2*numSamples        
- * real values.        
- *        
- * The underlying algorithm is used:        
- *        
- * 
        
- * for(n=0; n        
- *        
- * There are separate functions for floating-point, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup CmplxByCmplxMult        
- * @{        
- */
-
-
-/**        
- * @brief  Floating-point complex-by-complex multiplication        
- * @param[in]  *pSrcA points to the first input vector        
- * @param[in]  *pSrcB points to the second input vector        
- * @param[out]  *pDst  points to the output vector        
- * @param[in]  numSamples number of complex samples in each vector        
- * @return none.        
- */
-
-void arm_cmplx_mult_cmplx_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t numSamples)
-{
-  float32_t a1, b1, c1, d1;                      /* Temporary variables to store real and imaginary values */
-  uint32_t blkCnt;                               /* loop counters */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t a2, b2, c2, d2;                      /* Temporary variables to store real and imaginary values */
-  float32_t acc1, acc2, acc3, acc4;
-
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a1 = *pSrcA;                /* A[2 * i] */
-    c1 = *pSrcB;                /* B[2 * i] */
-
-    b1 = *(pSrcA + 1);          /* A[2 * i + 1] */
-    acc1 = a1 * c1;             /* acc1 = A[2 * i] * B[2 * i] */
-
-    a2 = *(pSrcA + 2);          /* A[2 * i + 2] */
-    acc2 = (b1 * c1);           /* acc2 = A[2 * i + 1] * B[2 * i] */
-
-    d1 = *(pSrcB + 1);          /* B[2 * i + 1] */
-    c2 = *(pSrcB + 2);          /* B[2 * i + 2] */
-    acc1 -= b1 * d1;            /* acc1 =      A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
-
-    d2 = *(pSrcB + 3);          /* B[2 * i + 3] */
-    acc3 = a2 * c2;             /* acc3 =       A[2 * i + 2] * B[2 * i + 2] */
-
-    b2 = *(pSrcA + 3);          /* A[2 * i + 3] */
-    acc2 += (a1 * d1);          /* acc2 =      A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1] */
-
-    a1 = *(pSrcA + 4);          /* A[2 * i + 4] */
-    acc4 = (a2 * d2);           /* acc4 =   A[2 * i + 2] * B[2 * i + 3] */
-
-    c1 = *(pSrcB + 4);          /* B[2 * i + 4] */
-    acc3 -= (b2 * d2);          /* acc3 =       A[2 * i + 2] * B[2 * i + 2] - A[2 * i + 3] * B[2 * i + 3] */
-    *pDst = acc1;               /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
-
-    b1 = *(pSrcA + 5);          /* A[2 * i + 5] */
-    acc4 += b2 * c2;            /* acc4 =   A[2 * i + 2] * B[2 * i + 3] + A[2 * i + 3] * B[2 * i + 2] */
-
-    *(pDst + 1) = acc2;         /* C[2 * i + 1] = A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1]  */
-    acc1 = (a1 * c1);
-
-    d1 = *(pSrcB + 5);
-    acc2 = (b1 * c1);
-
-    *(pDst + 2) = acc3;
-    *(pDst + 3) = acc4;
-
-    a2 = *(pSrcA + 6);
-    acc1 -= (b1 * d1);
-
-    c2 = *(pSrcB + 6);
-    acc2 += (a1 * d1);
-
-    b2 = *(pSrcA + 7);
-    acc3 = (a2 * c2);
-
-    d2 = *(pSrcB + 7);
-    acc4 = (b2 * c2);
-
-    *(pDst + 4) = acc1;
-    pSrcA += 8u;
-
-    acc3 -= (b2 * d2);
-    acc4 += (a2 * d2);
-
-    *(pDst + 5) = acc2;
-    pSrcB += 8u;
-
-    *(pDst + 6) = acc3;
-    *(pDst + 7) = acc4;
-
-    pDst += 8u;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a1 = *pSrcA++;
-    b1 = *pSrcA++;
-    c1 = *pSrcB++;
-    d1 = *pSrcB++;
-
-    /* store the result in the destination buffer. */
-    *pDst++ = (a1 * c1) - (b1 * d1);
-    *pDst++ = (a1 * d1) + (b1 * c1);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of CmplxByCmplxMult group        
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
deleted file mode 100755
index df6eac05..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
+++ /dev/null
@@ -1,193 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_cmplx_q15.c    
-*    
-* Description:	Q15 complex-by-complex multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup CmplxByCmplxMult    
- * @{    
- */
-
-/**    
- * @brief  Q15 complex-by-complex multiplication    
- * @param[in]  *pSrcA points to the first input vector    
- * @param[in]  *pSrcB points to the second input vector    
- * @param[out]  *pDst  points to the output vector    
- * @param[in]  numSamples number of complex samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.    
- */
-
-void arm_cmplx_mult_cmplx_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t numSamples)
-{
-  q15_t a, b, c, d;                              /* Temporary variables to store real and imaginary values */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counters */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    /* Decrement the blockSize loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of CmplxByCmplxMult group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
deleted file mode 100755
index ec6b9475..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
+++ /dev/null
@@ -1,326 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_cmplx_q31.c    
-*    
-* Description:	Q31 complex-by-complex multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup CmplxByCmplxMult    
- * @{    
- */
-
-
-/**    
- * @brief  Q31 complex-by-complex multiplication    
- * @param[in]  *pSrcA points to the first input vector    
- * @param[in]  *pSrcB points to the second input vector    
- * @param[out]  *pDst  points to the output vector    
- * @param[in]  numSamples number of complex samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.    
- * Input down scaling is not required.    
- */
-
-void arm_cmplx_mult_cmplx_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t a, b, c, d;                              /* Temporary variables to store real and imaginary values */
-  uint32_t blkCnt;                               /* loop counters */
-  q31_t mul1, mul2, mul3, mul4;
-  q31_t out1, out2;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 1u;
-
-  /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.     
-   ** a second loop below computes the remaining 1 sample. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 2, compute any remaining output samples here.     
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x2u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of CmplxByCmplxMult group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
deleted file mode 100755
index 04e8ecaa..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
+++ /dev/null
@@ -1,225 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_real_f32.c    
-*    
-* Description:	Floating-point complex by real multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @defgroup CmplxByRealMult Complex-by-Real Multiplication        
- *        
- * Multiplies a complex vector by a real vector and generates a complex result.        
- * The data in the complex arrays is stored in an interleaved fashion        
- * (real, imag, real, imag, ...).        
- * The parameter numSamples represents the number of complex        
- * samples processed.  The complex arrays have a total of 2*numSamples        
- * real values while the real array has a total of numSamples        
- * real values.        
- *        
- * The underlying algorithm is used:        
- *        
- * 
        
- * for(n=0; n        
- *        
- * There are separate functions for floating-point, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup CmplxByRealMult        
- * @{        
- */
-
-
-/**        
- * @brief  Floating-point complex-by-real multiplication        
- * @param[in]  *pSrcCmplx points to the complex input vector        
- * @param[in]  *pSrcReal points to the real input vector        
- * @param[out]  *pCmplxDst points to the complex output vector        
- * @param[in]  numSamples number of samples in each vector        
- * @return none.        
- */
-
-void arm_cmplx_mult_real_f32(
-  float32_t * pSrcCmplx,
-  float32_t * pSrcReal,
-  float32_t * pCmplxDst,
-  uint32_t numSamples)
-{
-  float32_t in;                                  /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counters */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inA1, inA2, inA3, inA4;              /* Temporary variables to hold input data */
-  float32_t inA5, inA6, inA7, inA8;              /* Temporary variables to hold input data */
-  float32_t inB1, inB2, inB3, inB4;              /* Temporary variables to hold input data */
-  float32_t out1, out2, out3, out4;              /* Temporary variables to hold output data */
-  float32_t out5, out6, out7, out8;              /* Temporary variables to hold output data */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read input from complex input buffer */
-    inA1 = pSrcCmplx[0];
-    inA2 = pSrcCmplx[1];
-    /* read input from real input buffer */
-    inB1 = pSrcReal[0];
-
-    /* read input from complex input buffer */
-    inA3 = pSrcCmplx[2];
-
-    /* multiply complex buffer real input with real buffer input */
-    out1 = inA1 * inB1;
-
-    /* read input from complex input buffer */
-    inA4 = pSrcCmplx[3];
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out2 = inA2 * inB1;
-
-    /* read input from real input buffer */
-    inB2 = pSrcReal[1];
-    /* read input from complex input buffer */
-    inA5 = pSrcCmplx[4];
-
-    /* multiply complex buffer real input with real buffer input */
-    out3 = inA3 * inB2;
-
-    /* read input from complex input buffer */
-    inA6 = pSrcCmplx[5];
-    /* read input from real input buffer */
-    inB3 = pSrcReal[2];
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out4 = inA4 * inB2;
-
-    /* read input from complex input buffer */
-    inA7 = pSrcCmplx[6];
-
-    /* multiply complex buffer real input with real buffer input */
-    out5 = inA5 * inB3;
-
-    /* read input from complex input buffer */
-    inA8 = pSrcCmplx[7];
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out6 = inA6 * inB3;
-
-    /* read input from real input buffer */
-    inB4 = pSrcReal[3];
-
-    /* store result to destination bufer */
-    pCmplxDst[0] = out1;
-
-    /* multiply complex buffer real input with real buffer input */
-    out7 = inA7 * inB4;
-
-    /* store result to destination bufer */
-    pCmplxDst[1] = out2;
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out8 = inA8 * inB4;
-
-    /* store result to destination bufer */
-    pCmplxDst[2] = out3;
-    pCmplxDst[3] = out4;
-    pCmplxDst[4] = out5;
-
-    /* incremnet complex input buffer by 8 to process next samples */
-    pSrcCmplx += 8u;
-
-    /* store result to destination bufer */
-    pCmplxDst[5] = out6;
-
-    /* increment real input buffer by 4 to process next samples */
-    pSrcReal += 4u;
-
-    /* store result to destination bufer */
-    pCmplxDst[6] = out7;
-    pCmplxDst[7] = out8;
-
-    /* increment destination buffer by 8 to process next sampels */
-    pCmplxDst += 8u;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    in = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ = (*pSrcCmplx++) * (in);
-    *pCmplxDst++ = (*pSrcCmplx++) * (in);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of CmplxByRealMult group        
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
deleted file mode 100755
index 51b2f863..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. October 2015
-* $Revision: 	V.1.4.5 a
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_real_q15.c    
-*    
-* Description:	Q15 complex by real multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup CmplxByRealMult    
- * @{    
- */
-
-
-/**    
- * @brief  Q15 complex-by-real multiplication    
- * @param[in]  *pSrcCmplx points to the complex input vector    
- * @param[in]  *pSrcReal points to the real input vector    
- * @param[out]  *pCmplxDst points to the complex output vector    
- * @param[in]  numSamples number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- */
-
-void arm_cmplx_mult_real_q15(
-  q15_t * pSrcCmplx,
-  q15_t * pSrcReal,
-  q15_t * pCmplxDst,
-  uint32_t numSamples)
-{
-  q15_t in;                                      /* Temporary variable to store input value */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counters */
-  q31_t inA1, inA2;                              /* Temporary variables to hold input data */
-  q31_t inB1;                                    /* Temporary variables to hold input data */
-  q15_t out1, out2, out3, out4;                  /* Temporary variables to hold output data */
-  q31_t mul1, mul2, mul3, mul4;                  /* Temporary variables to hold intermediate data */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read complex number both real and imaginary from complex input buffer */
-    inA1 = *__SIMD32(pSrcCmplx)++;
-    /* read two real values at a time from real input buffer */
-    inB1 = *__SIMD32(pSrcReal)++;
-    /* read complex number both real and imaginary from complex input buffer */
-    inA2 = *__SIMD32(pSrcCmplx)++;
-
-    /* multiply complex number with real numbers */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1));
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
-    mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
-
-#else
-
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
-    mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
-    mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /* saturate the result */
-    out1 = (q15_t) __SSAT(mul1 >> 15u, 16);
-    out2 = (q15_t) __SSAT(mul2 >> 15u, 16);
-    out3 = (q15_t) __SSAT(mul3 >> 15u, 16);
-    out4 = (q15_t) __SSAT(mul4 >> 15u, 16);
-
-    /* pack real and imaginary outputs and store them to destination */
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16);
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16);
-
-    inA1 = *__SIMD32(pSrcCmplx)++;
-    inB1 = *__SIMD32(pSrcReal)++;
-    inA2 = *__SIMD32(pSrcCmplx)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1));
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
-    mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
-
-#else
-
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
-    mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
-    mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    out1 = (q15_t) __SSAT(mul1 >> 15u, 16);
-    out2 = (q15_t) __SSAT(mul2 >> 15u, 16);
-    out3 = (q15_t) __SSAT(mul3 >> 15u, 16);
-    out4 = (q15_t) __SSAT(mul4 >> 15u, 16);
-
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16);
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    in = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* realOut = realA * realB.            */
-    /* imagOut = imagA * realB.                */
-    in = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-
-    /* Decrement the numSamples loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of CmplxByRealMult group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c b/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
deleted file mode 100755
index 73db1077..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
+++ /dev/null
@@ -1,223 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_real_q31.c    
-*    
-* Description:	Q31 complex by real multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup CmplxByRealMult    
- * @{    
- */
-
-
-/**    
- * @brief  Q31 complex-by-real multiplication    
- * @param[in]  *pSrcCmplx points to the complex input vector    
- * @param[in]  *pSrcReal points to the real input vector    
- * @param[out]  *pCmplxDst points to the complex output vector    
- * @param[in]  numSamples number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.    
- */
-
-void arm_cmplx_mult_real_q31(
-  q31_t * pSrcCmplx,
-  q31_t * pSrcReal,
-  q31_t * pCmplxDst,
-  uint32_t numSamples)
-{
-  q31_t inA1;                                    /* Temporary variable to store input value */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counters */
-  q31_t inA2, inA3, inA4;                        /* Temporary variables to hold input data */
-  q31_t inB1, inB2;                              /* Temporary variabels to hold input data */
-  q31_t out1, out2, out3, out4;                  /* Temporary variables to hold output data */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read real input from complex input buffer */
-    inA1 = *pSrcCmplx++;
-    inA2 = *pSrcCmplx++;
-    /* read input from real input bufer */
-    inB1 = *pSrcReal++;
-    inB2 = *pSrcReal++;
-    /* read imaginary input from complex input buffer */
-    inA3 = *pSrcCmplx++;
-    inA4 = *pSrcCmplx++;
-
-    /* multiply complex input with real input */
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB1) >> 32;
-    out3 = ((q63_t) inA3 * inB2) >> 32;
-    out4 = ((q63_t) inA4 * inB2) >> 32;
-
-    /* sature the result */
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-    out3 = __SSAT(out3, 31);
-    out4 = __SSAT(out4, 31);
-
-    /* get result in 1.31 format */
-    out1 = out1 << 1;
-    out2 = out2 << 1;
-    out3 = out3 << 1;
-    out4 = out4 << 1;
-
-    /* store the result to destination buffer */
-    *pCmplxDst++ = out1;
-    *pCmplxDst++ = out2;
-    *pCmplxDst++ = out3;
-    *pCmplxDst++ = out4;
-
-    /* read real input from complex input buffer */
-    inA1 = *pSrcCmplx++;
-    inA2 = *pSrcCmplx++;
-    /* read input from real input bufer */
-    inB1 = *pSrcReal++;
-    inB2 = *pSrcReal++;
-    /* read imaginary input from complex input buffer */
-    inA3 = *pSrcCmplx++;
-    inA4 = *pSrcCmplx++;
-
-    /* multiply complex input with real input */
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB1) >> 32;
-    out3 = ((q63_t) inA3 * inB2) >> 32;
-    out4 = ((q63_t) inA4 * inB2) >> 32;
-
-    /* sature the result */
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-    out3 = __SSAT(out3, 31);
-    out4 = __SSAT(out4, 31);
-
-    /* get result in 1.31 format */
-    out1 = out1 << 1;
-    out2 = out2 << 1;
-    out3 = out3 << 1;
-    out4 = out4 << 1;
-
-    /* store the result to destination buffer */
-    *pCmplxDst++ = out1;
-    *pCmplxDst++ = out2;
-    *pCmplxDst++ = out3;
-    *pCmplxDst++ = out4;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read real input from complex input buffer */
-    inA1 = *pSrcCmplx++;
-    inA2 = *pSrcCmplx++;
-    /* read input from real input bufer */
-    inB1 = *pSrcReal++;
-
-    /* multiply complex input with real input */
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB1) >> 32;
-
-    /* sature the result */
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-
-    /* get result in 1.31 format */
-    out1 = out1 << 1;
-    out2 = out2 << 1;
-
-    /* store the result to destination buffer */
-    *pCmplxDst++ = out1;
-    *pCmplxDst++ = out2;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* realOut = realA * realB.            */
-    /* imagReal = imagA * realB.               */
-    inA1 = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ =
-      (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * inA1) >> 31);
-    *pCmplxDst++ =
-      (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * inA1) >> 31);
-
-    /* Decrement the numSamples loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of CmplxByRealMult group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c
deleted file mode 100755
index 2bc1854e..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c
+++ /dev/null
@@ -1,87 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_init_f32.c    
-*    
-* Description:	Floating-point PID Control initialization function    
-*				   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the floating-point PID Control.   
- * @param[in,out] *S points to an instance of the PID structure.   
- * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state & 1 = reset the state.   
- * @return none.   
- * \par Description:   
- * \par    
- * The resetStateFlag specifies whether to set state to zero or not. \n   
- * The function computes the structure fields: A0, A1 A2    
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)    
- * also sets the state variables to all zeros.    
- */
-
-void arm_pid_init_f32(
-  arm_pid_instance_f32 * S,
-  int32_t resetStateFlag)
-{
-
-  /* Derived coefficient A0 */
-  S->A0 = S->Kp + S->Ki + S->Kd;
-
-  /* Derived coefficient A1 */
-  S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd);
-
-  /* Derived coefficient A2 */
-  S->A2 = S->Kd;
-
-  /* Check whether state needs reset or not */
-  if(resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3u * sizeof(float32_t));
-  }
-
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c b/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c
deleted file mode 100755
index c163901b..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_init_q15.c    
-*    
-* Description:	Q15 PID Control initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
- * @details    
- * @param[in,out] *S points to an instance of the Q15 PID structure.    
- * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.    
- * @return none.    
- * \par Description:   
- * \par    
- * The resetStateFlag specifies whether to set state to zero or not. \n   
- * The function computes the structure fields: A0, A1 A2    
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)    
- * also sets the state variables to all zeros.    
- */
-
-void arm_pid_init_q15(
-  arm_pid_instance_q15 * S,
-  int32_t resetStateFlag)
-{
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Derived coefficient A0 */
-  S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd);
-
-  /* Derived coefficients and pack into A1 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-  S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16);
-
-#else
-
-  S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-  /* Check whether state needs reset or not */
-  if(resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3u * sizeof(q15_t));
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t temp;                                    /*to store the sum */
-
-  /* Derived coefficient A0 */
-  temp = S->Kp + S->Ki + S->Kd;
-  S->A0 = (q15_t) __SSAT(temp, 16);
-
-  /* Derived coefficients and pack into A1 */
-  temp = -(S->Kd + S->Kd + S->Kp);
-  S->A1 = (q15_t) __SSAT(temp, 16);
-  S->A2 = S->Kd;
-
-
-
-  /* Check whether state needs reset or not */
-  if(resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3u * sizeof(q15_t));
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c b/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c
deleted file mode 100755
index 012e8732..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_init_q31.c    
-*    
-* Description:	Q31 PID Control initialization function     
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the Q31 PID Control.   
- * @param[in,out] *S points to an instance of the Q31 PID structure.   
- * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.   
- * @return none.    
- * \par Description:   
- * \par    
- * The resetStateFlag specifies whether to set state to zero or not. \n   
- * The function computes the structure fields: A0, A1 A2    
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)    
- * also sets the state variables to all zeros.    
- */
-
-void arm_pid_init_q31(
-  arm_pid_instance_q31 * S,
-  int32_t resetStateFlag)
-{
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Derived coefficient A0 */
-  S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
-
-  /* Derived coefficient A1 */
-  S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t temp;
-
-  /* Derived coefficient A0 */
-  temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
-  S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
-
-  /* Derived coefficient A1 */
-  temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
-  S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  /* Derived coefficient A2 */
-  S->A2 = S->Kd;
-
-  /* Check whether state needs reset or not */
-  if(resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3u * sizeof(q31_t));
-  }
-
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c b/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c
deleted file mode 100755
index 081cf0cd..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_reset_f32.c    
-*    
-* Description:	Floating-point PID Control reset function   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
-* @brief  Reset function for the floating-point PID Control.   
-* @param[in] *S	Instance pointer of PID control data structure.   
-* @return none.    
-* \par Description:   
-* The function resets the state buffer to zeros.    
-*/
-void arm_pid_reset_f32(
-  arm_pid_instance_f32 * S)
-{
-
-  /* Clear the state buffer.  The size will be always 3 samples */
-  memset(S->state, 0, 3u * sizeof(float32_t));
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c b/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c
deleted file mode 100755
index 4dfe4198..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_reset_q15.c    
-*    
-* Description:	Q15 PID Control reset function   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
-* @brief  Reset function for the Q15 PID Control.   
-* @param[in] *S		Instance pointer of PID control data structure.   
-* @return none.    
-* \par Description:   
-* The function resets the state buffer to zeros.    
-*/
-void arm_pid_reset_q15(
-  arm_pid_instance_q15 * S)
-{
-  /* Reset state to zero, The size will be always 3 samples */
-  memset(S->state, 0, 3u * sizeof(q15_t));
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c b/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c
deleted file mode 100755
index 540a54a5..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_reset_q31.c    
-*    
-* Description:	Q31 PID Control reset function   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
-* @brief  Reset function for the Q31 PID Control.   
-* @param[in] *S	Instance pointer of PID control data structure.   
-* @return none.    
-* \par Description:   
-* The function resets the state buffer to zeros.    
-*/
-void arm_pid_reset_q31(
-  arm_pid_instance_q31 * S)
-{
-
-  /* Clear the state buffer.  The size will be always 3 samples */
-  memset(S->state, 0, 3u * sizeof(q31_t));
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c b/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c
deleted file mode 100755
index 37d63a8b..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c
+++ /dev/null
@@ -1,149 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sin_cos_f32.c    
-*    
-* Description:	Sine and Cosine calculation for floating-point values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupController    
- */
-
-/**    
- * @defgroup SinCos Sine Cosine   
- *    
- * Computes the trigonometric sine and cosine values using a combination of table lookup   
- * and linear interpolation.     
- * There are separate functions for Q31 and floating-point data types.   
- * The input to the floating-point version is in degrees while the   
- * fixed-point Q31 have a scaled input with the range   
- * [-1 0.9999] mapping to [-180 +180] degrees.   
- *
- * The floating point function also allows values that are out of the usual range. When this happens, the function will
- * take extra time to adjust the input value to the range of [-180 180].
- *   
- * The implementation is based on table lookup using 360 values together with linear interpolation.   
- * The steps used are:   
- *  -# Calculation of the nearest integer table index.   
- *  -# Compute the fractional portion (fract) of the input.   
- *  -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c index+1 to \c y1.      
- *  -# Sine value is computed as  *psinVal = y0 + (fract * (y1 - y0)).    
- *  -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c index+1 to \c y1.      
- *  -# Cosine value is computed as  *pcosVal = y0 + (fract * (y1 - y0)).    
- */
-
- /**    
- * @addtogroup SinCos    
- * @{    
- */
-
-/**    
- * @brief  Floating-point sin_cos function.   
- * @param[in]  theta    input value in degrees    
- * @param[out] *pSinVal points to the processed sine output.    
- * @param[out] *pCosVal points to the processed cos output.    
- * @return none.   
- */
-
-void arm_sin_cos_f32(
-  float32_t theta,
-  float32_t * pSinVal,
-  float32_t * pCosVal)
-{
-  float32_t fract, in;                             /* Temporary variables for input, output */
-  uint16_t indexS, indexC;                         /* Index variable */
-  float32_t f1, f2, d1, d2;                        /* Two nearest output values */
-  int32_t n;
-  float32_t findex, Dn, Df, temp;
-
-  /* input x is in degrees */
-  /* Scale the input, divide input by 360, for cosine add 0.25 (pi/2) to read sine table */
-  in = theta * 0.00277777777778f;
-
-  /* Calculation of floor value of input */
-  n = (int32_t) in;
-
-  /* Make negative values towards -infinity */
-  if(in < 0.0f)
-  {
-    n--;
-  }
-  /* Map input value to [0 1] */
-  in = in - (float32_t) n;
-
-  /* Calculation of index of the table */
-  findex = (float32_t) FAST_MATH_TABLE_SIZE * in;
-  indexS = ((uint16_t)findex) & 0x1ff;
-  indexC = (indexS + (FAST_MATH_TABLE_SIZE / 4)) & 0x1ff;
-
-  /* fractional value calculation */
-  fract = findex - (float32_t) indexS;
-
-  /* Read two nearest values of input value from the cos & sin tables */
-  f1 = sinTable_f32[indexC+0];
-  f2 = sinTable_f32[indexC+1];
-  d1 = -sinTable_f32[indexS+0];
-  d2 = -sinTable_f32[indexS+1];
-
-  Dn = 0.0122718463030f; // delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE
-  Df = f2 - f1; // delta between the values of the functions
-  temp = Dn*(d1 + d2) - 2*Df;
-  temp = fract*temp + (3*Df - (d2 + 2*d1)*Dn);
-  temp = fract*temp + d1*Dn;
-
-  /* Calculation of cosine value */
-  *pCosVal = fract*temp + f1;
-  
-  /* Read two nearest values of input value from the cos & sin tables */
-  f1 = sinTable_f32[indexS+0];
-  f2 = sinTable_f32[indexS+1];
-  d1 = sinTable_f32[indexC+0];
-  d2 = sinTable_f32[indexC+1];
-
-  Df = f2 - f1; // delta between the values of the functions
-  temp = Dn*(d1 + d2) - 2*Df;
-  temp = fract*temp + (3*Df - (d2 + 2*d1)*Dn);
-  temp = fract*temp + d1*Dn;
-  
-  /* Calculation of sine value */
-  *pSinVal = fract*temp + f1;
-}
-/**    
- * @} end of SinCos group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c b/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c
deleted file mode 100755
index 5e11b0f9..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sin_cos_q31.c    
-*    
-* Description:	Cosine & Sine calculation for Q31 values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupController    
- */
-
- /**    
- * @addtogroup SinCos    
- * @{    
- */
-
-/**    
- * @brief  Q31 sin_cos function.   
- * @param[in]  theta    scaled input value in degrees    
- * @param[out] *pSinVal points to the processed sine output.    
- * @param[out] *pCosVal points to the processed cosine output.    
- * @return none.   
- *    
- * The Q31 input value is in the range [-1 0.999999] and is mapped to a degree value in the range [-180 179].   
- *    
- */
-
-void arm_sin_cos_q31(
-  q31_t theta,
-  q31_t * pSinVal,
-  q31_t * pCosVal)
-{
-  q31_t fract;                                 /* Temporary variables for input, output */
-  uint16_t indexS, indexC;                     /* Index variable */
-  q31_t f1, f2, d1, d2;                        /* Two nearest output values */
-  q31_t Dn, Df;
-  q63_t temp;
-  
-  /* Calculate the nearest index */
-  indexS = (uint32_t)theta >> CONTROLLER_Q31_SHIFT;
-  indexC = (indexS + 128) & 0x1ff;
-
-  /* Calculation of fractional value */
-  fract = (theta - (indexS << CONTROLLER_Q31_SHIFT)) << 8;
-  
-  /* Read two nearest values of input value from the cos & sin tables */
-  f1 = sinTable_q31[indexC+0];
-  f2 = sinTable_q31[indexC+1];
-  d1 = -sinTable_q31[indexS+0];
-  d2 = -sinTable_q31[indexS+1];
-
-  Dn = 0x1921FB5; // delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE
-  Df = f2 - f1; // delta between the values of the functions
-  temp = Dn*((q63_t)d1 + d2);
-  temp = temp - ((q63_t)Df << 32);
-  temp = (q63_t)fract*(temp >> 31);
-  temp = temp + ((3*(q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1))*Dn);
-  temp = (q63_t)fract*(temp >> 31);
-  temp = temp + (q63_t)d1*Dn;
-  temp = (q63_t)fract*(temp >> 31);
-
-  /* Calculation of cosine value */
-  *pCosVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);
-  
-  /* Read two nearest values of input value from the cos & sin tables */
-  f1 = sinTable_q31[indexS+0];
-  f2 = sinTable_q31[indexS+1];
-  d1 = sinTable_q31[indexC+0];
-  d2 = sinTable_q31[indexC+1];
-
-  Df = f2 - f1; // delta between the values of the functions
-  temp = Dn*((q63_t)d1 + d2);
-  temp = temp - ((q63_t)Df << 32);
-  temp = (q63_t)fract*(temp >> 31);
-  temp = temp + ((3*(q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1))*Dn);
-  temp = (q63_t)fract*(temp >> 31);
-  temp = temp + (q63_t)d1*Dn;
-  temp = (q63_t)fract*(temp >> 31);
-  
-  /* Calculation of sine value */
-  *pSinVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);
-}
-
-/**    
- * @} end of SinCos group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c
deleted file mode 100755
index 890f37af..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c
+++ /dev/null
@@ -1,127 +0,0 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date:        21. September 2015
-* $Revision:    V.1.4.5 a
-*
-* Project:      CMSIS DSP Library
-* Title:        arm_cos_f32.c
-*
-* Description:  Fast cosine calculation for floating-point values.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-/**
- * @ingroup groupFastMath
- */
-
-/**
- * @defgroup cos Cosine
- *
- * Computes the trigonometric cosine function using a combination of table lookup
- * and linear interpolation.  There are separate functions for
- * Q15, Q31, and floating-point data types.
- * The input to the floating-point version is in radians while the
- * fixed-point Q15 and Q31 have a scaled input with the range
- * [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
- * value of 2*pi wraps around to 0.
- *
- * The implementation is based on table lookup using 256 values together with linear interpolation.
- * The steps used are:
- *  -# Calculation of the nearest integer table index
- *  -# Compute the fractional portion (fract) of the table index.
- *  -# The final result equals (1.0f-fract)*a + fract*b;
- *
- * where
- * 
- *    b=Table[index+0];
- *    c=Table[index+1];
- * 

- */
-
- /**
- * @addtogroup cos
- * @{
- */
-
-/**
- * @brief  Fast approximation to the trigonometric cosine function for floating-point data.
- * @param[in] x input value in radians.
- * @return cos(x).
- */
-
-float32_t arm_cos_f32(
-  float32_t x)
-{
-  float32_t cosVal, fract, in;                   /* Temporary variables for input, output */
-  uint16_t index;                                /* Index variable */
-  float32_t a, b;                                /* Two nearest output values */
-  int32_t n;
-  float32_t findex;
-
-  /* input x is in radians */
-  /* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi, add 0.25 (pi/2) to read sine table */
-  in = x * 0.159154943092f + 0.25f;
-
-  /* Calculation of floor value of input */
-  n = (int32_t) in;
-
-  /* Make negative values towards -infinity */
-  if(in < 0.0f)
-  {
-    n--;
-  }
-
-  /* Map input value to [0 1] */
-  in = in - (float32_t) n;
-
-  /* Calculation of index of the table */
-  findex = (float32_t) FAST_MATH_TABLE_SIZE * in;
-  index = ((uint16_t)findex) & 0x1ff;
-
-  /* fractional value calculation */
-  fract = findex - (float32_t) index;
-
-  /* Read two nearest values of input value from the cos table */
-  a = sinTable_f32[index];
-  b = sinTable_f32[index+1];
-
-  /* Linear interpolation process */
-  cosVal = (1.0f-fract)*a + fract*b;
-
-  /* Return the output value */
-  return (cosVal);
-}
-
-/**
- * @} end of cos group
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c
deleted file mode 100755
index cb692683..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date:        07. September 2015
-* $Revision:    V.1.4.5 a
-*
-* Project:      CMSIS DSP Library
-* Title:        arm_cos_q15.c
-*
-* Description:  Fast cosine calculation for Q15 values.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
- * @ingroup groupFastMath
- */
-
- /**
- * @addtogroup cos
- * @{
- */
-
-/**
- * @brief Fast approximation to the trigonometric cosine function for Q15 data.
- * @param[in] x Scaled input value in radians.
- * @return  cos(x).
- *
- * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian
- * value in the range [0 2*pi).
- */
-
-q15_t arm_cos_q15(
-  q15_t x)
-{
-  q15_t cosVal;                                  /* Temporary variables for input, output */
-  int32_t index;                                 /* Index variables */
-  q15_t a, b;                                    /* Four nearest output values */
-  q15_t fract;                                   /* Temporary values for fractional values */
-
-  /* add 0.25 (pi/2) to read sine table */
-  x = (uint16_t)x + 0x2000;
-  if(x < 0)
-  {   /* convert negative numbers to corresponding positive ones */
-      x = (uint16_t)x + 0x8000;
-  }
-
-  /* Calculate the nearest index */
-  index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
-
-  /* Calculation of fractional value */
-  fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
-
-  /* Read two nearest values of input value from the sin table */
-  a = sinTable_q15[index];
-  b = sinTable_q15[index+1];
-
-  /* Linear interpolation process */
-  cosVal = (q31_t)(0x8000-fract)*a >> 16;
-  cosVal = (q15_t)((((q31_t)cosVal << 16) + ((q31_t)fract*b)) >> 16);
-
-  return cosVal << 1;
-}
-
-/**
- * @} end of cos group
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c
deleted file mode 100755
index 72c51e6e..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date:        07. September 2015
-* $Revision:    V.1.4.5 a
-*
-* Project:      CMSIS DSP Library
-* Title:        arm_cos_q31.c
-*
-* Description: Fast cosine calculation for Q31 values.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
- * @ingroup groupFastMath
- */
-
- /**
- * @addtogroup cos
- * @{
- */
-
-/**
- * @brief Fast approximation to the trigonometric cosine function for Q31 data.
- * @param[in] x Scaled input value in radians.
- * @return  cos(x).
- *
- * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian
- * value in the range [0 2*pi).
- */
-
-q31_t arm_cos_q31(
-  q31_t x)
-{
-  q31_t cosVal;                                  /* Temporary variables for input, output */
-  int32_t index;                                 /* Index variables */
-  q31_t a, b;                                    /* Four nearest output values */
-  q31_t fract;                                   /* Temporary values for fractional values */
-
-  /* add 0.25 (pi/2) to read sine table */
-  x = (uint32_t)x + 0x20000000;
-  if(x < 0)
-  {   /* convert negative numbers to corresponding positive ones */
-      x = (uint32_t)x + 0x80000000;
-  }
-
-  /* Calculate the nearest index */
-  index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
-
-  /* Calculation of fractional value */
-  fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
-
-  /* Read two nearest values of input value from the sin table */
-  a = sinTable_q31[index];
-  b = sinTable_q31[index+1];
-
-  /* Linear interpolation process */
-  cosVal = (q63_t)(0x80000000-fract)*a >> 32;
-  cosVal = (q31_t)((((q63_t)cosVal << 32) + ((q63_t)fract*b)) >> 32);
-
-  return cosVal << 1;
-}
-
-/**
- * @} end of cos group
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c
deleted file mode 100755
index 8655cf9b..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date:        21. September 2015
-* $Revision:    V.1.4.5 a
-*
-* Project:      CMSIS DSP Library
-* Title:        arm_sin_f32.c
-*
-* Description:  Fast sine calculation for floating-point values.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-#include 
-
-/**
- * @ingroup groupFastMath
- */
-
-/**
- * @defgroup sin Sine
- *
- * Computes the trigonometric sine function using a combination of table lookup
- * and linear interpolation.  There are separate functions for
- * Q15, Q31, and floating-point data types.
- * The input to the floating-point version is in radians while the
- * fixed-point Q15 and Q31 have a scaled input with the range
- * [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
- * value of 2*pi wraps around to 0.
- *
- * The implementation is based on table lookup using 256 values together with linear interpolation.
- * The steps used are:
- *  -# Calculation of the nearest integer table index
- *  -# Compute the fractional portion (fract) of the table index.
- *  -# The final result equals (1.0f-fract)*a + fract*b;
- *
- * where
- * 
- *    b=Table[index+0];
- *    c=Table[index+1];
- * 

- */
-
-/**
- * @addtogroup sin
- * @{
- */
-
-/**
- * @brief  Fast approximation to the trigonometric sine function for floating-point data.
- * @param[in] x input value in radians.
- * @return  sin(x).
- */
-
-float32_t arm_sin_f32(
-  float32_t x)
-{
-  float32_t sinVal, fract, in;                           /* Temporary variables for input, output */
-  uint16_t index;                                        /* Index variable */
-  float32_t a, b;                                        /* Two nearest output values */
-  int32_t n;
-  float32_t findex;
-
-  /* input x is in radians */
-  /* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi */
-  in = x * 0.159154943092f;
-
-  /* Calculation of floor value of input */
-  n = (int32_t) in;
-
-  /* Make negative values towards -infinity */
-  if(x < 0.0f)
-  {
-    n--;
-  }
-
-  /* Map input value to [0 1] */
-  in = in - (float32_t) n;
-
-  /* Calculation of index of the table */
-  findex = (float32_t) FAST_MATH_TABLE_SIZE * in;
-  if (findex >= 512.0f) {
-    findex -= 512.0f;
-  }
-
-  index = ((uint16_t)findex) & 0x1ff;
-
-  /* fractional value calculation */
-  fract = findex - (float32_t) index;
-
-  /* Read two nearest values of input value from the sin table */
-  a = sinTable_f32[index];
-  b = sinTable_f32[index+1];
-
-  /* Linear interpolation process */
-  sinVal = (1.0f-fract)*a + fract*b;
-
-  /* Return the output value */
-  return (sinVal);
-}
-
-/**
- * @} end of sin group
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c
deleted file mode 100755
index e2209b39..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sin_q15.c    
-*    
-* Description:	Fast sine calculation for Q15 values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupFastMath    
- */
-
- /**    
- * @addtogroup sin    
- * @{    
- */
-
-/**   
- * @brief Fast approximation to the trigonometric sine function for Q15 data.   
- * @param[in] x Scaled input value in radians.   
- * @return  sin(x).   
- *   
- * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi).
- */
-
-q15_t arm_sin_q15(
-  q15_t x)
-{
-  q15_t sinVal;                                  /* Temporary variables for input, output */
-  int32_t index;                                 /* Index variables */
-  q15_t a, b;                                    /* Four nearest output values */
-  q15_t fract;                                   /* Temporary values for fractional values */
-
-  /* Calculate the nearest index */
-  index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
-
-  /* Calculation of fractional value */
-  fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
-
-  /* Read two nearest values of input value from the sin table */
-  a = sinTable_q15[index];
-  b = sinTable_q15[index+1];
-
-  /* Linear interpolation process */
-  sinVal = (q31_t)(0x8000-fract)*a >> 16;
-  sinVal = (q15_t)((((q31_t)sinVal << 16) + ((q31_t)fract*b)) >> 16);
-
-  return sinVal << 1;
-}
-
-/**    
- * @} end of sin group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c
deleted file mode 100755
index 606ab66d..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c
+++ /dev/null
@@ -1,87 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sin_q31.c    
-*    
-* Description:	Fast sine calculation for Q31 values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupFastMath    
- */
-
- /**    
- * @addtogroup sin    
- * @{    
- */
-
-/**   
- * @brief Fast approximation to the trigonometric sine function for Q31 data.
- * @param[in] x Scaled input value in radians.
- * @return  sin(x).
- *
- * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi). */
-
-q31_t arm_sin_q31(
-  q31_t x)
-{
-  q31_t sinVal;                                  /* Temporary variables for input, output */
-  int32_t index;                                 /* Index variables */
-  q31_t a, b;                                    /* Four nearest output values */
-  q31_t fract;                                   /* Temporary values for fractional values */
-
-  /* Calculate the nearest index */
-  index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
-
-  /* Calculation of fractional value */
-  fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
-
-  /* Read two nearest values of input value from the sin table */
-  a = sinTable_q31[index];
-  b = sinTable_q31[index+1];
-
-  /* Linear interpolation process */
-  sinVal = (q63_t)(0x80000000-fract)*a >> 32;
-  sinVal = (q31_t)((((q63_t)sinVal << 32) + ((q63_t)fract*b)) >> 32);
-
-  return sinVal << 1;
-}
-
-/**    
- * @} end of sin group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c
deleted file mode 100755
index 3085decc..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c
+++ /dev/null
@@ -1,155 +0,0 @@
-/* ----------------------------------------------------------------------     
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.  
-*     
-* $Date:        19. October 2015
-* $Revision: 	V.1.4.5 a
-*     
-* Project:      CMSIS DSP Library  
-* Title:		arm_sqrt_q15.c     
-*     
-* Description:	Q15 square root function.    
-*     
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-
-/**     
- * @ingroup groupFastMath     
- */
-
-/**     
- * @addtogroup SQRT     
- * @{     
- */
-
-  /**    
-   * @brief  Q15 square root function.    
-   * @param[in]   in     input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF.    
-   * @param[out]  *pOut  square root of input value.    
-   * @return The function returns ARM_MATH_SUCCESS if the input value is positive
-   * and ARM_MATH_ARGUMENT_ERROR if the input is negative.  For
-   * negative inputs, the function returns *pOut = 0.
-   */
-
-arm_status arm_sqrt_q15(
-  q15_t in,
-  q15_t * pOut)
-{
-  q15_t number, temp1, var1, signBits1, half;
-  q31_t bits_val1;
-  float32_t temp_float1;
-  union
-  {
-    q31_t fracval;
-    float32_t floatval;
-  } tempconv;
-
-  number = in;
-
-  /* If the input is a positive number then compute the signBits. */
-  if(number > 0)
-  {
-    signBits1 = __CLZ(number) - 17;
-
-    /* Shift by the number of signBits1 */
-    if((signBits1 % 2) == 0)
-    {
-      number = number << signBits1;
-    }
-    else
-    {
-      number = number << (signBits1 - 1);
-    }
-
-    /* Calculate half value of the number */
-    half = number >> 1;
-    /* Store the number for later use */
-    temp1 = number;
-
-    /* Convert to float */
-    temp_float1 = number * 3.051757812500000e-005f;
-    /*Store as integer */
-    tempconv.floatval = temp_float1;
-    bits_val1 = tempconv.fracval;
-    /* Subtract the shifted value from the magic number to give intial guess */
-    bits_val1 = 0x5f3759df - (bits_val1 >> 1);  /* gives initial guess */
-    /* Store as float */
-    tempconv.fracval = bits_val1;
-    temp_float1 = tempconv.floatval;
-    /* Convert to integer format */
-    var1 = (q31_t) (temp_float1 * 16384);
-
-    /* 1st iteration */
-    var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
-                                     ((q15_t)
-                                      ((((q15_t)
-                                         (((q31_t) var1 * var1) >> 15)) *
-                                        (q31_t) half) >> 15))) >> 15)) << 2;
-    /* 2nd iteration */
-    var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
-                                     ((q15_t)
-                                      ((((q15_t)
-                                         (((q31_t) var1 * var1) >> 15)) *
-                                        (q31_t) half) >> 15))) >> 15)) << 2;
-    /* 3rd iteration */
-    var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
-                                     ((q15_t)
-                                      ((((q15_t)
-                                         (((q31_t) var1 * var1) >> 15)) *
-                                        (q31_t) half) >> 15))) >> 15)) << 2;
-
-    /* Multiply the inverse square root with the original value */
-    var1 = ((q15_t) (((q31_t) temp1 * var1) >> 15)) << 1;
-
-    /* Shift the output down accordingly */
-    if((signBits1 % 2) == 0)
-    {
-      var1 = var1 >> (signBits1 / 2);
-    }
-    else
-    {
-      var1 = var1 >> ((signBits1 - 1) / 2);
-    }
-    *pOut = var1;
-
-    return (ARM_MATH_SUCCESS);
-  }
-  /* If the number is a negative number then store zero as its square root value */
-  else
-  {
-    *pOut = 0;
-    return (ARM_MATH_ARGUMENT_ERROR);
-  }
-}
-
-/**     
- * @} end of SQRT group     
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c
deleted file mode 100755
index a9a0bf48..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/* ----------------------------------------------------------------------     
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.  
-*     
-* $Date:        19. October 2015
-* $Revision: 	V.1.4.5 a
-*     
-* Project:      CMSIS DSP Library  
-* Title:		arm_sqrt_q31.c     
-*     
-* Description:	Q31 square root function.    
-*     
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**     
- * @ingroup groupFastMath     
- */
-
-/**     
- * @addtogroup SQRT     
- * @{     
- */
-
-/**    
- * @brief Q31 square root function.    
- * @param[in]   in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.    
- * @param[out]  *pOut square root of input value.    
- * @return The function returns ARM_MATH_SUCCESS if the input value is positive
- * and ARM_MATH_ARGUMENT_ERROR if the input is negative.  For
- * negative inputs, the function returns *pOut = 0.
- */
-
-arm_status arm_sqrt_q31(
-  q31_t in,
-  q31_t * pOut)
-{
-  q31_t number, temp1, bits_val1, var1, signBits1, half;
-  float32_t temp_float1;
-  union
-  {
-      q31_t fracval;
-      float32_t floatval;
-  } tempconv;
-
-  number = in;
-
-  /* If the input is a positive number then compute the signBits. */
-  if(number > 0)
-  {
-    signBits1 = __CLZ(number) - 1;
-
-    /* Shift by the number of signBits1 */
-    if((signBits1 % 2) == 0)
-    {
-      number = number << signBits1;
-    }
-    else
-    {
-      number = number << (signBits1 - 1);
-    }
-
-    /* Calculate half value of the number */
-    half = number >> 1;
-    /* Store the number for later use */
-    temp1 = number;
-
-    /*Convert to float */
-    temp_float1 = number * 4.6566128731e-010f;
-    /*Store as integer */
-    tempconv.floatval = temp_float1;
-    bits_val1 = tempconv.fracval;
-    /* Subtract the shifted value from the magic number to give intial guess */
-    bits_val1 = 0x5f3759df - (bits_val1 >> 1);  /* gives initial guess */
-    /* Store as float */
-    tempconv.fracval = bits_val1;
-    temp_float1 = tempconv.floatval;
-    /* Convert to integer format */
-    var1 = (q31_t) (temp_float1 * 1073741824);
-
-    /* 1st iteration */
-    var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
-                                     ((q31_t)
-                                      ((((q31_t)
-                                         (((q63_t) var1 * var1) >> 31)) *
-                                        (q63_t) half) >> 31))) >> 31)) << 2;
-    /* 2nd iteration */
-    var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
-                                     ((q31_t)
-                                      ((((q31_t)
-                                         (((q63_t) var1 * var1) >> 31)) *
-                                        (q63_t) half) >> 31))) >> 31)) << 2;
-    /* 3rd iteration */
-    var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
-                                     ((q31_t)
-                                      ((((q31_t)
-                                         (((q63_t) var1 * var1) >> 31)) *
-                                        (q63_t) half) >> 31))) >> 31)) << 2;
-
-    /* Multiply the inverse square root with the original value */
-    var1 = ((q31_t) (((q63_t) temp1 * var1) >> 31)) << 1;
-
-    /* Shift the output down accordingly */
-    if((signBits1 % 2) == 0)
-    {
-      var1 = var1 >> (signBits1 / 2);
-    }
-    else
-    {
-      var1 = var1 >> ((signBits1 - 1) / 2);
-    }
-    *pOut = var1;
-
-    return (ARM_MATH_SUCCESS);
-  }
-  /* If the number is a negative number then store zero as its square root value */
-  else
-  {
-    *pOut = 0;
-    return (ARM_MATH_ARGUMENT_ERROR);
-  }
-}
-
-/**     
- * @} end of SQRT group     
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
deleted file mode 100755
index 9f4ab2ff..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_32x64_init_q31.c    
-*    
-* Description:	High precision Q31 Biquad cascade filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1_32x64    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in,out] *S           	points to an instance of the high precision Q31 Biquad cascade filter structure.    
- * @param[in]     numStages     number of 2nd order stages in the filter.    
- * @param[in]     *pCoeffs      points to the filter coefficients.    
- * @param[in]     *pState       points to the state buffer.    
- * @param[in]     postShift     Shift to be applied after the accumulator.  Varies according to the coefficients format.    
- * @return        none    
- *    
- * Coefficient and State Ordering:    
- *    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 5*numStages values.    
- *    
- * \par    
- * The pState points to state variables array and size of each state variable is 1.63 format.    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].    
- * The state variables are arranged in the state array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- */
-
-void arm_biquad_cas_df1_32x64_init_q31(
-  arm_biquad_cas_df1_32x64_ins_q31 * S,
-  uint8_t numStages,
-  q31_t * pCoeffs,
-  q63_t * pState,
-  uint8_t postShift)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign postShift to be applied to the output */
-  S->postShift = postShift;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q63_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF1_32x64 group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
deleted file mode 100755
index a44d10d5..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
+++ /dev/null
@@ -1,561 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. October 2015
-* $Revision: 	V.1.4.5 a
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_32x64_q31.c    
-*    
-* Description:	High precision Q31 Biquad cascade filter processing function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup BiquadCascadeDF1_32x64 High Precision Q31 Biquad Cascade Filter    
- *    
- * This function implements a high precision Biquad cascade filter which operates on    
- * Q31 data values.  The filter coefficients are in 1.31 format and the state variables    
- * are in 1.63 format.  The double precision state variables reduce quantization noise    
- * in the filter and provide a cleaner output.    
- * These filters are particularly useful when implementing filters in which the    
- * singularities are close to the unit circle.  This is common for low pass or high    
- * pass filters with very low cutoff frequencies.    
- *    
- * The function operates on blocks of input and output data    
- * and each call to the function processes blockSize samples through    
- * the filter. pSrc and pDst points to input and output arrays    
- * containing blockSize Q31 values.    
- *    
- * \par Algorithm    
- * Each Biquad stage implements a second order filter using the difference equation:    
- * 
    
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
- * 
    
- * A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.    
- * \image html Biquad.gif "Single Biquad filter stage"    
- * Coefficients b0, b1, and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.    
- * Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.    
- * Pay careful attention to the sign of the feedback coefficients.    
- * Some design tools use the difference equation    
- * 
    
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]    
- * 
    
- * In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.    
- *    
- * \par    
- * Higher order filters are realized as a cascade of second order sections.    
- * numStages refers to the number of second order stages used.    
- * For example, an 8th order filter would be realized with numStages=4 second order stages.    
- * \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"    
- * A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).    
- *    
- * \par    
- * The pState points to state variables array .    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2] and each state variable in 1.63 format to improve precision.    
- * The state variables are arranged in the array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- *    
- * \par    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values of data in 1.63 format.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- *    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.    
- *    
- * \par Init Function    
- * There is also an associated initialization function which performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numStages, pCoeffs, postShift, pState. Also set all of the values in pState to zero. 
- *
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros before static initialization.    
- * For example, to statically initialize the filter instance structure use    
- * 
    
- *     arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};    
- * 
    
- * where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer;    
- * pCoeffs is the address of the coefficient buffer; postShift shift to be applied which is described in detail below.    
- * \par Fixed-Point Behavior    
- * Care must be taken while using Biquad Cascade 32x64 filter function.    
- * Following issues must be considered:    
- * - Scaling of coefficients    
- * - Filter gain    
- * - Overflow and saturation    
- *    
- * \par    
- * Filter coefficients are represented as fractional values and    
- * restricted to lie in the range [-1 +1).    
- * The processing function has an additional scaling parameter postShift    
- * which allows the filter coefficients to exceed the range [+1 -1).    
- * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.    
- * \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"    
- * This essentially scales the filter coefficients by 2^postShift.    
- * For example, to realize the coefficients    
- * 
    
- *    {1.5, -0.8, 1.2, 1.6, -0.9}    
- * 
    
- * set the Coefficient array to:    
- * 
    
- *    {0.75, -0.4, 0.6, 0.8, -0.45}    
- * 
    
- * and set postShift=1    
- *    
- * \par    
- * The second thing to keep in mind is the gain through the filter.    
- * The frequency response of a Biquad filter is a function of its coefficients.    
- * It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.    
- * This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.    
- * To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.    
- *    
- * \par    
- * The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version.    
- * This is described in the function specific documentation below.    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1_32x64    
- * @{    
- */
-
-/**    
- * @details    
-    
- * @param[in]  *S points to an instance of the high precision Q31 Biquad cascade filter.    
- * @param[in]  *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in]  blockSize number of samples to process.    
- * @return none.    
- *    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).    
- * After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to    
- * 1.31 format by discarding the low 32 bits.    
- *    
- * \par    
- * Two related functions are provided in the CMSIS DSP library.    
- * arm_biquad_cascade_df1_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator.    
- * arm_biquad_cascade_df1_fast_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator.    
- */
-
-void arm_biquad_cas_df1_32x64_q31(
-  const arm_biquad_cas_df1_32x64_ins_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pIn = pSrc;                             /*  input pointer initialization  */
-  q31_t *pOut = pDst;                            /*  output pointer initialization */
-  q63_t *pState = S->pState;                     /*  state pointer initialization  */
-  q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
-  q63_t acc;                                     /*  accumulator                   */
-  q31_t Xn1, Xn2;                                /*  Input Filter state variables        */
-  q63_t Yn1, Yn2;                                /*  Output Filter state variables        */
-  q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q31_t Xn;                                      /*  temporary input               */
-  int32_t shift = (int32_t) S->postShift + 1;    /*  Shift to be applied to the output */
-  uint32_t sample, stage = S->numStages;         /*  loop counters                     */
-  q31_t acc_l, acc_h;                            /*  temporary output               */
-  uint32_t uShift = ((uint32_t) S->postShift + 1u);
-  uint32_t lShift = 32u - uShift;                /*  Shift to be applied to the output */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = (q31_t) (pState[0]);
-    Xn2 = (q31_t) (pState[1]);
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /* The variable acc hold output value that is being computed and    
-     * stored in the destination buffer    
-     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
-     */
-
-    sample = blockSize >> 2u;
-
-    /* First part of the processing with loop unrolling. Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn *b0;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 *b1;
-
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 *b2;
-
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn1, a1);
-
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn2, a2);
-
-      /* The result is converted to 1.63 , Yn2 variable is reused */
-      Yn2 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *pOut = acc_h;
-
-      /* Read the second input into Xn2, to reuse the value */
-      Xn2 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc +=  b1 * x[n-1] */
-      acc = (q63_t) Xn *b1;
-
-      /* acc =  b0 * x[n] */
-      acc += (q63_t) Xn2 *b0;
-
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn1 *b2;
-
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn2, a1);
-
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn1, a2);
-
-      /* The result is converted to 1.63, Yn1 variable is reused */
-      Yn1 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Read the third input into Xn1, to reuse the value */
-      Xn1 = *pIn++;
-
-      /* The result is converted to 1.31 */
-      /* Store the output in the destination buffer. */
-      *(pOut + 1u) = acc_h;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn1 *b0;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn2 *b1;
-
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn *b2;
-
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn1, a1);
-
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn2, a2);
-
-      /* The result is converted to 1.63, Yn2 variable is reused  */
-      Yn2 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *(pOut + 2u) = acc_h;
-
-      /* Read the fourth input into Xn, to reuse the value */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn *b0;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 *b1;
-
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 *b2;
-
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn2, a1);
-
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn1, a2);
-
-      /* The result is converted to 1.63, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *(pOut + 3u) = acc_h;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-
-      /* update output pointer */
-      pOut += 4u;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    sample = (blockSize & 0x3u);
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn *b0;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 *b1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 *b2;
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn1, a1);
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn2, a2);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      /* The result is converted to 1.63, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *pOut++ = acc_h;
-      /* Yn1 = acc << shift; */
-
-      /* Store the output in the destination buffer in 1.31 format. */
-/*      *pOut++ = (q31_t) (acc >> (32 - shift));  */
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage output is given as input to the second stage. */
-    pIn = pDst;
-
-    /* Reset to destination buffer working pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = (q63_t) Xn1;
-    *pState++ = (q63_t) Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* The variable acc hold output value that is being computed and        
-     * stored in the destination buffer            
-     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]            
-     */
-
-    sample = blockSize;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn *b0;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 *b1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 *b2;
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn1, a1);
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn2, a2);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-
-      /* The result is converted to 1.63, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *pOut++ = acc_h;
-
-      /* Yn1 = acc << shift; */
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      /* *pOut++ = (q31_t) (acc >> (32 - shift)); */
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage output is given as input to the second stage. */
-    pIn = pDst;
-
-    /* Reset to destination buffer working pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = (q63_t) Xn1;
-    *pState++ = (q63_t) Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-
-#endif /*    #ifndef ARM_MATH_CM0_FAMILY     */
-}
-
-  /**    
-   * @} end of BiquadCascadeDF1_32x64 group    
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
deleted file mode 100755
index 83e9f767..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
+++ /dev/null
@@ -1,425 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_f32.c    
-*    
-* Description:	Processing function for the    
-*               floating-point Biquad cascade DirectFormI(DF1) filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I Structure    
- *    
- * This set of functions implements arbitrary order recursive (IIR) filters.    
- * The filters are implemented as a cascade of second order Biquad sections.    
- * The functions support Q15, Q31 and floating-point data types.  
- * Fast version of Q15 and Q31 also supported on CortexM4 and Cortex-M3.    
- *    
- * The functions operate on blocks of input and output data and each call to the function    
- * processes blockSize samples through the filter.    
- * pSrc points to the array of input data and    
- * pDst points to the array of output data.    
- * Both arrays contain blockSize values.    
- *    
- * \par Algorithm    
- * Each Biquad stage implements a second order filter using the difference equation:    
- * 
    
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
- * 
    
- * A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.    
- * \image html Biquad.gif "Single Biquad filter stage"    
- * Coefficients b0, b1 and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.    
- * Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.    
- * Pay careful attention to the sign of the feedback coefficients.    
- * Some design tools use the difference equation    
- * 
    
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]    
- * 
    
- * In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.    
- *    
- * \par    
- * Higher order filters are realized as a cascade of second order sections.    
- * numStages refers to the number of second order stages used.    
- * For example, an 8th order filter would be realized with numStages=4 second order stages.    
- * \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"    
- * A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).    
- *    
- * \par    
- * The pState points to state variables array.    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].    
- * The state variables are arranged in the pState array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- *    
- * \par    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values.    
- * The state variables are updated after each block of data is processed, the coefficients are untouched.    
- *    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Init Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numStages, pCoeffs, pState. Also set all of the values in pState to zero. 
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros before static initialization.    
- * The code below statically initializes each of the 3 different data type filter instance structures    
- * 
    
- *     arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};    
- *     arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};    
- *     arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};    
- * 
    
- * where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer;    
- * pCoeffs is the address of the coefficient buffer; postShift shift to be applied.    
- *    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions.    
- * Following issues must be considered:    
- * - Scaling of coefficients    
- * - Filter gain    
- * - Overflow and saturation    
- *    
- * \par    
- * Scaling of coefficients:     
- * Filter coefficients are represented as fractional values and    
- * coefficients are restricted to lie in the range [-1 +1).    
- * The fixed-point functions have an additional scaling parameter postShift    
- * which allow the filter coefficients to exceed the range [+1 -1).    
- * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.    
- * \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"    
- * This essentially scales the filter coefficients by 2^postShift.    
- * For example, to realize the coefficients    
- * 
    
- *    {1.5, -0.8, 1.2, 1.6, -0.9}    
- * 
    
- * set the pCoeffs array to:    
- * 
    
- *    {0.75, -0.4, 0.6, 0.8, -0.45}    
- * 
    
- * and set postShift=1    
- *    
- * \par    
- * Filter gain:     
- * The frequency response of a Biquad filter is a function of its coefficients.    
- * It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.    
- * This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.    
- * To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.    
- *    
- * \par    
- * Overflow and saturation:     
- * For Q15 and Q31 versions, it is described separately as part of the function specific documentation below.    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @param[in]  *S         points to an instance of the floating-point Biquad cascade structure.    
- * @param[in]  *pSrc      points to the block of input data.    
- * @param[out] *pDst      points to the block of output data.    
- * @param[in]  blockSize  number of samples to process per call.    
- * @return     none.    
- *    
- */
-
-void arm_biquad_cascade_df1_f32(
-  const arm_biquad_casd_df1_inst_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pIn = pSrc;                         /*  source pointer            */
-  float32_t *pOut = pDst;                        /*  destination pointer       */
-  float32_t *pState = S->pState;                 /*  pState pointer            */
-  float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-  float32_t acc;                                 /*  Simulates the accumulator */
-  float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-  float32_t Xn1, Xn2, Yn1, Yn2;                  /*  Filter pState variables   */
-  float32_t Xn;                                  /*  temporary input           */
-  uint32_t sample, stage = S->numStages;         /*  loop counters             */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the pState values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:    
-     *    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]    
-     */
-
-    sample = blockSize >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(sample > 0u)
-    {
-      /* Read the first input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = Yn2;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-
-      /* Read the second input */
-      Xn2 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = Yn1;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-
-      /* Read the third input */
-      Xn1 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = Yn2;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as: */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-
-      /* Read the forth input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = Yn1;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-
-      /* decrement the loop counter */
-      sample--;
-
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    sample = blockSize & 0x3u;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:    */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = acc;
-
-      /* decrement the loop counter */
-      sample--;
-
-    }
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent numStages  occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset the output pointer */
-    pOut = pDst;
-
-    /* decrement the loop counter */
-    stage--;
-
-  } while(stage > 0u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the pState values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /*      The variables acc holds the output value that is computed:        
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]        
-     */
-
-    sample = blockSize;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:    */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = acc;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent numStages  occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset the output pointer */
-    pOut = pDst;
-
-    /* decrement the loop counter */
-    stage--;
-
-  } while(stage > 0u);
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY         */
-
-}
-
-
-  /**    
-   * @} end of BiquadCascadeDF1 group    
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
deleted file mode 100755
index a637b037..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
+++ /dev/null
@@ -1,286 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_fast_q15.c    
-*    
-* Description:	Fast processing function for the    
-*				Q15 Biquad cascade filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @details    
- * @param[in]  *S points to an instance of the Q15 Biquad cascade structure.    
- * @param[in]  *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in]  blockSize number of samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * This fast version uses a 32-bit accumulator with 2.30 format.    
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around and distorts the result.    
- * In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25).    
- * The 2.30 accumulator is then shifted by postShift bits and the result truncated to 1.15 format by discarding the low 16 bits.    
- *    
- * \par    
- * Refer to the function arm_biquad_cascade_df1_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.  Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_biquad_cascade_df1_init_q15() to initialize the filter structure.    
- *    
- */
-
-void arm_biquad_cascade_df1_fast_q15(
-  const arm_biquad_casd_df1_inst_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pIn = pSrc;                             /*  Source pointer                               */
-  q15_t *pOut = pDst;                            /*  Destination pointer                          */
-  q31_t in;                                      /*  Temporary variable to hold input value       */
-  q31_t out;                                     /*  Temporary variable to hold output value      */
-  q31_t b0;                                      /*  Temporary variable to hold bo value          */
-  q31_t b1, a1;                                  /*  Filter coefficients                          */
-  q31_t state_in, state_out;                     /*  Filter state variables                       */
-  q31_t acc;                                     /*  Accumulator                                  */
-  int32_t shift = (int32_t) (15 - S->postShift); /*  Post shift                                   */
-  q15_t *pState = S->pState;                     /*  State pointer                                */
-  q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
-  uint32_t sample, stage = S->numStages;         /*  Stage loop counter                           */
-
-
-
-  do
-  {
-
-    /* Read the b0 and 0 coefficients using SIMD  */
-    b0 = *__SIMD32(pCoeffs)++;
-
-    /* Read the b1 and b2 coefficients using SIMD */
-    b1 = *__SIMD32(pCoeffs)++;
-
-    /* Read the a1 and a2 coefficients using SIMD */
-    a1 = *__SIMD32(pCoeffs)++;
-
-    /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
-    state_in = *__SIMD32(pState)++;
-
-    /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
-    state_out = *__SIMD32(pState)--;
-
-    /* Apply loop unrolling and compute 2 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:       
-     *    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]       
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]       
-     */
-    sample = blockSize >> 1u;
-
-    /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.    
-     ** a second loop below computes the remaining 1 sample. */
-    while(sample > 0u)
-    {
-
-      /* Read the input */
-      in = *__SIMD32(pIn)++;
-
-      /* out =  b0 * x[n] + 0 * 0 */
-      out = __SMUAD(b0, in);
-      /* acc =  b1 * x[n-1] + acc +=  b2 * x[n-2] + out */
-      acc = __SMLAD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
-      acc = __SMLAD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
-      out = __SSAT((acc >> shift), 16);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
-      state_out = __PKHBT(state_out >> 16, (out), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* out =  b0 * x[n] + 0 * 0 */
-      out = __SMUADX(b0, in);
-      /* acc0 =  b1 * x[n-1] , acc0 +=  b2 * x[n-2] + out */
-      acc = __SMLAD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
-      acc = __SMLAD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
-      out = __SSAT((acc >> shift), 16);
-
-
-      /* Store the output in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16);
-
-#else
-
-      *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in >> 16, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-
-      /* Decrement the loop counter */
-      sample--;
-
-    }
-
-    /* If the blockSize is not a multiple of 2, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-
-    if((blockSize & 0x1u) != 0u)
-    {
-      /* Read the input */
-      in = *pIn++;
-
-      /* out =  b0 * x[n] + 0 * 0 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      out = __SMUAD(b0, in);
-
-#else
-
-      out = __SMUADX(b0, in);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* acc =  b1 * x[n-1], acc +=  b2 * x[n-2] + out */
-      acc = __SMLAD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
-      acc = __SMLAD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
-      out = __SSAT((acc >> shift), 16);
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q15_t) out;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
-
-#endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    }
-
-    /*  The first stage goes from the input buffer to the output buffer.  */
-    /*  Subsequent (numStages - 1) occur in-place in the output buffer  */
-    pIn = pDst;
-
-    /* Reset the output pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the state array */
-    *__SIMD32(pState)++ = state_in;
-    *__SIMD32(pState)++ = state_out;
-
-
-    /* Decrement the loop counter */
-    stage--;
-
-  } while(stage > 0u);
-}
-
-
-/**    
- * @} end of BiquadCascadeDF1 group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
deleted file mode 100755
index b135b2ef..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
+++ /dev/null
@@ -1,305 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. October 2015
-* $Revision: 	V.1.4.5 a
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_fast_q31.c    
-*    
-* Description:	Processing function for the    
-*				Q31 Fast Biquad cascade DirectFormI(DF1) filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in]  *S        points to an instance of the Q31 Biquad cascade structure.    
- * @param[in]  *pSrc     points to the block of input data.    
- * @param[out] *pDst     points to the block of output data.    
- * @param[in]  blockSize number of samples to process per call.    
- * @return 	   none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.    
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.    
- * These intermediate results are added to a 2.30 accumulator.    
- * Finally, the accumulator is saturated and converted to a 1.31 result.    
- * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function    
- * arm_biquad_cascade_df1_init_q31() to initialize filter structure.    
- *    
- * \par    
- * Refer to the function arm_biquad_cascade_df1_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.  Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_biquad_cascade_df1_init_q31() to initialize the filter structure.    
- */
-
-void arm_biquad_cascade_df1_fast_q31(
-  const arm_biquad_casd_df1_inst_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t acc = 0;                                 /*  accumulator                   */
-  q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
-  q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q31_t *pIn = pSrc;                             /*  input pointer initialization  */
-  q31_t *pOut = pDst;                            /*  output pointer initialization */
-  q31_t *pState = S->pState;                     /*  pState pointer initialization */
-  q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
-  q31_t Xn;                                      /*  temporary input               */
-  int32_t shift = (int32_t) S->postShift + 1;    /*  Shift to be applied to the output */
-  uint32_t sample, stage = S->numStages;         /*  loop counters                     */
-
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /*      The variables acc ... acc3 hold output values that are being computed:       
-     *       
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]       
-     */
-
-    sample = blockSize >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      /*acc = (q31_t) (((q63_t) b1 * Xn1) >> 32);*/
-      mult_32x32_keep32_R(acc, b1, Xn1);
-      /* acc +=  b1 * x[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b0 * (Xn))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b0, Xn);
-      /* acc +=  b[2] * x[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b2, Xn2);
-      /* acc +=  a1 * y[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a1, Yn1);
-      /* acc +=  a2 * y[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a2, Yn2);
-
-      /* The result is converted to 1.31 , Yn2 variable is reused */
-      Yn2 = acc << shift;
-
-      /* Read the second input */
-      Xn2 = *(pIn + 1u);
-
-      /* Store the output in the destination buffer. */
-      *pOut = Yn2;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      /*acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);*/
-      mult_32x32_keep32_R(acc, b0, Xn2);
-      /* acc +=  b1 * x[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b1, Xn);
-      /* acc +=  b[2] * x[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b2, Xn1);
-      /* acc +=  a1 * y[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a1, Yn2);
-      /* acc +=  a2 * y[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a2, Yn1);
-
-      /* The result is converted to 1.31, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Read the third input  */
-      Xn1 = *(pIn + 2u);
-
-      /* Store the output in the destination buffer. */
-      *(pOut + 1u) = Yn1;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      /*acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);*/
-      mult_32x32_keep32_R(acc, b0, Xn1);
-      /* acc +=  b1 * x[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b1, Xn2);
-      /* acc +=  b[2] * x[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b2, Xn);
-      /* acc +=  a1 * y[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a1, Yn1);
-      /* acc +=  a2 * y[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a2, Yn2);
-
-      /* The result is converted to 1.31, Yn2 variable is reused  */
-      Yn2 = acc << shift;
-
-      /* Read the forth input */
-      Xn = *(pIn + 3u);
-
-      /* Store the output in the destination buffer. */
-      *(pOut + 2u) = Yn2;
-      pIn += 4u;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      /*acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/
-      mult_32x32_keep32_R(acc, b0, Xn);
-      /* acc +=  b1 * x[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b1, Xn1);
-      /* acc +=  b[2] * x[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b2, Xn2);
-      /* acc +=  a1 * y[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a1, Yn2);
-      /* acc +=  a2 * y[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a2, Yn1);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      Xn2 = Xn1;
-
-      /* The result is converted to 1.31, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Xn1 = Xn     */
-      Xn1 = Xn;
-
-      /* Store the output in the destination buffer. */
-      *(pOut + 3u) = Yn1;
-      pOut += 4u;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.       
-     ** No loop unrolling is used. */
-    sample = (blockSize & 0x3u);
-
-   while(sample > 0u)
-   {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      /*acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/
-      mult_32x32_keep32_R(acc, b0, Xn);
-      /* acc +=  b1 * x[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b1, Xn1);
-      /* acc +=  b[2] * x[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b2, Xn2);
-      /* acc +=  a1 * y[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a1, Yn1);
-      /* acc +=  a2 * y[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a2, Yn2);
-
-      /* The result is converted to 1.31  */
-      acc = acc << shift;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = acc;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = acc;
-
-      /* decrement the loop counter */
-      sample--;
-   }
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent stages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset to destination pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-}
-
-/**    
-  * @} end of BiquadCascadeDF1 group    
-  */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
deleted file mode 100755
index fab57d6d..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df1_init_f32.c    
-*    
-* Description:  floating-point Biquad cascade DirectFormI(DF1) filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @details    
- * @brief  Initialization function for the floating-point Biquad cascade filter.    
- * @param[in,out] *S           points to an instance of the floating-point Biquad cascade structure.    
- * @param[in]     numStages    number of 2nd order stages in the filter.    
- * @param[in]     *pCoeffs     points to the filter coefficients array.    
- * @param[in]     *pState      points to the state array.    
- * @return        none    
- *    
- *    
- * Coefficient and State Ordering:    
- *    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
    
- *    
- * \par    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 5*numStages values.    
- *    
- * \par    
- * The pState is a pointer to state array.    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].    
- * The state variables are arranged in the pState array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- *    
- */
-
-void arm_biquad_cascade_df1_init_f32(
-  arm_biquad_casd_df1_inst_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF1 group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
deleted file mode 100755
index 0dbb6d1c..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df1_init_q15.c    
-*    
-* Description:  Q15 Biquad cascade DirectFormI(DF1) filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in,out] *S           points to an instance of the Q15 Biquad cascade structure.    
- * @param[in]     numStages    number of 2nd order stages in the filter.    
- * @param[in]     *pCoeffs     points to the filter coefficients.    
- * @param[in]     *pState      points to the state buffer.    
- * @param[in]     postShift    Shift to be applied to the accumulator result. Varies according to the coefficients format    
- * @return        none    
- *    
- * Coefficient and State Ordering:    
- *    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}    
- * 
    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 6*numStages values.    
- * The zero coefficient between b1 and b2 facilities  use of 16-bit SIMD instructions on the Cortex-M4.    
- *    
- * \par    
- * The state variables are stored in the array pState.    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].    
- * The state variables are arranged in the pState array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- */
-
-void arm_biquad_cascade_df1_init_q15(
-  arm_biquad_casd_df1_inst_q15 * S,
-  uint8_t numStages,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  int8_t postShift)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign postShift to be applied to the output */
-  S->postShift = postShift;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF1 group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
deleted file mode 100755
index 96ae6f9f..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_init_q31.c    
-*    
-* Description:	Q31 Biquad cascade DirectFormI(DF1) filter initialization function.    
-*    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in,out] *S           points to an instance of the Q31 Biquad cascade structure.    
- * @param[in]     numStages    number of 2nd order stages in the filter.    
- * @param[in]     *pCoeffs     points to the filter coefficients buffer.    
- * @param[in]     *pState      points to the state buffer.    
- * @param[in]     postShift    Shift to be applied after the accumulator.  Varies according to the coefficients format    
- * @return        none    
- *    
- * Coefficient and State Ordering:    
- *    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 5*numStages values.    
- *    
- * \par    
- * The pState points to state variables array.    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].    
- * The state variables are arranged in the pState array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- */
-
-void arm_biquad_cascade_df1_init_q31(
-  arm_biquad_casd_df1_inst_q31 * S,
-  uint8_t numStages,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  int8_t postShift)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign postShift to be applied to the output */
-  S->postShift = postShift;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF1 group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
deleted file mode 100755
index 8cfc5340..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
+++ /dev/null
@@ -1,411 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_q15.c    
-*    
-* Description:	Processing function for the    
-*				Q15 Biquad cascade DirectFormI(DF1) filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 Biquad cascade filter.    
- * @param[in]  *S points to an instance of the Q15 Biquad cascade structure.    
- * @param[in]  *pSrc points to the block of input data.    
- * @param[out] *pDst points to the location where the output result is written.    
- * @param[in]  blockSize number of samples to process per call.    
- * @return none.    
- *    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * The accumulator is then shifted by postShift bits to truncate the result to 1.15 format by discarding the low 16 bits.    
- * Finally, the result is saturated to 1.15 format.    
- *    
- * \par    
- * Refer to the function arm_biquad_cascade_df1_fast_q15() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_biquad_cascade_df1_q15(
-  const arm_biquad_casd_df1_inst_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pIn = pSrc;                             /*  Source pointer                               */
-  q15_t *pOut = pDst;                            /*  Destination pointer                          */
-  q31_t in;                                      /*  Temporary variable to hold input value       */
-  q31_t out;                                     /*  Temporary variable to hold output value      */
-  q31_t b0;                                      /*  Temporary variable to hold bo value          */
-  q31_t b1, a1;                                  /*  Filter coefficients                          */
-  q31_t state_in, state_out;                     /*  Filter state variables                       */
-  q31_t acc_l, acc_h;
-  q63_t acc;                                     /*  Accumulator                                  */
-  int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift                                   */
-  q15_t *pState = S->pState;                     /*  State pointer                                */
-  q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
-  uint32_t sample, stage = (uint32_t) S->numStages;     /*  Stage loop counter                           */
-  int32_t uShift = (32 - lShift);
-
-  do
-  {
-    /* Read the b0 and 0 coefficients using SIMD  */
-    b0 = *__SIMD32(pCoeffs)++;
-
-    /* Read the b1 and b2 coefficients using SIMD */
-    b1 = *__SIMD32(pCoeffs)++;
-
-    /* Read the a1 and a2 coefficients using SIMD */
-    a1 = *__SIMD32(pCoeffs)++;
-
-    /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
-    state_in = *__SIMD32(pState)++;
-
-    /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
-    state_out = *__SIMD32(pState)--;
-
-    /* Apply loop unrolling and compute 2 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:    
-     *    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
-     */
-    sample = blockSize >> 1u;
-
-    /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.    
-     ** a second loop below computes the remaining 1 sample. */
-    while(sample > 0u)
-    {
-
-      /* Read the input */
-      in = *__SIMD32(pIn)++;
-
-      /* out =  b0 * x[n] + 0 * 0 */
-      out = __SMUAD(b0, in);
-
-      /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */
-      acc = __SMLALD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] +  a2 * y[n-2] */
-      acc = __SMLALD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      out = __SSAT(out, 16);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
-      state_out = __PKHBT(state_out >> 16, (out), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* out =  b0 * x[n] + 0 * 0 */
-      out = __SMUADX(b0, in);
-      /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */
-      acc = __SMLALD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + a2 * y[n-2] */
-      acc = __SMLALD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      out = __SSAT(out, 16);
-
-      /* Store the output in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16);
-
-#else
-
-      *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in >> 16, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-
-      /* Decrement the loop counter */
-      sample--;
-
-    }
-
-    /* If the blockSize is not a multiple of 2, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-
-    if((blockSize & 0x1u) != 0u)
-    {
-      /* Read the input */
-      in = *pIn++;
-
-      /* out =  b0 * x[n] + 0 * 0 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      out = __SMUAD(b0, in);
-
-#else
-
-      out = __SMUADX(b0, in);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* acc =  b1 * x[n-1] + b2 * x[n-2] + out */
-      acc = __SMLALD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + a2 * y[n-2] */
-      acc = __SMLALD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      out = __SSAT(out, 16);
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q15_t) out;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
-
-#endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    }
-
-    /*  The first stage goes from the input wire to the output wire.  */
-    /*  Subsequent numStages occur in-place in the output wire  */
-    pIn = pDst;
-
-    /* Reset the output pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the state array */
-    *__SIMD32(pState)++ = state_in;
-    *__SIMD32(pState)++ = state_out;
-
-
-    /* Decrement the loop counter */
-    stage--;
-
-  } while(stage > 0u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t *pIn = pSrc;                             /*  Source pointer                               */
-  q15_t *pOut = pDst;                            /*  Destination pointer                          */
-  q15_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q15_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
-  q15_t Xn;                                      /*  temporary input               */
-  q63_t acc;                                     /*  Accumulator                                  */
-  int32_t shift = (15 - (int32_t) S->postShift); /*  Post shift                                   */
-  q15_t *pState = S->pState;                     /*  State pointer                                */
-  q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
-  uint32_t sample, stage = (uint32_t) S->numStages;     /*  Stage loop counter                           */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    pCoeffs++;  // skip the 0 coefficient
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /*      The variables acc holds the output value that is computed:         
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]         
-     */
-
-    sample = blockSize;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q31_t) b0 *Xn;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q31_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q31_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q31_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q31_t) a2 *Yn2;
-
-      /* The result is converted to 1.31  */
-      acc = __SSAT((acc >> shift), 16);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = (q15_t) acc;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q15_t) acc;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent stages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset to destination pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-
-#endif /*     #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-
-/**    
- * @} end of BiquadCascadeDF1 group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
deleted file mode 100755
index 35f2124b..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
+++ /dev/null
@@ -1,405 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_q31.c    
-*    
-* Description:	Processing function for the    
-*				Q31 Biquad cascade filter    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 Biquad cascade filter.    
- * @param[in]  *S         points to an instance of the Q31 Biquad cascade structure.    
- * @param[in]  *pSrc      points to the block of input data.    
- * @param[out] *pDst      points to the block of output data.    
- * @param[in]  blockSize  number of samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).    
- * After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to    
- * 1.31 format by discarding the low 32 bits.    
- *    
- * \par    
- * Refer to the function arm_biquad_cascade_df1_fast_q31() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_biquad_cascade_df1_q31(
-  const arm_biquad_casd_df1_inst_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q63_t acc;                                     /*  accumulator                   */
-  uint32_t uShift = ((uint32_t) S->postShift + 1u);
-  uint32_t lShift = 32u - uShift;                /*  Shift to be applied to the output */
-  q31_t *pIn = pSrc;                             /*  input pointer initialization  */
-  q31_t *pOut = pDst;                            /*  output pointer initialization */
-  q31_t *pState = S->pState;                     /*  pState pointer initialization */
-  q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
-  q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
-  q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q31_t Xn;                                      /*  temporary input               */
-  uint32_t sample, stage = S->numStages;         /*  loop counters                     */
-
-
-#ifndef ARM_MATH_CM0_FAMILY_FAMILY
-
-  q31_t acc_l, acc_h;                            /*  temporary output variables    */
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:    
-     *    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
-     */
-
-    sample = blockSize >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn2;
-
-      /* The result is converted to 1.31 , Yn2 variable is reused */
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = Yn2;
-
-      /* Read the second input */
-      Xn2 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn2;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn1;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn2;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn1;
-
-
-      /* The result is converted to 1.31, Yn1 variable is reused  */
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = Yn1;
-
-      /* Read the third input  */
-      Xn1 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn1;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn2;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn2;
-
-      /* The result is converted to 1.31, Yn2 variable is reused  */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = Yn2;
-
-      /* Read the forth input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn2;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn1;
-
-      /* The result is converted to 1.31, Yn1 variable is reused  */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = Yn1;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    sample = (blockSize & 0x3u);
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn2;
-
-      /* The result is converted to 1.31  */
-      acc = acc >> lShift;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = (q31_t) acc;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q31_t) acc;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent stages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset to destination pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /*      The variables acc holds the output value that is computed:         
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]         
-     */
-
-    sample = blockSize;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn2;
-
-      /* The result is converted to 1.31  */
-      acc = acc >> lShift;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = (q31_t) acc;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q31_t) acc;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent stages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset to destination pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-
-#endif /*  #ifndef ARM_MATH_CM0_FAMILY_FAMILY */
-}
-
-
-
-
-/**    
-  * @} end of BiquadCascadeDF1 group    
-  */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
deleted file mode 100755
index fc15e3cc..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
+++ /dev/null
@@ -1,603 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df2T_f32.c    
-*    
-* Description:  Processing function for the floating-point transposed    
-*               direct form II Biquad cascade filter.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**       
-* @ingroup groupFilters       
-*/
-
-/**       
-* @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure       
-*       
-* This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.       
-* The filters are implemented as a cascade of second order Biquad sections.       
-* These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.      
-* Only floating-point data is supported.       
-*       
-* This function operate on blocks of input and output data and each call to the function       
-* processes blockSize samples through the filter.       
-* pSrc points to the array of input data and       
-* pDst points to the array of output data.       
-* Both arrays contain blockSize values.       
-*       
-* \par Algorithm       
-* Each Biquad stage implements a second order filter using the difference equation:       
-* 
       
-*    y[n] = b0 * x[n] + d1       
-*    d1 = b1 * x[n] + a1 * y[n] + d2       
-*    d2 = b2 * x[n] + a2 * y[n]       
-* 
       
-* where d1 and d2 represent the two state values.       
-*       
-* \par       
-* A Biquad filter using a transposed Direct Form II structure is shown below.       
-* \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"       
-* Coefficients b0, b1, and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.       
-* Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.       
-* Pay careful attention to the sign of the feedback coefficients.       
-* Some design tools flip the sign of the feedback coefficients:       
-* 
       
-*    y[n] = b0 * x[n] + d1;       
-*    d1 = b1 * x[n] - a1 * y[n] + d2;       
-*    d2 = b2 * x[n] - a2 * y[n];       
-* 
       
-* In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.       
-*       
-* \par       
-* Higher order filters are realized as a cascade of second order sections.       
-* numStages refers to the number of second order stages used.       
-* For example, an 8th order filter would be realized with numStages=4 second order stages.       
-* A 9th order filter would be realized with numStages=5 second order stages with the       
-* coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).       
-*       
-* \par       
-* pState points to the state variable array.       
-* Each Biquad stage has 2 state variables d1 and d2.       
-* The state variables are arranged in the pState array as:       
-* 
       
-*     {d11, d12, d21, d22, ...}       
-* 
       
-* where d1x refers to the state variables for the first Biquad and       
-* d2x refers to the state variables for the second Biquad.       
-* The state array has a total length of 2*numStages values.       
-* The state variables are updated after each block of data is processed; the coefficients are untouched.       
-*       
-* \par       
-* The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.    
-* The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.    
-* That is why the Direct Form I structure supports Q15 and Q31 data types.    
-* The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables d1 and d2.    
-* Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.    
-* The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.    
-*       
-* \par Instance Structure       
-* The coefficients and state variables for a filter are stored together in an instance data structure.       
-* A separate instance structure must be defined for each filter.       
-* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.       
-*       
-* \par Init Functions       
-* There is also an associated initialization function.      
-* The initialization function performs following operations:       
-* - Sets the values of the internal structure fields.       
-* - Zeros out the values in the state buffer.       
-* To do this manually without calling the init function, assign the follow subfields of the instance structure:
-* numStages, pCoeffs, pState. Also set all of the values in pState to zero. 
-*       
-* \par       
-* Use of the initialization function is optional.       
-* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.       
-* To place an instance structure into a const data section, the instance structure must be manually initialized.       
-* Set the values in the state buffer to zeros before static initialization.       
-* For example, to statically initialize the instance structure use       
-* 
       
-*     arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};       
-* 
       
-* where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer.       
-* pCoeffs is the address of the coefficient buffer;        
-*       
-*/
-
-/**       
-* @addtogroup BiquadCascadeDF2T       
-* @{       
-*/
-
-/**      
-* @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.      
-* @param[in]  *S        points to an instance of the filter data structure.      
-* @param[in]  *pSrc     points to the block of input data.      
-* @param[out] *pDst     points to the block of output data      
-* @param[in]  blockSize number of samples to process.      
-* @return none.      
-*/
-
-
-LOW_OPTIMIZATION_ENTER
-void arm_biquad_cascade_df2T_f32(
-const arm_biquad_cascade_df2T_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
-{
-
-   float32_t *pIn = pSrc;                         /*  source pointer            */
-   float32_t *pOut = pDst;                        /*  destination pointer       */
-   float32_t *pState = S->pState;                 /*  State pointer             */
-   float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-   float32_t acc1;                                /*  accumulator               */
-   float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-   float32_t Xn1;                                 /*  temporary input           */
-   float32_t d1, d2;                              /*  state variables           */
-   uint32_t sample, stage = S->numStages;         /*  loop counters             */
-
-#if defined(ARM_MATH_CM7)
-	
-   float32_t Xn2, Xn3, Xn4, Xn5, Xn6, Xn7, Xn8;   /*  Input State variables     */
-   float32_t Xn9, Xn10, Xn11, Xn12, Xn13, Xn14, Xn15, Xn16;
-   float32_t acc2, acc3, acc4, acc5, acc6, acc7;  /*  Simulates the accumulator */
-   float32_t acc8, acc9, acc10, acc11, acc12, acc13, acc14, acc15, acc16;
-
-   do
-   {
-      /* Reading the coefficients */ 
-      b0 = pCoeffs[0]; 
-      b1 = pCoeffs[1]; 
-      b2 = pCoeffs[2]; 
-      a1 = pCoeffs[3]; 
-      /* Apply loop unrolling and compute 16 output values simultaneously. */ 
-      sample = blockSize >> 4u; 
-      a2 = pCoeffs[4]; 
-
-      /*Reading the state values */ 
-      d1 = pState[0]; 
-      d2 = pState[1]; 
-
-      pCoeffs += 5u;
-
-      
-      /* First part of the processing with loop unrolling.  Compute 16 outputs at a time.       
-       ** a second loop below computes the remaining 1 to 15 samples. */
-      while(sample > 0u) {
-
-         /* y[n] = b0 * x[n] + d1 */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         /* d2 = b2 * x[n] + a2 * y[n] */
-
-         /* Read the first 2 inputs. 2 cycles */
-         Xn1  = pIn[0 ];
-         Xn2  = pIn[1 ];
-
-         /* Sample 1. 5 cycles */
-         Xn3  = pIn[2 ];
-         acc1 = b0 * Xn1 + d1;
-         
-         Xn4  = pIn[3 ];
-         d1 = b1 * Xn1 + d2;
-         
-         Xn5  = pIn[4 ];
-         d2 = b2 * Xn1;
-         
-         Xn6  = pIn[5 ];
-         d1 += a1 * acc1;
-         
-         Xn7  = pIn[6 ];
-         d2 += a2 * acc1;
-
-         /* Sample 2. 5 cycles */
-         Xn8  = pIn[7 ];
-         acc2 = b0 * Xn2 + d1;
-         
-         Xn9  = pIn[8 ];
-         d1 = b1 * Xn2 + d2;
-         
-         Xn10 = pIn[9 ];
-         d2 = b2 * Xn2;
-         
-         Xn11 = pIn[10];
-         d1 += a1 * acc2;
-         
-         Xn12 = pIn[11];
-         d2 += a2 * acc2;
-
-         /* Sample 3. 5 cycles */
-         Xn13 = pIn[12];
-         acc3 = b0 * Xn3 + d1;
-         
-         Xn14 = pIn[13];
-         d1 = b1 * Xn3 + d2;
-         
-         Xn15 = pIn[14];
-         d2 = b2 * Xn3;
-         
-         Xn16 = pIn[15];
-         d1 += a1 * acc3;
-         
-         pIn += 16;
-         d2 += a2 * acc3;
-
-         /* Sample 4. 5 cycles */
-         acc4 = b0 * Xn4 + d1;
-         d1 = b1 * Xn4 + d2;
-         d2 = b2 * Xn4;
-         d1 += a1 * acc4;
-         d2 += a2 * acc4;
-
-         /* Sample 5. 5 cycles */
-         acc5 = b0 * Xn5 + d1;
-         d1 = b1 * Xn5 + d2;
-         d2 = b2 * Xn5;
-         d1 += a1 * acc5;
-         d2 += a2 * acc5;
-
-         /* Sample 6. 5 cycles */
-         acc6 = b0 * Xn6 + d1;
-         d1 = b1 * Xn6 + d2;
-         d2 = b2 * Xn6;
-         d1 += a1 * acc6;
-         d2 += a2 * acc6;
-
-         /* Sample 7. 5 cycles */
-         acc7 = b0 * Xn7 + d1;
-         d1 = b1 * Xn7 + d2;
-         d2 = b2 * Xn7;
-         d1 += a1 * acc7;
-         d2 += a2 * acc7;
-
-         /* Sample 8. 5 cycles */
-         acc8 = b0 * Xn8 + d1;
-         d1 = b1 * Xn8 + d2;
-         d2 = b2 * Xn8;
-         d1 += a1 * acc8;
-         d2 += a2 * acc8;
-
-         /* Sample 9. 5 cycles */
-         acc9 = b0 * Xn9 + d1;
-         d1 = b1 * Xn9 + d2;
-         d2 = b2 * Xn9;
-         d1 += a1 * acc9;
-         d2 += a2 * acc9;
-
-         /* Sample 10. 5 cycles */
-         acc10 = b0 * Xn10 + d1;
-         d1 = b1 * Xn10 + d2;
-         d2 = b2 * Xn10;
-         d1 += a1 * acc10;
-         d2 += a2 * acc10;
-
-         /* Sample 11. 5 cycles */
-         acc11 = b0 * Xn11 + d1;
-         d1 = b1 * Xn11 + d2;
-         d2 = b2 * Xn11;
-         d1 += a1 * acc11;
-         d2 += a2 * acc11;
-
-         /* Sample 12. 5 cycles */
-         acc12 = b0 * Xn12 + d1;
-         d1 = b1 * Xn12 + d2;
-         d2 = b2 * Xn12;
-         d1 += a1 * acc12;
-         d2 += a2 * acc12;
-
-         /* Sample 13. 5 cycles */
-         acc13 = b0 * Xn13 + d1;         
-         d1 = b1 * Xn13 + d2;         
-         d2 = b2 * Xn13;
-         
-         pOut[0 ] = acc1 ;
-         d1 += a1 * acc13;
-         
-         pOut[1 ] = acc2 ;	
-         d2 += a2 * acc13;
-
-         /* Sample 14. 5 cycles */
-         pOut[2 ] = acc3 ;	
-         acc14 = b0 * Xn14 + d1;
-             
-         pOut[3 ] = acc4 ;
-         d1 = b1 * Xn14 + d2;
-          
-         pOut[4 ] = acc5 ; 
-         d2 = b2 * Xn14;
-         
-         pOut[5 ] = acc6 ;	  
-         d1 += a1 * acc14;
-         
-         pOut[6 ] = acc7 ;	
-         d2 += a2 * acc14;
-
-         /* Sample 15. 5 cycles */
-         pOut[7 ] = acc8 ;
-         pOut[8 ] = acc9 ;  
-         acc15 = b0 * Xn15 + d1;
-              
-         pOut[9 ] = acc10;	
-         d1 = b1 * Xn15 + d2;
-         
-         pOut[10] = acc11;	
-         d2 = b2 * Xn15;
-         
-         pOut[11] = acc12;
-         d1 += a1 * acc15;
-         
-         pOut[12] = acc13;
-         d2 += a2 * acc15;
-
-         /* Sample 16. 5 cycles */
-         pOut[13] = acc14;	
-         acc16 = b0 * Xn16 + d1;
-         
-         pOut[14] = acc15;	
-         d1 = b1 * Xn16 + d2;
-         
-         pOut[15] = acc16;
-         d2 = b2 * Xn16;
-         
-         sample--;	 
-         d1 += a1 * acc16;
-         
-         pOut += 16;
-         d2 += a2 * acc16;
-      }
-
-      sample = blockSize & 0xFu;
-      while(sample > 0u) {
-         Xn1 = *pIn;         
-         acc1 = b0 * Xn1 + d1;
-         
-         pIn++;
-         d1 = b1 * Xn1 + d2;
-         
-         *pOut = acc1; 
-         d2 = b2 * Xn1;
-         
-         pOut++;
-         d1 += a1 * acc1;
-         
-         sample--;	
-         d2 += a2 * acc1; 
-      }
-
-      /* Store the updated state variables back into the state array */ 
-      pState[0] = d1; 
-      /* The current stage input is given as the output to the next stage */ 
-      pIn = pDst; 
-      
-      pState[1] = d2; 
-      /* decrement the loop counter */ 
-      stage--; 
-
-      pState += 2u;
-
-      /*Reset the output working pointer */ 
-      pOut = pDst; 
-
-   } while(stage > 0u);
-	
-#elif defined(ARM_MATH_CM0_FAMILY)
-
-   /* Run the below code for Cortex-M0 */
-
-   do
-   {
-      /* Reading the coefficients */
-      b0 = *pCoeffs++;
-      b1 = *pCoeffs++;
-      b2 = *pCoeffs++;
-      a1 = *pCoeffs++;
-      a2 = *pCoeffs++;
-
-      /*Reading the state values */
-      d1 = pState[0];
-      d2 = pState[1];
-
-
-      sample = blockSize;
-
-      while(sample > 0u)
-      {
-         /* Read the input */
-         Xn1 = *pIn++;
-
-         /* y[n] = b0 * x[n] + d1 */
-         acc1 = (b0 * Xn1) + d1;
-
-         /* Store the result in the accumulator in the destination buffer. */
-         *pOut++ = acc1;
-
-         /* Every time after the output is computed state should be updated. */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         d1 = ((b1 * Xn1) + (a1 * acc1)) + d2;
-
-         /* d2 = b2 * x[n] + a2 * y[n] */
-         d2 = (b2 * Xn1) + (a2 * acc1);
-
-         /* decrement the loop counter */
-         sample--;
-      }
-
-      /* Store the updated state variables back into the state array */
-      *pState++ = d1;
-      *pState++ = d2;
-
-      /* The current stage input is given as the output to the next stage */
-      pIn = pDst;
-
-      /*Reset the output working pointer */
-      pOut = pDst;
-
-      /* decrement the loop counter */
-      stage--;
-
-   } while(stage > 0u);
-	 
-#else
-
-   float32_t Xn2, Xn3, Xn4;                  	  /*  Input State variables     */
-   float32_t acc2, acc3, acc4;              		  /*  accumulator               */
-
-
-   float32_t p0, p1, p2, p3, p4, A1;
-
-   /* Run the below code for Cortex-M4 and Cortex-M3 */
-   do
-   {
-      /* Reading the coefficients */     
-      b0 = *pCoeffs++;
-      b1 = *pCoeffs++;
-      b2 = *pCoeffs++;
-      a1 = *pCoeffs++;
-      a2 = *pCoeffs++;
-      
-
-      /*Reading the state values */
-      d1 = pState[0];
-      d2 = pState[1];
-
-      /* Apply loop unrolling and compute 4 output values simultaneously. */
-      sample = blockSize >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
-   ** a second loop below computes the remaining 1 to 3 samples. */
-      while(sample > 0u) {
-
-         /* y[n] = b0 * x[n] + d1 */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         /* d2 = b2 * x[n] + a2 * y[n] */
-
-         /* Read the four inputs */
-         Xn1 = pIn[0];
-         Xn2 = pIn[1];
-         Xn3 = pIn[2];
-         Xn4 = pIn[3];
-         pIn += 4;     
-
-         p0 = b0 * Xn1; 
-         p1 = b1 * Xn1;
-         acc1 = p0 + d1;
-         p0 = b0 * Xn2; 
-         p3 = a1 * acc1;
-         p2 = b2 * Xn1;
-         A1 = p1 + p3;
-         p4 = a2 * acc1;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         p1 = b1 * Xn2;
-         acc2 = p0 + d1;
-         p0 = b0 * Xn3;	 
-         p3 = a1 * acc2; 
-         p2 = b2 * Xn2;                                 
-         A1 = p1 + p3;
-         p4 = a2 * acc2;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         p1 = b1 * Xn3;
-         acc3 = p0 + d1;
-         p0 = b0 * Xn4;	
-         p3 = a1 * acc3;
-         p2 = b2 * Xn3;
-         A1 = p1 + p3;
-         p4 = a2 * acc3;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         acc4 = p0 + d1;
-         p1 = b1 * Xn4;
-         p3 = a1 * acc4;
-         p2 = b2 * Xn4;
-         A1 = p1 + p3;
-         p4 = a2 * acc4;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         pOut[0] = acc1;	
-         pOut[1] = acc2;	
-         pOut[2] = acc3;	
-         pOut[3] = acc4;
-		 pOut += 4;
-				 
-         sample--;	       
-      }
-
-      sample = blockSize & 0x3u;
-      while(sample > 0u) {
-         Xn1 = *pIn++;
-
-         p0 = b0 * Xn1; 
-         p1 = b1 * Xn1;
-         acc1 = p0 + d1;
-         p3 = a1 * acc1;
-         p2 = b2 * Xn1;
-         A1 = p1 + p3;
-         p4 = a2 * acc1;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-	
-         *pOut++ = acc1;
-         
-         sample--;	       
-      }
-
-      /* Store the updated state variables back into the state array */
-      *pState++ = d1;
-      *pState++ = d2;
-
-      /* The current stage input is given as the output to the next stage */
-      pIn = pDst;
-
-      /*Reset the output working pointer */
-      pOut = pDst;
-
-      /* decrement the loop counter */
-      stage--;
-
-   } while(stage > 0u);
-
-#endif 
-
-}
-LOW_OPTIMIZATION_EXIT
-
-/**       
-   * @} end of BiquadCascadeDF2T group       
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
deleted file mode 100755
index 265bd3a5..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
+++ /dev/null
@@ -1,603 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df2T_f64.c    
-*    
-* Description:  Processing function for the floating-point transposed    
-*               direct form II Biquad cascade filter.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**       
-* @ingroup groupFilters       
-*/
-
-/**       
-* @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure       
-*       
-* This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.       
-* The filters are implemented as a cascade of second order Biquad sections.       
-* These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.      
-* Only floating-point data is supported.       
-*       
-* This function operate on blocks of input and output data and each call to the function       
-* processes blockSize samples through the filter.       
-* pSrc points to the array of input data and       
-* pDst points to the array of output data.       
-* Both arrays contain blockSize values.       
-*       
-* \par Algorithm       
-* Each Biquad stage implements a second order filter using the difference equation:       
-* 
       
-*    y[n] = b0 * x[n] + d1       
-*    d1 = b1 * x[n] + a1 * y[n] + d2       
-*    d2 = b2 * x[n] + a2 * y[n]       
-* 
       
-* where d1 and d2 represent the two state values.       
-*       
-* \par       
-* A Biquad filter using a transposed Direct Form II structure is shown below.       
-* \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"       
-* Coefficients b0, b1, and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.       
-* Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.       
-* Pay careful attention to the sign of the feedback coefficients.       
-* Some design tools flip the sign of the feedback coefficients:       
-* 
       
-*    y[n] = b0 * x[n] + d1;       
-*    d1 = b1 * x[n] - a1 * y[n] + d2;       
-*    d2 = b2 * x[n] - a2 * y[n];       
-* 
       
-* In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.       
-*       
-* \par       
-* Higher order filters are realized as a cascade of second order sections.       
-* numStages refers to the number of second order stages used.       
-* For example, an 8th order filter would be realized with numStages=4 second order stages.       
-* A 9th order filter would be realized with numStages=5 second order stages with the       
-* coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).       
-*       
-* \par       
-* pState points to the state variable array.       
-* Each Biquad stage has 2 state variables d1 and d2.       
-* The state variables are arranged in the pState array as:       
-* 
       
-*     {d11, d12, d21, d22, ...}       
-* 
       
-* where d1x refers to the state variables for the first Biquad and       
-* d2x refers to the state variables for the second Biquad.       
-* The state array has a total length of 2*numStages values.       
-* The state variables are updated after each block of data is processed; the coefficients are untouched.       
-*       
-* \par       
-* The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.    
-* The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.    
-* That is why the Direct Form I structure supports Q15 and Q31 data types.    
-* The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables d1 and d2.    
-* Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.    
-* The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.    
-*       
-* \par Instance Structure       
-* The coefficients and state variables for a filter are stored together in an instance data structure.       
-* A separate instance structure must be defined for each filter.       
-* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.       
-*       
-* \par Init Functions       
-* There is also an associated initialization function.      
-* The initialization function performs following operations:       
-* - Sets the values of the internal structure fields.       
-* - Zeros out the values in the state buffer.       
-* To do this manually without calling the init function, assign the follow subfields of the instance structure:
-* numStages, pCoeffs, pState. Also set all of the values in pState to zero. 
-*       
-* \par       
-* Use of the initialization function is optional.       
-* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.       
-* To place an instance structure into a const data section, the instance structure must be manually initialized.       
-* Set the values in the state buffer to zeros before static initialization.       
-* For example, to statically initialize the instance structure use       
-* 
       
-*     arm_biquad_cascade_df2T_instance_f64 S1 = {numStages, pState, pCoeffs};       
-* 
       
-* where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer.       
-* pCoeffs is the address of the coefficient buffer;        
-*       
-*/
-
-/**       
-* @addtogroup BiquadCascadeDF2T       
-* @{       
-*/
-
-/**      
-* @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.      
-* @param[in]  *S        points to an instance of the filter data structure.      
-* @param[in]  *pSrc     points to the block of input data.      
-* @param[out] *pDst     points to the block of output data      
-* @param[in]  blockSize number of samples to process.      
-* @return none.      
-*/
-
-
-LOW_OPTIMIZATION_ENTER
-void arm_biquad_cascade_df2T_f64(
-const arm_biquad_cascade_df2T_instance_f64 * S,
-float64_t * pSrc,
-float64_t * pDst,
-uint32_t blockSize)
-{
-
-   float64_t *pIn = pSrc;                         /*  source pointer            */
-   float64_t *pOut = pDst;                        /*  destination pointer       */
-   float64_t *pState = S->pState;                 /*  State pointer             */
-   float64_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-   float64_t acc1;                                /*  accumulator               */
-   float64_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-   float64_t Xn1;                                 /*  temporary input           */
-   float64_t d1, d2;                              /*  state variables           */
-   uint32_t sample, stage = S->numStages;         /*  loop counters             */
-
-#if defined(ARM_MATH_CM7)
-	
-   float64_t Xn2, Xn3, Xn4, Xn5, Xn6, Xn7, Xn8;   /*  Input State variables     */
-   float64_t Xn9, Xn10, Xn11, Xn12, Xn13, Xn14, Xn15, Xn16;
-   float64_t acc2, acc3, acc4, acc5, acc6, acc7;  /*  Simulates the accumulator */
-   float64_t acc8, acc9, acc10, acc11, acc12, acc13, acc14, acc15, acc16;
-
-   do
-   {
-      /* Reading the coefficients */ 
-      b0 = pCoeffs[0]; 
-      b1 = pCoeffs[1]; 
-      b2 = pCoeffs[2]; 
-      a1 = pCoeffs[3]; 
-      /* Apply loop unrolling and compute 16 output values simultaneously. */ 
-      sample = blockSize >> 4u; 
-      a2 = pCoeffs[4]; 
-
-      /*Reading the state values */ 
-      d1 = pState[0]; 
-      d2 = pState[1]; 
-
-      pCoeffs += 5u;
-
-      
-      /* First part of the processing with loop unrolling.  Compute 16 outputs at a time.       
-       ** a second loop below computes the remaining 1 to 15 samples. */
-      while(sample > 0u) {
-
-         /* y[n] = b0 * x[n] + d1 */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         /* d2 = b2 * x[n] + a2 * y[n] */
-
-         /* Read the first 2 inputs. 2 cycles */
-         Xn1  = pIn[0 ];
-         Xn2  = pIn[1 ];
-
-         /* Sample 1. 5 cycles */
-         Xn3  = pIn[2 ];
-         acc1 = b0 * Xn1 + d1;
-         
-         Xn4  = pIn[3 ];
-         d1 = b1 * Xn1 + d2;
-         
-         Xn5  = pIn[4 ];
-         d2 = b2 * Xn1;
-         
-         Xn6  = pIn[5 ];
-         d1 += a1 * acc1;
-         
-         Xn7  = pIn[6 ];
-         d2 += a2 * acc1;
-
-         /* Sample 2. 5 cycles */
-         Xn8  = pIn[7 ];
-         acc2 = b0 * Xn2 + d1;
-         
-         Xn9  = pIn[8 ];
-         d1 = b1 * Xn2 + d2;
-         
-         Xn10 = pIn[9 ];
-         d2 = b2 * Xn2;
-         
-         Xn11 = pIn[10];
-         d1 += a1 * acc2;
-         
-         Xn12 = pIn[11];
-         d2 += a2 * acc2;
-
-         /* Sample 3. 5 cycles */
-         Xn13 = pIn[12];
-         acc3 = b0 * Xn3 + d1;
-         
-         Xn14 = pIn[13];
-         d1 = b1 * Xn3 + d2;
-         
-         Xn15 = pIn[14];
-         d2 = b2 * Xn3;
-         
-         Xn16 = pIn[15];
-         d1 += a1 * acc3;
-         
-         pIn += 16;
-         d2 += a2 * acc3;
-
-         /* Sample 4. 5 cycles */
-         acc4 = b0 * Xn4 + d1;
-         d1 = b1 * Xn4 + d2;
-         d2 = b2 * Xn4;
-         d1 += a1 * acc4;
-         d2 += a2 * acc4;
-
-         /* Sample 5. 5 cycles */
-         acc5 = b0 * Xn5 + d1;
-         d1 = b1 * Xn5 + d2;
-         d2 = b2 * Xn5;
-         d1 += a1 * acc5;
-         d2 += a2 * acc5;
-
-         /* Sample 6. 5 cycles */
-         acc6 = b0 * Xn6 + d1;
-         d1 = b1 * Xn6 + d2;
-         d2 = b2 * Xn6;
-         d1 += a1 * acc6;
-         d2 += a2 * acc6;
-
-         /* Sample 7. 5 cycles */
-         acc7 = b0 * Xn7 + d1;
-         d1 = b1 * Xn7 + d2;
-         d2 = b2 * Xn7;
-         d1 += a1 * acc7;
-         d2 += a2 * acc7;
-
-         /* Sample 8. 5 cycles */
-         acc8 = b0 * Xn8 + d1;
-         d1 = b1 * Xn8 + d2;
-         d2 = b2 * Xn8;
-         d1 += a1 * acc8;
-         d2 += a2 * acc8;
-
-         /* Sample 9. 5 cycles */
-         acc9 = b0 * Xn9 + d1;
-         d1 = b1 * Xn9 + d2;
-         d2 = b2 * Xn9;
-         d1 += a1 * acc9;
-         d2 += a2 * acc9;
-
-         /* Sample 10. 5 cycles */
-         acc10 = b0 * Xn10 + d1;
-         d1 = b1 * Xn10 + d2;
-         d2 = b2 * Xn10;
-         d1 += a1 * acc10;
-         d2 += a2 * acc10;
-
-         /* Sample 11. 5 cycles */
-         acc11 = b0 * Xn11 + d1;
-         d1 = b1 * Xn11 + d2;
-         d2 = b2 * Xn11;
-         d1 += a1 * acc11;
-         d2 += a2 * acc11;
-
-         /* Sample 12. 5 cycles */
-         acc12 = b0 * Xn12 + d1;
-         d1 = b1 * Xn12 + d2;
-         d2 = b2 * Xn12;
-         d1 += a1 * acc12;
-         d2 += a2 * acc12;
-
-         /* Sample 13. 5 cycles */
-         acc13 = b0 * Xn13 + d1;         
-         d1 = b1 * Xn13 + d2;         
-         d2 = b2 * Xn13;
-         
-         pOut[0 ] = acc1 ;
-         d1 += a1 * acc13;
-         
-         pOut[1 ] = acc2 ;	
-         d2 += a2 * acc13;
-
-         /* Sample 14. 5 cycles */
-         pOut[2 ] = acc3 ;	
-         acc14 = b0 * Xn14 + d1;
-             
-         pOut[3 ] = acc4 ;
-         d1 = b1 * Xn14 + d2;
-          
-         pOut[4 ] = acc5 ; 
-         d2 = b2 * Xn14;
-         
-         pOut[5 ] = acc6 ;	  
-         d1 += a1 * acc14;
-         
-         pOut[6 ] = acc7 ;	
-         d2 += a2 * acc14;
-
-         /* Sample 15. 5 cycles */
-         pOut[7 ] = acc8 ;
-         pOut[8 ] = acc9 ;  
-         acc15 = b0 * Xn15 + d1;
-              
-         pOut[9 ] = acc10;	
-         d1 = b1 * Xn15 + d2;
-         
-         pOut[10] = acc11;	
-         d2 = b2 * Xn15;
-         
-         pOut[11] = acc12;
-         d1 += a1 * acc15;
-         
-         pOut[12] = acc13;
-         d2 += a2 * acc15;
-
-         /* Sample 16. 5 cycles */
-         pOut[13] = acc14;	
-         acc16 = b0 * Xn16 + d1;
-         
-         pOut[14] = acc15;	
-         d1 = b1 * Xn16 + d2;
-         
-         pOut[15] = acc16;
-         d2 = b2 * Xn16;
-         
-         sample--;	 
-         d1 += a1 * acc16;
-         
-         pOut += 16;
-         d2 += a2 * acc16;
-      }
-
-      sample = blockSize & 0xFu;
-      while(sample > 0u) {
-         Xn1 = *pIn;         
-         acc1 = b0 * Xn1 + d1;
-         
-         pIn++;
-         d1 = b1 * Xn1 + d2;
-         
-         *pOut = acc1; 
-         d2 = b2 * Xn1;
-         
-         pOut++;
-         d1 += a1 * acc1;
-         
-         sample--;	
-         d2 += a2 * acc1; 
-      }
-
-      /* Store the updated state variables back into the state array */ 
-      pState[0] = d1; 
-      /* The current stage input is given as the output to the next stage */ 
-      pIn = pDst; 
-      
-      pState[1] = d2; 
-      /* decrement the loop counter */ 
-      stage--; 
-
-      pState += 2u;
-
-      /*Reset the output working pointer */ 
-      pOut = pDst; 
-
-   } while(stage > 0u);
-	
-#elif defined(ARM_MATH_CM0_FAMILY)
-
-   /* Run the below code for Cortex-M0 */
-
-   do
-   {
-      /* Reading the coefficients */
-      b0 = *pCoeffs++;
-      b1 = *pCoeffs++;
-      b2 = *pCoeffs++;
-      a1 = *pCoeffs++;
-      a2 = *pCoeffs++;
-
-      /*Reading the state values */
-      d1 = pState[0];
-      d2 = pState[1];
-
-
-      sample = blockSize;
-
-      while(sample > 0u)
-      {
-         /* Read the input */
-         Xn1 = *pIn++;
-
-         /* y[n] = b0 * x[n] + d1 */
-         acc1 = (b0 * Xn1) + d1;
-
-         /* Store the result in the accumulator in the destination buffer. */
-         *pOut++ = acc1;
-
-         /* Every time after the output is computed state should be updated. */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         d1 = ((b1 * Xn1) + (a1 * acc1)) + d2;
-
-         /* d2 = b2 * x[n] + a2 * y[n] */
-         d2 = (b2 * Xn1) + (a2 * acc1);
-
-         /* decrement the loop counter */
-         sample--;
-      }
-
-      /* Store the updated state variables back into the state array */
-      *pState++ = d1;
-      *pState++ = d2;
-
-      /* The current stage input is given as the output to the next stage */
-      pIn = pDst;
-
-      /*Reset the output working pointer */
-      pOut = pDst;
-
-      /* decrement the loop counter */
-      stage--;
-
-   } while(stage > 0u);
-	 
-#else
-
-   float64_t Xn2, Xn3, Xn4;                  	  /*  Input State variables     */
-   float64_t acc2, acc3, acc4;              		  /*  accumulator               */
-
-
-   float64_t p0, p1, p2, p3, p4, A1;
-
-   /* Run the below code for Cortex-M4 and Cortex-M3 */
-   do
-   {
-      /* Reading the coefficients */     
-      b0 = *pCoeffs++;
-      b1 = *pCoeffs++;
-      b2 = *pCoeffs++;
-      a1 = *pCoeffs++;
-      a2 = *pCoeffs++;
-      
-
-      /*Reading the state values */
-      d1 = pState[0];
-      d2 = pState[1];
-
-      /* Apply loop unrolling and compute 4 output values simultaneously. */
-      sample = blockSize >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
-   ** a second loop below computes the remaining 1 to 3 samples. */
-      while(sample > 0u) {
-
-         /* y[n] = b0 * x[n] + d1 */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         /* d2 = b2 * x[n] + a2 * y[n] */
-
-         /* Read the four inputs */
-         Xn1 = pIn[0];
-         Xn2 = pIn[1];
-         Xn3 = pIn[2];
-         Xn4 = pIn[3];
-         pIn += 4;     
-
-         p0 = b0 * Xn1; 
-         p1 = b1 * Xn1;
-         acc1 = p0 + d1;
-         p0 = b0 * Xn2; 
-         p3 = a1 * acc1;
-         p2 = b2 * Xn1;
-         A1 = p1 + p3;
-         p4 = a2 * acc1;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         p1 = b1 * Xn2;
-         acc2 = p0 + d1;
-         p0 = b0 * Xn3;	 
-         p3 = a1 * acc2; 
-         p2 = b2 * Xn2;                                 
-         A1 = p1 + p3;
-         p4 = a2 * acc2;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         p1 = b1 * Xn3;
-         acc3 = p0 + d1;
-         p0 = b0 * Xn4;	
-         p3 = a1 * acc3;
-         p2 = b2 * Xn3;
-         A1 = p1 + p3;
-         p4 = a2 * acc3;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         acc4 = p0 + d1;
-         p1 = b1 * Xn4;
-         p3 = a1 * acc4;
-         p2 = b2 * Xn4;
-         A1 = p1 + p3;
-         p4 = a2 * acc4;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         pOut[0] = acc1;	
-         pOut[1] = acc2;	
-         pOut[2] = acc3;	
-         pOut[3] = acc4;
-				 pOut += 4;
-				 
-         sample--;	       
-      }
-
-      sample = blockSize & 0x3u;
-      while(sample > 0u) {
-         Xn1 = *pIn++;
-
-         p0 = b0 * Xn1; 
-         p1 = b1 * Xn1;
-         acc1 = p0 + d1;
-         p3 = a1 * acc1;
-         p2 = b2 * Xn1;
-         A1 = p1 + p3;
-         p4 = a2 * acc1;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-	
-         *pOut++ = acc1;
-         
-         sample--;	       
-      }
-
-      /* Store the updated state variables back into the state array */
-      *pState++ = d1;
-      *pState++ = d2;
-
-      /* The current stage input is given as the output to the next stage */
-      pIn = pDst;
-
-      /*Reset the output working pointer */
-      pOut = pDst;
-
-      /* decrement the loop counter */
-      stage--;
-
-   } while(stage > 0u);
-
-#endif 
-
-}
-LOW_OPTIMIZATION_EXIT
-
-/**       
-   * @} end of BiquadCascadeDF2T group       
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
deleted file mode 100755
index d9011fea..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df2T_init_f32.c    
-*    
-* Description:  Initialization function for the floating-point transposed   
-*               direct form II Biquad cascade filter.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF2T    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.   
- * @param[in,out] *S           points to an instance of the filter data structure.   
- * @param[in]     numStages    number of 2nd order stages in the filter.   
- * @param[in]     *pCoeffs     points to the filter coefficients.   
- * @param[in]     *pState      points to the state buffer.   
- * @return        none   
- *    
- * Coefficient and State Ordering:    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
    
- *    
- * \par    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 5*numStages values.    
- *    
- * \par    
- * The pState is a pointer to state array.    
- * Each Biquad stage has 2 state variables d1, and d2.    
- * The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.    
- * The state array has a total length of 2*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- */
-
-void arm_biquad_cascade_df2T_init_f32(
-  arm_biquad_cascade_df2T_instance_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 2 * numStages */
-  memset(pState, 0, (2u * (uint32_t) numStages) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF2T group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
deleted file mode 100755
index c6065e92..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df2T_init_f64.c    
-*    
-* Description:  Initialization function for the floating-point transposed   
-*               direct form II Biquad cascade filter.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF2T    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.   
- * @param[in,out] *S           points to an instance of the filter data structure.   
- * @param[in]     numStages    number of 2nd order stages in the filter.   
- * @param[in]     *pCoeffs     points to the filter coefficients.   
- * @param[in]     *pState      points to the state buffer.   
- * @return        none   
- *    
- * Coefficient and State Ordering:    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
    
- *    
- * \par    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 5*numStages values.    
- *    
- * \par    
- * The pState is a pointer to state array.    
- * Each Biquad stage has 2 state variables d1, and d2.    
- * The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.    
- * The state array has a total length of 2*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- */
-
-void arm_biquad_cascade_df2T_init_f64(
-  arm_biquad_cascade_df2T_instance_f64 * S,
-  uint8_t numStages,
-  float64_t * pCoeffs,
-  float64_t * pState)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 2 * numStages */
-  memset(pState, 0, (2u * (uint32_t) numStages) * sizeof(float64_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF2T group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
deleted file mode 100755
index 48119736..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
+++ /dev/null
@@ -1,683 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_stereo_df2T_f32.c    
-*    
-* Description:  Processing function for the floating-point transposed    
-*               direct form II Biquad cascade filter. 2 channels  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**       
-* @ingroup groupFilters       
-*/
-
-/**       
-* @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure       
-*       
-* This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.       
-* The filters are implemented as a cascade of second order Biquad sections.       
-* These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.      
-* Only floating-point data is supported.       
-*       
-* This function operate on blocks of input and output data and each call to the function       
-* processes blockSize samples through the filter.       
-* pSrc points to the array of input data and       
-* pDst points to the array of output data.       
-* Both arrays contain blockSize values.       
-*       
-* \par Algorithm       
-* Each Biquad stage implements a second order filter using the difference equation:       
-* 
       
-*    y[n] = b0 * x[n] + d1       
-*    d1 = b1 * x[n] + a1 * y[n] + d2       
-*    d2 = b2 * x[n] + a2 * y[n]       
-* 
       
-* where d1 and d2 represent the two state values.       
-*       
-* \par       
-* A Biquad filter using a transposed Direct Form II structure is shown below.       
-* \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"       
-* Coefficients b0, b1, and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.       
-* Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.       
-* Pay careful attention to the sign of the feedback coefficients.       
-* Some design tools flip the sign of the feedback coefficients:       
-* 
       
-*    y[n] = b0 * x[n] + d1;       
-*    d1 = b1 * x[n] - a1 * y[n] + d2;       
-*    d2 = b2 * x[n] - a2 * y[n];       
-* 
       
-* In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.       
-*       
-* \par       
-* Higher order filters are realized as a cascade of second order sections.       
-* numStages refers to the number of second order stages used.       
-* For example, an 8th order filter would be realized with numStages=4 second order stages.       
-* A 9th order filter would be realized with numStages=5 second order stages with the       
-* coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).       
-*       
-* \par       
-* pState points to the state variable array.       
-* Each Biquad stage has 2 state variables d1 and d2.       
-* The state variables are arranged in the pState array as:       
-* 
       
-*     {d11, d12, d21, d22, ...}       
-* 
       
-* where d1x refers to the state variables for the first Biquad and       
-* d2x refers to the state variables for the second Biquad.       
-* The state array has a total length of 2*numStages values.       
-* The state variables are updated after each block of data is processed; the coefficients are untouched.       
-*       
-* \par       
-* The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.    
-* The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.    
-* That is why the Direct Form I structure supports Q15 and Q31 data types.    
-* The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables d1 and d2.    
-* Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.    
-* The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.    
-*       
-* \par Instance Structure       
-* The coefficients and state variables for a filter are stored together in an instance data structure.       
-* A separate instance structure must be defined for each filter.       
-* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.       
-*       
-* \par Init Functions       
-* There is also an associated initialization function.      
-* The initialization function performs following operations:       
-* - Sets the values of the internal structure fields.       
-* - Zeros out the values in the state buffer.       
-* To do this manually without calling the init function, assign the follow subfields of the instance structure:
-* numStages, pCoeffs, pState. Also set all of the values in pState to zero. 
-*       
-* \par       
-* Use of the initialization function is optional.       
-* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.       
-* To place an instance structure into a const data section, the instance structure must be manually initialized.       
-* Set the values in the state buffer to zeros before static initialization.       
-* For example, to statically initialize the instance structure use       
-* 
       
-*     arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};       
-* 
       
-* where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer.       
-* pCoeffs is the address of the coefficient buffer;        
-*       
-*/
-
-/**       
-* @addtogroup BiquadCascadeDF2T       
-* @{       
-*/
-
-/**      
-* @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.      
-* @param[in]  *S        points to an instance of the filter data structure.      
-* @param[in]  *pSrc     points to the block of input data.      
-* @param[out] *pDst     points to the block of output data      
-* @param[in]  blockSize number of samples to process.      
-* @return none.      
-*/
-
-
-LOW_OPTIMIZATION_ENTER
-void arm_biquad_cascade_stereo_df2T_f32(
-const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
-{
-
-    float32_t *pIn = pSrc;                         /*  source pointer            */
-    float32_t *pOut = pDst;                        /*  destination pointer       */
-    float32_t *pState = S->pState;                 /*  State pointer             */
-    float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-    float32_t acc1a, acc1b;                        /*  accumulator               */
-    float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-    float32_t Xn1a, Xn1b;                          /*  temporary input           */
-    float32_t d1a, d2a, d1b, d2b;                  /*  state variables           */
-    uint32_t sample, stage = S->numStages;         /*  loop counters             */
-
-#if defined(ARM_MATH_CM7)
-	
-    float32_t Xn2a, Xn3a, Xn4a, Xn5a, Xn6a, Xn7a, Xn8a;         /*  Input State variables     */
-    float32_t Xn2b, Xn3b, Xn4b, Xn5b, Xn6b, Xn7b, Xn8b;         /*  Input State variables     */
-    float32_t acc2a, acc3a, acc4a, acc5a, acc6a, acc7a, acc8a;  /*  Simulates the accumulator */
-    float32_t acc2b, acc3b, acc4b, acc5b, acc6b, acc7b, acc8b;  /*  Simulates the accumulator */
-
-    do
-    {
-        /* Reading the coefficients */ 
-        b0 = pCoeffs[0]; 
-        b1 = pCoeffs[1]; 
-        b2 = pCoeffs[2]; 
-        a1 = pCoeffs[3]; 
-        /* Apply loop unrolling and compute 8 output values simultaneously. */ 
-        sample = blockSize >> 3u; 
-        a2 = pCoeffs[4]; 
-
-        /*Reading the state values */ 
-        d1a = pState[0]; 
-        d2a = pState[1]; 
-        d1b = pState[2]; 
-        d2b = pState[3]; 
-
-        pCoeffs += 5u;
-
-        /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.       
-        ** a second loop below computes the remaining 1 to 7 samples. */
-        while(sample > 0u) {
-
-            /* y[n] = b0 * x[n] + d1 */
-            /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-            /* d2 = b2 * x[n] + a2 * y[n] */
-
-            /* Read the first 2 inputs. 2 cycles */
-            Xn1a  = pIn[0 ];
-            Xn1b  = pIn[1 ];
-
-            /* Sample 1. 5 cycles */
-            Xn2a  = pIn[2 ];
-            acc1a = b0 * Xn1a + d1a;
-
-            Xn2b  = pIn[3 ];
-            d1a = b1 * Xn1a + d2a;
-
-            Xn3a  = pIn[4 ];
-            d2a = b2 * Xn1a;
-
-            Xn3b  = pIn[5 ];
-            d1a += a1 * acc1a;
-
-            Xn4a  = pIn[6 ];
-            d2a += a2 * acc1a;
-
-            /* Sample 2. 5 cycles */
-            Xn4b  = pIn[7 ];
-            acc1b = b0 * Xn1b + d1b;
-
-            Xn5a  = pIn[8 ];
-            d1b = b1 * Xn1b + d2b;
-
-            Xn5b = pIn[9 ];
-            d2b = b2 * Xn1b;
-
-            Xn6a = pIn[10];
-            d1b += a1 * acc1b;
-
-            Xn6b = pIn[11];
-            d2b += a2 * acc1b;
-
-            /* Sample 3. 5 cycles */
-            Xn7a = pIn[12];
-            acc2a = b0 * Xn2a + d1a;
-
-            Xn7b = pIn[13];
-            d1a = b1 * Xn2a + d2a;
-
-            Xn8a = pIn[14];
-            d2a = b2 * Xn2a;
-
-            Xn8b = pIn[15];
-            d1a += a1 * acc2a;
-
-            pIn += 16;
-            d2a += a2 * acc2a;
-
-            /* Sample 4. 5 cycles */
-            acc2b = b0 * Xn2b + d1b;
-            d1b = b1 * Xn2b + d2b;
-            d2b = b2 * Xn2b;
-            d1b += a1 * acc2b;
-            d2b += a2 * acc2b;
-
-            /* Sample 5. 5 cycles */
-            acc3a = b0 * Xn3a + d1a;
-            d1a = b1 * Xn3a + d2a;
-            d2a = b2 * Xn3a;
-            d1a += a1 * acc3a;
-            d2a += a2 * acc3a;
-
-            /* Sample 6. 5 cycles */
-            acc3b = b0 * Xn3b + d1b;
-            d1b = b1 * Xn3b + d2b;
-            d2b = b2 * Xn3b;
-            d1b += a1 * acc3b;
-            d2b += a2 * acc3b;
-
-            /* Sample 7. 5 cycles */
-            acc4a = b0 * Xn4a + d1a;
-            d1a = b1 * Xn4a + d2a;
-            d2a = b2 * Xn4a;
-            d1a += a1 * acc4a;
-            d2a += a2 * acc4a;
-
-            /* Sample 8. 5 cycles */
-            acc4b = b0 * Xn4b + d1b;
-            d1b = b1 * Xn4b + d2b;
-            d2b = b2 * Xn4b;
-            d1b += a1 * acc4b;
-            d2b += a2 * acc4b;
-
-            /* Sample 9. 5 cycles */
-            acc5a = b0 * Xn5a + d1a;
-            d1a = b1 * Xn5a + d2a;
-            d2a = b2 * Xn5a;
-            d1a += a1 * acc5a;
-            d2a += a2 * acc5a;
-
-            /* Sample 10. 5 cycles */
-            acc5b = b0 * Xn5b + d1b;
-            d1b = b1 * Xn5b + d2b;
-            d2b = b2 * Xn5b;
-            d1b += a1 * acc5b;
-            d2b += a2 * acc5b;
-
-            /* Sample 11. 5 cycles */
-            acc6a = b0 * Xn6a + d1a;
-            d1a = b1 * Xn6a + d2a;
-            d2a = b2 * Xn6a;
-            d1a += a1 * acc6a;
-            d2a += a2 * acc6a;
-
-            /* Sample 12. 5 cycles */
-            acc6b = b0 * Xn6b + d1b;
-            d1b = b1 * Xn6b + d2b;
-            d2b = b2 * Xn6b;
-            d1b += a1 * acc6b;
-            d2b += a2 * acc6b;
-
-            /* Sample 13. 5 cycles */
-            acc7a = b0 * Xn7a + d1a;         
-            d1a = b1 * Xn7a + d2a;   
-            
-            pOut[0 ] = acc1a ;      
-            d2a = b2 * Xn7a;
-
-            pOut[1 ] = acc1b ;	
-            d1a += a1 * acc7a;
-
-            pOut[2 ] = acc2a ;	
-            d2a += a2 * acc7a;
-
-            /* Sample 14. 5 cycles */
-            pOut[3 ] = acc2b ;
-            acc7b = b0 * Xn7b + d1b;
-
-            pOut[4 ] = acc3a ; 
-            d1b = b1 * Xn7b + d2b;
-
-            pOut[5 ] = acc3b ;	
-            d2b = b2 * Xn7b;
-
-            pOut[6 ] = acc4a ;	  
-            d1b += a1 * acc7b;
-
-            pOut[7 ] = acc4b ;
-            d2b += a2 * acc7b;
-
-            /* Sample 15. 5 cycles */
-            pOut[8 ] = acc5a ;  
-            acc8a = b0 * Xn8a + d1a;
-
-            pOut[9 ] = acc5b;	
-            d1a = b1 * Xn8a + d2a;
-
-            pOut[10] = acc6a;	
-            d2a = b2 * Xn8a;
-
-            pOut[11] = acc6b;
-            d1a += a1 * acc8a;
-
-            pOut[12] = acc7a;
-            d2a += a2 * acc8a;
-
-            /* Sample 16. 5 cycles */
-            pOut[13] = acc7b;	
-            acc8b = b0 * Xn8b + d1b;
-
-            pOut[14] = acc8a;	
-            d1b = b1 * Xn8b + d2b;
-
-            pOut[15] = acc8b;
-            d2b = b2 * Xn8b;
-
-            sample--;	 
-            d1b += a1 * acc8b;
-
-            pOut += 16;
-            d2b += a2 * acc8b;
-        }
-
-        sample = blockSize & 0x7u;
-        while(sample > 0u) {
-            /* Read the input */
-            Xn1a = *pIn++; //Channel a
-            Xn1b = *pIn++; //Channel b
-
-            /* y[n] = b0 * x[n] + d1 */
-            acc1a = (b0 * Xn1a) + d1a;
-            acc1b = (b0 * Xn1b) + d1b;
-
-            /* Store the result in the accumulator in the destination buffer. */
-            *pOut++ = acc1a;
-            *pOut++ = acc1b;
-
-            /* Every time after the output is computed state should be updated. */
-            /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-            d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
-            d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
-
-            /* d2 = b2 * x[n] + a2 * y[n] */
-            d2a = (b2 * Xn1a) + (a2 * acc1a);
-            d2b = (b2 * Xn1b) + (a2 * acc1b);
-
-            sample--;	
-        }
-
-        /* Store the updated state variables back into the state array */ 
-        pState[0] = d1a; 
-        pState[1] = d2a;         
-
-        pState[2] = d1b; 
-        pState[3] = d2b; 
-        
-        /* The current stage input is given as the output to the next stage */ 
-        pIn = pDst; 
-        /* decrement the loop counter */ 
-        stage--; 
-
-        pState += 4u;
-        /*Reset the output working pointer */ 
-        pOut = pDst; 
-
-    } while(stage > 0u);
-	
-#elif defined(ARM_MATH_CM0_FAMILY)
-
-    /* Run the below code for Cortex-M0 */
-
-    do
-    {
-        /* Reading the coefficients */
-        b0 = *pCoeffs++;
-        b1 = *pCoeffs++;
-        b2 = *pCoeffs++;
-        a1 = *pCoeffs++;
-        a2 = *pCoeffs++;
-
-        /*Reading the state values */
-        d1a = pState[0];
-        d2a = pState[1];
-        d1b = pState[2];
-        d2b = pState[3];
-
-
-        sample = blockSize;
-
-        while(sample > 0u)
-        {
-            /* Read the input */
-            Xn1a = *pIn++; //Channel a
-            Xn1b = *pIn++; //Channel b
-
-            /* y[n] = b0 * x[n] + d1 */
-            acc1a = (b0 * Xn1a) + d1a;
-            acc1b = (b0 * Xn1b) + d1b;
-
-            /* Store the result in the accumulator in the destination buffer. */
-            *pOut++ = acc1a;
-            *pOut++ = acc1b;
-
-            /* Every time after the output is computed state should be updated. */
-            /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-            d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
-            d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
-
-            /* d2 = b2 * x[n] + a2 * y[n] */
-            d2a = (b2 * Xn1a) + (a2 * acc1a);
-            d2b = (b2 * Xn1b) + (a2 * acc1b);
-
-            /* decrement the loop counter */
-            sample--;
-        }
-
-        /* Store the updated state variables back into the state array */
-        *pState++ = d1a;
-        *pState++ = d2a;
-        *pState++ = d1b;
-        *pState++ = d2b;
-
-        /* The current stage input is given as the output to the next stage */
-        pIn = pDst;
-
-        /*Reset the output working pointer */
-        pOut = pDst;
-
-        /* decrement the loop counter */
-        stage--;
-
-    } while(stage > 0u);
-	 
-#else
-
-    float32_t Xn2a, Xn3a, Xn4a;                          /*  Input State variables     */
-    float32_t Xn2b, Xn3b, Xn4b;                          /*  Input State variables     */
-    float32_t acc2a, acc3a, acc4a;                       /*  accumulator               */
-    float32_t acc2b, acc3b, acc4b;                       /*  accumulator               */
-    float32_t p0a, p1a, p2a, p3a, p4a, A1a;
-    float32_t p0b, p1b, p2b, p3b, p4b, A1b;
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-    do
-    {
-        /* Reading the coefficients */     
-        b0 = *pCoeffs++;
-        b1 = *pCoeffs++;
-        b2 = *pCoeffs++;
-        a1 = *pCoeffs++;
-        a2 = *pCoeffs++;      
-
-        /*Reading the state values */
-        d1a = pState[0];
-        d2a = pState[1];
-        d1b = pState[2];
-        d2b = pState[3];
-
-        /* Apply loop unrolling and compute 4 output values simultaneously. */
-        sample = blockSize >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
-        ** a second loop below computes the remaining 1 to 3 samples. */
-        while(sample > 0u) {
-
-            /* y[n] = b0 * x[n] + d1 */
-            /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-            /* d2 = b2 * x[n] + a2 * y[n] */
-
-            /* Read the four inputs */
-            Xn1a = pIn[0];
-            Xn1b = pIn[1];
-            Xn2a = pIn[2];
-            Xn2b = pIn[3];
-            Xn3a = pIn[4];
-            Xn3b = pIn[5];
-            Xn4a = pIn[6];
-            Xn4b = pIn[7];
-            pIn += 8;     
-            
-            p0a = b0 * Xn1a; 
-            p0b = b0 * Xn1b; 
-            p1a = b1 * Xn1a;
-            p1b = b1 * Xn1b;
-            acc1a = p0a + d1a;
-            acc1b = p0b + d1b;
-            p0a = b0 * Xn2a; 
-            p0b = b0 * Xn2b; 
-            p3a = a1 * acc1a;
-            p3b = a1 * acc1b;
-            p2a = b2 * Xn1a;
-            p2b = b2 * Xn1b;
-            A1a = p1a + p3a;
-            A1b = p1b + p3b;
-            p4a = a2 * acc1a;
-            p4b = a2 * acc1b;
-            d1a = A1a + d2a;
-            d1b = A1b + d2b;
-            d2a = p2a + p4a;
-            d2b = p2b + p4b;
-            
-            p1a = b1 * Xn2a;
-            p1b = b1 * Xn2b;
-            acc2a = p0a + d1a;
-            acc2b = p0b + d1b;
-            p0a = b0 * Xn3a; 
-            p0b = b0 * Xn3b; 
-            p3a = a1 * acc2a;
-            p3b = a1 * acc2b;
-            p2a = b2 * Xn2a;
-            p2b = b2 * Xn2b;
-            A1a = p1a + p3a;
-            A1b = p1b + p3b;
-            p4a = a2 * acc2a;
-            p4b = a2 * acc2b;
-            d1a = A1a + d2a;
-            d1b = A1b + d2b;
-            d2a = p2a + p4a;
-            d2b = p2b + p4b;
-            
-            p1a = b1 * Xn3a;
-            p1b = b1 * Xn3b;
-            acc3a = p0a + d1a;
-            acc3b = p0b + d1b;
-            p0a = b0 * Xn4a; 
-            p0b = b0 * Xn4b; 
-            p3a = a1 * acc3a;
-            p3b = a1 * acc3b;
-            p2a = b2 * Xn3a;
-            p2b = b2 * Xn3b;
-            A1a = p1a + p3a;
-            A1b = p1b + p3b;
-            p4a = a2 * acc3a;
-            p4b = a2 * acc3b;
-            d1a = A1a + d2a;
-            d1b = A1b + d2b;
-            d2a = p2a + p4a;
-            d2b = p2b + p4b;
-            
-            acc4a = p0a + d1a;
-            acc4b = p0b + d1b;
-            p1a = b1 * Xn4a;
-            p1b = b1 * Xn4b;
-            p3a = a1 * acc4a;
-            p3b = a1 * acc4b;
-            p2a = b2 * Xn4a;
-            p2b = b2 * Xn4b;
-            A1a = p1a + p3a;
-            A1b = p1b + p3b;
-            p4a = a2 * acc4a;
-            p4b = a2 * acc4b;
-            d1a = A1a + d2a;
-            d1b = A1b + d2b;
-            d2a = p2a + p4a;
-            d2b = p2b + p4b;
-
-            pOut[0] = acc1a;	
-            pOut[1] = acc1b;	
-            pOut[2] = acc2a;	
-            pOut[3] = acc2b;
-            pOut[4] = acc3a;	
-            pOut[5] = acc3b;	
-            pOut[6] = acc4a;	
-            pOut[7] = acc4b;
-            pOut += 8;
-             
-            sample--;	       
-        }
-
-        sample = blockSize & 0x3u;
-        while(sample > 0u) {
-            Xn1a = *pIn++;
-            Xn1b = *pIn++;
-
-            p0a = b0 * Xn1a; 
-            p0b = b0 * Xn1b; 
-            p1a = b1 * Xn1a;
-            p1b = b1 * Xn1b;
-            acc1a = p0a + d1a;
-            acc1b = p0b + d1b;
-            p3a = a1 * acc1a;
-            p3b = a1 * acc1b;
-            p2a = b2 * Xn1a;
-            p2b = b2 * Xn1b;
-            A1a = p1a + p3a;
-            A1b = p1b + p3b;
-            p4a = a2 * acc1a;
-            p4b = a2 * acc1b;
-            d1a = A1a + d2a;
-            d1b = A1b + d2b;
-            d2a = p2a + p4a;
-            d2b = p2b + p4b;
-
-            *pOut++ = acc1a;
-            *pOut++ = acc1b;
-
-            sample--;	       
-        }
-
-        /* Store the updated state variables back into the state array */
-        *pState++ = d1a;
-        *pState++ = d2a;
-        *pState++ = d1b;
-        *pState++ = d2b;
-
-        /* The current stage input is given as the output to the next stage */
-        pIn = pDst;
-
-        /*Reset the output working pointer */
-        pOut = pDst;
-
-        /* decrement the loop counter */
-        stage--;
-
-    } while(stage > 0u);
-
-#endif 
-
-}
-LOW_OPTIMIZATION_EXIT
-
-/**       
-   * @} end of BiquadCascadeDF2T group       
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c
deleted file mode 100755
index b19587a0..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_biquad_cascade_stereo_df2T_init_f32.c    
-*    
-* Description:  Initialization function for the floating-point transposed   
-*               direct form II Biquad cascade filter.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF2T    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.   
- * @param[in,out] *S           points to an instance of the filter data structure.   
- * @param[in]     numStages    number of 2nd order stages in the filter.   
- * @param[in]     *pCoeffs     points to the filter coefficients.   
- * @param[in]     *pState      points to the state buffer.   
- * @return        none   
- *    
- * Coefficient and State Ordering:    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
    
- *    
- * \par    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 5*numStages values.    
- *    
- * \par    
- * The pState is a pointer to state array.    
- * Each Biquad stage has 2 state variables d1, and d2 for each channel.    
- * The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.    
- * The state array has a total length of 2*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- */
-
-void arm_biquad_cascade_stereo_df2T_init_f32(
-  arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF2T group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c
deleted file mode 100755
index 1fdc6a17..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c
+++ /dev/null
@@ -1,647 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_f32.c    
-*    
-* Description:	Convolution of floating-point sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup Conv Convolution    
- *    
- * Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector.    
- * Convolution is similar to correlation and is frequently used in filtering and data analysis.    
- * The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types.    
- * The library also provides fast versions of the Q15 and Q31 functions on Cortex-M4 and Cortex-M3.    
- *    
- * \par Algorithm    
- * Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively.    
- * Then the convolution    
- *    
- * 
    
- *                   c[n] = a[n] * b[n]    
- * 
    
- *    
- * \par    
- * is defined as    
- * \image html ConvolutionEquation.gif    
- * \par    
- * Note that c[n] is of length srcALen + srcBLen - 1 and is defined over the interval n=0, 1, 2, ..., srcALen + srcBLen - 2.    
- * pSrcA points to the first input vector of length srcALen and    
- * pSrcB points to the second input vector of length srcBLen.    
- * The output result is written to pDst and the calling function must allocate srcALen+srcBLen-1 words for the result.    
- *    
- * \par    
- * Conceptually, when two signals a[n] and b[n] are convolved,    
- * the signal b[n] slides over a[n].    
- * For each offset \c n, the overlapping portions of a[n] and b[n] are multiplied and summed together.    
- *    
- * \par    
- * Note that convolution is a commutative operation:    
- *    
- * 
    
- *                   a[n] * b[n] = b[n] * a[n].    
- * 
    
- *    
- * \par    
- * This means that switching the A and B arguments to the convolution functions has no effect.    
- *    
- * Fixed-Point Behavior    
- *    
- * \par    
- * Convolution requires summing up a large number of intermediate products.    
- * As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.    
- * Refer to the function specific documentation below for further details of the particular algorithm used.    
- *
- *
- * Fast Versions
- *
- * \par 
- * Fast versions are supported for Q31 and Q15.  Cycles for Fast versions are less compared to Q31 and Q15 of conv and the design requires
- * the input signals should be scaled down to avoid intermediate overflows.   
- *
- *
- * Opt Versions
- *
- * \par 
- * Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
- * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions 
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @brief Convolution of floating-point sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @return none.    
- */
-
-void arm_conv_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t *pIn1;                               /* inputA pointer */
-  float32_t *pIn2;                               /* inputB pointer */
-  float32_t *pOut = pDst;                        /* output pointer */
-  float32_t *px;                                 /* Intermediate inputA pointer */
-  float32_t *py;                                 /* Intermediate inputB pointer */
-  float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
-  float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulator */
-  float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
-  uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counters */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally    
-   * divided into three stages according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first stage of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-   * In the third stage of the algorithm, the multiplications decrease by one    
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.    
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------    
-   * initializations of stage1    
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]    
-   * sum = x[0] * y[1] + x[1] * y[0]    
-   * ....    
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------    
-   * Stage1 process    
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0.0f;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 1] */
-      sum += *px++ * *py--;
-
-      /* x[1] * y[srcBLen - 2] */
-      sum += *px++ * *py--;
-
-      /* x[2] * y[srcBLen - 3] */
-      sum += *px++ * *py--;
-
-      /* x[3] * y[srcBLen - 4] */
-      sum += *px++ * *py--;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += *px++ * *py--;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------    
-   * Initializations of stage2    
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------    
-   * Stage2 process    
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[srcBLen - 1] sample */
-        c0 = *(py--);
-
-        /* Read x[3] sample */
-        x3 = *(px);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[srcBLen - 1] */
-        acc0 += x0 * c0;
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] */
-        acc1 += x1 * c0;
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] */
-        acc2 += x2 * c0;
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] */
-        acc3 += x3 * c0;
-
-        /* Read y[srcBLen - 2] sample */
-        c0 = *(py--);
-
-        /* Read x[4] sample */
-        x0 = *(px + 1u);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[srcBLen - 2] */
-        acc0 += x1 * c0;
-        /* acc1 +=  x[2] * y[srcBLen - 2] */
-        acc1 += x2 * c0;
-        /* acc2 +=  x[3] * y[srcBLen - 2] */
-        acc2 += x3 * c0;
-        /* acc3 +=  x[4] * y[srcBLen - 2] */
-        acc3 += x0 * c0;
-
-        /* Read y[srcBLen - 3] sample */
-        c0 = *(py--);
-
-        /* Read x[5] sample */
-        x1 = *(px + 2u);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[srcBLen - 3] */
-        acc0 += x2 * c0;
-        /* acc1 +=  x[3] * y[srcBLen - 2] */
-        acc1 += x3 * c0;
-        /* acc2 +=  x[4] * y[srcBLen - 2] */
-        acc2 += x0 * c0;
-        /* acc3 +=  x[5] * y[srcBLen - 2] */
-        acc3 += x1 * c0;
-
-        /* Read y[srcBLen - 4] sample */
-        c0 = *(py--);
-
-        /* Read x[6] sample */
-        x2 = *(px + 3u);
-        px += 4u;
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[3] * y[srcBLen - 4] */
-        acc0 += x3 * c0;
-        /* acc1 +=  x[4] * y[srcBLen - 4] */
-        acc1 += x0 * c0;
-        /* acc2 +=  x[5] * y[srcBLen - 4] */
-        acc2 += x1 * c0;
-        /* acc3 +=  x[6] * y[srcBLen - 4] */
-        acc3 += x2 * c0;
-
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
-        /* Read x[7] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[srcBLen - 5] */
-        acc0 += x0 * c0;
-        /* acc1 +=  x[5] * y[srcBLen - 5] */
-        acc1 += x1 * c0;
-        /* acc2 +=  x[6] * y[srcBLen - 5] */
-        acc2 += x2 * c0;
-        /* acc3 +=  x[7] * y[srcBLen - 5] */
-        acc3 += x3 * c0;
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc0;
-      *pOut++ = acc1;
-      *pOut++ = acc2;
-      *pOut++ = acc3;
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += *px++ * *py--;
-        sum += *px++ * *py--;
-        sum += *px++ * *py--;
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,    
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------    
-   * Initializations of stage3    
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-   * sum +=  x[srcALen-1] * y[srcBLen-1]    
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* -------------------    
-   * Stage3 process    
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0.0f;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-      sum += *px++ * *py--;
-
-      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-      sum += *px++ * *py--;
-
-      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-      sum += *px++ * *py--;
-
-      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-      sum += *px++ * *py--;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-      sum += *px++ * *py--;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  float32_t *pIn2 = pSrcB;                       /* inputB pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-
-  /* Loop to calculate convolution for output length number of times */
-  for (i = 0u; i < ((srcALen + srcBLen) - 1u); i++)
-  {
-    /* Initialize sum with zero to carry out MAC operations */
-    sum = 0.0f;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0u; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if((((i - j) < srcBLen) && (j < srcALen)))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += pIn1[j] * pIn2[i - j];
-      }
-    }
-    /* Store the output in the destination buffer */
-    pDst[i] = sum;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY        */
-
-}
-
-/**    
- * @} end of Conv group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_opt_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
deleted file mode 100755
index 70f1bfc1..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
+++ /dev/null
@@ -1,543 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_fast_opt_q15.c    
-*    
-* Description:	Fast Q15 Convolution.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
- * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
- * @return none.    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
- *     
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This fast version uses a 32-bit accumulator with 2.30 format.    
- * The accumulator maintains full precision of the intermediate multiplication results    
- * but provides only a single guard bit. There is no saturation on intermediate additions.    
- * Thus, if the accumulator overflows it wraps around and distorts the result.    
- * The input signals should be scaled down to avoid intermediate overflows.    
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,    
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.    
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.    
- *    
- * \par    
- * See arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.    
- */
-
-void arm_conv_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-  q31_t y1, y2;                                  /* State variables */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  uint32_t tapCnt;                               /* loop count */
-#ifdef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t a, b;
-
-#endif	/*	#ifdef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* Pointer to take end of scratch2 buffer */
-  pScr2 = pScratch2 + srcBLen - 1;
-
-  /* points to smaller length sequence */
-  px = pIn2;
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcBLen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-
-  /* Copy smaller length input sequence in reverse order into second scratch buffer */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcBLen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr2-- = *px++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* Initialze temporary scratch pointer */
-  pScr1 = pScratch1;
-
-  /* Assuming scratch1 buffer is aligned by 32-bit */
-  /* Fill (srcBLen - 1u) zeros in scratch1 buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1u);
-
-  /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr1, srcALen);
-
-  /* Update pointers */
-  pScr1 += srcALen;
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcALen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1u);
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = (srcBLen - 1u) % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* Temporary pointer for scratch2 */
-  py = pScratch2;
-
-
-  /* Initialization of pIn2 pointer */
-  pIn2 = py;
-
-  /* First part of the processing with loop unrolling process 4 data points at a time.       
-   ** a second loop below process for the remaining 1 to 3 samples. */
-
-  /* Actual convolution process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr1)++;
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr1)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pIn2);
-      y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x1, y1, acc0);
-      acc2 = __SMLAD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = _SIMD32_OFFSET(pScr1);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x2, y2, acc0);
-      acc2 = __SMLAD(x1, y2, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-      acc1 = __SMLADX(x3, y2, acc1);
-
-      x2 = _SIMD32_OFFSET(pScr1 + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y2, acc3);
-
-#else	 
-
-      /* Read four samples from smaller buffer */
-	  a = *pIn2;
-	  b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      y1 = __PKHBT(a, b, 16);
-#else
-      y1 = __PKHBT(b, a, 16);
-#endif
-	  
-	  a = *(pIn2 + 2);
-	  b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
-      y2 = __PKHBT(a, b, 16);
-#else
-      y2 = __PKHBT(b, a, 16);
-#endif				
-
-      acc0 = __SMLAD(x1, y1, acc0);
-
-      acc2 = __SMLAD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-	  a = *pScr1;
-	  b = *(pScr1 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(a, b, 16);
-#else
-      x1 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLAD(x2, y2, acc0);
-
-      acc2 = __SMLAD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      acc1 = __SMLADX(x3, y2, acc1);
-
-	  a = *(pScr1 + 2);
-	  b = *(pScr1 + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x2 = __PKHBT(a, b, 16);
-#else
-      x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y2, acc3);
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      /* update scratch pointers */
-      pIn2 += 4u;
-      pScr1 += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2);
-      acc1 += (*pScr1++ * *pIn2);
-      acc2 += (*pScr1++ * *pIn2);
-      acc3 += (*pScr1++ * *pIn2++);
-
-      pScr1 -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-
-    /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-
-#else
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch1 += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate convolution for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-
-      acc0 += (*pScr1++ * *pIn2++);
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the output in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch1 += 1u;
-
-  }
-
-}
-
-/**    
- * @} end of Conv group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c
deleted file mode 100755
index 44f19bb6..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c
+++ /dev/null
@@ -1,1410 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_fast_q15.c   
-*   
-* Description:	Fast Q15 Convolution.   
-*   
-* Target Processor: Cortex-M4/Cortex-M3
-* 
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup Conv   
- * @{   
- */
-
-/**   
- * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.   
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.   
- * @return none.   
- *   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * This fast version uses a 32-bit accumulator with 2.30 format.   
- * The accumulator maintains full precision of the intermediate multiplication results   
- * but provides only a single guard bit. There is no saturation on intermediate additions.   
- * Thus, if the accumulator overflows it wraps around and distorts the result.   
- * The input signals should be scaled down to avoid intermediate overflows.   
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,   
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.   
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.   
- *   
- * \par   
- * See arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.   
- */
-
-void arm_conv_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst)
-{
-#ifndef UNALIGNED_SUPPORT_DISABLE
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-  uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt;     /* loop counter */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally   
-   * divided into three stages according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first stage of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-   * In the third stage of the algorithm, the multiplications decrease by one   
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.   
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]   
-   * sum = x[0] * y[1] + x[1] * y[0]   
-   * ....   
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations less than 4 */
-  /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  while((count < 4u) && (blockSize1 > 0u))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Loop over number of MAC operations between   
-     * inputA samples and inputB samples */
-    k = count;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLAD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* The second part of the stage starts here */
-  /* The internal loop, over count, is unrolled by 4 */
-  /* To, read the last two inputB samples using SIMD:   
-   * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-  py = py - 1;
-
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-      /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* For the next MAC operations, the pointer py is used without SIMD   
-     * So, py is incremented by 1 */
-    py = py + 1u;
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLAD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + (count - 1u);
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-
-  /* --------------------   
-   * Stage2 process   
-   * -------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      py = py - 1u;
-
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-
-      /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-      /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px+1);
-	  px+= 2u;
-
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:   
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLADX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLADX(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-        /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px+1);
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLADX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLADX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLADX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLADX(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px+2);
-
-        /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px+3);
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLADX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLADX(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-
-        /* Read y[srcBLen - 7] */
-		c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-        x3 =  _SIMD32_OFFSET(px+2);
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the results in the accumulators in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ = __PKHBT((acc0 >> 15), (acc1 >> 15), 16);
-      *__SIMD32(pOut)++ = __PKHBT((acc2 >> 15), (acc3 >> 15), 16);
-
-#else
-
-      *__SIMD32(pOut)++ = __PKHBT((acc1 >> 15), (acc0 >> 15), 16);
-      *__SIMD32(pOut)++ = __PKHBT((acc3 >> 15), (acc2 >> 15), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-   * sum +=  x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  pIn2 = pSrc2 - 1u;
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations greater than 4 */
-  /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  j = blockSize3 >> 2u;
-
-  while((j > 0u) && (blockSize3 > 0u))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied   
-       * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-      /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied   
-       * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* For the next MAC operations, the pointer py is used without SIMD   
-     * So, py is incremented by 1 */
-    py = py + 1u;
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-      sum = __SMLAD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-
-    j--;
-  }
-
-  /* The second part of the stage starts here */
-  /* SIMD is not used for the next MAC operations,   
-   * so pointer py is updated to read only one sample at a time */
-  py = py + 1u;
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-      sum = __SMLAD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-  uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt;     /* loop counter */
-  q15_t a, b;
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally   
-   * divided into three stages according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first stage of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-   * In the third stage of the algorithm, the multiplications decrease by one   
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.   
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]   
-   * sum = x[0] * y[1] + x[1] * y[0]   
-   * ....   
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations less than 4 */
-  /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  while((count < 4u) && (blockSize1 > 0u))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Loop over number of MAC operations between   
-     * inputA samples and inputB samples */
-    k = count;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* The second part of the stage starts here */
-  /* The internal loop, over count, is unrolled by 4 */
-  /* To, read the last two inputB samples using SIMD:   
-   * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-  py = py - 1;
-
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-	py++;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + (count - 1u);
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-
-  /* --------------------   
-   * Stage2 process   
-   * -------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      py = py - 1u;
-
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;	  
-
-      /* read x[0], x[1] samples */
-	  a = *px++;
-	  b = *px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x0 = __PKHBT(a, b, 16);
-	  a = *px;
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *px;
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:   
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-		a = *py;
-		b = *(py+1);
-		py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLADX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLADX(x1, c0, acc1);
-
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x2 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x3 = __PKHBT(b, a, 16);
-
-#else
-
-	  x2 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x3 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLADX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLADX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-		a = *py;
-		b = *(py+1);
-		py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLADX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLADX(x3, c0, acc1);
-
-        /* Read x[4], x[5], x[6] */
-	  a = *(px + 2);
-	  b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x0 = __PKHBT(a, b, 16);
-	  a = *(px + 4);
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *(px + 4);
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLADX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLADX(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-		a = *px;
-		b = *(px+1);
-		px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
- 		x3 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-		a = *py;
-		b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x3 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  x3 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-		a = *py;
-		b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x3 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  x3 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-
-        /* Read y[srcBLen - 7] */
-		c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-		a = *(px+2);
-		b = *(px+3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
- 		x3 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the results in the accumulators in the destination buffer. */
-	  *pOut++ = (q15_t)(acc0 >> 15);
-	  *pOut++ = (q15_t)(acc1 >> 15);
-	  *pOut++ = (q15_t)(acc2 >> 15);
-	  *pOut++ = (q15_t)(acc3 >> 15);
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-   * sum +=  x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  pIn2 = pSrc2 - 1u;
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations greater than 4 */
-  /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  j = blockSize3 >> 2u;
-
-  while((j > 0u) && (blockSize3 > 0u))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-	py++;
-
-    while(k > 0u)
-    {	
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-        sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-
-    j--;
-  }
-
-  /* The second part of the stage starts here */
-  /* SIMD is not used for the next MAC operations,   
-   * so pointer py is updated to read only one sample at a time */
-  py = py + 1u;
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-}
-
-/**   
- * @} end of Conv group   
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c
deleted file mode 100755
index 4111a1e8..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c
+++ /dev/null
@@ -1,577 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_fast_q31.c    
-*    
-* Description:	Q31 Convolution (fast version).    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.    
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.    
- * These intermediate results are accumulated in a 32-bit register in 2.30 format.    
- * Finally, the accumulator is saturated and converted to a 1.31 result.    
- *    
- * \par    
- * The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signals must be scaled down.    
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,    
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.    
- *    
- * \par    
- * See arm_conv_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.    
- */
-
-void arm_conv_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst)
-{
-  q31_t *pIn1;                                   /* inputA pointer */
-  q31_t *pIn2;                                   /* inputB pointer */
-  q31_t *pOut = pDst;                            /* output pointer */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-  uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally    
-   * divided into three stages according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first stage of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-   * In the third stage of the algorithm, the multiplications decrease by one    
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.    
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------    
-   * Initializations of stage1    
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]    
-   * sum = x[0] * y[1] + x[1] * y[0]    
-   * ....    
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------    
-   * Stage1 process    
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 1] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* x[1] * y[srcBLen - 2] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* x[2] * y[srcBLen - 3] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* x[3] * y[srcBLen - 4] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = sum << 1;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------    
-   * Initializations of stage2    
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------    
-   * Stage2 process    
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[srcBLen - 1] sample */
-        c0 = *(py--);
-
-        /* Read x[3] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[0] * y[srcBLen - 1] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-        /* Read y[srcBLen - 2] sample */
-        c0 = *(py--);
-
-        /* Read x[4] sample */
-        x0 = *(px++);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[srcBLen - 2] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc1 +=  x[2] * y[srcBLen - 2] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc2 +=  x[3] * y[srcBLen - 2] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc3 +=  x[4] * y[srcBLen - 2] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-        /* Read y[srcBLen - 3] sample */
-        c0 = *(py--);
-
-        /* Read x[5] sample */
-        x1 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[srcBLen - 3] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc1 +=  x[3] * y[srcBLen - 3] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc2 +=  x[4] * y[srcBLen - 3] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc3 +=  x[5] * y[srcBLen - 3] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-        /* Read y[srcBLen - 4] sample */
-        c0 = *(py--);
-
-        /* Read x[6] sample */
-        x2 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[3] * y[srcBLen - 4] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc1 +=  x[4] * y[srcBLen - 4] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc2 +=  x[5] * y[srcBLen - 4] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc3 +=  x[6] * y[srcBLen - 4] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
-
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
-        /* Read x[7] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[srcBLen - 5] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc1 +=  x[5] * y[srcBLen - 5] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc2 +=  x[6] * y[srcBLen - 5] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc3 +=  x[7] * y[srcBLen - 5] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the results in the accumulators in the destination buffer. */
-      *pOut++ = (q31_t) (acc0 << 1);
-      *pOut++ = (q31_t) (acc1 << 1);
-      *pOut++ = (q31_t) (acc2 << 1);
-      *pOut++ = (q31_t) (acc3 << 1);
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum << 1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,    
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum << 1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------    
-   * Initializations of stage3    
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-   * sum +=  x[srcALen-1] * y[srcBLen-1]    
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* -------------------    
-   * Stage3 process    
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = sum << 1;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-}
-
-/**    
- * @} end of Conv group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q15.c
deleted file mode 100755
index dffa2de7..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q15.c
+++ /dev/null
@@ -1,545 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_opt_q15.c    
-*    
-* Description:	Convolution of Q15 sequences.      
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @brief Convolution of Q15 sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.    
- * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).    
- * @return none.    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
- *    
- *       
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * This approach provides 33 guard bits and there is no risk of overflow.    
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.    
- *  
- *   
- * \par    
- * Refer to arm_conv_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.     
- * 
- *  
- */
-
-void arm_conv_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-  q31_t y1, y2;                                  /* State variables */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  uint32_t tapCnt;                               /* loop count */
-#ifdef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t a, b;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* pointer to take end of scratch2 buffer */
-  pScr2 = pScratch2 + srcBLen - 1;
-
-  /* points to smaller length sequence */
-  px = pIn2;
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcBLen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  /* Copy smaller length input sequence in reverse order into second scratch buffer */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcBLen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr2-- = *px++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* Initialze temporary scratch pointer */
-  pScr1 = pScratch1;
-
-  /* Assuming scratch1 buffer is aligned by 32-bit */
-  /* Fill (srcBLen - 1u) zeros in scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1u);
-
-  /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr1, srcALen);
-
-  /* Update pointers */
-  pScr1 += srcALen;
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcALen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif
-
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1u);
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = (srcBLen - 1u) % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif
-
-  /* Temporary pointer for scratch2 */
-  py = pScratch2;
-
-
-  /* Initialization of pIn2 pointer */
-  pIn2 = py;
-
-  /* First part of the processing with loop unrolling process 4 data points at a time.       
-   ** a second loop below process for the remaining 1 to 3 samples. */
-
-  /* Actual convolution process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr1)++;
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr1)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pIn2);
-      y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-      /* multiply and accumlate */
-      acc0 = __SMLALD(x1, y1, acc0);
-      acc2 = __SMLALD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLALDX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = _SIMD32_OFFSET(pScr1);
-
-      /* multiply and accumlate */
-      acc0 = __SMLALD(x2, y2, acc0);
-      acc2 = __SMLALD(x1, y2, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y1, acc3);
-      acc1 = __SMLALDX(x3, y2, acc1);
-
-      x2 = _SIMD32_OFFSET(pScr1 + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y2, acc3);
-
-#else	 
-
-      /* Read four samples from smaller buffer */
-	  a = *pIn2;
-	  b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      y1 = __PKHBT(a, b, 16);
-#else
-      y1 = __PKHBT(b, a, 16);
-#endif
-	  
-	  a = *(pIn2 + 2);
-	  b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
-      y2 = __PKHBT(a, b, 16);
-#else
-      y2 = __PKHBT(b, a, 16);
-#endif				
-
-      acc0 = __SMLALD(x1, y1, acc0);
-
-      acc2 = __SMLALD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLALDX(x3, y1, acc1);
-
-	  a = *pScr1;
-	  b = *(pScr1 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(a, b, 16);
-#else
-      x1 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLALD(x2, y2, acc0);
-
-      acc2 = __SMLALD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y1, acc3);
-
-      acc1 = __SMLALDX(x3, y2, acc1);
-
-	  a = *(pScr1 + 2);
-	  b = *(pScr1 + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x2 = __PKHBT(a, b, 16);
-#else
-      x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y2, acc3);
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      pIn2 += 4u;
-      pScr1 += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2);
-      acc1 += (*pScr1++ * *pIn2);
-      acc2 += (*pScr1++ * *pIn2);
-      acc3 += (*pScr1++ * *pIn2++);
-
-      pScr1 -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-
-    /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch1 += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate convolution for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Read next two samples from scratch1 buffer */
-      acc0 += (*pScr1++ * *pIn2++);
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the output in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch1 += 1u;
-
-  }
-
-}
-
-
-/**    
- * @} end of Conv group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q7.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q7.c
deleted file mode 100755
index b77afbe4..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q7.c
+++ /dev/null
@@ -1,435 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_opt_q7.c    
-*    
-* Description:	Convolution of Q7 sequences.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @brief Convolution of Q7 sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
- * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).   
- * @return none.    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit     
- *       
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.    
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.    
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.    
- * This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072.    
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.    
- *
- */
-
-void arm_conv_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pScr2, *pScr1;                          /* Intermediate pointers for scratch pointers */
-  q15_t x4;                                      /* Temporary input variable */
-  q7_t *pIn1, *pIn2;                             /* inputA and inputB pointer */
-  uint32_t j, k, blkCnt, tapCnt;                 /* loop counter */
-  q7_t *px;                                      /* Temporary input1 pointer */
-  q15_t *py;                                     /* Temporary input2 pointer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3, y1;                          /* Temporary input variables */
-  q7_t *pOut = pDst;                             /* output pointer */
-  q7_t out0, out1, out2, out3;                   /* temporary variables */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* pointer to take end of scratch2 buffer */
-  pScr2 = pScratch2;
-
-  /* points to smaller length sequence */
-  px = pIn2 + srcBLen - 1;
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcBLen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    x4 = (q15_t) * px--;
-    *pScr2++ = x4;
-    x4 = (q15_t) * px--;
-    *pScr2++ = x4;
-    x4 = (q15_t) * px--;
-    *pScr2++ = x4;
-    x4 = (q15_t) * px--;
-    *pScr2++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcBLen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) * px--;
-    *pScr2++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* Initialze temporary scratch pointer */
-  pScr1 = pScratch1;
-
-  /* Fill (srcBLen - 1u) zeros in scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1u);
-
-  /* Copy (srcALen) samples in scratch buffer */
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcALen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1u);
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = (srcBLen - 1u) % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif
-
-  /* Temporary pointer for scratch2 */
-  py = pScratch2;
-
-  /* Initialization of pIn2 pointer */
-  pIn2 = (q7_t *) py;
-
-  pScr2 = py;
-
-  /* Actual convolution process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr1)++;
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr1)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pScr2);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x1, y1, acc0);
-      acc2 = __SMLAD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pScr2 + 2u);
-
-      acc0 = __SMLAD(x2, y1, acc0);
-
-      acc2 = __SMLAD(x1, y1, acc2);
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      x2 = *__SIMD32(pScr1)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      pScr2 += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4u;
-
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pScr2);
-      acc1 += (*pScr1++ * *pScr2);
-      acc2 += (*pScr1++ * *pScr2);
-      acc3 += (*pScr1++ * *pScr2++);
-
-      pScr1 -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    out0 = (q7_t) (__SSAT(acc0 >> 7u, 8));
-    out1 = (q7_t) (__SSAT(acc1 >> 7u, 8));
-    out2 = (q7_t) (__SSAT(acc2 >> 7u, 8));
-    out3 = (q7_t) (__SSAT(acc3 >> 7u, 8));
-
-    *__SIMD32(pOut)++ = __PACKq7(out0, out1, out2, out3);
-
-    /* Initialization of inputB pointer */
-    pScr2 = py;
-
-    pScratch1 += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate convolution for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-      acc0 += (*pScr1++ * *pScr2++);
-      acc0 += (*pScr1++ * *pScr2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pScr2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8));
-
-    /* Initialization of inputB pointer */
-    pScr2 = py;
-
-    pScratch1 += 1u;
-
-  }
-
-}
-
-
-/**    
- * @} end of Conv group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c
deleted file mode 100755
index 226ffd57..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c
+++ /dev/null
@@ -1,669 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_f32.c    
-*    
-* Description:	Partial convolution of floating-point sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup PartialConv Partial Convolution    
- *    
- * Partial Convolution is equivalent to Convolution except that a subset of the output samples is generated.    
- * Each function has two additional arguments.    
- * firstIndex specifies the starting index of the subset of output samples.    
- * numPoints is the number of output samples to compute.    
- * The function computes the output in the range    
- * [firstIndex, ..., firstIndex+numPoints-1].    
- * The output array pDst contains numPoints values.    
- *    
- * The allowable range of output indices is [0 srcALen+srcBLen-2].    
- * If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_ERROR.    
- * Otherwise the functions return ARM_MATH_SUCCESS.    
- * \note Refer arm_conv_f32() for details on fixed point behavior.   
- *
- * 
- * Fast Versions
- *
- * \par 
- * Fast versions are supported for Q31 and Q15 of partial convolution.  Cycles for Fast versions are less compared to Q31 and Q15 of partial conv and the design requires
- * the input signals should be scaled down to avoid intermediate overflows.   
- *
- *
- * Opt Versions
- *
- * \par 
- * Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
- * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions of partial convolution
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of floating-point sequences.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- */
-
-arm_status arm_conv_partial_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  float32_t *pIn2 = pSrcB;                       /* inputB pointer */
-  float32_t *pOut = pDst;                        /* output pointer */
-  float32_t *px;                                 /* Intermediate inputA pointer */
-  float32_t *py;                                 /* Intermediate inputB pointer */
-  float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
-  float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulator */
-  float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
-  uint32_t j, k, count = 0u, blkCnt, check;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
-
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds    
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = ((int32_t) check - blockSize3) -
-      (blockSize1 + (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally    
-     * divided into three stages according to the number of multiplications that has to be    
-     * taken place between inputA samples and inputB samples. In the first stage of the    
-     * algorithm, the multiplications increase by one for every iteration.    
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-     * In the third stage of the algorithm, the multiplications decrease by one    
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex    
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------    
-     * Initializations of stage1    
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]    
-     * sum = x[0] * y[1] + x[1] * y[0]    
-     * ....    
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.    
-       The count variable holds the number of MAC operations performed.    
-       Since the partial convolution starts from from firstIndex    
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc1 = pIn2 + firstIndex;
-    py = pSrc1;
-
-    /* ------------------------    
-     * Stage1 process    
-     * ----------------------*/
-
-    /* The first stage starts here */
-    while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* x[0] * y[srcBLen - 1] */
-        sum += *px++ * *py--;
-
-        /* x[1] * y[srcBLen - 2] */
-        sum += *px++ * *py--;
-
-        /* x[2] * y[srcBLen - 3] */
-        sum += *px++ * *py--;
-
-        /* x[3] * y[srcBLen - 4] */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc1;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------    
-     * Initializations of stage2    
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-     * ....    
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
-     */
-
-    /* Working pointer of inputA */
-    if((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      px = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      px = pIn1;
-    }
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* count is index by which the pointer pIn1 to be incremented */
-    count = 0u;
-
-    /* -------------------    
-     * Stage2 process    
-     * ------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-     * So, to loop unroll over blockSize2,    
-     * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
-    {
-      /* Loop unroll over blockSize2, by 4 */
-      blkCnt = ((uint32_t) blockSize2 >> 2u);
-
-      while(blkCnt > 0u)
-      {
-        /* Set all accumulators to zero */
-        acc0 = 0.0f;
-        acc1 = 0.0f;
-        acc2 = 0.0f;
-        acc3 = 0.0f;
-
-        /* read x[0], x[1], x[2] samples */
-        x0 = *(px++);
-        x1 = *(px++);
-        x2 = *(px++);
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        do
-        {
-          /* Read y[srcBLen - 1] sample */
-          c0 = *(py--);
-
-          /* Read x[3] sample */
-          x3 = *(px++);
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[0] * y[srcBLen - 1] */
-          acc0 += x0 * c0;
-
-          /* acc1 +=  x[1] * y[srcBLen - 1] */
-          acc1 += x1 * c0;
-
-          /* acc2 +=  x[2] * y[srcBLen - 1] */
-          acc2 += x2 * c0;
-
-          /* acc3 +=  x[3] * y[srcBLen - 1] */
-          acc3 += x3 * c0;
-
-          /* Read y[srcBLen - 2] sample */
-          c0 = *(py--);
-
-          /* Read x[4] sample */
-          x0 = *(px++);
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[1] * y[srcBLen - 2] */
-          acc0 += x1 * c0;
-          /* acc1 +=  x[2] * y[srcBLen - 2] */
-          acc1 += x2 * c0;
-          /* acc2 +=  x[3] * y[srcBLen - 2] */
-          acc2 += x3 * c0;
-          /* acc3 +=  x[4] * y[srcBLen - 2] */
-          acc3 += x0 * c0;
-
-          /* Read y[srcBLen - 3] sample */
-          c0 = *(py--);
-
-          /* Read x[5] sample */
-          x1 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[2] * y[srcBLen - 3] */
-          acc0 += x2 * c0;
-          /* acc1 +=  x[3] * y[srcBLen - 2] */
-          acc1 += x3 * c0;
-          /* acc2 +=  x[4] * y[srcBLen - 2] */
-          acc2 += x0 * c0;
-          /* acc3 +=  x[5] * y[srcBLen - 2] */
-          acc3 += x1 * c0;
-
-          /* Read y[srcBLen - 4] sample */
-          c0 = *(py--);
-
-          /* Read x[6] sample */
-          x2 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[3] * y[srcBLen - 4] */
-          acc0 += x3 * c0;
-          /* acc1 +=  x[4] * y[srcBLen - 4] */
-          acc1 += x0 * c0;
-          /* acc2 +=  x[5] * y[srcBLen - 4] */
-          acc2 += x1 * c0;
-          /* acc3 +=  x[6] * y[srcBLen - 4] */
-          acc3 += x2 * c0;
-
-
-        } while(--k);
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Read y[srcBLen - 5] sample */
-          c0 = *(py--);
-
-          /* Read x[7] sample */
-          x3 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[4] * y[srcBLen - 5] */
-          acc0 += x0 * c0;
-          /* acc1 +=  x[5] * y[srcBLen - 5] */
-          acc1 += x1 * c0;
-          /* acc2 +=  x[6] * y[srcBLen - 5] */
-          acc2 += x2 * c0;
-          /* acc3 +=  x[7] * y[srcBLen - 5] */
-          acc3 += x3 * c0;
-
-          /* Reuse the present samples for the next MAC */
-          x0 = x1;
-          x1 = x2;
-          x2 = x3;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = acc0;
-        *pOut++ = acc1;
-        *pOut++ = acc2;
-        *pOut++ = acc3;
-
-        /* Increment the pointer pIn1 index, count by 1 */
-        count += 4u;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0.0f;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += *px++ * *py--;
-          sum += *px++ * *py--;
-          sum += *px++ * *py--;
-          sum += *px++ * *py--;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += *px++ * *py--;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = sum;
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,    
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0.0f;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += *px++ * *py--;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = sum;
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------    
-     * Initializations of stage3    
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-     * ....    
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-     * sum +=  x[srcALen-1] * y[srcBLen-1]    
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.    
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-        sum += *px++ * *py--;
-
-        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-        sum += *px++ * *py--;
-
-        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-        sum += *px++ * *py--;
-
-        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  float32_t *pIn2 = pSrcB;                       /* inputB pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Loop to calculate convolution for output length number of values */
-    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
-    {
-      /* Initialize sum with zero to carry on MAC operations */
-      sum = 0.0f;
-
-      /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0u; j <= i; j++)
-      {
-        /* Check the array limitations for inputs */
-        if((((i - j) < srcBLen) && (j < srcALen)))
-        {
-          /* z[i] += x[i-j] * y[j] */
-          sum += pIn1[j] * pIn2[i - j];
-        }
-      }
-      /* Store the output in the destination buffer */
-      pDst[i] = sum;
-    }
-    /* set status as ARM_SUCCESS as there are no argument errors */
-    status = ARM_MATH_SUCCESS;
-  }
-  return (status);
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
deleted file mode 100755
index 194246f0..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
+++ /dev/null
@@ -1,768 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_fast_opt_q15.c    
-*    
-* Description:	Fast Q15 Partial convolution.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @param[in]       *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
- * @param[in]       *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- *    
- * See arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
- *     
- */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-arm_status arm_conv_partial_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-  q31_t y1, y2;                                  /* State variables */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  arm_status status;
-
-  uint32_t tapCnt;                               /* loop count */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2 + srcBLen - 1;
-
-    /* points to smaller length sequence */
-    px = pIn2;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-
-    /* Copy smaller length input sequence in reverse order into second scratch buffer */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Assuming scratch1 buffer is aligned by 32-bit */
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-    /* Copy (srcALen) samples in scratch buffer */
-    arm_copy_q15(pIn1, pScr1, srcALen);
-
-    /* Update pointers */
-    pScr1 += srcALen;
-
-    /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = py;
-
-    pScratch1 += firstIndex;
-
-    pOut = pDst + firstIndex;
-
-    /* First part of the processing with loop unrolling process 4 data points at a time.       
-     ** a second loop below process for the remaining 1 to 3 samples. */
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
-
-      /* Read next two samples from scratch1 buffer */
-      x2 = *__SIMD32(pScr1)++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read four samples from smaller buffer */
-        y1 = _SIMD32_OFFSET(pIn2);
-        y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-        /* multiply and accumlate */
-        acc0 = __SMLAD(x1, y1, acc0);
-        acc2 = __SMLAD(x2, y1, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        /* multiply and accumlate */
-        acc1 = __SMLADX(x3, y1, acc1);
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = _SIMD32_OFFSET(pScr1);
-
-        /* multiply and accumlate */
-        acc0 = __SMLAD(x2, y2, acc0);
-
-        acc2 = __SMLAD(x1, y2, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x1, x2, 0);
-#else
-        x3 = __PKHBT(x2, x1, 0);
-#endif
-
-        acc3 = __SMLADX(x3, y1, acc3);
-        acc1 = __SMLADX(x3, y2, acc1);
-
-        x2 = _SIMD32_OFFSET(pScr1 + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        acc3 = __SMLADX(x3, y2, acc3);
-
-        /* update scratch pointers */
-        pIn2 += 4u;
-        pScr1 += 4u;
-
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2);
-        acc1 += (*pScr1++ * *pIn2);
-        acc2 += (*pScr1++ * *pIn2);
-        acc3 += (*pScr1++ * *pIn2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-
-    blkCnt = numPoints & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = *__SIMD32(pScr1)++;
-
-        /* Read two samples from smaller buffer */
-        y1 = *__SIMD32(pIn2)++;
-
-        acc0 = __SMLAD(x1, y1, acc0);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* The result is in 2.30 format.  Convert to 1.15 with saturation.       
-       ** Then store the output in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 1u;
-
-    }
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-  /* Return to application */
-  return (status);
-}
-
-#else
-
-arm_status arm_conv_partial_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  arm_status status;                             /* Status variable */
-  uint32_t tapCnt;                               /* loop count */
-  q15_t x10, x11, x20, x21;                      /* Temporary variables to hold srcA buffer */
-  q15_t y10, y11;                                /* Temporary variables to hold srcB buffer */
-
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2 + srcBLen - 1;
-
-    /* points to smaller length sequence */
-    px = pIn2;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcALen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcALen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = *pIn1++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = (srcBLen - 1u) >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = (srcBLen - 1u) % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = py;
-
-    pScratch1 += firstIndex;
-
-    pOut = pDst + firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x10 = *pScr1++;
-      x11 = *pScr1++;
-
-      /* Read next two samples from scratch1 buffer */
-      x20 = *pScr1++;
-      x21 = *pScr1++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read two samples from smaller buffer */
-        y10 = *pIn2;
-        y11 = *(pIn2 + 1u);
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x10 *y10;
-        acc0 += (q31_t) x11 *y11;
-        acc2 += (q31_t) x20 *y10;
-        acc2 += (q31_t) x21 *y11;
-
-        /* multiply and accumlate */
-        acc1 += (q31_t) x11 *y10;
-        acc1 += (q31_t) x20 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1;
-        x11 = *(pScr1 + 1u);
-
-        /* multiply and accumlate */
-        acc3 += (q31_t) x21 *y10;
-        acc3 += (q31_t) x10 *y11;
-
-        /* Read next two samples from scratch2 buffer */
-        y10 = *(pIn2 + 2u);
-        y11 = *(pIn2 + 3u);
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x20 *y10;
-        acc0 += (q31_t) x21 *y11;
-        acc2 += (q31_t) x10 *y10;
-        acc2 += (q31_t) x11 *y11;
-        acc1 += (q31_t) x21 *y10;
-        acc1 += (q31_t) x10 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x20 = *(pScr1 + 2);
-        x21 = *(pScr1 + 3);
-
-        /* multiply and accumlate */
-        acc3 += (q31_t) x11 *y10;
-        acc3 += (q31_t) x20 *y11;
-
-        /* update scratch pointers */
-        pIn2 += 4u;
-        pScr1 += 4u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2);
-        acc1 += (*pScr1++ * *pIn2);
-        acc2 += (*pScr1++ * *pIn2);
-        acc3 += (*pScr1++ * *pIn2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-      *pOut++ = __SSAT((acc0 >> 15), 16);
-      *pOut++ = __SSAT((acc1 >> 15), 16);
-      *pOut++ = __SSAT((acc2 >> 15), 16);
-      *pOut++ = __SSAT((acc3 >> 15), 16);
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-
-    blkCnt = numPoints & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1++;
-        x11 = *pScr1++;
-
-        /* Read two samples from smaller buffer */
-        y10 = *pIn2++;
-        y11 = *pIn2++;
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x10 *y10;
-        acc0 += (q31_t) x11 *y11;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 1u;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
deleted file mode 100755
index 794879e8..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
+++ /dev/null
@@ -1,1492 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_partial_fast_q15.c   
-*   
-* Description:	Fast Q15 Partial convolution.   
-*   
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup PartialConv   
- * @{   
- */
-
-/**   
- * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.   
- * @param[in]       *pSrcA points to the first input sequence.   
- * @param[in]       srcALen length of the first input sequence.   
- * @param[in]       *pSrcB points to the second input sequence.   
- * @param[in]       srcBLen length of the second input sequence.   
- * @param[out]      *pDst points to the location where the output result is written.   
- * @param[in]       firstIndex is the first output sample to start with.   
- * @param[in]       numPoints is the number of output points to be computed.   
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
- *   
- * See arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.   
- */
-
-
-arm_status arm_conv_partial_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
-{
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counters                 */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >=srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds   
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally   
-     * divided into three stages according to the number of multiplications that has to be   
-     * taken place between inputA samples and inputB samples. In the first stage of the   
-     * algorithm, the multiplications increase by one for every iteration.   
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-     * In the third stage of the algorithm, the multiplications decrease by one   
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex   
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------   
-     * Initializations of stage1   
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]   
-     * sum = x[0] * y[1] + x[1] * y[0]   
-     * ....   
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed.   
-       Since the partial convolution starts from firstIndex   
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------   
-     * Stage1 process   
-     * ----------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations less than 4 */
-    /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    while((count < 4u) && (blockSize1 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over number of MAC operations between   
-       * inputA samples and inputB samples */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* The second part of the stage starts here */
-    /* The internal loop, over count, is unrolled by 4 */
-    /* To, read the last two inputB samples using SIMD:   
-     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-    py = py - 1;
-
-    while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-        /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* For the next MAC operations, the pointer py is used without SIMD   
-       * So, py is incremented by 1 */
-      py = py + 1u;
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2 - 1u;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------   
-     * Initializations of stage2   
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-     * ....   
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-     */
-
-    /* Working pointer of inputA */
-    if((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      px = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      px = pIn1;
-    }
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* count is the index by which the pointer pIn1 to be incremented */
-    count = 0u;
-
-
-    /* --------------------   
-     * Stage2 process   
-     * -------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-     * So, to loop unroll over blockSize2,   
-     * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
-    {
-      /* Loop unroll over blockSize2, by 4 */
-      blkCnt = ((uint32_t) blockSize2 >> 2u);
-
-      while(blkCnt > 0u)
-      {
-      py = py - 1u;
-
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-        acc3 = 0;
-
-
-        /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-        /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px+1);
-	  px+= 2u;
-
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        do
-        {
-          /* Read the last two inputB samples using SIMD:   
-           * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = *__SIMD32(py)--;
-
-          /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-          acc0 = __SMLADX(x0, c0, acc0);
-
-          /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-          acc1 = __SMLADX(x1, c0, acc1);
-
-          /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-          /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px+1);
-
-          /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-          acc2 = __SMLADX(x2, c0, acc2);
-
-          /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-          acc3 = __SMLADX(x3, c0, acc3);
-
-          /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = *__SIMD32(py)--;
-
-          /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-          acc0 = __SMLADX(x2, c0, acc0);
-
-          /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-          acc1 = __SMLADX(x3, c0, acc1);
-
-          /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px+2);
-
-          /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px+3);
-		px += 4u;
-
-          /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-          acc2 = __SMLADX(x0, c0, acc2);
-
-          /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-          acc3 = __SMLADX(x1, c0, acc3);
-
-        } while(--k);
-
-        /* For the next MAC operations, SIMD is not used   
-         * So, the 16 bit pointer if inputB, py is updated */
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        if(k == 1u)
-        {
-          /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-          /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
-
-          /* Perform the multiply-accumulates */
-          acc0 = __SMLAD(x0, c0, acc0);
-          acc1 = __SMLAD(x1, c0, acc1);
-          acc2 = __SMLADX(x1, c0, acc2);
-          acc3 = __SMLADX(x3, c0, acc3);
-        }
-
-        if(k == 2u)
-        {
-          /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-          /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-		px += 2u;
-
-          /* Perform the multiply-accumulates */
-          acc0 = __SMLADX(x0, c0, acc0);
-          acc1 = __SMLADX(x1, c0, acc1);
-          acc2 = __SMLADX(x3, c0, acc2);
-          acc3 = __SMLADX(x2, c0, acc3);
-        }
-
-        if(k == 3u)
-        {
-          /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-          /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-          /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-
-          /* Perform the multiply-accumulates */
-          acc0 = __SMLADX(x0, c0, acc0);
-          acc1 = __SMLADX(x1, c0, acc1);
-          acc2 = __SMLADX(x3, c0, acc2);
-          acc3 = __SMLADX(x2, c0, acc3);
-
-		c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-          /* Read x[10] */
-        x3 =  _SIMD32_OFFSET(px+2);
-		px += 3u;
-
-          /* Perform the multiply-accumulates */
-          acc0 = __SMLADX(x1, c0, acc0);
-          acc1 = __SMLAD(x2, c0, acc1);
-          acc2 = __SMLADX(x2, c0, acc2);
-          acc3 = __SMLADX(x3, c0, acc3);
-        }
-
-        /* Store the results in the accumulators in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *__SIMD32(pOut)++ = __PKHBT(acc0 >> 15, acc1 >> 15, 16);
-        *__SIMD32(pOut)++ = __PKHBT(acc2 >> 15, acc3 >> 15, 16);
-
-#else
-
-        *__SIMD32(pOut)++ = __PKHBT(acc1 >> 15, acc0 >> 15, 16);
-        *__SIMD32(pOut)++ = __PKHBT(acc3 >> 15, acc2 >> 15, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-        /* Increment the pointer pIn1 index, count by 4 */
-        count += 4u;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (sum >> 15);
-
-        /* Increment the pointer pIn1 index, count by 1 */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,   
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (sum >> 15);
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------   
-     * Initializations of stage3   
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-     * ....   
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-     * sum +=  x[srcALen-1] * y[srcBLen-1]   
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    pIn2 = pSrc2 - 1u;
-    py = pIn2;
-
-    /* -------------------   
-     * Stage3 process   
-     * ------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations greater than 4 */
-    /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    j = count >> 2u;
-
-    while((j > 0u) && (blockSize3 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied   
-         * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-        /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied   
-         * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* For the next MAC operations, the pointer py is used without SIMD   
-       * So, py is incremented by 1 */
-      py = py + 1u;
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-        sum = __SMLAD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pIn2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-      j--;
-    }
-
-    /* The second part of the stage starts here */
-    /* SIMD is not used for the next MAC operations,   
-     * so pointer py is updated to read only one sample at a time */
-    py = py + 1u;
-
-    while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum = __SMLAD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counters                 */
-  arm_status status;                             /* status of Partial convolution */
-  q15_t a, b;
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >=srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds   
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = ((int32_t) check - blockSize3) -
-      (blockSize1 + (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally   
-     * divided into three stages according to the number of multiplications that has to be   
-     * taken place between inputA samples and inputB samples. In the first stage of the   
-     * algorithm, the multiplications increase by one for every iteration.   
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-     * In the third stage of the algorithm, the multiplications decrease by one   
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex   
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------   
-     * Initializations of stage1   
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]   
-     * sum = x[0] * y[1] + x[1] * y[0]   
-     * ....   
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed.   
-       Since the partial convolution starts from firstIndex   
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------   
-     * Stage1 process   
-     * ----------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations less than 4 */
-    /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-    /* The first part of the stage starts here */
-  while((count < 4u) && (blockSize1 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over number of MAC operations between   
-       * inputA samples and inputB samples */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-      sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* The second part of the stage starts here */
-    /* The internal loop, over count, is unrolled by 4 */
-    /* To, read the last two inputB samples using SIMD:   
-     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-    py = py - 1;
-
-  while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-	py++;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-      sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2 - 1u;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------   
-     * Initializations of stage2   
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-     * ....   
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-     */
-
-    /* Working pointer of inputA */
-    if((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      px = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      px = pIn1;
-    }
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* count is the index by which the pointer pIn1 to be incremented */
-    count = 0u;
-
-
-    /* --------------------   
-     * Stage2 process   
-     * -------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-     * So, to loop unroll over blockSize2,   
-     * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
-    {
-      /* Loop unroll over blockSize2, by 4 */
-      blkCnt = ((uint32_t) blockSize2 >> 2u);
-
-      while(blkCnt > 0u)
-      {
-      py = py - 1u;
-
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-        acc3 = 0;
-
-      /* read x[0], x[1] samples */
-	  a = *px++;
-	  b = *px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x0 = __PKHBT(a, b, 16);
-	  a = *px;
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *px;
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:   
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-		a = *py;
-		b = *(py+1);
-		py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLADX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLADX(x1, c0, acc1);
-
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x2 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x3 = __PKHBT(b, a, 16);
-
-#else
-
-	  x2 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x3 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLADX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLADX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-		a = *py;
-		b = *(py+1);
-		py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLADX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLADX(x3, c0, acc1);
-
-        /* Read x[4], x[5], x[6] */
-	  a = *(px + 2);
-	  b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x0 = __PKHBT(a, b, 16);
-	  a = *(px + 4);
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *(px + 4);
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLADX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLADX(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-		a = *px;
-		b = *(px+1);
-		px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
- 		x3 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-		a = *py;
-		b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x3 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  x3 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-		a = *py;
-		b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x3 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  x3 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-
-        /* Read y[srcBLen - 7] */
-		c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-		a = *(px+2);
-		b = *(px+3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
- 		x3 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the results in the accumulators in the destination buffer. */
-	  *pOut++ = (q15_t)(acc0 >> 15);
-	  *pOut++ = (q15_t)(acc1 >> 15);
-	  *pOut++ = (q15_t)(acc2 >> 15);
-	  *pOut++ = (q15_t)(acc3 >> 15);
-
-        /* Increment the pointer pIn1 index, count by 4 */
-        count += 4u;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (sum >> 15);
-
-        /* Increment the pointer pIn1 index, count by 1 */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,   
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (sum >> 15);
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------   
-     * Initializations of stage3   
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-     * ....   
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-     * sum +=  x[srcALen-1] * y[srcBLen-1]   
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    pIn2 = pSrc2 - 1u;
-    py = pIn2;
-
-    /* -------------------   
-     * Stage3 process   
-     * ------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations greater than 4 */
-    /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    j = count >> 2u;
-
-    while((j > 0u) && (blockSize3 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-	py++;
-
-    while(k > 0u)
-    {	
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pIn2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-      j--;
-    }
-
-    /* The second part of the stage starts here */
-    /* SIMD is not used for the next MAC operations,   
-     * so pointer py is updated to read only one sample at a time */
-    py = py + 1u;
-
-  while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#endif /*     #ifndef UNALIGNED_SUPPORT_DISABLE      */
-}
-
-/**   
- * @} end of PartialConv group   
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
deleted file mode 100755
index 46ef94d2..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
+++ /dev/null
@@ -1,611 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_fast_q31.c    
-*    
-* Description:	Fast Q31 Partial convolution.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- *    
- * \par    
- * See arm_conv_partial_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.    
- */
-
-arm_status arm_conv_partial_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
-{
-  q31_t *pIn1;                                   /* inputA pointer               */
-  q31_t *pIn2;                                   /* inputB pointer               */
-  q31_t *pOut = pDst;                            /* output pointer               */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q31_t x0, x1, x2, x3, c0;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counters                 */
-  arm_status status;                             /* status of Partial convolution */
-
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds    
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally    
-     * divided into three stages according to the number of multiplications that has to be    
-     * taken place between inputA samples and inputB samples. In the first stage of the    
-     * algorithm, the multiplications increase by one for every iteration.    
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-     * In the third stage of the algorithm, the multiplications decrease by one    
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex    
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------    
-     * Initializations of stage1    
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]    
-     * sum = x[0] * y[1] + x[1] * y[0]    
-     * ....    
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.    
-       The count variable holds the number of MAC operations performed.    
-       Since the partial convolution starts from firstIndex    
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------    
-     * Stage1 process    
-     * ----------------------*/
-
-    /* The first loop starts here */
-    while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* x[0] * y[srcBLen - 1] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* x[1] * y[srcBLen - 2] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* x[2] * y[srcBLen - 3] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* x[3] * y[srcBLen - 4] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum << 1;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------    
-     * Initializations of stage2    
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-     * ....    
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
-     */
-
-    /* Working pointer of inputA */
-    if((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      px = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      px = pIn1;
-    }
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* count is index by which the pointer pIn1 to be incremented */
-    count = 0u;
-
-    /* -------------------    
-     * Stage2 process    
-     * ------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-     * So, to loop unroll over blockSize2,    
-     * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
-    {
-      /* Loop unroll over blockSize2 */
-      blkCnt = ((uint32_t) blockSize2 >> 2u);
-
-      while(blkCnt > 0u)
-      {
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-        acc3 = 0;
-
-        /* read x[0], x[1], x[2] samples */
-        x0 = *(px++);
-        x1 = *(px++);
-        x2 = *(px++);
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        do
-        {
-          /* Read y[srcBLen - 1] sample */
-          c0 = *(py--);
-
-          /* Read x[3] sample */
-          x3 = *(px++);
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[0] * y[srcBLen - 1] */
-          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-          /* acc1 +=  x[1] * y[srcBLen - 1] */
-          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-          /* acc2 +=  x[2] * y[srcBLen - 1] */
-          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-
-          /* acc3 +=  x[3] * y[srcBLen - 1] */
-          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-          /* Read y[srcBLen - 2] sample */
-          c0 = *(py--);
-
-          /* Read x[4] sample */
-          x0 = *(px++);
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[1] * y[srcBLen - 2] */
-          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
-          /* acc1 +=  x[2] * y[srcBLen - 2] */
-          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
-          /* acc2 +=  x[3] * y[srcBLen - 2] */
-          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
-          /* acc3 +=  x[4] * y[srcBLen - 2] */
-          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-          /* Read y[srcBLen - 3] sample */
-          c0 = *(py--);
-
-          /* Read x[5] sample */
-          x1 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[2] * y[srcBLen - 3] */
-          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
-          /* acc1 +=  x[3] * y[srcBLen - 2] */
-          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
-          /* acc2 +=  x[4] * y[srcBLen - 2] */
-          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
-          /* acc3 +=  x[5] * y[srcBLen - 2] */
-          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-          /* Read y[srcBLen - 4] sample */
-          c0 = *(py--);
-
-          /* Read x[6] sample */
-          x2 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[3] * y[srcBLen - 4] */
-          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
-          /* acc1 +=  x[4] * y[srcBLen - 4] */
-          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
-          /* acc2 +=  x[5] * y[srcBLen - 4] */
-          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
-          /* acc3 +=  x[6] * y[srcBLen - 4] */
-          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
-
-
-        } while(--k);
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Read y[srcBLen - 5] sample */
-          c0 = *(py--);
-
-          /* Read x[7] sample */
-          x3 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[4] * y[srcBLen - 5] */
-          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-          /* acc1 +=  x[5] * y[srcBLen - 5] */
-          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-          /* acc2 +=  x[6] * y[srcBLen - 5] */
-          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-          /* acc3 +=  x[7] * y[srcBLen - 5] */
-          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-          /* Reuse the present samples for the next MAC */
-          x0 = x1;
-          x1 = x2;
-          x2 = x3;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q31_t) (acc0 << 1);
-        *pOut++ = (q31_t) (acc1 << 1);
-        *pOut++ = (q31_t) (acc2 << 1);
-        *pOut++ = (q31_t) (acc3 << 1);
-
-        /* Increment the pointer pIn1 index, count by 4 */
-        count += 4u;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = sum << 1;
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,    
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = sum << 1;
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------    
-     * Initializations of stage3    
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-     * ....    
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-     * sum +=  x[srcALen-1] * y[srcBLen-1]    
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.    
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* -------------------    
-     * Stage3 process    
-     * ------------------*/
-
-    while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum << 1;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-}
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
deleted file mode 100755
index 0734938e..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
+++ /dev/null
@@ -1,765 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_opt_q15.c    
-*    
-* Description:	Partial convolution of Q15 sequences.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of Q15 sequences.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @param[in]       *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
- * @param[in]       *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, state buffers should be aligned by 32-bit    
- *    
- * Refer to arm_conv_partial_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.   
- *  
- * 
- */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-arm_status arm_conv_partial_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-  q31_t y1, y2;                                  /* State variables */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  arm_status status;                             /* Status variable */
-  uint32_t tapCnt;                               /* loop count */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2 + srcBLen - 1;
-
-    /* points to smaller length sequence */
-    px = pIn2;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-    /* Copy (srcALen) samples in scratch buffer */
-    arm_copy_q15(pIn1, pScr1, srcALen);
-
-    /* Update pointers */
-    pScr1 += srcALen;
-
-    /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = py;
-
-    pScratch1 += firstIndex;
-
-    pOut = pDst + firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
-
-      /* Read next two samples from scratch1 buffer */
-      x2 = *__SIMD32(pScr1)++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read four samples from smaller buffer */
-        y1 = _SIMD32_OFFSET(pIn2);
-        y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-        /* multiply and accumlate */
-        acc0 = __SMLALD(x1, y1, acc0);
-        acc2 = __SMLALD(x2, y1, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        /* multiply and accumlate */
-        acc1 = __SMLALDX(x3, y1, acc1);
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = _SIMD32_OFFSET(pScr1);
-
-        /* multiply and accumlate */
-        acc0 = __SMLALD(x2, y2, acc0);
-        acc2 = __SMLALD(x1, y2, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x1, x2, 0);
-#else
-        x3 = __PKHBT(x2, x1, 0);
-#endif
-
-        acc3 = __SMLALDX(x3, y1, acc3);
-        acc1 = __SMLALDX(x3, y2, acc1);
-
-        x2 = _SIMD32_OFFSET(pScr1 + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        acc3 = __SMLALDX(x3, y2, acc3);
-
-        /* update scratch pointers */
-        pIn2 += 4u;
-        pScr1 += 4u;
-
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2);
-        acc1 += (*pScr1++ * *pIn2);
-        acc2 += (*pScr1++ * *pIn2);
-        acc3 += (*pScr1++ * *pIn2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-
-    blkCnt = numPoints & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = *__SIMD32(pScr1)++;
-
-        /* Read two samples from smaller buffer */
-        y1 = *__SIMD32(pIn2)++;
-
-        acc0 = __SMLALD(x1, y1, acc0);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 1u;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-#else
-
-arm_status arm_conv_partial_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  arm_status status;                             /* Status variable */
-  uint32_t tapCnt;                               /* loop count */
-  q15_t x10, x11, x20, x21;                      /* Temporary variables to hold srcA buffer */
-  q15_t y10, y11;                                /* Temporary variables to hold srcB buffer */
-
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2 + srcBLen - 1;
-
-    /* points to smaller length sequence */
-    px = pIn2;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcALen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcALen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = *pIn1++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = (srcBLen - 1u) >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = (srcBLen - 1u) % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = py;
-
-    pScratch1 += firstIndex;
-
-    pOut = pDst + firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x10 = *pScr1++;
-      x11 = *pScr1++;
-
-      /* Read next two samples from scratch1 buffer */
-      x20 = *pScr1++;
-      x21 = *pScr1++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read two samples from smaller buffer */
-        y10 = *pIn2;
-        y11 = *(pIn2 + 1u);
-
-        /* multiply and accumlate */
-        acc0 += (q63_t) x10 *y10;
-        acc0 += (q63_t) x11 *y11;
-        acc2 += (q63_t) x20 *y10;
-        acc2 += (q63_t) x21 *y11;
-
-        /* multiply and accumlate */
-        acc1 += (q63_t) x11 *y10;
-        acc1 += (q63_t) x20 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1;
-        x11 = *(pScr1 + 1u);
-
-        /* multiply and accumlate */
-        acc3 += (q63_t) x21 *y10;
-        acc3 += (q63_t) x10 *y11;
-
-        /* Read next two samples from scratch2 buffer */
-        y10 = *(pIn2 + 2u);
-        y11 = *(pIn2 + 3u);
-
-        /* multiply and accumlate */
-        acc0 += (q63_t) x20 *y10;
-        acc0 += (q63_t) x21 *y11;
-        acc2 += (q63_t) x10 *y10;
-        acc2 += (q63_t) x11 *y11;
-        acc1 += (q63_t) x21 *y10;
-        acc1 += (q63_t) x10 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x20 = *(pScr1 + 2);
-        x21 = *(pScr1 + 3);
-
-        /* multiply and accumlate */
-        acc3 += (q63_t) x11 *y10;
-        acc3 += (q63_t) x20 *y11;
-
-        /* update scratch pointers */
-        pIn2 += 4u;
-        pScr1 += 4u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2);
-        acc1 += (*pScr1++ * *pIn2);
-        acc2 += (*pScr1++ * *pIn2);
-        acc3 += (*pScr1++ * *pIn2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-      *pOut++ = __SSAT((acc0 >> 15), 16);
-      *pOut++ = __SSAT((acc1 >> 15), 16);
-      *pOut++ = __SSAT((acc2 >> 15), 16);
-      *pOut++ = __SSAT((acc3 >> 15), 16);
-
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-
-    blkCnt = numPoints & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1++;
-        x11 = *pScr1++;
-
-        /* Read two samples from smaller buffer */
-        y10 = *pIn2++;
-        y11 = *pIn2++;
-
-        /* multiply and accumlate */
-        acc0 += (q63_t) x10 *y10;
-        acc0 += (q63_t) x11 *y11;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 1u;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q7.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
deleted file mode 100755
index e8fcce5b..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
+++ /dev/null
@@ -1,803 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_opt_q7.c    
-*    
-* Description:	Partial convolution of Q7 sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of Q7 sequences.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @param[in]      *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.    
- * @param[in]      *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).    
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit   
- * 
- *
- * 
- */
-
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-arm_status arm_conv_partial_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pScr2, *pScr1;                          /* Intermediate pointers for scratch pointers */
-  q15_t x4;                                      /* Temporary input variable */
-  q7_t *pIn1, *pIn2;                             /* inputA and inputB pointer */
-  uint32_t j, k, blkCnt, tapCnt;                 /* loop counter */
-  q7_t *px;                                      /* Temporary input1 pointer */
-  q15_t *py;                                     /* Temporary input2 pointer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3, y1;                          /* Temporary input variables */
-  arm_status status;
-  q7_t *pOut = pDst;                             /* output pointer */
-  q7_t out0, out1, out2, out3;                   /* temporary variables */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2;
-
-    /* points to smaller length sequence */
-    px = pIn2 + srcBLen - 1;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy (srcALen) samples in scratch buffer */
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcALen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcALen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update pointer */
-    pScr1 += (srcBLen - 1u);
-
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = (q7_t *) py;
-
-    pScr2 = py;
-
-    pOut = pDst + firstIndex;
-
-    pScratch1 += firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
-
-      /* Read next two samples from scratch1 buffer */
-      x2 = *__SIMD32(pScr1)++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read four samples from smaller buffer */
-        y1 = _SIMD32_OFFSET(pScr2);
-
-        /* multiply and accumlate */
-        acc0 = __SMLAD(x1, y1, acc0);
-        acc2 = __SMLAD(x2, y1, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        /* multiply and accumlate */
-        acc1 = __SMLADX(x3, y1, acc1);
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = *__SIMD32(pScr1)++;
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x1, x2, 0);
-#else
-        x3 = __PKHBT(x2, x1, 0);
-#endif
-
-        acc3 = __SMLADX(x3, y1, acc3);
-
-        /* Read four samples from smaller buffer */
-        y1 = _SIMD32_OFFSET(pScr2 + 2u);
-
-        acc0 = __SMLAD(x2, y1, acc0);
-
-        acc2 = __SMLAD(x1, y1, acc2);
-
-        acc1 = __SMLADX(x3, y1, acc1);
-
-        x2 = *__SIMD32(pScr1)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        acc3 = __SMLADX(x3, y1, acc3);
-
-        pScr2 += 4u;
-
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pScr2);
-        acc1 += (*pScr1++ * *pScr2);
-        acc2 += (*pScr1++ * *pScr2);
-        acc3 += (*pScr1++ * *pScr2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      out0 = (q7_t) (__SSAT(acc0 >> 7u, 8));
-      out1 = (q7_t) (__SSAT(acc1 >> 7u, 8));
-      out2 = (q7_t) (__SSAT(acc2 >> 7u, 8));
-      out3 = (q7_t) (__SSAT(acc3 >> 7u, 8));
-
-      *__SIMD32(pOut)++ = __PACKq7(out0, out1, out2, out3);
-
-      /* Initialization of inputB pointer */
-      pScr2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-    blkCnt = (numPoints) & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = *__SIMD32(pScr1)++;
-
-        /* Read two samples from smaller buffer */
-        y1 = *__SIMD32(pScr2)++;
-
-        acc0 = __SMLAD(x1, y1, acc0);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pScr2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8));
-
-      /* Initialization of inputB pointer */
-      pScr2 = py;
-
-      pScratch1 += 1u;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-
-  }
-
-  return (status);
-
-}
-
-#else
-
-arm_status arm_conv_partial_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pScr2, *pScr1;                          /* Intermediate pointers for scratch pointers */
-  q15_t x4;                                      /* Temporary input variable */
-  q7_t *pIn1, *pIn2;                             /* inputA and inputB pointer */
-  uint32_t j, k, blkCnt, tapCnt;                 /* loop counter */
-  q7_t *px;                                      /* Temporary input1 pointer */
-  q15_t *py;                                     /* Temporary input2 pointer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  arm_status status;
-  q7_t *pOut = pDst;                             /* output pointer */
-  q15_t x10, x11, x20, x21;                      /* Temporary input variables */
-  q15_t y10, y11;                                /* Temporary input variables */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2;
-
-    /* points to smaller length sequence */
-    px = pIn2 + srcBLen - 1;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy (srcALen) samples in scratch buffer */
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcALen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcALen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = (srcBLen - 1u) >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = (srcBLen - 1u) % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = (q7_t *) py;
-
-    pScr2 = py;
-
-    pOut = pDst + firstIndex;
-
-    pScratch1 += firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x10 = *pScr1++;
-      x11 = *pScr1++;
-
-      /* Read next two samples from scratch1 buffer */
-      x20 = *pScr1++;
-      x21 = *pScr1++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read four samples from smaller buffer */
-        y10 = *pScr2;
-        y11 = *(pScr2 + 1u);
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x10 *y10;
-        acc0 += (q31_t) x11 *y11;
-        acc2 += (q31_t) x20 *y10;
-        acc2 += (q31_t) x21 *y11;
-
-
-        acc1 += (q31_t) x11 *y10;
-        acc1 += (q31_t) x20 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1;
-        x11 = *(pScr1 + 1u);
-
-        /* multiply and accumlate */
-        acc3 += (q31_t) x21 *y10;
-        acc3 += (q31_t) x10 *y11;
-
-        /* Read next two samples from scratch2 buffer */
-        y10 = *(pScr2 + 2u);
-        y11 = *(pScr2 + 3u);
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x20 *y10;
-        acc0 += (q31_t) x21 *y11;
-        acc2 += (q31_t) x10 *y10;
-        acc2 += (q31_t) x11 *y11;
-        acc1 += (q31_t) x21 *y10;
-        acc1 += (q31_t) x10 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x20 = *(pScr1 + 2);
-        x21 = *(pScr1 + 3);
-
-        /* multiply and accumlate */
-        acc3 += (q31_t) x11 *y10;
-        acc3 += (q31_t) x20 *y11;
-
-        /* update scratch pointers */
-
-        pScr1 += 4u;
-        pScr2 += 4u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pScr2);
-        acc1 += (*pScr1++ * *pScr2);
-        acc2 += (*pScr1++ * *pScr2);
-        acc3 += (*pScr1++ * *pScr2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8));
-      *pOut++ = (q7_t) (__SSAT(acc1 >> 7u, 8));
-      *pOut++ = (q7_t) (__SSAT(acc2 >> 7u, 8));
-      *pOut++ = (q7_t) (__SSAT(acc3 >> 7u, 8));
-
-      /* Initialization of inputB pointer */
-      pScr2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-    blkCnt = (numPoints) & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1++;
-        x11 = *pScr1++;
-
-        /* Read two samples from smaller buffer */
-        y10 = *pScr2++;
-        y11 = *pScr2++;
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x10 *y10;
-        acc0 += (q31_t) x11 *y11;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pScr2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8));
-
-      /* Initialization of inputB pointer */
-      pScr2 = py;
-
-      pScratch1 += 1u;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  return (status);
-
-}
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c
deleted file mode 100755
index c2979891..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c
+++ /dev/null
@@ -1,786 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_partial_q15.c   
-*   
-* Description:	Partial convolution of Q15 sequences.  
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-* 
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup PartialConv   
- * @{   
- */
-
-/**   
- * @brief Partial convolution of Q15 sequences.   
- * @param[in]       *pSrcA points to the first input sequence.   
- * @param[in]       srcALen length of the first input sequence.   
- * @param[in]       *pSrcB points to the second input sequence.   
- * @param[in]       srcBLen length of the second input sequence.   
- * @param[out]      *pDst points to the location where the output result is written.   
- * @param[in]       firstIndex is the first output sample to start with.   
- * @param[in]       numPoints is the number of output points to be computed.   
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
- *   
- * Refer to arm_conv_partial_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.  
- * 
- * \par    
- * Refer the function arm_conv_partial_opt_q15() for a faster implementation of this function using scratch buffers.
- * 
- */
-
-
-arm_status arm_conv_partial_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
-{
-
-#if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables */
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counter                 */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds   
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally   
-     * divided into three stages according to the number of multiplications that has to be   
-     * taken place between inputA samples and inputB samples. In the first stage of the   
-     * algorithm, the multiplications increase by one for every iteration.   
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-     * In the third stage of the algorithm, the multiplications decrease by one   
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex   
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------   
-     * Initializations of stage1   
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]   
-     * sum = x[0] * y[1] + x[1] * y[0]   
-     * ....   
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed.   
-       Since the partial convolution starts from firstIndex   
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------   
-     * Stage1 process   
-     * ----------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations less than 4 */
-    /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    while((count < 4u) && (blockSize1 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over number of MAC operations between   
-       * inputA samples and inputB samples */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = __SMLALD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* The second part of the stage starts here */
-    /* The internal loop, over count, is unrolled by 4 */
-    /* To, read the last two inputB samples using SIMD:   
-     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-    py = py - 1;
-
-    while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-        /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* For the next MAC operations, the pointer py is used without SIMD   
-       * So, py is incremented by 1 */
-      py = py + 1u;
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = __SMLALD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2 - 1u;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------   
-     * Initializations of stage2   
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-     * ....   
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-     */
-
-    /* Working pointer of inputA */
-    if((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      px = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      px = pIn1;
-    }
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-  /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-
-  /* --------------------   
-   * Stage2 process   
-   * -------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      py = py - 1u;
-
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-
-      /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-      /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px+1);
-	  px+= 2u;
-
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:   
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLALDX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLALDX(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-        /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px+1);
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLALDX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLALDX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLALDX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLALDX(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px+2);
-
-        /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px+3);
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLALDX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLALDX(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
-        acc2 = __SMLALDX(x1, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x0, c0, acc0);
-        acc1 = __SMLALDX(x1, c0, acc1);
-        acc2 = __SMLALDX(x3, c0, acc2);
-        acc3 = __SMLALDX(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x0, c0, acc0);
-        acc1 = __SMLALDX(x1, c0, acc1);
-        acc2 = __SMLALDX(x3, c0, acc2);
-        acc3 = __SMLALDX(x2, c0, acc3);
-
-		c0 = *(py-1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-        x3 =  _SIMD32_OFFSET(px+2);
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x1, c0, acc0);
-        acc1 = __SMLALD(x2, c0, acc1);
-        acc2 = __SMLALDX(x2, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
-  	  
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
-
-        /* Increment the pointer pIn1 index, count by 1 */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,   
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-  
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------   
-     * Initializations of stage3   
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-     * ....   
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-     * sum +=  x[srcALen-1] * y[srcBLen-1]   
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    pIn2 = pSrc2 - 1u;
-    py = pIn2;
-
-    /* -------------------   
-     * Stage3 process   
-     * ------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations greater than 4 */
-    /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    j = count >> 2u;
-
-    while((j > 0u) && (blockSize3 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied   
-         * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-        /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied   
-         * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* For the next MAC operations, the pointer py is used without SIMD   
-       * So, py is incremented by 1 */
-      py = py + 1u;
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-        sum = __SMLALD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pIn2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-      j--;
-    }
-
-    /* The second part of the stage starts here */
-    /* SIMD is not used for the next MAC operations,   
-     * so pointer py is updated to read only one sample at a time */
-    py = py + 1u;
-
-    while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum = __SMLALD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t *pIn1 = pSrcA;                           /* inputA pointer */
-  q15_t *pIn2 = pSrcB;                           /* inputB pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Loop to calculate convolution for output length number of values */
-    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
-    {
-      /* Initialize sum with zero to carry on MAC operations */
-      sum = 0;
-
-      /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0; j <= i; j++)
-      {
-        /* Check the array limitations */
-        if(((i - j) < srcBLen) && (j < srcALen))
-        {
-          /* z[i] += x[i-j] * y[j] */
-          sum += ((q31_t) pIn1[j] * (pIn2[i - j]));
-        }
-      }
-
-      /* Store the output in the destination buffer */
-      pDst[i] = (q15_t) __SSAT((sum >> 15u), 16u);
-    }
-    /* set status as ARM_SUCCESS as there are no argument errors */
-    status = ARM_MATH_SUCCESS;
-  }
-  return (status);
-
-#endif /* #if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)  */
-
-}
-
-/**   
- * @} end of PartialConv group   
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c
deleted file mode 100755
index 98fc654b..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c
+++ /dev/null
@@ -1,607 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_q31.c    
-*    
-* Description:	Partial convolution of Q31 sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of Q31 sequences.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- *    
- * See arm_conv_partial_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- */
-
-arm_status arm_conv_partial_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t *pIn1;                                   /* inputA pointer               */
-  q31_t *pIn2;                                   /* inputB pointer               */
-  q31_t *pOut = pDst;                            /* output pointer               */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q63_t sum, acc0, acc1, acc2;                   /* Accumulator                  */
-  q31_t x0, x1, x2, c0;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counter                 */
-  arm_status status;                             /* status of Partial convolution */
-
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds    
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally    
-     * divided into three stages according to the number of multiplications that has to be    
-     * taken place between inputA samples and inputB samples. In the first stage of the    
-     * algorithm, the multiplications increase by one for every iteration.    
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-     * In the third stage of the algorithm, the multiplications decrease by one    
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex    
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------    
-     * Initializations of stage1    
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]    
-     * sum = x[0] * y[1] + x[1] * y[0]    
-     * ....    
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.    
-       The count variable holds the number of MAC operations performed.    
-       Since the partial convolution starts from firstIndex    
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------    
-     * Stage1 process    
-     * ----------------------*/
-
-    /* The first loop starts here */
-    while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* x[0] * y[srcBLen - 1] */
-        sum += (q63_t) * px++ * (*py--);
-        /* x[1] * y[srcBLen - 2] */
-        sum += (q63_t) * px++ * (*py--);
-        /* x[2] * y[srcBLen - 3] */
-        sum += (q63_t) * px++ * (*py--);
-        /* x[3] * y[srcBLen - 4] */
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (sum >> 31);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------    
-     * Initializations of stage2    
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-     * ....    
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
-     */
-
-    /* Working pointer of inputA */
-    if((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      px = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      px = pIn1;
-    }
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* count is index by which the pointer pIn1 to be incremented */
-    count = 0u;
-
-    /* -------------------    
-     * Stage2 process    
-     * ------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-     * So, to loop unroll over blockSize2,    
-     * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
-    {
-      /* Loop unroll over blkCnt */
-
-      blkCnt = blockSize2 / 3;
-      while(blkCnt > 0u)
-      {
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-
-        /* read x[0], x[1] samples */
-        x0 = *(px++);
-        x1 = *(px++);
-
-        /* Apply loop unrolling and compute 3 MACs simultaneously. */
-        k = srcBLen / 3;
-
-        /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.        
-         ** a second loop below computes MACs for the remaining 1 to 2 samples. */
-        do
-        {
-          /* Read y[srcBLen - 1] sample */
-          c0 = *(py);
-
-          /* Read x[2] sample */
-          x2 = *(px);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[0] * y[srcBLen - 1] */
-          acc0 += (q63_t) x0 *c0;
-          /* acc1 +=  x[1] * y[srcBLen - 1] */
-          acc1 += (q63_t) x1 *c0;
-          /* acc2 +=  x[2] * y[srcBLen - 1] */
-          acc2 += (q63_t) x2 *c0;
-
-          /* Read y[srcBLen - 2] sample */
-          c0 = *(py - 1u);
-
-          /* Read x[3] sample */
-          x0 = *(px + 1u);
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[1] * y[srcBLen - 2] */
-          acc0 += (q63_t) x1 *c0;
-          /* acc1 +=  x[2] * y[srcBLen - 2] */
-          acc1 += (q63_t) x2 *c0;
-          /* acc2 +=  x[3] * y[srcBLen - 2] */
-          acc2 += (q63_t) x0 *c0;
-
-          /* Read y[srcBLen - 3] sample */
-          c0 = *(py - 2u);
-
-          /* Read x[4] sample */
-          x1 = *(px + 2u);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[2] * y[srcBLen - 3] */
-          acc0 += (q63_t) x2 *c0;
-          /* acc1 +=  x[3] * y[srcBLen - 2] */
-          acc1 += (q63_t) x0 *c0;
-          /* acc2 +=  x[4] * y[srcBLen - 2] */
-          acc2 += (q63_t) x1 *c0;
-
-
-          px += 3u;
-
-          py -= 3u;
-
-        } while(--k);
-
-        /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.        
-         ** No loop unrolling is used. */
-        k = srcBLen - (3 * (srcBLen / 3));
-
-        while(k > 0u)
-        {
-          /* Read y[srcBLen - 5] sample */
-          c0 = *(py--);
-
-          /* Read x[7] sample */
-          x2 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[4] * y[srcBLen - 5] */
-          acc0 += (q63_t) x0 *c0;
-          /* acc1 +=  x[5] * y[srcBLen - 5] */
-          acc1 += (q63_t) x1 *c0;
-          /* acc2 +=  x[6] * y[srcBLen - 5] */
-          acc2 += (q63_t) x2 *c0;
-
-          /* Reuse the present samples for the next MAC */
-          x0 = x1;
-          x1 = x2;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q31_t) (acc0 >> 31);
-        *pOut++ = (q31_t) (acc1 >> 31);
-        *pOut++ = (q31_t) (acc2 >> 31);
-
-        /* Increment the pointer pIn1 index, count by 3 */
-        count += 3u;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here.        
-       ** No loop unrolling is used. */
-      blkCnt = blockSize2 - 3 * (blockSize2 / 3);
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) * px++ * (*py--);
-          sum += (q63_t) * px++ * (*py--);
-          sum += (q63_t) * px++ * (*py--);
-          sum += (q63_t) * px++ * (*py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += (q63_t) * px++ * (*py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q31_t) (sum >> 31);
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,    
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += (q63_t) * px++ * (*py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q31_t) (sum >> 31);
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------    
-     * Initializations of stage3    
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-     * ....    
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-     * sum +=  x[srcALen-1] * y[srcBLen-1]    
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.    
-       The blockSize3 variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* -------------------    
-     * Stage3 process    
-     * ------------------*/
-
-    while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (sum >> 31);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t *pIn1 = pSrcA;                           /* inputA pointer */
-  q31_t *pIn2 = pSrcB;                           /* inputB pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Loop to calculate convolution for output length number of values */
-    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
-    {
-      /* Initialize sum with zero to carry on MAC operations */
-      sum = 0;
-
-      /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0; j <= i; j++)
-      {
-        /* Check the array limitations */
-        if(((i - j) < srcBLen) && (j < srcALen))
-        {
-          /* z[i] += x[i-j] * y[j] */
-          sum += ((q63_t) pIn1[j] * (pIn2[i - j]));
-        }
-      }
-
-      /* Store the output in the destination buffer */
-      pDst[i] = (q31_t) (sum >> 31u);
-    }
-    /* set status as ARM_SUCCESS as there are no argument errors */
-    status = ARM_MATH_SUCCESS;
-  }
-  return (status);
-
-#endif /*    #ifndef ARM_MATH_CM0_FAMILY      */
-
-}
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c
deleted file mode 100755
index 65eaceaa..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c
+++ /dev/null
@@ -1,741 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_partial_q7.c   
-*   
-* Description:	Partial convolution of Q7 sequences.   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup PartialConv   
- * @{   
- */
-
-/**   
- * @brief Partial convolution of Q7 sequences.   
- * @param[in]       *pSrcA points to the first input sequence.   
- * @param[in]       srcALen length of the first input sequence.   
- * @param[in]       *pSrcB points to the second input sequence.   
- * @param[in]       srcBLen length of the second input sequence.   
- * @param[out]      *pDst points to the location where the output result is written.   
- * @param[in]       firstIndex is the first output sample to start with.   
- * @param[in]       numPoints is the number of output points to be computed.   
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
- *  
- * \par    
- * Refer the function arm_conv_partial_opt_q7() for a faster implementation of this function.
- *  
- */
-
-arm_status arm_conv_partial_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t *pIn1;                                    /* inputA pointer */
-  q7_t *pIn2;                                    /* inputB pointer */
-  q7_t *pOut = pDst;                             /* output pointer */
-  q7_t *px;                                      /* Intermediate inputA pointer */
-  q7_t *py;                                      /* Intermediate inputB pointer */
-  q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q31_t input1, input2;
-  q15_t in1, in2;
-  q7_t x0, x1, x2, x3, c0, c1;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counter */
-  arm_status status;
-
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds   
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally   
-     * divided into three stages according to the number of multiplications that has to be   
-     * taken place between inputA samples and inputB samples. In the first stage of the   
-     * algorithm, the multiplications increase by one for every iteration.   
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-     * In the third stage of the algorithm, the multiplications decrease by one   
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex   
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------   
-     * Initializations of stage1   
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]   
-     * sum = x[0] * y[1] + x[1] * y[0]   
-     * ....   
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed.   
-       Since the partial convolution starts from from firstIndex   
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------   
-     * Stage1 process   
-     * ----------------------*/
-
-    /* The first stage starts here */
-    while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* x[0] , x[1] */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* y[srcBLen - 1] , y[srcBLen - 2] */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* x[0] * y[srcBLen - 1] */
-        /* x[1] * y[srcBLen - 2] */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* x[2] , x[3] */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* y[srcBLen - 3] , y[srcBLen - 4] */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* x[2] * y[srcBLen - 3] */
-        /* x[3] * y[srcBLen - 4] */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------   
-     * Initializations of stage2   
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-     * ....   
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-     */
-
-    /* Working pointer of inputA */
-    if((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      px = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      px = pIn1;
-    }
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* count is index by which the pointer pIn1 to be incremented */
-    count = 0u;
-
-    /* -------------------   
-     * Stage2 process   
-     * ------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-     * So, to loop unroll over blockSize2,   
-     * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
-    {
-      /* Loop unroll over blockSize2, by 4 */
-      blkCnt = ((uint32_t) blockSize2 >> 2u);
-
-      while(blkCnt > 0u)
-      {
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-        acc3 = 0;
-
-        /* read x[0], x[1], x[2] samples */
-        x0 = *(px++);
-        x1 = *(px++);
-        x2 = *(px++);
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        do
-        {
-          /* Read y[srcBLen - 1] sample */
-          c0 = *(py--);
-          /* Read y[srcBLen - 2] sample */
-          c1 = *(py--);
-
-          /* Read x[3] sample */
-          x3 = *(px++);
-
-          /* x[0] and x[1] are packed */
-          in1 = (q15_t) x0;
-          in2 = (q15_t) x1;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* y[srcBLen - 1]   and y[srcBLen - 2] are packed */
-          in1 = (q15_t) c0;
-          in2 = (q15_t) c1;
-
-          input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2]  */
-          acc0 = __SMLAD(input1, input2, acc0);
-
-          /* x[1] and x[2] are packed */
-          in1 = (q15_t) x1;
-          in2 = (q15_t) x2;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2]  */
-          acc1 = __SMLAD(input1, input2, acc1);
-
-          /* x[2] and x[3] are packed */
-          in1 = (q15_t) x2;
-          in2 = (q15_t) x3;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2]  */
-          acc2 = __SMLAD(input1, input2, acc2);
-
-          /* Read x[4] sample */
-          x0 = *(px++);
-
-          /* x[3] and x[4] are packed */
-          in1 = (q15_t) x3;
-          in2 = (q15_t) x0;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2]  */
-          acc3 = __SMLAD(input1, input2, acc3);
-
-          /* Read y[srcBLen - 3] sample */
-          c0 = *(py--);
-          /* Read y[srcBLen - 4] sample */
-          c1 = *(py--);
-
-          /* Read x[5] sample */
-          x1 = *(px++);
-
-          /* x[2] and x[3] are packed */
-          in1 = (q15_t) x2;
-          in2 = (q15_t) x3;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* y[srcBLen - 3] and y[srcBLen - 4] are packed */
-          in1 = (q15_t) c0;
-          in2 = (q15_t) c1;
-
-          input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4]  */
-          acc0 = __SMLAD(input1, input2, acc0);
-
-          /* x[3] and x[4] are packed */
-          in1 = (q15_t) x3;
-          in2 = (q15_t) x0;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4]  */
-          acc1 = __SMLAD(input1, input2, acc1);
-
-          /* x[4] and x[5] are packed */
-          in1 = (q15_t) x0;
-          in2 = (q15_t) x1;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4]  */
-          acc2 = __SMLAD(input1, input2, acc2);
-
-          /* Read x[6] sample */
-          x2 = *(px++);
-
-          /* x[5] and x[6] are packed */
-          in1 = (q15_t) x1;
-          in2 = (q15_t) x2;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */
-          acc3 = __SMLAD(input1, input2, acc3);
-
-        } while(--k);
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Read y[srcBLen - 5] sample */
-          c0 = *(py--);
-
-          /* Read x[7] sample */
-          x3 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[4] * y[srcBLen - 5] */
-          acc0 += ((q31_t) x0 * c0);
-          /* acc1 +=  x[5] * y[srcBLen - 5] */
-          acc1 += ((q31_t) x1 * c0);
-          /* acc2 +=  x[6] * y[srcBLen - 5] */
-          acc2 += ((q31_t) x2 * c0);
-          /* acc3 +=  x[7] * y[srcBLen - 5] */
-          acc3 += ((q31_t) x3 * c0);
-
-          /* Reuse the present samples for the next MAC */
-          x0 = x1;
-          x1 = x2;
-          x2 = x3;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q7_t) (__SSAT(acc0 >> 7, 8));
-        *pOut++ = (q7_t) (__SSAT(acc1 >> 7, 8));
-        *pOut++ = (q7_t) (__SSAT(acc2 >> 7, 8));
-        *pOut++ = (q7_t) (__SSAT(acc3 >> 7, 8));
-
-        /* Increment the pointer pIn1 index, count by 4 */
-        count += 4u;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-
-          /* Reading two inputs of SrcA buffer and packing */
-          in1 = (q15_t) * px++;
-          in2 = (q15_t) * px++;
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* Reading two inputs of SrcB buffer and packing */
-          in1 = (q15_t) * py--;
-          in2 = (q15_t) * py--;
-          input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* Perform the multiply-accumulates */
-          sum = __SMLAD(input1, input2, sum);
-
-          /* Reading two inputs of SrcA buffer and packing */
-          in1 = (q15_t) * px++;
-          in2 = (q15_t) * px++;
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* Reading two inputs of SrcB buffer and packing */
-          in1 = (q15_t) * py--;
-          in2 = (q15_t) * py--;
-          input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* Perform the multiply-accumulates */
-          sum = __SMLAD(input1, input2, sum);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
-
-        /* Increment the pointer pIn1 index, count by 1 */
- 	    count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-      	px = pIn1 + count;
-        py = pSrc2;	
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,   
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------   
-     * Initializations of stage3   
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-     * ....   
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-     * sum +=  x[srcALen-1] * y[srcBLen-1]   
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* -------------------   
-     * Stage3 process   
-     * ------------------*/
-
-    while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q7_t *pIn1 = pSrcA;                            /* inputA pointer */
-  q7_t *pIn2 = pSrcB;                            /* inputB pointer */
-  q31_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Loop to calculate convolution for output length number of values */
-    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
-    {
-      /* Initialize sum with zero to carry on MAC operations */
-      sum = 0;
-
-      /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0; j <= i; j++)
-      {
-        /* Check the array limitations */
-        if(((i - j) < srcBLen) && (j < srcALen))
-        {
-          /* z[i] += x[i-j] * y[j] */
-          sum += ((q15_t) pIn1[j] * (pIn2[i - j]));
-        }
-      }
-
-      /* Store the output in the destination buffer */
-      pDst[i] = (q7_t) __SSAT((sum >> 7u), 8u);
-    }
-    /* set status as ARM_SUCCESS as there are no argument errors */
-    status = ARM_MATH_SUCCESS;
-  }
-  return (status);
-
-#endif /*  #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**   
- * @} end of PartialConv group   
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c
deleted file mode 100755
index a3c37746..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c
+++ /dev/null
@@ -1,734 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_q15.c   
-*   
-* Description:	Convolution of Q15 sequences.     
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup Conv   
- * @{   
- */
-
-/**   
- * @brief Convolution of Q15 sequences.   
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.   
- * @return none.   
- *   
- * @details   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * The function is implemented using a 64-bit internal accumulator.   
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.   
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.   
- * This approach provides 33 guard bits and there is no risk of overflow.   
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.   
- *   
- * \par   
- * Refer to arm_conv_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. 
- *
- * \par    
- * Refer the function arm_conv_opt_q15() for a faster implementation of this function using scratch buffers.
- *  
- */
-
-void arm_conv_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst)
-{
-
-#if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-  uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt;     /* loop counter */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally   
-   * divided into three stages according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first stage of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-   * In the third stage of the algorithm, the multiplications decrease by one   
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.   
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]   
-   * sum = x[0] * y[1] + x[1] * y[0]   
-   * ....   
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations less than 4 */
-  /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  while((count < 4u) && (blockSize1 > 0u))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Loop over number of MAC operations between   
-     * inputA samples and inputB samples */
-    k = count;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLALD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* The second part of the stage starts here */
-  /* The internal loop, over count, is unrolled by 4 */
-  /* To, read the last two inputB samples using SIMD:   
-   * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-  py = py - 1;
-
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-      /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* For the next MAC operations, the pointer py is used without SIMD   
-     * So, py is incremented by 1 */
-    py = py + 1u;
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLALD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + (count - 1u);
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-
-  /* --------------------   
-   * Stage2 process   
-   * -------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      py = py - 1u;
-
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-
-      /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-      /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px+1);
-	  px+= 2u;
-
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:   
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLALDX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLALDX(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-        /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px+1);
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLALDX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLALDX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLALDX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLALDX(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px+2);
-
-        /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px+3);
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLALDX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLALDX(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-        /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
-        acc2 = __SMLALDX(x1, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x0, c0, acc0);
-        acc1 = __SMLALDX(x1, c0, acc1);
-        acc2 = __SMLALDX(x3, c0, acc2);
-        acc3 = __SMLALDX(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x0, c0, acc0);
-        acc1 = __SMLALDX(x1, c0, acc1);
-        acc2 = __SMLALDX(x3, c0, acc2);
-        acc3 = __SMLALDX(x2, c0, acc3);
-
-		c0 = *(py-1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-        /* Read x[10] */
-        x3 =  _SIMD32_OFFSET(px+2);
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x1, c0, acc0);
-        acc1 = __SMLALD(x2, c0, acc1);
-        acc2 = __SMLALDX(x2, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-       /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-   * sum +=  x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  blockSize3 = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  pIn2 = pSrc2 - 1u;
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations greater than 4 */
-  /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  j = blockSize3 >> 2u;
-
-  while((j > 0u) && (blockSize3 > 0u))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied   
-       * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-      /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied   
-       * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* For the next MAC operations, the pointer py is used without SIMD   
-     * So, py is incremented by 1 */
-    py = py + 1u;
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-      sum = __SMLALD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-
-    j--;
-  }
-
-  /* The second part of the stage starts here */
-  /* SIMD is not used for the next MAC operations,   
-   * so pointer py is updated to read only one sample at a time */
-  py = py + 1u;
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-      sum = __SMLALD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  q15_t *pIn1 = pSrcA;                           /* input pointer */
-  q15_t *pIn2 = pSrcB;                           /* coefficient pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counter */
-
-  /* Loop to calculate output of convolution for output length number of times */
-  for (i = 0; i < (srcALen + srcBLen - 1); i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if(((i - j) < srcBLen) && (j < srcALen))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += (q31_t) pIn1[j] * (pIn2[i - j]);
-      }
-    }
-
-    /* Store the output in the destination buffer */
-    pDst[i] = (q15_t) __SSAT((sum >> 15u), 16u);
-  }
-
-#endif /*  #if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)*/
-
-}
-
-/**   
- * @} end of Conv group   
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c
deleted file mode 100755
index c108bed1..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c
+++ /dev/null
@@ -1,565 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_q31.c    
-*    
-* Description:	Convolution of Q31 sequences.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @brief Convolution of Q31 sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * There is no saturation on intermediate additions.    
- * Thus, if the accumulator overflows it wraps around and distorts the result.    
- * The input signals should be scaled down to avoid intermediate overflows.    
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,    
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.    
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.    
- *    
- * \par    
- * See arm_conv_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_conv_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t *pIn1;                                   /* inputA pointer */
-  q31_t *pIn2;                                   /* inputB pointer */
-  q31_t *pOut = pDst;                            /* output pointer */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q63_t sum;                                     /* Accumulator */
-  q63_t acc0, acc1, acc2;                        /* Accumulator */
-  q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
-  uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (q31_t *) pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = (q31_t *) pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally    
-   * divided into three stages according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first stage of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-   * In the third stage of the algorithm, the multiplications decrease by one    
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.    
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------    
-   * Initializations of stage1    
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]    
-   * sum = x[0] * y[1] + x[1] * y[0]    
-   * ....    
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------    
-   * Stage1 process    
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 1] */
-      sum += (q63_t) * px++ * (*py--);
-      /* x[1] * y[srcBLen - 2] */
-      sum += (q63_t) * px++ * (*py--);
-      /* x[2] * y[srcBLen - 3] */
-      sum += (q63_t) * px++ * (*py--);
-      /* x[3] * y[srcBLen - 4] */
-      sum += (q63_t) * px++ * (*py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (q63_t) * px++ * (*py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q31_t) (sum >> 31);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------    
-   * Initializations of stage2    
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------    
-   * Stage2 process    
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll by 3 */
-    blkCnt = blockSize2 / 3;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-
-      /* Apply loop unrolling and compute 3 MACs simultaneously. */
-      k = srcBLen / 3;
-
-      /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.        
-       ** a second loop below computes MACs for the remaining 1 to 2 samples. */
-      do
-      {
-        /* Read y[srcBLen - 1] sample */
-        c0 = *(py);
-
-        /* Read x[3] sample */
-        x2 = *(px);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[0] * y[srcBLen - 1] */
-        acc0 += ((q63_t) x0 * c0);
-        /* acc1 +=  x[1] * y[srcBLen - 1] */
-        acc1 += ((q63_t) x1 * c0);
-        /* acc2 +=  x[2] * y[srcBLen - 1] */
-        acc2 += ((q63_t) x2 * c0);
-
-        /* Read y[srcBLen - 2] sample */
-        c0 = *(py - 1u);
-
-        /* Read x[4] sample */
-        x0 = *(px + 1u);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[srcBLen - 2] */
-        acc0 += ((q63_t) x1 * c0);
-        /* acc1 +=  x[2] * y[srcBLen - 2] */
-        acc1 += ((q63_t) x2 * c0);
-        /* acc2 +=  x[3] * y[srcBLen - 2] */
-        acc2 += ((q63_t) x0 * c0);
-
-        /* Read y[srcBLen - 3] sample */
-        c0 = *(py - 2u);
-
-        /* Read x[5] sample */
-        x1 = *(px + 2u);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[srcBLen - 3] */
-        acc0 += ((q63_t) x2 * c0);
-        /* acc1 +=  x[3] * y[srcBLen - 2] */
-        acc1 += ((q63_t) x0 * c0);
-        /* acc2 +=  x[4] * y[srcBLen - 2] */
-        acc2 += ((q63_t) x1 * c0);
-
-        /* update scratch pointers */
-        px += 3u;
-        py -= 3u;
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.        
-       ** No loop unrolling is used. */
-      k = srcBLen - (3 * (srcBLen / 3));
-
-      while(k > 0u)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
-        /* Read x[7] sample */
-        x2 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[srcBLen - 5] */
-        acc0 += ((q63_t) x0 * c0);
-        /* acc1 +=  x[5] * y[srcBLen - 5] */
-        acc1 += ((q63_t) x1 * c0);
-        /* acc2 +=  x[6] * y[srcBLen - 5] */
-        acc2 += ((q63_t) x2 * c0);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the results in the accumulators in the destination buffer. */
-      *pOut++ = (q31_t) (acc0 >> 31);
-      *pOut++ = (q31_t) (acc1 >> 31);
-      *pOut++ = (q31_t) (acc2 >> 31);
-
-      /* Increment the pointer pIn1 index, count by 3 */
-      count += 3u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here.        
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 - 3 * (blockSize2 / 3);
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (sum >> 31);
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,    
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (sum >> 31);
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------    
-   * Initializations of stage3    
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-   * sum +=  x[srcALen-1] * y[srcBLen-1]    
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* -------------------    
-   * Stage3 process    
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-      sum += (q63_t) * px++ * (*py--);
-      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-      sum += (q63_t) * px++ * (*py--);
-      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-      sum += (q63_t) * px++ * (*py--);
-      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-      sum += (q63_t) * px++ * (*py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (q63_t) * px++ * (*py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q31_t) (sum >> 31);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t *pIn1 = pSrcA;                           /* input pointer */
-  q31_t *pIn2 = pSrcB;                           /* coefficient pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counter */
-
-  /* Loop to calculate output of convolution for output length number of times */
-  for (i = 0; i < (srcALen + srcBLen - 1); i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if(((i - j) < srcBLen) && (j < srcALen))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ((q63_t) pIn1[j] * (pIn2[i - j]));
-      }
-    }
-
-    /* Store the output in the destination buffer */
-    pDst[i] = (q31_t) (sum >> 31u);
-  }
-
-#endif /*     #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of Conv group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c
deleted file mode 100755
index 12a00554..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c
+++ /dev/null
@@ -1,690 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_q7.c   
-*   
-* Description:	Convolution of Q7 sequences. 
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup Conv   
- * @{   
- */
-
-/**   
- * @brief Convolution of Q7 sequences.   
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.   
- * @return none.   
- *   
- * @details   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * The function is implemented using a 32-bit internal accumulator.   
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.   
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.   
- * This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072.   
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.   
- *
- * \par    
- * Refer the function arm_conv_opt_q7() for a faster implementation of this function.
- * 
- */
-
-void arm_conv_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t *pIn1;                                    /* inputA pointer */
-  q7_t *pIn2;                                    /* inputB pointer */
-  q7_t *pOut = pDst;                             /* output pointer */
-  q7_t *px;                                      /* Intermediate inputA pointer */
-  q7_t *py;                                      /* Intermediate inputB pointer */
-  q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
-  q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables to hold state and coefficient values */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q31_t input1, input2;                          /* Temporary input variables */
-  q15_t in1, in2;                                /* Temporary input variables */
-  uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally   
-   * divided into three stages according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first stage of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-   * In the third stage of the algorithm, the multiplications decrease by one   
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.   
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = (srcALen - srcBLen) + 1u;
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]   
-   * sum = x[0] * y[1] + x[1] * y[0]   
-   * ....   
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] , x[1] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* y[srcBLen - 1] , y[srcBLen - 2] */
-      in1 = (q15_t) * py--;
-      in2 = (q15_t) * py--;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* x[0] * y[srcBLen - 1] */
-      /* x[1] * y[srcBLen - 2] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* x[2] , x[3] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* y[srcBLen - 3] , y[srcBLen - 4] */
-      in1 = (q15_t) * py--;
-      in2 = (q15_t) * py--;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* x[2] * y[srcBLen - 3] */
-      /* x[3] * y[srcBLen - 4] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += ((q15_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------   
-   * Stage2 process   
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[srcBLen - 1] sample */
-        c0 = *(py--);
-        /* Read y[srcBLen - 2] sample */
-        c1 = *(py--);
-
-        /* Read x[3] sample */
-        x3 = *(px++);
-
-        /* x[0] and x[1] are packed */
-        in1 = (q15_t) x0;
-        in2 = (q15_t) x1;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* y[srcBLen - 1]   and y[srcBLen - 2] are packed */
-        in1 = (q15_t) c0;
-        in2 = (q15_t) c1;
-
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2]  */
-        acc0 = __SMLAD(input1, input2, acc0);
-
-        /* x[1] and x[2] are packed */
-        in1 = (q15_t) x1;
-        in2 = (q15_t) x2;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2]  */
-        acc1 = __SMLAD(input1, input2, acc1);
-
-        /* x[2] and x[3] are packed */
-        in1 = (q15_t) x2;
-        in2 = (q15_t) x3;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2]  */
-        acc2 = __SMLAD(input1, input2, acc2);
-
-        /* Read x[4] sample */
-        x0 = *(px++);
-
-        /* x[3] and x[4] are packed */
-        in1 = (q15_t) x3;
-        in2 = (q15_t) x0;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2]  */
-        acc3 = __SMLAD(input1, input2, acc3);
-
-        /* Read y[srcBLen - 3] sample */
-        c0 = *(py--);
-        /* Read y[srcBLen - 4] sample */
-        c1 = *(py--);
-
-        /* Read x[5] sample */
-        x1 = *(px++);
-
-        /* x[2] and x[3] are packed */
-        in1 = (q15_t) x2;
-        in2 = (q15_t) x3;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* y[srcBLen - 3] and y[srcBLen - 4] are packed */
-        in1 = (q15_t) c0;
-        in2 = (q15_t) c1;
-
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4]  */
-        acc0 = __SMLAD(input1, input2, acc0);
-
-        /* x[3] and x[4] are packed */
-        in1 = (q15_t) x3;
-        in2 = (q15_t) x0;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4]  */
-        acc1 = __SMLAD(input1, input2, acc1);
-
-        /* x[4] and x[5] are packed */
-        in1 = (q15_t) x0;
-        in2 = (q15_t) x1;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4]  */
-        acc2 = __SMLAD(input1, input2, acc2);
-
-        /* Read x[6] sample */
-        x2 = *(px++);
-
-        /* x[5] and x[6] are packed */
-        in1 = (q15_t) x1;
-        in2 = (q15_t) x2;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */
-        acc3 = __SMLAD(input1, input2, acc3);
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
-        /* Read x[7] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[srcBLen - 5] */
-        acc0 += ((q15_t) x0 * c0);
-        /* acc1 +=  x[5] * y[srcBLen - 5] */
-        acc1 += ((q15_t) x1 * c0);
-        /* acc2 +=  x[6] * y[srcBLen - 5] */
-        acc2 += ((q15_t) x2 * c0);
-        /* acc3 +=  x[7] * y[srcBLen - 5] */
-        acc3 += ((q15_t) x3 * c0);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8));
-      *pOut++ = (q7_t) (__SSAT(acc1 >> 7u, 8));
-      *pOut++ = (q7_t) (__SSAT(acc2 >> 7u, 8));
-      *pOut++ = (q7_t) (__SSAT(acc3 >> 7u, 8));
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-
-        /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q15_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q15_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-   * sum +=  x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
-      in1 = (q15_t) * py--;
-      in2 = (q15_t) * py--;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
-      in1 = (q15_t) * py--;
-      in2 = (q15_t) * py--;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += ((q15_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q7_t *pIn1 = pSrcA;                            /* input pointer */
-  q7_t *pIn2 = pSrcB;                            /* coefficient pointer */
-  q31_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counter */
-
-  /* Loop to calculate output of convolution for output length number of times */
-  for (i = 0; i < (srcALen + srcBLen - 1); i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if(((i - j) < srcBLen) && (j < srcALen))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += (q15_t) pIn1[j] * (pIn2[i - j]);
-      }
-    }
-
-    /* Store the output in the destination buffer */
-    pDst[i] = (q7_t) __SSAT((sum >> 7u), 8u);
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY        */
-
-}
-
-/**   
- * @} end of Conv group   
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c
deleted file mode 100755
index 6a8127b8..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c
+++ /dev/null
@@ -1,739 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_f32.c    
-*    
-* Description:	 Correlation of floating-point sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup Corr Correlation    
- *    
- * Correlation is a mathematical operation that is similar to convolution.    
- * As with convolution, correlation uses two signals to produce a third signal.    
- * The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution.    
- * Correlation is commonly used to measure the similarity between two signals.    
- * It has applications in pattern recognition, cryptanalysis, and searching.    
- * The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types.    
- * Fast versions of the Q15 and Q31 functions are also provided.    
- *    
- * \par Algorithm    
- * Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively.    
- * The convolution of the two signals is denoted by    
- * 
    
- *                   c[n] = a[n] * b[n]    
- * 
    
- * In correlation, one of the signals is flipped in time    
- * 
    
- *                   c[n] = a[n] * b[-n]    
- * 
    
- *    
- * \par    
- * and this is mathematically defined as    
- * \image html CorrelateEquation.gif    
- * \par    
- * The pSrcA points to the first input vector of length srcALen and pSrcB points to the second input vector of length srcBLen.    
- * The result c[n] is of length 2 * max(srcALen, srcBLen) - 1 and is defined over the interval n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2).    
- * The output result is written to pDst and the calling function must allocate 2 * max(srcALen, srcBLen) - 1 words for the result.    
- *    
- * Note   
- * \par  
- * The pDst should be initialized to all zeros before being used.  
- *  
- * Fixed-Point Behavior    
- * \par    
- * Correlation requires summing up a large number of intermediate products.    
- * As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.    
- * Refer to the function specific documentation below for further details of the particular algorithm used.    
- *
- *
- * Fast Versions
- *
- * \par 
- * Fast versions are supported for Q31 and Q15.  Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires
- * the input signals should be scaled down to avoid intermediate overflows.   
- *
- *
- * Opt Versions
- *
- * \par 
- * Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
- * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions of correlate 
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-/**    
- * @brief Correlation of floating-point sequences.    
- * @param[in]  *pSrcA points to the first input sequence.    
- * @param[in]  srcALen length of the first input sequence.    
- * @param[in]  *pSrcB points to the second input sequence.    
- * @param[in]  srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @return none.    
- */
-
-void arm_correlate_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t *pIn1;                               /* inputA pointer */
-  float32_t *pIn2;                               /* inputB pointer */
-  float32_t *pOut = pDst;                        /* output pointer */
-  float32_t *px;                                 /* Intermediate inputA pointer */
-  float32_t *py;                                 /* Intermediate inputB pointer */
-  float32_t *pSrc1;                              /* Intermediate pointers */
-  float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulators */
-  float32_t x0, x1, x2, x3, c0;                  /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counters */
-  int32_t inc = 1;                               /* Destination address modifier */
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,    
-   * we assume zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,    
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,    
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding has to be done to srcB    
-     * to make their lengths equal.    
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))    
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-    //while(j > 0u)   
-    //{   
-    //  /* Zero is stored in the destination buffer */   
-    //  *pOut++ = 0.0f;   
-
-    //  /* Decrement the loop counter */   
-    //  j--;   
-    //}   
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally    
-   * divided into three parts according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first part of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second part of the algorithm, srcBLen number of multiplications are done.    
-   * In the third part of the algorithm, the multiplications decrease by one    
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.    
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------    
-   * Initializations of stage1    
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]    
-   * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1]    
-   * ....    
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]    
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------    
-   * Stage1 process    
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0.0f;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 4] */
-      sum += *px++ * *py++;
-      /* x[1] * y[srcBLen - 3] */
-      sum += *px++ * *py++;
-      /* x[2] * y[srcBLen - 2] */
-      sum += *px++ * *py++;
-      /* x[3] * y[srcBLen - 1] */
-      sum += *px++ * *py++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      /* x[0] * y[srcBLen - 1] */
-      sum += *px++ * *py++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = sum;
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------    
-   * Initializations of stage2    
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]    
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------    
-   * Stage2 process    
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
-   * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[0] sample */
-        c0 = *(py++);
-
-        /* Read x[3] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[0] */
-        acc0 += x0 * c0;
-        /* acc1 +=  x[1] * y[0] */
-        acc1 += x1 * c0;
-        /* acc2 +=  x[2] * y[0] */
-        acc2 += x2 * c0;
-        /* acc3 +=  x[3] * y[0] */
-        acc3 += x3 * c0;
-
-        /* Read y[1] sample */
-        c0 = *(py++);
-
-        /* Read x[4] sample */
-        x0 = *(px++);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[1] */
-        acc0 += x1 * c0;
-        /* acc1 +=  x[2] * y[1] */
-        acc1 += x2 * c0;
-        /* acc2 +=  x[3] * y[1] */
-        acc2 += x3 * c0;
-        /* acc3 +=  x[4] * y[1] */
-        acc3 += x0 * c0;
-
-        /* Read y[2] sample */
-        c0 = *(py++);
-
-        /* Read x[5] sample */
-        x1 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[2] */
-        acc0 += x2 * c0;
-        /* acc1 +=  x[3] * y[2] */
-        acc1 += x3 * c0;
-        /* acc2 +=  x[4] * y[2] */
-        acc2 += x0 * c0;
-        /* acc3 +=  x[5] * y[2] */
-        acc3 += x1 * c0;
-
-        /* Read y[3] sample */
-        c0 = *(py++);
-
-        /* Read x[6] sample */
-        x2 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[3] * y[3] */
-        acc0 += x3 * c0;
-        /* acc1 +=  x[4] * y[3] */
-        acc1 += x0 * c0;
-        /* acc2 +=  x[5] * y[3] */
-        acc2 += x1 * c0;
-        /* acc3 +=  x[6] * y[3] */
-        acc3 += x2 * c0;
-
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Read y[4] sample */
-        c0 = *(py++);
-
-        /* Read x[7] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[4] */
-        acc0 += x0 * c0;
-        /* acc1 +=  x[5] * y[4] */
-        acc1 += x1 * c0;
-        /* acc2 +=  x[6] * y[4] */
-        acc2 += x2 * c0;
-        /* acc3 +=  x[7] * y[4] */
-        acc3 += x3 * c0;
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = acc0;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = acc1;
-      pOut += inc;
-
-      *pOut = acc2;
-      pOut += inc;
-
-      *pOut = acc3;
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += *px++ * *py++;
-        sum += *px++ * *py++;
-        sum += *px++ * *py++;
-        sum += *px++ * *py++;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py++;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = sum;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,    
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py++;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = sum;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------    
-   * Initializations of stage3    
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]    
-   * sum +=  x[srcALen-1] * y[0]    
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------    
-   * Stage3 process    
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0.0f;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] */
-      sum += *px++ * *py++;
-      /* sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum += *px++ * *py++;
-      /* sum += x[srcALen - srcBLen + 2] * y[1] */
-      sum += *px++ * *py++;
-      /* sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum += *px++ * *py++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += *px++ * *py++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = sum;
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  float32_t *pIn2 = pSrcB + (srcBLen - 1u);      /* inputB pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i = 0u, j;                            /* loop counters */
-  uint32_t inv = 0u;                             /* Reverse order flag */
-  uint32_t tot = 0u;                             /* Length */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and a varaible, inv is set to 1 */
-  /* If lengths are not equal then zero pad has to be done to  make the two    
-   * inputs of same length. But to improve the performance, we assume zeroes    
-   * in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the    
-   * starting of the output buffer */
-  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the   
-   * ending of the output buffer */
-  /* Once the zero padding is done the remaining of the output is calcualted   
-   * using convolution but with the shorter signal time shifted. */
-
-  /* Calculate the length of the remaining sequence */
-  tot = ((srcALen + srcBLen) - 2u);
-
-  if(srcALen > srcBLen)
-  {
-    /* Calculating the number of zeros to be padded to the output */
-    j = srcALen - srcBLen;
-
-    /* Initialise the pointer after zero padding */
-    pDst += j;
-  }
-
-  else if(srcALen < srcBLen)
-  {
-    /* Initialization to inputB pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization to the end of inputA pointer */
-    pIn2 = pSrcA + (srcALen - 1u);
-
-    /* Initialisation of the pointer after zero padding */
-    pDst = pDst + tot;
-
-    /* Swapping the lengths */
-    j = srcALen;
-    srcALen = srcBLen;
-    srcBLen = j;
-
-    /* Setting the reverse flag */
-    inv = 1;
-
-  }
-
-  /* Loop to calculate convolution for output length number of times */
-  for (i = 0u; i <= tot; i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0.0f;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0u; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if((((i - j) < srcBLen) && (j < srcALen)))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += pIn1[j] * pIn2[-((int32_t) i - j)];
-      }
-    }
-    /* Store the output in the destination buffer */
-    if(inv == 1)
-      *pDst-- = sum;
-    else
-      *pDst++ = sum;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
deleted file mode 100755
index 7aa289fd..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
+++ /dev/null
@@ -1,512 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_fast_opt_q15.c    
-*    
-* Description:	Fast Q15 Correlation.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-
-/**    
- * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
- * @return none.    
- *    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch buffers should be aligned by 32-bit    
- *    
- *     
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This fast version uses a 32-bit accumulator with 2.30 format.    
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * There is no saturation on intermediate additions.    
- * Thus, if the accumulator overflows it wraps around and distorts the result.    
- * The input signals should be scaled down to avoid intermediate overflows.    
- * Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a    
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.    
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.    
- *    
- * \par    
- * See arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.    
- */
-
-void arm_correlate_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch)
-{
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators                  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t x1, x2, x3;                              /* temporary variables for holding input and coefficient values */
-  uint32_t j, blkCnt, outBlockSize;              /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-  uint32_t tapCnt;
-  q31_t y1, y2;
-  q15_t *pScr;                                   /* Intermediate pointers        */
-  q15_t *pOut = pDst;                            /* output pointer               */
-#ifdef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t a, b;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,        
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB        
-     * to make their lengths equal.        
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))        
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  pScr = pScratch;
-
-  /* Fill (srcBLen - 1u) zeros in scratch buffer */
-  arm_fill_q15(0, pScr, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr += (srcBLen - 1u);
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr, srcALen);
-
-  /* Update pointers */
-  pScr += srcALen;
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  j = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  j = srcALen % 0x4u;
-
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr += (srcBLen - 1u);
-
-#else
-
-/* Apply loop unrolling and do 4 Copies simultaneously. */
-  j = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr++ = 0;
-    *pScr++ = 0;
-    *pScr++ = 0;
-    *pScr++ = 0;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  j = (srcBLen - 1u) % 0x4u;
-
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr++ = 0;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* Temporary pointer for scratch2 */
-  py = pIn2;
-
-
-  /* Actual correlation process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr = pScratch;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read four samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr)++;
-
-    /* Read next four samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pIn2);
-      y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-      acc0 = __SMLAD(x1, y1, acc0);
-
-      acc2 = __SMLAD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      x1 = _SIMD32_OFFSET(pScr);
-
-      acc0 = __SMLAD(x2, y2, acc0);
-
-      acc2 = __SMLAD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      acc1 = __SMLADX(x3, y2, acc1);
-
-      x2 = _SIMD32_OFFSET(pScr + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y2, acc3);
-#else	 
-
-      /* Read four samples from smaller buffer */
-	  a = *pIn2;
-	  b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      y1 = __PKHBT(a, b, 16);
-#else
-      y1 = __PKHBT(b, a, 16);
-#endif
-	  
-	  a = *(pIn2 + 2);
-	  b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
-      y2 = __PKHBT(a, b, 16);
-#else
-      y2 = __PKHBT(b, a, 16);
-#endif				
-
-      acc0 = __SMLAD(x1, y1, acc0);
-
-      acc2 = __SMLAD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-	  a = *pScr;
-	  b = *(pScr + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(a, b, 16);
-#else
-      x1 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLAD(x2, y2, acc0);
-
-      acc2 = __SMLAD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      acc1 = __SMLADX(x3, y2, acc1);
-
-	  a = *(pScr + 2);
-	  b = *(pScr + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x2 = __PKHBT(a, b, 16);
-#else
-      x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y2, acc3);
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      pIn2 += 4u;
-
-      pScr += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr -= 4u;
-
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr++ * *pIn2);
-      acc1 += (*pScr++ * *pIn2);
-      acc2 += (*pScr++ * *pIn2);
-      acc3 += (*pScr++ * *pIn2++);
-
-      pScr -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-
-    /* Store the results in the accumulators in the destination buffer. */
-    *pOut = (__SSAT(acc0 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc1 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc2 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc3 >> 15u, 16));
-    pOut += inc;
-
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate correlation for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr = pScratch;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-
-      acc0 += (*pScr++ * *pIn2++);
-      acc0 += (*pScr++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-
-    *pOut = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch += 1u;
-
-  }
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c
deleted file mode 100755
index d15bb1dc..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c
+++ /dev/null
@@ -1,1319 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_correlate_fast_q15.c   
-*   
-* Description:	Fast Q15 Correlation.   
-*   
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup Corr   
- * @{   
- */
-
-/**   
- * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.   
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.   
- * @return none.   
- *   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * This fast version uses a 32-bit accumulator with 2.30 format.   
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.   
- * There is no saturation on intermediate additions.   
- * Thus, if the accumulator overflows it wraps around and distorts the result.   
- * The input signals should be scaled down to avoid intermediate overflows.   
- * Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a   
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.   
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.   
- *   
- * \par   
- * See arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.   
- */
-
-void arm_correlate_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst)
-{
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1;                                  /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,   
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB   
-     * to make their lengths equal.   
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))   
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally   
-   * divided into three parts according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first part of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second part of the algorithm, srcBLen number of multiplications are done.   
-   * In the third part of the algorithm, the multiplications decrease by one   
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.   
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]   
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]   
-   * ....   
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* The first loop starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
-      sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-      /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
-      sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-      sum = __SMLAD(*px++, *py++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (sum >> 15);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]   
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------   
-   * Stage2 process   
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-      /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px + 1);
-	  px += 2u;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the first two inputB samples using SIMD:   
-         * y[0] and y[1] */
-        c0 = *__SIMD32(py)++;
-
-        /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
-        acc0 = __SMLAD(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
-        acc1 = __SMLAD(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-        /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px + 1);
-
-        /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
-        acc2 = __SMLAD(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
-        acc3 = __SMLAD(x3, c0, acc3);
-
-        /* Read y[2] and y[3] */
-        c0 = *__SIMD32(py)++;
-
-        /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
-        acc0 = __SMLAD(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
-        acc1 = __SMLAD(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px + 2);
-
-        /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px + 3);
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
-        acc2 = __SMLAD(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
-        acc3 = __SMLAD(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[4] */
-        c0 = *py;
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[4], y[5] */
-        c0 = *__SIMD32(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px + 1);
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLAD(x3, c0, acc2);
-        acc3 = __SMLAD(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[4], y[5] */
-        c0 = *__SIMD32(py)++;
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px + 1);
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLAD(x3, c0, acc2);
-        acc3 = __SMLAD(x2, c0, acc3);
-
-        c0 = (*py);
-        /* Read y[6] */
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-        x3 = _SIMD32_OFFSET(px + 2);
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (acc0 >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q15_t) (acc1 >> 15);
-      pOut += inc;
-
-      *pOut = (q15_t) (acc2 >> 15);
-      pOut += inc;
-
-      *pOut = (q15_t) (acc3 >> 15);
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (sum >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (sum >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]   
-   * sum +=  x[srcALen-1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-      /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLAD(*px++, *py++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (sum >> 15);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1;                                  /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-  q15_t a, b;
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,   
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB   
-     * to make their lengths equal.   
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))   
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally   
-   * divided into three parts according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first part of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second part of the algorithm, srcBLen number of multiplications are done.   
-   * In the third part of the algorithm, the multiplications decrease by one   
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.   
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]   
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]   
-   * ....   
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* The first loop starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-        sum += ((q31_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (sum >> 15);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]   
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------   
-   * Stage2 process   
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  x0 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-	  px += 2u;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the first two inputB samples using SIMD:   
-         * y[0] and y[1] */
-		  a = *py;
-		  b = *(py + 1);
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		  c0 = __PKHBT(a, b, 16);
-	
-#else
-	
-		  c0 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
-        acc0 = __SMLAD(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
-        acc1 = __SMLAD(x1, c0, acc1);
-
-        /* Read x[2], x[3], x[4] */
-	  	a = *px;
-	  	b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  	x2 = __PKHBT(a, b, 16);
-	  	a = *(px + 2);
-	  	x3 = __PKHBT(b, a, 16);
-
-#else
-
-	  	x2 = __PKHBT(b, a, 16);
-	  	a = *(px + 2);
-	  	x3 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
-        acc2 = __SMLAD(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
-        acc3 = __SMLAD(x3, c0, acc3);
-
-        /* Read y[2] and y[3] */
-		  a = *(py + 2);
-		  b = *(py + 3);
-
-		  py += 4u;
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		  c0 = __PKHBT(a, b, 16);
-	
-#else
-	
-		  c0 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
-        acc0 = __SMLAD(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
-        acc1 = __SMLAD(x3, c0, acc1);
-
-        /* Read x[4], x[5], x[6] */
-	  	a = *(px + 2);
-	  	b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  	x0 = __PKHBT(a, b, 16);
-	  	a = *(px + 4);
-	  	x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  	x0 = __PKHBT(b, a, 16);
-	  	a = *(px + 4);
-	  	x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
-        acc2 = __SMLAD(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
-        acc3 = __SMLAD(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[4] */
-        c0 = *py;
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-		a = *px;
-		b = *(px + 1);
-
-		px++;;
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		x3 = __PKHBT(a, b, 16);
-	
-#else
-	
-		x3 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[4], y[5] */
-		  a = *py;
-		  b = *(py + 1);
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		  c0 = __PKHBT(a, b, 16);
-	
-#else
-	
-		  c0 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  	a = *px;
-	  	b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  	x3 = __PKHBT(a, b, 16);
-	  	a = *(px + 2);
-	  	x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  	x3 = __PKHBT(b, a, 16);
-	  	a = *(px + 2);
-	  	x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLAD(x3, c0, acc2);
-        acc3 = __SMLAD(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[4], y[5] */
-		  a = *py;
-		  b = *(py + 1);
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		  c0 = __PKHBT(a, b, 16);
-	
-#else
-	
-		  c0 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		py += 2u;
-
-        /* Read x[7], x[8], x[9] */
-	  	a = *px;
-	  	b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  	x3 = __PKHBT(a, b, 16);
-	  	a = *(px + 2);
-	  	x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  	x3 = __PKHBT(b, a, 16);
-	  	a = *(px + 2);
-	  	x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLAD(x3, c0, acc2);
-        acc3 = __SMLAD(x2, c0, acc3);
-
-        c0 = (*py);
-        /* Read y[6] */
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-		b = *(px + 3);
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		x3 = __PKHBT(a, b, 16);
-	
-#else
-	
-		x3 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (acc0 >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q15_t) (acc1 >> 15);
-      pOut += inc;
-
-      *pOut = (q15_t) (acc2 >> 15);
-      pOut += inc;
-
-      *pOut = (q15_t) (acc3 >> 15);
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (sum >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (sum >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]   
-   * sum +=  x[srcALen-1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (sum >> 15);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#endif /*   #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-}
-
-/**   
- * @} end of Corr group   
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c
deleted file mode 100755
index ed8efb72..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c
+++ /dev/null
@@ -1,612 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_fast_q31.c    
-*    
-* Description:	Fast Q31 Correlation.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-
-/**    
- * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.    
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.    
- * These intermediate results are accumulated in a 32-bit register in 2.30 format.    
- * Finally, the accumulator is saturated and converted to a 1.31 result.    
- *    
- * \par    
- * The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signals must be scaled down.    
- * The input signals should be scaled down to avoid intermediate overflows.    
- * Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a    
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.    
- *    
- * \par    
- * See arm_correlate_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.    
- */
-
-void arm_correlate_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst)
-{
-  q31_t *pIn1;                                   /* inputA pointer               */
-  q31_t *pIn2;                                   /* inputB pointer               */
-  q31_t *pOut = pDst;                            /* output pointer               */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1;                                  /* Intermediate pointers        */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB    
-     * to make their lengths equal.    
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))    
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally    
-   * divided into three parts according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first part of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second part of the algorithm, srcBLen number of multiplications are done.    
-   * In the third part of the algorithm, the multiplications decrease by one    
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.    
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------    
-   * Initializations of stage1    
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]    
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]    
-   * ....    
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]    
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------    
-   * Stage1 process    
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 4] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-      /* x[1] * y[srcBLen - 3] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-      /* x[2] * y[srcBLen - 2] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-      /* x[3] * y[srcBLen - 1] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = sum << 1;
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------    
-   * Initializations of stage2    
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]    
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------    
-   * Stage2 process    
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[0] sample */
-        c0 = *(py++);
-
-        /* Read x[3] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[0] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc1 +=  x[1] * y[0] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc2 +=  x[2] * y[0] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc3 +=  x[3] * y[0] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-        /* Read y[1] sample */
-        c0 = *(py++);
-
-        /* Read x[4] sample */
-        x0 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[1] * y[1] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc1 +=  x[2] * y[1] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc2 +=  x[3] * y[1] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc3 +=  x[4] * y[1] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-        /* Read y[2] sample */
-        c0 = *(py++);
-
-        /* Read x[5] sample */
-        x1 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[2] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc1 +=  x[3] * y[2] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc2 +=  x[4] * y[2] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc3 +=  x[5] * y[2] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-        /* Read y[3] sample */
-        c0 = *(py++);
-
-        /* Read x[6] sample */
-        x2 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[3] * y[3] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc1 +=  x[4] * y[3] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc2 +=  x[5] * y[3] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc3 +=  x[6] * y[3] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
-
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Read y[4] sample */
-        c0 = *(py++);
-
-        /* Read x[7] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[4] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc1 +=  x[5] * y[4] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc2 +=  x[6] * y[4] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc3 +=  x[7] * y[4] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q31_t) (acc0 << 1);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q31_t) (acc1 << 1);
-      pOut += inc;
-
-      *pOut = (q31_t) (acc2 << 1);
-      pOut += inc;
-
-      *pOut = (q31_t) (acc3 << 1);
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = sum << 1;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,    
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = sum << 1;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------    
-   * Initializations of stage3    
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]    
-   * sum +=  x[srcALen-1] * y[0]    
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = ((pIn1 + srcALen) - srcBLen) + 1u;
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------    
-   * Stage3 process    
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-      /* sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-      /* sum += x[srcALen - srcBLen + 2] * y[1] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-      /* sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = sum << 1;
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q15.c
deleted file mode 100755
index ccb8652a..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q15.c
+++ /dev/null
@@ -1,513 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_opt_q15.c    
-*    
-* Description:	Correlation of Q15 sequences.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-
-/**    
- * @brief Correlation of Q15 sequences.  
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.    
- * @return none.    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch buffers should be aligned by 32-bit    
- *     
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * This approach provides 33 guard bits and there is no risk of overflow.    
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.    
- *    
- * \par    
- * Refer to arm_correlate_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.   
- *  
- * 
- */
-
-
-void arm_correlate_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch)
-{
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulators                  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t x1, x2, x3;                              /* temporary variables for holding input1 and input2 values */
-  uint32_t j, blkCnt, outBlockSize;              /* loop counter                 */
-  int32_t inc = 1;                               /* output pointer increment     */
-  uint32_t tapCnt;
-  q31_t y1, y2;
-  q15_t *pScr;                                   /* Intermediate pointers        */
-  q15_t *pOut = pDst;                            /* output pointer               */
-#ifdef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t a, b;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,        
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB        
-     * to make their lengths equal.        
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))        
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  pScr = pScratch;
-
-  /* Fill (srcBLen - 1u) zeros in scratch buffer */
-  arm_fill_q15(0, pScr, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr += (srcBLen - 1u);
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr, srcALen);
-
-  /* Update pointers */
-  //pIn1 += srcALen;    
-  pScr += srcALen;
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  j = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  j = srcALen % 0x4u;
-
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr += (srcBLen - 1u);
-
-#else
-
-/* Apply loop unrolling and do 4 Copies simultaneously. */
-  j = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr++ = 0;
-    *pScr++ = 0;
-    *pScr++ = 0;
-    *pScr++ = 0;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  j = (srcBLen - 1u) % 0x4u;
-
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr++ = 0;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* Temporary pointer for scratch2 */
-  py = pIn2;
-
-
-  /* Actual correlation process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr = pScratch;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read four samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr)++;
-
-    /* Read next four samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pIn2);
-      y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-      acc0 = __SMLALD(x1, y1, acc0);
-
-      acc2 = __SMLALD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLALDX(x3, y1, acc1);
-
-      x1 = _SIMD32_OFFSET(pScr);
-
-      acc0 = __SMLALD(x2, y2, acc0);
-
-      acc2 = __SMLALD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y1, acc3);
-
-      acc1 = __SMLALDX(x3, y2, acc1);
-
-      x2 = _SIMD32_OFFSET(pScr + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y2, acc3);
-
-#else	 
-
-      /* Read four samples from smaller buffer */
-	  a = *pIn2;
-	  b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      y1 = __PKHBT(a, b, 16);
-#else
-      y1 = __PKHBT(b, a, 16);
-#endif
-	  
-	  a = *(pIn2 + 2);
-	  b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
-      y2 = __PKHBT(a, b, 16);
-#else
-      y2 = __PKHBT(b, a, 16);
-#endif				
-
-      acc0 = __SMLALD(x1, y1, acc0);
-
-      acc2 = __SMLALD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLALDX(x3, y1, acc1);
-
-	  a = *pScr;
-	  b = *(pScr + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(a, b, 16);
-#else
-      x1 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLALD(x2, y2, acc0);
-
-      acc2 = __SMLALD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y1, acc3);
-
-      acc1 = __SMLALDX(x3, y2, acc1);
-
-	  a = *(pScr + 2);
-	  b = *(pScr + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x2 = __PKHBT(a, b, 16);
-#else
-      x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y2, acc3);
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      pIn2 += 4u;
-
-      pScr += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr -= 4u;
-
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr++ * *pIn2);
-      acc1 += (*pScr++ * *pIn2);
-      acc2 += (*pScr++ * *pIn2);
-      acc3 += (*pScr++ * *pIn2++);
-
-      pScr -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-
-    /* Store the results in the accumulators in the destination buffer. */
-    *pOut = (__SSAT(acc0 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc1 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc2 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc3 >> 15u, 16));
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate correlation for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr = pScratch;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-
-      acc0 += (*pScr++ * *pIn2++);
-      acc0 += (*pScr++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch += 1u;
-
-  }
-
-
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q7.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q7.c
deleted file mode 100755
index 2f62f606..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q7.c
+++ /dev/null
@@ -1,464 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_opt_q7.c    
-*    
-* Description:	Correlation of Q7 sequences.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-
-/**    
- * @brief Correlation of Q7 sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.    
- * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).    
- * @return none.    
- *    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit     
- *        
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.    
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.    
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.    
- * This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072.    
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.  
- *  
- * 
- */
-
-
-
-void arm_correlate_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-  q7_t *pOut = pDst;                             /* output pointer                */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch */
-  q7_t *pIn1;                                    /* inputA pointer                */
-  q7_t *pIn2;                                    /* inputB pointer                */
-  q15_t *py;                                     /* Intermediate inputB pointer   */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators                  */
-  uint32_t j, k = 0u, blkCnt;                    /* loop counter                  */
-  int32_t inc = 1;                               /* output pointer increment          */
-  uint32_t outBlockSize;                         /* loop counter                  */
-  q15_t x4;                                      /* Temporary input variable      */
-  uint32_t tapCnt;                               /* loop counter                  */
-  q31_t x1, x2, x3, y1;                          /* Temporary input variables     */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,        
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB        
-     * to make their lengths equal.        
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))        
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-
-  /* Copy (srcBLen) samples in scratch buffer */
-  k = srcBLen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    x4 = (q15_t) * pIn2++;
-    *pScr2++ = x4;
-    x4 = (q15_t) * pIn2++;
-    *pScr2++ = x4;
-    x4 = (q15_t) * pIn2++;
-    *pScr2++ = x4;
-    x4 = (q15_t) * pIn2++;
-    *pScr2++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcBLen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) * pIn2++;
-    *pScr2++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* Fill (srcBLen - 1u) zeros in scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1u);
-
-  /* Copy (srcALen) samples in scratch buffer */
-  k = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcALen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1u);
-
-#else
-
-/* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = (srcBLen - 1u) % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* Temporary pointer for second sequence */
-  py = pScratch2;
-
-  /* Initialization of pScr2 pointer */
-  pScr2 = pScratch2;
-
-  /* Actual correlation process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr1)++;
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr1)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pScr2);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x1, y1, acc0);
-      acc2 = __SMLAD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pScr2 + 2u);
-
-      acc0 = __SMLAD(x2, y1, acc0);
-
-      acc2 = __SMLAD(x1, y1, acc2);
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      x2 = *__SIMD32(pScr1)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      pScr2 += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4u;
-
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pScr2);
-      acc1 += (*pScr1++ * *pScr2);
-      acc2 += (*pScr1++ * *pScr2);
-      acc3 += (*pScr1++ * *pScr2++);
-
-      pScr1 -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(acc0 >> 7u, 8));
-    pOut += inc;
-    *pOut = (q7_t) (__SSAT(acc1 >> 7u, 8));
-    pOut += inc;
-    *pOut = (q7_t) (__SSAT(acc2 >> 7u, 8));
-    pOut += inc;
-    *pOut = (q7_t) (__SSAT(acc3 >> 7u, 8));
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pScr2 = py;
-
-    pScratch1 += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate correlation for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-      acc0 += (*pScr1++ * *pScr2++);
-      acc0 += (*pScr1++ * *pScr2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pScr2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(acc0 >> 7u, 8));
-
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pScr2 = py;
-
-    pScratch1 += 1u;
-
-  }
-
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c
deleted file mode 100755
index 3003f751..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c
+++ /dev/null
@@ -1,719 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_correlate_q15.c   
-*   
-* Description:	Correlation of Q15 sequences. 
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup Corr   
- * @{   
- */
-
-/**   
- * @brief Correlation of Q15 sequences. 
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.   
- * @return none.   
- *   
- * @details   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * The function is implemented using a 64-bit internal accumulator.   
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.   
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.   
- * This approach provides 33 guard bits and there is no risk of overflow.   
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.   
- *   
- * \par   
- * Refer to arm_correlate_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. 
- *
- * \par    
- * Refer the function arm_correlate_opt_q15() for a faster implementation of this function using scratch buffers.
- * 
- */
-
-void arm_correlate_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst)
-{
-
-#if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1;                                  /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,   
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB   
-     * to make their lengths equal.   
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))   
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally   
-   * divided into three parts according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first part of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second part of the algorithm, srcBLen number of multiplications are done.   
-   * In the third part of the algorithm, the multiplications decrease by one   
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.   
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]   
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]   
-   * ....   
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* The first loop starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
-      sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-      /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
-      sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-      sum = __SMLALD(*px++, *py++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (__SSAT((sum >> 15), 16));
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]   
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------   
-   * Stage2 process   
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-      /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px + 1);
-	  px += 2u;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the first two inputB samples using SIMD:   
-         * y[0] and y[1] */
-        c0 = *__SIMD32(py)++;
-
-        /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
-        acc0 = __SMLALD(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
-        acc1 = __SMLALD(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-        /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px + 1);
-
-        /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
-        acc2 = __SMLALD(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
-        acc3 = __SMLALD(x3, c0, acc3);
-
-        /* Read y[2] and y[3] */
-        c0 = *__SIMD32(py)++;
-
-        /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
-        acc0 = __SMLALD(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
-        acc1 = __SMLALD(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px + 2);
-
-        /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px + 3);
-
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
-        acc2 = __SMLALD(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
-        acc3 = __SMLALD(x1, c0, acc3);
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[4] */
-        c0 = *py;
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-        /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
-        acc2 = __SMLALDX(x1, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[4], y[5] */
-        c0 = *__SIMD32(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px + 1);
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
-        acc2 = __SMLALD(x3, c0, acc2);
-        acc3 = __SMLALD(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[4], y[5] */
-        c0 = *__SIMD32(py)++;
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px + 1);
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
-        acc2 = __SMLALD(x3, c0, acc2);
-        acc3 = __SMLALD(x2, c0, acc3);
-
-        c0 = (*py);
-
-        /* Read y[6] */
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-        /* Read x[10] */
-        x3 = _SIMD32_OFFSET(px + 2);
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x1, c0, acc0);
-        acc1 = __SMLALD(x2, c0, acc1);
-        acc2 = __SMLALDX(x2, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (__SSAT(acc0 >> 15, 16));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q15_t) (__SSAT(acc1 >> 15, 16));
-      pOut += inc;
-
-      *pOut = (q15_t) (__SSAT(acc2 >> 15, 16));
-      pOut += inc;
-
-      *pOut = (q15_t) (__SSAT(acc3 >> 15, 16));
-      pOut += inc;
-
-      /* Increment the count by 4 as 4 output values are computed */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q63_t) * px++ * *py++);
-        sum += ((q63_t) * px++ * *py++);
-        sum += ((q63_t) * px++ * *py++);
-        sum += ((q63_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q63_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (__SSAT(sum >> 15, 16));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment count by 1, as one output value is computed */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q63_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (__SSAT(sum >> 15, 16));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]   
-   * sum +=  x[srcALen-1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-      /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLALD(*px++, *py++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (__SSAT((sum >> 15), 16));
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  q15_t *pIn1 = pSrcA;                           /* inputA pointer               */
-  q15_t *pIn2 = pSrcB + (srcBLen - 1u);          /* inputB pointer               */
-  q63_t sum;                                     /* Accumulators                  */
-  uint32_t i = 0u, j;                            /* loop counters */
-  uint32_t inv = 0u;                             /* Reverse order flag */
-  uint32_t tot = 0u;                             /* Length */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and a varaible, inv is set to 1 */
-  /* If lengths are not equal then zero pad has to be done to  make the two   
-   * inputs of same length. But to improve the performance, we include zeroes   
-   * in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the   
-   * starting of the output buffer */
-  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the  
-   * ending of the output buffer */
-  /* Once the zero padding is done the remaining of the output is calcualted  
-   * using convolution but with the shorter signal time shifted. */
-
-  /* Calculate the length of the remaining sequence */
-  tot = ((srcALen + srcBLen) - 2u);
-
-  if(srcALen > srcBLen)
-  {
-    /* Calculating the number of zeros to be padded to the output */
-    j = srcALen - srcBLen;
-
-    /* Initialise the pointer after zero padding */
-    pDst += j;
-  }
-
-  else if(srcALen < srcBLen)
-  {
-    /* Initialization to inputB pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization to the end of inputA pointer */
-    pIn2 = pSrcA + (srcALen - 1u);
-
-    /* Initialisation of the pointer after zero padding */
-    pDst = pDst + tot;
-
-    /* Swapping the lengths */
-    j = srcALen;
-    srcALen = srcBLen;
-    srcBLen = j;
-
-    /* Setting the reverse flag */
-    inv = 1;
-
-  }
-
-  /* Loop to calculate convolution for output length number of times */
-  for (i = 0u; i <= tot; i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0u; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if((((i - j) < srcBLen) && (j < srcALen)))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ((q31_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
-      }
-    }
-    /* Store the output in the destination buffer */
-    if(inv == 1)
-      *pDst-- = (q15_t) __SSAT((sum >> 15u), 16u);
-    else
-      *pDst++ = (q15_t) __SSAT((sum >> 15u), 16u);
-  }
-
-#endif /*#if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE) */
-
-}
-
-/**   
- * @} end of Corr group   
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c
deleted file mode 100755
index eaab75f7..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c
+++ /dev/null
@@ -1,665 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_q31.c    
-*    
-* Description:	Correlation of Q31 sequences.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-
-/**    
- * @brief Correlation of Q31 sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * There is no saturation on intermediate additions.    
- * Thus, if the accumulator overflows it wraps around and distorts the result.    
- * The input signals should be scaled down to avoid intermediate overflows.    
- * Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a    
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.    
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.    
- *    
- * \par    
- * See arm_correlate_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_correlate_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst)
-{
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t *pIn1;                                   /* inputA pointer               */
-  q31_t *pIn2;                                   /* inputB pointer               */
-  q31_t *pOut = pDst;                            /* output pointer               */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1;                                  /* Intermediate pointers        */
-  q63_t sum, acc0, acc1, acc2;                   /* Accumulators                  */
-  q31_t x0, x1, x2, c0;                          /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,    
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,    
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,    
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB    
-     * to make their lengths equal.    
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))    
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally    
-   * divided into three parts according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first part of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second part of the algorithm, srcBLen number of multiplications are done.    
-   * In the third part of the algorithm, the multiplications decrease by one    
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.    
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------    
-   * Initializations of stage1    
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]    
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]    
-   * ....    
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]    
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------    
-   * Stage1 process    
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 4] */
-      sum += (q63_t) * px++ * (*py++);
-      /* x[1] * y[srcBLen - 3] */
-      sum += (q63_t) * px++ * (*py++);
-      /* x[2] * y[srcBLen - 2] */
-      sum += (q63_t) * px++ * (*py++);
-      /* x[3] * y[srcBLen - 1] */
-      sum += (q63_t) * px++ * (*py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-      sum += (q63_t) * px++ * (*py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q31_t) (sum >> 31);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------    
-   * Initializations of stage2    
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]    
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------    
-   * Stage2 process    
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll by 3 */
-    blkCnt = blockSize2 / 3;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-
-      /* read x[0], x[1] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-
-      /* Apply loop unrolling and compute 3 MACs simultaneously. */
-      k = srcBLen / 3;
-
-      /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.        
-       ** a second loop below computes MACs for the remaining 1 to 2 samples. */
-      do
-      {
-        /* Read y[0] sample */
-        c0 = *(py);
-
-        /* Read x[2] sample */
-        x2 = *(px);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[0] */
-        acc0 += ((q63_t) x0 * c0);
-        /* acc1 +=  x[1] * y[0] */
-        acc1 += ((q63_t) x1 * c0);
-        /* acc2 +=  x[2] * y[0] */
-        acc2 += ((q63_t) x2 * c0);
-
-        /* Read y[1] sample */
-        c0 = *(py + 1u);
-
-        /* Read x[3] sample */
-        x0 = *(px + 1u);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[1] * y[1] */
-        acc0 += ((q63_t) x1 * c0);
-        /* acc1 +=  x[2] * y[1] */
-        acc1 += ((q63_t) x2 * c0);
-        /* acc2 +=  x[3] * y[1] */
-        acc2 += ((q63_t) x0 * c0);
-
-        /* Read y[2] sample */
-        c0 = *(py + 2u);
-
-        /* Read x[4] sample */
-        x1 = *(px + 2u);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[2] */
-        acc0 += ((q63_t) x2 * c0);
-        /* acc1 +=  x[3] * y[2] */
-        acc1 += ((q63_t) x0 * c0);
-        /* acc2 +=  x[4] * y[2] */
-        acc2 += ((q63_t) x1 * c0);
-
-        /* update scratch pointers */
-        px += 3u;
-        py += 3u;
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.        
-       ** No loop unrolling is used. */
-      k = srcBLen - (3 * (srcBLen / 3));
-
-      while(k > 0u)
-      {
-        /* Read y[4] sample */
-        c0 = *(py++);
-
-        /* Read x[7] sample */
-        x2 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[4] */
-        acc0 += ((q63_t) x0 * c0);
-        /* acc1 +=  x[5] * y[4] */
-        acc1 += ((q63_t) x1 * c0);
-        /* acc2 +=  x[6] * y[4] */
-        acc2 += ((q63_t) x2 * c0);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q31_t) (acc0 >> 31);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q31_t) (acc1 >> 31);
-      pOut += inc;
-
-      *pOut = (q31_t) (acc2 >> 31);
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 3 */
-      count += 3u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here.        
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 - 3 * (blockSize2 / 3);
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += (q63_t) * px++ * (*py++);
-        sum += (q63_t) * px++ * (*py++);
-        sum += (q63_t) * px++ * (*py++);
-        sum += (q63_t) * px++ * (*py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q31_t) (sum >> 31);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,    
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q31_t) (sum >> 31);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------    
-   * Initializations of stage3    
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]    
-   * sum +=  x[srcALen-1] * y[0]    
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------    
-   * Stage3 process    
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] */
-      sum += (q63_t) * px++ * (*py++);
-      /* sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum += (q63_t) * px++ * (*py++);
-      /* sum += x[srcALen - srcBLen + 2] * y[1] */
-      sum += (q63_t) * px++ * (*py++);
-      /* sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum += (q63_t) * px++ * (*py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += (q63_t) * px++ * (*py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q31_t) (sum >> 31);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t *pIn1 = pSrcA;                           /* inputA pointer               */
-  q31_t *pIn2 = pSrcB + (srcBLen - 1u);          /* inputB pointer               */
-  q63_t sum;                                     /* Accumulators                  */
-  uint32_t i = 0u, j;                            /* loop counters */
-  uint32_t inv = 0u;                             /* Reverse order flag */
-  uint32_t tot = 0u;                             /* Length */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and a varaible, inv is set to 1 */
-  /* If lengths are not equal then zero pad has to be done to  make the two    
-   * inputs of same length. But to improve the performance, we include zeroes    
-   * in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the    
-   * starting of the output buffer */
-  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the   
-   * ending of the output buffer */
-  /* Once the zero padding is done the remaining of the output is calcualted   
-   * using correlation but with the shorter signal time shifted. */
-
-  /* Calculate the length of the remaining sequence */
-  tot = ((srcALen + srcBLen) - 2u);
-
-  if(srcALen > srcBLen)
-  {
-    /* Calculating the number of zeros to be padded to the output */
-    j = srcALen - srcBLen;
-
-    /* Initialise the pointer after zero padding */
-    pDst += j;
-  }
-
-  else if(srcALen < srcBLen)
-  {
-    /* Initialization to inputB pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization to the end of inputA pointer */
-    pIn2 = pSrcA + (srcALen - 1u);
-
-    /* Initialisation of the pointer after zero padding */
-    pDst = pDst + tot;
-
-    /* Swapping the lengths */
-    j = srcALen;
-    srcALen = srcBLen;
-    srcBLen = j;
-
-    /* Setting the reverse flag */
-    inv = 1;
-
-  }
-
-  /* Loop to calculate correlation for output length number of times */
-  for (i = 0u; i <= tot; i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to correlation equation */
-    for (j = 0u; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if((((i - j) < srcBLen) && (j < srcALen)))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ((q63_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
-      }
-    }
-    /* Store the output in the destination buffer */
-    if(inv == 1)
-      *pDst-- = (q31_t) (sum >> 31u);
-    else
-      *pDst++ = (q31_t) (sum >> 31u);
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c
deleted file mode 100755
index 6adef05e..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c
+++ /dev/null
@@ -1,790 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_correlate_q7.c   
-*   
-* Description:	Correlation of Q7 sequences. 
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup Corr   
- * @{   
- */
-
-/**   
- * @brief Correlation of Q7 sequences.   
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.   
- * @return none.   
- *   
- * @details   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * The function is implemented using a 32-bit internal accumulator.   
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.   
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.   
- * This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072.   
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.   
- *
- * \par    
- * Refer the function arm_correlate_opt_q7() for a faster implementation of this function.
- * 
- */
-
-void arm_correlate_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t *pIn1;                                    /* inputA pointer               */
-  q7_t *pIn2;                                    /* inputB pointer               */
-  q7_t *pOut = pDst;                             /* output pointer               */
-  q7_t *px;                                      /* Intermediate inputA pointer  */
-  q7_t *py;                                      /* Intermediate inputB pointer  */
-  q7_t *pSrc1;                                   /* Intermediate pointers        */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q31_t input1, input2;                          /* temporary variables */
-  q15_t in1, in2;                                /* temporary variables */
-  q7_t x0, x1, x2, x3, c0, c1;                   /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,   
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB   
-     * to make their lengths equal.   
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))   
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally   
-   * divided into three parts according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first part of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second part of the algorithm, srcBLen number of multiplications are done.   
-   * In the third part of the algorithm, the multiplications decrease by one   
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.   
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]   
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]   
-   * ....   
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] , x[1] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* y[srcBLen - 4] , y[srcBLen - 3] */
-      in1 = (q15_t) * py++;
-      in2 = (q15_t) * py++;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* x[0] * y[srcBLen - 4] */
-      /* x[1] * y[srcBLen - 3] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* x[2] , x[3] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* y[srcBLen - 2] , y[srcBLen - 1] */
-      in1 = (q15_t) * py++;
-      in2 = (q15_t) * py++;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* x[2] * y[srcBLen - 2] */
-      /* x[3] * y[srcBLen - 1] */
-      sum = __SMLAD(input1, input2, sum);
-
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-      sum += (q31_t) ((q15_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(sum >> 7, 8));
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]   
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------   
-   * Stage2 process   
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *px++;
-      x1 = *px++;
-      x2 = *px++;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[0] sample */
-        c0 = *py++;
-        /* Read y[1] sample */
-        c1 = *py++;
-
-        /* Read x[3] sample */
-        x3 = *px++;
-
-        /* x[0] and x[1] are packed */
-        in1 = (q15_t) x0;
-        in2 = (q15_t) x1;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* y[0] and y[1] are packed */
-        in1 = (q15_t) c0;
-        in2 = (q15_t) c1;
-
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* acc0 += x[0] * y[0] + x[1] * y[1]  */
-        acc0 = __SMLAD(input1, input2, acc0);
-
-        /* x[1] and x[2] are packed */
-        in1 = (q15_t) x1;
-        in2 = (q15_t) x2;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* acc1 += x[1] * y[0] + x[2] * y[1] */
-        acc1 = __SMLAD(input1, input2, acc1);
-
-        /* x[2] and x[3] are packed */
-        in1 = (q15_t) x2;
-        in2 = (q15_t) x3;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* acc2 += x[2] * y[0] + x[3] * y[1]  */
-        acc2 = __SMLAD(input1, input2, acc2);
-
-        /* Read x[4] sample */
-        x0 = *(px++);
-
-        /* x[3] and x[4] are packed */
-        in1 = (q15_t) x3;
-        in2 = (q15_t) x0;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* acc3 += x[3] * y[0] + x[4] * y[1]  */
-        acc3 = __SMLAD(input1, input2, acc3);
-
-        /* Read y[2] sample */
-        c0 = *py++;
-        /* Read y[3] sample */
-        c1 = *py++;
-
-        /* Read x[5] sample */
-        x1 = *px++;
-
-        /* x[2] and x[3] are packed */
-        in1 = (q15_t) x2;
-        in2 = (q15_t) x3;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* y[2] and y[3] are packed */
-        in1 = (q15_t) c0;
-        in2 = (q15_t) c1;
-
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* acc0 += x[2] * y[2] + x[3] * y[3]  */
-        acc0 = __SMLAD(input1, input2, acc0);
-
-        /* x[3] and x[4] are packed */
-        in1 = (q15_t) x3;
-        in2 = (q15_t) x0;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* acc1 += x[3] * y[2] + x[4] * y[3]  */
-        acc1 = __SMLAD(input1, input2, acc1);
-
-        /* x[4] and x[5] are packed */
-        in1 = (q15_t) x0;
-        in2 = (q15_t) x1;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* acc2 += x[4] * y[2] + x[5] * y[3]  */
-        acc2 = __SMLAD(input1, input2, acc2);
-
-        /* Read x[6] sample */
-        x2 = *px++;
-
-        /* x[5] and x[6] are packed */
-        in1 = (q15_t) x1;
-        in2 = (q15_t) x2;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* acc3 += x[5] * y[2] + x[6] * y[3]  */
-        acc3 = __SMLAD(input1, input2, acc3);
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Read y[4] sample */
-        c0 = *py++;
-
-        /* Read x[7] sample */
-        x3 = *px++;
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[4] */
-        acc0 += ((q15_t) x0 * c0);
-        /* acc1 +=  x[5] * y[4] */
-        acc1 += ((q15_t) x1 * c0);
-        /* acc2 +=  x[6] * y[4] */
-        acc2 += ((q15_t) x2 * c0);
-        /* acc3 +=  x[7] * y[4] */
-        acc3 += ((q15_t) x3 * c0);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q7_t) (__SSAT(acc0 >> 7, 8));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q7_t) (__SSAT(acc1 >> 7, 8));
-      pOut += inc;
-
-      *pOut = (q7_t) (__SSAT(acc2 >> 7, 8));
-      pOut += inc;
-
-      *pOut = (q7_t) (__SSAT(acc3 >> 7, 8));
-      pOut += inc;
-
-	  count += 4u;
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) * py++;
-        in2 = (q15_t) * py++;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) * py++;
-        in2 = (q15_t) * py++;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q15_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q7_t) (__SSAT(sum >> 7, 8));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-	  count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q15_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q7_t) (__SSAT(sum >> 7, 8));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]   
-   * sum +=  x[srcALen-1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[srcALen - srcBLen + 1] , x[srcALen - srcBLen + 2]  */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* y[0] , y[1] */
-      in1 = (q15_t) * py++;
-      in2 = (q15_t) * py++;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* sum += x[srcALen - srcBLen + 1] * y[0] */
-      /* sum += x[srcALen - srcBLen + 2] * y[1] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* x[srcALen - srcBLen + 3] , x[srcALen - srcBLen + 4] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* y[2] , y[3] */
-      in1 = (q15_t) * py++;
-      in2 = (q15_t) * py++;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* sum += x[srcALen - srcBLen + 3] * y[2] */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += ((q15_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(sum >> 7, 8));
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  q7_t *pIn1 = pSrcA;                            /* inputA pointer */
-  q7_t *pIn2 = pSrcB + (srcBLen - 1u);           /* inputB pointer */
-  q31_t sum;                                     /* Accumulator */
-  uint32_t i = 0u, j;                            /* loop counters */
-  uint32_t inv = 0u;                             /* Reverse order flag */
-  uint32_t tot = 0u;                             /* Length */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and a varaible, inv is set to 1 */
-  /* If lengths are not equal then zero pad has to be done to  make the two   
-   * inputs of same length. But to improve the performance, we include zeroes   
-   * in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the   
-   * starting of the output buffer */
-  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the  
-   * ending of the output buffer */
-  /* Once the zero padding is done the remaining of the output is calcualted  
-   * using convolution but with the shorter signal time shifted. */
-
-  /* Calculate the length of the remaining sequence */
-  tot = ((srcALen + srcBLen) - 2u);
-
-  if(srcALen > srcBLen)
-  {
-    /* Calculating the number of zeros to be padded to the output */
-    j = srcALen - srcBLen;
-
-    /* Initialise the pointer after zero padding */
-    pDst += j;
-  }
-
-  else if(srcALen < srcBLen)
-  {
-    /* Initialization to inputB pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization to the end of inputA pointer */
-    pIn2 = pSrcA + (srcALen - 1u);
-
-    /* Initialisation of the pointer after zero padding */
-    pDst = pDst + tot;
-
-    /* Swapping the lengths */
-    j = srcALen;
-    srcALen = srcBLen;
-    srcBLen = j;
-
-    /* Setting the reverse flag */
-    inv = 1;
-
-  }
-
-  /* Loop to calculate convolution for output length number of times */
-  for (i = 0u; i <= tot; i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0u; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if((((i - j) < srcBLen) && (j < srcALen)))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ((q15_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
-      }
-    }
-    /* Store the output in the destination buffer */
-    if(inv == 1)
-      *pDst-- = (q7_t) __SSAT((sum >> 7u), 8u);
-    else
-      *pDst++ = (q7_t) __SSAT((sum >> 7u), 8u);
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**   
- * @} end of Corr group   
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c
deleted file mode 100755
index 15929739..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c
+++ /dev/null
@@ -1,524 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_decimate_f32.c    
-*    
-* Description:	FIR decimation for floating-point sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup FIR_decimate Finite Impulse Response (FIR) Decimator    
- *    
- * These functions combine an FIR filter together with a decimator.    
- * They are used in multirate systems for reducing the sample rate of a signal without introducing aliasing distortion.    
- * Conceptually, the functions are equivalent to the block diagram below:    
- * \image html FIRDecimator.gif "Components included in the FIR Decimator functions"    
- * When decimating by a factor of M, the signal should be prefiltered by a lowpass filter with a normalized    
- * cutoff frequency of 1/M in order to prevent aliasing distortion.    
- * The user of the function is responsible for providing the filter coefficients.    
- *    
- * The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the decimator in an efficient manner.    
- * Instead of calculating all of the FIR filter outputs and discarding M-1 out of every M, only the    
- * samples output by the decimator are computed.    
- * The functions operate on blocks of input and output data.    
- * pSrc points to an array of blockSize input values and    
- * pDst points to an array of blockSize/M output values.    
- * In order to have an integer number of output samples blockSize    
- * must always be a multiple of the decimation factor M.    
- *    
- * The library provides separate functions for Q15, Q31 and floating-point data types.    
- *    
- * \par Algorithm:    
- * The FIR portion of the algorithm uses the standard form filter:    
- * 
    
- *    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]    
- * 
    
- * where, b[n] are the filter coefficients.    
- * \par   
- * The pCoeffs points to a coefficient array of size numTaps.    
- * Coefficients are stored in time reversed order.    
- * \par    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to a state array of size numTaps + blockSize - 1.    
- * Samples in the state buffer are stored in the order:    
- * \par    
- * 
    
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}    
- * 
    
- * The state variables are updated after each block of data is processed, the coefficients are untouched.    
- *    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable array should be allocated separately.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * - Checks to make sure that the size of the input is a multiple of the decimation factor.    
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numTaps, pCoeffs, M (decimation factor), pState. Also set all of the values in pState to zero. 
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * The code below statically initializes each of the 3 different data type filter instance structures    
- * 
    
- *arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};    
- *arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};    
- *arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};    
- * 
    
- * where M is the decimation factor; numTaps is the number of filter coefficients in the filter;    
- * pCoeffs is the address of the coefficient buffer;    
- * pState is the address of the state buffer.    
- * Be sure to set the values in the state buffer to zeros when doing static initialization.    
- *    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the FIR decimate filter functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-  /**    
-   * @brief Processing function for the floating-point FIR decimator.    
-   * @param[in] *S        points to an instance of the floating-point FIR decimator structure.    
-   * @param[in] *pSrc     points to the block of input data.    
-   * @param[out] *pDst    points to the block of output data.    
-   * @param[in] blockSize number of input samples to process per call.    
-   * @return none.    
-   */
-
-void arm_fir_decimate_f32(
-  const arm_fir_decimate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-  float32_t sum0;                                /* Accumulator */
-  float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  uint32_t blkCntN4;
-  float32_t *px0, *px1, *px2, *px3;
-  float32_t acc0, acc1, acc2, acc3;
-  float32_t x1, x2, x3;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 4;
-  blkCntN4 = outBlockSize - (4 * blkCnt);
-
-  while(blkCnt > 0u)
-  {
-    /* Copy 4 * decimation factor number of new input samples into the state buffer */
-    i = 4 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulators to zero */
-    acc0 = 0.0f;
-    acc1 = 0.0f;
-    acc2 = 0.0f;
-    acc3 = 0.0f;
-
-    /* Initialize state pointer for all the samples */
-    px0 = pState;
-    px1 = pState + S->M;
-    px2 = pState + 2 * S->M;
-    px3 = pState + 3 * S->M;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-1] sample for acc0 */
-      x0 = *(px0++);
-      /* Read x[n-numTaps-1] sample for acc1 */
-      x1 = *(px1++);
-      /* Read x[n-numTaps-1] sample for acc2 */
-      x2 = *(px2++);
-      /* Read x[n-numTaps-1] sample for acc3 */
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch  state variables for acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + 4 * S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = acc0;
-    *pDst++ = acc1;
-    *pDst++ = acc2;
-    *pDst++ = acc3;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  while(blkCntN4 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0.0f;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-1] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-2] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = sum0;
-
-    /* Decrement the loop counter */
-    blkCntN4--;
-  }
-
-  /* Processing is complete.    
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0.0f;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor           
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = sum0;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Copy numTaps number of values */
-  i = (numTaps - 1u);
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY        */
-
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
deleted file mode 100755
index 8ae0d2e0..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
+++ /dev/null
@@ -1,598 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_decimate_fast_q15.c    
-*    
-* Description:	Fast Q15 FIR Decimator.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.    
- * @param[in] *S points to an instance of the Q15 FIR decimator structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none    
- *    
- * \par Restrictions   
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE   
- *	In this case input, output, state buffers should be aligned by 32-bit   
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * This fast version uses a 32-bit accumulator with 2.30 format.    
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around and distorts the result.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2).    
- * The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.    
- *    
- * \par    
- * Refer to the function arm_fir_decimate_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.    
- * Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_fir_decimate_init_q15() to initialize the filter structure.    
- */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-void arm_fir_decimate_fast_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q31_t x0, x1, c0, c1;                          /* Temporary variables to hold state and coefficient values */
-  q31_t sum0;                                    /* Accumulators */
-  q31_t acc0, acc1;
-  q15_t *px0, *px1;
-  uint32_t blkCntN3;
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 2;
-  blkCntN3 = outBlockSize - (2 * blkCnt);
-
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-
-    px1 = pState + S->M;
-
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = *__SIMD32(px0)++;
-
-      x1 = *__SIMD32(px1)++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLAD(x0, c0, acc0);
-
-      acc1 = __SMLAD(x1, c0, acc1);
-
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = *__SIMD32(px0)++;
-
-      x1 = *__SIMD32(px1)++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLAD(x0, c0, acc0);
-
-      acc1 = __SMLAD(x1, c0, acc1);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLAD(x0, c0, acc0);
-      acc1 = __SMLAD(x1, c0, acc1);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-
-  while(blkCntN3 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /*Set sum to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = *__SIMD32(px)++;
-
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c1 = *__SIMD32(pb)++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLAD(x0, c0, sum0);
-
-      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = *__SIMD32(px)++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLAD(x0, c1, sum0);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLAD(x0, c0, sum0);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCntN3--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-#else
-
-
-void arm_fir_decimate_fast_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q15_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
-  q31_t sum0;                                    /* Accumulators */
-  q31_t acc0, acc1;
-  q15_t *px0, *px1;
-  uint32_t blkCntN3;
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 2;
-  blkCntN3 = outBlockSize - (2 * blkCnt);
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-
-    px1 = pState + S->M;
-
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] for sample 0 and for sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-3]  coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  while(blkCntN3 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /*Set sum to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] and sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] and  sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-3]  coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCntN3--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
deleted file mode 100755
index 4f012696..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
+++ /dev/null
@@ -1,351 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_decimate_fast_q31.c    
-*    
-* Description:	Fast Q31 FIR Decimator.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.    
- * @param[in] *S points to an instance of the Q31 FIR decimator structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none    
- *    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.    
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.    
- * These intermediate results are added to a 2.30 accumulator.    
- * Finally, the accumulator is saturated and converted to a 1.31 result.    
- * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).    
- *    
- * \par    
- * Refer to the function arm_fir_decimate_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.    
- * Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_fir_decimate_init_q31() to initialize the filter structure.    
- */
-
-void arm_fir_decimate_fast_q31(
-  arm_fir_decimate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  q31_t *px;                                     /* Temporary pointers for state buffer */
-  q31_t *pb;                                     /* Temporary pointers for coefficient buffer */
-  q31_t sum0;                                    /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-  uint32_t blkCntN2;
-  q31_t x1;
-  q31_t acc0, acc1;
-  q31_t *px0, *px1;
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-
-  blkCnt = outBlockSize / 2;
-  blkCntN2 = outBlockSize - (2 * blkCnt);
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-    px1 = pState + S->M;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb);
-
-      /* Read x[n-numTaps-1] for sample 0 sample 1 */
-      x0 = *(px0);
-      x1 = *(px1);
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb + 1u);
-
-      /* Read x[n-numTaps-2]  for sample 0 sample 1  */
-      x0 = *(px0 + 1u);
-      x1 = *(px1 + 1u);
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb + 2u);
-
-      /* Read x[n-numTaps-3]  for sample 0 sample 1 */
-      x0 = *(px0 + 2u);
-      x1 = *(px1 + 2u);
-      pb += 4u;
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb - 1u);
-
-      /* Read x[n-numTaps-4] for sample 0 sample 1 */
-      x0 = *(px0 + 3u);
-      x1 = *(px1 + 3u);
-
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* update state pointers */
-      px0 += 4u;
-      px1 += 4u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x0 = *(px0++);
-      x1 = *(px1++);
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 << 1);
-    *pDst++ = (q31_t) (acc1 << 1);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  while(blkCntN2 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-1] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-2] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (sum0 << 1);
-
-    /* Decrement the loop counter */
-    blkCntN2--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
deleted file mode 100755
index 78965103..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_decimate_init_f32.c    
-*    
-* Description:  Floating-point FIR Decimator initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the floating-point FIR decimator.    
- * @param[in,out] *S points to an instance of the floating-point FIR decimator structure.    
- * @param[in] numTaps  number of coefficients in the filter.    
- * @param[in] M  decimation factor.    
- * @param[in] *pCoeffs points to the filter coefficients.    
- * @param[in] *pState points to the state buffer.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * blockSize is not a multiple of M.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_f32().    
- * M is the decimation factor.    
- */
-
-arm_status arm_fir_decimate_init_f32(
-  arm_fir_decimate_instance_f32 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The size of the input block must be a multiple of the decimation factor */
-  if((blockSize % M) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-    /* Assign filter taps */
-    S->numTaps = numTaps;
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Clear state buffer and size is always (blockSize + numTaps - 1) */
-    memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    /* Assign Decimation Factor */
-    S->M = M;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
deleted file mode 100755
index a3fad6b8..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
+++ /dev/null
@@ -1,119 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_decimate_init_q15.c    
-*    
-* Description:  Initialization function for the Q15 FIR Decimator.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the Q15 FIR decimator.    
- * @param[in,out] *S points to an instance of the Q15 FIR decimator structure.    
- * @param[in] numTaps  number of coefficients in the filter.    
- * @param[in] M  decimation factor.    
- * @param[in] *pCoeffs points to the filter coefficients.    
- * @param[in] *pState points to the state buffer.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * blockSize is not a multiple of M.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples    
- * to the call arm_fir_decimate_q15().    
- * M is the decimation factor.    
- */
-
-arm_status arm_fir_decimate_init_q15(
-  arm_fir_decimate_instance_q15 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize)
-{
-
-  arm_status status;
-
-  /* The size of the input block must be a multiple of the decimation factor */
-  if((blockSize % M) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-    /* Assign filter taps */
-    S->numTaps = numTaps;
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Clear the state buffer.  The size of buffer is always (blockSize + numTaps - 1) */
-    memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    /* Assign Decimation factor */
-    S->M = M;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
deleted file mode 100755
index 9d332f31..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_decimate_init_q31.c    
-*    
-* Description:  Initialization function for Q31 FIR Decimation filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the Q31 FIR decimator.    
- * @param[in,out] *S points to an instance of the Q31 FIR decimator structure.    
- * @param[in] numTaps  number of coefficients in the filter.    
- * @param[in] M  decimation factor.    
- * @param[in] *pCoeffs points to the filter coefficients.    
- * @param[in] *pState points to the state buffer.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * blockSize is not a multiple of M.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_q31().    
- * M is the decimation factor.    
- */
-
-arm_status arm_fir_decimate_init_q31(
-  arm_fir_decimate_instance_q31 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The size of the input block must be a multiple of the decimation factor */
-  if((blockSize % M) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-    /* Assign filter taps */
-    S->numTaps = numTaps;
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
-    memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(q31_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    /* Assign Decimation factor */
-    S->M = M;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c
deleted file mode 100755
index f3a6a4a2..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c
+++ /dev/null
@@ -1,696 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_decimate_q15.c    
-*    
-* Description:	Q15 FIR Decimator.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 FIR decimator.    
- * @param[in] *S points to an instance of the Q15 FIR decimator structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the location where the output result is written.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.    
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.    
- *    
- * \par    
- * Refer to the function arm_fir_decimate_fast_q15() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-void arm_fir_decimate_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q31_t x0, x1, c0, c1;                          /* Temporary variables to hold state and coefficient values */
-  q63_t sum0;                                    /* Accumulators */
-  q63_t acc0, acc1;
-  q15_t *px0, *px1;
-  uint32_t blkCntN3;
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 2;
-  blkCntN3 = outBlockSize - (2 * blkCnt);
-
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-
-    px1 = pState + S->M;
-
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = *__SIMD32(px0)++;
-
-      x1 = *__SIMD32(px1)++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      acc1 = __SMLALD(x1, c0, acc1);
-
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = *__SIMD32(px0)++;
-
-      x1 = *__SIMD32(px1)++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      acc1 = __SMLALD(x1, c0, acc1);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLALD(x0, c0, acc0);
-      acc1 = __SMLALD(x1, c0, acc1);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-
-  while(blkCntN3 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /*Set sum to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = *__SIMD32(px)++;
-
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c1 = *__SIMD32(pb)++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLALD(x0, c0, sum0);
-
-      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = *__SIMD32(px)++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLALD(x0, c1, sum0);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLALD(x0, c0, sum0);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCntN3--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-#else
-
-
-void arm_fir_decimate_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q15_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
-  q63_t sum0;                                    /* Accumulators */
-  q63_t acc0, acc1;
-  q15_t *px0, *px1;
-  uint32_t blkCntN3;
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 2;
-  blkCntN3 = outBlockSize - (2 * blkCnt);
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-
-    px1 = pState + S->M;
-
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] for sample 0 and for sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-3] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  while(blkCntN3 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /*Set sum to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] and sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] and  sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-3]  coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCntN3--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#else
-
-
-void arm_fir_decimate_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  q63_t sum0;                                    /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-
-/* Run the below code for Cortex-M0 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /*Set sum to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q31_t) x0 *c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor           
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /*Store filter output , smlad will return the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = numTaps - 1u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-
-}
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c
deleted file mode 100755
index 5696b231..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c
+++ /dev/null
@@ -1,311 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_decimate_q31.c    
-*    
-* Description:	Q31 FIR Decimator.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 FIR decimator.    
- * @param[in] *S points to an instance of the Q31 FIR decimator structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).    
- * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.    
- *    
- * \par    
- * Refer to the function arm_fir_decimate_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_fir_decimate_q31(
-  const arm_fir_decimate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  q31_t *px;                                     /* Temporary pointers for state buffer */
-  q31_t *pb;                                     /* Temporary pointers for coefficient buffer */
-  q63_t sum0;                                    /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.    
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-1] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-2] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor    
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (sum0 >> 31);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.    
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor           
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (sum0 >> 31);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = numTaps - 1u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c
deleted file mode 100755
index a827e68d..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c
+++ /dev/null
@@ -1,997 +0,0 @@
-/* ----------------------------------------------------------------------  
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.  
-*  
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*  
-* Project: 	    CMSIS DSP Library  
-* Title:	    arm_fir_f32.c  
-*  
-* Description:	Floating-point FIR filter processing function.  
-*  
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**  
-* @ingroup groupFilters  
-*/
-
-/**  
-* @defgroup FIR Finite Impulse Response (FIR) Filters  
-*  
-* This set of functions implements Finite Impulse Response (FIR) filters  
-* for Q7, Q15, Q31, and floating-point data types.  Fast versions of Q15 and Q31 are also provided.  
-* The functions operate on blocks of input and output data and each call to the function processes  
-* blockSize samples through the filter.  pSrc and  
-* pDst points to input and output arrays containing blockSize values.  
-*  
-* \par Algorithm:  
-* The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations.  
-* Each filter coefficient b[n] is multiplied by a state variable which equals a previous input sample x[n].  
-* 
  
-*    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]  
-* 
  
-* \par  
-* \image html FIR.gif "Finite Impulse Response filter"  
-* \par  
-* pCoeffs points to a coefficient array of size numTaps.  
-* Coefficients are stored in time reversed order.  
-* \par  
-* 
  
-*    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}  
-* 
  
-* \par  
-* pState points to a state array of size numTaps + blockSize - 1.  
-* Samples in the state buffer are stored in the following order.  
-* \par  
-* 
  
-*    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}  
-* 
  
-* \par  
-* Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1.  
-* The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters,  
-* to be avoided and yields a significant speed improvement.  
-* The state variables are updated after each block of data is processed; the coefficients are untouched.  
-* \par Instance Structure  
-* The coefficients and state variables for a filter are stored together in an instance data structure.  
-* A separate instance structure must be defined for each filter.  
-* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.  
-* There are separate instance structure declarations for each of the 4 supported data types.  
-*  
-* \par Initialization Functions  
-* There is also an associated initialization function for each data type.  
-* The initialization function performs the following operations:  
-* - Sets the values of the internal structure fields.  
-* - Zeros out the values in the state buffer.  
-* To do this manually without calling the init function, assign the follow subfields of the instance structure:
-* numTaps, pCoeffs, pState. Also set all of the values in pState to zero. 
-*  
-* \par  
-* Use of the initialization function is optional.  
-* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.  
-* To place an instance structure into a const data section, the instance structure must be manually initialized.  
-* Set the values in the state buffer to zeros before static initialization.  
-* The code below statically initializes each of the 4 different data type filter instance structures  
-* 
  
-*arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};  
-*arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};  
-*arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};  
-*arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};  
-* 
  
-*  
-* where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer;  
-* pCoeffs is the address of the coefficient buffer.  
-*  
-* \par Fixed-Point Behavior  
-* Care must be taken when using the fixed-point versions of the FIR filter functions.  
-* In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.  
-* Refer to the function specific documentation below for usage guidelines.  
-*/
-
-/**  
-* @addtogroup FIR  
-* @{  
-*/
-
-/**  
-*  
-* @param[in]  *S points to an instance of the floating-point FIR filter structure.  
-* @param[in]  *pSrc points to the block of input data.  
-* @param[out] *pDst points to the block of output data.  
-* @param[in]  blockSize number of samples to process per call.  
-* @return     none.  
-*  
-*/
-
-#if defined(ARM_MATH_CM7)
-
-void arm_fir_f32(
-const arm_fir_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
-{
-   float32_t *pState = S->pState;                 /* State pointer */
-   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-   float32_t acc0, acc1, acc2, acc3, acc4, acc5, acc6, acc7;     /* Accumulators */
-   float32_t x0, x1, x2, x3, x4, x5, x6, x7, c0;  /* Temporary variables to hold state and coefficient values */
-   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-   /* pStateCurnt points to the location where the new input data should be written */
-   pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-   /* Apply loop unrolling and compute 8 output values simultaneously.  
-    * The variables acc0 ... acc7 hold output values that are being computed:  
-    *  
-    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]  
-    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]  
-    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]  
-    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]  
-    */
-   blkCnt = blockSize >> 3;
-
-   /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.  
-   ** a second loop below computes the remaining 1 to 7 samples. */
-   while(blkCnt > 0u)
-   {
-      /* Copy four new input samples into the state buffer */
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-
-      /* Set all accumulators to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-      acc4 = 0.0f;
-      acc5 = 0.0f;
-      acc6 = 0.0f;
-      acc7 = 0.0f;		
-
-      /* Initialize state pointer */
-      px = pState;
-
-      /* Initialize coeff pointer */
-      pb = (pCoeffs);		
-   
-      /* This is separated from the others to avoid 
-       * a call to __aeabi_memmove which would be slower
-       */
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-
-      /* Read the first seven samples from the state buffer:  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-      x0 = *px++;
-      x1 = *px++;
-      x2 = *px++;
-      x3 = *px++;
-      x4 = *px++;
-      x5 = *px++;
-      x6 = *px++;
-
-      /* Loop unrolling.  Process 8 taps at a time. */
-      tapCnt = numTaps >> 3u;
-      
-      /* Loop over the number of taps.  Unroll by a factor of 8.  
-       ** Repeat until we've computed numTaps-8 coefficients. */
-      while(tapCnt > 0u)
-      {
-         /* Read the b[numTaps-1] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-3] sample */
-         x7 = *(px++);
-
-         /* acc0 +=  b[numTaps-1] * x[n-numTaps] */
-         acc0 += x0 * c0;
-
-         /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */
-         acc1 += x1 * c0;
-
-         /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */
-         acc2 += x2 * c0;
-
-         /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */
-         acc3 += x3 * c0;
-
-         /* acc4 +=  b[numTaps-1] * x[n-numTaps-4] */
-         acc4 += x4 * c0;
-
-         /* acc1 +=  b[numTaps-1] * x[n-numTaps-5] */
-         acc5 += x5 * c0;
-
-         /* acc2 +=  b[numTaps-1] * x[n-numTaps-6] */
-         acc6 += x6 * c0;
-
-         /* acc3 +=  b[numTaps-1] * x[n-numTaps-7] */
-         acc7 += x7 * c0;
-         
-         /* Read the b[numTaps-2] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-4] sample */
-         x0 = *(px++);
-
-         /* Perform the multiply-accumulate */
-         acc0 += x1 * c0;
-         acc1 += x2 * c0;   
-         acc2 += x3 * c0;   
-         acc3 += x4 * c0;   
-         acc4 += x5 * c0;   
-         acc5 += x6 * c0;   
-         acc6 += x7 * c0;   
-         acc7 += x0 * c0;   
-         
-         /* Read the b[numTaps-3] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-5] sample */
-         x1 = *(px++);
-
-         /* Perform the multiply-accumulates */      
-         acc0 += x2 * c0;
-         acc1 += x3 * c0;   
-         acc2 += x4 * c0;   
-         acc3 += x5 * c0;   
-         acc4 += x6 * c0;   
-         acc5 += x7 * c0;   
-         acc6 += x0 * c0;   
-         acc7 += x1 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x2 = *(px++);
-
-         /* Perform the multiply-accumulates */      
-         acc0 += x3 * c0;
-         acc1 += x4 * c0;   
-         acc2 += x5 * c0;   
-         acc3 += x6 * c0;   
-         acc4 += x7 * c0;   
-         acc5 += x0 * c0;   
-         acc6 += x1 * c0;   
-         acc7 += x2 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x3 = *(px++);
-         /* Perform the multiply-accumulates */      
-         acc0 += x4 * c0;
-         acc1 += x5 * c0;   
-         acc2 += x6 * c0;   
-         acc3 += x7 * c0;   
-         acc4 += x0 * c0;   
-         acc5 += x1 * c0;   
-         acc6 += x2 * c0;   
-         acc7 += x3 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x4 = *(px++);
-
-         /* Perform the multiply-accumulates */      
-         acc0 += x5 * c0;
-         acc1 += x6 * c0;   
-         acc2 += x7 * c0;   
-         acc3 += x0 * c0;   
-         acc4 += x1 * c0;   
-         acc5 += x2 * c0;   
-         acc6 += x3 * c0;   
-         acc7 += x4 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x5 = *(px++);
-
-         /* Perform the multiply-accumulates */      
-         acc0 += x6 * c0;
-         acc1 += x7 * c0;   
-         acc2 += x0 * c0;   
-         acc3 += x1 * c0;   
-         acc4 += x2 * c0;   
-         acc5 += x3 * c0;   
-         acc6 += x4 * c0;   
-         acc7 += x5 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x6 = *(px++);
-
-         /* Perform the multiply-accumulates */      
-         acc0 += x7 * c0;
-         acc1 += x0 * c0;   
-         acc2 += x1 * c0;   
-         acc3 += x2 * c0;   
-         acc4 += x3 * c0;   
-         acc5 += x4 * c0;   
-         acc6 += x5 * c0;   
-         acc7 += x6 * c0;   
-
-         tapCnt--;
-      }
-
-      /* If the filter length is not a multiple of 8, compute the remaining filter taps */
-      tapCnt = numTaps % 0x8u;
-
-      while(tapCnt > 0u)
-      {
-         /* Read coefficients */
-         c0 = *(pb++);
-
-         /* Fetch 1 state variable */
-         x7 = *(px++);
-
-         /* Perform the multiply-accumulates */      
-         acc0 += x0 * c0;
-         acc1 += x1 * c0;   
-         acc2 += x2 * c0;   
-         acc3 += x3 * c0;   
-         acc4 += x4 * c0;   
-         acc5 += x5 * c0;   
-         acc6 += x6 * c0;   
-         acc7 += x7 * c0;   
-
-         /* Reuse the present sample states for next sample */
-         x0 = x1;
-         x1 = x2;
-         x2 = x3;
-         x3 = x4;
-         x4 = x5;
-         x5 = x6;
-         x6 = x7;
-
-         /* Decrement the loop counter */
-         tapCnt--;
-      }
-
-      /* Advance the state pointer by 8 to process the next group of 8 samples */
-      pState = pState + 8;
-
-      /* The results in the 8 accumulators, store in the destination buffer. */
-      *pDst++ = acc0;
-      *pDst++ = acc1;
-      *pDst++ = acc2;
-      *pDst++ = acc3;
-      *pDst++ = acc4;
-      *pDst++ = acc5;
-      *pDst++ = acc6;
-      *pDst++ = acc7;
-
-      blkCnt--;
-   }
-
-   /* If the blockSize is not a multiple of 8, compute any remaining output samples here.  
-   ** No loop unrolling is used. */
-   blkCnt = blockSize % 0x8u;
-
-   while(blkCnt > 0u)
-   {
-      /* Copy one sample at a time into state buffer */
-      *pStateCurnt++ = *pSrc++;
-
-      /* Set the accumulator to zero */
-      acc0 = 0.0f;
-
-      /* Initialize state pointer */
-      px = pState;
-
-      /* Initialize Coefficient pointer */
-      pb = (pCoeffs);
-
-      i = numTaps;
-
-      /* Perform the multiply-accumulates */
-      do
-      {
-         acc0 += *px++ * *pb++;
-         i--;
-
-      } while(i > 0u);
-
-      /* The result is store in the destination buffer. */
-      *pDst++ = acc0;
-
-      /* Advance state pointer by 1 for the next sample */
-      pState = pState + 1;
-
-      blkCnt--;
-   }
-
-   /* Processing is complete.  
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.  
-   ** This prepares the state buffer for the next function call. */
-
-   /* Points to the start of the state buffer */
-   pStateCurnt = S->pState;
-
-   tapCnt = (numTaps - 1u) >> 2u;
-
-   /* copy data */
-   while(tapCnt > 0u)
-   {
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-   }
-
-   /* Calculate remaining number of copies */
-   tapCnt = (numTaps - 1u) % 0x4u;
-
-   /* Copy the remaining q31_t data */
-   while(tapCnt > 0u)
-   {
-      *pStateCurnt++ = *pState++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-   }
-}
-
-#elif defined(ARM_MATH_CM0_FAMILY)
-
-void arm_fir_f32(
-const arm_fir_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
-{
-   float32_t *pState = S->pState;                 /* State pointer */
-   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-   /* Run the below code for Cortex-M0 */
-
-   float32_t acc;
-
-   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-   /* pStateCurnt points to the location where the new input data should be written */
-   pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-   /* Initialize blkCnt with blockSize */
-   blkCnt = blockSize;
-
-   while(blkCnt > 0u)
-   {
-      /* Copy one sample at a time into state buffer */
-      *pStateCurnt++ = *pSrc++;
-
-      /* Set the accumulator to zero */
-      acc = 0.0f;
-
-      /* Initialize state pointer */
-      px = pState;
-
-      /* Initialize Coefficient pointer */
-      pb = pCoeffs;
-
-      i = numTaps;
-
-      /* Perform the multiply-accumulates */
-      do
-      {
-         /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-         acc += *px++ * *pb++;
-         i--;
-
-      } while(i > 0u);
-
-      /* The result is store in the destination buffer. */
-      *pDst++ = acc;
-
-      /* Advance state pointer by 1 for the next sample */
-      pState = pState + 1;
-
-      blkCnt--;
-   }
-
-   /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the starting of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-   /* Points to the start of the state buffer */
-   pStateCurnt = S->pState;
-
-   /* Copy numTaps number of values */
-   tapCnt = numTaps - 1u;
-
-   /* Copy data */
-   while(tapCnt > 0u)
-   {
-      *pStateCurnt++ = *pState++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-   }
-
-}
-
-#else
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_fir_f32(
-const arm_fir_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
-{
-   float32_t *pState = S->pState;                 /* State pointer */
-   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-   float32_t acc0, acc1, acc2, acc3, acc4, acc5, acc6, acc7;     /* Accumulators */
-   float32_t x0, x1, x2, x3, x4, x5, x6, x7, c0;  /* Temporary variables to hold state and coefficient values */
-   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-   float32_t p0,p1,p2,p3,p4,p5,p6,p7;             /* Temporary product values */
-
-   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-   /* pStateCurnt points to the location where the new input data should be written */
-   pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-   /* Apply loop unrolling and compute 8 output values simultaneously.  
-    * The variables acc0 ... acc7 hold output values that are being computed:  
-    *  
-    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]  
-    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]  
-    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]  
-    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]  
-    */
-   blkCnt = blockSize >> 3;
-
-   /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.  
-   ** a second loop below computes the remaining 1 to 7 samples. */
-   while(blkCnt > 0u)
-   {
-      /* Copy four new input samples into the state buffer */
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-
-      /* Set all accumulators to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-      acc4 = 0.0f;
-      acc5 = 0.0f;
-      acc6 = 0.0f;
-      acc7 = 0.0f;		
-
-      /* Initialize state pointer */
-      px = pState;
-
-      /* Initialize coeff pointer */
-      pb = (pCoeffs);		
-   
-      /* This is separated from the others to avoid 
-       * a call to __aeabi_memmove which would be slower
-       */
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-
-      /* Read the first seven samples from the state buffer:  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-      x0 = *px++;
-      x1 = *px++;
-      x2 = *px++;
-      x3 = *px++;
-      x4 = *px++;
-      x5 = *px++;
-      x6 = *px++;
-
-      /* Loop unrolling.  Process 8 taps at a time. */
-      tapCnt = numTaps >> 3u;
-      
-      /* Loop over the number of taps.  Unroll by a factor of 8.  
-       ** Repeat until we've computed numTaps-8 coefficients. */
-      while(tapCnt > 0u)
-      {
-         /* Read the b[numTaps-1] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-3] sample */
-         x7 = *(px++);
-
-         /* acc0 +=  b[numTaps-1] * x[n-numTaps] */
-         p0 = x0 * c0;
-
-         /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */
-         p1 = x1 * c0;
-
-         /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */
-         p2 = x2 * c0;
-
-         /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */
-         p3 = x3 * c0;
-
-         /* acc4 +=  b[numTaps-1] * x[n-numTaps-4] */
-         p4 = x4 * c0;
-
-         /* acc1 +=  b[numTaps-1] * x[n-numTaps-5] */
-         p5 = x5 * c0;
-
-         /* acc2 +=  b[numTaps-1] * x[n-numTaps-6] */
-         p6 = x6 * c0;
-
-         /* acc3 +=  b[numTaps-1] * x[n-numTaps-7] */
-         p7 = x7 * c0;
-         
-         /* Read the b[numTaps-2] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-4] sample */
-         x0 = *(px++);
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-
-         /* Perform the multiply-accumulate */
-         p0 = x1 * c0;
-         p1 = x2 * c0;   
-         p2 = x3 * c0;   
-         p3 = x4 * c0;   
-         p4 = x5 * c0;   
-         p5 = x6 * c0;   
-         p6 = x7 * c0;   
-         p7 = x0 * c0;   
-         
-         /* Read the b[numTaps-3] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-5] sample */
-         x1 = *(px++);
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */      
-         p0 = x2 * c0;
-         p1 = x3 * c0;   
-         p2 = x4 * c0;   
-         p3 = x5 * c0;   
-         p4 = x6 * c0;   
-         p5 = x7 * c0;   
-         p6 = x0 * c0;   
-         p7 = x1 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x2 = *(px++);
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */      
-         p0 = x3 * c0;
-         p1 = x4 * c0;   
-         p2 = x5 * c0;   
-         p3 = x6 * c0;   
-         p4 = x7 * c0;   
-         p5 = x0 * c0;   
-         p6 = x1 * c0;   
-         p7 = x2 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x3 = *(px++);
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */      
-         p0 = x4 * c0;
-         p1 = x5 * c0;   
-         p2 = x6 * c0;   
-         p3 = x7 * c0;   
-         p4 = x0 * c0;   
-         p5 = x1 * c0;   
-         p6 = x2 * c0;   
-         p7 = x3 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x4 = *(px++);
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */      
-         p0 = x5 * c0;
-         p1 = x6 * c0;   
-         p2 = x7 * c0;   
-         p3 = x0 * c0;   
-         p4 = x1 * c0;   
-         p5 = x2 * c0;   
-         p6 = x3 * c0;   
-         p7 = x4 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x5 = *(px++);
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */      
-         p0 = x6 * c0;
-         p1 = x7 * c0;   
-         p2 = x0 * c0;   
-         p3 = x1 * c0;   
-         p4 = x2 * c0;   
-         p5 = x3 * c0;   
-         p6 = x4 * c0;   
-         p7 = x5 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x6 = *(px++);
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */      
-         p0 = x7 * c0;
-         p1 = x0 * c0;   
-         p2 = x1 * c0;   
-         p3 = x2 * c0;   
-         p4 = x3 * c0;   
-         p5 = x4 * c0;   
-         p6 = x5 * c0;   
-         p7 = x6 * c0;   
-
-         tapCnt--;
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-      }
-
-      /* If the filter length is not a multiple of 8, compute the remaining filter taps */
-      tapCnt = numTaps % 0x8u;
-
-      while(tapCnt > 0u)
-      {
-         /* Read coefficients */
-         c0 = *(pb++);
-
-         /* Fetch 1 state variable */
-         x7 = *(px++);
-
-         /* Perform the multiply-accumulates */      
-         p0 = x0 * c0;
-         p1 = x1 * c0;   
-         p2 = x2 * c0;   
-         p3 = x3 * c0;   
-         p4 = x4 * c0;   
-         p5 = x5 * c0;   
-         p6 = x6 * c0;   
-         p7 = x7 * c0;   
-
-         /* Reuse the present sample states for next sample */
-         x0 = x1;
-         x1 = x2;
-         x2 = x3;
-         x3 = x4;
-         x4 = x5;
-         x5 = x6;
-         x6 = x7;
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Decrement the loop counter */
-         tapCnt--;
-      }
-
-      /* Advance the state pointer by 8 to process the next group of 8 samples */
-      pState = pState + 8;
-
-      /* The results in the 8 accumulators, store in the destination buffer. */
-      *pDst++ = acc0;
-      *pDst++ = acc1;
-      *pDst++ = acc2;
-      *pDst++ = acc3;
-      *pDst++ = acc4;
-      *pDst++ = acc5;
-      *pDst++ = acc6;
-      *pDst++ = acc7;
-
-      blkCnt--;
-   }
-
-   /* If the blockSize is not a multiple of 8, compute any remaining output samples here.  
-   ** No loop unrolling is used. */
-   blkCnt = blockSize % 0x8u;
-
-   while(blkCnt > 0u)
-   {
-      /* Copy one sample at a time into state buffer */
-      *pStateCurnt++ = *pSrc++;
-
-      /* Set the accumulator to zero */
-      acc0 = 0.0f;
-
-      /* Initialize state pointer */
-      px = pState;
-
-      /* Initialize Coefficient pointer */
-      pb = (pCoeffs);
-
-      i = numTaps;
-
-      /* Perform the multiply-accumulates */
-      do
-      {
-         acc0 += *px++ * *pb++;
-         i--;
-
-      } while(i > 0u);
-
-      /* The result is store in the destination buffer. */
-      *pDst++ = acc0;
-
-      /* Advance state pointer by 1 for the next sample */
-      pState = pState + 1;
-
-      blkCnt--;
-   }
-
-   /* Processing is complete.  
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.  
-   ** This prepares the state buffer for the next function call. */
-
-   /* Points to the start of the state buffer */
-   pStateCurnt = S->pState;
-
-   tapCnt = (numTaps - 1u) >> 2u;
-
-   /* copy data */
-   while(tapCnt > 0u)
-   {
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-   }
-
-   /* Calculate remaining number of copies */
-   tapCnt = (numTaps - 1u) % 0x4u;
-
-   /* Copy the remaining q31_t data */
-   while(tapCnt > 0u)
-   {
-      *pStateCurnt++ = *pState++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-   }
-}
-
-#endif 
-
-/**  
-* @} end of FIR group  
-*/
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c
deleted file mode 100755
index 72b50635..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c
+++ /dev/null
@@ -1,345 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_fast_q15.c    
-*    
-* Description:  Q15 Fast FIR filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @param[in] *S points to an instance of the Q15 FIR filter structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in] blockSize number of samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * This fast version uses a 32-bit accumulator with 2.30 format.    
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around and distorts the result.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.    
- * The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.    
- *    
- * \par    
- * Refer to the function arm_fir_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.  Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_fir_init_q15() to initialize the filter structure.    
- */
-
-void arm_fir_fast_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q15_t *px;                                     /* Temporary q31 pointer for SIMD state buffer accesses */
-  q31_t x0, x1, x2, c0;                          /* Temporary variables to hold SIMD state and coefficient values */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.      
-   * The variables acc0 ... acc3 hold output values that are being computed:      
-   *      
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]      
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]      
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]      
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]      
-   */
-
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.      
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer.      
-     ** Use 32-bit SIMD to move the 16-bit data.  Only requires two copies. */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */
-    px = pState;
-
-    /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */
-    pb = pCoeffs;
-
-    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
-    x0 = *__SIMD32(px)++;
-
-    /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
-    x2 = *__SIMD32(px)++;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.      
-     ** Repeat until we've computed numTaps-(numTaps%4) coefficients. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0)
-    {
-      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      acc0 = __SMLAD(x0, c0, acc0);
-
-      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
-      acc2 = __SMLAD(x2, c0, acc2);
-
-      /* pack  x[n-N-1] and x[n-N-2] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* Read state x[n-N-4], x[n-N-5] */
-      x0 = _SIMD32_OFFSET(px);
-
-      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
-      acc1 = __SMLADX(x1, c0, acc1);
-
-      /* pack  x[n-N-3] and x[n-N-4] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x0, x2, 0);
-#else
-      x1 = __PKHBT(x2, x0, 0);
-#endif
-
-      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
-      acc3 = __SMLADX(x1, c0, acc3);
-
-      /* Read coefficients b[N-2], b[N-3] */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
-      acc0 = __SMLAD(x2, c0, acc0);
-
-      /* Read state x[n-N-6], x[n-N-7] with offset */
-      x2 = _SIMD32_OFFSET(px + 2u);
-
-      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
-      acc2 = __SMLAD(x0, c0, acc2);
-
-      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
-      acc1 = __SMLADX(x1, c0, acc1);
-
-      /* pack  x[n-N-5] and x[n-N-6] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
-      acc3 = __SMLADX(x1, c0, acc3);
-
-      /* Update state pointer for next state reading */
-      px += 4u;
-
-      /* Decrement tap count */
-      tapCnt--;
-
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps.       
-     ** This is always be 2 taps since the filter length is even. */
-    if((numTaps & 0x3u) != 0u)
-    {
-
-      /* Read last two coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Perform the multiply-accumulates */
-      acc0 = __SMLAD(x0, c0, acc0);
-      acc2 = __SMLAD(x2, c0, acc2);
-
-      /* pack state variables */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* Read last state variables */
-      x0 = *__SIMD32(px);
-
-      /* Perform the multiply-accumulates */
-      acc1 = __SMLADX(x1, c0, acc1);
-
-      /* pack state variables */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x0, x2, 0);
-#else
-      x1 = __PKHBT(x2, x0, 0);
-#endif
-
-      /* Perform the multiply-accumulates */
-      acc3 = __SMLADX(x1, c0, acc3);
-    }
-
-    /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the 4 outputs in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.      
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-  while(blkCnt > 0u)
-  {
-    /* Copy two samples into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Use SIMD to hold states and coefficients */
-    px = pState;
-    pb = pCoeffs;
-
-    tapCnt = numTaps >> 1u;
-
-    do
-    {
-
-      acc0 += (q31_t) * px++ * *pb++;
-	  acc0 += (q31_t) * px++ * *pb++;
-
-      tapCnt--;
-    }
-    while(tapCnt > 0u);
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.      
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.      
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.      
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1u) >> 2;
-
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* copy remaining data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c
deleted file mode 100755
index 13073c43..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c
+++ /dev/null
@@ -1,305 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_fast_q31.c    
-*    
-* Description:	Processing function for the Q31 Fast FIR filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @param[in] *S points to an instance of the Q31 structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block output data.    
- * @param[in] blockSize number of samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.    
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.    
- * These intermediate results are added to a 2.30 accumulator.    
- * Finally, the accumulator is saturated and converted to a 1.31 result.    
- * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.    
- *    
- * \par    
- * Refer to the function arm_fir_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.  Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_fir_init_q31() to initialize the filter structure.    
- */
-
-IAR_ONLY_LOW_OPTIMIZATION_ENTER
-void arm_fir_fast_q31(
-  const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t x0, x1, x2, x3;                          /* Temporary variables to hold state */
-  q31_t c0;                                      /* Temporary variable to hold coefficient value */
-  q31_t *px;                                     /* Temporary pointer for state */
-  q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.    
-   * The variables acc0 ... acc3 hold output values that are being computed:    
-   *    
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]    
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]    
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]    
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]    
-   */
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Read the first three samples from the state buffer:    
-     *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-    x0 = *(px++);
-    x1 = *(px++);
-    x2 = *(px++);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-    i = tapCnt;
-
-    while(i > 0u)
-    {
-      /* Read the b[numTaps] coefficient */
-      c0 = *pb;
-
-      /* Read x[n-numTaps-3] sample */
-      x3 = *px;
-
-      /* acc0 +=  b[numTaps] * x[n-numTaps] */
-      multAcc_32x32_keep32_R(acc0, x0, c0);
-
-      /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
-      multAcc_32x32_keep32_R(acc1, x1, c0);
-
-      /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
-      multAcc_32x32_keep32_R(acc2, x2, c0);
-
-      /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
-      multAcc_32x32_keep32_R(acc3, x3, c0);
-
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb + 1u);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px + 1u);
-
-      /* Perform the multiply-accumulates */      
-      multAcc_32x32_keep32_R(acc0, x1, c0);
-      multAcc_32x32_keep32_R(acc1, x2, c0);
-      multAcc_32x32_keep32_R(acc2, x3, c0);
-      multAcc_32x32_keep32_R(acc3, x0, c0);
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb + 2u);
-
-      /* Read x[n-numTaps-5] sample */
-      x1 = *(px + 2u);
-
-      /* Perform the multiply-accumulates */      
-      multAcc_32x32_keep32_R(acc0, x2, c0);
-      multAcc_32x32_keep32_R(acc1, x3, c0);
-      multAcc_32x32_keep32_R(acc2, x0, c0);
-      multAcc_32x32_keep32_R(acc3, x1, c0);
-
-      /* Read the b[numTaps-3] coefficients */
-      c0 = *(pb + 3u);
-
-      /* Read x[n-numTaps-6] sample */
-      x2 = *(px + 3u);
-
-      /* Perform the multiply-accumulates */      
-      multAcc_32x32_keep32_R(acc0, x3, c0);
-      multAcc_32x32_keep32_R(acc1, x0, c0);
-      multAcc_32x32_keep32_R(acc2, x1, c0);
-      multAcc_32x32_keep32_R(acc3, x2, c0);
-
-      /* update coefficient pointer */
-      pb += 4u;
-      px += 4u;
-      
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-
-    i = numTaps - (tapCnt * 4u);
-    while(i > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x3 = *(px++);
-
-      /* Perform the multiply-accumulates */      
-      multAcc_32x32_keep32_R(acc0, x0, c0);
-      multAcc_32x32_keep32_R(acc1, x1, c0);
-      multAcc_32x32_keep32_R(acc2, x2, c0);
-      multAcc_32x32_keep32_R(acc3, x3, c0);
-
-      /* Reuse the present sample states for next sample */
-      x0 = x1;
-      x1 = x2;
-      x2 = x3;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4;
-
-    /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.31    
-     ** Then store the 4 outputs in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 << 1);
-    *pDst++ = (q31_t) (acc1 << 1);
-    *pDst++ = (q31_t) (acc2 << 1);
-    *pDst++ = (q31_t) (acc3 << 1);
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = (pCoeffs);
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      multAcc_32x32_keep32_R(acc0, (*px++), (*(pb++)));
-      i--;
-    } while(i > 0u);
-
-    /* The result is in 2.30 format.  Convert to 1.31    
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 << 1);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.    
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-
-}
-IAR_ONLY_LOW_OPTIMIZATION_EXIT
-/**    
- * @} end of FIR group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c
deleted file mode 100755
index 34cf7ea0..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_init_f32.c    
-*    
-* Description:  Floating-point FIR filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in,out] *S points to an instance of the floating-point FIR filter structure.    
- * @param[in] 	  numTaps  Number of filter coefficients in the filter.    
- * @param[in]     *pCoeffs points to the filter coefficients buffer.    
- * @param[in]     *pState points to the state buffer.    
- * @param[in] 	  blockSize number of samples that are processed per call.    
- * @return 		  none.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_f32().    
- */
-
-void arm_fir_init_f32(
-  arm_fir_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and the size of state buffer is (blockSize + numTaps - 1) */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c
deleted file mode 100755
index 7eaab235..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c
+++ /dev/null
@@ -1,154 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_init_q15.c    
-*    
-* Description:  Q15 FIR filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @param[in,out]  *S points to an instance of the Q15 FIR filter structure.    
- * @param[in] 	   numTaps  Number of filter coefficients in the filter. Must be even and greater than or equal to 4.    
- * @param[in]      *pCoeffs points to the filter coefficients buffer.    
- * @param[in]      *pState points to the state buffer.    
- * @param[in]      blockSize is number of samples processed per call.    
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if    
- * numTaps is not greater than or equal to 4 and even.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * Note that numTaps must be even and greater than or equal to 4.    
- * To implement an odd length filter simply increase numTaps by 1 and set the last coefficient to zero.    
- * For example, to implement a filter with numTaps=3 and coefficients    
- * 
    
- *     {0.3, -0.8, 0.3}    
- * 
    
- * set numTaps=4 and use the coefficients:    
- * 
    
- *     {0.3, -0.8, 0.3, 0}.    
- * 
    
- * Similarly, to implement a two point filter    
- * 
    
- *     {0.3, -0.3}    
- * 
    
- * set numTaps=4 and use the coefficients:    
- * 
    
- *     {0.3, -0.3, 0, 0}.    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize, when running on Cortex-M4 and Cortex-M3  and is of length numTaps+blockSize-1, when running on Cortex-M0 where blockSize is the number of input samples processed by each call to arm_fir_q15().    
- */
-
-arm_status arm_fir_init_q15(
-  arm_fir_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* The Number of filter coefficients in the filter must be even and at least 4 */
-  if(numTaps & 0x1u)
-  {
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Assign filter taps */
-    S->numTaps = numTaps;
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Clear the state buffer.  The size is always (blockSize + numTaps ) */
-    memset(pState, 0, (numTaps + (blockSize)) * sizeof(q15_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  status = ARM_MATH_SUCCESS;
-
-  return (status);
-
-#endif /*  #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c
deleted file mode 100755
index c2092e02..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_init_q31.c    
-*    
-* Description:	Q31 FIR filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in,out] *S points to an instance of the Q31 FIR filter structure.    
- * @param[in] 	  numTaps  Number of filter coefficients in the filter.    
- * @param[in] 	  *pCoeffs points to the filter coefficients buffer.    
- * @param[in] 	  *pState points to the state buffer.    
- * @param[in] 	  blockSize number of samples that are processed per call.    
- * @return        none.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q31().    
- */
-
-void arm_fir_init_q31(
-  arm_fir_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and state array size is (blockSize + numTaps - 1) */
-  memset(pState, 0, (blockSize + ((uint32_t) numTaps - 1u)) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c
deleted file mode 100755
index ccbc7d73..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_init_q7.c    
-*    
-* Description:  Q7 FIR filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-/**    
- * @param[in,out] *S points to an instance of the Q7 FIR filter structure.    
- * @param[in] 	  numTaps  Number of filter coefficients in the filter.    
- * @param[in] 	  *pCoeffs points to the filter coefficients buffer.    
- * @param[in]     *pState points to the state buffer.    
- * @param[in]     blockSize number of samples that are processed per call.    
- * @return     	  none    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q7().    
- */
-
-void arm_fir_init_q7(
-  arm_fir_instance_q7 * S,
-  uint16_t numTaps,
-  q7_t * pCoeffs,
-  q7_t * pState,
-  uint32_t blockSize)
-{
-
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q7_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c
deleted file mode 100755
index 5ad249e3..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c
+++ /dev/null
@@ -1,581 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_interpolate_f32.c    
-*    
-* Description:	FIR interpolation for floating-point sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @defgroup FIR_Interpolate Finite Impulse Response (FIR) Interpolator    
- *    
- * These functions combine an upsampler (zero stuffer) and an FIR filter.    
- * They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images.    
- * Conceptually, the functions are equivalent to the block diagram below:    
- * \image html FIRInterpolator.gif "Components included in the FIR Interpolator functions"    
- * After upsampling by a factor of L, the signal should be filtered by a lowpass filter with a normalized    
- * cutoff frequency of 1/L in order to eliminate high frequency copies of the spectrum.    
- * The user of the function is responsible for providing the filter coefficients.    
- *    
- * The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner.    
- * The upsampler inserts L-1 zeros between each sample.    
- * Instead of multiplying by these zero values, the FIR filter is designed to skip them.    
- * This leads to an efficient implementation without any wasted effort.    
- * The functions operate on blocks of input and output data.    
- * pSrc points to an array of blockSize input values and    
- * pDst points to an array of blockSize*L output values.    
- *    
- * The library provides separate functions for Q15, Q31, and floating-point data types.    
- *    
- * \par Algorithm:    
- * The functions use a polyphase filter structure:    
- * 
    
- *    y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]    
- *    y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]    
- *    ...    
- *    y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]    
- * 
    
- * This approach is more efficient than straightforward upsample-then-filter algorithms.    
- * With this method the computation is reduced by a factor of 1/L when compared to using a standard FIR filter.    
- * \par    
- * pCoeffs points to a coefficient array of size numTaps.    
- * numTaps must be a multiple of the interpolation factor L and this is checked by the    
- * initialization functions.    
- * Internally, the function divides the FIR filter's impulse response into shorter filters of length    
- * phaseLength=numTaps/L.    
- * Coefficients are stored in time reversed order.    
- * \par    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to a state array of size blockSize + phaseLength - 1.    
- * Samples in the state buffer are stored in the order:    
- * \par    
- * 
    
- *    {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}    
- * 
    
- * The state variables are updated after each block of data is processed, the coefficients are untouched.    
- *    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable array should be allocated separately.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * - Checks to make sure that the length of the filter is a multiple of the interpolation factor.    
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * L (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set all of the values in pState to zero. 
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * The code below statically initializes each of the 3 different data type filter instance structures    
- * 
    
- * arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};    
- * arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};    
- * arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};    
- * 
    
- * where L is the interpolation factor; phaseLength=numTaps/L is the    
- * length of each of the shorter FIR filters used internally,    
- * pCoeffs is the address of the coefficient buffer;    
- * pState is the address of the state buffer.    
- * Be sure to set the values in the state buffer to zeros when doing static initialization.    
- *    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the FIR interpolate filter functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the floating-point FIR interpolator.    
- * @param[in] *S        points to an instance of the floating-point FIR interpolator structure.    
- * @param[in] *pSrc     points to the block of input data.    
- * @param[out] *pDst    points to the block of output data.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none.    
- */
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_fir_interpolate_f32(
-  const arm_fir_interpolate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *ptr1, *ptr2;                        /* Temporary pointers for state and coefficient buffers */
-  float32_t sum0;                                /* Accumulators */
-  float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, j;                         /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
-  float32_t acc0, acc1, acc2, acc3;
-  float32_t x1, x2, x3;
-  uint32_t blkCntN4;
-  float32_t c1, c2, c3;
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (phaseLen - 1u);
-
-  /* Initialise  blkCnt */
-  blkCnt = blockSize / 4;
-  blkCntN4 = blockSize - (4 * blkCnt);
-
-  /* Samples loop unrolled by 4 */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = (S->L);
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2u;
-
-      x0 = *(ptr1++);
-      x1 = *(ptr1++);
-      x2 = *(ptr1++);
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x3 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x0 * c0;
-        acc1 += x1 * c0;
-        acc2 += x2 * c0;
-        acc3 += x3 * c0;
-
-        /* Read the coefficient */
-        c1 = *(ptr2 + S->L);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x1 * c1;
-        acc1 += x2 * c1;
-        acc2 += x3 * c1;
-        acc3 += x0 * c1;
-
-        /* Read the coefficient */
-        c2 = *(ptr2 + S->L * 2);
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x2 * c2;
-        acc1 += x3 * c2;
-        acc2 += x0 * c2;
-        acc3 += x1 * c2;
-
-        /* Read the coefficient */
-        c3 = *(ptr2 + S->L * 3);
-
-        /* Read the input sample */
-        x2 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x3 * c3;
-        acc1 += x0 * c3;
-        acc2 += x1 * c3;
-        acc3 += x2 * c3;
-
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += 4 * S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x3 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x0 * c0;
-        acc1 += x1 * c0;
-        acc2 += x2 * c0;
-        acc3 += x3 * c0;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* update states for next sample processing */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst = acc0;
-      *(pDst + S->L) = acc1;
-      *(pDst + 2 * S->L) = acc2;
-      *(pDst + 3 * S->L) = acc3;
-
-      pDst++;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 4;
-
-    pDst += S->L * 3;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-
-  while(blkCntN4 > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum0 = 0.0f;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2u;
-      while(tapCnt > 0u)
-      {
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += x0 * c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += x0 * c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += x0 * c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += x0 * c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4u;
-
-      while(tapCnt > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum0 += *(ptr1++) * (*ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = sum0;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCntN4--;
-  }
-
-  /* Processing is complete.        
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.        
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (phaseLen - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  tapCnt = (phaseLen - 1u) % 0x04u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-}
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-void arm_fir_interpolate_f32(
-  const arm_fir_interpolate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *ptr1, *ptr2;                        /* Temporary pointers for state and coefficient buffers */
-
-
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i, blkCnt;                            /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
-
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (phaseLen - 1u);
-
-  /* Total number of intput samples */
-  blkCnt = blockSize;
-
-  /* Loop over the blockSize. */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum = 0.0f;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (i - 1u);
-
-      /* Loop over the polyPhase length */
-      tapCnt = phaseLen;
-
-      while(tapCnt > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *ptr1++ * *ptr2;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = sum;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1           
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = phaseLen - 1u;
-
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
deleted file mode 100755
index 085cb578..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_interpolate_init_f32.c    
-*    
-* Description:  Floating-point FIR interpolator initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the floating-point FIR interpolator.    
- * @param[in,out] *S        points to an instance of the floating-point FIR interpolator structure.    
- * @param[in]     L         upsample factor.    
- * @param[in]     numTaps   number of filter coefficients in the filter.    
- * @param[in]     *pCoeffs  points to the filter coefficient buffer.    
- * @param[in]     *pState   points to the state buffer.    
- * @param[in]     blockSize number of input samples to process per call.    
- * @return        The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * the filter length numTaps is not a multiple of the interpolation factor L.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}    
- * 
    
- * The length of the filter numTaps must be a multiple of the interpolation factor L.    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length (numTaps/L)+blockSize-1 words    
- * where blockSize is the number of input samples processed by each call to arm_fir_interpolate_f32().    
- */
-
-arm_status arm_fir_interpolate_init_f32(
-  arm_fir_interpolate_instance_f32 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The filter length must be a multiple of the interpolation factor */
-  if((numTaps % L) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Assign Interpolation factor */
-    S->L = L;
-
-    /* Assign polyPhaseLength */
-    S->phaseLength = numTaps / L;
-
-    /* Clear state buffer and size of state array is always phaseLength + blockSize - 1 */
-    memset(pState, 0,
-           (blockSize +
-            ((uint32_t) S->phaseLength - 1u)) * sizeof(float32_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
deleted file mode 100755
index 99895226..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_interpolate_init_q15.c    
-*    
-* Description:  Q15 FIR interpolator initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the Q15 FIR interpolator.    
- * @param[in,out] *S        points to an instance of the Q15 FIR interpolator structure.    
- * @param[in]     L         upsample factor.    
- * @param[in]     numTaps   number of filter coefficients in the filter.    
- * @param[in]     *pCoeffs  points to the filter coefficient buffer.    
- * @param[in]     *pState   points to the state buffer.    
- * @param[in]     blockSize number of input samples to process per call.    
- * @return        The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * the filter length numTaps is not a multiple of the interpolation factor L.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}    
- * 
    
- * The length of the filter numTaps must be a multiple of the interpolation factor L.    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length (numTaps/L)+blockSize-1 words    
- * where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q15().    
- */
-
-arm_status arm_fir_interpolate_init_q15(
-  arm_fir_interpolate_instance_q15 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The filter length must be a multiple of the interpolation factor */
-  if((numTaps % L) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Assign Interpolation factor */
-    S->L = L;
-
-    /* Assign polyPhaseLength */
-    S->phaseLength = numTaps / L;
-
-    /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
-    memset(pState, 0,
-           (blockSize + ((uint32_t) S->phaseLength - 1u)) * sizeof(q15_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
deleted file mode 100755
index 1887524d..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_interpolate_init_q31.c    
-*    
-* Description:  Q31 FIR interpolator initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-
-/**    
- * @brief  Initialization function for the Q31 FIR interpolator.    
- * @param[in,out] *S        points to an instance of the Q31 FIR interpolator structure.    
- * @param[in]     L         upsample factor.    
- * @param[in]     numTaps   number of filter coefficients in the filter.    
- * @param[in]     *pCoeffs  points to the filter coefficient buffer.    
- * @param[in]     *pState   points to the state buffer.    
- * @param[in]     blockSize number of input samples to process per call.    
- * @return        The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * the filter length numTaps is not a multiple of the interpolation factor L.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}    
- * 
    
- * The length of the filter numTaps must be a multiple of the interpolation factor L.    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length (numTaps/L)+blockSize-1 words    
- * where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q31().    
- */
-
-arm_status arm_fir_interpolate_init_q31(
-  arm_fir_interpolate_instance_q31 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The filter length must be a multiple of the interpolation factor */
-  if((numTaps % L) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Assign Interpolation factor */
-    S->L = L;
-
-    /* Assign polyPhaseLength */
-    S->phaseLength = numTaps / L;
-
-    /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
-    memset(pState, 0,
-           (blockSize + ((uint32_t) S->phaseLength - 1u)) * sizeof(q31_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c
deleted file mode 100755
index 34c085ae..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c
+++ /dev/null
@@ -1,508 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fir_interpolate_q15.c    
-*    
-* Description:	Q15 FIR interpolation.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 FIR interpolator.    
- * @param[in] *S        points to an instance of the Q15 FIR interpolator structure.    
- * @param[in] *pSrc     points to the block of input data.    
- * @param[out] *pDst    points to the block of output data.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.    
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.    
- */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_fir_interpolate_q15(
-  const arm_fir_interpolate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer                                            */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer                                      */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state                */
-  q15_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers     */
-  q63_t sum0;                                    /* Accumulators                                             */
-  q15_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, j, tapCnt;                 /* Loop counters                                            */
-  uint16_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
-  uint32_t blkCntN2;
-  q63_t acc0, acc1;
-  q15_t x1;
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
-
-  /* Initialise  blkCnt */
-  blkCnt = blockSize / 2;
-  blkCntN2 = blockSize - (2 * blkCnt);
-
-  /* Samples loop unrolled by 2 */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = (S->L);
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      acc0 = 0;
-      acc1 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2u;
-
-      x0 = *(ptr1++);
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 *c0;
-        acc1 += (q63_t) x0 *c0;
-
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L * 2);
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L * 3);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 *c0;
-        acc1 += (q63_t) x0 *c0;
-
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += 4 * S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* update states for next sample processing */
-        x0 = x1;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst = (q15_t) (__SSAT((acc0 >> 15), 16));
-      *(pDst + S->L) = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-      pDst++;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 2;
-
-    pDst += S->L;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 2, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blkCntN2;
-
-  /* Loop over the blockSize. */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum0 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2;
-      while(tapCnt > 0u)
-      {
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen & 0x3u;
-
-      while(tapCnt > 0u)
-      {
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-  /* Processing is complete.    
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = ((uint32_t) phaseLen - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-#else
-
-    *pStateCurnt++ = *pState++;
-	*pStateCurnt++ = *pState++;
-	*pStateCurnt++ = *pState++;
-	*pStateCurnt++ = *pState++;
-	
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-	
-	/* Decrement the loop counter */
-    i--;
-  }
-
-  i = ((uint32_t) phaseLen - 1u) % 0x04u;
-
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-void arm_fir_interpolate_q15(
-  const arm_fir_interpolate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer                                            */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer                                      */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state                */
-  q15_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers     */
-  q63_t sum;                                     /* Accumulator */
-  q15_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, tapCnt;                    /* Loop counters                                            */
-  uint16_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
-
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (phaseLen - 1u);
-
-  /* Total number of intput samples */
-  blkCnt = blockSize;
-
-  /* Loop over the blockSize. */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (i - 1u);
-
-      /* Loop over the polyPhase length */
-      tapCnt = (uint32_t) phaseLen;
-
-      while(tapCnt > 0u)
-      {
-        /* Read the coefficient */
-        c0 = *ptr2;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *ptr1++;
-
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) x0 * c0);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Store the result after converting to 1.15 format in the destination buffer */
-      *pDst++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1           
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (uint32_t) phaseLen - 1u;
-
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-}
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c
deleted file mode 100755
index a4e91b06..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c
+++ /dev/null
@@ -1,504 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fir_interpolate_q31.c    
-*    
-* Description:	Q31 FIR interpolation.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 FIR interpolator.    
- * @param[in] *S        points to an instance of the Q31 FIR interpolator structure.    
- * @param[in] *pSrc     points to the block of input data.    
- * @param[out] *pDst    points to the block of output data.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by 1/(numTaps/L).    
- * since numTaps/L additions occur per output sample.    
- * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.    
- */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_fir_interpolate_q31(
-  const arm_fir_interpolate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers */
-  q63_t sum0;                                    /* Accumulators */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, j;                         /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
-
-  uint32_t blkCntN2;
-  q63_t acc0, acc1;
-  q31_t x1;
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
-
-  /* Initialise  blkCnt */
-  blkCnt = blockSize / 2;
-  blkCntN2 = blockSize - (2 * blkCnt);
-
-  /* Samples loop unrolled by 2 */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = (S->L);
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      acc0 = 0;
-      acc1 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2u;
-
-      x0 = *(ptr1++);
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 *c0;
-        acc1 += (q63_t) x0 *c0;
-
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L * 2);
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L * 3);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 *c0;
-        acc1 += (q63_t) x0 *c0;
-
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += 4 * S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* update states for next sample processing */
-        x0 = x1;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst = (q31_t) (acc0 >> 31);
-      *(pDst + S->L) = (q31_t) (acc1 >> 31);
-
-
-      pDst++;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 2;
-
-    pDst += S->L;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 2, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blkCntN2;
-
-  /* Loop over the blockSize. */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum0 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2;
-      while(tapCnt > 0u)
-      {
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen & 0x3u;
-
-      while(tapCnt > 0u)
-      {
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = (q31_t) (sum0 >> 31);
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.        
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.        
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (phaseLen - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  tapCnt = (phaseLen - 1u) % 0x04u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-
-#else
-
-void arm_fir_interpolate_q31(
-  const arm_fir_interpolate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers */
-
-  /* Run the below code for Cortex-M0 */
-
-  q63_t sum;                                     /* Accumulator */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt;                            /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
-
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
-
-  /* Total number of intput samples */
-  blkCnt = blockSize;
-
-  /* Loop over the blockSize. */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (i - 1u);
-
-      tapCnt = phaseLen;
-
-      while(tapCnt > 0u)
-      {
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *ptr1++;
-
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = (q31_t) (sum >> 31);
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1           
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = phaseLen - 1u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c
deleted file mode 100755
index 4be468c7..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c
+++ /dev/null
@@ -1,506 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_lattice_f32.c    
-*    
-* Description:	Processing function for the floating-point FIR Lattice filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup FIR_Lattice Finite Impulse Response (FIR) Lattice Filters    
- *    
- * This set of functions implements Finite Impulse Response (FIR) lattice filters    
- * for Q15, Q31 and floating-point data types.  Lattice filters are used in a     
- * variety of adaptive filter applications.  The filter structure is feedforward and    
- * the net impulse response is finite length.    
- * The functions operate on blocks    
- * of input and output data and each call to the function processes    
- * blockSize samples through the filter.  pSrc and    
- * pDst point to input and output arrays containing blockSize values.    
- *    
- * \par Algorithm:    
- * \image html FIRLattice.gif "Finite Impulse Response Lattice filter"    
- * The following difference equation is implemented:    
- * 
    
- *    f0[n] = g0[n] = x[n]    
- *    fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M    
- *    gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M    
- *    y[n] = fM[n]    
- * 
    
- * \par    
- * pCoeffs points to tha array of reflection coefficients of size numStages.    
- * Reflection Coefficients are stored in the following order.    
- * \par    
- * 
    
- *    {k1, k2, ..., kM}    
- * 
    
- * where M is number of stages    
- * \par    
- * pState points to a state array of size numStages.    
- * The state variables (g values) hold previous inputs and are stored in the following order.    
- * 
    
- *    {g0[n], g1[n], g2[n] ...gM-1[n]}    
- * 
    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numStages, pCoeffs, pState. Also set all of the values in pState to zero. 
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:    
- * 
    
- *arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};    
- *arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};    
- *arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};    
- * 
    
- * \par    
- * where numStages is the number of stages in the filter; pState is the address of the state buffer;    
- * pCoeffs is the address of the coefficient buffer.    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the FIR Lattice filter functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-
-  /**    
-   * @brief Processing function for the floating-point FIR lattice filter.    
-   * @param[in]  *S        points to an instance of the floating-point FIR lattice structure.    
-   * @param[in]  *pSrc     points to the block of input data.    
-   * @param[out] *pDst     points to the block of output data    
-   * @param[in]  blockSize number of samples to process.    
-   * @return none.    
-   */
-
-void arm_fir_lattice_f32(
-  const arm_fir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState;                             /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *px;                                 /* temporary state pointer */
-  float32_t *pk;                                 /* temporary coefficient pointer */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t fcurr1, fnext1, gcurr1, gnext1;      /* temporary variables for first sample in loop unrolling */
-  float32_t fcurr2, fnext2, gnext2;              /* temporary variables for second sample in loop unrolling */
-  float32_t fcurr3, fnext3, gnext3;              /* temporary variables for third sample in loop unrolling */
-  float32_t fcurr4, fnext4, gnext4;              /* temporary variables for fourth sample in loop unrolling */
-  uint32_t numStages = S->numStages;             /* Number of stages in the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  gcurr1 = 0.0f;
-  pState = &S->pState[0];
-
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-    /* Read two samples from input buffer */
-    /* f0(n) = x(n) */
-    fcurr1 = *pSrc++;
-    fcurr2 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Read g0(n-1) from state */
-    gcurr1 = *px;
-
-    /* Process first sample for first tap */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = fcurr1 + ((*pk) * gcurr1);
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (fcurr1 * (*pk)) + gcurr1;
-
-    /* Process second sample for first tap */
-    /* for sample 2 processing */
-    fnext2 = fcurr2 + ((*pk) * fcurr1);
-    gnext2 = (fcurr2 * (*pk)) + fcurr1;
-
-    /* Read next two samples from input buffer */
-    /* f0(n+2) = x(n+2) */
-    fcurr3 = *pSrc++;
-    fcurr4 = *pSrc++;
-
-    /* Copy only last input samples into the state buffer    
-       which will be used for next four samples processing */
-    *px++ = fcurr4;
-
-    /* Process third sample for first tap */
-    fnext3 = fcurr3 + ((*pk) * fcurr2);
-    gnext3 = (fcurr3 * (*pk)) + fcurr2;
-
-    /* Process fourth sample for first tap */
-    fnext4 = fcurr4 + ((*pk) * fcurr3);
-    gnext4 = (fcurr4 * (*pk++)) + fcurr3;
-
-    /* Update of f values for next coefficient set processing */
-    fcurr1 = fnext1;
-    fcurr2 = fnext2;
-    fcurr3 = fnext3;
-    fcurr4 = fnext4;
-
-    /* Loop unrolling.  Process 4 taps at a time . */
-    stageCnt = (numStages - 1u) >> 2u;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.    
-     ** Repeat until we've computed numStages-3 coefficients. */
-
-    /* Process 2nd, 3rd, 4th and 5th taps ... here */
-    while(stageCnt > 0u)
-    {
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurr1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext4;
-
-      /* Process first sample for 2nd, 6th .. tap */
-      /* Sample processing for K2, K6.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = fcurr1 + ((*pk) * gcurr1);
-      /* Process second sample for 2nd, 6th .. tap */
-      /* for sample 2 processing */
-      fnext2 = fcurr2 + ((*pk) * gnext1);
-      /* Process third sample for 2nd, 6th .. tap */
-      fnext3 = fcurr3 + ((*pk) * gnext2);
-      /* Process fourth sample for 2nd, 6th .. tap */
-      fnext4 = fcurr4 + ((*pk) * gnext3);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      /* Calculation of state values for next stage */
-      gnext4 = (fcurr4 * (*pk)) + gnext3;
-      gnext3 = (fcurr3 * (*pk)) + gnext2;
-      gnext2 = (fcurr2 * (*pk)) + gnext1;
-      gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurr1 = *px;
-
-      /* save g2(n) in state buffer */
-      *px++ = gnext4;
-
-      /* Sample processing for K3, K7.... */
-      /* Process first sample for 3rd, 7th .. tap */
-      /* f3(n) = f2(n) +  K3 * g2(n-1) */
-      fcurr1 = fnext1 + ((*pk) * gcurr1);
-      /* Process second sample for 3rd, 7th .. tap */
-      fcurr2 = fnext2 + ((*pk) * gnext1);
-      /* Process third sample for 3rd, 7th .. tap */
-      fcurr3 = fnext3 + ((*pk) * gnext2);
-      /* Process fourth sample for 3rd, 7th .. tap */
-      fcurr4 = fnext4 + ((*pk) * gnext3);
-
-      /* Calculation of state values for next stage */
-      /* g3(n) = f2(n) * K3  +  g2(n-1) */
-      gnext4 = (fnext4 * (*pk)) + gnext3;
-      gnext3 = (fnext3 * (*pk)) + gnext2;
-      gnext2 = (fnext2 * (*pk)) + gnext1;
-      gnext1 = (fnext1 * (*pk++)) + gcurr1;
-
-
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurr1 = *px;
-
-      /* save g3(n) in state buffer */
-      *px++ = gnext4;
-
-      /* Sample processing for K4, K8.... */
-      /* Process first sample for 4th, 8th .. tap */
-      /* f4(n) = f3(n) +  K4 * g3(n-1) */
-      fnext1 = fcurr1 + ((*pk) * gcurr1);
-      /* Process second sample for 4th, 8th .. tap */
-      /* for sample 2 processing */
-      fnext2 = fcurr2 + ((*pk) * gnext1);
-      /* Process third sample for 4th, 8th .. tap */
-      fnext3 = fcurr3 + ((*pk) * gnext2);
-      /* Process fourth sample for 4th, 8th .. tap */
-      fnext4 = fcurr4 + ((*pk) * gnext3);
-
-      /* g4(n) = f3(n) * K4  +  g3(n-1) */
-      /* Calculation of state values for next stage */
-      gnext4 = (fcurr4 * (*pk)) + gnext3;
-      gnext3 = (fcurr3 * (*pk)) + gnext2;
-      gnext2 = (fcurr2 * (*pk)) + gnext1;
-      gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurr1 = *px;
-
-      /* save g4(n) in state buffer */
-      *px++ = gnext4;
-
-      /* Sample processing for K5, K9.... */
-      /* Process first sample for 5th, 9th .. tap */
-      /* f5(n) = f4(n) +  K5 * g4(n-1) */
-      fcurr1 = fnext1 + ((*pk) * gcurr1);
-      /* Process second sample for 5th, 9th .. tap */
-      fcurr2 = fnext2 + ((*pk) * gnext1);
-      /* Process third sample for 5th, 9th .. tap */
-      fcurr3 = fnext3 + ((*pk) * gnext2);
-      /* Process fourth sample for 5th, 9th .. tap */
-      fcurr4 = fnext4 + ((*pk) * gnext3);
-
-      /* Calculation of state values for next stage */
-      /* g5(n) = f4(n) * K5  +  g4(n-1) */
-      gnext4 = (fnext4 * (*pk)) + gnext3;
-      gnext3 = (fnext3 * (*pk)) + gnext2;
-      gnext2 = (fnext2 * (*pk)) + gnext1;
-      gnext1 = (fnext1 * (*pk++)) + gcurr1;
-
-      stageCnt--;
-    }
-
-    /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
-    stageCnt = (numStages - 1u) % 0x4u;
-
-    while(stageCnt > 0u)
-    {
-      gcurr1 = *px;
-
-      /* save g value in state buffer */
-      *px++ = gnext4;
-
-      /* Process four samples for last three taps here */
-      fnext1 = fcurr1 + ((*pk) * gcurr1);
-      fnext2 = fcurr2 + ((*pk) * gnext1);
-      fnext3 = fcurr3 + ((*pk) * gnext2);
-      fnext4 = fcurr4 + ((*pk) * gnext3);
-
-      /* g1(n) = f0(n) * K1  +  g0(n-1) */
-      gnext4 = (fcurr4 * (*pk)) + gnext3;
-      gnext3 = (fcurr3 * (*pk)) + gnext2;
-      gnext2 = (fcurr2 * (*pk)) + gnext1;
-      gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-      /* Update of f values for next coefficient set processing */
-      fcurr1 = fnext1;
-      fcurr2 = fnext2;
-      fcurr3 = fnext3;
-      fcurr4 = fnext4;
-
-      stageCnt--;
-
-    }
-
-    /* The results in the 4 accumulators, store in the destination buffer. */
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr1;
-    *pDst++ = fcurr2;
-    *pDst++ = fcurr3;
-    *pDst++ = fcurr4;
-
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurr1 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g2(n) from state buffer */
-    gcurr1 = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = fcurr1 + ((*pk) * gcurr1);
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-    /* save g1(n) in state buffer */
-    *px++ = fcurr1;
-
-    /* f1(n) is saved in fcurr1    
-       for next stage processing */
-    fcurr1 = fnext1;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* read g2(n) from state buffer */
-      gcurr1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext1;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = fcurr1 + ((*pk) * gcurr1);
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-      /* f1(n) is saved in fcurr1    
-         for next stage processing */
-      fcurr1 = fnext1;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr1;
-
-    blkCnt--;
-
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t fcurr, fnext, gcurr, gnext;          /* temporary variables */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  pState = &S->pState[0];
-
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = pCoeffs;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n-1) from state buffer */
-    gcurr = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext = fcurr + ((*pk) * gcurr);
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext = (fcurr * (*pk++)) + gcurr;
-
-    /* save f0(n) in state buffer */
-    *px++ = fcurr;
-
-    /* f1(n) is saved in fcurr            
-       for next stage processing */
-    fcurr = fnext;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* read g2(n) from state buffer */
-      gcurr = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext = fcurr + ((*pk) * gcurr);
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext = (fcurr * (*pk++)) + gcurr;
-
-      /* f1(n) is saved in fcurr1            
-         for next stage processing */
-      fcurr = fnext;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr;
-
-    blkCnt--;
-
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
deleted file mode 100755
index c6aa00d9..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_lattice_init_f32.c    
-*    
-* Description:  Floating-point FIR Lattice filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-/**    
- * @brief Initialization function for the floating-point FIR lattice filter.    
- * @param[in] *S points to an instance of the floating-point FIR lattice structure.    
- * @param[in] numStages  number of filter stages.    
- * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.    
- * @param[in] *pState points to the state buffer.  The array is of length numStages.    
- * @return none.    
- */
-
-void arm_fir_lattice_init_f32(
-  arm_fir_lattice_instance_f32 * S,
-  uint16_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always numStages */
-  memset(pState, 0, (numStages) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
deleted file mode 100755
index 34f33336..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_lattice_init_q15.c    
-*    
-* Description:  Q15 FIR Lattice filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for the Q15 FIR lattice filter.    
-   * @param[in] *S points to an instance of the Q15 FIR lattice structure.    
-   * @param[in] numStages  number of filter stages.    
-   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.     
-   * @param[in] *pState points to the state buffer.  The array is of length numStages.     
-   * @return none.    
-   */
-
-void arm_fir_lattice_init_q15(
-  arm_fir_lattice_instance_q15 * S,
-  uint16_t numStages,
-  q15_t * pCoeffs,
-  q15_t * pState)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always numStages */
-  memset(pState, 0, (numStages) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
deleted file mode 100755
index 786152f9..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_lattice_init_q31.c    
-*    
-* Description:  Q31 FIR lattice filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for the Q31 FIR lattice filter.    
-   * @param[in] *S points to an instance of the Q31 FIR lattice structure.    
-   * @param[in] numStages  number of filter stages.    
-   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.    
-   * @param[in] *pState points to the state buffer.   The array is of length numStages.    
-   * @return none.    
-   */
-
-void arm_fir_lattice_init_q31(
-  arm_fir_lattice_instance_q31 * S,
-  uint16_t numStages,
-  q31_t * pCoeffs,
-  q31_t * pState)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always numStages */
-  memset(pState, 0, (numStages) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c
deleted file mode 100755
index 044a500d..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c
+++ /dev/null
@@ -1,536 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_lattice_q15.c    
-*    
-* Description:	Q15 FIR lattice filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-
-/**    
- * @brief Processing function for the Q15 FIR lattice filter.    
- * @param[in]  *S        points to an instance of the Q15 FIR lattice structure.    
- * @param[in]  *pSrc     points to the block of input data.    
- * @param[out] *pDst     points to the block of output data    
- * @param[in]  blockSize number of samples to process.    
- * @return none.    
- */
-
-void arm_fir_lattice_q15(
-  const arm_fir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState;                                 /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *px;                                     /* temporary state pointer */
-  q15_t *pk;                                     /* temporary coefficient pointer */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t fcurnt1, fnext1, gcurnt1 = 0, gnext1;    /* temporary variables for first sample in loop unrolling */
-  q31_t fcurnt2, fnext2, gnext2;                 /* temporary variables for second sample in loop unrolling */
-  q31_t fcurnt3, fnext3, gnext3;                 /* temporary variables for third sample in loop unrolling */
-  q31_t fcurnt4, fnext4, gnext4;                 /* temporary variables for fourth sample in loop unrolling */
-  uint32_t numStages = S->numStages;             /* Number of stages in the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  pState = &S->pState[0];
-
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-    /* Read two samples from input buffer */
-    /* f0(n) = x(n) */
-    fcurnt1 = *pSrc++;
-    fcurnt2 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Read g0(n-1) from state */
-    gcurnt1 = *px;
-
-    /* Process first sample for first tap */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-    fnext1 = __SSAT(fnext1, 16);
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (q31_t) ((fcurnt1 * (*pk)) >> 15u) + gcurnt1;
-    gnext1 = __SSAT(gnext1, 16);
-
-    /* Process second sample for first tap */
-    /* for sample 2 processing */
-    fnext2 = (q31_t) ((fcurnt1 * (*pk)) >> 15u) + fcurnt2;
-    fnext2 = __SSAT(fnext2, 16);
-
-    gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + fcurnt1;
-    gnext2 = __SSAT(gnext2, 16);
-
-
-    /* Read next two samples from input buffer */
-    /* f0(n+2) = x(n+2) */
-    fcurnt3 = *pSrc++;
-    fcurnt4 = *pSrc++;
-
-    /* Copy only last input samples into the state buffer    
-       which is used for next four samples processing */
-    *px++ = (q15_t) fcurnt4;
-
-    /* Process third sample for first tap */
-    fnext3 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + fcurnt3;
-    fnext3 = __SSAT(fnext3, 16);
-    gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + fcurnt2;
-    gnext3 = __SSAT(gnext3, 16);
-
-    /* Process fourth sample for first tap */
-    fnext4 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + fcurnt4;
-    fnext4 = __SSAT(fnext4, 16);
-    gnext4 = (q31_t) ((fcurnt4 * (*pk++)) >> 15u) + fcurnt3;
-    gnext4 = __SSAT(gnext4, 16);
-
-    /* Update of f values for next coefficient set processing */
-    fcurnt1 = fnext1;
-    fcurnt2 = fnext2;
-    fcurnt3 = fnext3;
-    fcurnt4 = fnext4;
-
-
-    /* Loop unrolling.  Process 4 taps at a time . */
-    stageCnt = (numStages - 1u) >> 2;
-
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.    
-     ** Repeat until we've computed numStages-3 coefficients. */
-
-    /* Process 2nd, 3rd, 4th and 5th taps ... here */
-    while(stageCnt > 0u)
-    {
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurnt1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext4;
-
-      /* Process first sample for 2nd, 6th .. tap */
-      /* Sample processing for K2, K6.... */
-      /* f1(n) = f0(n) +  K1 * g0(n-1) */
-      fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-      fnext1 = __SSAT(fnext1, 16);
-
-
-      /* Process second sample for 2nd, 6th .. tap */
-      /* for sample 2 processing */
-      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
-      fnext2 = __SSAT(fnext2, 16);
-      /* Process third sample for 2nd, 6th .. tap */
-      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
-      fnext3 = __SSAT(fnext3, 16);
-      /* Process fourth sample for 2nd, 6th .. tap */
-      /* fnext4 = fcurnt4 + (*pk) * gnext3; */
-      fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
-      fnext4 = __SSAT(fnext4, 16);
-
-      /* g1(n) = f0(n) * K1  +  g0(n-1) */
-      /* Calculation of state values for next stage */
-      gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-      gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-
-      gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-
-      gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurnt1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext4;
-
-      /* Sample processing for K3, K7.... */
-      /* Process first sample for 3rd, 7th .. tap */
-      /* f3(n) = f2(n) +  K3 * g2(n-1) */
-      fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fnext1;
-      fcurnt1 = __SSAT(fcurnt1, 16);
-
-      /* Process second sample for 3rd, 7th .. tap */
-      fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fnext2;
-      fcurnt2 = __SSAT(fcurnt2, 16);
-
-      /* Process third sample for 3rd, 7th .. tap */
-      fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fnext3;
-      fcurnt3 = __SSAT(fcurnt3, 16);
-
-      /* Process fourth sample for 3rd, 7th .. tap */
-      fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fnext4;
-      fcurnt4 = __SSAT(fcurnt4, 16);
-
-      /* Calculation of state values for next stage */
-      /* g3(n) = f2(n) * K3  +  g2(n-1) */
-      gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15u) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-
-      gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15u) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-
-      gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15u) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-
-      gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurnt1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext4;
-
-      /* Sample processing for K4, K8.... */
-      /* Process first sample for 4th, 8th .. tap */
-      /* f4(n) = f3(n) +  K4 * g3(n-1) */
-      fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-      fnext1 = __SSAT(fnext1, 16);
-
-      /* Process second sample for 4th, 8th .. tap */
-      /* for sample 2 processing */
-      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
-      fnext2 = __SSAT(fnext2, 16);
-
-      /* Process third sample for 4th, 8th .. tap */
-      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
-      fnext3 = __SSAT(fnext3, 16);
-
-      /* Process fourth sample for 4th, 8th .. tap */
-      fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
-      fnext4 = __SSAT(fnext4, 16);
-
-      /* g4(n) = f3(n) * K4  +  g3(n-1) */
-      /* Calculation of state values for next stage */
-      gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-
-      gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-
-      gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-      gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurnt1 = *px;
-
-      /* save g4(n) in state buffer */
-      *px++ = (q15_t) gnext4;
-
-      /* Sample processing for K5, K9.... */
-      /* Process first sample for 5th, 9th .. tap */
-      /* f5(n) = f4(n) +  K5 * g4(n-1) */
-      fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fnext1;
-      fcurnt1 = __SSAT(fcurnt1, 16);
-
-      /* Process second sample for 5th, 9th .. tap */
-      fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fnext2;
-      fcurnt2 = __SSAT(fcurnt2, 16);
-
-      /* Process third sample for 5th, 9th .. tap */
-      fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fnext3;
-      fcurnt3 = __SSAT(fcurnt3, 16);
-
-      /* Process fourth sample for 5th, 9th .. tap */
-      fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fnext4;
-      fcurnt4 = __SSAT(fcurnt4, 16);
-
-      /* Calculation of state values for next stage */
-      /* g5(n) = f4(n) * K5  +  g4(n-1) */
-      gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15u) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-      gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15u) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-      gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15u) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-      gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-      stageCnt--;
-    }
-
-    /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
-    stageCnt = (numStages - 1u) % 0x4u;
-
-    while(stageCnt > 0u)
-    {
-      gcurnt1 = *px;
-
-      /* save g value in state buffer */
-      *px++ = (q15_t) gnext4;
-
-      /* Process four samples for last three taps here */
-      fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-      fnext1 = __SSAT(fnext1, 16);
-      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
-      fnext2 = __SSAT(fnext2, 16);
-
-      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
-      fnext3 = __SSAT(fnext3, 16);
-
-      fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
-      fnext4 = __SSAT(fnext4, 16);
-
-      /* g1(n) = f0(n) * K1  +  g0(n-1) */
-      gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-      gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-      gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-      gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-      /* Update of f values for next coefficient set processing */
-      fcurnt1 = fnext1;
-      fcurnt2 = fnext2;
-      fcurnt3 = fnext3;
-      fcurnt4 = fnext4;
-
-      stageCnt--;
-
-    }
-
-    /* The results in the 4 accumulators, store in the destination buffer. */
-    /* y(n) = fN(n) */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ = __PKHBT(fcurnt1, fcurnt2, 16);
-    *__SIMD32(pDst)++ = __PKHBT(fcurnt3, fcurnt4, 16);
-
-#else
-
-    *__SIMD32(pDst)++ = __PKHBT(fcurnt2, fcurnt1, 16);
-    *__SIMD32(pDst)++ = __PKHBT(fcurnt4, fcurnt3, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurnt1 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g2(n) from state buffer */
-    gcurnt1 = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-    fnext1 = __SSAT(fnext1, 16);
-
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
-    gnext1 = __SSAT(gnext1, 16);
-
-    /* save g1(n) in state buffer */
-    *px++ = (q15_t) fcurnt1;
-
-    /* f1(n) is saved in fcurnt1    
-       for next stage processing */
-    fcurnt1 = fnext1;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* read g2(n) from state buffer */
-      gcurnt1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext1;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-      fnext1 = __SSAT(fnext1, 16);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-
-      /* f1(n) is saved in fcurnt1    
-         for next stage processing */
-      fcurnt1 = fnext1;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = __SSAT(fcurnt1, 16);
-
-
-    blkCnt--;
-
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t fcurnt, fnext, gcurnt, gnext;            /* temporary variables */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  pState = &S->pState[0];
-
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurnt = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n-1) from state buffer */
-    gcurnt = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext = ((gcurnt * (*pk)) >> 15u) + fcurnt;
-    fnext = __SSAT(fnext, 16);
-
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext = ((fcurnt * (*pk++)) >> 15u) + gcurnt;
-    gnext = __SSAT(gnext, 16);
-
-    /* save f0(n) in state buffer */
-    *px++ = (q15_t) fcurnt;
-
-    /* f1(n) is saved in fcurnt            
-       for next stage processing */
-    fcurnt = fnext;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* read g1(n-1) from state buffer */
-      gcurnt = *px;
-
-      /* save g0(n-1) in state buffer */
-      *px++ = (q15_t) gnext;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext = ((gcurnt * (*pk)) >> 15u) + fcurnt;
-      fnext = __SSAT(fnext, 16);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext = ((fcurnt * (*pk++)) >> 15u) + gcurnt;
-      gnext = __SSAT(gnext, 16);
-
-
-      /* f1(n) is saved in fcurnt            
-         for next stage processing */
-      fcurnt = fnext;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = __SSAT(fcurnt, 16);
-
-
-    blkCnt--;
-
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c
deleted file mode 100755
index 4a64538b..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c
+++ /dev/null
@@ -1,353 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_lattice_q31.c    
-*    
-* Description:	Q31 FIR lattice filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-
-/**    
- * @brief Processing function for the Q31 FIR lattice filter.    
- * @param[in]  *S        points to an instance of the Q31 FIR lattice structure.    
- * @param[in]  *pSrc     points to the block of input data.    
- * @param[out] *pDst     points to the block of output data    
- * @param[in]  blockSize number of samples to process.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits.    
- */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_fir_lattice_q31(
-  const arm_fir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState;                                 /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *px;                                     /* temporary state pointer */
-  q31_t *pk;                                     /* temporary coefficient pointer */
-  q31_t fcurr1, fnext1, gcurr1 = 0, gnext1;      /* temporary variables for first sample in loop unrolling */
-  q31_t fcurr2, fnext2, gnext2;                  /* temporary variables for second sample in loop unrolling */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-  q31_t k;
-
-  pState = &S->pState[0];
-
-  blkCnt = blockSize >> 1u;
-
-  /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.        
-     a second loop below computes the remaining 1 sample. */
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurr1 = *pSrc++;
-
-    /* f0(n) = x(n) */
-    fcurr2 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n - 1) from state buffer */
-    gcurr1 = *px;
-
-    /* Read the reflection coefficient */
-    k = *pk++;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
-    fnext1 = fcurr1 + (fnext1 << 1u);
-    gnext1 = gcurr1 + (gnext1 << 1u);
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext2 = (q31_t) (((q63_t) fcurr1 * k) >> 32);
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext2 = (q31_t) (((q63_t) fcurr2 * (k)) >> 32);
-    fnext2 = fcurr2 + (fnext2 << 1u);
-    gnext2 = fcurr1 + (gnext2 << 1u);
-
-    /* save g1(n) in state buffer */
-    *px++ = fcurr2;
-
-    /* f1(n) is saved in fcurr1        
-       for next stage processing */
-    fcurr1 = fnext1;
-    fcurr2 = fnext2;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-
-      /* Read the reflection coefficient */
-      k = *pk++;
-
-      /* read g2(n) from state buffer */
-      gcurr1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext2;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
-      fnext2 = (q31_t) (((q63_t) gnext1 * k) >> 32);
-
-      fnext1 = fcurr1 + (fnext1 << 1u);
-      fnext2 = fcurr2 + (fnext2 << 1u);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext2 = (q31_t) (((q63_t) fcurr2 * (k)) >> 32);
-      gnext2 = gnext1 + (gnext2 << 1u);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
-      gnext1 = gcurr1 + (gnext1 << 1u);
-
-      /* f1(n) is saved in fcurr1        
-         for next stage processing */
-      fcurr1 = fnext1;
-      fcurr2 = fnext2;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr1;
-    *pDst++ = fcurr2;
-
-    blkCnt--;
-
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x2u;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurr1 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n - 1) from state buffer */
-    gcurr1 = *px;
-
-    /* Read the reflection coefficient */
-    k = *pk++;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
-    fnext1 = fcurr1 + (fnext1 << 1u);
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
-    gnext1 = gcurr1 + (gnext1 << 1u);
-
-    /* save g1(n) in state buffer */
-    *px++ = fcurr1;
-
-    /* f1(n) is saved in fcurr1        
-       for next stage processing */
-    fcurr1 = fnext1;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* Read the reflection coefficient */
-      k = *pk++;
-
-      /* read g2(n) from state buffer */
-      gcurr1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext1;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
-      fnext1 = fcurr1 + (fnext1 << 1u);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
-      gnext1 = gcurr1 + (gnext1 << 1u);
-
-      /* f1(n) is saved in fcurr1        
-         for next stage processing */
-      fcurr1 = fnext1;
-
-      stageCnt--;
-
-    }
-
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr1;
-
-    blkCnt--;
-
-  }
-
-
-}
-
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-void arm_fir_lattice_q31(
-  const arm_fir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState;                                 /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *px;                                     /* temporary state pointer */
-  q31_t *pk;                                     /* temporary coefficient pointer */
-  q31_t fcurr, fnext, gcurr, gnext;              /* temporary variables */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  pState = &S->pState[0];
-
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n-1) from state buffer */
-    gcurr = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
-    /* save g1(n) in state buffer */
-    *px++ = fcurr;
-
-    /* f1(n) is saved in fcurr1            
-       for next stage processing */
-    fcurr = fnext;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* read g2(n) from state buffer */
-      gcurr = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
-
-      /* f1(n) is saved in fcurr1            
-         for next stage processing */
-      fcurr = fnext;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr;
-
-    blkCnt--;
-
-  }
-
-}
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c
deleted file mode 100755
index b0d3d09b..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c
+++ /dev/null
@@ -1,691 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_q15.c    
-*    
-* Description:  Q15 FIR filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**       
- * @ingroup groupFilters       
- */
-
-/**       
- * @addtogroup FIR       
- * @{       
- */
-
-/**       
- * @brief Processing function for the Q15 FIR filter.       
- * @param[in] *S points to an instance of the Q15 FIR structure.       
- * @param[in] *pSrc points to the block of input data.       
- * @param[out] *pDst points to the block of output data.       
- * @param[in]  blockSize number of samples to process per call.       
- * @return none.       
- *   
- *   
- * \par Restrictions   
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE   
- *	In this case input, output, state buffers should be aligned by 32-bit   
- *   
- * Scaling and Overflow Behavior:       
- * \par       
- * The function is implemented using a 64-bit internal accumulator.       
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.       
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.       
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.       
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.       
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.       
- *       
- * \par       
- * Refer to the function arm_fir_fast_q15() for a faster but less precise implementation of this function.       
- */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-
-void arm_fir_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px1;                                    /* Temporary q15 pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold SIMD state and coefficient values */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.       
-   * The variables acc0 ... acc3 hold output values that are being computed:       
-   *       
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]       
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]       
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]       
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]       
-   */
-
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer.       
-     ** Use 32-bit SIMD to move the 16-bit data.  Only requires two copies. */
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Initialize state pointer of type q15 */
-    px1 = pState;
-
-    /* Initialize coeff pointer of type q31 */
-    pb = pCoeffs;
-
-    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
-    x0 = _SIMD32_OFFSET(px1);
-
-    /* Read the third and forth samples from the state buffer: x[n-N-1], x[n-N-2] */
-    x1 = _SIMD32_OFFSET(px1 + 1u);
-
-    px1 += 2u;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
-      acc1 = __SMLALD(x1, c0, acc1);
-
-      /* Read state x[n-N-2], x[n-N-3] */
-      x2 = _SIMD32_OFFSET(px1);
-
-      /* Read state x[n-N-3], x[n-N-4] */
-      x3 = _SIMD32_OFFSET(px1 + 1u);
-
-      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
-      acc2 = __SMLALD(x2, c0, acc2);
-
-      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
-      acc3 = __SMLALD(x3, c0, acc3);
-
-      /* Read coefficients b[N-2], b[N-3] */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
-      acc0 = __SMLALD(x2, c0, acc0);
-
-      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
-      acc1 = __SMLALD(x3, c0, acc1);
-
-      /* Read state x[n-N-4], x[n-N-5] */
-      x0 = _SIMD32_OFFSET(px1 + 2u);
-
-      /* Read state x[n-N-5], x[n-N-6] */
-      x1 = _SIMD32_OFFSET(px1 + 3u);
-
-      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
-      acc2 = __SMLALD(x0, c0, acc2);
-
-      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
-      acc3 = __SMLALD(x1, c0, acc3);
-
-      px1 += 4u;
-
-      tapCnt--;
-
-    }
-
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps.       
-     ** This is always be 2 taps since the filter length is even. */
-    if((numTaps & 0x3u) != 0u)
-    {
-      /* Read 2 coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Fetch 4 state variables */
-      x2 = _SIMD32_OFFSET(px1);
-
-      x3 = _SIMD32_OFFSET(px1 + 1u);
-
-      /* Perform the multiply-accumulates */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      px1 += 2u;
-
-      acc1 = __SMLALD(x1, c0, acc1);
-      acc2 = __SMLALD(x2, c0, acc2);
-      acc3 = __SMLALD(x3, c0, acc3);
-    }
-
-    /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the 4 outputs in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
-
-
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.       
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-  while(blkCnt > 0u)
-  {
-    /* Copy two samples into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer of type q15 */
-    px1 = pState;
-
-    /* Initialize coeff pointer of type q31 */
-    pb = pCoeffs;
-
-    tapCnt = numTaps >> 1;
-
-    do
-    {
-
-      c0 = *__SIMD32(pb)++;
-      x0 = *__SIMD32(px1)++;
-
-      acc0 = __SMLALD(x0, c0, acc0);
-      tapCnt--;
-    }
-    while(tapCnt > 0u);
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1u) >> 2;
-
-  while(tapCnt > 0u)
-  {
-
-    /* Copy state values to start of state buffer */
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* copy remaining data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-}
-
-#else /* UNALIGNED_SUPPORT_DISABLE */
-
-void arm_fir_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q15_t *px;                                     /* Temporary q31 pointer for SIMD state buffer accesses */
-  q31_t x0, x1, x2, c0;                          /* Temporary variables to hold SIMD state and coefficient values */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.      
-   * The variables acc0 ... acc3 hold output values that are being computed:      
-   *      
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]      
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]      
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]      
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]      
-   */
-
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.      
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer.      
-     ** Use 32-bit SIMD to move the 16-bit data.  Only requires two copies. */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */
-    px = pState;
-
-    /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */
-    pb = pCoeffs;
-
-    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
-    x0 = *__SIMD32(px)++;
-
-    /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
-    x2 = *__SIMD32(px)++;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.      
-     ** Repeat until we've computed numTaps-(numTaps%4) coefficients. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0)
-    {
-      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
-      acc2 = __SMLALD(x2, c0, acc2);
-
-      /* pack  x[n-N-1] and x[n-N-2] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* Read state x[n-N-4], x[n-N-5] */
-      x0 = _SIMD32_OFFSET(px);
-
-      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
-      acc1 = __SMLALDX(x1, c0, acc1);
-
-      /* pack  x[n-N-3] and x[n-N-4] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x0, x2, 0);
-#else
-      x1 = __PKHBT(x2, x0, 0);
-#endif
-
-      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
-      acc3 = __SMLALDX(x1, c0, acc3);
-
-      /* Read coefficients b[N-2], b[N-3] */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
-      acc0 = __SMLALD(x2, c0, acc0);
-
-      /* Read state x[n-N-6], x[n-N-7] with offset */
-      x2 = _SIMD32_OFFSET(px + 2u);
-
-      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
-      acc2 = __SMLALD(x0, c0, acc2);
-
-      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
-      acc1 = __SMLALDX(x1, c0, acc1);
-
-      /* pack  x[n-N-5] and x[n-N-6] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
-      acc3 = __SMLALDX(x1, c0, acc3);
-
-      /* Update state pointer for next state reading */
-      px += 4u;
-
-      /* Decrement tap count */
-      tapCnt--;
-
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps.       
-     ** This is always be 2 taps since the filter length is even. */
-    if((numTaps & 0x3u) != 0u)
-    {
-
-      /* Read last two coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Perform the multiply-accumulates */
-      acc0 = __SMLALD(x0, c0, acc0);
-      acc2 = __SMLALD(x2, c0, acc2);
-
-      /* pack state variables */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* Read last state variables */
-      x0 = *__SIMD32(px);
-
-      /* Perform the multiply-accumulates */
-      acc1 = __SMLALDX(x1, c0, acc1);
-
-      /* pack state variables */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x0, x2, 0);
-#else
-      x1 = __PKHBT(x2, x0, 0);
-#endif
-
-      /* Perform the multiply-accumulates */
-      acc3 = __SMLALDX(x1, c0, acc3);
-    }
-
-    /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the 4 outputs in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.      
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-  while(blkCnt > 0u)
-  {
-    /* Copy two samples into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Use SIMD to hold states and coefficients */
-    px = pState;
-    pb = pCoeffs;
-
-    tapCnt = numTaps >> 1u;
-
-    do
-    {
-      acc0 += (q31_t) * px++ * *pb++;
-	  acc0 += (q31_t) * px++ * *pb++;
-      tapCnt--;
-    }
-    while(tapCnt > 0u);
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.      
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.      
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.      
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1u) >> 2;
-
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* copy remaining data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-}
-
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-#else /* ARM_MATH_CM0_FAMILY */
-
-
-/* Run the below code for Cortex-M0 */
-
-void arm_fir_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-
-
-
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q63_t acc;                                     /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Number of nTaps in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Initialize blkCnt with blockSize */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = pCoeffs;
-
-    tapCnt = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-      acc += (q31_t) * px++ * *pb++;
-      tapCnt--;
-    } while(tapCnt > 0u);
-
-    /* The result is in 2.30 format.  Convert to 1.15         
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q15_t) __SSAT((acc >> 15u), 16);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Copy numTaps number of values */
-  tapCnt = (numTaps - 1u);
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-
-
-/**       
- * @} end of FIR group       
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c
deleted file mode 100755
index 35360595..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c
+++ /dev/null
@@ -1,365 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_q31.c    
-*    
-* Description:	Q31 FIR filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @param[in] *S points to an instance of the Q31 FIR filter structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in] blockSize number of samples to process per call.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.    
- * After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.  
- *    
- * \par    
- * Refer to the function arm_fir_fast_q31() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_fir_q31(
-  const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t x0, x1, x2;                              /* Temporary variables to hold state */
-  q31_t c0;                                      /* Temporary variable to hold coefficient value */
-  q31_t *px;                                     /* Temporary pointer for state */
-  q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q63_t acc0, acc1, acc2;                        /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt, tapCntN3;          /* Loop counters */
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.    
-   * The variables acc0 ... acc3 hold output values that are being computed:    
-   *    
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]    
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]    
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]    
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]    
-   */
-  blkCnt = blockSize / 3;
-  blockSize = blockSize - (3 * blkCnt);
-
-  tapCnt = numTaps / 3;
-  tapCntN3 = numTaps - (3 * tapCnt);
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy three new input samples into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Read the first two samples from the state buffer:    
-     *  x[n-numTaps], x[n-numTaps-1] */
-    x0 = *(px++);
-    x1 = *(px++);
-
-    /* Loop unrolling.  Process 3 taps at a time. */
-    i = tapCnt;
-
-    while(i > 0u)
-    {
-      /* Read the b[numTaps] coefficient */
-      c0 = *pb;
-
-      /* Read x[n-numTaps-2] sample */
-      x2 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q63_t) x0 * c0);
-      acc1 += ((q63_t) x1 * c0);
-      acc2 += ((q63_t) x2 * c0);
-
-      /* Read the coefficient and state */
-      c0 = *(pb + 1u);
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q63_t) x1 * c0);
-      acc1 += ((q63_t) x2 * c0);
-      acc2 += ((q63_t) x0 * c0);
-
-      /* Read the coefficient and state */
-      c0 = *(pb + 2u);
-      x1 = *(px++);
-
-      /* update coefficient pointer */
-      pb += 3u;
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q63_t) x2 * c0);
-      acc1 += ((q63_t) x0 * c0);
-      acc2 += ((q63_t) x1 * c0);
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* If the filter length is not a multiple of 3, compute the remaining filter taps */
-
-    i = tapCntN3;
-
-    while(i > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x2 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q63_t) x0 * c0);
-      acc1 += ((q63_t) x1 * c0);
-      acc2 += ((q63_t) x2 * c0);
-
-      /* Reuse the present sample states for next sample */
-      x0 = x1;
-      x1 = x2;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 3 to process the next group of 3 samples */
-    pState = pState + 3;
-
-    /* The results in the 3 accumulators are in 2.30 format.  Convert to 1.31    
-     ** Then store the 3 outputs in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 >> 31u);
-    *pDst++ = (q31_t) (acc1 >> 31u);
-    *pDst++ = (q31_t) (acc2 >> 31u);
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 3, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-
-  while(blockSize > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = (pCoeffs);
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      acc0 += (q63_t) * (px++) * (*(pb++));
-      i--;
-    } while(i > 0u);
-
-    /* The result is in 2.62 format.  Convert to 1.31    
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 >> 31u);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blockSize--;
-  }
-
-  /* Processing is complete.    
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  q31_t *px;                                     /* Temporary pointer for state */
-  q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q63_t acc;                                     /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Length of the filter */
-  uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Initialize blkCnt with blockSize */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = pCoeffs;
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-      acc += (q63_t) * px++ * *pb++;
-      i--;
-    } while(i > 0u);
-
-    /* The result is in 2.62 format.  Convert to 1.31         
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q31_t) (acc >> 31u);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the starting of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Copy numTaps number of values */
-  tapCnt = numTaps - 1u;
-
-  /* Copy the data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-
-#endif /*  #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c
deleted file mode 100755
index 24a50dcd..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c
+++ /dev/null
@@ -1,397 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_q7.c    
-*    
-* Description:  Q7 FIR filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @param[in]   *S points to an instance of the Q7 FIR filter structure.    
- * @param[in]   *pSrc points to the block of input data.    
- * @param[out]  *pDst points to the block of output data.    
- * @param[in]   blockSize number of samples to process per call.    
- * @return 	none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.    
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * The accumulator is converted to 18.7 format by discarding the low 7 bits.    
- * Finally, the result is truncated to 1.7 format.    
- */
-
-void arm_fir_q7(
-  const arm_fir_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t *pState = S->pState;                      /* State pointer */
-  q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
-  q7_t *pStateCurnt;                             /* Points to the current sample of the state */
-  q7_t x0, x1, x2, x3;                           /* Temporary variables to hold state */
-  q7_t c0;                                       /* Temporary variable to hold coefficient value */
-  q7_t *px;                                      /* Temporary pointer for state */
-  q7_t *pb;                                      /* Temporary pointer for coefficient buffer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.    
-   * The variables acc0 ... acc3 hold output values that are being computed:    
-   *    
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]    
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]    
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]    
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]    
-   */
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Read the first three samples from the state buffer:    
-     *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-    x0 = *(px++);
-    x1 = *(px++);
-    x2 = *(px++);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-    i = tapCnt;
-
-    while(i > 0u)
-    {
-      /* Read the b[numTaps] coefficient */
-      c0 = *pb;
-
-      /* Read x[n-numTaps-3] sample */
-      x3 = *px;
-      
-      /* acc0 +=  b[numTaps] * x[n-numTaps] */
-      acc0 += ((q15_t) x0 * c0);
-
-      /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
-      acc1 += ((q15_t) x1 * c0);
-
-      /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
-      acc2 += ((q15_t) x2 * c0);
-
-      /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
-      acc3 += ((q15_t) x3 * c0);
-
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb + 1u);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px + 1u);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q15_t) x1 * c0);
-      acc1 += ((q15_t) x2 * c0);
-      acc2 += ((q15_t) x3 * c0);
-      acc3 += ((q15_t) x0 * c0);
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb + 2u);
-
-      /* Read x[n-numTaps-5] sample */
-      x1 = *(px + 2u);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q15_t) x2 * c0);
-      acc1 += ((q15_t) x3 * c0);
-      acc2 += ((q15_t) x0 * c0);
-      acc3 += ((q15_t) x1 * c0);
-
-      /* Read the b[numTaps-3] coefficients */
-      c0 = *(pb + 3u);
-
-      /* Read x[n-numTaps-6] sample */
-      x2 = *(px + 3u);
-      
-      /* Perform the multiply-accumulates */
-      acc0 += ((q15_t) x3 * c0);
-      acc1 += ((q15_t) x0 * c0);
-      acc2 += ((q15_t) x1 * c0);
-      acc3 += ((q15_t) x2 * c0);
-
-      /* update coefficient pointer */
-      pb += 4u;
-      px += 4u;
-      
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-
-    i = numTaps - (tapCnt * 4u);
-    while(i > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x3 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q15_t) x0 * c0);
-      acc1 += ((q15_t) x1 * c0);
-      acc2 += ((q15_t) x2 * c0);
-      acc3 += ((q15_t) x3 * c0);
-
-      /* Reuse the present sample states for next sample */
-      x0 = x1;
-      x1 = x2;
-      x2 = x3;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4;
-
-    /* The results in the 4 accumulators are in 2.62 format.  Convert to 1.31    
-     ** Then store the 4 outputs in the destination buffer. */
-    acc0 = __SSAT((acc0 >> 7u), 8);
-    *pDst++ = acc0;
-    acc1 = __SSAT((acc1 >> 7u), 8);
-    *pDst++ = acc1;
-    acc2 = __SSAT((acc2 >> 7u), 8);
-    *pDst++ = acc2;
-    acc3 = __SSAT((acc3 >> 7u), 8);
-    *pDst++ = acc3;
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = (pCoeffs);
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      acc0 += (q15_t) * (px++) * (*(pb++));
-      i--;
-    } while(i > 0u);
-
-    /* The result is in 2.14 format.  Convert to 1.7    
-     ** Then store the output in the destination buffer. */
-    *pDst++ = __SSAT((acc0 >> 7u), 8);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.    
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
-  uint32_t i, blkCnt;                            /* Loop counters */
-  q7_t *pState = S->pState;                      /* State pointer */
-  q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
-  q7_t *px, *pb;                                 /* Temporary pointers to state and coeff */
-  q31_t acc = 0;                                 /* Accumlator */
-  q7_t *pStateCurnt;                             /* Points to the current sample of the state */
-
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Initialize blkCnt with blockSize */
-  blkCnt = blockSize;
-
-  /* Perform filtering upto BlockSize - BlockSize%4  */
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set accumulator to zero */
-    acc = 0;
-
-    /* Initialize state pointer of type q7 */
-    px = pState;
-
-    /* Initialize coeff pointer of type q7 */
-    pb = pCoeffs;
-
-
-    i = numTaps;
-
-    while(i > 0u)
-    {
-      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-      acc += (q15_t) * px++ * *pb++;
-      i--;
-    }
-
-    /* Store the 1.7 format filter output in destination buffer */
-    *pDst++ = (q7_t) __SSAT((acc >> 7), 8);
-
-    /* Advance the state pointer by 1 to process the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-
-  /* Copy numTaps number of values */
-  i = (numTaps - 1u);
-
-  /* Copy q7_t data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    i--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c
deleted file mode 100755
index 9ef8edf9..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c
+++ /dev/null
@@ -1,444 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_sparse_f32.c    
-*    
-* Description:	Floating-point sparse FIR filter processing function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup FIR_Sparse Finite Impulse Response (FIR) Sparse Filters    
- *    
- * This group of functions implements sparse FIR filters.     
- * Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero.   
- * Sparse filters are used for simulating reflections in communications and audio applications.   
- *   
- * There are separate functions for Q7, Q15, Q31, and floating-point data types.    
- * The functions operate on blocks  of input and output data and each call to the function processes    
- * blockSize samples through the filter.  pSrc and    
- * pDst points to input and output arrays respectively containing blockSize values.    
- *    
- * \par Algorithm:    
- * The sparse filter instant structure contains an array of tap indices pTapDelay which specifies the locations of the non-zero coefficients.   
- * This is in addition to the coefficient array b.   
- * The implementation essentially skips the multiplications by zero and leads to an efficient realization.   
- * 
   
- *     y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]    
- * 
    
- * \par    
- * \image html FIRSparse.gif "Sparse FIR filter.  b[n] represents the filter coefficients"   
- * \par    
- * pCoeffs points to a coefficient array of size numTaps;    
- * pTapDelay points to an array of nonzero indices and is also of size numTaps;   
- * pState points to a state array of size maxDelay + blockSize, where   
- * maxDelay is the largest offset value that is ever used in the pTapDelay array.   
- * Some of the processing functions also require temporary working buffers.   
- *   
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared.    
- * There are separate instance structure declarations for each of the 4 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numTaps, pCoeffs, pTapDelay, maxDelay, stateIndex, pState. Also set all of the values in pState to zero. 
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros before static initialization.    
- * The code below statically initializes each of the 4 different data type filter instance structures    
- * 
    
- *arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
- *arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
- *arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
- *arm_fir_sparse_instance_q7 S =  {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
- * 
    
- * \par    
- *    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the sparse FIR filter functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief Processing function for the floating-point sparse FIR filter.   
- * @param[in]  *S          points to an instance of the floating-point sparse FIR structure.   
- * @param[in]  *pSrc       points to the block of input data.   
- * @param[out] *pDst       points to the block of output data   
- * @param[in]  *pScratchIn points to a temporary buffer of size blockSize.   
- * @param[in]  blockSize   number of input samples to process per call.   
- * @return none.   
- */
-
-void arm_fir_sparse_f32(
-  arm_fir_sparse_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  float32_t * pScratchIn,
-  uint32_t blockSize)
-{
-
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *px;                                 /* Scratch buffer pointer */
-  float32_t *py = pState;                        /* Temporary pointers for state buffer */
-  float32_t *pb = pScratchIn;                    /* Temporary pointers for scratch buffer */
-  float32_t *pOut;                               /* Destination pointer */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  float32_t coeff = *pCoeffs++;                  /* Read the first coefficient value */
-
-
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
-                        (int32_t *) pSrc, 1, blockSize);
-
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                       (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                       blockSize);
-
-  /* Working pointer for the scratch buffer */
-  px = pb;
-
-  /* Working pointer for destination buffer */
-  pOut = pDst;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Loop over the blockSize. Unroll by a factor of 4.    
-   * Compute 4 Multiplications at a time. */
-  blkCnt = blockSize >> 2u;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in destination buffer */
-    *pOut++ = *px++ * coeff;
-    *pOut++ = *px++ * coeff;
-    *pOut++ = *px++ * coeff;
-    *pOut++ = *px++ * coeff;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-   * compute the remaining samples */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in destination buffer */
-    *pOut++ = *px++ * coeff;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and    
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2u;
-
-  while(tapCnt > 0u)
-  {
-
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                         blockSize);
-
-    /* Working pointer for the scratch buffer */
-    px = pb;
-
-    /* Working pointer for destination buffer */
-    pOut = pDst;
-
-    /* Loop over the blockSize. Unroll by a factor of 4.    
-     * Compute 4 MACS at a time. */
-    blkCnt = blockSize >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pOut++ += *px++ * coeff;
-      *pOut++ += *px++ * coeff;
-      *pOut++ += *px++ * coeff;
-      *pOut++ += *px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4,    
-     * compute the remaining samples */
-    blkCnt = blockSize % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pOut++ += *px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and    
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = ((int32_t) S->stateIndex -
-                 (int32_t) blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-	
-	/* Compute last tap without the final read of pTapDelay */
-
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-											 (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-											 blockSize);
-
-	/* Working pointer for the scratch buffer */
-	px = pb;
-
-	/* Working pointer for destination buffer */
-	pOut = pDst;
-
-	/* Loop over the blockSize. Unroll by a factor of 4.    
-	 * Compute 4 MACS at a time. */
-	blkCnt = blockSize >> 2u;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		*pOut++ += *px++ * coeff;
-		*pOut++ += *px++ * coeff;
-		*pOut++ += *px++ * coeff;
-		*pOut++ += *px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-	/* If the blockSize is not a multiple of 4,    
-	 * compute the remaining samples */
-	blkCnt = blockSize % 0x4u;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		*pOut++ += *px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in destination buffer */
-    *pOut++ = *px++ * coeff;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and           
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2u;
-
-  while(tapCnt > 0u)
-  {
-
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                         blockSize);
-
-    /* Working pointer for the scratch buffer */
-    px = pb;
-
-    /* Working pointer for destination buffer */
-    pOut = pDst;
-
-    blkCnt = blockSize;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pOut++ += *px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and           
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex =
-      ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-	
-	/* Compute last tap without the final read of pTapDelay */	
-	
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-											 (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-											 blockSize);
-
-	/* Working pointer for the scratch buffer */
-	px = pb;
-
-	/* Working pointer for destination buffer */
-	pOut = pDst;
-
-	blkCnt = blockSize;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		*pOut++ += *px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY        */
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
deleted file mode 100755
index a0fa81cc..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_sparse_init_f32.c    
-*    
-* Description:	Floating-point sparse FIR filter initialization function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the floating-point sparse FIR filter.   
- * @param[in,out] *S         points to an instance of the floating-point sparse FIR structure.   
- * @param[in]     numTaps    number of nonzero coefficients in the filter.   
- * @param[in]     *pCoeffs   points to the array of filter coefficients.   
- * @param[in]     *pState    points to the state buffer.   
- * @param[in]     *pTapDelay points to the array of offset times.   
- * @param[in]     maxDelay   maximum offset time supported.   
- * @param[in]     blockSize  number of samples that will be processed per block.   
- * @return none   
- *    
- * Description:    
- * \par    
- * pCoeffs holds the filter coefficients and has length numTaps.    
- * pState holds the filter's state variables and must be of length    
- * maxDelay + blockSize, where maxDelay    
- * is the maximum number of delay line values.    
- * blockSize is the    
- * number of samples processed by the arm_fir_sparse_f32() function.    
- */
-
-void arm_fir_sparse_init_f32(
-  arm_fir_sparse_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Assign TapDelay pointer */
-  S->pTapDelay = pTapDelay;
-
-  /* Assign MaxDelay */
-  S->maxDelay = maxDelay;
-
-  /* reset the stateIndex to 0 */
-  S->stateIndex = 0u;
-
-  /* Clear state buffer and size is always maxDelay + blockSize */
-  memset(pState, 0, (maxDelay + blockSize) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
deleted file mode 100755
index 41bbd7e5..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_sparse_init_q15.c    
-*    
-* Description:	Q15 sparse FIR filter initialization function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the Q15 sparse FIR filter.   
- * @param[in,out] *S         points to an instance of the Q15 sparse FIR structure.   
- * @param[in]     numTaps    number of nonzero coefficients in the filter.   
- * @param[in]     *pCoeffs   points to the array of filter coefficients.   
- * @param[in]     *pState    points to the state buffer.   
- * @param[in]     *pTapDelay points to the array of offset times.   
- * @param[in]     maxDelay   maximum offset time supported.   
- * @param[in]     blockSize  number of samples that will be processed per block.   
- * @return none   
- *    
- * Description:    
- * \par    
- * pCoeffs holds the filter coefficients and has length numTaps.    
- * pState holds the filter's state variables and must be of length    
- * maxDelay + blockSize, where maxDelay    
- * is the maximum number of delay line values.    
- * blockSize is the    
- * number of words processed by arm_fir_sparse_q15() function.    
- */
-
-void arm_fir_sparse_init_q15(
-  arm_fir_sparse_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Assign TapDelay pointer */
-  S->pTapDelay = pTapDelay;
-
-  /* Assign MaxDelay */
-  S->maxDelay = maxDelay;
-
-  /* reset the stateIndex to 0 */
-  S->stateIndex = 0u;
-
-  /* Clear state buffer and size is always maxDelay + blockSize */
-  memset(pState, 0, (maxDelay + blockSize) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
deleted file mode 100755
index 82505504..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_sparse_init_q31.c    
-*    
-* Description:	Q31 sparse FIR filter initialization function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the Q31 sparse FIR filter.   
- * @param[in,out] *S         points to an instance of the Q31 sparse FIR structure.   
- * @param[in]     numTaps    number of nonzero coefficients in the filter.   
- * @param[in]     *pCoeffs   points to the array of filter coefficients.   
- * @param[in]     *pState    points to the state buffer.   
- * @param[in]     *pTapDelay points to the array of offset times.   
- * @param[in]     maxDelay   maximum offset time supported.   
- * @param[in]     blockSize  number of samples that will be processed per block.   
- * @return none   
- *    
- * Description:    
- * \par    
- * pCoeffs holds the filter coefficients and has length numTaps.    
- * pState holds the filter's state variables and must be of length    
- * maxDelay + blockSize, where maxDelay    
- * is the maximum number of delay line values.    
- * blockSize is the number of words processed by arm_fir_sparse_q31() function.    
- */
-
-void arm_fir_sparse_init_q31(
-  arm_fir_sparse_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Assign TapDelay pointer */
-  S->pTapDelay = pTapDelay;
-
-  /* Assign MaxDelay */
-  S->maxDelay = maxDelay;
-
-  /* reset the stateIndex to 0 */
-  S->stateIndex = 0u;
-
-  /* Clear state buffer and size is always maxDelay + blockSize */
-  memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
deleted file mode 100755
index 6c495a49..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_sparse_init_q7.c    
-*    
-* Description:	Q7 sparse FIR filter initialization function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the Q7 sparse FIR filter.   
- * @param[in,out] *S         points to an instance of the Q7 sparse FIR structure.   
- * @param[in]     numTaps    number of nonzero coefficients in the filter.   
- * @param[in]     *pCoeffs   points to the array of filter coefficients.   
- * @param[in]     *pState    points to the state buffer.   
- * @param[in]     *pTapDelay points to the array of offset times.   
- * @param[in]     maxDelay   maximum offset time supported.   
- * @param[in]     blockSize  number of samples that will be processed per block.   
- * @return none   
- *    
- * Description:    
- * \par    
- * pCoeffs holds the filter coefficients and has length numTaps.    
- * pState holds the filter's state variables and must be of length    
- * maxDelay + blockSize, where maxDelay    
- * is the maximum number of delay line values.    
- * blockSize is the    
- * number of samples processed by the arm_fir_sparse_q7() function.    
- */
-
-void arm_fir_sparse_init_q7(
-  arm_fir_sparse_instance_q7 * S,
-  uint16_t numTaps,
-  q7_t * pCoeffs,
-  q7_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Assign TapDelay pointer */
-  S->pTapDelay = pTapDelay;
-
-  /* Assign MaxDelay */
-  S->maxDelay = maxDelay;
-
-  /* reset the stateIndex to 0 */
-  S->stateIndex = 0u;
-
-  /* Clear state buffer and size is always maxDelay + blockSize */
-  memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c
deleted file mode 100755
index 23666853..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c
+++ /dev/null
@@ -1,481 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_sparse_q15.c    
-*    
-* Description:	Q15 sparse FIR filter processing function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief Processing function for the Q15 sparse FIR filter.   
- * @param[in]  *S           points to an instance of the Q15 sparse FIR structure.   
- * @param[in]  *pSrc        points to the block of input data.   
- * @param[out] *pDst        points to the block of output data   
- * @param[in]  *pScratchIn  points to a temporary buffer of size blockSize.   
- * @param[in]  *pScratchOut points to a temporary buffer of size blockSize.   
- * @param[in]  blockSize    number of input samples to process per call.   
- * @return none.   
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 32-bit accumulator.   
- * The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator.   
- * Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator.   
- * If the accumulator result overflows it will wrap around rather than saturate.   
- * After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format.    
- * In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.   
- */
-
-
-void arm_fir_sparse_q15(
-  arm_fir_sparse_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  q15_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize)
-{
-
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pIn = pSrc;                             /* Working pointer for input */
-  q15_t *pOut = pDst;                            /* Working pointer for output */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *px;                                     /* Temporary pointers for scratch buffer */
-  q15_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
-  q15_t *py = pState;                            /* Temporary pointers for state buffer */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Filter order */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  q15_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
-  q31_t *pScr2 = pScratchOut;                    /* Working pointer for pScratchOut */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in1, in2;                                /* Temporary variables */
-
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize);
-
-  /* Loop over the number of taps. */
-  tapCnt = numTaps;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q15(py, delaySize, &readIndex, 1,
-                       pb, pb, blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-  /* Loop over the blockSize. Unroll by a factor of 4.    
-   * Compute 4 multiplications at a time. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-   * compute the remaining samples */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and    
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_q15(py, delaySize, &readIndex, 1,
-                         pb, pb, blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pScratchOut = pScr2;
-
-    /* Loop over the blockSize. Unroll by a factor of 4.    
-     * Compute 4 MACS at a time. */
-    blkCnt = blockSize >> 2;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4,    
-     * compute the remaining samples */
-    blkCnt = blockSize % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and    
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-	
-	/* Compute last tap without the final read of pTapDelay */		
-
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_q15(py, delaySize, &readIndex, 1,
-											 pb, pb, blockSize, 1, blockSize);
-
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
-
-	/* Working pointer for scratch buffer of output values */
-	pScratchOut = pScr2;
-
-	/* Loop over the blockSize. Unroll by a factor of 4.    
-	 * Compute 4 MACS at a time. */
-	blkCnt = blockSize >> 2;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-	/* If the blockSize is not a multiple of 4,    
-	 * compute the remaining samples */
-	blkCnt = blockSize % 0x4u;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-  /* All the output values are in pScratchOut buffer.    
-     Convert them into 1.15 format, saturate and store in the destination buffer. */
-  /* Loop over the blockSize. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    in1 = *pScr2++;
-    in2 = *pScr2++;
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pOut)++ =
-      __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16),
-              16);
-
-#else
-    *__SIMD32(pOut)++ =
-      __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16),
-              16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    in1 = *pScr2++;
-
-    in2 = *pScr2++;
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pOut)++ =
-      __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16),
-              16);
-
-#else
-
-    *__SIMD32(pOut)++ =
-      __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16),
-              16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-
-    blkCnt--;
-
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-     remaining samples are processed in the below loop */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize);
-
-  /* Loop over the number of taps. */
-  tapCnt = numTaps;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q15(py, delaySize, &readIndex, 1,
-                       pb, pb, blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and           
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_q15(py, delaySize, &readIndex, 1,
-                         pb, pb, blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pScratchOut = pScr2;
-
-    blkCnt = blockSize;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and           
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-	
-	/* Compute last tap without the final read of pTapDelay */	
-	
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_q15(py, delaySize, &readIndex, 1,
-											 pb, pb, blockSize, 1, blockSize);
-
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
-
-	/* Working pointer for scratch buffer of output values */
-	pScratchOut = pScr2;
-
-	blkCnt = blockSize;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-  /* All the output values are in pScratchOut buffer.       
-     Convert them into 1.15 format, saturate and store in the destination buffer. */
-  /* Loop over the blockSize. */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
-    blkCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c
deleted file mode 100755
index 2183cd3a..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c
+++ /dev/null
@@ -1,461 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_sparse_q31.c    
-*    
-* Description:	Q31 sparse FIR filter processing function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ------------------------------------------------------------------- */
-#include "arm_math.h"
-
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief Processing function for the Q31 sparse FIR filter.   
- * @param[in]  *S          points to an instance of the Q31 sparse FIR structure.   
- * @param[in]  *pSrc       points to the block of input data.   
- * @param[out] *pDst       points to the block of output data   
- * @param[in]  *pScratchIn points to a temporary buffer of size blockSize.   
- * @param[in]  blockSize   number of input samples to process per call.   
- * @return none.   
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 32-bit accumulator.   
- * The 1.31 x 1.31 multiplications are truncated to 2.30 format.   
- * This leads to loss of precision on the intermediate multiplications and provides only a single guard bit.    
- * If the accumulator result overflows, it wraps around rather than saturate.   
- * In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.   
- */
-
-void arm_fir_sparse_q31(
-  arm_fir_sparse_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  q31_t * pScratchIn,
-  uint32_t blockSize)
-{
-
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *px;                                     /* Scratch buffer pointer */
-  q31_t *py = pState;                            /* Temporary pointers for state buffer */
-  q31_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
-  q31_t *pOut;                                   /* Destination pointer */
-  q63_t out;                                     /* Temporary output variable */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Filter order */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  q31_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
-  q31_t in;
-
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
-                        (int32_t *) pSrc, 1, blockSize);
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                       (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                       blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pOut = pDst;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Loop over the blockSize. Unroll by a factor of 4.    
-   * Compute 4 Multiplications at a time. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in the destination buffer */
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-   * compute the remaining samples */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in the destination buffer */
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and    
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                         blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pOut = pDst;
-
-    /* Loop over the blockSize. Unroll by a factor of 4.    
-     * Compute 4 MACS at a time. */
-    blkCnt = blockSize >> 2;
-
-    while(blkCnt > 0u)
-    {
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4,    
-     * compute the remaining samples */
-    blkCnt = blockSize % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and    
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-	
-	/* Compute last tap without the final read of pTapDelay */
-	
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-											 (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-											 blockSize);
-
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
-
-	/* Working pointer for scratch buffer of output values */
-	pOut = pDst;
-
-	/* Loop over the blockSize. Unroll by a factor of 4.    
-	 * Compute 4 MACS at a time. */
-	blkCnt = blockSize >> 2;
-
-	while(blkCnt > 0u)
-	{
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-	/* If the blockSize is not a multiple of 4,    
-	 * compute the remaining samples */
-	blkCnt = blockSize % 0x4u;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}	
-
-  /* Working output pointer is updated */
-  pOut = pDst;
-
-  /* Output is converted into 1.31 format. */
-  /* Loop over the blockSize. Unroll by a factor of 4.    
-   * process 4 output samples at a time. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    in = *pOut << 1;
-    *pOut++ = in;
-    in = *pOut << 1;
-    *pOut++ = in;
-    in = *pOut << 1;
-    *pOut++ = in;
-    in = *pOut << 1;
-    *pOut++ = in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-   * process the remaining output samples */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    in = *pOut << 1;
-    *pOut++ = in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in the destination buffer */
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and           
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                         blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pOut = pDst;
-
-    blkCnt = blockSize;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and           
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-	
-	/* Compute last tap without the final read of pTapDelay */	
-	
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-											 (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-											 blockSize);
-
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
-
-	/* Working pointer for scratch buffer of output values */
-	pOut = pDst;
-
-	blkCnt = blockSize;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-  /* Working output pointer is updated */
-  pOut = pDst;
-
-  /* Output is converted into 1.31 format. */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    in = *pOut << 1;
-    *pOut++ = in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c
deleted file mode 100755
index 9f43580b..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c
+++ /dev/null
@@ -1,480 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_sparse_q7.c    
-*    
-* Description:	Q7 sparse FIR filter processing function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ------------------------------------------------------------------- */
-#include "arm_math.h"
-
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-
-/**   
- * @brief Processing function for the Q7 sparse FIR filter.   
- * @param[in]  *S           points to an instance of the Q7 sparse FIR structure.   
- * @param[in]  *pSrc        points to the block of input data.   
- * @param[out] *pDst        points to the block of output data   
- * @param[in]  *pScratchIn  points to a temporary buffer of size blockSize.   
- * @param[in]  *pScratchOut points to a temporary buffer of size blockSize.   
- * @param[in]  blockSize    number of input samples to process per call.   
- * @return none.   
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.    
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * The accumulator is then converted to 18.7 format by discarding the low 7 bits.   
- * Finally, the result is truncated to 1.7 format.   
- */
-
-void arm_fir_sparse_q7(
-  arm_fir_sparse_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  q7_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize)
-{
-
-  q7_t *pState = S->pState;                      /* State pointer */
-  q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
-  q7_t *px;                                      /* Scratch buffer pointer */
-  q7_t *py = pState;                             /* Temporary pointers for state buffer */
-  q7_t *pb = pScratchIn;                         /* Temporary pointers for scratch buffer */
-  q7_t *pOut = pDst;                             /* Destination pointer */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Filter order */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  q7_t coeff = *pCoeffs++;                       /* Read the coefficient value */
-  q31_t *pScr2 = pScratchOut;                    /* Working pointer for scratch buffer of output values */
-  q31_t in;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t in1, in2, in3, in4;
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1,
-                       blockSize);
-
-  /* Loop over the number of taps. */
-  tapCnt = numTaps;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-                      (int32_t) blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-  /* Loop over the blockSize. Unroll by a factor of 4.    
-   * Compute 4 multiplications at a time. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-   * compute the remaining samples */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and    
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-                        (int32_t) blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pScratchOut = pScr2;
-
-    /* Loop over the blockSize. Unroll by a factor of 4.    
-     * Compute 4 MACS at a time. */
-    blkCnt = blockSize >> 2;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4,    
-     * compute the remaining samples */
-    blkCnt = blockSize % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and    
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = ((int32_t) S->stateIndex -
-                 (int32_t) blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-	
-	/* Compute last tap without the final read of pTapDelay */	
-	
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-											(int32_t) blockSize, 1, blockSize);
-
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
-
-	/* Working pointer for scratch buffer of output values */
-	pScratchOut = pScr2;
-
-	/* Loop over the blockSize. Unroll by a factor of 4.    
-	 * Compute 4 MACS at a time. */
-	blkCnt = blockSize >> 2;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-	/* If the blockSize is not a multiple of 4,    
-	 * compute the remaining samples */
-	blkCnt = blockSize % 0x4u;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-  /* All the output values are in pScratchOut buffer.    
-     Convert them into 1.15 format, saturate and store in the destination buffer. */
-  /* Loop over the blockSize. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    in1 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-    in2 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-    in3 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-    in4 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-
-    *__SIMD32(pOut)++ = __PACKq7(in1, in2, in3, in4);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-     remaining samples are processed in the below loop */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1,
-                       blockSize);
-
-  /* Loop over the number of taps. */
-  tapCnt = numTaps;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-                      (int32_t) blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-  /* Loop over the blockSize */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and           
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-                        (int32_t) blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pScratchOut = pScr2;
-
-    /* Loop over the blockSize */
-    blkCnt = blockSize;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and           
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex =
-      ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-	
-	/* Compute last tap without the final read of pTapDelay */	
-	
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-											(int32_t) blockSize, 1, blockSize);
-
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
-
-	/* Working pointer for scratch buffer of output values */
-	pScratchOut = pScr2;
-
-	/* Loop over the blockSize */
-	blkCnt = blockSize;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-  /* All the output values are in pScratchOut buffer.       
-     Convert them into 1.15 format, saturate and store in the destination buffer. */
-  /* Loop over the blockSize. */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c
deleted file mode 100755
index f3056f4d..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c
+++ /dev/null
@@ -1,447 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_iir_lattice_f32.c    
-*    
-* Description:	Floating-point IIR Lattice filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup IIR_Lattice Infinite Impulse Response (IIR) Lattice Filters    
- *    
- * This set of functions implements lattice filters    
- * for Q15, Q31 and floating-point data types.  Lattice filters are used in a     
- * variety of adaptive filter applications.  The filter structure has feedforward and    
- * feedback components and the net impulse response is infinite length.    
- * The functions operate on blocks    
- * of input and output data and each call to the function processes    
- * blockSize samples through the filter.  pSrc and    
- * pDst point to input and output arrays containing blockSize values.    
-    
- * \par Algorithm:    
- * \image html IIRLattice.gif "Infinite Impulse Response Lattice filter"    
- * 
    
- *    fN(n)   =  x(n)    
- *    fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ...1    
- *    gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ...1    
- *    y(n)    = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)    
- * 
    
- * \par    
- * pkCoeffs points to array of reflection coefficients of size numStages.     
- * Reflection coefficients are stored in time-reversed order.    
- * \par    
- * 
    
- *    {kN, kN-1, ....k1}    
- * 
    
- * pvCoeffs points to the array of ladder coefficients of size (numStages+1).     
- * Ladder coefficients are stored in time-reversed order.    
- * \par    
- * 
    
- *    {vN, vN-1, ...v0}    
- * 
    
- * pState points to a state array of size numStages + blockSize.    
- * The state variables shown in the figure above (the g values) are stored in the pState array.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
-  *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.   
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to zero. 
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:    
- * 
    
- *arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};    
- *arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};    
- *arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};    
- * 
    
- * \par    
- * where numStages is the number of stages in the filter; pState points to the state buffer array;    
- * pkCoeffs points to array of the reflection coefficients; pvCoeffs points to the array of ladder coefficients.    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the IIR lattice filter functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-/**    
- * @brief Processing function for the floating-point IIR lattice filter.    
- * @param[in] *S points to an instance of the floating-point IIR lattice structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in] blockSize number of samples to process.    
- * @return none.    
- */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_iir_lattice_f32(
-  const arm_iir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t fnext1, gcurr1, gnext;               /* Temporary variables for lattice stages */
-  float32_t acc;                                 /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* temporary variables for counts */
-  float32_t *px1, *px2, *pk, *pv;                /* temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  float32_t *pState;                             /* State pointer */
-  float32_t *pStateCurnt;                        /* State current pointer */
-  float32_t k1, k2;
-  float32_t v1, v2, v3, v4;
-  float32_t gcurr2;
-  float32_t fnext2;
-
-  /* initialise loop count */
-  blkCnt = blockSize;
-
-  /* initialise state pointer */
-  pState = &S->pState[0];
-
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fnext2 = *pSrc++;
-
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-
-    /* Set accumulator to zero */
-    acc = 0.0;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = (numStages) >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Read gN-1(n-1) from state buffer */
-      gcurr1 = *px1;
-
-      /* read reflection coefficient kN */
-      k1 = *pk;
-
-      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-      fnext1 = fnext2 - (k1 * gcurr1);
-
-      /* read ladder coefficient vN */
-      v1 = *pv;
-
-      /* read next reflection coefficient kN-1 */
-      k2 = *(pk + 1u);
-
-      /* Read gN-2(n-1) from state buffer */
-      gcurr2 = *(px1 + 1u);
-
-      /* read next ladder coefficient vN-1 */
-      v2 = *(pv + 1u);
-
-      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
-      fnext2 = fnext1 - (k2 * gcurr2);
-
-      /* gN(n)   = kN * fN-1(n) + gN-1(n-1) */
-      gnext = gcurr1 + (k1 * fnext1);
-
-      /* read reflection coefficient kN-2 */
-      k1 = *(pk + 2u);
-
-      /* write gN(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* Read gN-3(n-1) from state buffer */
-      gcurr1 = *(px1 + 2u);
-
-      /* y(n) += gN(n) * vN  */
-      acc += (gnext * v1);
-
-      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
-      fnext1 = fnext2 - (k1 * gcurr1);
-
-      /* gN-1(n)   = kN-1 * fN-2(n) + gN-2(n-1) */
-      gnext = gcurr2 + (k2 * fnext2);
-
-      /* Read gN-4(n-1) from state buffer */
-      gcurr2 = *(px1 + 3u);
-
-      /* y(n) += gN-1(n) * vN-1  */
-      acc += (gnext * v2);
-
-      /* read reflection coefficient kN-3 */
-      k2 = *(pk + 3u);
-
-      /* write gN-1(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
-      fnext2 = fnext1 - (k2 * gcurr2);
-
-      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
-      gnext = gcurr1 + (k1 * fnext1);
-
-      /* read ladder coefficient vN-2 */
-      v3 = *(pv + 2u);
-
-      /* y(n) += gN-2(n) * vN-2  */
-      acc += (gnext * v3);
-
-      /* write gN-2(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* update pointer */
-      pk += 4u;
-
-      /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
-      gnext = (fnext2 * k2) + gcurr2;
-
-      /* read next ladder coefficient vN-3 */
-      v4 = *(pv + 3u);
-
-      /* y(n) += gN-4(n) * vN-4  */
-      acc += (gnext * v4);
-
-      /* write gN-3(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* update pointers */
-      px1 += 4u;
-      pv += 4u;
-
-      tapCnt--;
-
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = (numStages) % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      gcurr1 = *px1++;
-      /* Process sample for last taps */
-      fnext1 = fnext2 - ((*pk) * gcurr1);
-      gnext = (fnext1 * (*pk++)) + gcurr1;
-      /* Output samples for last taps */
-      acc += (gnext * (*pv++));
-      *px2++ = gnext;
-      fnext2 = fnext1;
-
-      tapCnt--;
-
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (fnext2 * (*pv));
-
-    *px2++ = fnext2;
-
-    /* write out into pDst */
-    *pDst++ = acc;
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 1u;
-
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer        
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  tapCnt = numStages >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numStages) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-}
-
-#else
-
-void arm_iir_lattice_f32(
-  const arm_iir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t fcurr, fnext = 0, gcurr, gnext;      /* Temporary variables for lattice stages */
-  float32_t acc;                                 /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* temporary variables for counts */
-  float32_t *px1, *px2, *pk, *pv;                /* temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  float32_t *pState;                             /* State pointer */
-  float32_t *pStateCurnt;                        /* State current pointer */
-
-
-  /* Run the below code for Cortex-M0 */
-
-  blkCnt = blockSize;
-
-  pState = &S->pState[0];
-
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0.0f;
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-
-    /* Process sample for numStages */
-    tapCnt = numStages;
-
-    while(tapCnt > 0u)
-    {
-      gcurr = *px1++;
-      /* Process sample for last taps */
-      fnext = fcurr - ((*pk) * gcurr);
-      gnext = (fnext * (*pk++)) + gcurr;
-
-      /* Output samples for last taps */
-      acc += (gnext * (*pv++));
-      *px2++ = gnext;
-      fcurr = fnext;
-
-      /* Decrementing loop counter */
-      tapCnt--;
-
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (fnext * (*pv));
-
-    *px2++ = fnext;
-
-    /* write out into pDst */
-    *pDst++ = acc;
-
-    /* Advance the state pointer by 1 to process the next group of samples */
-    pState = pState + 1u;
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer           
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  tapCnt = numStages;
-
-  /* Copy the data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-
-/**    
- * @} end of IIR_Lattice group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
deleted file mode 100755
index 89bfb686..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_iir_lattice_init_f32.c    
-*    
-* Description:  Floating-point IIR lattice filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-/**    
- * @brief Initialization function for the floating-point IIR lattice filter.    
- * @param[in] *S points to an instance of the floating-point IIR lattice structure.    
- * @param[in] numStages number of stages in the filter.    
- * @param[in] *pkCoeffs points to the reflection coefficient buffer.  The array is of length numStages.    
- * @param[in] *pvCoeffs points to the ladder coefficient buffer.  The array is of length numStages+1.    
- * @param[in] *pState points to the state buffer.  The array is of length numStages+blockSize.    
- * @param[in] blockSize number of samples to process.    
- * @return none.    
- */
-
-void arm_iir_lattice_init_f32(
-  arm_iir_lattice_instance_f32 * S,
-  uint16_t numStages,
-  float32_t * pkCoeffs,
-  float32_t * pvCoeffs,
-  float32_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign reflection coefficient pointer */
-  S->pkCoeffs = pkCoeffs;
-
-  /* Assign ladder coefficient pointer */
-  S->pvCoeffs = pvCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numStages */
-  memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-
-}
-
-  /**    
-   * @} end of IIR_Lattice group    
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
deleted file mode 100755
index bc5c0af8..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_iir_lattice_init_q15.c    
-*    
-* Description:  Q15 IIR lattice filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for the Q15 IIR lattice filter.    
-   * @param[in] *S points to an instance of the Q15 IIR lattice structure.    
-   * @param[in] numStages  number of stages in the filter.    
-   * @param[in] *pkCoeffs points to reflection coefficient buffer.  The array is of length numStages.    
-   * @param[in] *pvCoeffs points to ladder coefficient buffer.  The array is of length numStages+1.    
-   * @param[in] *pState points to state buffer.  The array is of length numStages+blockSize.    
-   * @param[in] blockSize number of samples to process per call.    
-   * @return none.    
-   */
-
-void arm_iir_lattice_init_q15(
-  arm_iir_lattice_instance_q15 * S,
-  uint16_t numStages,
-  q15_t * pkCoeffs,
-  q15_t * pvCoeffs,
-  q15_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign reflection coefficient pointer */
-  S->pkCoeffs = pkCoeffs;
-
-  /* Assign ladder coefficient pointer */
-  S->pvCoeffs = pvCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numStages */
-  memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-
-}
-
-/**    
- * @} end of IIR_Lattice group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
deleted file mode 100755
index d8e26a37..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_iir_lattice_init_q31.c    
-*    
-* Description:  Initialization function for the Q31 IIR lattice filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for the Q31 IIR lattice filter.    
-   * @param[in] *S points to an instance of the Q31 IIR lattice structure.    
-   * @param[in] numStages number of stages in the filter.    
-   * @param[in] *pkCoeffs points to the reflection coefficient buffer.  The array is of length numStages.    
-   * @param[in] *pvCoeffs points to the ladder coefficient buffer.  The array is of length numStages+1.    
-   * @param[in] *pState points to the state buffer.  The array is of length numStages+blockSize.    
-   * @param[in] blockSize number of samples to process.    
-   * @return none.    
-   */
-
-void arm_iir_lattice_init_q31(
-  arm_iir_lattice_instance_q31 * S,
-  uint16_t numStages,
-  q31_t * pkCoeffs,
-  q31_t * pvCoeffs,
-  q31_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign reflection coefficient pointer */
-  S->pkCoeffs = pkCoeffs;
-
-  /* Assign ladder coefficient pointer */
-  S->pvCoeffs = pvCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numStages */
-  memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-
-}
-
-/**    
- * @} end of IIR_Lattice group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c
deleted file mode 100755
index 5bee62d3..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c
+++ /dev/null
@@ -1,464 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_iir_lattice_q15.c    
-*    
-* Description:	Q15 IIR lattice filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 IIR lattice filter.    
- * @param[in] *S points to an instance of the Q15 IIR lattice structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in] blockSize number of samples to process.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.    
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.    
- */
-
-void arm_iir_lattice_q15(
-  const arm_iir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t fcurr, fnext, gcurr = 0, gnext;          /* Temporary variables for lattice stages */
-  q15_t gnext1, gnext2;                          /* Temporary variables for lattice stages */
-  uint32_t stgCnt;                               /* Temporary variables for counts */
-  q63_t acc;                                     /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
-  q15_t *px1, *px2, *pk, *pv;                    /* temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  q15_t *pState;                                 /* State pointer */
-  q15_t *pStateCurnt;                            /* State current pointer */
-  q15_t out;                                     /* Temporary variable for output */
-  q31_t v;                                       /* Temporary variable for ladder coefficient */
-#ifdef UNALIGNED_SUPPORT_DISABLE
-	q15_t v1, v2;
-#endif
-
-
-  blkCnt = blockSize;
-
-  pState = &S->pState[0];
-
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0;
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-
-    /* Process sample for first tap */
-    gcurr = *px1++;
-    /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-    fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
-    fnext = __SSAT(fnext, 16);
-    /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-    gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
-    gnext = __SSAT(gnext, 16);
-    /* write gN(n) into state for next sample processing */
-    *px2++ = (q15_t) gnext;
-    /* y(n) += gN(n) * vN  */
-    acc += (q31_t) ((gnext * (*pv++)));
-
-
-    /* Update f values for next coefficient processing */
-    fcurr = fnext;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = (numStages - 1u) >> 2;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Process sample for 2nd, 6th ...taps */
-      /* Read gN-2(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 2nd, 6th .. taps */
-      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
-      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
-      fnext = __SSAT(fnext, 16);
-      /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
-      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
-      gnext1 = (q15_t) __SSAT(gnext, 16);
-      /* write gN-1(n) into state */
-      *px2++ = (q15_t) gnext1;
-
-
-      /* Process sample for 3nd, 7th ...taps */
-      /* Read gN-3(n-1) from state */
-      gcurr = *px1++;
-      /* Process sample for 3rd, 7th .. taps */
-      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
-      fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
-      fcurr = __SSAT(fcurr, 16);
-      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
-      gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
-      gnext2 = (q15_t) __SSAT(gnext, 16);
-      /* write gN-2(n) into state */
-      *px2++ = (q15_t) gnext2;
-
-      /* Read vN-1 and vN-2 at a time */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      v = *__SIMD32(pv)++;
-
-#else
-
-	  v1 = *pv++;
-	  v2 = *pv++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  v = __PKHBT(v1, v2, 16);
-
-#else
-
-	  v = __PKHBT(v2, v1, 16);
-
-#endif	/* 	#ifndef ARM_MATH_BIG_ENDIAN		*/
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE */
-
-
-      /* Pack gN-1(n) and gN-2(n) */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      gnext = __PKHBT(gnext1, gnext2, 16);
-
-#else
-
-      gnext = __PKHBT(gnext2, gnext1, 16);
-
-#endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* y(n) += gN-1(n) * vN-1  */
-      /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
-      /* y(n) += gN-2(n) * vN-2  */
-      /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
-      acc = __SMLALD(gnext, v, acc);
-
-
-      /* Process sample for 4th, 8th ...taps */
-      /* Read gN-4(n-1) from state */
-      gcurr = *px1++;
-      /* Process sample for 4th, 8th .. taps */
-      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
-      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
-      fnext = __SSAT(fnext, 16);
-      /* gN-3(n) = kN-3 * fN-1(n) + gN-1(n-1) */
-      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
-      gnext1 = (q15_t) __SSAT(gnext, 16);
-      /* write  gN-3(n) for the next sample process */
-      *px2++ = (q15_t) gnext1;
-
-
-      /* Process sample for 5th, 9th ...taps */
-      /* Read gN-5(n-1) from state */
-      gcurr = *px1++;
-      /* Process sample for 5th, 9th .. taps */
-      /* fN-5(n) = fN-4(n) - kN-4 * gN-5(n-1) */
-      fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
-      fcurr = __SSAT(fcurr, 16);
-      /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
-      gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
-      gnext2 = (q15_t) __SSAT(gnext, 16);
-      /* write      gN-4(n) for the next sample process */
-      *px2++ = (q15_t) gnext2;
-
-      /* Read vN-3 and vN-4 at a time */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      v = *__SIMD32(pv)++;
-
-#else
-
-	  v1 = *pv++;
-	  v2 = *pv++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  v = __PKHBT(v1, v2, 16);
-
-#else
-
-	  v = __PKHBT(v2, v1, 16);
-
-#endif	/* #ifndef ARM_MATH_BIG_ENDIAN	 */
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE */
-
-
-      /* Pack gN-3(n) and gN-4(n) */
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      gnext = __PKHBT(gnext1, gnext2, 16);
-
-#else
-
-      gnext = __PKHBT(gnext2, gnext1, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* y(n) += gN-4(n) * vN-4  */
-      /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
-      /* y(n) += gN-3(n) * vN-3  */
-      /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
-      acc = __SMLALD(gnext, v, acc);
-
-      tapCnt--;
-
-    }
-
-    fnext = fcurr;
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = (numStages - 1u) % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      gcurr = *px1++;
-      /* Process sample for last taps */
-      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
-      fnext = __SSAT(fnext, 16);
-      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
-      gnext = __SSAT(gnext, 16);
-      /* Output samples for last taps */
-      acc += (q31_t) (((q31_t) gnext * (*pv++)));
-      *px2++ = (q15_t) gnext;
-      fcurr = fnext;
-
-      tapCnt--;
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (q31_t) (((q31_t) fnext * (*pv++)));
-
-    out = (q15_t) __SSAT(acc >> 15, 16);
-    *px2++ = (q15_t) fnext;
-
-    /* write out into pDst */
-    *pDst++ = out;
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 1u;
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer    
-     for the preperation of next frame process */
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  stgCnt = (numStages >> 2u);
-
-  /* copy data */
-  while(stgCnt > 0u)
-  {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-#else
-
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-#endif /*	#ifndef UNALIGNED_SUPPORT_DISABLE */
-
-    /* Decrement the loop counter */
-    stgCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  stgCnt = (numStages) % 0x4u;
-
-  /* copy data */
-  while(stgCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    stgCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t fcurr, fnext = 0, gcurr = 0, gnext;      /* Temporary variables for lattice stages */
-  uint32_t stgCnt;                               /* Temporary variables for counts */
-  q63_t acc;                                     /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
-  q15_t *px1, *px2, *pk, *pv;                    /* temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  q15_t *pState;                                 /* State pointer */
-  q15_t *pStateCurnt;                            /* State current pointer */
-  q15_t out;                                     /* Temporary variable for output */
-
-
-  blkCnt = blockSize;
-
-  pState = &S->pState[0];
-
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0;
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-    tapCnt = numStages;
-
-    while(tapCnt > 0u)
-    {
-      gcurr = *px1++;
-      /* Process sample */
-      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-      fnext = fcurr - ((gcurr * (*pk)) >> 15);
-      fnext = __SSAT(fnext, 16);
-      /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-      gnext = ((fnext * (*pk++)) >> 15) + gcurr;
-      gnext = __SSAT(gnext, 16);
-      /* Output samples */
-      /* y(n) += gN(n) * vN */
-      acc += (q31_t) ((gnext * (*pv++)));
-      /* write gN(n) into state for next sample processing */
-      *px2++ = (q15_t) gnext;
-      /* Update f values for next coefficient processing */
-      fcurr = fnext;
-
-      tapCnt--;
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (q31_t) ((fnext * (*pv++)));
-
-    out = (q15_t) __SSAT(acc >> 15, 16);
-    *px2++ = (q15_t) fnext;
-
-    /* write out into pDst */
-    *pDst++ = out;
-
-    /* Advance the state pointer by 1 to process the next group of samples */
-    pState = pState + 1u;
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer           
-     for the preperation of next frame process */
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  stgCnt = numStages;
-
-  /* copy data */
-  while(stgCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    stgCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-
-
-
-/**    
- * @} end of IIR_Lattice group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c
deleted file mode 100755
index 347c857b..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c
+++ /dev/null
@@ -1,350 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_iir_lattice_q31.c    
-*    
-* Description:	Q31 IIR lattice filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 IIR lattice filter.    
- * @param[in] *S points to an instance of the Q31 IIR lattice structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in] blockSize number of samples to process.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits.    
- * After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format.    
- */
-
-void arm_iir_lattice_q31(
-  const arm_iir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t fcurr, fnext = 0, gcurr = 0, gnext;      /* Temporary variables for lattice stages */
-  q63_t acc;                                     /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
-  q31_t *px1, *px2, *pk, *pv;                    /* Temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  q31_t *pState;                                 /* State pointer */
-  q31_t *pStateCurnt;                            /* State current pointer */
-
-  blkCnt = blockSize;
-
-  pState = &S->pState[0];
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0;
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-
-    /* Process sample for first tap */
-    gcurr = *px1++;
-    /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-    fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-    /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-    gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
-    /* write gN-1(n-1) into state for next sample processing */
-    *px2++ = gnext;
-    /* y(n) += gN(n) * vN  */
-    acc += ((q63_t) gnext * *pv++);
-
-    /* Update f values for next coefficient processing */
-    fcurr = fnext;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = (numStages - 1u) >> 2;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Process sample for 2nd, 6th .. taps */
-      /* Read gN-2(n-1) from state buffer */
-      gcurr = *px1++;
-      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
-      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-      /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
-      /* y(n) += gN-1(n) * vN-1  */
-      /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-1(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* Process sample for 3nd, 7th ...taps */
-      /* Read gN-3(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 3rd, 7th .. taps */
-      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
-      fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
-      /* y(n) += gN-2(n) * vN-2  */
-      /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-2(n) into state for next sample processing */
-      *px2++ = gnext;
-
-
-      /* Process sample for 4th, 8th ...taps */
-      /* Read gN-4(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 4th, 8th .. taps */
-      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
-      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-      /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
-      /* y(n) += gN-3(n) * vN-3  */
-      /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-3(n) into state for next sample processing */
-      *px2++ = gnext;
-
-
-      /* Process sample for 5th, 9th ...taps */
-      /* Read gN-5(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 5th, 9th .. taps */
-      /* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */
-      fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-      /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
-      /* y(n) += gN-4(n) * vN-4  */
-      /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-4(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      tapCnt--;
-
-    }
-
-    fnext = fcurr;
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = (numStages - 1u) % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      gcurr = *px1++;
-      /* Process sample for last taps */
-      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
-      /* Output samples for last taps */
-      acc += ((q63_t) gnext * *pv++);
-      *px2++ = gnext;
-      fcurr = fnext;
-
-      tapCnt--;
-
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (q63_t) fnext *(
-  *pv++);
-
-    *px2++ = fnext;
-
-    /* write out into pDst */
-    *pDst++ = (q31_t) (acc >> 31u);
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 1u;
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer    
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  tapCnt = numStages >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numStages) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  };
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0;
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-    tapCnt = numStages;
-
-    while(tapCnt > 0u)
-    {
-      gcurr = *px1++;
-      /* Process sample */
-      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-      fnext =
-        clip_q63_to_q31(((q63_t) fcurr -
-                         ((q31_t) (((q63_t) gcurr * (*pk)) >> 31))));
-      /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-      gnext =
-        clip_q63_to_q31(((q63_t) gcurr +
-                         ((q31_t) (((q63_t) fnext * (*pk++)) >> 31))));
-      /* Output samples */
-      /* y(n) += gN(n) * vN  */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-1(n-1) into state for next sample processing */
-      *px2++ = gnext;
-      /* Update f values for next coefficient processing */
-      fcurr = fnext;
-
-      tapCnt--;
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (q63_t) fnext *(
-  *pv++);
-
-    *px2++ = fnext;
-
-    /* write out into pDst */
-    *pDst++ = (q31_t) (acc >> 31u);
-
-    /* Advance the state pointer by 1 to process the next group of samples */
-    pState = pState + 1u;
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer           
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  tapCnt = numStages;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-
-
-
-/**    
- * @} end of IIR_Lattice group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c
deleted file mode 100755
index 269330ca..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c
+++ /dev/null
@@ -1,442 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_f32.c    
-*    
-* Description:	Processing function for the floating-point LMS filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup LMS Least Mean Square (LMS) Filters    
- *    
- * LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions.    
- * LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal.    
- * Adaptive filters are often used in communication systems, equalizers, and noise removal.    
- * The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types.    
- * The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal.    
- *    
- * An LMS filter consists of two components as shown below.    
- * The first component is a standard transversal or FIR filter.    
- * The second component is a coefficient update mechanism.    
- * The LMS filter has two input signals.    
- * The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.    
- * That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.    
- * The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.    
- * This "error signal" tends towards zero as the filter adapts.    
- * The LMS processing functions accept the input and reference input signals and generate the filter output and error signal.    
- * \image html LMS.gif "Internal structure of the Least Mean Square filter"    
- *    
- * The functions operate on blocks of data and each call to the function processes    
- * blockSize samples through the filter.    
- * pSrc points to input signal, pRef points to reference signal,    
- * pOut points to output signal and pErr points to error signal.    
- * All arrays contain blockSize values.    
- *    
- * The functions operate on a block-by-block basis.    
- * Internally, the filter coefficients b[n] are updated on a sample-by-sample basis.    
- * The convergence of the LMS filter is slower compared to the normalized LMS algorithm.    
- *    
- * \par Algorithm:    
- * The output signal y[n] is computed by a standard FIR filter:    
- * 
    
- *     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]    
- * 
    
- *    
- * \par    
- * The error signal equals the difference between the reference signal d[n] and the filter output:    
- * 
    
- *     e[n] = d[n] - y[n].    
- * 
    
- *    
- * \par    
- * After each sample of the error signal is computed, the filter coefficients b[k] are updated on a sample-by-sample basis:    
- * 
    
- *     b[k] = b[k] + e[n] * mu * x[n-k],  for k=0, 1, ..., numTaps-1    
- * 
    
- * where mu is the step size and controls the rate of coefficient convergence.    
- *\par    
- * In the APIs, pCoeffs points to a coefficient array of size numTaps.    
- * Coefficients are stored in time reversed order.    
- * \par    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to a state array of size numTaps + blockSize - 1.    
- * Samples in the state buffer are stored in the order:    
- * \par    
- * 
    
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}    
- * 
    
- * \par    
- * Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples.    
- * The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,    
- * to be avoided and yields a significant speed improvement.    
- * The state variables are updated after each block of data is processed.    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter and    
- * coefficient and state arrays cannot be shared among instances.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numTaps, pCoeffs, mu, postShift (not for f32), pState. Also set all of the values in pState to zero. 
- *
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros before static initialization.    
- * The code below statically initializes each of the 3 different data type filter instance structures    
- * 
    
- *    arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};    
- *    arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};    
- *    arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};    
- * 
    
- * where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer;    
- * pCoeffs is the address of the coefficient buffer; mu is the step size parameter; and postShift is the shift applied to coefficients.    
- *    
- * \par Fixed-Point Behavior:    
- * Care must be taken when using the Q15 and Q31 versions of the LMS filter.    
- * The following issues must be considered:    
- * - Scaling of coefficients    
- * - Overflow and saturation    
- *    
- * \par Scaling of Coefficients:    
- * Filter coefficients are represented as fractional values and    
- * coefficients are restricted to lie in the range [-1 +1).    
- * The fixed-point functions have an additional scaling parameter postShift.    
- * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.    
- * This essentially scales the filter coefficients by 2^postShift and    
- * allows the filter coefficients to exceed the range [+1 -1).    
- * The value of postShift is set by the user based on the expected gain through the system being modeled.    
- *    
- * \par Overflow and Saturation:    
- * Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are    
- * described separately as part of the function specific documentation below.    
- */
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
-/**           
- * @details           
- * This function operates on floating-point data types.       
- *    
- * @brief Processing function for floating-point LMS filter.    
- * @param[in]  *S points to an instance of the floating-point LMS filter structure.    
- * @param[in]  *pSrc points to the block of input data.    
- * @param[in]  *pRef points to the block of reference data.    
- * @param[out] *pOut points to the block of output data.    
- * @param[out] *pErr points to the block of error data.    
- * @param[in]  blockSize number of samples to process.    
- * @return     none.    
- */
-
-void arm_lms_f32(
-  const arm_lms_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pRef,
-  float32_t * pOut,
-  float32_t * pErr,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-  float32_t mu = S->mu;                          /* Adaptive factor */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  float32_t sum, e, d;                           /* accumulator, error, reference data sample */
-  float32_t w = 0.0f;                            /* weight factor */
-
-  e = 0.0f;
-  d = 0.0f;
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  blkCnt = blockSize;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Set the accumulator to zero */
-    sum = 0.0f;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* The result in the accumulator, store in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Compute and store error */
-    d = (float32_t) (*pRef++);
-    e = d - sum;
-    *pErr++ = e;
-
-    /* Calculation of Weighting factor for the updating filter coefficients */
-    w = e * mu;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop unrolling for (numTaps - 1u) samples copy */
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    sum = 0.0f;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* The result is stored in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Compute and store error */
-    d = (float32_t) (*pRef++);
-    e = d - sum;
-    *pErr++ = e;
-
-    /* Weighting factor for the LMS version */
-    w = e * mu;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the        
-   * start of the state buffer. This prepares the state buffer for the        
-   * next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /*  Copy (numTaps - 1u) samples  */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
-   * @} end of LMS group    
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c
deleted file mode 100755
index a347ddb7..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_init_f32.c    
-*    
-* Description:  Floating-point LMS filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for floating-point LMS filter.    
-   * @param[in] *S points to an instance of the floating-point LMS filter structure.    
-   * @param[in] numTaps  number of filter coefficients.    
-   * @param[in] *pCoeffs points to the coefficient buffer.    
-   * @param[in] *pState points to state buffer.    
-   * @param[in] mu step size that controls filter coefficient updates.    
-   * @param[in] blockSize number of samples to process.    
-   * @return none.    
-   */
-
-/**    
- * \par Description:    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * The initial filter coefficients serve as a starting point for the adaptive filter.    
- * pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_f32().    
- */
-
-void arm_lms_init_f32(
-  arm_lms_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  float32_t mu,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps */
-  memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-}
-
-/**    
- * @} end of LMS group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c
deleted file mode 100755
index cac7dfc5..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_init_q15.c    
-*    
-* Description:  Q15 LMS filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
-/**    
-* @brief Initialization function for the Q15 LMS filter.    
-* @param[in] *S points to an instance of the Q15 LMS filter structure.    
-* @param[in] numTaps  number of filter coefficients.    
-* @param[in] *pCoeffs points to the coefficient buffer.    
-* @param[in] *pState points to the state buffer.    
-* @param[in] mu step size that controls filter coefficient updates.    
-* @param[in] blockSize number of samples to process.    
-* @param[in] postShift bit shift applied to coefficients.    
-* @return    none.    
-*    
-* \par Description:    
-* pCoeffs points to the array of filter coefficients stored in time reversed order:    
-* 
    
-*    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
-* 
    
-* The initial filter coefficients serve as a starting point for the adaptive filter.    
-* pState points to the array of state variables and size of array is    
-* numTaps+blockSize-1 samples, where blockSize is the number of    
-* input samples processed by each call to arm_lms_q15().    
-*/
-
-void arm_lms_init_q15(
-  arm_lms_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  q15_t mu,
-  uint32_t blockSize,
-  uint32_t postShift)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Assign postShift value to be applied */
-  S->postShift = postShift;
-
-}
-
-/**    
- * @} end of LMS group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c
deleted file mode 100755
index d425557b..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_init_q31.c    
-*    
-* Description:  Q31 LMS filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for Q31 LMS filter.    
-   * @param[in] *S points to an instance of the Q31 LMS filter structure.    
-   * @param[in] numTaps  number of filter coefficients.    
-   * @param[in] *pCoeffs points to coefficient buffer.    
-   * @param[in] *pState points to state buffer.    
-   * @param[in] mu step size that controls filter coefficient updates.    
-   * @param[in] blockSize number of samples to process.    
-   * @param[in] postShift bit shift applied to coefficients.    
-   * @return none.    
- *    
- * \par Description:    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * The initial filter coefficients serve as a starting point for the adaptive filter.    
- * pState points to an array of length numTaps+blockSize-1 samples,    
- * where blockSize is the number of input samples processed by each call to    
- * arm_lms_q31().    
- */
-
-void arm_lms_init_q31(
-  arm_lms_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  q31_t mu,
-  uint32_t blockSize,
-  uint32_t postShift)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, ((uint32_t) numTaps + (blockSize - 1u)) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Assign postShift value to be applied */
-  S->postShift = postShift;
-
-}
-
-/**    
- * @} end of LMS group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c
deleted file mode 100755
index 6e3117fe..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c
+++ /dev/null
@@ -1,466 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_norm_f32.c    
-*    
-* Description:	Processing function for the floating-point Normalised LMS.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup LMS_NORM Normalized LMS Filters    
- *    
- * This set of functions implements a commonly used adaptive filter.    
- * It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization    
- * factor which increases the adaptation rate of the filter.    
- * The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types.    
- *    
- * A normalized least mean square (NLMS) filter consists of two components as shown below.    
- * The first component is a standard transversal or FIR filter.    
- * The second component is a coefficient update mechanism.    
- * The NLMS filter has two input signals.    
- * The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.    
- * That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.    
- * The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.    
- * This "error signal" tends towards zero as the filter adapts.    
- * The NLMS processing functions accept the input and reference input signals and generate the filter output and error signal.    
- * \image html LMS.gif "Internal structure of the NLMS adaptive filter"    
- *    
- * The functions operate on blocks of data and each call to the function processes    
- * blockSize samples through the filter.    
- * pSrc points to input signal, pRef points to reference signal,    
- * pOut points to output signal and pErr points to error signal.    
- * All arrays contain blockSize values.    
- *    
- * The functions operate on a block-by-block basis.    
- * Internally, the filter coefficients b[n] are updated on a sample-by-sample basis.    
- * The convergence of the LMS filter is slower compared to the normalized LMS algorithm.    
- *    
- * \par Algorithm:    
- * The output signal y[n] is computed by a standard FIR filter:    
- * 
    
- *     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]    
- * 
    
- *    
- * \par    
- * The error signal equals the difference between the reference signal d[n] and the filter output:    
- * 
    
- *     e[n] = d[n] - y[n].    
- * 
    
- *    
- * \par    
- * After each sample of the error signal is computed the instanteous energy of the filter state variables is calculated:    
- * 
    
- *    E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.    
- * 
    
- * The filter coefficients b[k] are then updated on a sample-by-sample basis:    
- * 
    
- *     b[k] = b[k] + e[n] * (mu/E) * x[n-k],  for k=0, 1, ..., numTaps-1    
- * 
    
- * where mu is the step size and controls the rate of coefficient convergence.    
- *\par    
- * In the APIs, pCoeffs points to a coefficient array of size numTaps.    
- * Coefficients are stored in time reversed order.    
- * \par    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to a state array of size numTaps + blockSize - 1.    
- * Samples in the state buffer are stored in the order:    
- * \par    
- * 
    
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}    
- * 
    
- * \par    
- * Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples.    
- * The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,    
- * to be avoided and yields a significant speed improvement.    
- * The state variables are updated after each block of data is processed.    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter and    
- * coefficient and state arrays cannot be shared among instances.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numTaps, pCoeffs, mu, energy, x0, pState. Also set all of the values in pState to zero. 
- * For Q7, Q15, and Q31 the following fields must also be initialized;
- * recipTable, postShift
- *
- * \par    
- * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.    
- * \par Fixed-Point Behavior:    
- * Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter.    
- * The following issues must be considered:    
- * - Scaling of coefficients    
- * - Overflow and saturation    
- *    
- * \par Scaling of Coefficients:    
- * Filter coefficients are represented as fractional values and    
- * coefficients are restricted to lie in the range [-1 +1).    
- * The fixed-point functions have an additional scaling parameter postShift.    
- * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.    
- * This essentially scales the filter coefficients by 2^postShift and    
- * allows the filter coefficients to exceed the range [+1 -1).    
- * The value of postShift is set by the user based on the expected gain through the system being modeled.    
- *    
- * \par Overflow and Saturation:    
- * Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are    
- * described separately as part of the function specific documentation below.    
- */
-
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-
-  /**    
-   * @brief Processing function for floating-point normalized LMS filter.    
-   * @param[in] *S points to an instance of the floating-point normalized LMS filter structure.    
-   * @param[in] *pSrc points to the block of input data.    
-   * @param[in] *pRef points to the block of reference data.    
-   * @param[out] *pOut points to the block of output data.    
-   * @param[out] *pErr points to the block of error data.    
-   * @param[in] blockSize number of samples to process.    
-   * @return none.    
-   */
-
-void arm_lms_norm_f32(
-  arm_lms_norm_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pRef,
-  float32_t * pOut,
-  float32_t * pErr,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-  float32_t mu = S->mu;                          /* Adaptive factor */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  float32_t energy;                              /* Energy of the input */
-  float32_t sum, e, d;                           /* accumulator, error, reference data sample */
-  float32_t w, x0, in;                           /* weight factor, temporary variable to hold input sample and state */
-
-  /* Initializations of error,  difference, Coefficient update */
-  e = 0.0f;
-  d = 0.0f;
-  w = 0.0f;
-
-  energy = S->energy;
-  x0 = S->x0;
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy -= x0 * x0;
-    energy += in * in;
-
-    /* Set the accumulator to zero */
-    sum = 0.0f;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* The result in the accumulator, store in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Compute and store error */
-    d = (float32_t) (*pRef++);
-    e = d - sum;
-    *pErr++ = e;
-
-    /* Calculation of Weighting factor for updating filter coefficients */
-    /* epsilon value 0.000000119209289f */
-    w = (e * mu) / (energy + 0.000000119209289f);
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb += w * (*px++);
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  S->energy = energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop unrolling for (numTaps - 1u)/4 samples copy */
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy -= x0 * x0;
-    energy += in * in;
-
-    /* Set the accumulator to zero */
-    sum = 0.0f;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* The result in the accumulator is stored in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Compute and store error */
-    d = (float32_t) (*pRef++);
-    e = d - sum;
-    *pErr++ = e;
-
-    /* Calculation of Weighting factor for updating filter coefficients */
-    /* epsilon value 0.000000119209289f */
-    w = (e * mu) / (energy + 0.000000119209289f);
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCcoeffs pointer */
-    pb = pCoeffs;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb += w * (*px++);
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  S->energy = energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the        
-     satrt of the state buffer. This prepares the state buffer for the        
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Copy (numTaps - 1u) samples  */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
-   * @} end of LMS_NORM group    
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c
deleted file mode 100755
index 2c23315e..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_norm_init_f32.c    
-*    
-* Description:  Floating-point NLMS filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for floating-point normalized LMS filter.    
-   * @param[in] *S points to an instance of the floating-point LMS filter structure.    
-   * @param[in] numTaps  number of filter coefficients.    
-   * @param[in] *pCoeffs points to coefficient buffer.    
-   * @param[in] *pState points to state buffer.    
-   * @param[in] mu step size that controls filter coefficient updates.    
-   * @param[in] blockSize number of samples to process.    
-   * @return none.    
-   *    
- * \par Description:    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * The initial filter coefficients serve as a starting point for the adaptive filter.    
- * pState points to an array of length numTaps+blockSize-1 samples,    
- * where blockSize is the number of input samples processed by each call to arm_lms_norm_f32().    
- */
-
-void arm_lms_norm_init_f32(
-  arm_lms_norm_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  float32_t mu,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Initialise Energy to zero */
-  S->energy = 0.0f;
-
-  /* Initialise x0 to zero */
-  S->x0 = 0.0f;
-
-}
-
-/**    
- * @} end of LMS_NORM group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c
deleted file mode 100755
index be3e31f6..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_norm_init_q15.c    
-*    
-* Description:  Q15 NLMS initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for Q15 normalized LMS filter.    
-   * @param[in] *S points to an instance of the Q15 normalized LMS filter structure.    
-   * @param[in] numTaps  number of filter coefficients.    
-   * @param[in] *pCoeffs points to coefficient buffer.    
-   * @param[in] *pState points to state buffer.    
-   * @param[in] mu step size that controls filter coefficient updates.    
-   * @param[in] blockSize number of samples to process.    
-   * @param[in] postShift bit shift applied to coefficients.    
-   * @return none.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * The initial filter coefficients serve as a starting point for the adaptive filter.    
- * pState points to the array of state variables and size of array is    
- * numTaps+blockSize-1 samples, where blockSize is the number of input samples processed    
- * by each call to arm_lms_norm_q15().    
- */
-
-void arm_lms_norm_init_q15(
-  arm_lms_norm_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  q15_t mu,
-  uint32_t blockSize,
-  uint8_t postShift)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
-
-  /* Assign post Shift value applied to coefficients */
-  S->postShift = postShift;
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Initialize reciprocal pointer table */
-  S->recipTable = (q15_t *) armRecipTableQ15;
-
-  /* Initialise Energy to zero */
-  S->energy = 0;
-
-  /* Initialise x0 to zero */
-  S->x0 = 0;
-
-}
-
-/**    
- * @} end of LMS_NORM group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c
deleted file mode 100755
index 9ada3a00..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_norm_init_q31.c    
-*    
-* Description:  Q31 NLMS initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for Q31 normalized LMS filter.    
-   * @param[in] *S points to an instance of the Q31 normalized LMS filter structure.    
-   * @param[in] numTaps  number of filter coefficients.    
-   * @param[in] *pCoeffs points to coefficient buffer.    
-   * @param[in] *pState points to state buffer.    
-   * @param[in] mu step size that controls filter coefficient updates.    
-   * @param[in] blockSize number of samples to process.    
-   * @param[in] postShift bit shift applied to coefficients.    
-   * @return none.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * The initial filter coefficients serve as a starting point for the adaptive filter.    
- * pState points to an array of length numTaps+blockSize-1 samples,    
- * where blockSize is the number of input samples processed by each call to arm_lms_norm_q31().    
- */
-
-void arm_lms_norm_init_q31(
-  arm_lms_norm_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  q31_t mu,
-  uint32_t blockSize,
-  uint8_t postShift)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1  */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q31_t));
-
-  /* Assign post Shift value applied to coefficients */
-  S->postShift = postShift;
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Initialize reciprocal pointer table */
-  S->recipTable = (q31_t *) armRecipTableQ31;
-
-  /* Initialise Energy to zero */
-  S->energy = 0;
-
-  /* Initialise x0 to zero */
-  S->x0 = 0;
-
-}
-
-/**    
- * @} end of LMS_NORM group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c
deleted file mode 100755
index 208a9d88..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c
+++ /dev/null
@@ -1,440 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_norm_q15.c    
-*    
-* Description:	Q15 NLMS filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-/**    
-* @brief Processing function for Q15 normalized LMS filter.    
-* @param[in] *S points to an instance of the Q15 normalized LMS filter structure.    
-* @param[in] *pSrc points to the block of input data.    
-* @param[in] *pRef points to the block of reference data.    
-* @param[out] *pOut points to the block of output data.    
-* @param[out] *pErr points to the block of error data.    
-* @param[in] blockSize number of samples to process.    
-* @return none.    
-*    
-* Scaling and Overflow Behavior:     
-* \par     
-* The function is implemented using a 64-bit internal accumulator.     
-* Both coefficients and state variables are represented in 1.15 format and    
-* multiplications yield a 2.30 result. The 2.30 intermediate results are    
-* accumulated in a 64-bit accumulator in 34.30 format.     
-* There is no risk of internal overflow with this approach and the full    
-* precision of intermediate multiplications is preserved. After all additions    
-* have been performed, the accumulator is truncated to 34.15 format by    
-* discarding low 15 bits. Lastly, the accumulator is saturated to yield a    
-* result in 1.15 format.    
-*    
-* \par   
-* 	In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.    
-*    
- */
-
-void arm_lms_norm_q15(
-  arm_lms_norm_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pRef,
-  q15_t * pOut,
-  q15_t * pErr,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
-  q15_t mu = S->mu;                              /* Adaptive factor */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  q31_t energy;                                  /* Energy of the input */
-  q63_t acc;                                     /* Accumulator */
-  q15_t e = 0, d = 0;                            /* error, reference data sample */
-  q15_t w = 0, in;                               /* weight factor and state */
-  q15_t x0;                                      /* temporary variable to hold input sample */
-  //uint32_t shift = (uint32_t) S->postShift + 1u; /* Shift to be applied to the output */ 
-  q15_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
-  q15_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
-  q31_t coef;                                    /* Teporary variable for coefficient */
-  q31_t acc_l, acc_h;
-  int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift  */
-  int32_t uShift = (32 - lShift);
-
-  energy = S->energy;
-  x0 = S->x0;
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy -= (((q31_t) x0 * (x0)) >> 15);
-    energy += (((q31_t) in * (in)) >> 15);
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Perform the multiply-accumulate */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-      acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-
-#else
-
-      acc += (((q31_t) * px++ * (*pb++)));
-      acc += (((q31_t) * px++ * (*pb++)));
-      acc += (((q31_t) * px++ * (*pb++)));
-      acc += (((q31_t) * px++ * (*pb++)));
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (((q31_t) * px++ * (*pb++)));
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    /* Apply shift for lower part of acc and upper part of acc */
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16u);
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q15_t) acc;
-
-    /* Compute and store error */
-    d = *pRef++;
-    e = d - (q15_t) acc;
-    *pErr++ = e;
-
-    /* Calculation of 1/energy */
-    postShift = arm_recip_q15((q15_t) energy + DELTA_Q15,
-                              &oneByEnergy, S->recipTable);
-
-    /* Calculation of e * mu value */
-    errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
-
-    /* Calculation of (e * mu) * (1/energy) value */
-    acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
-
-    /* Weighting factor for the normalized version */
-    w = (q15_t) __SSAT((q31_t) acc, 16);
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Read the sample from state buffer */
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = (q15_t) energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1u) >> 2;
-
-  while(tapCnt > 0u)
-  {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-#else
-
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-#endif
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy -= (((q31_t) x0 * (x0)) >> 15);
-    energy += (((q31_t) in * (in)) >> 15);
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (((q31_t) * px++ * (*pb++)));
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    /* Apply shift for lower part of acc and upper part of acc */
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16u);
-
-    /* Converting the result to 1.15 format */
-    //acc = __SSAT((acc >> (16u - shift)), 16u); 
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q15_t) acc;
-
-    /* Compute and store error */
-    d = *pRef++;
-    e = d - (q15_t) acc;
-    *pErr++ = e;
-
-    /* Calculation of 1/energy */
-    postShift = arm_recip_q15((q15_t) energy + DELTA_Q15,
-                              &oneByEnergy, S->recipTable);
-
-    /* Calculation of e * mu value */
-    errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
-
-    /* Calculation of (e * mu) * (1/energy) value */
-    acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
-
-    /* Weighting factor for the normalized version */
-    w = (q15_t) __SSAT((q31_t) acc, 16);
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Read the sample from state buffer */
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = (q15_t) energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the        
-     satrt of the state buffer. This prepares the state buffer for the        
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* copy (numTaps - 1u) data */
-  tapCnt = (numTaps - 1u);
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-
-/**    
-   * @} end of LMS_NORM group    
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c
deleted file mode 100755
index 3d990e3f..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c
+++ /dev/null
@@ -1,431 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_norm_q31.c    
-*    
-* Description:	Processing function for the Q31 NLMS filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-/**    
-* @brief Processing function for Q31 normalized LMS filter.    
-* @param[in] *S points to an instance of the Q31 normalized LMS filter structure.    
-* @param[in] *pSrc points to the block of input data.    
-* @param[in] *pRef points to the block of reference data.    
-* @param[out] *pOut points to the block of output data.    
-* @param[out] *pErr points to the block of error data.    
-* @param[in] blockSize number of samples to process.    
-* @return none.    
-*    
-* Scaling and Overflow Behavior:     
-* \par     
-* The function is implemented using an internal 64-bit accumulator.     
-* The accumulator has a 2.62 format and maintains full precision of the intermediate   
-* multiplication results but provides only a single guard bit.     
-* Thus, if the accumulator result overflows it wraps around rather than clip.     
-* In order to avoid overflows completely the input signal must be scaled down by    
-* log2(numTaps) bits. The reference signal should not be scaled down.     
-* After all multiply-accumulates are performed, the 2.62 accumulator is shifted    
-* and saturated to 1.31 format to yield the final result.     
-* The output signal and error signal are in 1.31 format.     
-*    
-* \par    
-* 	In this filter, filter coefficients are updated for each sample and the    
-* updation of filter cofficients are saturted.    
-*     
-*/
-
-void arm_lms_norm_q31(
-  arm_lms_norm_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pRef,
-  q31_t * pOut,
-  q31_t * pErr,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
-  q31_t mu = S->mu;                              /* Adaptive factor */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  q63_t energy;                                  /* Energy of the input */
-  q63_t acc;                                     /* Accumulator */
-  q31_t e = 0, d = 0;                            /* error, reference data sample */
-  q31_t w = 0, in;                               /* weight factor and state */
-  q31_t x0;                                      /* temporary variable to hold input sample */
-//  uint32_t shift = 32u - ((uint32_t) S->postShift + 1u);        /* Shift to be applied to the output */      
-  q31_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
-  q31_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
-  q31_t coef;                                    /* Temporary variable for coef */
-  q31_t acc_l, acc_h;                            /*  temporary input */
-  uint32_t uShift = ((uint32_t) S->postShift + 1u);
-  uint32_t lShift = 32u - uShift;                /*  Shift to be applied to the output */
-
-  energy = S->energy;
-  x0 = S->x0;
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  while(blkCnt > 0u)
-  {
-
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy = (q31_t) ((((q63_t) energy << 32) -
-                       (((q63_t) x0 * x0) << 1)) >> 32);
-    energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-      acc += ((q63_t) (*px++)) * (*pb++);
-      acc += ((q63_t) (*px++)) * (*pb++);
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Converting the result to 1.31 format */
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q31_t) acc;
-
-    /* Compute and store error */
-    d = *pRef++;
-    e = d - (q31_t) acc;
-    *pErr++ = e;
-
-    /* Calculates the reciprocal of energy */
-    postShift = arm_recip_q31(energy + DELTA_Q31,
-                              &oneByEnergy, &S->recipTable[0]);
-
-    /* Calculation of product of (e * mu) */
-    errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
-
-    /* Weighting factor for the normalized version */
-    w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-
-      /* coef is in 2.30 format */
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      /* get coef in 1.31 format by left shifting */
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      /* update coefficient buffer to next coefficient */
-      pb++;
-
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Read the sample from state buffer */
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = (q31_t) energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop unrolling for (numTaps - 1u) samples copy */
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(blkCnt > 0u)
-  {
-
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy =
-      (q31_t) ((((q63_t) energy << 32) - (((q63_t) x0 * x0) << 1)) >> 32);
-    energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Converting the result to 1.31 format */
-    /* Converting the result to 1.31 format */
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-
-    //acc = (q31_t) (acc >> shift); 
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q31_t) acc;
-
-    /* Compute and store error */
-    d = *pRef++;
-    e = d - (q31_t) acc;
-    *pErr++ = e;
-
-    /* Calculates the reciprocal of energy */
-    postShift =
-      arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]);
-
-    /* Calculation of product of (e * mu) */
-    errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
-
-    /* Weighting factor for the normalized version */
-    w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      /* coef is in 2.30 format */
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      /* get coef in 1.31 format by left shifting */
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      /* update coefficient buffer to next coefficient */
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Read the sample from state buffer */
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = (q31_t) energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the     
-     start of the state buffer. This prepares the state buffer for the        
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop for (numTaps - 1u) samples copy */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of LMS_NORM group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c
deleted file mode 100755
index c0d465a8..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c
+++ /dev/null
@@ -1,380 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_q15.c    
-*    
-* Description:	Processing function for the Q15 LMS filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
- /**    
- * @brief Processing function for Q15 LMS filter.    
- * @param[in] *S points to an instance of the Q15 LMS filter structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[in] *pRef points to the block of reference data.    
- * @param[out] *pOut points to the block of output data.    
- * @param[out] *pErr points to the block of error data.    
- * @param[in] blockSize number of samples to process.    
- * @return none.    
- *    
- * \par Scaling and Overflow Behavior:    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.    
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.    
- *   
- * \par   
- * 	In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.   
- *    
- */
-
-void arm_lms_q15(
-  const arm_lms_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pRef,
-  q15_t * pOut,
-  q15_t * pErr,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t mu = S->mu;                              /* Adaptive factor */
-  q15_t *px;                                     /* Temporary pointer for state */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  q63_t acc;                                     /* Accumulator */
-  q15_t e = 0;                                   /* error of data sample */
-  q15_t alpha;                                   /* Intermediate constant for taps update */
-  q31_t coef;                                    /* Teporary variable for coefficient */
-  q31_t acc_l, acc_h;
-  int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift  */
-  int32_t uShift = (32 - lShift);
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Initializing blkCnt with blockSize */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2u;
-
-    while(tapCnt > 0u)
-    {
-      /* acc +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      /* Perform the multiply-accumulate */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-      acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-
-#else
-
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    /* Apply shift for lower part of acc and upper part of acc */
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16);
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q15_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q15_t) acc;
-
-    *pErr++ = (q15_t) e;
-
-    /* Compute alpha i.e. intermediate constant for taps update */
-    alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
-
-    /* Initialize state pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2u;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1u) >> 2;
-
-  while(tapCnt > 0u)
-  {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-#else
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-#endif
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (q63_t) ((q31_t) (*px++) * (*pb++));
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    /* Apply shift for lower part of acc and upper part of acc */
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16);
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q15_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q15_t) acc;
-
-    *pErr++ = (q15_t) e;
-
-    /* Compute alpha i.e. intermediate constant for taps update */
-    alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
-
-    /* Initialize pState pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the        
-     start of the state buffer. This prepares the state buffer for the   
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /*  Copy (numTaps - 1u) samples  */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
-   * @} end of LMS group    
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c b/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c
deleted file mode 100755
index 53c57f02..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c
+++ /dev/null
@@ -1,369 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_q31.c    
-*    
-* Description:	Processing function for the Q31 LMS filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
- /**    
- * @brief Processing function for Q31 LMS filter.    
- * @param[in]  *S points to an instance of the Q15 LMS filter structure.    
- * @param[in]  *pSrc points to the block of input data.    
- * @param[in]  *pRef points to the block of reference data.    
- * @param[out] *pOut points to the block of output data.    
- * @param[out] *pErr points to the block of error data.    
- * @param[in]  blockSize number of samples to process.    
- * @return     none.    
- *    
- * \par Scaling and Overflow Behavior:     
- * The function is implemented using an internal 64-bit accumulator.     
- * The accumulator has a 2.62 format and maintains full precision of the intermediate    
- * multiplication results but provides only a single guard bit.     
- * Thus, if the accumulator result overflows it wraps around rather than clips.     
- * In order to avoid overflows completely the input signal must be scaled down by    
- * log2(numTaps) bits.     
- * The reference signal should not be scaled down.     
- * After all multiply-accumulates are performed, the 2.62 accumulator is shifted    
- * and saturated to 1.31 format to yield the final result.     
- * The output signal and error signal are in 1.31 format.     
- *    
- * \par    
- * 	In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.    
- */
-
-void arm_lms_q31(
-  const arm_lms_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pRef,
-  q31_t * pOut,
-  q31_t * pErr,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t mu = S->mu;                              /* Adaptive factor */
-  q31_t *px;                                     /* Temporary pointer for state */
-  q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  q63_t acc;                                     /* Accumulator */
-  q31_t e = 0;                                   /* error of data sample */
-  q31_t alpha;                                   /* Intermediate constant for taps update */
-  q31_t coef;                                    /* Temporary variable for coef */
-  q31_t acc_l, acc_h;                            /*  temporary input */
-  uint32_t uShift = ((uint32_t) S->postShift + 1u);
-  uint32_t lShift = 32u - uShift;                /*  Shift to be applied to the output */
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Initializing blkCnt with blockSize */
-  blkCnt = blockSize;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      /* acc +=  b[N] * x[n-N] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* acc +=  b[N-1] * x[n-N-1] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* acc +=  b[N-2] * x[n-N-2] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* acc +=  b[N-3] * x[n-N-3] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Converting the result to 1.31 format */
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q31_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q31_t) acc;
-
-    *pErr++ = (q31_t) e;
-
-    /* Compute alpha i.e. intermediate constant for taps update */
-    alpha = (q31_t) (((q63_t) e * mu) >> 31);
-
-    /* Initialize state pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      /* coef is in 2.30 format */
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      /* get coef in 1.31 format by left shifting */
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      /* update coefficient buffer to next coefficient */
-      pb++;
-
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop unrolling for (numTaps - 1u) samples copy */
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Converting the result to 1.31 format */
-    /* Store the result from accumulator into the destination buffer. */
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    *pOut++ = (q31_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q31_t) acc;
-
-    *pErr++ = (q31_t) e;
-
-    /* Weighting factor for the LMS version */
-    alpha = (q31_t) (((q63_t) e * mu) >> 31);
-
-    /* Initialize pState pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the     
-     start of the state buffer. This prepares the state buffer for the   
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /*  Copy (numTaps - 1u) samples  */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
-   * @} end of LMS group    
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c
deleted file mode 100755
index 123f9e9a..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c
+++ /dev/null
@@ -1,208 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_mat_add_f32.c    
-*    
-* Description:	Floating-point matrix addition    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMatrix        
- */
-
-/**        
- * @defgroup MatrixAdd Matrix Addition        
- *        
- * Adds two matrices.        
- * \image html MatrixAddition.gif "Addition of two 3 x 3 matrices"        
- *        
- * The functions check to make sure that        
- * pSrcA, pSrcB, and pDst have the same        
- * number of rows and columns.        
- */
-
-/**        
- * @addtogroup MatrixAdd        
- * @{        
- */
-
-
-/**        
- * @brief Floating-point matrix addition.        
- * @param[in]       *pSrcA points to the first input matrix structure        
- * @param[in]       *pSrcB points to the second input matrix structure        
- * @param[out]      *pDst points to output matrix structure        
- * @return     		The function returns either        
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.        
- */
-
-arm_status arm_mat_add_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A  */
-  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B  */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer   */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  float32_t inA1, inA2, inB1, inB2, out1, out2;  /* temporary variables */
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-  uint32_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix addition */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif
-  {
-
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Loop unrolling */
-    blkCnt = numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add and then store the results in the destination buffer. */
-      /* Read values from source A */
-      inA1 = pIn1[0];
-
-      /* Read values from source B */
-      inB1 = pIn2[0];
-
-      /* Read values from source A */
-      inA2 = pIn1[1];
-
-      /* out = sourceA + sourceB */
-      out1 = inA1 + inB1;
-
-      /* Read values from source B */
-      inB2 = pIn2[1];
-
-      /* Read values from source A */
-      inA1 = pIn1[2];
-
-      /* out = sourceA + sourceB */
-      out2 = inA2 + inB2;
-
-      /* Read values from source B */
-      inB1 = pIn2[2];
-
-      /* Store result in destination */
-      pOut[0] = out1;
-      pOut[1] = out2;
-
-      /* Read values from source A */
-      inA2 = pIn1[3];
-
-      /* Read values from source B */
-      inB2 = pIn2[3];
-
-      /* out = sourceA + sourceB */
-      out1 = inA1 + inB1;
-
-      /* out = sourceA + sourceB */
-      out2 = inA2 + inB2;
-
-      /* Store result in destination */
-      pOut[2] = out1;
-
-      /* Store result in destination */
-      pOut[3] = out2;
-
-
-      /* update pointers to process next sampels */
-      pIn1 += 4u;
-      pIn2 += 4u;
-      pOut += 4u;
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add and then store the results in the destination buffer. */
-      *pOut++ = (*pIn1++) + (*pIn2++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixAdd group        
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c
deleted file mode 100755
index ef7f8697..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c
+++ /dev/null
@@ -1,163 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_add_q15.c    
-*    
-* Description:	Q15 matrix addition    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixAdd    
- * @{    
- */
-
-/**    
- * @brief Q15 matrix addition.    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- */
-
-arm_status arm_mat_add_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst)
-{
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A  */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint16_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters  */
-  arm_status status;                             /* status of matrix addition  */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint16_t) (pSrcA->numRows * pSrcA->numCols);
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop unrolling */
-    blkCnt = (uint32_t) numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, Saturate and then store the results in the destination buffer. */
-      *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
-      *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = (uint32_t) numSamples % 0x4u;
-
-    /* q15 pointers of input and output are initialized */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, Saturate and then store the results in the destination buffer. */
-      *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = (uint32_t) numSamples;
-
-
-    /* q15 pointers of input and output are initialized */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, Saturate and then store the results in the destination buffer. */
-      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ + *pInB++), 16);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixAdd group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c
deleted file mode 100755
index de02d707..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c
+++ /dev/null
@@ -1,207 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_add_q31.c    
-*    
-* Description:	Q31 matrix addition    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**      
- * @ingroup groupMatrix      
- */
-
-/**      
- * @addtogroup MatrixAdd      
- * @{      
- */
-
-/**      
- * @brief Q31 matrix addition.      
- * @param[in]       *pSrcA points to the first input matrix structure      
- * @param[in]       *pSrcB points to the second input matrix structure      
- * @param[out]      *pDst points to output matrix structure      
- * @return     		The function returns either      
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.      
- *      
- * Scaling and Overflow Behavior:      
- * \par      
- * The function uses saturating arithmetic.      
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.      
- */
-
-arm_status arm_mat_add_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t inA1, inB1;                              /* temporary variables */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  q31_t inA2, inB2;                              /* temporary variables */
-  q31_t out1, out2;                              /* temporary variables */
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-  uint32_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix addition */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2u;
-
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, saturate and then store the results in the destination buffer. */
-      /* Read values from source A */
-      inA1 = pIn1[0];
-
-      /* Read values from source B */
-      inB1 = pIn2[0];
-
-      /* Read values from source A */
-      inA2 = pIn1[1];
-
-      /* Add and saturate */
-      out1 = __QADD(inA1, inB1);
-
-      /* Read values from source B */
-      inB2 = pIn2[1];
-
-      /* Read values from source A */
-      inA1 = pIn1[2];
-
-      /* Add and saturate */
-      out2 = __QADD(inA2, inB2);
-
-      /* Read values from source B */
-      inB1 = pIn2[2];
-
-      /* Store result in destination */
-      pOut[0] = out1;
-      pOut[1] = out2;
-
-      /* Read values from source A */
-      inA2 = pIn1[3];
-
-      /* Read values from source B */
-      inB2 = pIn2[3];
-
-      /* Add and saturate */
-      out1 = __QADD(inA1, inB1);
-      out2 = __QADD(inA2, inB2);
-
-      /* Store result in destination */
-      pOut[2] = out1;
-      pOut[3] = out2;
-
-      /* update pointers to process next sampels */
-      pIn1 += 4u;
-      pIn2 += 4u;
-      pOut += 4u;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.      
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, saturate and then store the results in the destination buffer. */
-      inA1 = *pIn1++;
-      inB1 = *pIn2++;
-
-      inA1 = __QADD(inA1, inB1);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-
-      *pOut++ = inA1;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**      
- * @} end of MatrixAdd group      
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
deleted file mode 100755
index dd41e7c4..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
+++ /dev/null
@@ -1,283 +0,0 @@
-/* ----------------------------------------------------------------------      
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved. 
-*      
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*      
-* Project:      CMSIS DSP Library 
-* Title:	    arm_mat_cmplx_mult_f32.c      
-*      
-* Description:  Floating-point matrix multiplication.      
-*      
-* Target Processor:          Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**      
- * @ingroup groupMatrix      
- */
-
-/**      
- * @defgroup CmplxMatrixMult  Complex Matrix Multiplication     
- *     
- * Complex Matrix multiplication is only defined if the number of columns of the      
- * first matrix equals the number of rows of the second matrix.      
- * Multiplying an M x N matrix with an N x P matrix results      
- * in an M x P matrix.      
- * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of      
- * pSrcA and pSrcB are equal; and (2) that the size of the output      
- * matrix equals the outer dimensions of pSrcA and pSrcB.      
- */
-
-
-/**      
- * @addtogroup CmplxMatrixMult      
- * @{      
- */
-
-/**      
- * @brief Floating-point Complex matrix multiplication.      
- * @param[in]       *pSrcA points to the first input complex matrix structure      
- * @param[in]       *pSrcB points to the second input complex matrix structure      
- * @param[out]      *pDst points to output complex matrix structure      
- * @return     		The function returns either      
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.      
- */
-
-arm_status arm_mat_cmplx_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
-  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
-  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A  */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *px;                                 /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  float32_t sumReal1, sumImag1;                  /* accumulator */
-  float32_t a0, b0, c0, d0;
-  float32_t a1, b1, c1, d1;
-  float32_t sumReal2, sumImag2;                  /* accumulator */
-
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + 2 * i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set      
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0u;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sumReal1 = 0.0f;
-        sumImag1 = 0.0f;
-
-        sumReal2 = 0.0f;
-        sumImag2 = 0.0f;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pIn1 = pInA;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-        /* matrix multiplication        */
-        while(colCnt > 0u)
-        {
-
-          /* Reading real part of complex matrix A */
-          a0 = *pIn1;
-
-          /* Reading real part of complex matrix B */
-          c0 = *pIn2;
-
-          /* Reading imaginary part of complex matrix A */
-          b0 = *(pIn1 + 1u);
-
-          /* Reading imaginary part of complex matrix B */
-          d0 = *(pIn2 + 1u);
-
-          sumReal1 += a0 * c0;
-          sumImag1 += b0 * c0;
-
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          sumReal2 -= b0 * d0;
-          sumImag2 += a0 * d0;
-
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-
-          a1 = *pIn1;
-          c1 = *pIn2;
-
-          b1 = *(pIn1 + 1u);
-          d1 = *(pIn2 + 1u);
-
-          sumReal1 += a1 * c1;
-          sumImag1 += b1 * c1;
-
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          sumReal2 -= b1 * d1;
-          sumImag2 += a1 * d1;
-
-          a0 = *pIn1;
-          c0 = *pIn2;
-
-          b0 = *(pIn1 + 1u);
-          d0 = *(pIn2 + 1u);
-
-          sumReal1 += a0 * c0;
-          sumImag1 += b0 * c0;
-
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          sumReal2 -= b0 * d0;
-          sumImag2 += a0 * d0;
-
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-
-          a1 = *pIn1;
-          c1 = *pIn2;
-
-          b1 = *(pIn1 + 1u);
-          d1 = *(pIn2 + 1u);
-
-          sumReal1 += a1 * c1;
-          sumImag1 += b1 * c1;
-
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          sumReal2 -= b1 * d1;
-          sumImag2 += a1 * d1;
-
-          /* Decrement the loop count */
-          colCnt--;
-        }
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.      
-         ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          a1 = *pIn1;
-          c1 = *pIn2;
-
-          b1 = *(pIn1 + 1u);
-          d1 = *(pIn2 + 1u);
-
-          sumReal1 += a1 * c1;
-          sumImag1 += b1 * c1;
-
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          sumReal2 -= b1 * d1;
-          sumImag2 += a1 * d1;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        sumReal1 += sumReal2;
-        sumImag1 += sumImag2;
-
-        /* Store the result in the destination buffer */
-        *px++ = sumReal1;
-        *px++ = sumImag1;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = pSrcB->pData + 2u * j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + 2 * numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**      
- * @} end of MatrixMult group      
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
deleted file mode 100755
index 8e3fc06c..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
+++ /dev/null
@@ -1,424 +0,0 @@
-/* ----------------------------------------------------------------------      
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved. 
-*      
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*      
-* Project:      CMSIS DSP Library 
-* Title:	    arm_cmplx_mat_mult_q15.c      
-*      
-* Description:	 Q15 complex matrix multiplication.      
-*      
-* Target Processor:          Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**      
- * @ingroup groupMatrix      
- */
-
-/**      
- * @addtogroup CmplxMatrixMult      
- * @{      
- */
-
-
-/**      
- * @brief Q15 Complex matrix multiplication      
- * @param[in]       *pSrcA points to the first input complex matrix structure      
- * @param[in]       *pSrcB points to the second input complex matrix structure      
- * @param[out]      *pDst points to output complex matrix structure      
- * @param[in]		*pScratch points to the array for storing intermediate results     
- * @return     		The function returns either      
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.         
- *  
- * \par Conditions for optimum performance  
- *  Input, output and state buffers should be aligned by 32-bit  
- *  
- * \par Restrictions  
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE  
- *	In this case input, output, scratch buffers should be aligned by 32-bit  
- *  
- * @details      
- * Scaling and Overflow Behavior:      
- *      
- * \par      
- * The function is implemented using a 64-bit internal accumulator. The inputs to the      
- * multiplications are in 1.15 format and multiplications yield a 2.30 result.      
- * The 2.30 intermediate      
- * results are accumulated in a 64-bit accumulator in 34.30 format. This approach      
- * provides 33 guard bits and there is no risk of overflow. The 34.30 result is then      
- * truncated to 34.15 format by discarding the low 15 bits and then saturated to      
- * 1.15 format.      
- *      
- * \par      
- * Refer to arm_mat_mult_fast_q15() for a faster but less precise version of this function.      
- *      
- */
-
-
-
-
-arm_status arm_mat_cmplx_mult_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pScratch)
-{
-  /* accumulator */
-  q15_t *pSrcBT = pScratch;                      /* input data matrix pointer for transpose */
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
-  q15_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A    */
-  uint16_t col, i = 0u, row = numRowsB, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-  q63_t sumReal, sumImag;
-
-#ifdef UNALIGNED_SUPPORT_DISABLE
-  q15_t in;                                      /* Temporary variable to hold the input value */
-  q15_t a, b, c, d;
-#else
-  q31_t in;                                      /* Temporary variable to hold the input value */
-  q31_t prod1, prod2;
-  q31_t pSourceA, pSourceB;
-#endif
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif
-  {
-    /* Matrix transpose */
-    do
-    {
-      /* Apply loop unrolling and exchange the columns with row elements */
-      col = numColsB >> 2;
-
-      /* The pointer px is set to starting address of the column being processed */
-      px = pSrcBT + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.      
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(col > 0u)
-      {
-#ifdef UNALIGNED_SUPPORT_DISABLE
-        /* Read two elements from the row */
-        in = *pInB++;
-        *px = in;
-        in = *pInB++;
-        px[1] = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Read two elements from the row */
-        in = *pInB++;
-        *px = in;
-        in = *pInB++;
-        px[1] = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Read two elements from the row */
-        in = *pInB++;
-        *px = in;
-        in = *pInB++;
-        px[1] = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Read two elements from the row */
-        in = *pInB++;
-        *px = in;
-        in = *pInB++;
-        px[1] = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.      
-       ** No loop unrolling is used. */
-      col = numColsB % 0x4u;
-
-      while(col > 0u)
-      {
-        /* Read two elements from the row */
-        in = *pInB++;
-        *px = in;
-        in = *pInB++;
-        px[1] = in;
-#else
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        *__SIMD32(px) = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        *__SIMD32(px) = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        *__SIMD32(px) = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        *__SIMD32(px) = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.      
-       ** No loop unrolling is used. */
-      col = numColsB % 0x4u;
-
-      while(col > 0u)
-      {
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        *__SIMD32(px) = in;
-#endif
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      i = i + 2u;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* Reset the variables for the usage in the following multiplication process */
-    row = numRowsA;
-    i = 0u;
-    px = pDst->pData;
-
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set      
-       ** to the starting address of the transposed pSrcB data */
-      pInB = pSrcBT;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sumReal = 0;
-        sumImag = 0;
-
-        /* Apply loop unrolling and compute 2 MACs simultaneously. */
-        colCnt = numColsA >> 1;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pInA = pSrcA->pData + i * 2;
-
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-
-#ifdef UNALIGNED_SUPPORT_DISABLE
-
-          /* read real and imag values from pSrcA buffer */
-          a = *pInA;
-          b = *(pInA + 1u);
-          /* read real and imag values from pSrcB buffer */
-          c = *pInB;
-          d = *(pInB + 1u);
-
-          /* Multiply and Accumlates */
-          sumReal += (q31_t) a *c;
-          sumImag += (q31_t) a *d;
-          sumReal -= (q31_t) b *d;
-          sumImag += (q31_t) b *c;
-
-          /* read next real and imag values from pSrcA buffer */
-          a = *(pInA + 2u);
-          b = *(pInA + 3u);
-          /* read next real and imag values from pSrcB buffer */
-          c = *(pInB + 2u);
-          d = *(pInB + 3u);
-
-          /* update pointer */
-          pInA += 4u;
-
-          /* Multiply and Accumlates */
-          sumReal += (q31_t) a *c;
-          sumImag += (q31_t) a *d;
-          sumReal -= (q31_t) b *d;
-          sumImag += (q31_t) b *c;
-          /* update pointer */
-          pInB += 4u;
-#else
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          pSourceA = *__SIMD32(pInA)++;
-          pSourceB = *__SIMD32(pInB)++;
-
-          /* Multiply and Accumlates */
-#ifdef ARM_MATH_BIG_ENDIAN
-          prod1 = -__SMUSD(pSourceA, pSourceB);
-#else
-          prod1 = __SMUSD(pSourceA, pSourceB);
-#endif
-          prod2 = __SMUADX(pSourceA, pSourceB);
-          sumReal += (q63_t) prod1;
-          sumImag += (q63_t) prod2;
-
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          pSourceA = *__SIMD32(pInA)++;
-          pSourceB = *__SIMD32(pInB)++;
-
-          /* Multiply and Accumlates */
-#ifdef ARM_MATH_BIG_ENDIAN
-          prod1 = -__SMUSD(pSourceA, pSourceB);
-#else
-          prod1 = __SMUSD(pSourceA, pSourceB);
-#endif
-          prod2 = __SMUADX(pSourceA, pSourceB);
-          sumReal += (q63_t) prod1;
-          sumImag += (q63_t) prod2;
-
-#endif /*      #ifdef UNALIGNED_SUPPORT_DISABLE */
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* process odd column samples */
-        if((numColsA & 0x1u) > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-
-#ifdef UNALIGNED_SUPPORT_DISABLE
-
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          a = *pInA++;
-          b = *pInA++;
-          c = *pInB++;
-          d = *pInB++;
-
-          /* Multiply and Accumlates */
-          sumReal += (q31_t) a *c;
-          sumImag += (q31_t) a *d;
-          sumReal -= (q31_t) b *d;
-          sumImag += (q31_t) b *c;
-
-#else
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          pSourceA = *__SIMD32(pInA)++;
-          pSourceB = *__SIMD32(pInB)++;
-
-          /* Multiply and Accumlates */
-#ifdef ARM_MATH_BIG_ENDIAN
-          prod1 = -__SMUSD(pSourceA, pSourceB);
-#else
-          prod1 = __SMUSD(pSourceA, pSourceB);
-#endif
-          prod2 = __SMUADX(pSourceA, pSourceB);
-          sumReal += (q63_t) prod1;
-          sumImag += (q63_t) prod2;
-
-#endif /*      #ifdef UNALIGNED_SUPPORT_DISABLE */
-
-        }
-
-        /* Saturate and store the result in the destination buffer */
-
-        *px++ = (q15_t) (__SSAT(sumReal >> 15, 16));
-        *px++ = (q15_t) (__SSAT(sumImag >> 15, 16));
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-      i = i + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**      
- * @} end of MatrixMult group      
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
deleted file mode 100755
index 4dfe1fd5..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
+++ /dev/null
@@ -1,293 +0,0 @@
-/* ----------------------------------------------------------------------      
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved. 
-*      
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*      
-* Project:      CMSIS DSP Library 
-* Title:	    arm_mat_cmplx_mult_q31.c      
-*      
-* Description:  Floating-point matrix multiplication.      
-*      
-* Target Processor:          Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**     
- * @ingroup groupMatrix     
- */
-
-/**      
- * @addtogroup CmplxMatrixMult      
- * @{      
- */
-
-/**      
- * @brief Q31 Complex matrix multiplication      
- * @param[in]       *pSrcA points to the first input complex matrix structure      
- * @param[in]       *pSrcB points to the second input complex matrix structure      
- * @param[out]      *pDst points to output complex matrix structure      
- * @return     		The function returns either      
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.      
- *      
- * @details      
- * Scaling and Overflow Behavior:      
- *      
- * \par      
- * The function is implemented using an internal 64-bit accumulator.      
- * The accumulator has a 2.62 format and maintains full precision of the intermediate      
- * multiplication results but provides only a single guard bit. There is no saturation      
- * on intermediate additions. Thus, if the accumulator overflows it wraps around and      
- * distorts the result. The input signals should be scaled down to avoid intermediate      
- * overflows. The input is thus scaled down by log2(numColsA) bits      
- * to avoid overflows, as a total of numColsA additions are performed internally.      
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.      
- *      
- *      
- */
-
-arm_status arm_mat_cmplx_mult_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A  */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  q63_t sumReal1, sumImag1;                      /* accumulator */
-  q31_t a0, b0, c0, d0;
-  q31_t a1, b1, c1, d1;
-
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + 2 * i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set     
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0u;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sumReal1 = 0.0;
-        sumImag1 = 0.0;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pIn1 = pInA;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-        /* matrix multiplication        */
-        while(colCnt > 0u)
-        {
-
-          /* Reading real part of complex matrix A */
-          a0 = *pIn1;
-
-          /* Reading real part of complex matrix B */
-          c0 = *pIn2;
-
-          /* Reading imaginary part of complex matrix A */
-          b0 = *(pIn1 + 1u);
-
-          /* Reading imaginary part of complex matrix B */
-          d0 = *(pIn2 + 1u);
-
-          /* Multiply and Accumlates */
-          sumReal1 += (q63_t) a0 *c0;
-          sumImag1 += (q63_t) b0 *c0;
-
-          /* update pointers */
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal1 -= (q63_t) b0 *d0;
-          sumImag1 += (q63_t) a0 *d0;
-
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          a1 = *pIn1;
-          c1 = *pIn2;
-          b1 = *(pIn1 + 1u);
-          d1 = *(pIn2 + 1u);
-
-          /* Multiply and Accumlates */
-          sumReal1 += (q63_t) a1 *c1;
-          sumImag1 += (q63_t) b1 *c1;
-
-          /* update pointers */
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal1 -= (q63_t) b1 *d1;
-          sumImag1 += (q63_t) a1 *d1;
-
-          a0 = *pIn1;
-          c0 = *pIn2;
-
-          b0 = *(pIn1 + 1u);
-          d0 = *(pIn2 + 1u);
-
-          /* Multiply and Accumlates */
-          sumReal1 += (q63_t) a0 *c0;
-          sumImag1 += (q63_t) b0 *c0;
-
-          /* update pointers */
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal1 -= (q63_t) b0 *d0;
-          sumImag1 += (q63_t) a0 *d0;
-
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-
-          a1 = *pIn1;
-          c1 = *pIn2;
-
-          b1 = *(pIn1 + 1u);
-          d1 = *(pIn2 + 1u);
-
-          /* Multiply and Accumlates */
-          sumReal1 += (q63_t) a1 *c1;
-          sumImag1 += (q63_t) b1 *c1;
-
-          /* update pointers */
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal1 -= (q63_t) b1 *d1;
-          sumImag1 += (q63_t) a1 *d1;
-
-          /* Decrement the loop count */
-          colCnt--;
-        }
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.     
-         ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          a1 = *pIn1;
-          c1 = *pIn2;
-
-          b1 = *(pIn1 + 1u);
-          d1 = *(pIn2 + 1u);
-
-          /* Multiply and Accumlates */
-          sumReal1 += (q63_t) a1 *c1;
-          sumImag1 += (q63_t) b1 *c1;
-
-          /* update pointers */
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal1 -= (q63_t) b1 *d1;
-          sumImag1 += (q63_t) a1 *d1;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Store the result in the destination buffer */
-        *px++ = (q31_t) clip_q63_to_q31(sumReal1 >> 31);
-        *px++ = (q31_t) clip_q63_to_q31(sumImag1 >> 31);
-        
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = pSrcB->pData + 2u * j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + 2 * numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**     
- * @} end of MatrixMult group     
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c
deleted file mode 100755
index 1a0e5e86..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_mat_init_f32.c    
-*    
-* Description:	Floating-point matrix initialization.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @defgroup MatrixInit Matrix Initialization    
- *    
- * Initializes the underlying matrix data structure.    
- * The functions set the numRows,    
- * numCols, and pData fields    
- * of the matrix data structure.    
- */
-
-/**    
- * @addtogroup MatrixInit    
- * @{    
- */
-
-/**    
-   * @brief  Floating-point matrix initialization.    
-   * @param[in,out] *S             points to an instance of the floating-point matrix structure.    
-   * @param[in]     nRows          number of rows in the matrix.    
-   * @param[in]     nColumns       number of columns in the matrix.    
-   * @param[in]     *pData	   points to the matrix data array.    
-   * @return        none    
-   */
-
-void arm_mat_init_f32(
-  arm_matrix_instance_f32 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  float32_t * pData)
-{
-  /* Assign Number of Rows */
-  S->numRows = nRows;
-
-  /* Assign Number of Columns */
-  S->numCols = nColumns;
-
-  /* Assign Data pointer */
-  S->pData = pData;
-}
-
-/**    
- * @} end of MatrixInit group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c
deleted file mode 100755
index 33f2f785..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_mat_init_q15.c    
-*    
-* Description:	Q15 matrix initialization.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixInit    
- * @{    
- */
-
-  /**    
-   * @brief  Q15 matrix initialization.    
-   * @param[in,out] *S             points to an instance of the floating-point matrix structure.    
-   * @param[in]     nRows          number of rows in the matrix.    
-   * @param[in]     nColumns       number of columns in the matrix.    
-   * @param[in]     *pData	   points to the matrix data array.    
-   * @return        none    
-   */
-
-void arm_mat_init_q15(
-  arm_matrix_instance_q15 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  q15_t * pData)
-{
-  /* Assign Number of Rows */
-  S->numRows = nRows;
-
-  /* Assign Number of Columns */
-  S->numCols = nColumns;
-
-  /* Assign Data pointer */
-  S->pData = pData;
-}
-
-/**    
- * @} end of MatrixInit group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c
deleted file mode 100755
index 27c451a2..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_mat_init_q31.c    
-*    
-* Description:	Q31 matrix initialization.    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @defgroup MatrixInit Matrix Initialization    
- *    
- */
-
-/**    
- * @addtogroup MatrixInit    
- * @{    
- */
-
-  /**    
-   * @brief  Q31 matrix initialization.    
-   * @param[in,out] *S             points to an instance of the floating-point matrix structure.    
-   * @param[in]     nRows          number of rows in the matrix.    
-   * @param[in]     nColumns       number of columns in the matrix.    
-   * @param[in]     *pData	   points to the matrix data array.    
-   * @return        none    
-   */
-
-void arm_mat_init_q31(
-  arm_matrix_instance_q31 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  q31_t * pData)
-{
-  /* Assign Number of Rows */
-  S->numRows = nRows;
-
-  /* Assign Number of Columns */
-  S->numCols = nColumns;
-
-  /* Assign Data pointer */
-  S->pData = pData;
-}
-
-/**    
- * @} end of MatrixInit group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c
deleted file mode 100755
index 40b67ad8..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c
+++ /dev/null
@@ -1,703 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_inverse_f32.c    
-*    
-* Description:	Floating-point matrix inverse.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @defgroup MatrixInv Matrix Inverse    
- *    
- * Computes the inverse of a matrix.    
- *    
- * The inverse is defined only if the input matrix is square and non-singular (the determinant    
- * is non-zero). The function checks that the input and output matrices are square and of the    
- * same size.    
- *    
- * Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix    
- * inversion of floating-point matrices.    
- *    
- * \par Algorithm    
- * The Gauss-Jordan method is used to find the inverse.    
- * The algorithm performs a sequence of elementary row-operations until it    
- * reduces the input matrix to an identity matrix. Applying the same sequence    
- * of elementary row-operations to an identity matrix yields the inverse matrix.    
- * If the input matrix is singular, then the algorithm terminates and returns error status    
- * ARM_MATH_SINGULAR.    
- * \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method"    
- */
-
-/**    
- * @addtogroup MatrixInv    
- * @{    
- */
-
-/**    
- * @brief Floating-point matrix inverse.    
- * @param[in]       *pSrc points to input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns    
- * ARM_MATH_SIZE_MISMATCH if the input matrix is not square or if the size    
- * of the output matrix does not match the size of the input matrix.    
- * If the input matrix is found to be singular (non-invertible), then the function returns    
- * ARM_MATH_SINGULAR.  Otherwise, the function returns ARM_MATH_SUCCESS.    
- */
-
-arm_status arm_mat_inverse_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
-  float32_t *pOutT1, *pOutT2;                    /* Temporary output data matrix pointer */
-  float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
-  uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
-  uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
-
-#ifndef ARM_MATH_CM0_FAMILY
-  float32_t maxC;                                /* maximum value in the column */
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t Xchg, in = 0.0f, in1;                /* Temporary input values  */
-  uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l;      /* loop counters */
-  arm_status status;                             /* status of matrix inverse */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
-     || (pSrc->numRows != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-
-    /*--------------------------------------------------------------------------------------------------------------    
-	 * Matrix Inverse can be solved using elementary row operations.    
-	 *    
-	 *	Gauss-Jordan Method:    
-	 *    
-	 *	   1. First combine the identity matrix and the input matrix separated by a bar to form an    
-	 *        augmented matrix as follows:    
-	 *				        _ 	      	       _         _	       _    
-	 *					   |  a11  a12 | 1   0  |       |  X11 X12  |    
-	 *					   |           |        |   =   |           |    
-	 *					   |_ a21  a22 | 0   1 _|       |_ X21 X21 _|    
-	 *    
-	 *		2. In our implementation, pDst Matrix is used as identity matrix.    
-	 *    
-	 *		3. Begin with the first row. Let i = 1.    
-	 *    
-	 *	    4. Check to see if the pivot for column i is the greatest of the column.    
-	 *		   The pivot is the element of the main diagonal that is on the current row.    
-	 *		   For instance, if working with row i, then the pivot element is aii.    
-	 *		   If the pivot is not the most significant of the columns, exchange that row with a row
-	 *		   below it that does contain the most significant value in column i. If the most
-	 *         significant value of the column is zero, then an inverse to that matrix does not exist.
-	 *		   The most significant value of the column is the absolute maximum.
-	 *    
-	 *	    5. Divide every element of row i by the pivot.    
-	 *    
-	 *	    6. For every row below and  row i, replace that row with the sum of that row and    
-	 *		   a multiple of row i so that each new element in column i below row i is zero.    
-	 *    
-	 *	    7. Move to the next row and column and repeat steps 2 through 5 until you have zeros    
-	 *		   for every element below and above the main diagonal.    
-	 *    
-	 *		8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).    
-	 *		   Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).    
-	 *----------------------------------------------------------------------------------------------------------------*/
-
-    /* Working pointer for destination matrix */
-    pOutT1 = pOut;
-
-    /* Loop over the number of rows */
-    rowCnt = numRows;
-
-    /* Making the destination matrix as identity matrix */
-    while(rowCnt > 0u)
-    {
-      /* Writing all zeroes in lower triangle of the destination matrix */
-      j = numRows - rowCnt;
-      while(j > 0u)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Writing all ones in the diagonal of the destination matrix */
-      *pOutT1++ = 1.0f;
-
-      /* Writing all zeroes in upper triangle of the destination matrix */
-      j = rowCnt - 1u;
-      while(j > 0u)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Decrement the loop counter */
-      rowCnt--;
-    }
-
-    /* Loop over the number of columns of the input matrix.    
-       All the elements in each column are processed by the row operations */
-    loopCnt = numCols;
-
-    /* Index modifier to navigate through the columns */
-    l = 0u;
-
-    while(loopCnt > 0u)
-    {
-      /* Check if the pivot element is zero..    
-       * If it is zero then interchange the row with non zero row below.    
-       * If there is no non zero element to replace in the rows below,    
-       * then the matrix is Singular. */
-
-      /* Working pointer for the input matrix that points    
-       * to the pivot element of the particular row  */
-      pInT1 = pIn + (l * numCols);
-
-      /* Working pointer for the destination matrix that points    
-       * to the pivot element of the particular row  */
-      pOutT1 = pOut + (l * numCols);
-
-      /* Temporary variable to hold the pivot value */
-      in = *pInT1;
-
-      /* Grab the most significant value from column l */
-      maxC = 0;
-      for (i = l; i < numRows; i++)
-      {
-        maxC = *pInT1 > 0 ? (*pInT1 > maxC ? *pInT1 : maxC) : (-*pInT1 > maxC ? -*pInT1 : maxC);
-        pInT1 += numCols;
-      }
-
-      /* Update the status if the matrix is singular */
-      if(maxC == 0.0f)
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Restore pInT1  */
-      pInT1 = pIn;
-
-      /* Destination pointer modifier */
-      k = 1u;
-      
-      /* Check if the pivot element is the most significant of the column */
-      if( (in > 0.0f ? in : -in) != maxC)
-      {
-        /* Loop over the number rows present below */
-        i = numRows - (l + 1u);
-
-        while(i > 0u)
-        {
-          /* Update the input and destination pointers */
-          pInT2 = pInT1 + (numCols * l);
-          pOutT2 = pOutT1 + (numCols * k);
-
-          /* Look for the most significant element to    
-           * replace in the rows below */
-          if((*pInT2 > 0.0f ? *pInT2: -*pInT2) == maxC)
-          {
-            /* Loop over number of columns    
-             * to the right of the pilot element */
-            j = numCols - l;
-
-            while(j > 0u)
-            {
-              /* Exchange the row elements of the input matrix */
-              Xchg = *pInT2;
-              *pInT2++ = *pInT1;
-              *pInT1++ = Xchg;
-
-              /* Decrement the loop counter */
-              j--;
-            }
-
-            /* Loop over number of columns of the destination matrix */
-            j = numCols;
-
-            while(j > 0u)
-            {
-              /* Exchange the row elements of the destination matrix */
-              Xchg = *pOutT2;
-              *pOutT2++ = *pOutT1;
-              *pOutT1++ = Xchg;
-
-              /* Decrement the loop counter */
-              j--;
-            }
-
-            /* Flag to indicate whether exchange is done or not */
-            flag = 1u;
-
-            /* Break after exchange is done */
-            break;
-          }
-
-          /* Update the destination pointer modifier */
-          k++;
-
-          /* Decrement the loop counter */
-          i--;
-        }
-      }
-
-      /* Update the status if the matrix is singular */
-      if((flag != 1u) && (in == 0.0f))
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Points to the pivot row of input and destination matrices */
-      pPivotRowIn = pIn + (l * numCols);
-      pPivotRowDst = pOut + (l * numCols);
-
-      /* Temporary pointers to the pivot row pointers */
-      pInT1 = pPivotRowIn;
-      pInT2 = pPivotRowDst;
-
-      /* Pivot element of the row */
-      in = *pPivotRowIn;
-
-      /* Loop over number of columns    
-       * to the right of the pilot element */
-      j = (numCols - l);
-
-      while(j > 0u)
-      {
-        /* Divide each element of the row of the input matrix    
-         * by the pivot element */
-        in1 = *pInT1;
-        *pInT1++ = in1 / in;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Loop over number of columns of the destination matrix */
-      j = numCols;
-
-      while(j > 0u)
-      {
-        /* Divide each element of the row of the destination matrix    
-         * by the pivot element */
-        in1 = *pInT2;
-        *pInT2++ = in1 / in;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Replace the rows with the sum of that row and a multiple of row i    
-       * so that each new element in column i above row i is zero.*/
-
-      /* Temporary pointers for input and destination matrices */
-      pInT1 = pIn;
-      pInT2 = pOut;
-
-      /* index used to check for pivot element */
-      i = 0u;
-
-      /* Loop over number of rows */
-      /*  to be replaced by the sum of that row and a multiple of row i */
-      k = numRows;
-
-      while(k > 0u)
-      {
-        /* Check for the pivot element */
-        if(i == l)
-        {
-          /* If the processing element is the pivot element,    
-             only the columns to the right are to be processed */
-          pInT1 += numCols - l;
-
-          pInT2 += numCols;
-        }
-        else
-        {
-          /* Element of the reference row */
-          in = *pInT1;
-
-          /* Working pointers for input and destination pivot rows */
-          pPRT_in = pPivotRowIn;
-          pPRT_pDst = pPivotRowDst;
-
-          /* Loop over the number of columns to the right of the pivot element,    
-             to replace the elements in the input matrix */
-          j = (numCols - l);
-
-          while(j > 0u)
-          {
-            /* Replace the element by the sum of that row    
-               and a multiple of the reference row  */
-            in1 = *pInT1;
-            *pInT1++ = in1 - (in * *pPRT_in++);
-
-            /* Decrement the loop counter */
-            j--;
-          }
-
-          /* Loop over the number of columns to    
-             replace the elements in the destination matrix */
-          j = numCols;
-
-          while(j > 0u)
-          {
-            /* Replace the element by the sum of that row    
-               and a multiple of the reference row  */
-            in1 = *pInT2;
-            *pInT2++ = in1 - (in * *pPRT_pDst++);
-
-            /* Decrement the loop counter */
-            j--;
-          }
-
-        }
-
-        /* Increment the temporary input pointer */
-        pInT1 = pInT1 + l;
-
-        /* Decrement the loop counter */
-        k--;
-
-        /* Increment the pivot index */
-        i++;
-      }
-
-      /* Increment the input pointer */
-      pIn++;
-
-      /* Decrement the loop counter */
-      loopCnt--;
-
-      /* Increment the index modifier */
-      l++;
-    }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t Xchg, in = 0.0f;                     /* Temporary input values  */
-  uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l;      /* loop counters */
-  arm_status status;                             /* status of matrix inverse */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
-     || (pSrc->numRows != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-
-    /*--------------------------------------------------------------------------------------------------------------       
-	 * Matrix Inverse can be solved using elementary row operations.        
-	 *        
-	 *	Gauss-Jordan Method:       
-	 *	 	       
-	 *	   1. First combine the identity matrix and the input matrix separated by a bar to form an        
-	 *        augmented matrix as follows:        
-	 *				        _  _	      _	    _	   _   _         _	       _       
-	 *					   |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |         
-	 *					   |  |            | | |        |   |   =   |           |        
-	 *					   |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|       
-	 *					          
-	 *		2. In our implementation, pDst Matrix is used as identity matrix.    
-	 *       
-	 *		3. Begin with the first row. Let i = 1.       
-	 *       
-	 *	    4. Check to see if the pivot for row i is zero.       
-	 *		   The pivot is the element of the main diagonal that is on the current row.       
-	 *		   For instance, if working with row i, then the pivot element is aii.       
-	 *		   If the pivot is zero, exchange that row with a row below it that does not        
-	 *		   contain a zero in column i. If this is not possible, then an inverse        
-	 *		   to that matrix does not exist.       
-	 *	       
-	 *	    5. Divide every element of row i by the pivot.       
-	 *	       
-	 *	    6. For every row below and  row i, replace that row with the sum of that row and        
-	 *		   a multiple of row i so that each new element in column i below row i is zero.       
-	 *	       
-	 *	    7. Move to the next row and column and repeat steps 2 through 5 until you have zeros       
-	 *		   for every element below and above the main diagonal.        
-	 *		   		          
-	 *		8. Now an identical matrix is formed to the left of the bar(input matrix, src).       
-	 *		   Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).         
-	 *----------------------------------------------------------------------------------------------------------------*/
-
-    /* Working pointer for destination matrix */
-    pOutT1 = pOut;
-
-    /* Loop over the number of rows */
-    rowCnt = numRows;
-
-    /* Making the destination matrix as identity matrix */
-    while(rowCnt > 0u)
-    {
-      /* Writing all zeroes in lower triangle of the destination matrix */
-      j = numRows - rowCnt;
-      while(j > 0u)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Writing all ones in the diagonal of the destination matrix */
-      *pOutT1++ = 1.0f;
-
-      /* Writing all zeroes in upper triangle of the destination matrix */
-      j = rowCnt - 1u;
-      while(j > 0u)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Decrement the loop counter */
-      rowCnt--;
-    }
-
-    /* Loop over the number of columns of the input matrix.     
-       All the elements in each column are processed by the row operations */
-    loopCnt = numCols;
-
-    /* Index modifier to navigate through the columns */
-    l = 0u;
-    //for(loopCnt = 0u; loopCnt < numCols; loopCnt++)   
-    while(loopCnt > 0u)
-    {
-      /* Check if the pivot element is zero..    
-       * If it is zero then interchange the row with non zero row below.   
-       * If there is no non zero element to replace in the rows below,   
-       * then the matrix is Singular. */
-
-      /* Working pointer for the input matrix that points     
-       * to the pivot element of the particular row  */
-      pInT1 = pIn + (l * numCols);
-
-      /* Working pointer for the destination matrix that points     
-       * to the pivot element of the particular row  */
-      pOutT1 = pOut + (l * numCols);
-
-      /* Temporary variable to hold the pivot value */
-      in = *pInT1;
-
-      /* Destination pointer modifier */
-      k = 1u;
-
-      /* Check if the pivot element is zero */
-      if(*pInT1 == 0.0f)
-      {
-        /* Loop over the number rows present below */
-        for (i = (l + 1u); i < numRows; i++)
-        {
-          /* Update the input and destination pointers */
-          pInT2 = pInT1 + (numCols * l);
-          pOutT2 = pOutT1 + (numCols * k);
-
-          /* Check if there is a non zero pivot element to     
-           * replace in the rows below */
-          if(*pInT2 != 0.0f)
-          {
-            /* Loop over number of columns     
-             * to the right of the pilot element */
-            for (j = 0u; j < (numCols - l); j++)
-            {
-              /* Exchange the row elements of the input matrix */
-              Xchg = *pInT2;
-              *pInT2++ = *pInT1;
-              *pInT1++ = Xchg;
-            }
-
-            for (j = 0u; j < numCols; j++)
-            {
-              Xchg = *pOutT2;
-              *pOutT2++ = *pOutT1;
-              *pOutT1++ = Xchg;
-            }
-
-            /* Flag to indicate whether exchange is done or not */
-            flag = 1u;
-
-            /* Break after exchange is done */
-            break;
-          }
-
-          /* Update the destination pointer modifier */
-          k++;
-        }
-      }
-
-      /* Update the status if the matrix is singular */
-      if((flag != 1u) && (in == 0.0f))
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Points to the pivot row of input and destination matrices */
-      pPivotRowIn = pIn + (l * numCols);
-      pPivotRowDst = pOut + (l * numCols);
-
-      /* Temporary pointers to the pivot row pointers */
-      pInT1 = pPivotRowIn;
-      pOutT1 = pPivotRowDst;
-
-      /* Pivot element of the row */
-      in = *(pIn + (l * numCols));
-
-      /* Loop over number of columns     
-       * to the right of the pilot element */
-      for (j = 0u; j < (numCols - l); j++)
-      {
-        /* Divide each element of the row of the input matrix     
-         * by the pivot element */
-        *pInT1 = *pInT1 / in;
-        pInT1++;
-      }
-      for (j = 0u; j < numCols; j++)
-      {
-        /* Divide each element of the row of the destination matrix     
-         * by the pivot element */
-        *pOutT1 = *pOutT1 / in;
-        pOutT1++;
-      }
-
-      /* Replace the rows with the sum of that row and a multiple of row i     
-       * so that each new element in column i above row i is zero.*/
-
-      /* Temporary pointers for input and destination matrices */
-      pInT1 = pIn;
-      pOutT1 = pOut;
-
-      for (i = 0u; i < numRows; i++)
-      {
-        /* Check for the pivot element */
-        if(i == l)
-        {
-          /* If the processing element is the pivot element,     
-             only the columns to the right are to be processed */
-          pInT1 += numCols - l;
-          pOutT1 += numCols;
-        }
-        else
-        {
-          /* Element of the reference row */
-          in = *pInT1;
-
-          /* Working pointers for input and destination pivot rows */
-          pPRT_in = pPivotRowIn;
-          pPRT_pDst = pPivotRowDst;
-
-          /* Loop over the number of columns to the right of the pivot element,     
-             to replace the elements in the input matrix */
-          for (j = 0u; j < (numCols - l); j++)
-          {
-            /* Replace the element by the sum of that row     
-               and a multiple of the reference row  */
-            *pInT1 = *pInT1 - (in * *pPRT_in++);
-            pInT1++;
-          }
-          /* Loop over the number of columns to     
-             replace the elements in the destination matrix */
-          for (j = 0u; j < numCols; j++)
-          {
-            /* Replace the element by the sum of that row     
-               and a multiple of the reference row  */
-            *pOutT1 = *pOutT1 - (in * *pPRT_pDst++);
-            pOutT1++;
-          }
-
-        }
-        /* Increment the temporary input pointer */
-        pInT1 = pInT1 + l;
-      }
-      /* Increment the input pointer */
-      pIn++;
-
-      /* Decrement the loop counter */
-      loopCnt--;
-      /* Increment the index modifier */
-      l++;
-    }
-
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-    if((flag != 1u) && (in == 0.0f))
-    {
-      pIn = pSrc->pData;
-      for (i = 0; i < numRows * numCols; i++)
-      {
-        if (pIn[i] != 0.0f)
-            break;
-      }
-      
-      if (i == numRows * numCols)
-        status = ARM_MATH_SINGULAR;
-    }
-  }
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixInv group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f64.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f64.c
deleted file mode 100755
index a6c4980e..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f64.c
+++ /dev/null
@@ -1,703 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_inverse_f64.c    
-*    
-* Description:	Floating-point matrix inverse.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @defgroup MatrixInv Matrix Inverse    
- *    
- * Computes the inverse of a matrix.    
- *    
- * The inverse is defined only if the input matrix is square and non-singular (the determinant    
- * is non-zero). The function checks that the input and output matrices are square and of the    
- * same size.    
- *    
- * Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix    
- * inversion of floating-point matrices.    
- *    
- * \par Algorithm    
- * The Gauss-Jordan method is used to find the inverse.    
- * The algorithm performs a sequence of elementary row-operations until it    
- * reduces the input matrix to an identity matrix. Applying the same sequence    
- * of elementary row-operations to an identity matrix yields the inverse matrix.    
- * If the input matrix is singular, then the algorithm terminates and returns error status    
- * ARM_MATH_SINGULAR.    
- * \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method"    
- */
-
-/**    
- * @addtogroup MatrixInv    
- * @{    
- */
-
-/**    
- * @brief Floating-point matrix inverse.    
- * @param[in]       *pSrc points to input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns    
- * ARM_MATH_SIZE_MISMATCH if the input matrix is not square or if the size    
- * of the output matrix does not match the size of the input matrix.    
- * If the input matrix is found to be singular (non-invertible), then the function returns    
- * ARM_MATH_SINGULAR.  Otherwise, the function returns ARM_MATH_SUCCESS.    
- */
-
-arm_status arm_mat_inverse_f64(
-  const arm_matrix_instance_f64 * pSrc,
-  arm_matrix_instance_f64 * pDst)
-{
-  float64_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float64_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float64_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
-  float64_t *pOutT1, *pOutT2;                    /* Temporary output data matrix pointer */
-  float64_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
-  uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
-  uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
-
-#ifndef ARM_MATH_CM0_FAMILY
-  float64_t maxC;                                /* maximum value in the column */
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float64_t Xchg, in = 0.0f, in1;                /* Temporary input values  */
-  uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l;      /* loop counters */
-  arm_status status;                             /* status of matrix inverse */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
-     || (pSrc->numRows != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-
-    /*--------------------------------------------------------------------------------------------------------------    
-	 * Matrix Inverse can be solved using elementary row operations.    
-	 *    
-	 *	Gauss-Jordan Method:    
-	 *    
-	 *	   1. First combine the identity matrix and the input matrix separated by a bar to form an    
-	 *        augmented matrix as follows:    
-	 *				        _ 	      	       _         _	       _    
-	 *					   |  a11  a12 | 1   0  |       |  X11 X12  |    
-	 *					   |           |        |   =   |           |    
-	 *					   |_ a21  a22 | 0   1 _|       |_ X21 X21 _|    
-	 *    
-	 *		2. In our implementation, pDst Matrix is used as identity matrix.    
-	 *    
-	 *		3. Begin with the first row. Let i = 1.    
-	 *    
-	 *	    4. Check to see if the pivot for column i is the greatest of the column.    
-	 *		   The pivot is the element of the main diagonal that is on the current row.    
-	 *		   For instance, if working with row i, then the pivot element is aii.    
-	 *		   If the pivot is not the most significant of the columns, exchange that row with a row
-	 *		   below it that does contain the most significant value in column i. If the most
-	 *         significant value of the column is zero, then an inverse to that matrix does not exist.
-	 *		   The most significant value of the column is the absolute maximum.
-	 *    
-	 *	    5. Divide every element of row i by the pivot.    
-	 *    
-	 *	    6. For every row below and  row i, replace that row with the sum of that row and    
-	 *		   a multiple of row i so that each new element in column i below row i is zero.    
-	 *    
-	 *	    7. Move to the next row and column and repeat steps 2 through 5 until you have zeros    
-	 *		   for every element below and above the main diagonal.    
-	 *    
-	 *		8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).    
-	 *		   Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).    
-	 *----------------------------------------------------------------------------------------------------------------*/
-
-    /* Working pointer for destination matrix */
-    pOutT1 = pOut;
-
-    /* Loop over the number of rows */
-    rowCnt = numRows;
-
-    /* Making the destination matrix as identity matrix */
-    while(rowCnt > 0u)
-    {
-      /* Writing all zeroes in lower triangle of the destination matrix */
-      j = numRows - rowCnt;
-      while(j > 0u)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Writing all ones in the diagonal of the destination matrix */
-      *pOutT1++ = 1.0f;
-
-      /* Writing all zeroes in upper triangle of the destination matrix */
-      j = rowCnt - 1u;
-      while(j > 0u)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Decrement the loop counter */
-      rowCnt--;
-    }
-
-    /* Loop over the number of columns of the input matrix.    
-       All the elements in each column are processed by the row operations */
-    loopCnt = numCols;
-
-    /* Index modifier to navigate through the columns */
-    l = 0u;
-
-    while(loopCnt > 0u)
-    {
-      /* Check if the pivot element is zero..    
-       * If it is zero then interchange the row with non zero row below.    
-       * If there is no non zero element to replace in the rows below,    
-       * then the matrix is Singular. */
-
-      /* Working pointer for the input matrix that points    
-       * to the pivot element of the particular row  */
-      pInT1 = pIn + (l * numCols);
-
-      /* Working pointer for the destination matrix that points    
-       * to the pivot element of the particular row  */
-      pOutT1 = pOut + (l * numCols);
-
-      /* Temporary variable to hold the pivot value */
-      in = *pInT1;
-
-      /* Grab the most significant value from column l */
-      maxC = 0;
-      for (i = l; i < numRows; i++)
-      {
-        maxC = *pInT1 > 0 ? (*pInT1 > maxC ? *pInT1 : maxC) : (-*pInT1 > maxC ? -*pInT1 : maxC);
-        pInT1 += numCols;
-      }
-
-      /* Update the status if the matrix is singular */
-      if(maxC == 0.0f)
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Restore pInT1  */
-      pInT1 = pIn;
-
-      /* Destination pointer modifier */
-      k = 1u;
-      
-      /* Check if the pivot element is the most significant of the column */
-      if( (in > 0.0f ? in : -in) != maxC)
-      {
-        /* Loop over the number rows present below */
-        i = numRows - (l + 1u);
-
-        while(i > 0u)
-        {
-          /* Update the input and destination pointers */
-          pInT2 = pInT1 + (numCols * l);
-          pOutT2 = pOutT1 + (numCols * k);
-
-          /* Look for the most significant element to    
-           * replace in the rows below */
-          if((*pInT2 > 0.0f ? *pInT2: -*pInT2) == maxC)
-          {
-            /* Loop over number of columns    
-             * to the right of the pilot element */
-            j = numCols - l;
-
-            while(j > 0u)
-            {
-              /* Exchange the row elements of the input matrix */
-              Xchg = *pInT2;
-              *pInT2++ = *pInT1;
-              *pInT1++ = Xchg;
-
-              /* Decrement the loop counter */
-              j--;
-            }
-
-            /* Loop over number of columns of the destination matrix */
-            j = numCols;
-
-            while(j > 0u)
-            {
-              /* Exchange the row elements of the destination matrix */
-              Xchg = *pOutT2;
-              *pOutT2++ = *pOutT1;
-              *pOutT1++ = Xchg;
-
-              /* Decrement the loop counter */
-              j--;
-            }
-
-            /* Flag to indicate whether exchange is done or not */
-            flag = 1u;
-
-            /* Break after exchange is done */
-            break;
-          }
-
-          /* Update the destination pointer modifier */
-          k++;
-
-          /* Decrement the loop counter */
-          i--;
-        }
-      }
-
-      /* Update the status if the matrix is singular */
-      if((flag != 1u) && (in == 0.0f))
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Points to the pivot row of input and destination matrices */
-      pPivotRowIn = pIn + (l * numCols);
-      pPivotRowDst = pOut + (l * numCols);
-
-      /* Temporary pointers to the pivot row pointers */
-      pInT1 = pPivotRowIn;
-      pInT2 = pPivotRowDst;
-
-      /* Pivot element of the row */
-      in = *pPivotRowIn;
-
-      /* Loop over number of columns    
-       * to the right of the pilot element */
-      j = (numCols - l);
-
-      while(j > 0u)
-      {
-        /* Divide each element of the row of the input matrix    
-         * by the pivot element */
-        in1 = *pInT1;
-        *pInT1++ = in1 / in;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Loop over number of columns of the destination matrix */
-      j = numCols;
-
-      while(j > 0u)
-      {
-        /* Divide each element of the row of the destination matrix    
-         * by the pivot element */
-        in1 = *pInT2;
-        *pInT2++ = in1 / in;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Replace the rows with the sum of that row and a multiple of row i    
-       * so that each new element in column i above row i is zero.*/
-
-      /* Temporary pointers for input and destination matrices */
-      pInT1 = pIn;
-      pInT2 = pOut;
-
-      /* index used to check for pivot element */
-      i = 0u;
-
-      /* Loop over number of rows */
-      /*  to be replaced by the sum of that row and a multiple of row i */
-      k = numRows;
-
-      while(k > 0u)
-      {
-        /* Check for the pivot element */
-        if(i == l)
-        {
-          /* If the processing element is the pivot element,    
-             only the columns to the right are to be processed */
-          pInT1 += numCols - l;
-
-          pInT2 += numCols;
-        }
-        else
-        {
-          /* Element of the reference row */
-          in = *pInT1;
-
-          /* Working pointers for input and destination pivot rows */
-          pPRT_in = pPivotRowIn;
-          pPRT_pDst = pPivotRowDst;
-
-          /* Loop over the number of columns to the right of the pivot element,    
-             to replace the elements in the input matrix */
-          j = (numCols - l);
-
-          while(j > 0u)
-          {
-            /* Replace the element by the sum of that row    
-               and a multiple of the reference row  */
-            in1 = *pInT1;
-            *pInT1++ = in1 - (in * *pPRT_in++);
-
-            /* Decrement the loop counter */
-            j--;
-          }
-
-          /* Loop over the number of columns to    
-             replace the elements in the destination matrix */
-          j = numCols;
-
-          while(j > 0u)
-          {
-            /* Replace the element by the sum of that row    
-               and a multiple of the reference row  */
-            in1 = *pInT2;
-            *pInT2++ = in1 - (in * *pPRT_pDst++);
-
-            /* Decrement the loop counter */
-            j--;
-          }
-
-        }
-
-        /* Increment the temporary input pointer */
-        pInT1 = pInT1 + l;
-
-        /* Decrement the loop counter */
-        k--;
-
-        /* Increment the pivot index */
-        i++;
-      }
-
-      /* Increment the input pointer */
-      pIn++;
-
-      /* Decrement the loop counter */
-      loopCnt--;
-
-      /* Increment the index modifier */
-      l++;
-    }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float64_t Xchg, in = 0.0f;                     /* Temporary input values  */
-  uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l;      /* loop counters */
-  arm_status status;                             /* status of matrix inverse */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
-     || (pSrc->numRows != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-
-    /*--------------------------------------------------------------------------------------------------------------       
-	 * Matrix Inverse can be solved using elementary row operations.        
-	 *        
-	 *	Gauss-Jordan Method:       
-	 *	 	       
-	 *	   1. First combine the identity matrix and the input matrix separated by a bar to form an        
-	 *        augmented matrix as follows:        
-	 *				        _  _	      _	    _	   _   _         _	       _       
-	 *					   |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |         
-	 *					   |  |            | | |        |   |   =   |           |        
-	 *					   |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|       
-	 *					          
-	 *		2. In our implementation, pDst Matrix is used as identity matrix.    
-	 *       
-	 *		3. Begin with the first row. Let i = 1.       
-	 *       
-	 *	    4. Check to see if the pivot for row i is zero.       
-	 *		   The pivot is the element of the main diagonal that is on the current row.       
-	 *		   For instance, if working with row i, then the pivot element is aii.       
-	 *		   If the pivot is zero, exchange that row with a row below it that does not        
-	 *		   contain a zero in column i. If this is not possible, then an inverse        
-	 *		   to that matrix does not exist.       
-	 *	       
-	 *	    5. Divide every element of row i by the pivot.       
-	 *	       
-	 *	    6. For every row below and  row i, replace that row with the sum of that row and        
-	 *		   a multiple of row i so that each new element in column i below row i is zero.       
-	 *	       
-	 *	    7. Move to the next row and column and repeat steps 2 through 5 until you have zeros       
-	 *		   for every element below and above the main diagonal.        
-	 *		   		          
-	 *		8. Now an identical matrix is formed to the left of the bar(input matrix, src).       
-	 *		   Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).         
-	 *----------------------------------------------------------------------------------------------------------------*/
-
-    /* Working pointer for destination matrix */
-    pOutT1 = pOut;
-
-    /* Loop over the number of rows */
-    rowCnt = numRows;
-
-    /* Making the destination matrix as identity matrix */
-    while(rowCnt > 0u)
-    {
-      /* Writing all zeroes in lower triangle of the destination matrix */
-      j = numRows - rowCnt;
-      while(j > 0u)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Writing all ones in the diagonal of the destination matrix */
-      *pOutT1++ = 1.0f;
-
-      /* Writing all zeroes in upper triangle of the destination matrix */
-      j = rowCnt - 1u;
-      while(j > 0u)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Decrement the loop counter */
-      rowCnt--;
-    }
-
-    /* Loop over the number of columns of the input matrix.     
-       All the elements in each column are processed by the row operations */
-    loopCnt = numCols;
-
-    /* Index modifier to navigate through the columns */
-    l = 0u;
-    //for(loopCnt = 0u; loopCnt < numCols; loopCnt++)   
-    while(loopCnt > 0u)
-    {
-      /* Check if the pivot element is zero..    
-       * If it is zero then interchange the row with non zero row below.   
-       * If there is no non zero element to replace in the rows below,   
-       * then the matrix is Singular. */
-
-      /* Working pointer for the input matrix that points     
-       * to the pivot element of the particular row  */
-      pInT1 = pIn + (l * numCols);
-
-      /* Working pointer for the destination matrix that points     
-       * to the pivot element of the particular row  */
-      pOutT1 = pOut + (l * numCols);
-
-      /* Temporary variable to hold the pivot value */
-      in = *pInT1;
-
-      /* Destination pointer modifier */
-      k = 1u;
-
-      /* Check if the pivot element is zero */
-      if(*pInT1 == 0.0f)
-      {
-        /* Loop over the number rows present below */
-        for (i = (l + 1u); i < numRows; i++)
-        {
-          /* Update the input and destination pointers */
-          pInT2 = pInT1 + (numCols * l);
-          pOutT2 = pOutT1 + (numCols * k);
-
-          /* Check if there is a non zero pivot element to     
-           * replace in the rows below */
-          if(*pInT2 != 0.0f)
-          {
-            /* Loop over number of columns     
-             * to the right of the pilot element */
-            for (j = 0u; j < (numCols - l); j++)
-            {
-              /* Exchange the row elements of the input matrix */
-              Xchg = *pInT2;
-              *pInT2++ = *pInT1;
-              *pInT1++ = Xchg;
-            }
-
-            for (j = 0u; j < numCols; j++)
-            {
-              Xchg = *pOutT2;
-              *pOutT2++ = *pOutT1;
-              *pOutT1++ = Xchg;
-            }
-
-            /* Flag to indicate whether exchange is done or not */
-            flag = 1u;
-
-            /* Break after exchange is done */
-            break;
-          }
-
-          /* Update the destination pointer modifier */
-          k++;
-        }
-      }
-
-      /* Update the status if the matrix is singular */
-      if((flag != 1u) && (in == 0.0f))
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Points to the pivot row of input and destination matrices */
-      pPivotRowIn = pIn + (l * numCols);
-      pPivotRowDst = pOut + (l * numCols);
-
-      /* Temporary pointers to the pivot row pointers */
-      pInT1 = pPivotRowIn;
-      pOutT1 = pPivotRowDst;
-
-      /* Pivot element of the row */
-      in = *(pIn + (l * numCols));
-
-      /* Loop over number of columns     
-       * to the right of the pilot element */
-      for (j = 0u; j < (numCols - l); j++)
-      {
-        /* Divide each element of the row of the input matrix     
-         * by the pivot element */
-        *pInT1 = *pInT1 / in;
-        pInT1++;
-      }
-      for (j = 0u; j < numCols; j++)
-      {
-        /* Divide each element of the row of the destination matrix     
-         * by the pivot element */
-        *pOutT1 = *pOutT1 / in;
-        pOutT1++;
-      }
-
-      /* Replace the rows with the sum of that row and a multiple of row i     
-       * so that each new element in column i above row i is zero.*/
-
-      /* Temporary pointers for input and destination matrices */
-      pInT1 = pIn;
-      pOutT1 = pOut;
-
-      for (i = 0u; i < numRows; i++)
-      {
-        /* Check for the pivot element */
-        if(i == l)
-        {
-          /* If the processing element is the pivot element,     
-             only the columns to the right are to be processed */
-          pInT1 += numCols - l;
-          pOutT1 += numCols;
-        }
-        else
-        {
-          /* Element of the reference row */
-          in = *pInT1;
-
-          /* Working pointers for input and destination pivot rows */
-          pPRT_in = pPivotRowIn;
-          pPRT_pDst = pPivotRowDst;
-
-          /* Loop over the number of columns to the right of the pivot element,     
-             to replace the elements in the input matrix */
-          for (j = 0u; j < (numCols - l); j++)
-          {
-            /* Replace the element by the sum of that row     
-               and a multiple of the reference row  */
-            *pInT1 = *pInT1 - (in * *pPRT_in++);
-            pInT1++;
-          }
-          /* Loop over the number of columns to     
-             replace the elements in the destination matrix */
-          for (j = 0u; j < numCols; j++)
-          {
-            /* Replace the element by the sum of that row     
-               and a multiple of the reference row  */
-            *pOutT1 = *pOutT1 - (in * *pPRT_pDst++);
-            pOutT1++;
-          }
-
-        }
-        /* Increment the temporary input pointer */
-        pInT1 = pInT1 + l;
-      }
-      /* Increment the input pointer */
-      pIn++;
-
-      /* Decrement the loop counter */
-      loopCnt--;
-      /* Increment the index modifier */
-      l++;
-    }
-
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-    if((flag != 1u) && (in == 0.0f))
-    {
-      pIn = pSrc->pData;
-      for (i = 0; i < numRows * numCols; i++)
-      {
-        if (pIn[i] != 0.0f)
-            break;
-      }
-      
-      if (i == numRows * numCols)
-        status = ARM_MATH_SINGULAR;
-    }
-  }
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixInv group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c
deleted file mode 100755
index 55349de7..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c
+++ /dev/null
@@ -1,286 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_mult_f32.c    
-*    
-* Description:  Floating-point matrix multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @defgroup MatrixMult Matrix Multiplication    
- *    
- * Multiplies two matrices.    
- *    
- * \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices"    
-    
- * Matrix multiplication is only defined if the number of columns of the    
- * first matrix equals the number of rows of the second matrix.    
- * Multiplying an M x N matrix with an N x P matrix results    
- * in an M x P matrix.    
- * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of    
- * pSrcA and pSrcB are equal; and (2) that the size of the output    
- * matrix equals the outer dimensions of pSrcA and pSrcB.    
- */
-
-
-/**    
- * @addtogroup MatrixMult    
- * @{    
- */
-
-/**    
- * @brief Floating-point matrix multiplication.    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- */
-
-arm_status arm_mat_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
-  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
-  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A  */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *px;                                 /* Temporary output data matrix pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t in1, in2, in3, in4;
-  uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set    
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0u;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0.0f;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pIn1 = pInA;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2u;
-
-        /* matrix multiplication        */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          in3 = *pIn2;
-          pIn2 += numColsB;
-          in1 = pIn1[0];
-          in2 = pIn1[1];
-          sum += in1 * in3;
-          in4 = *pIn2;
-          pIn2 += numColsB;
-          sum += in2 * in4;
-
-          in3 = *pIn2;
-          pIn2 += numColsB;
-          in1 = pIn1[2];
-          in2 = pIn1[3];
-          sum += in1 * in3;
-          in4 = *pIn2;
-          pIn2 += numColsB;
-          sum += in2 * in4;
-          pIn1 += 4u;
-
-          /* Decrement the loop count */
-          colCnt--;
-        }
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          sum += *pIn1++ * (*pIn2);
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Store the result in the destination buffer */
-        *px++ = sum;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = pSrcB->pData + j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
-  uint16_t col, i = 0u, row = numRowsA, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pInA with each column in pInB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set     
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0.0f;
-
-        /* Initialize the pointer pIn1 to point to the starting address of the row being processed */
-        pIn1 = pInA;
-
-        /* Matrix A columns number of MAC operations are to be performed */
-        colCnt = numColsA;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          sum += *pIn1++ * (*pIn2);
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Store the result in the destination buffer */
-        *px++ = sum;
-
-        /* Decrement the column loop counter */
-        col--;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        pIn2 = pInB + (numColsB - col);
-
-      } while(col > 0u);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixMult group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
deleted file mode 100755
index 11139b8a..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
+++ /dev/null
@@ -1,369 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_mult_fast_q15.c    
-*    
-* Description:	 Q15 matrix multiplication (fast variant)    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixMult    
- * @{    
- */
-
-
-/**    
- * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @param[in]		*pState points to the array for storing intermediate results    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The difference between the function arm_mat_mult_q15() and this fast variant is that    
- * the fast variant use a 32-bit rather than a 64-bit accumulator.    
- * The result of each 1.15 x 1.15 multiplication is truncated to        
- * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30        
- * format. Finally, the accumulator is saturated and converted to a 1.15 result.        
- *        
- * \par        
- * The fast version has the same overflow behavior as the standard version but provides        
- * less precision since it discards the low 16 bits of each multiplication result.        
- * In order to avoid overflows completely the input signals must be scaled down.        
- * Scale down one of the input matrices by log2(numColsA) bits to        
- * avoid overflows, as a total of numColsA additions are computed internally for each        
- * output element.        
- *        
- * \par    
- * See arm_mat_mult_q15() for a slower implementation of this function    
- * which uses 64-bit accumulation to provide higher precision.    
- */
-
-arm_status arm_mat_mult_fast_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pState)
-{
-  q31_t sum;                                     /* accumulator */
-  q15_t *pSrcBT = pState;                        /* input data matrix pointer for transpose */
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
-  q15_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A    */
-  uint16_t col, i = 0u, row = numRowsB, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q31_t in;                                      /* Temporary variable to hold the input value */
-  q31_t inA1, inA2, inB1, inB2;
-
-#else
-
-  q15_t in;                                      /* Temporary variable to hold the input value */
-  q15_t inA1, inA2, inB1, inB2;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif
-  {
-    /* Matrix transpose */
-    do
-    {
-      /* Apply loop unrolling and exchange the columns with row elements */
-      col = numColsB >> 2;
-
-      /* The pointer px is set to starting address of the column being processed */
-      px = pSrcBT + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(col > 0u)
-      {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) in;
-
-#else
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Unpack and store the second element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *px = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) in;
-
-#else
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Unpack and store the second element in the destination */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *px = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-#else
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-        
-		/* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.        
-       ** No loop unrolling is used. */
-      col = numColsB % 0x4u;
-
-      while(col > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pInB++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      i++;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* Reset the variables for the usage in the following multiplication process */
-    row = numRowsA;
-    i = 0u;
-    px = pDst->pData;
-
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set        
-       ** to the starting address of the transposed pSrcB data */
-      pInB = pSrcBT;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 2 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pInA = pSrcA->pData + i;
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-          inA1 = *__SIMD32(pInA)++;
-          inB1 = *__SIMD32(pInB)++;
-          inA2 = *__SIMD32(pInA)++;
-          inB2 = *__SIMD32(pInB)++;
-
-          sum = __SMLAD(inA1, inB1, sum);
-          sum = __SMLAD(inA2, inB2, sum);
-
-#else
-
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          inA2 = *pInA++;
-          sum += inA1 * inB1;
-          inB2 = *pInB++;
-
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          sum += inA2 * inB2;
-          inA2 = *pInA++;
-          inB2 = *pInB++;
-
-          sum += inA1 * inB1;
-          sum += inA2 * inB2;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* process odd column samples */
-        colCnt = numColsA % 0x4u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          sum += (q31_t) (*pInA++) * (*pInB++);
-
-          colCnt--;
-        }
-
-        /* Saturate and store the result in the destination buffer */
-        *px = (q15_t) (sum >> 15);
-        px++;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-      i = i + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixMult group        
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
deleted file mode 100755
index dbc31410..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
+++ /dev/null
@@ -1,226 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_mult_fast_q31.c    
-*    
-* Description:	 Q31 matrix multiplication (fast variant).    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixMult    
- * @{    
- */
-
-/**    
- * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The difference between the function arm_mat_mult_q31() and this fast variant is that    
- * the fast variant use a 32-bit rather than a 64-bit accumulator.    
- * The result of each 1.31 x 1.31 multiplication is truncated to    
- * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30    
- * format. Finally, the accumulator is saturated and converted to a 1.31 result.    
- *    
- * \par    
- * The fast version has the same overflow behavior as the standard version but provides    
- * less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signals must be scaled down.    
- * Scale down one of the input matrices by log2(numColsA) bits to    
- * avoid overflows, as a total of numColsA additions are computed internally for each    
- * output element.    
- *    
- * \par    
- * See arm_mat_mult_q31() for a slower implementation of this function    
- * which uses 64-bit accumulation to provide higher precision.    
- */
-
-arm_status arm_mat_mult_fast_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
-//  q31_t *pSrcB = pSrcB->pData;                    /* input data matrix pointer B */    
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t *px;                                     /* Temporary output data matrix pointer */
-  q31_t sum;                                     /* Accumulator */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-  q31_t inA1, inA2, inA3, inA4, inB1, inB2, inB3, inB4;
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set    
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0u;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate the pointer pIn1 to point to the starting address of pInA */
-        pIn1 = pInA;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          inB1 = *pIn2;
-          pIn2 += numColsB;
-
-          inA1 = pIn1[0];
-          inA2 = pIn1[1];
-
-          inB2 = *pIn2;
-          pIn2 += numColsB;
-
-          inB3 = *pIn2;
-          pIn2 += numColsB;
-
-          sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA1 * inB1)) >> 32);
-          sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA2 * inB2)) >> 32);
-
-          inA3 = pIn1[2];
-          inA4 = pIn1[3];
-
-          inB4 = *pIn2;
-          pIn2 += numColsB;
-
-          sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA3 * inB3)) >> 32);
-          sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA4 * inB4)) >> 32);
-
-          pIn1 += 4u;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.    
-         ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * pIn1++ * (*pIn2))) >> 32);
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Convert the result from 2.30 to 1.31 format and store in destination buffer */
-        *px++ = sum << 1;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = pSrcB->pData + j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixMult group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c
deleted file mode 100755
index 9e8d26dd..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c
+++ /dev/null
@@ -1,469 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_mult_q15.c    
-*    
-* Description:	 Q15 matrix multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixMult    
- * @{    
- */
-
-
-/**    
- * @brief Q15 matrix multiplication    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @param[in]		*pState points to the array for storing intermediate results (Unused)  
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator. The inputs to the    
- * multiplications are in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate    
- * results are accumulated in a 64-bit accumulator in 34.30 format. This approach    
- * provides 33 guard bits and there is no risk of overflow. The 34.30 result is then    
- * truncated to 34.15 format by discarding the low 15 bits and then saturated to    
- * 1.15 format.    
- *    
- * \par    
- * Refer to arm_mat_mult_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.    
- *    
- */
-
-arm_status arm_mat_mult_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pState CMSIS_UNUSED)
-{
-  q63_t sum;                                     /* accumulator */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pSrcBT = pState;                        /* input data matrix pointer for transpose */
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
-  q15_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A    */
-  uint16_t col, i = 0u, row = numRowsB, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q31_t in;                                      /* Temporary variable to hold the input value */
-  q31_t pSourceA1, pSourceB1, pSourceA2, pSourceB2;
-
-#else
-
-  q15_t in;                                      /* Temporary variable to hold the input value */
-  q15_t inA1, inB1, inA2, inB2;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-    /* Matrix transpose */
-    do
-    {
-      /* Apply loop unrolling and exchange the columns with row elements */
-      col = numColsB >> 2;
-
-      /* The pointer px is set to starting address of the column being processed */
-      px = pSrcBT + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(col > 0u)
-      {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) in;
-
-#else
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Unpack and store the second element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *px = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) in;
-
-#else
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Unpack and store the second element in the destination */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *px = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-#else
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-       /* Decrement the column loop counter */
-        col--;
-      }
-
-      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.        
-       ** No loop unrolling is used. */
-      col = numColsB % 0x4u;
-
-      while(col > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pInB++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      i++;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* Reset the variables for the usage in the following multiplication process */
-    row = numRowsA;
-    i = 0u;
-    px = pDst->pData;
-
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set        
-       ** to the starting address of the transposed pSrcB data */
-      pInB = pSrcBT;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 2 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pInA = pSrcA->pData + i;
-
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          pSourceA1 = *__SIMD32(pInA)++;
-          pSourceB1 = *__SIMD32(pInB)++;
-
-          pSourceA2 = *__SIMD32(pInA)++;
-          pSourceB2 = *__SIMD32(pInB)++;
-
-          /* Multiply and Accumlates */
-          sum = __SMLALD(pSourceA1, pSourceB1, sum);
-          sum = __SMLALD(pSourceA2, pSourceB2, sum);
-
-#else
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          inA2 = *pInA++;
-          /* Multiply and Accumlates */
-          sum += inA1 * inB1;
-          inB2 = *pInB++;
-
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          /* Multiply and Accumlates */
-          sum += inA2 * inB2;
-          inA2 = *pInA++;
-          inB2 = *pInB++;
-
-          /* Multiply and Accumlates */
-          sum += inA1 * inB1;
-          sum += inA2 * inB2;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* process remaining column samples */
-        colCnt = numColsA & 3u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          sum += *pInA++ * *pInB++;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Saturate and store the result in the destination buffer */
-        *px = (q15_t) (__SSAT((sum >> 15), 16));
-        px++;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-      i = i + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q15_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q15_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t col, i = 0u, row = numRowsA, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set          
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate the pointer pIn1 to point to the starting address of pSrcA */
-        pIn1 = pInA;
-
-        /* Matrix A columns number of MAC operations are to be performed */
-        colCnt = numColsA;
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          sum += (q31_t) * pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Convert the result from 34.30 to 1.15 format and store the saturated value in destination buffer */
-        /* Saturate and store the result in the destination buffer */
-        *px++ = (q15_t) __SSAT((sum >> 15), 16);
-
-        /* Decrement the column loop counter */
-        col--;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        pIn2 = pInB + (numColsB - col);
-
-      } while(col > 0u);
-
-      /* Update the pointer pSrcA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixMult group        
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c
deleted file mode 100755
index 6c97eef1..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c
+++ /dev/null
@@ -1,294 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_mult_q31.c    
-*    
-* Description:	 Q31 matrix multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixMult    
- * @{    
- */
-
-/**    
- * @brief Q31 matrix multiplication    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate    
- * multiplication results but provides only a single guard bit. There is no saturation    
- * on intermediate additions. Thus, if the accumulator overflows it wraps around and    
- * distorts the result. The input signals should be scaled down to avoid intermediate    
- * overflows. The input is thus scaled down by log2(numColsA) bits    
- * to avoid overflows, as a total of numColsA additions are performed internally.    
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.    
- *    
- * \par    
- * See arm_mat_mult_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- *    
- */
-
-arm_status arm_mat_mult_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t *px;                                     /* Temporary output data matrix pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-  q31_t a0, a1, a2, a3, b0, b1, b2, b3;
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set    
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0u;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate the pointer pIn1 to point to the starting address of pInA */
-        pIn1 = pInA;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          b0 = *pIn2;
-          pIn2 += numColsB;
-
-          a0 = *pIn1++;
-          a1 = *pIn1++;
-
-          b1 = *pIn2;
-          pIn2 += numColsB;
-          b2 = *pIn2;
-          pIn2 += numColsB;
-
-          sum += (q63_t) a0 *b0;
-          sum += (q63_t) a1 *b1;
-
-          a2 = *pIn1++;
-          a3 = *pIn1++;
-
-          b3 = *pIn2;
-          pIn2 += numColsB;
-
-          sum += (q63_t) a2 *b2;
-          sum += (q63_t) a3 *b3;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.    
-         ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) * pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Convert the result from 2.62 to 1.31 format and store in destination buffer */
-        *px++ = (q31_t) (sum >> 31);
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = (pSrcB->pData) + j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-  uint16_t col, i = 0u, row = numRowsA, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set          
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate the pointer pIn1 to point to the starting address of pInA */
-        pIn1 = pInA;
-
-        /* Matrix A columns number of MAC operations are to be performed */
-        colCnt = numColsA;
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) * pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Convert the result from 2.62 to 1.31 format and store in destination buffer */
-        *px++ = (q31_t) clip_q63_to_q31(sum >> 31);
-
-        /* Decrement the column loop counter */
-        col--;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        pIn2 = pInB + (numColsB - col);
-
-      } while(col > 0u);
-
-#endif
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixMult group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c
deleted file mode 100755
index b7be4cea..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c
+++ /dev/null
@@ -1,181 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_mat_scale_f32.c    
-*    
-* Description:	Multiplies a floating-point matrix by a scalar.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMatrix        
- */
-
-/**        
- * @defgroup MatrixScale Matrix Scale        
- *        
- * Multiplies a matrix by a scalar.  This is accomplished by multiplying each element in the        
- * matrix by the scalar.  For example:        
- * \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix"        
- *        
- * The function checks to make sure that the input and output matrices are of the same size.        
- *        
- * In the fixed-point Q15 and Q31 functions, scale is represented by        
- * a fractional multiplication scaleFract and an arithmetic shift shift.        
- * The shift allows the gain of the scaling operation to exceed 1.0.        
- * The overall scale factor applied to the fixed-point data is        
- * 
        
- *     scale = scaleFract * 2^shift.        
- * 
        
- */
-
-/**        
- * @addtogroup MatrixScale        
- * @{        
- */
-
-/**        
- * @brief Floating-point matrix scaling.        
- * @param[in]       *pSrc points to input matrix structure        
- * @param[in]       scale scale factor to be applied         
- * @param[out]      *pDst points to output matrix structure        
- * @return     		The function returns either ARM_MATH_SIZE_MISMATCH         
- * or ARM_MATH_SUCCESS based on the outcome of size checking.        
- *        
- */
-
-arm_status arm_mat_scale_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  float32_t scale,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix scaling     */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  float32_t in1, in2, in3, in4;                  /* temporary variables */
-  float32_t out1, out2, out3, out4;              /* temporary variables */
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * scale */
-      /* Scaling and results are stored in the destination buffer. */
-      in1 = pIn[0];
-      in2 = pIn[1];
-      in3 = pIn[2];
-      in4 = pIn[3];
-
-      out1 = in1 * scale;
-      out2 = in2 * scale;
-      out3 = in3 * scale;
-      out4 = in4 * scale;
-
-
-      pOut[0] = out1;
-      pOut[1] = out2;
-      pOut[2] = out3;
-      pOut[3] = out4;
-
-      /* update pointers to process next sampels */
-      pIn += 4u;
-      pOut += 4u;
-
-      /* Decrement the numSamples loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * scale */
-      /* The results are stored in the destination buffer. */
-      *pOut++ = (*pIn++) * scale;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixScale group        
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c
deleted file mode 100755
index 4e67cf92..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_scale_q15.c    
-*    
-* Description:	Multiplies a Q15 matrix by a scalar.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixScale    
- * @{    
- */
-
-/**    
- * @brief Q15 matrix scaling.    
- * @param[in]       *pSrc points to input matrix    
- * @param[in]       scaleFract fractional portion of the scale factor    
- * @param[in]       shift number of bits to shift the result by    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The input data *pSrc and scaleFract are in 1.15 format.    
- * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.    
- */
-
-arm_status arm_mat_scale_q15(
-  const arm_matrix_instance_q15 * pSrc,
-  q15_t scaleFract,
-  int32_t shift,
-  arm_matrix_instance_q15 * pDst)
-{
-  q15_t *pIn = pSrc->pData;                      /* input data matrix pointer */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  int32_t totShift = 15 - shift;                 /* total shift to apply after scaling */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix scaling     */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  q15_t in1, in2, in3, in4;
-  q31_t out1, out2, out3, out4;
-  q31_t inA1, inA2;
-
-#endif //     #ifndef ARM_MATH_CM0_FAMILY
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch */
-  if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif //    #ifdef ARM_MATH_MATRIX_CHECK
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * k */
-      /* Scale, saturate and then store the results in the destination buffer. */
-      /* Reading 2 inputs from memory */
-      inA1 = _SIMD32_OFFSET(pIn);
-      inA2 = _SIMD32_OFFSET(pIn + 2);
-
-      /* C = A * scale */
-      /* Scale the inputs and then store the 2 results in the destination buffer        
-       * in single cycle by packing the outputs */
-      out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
-      out2 = (q31_t) ((q15_t) inA1 * scaleFract);
-      out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
-      out4 = (q31_t) ((q15_t) inA2 * scaleFract);
-
-      out1 = out1 >> totShift;
-      inA1 = _SIMD32_OFFSET(pIn + 4);
-      out2 = out2 >> totShift;
-      inA2 = _SIMD32_OFFSET(pIn + 6);
-      out3 = out3 >> totShift;
-      out4 = out4 >> totShift;
-
-      in1 = (q15_t) (__SSAT(out1, 16));
-      in2 = (q15_t) (__SSAT(out2, 16));
-      in3 = (q15_t) (__SSAT(out3, 16));
-      in4 = (q15_t) (__SSAT(out4, 16));
-
-      _SIMD32_OFFSET(pOut) = __PKHBT(in2, in1, 16);
-      _SIMD32_OFFSET(pOut + 2) = __PKHBT(in4, in3, 16);
-
-      /* update pointers to process next sampels */
-      pIn += 4u;
-      pOut += 4u;
-
-
-      /* Decrement the numSamples loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * k */
-      /* Scale, saturate and then store the results in the destination buffer. */
-      *pOut++ =
-        (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
-
-      /* Decrement the numSamples loop counter */
-      blkCnt--;
-    }
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixScale group        
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c
deleted file mode 100755
index 845f3061..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c
+++ /dev/null
@@ -1,202 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_scale_q31.c    
-*    
-* Description:	Multiplies a Q31 matrix by a scalar.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  ------------------------------------------------ */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMatrix        
- */
-
-/**        
- * @addtogroup MatrixScale        
- * @{        
- */
-
-/**        
- * @brief Q31 matrix scaling.        
- * @param[in]       *pSrc points to input matrix        
- * @param[in]       scaleFract fractional portion of the scale factor        
- * @param[in]       shift number of bits to shift the result by        
- * @param[out]      *pDst points to output matrix structure        
- * @return     		The function returns either        
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.        
- *        
- * @details        
- * Scaling and Overflow Behavior:        
- * \par        
- * The input data *pSrc and scaleFract are in 1.31 format.        
- * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.        
- */
-
-arm_status arm_mat_scale_q31(
-  const arm_matrix_instance_q31 * pSrc,
-  q31_t scaleFract,
-  int32_t shift,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn = pSrc->pData;                      /* input data matrix pointer */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  int32_t totShift = shift + 1;                  /* shift to apply after scaling */
-  uint32_t blkCnt;                               /* loop counters  */
-  arm_status status;                             /* status of matrix scaling      */
-  q31_t in1, in2, out1;                          /* temporary variabels */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  q31_t in3, in4, out2, out3, out4;              /* temporary variables */
-
-#endif //      #ifndef ARM_MAT_CM0
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch  */
-  if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif //    #ifdef ARM_MATH_MATRIX_CHECK
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * k */
-      /* Read values from input */
-      in1 = *pIn;
-      in2 = *(pIn + 1);
-      in3 = *(pIn + 2);
-      in4 = *(pIn + 3);
-
-      /* multiply input with scaler value */
-      in1 = ((q63_t) in1 * scaleFract) >> 32;
-      in2 = ((q63_t) in2 * scaleFract) >> 32;
-      in3 = ((q63_t) in3 * scaleFract) >> 32;
-      in4 = ((q63_t) in4 * scaleFract) >> 32;
-
-      /* apply shifting */
-      out1 = in1 << totShift;
-      out2 = in2 << totShift;
-
-      /* saturate the results. */
-      if(in1 != (out1 >> totShift))
-        out1 = 0x7FFFFFFF ^ (in1 >> 31);
-
-      if(in2 != (out2 >> totShift))
-        out2 = 0x7FFFFFFF ^ (in2 >> 31);
-
-      out3 = in3 << totShift;
-      out4 = in4 << totShift;
-
-      *pOut = out1;
-      *(pOut + 1) = out2;
-
-      if(in3 != (out3 >> totShift))
-        out3 = 0x7FFFFFFF ^ (in3 >> 31);
-
-      if(in4 != (out4 >> totShift))
-        out4 = 0x7FFFFFFF ^ (in4 >> 31);
-
-
-      *(pOut + 2) = out3;
-      *(pOut + 3) = out4;
-
-      /* update pointers to process next sampels */
-      pIn += 4u;
-      pOut += 4u;
-
-
-      /* Decrement the numSamples loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * k */
-      /* Scale, saturate and then store the results in the destination buffer. */
-      in1 = *pIn++;
-
-      in2 = ((q63_t) in1 * scaleFract) >> 32;
-
-      out1 = in2 << totShift;
-
-      if(in2 != (out1 >> totShift))
-        out1 = 0x7FFFFFFF ^ (in2 >> 31);
-
-      *pOut++ = out1;
-
-      /* Decrement the numSamples loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixScale group        
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c
deleted file mode 100755
index 5451a3a5..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c
+++ /dev/null
@@ -1,209 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_sub_f32.c    
-*    
-* Description:	Floating-point matrix subtraction.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMatrix        
- */
-
-/**        
- * @defgroup MatrixSub Matrix Subtraction        
- *        
- * Subtract two matrices.        
- * \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices"        
- *        
- * The functions check to make sure that        
- * pSrcA, pSrcB, and pDst have the same        
- * number of rows and columns.        
- */
-
-/**        
- * @addtogroup MatrixSub        
- * @{        
- */
-
-/**        
- * @brief Floating-point matrix subtraction        
- * @param[in]       *pSrcA points to the first input matrix structure        
- * @param[in]       *pSrcB points to the second input matrix structure        
- * @param[out]      *pDst points to output matrix structure        
- * @return     		The function returns either        
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.        
- */
-
-arm_status arm_mat_sub_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
-  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer  */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  float32_t inA1, inA2, inB1, inB2, out1, out2;  /* temporary variables */
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-  uint32_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix subtraction */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract and then store the results in the destination buffer. */
-      /* Read values from source A */
-      inA1 = pIn1[0];
-
-      /* Read values from source B */
-      inB1 = pIn2[0];
-
-      /* Read values from source A */
-      inA2 = pIn1[1];
-
-      /* out = sourceA - sourceB */
-      out1 = inA1 - inB1;
-
-      /* Read values from source B */
-      inB2 = pIn2[1];
-
-      /* Read values from source A */
-      inA1 = pIn1[2];
-
-      /* out = sourceA - sourceB */
-      out2 = inA2 - inB2;
-
-      /* Read values from source B */
-      inB1 = pIn2[2];
-
-      /* Store result in destination */
-      pOut[0] = out1;
-      pOut[1] = out2;
-
-      /* Read values from source A */
-      inA2 = pIn1[3];
-
-      /* Read values from source B */
-      inB2 = pIn2[3];
-
-      /* out = sourceA - sourceB */
-      out1 = inA1 - inB1;
-
-
-      /* out = sourceA - sourceB */
-      out2 = inA2 - inB2;
-
-      /* Store result in destination */
-      pOut[2] = out1;
-
-      /* Store result in destination */
-      pOut[3] = out2;
-
-
-      /* update pointers to process next sampels */
-      pIn1 += 4u;
-      pIn2 += 4u;
-      pOut += 4u;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract and then store the results in the destination buffer. */
-      *pOut++ = (*pIn1++) - (*pIn2++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixSub group        
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c
deleted file mode 100755
index cc5a7b9a..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_sub_q15.c    
-*    
-* Description:	Q15 Matrix subtraction    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixSub    
- * @{    
- */
-
-/**    
- * @brief Q15 matrix subtraction.    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- */
-
-arm_status arm_mat_sub_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst)
-{
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  uint32_t blkCnt;                               /* loop counters  */
-  arm_status status;                             /* status of matrix subtraction  */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Apply loop unrolling */
-    blkCnt = numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract, Saturate and then store the results in the destination buffer. */
-      *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
-      *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract and then store the results in the destination buffer. */
-      *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract and then store the results in the destination buffer. */
-      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixSub group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c
deleted file mode 100755
index d5ac2064..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c
+++ /dev/null
@@ -1,208 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_sub_q31.c    
-*    
-* Description:	Q31 matrix subtraction    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMatrix        
- */
-
-/**        
- * @addtogroup MatrixSub        
- * @{        
- */
-
-/**        
- * @brief Q31 matrix subtraction.        
- * @param[in]       *pSrcA points to the first input matrix structure        
- * @param[in]       *pSrcB points to the second input matrix structure        
- * @param[out]      *pDst points to output matrix structure        
- * @return     		The function returns either        
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.        
- *        
- * Scaling and Overflow Behavior:        
- * \par        
- * The function uses saturating arithmetic.        
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.        
- */
-
-
-arm_status arm_mat_sub_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t inA1, inB1;                              /* temporary variables */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  q31_t inA2, inB2;                              /* temporary variables */
-  q31_t out1, out2;                              /* temporary variables */
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-  uint32_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix subtraction */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition  */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract, saturate and then store the results in the destination buffer. */
-      /* Read values from source A */
-      inA1 = pIn1[0];
-
-      /* Read values from source B */
-      inB1 = pIn2[0];
-
-      /* Read values from source A */
-      inA2 = pIn1[1];
-
-      /* Subtract and saturate */
-      out1 = __QSUB(inA1, inB1);
-
-      /* Read values from source B */
-      inB2 = pIn2[1];
-
-      /* Read values from source A */
-      inA1 = pIn1[2];
-
-      /* Subtract and saturate */
-      out2 = __QSUB(inA2, inB2);
-
-      /* Read values from source B */
-      inB1 = pIn2[2];
-
-      /* Store result in destination */
-      pOut[0] = out1;
-      pOut[1] = out2;
-
-      /* Read values from source A */
-      inA2 = pIn1[3];
-
-      /* Read values from source B */
-      inB2 = pIn2[3];
-
-      /* Subtract and saturate */
-      out1 = __QSUB(inA1, inB1);
-
-      /* Subtract and saturate */
-      out2 = __QSUB(inA2, inB2);
-
-      /* Store result in destination */
-      pOut[2] = out1;
-      pOut[3] = out2;
-
-      /* update pointers to process next samples */
-      pIn1 += 4u;
-      pIn2 += 4u;
-      pOut += 4u;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract, saturate and then store the results in the destination buffer. */
-      inA1 = *pIn1++;
-      inB1 = *pIn2++;
-
-      inA1 = __QSUB(inA1, inB1);
-
-      *pOut++ = inA1;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixSub group        
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c
deleted file mode 100755
index f5cd4565..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c
+++ /dev/null
@@ -1,218 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_trans_f32.c    
-*    
-* Description:	Floating-point matrix transpose.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-/**    
- * @defgroup MatrixTrans Matrix Transpose    
- *    
- * Tranposes a matrix.    
- * Transposing an M x N matrix flips it around the center diagonal and results in an N x M matrix.    
- * \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix"    
- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixTrans    
- * @{    
- */
-
-/**    
-  * @brief Floating-point matrix transpose.    
-  * @param[in]  *pSrc points to the input matrix    
-  * @param[out] *pDst points to the output matrix    
-  * @return 	The function returns either  ARM_MATH_SIZE_MISMATCH    
-  * or ARM_MATH_SUCCESS based on the outcome of size checking.    
-  */
-
-
-arm_status arm_mat_trans_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *px;                                 /* Temporary output data matrix pointer */
-  uint16_t nRows = pSrc->numRows;                /* number of rows */
-  uint16_t nColumns = pSrc->numCols;             /* number of columns */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t blkCnt, i = 0u, row = nRows;          /* loop counters */
-  arm_status status;                             /* status of matrix transpose  */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* Loop Unrolling */
-      blkCnt = nColumns >> 2;
-
-      /* The pointer px is set to starting address of the column being processed */
-      px = pOut + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(blkCnt > 0u)        /* column loop */
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-
-      /* Perform matrix transpose for last 3 samples here. */
-      blkCnt = nColumns % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  uint16_t col, i = 0u, row = nRows;             /* loop counters */
-  arm_status status;                             /* status of matrix transpose  */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* The pointer px is set to starting address of the column being processed */
-      px = pOut + i;
-
-      /* Initialize column loop counter */
-      col = nColumns;
-
-      while(col > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-      i++;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);          /* row loop end  */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixTrans group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c
deleted file mode 100755
index c4656bbd..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c
+++ /dev/null
@@ -1,284 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_trans_q15.c    
-*    
-* Description:	Q15 matrix transpose.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixTrans    
- * @{    
- */
-
-/*    
- * @brief Q15 matrix transpose.    
- * @param[in]  *pSrc points to the input matrix    
- * @param[out] *pDst points to the output matrix    
- * @return 	The function returns either  ARM_MATH_SIZE_MISMATCH    
- * or ARM_MATH_SUCCESS based on the outcome of size checking.    
- */
-
-arm_status arm_mat_trans_q15(
-  const arm_matrix_instance_q15 * pSrc,
-  arm_matrix_instance_q15 * pDst)
-{
-  q15_t *pSrcA = pSrc->pData;                    /* input data matrix pointer */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint16_t nRows = pSrc->numRows;                /* number of nRows */
-  uint16_t nColumns = pSrc->numCols;             /* number of nColumns */
-  uint16_t col, row = nRows, i = 0u;             /* row and column loop counters */
-  arm_status status;                             /* status of matrix transpose */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q31_t in;                                      /* variable to hold temporary output  */
-
-#else
-
-  q15_t in;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-
-      /* Apply loop unrolling and exchange the columns with row elements */
-      col = nColumns >> 2u;
-
-      /* The pointer pOut is set to starting address of the column being processed */
-      pOut = pDst->pData + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(col > 0u)
-      {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pSrcA)++;
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *pOut = (q15_t) in;
-
-#else
-
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Unpack and store the second element in the destination */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *pOut = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Read two elements from the row */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        in = *__SIMD32(pSrcA)++;
-
-#else
-
-        in = *__SIMD32(pSrcA)++;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *pOut = (q15_t) in;
-
-#else
-
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Unpack and store the second element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *pOut = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-#else	 
-        /* Read one element from the row */
-        in = *pSrcA++;
-
-        /* Store one element in the destination */
-        *pOut = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Read one element from the row */
-        in = *pSrcA++;
-
-        /* Store one element in the destination */
-        *pOut = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Read one element from the row */
-        in = *pSrcA++;
-
-        /* Store one element in the destination */
-        *pOut = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Read one element from the row */
-        in = *pSrcA++;
-
-        /* Store one element in the destination */
-        *pOut = in;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      /* Perform matrix transpose for last 3 samples here. */
-      col = nColumns % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* The pointer pOut is set to starting address of the column being processed */
-      pOut = pDst->pData + i;
-
-      /* Initialize column loop counter */
-      col = nColumns;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-      while(col > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *pOut = *pSrcA++;
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      i++;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixTrans group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c b/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c
deleted file mode 100755
index 459700a0..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c
+++ /dev/null
@@ -1,210 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_trans_q31.c    
-*    
-* Description:	Q31 matrix transpose.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixTrans    
- * @{    
- */
-
-/*    
-  * @brief Q31 matrix transpose.    
-  * @param[in]  *pSrc points to the input matrix    
-  * @param[out] *pDst points to the output matrix    
-  * @return 	The function returns either  ARM_MATH_SIZE_MISMATCH    
-  * or ARM_MATH_SUCCESS based on the outcome of size checking.    
- */
-
-arm_status arm_mat_trans_q31(
-  const arm_matrix_instance_q31 * pSrc,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn = pSrc->pData;                      /* input data matrix pointer  */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer  */
-  q31_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t nRows = pSrc->numRows;                /* number of nRows */
-  uint16_t nColumns = pSrc->numCols;             /* number of nColumns  */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t blkCnt, i = 0u, row = nRows;          /* loop counters */
-  arm_status status;                             /* status of matrix transpose */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* Apply loop unrolling and exchange the columns with row elements */
-      blkCnt = nColumns >> 2u;
-
-      /* The pointer px is set to starting address of the column being processed */
-      px = pOut + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(blkCnt > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-
-      /* Perform matrix transpose for last 3 samples here. */
-      blkCnt = nColumns % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  uint16_t col, i = 0u, row = nRows;             /* loop counters */
-  arm_status status;                             /* status of matrix transpose */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* The pointer px is set to starting address of the column being processed */
-      px = pOut + i;
-
-      /* Initialize column loop counter */
-      col = nColumns;
-
-      while(col > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-      i++;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    }
-    while(row > 0u);            /* row loop end */
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixTrans group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c
deleted file mode 100755
index 6a1ad396..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c
+++ /dev/null
@@ -1,186 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_max_f32.c    
-*    
-* Description:	Maximum value of a floating-point vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup Max Maximum    
- *    
- * Computes the maximum value of an array of data.     
- * The function returns both the maximum value and its position within the array.     
- * There are separate functions for floating-point, Q31, Q15, and Q7 data types.    
- */
-
-/**    
- * @addtogroup Max    
- * @{    
- */
-
-
-/**    
- * @brief Maximum value of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult maximum value returned here    
- * @param[out]      *pIndex index of maximum value returned here    
- * @return none.    
- */
-
-void arm_max_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t maxVal1, maxVal2, out;               /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 1u;
-    }
-
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 2u;
-    }
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  float32_t maxVal1, out;                        /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  blkCnt = (blockSize - 1u);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Store the maximum value and it's index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Max group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c
deleted file mode 100755
index 9a59726e..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c
+++ /dev/null
@@ -1,176 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_max_q15.c    
-*    
-* Description:	Maximum value of a Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup Max    
- * @{    
- */
-
-
-/**    
- * @brief Maximum value of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult maximum value returned here    
- * @param[out]      *pIndex index of maximum value returned here    
- * @return none.    
- */
-
-void arm_max_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q15_t maxVal1, maxVal2, out;                   /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 1u;
-    }
-
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 2u;
-    }
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t maxVal1, out;                            /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  blkCnt = (blockSize - 1u);
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal1;
-      outIndex = blockSize - blkCnt;
-    }
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Store the maximum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Max group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c
deleted file mode 100755
index 8a95cf19..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_max_q31.c    
-*    
-* Description:	Maximum value of a Q31 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup Max    
- * @{    
- */
-
-
-/**    
- * @brief Maximum value of a Q31 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult maximum value returned here    
- * @param[out]      *pIndex index of maximum value returned here    
- * @return none.    
- */
-
-void arm_max_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t maxVal1, maxVal2, out;                   /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 1u;
-    }
-
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 2u;
-    }
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q31_t maxVal1, out;                            /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  blkCnt = (blockSize - 1u);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Store the maximum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Max group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c
deleted file mode 100755
index 07150d62..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_max_q7.c    
-*    
-* Description:	Maximum value of a Q7 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup Max    
- * @{    
- */
-
-
-/**    
- * @brief Maximum value of a Q7 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult maximum value returned here    
- * @param[out]      *pIndex index of maximum value returned here    
-  * @return none.    
- */
-
-void arm_max_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t maxVal1, maxVal2, out;                    /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 1u;
-    }
-
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 2u;
-    }
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q7_t maxVal1, out;                             /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  blkCnt = (blockSize - 1u);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal1;
-      outIndex = blockSize - blkCnt;
-    }
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Store the maximum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-
-}
-
-/**    
- * @} end of Max group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c
deleted file mode 100755
index 3e699d3c..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_mean_f32.c    
-*    
-* Description:	Mean value of a floating-point vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup mean Mean    
- *    
- * Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector.    
- * The underlying algorithm is used:    
- *    
- * 
    
- * 	Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;    
- * 
    
- *    
- * There are separate functions for floating-point, Q31, Q15, and Q7 data types.    
- */
-
-/**    
- * @addtogroup mean    
- * @{    
- */
-
-
-/**    
- * @brief Mean value of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult mean value returned here    
- * @return none.    
- */
-
-
-void arm_mean_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-  float32_t sum = 0.0f;                          /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    sum += in1;
-    sum += in2;
-    sum += in3;
-    sum += in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store the result to the destination */
-  *pResult = sum / (float32_t) blockSize;
-}
-
-/**    
- * @} end of mean group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c
deleted file mode 100755
index 22ea8dc5..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_mean_q15.c    
-*    
-* Description:	Mean value of a Q15 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup mean    
- * @{    
- */
-
-/**    
- * @brief Mean value of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult mean value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.    
- * The input is represented in 1.15 format and is accumulated in a 32-bit     
- * accumulator in 17.15 format.     
- * There is no risk of internal overflow with this approach, and the     
- * full precision of intermediate result is preserved.     
- * Finally, the accumulator is saturated and truncated to yield a result of 1.15 format.    
- *    
- */
-
-
-void arm_mean_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult)
-{
-  q31_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store the result to the destination */
-  *pResult = (q15_t) (sum / (q31_t)blockSize);
-}
-
-/**    
- * @} end of mean group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c
deleted file mode 100755
index 9f80d842..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_mean_q31.c    
-*    
-* Description:	Mean value of a Q31 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup mean    
- * @{    
- */
-
-/**    
- * @brief Mean value of a Q31 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult mean value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *\par    
- * The function is implemented using a 64-bit internal accumulator.    
- * The input is represented in 1.31 format and is accumulated in a 64-bit    
- * accumulator in 33.31 format.    
- * There is no risk of internal overflow with this approach, and the     
- * full precision of intermediate result is preserved.     
- * Finally, the accumulator is truncated to yield a result of 1.31 format.    
- *    
- */
-
-
-void arm_mean_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
-{
-  q63_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    sum += in1;
-    sum += in2;
-    sum += in3;
-    sum += in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store the result to the destination */
-  *pResult = (q31_t) (sum / (int32_t) blockSize);
-}
-
-/**    
- * @} end of mean group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c
deleted file mode 100755
index 31a35167..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_mean_q7.c    
-*    
-* Description:	Mean value of a Q7 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup mean    
- * @{    
- */
-
-/**    
- * @brief Mean value of a Q7 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult mean value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.     
- * The input is represented in 1.7 format and is accumulated in a 32-bit    
- * accumulator in 25.7 format.    
- * There is no risk of internal overflow with this approach, and the     
- * full precision of intermediate result is preserved.     
- * Finally, the accumulator is truncated to yield a result of 1.7 format.    
- *    
- */
-
-
-void arm_mean_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult)
-{
-  q31_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in = *__SIMD32(pSrc)++;
-
-    sum += ((in << 24) >> 24);
-    sum += ((in << 16) >> 24);
-    sum += ((in << 8) >> 24);
-    sum += (in >> 24);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store the result to the destination */
-  *pResult = (q7_t) (sum / (int32_t) blockSize);
-}
-
-/**    
- * @} end of mean group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c
deleted file mode 100755
index 7b6504c1..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_min_f32.c    
-*    
-* Description:	Minimum value of a floating-point vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup Min Minimum    
- *    
- * Computes the minimum value of an array of data.     
- * The function returns both the minimum value and its position within the array.     
- * There are separate functions for floating-point, Q31, Q15, and Q7 data types.    
- */
-
-/**    
- * @addtogroup Min    
- * @{    
- */
-
-
-/**    
- * @brief Minimum value of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult minimum value returned here    
- * @param[out]      *pIndex index of minimum value returned here    
-  * @return none.    
- *    
- */
-
-void arm_min_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t minVal1, minVal2, out;               /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 1u;
-    }
-
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 2u;
-    }
-
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u ) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  float32_t minVal1, out;                        /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  blkCnt = (blockSize - 1u);
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-    blkCnt--;
-
-  }
-
-  /* Store the minimum value and it's index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Min group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c
deleted file mode 100755
index 88401b7c..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_min_q15.c    
-*    
-* Description:	Minimum value of a Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-
-/**    
- * @addtogroup Min    
- * @{    
- */
-
-
-/**    
- * @brief Minimum value of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult minimum value returned here    
- * @param[out]      *pIndex index of minimum value returned here    
- * @return none.    
- *    
- */
-
-void arm_min_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q15_t minVal1, minVal2, out;                   /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 1u;
-    }
-
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 2u;
-    }
-
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u ) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t minVal1, out;                            /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  blkCnt = (blockSize - 1u);
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-    blkCnt--;
-
-  }
-
-
-
-  /* Store the minimum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Min group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c
deleted file mode 100755
index 01746b62..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c
+++ /dev/null
@@ -1,176 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_min_q31.c    
-*    
-* Description:	Minimum value of a Q31 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-
-/**    
- * @addtogroup Min    
- * @{    
- */
-
-
-/**    
- * @brief Minimum value of a Q31 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult minimum value returned here    
- * @param[out]      *pIndex index of minimum value returned here    
- * @return none.    
- *    
- */
-
-void arm_min_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t minVal1, minVal2, out;                   /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 1u;
-    }
-
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 2u;
-    }
-
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u ) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q31_t minVal1, out;                            /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  blkCnt = (blockSize - 1u);
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-    blkCnt--;
-
-  }
-
-  /* Store the minimum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Min group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c
deleted file mode 100755
index 587afac1..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c
+++ /dev/null
@@ -1,178 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_min_q7.c    
-*    
-* Description:	Minimum value of a Q7 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup Min    
- * @{    
- */
-
-
-/**    
- * @brief Minimum value of a Q7 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult minimum value returned here    
- * @param[out]      *pIndex index of minimum value returned here    
- * @return none.    
- *    
- */
-
-void arm_min_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t minVal1, minVal2, out;                    /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 1u;
-    }
-
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 2u;
-    }
-
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u ) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q7_t minVal1, out;                             /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  blkCnt = (blockSize - 1u);
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-    blkCnt--;
-
-  }
-
-  /* Store the minimum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-
-
-}
-
-/**    
- * @} end of Min group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c
deleted file mode 100755
index 564d84ea..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_power_f32.c    
-*    
-* Description:	Sum of the squares of the elements of a floating-point vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup power Power    
- *    
- * Calculates the sum of the squares of the elements in the input vector.    
- * The underlying algorithm is used:    
- *    
- * 
    
- * 	Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];    
- * 
    
- *   
- * There are separate functions for floating point, Q31, Q15, and Q7 data types.     
- */
-
-/**    
- * @addtogroup power    
- * @{    
- */
-
-
-/**    
- * @brief Sum of the squares of the elements of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult sum of the squares value returned here    
- * @return none.    
- *    
- */
-
-
-void arm_power_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-  float32_t sum = 0.0f;                          /* accumulator */
-  float32_t in;                                  /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* compute power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Store the result to the destination */
-  *pResult = sum;
-}
-
-/**    
- * @} end of power group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c
deleted file mode 100755
index 02c41093..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_power_q15.c    
-*    
-* Description:	Sum of the squares of the elements of a Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup power    
- * @{    
- */
-
-/**    
- * @brief Sum of the squares of the elements of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult sum of the squares value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.     
- * The input is represented in 1.15 format.   
- * Intermediate multiplication yields a 2.30 format, and this    
- * result is added without saturation to a 64-bit accumulator in 34.30 format.    
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the return result is in 34.30 format.     
- *    
- */
-
-void arm_power_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult)
-{
-  q63_t sum = 0;                                 /* Temporary result storage */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in32;                                    /* Temporary variable to store input value */
-  q15_t in16;                                    /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in32 = *__SIMD32(pSrc)++;
-    sum = __SMLALD(in32, in32, sum);
-    in32 = *__SIMD32(pSrc)++;
-    sum = __SMLALD(in32, in32, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in16 = *pSrc++;
-    sum = __SMLALD(in16, in16, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t in;                                      /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += ((q31_t) in * in);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  /* Store the results in 34.30 format  */
-  *pResult = sum;
-}
-
-/**    
- * @} end of power group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c
deleted file mode 100755
index 75c63141..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_power_q31.c    
-*    
-* Description:	Sum of the squares of the elements of a Q31 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup power    
- * @{    
- */
-
-/**    
- * @brief Sum of the squares of the elements of a Q31 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult sum of the squares value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * The input is represented in 1.31 format.    
- * Intermediate multiplication yields a 2.62 format, and this    
- * result is truncated to 2.48 format by discarding the lower 14 bits.    
- * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.    
- * With 15 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the return result is in 16.48 format.     
- *    
- */
-
-void arm_power_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult)
-{
-  q63_t sum = 0;                                 /* Temporary result storage */
-  q31_t in;
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and then store the result in a temporary variable sum, providing 15 guard bits. */
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14u;
-
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14u;
-
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14u;
-
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Store the results in 16.48 format  */
-  *pResult = sum;
-}
-
-/**    
- * @} end of power group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c
deleted file mode 100755
index 4f381566..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c
+++ /dev/null
@@ -1,141 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_power_q7.c    
-*    
-* Description:	Sum of the squares of the elements of a Q7 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup power    
- * @{    
- */
-
-/**    
- * @brief Sum of the squares of the elements of a Q7 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult sum of the squares value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.     
- * The input is represented in 1.7 format.   
- * Intermediate multiplication yields a 2.14 format, and this    
- * result is added without saturation to an accumulator in 18.14 format.    
- * With 17 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the return result is in 18.14 format.     
- *    
- */
-
-void arm_power_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
-{
-  q31_t sum = 0;                                 /* Temporary result storage */
-  q7_t in;                                       /* Temporary variable to store input */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t input1;                                  /* Temporary variable to store packed input */
-  q31_t in1, in2;                                /* Temporary variables to store input */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Reading two inputs of pSrc vector and packing */
-    input1 = *__SIMD32(pSrc)++;
-
-    in1 = __SXTB16(__ROR(input1, 8));
-    in2 = __SXTB16(input1);
-
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* calculate power and accumulate to accumulator */
-    sum = __SMLAD(in1, in1, sum);
-    sum = __SMLAD(in2, in2, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += ((q15_t) in * in);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Store the result in 18.14 format  */
-  *pResult = sum;
-}
-
-/**    
- * @} end of power group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c
deleted file mode 100755
index 5f935379..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c
+++ /dev/null
@@ -1,141 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_rms_f32.c    
-*    
-* Description:	Root mean square value of an array of F32 type    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup RMS Root mean square (RMS)    
- *    
- *     
- * Calculates the Root Mean Sqaure of the elements in the input vector.    
- * The underlying algorithm is used:    
- *    
- * 
    
- * 	Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));    
- * 
    
- *   
- * There are separate functions for floating point, Q31, and Q15 data types.     
- */
-
-/**    
- * @addtogroup RMS    
- * @{    
- */
-
-
-/**    
- * @brief Root Mean Square of the elements of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult rms value returned here    
- * @return none.    
- *    
- */
-
-void arm_rms_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-  float32_t sum = 0.0f;                          /* Accumulator */
-  float32_t in;                                  /* Tempoprary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute sum of the squares and then store the result in a temporary variable, sum  */
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum  */
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Rms and store the result in the destination */
-  arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
-}
-
-/**    
- * @} end of RMS group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c
deleted file mode 100755
index 3f335a23..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_rms_q15.c    
-*    
-* Description:	Root Mean Square of the elements of a Q15 vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @addtogroup RMS    
- * @{    
- */
-
-/**    
- * @brief Root Mean Square of the elements of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult rms value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * The input is represented in 1.15 format.    
- * Intermediate multiplication yields a 2.30 format, and this    
- * result is added without saturation to a 64-bit accumulator in 34.30 format.    
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower     
- * 15 bits, and then saturated to yield a result in 1.15 format.    
- *    
- */
-
-void arm_rms_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult)
-{
-  q63_t sum = 0;                                 /* accumulator */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in;                                      /* temporary variable to store the input value */
-  q15_t in1;                                     /* temporary variable to store the input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum */
-    in = *__SIMD32(pSrc)++;
-    sum = __SMLALD(in, in, sum);
-    in = *__SIMD32(pSrc)++;
-    sum = __SMLALD(in, in, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum */
-    in1 = *pSrc++;
-    sum = __SMLALD(in1, in1, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Truncating and saturating the accumulator to 1.15 format */
-  /* Store the result in the destination */
-  arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t in;                                      /* temporary variable to store the input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum */
-    in = *pSrc++;
-    sum += ((q31_t) in * in);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Truncating and saturating the accumulator to 1.15 format */
-  /* Store the result in the destination */
-  arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of RMS group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c
deleted file mode 100755
index eaca28d7..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c
+++ /dev/null
@@ -1,150 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_rms_q31.c    
-*    
-* Description:	Root Mean Square of the elements of a Q31 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @addtogroup RMS        
- * @{        
- */
-
-
-/**        
- * @brief Root Mean Square of the elements of a Q31 vector.        
- * @param[in]       *pSrc points to the input vector        
- * @param[in]       blockSize length of the input vector        
- * @param[out]      *pResult rms value returned here        
- * @return none.        
- *        
- * @details        
- * Scaling and Overflow Behavior:        
- *        
- *\par        
- * The function is implemented using an internal 64-bit accumulator.        
- * The input is represented in 1.31 format, and intermediate multiplication        
- * yields a 2.62 format.        
- * The accumulator maintains full precision of the intermediate multiplication results,         
- * but provides only a single guard bit.        
- * There is no saturation on intermediate additions.        
- * If the accumulator overflows, it wraps around and distorts the result.         
- * In order to avoid overflows completely, the input signal must be scaled down by         
- * log2(blockSize) bits, as a total of blockSize additions are performed internally.         
- * Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.        
- *        
- */
-
-void arm_rms_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
-{
-  q63_t sum = 0;                                 /* accumulator */
-  q31_t in;                                      /* Temporary variable to store the input */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in1, in2, in3, in4;                      /* Temporary input variables */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 7 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute sum of the squares and then store the result in a temporary variable, sum */
-    /* read two samples from source buffer */
-    in1 = pSrc[0];
-    in2 = pSrc[1];
-
-    /* calculate power and accumulate to accumulator */
-    sum += (q63_t) in1 *in1;
-    sum += (q63_t) in2 *in2;
-
-    /* read two samples from source buffer */
-    in3 = pSrc[2];
-    in4 = pSrc[3];
-
-    /* calculate power and accumulate to accumulator */
-    sum += (q63_t) in3 *in3;
-    sum += (q63_t) in4 *in4;
-
-
-    /* update source buffer to process next samples */
-    pSrc += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 8, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum */
-    in = *pSrc++;
-    sum += (q63_t) in *in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */
-  /* Compute Rms and store the result in the destination vector */
-  arm_sqrt_q31(clip_q63_to_q31((sum / (q63_t) blockSize) >> 31), pResult);
-}
-
-/**        
- * @} end of RMS group        
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c
deleted file mode 100755
index c73c707f..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c
+++ /dev/null
@@ -1,208 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_std_f32.c    
-*    
-* Description:	Standard deviation of the elements of a floating-point vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup STD Standard deviation    
- *    
- * Calculates the standard deviation of the elements in the input vector.     
- * The underlying algorithm is used:    
- *   
- * 
    
- * 	Result = sqrt((sumOfSquares - sum2 / blockSize) / (blockSize - 1))   
- *   
- *	   where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]   
- *   
- *	                   sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]   
- * 
   
- *    
- * There are separate functions for floating point, Q31, and Q15 data types.    
- */
-
-/**    
- * @addtogroup STD    
- * @{    
- */
-
-
-/**    
- * @brief Standard deviation of the elements of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult standard deviation value returned here    
- * @return none.    
- *    
- */
-
-
-void arm_std_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-  float32_t sum = 0.0f;                          /* Temporary result storage */
-  float32_t sumOfSquares = 0.0f;                 /* Sum of squares */
-  float32_t in;                                  /* input value */
-  uint32_t blkCnt;                               /* loop counter */
-   
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t meanOfSquares, mean, squareOfMean;
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / ((float32_t) blockSize - 1.0f);
-
-  /* Compute mean of all input values */
-  mean = sum / (float32_t) blockSize;
-
-  /* Compute square of mean */
-  squareOfMean = (mean * mean) * (((float32_t) blockSize) /
-                                  ((float32_t) blockSize - 1.0f));
-
-  /* Compute standard deviation and then store the result to the destination */
-  arm_sqrt_f32((meanOfSquares - squareOfMean), pResult);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t squareOfSum;                         /* Square of Sum */
-  float32_t var;                                 /* Temporary varaince storage */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++;
-    sumOfSquares += in * in;
-
-    /* C = (A[0] + A[1] + ... + A[blockSize-1]) */
-    /* Compute Sum of the input samples     
-     * and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute the square of sum */
-  squareOfSum = ((sum * sum) / (float32_t) blockSize);
-
-  /* Compute the variance */
-  var = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
-
-  /* Compute standard deviation and then store the result to the destination */
-  arm_sqrt_f32(var, pResult);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of STD group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c
deleted file mode 100755
index 24054d34..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_std_q15.c    
-*    
-* Description:	Standard deviation of an array of Q15 type.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup STD    
- * @{    
- */
-
-/**    
- * @brief Standard deviation of the elements of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult standard deviation value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * The input is represented in 1.15 format.   
- * Intermediate multiplication yields a 2.30 format, and this    
- * result is added without saturation to a 64-bit accumulator in 34.30 format.    
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower     
- * 15 bits, and then saturated to yield a result in 1.15 format.    
- */
-
-void arm_std_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult)
-{
-  q31_t sum = 0;                                 /* Accumulator */
-  q31_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
-  uint32_t blkCnt;                               /* loop counter */
-  q63_t sumOfSquares = 0;                        /* Accumulator */
-   
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in;                                      /* input value */
-  q15_t in1;                                     /* input value */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in1 = *pSrc++;
-    sumOfSquares = __SMLALD(in1, in1, sumOfSquares);
-    sum += in1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1));
-
-  /* Compute square of mean */
-  squareOfMean = (q31_t) ((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1)));
-
-  /* mean of the squares minus the square of the mean. */
-  /* Compute standard deviation and store the result to the destination */
-  arm_sqrt_q15(__SSAT((meanOfSquares - squareOfMean) >> 15, 16u), pResult);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t in;                                      /* input value */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++;
-    sumOfSquares += (in * in);
-
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    /* Compute sum of all input values and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples     
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1));
-
-  /* Compute square of mean */
-  squareOfMean = (q31_t) ((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1)));
-
-  /* mean of the squares minus the square of the mean. */
-  /* Compute standard deviation and store the result to the destination */
-  arm_sqrt_q15(__SSAT((meanOfSquares - squareOfMean) >> 15, 16u), pResult);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-}
-
-/**    
- * @} end of STD group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c
deleted file mode 100755
index f324273a..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c
+++ /dev/null
@@ -1,186 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_std_q31.c    
-*    
-* Description:	Standard deviation of an array of Q31 type.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup STD    
- * @{    
- */
-
-
-/**    
- * @brief Standard deviation of the elements of a Q31 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult standard deviation value returned here    
- * @return none.    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- *\par    
- * The function is implemented using an internal 64-bit accumulator.        
- * The input is represented in 1.31 format, which is then downshifted by 8 bits
- * which yields 1.23, and intermediate multiplication yields a 2.46 format.        
- * The accumulator maintains full precision of the intermediate multiplication results,         
- * but provides only a 16 guard bits.        
- * There is no saturation on intermediate additions.        
- * If the accumulator overflows it wraps around and distorts the result.        
- * In order to avoid overflows completely the input signal must be scaled down by         
- * log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.  
- * After division, internal variables should be Q18.46 
- * Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value. 
- *    
- */
-
-
-void arm_std_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
-{
-  q63_t sum = 0;                                 /* Accumulator */
-  q63_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
-  q31_t in;                                      /* input value */
-  uint32_t blkCnt;                               /* loop counter */
-  q63_t sumOfSquares = 0;                        /* Accumulator */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-   
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++ >> 8;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    /* Compute sum of all input values and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples     
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  /* Compute square of mean */
-  squareOfMean = sum * sum / (q63_t)(blockSize * (blockSize - 1u));
-
-  /* Compute standard deviation and then store the result to the destination */
-  arm_sqrt_q31((meanOfSquares - squareOfMean) >> 15, pResult);
-
-}
-
-/**    
- * @} end of STD group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c
deleted file mode 100755
index 5f0ea7d7..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c
+++ /dev/null
@@ -1,204 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_var_f32.c    
-*    
-* Description:	Variance of the elements of a floating-point vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup variance  Variance    
- *    
- * Calculates the variance of the elements in the input vector.    
- * The underlying algorithm is used:    
- *    
- * 
    
- * 	Result = (sumOfSquares - sum2 / blockSize) / (blockSize - 1)   
- *   
- *	   where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]   
- *   
- *	                   sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]   
- * 
   
- *    
- * There are separate functions for floating point, Q31, and Q15 data types.    
- */
-
-/**    
- * @addtogroup variance    
- * @{    
- */
-
-
-/**    
- * @brief Variance of the elements of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult variance value returned here    
- * @return none.    
- *    
- */
-
-
-void arm_var_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-
-  float32_t sum = 0.0f;                          /* Temporary result storage */
-  float32_t sumOfSquares = 0.0f;                 /* Sum of squares */
-  float32_t in;                                  /* input value */
-  uint32_t blkCnt;                               /* loop counter */
-  
-#ifndef ARM_MATH_CM0_FAMILY
-   
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t meanOfSquares, mean, squareOfMean;   /* Temporary variables */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / ((float32_t) blockSize - 1.0f);
-
-  /* Compute mean of all input values */
-  mean = sum / (float32_t) blockSize;
-
-  /* Compute square of mean */
-  squareOfMean = (mean * mean) * (((float32_t) blockSize) /
-                                  ((float32_t) blockSize - 1.0f));
-
-  /* Compute variance and then store the result to the destination */
-  *pResult = meanOfSquares - squareOfMean;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  float32_t squareOfSum;                         /* Square of Sum */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++;
-    sumOfSquares += in * in;
-
-    /* C = (A[0] + A[1] + ... + A[blockSize-1]) */
-    /* Compute Sum of the input samples     
-     * and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute the square of sum */
-  squareOfSum = ((sum * sum) / (float32_t) blockSize);
-
-  /* Compute the variance */
-  *pResult = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of variance group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c
deleted file mode 100755
index 94fcef9a..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_var_q15.c    
-*    
-* Description:	Variance of an array of Q15 type.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup variance    
- * @{    
- */
-
-/**    
- * @brief Variance of the elements of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult variance value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * The input is represented in 1.15 format.   
- * Intermediate multiplication yields a 2.30 format, and this    
- * result is added without saturation to a 64-bit accumulator in 34.30 format.    
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower     
- * 15 bits, and then saturated to yield a result in 1.15 format.    
- *    
- */
-
-
-void arm_var_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult)
-{
-
-  q31_t sum = 0;                                 /* Accumulator */
-  q31_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
-  uint32_t blkCnt;                               /* loop counter */
-  q63_t sumOfSquares = 0;                        /* Accumulator */
-   
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in;                                      /* input value */
-  q15_t in1;                                     /* input value */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in1 = *pSrc++;
-    sumOfSquares = __SMLALD(in1, in1, sumOfSquares);
-    sum += in1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1));
-
-  /* Compute square of mean */
-  squareOfMean = (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1)));
-
-  /* mean of the squares minus the square of the mean. */
-  *pResult = (meanOfSquares - squareOfMean) >> 15;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t in;                                      /* input value */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++;
-    sumOfSquares += (in * in);
-
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    /* Compute sum of all input values and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples     
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1));
-
-  /* Compute square of mean */
-  squareOfMean = (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1)));
-
-  /* mean of the squares minus the square of the mean. */
-  *pResult = (meanOfSquares - squareOfMean) >> 15;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of variance group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c b/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c
deleted file mode 100755
index 6b9e2287..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_var_q31.c    
-*    
-* Description:	Variance of an array of Q31 type.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupStats        
- */
-
-/**        
- * @addtogroup variance        
- * @{        
- */
-
-/**        
- * @brief Variance of the elements of a Q31 vector.        
- * @param[in]       *pSrc points to the input vector        
- * @param[in]       blockSize length of the input vector        
- * @param[out]      *pResult variance value returned here        
- * @return none.        
- *        
- * @details        
- * Scaling and Overflow Behavior:        
- *        
- *\par        
- * The function is implemented using an internal 64-bit accumulator.        
- * The input is represented in 1.31 format, which is then downshifted by 8 bits
- * which yields 1.23, and intermediate multiplication yields a 2.46 format.        
- * The accumulator maintains full precision of the intermediate multiplication results,         
- * but provides only a 16 guard bits.        
- * There is no saturation on intermediate additions.        
- * If the accumulator overflows it wraps around and distorts the result.        
- * In order to avoid overflows completely the input signal must be scaled down by         
- * log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.  
- * After division, internal variables should be Q18.46 
- * Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.        
- *        
- */
-
-
-void arm_var_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
-{
-  q63_t sum = 0;                                 /* Accumulator */
-  q63_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
-  q31_t in;                                      /* input value */
-  uint32_t blkCnt;                               /* loop counter */
-  q63_t sumOfSquares = 0;                        /* Accumulator */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-   
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++ >> 8;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    /* Compute sum of all input values and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples     
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  /* Compute square of mean */
-  squareOfMean = sum * sum / (q63_t)(blockSize * (blockSize - 1u));
-
-
-  /* Compute standard deviation and then store the result to the destination */
-  *pResult = (meanOfSquares - squareOfMean) >> 15;
-
-}
-
-/**        
- * @} end of variance group        
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c
deleted file mode 100755
index d6c846b6..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_copy_f32.c    
-*    
-* Description:	Copies the elements of a floating-point vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup copy Vector Copy    
- *    
- * Copies sample by sample from source vector to destination vector.    
- *    
- * 
    
- * 	pDst[n] = pSrc[n];   0 <= n < blockSize.    
- * 
    
- *   
- * There are separate functions for floating point, Q31, Q15, and Q7 data types.     
- */
-
-/**    
- * @addtogroup copy    
- * @{    
- */
-
-/**    
- * @brief Copies the elements of a floating-point vector.     
- * @param[in]       *pSrc points to input vector    
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the input vector   
- * @return none.    
- *    
- */
-
-
-void arm_copy_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the results in the destination buffer */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    *pDst++ = in1;
-    *pDst++ = in2;
-    *pDst++ = in3;
-    *pDst++ = in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the results in the destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicCopy group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c
deleted file mode 100755
index 5c6a391e..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_copy_q15.c    
-*    
-* Description:	Copies the elements of a Q15 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup copy    
- * @{    
- */
-/**    
- * @brief Copies the elements of a Q15 vector.     
- * @param[in]       *pSrc points to input vector    
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the input vector   
- * @return none.    
- *    
- */
-
-void arm_copy_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Read two inputs */
-    *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
-    *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the value in the destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicCopy group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c
deleted file mode 100755
index 0308cb84..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_copy_q31.c    
-*    
-* Description:	Copies the elements of a Q31 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup copy    
- * @{    
- */
-
-/**    
- * @brief Copies the elements of a Q31 vector.     
- * @param[in]       *pSrc points to input vector    
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the input vector   
- * @return none.    
- *    
- */
-
-void arm_copy_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the values in the destination buffer */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    *pDst++ = in1;
-    *pDst++ = in2;
-    *pDst++ = in3;
-    *pDst++ = in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the value in the destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicCopy group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c
deleted file mode 100755
index e2731440..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_copy_q7.c    
-*    
-* Description:	Copies the elements of a Q7 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup copy    
- * @{    
- */
-
-/**    
- * @brief Copies the elements of a Q7 vector.    
- * @param[in]       *pSrc points to input vector    
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the input vector   
- * @return none.    
- *    
- */
-
-void arm_copy_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the results in the destination buffer */
-    /* 4 samples are copied and stored at a time using SIMD */
-    *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the results in the destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicCopy group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c
deleted file mode 100755
index c8ea2dcd..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fill_f32.c    
-*    
-* Description:	Fills a constant value into a floating-point vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup Fill Vector Fill    
- *    
- * Fills the destination vector with a constant value.    
- *    
- * 
    
- * 	pDst[n] = value;   0 <= n < blockSize.    
- * 
    
- *   
- * There are separate functions for floating point, Q31, Q15, and Q7 data types.     
- */
-
-/**    
- * @addtogroup Fill    
- * @{    
- */
-
-/**    
- * @brief Fills a constant value into a floating-point vector.     
- * @param[in]       value input value to be filled   
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the output vector   
- * @return none.    
- *    
- */
-
-
-void arm_fill_f32(
-  float32_t value,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1 = value;
-  float32_t in2 = value;
-  float32_t in3 = value;
-  float32_t in4 = value;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = in1;
-    *pDst++ = in2;
-    *pDst++ = in3;
-    *pDst++ = in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = value;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of Fill group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c
deleted file mode 100755
index 5b306a9b..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fill_q15.c    
-*    
-* Description:	Fills a constant value into a Q15 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup Fill    
- * @{    
- */
-
-/**    
- * @brief Fills a constant value into a Q15 vector.    
- * @param[in]       value input value to be filled   
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the output vector   
- * @return none.    
- *    
- */
-
-void arm_fill_q15(
-  q15_t value,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t packedValue;                             /* value packed to 32 bits */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* Packing two 16 bit values to 32 bit value in order to use SIMD */
-  packedValue = __PKHBT(value, value, 16u);
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *__SIMD32(pDst)++ = packedValue;
-    *__SIMD32(pDst)++ = packedValue;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = value;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of Fill group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c
deleted file mode 100755
index 84068b2e..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fill_q31.c    
-*    
-* Description:	Fills a constant value into a Q31 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup Fill    
- * @{    
- */
-
-/**    
- * @brief Fills a constant value into a Q31 vector.    
- * @param[in]       value input value to be filled   
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the output vector   
- * @return none.    
- *    
- */
-
-void arm_fill_q31(
-  q31_t value,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1 = value;
-  q31_t in2 = value;
-  q31_t in3 = value;
-  q31_t in4 = value;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = in1;
-    *pDst++ = in2;
-    *pDst++ = in3;
-    *pDst++ = in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = value;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of Fill group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c
deleted file mode 100755
index 88ced505..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fill_q7.c    
-*    
-* Description:	Fills a constant value into a Q7 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup Fill    
- * @{    
- */
-
-/**    
- * @brief Fills a constant value into a Q7 vector.    
- * @param[in]       value input value to be filled   
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the output vector   
- * @return none.    
- *    
- */
-
-void arm_fill_q7(
-  q7_t value,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t packedValue;                             /* value packed to 32 bits */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* Packing four 8 bit values to 32 bit value in order to use SIMD */
-  packedValue = __PACKq7(value, value, value, value);
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *__SIMD32(pDst)++ = packedValue;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = value;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of Fill group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c
deleted file mode 100755
index a2c486f4..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c
+++ /dev/null
@@ -1,204 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_float_to_q15.c    
-*    
-* Description:	Converts the elements of the floating-point vector to Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup float_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the floating-point vector to Q15 vector.    
- * @param[in]       *pSrc points to the floating-point input vector    
- * @param[out]      *pDst points to the Q15 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- * \par   
- * The equation used for the conversion process is:    
- * 
    
- * 	pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.    
- * 
    
- * \par Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- * \note   
- * In order to apply rounding, the library should be rebuilt with the ROUNDING macro     
- * defined in the preprocessor section of project options.     
- *    
- */
-
-
-void arm_float_to_q15(
-  float32_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pIn = pSrc;                         /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifdef ARM_MATH_ROUNDING
-
-  float32_t in;
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-#else
-
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-#else
-
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0 ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-#else
-
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of float_to_x group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c
deleted file mode 100755
index d64609e7..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c
+++ /dev/null
@@ -1,211 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_float_to_q31.c    
-*    
-* Description:	Converts the elements of the floating-point vector to Q31 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup float_to_x  Convert 32-bit floating point value    
- */
-
-/**    
- * @addtogroup float_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the floating-point vector to Q31 vector.    
- * @param[in]       *pSrc points to the floating-point input vector    
- * @param[out]      *pDst points to the Q31 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- *\par Description:    
- * \par   
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 <= n < blockSize.    
- * 
    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.    
- *   
- * \note In order to apply rounding, the library should be rebuilt with the ROUNDING macro     
- * defined in the preprocessor section of project options.     
- */
-
-
-void arm_float_to_q31(
-  float32_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pIn = pSrc;                         /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifdef ARM_MATH_ROUNDING
-
-  float32_t in;
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-
-    /* C = A * 32768 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-#else
-
-    /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-
-    /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-#else
-
-    /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-
-    /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0 ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-#else
-
-    /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of float_to_x group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c
deleted file mode 100755
index 7ecebdfa..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_float_to_q7.c    
-*    
-* Description:	Converts the elements of the floating-point vector to Q7 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup float_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the floating-point vector to Q7 vector.    
- * @param[in]       *pSrc points to the floating-point input vector    
- * @param[out]      *pDst points to the Q7 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- *\par Description:    
- * \par   
- * The equation used for the conversion process is:    
- * 
    
- * 	pDst[n] = (q7_t)(pSrc[n] * 128);   0 <= n < blockSize.    
- * 
    
- * \par Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.    
- * \note   
- * In order to apply rounding, the library should be rebuilt with the ROUNDING macro     
- * defined in the preprocessor section of project options.     
- */
-
-
-void arm_float_to_q7(
-  float32_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pIn = pSrc;                         /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifdef ARM_MATH_ROUNDING
-
-  float32_t in;
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-#else
-
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-#else
-
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 128.0f);
-    in += in > 0 ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q31_t) (in), 8));
-
-#else
-
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    *pDst++ = (q7_t) __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of float_to_x group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c
deleted file mode 100755
index bbaf38c1..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q15_to_float.c    
-*    
-* Description:	Converts the elements of the Q15 vector to floating-point vector.     
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup q15_to_x  Convert 16-bit Integer value    
- */
-
-/**    
- * @addtogroup q15_to_x    
- * @{    
- */
-
-
-
-
-/**    
- * @brief  Converts the elements of the Q15 vector to floating-point vector.     
- * @param[in]       *pSrc points to the Q15 input vector    
- * @param[out]      *pDst points to the floating-point output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (float32_t) pSrc[n] / 32768;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q15_to_float(
-  q15_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 32768 */
-    /* convert from q15 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 32768 */
-    /* convert from q15 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of q15_to_x group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c
deleted file mode 100755
index f046427d..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q15_to_q31.c    
-*    
-* Description:	Converts the elements of the Q15 vector to Q31 vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q15_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q15 vector to Q31 vector.     
- * @param[in]       *pSrc points to the Q15 input vector    
- * @param[out]      *pDst points to the Q31 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:   
- *   
- * 
    
- * 	pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q15_to_q31(
-  q15_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2;
-  q31_t out1, out2, out3, out4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q31_t)A << 16 */
-    /* convert from q15 to q31 and then store the results in the destination buffer */
-    in1 = *__SIMD32(pIn)++;
-    in2 = *__SIMD32(pIn)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* extract lower 16 bits to 32 bit result */
-    out1 = in1 << 16u;
-    /* extract upper 16 bits to 32 bit result */
-    out2 = in1 & 0xFFFF0000;
-    /* extract lower 16 bits to 32 bit result */
-    out3 = in2 << 16u;
-    /* extract upper 16 bits to 32 bit result */
-    out4 = in2 & 0xFFFF0000;
-
-#else
-
-    /* extract upper 16 bits to 32 bit result */
-    out1 = in1 & 0xFFFF0000;
-    /* extract lower 16 bits to 32 bit result */
-    out2 = in1 << 16u;
-    /* extract upper 16 bits to 32 bit result */
-    out3 = in2 & 0xFFFF0000;
-    /* extract lower 16 bits to 32 bit result */
-    out4 = in2 << 16u;
-
-#endif //      #ifndef ARM_MATH_BIG_ENDIAN
-
-    *pDst++ = out1;
-    *pDst++ = out2;
-    *pDst++ = out3;
-    *pDst++ = out4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q31_t)A << 16 */
-    /* convert from q15 to q31 and then store the results in the destination buffer */
-    *pDst++ = (q31_t) * pIn++ << 16;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q15_to_x group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c
deleted file mode 100755
index 9b91c362..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c
+++ /dev/null
@@ -1,154 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q15_to_q7.c    
-*    
-* Description:	Converts the elements of the Q15 vector to Q7 vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q15_to_x    
- * @{    
- */
-
-
-/**    
- * @brief Converts the elements of the Q15 vector to Q7 vector.     
- * @param[in]       *pSrc points to the Q15 input vector    
- * @param[out]      *pDst points to the Q7 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q7_t) pSrc[n] >> 8;   0 <= n < blockSize.    
- * 
   
- *   
- */
-
-
-void arm_q15_to_q7(
-  q15_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2;
-  q31_t out1, out2;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q7_t) A >> 8 */
-    /* convert from q15 to q7 and then store the results in the destination buffer */
-    in1 = *__SIMD32(pIn)++;
-    in2 = *__SIMD32(pIn)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __PKHTB(in2, in1, 16);
-    out2 = __PKHBT(in2, in1, 16);
-
-#else
-
-    out1 = __PKHTB(in1, in2, 16);
-    out2 = __PKHBT(in1, in2, 16);
-
-#endif //      #ifndef ARM_MATH_BIG_ENDIAN
-
-    /* rotate packed value by 24 */
-    out2 = ((uint32_t) out2 << 8) | ((uint32_t) out2 >> 24);
-
-    /* anding with 0xff00ff00 to get two 8 bit values */
-    out1 = out1 & 0xFF00FF00;
-    /* anding with 0x00ff00ff to get two 8 bit values */
-    out2 = out2 & 0x00FF00FF;
-
-    /* oring two values(contains two 8 bit values) to get four packed 8 bit values */
-    out1 = out1 | out2;
-
-    /* store 4 samples at a time to destiantion buffer */
-    *__SIMD32(pDst)++ = out1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q7_t) A >> 8 */
-    /* convert from q15 to q7 and then store the results in the destination buffer */
-    *pDst++ = (q7_t) (*pIn++ >> 8);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q15_to_x group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c
deleted file mode 100755
index 59494741..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q31_to_float.c    
-*    
-* Description:	Converts the elements of the Q31 vector to floating-point vector.      
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup q31_to_x  Convert 32-bit Integer value    
- */
-
-/**    
- * @addtogroup q31_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q31 vector to floating-point vector.    
- * @param[in]       *pSrc points to the Q31 input vector    
- * @param[out]      *pDst points to the floating-point output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q31_to_float(
-  q31_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 2147483648 */
-    /* convert from q31 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 2147483648 */
-    /* convert from q31 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of q31_to_x group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c
deleted file mode 100755
index 33222bc2..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q31_to_q15.c    
-*    
-* Description:	Converts the elements of the Q31 vector to Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q31_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q31 vector to Q15 vector.    
- * @param[in]       *pSrc points to the Q31 input vector    
- * @param[out]      *pDst points to the Q15 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *     
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q15_t) pSrc[n] >> 16;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q31_to_q15(
-  q31_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-  q31_t out1, out2;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q15_t) A >> 16 */
-    /* convert from q31 to q15 and then store the results in the destination buffer */
-    in1 = *pIn++;
-    in2 = *pIn++;
-    in3 = *pIn++;
-    in4 = *pIn++;
-
-    /* pack two higher 16-bit values from two 32-bit values */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __PKHTB(in2, in1, 16);
-    out2 = __PKHTB(in4, in3, 16);
-
-#else
-
-    out1 = __PKHTB(in1, in2, 16);
-    out2 = __PKHTB(in3, in4, 16);
-
-#endif //      #ifdef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ = out1;
-    *__SIMD32(pDst)++ = out2;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q15_t) A >> 16 */
-    /* convert from q31 to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) (*pIn++ >> 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q31_to_x group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c
deleted file mode 100755
index d90898a3..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q31_to_q7.c    
-*    
-* Description:	Converts the elements of the Q31 vector to Q7 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q31_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q31 vector to Q7 vector.    
- * @param[in]       *pSrc points to the Q31 input vector    
- * @param[out]      *pDst points to the Q7 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q7_t) pSrc[n] >> 24;   0 <= n < blockSize.     
- * 
    
- *   
- */
-
-
-void arm_q31_to_q7(
-  q31_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-  q7_t out1, out2, out3, out4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q7_t) A >> 24 */
-    /* convert from q31 to q7 and then store the results in the destination buffer */
-    in1 = *pIn++;
-    in2 = *pIn++;
-    in3 = *pIn++;
-    in4 = *pIn++;
-
-    out1 = (q7_t) (in1 >> 24);
-    out2 = (q7_t) (in2 >> 24);
-    out3 = (q7_t) (in3 >> 24);
-    out4 = (q7_t) (in4 >> 24);
-
-    *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q7_t) A >> 24 */
-    /* convert from q31 to q7 and then store the results in the destination buffer */
-    *pDst++ = (q7_t) (*pIn++ >> 24);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q31_to_x group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c
deleted file mode 100755
index f984cf00..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q7_to_float.c    
-*    
-* Description:	Converts the elements of the Q7 vector to floating-point vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup q7_to_x  Convert 8-bit Integer value    
- */
-
-/**    
- * @addtogroup q7_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q7 vector to floating-point vector.    
- * @param[in]       *pSrc points to the Q7 input vector    
- * @param[out]      *pDst points to the floating-point output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *		     
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (float32_t) pSrc[n] / 128;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q7_to_float(
-  q7_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  q7_t *pIn = pSrc;                              /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 128 */
-    /* convert from q7 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 128 */
-    /* convert from q7 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of q7_to_x group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c
deleted file mode 100755
index bba084c1..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q7_to_q15.c    
-*    
-* Description:	Converts the elements of the Q7 vector to Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q7_to_x    
- * @{    
- */
-
-
-
-
-/**    
- * @brief Converts the elements of the Q7 vector to Q15 vector.    
- * @param[in]       *pSrc points to the Q7 input vector    
- * @param[out]      *pDst points to the Q15 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q15_t) pSrc[n] << 8;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q7_to_q15(
-  q7_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q7_t *pIn = pSrc;                              /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-  q31_t in;
-  q31_t in1, in2;
-  q31_t out1, out2;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q15_t) A << 8 */
-    /* convert from q7 to q15 and then store the results in the destination buffer */
-    in = *__SIMD32(pIn)++;
-
-    /* rotatate in by 8 and extend two q7_t values to q15_t values */
-    in1 = __SXTB16(__ROR(in, 8));
-
-    /* extend remainig two q7_t values to q15_t values */
-    in2 = __SXTB16(in);
-
-    in1 = in1 << 8u;
-    in2 = in2 << 8u;
-
-    in1 = in1 & 0xFF00FF00;
-    in2 = in2 & 0xFF00FF00;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out2 = __PKHTB(in1, in2, 16);
-    out1 = __PKHBT(in2, in1, 16);
-
-#else
-
-    out1 = __PKHTB(in1, in2, 16);
-    out2 = __PKHBT(in2, in1, 16);
-
-#endif
-
-    *__SIMD32(pDst)++ = out1;
-    *__SIMD32(pDst)++ = out2;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q15_t) A << 8 */
-    /* convert from q7 to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) * pIn++ << 8;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q7_to_x group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c b/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c
deleted file mode 100755
index 0519d92d..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c
+++ /dev/null
@@ -1,142 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q7_to_q31.c    
-*    
-* Description:	Converts the elements of the Q7 vector to Q31 vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q7_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q7 vector to Q31 vector.    
- * @param[in]       *pSrc points to the Q7 input vector    
- * @param[out]      *pDst points to the Q31 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q31_t) pSrc[n] << 24;   0 <= n < blockSize.   
- * 
     
- *   
- */
-
-
-void arm_q7_to_q31(
-  q7_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q7_t *pIn = pSrc;                              /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  q31_t in;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q31_t) A << 24 */
-    /* convert from q7 to q31 and then store the results in the destination buffer */
-    in = *__SIMD32(pIn)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *pDst++ = (__ROR(in, 8)) & 0xFF000000;
-    *pDst++ = (__ROR(in, 16)) & 0xFF000000;
-    *pDst++ = (__ROR(in, 24)) & 0xFF000000;
-    *pDst++ = (in & 0xFF000000);
-
-#else
-
-    *pDst++ = (in & 0xFF000000);
-    *pDst++ = (__ROR(in, 24)) & 0xFF000000;
-    *pDst++ = (__ROR(in, 16)) & 0xFF000000;
-    *pDst++ = (__ROR(in, 8)) & 0xFF000000;
-
-#endif //              #ifndef ARM_MATH_BIG_ENDIAN
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q31_t) A << 24 */
-    /* convert from q7 to q31 and then store the results in the destination buffer */
-    *pDst++ = (q31_t) * pIn++ << 24;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q7_to_x group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal.c
deleted file mode 100755
index 0404ea84..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal.c
+++ /dev/null
@@ -1,242 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_bitreversal.c    
-*    
-* Description:	This file has common tables like Bitreverse, reciprocal etc which are used across different functions    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/*    
-* @brief  In-place bit reversal function.   
-* @param[in, out] *pSrc        points to the in-place buffer of floating-point data type.   
-* @param[in]      fftSize      length of the FFT.   
-* @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table.   
-* @param[in]      *pBitRevTab  points to the bit reversal table.   
-* @return none.   
-*/
-
-void arm_bitreversal_f32(
-float32_t * pSrc,
-uint16_t fftSize,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTab)
-{
-   uint16_t fftLenBy2, fftLenBy2p1;
-   uint16_t i, j;
-   float32_t in;
-
-   /*  Initializations */
-   j = 0u;
-   fftLenBy2 = fftSize >> 1u;
-   fftLenBy2p1 = (fftSize >> 1u) + 1u;
-
-   /* Bit Reversal Implementation */
-   for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
-   {
-      if(i < j)
-      {
-         /*  pSrc[i] <-> pSrc[j]; */
-         in = pSrc[2u * i];
-         pSrc[2u * i] = pSrc[2u * j];
-         pSrc[2u * j] = in;
-
-         /*  pSrc[i+1u] <-> pSrc[j+1u] */
-         in = pSrc[(2u * i) + 1u];
-         pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u];
-         pSrc[(2u * j) + 1u] = in;
-
-         /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
-         in = pSrc[2u * (i + fftLenBy2p1)];
-         pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)];
-         pSrc[2u * (j + fftLenBy2p1)] = in;
-
-         /*  pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */
-         in = pSrc[(2u * (i + fftLenBy2p1)) + 1u];
-         pSrc[(2u * (i + fftLenBy2p1)) + 1u] =
-         pSrc[(2u * (j + fftLenBy2p1)) + 1u];
-         pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in;
-
-      }
-
-      /*  pSrc[i+1u] <-> pSrc[j+1u] */
-      in = pSrc[2u * (i + 1u)];
-      pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)];
-      pSrc[2u * (j + fftLenBy2)] = in;
-
-      /*  pSrc[i+2u] <-> pSrc[j+2u] */
-      in = pSrc[(2u * (i + 1u)) + 1u];
-      pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u];
-      pSrc[(2u * (j + fftLenBy2)) + 1u] = in;
-
-      /*  Reading the index for the bit reversal */
-      j = *pBitRevTab;
-
-      /*  Updating the bit reversal index depending on the fft length  */
-      pBitRevTab += bitRevFactor;
-   }
-}
-
-
-
-/*    
-* @brief  In-place bit reversal function.   
-* @param[in, out] *pSrc        points to the in-place buffer of Q31 data type.   
-* @param[in]      fftLen       length of the FFT.   
-* @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table   
-* @param[in]      *pBitRevTab  points to bit reversal table.   
-* @return none.   
-*/
-
-void arm_bitreversal_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTable)
-{
-   uint32_t fftLenBy2, fftLenBy2p1, i, j;
-   q31_t in;
-
-   /*  Initializations      */
-   j = 0u;
-   fftLenBy2 = fftLen / 2u;
-   fftLenBy2p1 = (fftLen / 2u) + 1u;
-
-   /* Bit Reversal Implementation */
-   for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
-   {
-      if(i < j)
-      {
-         /*  pSrc[i] <-> pSrc[j]; */
-         in = pSrc[2u * i];
-         pSrc[2u * i] = pSrc[2u * j];
-         pSrc[2u * j] = in;
-
-         /*  pSrc[i+1u] <-> pSrc[j+1u] */
-         in = pSrc[(2u * i) + 1u];
-         pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u];
-         pSrc[(2u * j) + 1u] = in;
-
-         /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
-         in = pSrc[2u * (i + fftLenBy2p1)];
-         pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)];
-         pSrc[2u * (j + fftLenBy2p1)] = in;
-
-         /*  pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */
-         in = pSrc[(2u * (i + fftLenBy2p1)) + 1u];
-         pSrc[(2u * (i + fftLenBy2p1)) + 1u] =
-         pSrc[(2u * (j + fftLenBy2p1)) + 1u];
-         pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in;
-
-      }
-
-      /*  pSrc[i+1u] <-> pSrc[j+1u] */
-      in = pSrc[2u * (i + 1u)];
-      pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)];
-      pSrc[2u * (j + fftLenBy2)] = in;
-
-      /*  pSrc[i+2u] <-> pSrc[j+2u] */
-      in = pSrc[(2u * (i + 1u)) + 1u];
-      pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u];
-      pSrc[(2u * (j + fftLenBy2)) + 1u] = in;
-
-      /*  Reading the index for the bit reversal */
-      j = *pBitRevTable;
-
-      /*  Updating the bit reversal index depending on the fft length */
-      pBitRevTable += bitRevFactor;
-   }
-}
-
-
-
-/*    
-   * @brief  In-place bit reversal function.   
-   * @param[in, out] *pSrc        points to the in-place buffer of Q15 data type.   
-   * @param[in]      fftLen       length of the FFT.   
-   * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table   
-   * @param[in]      *pBitRevTab  points to bit reversal table.   
-   * @return none.   
-*/
-
-void arm_bitreversal_q15(
-q15_t * pSrc16,
-uint32_t fftLen,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTab)
-{
-   q31_t *pSrc = (q31_t *) pSrc16;
-   q31_t in;
-   uint32_t fftLenBy2, fftLenBy2p1;
-   uint32_t i, j;
-
-   /*  Initializations */
-   j = 0u;
-   fftLenBy2 = fftLen / 2u;
-   fftLenBy2p1 = (fftLen / 2u) + 1u;
-
-   /* Bit Reversal Implementation */
-   for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
-   {
-      if(i < j)
-      {
-         /*  pSrc[i] <-> pSrc[j]; */
-         /*  pSrc[i+1u] <-> pSrc[j+1u] */
-         in = pSrc[i];
-         pSrc[i] = pSrc[j];
-         pSrc[j] = in;
-
-         /*  pSrc[i + fftLenBy2p1] <-> pSrc[j + fftLenBy2p1];  */
-         /*  pSrc[i + fftLenBy2p1+1u] <-> pSrc[j + fftLenBy2p1+1u] */
-         in = pSrc[i + fftLenBy2p1];
-         pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1];
-         pSrc[j + fftLenBy2p1] = in;
-      }
-
-      /*  pSrc[i+1u] <-> pSrc[j+fftLenBy2];         */
-      /*  pSrc[i+2] <-> pSrc[j+fftLenBy2+1u]  */
-      in = pSrc[i + 1u];
-      pSrc[i + 1u] = pSrc[j + fftLenBy2];
-      pSrc[j + fftLenBy2] = in;
-
-      /*  Reading the index for the bit reversal */
-      j = *pBitRevTab;
-
-      /*  Updating the bit reversal index depending on the fft length  */
-      pBitRevTab += bitRevFactor;
-   }
-}
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_f32.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_f32.c
deleted file mode 100755
index 5fb21b5e..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_f32.c
+++ /dev/null
@@ -1,632 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_f32.c   
-*    
-* Description:	Combined Radix Decimation in Frequency CFFT Floating point processing function
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-extern void arm_radix8_butterfly_f32(
-    float32_t * pSrc,
-    uint16_t fftLen,
-    const float32_t * pCoef,
-    uint16_t twidCoefModifier);
-
-extern void arm_bitreversal_32(
-    uint32_t * pSrc,
-    const uint16_t bitRevLen,
-    const uint16_t * pBitRevTable);
-
-/**   
-* @ingroup groupTransforms   
-*/
-
-/**   
-* @defgroup ComplexFFT Complex FFT Functions   
-*   
-* \par
-* The Fast Fourier Transform (FFT) is an efficient algorithm for computing the
-* Discrete Fourier Transform (DFT).  The FFT can be orders of magnitude faster
-* than the DFT, especially for long lengths.
-* The algorithms described in this section
-* operate on complex data.  A separate set of functions is devoted to handling
-* of real sequences.
-* \par
-* There are separate algorithms for handling floating-point, Q15, and Q31 data
-* types.  The algorithms available for each data type are described next.
-* \par
-* The FFT functions operate in-place.  That is, the array holding the input data
-* will also be used to hold the corresponding result.  The input data is complex
-* and contains 2*fftLen interleaved values as shown below.
-* 
 {real[0], imag[0], real[1], imag[1],..} 

-* The FFT result will be contained in the same array and the frequency domain
-* values will have the same interleaving.
-*
-* \par Floating-point
-* The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-8
-* stages are performed along with a single radix-2 or radix-4 stage, as needed.
-* The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
-* a different twiddle factor table.  
-* \par
-* The function uses the standard FFT definition and output values may grow by a
-* factor of fftLen when computing the forward transform.  The
-* inverse transform includes a scale of 1/fftLen as part of the
-* calculation and this matches the textbook definition of the inverse FFT.
-* \par
-* Pre-initialized data structures containing twiddle factors and bit reversal
-* tables are provided and defined in arm_const_structs.h.  Include 
-* this header in your function and then pass one of the constant structures as 
-* an argument to arm_cfft_f32.  For example:
-* \par
-* arm_cfft_f32(arm_cfft_sR_f32_len64, pSrc, 1, 1)
-* \par
-* computes a 64-point inverse complex FFT including bit reversal.
-* The data structures are treated as constant data and not modified during the
-* calculation.  The same data structure can be reused for multiple transforms
-* including mixing forward and inverse transforms.
-* \par
-* Earlier releases of the library provided separate radix-2 and radix-4
-* algorithms that operated on floating-point data.  These functions are still
-* provided but are deprecated.  The older functions are slower and less general
-* than the new functions.
-* \par
-* An example of initialization of the constants for the arm_cfft_f32 function follows:
-* \code
-* const static arm_cfft_instance_f32 *S;
-* ...
-*   switch (length) {
-*     case 16:
-*       S = &arm_cfft_sR_f32_len16;
-*       break;
-*     case 32:
-*       S = &arm_cfft_sR_f32_len32;
-*       break;
-*     case 64:
-*       S = &arm_cfft_sR_f32_len64;
-*       break;
-*     case 128:
-*       S = &arm_cfft_sR_f32_len128;
-*       break;
-*     case 256:
-*       S = &arm_cfft_sR_f32_len256;
-*       break;
-*     case 512:
-*       S = &arm_cfft_sR_f32_len512;
-*       break;
-*     case 1024:
-*       S = &arm_cfft_sR_f32_len1024;
-*       break;
-*     case 2048:
-*       S = &arm_cfft_sR_f32_len2048;
-*       break;
-*     case 4096:
-*       S = &arm_cfft_sR_f32_len4096;
-*       break;
-*   }
-* \endcode
-* \par Q15 and Q31
-* The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-4
-* stages are performed along with a single radix-2 stage, as needed.
-* The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
-* a different twiddle factor table.  
-* \par
-* The function uses the standard FFT definition and output values may grow by a
-* factor of fftLen when computing the forward transform.  The
-* inverse transform includes a scale of 1/fftLen as part of the
-* calculation and this matches the textbook definition of the inverse FFT.
-* \par
-* Pre-initialized data structures containing twiddle factors and bit reversal
-* tables are provided and defined in arm_const_structs.h.  Include 
-* this header in your function and then pass one of the constant structures as 
-* an argument to arm_cfft_q31.  For example:
-* \par
-* arm_cfft_q31(arm_cfft_sR_q31_len64, pSrc, 1, 1)
-* \par
-* computes a 64-point inverse complex FFT including bit reversal.
-* The data structures are treated as constant data and not modified during the
-* calculation.  The same data structure can be reused for multiple transforms
-* including mixing forward and inverse transforms.
-* \par
-* Earlier releases of the library provided separate radix-2 and radix-4
-* algorithms that operated on floating-point data.  These functions are still
-* provided but are deprecated.  The older functions are slower and less general
-* than the new functions.
-* \par
-* An example of initialization of the constants for the arm_cfft_q31 function follows:
-* \code
-* const static arm_cfft_instance_q31 *S;
-* ...
-*   switch (length) {
-*     case 16:
-*       S = &arm_cfft_sR_q31_len16;
-*       break;
-*     case 32:
-*       S = &arm_cfft_sR_q31_len32;
-*       break;
-*     case 64:
-*       S = &arm_cfft_sR_q31_len64;
-*       break;
-*     case 128:
-*       S = &arm_cfft_sR_q31_len128;
-*       break;
-*     case 256:
-*       S = &arm_cfft_sR_q31_len256;
-*       break;
-*     case 512:
-*       S = &arm_cfft_sR_q31_len512;
-*       break;
-*     case 1024:
-*       S = &arm_cfft_sR_q31_len1024;
-*       break;
-*     case 2048:
-*       S = &arm_cfft_sR_q31_len2048;
-*       break;
-*     case 4096:
-*       S = &arm_cfft_sR_q31_len4096;
-*       break;
-*   }
-* \endcode
-* 
-*/
-
-void arm_cfft_radix8by2_f32( arm_cfft_instance_f32 * S, float32_t * p1) 
-{
-    uint32_t    L  = S->fftLen;
-    float32_t * pCol1, * pCol2, * pMid1, * pMid2;
-    float32_t * p2 = p1 + L;
-    const float32_t * tw = (float32_t *) S->pTwiddle;
-    float32_t t1[4], t2[4], t3[4], t4[4], twR, twI;
-    float32_t m0, m1, m2, m3;
-    uint32_t l;
-
-    pCol1 = p1;
-    pCol2 = p2;
-
-    //    Define new length
-    L >>= 1;
-    //    Initialize mid pointers
-    pMid1 = p1 + L;
-    pMid2 = p2 + L;
-
-    // do two dot Fourier transform
-    for ( l = L >> 2; l > 0; l-- ) 
-    {
-        t1[0] = p1[0];
-        t1[1] = p1[1];
-        t1[2] = p1[2];
-        t1[3] = p1[3];
-
-        t2[0] = p2[0];
-        t2[1] = p2[1];
-        t2[2] = p2[2];
-        t2[3] = p2[3];
-
-        t3[0] = pMid1[0];
-        t3[1] = pMid1[1];
-        t3[2] = pMid1[2];
-        t3[3] = pMid1[3];
-
-        t4[0] = pMid2[0];
-        t4[1] = pMid2[1];
-        t4[2] = pMid2[2];
-        t4[3] = pMid2[3];
-
-        *p1++ = t1[0] + t2[0];
-        *p1++ = t1[1] + t2[1];
-        *p1++ = t1[2] + t2[2];
-        *p1++ = t1[3] + t2[3];    // col 1
-
-        t2[0] = t1[0] - t2[0];
-        t2[1] = t1[1] - t2[1];
-        t2[2] = t1[2] - t2[2];
-        t2[3] = t1[3] - t2[3];    // for col 2
-
-        *pMid1++ = t3[0] + t4[0];
-        *pMid1++ = t3[1] + t4[1];
-        *pMid1++ = t3[2] + t4[2];
-        *pMid1++ = t3[3] + t4[3]; // col 1
-
-        t4[0] = t4[0] - t3[0];
-        t4[1] = t4[1] - t3[1];
-        t4[2] = t4[2] - t3[2];
-        t4[3] = t4[3] - t3[3];    // for col 2
-
-        twR = *tw++;
-        twI = *tw++;
-
-        // multiply by twiddle factors
-        m0 = t2[0] * twR;
-        m1 = t2[1] * twI;
-        m2 = t2[1] * twR;
-        m3 = t2[0] * twI;
-        
-        // R  =  R  *  Tr - I * Ti
-        *p2++ = m0 + m1;
-        // I  =  I  *  Tr + R * Ti
-        *p2++ = m2 - m3;
-        
-        // use vertical symmetry
-        //  0.9988 - 0.0491i <==> -0.0491 - 0.9988i
-        m0 = t4[0] * twI;
-        m1 = t4[1] * twR;
-        m2 = t4[1] * twI;
-        m3 = t4[0] * twR;
-        
-        *pMid2++ = m0 - m1;
-        *pMid2++ = m2 + m3;
-
-        twR = *tw++;
-        twI = *tw++;
-        
-        m0 = t2[2] * twR;
-        m1 = t2[3] * twI;
-        m2 = t2[3] * twR;
-        m3 = t2[2] * twI;
-        
-        *p2++ = m0 + m1;
-        *p2++ = m2 - m3;
-        
-        m0 = t4[2] * twI;
-        m1 = t4[3] * twR;
-        m2 = t4[3] * twI;
-        m3 = t4[2] * twR;
-        
-        *pMid2++ = m0 - m1;
-        *pMid2++ = m2 + m3;
-    }
-
-    // first col
-    arm_radix8_butterfly_f32( pCol1, L, (float32_t *) S->pTwiddle, 2u);
-    // second col
-    arm_radix8_butterfly_f32( pCol2, L, (float32_t *) S->pTwiddle, 2u);
-}
-
-void arm_cfft_radix8by4_f32( arm_cfft_instance_f32 * S, float32_t * p1) 
-{
-    uint32_t    L  = S->fftLen >> 1;
-    float32_t * pCol1, *pCol2, *pCol3, *pCol4, *pEnd1, *pEnd2, *pEnd3, *pEnd4;
-    const float32_t *tw2, *tw3, *tw4;
-    float32_t * p2 = p1 + L;
-    float32_t * p3 = p2 + L;
-    float32_t * p4 = p3 + L;
-    float32_t t2[4], t3[4], t4[4], twR, twI;
-    float32_t p1ap3_0, p1sp3_0, p1ap3_1, p1sp3_1;
-    float32_t m0, m1, m2, m3;
-    uint32_t l, twMod2, twMod3, twMod4;
-
-    pCol1 = p1;         // points to real values by default
-    pCol2 = p2;
-    pCol3 = p3;
-    pCol4 = p4;
-    pEnd1 = p2 - 1;     // points to imaginary values by default
-    pEnd2 = p3 - 1;
-    pEnd3 = p4 - 1;
-    pEnd4 = pEnd3 + L;
-
-    tw2 = tw3 = tw4 = (float32_t *) S->pTwiddle;
-
-    L >>= 1;
-
-    // do four dot Fourier transform
-
-    twMod2 = 2;
-    twMod3 = 4;
-    twMod4 = 6;
-
-    // TOP
-    p1ap3_0 = p1[0] + p3[0];
-    p1sp3_0 = p1[0] - p3[0];
-    p1ap3_1 = p1[1] + p3[1];
-    p1sp3_1 = p1[1] - p3[1];
-
-    // col 2
-    t2[0] = p1sp3_0 + p2[1] - p4[1];
-    t2[1] = p1sp3_1 - p2[0] + p4[0];
-    // col 3
-    t3[0] = p1ap3_0 - p2[0] - p4[0];
-    t3[1] = p1ap3_1 - p2[1] - p4[1];
-    // col 4
-    t4[0] = p1sp3_0 - p2[1] + p4[1];
-    t4[1] = p1sp3_1 + p2[0] - p4[0];
-    // col 1
-    *p1++ = p1ap3_0 + p2[0] + p4[0];
-    *p1++ = p1ap3_1 + p2[1] + p4[1];
-
-    // Twiddle factors are ones
-    *p2++ = t2[0];
-    *p2++ = t2[1];
-    *p3++ = t3[0];
-    *p3++ = t3[1];
-    *p4++ = t4[0];
-    *p4++ = t4[1];
-
-    tw2 += twMod2;
-    tw3 += twMod3;
-    tw4 += twMod4;
-
-    for (l = (L - 2) >> 1; l > 0; l-- ) 
-    {
-        // TOP
-        p1ap3_0 = p1[0] + p3[0];
-        p1sp3_0 = p1[0] - p3[0];
-        p1ap3_1 = p1[1] + p3[1];
-        p1sp3_1 = p1[1] - p3[1];
-        // col 2
-        t2[0] = p1sp3_0 + p2[1] - p4[1];
-        t2[1] = p1sp3_1 - p2[0] + p4[0];
-        // col 3
-        t3[0] = p1ap3_0 - p2[0] - p4[0];
-        t3[1] = p1ap3_1 - p2[1] - p4[1];
-        // col 4
-        t4[0] = p1sp3_0 - p2[1] + p4[1];
-        t4[1] = p1sp3_1 + p2[0] - p4[0];
-        // col 1 - top
-        *p1++ = p1ap3_0 + p2[0] + p4[0];
-        *p1++ = p1ap3_1 + p2[1] + p4[1];
-
-        // BOTTOM
-        p1ap3_1 = pEnd1[-1] + pEnd3[-1];
-        p1sp3_1 = pEnd1[-1] - pEnd3[-1];
-        p1ap3_0 = pEnd1[0] + pEnd3[0];
-        p1sp3_0 = pEnd1[0] - pEnd3[0];
-        // col 2
-        t2[2] = pEnd2[0]  - pEnd4[0] + p1sp3_1;
-        t2[3] = pEnd1[0] - pEnd3[0] - pEnd2[-1] + pEnd4[-1];
-        // col 3
-        t3[2] = p1ap3_1 - pEnd2[-1] - pEnd4[-1];
-        t3[3] = p1ap3_0 - pEnd2[0]  - pEnd4[0];
-        // col 4
-        t4[2] = pEnd2[0]  - pEnd4[0]  - p1sp3_1;
-        t4[3] = pEnd4[-1] - pEnd2[-1] - p1sp3_0;
-        // col 1 - Bottom
-        *pEnd1-- = p1ap3_0 + pEnd2[0] + pEnd4[0];
-        *pEnd1-- = p1ap3_1 + pEnd2[-1] + pEnd4[-1];
-
-        // COL 2
-        // read twiddle factors
-        twR = *tw2++;
-        twI = *tw2++;
-        // multiply by twiddle factors
-        //  let    Z1 = a + i(b),   Z2 = c + i(d)
-        //   =>  Z1 * Z2  =  (a*c - b*d) + i(b*c + a*d)
-        
-        // Top
-        m0 = t2[0] * twR;
-        m1 = t2[1] * twI;
-        m2 = t2[1] * twR;
-        m3 = t2[0] * twI;
-        
-        *p2++ = m0 + m1;
-        *p2++ = m2 - m3;
-        // use vertical symmetry col 2
-        // 0.9997 - 0.0245i  <==>  0.0245 - 0.9997i
-        // Bottom
-        m0 = t2[3] * twI;
-        m1 = t2[2] * twR;
-        m2 = t2[2] * twI;
-        m3 = t2[3] * twR;
-        
-        *pEnd2-- = m0 - m1;
-        *pEnd2-- = m2 + m3;
-
-        // COL 3
-        twR = tw3[0];
-        twI = tw3[1];
-        tw3 += twMod3;
-        // Top
-        m0 = t3[0] * twR;
-        m1 = t3[1] * twI;
-        m2 = t3[1] * twR;
-        m3 = t3[0] * twI;
-        
-        *p3++ = m0 + m1;
-        *p3++ = m2 - m3;
-        // use vertical symmetry col 3
-        // 0.9988 - 0.0491i  <==>  -0.9988 - 0.0491i
-        // Bottom
-        m0 = -t3[3] * twR;
-        m1 = t3[2] * twI;
-        m2 = t3[2] * twR;
-        m3 = t3[3] * twI;
-        
-        *pEnd3-- = m0 - m1;
-        *pEnd3-- = m3 - m2;
-        
-        // COL 4
-        twR = tw4[0];
-        twI = tw4[1];
-        tw4 += twMod4;
-        // Top
-        m0 = t4[0] * twR;
-        m1 = t4[1] * twI;
-        m2 = t4[1] * twR;
-        m3 = t4[0] * twI;
-        
-        *p4++ = m0 + m1;
-        *p4++ = m2 - m3;
-        // use vertical symmetry col 4
-        // 0.9973 - 0.0736i  <==>  -0.0736 + 0.9973i
-        // Bottom
-        m0 = t4[3] * twI;
-        m1 = t4[2] * twR;
-        m2 = t4[2] * twI;
-        m3 = t4[3] * twR;
-        
-        *pEnd4-- = m0 - m1;
-        *pEnd4-- = m2 + m3;
-    }
-
-    //MIDDLE
-    // Twiddle factors are 
-    //  1.0000  0.7071-0.7071i  -1.0000i  -0.7071-0.7071i
-    p1ap3_0 = p1[0] + p3[0];
-    p1sp3_0 = p1[0] - p3[0];
-    p1ap3_1 = p1[1] + p3[1];
-    p1sp3_1 = p1[1] - p3[1];
-
-    // col 2
-    t2[0] = p1sp3_0 + p2[1] - p4[1];
-    t2[1] = p1sp3_1 - p2[0] + p4[0];
-    // col 3
-    t3[0] = p1ap3_0 - p2[0] - p4[0];
-    t3[1] = p1ap3_1 - p2[1] - p4[1];
-    // col 4
-    t4[0] = p1sp3_0 - p2[1] + p4[1];
-    t4[1] = p1sp3_1 + p2[0] - p4[0];
-    // col 1 - Top
-    *p1++ = p1ap3_0 + p2[0] + p4[0];
-    *p1++ = p1ap3_1 + p2[1] + p4[1];
-
-    // COL 2
-    twR = tw2[0];
-    twI = tw2[1];
-
-    m0 = t2[0] * twR;
-    m1 = t2[1] * twI;
-    m2 = t2[1] * twR;
-    m3 = t2[0] * twI;
-
-    *p2++ = m0 + m1;
-    *p2++ = m2 - m3;
-    // COL 3
-    twR = tw3[0];
-    twI = tw3[1];
-
-    m0 = t3[0] * twR;
-    m1 = t3[1] * twI;
-    m2 = t3[1] * twR;
-    m3 = t3[0] * twI;
-
-    *p3++ = m0 + m1;
-    *p3++ = m2 - m3;
-    // COL 4
-    twR = tw4[0];
-    twI = tw4[1];
-
-    m0 = t4[0] * twR;
-    m1 = t4[1] * twI;
-    m2 = t4[1] * twR;
-    m3 = t4[0] * twI;
-
-    *p4++ = m0 + m1;
-    *p4++ = m2 - m3;
-
-    // first col
-    arm_radix8_butterfly_f32( pCol1, L, (float32_t *) S->pTwiddle, 4u);
-    // second col
-    arm_radix8_butterfly_f32( pCol2, L, (float32_t *) S->pTwiddle, 4u);
-    // third col
-    arm_radix8_butterfly_f32( pCol3, L, (float32_t *) S->pTwiddle, 4u);
-    // fourth col
-    arm_radix8_butterfly_f32( pCol4, L, (float32_t *) S->pTwiddle, 4u);
-}
-
-/**
-* @addtogroup ComplexFFT   
-* @{   
-*/
-
-/**   
-* @details   
-* @brief       Processing function for the floating-point complex FFT.
-* @param[in]      *S    points to an instance of the floating-point CFFT structure.  
-* @param[in, out] *p1   points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.  
-* @return none.  
-*/
-
-void arm_cfft_f32( 
-    const arm_cfft_instance_f32 * S, 
-    float32_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag)
-{
-    uint32_t  L = S->fftLen, l;
-    float32_t invL, * pSrc;
-
-    if(ifftFlag == 1u)
-    {
-        /*  Conjugate input data  */
-        pSrc = p1 + 1;
-        for(l=0; lpTwiddle, 1);
-        break;
-    }  
-
-    if( bitReverseFlag )
-        arm_bitreversal_32((uint32_t*)p1,S->bitRevLength,S->pBitRevTable);
-
-    if(ifftFlag == 1u)
-    {
-        invL = 1.0f/(float32_t)L;
-        /*  Conjugate and scale output data */
-        pSrc = p1;
-        for(l=0; l2*fftLen. Processing occurs in-place.  
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.  
-* @return none.  
-*/
-
-void arm_cfft_q15( 
-    const arm_cfft_instance_q15 * S, 
-    q15_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag)
-{
-    uint32_t L = S->fftLen;
-
-    if(ifftFlag == 1u)
-    {
-        switch (L) 
-        {
-        case 16: 
-        case 64:
-        case 256:
-        case 1024:
-        case 4096:
-            arm_radix4_butterfly_inverse_q15  ( p1, L, (q15_t*)S->pTwiddle, 1 );
-            break;
-            
-        case 32:
-        case 128:
-        case 512:
-        case 2048:
-            arm_cfft_radix4by2_inverse_q15  ( p1, L, S->pTwiddle );
-            break;
-        }  
-    }
-    else
-    {
-        switch (L) 
-        {
-        case 16: 
-        case 64:
-        case 256:
-        case 1024:
-        case 4096:
-            arm_radix4_butterfly_q15  ( p1, L, (q15_t*)S->pTwiddle, 1 );
-            break;
-            
-        case 32:
-        case 128:
-        case 512:
-        case 2048:
-            arm_cfft_radix4by2_q15  ( p1, L, S->pTwiddle );
-            break;
-        }  
-    }
-    
-    if( bitReverseFlag )
-        arm_bitreversal_16((uint16_t*)p1,S->bitRevLength,S->pBitRevTable);    
-}
-
-/**    
-* @} end of ComplexFFT group    
-*/
-
-void arm_cfft_radix4by2_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    const q15_t * pCoef) 
-{    
-    uint32_t i;
-    uint32_t n2;
-    q15_t p0, p1, p2, p3;
-#ifndef ARM_MATH_CM0_FAMILY
-    q31_t T, S, R;
-    q31_t coeff, out1, out2;
-    const q15_t *pC = pCoef;
-    q15_t *pSi = pSrc;
-    q15_t *pSl = pSrc + fftLen;
-#else
-    uint32_t ia, l;
-    q15_t xt, yt, cosVal, sinVal;
-#endif
-    
-    n2 = fftLen >> 1; 
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    for (i = n2; i > 0; i--)
-    {
-        coeff = _SIMD32_OFFSET(pC);
-        pC += 2;
-
-        T = _SIMD32_OFFSET(pSi);
-        T = __SHADD16(T, 0); // this is just a SIMD arithmetic shift right by 1
-
-        S = _SIMD32_OFFSET(pSl);
-        S = __SHADD16(S, 0); // this is just a SIMD arithmetic shift right by 1
-
-        R = __QSUB16(T, S);
-
-        _SIMD32_OFFSET(pSi) = __SHADD16(T, S);
-        pSi += 2;
-
-    #ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUAD(coeff, R) >> 16;
-        out2 = __SMUSDX(coeff, R);
-
-    #else
-
-        out1 = __SMUSDX(R, coeff) >> 16u;
-        out2 = __SMUAD(coeff, R);
-
-    #endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSl) =
-        (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-        pSl += 2;
-    } 
-    
-#else //    #ifndef ARM_MATH_CM0_FAMILY
-    
-    ia = 0;
-    for (i = 0; i < n2; i++)
-    {
-        cosVal = pCoef[ia * 2];
-        sinVal = pCoef[(ia * 2) + 1];
-        ia++;
-        
-        l = i + n2;        
-        
-        xt = (pSrc[2 * i] >> 1u) - (pSrc[2 * l] >> 1u);
-        pSrc[2 * i] = ((pSrc[2 * i] >> 1u) + (pSrc[2 * l] >> 1u)) >> 1u;
-        
-        yt = (pSrc[2 * i + 1] >> 1u) - (pSrc[2 * l + 1] >> 1u);
-        pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 1u) + (pSrc[2 * i + 1] >> 1u)) >> 1u;
-
-        pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
-                  ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-        pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
-                       ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-    } 
-    
-#endif //    #ifndef ARM_MATH_CM0_FAMILY
-    
-    // first col
-    arm_radix4_butterfly_q15( pSrc, n2, (q15_t*)pCoef, 2u);
-    // second col
-    arm_radix4_butterfly_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2u);
-			
-    for (i = 0; i < fftLen >> 1; i++)
-    {
-        p0 = pSrc[4*i+0];
-        p1 = pSrc[4*i+1];
-        p2 = pSrc[4*i+2];
-        p3 = pSrc[4*i+3];
-        
-        p0 <<= 1;
-        p1 <<= 1;
-        p2 <<= 1;
-        p3 <<= 1;
-        
-        pSrc[4*i+0] = p0;
-        pSrc[4*i+1] = p1;
-        pSrc[4*i+2] = p2;
-        pSrc[4*i+3] = p3;
-    }
-}
-
-void arm_cfft_radix4by2_inverse_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    const q15_t * pCoef) 
-{    
-    uint32_t i;
-    uint32_t n2;
-    q15_t p0, p1, p2, p3;
-#ifndef ARM_MATH_CM0_FAMILY
-    q31_t T, S, R;
-    q31_t coeff, out1, out2;
-    const q15_t *pC = pCoef;
-    q15_t *pSi = pSrc;
-    q15_t *pSl = pSrc + fftLen;
-#else
-    uint32_t ia, l;
-    q15_t xt, yt, cosVal, sinVal;
-#endif
-    
-    n2 = fftLen >> 1; 
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    for (i = n2; i > 0; i--)
-    {
-        coeff = _SIMD32_OFFSET(pC);
-        pC += 2;
-
-        T = _SIMD32_OFFSET(pSi);
-        T = __SHADD16(T, 0); // this is just a SIMD arithmetic shift right by 1
-
-        S = _SIMD32_OFFSET(pSl);
-        S = __SHADD16(S, 0); // this is just a SIMD arithmetic shift right by 1
-
-        R = __QSUB16(T, S);
-
-        _SIMD32_OFFSET(pSi) = __SHADD16(T, S);
-        pSi += 2;
-
-    #ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUSD(coeff, R) >> 16;
-        out2 = __SMUADX(coeff, R);
-    #else
-
-        out1 = __SMUADX(R, coeff) >> 16u;
-        out2 = __SMUSD(__QSUB(0, coeff), R);
-
-    #endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSl) =
-        (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);        
-        pSl += 2;
-    } 
-    
-#else //    #ifndef ARM_MATH_CM0_FAMILY
-
-    ia = 0;
-    for (i = 0; i < n2; i++)
-    {
-        cosVal = pCoef[ia * 2];
-        sinVal = pCoef[(ia * 2) + 1];
-        ia++;
-        
-        l = i + n2;
-        xt = (pSrc[2 * i] >> 1u) - (pSrc[2 * l] >> 1u);
-        pSrc[2 * i] = ((pSrc[2 * i] >> 1u) + (pSrc[2 * l] >> 1u)) >> 1u;
-        
-        yt = (pSrc[2 * i + 1] >> 1u) - (pSrc[2 * l + 1] >> 1u);
-        pSrc[2 * i + 1] =
-          ((pSrc[2 * l + 1] >> 1u) + (pSrc[2 * i + 1] >> 1u)) >> 1u;
-        
-        pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
-                        ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-        
-        pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
-                           ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-    } 
-    
-#endif //    #ifndef ARM_MATH_CM0_FAMILY
-
-    // first col
-    arm_radix4_butterfly_inverse_q15( pSrc, n2, (q15_t*)pCoef, 2u);
-    // second col
-    arm_radix4_butterfly_inverse_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2u);
-			
-    for (i = 0; i < fftLen >> 1; i++)
-    {
-        p0 = pSrc[4*i+0];
-        p1 = pSrc[4*i+1];
-        p2 = pSrc[4*i+2];
-        p3 = pSrc[4*i+3];
-        
-        p0 <<= 1;
-        p1 <<= 1;
-        p2 <<= 1;
-        p3 <<= 1;
-        
-        pSrc[4*i+0] = p0;
-        pSrc[4*i+1] = p1;
-        pSrc[4*i+2] = p2;
-        pSrc[4*i+3] = p3;
-    }
-}
-
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_q31.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_q31.c
deleted file mode 100755
index 20ad7e78..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_q31.c
+++ /dev/null
@@ -1,264 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_q31.c   
-*    
-* Description:	Combined Radix Decimation in Frequency CFFT fixed point processing function
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-extern void arm_radix4_butterfly_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pCoef,
-    uint32_t twidCoefModifier);
-
-extern void arm_radix4_butterfly_inverse_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pCoef,
-    uint32_t twidCoefModifier);
-
-extern void arm_bitreversal_32(
-    uint32_t * pSrc,
-    const uint16_t bitRevLen,
-    const uint16_t * pBitRevTable);
-    
-void arm_cfft_radix4by2_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    const q31_t * pCoef);
-    
-void arm_cfft_radix4by2_inverse_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    const q31_t * pCoef);
-
-/**   
-* @ingroup groupTransforms   
-*/
-
-/**
-* @addtogroup ComplexFFT   
-* @{   
-*/
-
-/**   
-* @details   
-* @brief       Processing function for the fixed-point complex FFT in Q31 format.
-* @param[in]      *S    points to an instance of the fixed-point CFFT structure.  
-* @param[in, out] *p1   points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.  
-* @return none.  
-*/
-
-void arm_cfft_q31( 
-    const arm_cfft_instance_q31 * S, 
-    q31_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag)
-{
-    uint32_t L = S->fftLen;
-
-    if(ifftFlag == 1u)
-    {
-        switch (L) 
-        {
-        case 16: 
-        case 64:
-        case 256:
-        case 1024:
-        case 4096:
-            arm_radix4_butterfly_inverse_q31  ( p1, L, (q31_t*)S->pTwiddle, 1 );
-            break;
-            
-        case 32:
-        case 128:
-        case 512:
-        case 2048:
-            arm_cfft_radix4by2_inverse_q31  ( p1, L, S->pTwiddle );
-            break;
-        }  
-    }
-    else
-    {
-        switch (L) 
-        {
-        case 16: 
-        case 64:
-        case 256:
-        case 1024:
-        case 4096:
-            arm_radix4_butterfly_q31  ( p1, L, (q31_t*)S->pTwiddle, 1 );
-            break;
-            
-        case 32:
-        case 128:
-        case 512:
-        case 2048:
-            arm_cfft_radix4by2_q31  ( p1, L, S->pTwiddle );
-            break;
-        }  
-    }
-    
-    if( bitReverseFlag )
-        arm_bitreversal_32((uint32_t*)p1,S->bitRevLength,S->pBitRevTable);    
-}
-
-/**    
-* @} end of ComplexFFT group    
-*/
-
-void arm_cfft_radix4by2_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    const q31_t * pCoef) 
-{    
-    uint32_t i, l;
-    uint32_t n2, ia;
-    q31_t xt, yt, cosVal, sinVal;
-    q31_t p0, p1;
-    
-    n2 = fftLen >> 1;    
-    ia = 0;
-    for (i = 0; i < n2; i++)
-    {
-        cosVal = pCoef[2*ia];
-        sinVal = pCoef[2*ia + 1];
-        ia++;
-        
-        l = i + n2;
-        xt = (pSrc[2 * i] >> 2) - (pSrc[2 * l] >> 2);
-        pSrc[2 * i] = (pSrc[2 * i] >> 2) + (pSrc[2 * l] >> 2);
-        
-        yt = (pSrc[2 * i + 1] >> 2) - (pSrc[2 * l + 1] >> 2);
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2) + (pSrc[2 * i + 1] >> 2);
-        
-        mult_32x32_keep32_R(p0, xt, cosVal);
-        mult_32x32_keep32_R(p1, yt, cosVal);
-        multAcc_32x32_keep32_R(p0, yt, sinVal); 
-        multSub_32x32_keep32_R(p1, xt, sinVal);
-        
-        pSrc[2u * l] = p0 << 1;
-        pSrc[2u * l + 1u] = p1 << 1;
-    
-    }
-
-    // first col
-    arm_radix4_butterfly_q31( pSrc, n2, (q31_t*)pCoef, 2u);
-    // second col
-    arm_radix4_butterfly_q31( pSrc + fftLen, n2, (q31_t*)pCoef, 2u);
-			
-    for (i = 0; i < fftLen >> 1; i++)
-    {
-        p0 = pSrc[4*i+0];
-        p1 = pSrc[4*i+1];
-        xt = pSrc[4*i+2];
-        yt = pSrc[4*i+3];
-        
-        p0 <<= 1;
-        p1 <<= 1;
-        xt <<= 1;
-        yt <<= 1;
-        
-        pSrc[4*i+0] = p0;
-        pSrc[4*i+1] = p1;
-        pSrc[4*i+2] = xt;
-        pSrc[4*i+3] = yt;
-    }
-
-}
-
-void arm_cfft_radix4by2_inverse_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    const q31_t * pCoef) 
-{    
-    uint32_t i, l;
-    uint32_t n2, ia;
-    q31_t xt, yt, cosVal, sinVal;
-    q31_t p0, p1;
-    
-    n2 = fftLen >> 1;    
-    ia = 0;
-    for (i = 0; i < n2; i++)
-    {
-        cosVal = pCoef[2*ia];
-        sinVal = pCoef[2*ia + 1];
-        ia++;
-        
-        l = i + n2;
-        xt = (pSrc[2 * i] >> 2) - (pSrc[2 * l] >> 2);
-        pSrc[2 * i] = (pSrc[2 * i] >> 2) + (pSrc[2 * l] >> 2);
-        
-        yt = (pSrc[2 * i + 1] >> 2) - (pSrc[2 * l + 1] >> 2);
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2) + (pSrc[2 * i + 1] >> 2);
-        
-        mult_32x32_keep32_R(p0, xt, cosVal);
-        mult_32x32_keep32_R(p1, yt, cosVal);
-        multSub_32x32_keep32_R(p0, yt, sinVal); 
-        multAcc_32x32_keep32_R(p1, xt, sinVal);
-        
-        pSrc[2u * l] = p0 << 1;
-        pSrc[2u * l + 1u] = p1 << 1;
-    
-    }
-
-    // first col
-    arm_radix4_butterfly_inverse_q31( pSrc, n2, (q31_t*)pCoef, 2u);
-    // second col
-    arm_radix4_butterfly_inverse_q31( pSrc + fftLen, n2, (q31_t*)pCoef, 2u);
-			
-    for (i = 0; i < fftLen >> 1; i++)
-    {
-        p0 = pSrc[4*i+0];
-        p1 = pSrc[4*i+1];
-        xt = pSrc[4*i+2];
-        yt = pSrc[4*i+3];
-        
-        p0 <<= 1;
-        p1 <<= 1;
-        xt <<= 1;
-        yt <<= 1;
-        
-        pSrc[4*i+0] = p0;
-        pSrc[4*i+1] = p1;
-        pSrc[4*i+2] = xt;
-        pSrc[4*i+3] = yt;
-    }
-}
-
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_f32.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_f32.c
deleted file mode 100755
index 8e3b77ca..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_f32.c
+++ /dev/null
@@ -1,485 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:	    arm_cfft_radix2_f32.c   
-*   
-* Description:	Radix-2 Decimation in Frequency CFFT & CIFFT Floating point processing function   
-*   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-void arm_radix2_butterfly_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier);
-
-void arm_radix2_butterfly_inverse_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier,
-  float32_t onebyfftLen);
-
-extern void arm_bitreversal_f32(
-    float32_t * pSrc,
-    uint16_t fftSize,
-    uint16_t bitRevFactor,
-    uint16_t * pBitRevTab);
-
-/**   
-* @ingroup groupTransforms   
-*/
-
-/**   
-* @addtogroup ComplexFFT   
-* @{   
-*/
-
-/**   
-* @details
-* @brief Radix-2 CFFT/CIFFT.
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_f32 and will be removed
-* in the future.
-* @param[in]      *S    points to an instance of the floating-point Radix-2 CFFT/CIFFT structure.  
-* @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
-* @return none.
-*/
-
-void arm_cfft_radix2_f32(
-const arm_cfft_radix2_instance_f32 * S,
-float32_t * pSrc)
-{
-
-   if(S->ifftFlag == 1u)
-   {
-      /*  Complex IFFT radix-2  */
-      arm_radix2_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
-      S->twidCoefModifier, S->onebyfftLen);
-   }
-   else
-   {
-      /*  Complex FFT radix-2  */
-      arm_radix2_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
-      S->twidCoefModifier);
-   }
-
-   if(S->bitReverseFlag == 1u)
-   {
-      /*  Bit Reversal */
-      arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-   }
-
-}
-
-
-/**    
-* @} end of ComplexFFT group    
-*/
-
-
-
-/* ----------------------------------------------------------------------    
-** Internal helper function used by the FFTs    
-** ------------------------------------------------------------------- */
-
-/*    
-* @brief  Core function for the floating-point CFFT butterfly process.   
-* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
-* @param[in]      fftLen           length of the FFT.   
-* @param[in]      *pCoef           points to the twiddle coefficient buffer.   
-* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
-* @return none.   
-*/
-
-void arm_radix2_butterfly_f32(
-float32_t * pSrc,
-uint32_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier)
-{
-
-   uint32_t i, j, k, l;
-   uint32_t n1, n2, ia;
-   float32_t xt, yt, cosVal, sinVal;
-   float32_t p0, p1, p2, p3;
-   float32_t a0, a1;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-   /*  Initializations for the first stage */
-   n2 = fftLen >> 1;
-   ia = 0;
-   i = 0;
-
-   // loop for groups 
-   for (k = n2; k > 0; k--)
-   {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-
-      /*  Twiddle coefficients index modifier */
-      ia += twidCoefModifier;
-
-      /*  index calculation for the input as, */
-      /*  pSrc[i + 0], pSrc[i + fftLen/1] */
-      l = i + n2;
-
-      /*  Butterfly implementation */
-      a0 = pSrc[2 * i] + pSrc[2 * l];
-      xt = pSrc[2 * i] - pSrc[2 * l];
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-      
-      p0 = xt * cosVal;
-      p1 = yt * sinVal;
-      p2 = yt * cosVal;
-      p3 = xt * sinVal;  
-      
-      pSrc[2 * i]     = a0;   
-      pSrc[2 * i + 1] = a1;       
-      
-      pSrc[2 * l]     = p0 + p1;
-      pSrc[2 * l + 1] = p2 - p3;
-      
-      i++;
-   }                             // groups loop end 
-
-   twidCoefModifier <<= 1u;
-
-   // loop for stage 
-   for (k = n2; k > 2; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups 
-      j = 0;
-      do
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia += twidCoefModifier;
-
-         // loop for butterfly 
-         i = j;
-         do
-         {
-            l = i + n2;
-            a0 = pSrc[2 * i] + pSrc[2 * l];
-            xt = pSrc[2 * i] - pSrc[2 * l];
-
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-            
-            p0 = xt * cosVal;
-            p1 = yt * sinVal;
-            p2 = yt * cosVal;
-            p3 = xt * sinVal;  
-            
-            pSrc[2 * i] = a0;   
-            pSrc[2 * i + 1] = a1;       
-            
-            pSrc[2 * l]     = p0 + p1;
-            pSrc[2 * l + 1] = p2 - p3;
-            
-            i += n1;
-         } while( i < fftLen );                        // butterfly loop end 
-         j++;
-      } while( j < n2);                          // groups loop end 
-      twidCoefModifier <<= 1u;
-   }                             // stages loop end 
-
-   // loop for butterfly 
-   for (i = 0; i < fftLen; i += 2)
-   {
-      a0 = pSrc[2 * i] + pSrc[2 * i + 2];
-      xt = pSrc[2 * i] - pSrc[2 * i + 2];
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * i + 3];
-      a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1];
-      
-      pSrc[2 * i] = a0;   
-      pSrc[2 * i + 1] = a1;
-      pSrc[2 * i + 2] = xt;
-      pSrc[2 * i + 3] = yt;
-   }                             // groups loop end 
-
-#else
- 
-   n2 = fftLen;
-
-   // loop for stage 
-   for (k = fftLen; k > 1; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups 
-      j = 0;
-      do
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia += twidCoefModifier;
-
-         // loop for butterfly 
-         i = j;
-         do
-         {
-            l = i + n2;
-            a0 = pSrc[2 * i] + pSrc[2 * l];
-            xt = pSrc[2 * i] - pSrc[2 * l];
-
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-            
-            p0 = xt * cosVal;
-            p1 = yt * sinVal;
-            p2 = yt * cosVal;
-            p3 = xt * sinVal;  
-            
-            pSrc[2 * i] = a0;   
-            pSrc[2 * i + 1] = a1;       
-            
-            pSrc[2 * l]     = p0 + p1;
-            pSrc[2 * l + 1] = p2 - p3;
-            
-            i += n1;
-         } while(i < fftLen);
-         j++;
-      } while(j < n2);
-      twidCoefModifier <<= 1u;
-   }
-
-#endif //    #ifndef ARM_MATH_CM0_FAMILY
-
-}
-
-
-void arm_radix2_butterfly_inverse_f32(
-float32_t * pSrc,
-uint32_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier,
-float32_t onebyfftLen)
-{
-
-   uint32_t i, j, k, l;
-   uint32_t n1, n2, ia;
-   float32_t xt, yt, cosVal, sinVal;
-   float32_t p0, p1, p2, p3;
-   float32_t a0, a1;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-   n2 = fftLen >> 1;
-   ia = 0;
-
-   // loop for groups 
-   for (i = 0; i < n2; i++)
-   {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia += twidCoefModifier;
-
-      l = i + n2;
-      a0 = pSrc[2 * i] + pSrc[2 * l];
-      xt = pSrc[2 * i] - pSrc[2 * l];
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-      
-      p0 = xt * cosVal;
-      p1 = yt * sinVal;
-      p2 = yt * cosVal;
-      p3 = xt * sinVal;  
-      
-      pSrc[2 * i] = a0;   
-      pSrc[2 * i + 1] = a1;       
-      
-      pSrc[2 * l]     = p0 - p1;
-      pSrc[2 * l + 1] = p2 + p3;  
-   }                             // groups loop end 
-
-   twidCoefModifier <<= 1u;
-
-   // loop for stage 
-   for (k = fftLen / 2; k > 2; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups 
-      j = 0;
-      do
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia += twidCoefModifier;
-
-         // loop for butterfly 
-         i = j;
-         do
-         {
-            l = i + n2;
-            a0 = pSrc[2 * i] + pSrc[2 * l];
-            xt = pSrc[2 * i] - pSrc[2 * l];
-
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-            
-            p0 = xt * cosVal;
-            p1 = yt * sinVal;
-            p2 = yt * cosVal;
-            p3 = xt * sinVal;  
-            
-            pSrc[2 * i] = a0;   
-            pSrc[2 * i + 1] = a1;       
-            
-            pSrc[2 * l]     = p0 - p1;
-            pSrc[2 * l + 1] = p2 + p3; 
-
-            i += n1;
-         } while( i < fftLen );                 // butterfly loop end 
-         j++;
-      } while(j < n2);                      // groups loop end 
-
-      twidCoefModifier <<= 1u;
-   }                             // stages loop end 
-
-   // loop for butterfly 
-   for (i = 0; i < fftLen; i += 2)
-   {   
-      a0 = pSrc[2 * i] + pSrc[2 * i + 2];
-      xt = pSrc[2 * i] - pSrc[2 * i + 2];
-      
-      a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1];
-      yt = pSrc[2 * i + 1] - pSrc[2 * i + 3];
-      
-      p0 = a0 * onebyfftLen;
-      p2 = xt * onebyfftLen;
-      p1 = a1 * onebyfftLen;
-      p3 = yt * onebyfftLen; 
-      
-      pSrc[2 * i] = p0;
-      pSrc[2 * i + 1] = p1;  
-      pSrc[2 * i + 2] = p2;       
-      pSrc[2 * i + 3] = p3;
-   }                             // butterfly loop end 
-
-#else
-
-   n2 = fftLen;
-
-   // loop for stage 
-   for (k = fftLen; k > 2; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups 
-      j = 0;
-      do
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia = ia + twidCoefModifier;
-
-         // loop for butterfly 
-         i = j;
-         do
-         {
-            l = i + n2;
-            a0 = pSrc[2 * i] + pSrc[2 * l];
-            xt = pSrc[2 * i] - pSrc[2 * l];
-
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-            
-            p0 = xt * cosVal;
-            p1 = yt * sinVal;
-            p2 = yt * cosVal;
-            p3 = xt * sinVal;  
-            
-            pSrc[2 * i] = a0;   
-            pSrc[2 * i + 1] = a1;       
-            
-            pSrc[2 * l]     = p0 - p1;
-            pSrc[2 * l + 1] = p2 + p3;  
-            
-            i += n1;
-         } while( i < fftLen );                    // butterfly loop end 
-         j++;
-      } while( j < n2 );                      // groups loop end 
-
-      twidCoefModifier = twidCoefModifier << 1u;
-   }                             // stages loop end 
-
-   n1 = n2;
-   n2 = n2 >> 1;
-
-   // loop for butterfly 
-   for (i = 0; i < fftLen; i += n1)
-   {
-      l = i + n2;
-      
-      a0 = pSrc[2 * i] + pSrc[2 * l];
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      
-      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      
-      p0 = a0 * onebyfftLen;
-      p2 = xt * onebyfftLen;
-      p1 = a1 * onebyfftLen;
-      p3 = yt * onebyfftLen; 
-      
-      pSrc[2 * i] = p0;
-      pSrc[2u * l] = p2;
-     
-      pSrc[2 * i + 1] = p1;    
-      pSrc[2u * l + 1u] = p3;
-   }                             // butterfly loop end 
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-}
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
deleted file mode 100755
index 55d2a71c..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
+++ /dev/null
@@ -1,205 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:	    arm_cfft_radix4_init_f32.c   
-*   
-* Description:	Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**   
- * @ingroup groupTransforms   
- */
-
-/**   
- * @addtogroup ComplexFFT   
- * @{   
- */
-
-/**   
-* @brief  Initialization function for the floating-point CFFT/CIFFT.  
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_f32 and will be removed
-* in the future.
-* @param[in,out] *S             points to an instance of the floating-point CFFT/CIFFT structure.  
-* @param[in]     fftLen         length of the FFT.  
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.  
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.  
-*   
-* \par Description:  
-* \par   
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.   
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated  
-* \par   
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.   
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par   
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.   
-* \par   
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.   
-*/
-arm_status arm_cfft_radix2_init_f32(
-  arm_cfft_radix2_instance_f32 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (float32_t *) twiddleCoef;
-
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLen)
-  {
-
-  case 4096u:
-    /*  Initializations of structure parameters for 4096 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.000244140625;
-    break;
-
-  case 2048u:
-    /*  Initializations of structure parameters for 2048 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 2u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 2u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.00048828125;
-    break;
-
-  case 1024u:
-    /*  Initializations of structure parameters for 1024 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 4u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 4u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.0009765625f;
-    break;
-
-  case 512u:
-    /*  Initializations of structure parameters for 512 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 8u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 8u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.001953125;
-    break;
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-    S->onebyfftLen = 0.00390625f;
-    break;
-
-  case 128u:
-    /*  Initializations of structure parameters for 128 point FFT */
-    S->twidCoefModifier = 32u;
-    S->bitRevFactor = 32u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
-    S->onebyfftLen = 0.0078125;
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-    S->onebyfftLen = 0.015625f;
-    break;
-
-  case 32u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 128u;
-    S->bitRevFactor = 128u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
-    S->onebyfftLen = 0.03125;
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-    S->onebyfftLen = 0.0625f;
-    break;
-
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**   
- * @} end of ComplexFFT group   
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q15.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
deleted file mode 100755
index 3949140e..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
+++ /dev/null
@@ -1,189 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5   
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix2_init_q15.c    
-*    
-* Description:	Radix-2 Decimation in Frequency Q15 FFT & IFFT initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-
-/**    
- * @addtogroup ComplexFFT    
- * @{    
- */
-
-/**   
-* @brief Initialization function for the Q15 CFFT/CIFFT.   
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q15 and will be removed
-* @param[in,out] *S             points to an instance of the Q15 CFFT/CIFFT structure.   
-* @param[in]     fftLen         length of the FFT.   
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.  
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.  
-*   
-* \par Description:  
-* \par   
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.   
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated  
-* \par   
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.   
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par   
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.   
-* \par   
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.   
-*/
-
-arm_status arm_cfft_radix2_init_q15(
-  arm_cfft_radix2_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (q15_t *) twiddleCoef_4096_q15;
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLen)
-  {
-  case 4096u:
-    /*  Initializations of structure parameters for 4096 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-
-    break;
-
-  case 2048u:
-    /*  Initializations of structure parameters for 2048 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 2u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 2u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
-
-    break;
-
-  case 1024u:
-    /*  Initializations of structure parameters for 1024 point FFT */
-    S->twidCoefModifier = 4u;
-    S->bitRevFactor = 4u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-
-    break;
-
-  case 512u:
-    /*  Initializations of structure parameters for 512 point FFT */
-    S->twidCoefModifier = 8u;
-    S->bitRevFactor = 8u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
-
-    break;
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-
-    break;
-
-  case 128u:
-    /*  Initializations of structure parameters for 128 point FFT */
-    S->twidCoefModifier = 32u;
-    S->bitRevFactor = 32u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
-
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-
-    break;
-
-  case 32u:
-    /*  Initializations of structure parameters for 32 point FFT */
-    S->twidCoefModifier = 128u;
-    S->bitRevFactor = 128u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
-
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-
-    break;
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**    
- * @} end of ComplexFFT group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q31.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
deleted file mode 100755
index 3ce6e5d3..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:	    arm_cfft_radix2_init_q31.c   
-*   
-* Description:	Radix-2 Decimation in Frequency Fixed-point CFFT & CIFFT Initialization function   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**   
- * @ingroup groupTransforms   
- */
-
-/**   
- * @addtogroup ComplexFFT   
- * @{   
- */
-
-
-/**    
-*    
-* @brief  Initialization function for the Q31 CFFT/CIFFT.   
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q31 and will be removed
-* @param[in,out] *S             points to an instance of the Q31 CFFT/CIFFT structure.   
-* @param[in]     fftLen         length of the FFT.  
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.  
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.  
-*   
-* \par Description:  
-* \par   
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.   
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated  
-* \par   
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.   
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par   
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.   
-* \par   
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.   
-*/
-
-arm_status arm_cfft_radix2_init_q31(
-  arm_cfft_radix2_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (q31_t *) twiddleCoef_4096_q31;
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of Instance structure depending on the FFT length */
-  switch (S->fftLen)
-  {
-    /*  Initializations of structure parameters for 4096 point FFT */
-  case 4096u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-    break;
-
-    /*  Initializations of structure parameters for 2048 point FFT */
-  case 2048u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 2u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 2u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
-    break;
-
-    /*  Initializations of structure parameters for 1024 point FFT */
-  case 1024u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 4u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 4u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-    break;
-
-    /*  Initializations of structure parameters for 512 point FFT */
-  case 512u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 8u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 8u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
-    break;
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-    break;
-
-  case 128u:
-    /*  Initializations of structure parameters for 128 point FFT */
-    S->twidCoefModifier = 32u;
-    S->bitRevFactor = 32u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-    break;
-
-  case 32u:
-    /*  Initializations of structure parameters for 32 point FFT */
-    S->twidCoefModifier = 128u;
-    S->bitRevFactor = 128u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-    break;
-
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**   
- * @} end of ComplexFFT group   
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q15.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q15.c
deleted file mode 100755
index 74d821a9..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q15.c
+++ /dev/null
@@ -1,742 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:	    arm_cfft_radix2_q15.c   
-*   
-* Description:	Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function   
-*   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-void arm_radix2_butterfly_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pCoef,
-  uint16_t twidCoefModifier);
-
-void arm_radix2_butterfly_inverse_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pCoef,
-  uint16_t twidCoefModifier);
-	
-void arm_bitreversal_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTab);
-
-/**   
- * @ingroup groupTransforms   
- */
-
-/**   
- * @addtogroup ComplexFFT   
- * @{   
- */
-
-/**   
- * @details   
- * @brief Processing function for the fixed-point CFFT/CIFFT.  
- * @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q15 and will be removed
- * @param[in]      *S    points to an instance of the fixed-point CFFT/CIFFT structure.  
- * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
- * @return none.  
- */
-
-void arm_cfft_radix2_q15(
-  const arm_cfft_radix2_instance_q15 * S,
-  q15_t * pSrc)
-{
-
-  if(S->ifftFlag == 1u)
-  {
-    arm_radix2_butterfly_inverse_q15(pSrc, S->fftLen,
-                                     S->pTwiddle, S->twidCoefModifier);
-  }
-  else
-  {
-    arm_radix2_butterfly_q15(pSrc, S->fftLen,
-                             S->pTwiddle, S->twidCoefModifier);
-  }
-
-  arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-}
-
-/**   
- * @} end of ComplexFFT group   
- */
-
-void arm_radix2_butterfly_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pCoef,
-  uint16_t twidCoefModifier)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  unsigned i, j, k, l;
-  unsigned n1, n2, ia;
-  q15_t in;
-  q31_t T, S, R;
-  q31_t coeff, out1, out2;
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (i = 0; i < n2; i++)
-  {
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-    ia = ia + twidCoefModifier;
-
-    l = i + n2;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-    in = ((int16_t) (T & 0xFFFF)) >> 1;
-    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-    in = ((int16_t) (S & 0xFFFF)) >> 1;
-    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __SMUAD(coeff, R) >> 16;
-    out2 = __SMUSDX(coeff, R);
-
-#else
-
-    out1 = __SMUSDX(R, coeff) >> 16u;
-    out2 = __SMUAD(coeff, R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    i++;
-    l++;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-    in = ((int16_t) (T & 0xFFFF)) >> 1;
-    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-    in = ((int16_t) (S & 0xFFFF)) >> 1;
-    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __SMUAD(coeff, R) >> 16;
-    out2 = __SMUSDX(coeff, R);
-
-#else
-
-    out1 = __SMUSDX(R, coeff) >> 16u;
-    out2 = __SMUAD(coeff, R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-
-        T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-        S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-        R = __QSUB16(T, S);
-
-        _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUAD(coeff, R) >> 16;
-        out2 = __SMUSDX(coeff, R);
-
-#else
-
-        out1 = __SMUSDX(R, coeff) >> 16u;
-        out2 = __SMUAD(coeff, R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSrc + (2u * l)) =
-          (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-        i += n1;
-
-        l = i + n2;
-
-        T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-        S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-        R = __QSUB16(T, S);
-
-        _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUAD(coeff, R) >> 16;
-        out2 = __SMUSDX(coeff, R);
-
-#else
-
-        out1 = __SMUSDX(R, coeff) >> 16u;
-        out2 = __SMUAD(coeff, R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSrc + (2u * l)) =
-          (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-  ia = ia + twidCoefModifier;
-
-  // loop for butterfly 
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) = R;
-
-    i += n1;
-    l = i + n2;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) = R;
-
-  }                             // groups loop end 
-
-
-#else
-
-  unsigned i, j, k, l;
-  unsigned n1, n2, ia;
-  q15_t xt, yt, cosVal, sinVal;
-
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (j = 0; j < n2; j++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    for (i = j; i < fftLen; i += n1)
-    {
-      l = i + n2;
-      xt = (pSrc[2 * i] >> 1u) - (pSrc[2 * l] >> 1u);
-      pSrc[2 * i] = ((pSrc[2 * i] >> 1u) + (pSrc[2 * l] >> 1u)) >> 1u;
-
-      yt = (pSrc[2 * i + 1] >> 1u) - (pSrc[2 * l + 1] >> 1u);
-      pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 1u) + (pSrc[2 * i + 1] >> 1u)) >> 1u;
-
-      pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
-                      ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-      pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
-                           ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-
-    }                           // butterfly loop end 
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u;
-
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u;
-
-        pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
-                        ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-        pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
-                             ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (j = 0; j < n2; j++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    for (i = j; i < fftLen; i += n1)
-    {
-      l = i + n2;
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-      pSrc[2u * l] = xt;
-
-      pSrc[2u * l + 1u] = yt;
-
-    }                           // butterfly loop end 
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-#endif //             #ifndef ARM_MATH_CM0_FAMILY
-
-}
-
-
-void arm_radix2_butterfly_inverse_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pCoef,
-  uint16_t twidCoefModifier)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  unsigned i, j, k, l;
-  unsigned n1, n2, ia;
-  q15_t in;
-  q31_t T, S, R;
-  q31_t coeff, out1, out2;
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (i = 0; i < n2; i++)
-  {
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-    ia = ia + twidCoefModifier;
-
-    l = i + n2;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-    in = ((int16_t) (T & 0xFFFF)) >> 1;
-    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-    in = ((int16_t) (S & 0xFFFF)) >> 1;
-    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __SMUSD(coeff, R) >> 16;
-    out2 = __SMUADX(coeff, R);
-#else
-
-    out1 = __SMUADX(R, coeff) >> 16u;
-    out2 = __SMUSD(__QSUB(0, coeff), R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    i++;
-    l++;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-    in = ((int16_t) (T & 0xFFFF)) >> 1;
-    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-    in = ((int16_t) (S & 0xFFFF)) >> 1;
-    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __SMUSD(coeff, R) >> 16;
-    out2 = __SMUADX(coeff, R);
-#else
-
-    out1 = __SMUADX(R, coeff) >> 16u;
-    out2 = __SMUSD(__QSUB(0, coeff), R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-
-        T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-        S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-        R = __QSUB16(T, S);
-
-        _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUSD(coeff, R) >> 16;
-        out2 = __SMUADX(coeff, R);
-
-#else
-
-        out1 = __SMUADX(R, coeff) >> 16u;
-        out2 = __SMUSD(__QSUB(0, coeff), R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSrc + (2u * l)) =
-          (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-        i += n1;
-
-        l = i + n2;
-
-        T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-        S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-        R = __QSUB16(T, S);
-
-        _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUSD(coeff, R) >> 16;
-        out2 = __SMUADX(coeff, R);
-#else
-
-        out1 = __SMUADX(R, coeff) >> 16u;
-        out2 = __SMUSD(__QSUB(0, coeff), R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSrc + (2u * l)) =
-          (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (j = 0; j < n2; j++)
-  {
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    for (i = j; i < fftLen; i += n1)
-    {
-      l = i + n2;
-
-      T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-      S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-      R = __QSUB16(T, S);
-
-      _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S);
-
-      _SIMD32_OFFSET(pSrc + (2u * l)) = R;
-
-    }                           // butterfly loop end 
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-#else
-
-
-  unsigned i, j, k, l;
-  unsigned n1, n2, ia;
-  q15_t xt, yt, cosVal, sinVal;
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (j = 0; j < n2; j++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    for (i = j; i < fftLen; i += n1)
-    {
-      l = i + n2;
-      xt = (pSrc[2 * i] >> 1u) - (pSrc[2 * l] >> 1u);
-      pSrc[2 * i] = ((pSrc[2 * i] >> 1u) + (pSrc[2 * l] >> 1u)) >> 1u;
-
-      yt = (pSrc[2 * i + 1] >> 1u) - (pSrc[2 * l + 1] >> 1u);
-      pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 1u) + (pSrc[2 * i + 1] >> 1u)) >> 1u;
-
-      pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
-                      ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-      pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
-                           ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-
-    }                           // butterfly loop end 
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u;
-
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u;
-
-        pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
-                        ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-        pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
-                             ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  cosVal = pCoef[ia * 2];
-  sinVal = pCoef[(ia * 2) + 1];
-
-  ia = ia + twidCoefModifier;
-
-  // loop for butterfly 
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-    pSrc[2u * l] = xt;
-
-    pSrc[2u * l + 1u] = yt;
-
-  }                             // groups loop end 
-
-
-#endif //             #ifndef ARM_MATH_CM0_FAMILY
-
-}
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q31.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q31.c
deleted file mode 100755
index 6ed9a808..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q31.c
+++ /dev/null
@@ -1,351 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:	    arm_cfft_radix2_q31.c   
-*   
-* Description:	Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function   
-*   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-void arm_radix2_butterfly_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint16_t twidCoefModifier);
-
-void arm_radix2_butterfly_inverse_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint16_t twidCoefModifier);
-
-void arm_bitreversal_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTab);
-
-/**   
-* @ingroup groupTransforms   
-*/
-
-/**   
-* @addtogroup ComplexFFT   
-* @{   
-*/
-
-/**   
-* @details   
-* @brief Processing function for the fixed-point CFFT/CIFFT.  
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q31 and will be removed
-* @param[in]      *S    points to an instance of the fixed-point CFFT/CIFFT structure.  
-* @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
-* @return none.  
-*/
-
-void arm_cfft_radix2_q31(
-const arm_cfft_radix2_instance_q31 * S,
-q31_t * pSrc)
-{
-
-   if(S->ifftFlag == 1u)
-   {
-      arm_radix2_butterfly_inverse_q31(pSrc, S->fftLen,
-      S->pTwiddle, S->twidCoefModifier);
-   }
-   else
-   {
-      arm_radix2_butterfly_q31(pSrc, S->fftLen,
-      S->pTwiddle, S->twidCoefModifier);
-   }
-
-   arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-}
-
-/**   
-* @} end of ComplexFFT group   
-*/
-
-void arm_radix2_butterfly_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-q31_t * pCoef,
-uint16_t twidCoefModifier)
-{
-
-   unsigned i, j, k, l, m;
-   unsigned n1, n2, ia;
-   q31_t xt, yt, cosVal, sinVal;
-   q31_t p0, p1;
-
-   //N = fftLen; 
-   n2 = fftLen;
-
-   n1 = n2;
-   n2 = n2 >> 1;
-   ia = 0;
-
-   // loop for groups 
-   for (i = 0; i < n2; i++)
-   {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      l = i + n2;
-      xt = (pSrc[2 * i] >> 1u) - (pSrc[2 * l] >> 1u);
-      pSrc[2 * i] = ((pSrc[2 * i] >> 1u) + (pSrc[2 * l] >> 1u)) >> 1u;
-      
-      yt = (pSrc[2 * i + 1] >> 1u) - (pSrc[2 * l + 1] >> 1u);
-      pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 1u) + (pSrc[2 * i + 1] >> 1u)) >> 1u;
-
-      mult_32x32_keep32_R(p0, xt, cosVal);
-      mult_32x32_keep32_R(p1, yt, cosVal);
-      multAcc_32x32_keep32_R(p0, yt, sinVal); 
-      multSub_32x32_keep32_R(p1, xt, sinVal);
-      
-      pSrc[2u * l] = p0;
-      pSrc[2u * l + 1u] = p1;
-
-   }                             // groups loop end 
-
-   twidCoefModifier <<= 1u;
-
-   // loop for stage 
-   for (k = fftLen / 2; k > 2; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups 
-      for (j = 0; j < n2; j++)
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia = ia + twidCoefModifier;
-
-         // loop for butterfly 
-         i = j;
-         m = fftLen / n1;
-         do
-         {
-            l = i + n2;
-            xt = pSrc[2 * i] - pSrc[2 * l];
-            pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u;
-            
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u;
-
-            mult_32x32_keep32_R(p0, xt, cosVal);
-            mult_32x32_keep32_R(p1, yt, cosVal);
-            multAcc_32x32_keep32_R(p0, yt, sinVal);
-            multSub_32x32_keep32_R(p1, xt, sinVal);
-            
-            pSrc[2u * l] = p0;
-            pSrc[2u * l + 1u] = p1;
-            i += n1;
-            m--;
-         } while( m > 0);                   // butterfly loop end 
-
-      }                           // groups loop end 
-
-      twidCoefModifier <<= 1u;
-   }                             // stages loop end 
-
-   n1 = n2;
-   n2 = n2 >> 1;
-   ia = 0;
-
-   cosVal = pCoef[ia * 2];
-   sinVal = pCoef[(ia * 2) + 1];
-   ia = ia + twidCoefModifier;
-
-   // loop for butterfly 
-   for (i = 0; i < fftLen; i += n1)
-   {
-      l = i + n2;
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-      pSrc[2u * l] = xt;
-
-      pSrc[2u * l + 1u] = yt;
-
-      i += n1;
-      l = i + n2;
-
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-      pSrc[2u * l] = xt;
-
-      pSrc[2u * l + 1u] = yt;
-
-   }                             // butterfly loop end 
-
-}
-
-
-void arm_radix2_butterfly_inverse_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-q31_t * pCoef,
-uint16_t twidCoefModifier)
-{
-
-   unsigned i, j, k, l;
-   unsigned n1, n2, ia;
-   q31_t xt, yt, cosVal, sinVal;
-   q31_t p0, p1;
-
-   //N = fftLen; 
-   n2 = fftLen;
-
-   n1 = n2;
-   n2 = n2 >> 1;
-   ia = 0;
-
-   // loop for groups 
-   for (i = 0; i < n2; i++)
-   {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      l = i + n2;
-      xt = (pSrc[2 * i] >> 1u) - (pSrc[2 * l] >> 1u);
-      pSrc[2 * i] = ((pSrc[2 * i] >> 1u) + (pSrc[2 * l] >> 1u)) >> 1u;
-      
-      yt = (pSrc[2 * i + 1] >> 1u) - (pSrc[2 * l + 1] >> 1u);
-      pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 1u) + (pSrc[2 * i + 1] >> 1u)) >> 1u;
-
-      mult_32x32_keep32_R(p0, xt, cosVal);
-      mult_32x32_keep32_R(p1, yt, cosVal);
-      multSub_32x32_keep32_R(p0, yt, sinVal);
-      multAcc_32x32_keep32_R(p1, xt, sinVal);
-      
-      pSrc[2u * l] = p0;
-      pSrc[2u * l + 1u] = p1;
-   }                             // groups loop end 
-
-   twidCoefModifier = twidCoefModifier << 1u;
-
-   // loop for stage 
-   for (k = fftLen / 2; k > 2; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups 
-      for (j = 0; j < n2; j++)
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia = ia + twidCoefModifier;
-
-         // loop for butterfly 
-         for (i = j; i < fftLen; i += n1)
-         {
-            l = i + n2;
-            xt = pSrc[2 * i] - pSrc[2 * l];
-            pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u;
-      
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u;
-
-            mult_32x32_keep32_R(p0, xt, cosVal);
-            mult_32x32_keep32_R(p1, yt, cosVal);
-            multSub_32x32_keep32_R(p0, yt, sinVal);
-            multAcc_32x32_keep32_R(p1, xt, sinVal);
-            
-            pSrc[2u * l] = p0;
-            pSrc[2u * l + 1u] = p1;
-         }                         // butterfly loop end 
-
-      }                           // groups loop end 
-
-      twidCoefModifier = twidCoefModifier << 1u;
-   }                             // stages loop end 
-
-   n1 = n2;
-   n2 = n2 >> 1;
-   ia = 0;
-
-   cosVal = pCoef[ia * 2];
-   sinVal = pCoef[(ia * 2) + 1];
-   ia = ia + twidCoefModifier;
-
-   // loop for butterfly 
-   for (i = 0; i < fftLen; i += n1)
-   {
-      l = i + n2;
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-      pSrc[2u * l] = xt;
-
-      pSrc[2u * l + 1u] = yt;
-
-      i += n1;
-      l = i + n2;
-
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-      pSrc[2u * l] = xt;
-
-      pSrc[2u * l + 1u] = yt;
-
-   }                             // butterfly loop end 
-
-}
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c
deleted file mode 100755
index c29927c3..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c
+++ /dev/null
@@ -1,1210 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_f32.c    
-*    
-* Description:	Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function    
-*    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-extern void arm_bitreversal_f32(
-float32_t * pSrc,
-uint16_t fftSize,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTab);
-
-/**    
-* @ingroup groupTransforms    
-*/
-
-/* ----------------------------------------------------------------------    
-** Internal helper function used by the FFTs    
-** ------------------------------------------------------------------- */
-
-/*    
-* @brief  Core function for the floating-point CFFT butterfly process.   
-* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
-* @param[in]      fftLen           length of the FFT.   
-* @param[in]      *pCoef           points to the twiddle coefficient buffer.   
-* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
-* @return none.   
-*/
-
-void arm_radix4_butterfly_f32(
-float32_t * pSrc,
-uint16_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier)
-{
-
-   float32_t co1, co2, co3, si1, si2, si3;
-   uint32_t ia1, ia2, ia3;
-   uint32_t i0, i1, i2, i3;
-   uint32_t n1, n2, j, k;
-
-#ifndef ARM_MATH_CM0_FAMILY_FAMILY
-
-   /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-   float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
-   float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
-   Ybminusd;
-   float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
-   float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
-   float32_t *ptr1;
-   float32_t p0,p1,p2,p3,p4,p5;
-   float32_t a0,a1,a2,a3,a4,a5,a6,a7;
-
-   /*  Initializations for the first stage */
-   n2 = fftLen;
-   n1 = n2;
-
-   /* n2 = fftLen/4 */
-   n2 >>= 2u;
-   i0 = 0u;
-   ia1 = 0u;
-
-   j = n2;
-
-   /*  Calculation of first stage */
-   do
-   {
-      /*  index calculation for the input as, */
-      /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-      i1 = i0 + n2;
-      i2 = i1 + n2;
-      i3 = i2 + n2;
-
-      xaIn = pSrc[(2u * i0)];
-      yaIn = pSrc[(2u * i0) + 1u];
-
-      xbIn = pSrc[(2u * i1)];
-      ybIn = pSrc[(2u * i1) + 1u];
-
-      xcIn = pSrc[(2u * i2)];
-      ycIn = pSrc[(2u * i2) + 1u];
-
-      xdIn = pSrc[(2u * i3)];
-      ydIn = pSrc[(2u * i3) + 1u];
-
-      /* xa + xc */
-      Xaplusc = xaIn + xcIn;
-      /* xb + xd */
-      Xbplusd = xbIn + xdIn;
-      /* ya + yc */
-      Yaplusc = yaIn + ycIn;
-      /* yb + yd */
-      Ybplusd = ybIn + ydIn;
-
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-
-      /* xa - xc */
-      Xaminusc = xaIn - xcIn;
-      /* xb - xd */
-      Xbminusd = xbIn - xdIn;
-      /* ya - yc */
-      Yaminusc = yaIn - ycIn;
-      /* yb - yd */
-      Ybminusd = ybIn - ydIn;
-
-      /* xa' = xa + xb + xc + xd */
-      pSrc[(2u * i0)] = Xaplusc + Xbplusd;
-      /* ya' = ya + yb + yc + yd */
-      pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
-
-      /* (xa - xc) + (yb - yd) */
-      Xb12C_out = (Xaminusc + Ybminusd);
-      /* (ya - yc) + (xb - xd) */
-      Yb12C_out = (Yaminusc - Xbminusd);
-      /* (xa + xc) - (xb + xd) */
-      Xc12C_out = (Xaplusc - Xbplusd);
-      /* (ya + yc) - (yb + yd) */
-      Yc12C_out = (Yaplusc - Ybplusd);
-      /* (xa - xc) - (yb - yd) */
-      Xd12C_out = (Xaminusc - Ybminusd);
-      /* (ya - yc) + (xb - xd) */
-      Yd12C_out = (Xbminusd + Yaminusc);
-
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-
-      /*  index calculation for the coefficients */
-      ia3 = ia2 + ia1;
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-
-      Xb12_out = Xb12C_out * co1;
-      Yb12_out = Yb12C_out * co1;
-      Xc12_out = Xc12C_out * co2;
-      Yc12_out = Yc12C_out * co2;
-      Xd12_out = Xd12C_out * co3;
-      Yd12_out = Yd12C_out * co3;
-         
-      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-      //Xb12_out -= Yb12C_out * si1;
-      p0 = Yb12C_out * si1;
-      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-      //Yb12_out += Xb12C_out * si1;
-      p1 = Xb12C_out * si1;
-      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-      //Xc12_out -= Yc12C_out * si2;
-      p2 = Yc12C_out * si2;
-      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-      //Yc12_out += Xc12C_out * si2;
-      p3 = Xc12C_out * si2;
-      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-      //Xd12_out -= Yd12C_out * si3;
-      p4 = Yd12C_out * si3;
-      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-      //Yd12_out += Xd12C_out * si3;
-      p5 = Xd12C_out * si3;
-      
-      Xb12_out += p0;
-      Yb12_out -= p1;
-      Xc12_out += p2;
-      Yc12_out -= p3;
-      Xd12_out += p4;
-      Yd12_out -= p5;
-
-      /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-      pSrc[2u * i1] = Xc12_out;
-
-      /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-      pSrc[(2u * i1) + 1u] = Yc12_out;
-
-      /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-      pSrc[2u * i2] = Xb12_out;
-
-      /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-      pSrc[(2u * i2) + 1u] = Yb12_out;
-
-      /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-      pSrc[2u * i3] = Xd12_out;
-
-      /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-      pSrc[(2u * i3) + 1u] = Yd12_out;
-
-      /*  Twiddle coefficients index modifier */
-      ia1 += twidCoefModifier;
-
-      /*  Updating input index */
-      i0++;
-
-   }
-   while(--j);
-
-   twidCoefModifier <<= 2u;
-
-   /*  Calculation of second stage to excluding last stage */
-   for (k = fftLen >> 2u; k > 4u; k >>= 2u)
-   {
-      /*  Initializations for the first stage */
-      n1 = n2;
-      n2 >>= 2u;
-      ia1 = 0u;
-
-      /*  Calculation of first stage */
-      j = 0;
-      do
-      {
-         /*  index calculation for the coefficients */
-         ia2 = ia1 + ia1;
-         ia3 = ia2 + ia1;
-         co1 = pCoef[ia1 * 2u];
-         si1 = pCoef[(ia1 * 2u) + 1u];
-         co2 = pCoef[ia2 * 2u];
-         si2 = pCoef[(ia2 * 2u) + 1u];
-         co3 = pCoef[ia3 * 2u];
-         si3 = pCoef[(ia3 * 2u) + 1u];
-
-         /*  Twiddle coefficients index modifier */
-         ia1 += twidCoefModifier;
-      
-         i0 = j;
-         do
-         {
-            /*  index calculation for the input as, */
-            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-            i1 = i0 + n2;
-            i2 = i1 + n2;
-            i3 = i2 + n2;
-
-            xaIn = pSrc[(2u * i0)];
-            yaIn = pSrc[(2u * i0) + 1u];
-
-            xbIn = pSrc[(2u * i1)];
-            ybIn = pSrc[(2u * i1) + 1u];
-
-            xcIn = pSrc[(2u * i2)];
-            ycIn = pSrc[(2u * i2) + 1u];
-
-            xdIn = pSrc[(2u * i3)];
-            ydIn = pSrc[(2u * i3) + 1u];
-
-            /* xa - xc */
-            Xaminusc = xaIn - xcIn;
-            /* (xb - xd) */
-            Xbminusd = xbIn - xdIn;
-            /* ya - yc */
-            Yaminusc = yaIn - ycIn;
-            /* (yb - yd) */
-            Ybminusd = ybIn - ydIn;
-
-            /* xa + xc */
-            Xaplusc = xaIn + xcIn;
-            /* xb + xd */
-            Xbplusd = xbIn + xdIn;
-            /* ya + yc */
-            Yaplusc = yaIn + ycIn;
-            /* yb + yd */
-            Ybplusd = ybIn + ydIn;
-
-            /* (xa - xc) + (yb - yd) */
-            Xb12C_out = (Xaminusc + Ybminusd);
-            /* (ya - yc) -  (xb - xd) */
-            Yb12C_out = (Yaminusc - Xbminusd);
-            /* xa + xc -(xb + xd) */
-            Xc12C_out = (Xaplusc - Xbplusd);
-            /* (ya + yc) - (yb + yd) */
-            Yc12C_out = (Yaplusc - Ybplusd);
-            /* (xa - xc) - (yb - yd) */
-            Xd12C_out = (Xaminusc - Ybminusd);
-            /* (ya - yc) +  (xb - xd) */
-            Yd12C_out = (Xbminusd + Yaminusc);
-
-            pSrc[(2u * i0)] = Xaplusc + Xbplusd;
-            pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
-
-            Xb12_out = Xb12C_out * co1;
-            Yb12_out = Yb12C_out * co1;
-            Xc12_out = Xc12C_out * co2;
-            Yc12_out = Yc12C_out * co2;
-            Xd12_out = Xd12C_out * co3;
-            Yd12_out = Yd12C_out * co3;
-         
-            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-            //Xb12_out -= Yb12C_out * si1;
-            p0 = Yb12C_out * si1;
-            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-            //Yb12_out += Xb12C_out * si1;
-            p1 = Xb12C_out * si1;
-            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-            //Xc12_out -= Yc12C_out * si2;
-            p2 = Yc12C_out * si2;
-            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-            //Yc12_out += Xc12C_out * si2;
-            p3 = Xc12C_out * si2;
-            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-            //Xd12_out -= Yd12C_out * si3;
-            p4 = Yd12C_out * si3;
-            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-            //Yd12_out += Xd12C_out * si3;
-            p5 = Xd12C_out * si3;
-            
-            Xb12_out += p0;
-            Yb12_out -= p1;
-            Xc12_out += p2;
-            Yc12_out -= p3;
-            Xd12_out += p4;
-            Yd12_out -= p5;
-
-            /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-            pSrc[2u * i1] = Xc12_out;
-
-            /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-            pSrc[(2u * i1) + 1u] = Yc12_out;
-
-            /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-            pSrc[2u * i2] = Xb12_out;
-
-            /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-            pSrc[(2u * i2) + 1u] = Yb12_out;
-
-            /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-            pSrc[2u * i3] = Xd12_out;
-
-            /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-            pSrc[(2u * i3) + 1u] = Yd12_out;
-
-            i0 += n1;
-         } while(i0 < fftLen);
-         j++;
-      } while(j <= (n2 - 1u));
-      twidCoefModifier <<= 2u;
-   }
-
-   j = fftLen >> 2;
-   ptr1 = &pSrc[0];
-
-   /*  Calculations of last stage */
-   do
-   {
-      xaIn = ptr1[0];
-      yaIn = ptr1[1];
-      xbIn = ptr1[2];
-      ybIn = ptr1[3];
-      xcIn = ptr1[4];
-      ycIn = ptr1[5];
-      xdIn = ptr1[6];
-      ydIn = ptr1[7];
-
-      /* xa + xc */
-      Xaplusc = xaIn + xcIn;
-
-      /* xa - xc */
-      Xaminusc = xaIn - xcIn;
-
-      /* ya + yc */
-      Yaplusc = yaIn + ycIn;
-
-      /* ya - yc */
-      Yaminusc = yaIn - ycIn;
-
-      /* xb + xd */
-      Xbplusd = xbIn + xdIn;
-
-      /* yb + yd */
-      Ybplusd = ybIn + ydIn;
-
-      /* (xb-xd) */
-      Xbminusd = xbIn - xdIn;
-
-      /* (yb-yd) */
-      Ybminusd = ybIn - ydIn;
-
-      /* xa' = xa + xb + xc + xd */
-      a0 = (Xaplusc + Xbplusd);
-      /* ya' = ya + yb + yc + yd */
-      a1 = (Yaplusc + Ybplusd);
-      /* xc' = (xa-xb+xc-xd) */
-      a2 = (Xaplusc - Xbplusd);
-      /* yc' = (ya-yb+yc-yd) */
-      a3 = (Yaplusc - Ybplusd);
-      /* xb' = (xa+yb-xc-yd) */
-      a4 = (Xaminusc + Ybminusd);
-      /* yb' = (ya-xb-yc+xd) */
-      a5 = (Yaminusc - Xbminusd);
-      /* xd' = (xa-yb-xc+yd)) */
-      a6 = (Xaminusc - Ybminusd);
-      /* yd' = (ya+xb-yc-xd) */
-      a7 = (Xbminusd + Yaminusc);
-   
-      ptr1[0] = a0;
-      ptr1[1] = a1;
-      ptr1[2] = a2;
-      ptr1[3] = a3;
-      ptr1[4] = a4;
-      ptr1[5] = a5;
-      ptr1[6] = a6;
-      ptr1[7] = a7;
-
-      /* increment pointer by 8 */
-      ptr1 += 8u;
-   } while(--j);
-
-#else
-
-   float32_t t1, t2, r1, r2, s1, s2;
-
-   /* Run the below code for Cortex-M0 */
-
-   /*  Initializations for the fft calculation */
-   n2 = fftLen;
-   n1 = n2;
-   for (k = fftLen; k > 1u; k >>= 2u)
-   {
-      /*  Initializations for the fft calculation */
-      n1 = n2;
-      n2 >>= 2u;
-      ia1 = 0u;
-
-      /*  FFT Calculation */
-      j = 0;
-      do
-      {
-         /*  index calculation for the coefficients */
-         ia2 = ia1 + ia1;
-         ia3 = ia2 + ia1;
-         co1 = pCoef[ia1 * 2u];
-         si1 = pCoef[(ia1 * 2u) + 1u];
-         co2 = pCoef[ia2 * 2u];
-         si2 = pCoef[(ia2 * 2u) + 1u];
-         co3 = pCoef[ia3 * 2u];
-         si3 = pCoef[(ia3 * 2u) + 1u];
-
-         /*  Twiddle coefficients index modifier */
-         ia1 = ia1 + twidCoefModifier;
-
-         i0 = j;
-         do
-         {
-            /*  index calculation for the input as, */
-            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-            i1 = i0 + n2;
-            i2 = i1 + n2;
-            i3 = i2 + n2;
-
-            /* xa + xc */
-            r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
-
-            /* xa - xc */
-            r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
-
-            /* ya + yc */
-            s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
-
-            /* ya - yc */
-            s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
-
-            /* xb + xd */
-            t1 = pSrc[2u * i1] + pSrc[2u * i3];
-
-            /* xa' = xa + xb + xc + xd */
-            pSrc[2u * i0] = r1 + t1;
-
-            /* xa + xc -(xb + xd) */
-            r1 = r1 - t1;
-
-            /* yb + yd */
-            t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
-
-            /* ya' = ya + yb + yc + yd */
-            pSrc[(2u * i0) + 1u] = s1 + t2;
-
-            /* (ya + yc) - (yb + yd) */
-            s1 = s1 - t2;
-
-            /* (yb - yd) */
-            t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
-
-            /* (xb - xd) */
-            t2 = pSrc[2u * i1] - pSrc[2u * i3];
-
-            /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-            pSrc[2u * i1] = (r1 * co2) + (s1 * si2);
-
-            /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-            pSrc[(2u * i1) + 1u] = (s1 * co2) - (r1 * si2);
-
-            /* (xa - xc) + (yb - yd) */
-            r1 = r2 + t1;
-
-            /* (xa - xc) - (yb - yd) */
-            r2 = r2 - t1;
-
-            /* (ya - yc) -  (xb - xd) */
-            s1 = s2 - t2;
-
-            /* (ya - yc) +  (xb - xd) */
-            s2 = s2 + t2;
-
-            /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-            pSrc[2u * i2] = (r1 * co1) + (s1 * si1);
-
-            /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-            pSrc[(2u * i2) + 1u] = (s1 * co1) - (r1 * si1);
-
-            /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-            pSrc[2u * i3] = (r2 * co3) + (s2 * si3);
-
-            /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-            pSrc[(2u * i3) + 1u] = (s2 * co3) - (r2 * si3);
-         
-            i0 += n1;
-         } while( i0 < fftLen);
-         j++;
-      } while(j <= (n2 - 1u));
-      twidCoefModifier <<= 2u;
-   }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY_FAMILY */
-
-}
-
-/*    
-* @brief  Core function for the floating-point CIFFT butterfly process.   
-* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
-* @param[in]      fftLen           length of the FFT.   
-* @param[in]      *pCoef           points to twiddle coefficient buffer.   
-* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
-* @param[in]      onebyfftLen      value of 1/fftLen.   
-* @return none.   
-*/
-
-void arm_radix4_butterfly_inverse_f32(
-float32_t * pSrc,
-uint16_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier,
-float32_t onebyfftLen)
-{
-   float32_t co1, co2, co3, si1, si2, si3;
-   uint32_t ia1, ia2, ia3;
-   uint32_t i0, i1, i2, i3;
-   uint32_t n1, n2, j, k;
-
-#ifndef ARM_MATH_CM0_FAMILY_FAMILY
-
-   float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
-   float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
-   Ybminusd;
-   float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
-   float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
-   float32_t *ptr1;
-   float32_t p0,p1,p2,p3,p4,p5,p6,p7;
-   float32_t a0,a1,a2,a3,a4,a5,a6,a7;
-
-
-   /*  Initializations for the first stage */
-   n2 = fftLen;
-   n1 = n2;
-
-   /* n2 = fftLen/4 */
-   n2 >>= 2u;
-   i0 = 0u;
-   ia1 = 0u;
-
-   j = n2;
-
-   /*  Calculation of first stage */
-   do
-   {
-      /*  index calculation for the input as, */
-      /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-      i1 = i0 + n2;
-      i2 = i1 + n2;
-      i3 = i2 + n2;
-
-      /*  Butterfly implementation */
-      xaIn = pSrc[(2u * i0)];
-      yaIn = pSrc[(2u * i0) + 1u];
-
-      xcIn = pSrc[(2u * i2)];
-      ycIn = pSrc[(2u * i2) + 1u];
-
-      xbIn = pSrc[(2u * i1)];
-      ybIn = pSrc[(2u * i1) + 1u];
-
-      xdIn = pSrc[(2u * i3)];
-      ydIn = pSrc[(2u * i3) + 1u];
-
-      /* xa + xc */
-      Xaplusc = xaIn + xcIn;
-      /* xb + xd */
-      Xbplusd = xbIn + xdIn;
-      /* ya + yc */
-      Yaplusc = yaIn + ycIn;
-      /* yb + yd */
-      Ybplusd = ybIn + ydIn;
-
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-
-      /* xa - xc */
-      Xaminusc = xaIn - xcIn;
-      /* xb - xd */
-      Xbminusd = xbIn - xdIn;
-      /* ya - yc */
-      Yaminusc = yaIn - ycIn;
-      /* yb - yd */
-      Ybminusd = ybIn - ydIn;
-
-      /* xa' = xa + xb + xc + xd */
-      pSrc[(2u * i0)] = Xaplusc + Xbplusd;
-
-      /* ya' = ya + yb + yc + yd */
-      pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
-
-      /* (xa - xc) - (yb - yd) */
-      Xb12C_out = (Xaminusc - Ybminusd);
-      /* (ya - yc) + (xb - xd) */
-      Yb12C_out = (Yaminusc + Xbminusd);
-      /* (xa + xc) - (xb + xd) */
-      Xc12C_out = (Xaplusc - Xbplusd);
-      /* (ya + yc) - (yb + yd) */
-      Yc12C_out = (Yaplusc - Ybplusd);
-      /* (xa - xc) + (yb - yd) */
-      Xd12C_out = (Xaminusc + Ybminusd);
-      /* (ya - yc) - (xb - xd) */
-      Yd12C_out = (Yaminusc - Xbminusd);
-
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-
-      /*  index calculation for the coefficients */
-      ia3 = ia2 + ia1;
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-
-      Xb12_out = Xb12C_out * co1;
-      Yb12_out = Yb12C_out * co1;
-      Xc12_out = Xc12C_out * co2;
-      Yc12_out = Yc12C_out * co2;
-      Xd12_out = Xd12C_out * co3;
-      Yd12_out = Yd12C_out * co3;
-   
-      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-      //Xb12_out -= Yb12C_out * si1;
-      p0 = Yb12C_out * si1;
-      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-      //Yb12_out += Xb12C_out * si1;
-      p1 = Xb12C_out * si1;
-      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-      //Xc12_out -= Yc12C_out * si2;
-      p2 = Yc12C_out * si2;
-      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-      //Yc12_out += Xc12C_out * si2;
-      p3 = Xc12C_out * si2;
-      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-      //Xd12_out -= Yd12C_out * si3;
-      p4 = Yd12C_out * si3;
-      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-      //Yd12_out += Xd12C_out * si3;
-      p5 = Xd12C_out * si3;
-      
-      Xb12_out -= p0;
-      Yb12_out += p1;
-      Xc12_out -= p2;
-      Yc12_out += p3;
-      Xd12_out -= p4;
-      Yd12_out += p5;
-
-      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-      pSrc[2u * i1] = Xc12_out;
-
-      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-      pSrc[(2u * i1) + 1u] = Yc12_out;
-
-      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-      pSrc[2u * i2] = Xb12_out;
-
-      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-      pSrc[(2u * i2) + 1u] = Yb12_out;
-
-      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-      pSrc[2u * i3] = Xd12_out;
-
-      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-      pSrc[(2u * i3) + 1u] = Yd12_out;
-
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      /*  Updating input index */
-      i0 = i0 + 1u;
-
-   } while(--j);
-
-   twidCoefModifier <<= 2u;
-
-   /*  Calculation of second stage to excluding last stage */
-   for (k = fftLen >> 2u; k > 4u; k >>= 2u)
-   {
-      /*  Initializations for the first stage */
-      n1 = n2;
-      n2 >>= 2u;
-      ia1 = 0u;
-
-      /*  Calculation of first stage */
-      j = 0;
-      do
-      {
-         /*  index calculation for the coefficients */
-         ia2 = ia1 + ia1;
-         ia3 = ia2 + ia1;
-         co1 = pCoef[ia1 * 2u];
-         si1 = pCoef[(ia1 * 2u) + 1u];
-         co2 = pCoef[ia2 * 2u];
-         si2 = pCoef[(ia2 * 2u) + 1u];
-         co3 = pCoef[ia3 * 2u];
-         si3 = pCoef[(ia3 * 2u) + 1u];
-
-         /*  Twiddle coefficients index modifier */
-         ia1 = ia1 + twidCoefModifier;
-
-         i0 = j;
-         do
-         {
-            /*  index calculation for the input as, */
-            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-            i1 = i0 + n2;
-            i2 = i1 + n2;
-            i3 = i2 + n2;
-
-            xaIn = pSrc[(2u * i0)];
-            yaIn = pSrc[(2u * i0) + 1u];
-
-            xbIn = pSrc[(2u * i1)];
-            ybIn = pSrc[(2u * i1) + 1u];
-
-            xcIn = pSrc[(2u * i2)];
-            ycIn = pSrc[(2u * i2) + 1u];
-
-            xdIn = pSrc[(2u * i3)];
-            ydIn = pSrc[(2u * i3) + 1u];
-
-            /* xa - xc */
-            Xaminusc = xaIn - xcIn;
-            /* (xb - xd) */
-            Xbminusd = xbIn - xdIn;
-            /* ya - yc */
-            Yaminusc = yaIn - ycIn;
-            /* (yb - yd) */
-            Ybminusd = ybIn - ydIn;
-
-            /* xa + xc */
-            Xaplusc = xaIn + xcIn;
-            /* xb + xd */
-            Xbplusd = xbIn + xdIn;
-            /* ya + yc */
-            Yaplusc = yaIn + ycIn;
-            /* yb + yd */
-            Ybplusd = ybIn + ydIn;
-
-            /* (xa - xc) - (yb - yd) */
-            Xb12C_out = (Xaminusc - Ybminusd);
-            /* (ya - yc) +  (xb - xd) */
-            Yb12C_out = (Yaminusc + Xbminusd);
-            /* xa + xc -(xb + xd) */
-            Xc12C_out = (Xaplusc - Xbplusd);
-            /* (ya + yc) - (yb + yd) */
-            Yc12C_out = (Yaplusc - Ybplusd);
-            /* (xa - xc) + (yb - yd) */
-            Xd12C_out = (Xaminusc + Ybminusd);
-            /* (ya - yc) -  (xb - xd) */
-            Yd12C_out = (Yaminusc - Xbminusd);
-
-            pSrc[(2u * i0)] = Xaplusc + Xbplusd;
-            pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
-
-            Xb12_out = Xb12C_out * co1;
-            Yb12_out = Yb12C_out * co1;
-            Xc12_out = Xc12C_out * co2;
-            Yc12_out = Yc12C_out * co2;
-            Xd12_out = Xd12C_out * co3;
-            Yd12_out = Yd12C_out * co3;
-
-            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-            //Xb12_out -= Yb12C_out * si1;
-            p0 = Yb12C_out * si1;
-            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-            //Yb12_out += Xb12C_out * si1;
-            p1 = Xb12C_out * si1;
-            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-            //Xc12_out -= Yc12C_out * si2;
-            p2 = Yc12C_out * si2;
-            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-            //Yc12_out += Xc12C_out * si2;
-            p3 = Xc12C_out * si2;
-            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-            //Xd12_out -= Yd12C_out * si3;
-            p4 = Yd12C_out * si3;
-            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-            //Yd12_out += Xd12C_out * si3;
-            p5 = Xd12C_out * si3;
-            
-            Xb12_out -= p0;
-            Yb12_out += p1;
-            Xc12_out -= p2;
-            Yc12_out += p3;
-            Xd12_out -= p4;
-            Yd12_out += p5;
-
-            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-            pSrc[2u * i1] = Xc12_out;
-
-            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-            pSrc[(2u * i1) + 1u] = Yc12_out;
-
-            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-            pSrc[2u * i2] = Xb12_out;
-
-            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-            pSrc[(2u * i2) + 1u] = Yb12_out;
-
-            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-            pSrc[2u * i3] = Xd12_out;
-
-            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-            pSrc[(2u * i3) + 1u] = Yd12_out;
-
-            i0 += n1;
-         } while(i0 < fftLen);
-         j++;
-      } while(j <= (n2 - 1u));
-      twidCoefModifier <<= 2u;
-   }
-   /*  Initializations of last stage */
-
-   j = fftLen >> 2;
-   ptr1 = &pSrc[0];
-
-   /*  Calculations of last stage */
-   do
-   {
-      xaIn = ptr1[0];
-      yaIn = ptr1[1];
-      xbIn = ptr1[2];
-      ybIn = ptr1[3];
-      xcIn = ptr1[4];
-      ycIn = ptr1[5];
-      xdIn = ptr1[6];
-      ydIn = ptr1[7];
-
-      /*  Butterfly implementation */
-      /* xa + xc */
-      Xaplusc = xaIn + xcIn;
-
-      /* xa - xc */
-      Xaminusc = xaIn - xcIn;
-
-      /* ya + yc */
-      Yaplusc = yaIn + ycIn;
-
-      /* ya - yc */
-      Yaminusc = yaIn - ycIn;
-
-      /* xb + xd */
-      Xbplusd = xbIn + xdIn;
-
-      /* yb + yd */
-      Ybplusd = ybIn + ydIn;
-
-      /* (xb-xd) */
-      Xbminusd = xbIn - xdIn;
-
-      /* (yb-yd) */
-      Ybminusd = ybIn - ydIn;
-      
-      /* xa' = (xa+xb+xc+xd) * onebyfftLen */
-      a0 = (Xaplusc + Xbplusd);
-      /* ya' = (ya+yb+yc+yd) * onebyfftLen */
-      a1 = (Yaplusc + Ybplusd);
-      /* xc' = (xa-xb+xc-xd) * onebyfftLen */
-      a2 = (Xaplusc - Xbplusd);
-      /* yc' = (ya-yb+yc-yd) * onebyfftLen  */
-      a3 = (Yaplusc - Ybplusd);
-      /* xb' = (xa-yb-xc+yd) * onebyfftLen */
-      a4 = (Xaminusc - Ybminusd);
-      /* yb' = (ya+xb-yc-xd) * onebyfftLen */
-      a5 = (Yaminusc + Xbminusd);
-      /* xd' = (xa-yb-xc+yd) * onebyfftLen */
-      a6 = (Xaminusc + Ybminusd);
-      /* yd' = (ya-xb-yc+xd) * onebyfftLen */
-      a7 = (Yaminusc - Xbminusd);
-   
-      p0 = a0 * onebyfftLen;
-      p1 = a1 * onebyfftLen;
-      p2 = a2 * onebyfftLen;
-      p3 = a3 * onebyfftLen;
-      p4 = a4 * onebyfftLen;
-      p5 = a5 * onebyfftLen;
-      p6 = a6 * onebyfftLen;
-      p7 = a7 * onebyfftLen;
-   
-      /* xa' = (xa+xb+xc+xd) * onebyfftLen */
-      ptr1[0] = p0;
-      /* ya' = (ya+yb+yc+yd) * onebyfftLen */
-      ptr1[1] = p1;
-      /* xc' = (xa-xb+xc-xd) * onebyfftLen */
-      ptr1[2] = p2;
-      /* yc' = (ya-yb+yc-yd) * onebyfftLen  */
-      ptr1[3] = p3;
-      /* xb' = (xa-yb-xc+yd) * onebyfftLen */
-      ptr1[4] = p4;
-      /* yb' = (ya+xb-yc-xd) * onebyfftLen */
-      ptr1[5] = p5;
-      /* xd' = (xa-yb-xc+yd) * onebyfftLen */
-      ptr1[6] = p6;
-      /* yd' = (ya-xb-yc+xd) * onebyfftLen */
-      ptr1[7] = p7;
-
-      /* increment source pointer by 8 for next calculations */
-      ptr1 = ptr1 + 8u;
-
-   } while(--j);
-
-#else
-
-   float32_t t1, t2, r1, r2, s1, s2;
-
-   /* Run the below code for Cortex-M0 */
-
-   /*  Initializations for the first stage */
-   n2 = fftLen;
-   n1 = n2;
-
-   /*  Calculation of first stage */
-   for (k = fftLen; k > 4u; k >>= 2u)
-   {
-      /*  Initializations for the first stage */
-      n1 = n2;
-      n2 >>= 2u;
-      ia1 = 0u;
-
-      /*  Calculation of first stage */
-      j = 0;
-      do
-      {
-         /*  index calculation for the coefficients */
-         ia2 = ia1 + ia1;
-         ia3 = ia2 + ia1;
-         co1 = pCoef[ia1 * 2u];
-         si1 = pCoef[(ia1 * 2u) + 1u];
-         co2 = pCoef[ia2 * 2u];
-         si2 = pCoef[(ia2 * 2u) + 1u];
-         co3 = pCoef[ia3 * 2u];
-         si3 = pCoef[(ia3 * 2u) + 1u];
-
-         /*  Twiddle coefficients index modifier */
-         ia1 = ia1 + twidCoefModifier;
-
-         i0 = j;
-         do
-         {
-            /*  index calculation for the input as, */
-            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-            i1 = i0 + n2;
-            i2 = i1 + n2;
-            i3 = i2 + n2;
-
-            /* xa + xc */
-            r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
-
-            /* xa - xc */
-            r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
-
-            /* ya + yc */
-            s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
-
-            /* ya - yc */
-            s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
-
-            /* xb + xd */
-            t1 = pSrc[2u * i1] + pSrc[2u * i3];
-
-            /* xa' = xa + xb + xc + xd */
-            pSrc[2u * i0] = r1 + t1;
-
-            /* xa + xc -(xb + xd) */
-            r1 = r1 - t1;
-
-            /* yb + yd */
-            t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
-
-            /* ya' = ya + yb + yc + yd */
-            pSrc[(2u * i0) + 1u] = s1 + t2;
-
-            /* (ya + yc) - (yb + yd) */
-            s1 = s1 - t2;
-
-            /* (yb - yd) */
-            t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
-
-            /* (xb - xd) */
-            t2 = pSrc[2u * i1] - pSrc[2u * i3];
-
-            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-            pSrc[2u * i1] = (r1 * co2) - (s1 * si2);
-
-            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-            pSrc[(2u * i1) + 1u] = (s1 * co2) + (r1 * si2);
-
-            /* (xa - xc) - (yb - yd) */
-            r1 = r2 - t1;
-
-            /* (xa - xc) + (yb - yd) */
-            r2 = r2 + t1;
-
-            /* (ya - yc) +  (xb - xd) */
-            s1 = s2 + t2;
-
-            /* (ya - yc) -  (xb - xd) */
-            s2 = s2 - t2;
-
-            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-            pSrc[2u * i2] = (r1 * co1) - (s1 * si1);
-
-            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-            pSrc[(2u * i2) + 1u] = (s1 * co1) + (r1 * si1);
-
-            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-            pSrc[2u * i3] = (r2 * co3) - (s2 * si3);
-
-            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-            pSrc[(2u * i3) + 1u] = (s2 * co3) + (r2 * si3);
-         
-            i0 += n1;
-         } while( i0 < fftLen);
-         j++;
-      } while(j <= (n2 - 1u));
-      twidCoefModifier <<= 2u;
-   }
-   /*  Initializations of last stage */
-   n1 = n2;
-   n2 >>= 2u;
-
-   /*  Calculations of last stage */
-   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
-   {
-      /*  index calculation for the input as, */
-      /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-      i1 = i0 + n2;
-      i2 = i1 + n2;
-      i3 = i2 + n2;
-
-      /*  Butterfly implementation */
-      /* xa + xc */
-      r1 = pSrc[2u * i0] + pSrc[2u * i2];
-
-      /* xa - xc */
-      r2 = pSrc[2u * i0] - pSrc[2u * i2];
-
-      /* ya + yc */
-      s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
-
-      /* ya - yc */
-      s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
-
-      /* xc + xd */
-      t1 = pSrc[2u * i1] + pSrc[2u * i3];
-
-      /* xa' = xa + xb + xc + xd */
-      pSrc[2u * i0] = (r1 + t1) * onebyfftLen;
-
-      /* (xa + xb) - (xc + xd) */
-      r1 = r1 - t1;
-
-      /* yb + yd */
-      t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
-
-      /* ya' = ya + yb + yc + yd */
-      pSrc[(2u * i0) + 1u] = (s1 + t2) * onebyfftLen;
-
-      /* (ya + yc) - (yb + yd) */
-      s1 = s1 - t2;
-
-      /* (yb-yd) */
-      t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
-
-      /* (xb-xd) */
-      t2 = pSrc[2u * i1] - pSrc[2u * i3];
-
-      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-      pSrc[2u * i1] = r1 * onebyfftLen;
-
-      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-      pSrc[(2u * i1) + 1u] = s1 * onebyfftLen;
-
-      /* (xa - xc) - (yb-yd) */
-      r1 = r2 - t1;
-
-      /* (xa - xc) + (yb-yd) */
-      r2 = r2 + t1;
-
-      /* (ya - yc) + (xb-xd) */
-      s1 = s2 + t2;
-
-      /* (ya - yc) - (xb-xd) */
-      s2 = s2 - t2;
-
-      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-      pSrc[2u * i2] = r1 * onebyfftLen;
-
-      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-      pSrc[(2u * i2) + 1u] = s1 * onebyfftLen;
-
-      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-      pSrc[2u * i3] = r2 * onebyfftLen;
-
-      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-      pSrc[(2u * i3) + 1u] = s2 * onebyfftLen;
-   }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY_FAMILY */
-}
-
-/**    
-* @addtogroup ComplexFFT    
-* @{    
-*/
-
-/**    
-* @details    
-* @brief Processing function for the floating-point Radix-4 CFFT/CIFFT.   
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_f32 and will be removed
-* in the future.
-* @param[in]      *S    points to an instance of the floating-point Radix-4 CFFT/CIFFT structure.   
-* @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.   
-* @return none.   
-*/
-
-void arm_cfft_radix4_f32(
-const arm_cfft_radix4_instance_f32 * S,
-float32_t * pSrc)
-{
-
-   if(S->ifftFlag == 1u)
-   {
-      /*  Complex IFFT radix-4  */
-      arm_radix4_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
-      S->twidCoefModifier, S->onebyfftLen);
-   }
-   else
-   {
-      /*  Complex FFT radix-4  */
-      arm_radix4_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
-      S->twidCoefModifier);
-   }
-
-   if(S->bitReverseFlag == 1u)
-   {
-      /*  Bit Reversal */
-      arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-   }
-
-}
-
-/**    
-* @} end of ComplexFFT group    
-*/
-
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
deleted file mode 100755
index 1e1ad7ca..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
+++ /dev/null
@@ -1,165 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_init_f32.c    
-*    
-* Description:	Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup ComplexFFT    
- * @{    
- */
-
-/**    
-* @brief  Initialization function for the floating-point CFFT/CIFFT.   
-* @deprecated Do not use this function.  It has been superceded by \ref arm_cfft_f32 and will be removed
-* in the future.
-* @param[in,out] *S             points to an instance of the floating-point CFFT/CIFFT structure.   
-* @param[in]     fftLen         length of the FFT.   
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.   
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.   
-*    
-* \par Description:   
-* \par    
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated   
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.    
-* \par    
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.    
-* \par    
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.    
-*/
-
-arm_status arm_cfft_radix4_init_f32(
-  arm_cfft_radix4_instance_f32 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (float32_t *) twiddleCoef;
-
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLen)
-  {
-
-  case 4096u:
-    /*  Initializations of structure parameters for 4096 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.000244140625;
-    break;
-
-  case 1024u:
-    /*  Initializations of structure parameters for 1024 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 4u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 4u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.0009765625f;
-    break;
-
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-    S->onebyfftLen = 0.00390625f;
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-    S->onebyfftLen = 0.015625f;
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-    S->onebyfftLen = 0.0625f;
-    break;
-
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**    
- * @} end of ComplexFFT group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
deleted file mode 100755
index 7f29d675..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_init_q15.c    
-*    
-* Description:	Radix-4 Decimation in Frequency Q15 FFT & IFFT initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-
-/**    
- * @addtogroup ComplexFFT    
- * @{    
- */
-
-
-/**    
-* @brief Initialization function for the Q15 CFFT/CIFFT.   
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q15 and will be removed
-* @param[in,out] *S             points to an instance of the Q15 CFFT/CIFFT structure.   
-* @param[in]     fftLen         length of the FFT.   
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.   
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.   
-*    
-* \par Description:   
-* \par    
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated   
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.    
-* \par    
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.    
-* \par    
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.    
-*/
-
-arm_status arm_cfft_radix4_init_q15(
-  arm_cfft_radix4_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (q15_t *) twiddleCoef_4096_q15;
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLen)
-  {
-  case 4096u:
-    /*  Initializations of structure parameters for 4096 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-
-    break;
-
-  case 1024u:
-    /*  Initializations of structure parameters for 1024 point FFT */
-    S->twidCoefModifier = 4u;
-    S->bitRevFactor = 4u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-
-    break;
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-
-    break;
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**    
- * @} end of ComplexFFT group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
deleted file mode 100755
index a375a5f5..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5   
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_init_q31.c    
-*    
-* Description:	Radix-4 Decimation in Frequency Q31 FFT & IFFT initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup ComplexFFT    
- * @{    
- */
-
-/**    
-*    
-* @brief  Initialization function for the Q31 CFFT/CIFFT.   
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q31 and will be removed
-* @param[in,out] *S             points to an instance of the Q31 CFFT/CIFFT structure.   
-* @param[in]     fftLen         length of the FFT.   
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.   
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.   
-*    
-* \par Description:   
-* \par    
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated   
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.    
-* \par    
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.    
-* \par    
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.    
-*/
-
-arm_status arm_cfft_radix4_init_q31(
-  arm_cfft_radix4_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (q31_t *) twiddleCoef_4096_q31;
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of Instance structure depending on the FFT length */
-  switch (S->fftLen)
-  {
-    /*  Initializations of structure parameters for 4096 point FFT */
-  case 4096u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-    break;
-
-    /*  Initializations of structure parameters for 1024 point FFT */
-  case 1024u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 4u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 4u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-    break;
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-    break;
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**    
- * @} end of ComplexFFT group    
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c
deleted file mode 100755
index 761e43e1..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c
+++ /dev/null
@@ -1,1924 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_q15.c    
-*    
-* Description:	This file has function definition of Radix-4 FFT & IFFT function and    
-*				In-place bit reversal using bit reversal table    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-
-void arm_radix4_butterfly_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  q15_t * pCoef16,
-  uint32_t twidCoefModifier);
-
-void arm_radix4_butterfly_inverse_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  q15_t * pCoef16,
-  uint32_t twidCoefModifier);
-
-void arm_bitreversal_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTab);
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup ComplexFFT    
- * @{    
- */
-
-
-/**    
- * @details    
- * @brief Processing function for the Q15 CFFT/CIFFT.   
- * @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q15 and will be removed
- * @param[in]      *S    points to an instance of the Q15 CFFT/CIFFT structure.   
- * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.   
- * @return none.   
- *     
- * \par Input and output formats:    
- * \par    
- * Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.   
- * Hence the output format is different for different FFT sizes.    
- * The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:   
- * \par   
- * \image html CFFTQ15.gif "Input and Output Formats for Q15 CFFT"    
- * \image html CIFFTQ15.gif "Input and Output Formats for Q15 CIFFT"    
- */
-
-void arm_cfft_radix4_q15(
-  const arm_cfft_radix4_instance_q15 * S,
-  q15_t * pSrc)
-{
-  if(S->ifftFlag == 1u)
-  {
-    /*  Complex IFFT radix-4  */
-    arm_radix4_butterfly_inverse_q15(pSrc, S->fftLen, S->pTwiddle,
-                                     S->twidCoefModifier);
-  }
-  else
-  {
-    /*  Complex FFT radix-4  */
-    arm_radix4_butterfly_q15(pSrc, S->fftLen, S->pTwiddle,
-                             S->twidCoefModifier);
-  }
-
-  if(S->bitReverseFlag == 1u)
-  {
-    /*  Bit Reversal */
-    arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-  }
-
-}
-
-/**    
- * @} end of ComplexFFT group    
- */
-
-/*    
-* Radix-4 FFT algorithm used is :    
-*    
-* Input real and imaginary data:    
-* x(n) = xa + j * ya    
-* x(n+N/4 ) = xb + j * yb    
-* x(n+N/2 ) = xc + j * yc    
-* x(n+3N 4) = xd + j * yd    
-*    
-*    
-* Output real and imaginary data:    
-* x(4r) = xa'+ j * ya'    
-* x(4r+1) = xb'+ j * yb'    
-* x(4r+2) = xc'+ j * yc'    
-* x(4r+3) = xd'+ j * yd'    
-*    
-*    
-* Twiddle factors for radix-4 FFT:    
-* Wn = co1 + j * (- si1)    
-* W2n = co2 + j * (- si2)    
-* W3n = co3 + j * (- si3)    
-    
-* The real and imaginary output values for the radix-4 butterfly are    
-* xa' = xa + xb + xc + xd    
-* ya' = ya + yb + yc + yd    
-* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)    
-* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)    
-* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)    
-* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)    
-* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)    
-* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)    
-*    
-*/
-
-/**    
- * @brief  Core function for the Q15 CFFT butterfly process.   
- * @param[in, out] *pSrc16          points to the in-place buffer of Q15 data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef16         points to twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.   
- */
-
-void arm_radix4_butterfly_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  q15_t * pCoef16,
-  uint32_t twidCoefModifier)
-{
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t R, S, T, U;
-  q31_t C1, C2, C3, out1, out2;
-  uint32_t n1, n2, ic, i0, j, k;
-
-  q15_t *ptr1;
-  q15_t *pSi0;
-  q15_t *pSi1;
-  q15_t *pSi2;
-  q15_t *pSi3;
-
-  q31_t xaya, xbyb, xcyc, xdyd;
-
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-
-  /* Index for twiddle coefficient */
-  ic = 0u;
-
-  /* Index for input read and output write */
-  j = n2;
-  
-  pSi0 = pSrc16;
-  pSi1 = pSi0 + 2 * n2;
-  pSi2 = pSi1 + 2 * n2;
-  pSi3 = pSi2 + 2 * n2;
-
-  /* Input is in 1.15(q15) format */
-
-  /*  start of first stage process */
-  do
-  {
-    /*  Butterfly implementation */
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-    /* Read ya (real), xa(imag) input */
-    T = _SIMD32_OFFSET(pSi0);
-    T = __SHADD16(T, 0); // this is just a SIMD arithmetic shift right by 1
-    T = __SHADD16(T, 0); // it turns out doing this twice is 2 cycles, the alternative takes 3 cycles
-    //in = ((int16_t) (T & 0xFFFF)) >> 2;       // alternative code that takes 3 cycles
-    //T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-
-    /* Read yc (real), xc(imag) input */
-    S = _SIMD32_OFFSET(pSi2);
-    S = __SHADD16(S, 0);
-    S = __SHADD16(S, 0);
-
-    /* R = packed((ya + yc), (xa + xc) ) */
-    R = __QADD16(T, S);
-
-    /* S = packed((ya - yc), (xa - xc) ) */
-    S = __QSUB16(T, S);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* Read yb (real), xb(imag) input */
-    T = _SIMD32_OFFSET(pSi1);
-    T = __SHADD16(T, 0);
-    T = __SHADD16(T, 0);
-
-    /* Read yd (real), xd(imag) input */
-    U = _SIMD32_OFFSET(pSi3);
-    U = __SHADD16(U, 0);
-    U = __SHADD16(U, 0);
-
-    /* T = packed((yb + yd), (xb + xd) ) */
-    T = __QADD16(T, U);
-
-    /*  writing the butterfly processed i0 sample */
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    _SIMD32_OFFSET(pSi0) = __SHADD16(R, T);
-    pSi0 += 2;
-
-    /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
-    R = __QSUB16(R, T);
-
-    /* co2 & si2 are read from SIMD Coefficient pointer */
-    C2 = _SIMD32_OFFSET(pCoef16 + (4u * ic));
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out1 = __SMUAD(C2, R) >> 16u;
-    /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out2 = __SMUSDX(C2, R);
-
-#else
-
-    /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out1 = __SMUSDX(R, C2) >> 16u;
-    /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out2 = __SMUAD(C2, R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /*  Reading i0+fftLen/4 */
-    /* T = packed(yb, xb) */
-    T = _SIMD32_OFFSET(pSi1);
-    T = __SHADD16(T, 0);
-    T = __SHADD16(T, 0);
-
-    /* writing the butterfly processed i0 + fftLen/4 sample */
-    /* writing output(xc', yc') in little endian format */
-    _SIMD32_OFFSET(pSi1) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-    pSi1 += 2;
-
-    /*  Butterfly calculations */
-    /* U = packed(yd, xd) */
-    U = _SIMD32_OFFSET(pSi3);
-    U = __SHADD16(U, 0);
-    U = __SHADD16(U, 0);
-
-    /* T = packed(yb-yd, xb-xd) */
-    T = __QSUB16(T, U);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-    R = __QASX(S, T);
-    /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-    S = __QSAX(S, T);
-
-#else
-
-    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-    R = __QSAX(S, T);
-    /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-    S = __QASX(S, T);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /* co1 & si1 are read from SIMD Coefficient pointer */
-    C1 = _SIMD32_OFFSET(pCoef16 + (2u * ic));
-    /*  Butterfly process for the i0+fftLen/2 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out1 = __SMUAD(C1, S) >> 16u;
-    /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out2 = __SMUSDX(C1, S);
-
-#else
-
-    /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out1 = __SMUSDX(S, C1) >> 16u;
-    /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out2 = __SMUAD(C1, S);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /* writing output(xb', yb') in little endian format */
-    _SIMD32_OFFSET(pSi2) =
-      ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF);
-    pSi2 += 2;
-
-
-    /* co3 & si3 are read from SIMD Coefficient pointer */
-    C3 = _SIMD32_OFFSET(pCoef16 + (6u * ic));
-    /*  Butterfly process for the i0+3fftLen/4 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-    out1 = __SMUAD(C3, R) >> 16u;
-    /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-    out2 = __SMUSDX(C3, R);
-
-#else
-
-    /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-    out1 = __SMUSDX(R, C3) >> 16u;
-    /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-    out2 = __SMUAD(C3, R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /* writing output(xd', yd') in little endian format */
-    _SIMD32_OFFSET(pSi3) =
-      ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-    pSi3 += 2;
-
-    /*  Twiddle coefficients index modifier */
-    ic = ic + twidCoefModifier;
-
-  } while(--j);
-  /* data is in 4.11(q11) format */
-
-  /* end of first stage process */
-
-
-  /* start of middle stage process */
-
-  /*  Twiddle coefficients index modifier */
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of Middle stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the middle stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ic = 0u;
-
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      C1 = _SIMD32_OFFSET(pCoef16 + (2u * ic));
-      C2 = _SIMD32_OFFSET(pCoef16 + (4u * ic));
-      C3 = _SIMD32_OFFSET(pCoef16 + (6u * ic));
-
-      /*  Twiddle coefficients index modifier */
-      ic = ic + twidCoefModifier;
-      
-      pSi0 = pSrc16 + 2 * j;
-      pSi1 = pSi0 + 2 * n2;
-      pSi2 = pSi1 + 2 * n2;
-      pSi3 = pSi2 + 2 * n2;
-
-      /*  Butterfly implementation */
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  Reading i0, i0+fftLen/2 inputs */
-        /* Read ya (real), xa(imag) input */
-        T = _SIMD32_OFFSET(pSi0);
-
-        /* Read yc (real), xc(imag) input */
-        S = _SIMD32_OFFSET(pSi2);
-
-        /* R = packed( (ya + yc), (xa + xc)) */
-        R = __QADD16(T, S);
-
-        /* S = packed((ya - yc), (xa - xc)) */
-        S = __QSUB16(T, S);
-
-        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-        /* Read yb (real), xb(imag) input */
-        T = _SIMD32_OFFSET(pSi1);
-
-        /* Read yd (real), xd(imag) input */
-        U = _SIMD32_OFFSET(pSi3);
-
-        /* T = packed( (yb + yd), (xb + xd)) */
-        T = __QADD16(T, U);
-
-        /*  writing the butterfly processed i0 sample */
-
-        /* xa' = xa + xb + xc + xd */
-        /* ya' = ya + yb + yc + yd */
-        out1 = __SHADD16(R, T);
-        out1 = __SHADD16(out1, 0);
-        _SIMD32_OFFSET(pSi0) = out1;
-        pSi0 += 2 * n1;
-
-        /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
-        R = __SHSUB16(R, T);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out1 = __SMUAD(C2, R) >> 16u;
-
-        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out2 = __SMUSDX(C2, R);
-
-#else
-
-        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out1 = __SMUSDX(R, C2) >> 16u;
-
-        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out2 = __SMUAD(C2, R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /*  Reading i0+3fftLen/4 */
-        /* Read yb (real), xb(imag) input */
-        T = _SIMD32_OFFSET(pSi1);
-
-        /*  writing the butterfly processed i0 + fftLen/4 sample */
-        /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-        /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        _SIMD32_OFFSET(pSi1) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-        pSi1 += 2 * n1;
-
-        /*  Butterfly calculations */
-
-        /* Read yd (real), xd(imag) input */
-        U = _SIMD32_OFFSET(pSi3);
-
-        /* T = packed(yb-yd, xb-xd) */
-        T = __QSUB16(T, U);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-        R = __SHASX(S, T);
-
-        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-        S = __SHSAX(S, T);
-
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = __SMUAD(C1, S) >> 16u;
-        out2 = __SMUSDX(C1, S);
-
-#else
-
-        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-        R = __SHSAX(S, T);
-
-        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-        S = __SHASX(S, T);
-
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = __SMUSDX(S, C1) >> 16u;
-        out2 = __SMUAD(C1, S);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-        /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-        _SIMD32_OFFSET(pSi2) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-        pSi2 += 2 * n1;
-
-        /*  Butterfly process for the i0+3fftLen/4 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUAD(C3, R) >> 16u;
-        out2 = __SMUSDX(C3, R);
-
-#else
-
-        out1 = __SMUSDX(R, C3) >> 16u;
-        out2 = __SMUAD(C3, R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-        /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-        _SIMD32_OFFSET(pSi3) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-        pSi3 += 2 * n1;
-      }
-    }
-    /*  Twiddle coefficients index modifier */
-    twidCoefModifier <<= 2u;
-  }
-  /* end of middle stage process */
-
-
-  /* data is in 10.6(q6) format for the 1024 point */
-  /* data is in 8.8(q8) format for the 256 point */
-  /* data is in 6.10(q10) format for the 64 point */
-  /* data is in 4.12(q12) format for the 16 point */
-
-  /*  Initializations for the last stage */
-  j = fftLen >> 2;
-
-  ptr1 = &pSrc16[0];
-
-  /* start of last stage process */
-
-  /*  Butterfly implementation */
-  do
-  {
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD32(ptr1)++;
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD32(ptr1)++;
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD32(ptr1)++;
-
-    /* Read xd (real), yd(imag) input */
-    xdyd = *__SIMD32(ptr1)++;
-
-    /* R = packed((ya + yc), (xa + xc)) */
-    R = __QADD16(xaya, xcyc);
-
-    /* T = packed((yb + yd), (xb + xd)) */
-    T = __QADD16(xbyb, xdyd);
-
-    /* pointer updation for writing */
-    ptr1 = ptr1 - 8u;
-
-
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    *__SIMD32(ptr1)++ = __SHADD16(R, T);
-
-    /* T = packed((yb + yd), (xb + xd)) */
-    T = __QADD16(xbyb, xdyd);
-
-    /* xc' = (xa-xb+xc-xd) */
-    /* yc' = (ya-yb+yc-yd) */
-    *__SIMD32(ptr1)++ = __SHSUB16(R, T);
-
-    /* S = packed((ya - yc), (xa - xc)) */
-    S = __QSUB16(xaya, xcyc);
-
-    /* Read yd (real), xd(imag) input */
-    /* T = packed( (yb - yd), (xb - xd))  */
-    U = __QSUB16(xbyb, xdyd);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* xb' = (xa+yb-xc-yd) */
-    /* yb' = (ya-xb-yc+xd) */
-    *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
-
-    /* xd' = (xa-yb-xc+yd) */
-    /* yd' = (ya+xb-yc-xd) */
-    *__SIMD32(ptr1)++ = __SHASX(S, U);
-
-#else
-
-    /* xb' = (xa+yb-xc-yd) */
-    /* yb' = (ya-xb-yc+xd) */
-    *__SIMD32(ptr1)++ = __SHASX(S, U);
-
-
-    /* xd' = (xa-yb-xc+yd) */
-    /* yd' = (ya+xb-yc-xd) */
-    *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-  } while(--j);
-
-  /* end of last stage process */
-
-  /* output is in 11.5(q5) format for the 1024 point */
-  /* output is in 9.7(q7) format for the 256 point   */
-  /* output is in 7.9(q9) format for the 64 point  */
-  /* output is in 5.11(q11) format for the 16 point  */
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t R0, R1, S0, S1, T0, T1, U0, U1;
-  q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
-  uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
-
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-
-  /* Index for twiddle coefficient */
-  ic = 0u;
-
-  /* Index for input read and output write */
-  i0 = 0u;
-  j = n2;
-
-  /* Input is in 1.15(q15) format */
-
-  /*  start of first stage process */
-  do
-  {
-    /*  Butterfly implementation */
-
-    /*  index calculation for the input as, */
-    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-
-    /* input is down scale by 4 to avoid overflow */
-    /* Read ya (real), xa(imag) input */
-    T0 = pSrc16[i0 * 2u] >> 2u;
-    T1 = pSrc16[(i0 * 2u) + 1u] >> 2u;
-
-    /* input is down scale by 4 to avoid overflow */
-    /* Read yc (real), xc(imag) input */
-    S0 = pSrc16[i2 * 2u] >> 2u;
-    S1 = pSrc16[(i2 * 2u) + 1u] >> 2u;
-
-    /* R0 = (ya + yc) */
-    R0 = __SSAT(T0 + S0, 16u);
-    /* R1 = (xa + xc) */
-    R1 = __SSAT(T1 + S1, 16u);
-
-    /* S0 = (ya - yc) */
-    S0 = __SSAT(T0 - S0, 16);
-    /* S1 = (xa - xc) */
-    S1 = __SSAT(T1 - S1, 16);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* input is down scale by 4 to avoid overflow */
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u] >> 2u;
-    T1 = pSrc16[(i1 * 2u) + 1u] >> 2u;
-
-    /* input is down scale by 4 to avoid overflow */
-    /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2u] >> 2u;
-    U1 = pSrc16[(i3 * 2u) + 1] >> 2u;
-
-    /* T0 = (yb + yd) */
-    T0 = __SSAT(T0 + U0, 16u);
-    /* T1 = (xb + xd) */
-    T1 = __SSAT(T1 + U1, 16u);
-
-    /*  writing the butterfly processed i0 sample */
-    /* ya' = ya + yb + yc + yd */
-    /* xa' = xa + xb + xc + xd */
-    pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
-    pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
-
-    /* R0 = (ya + yc) - (yb + yd) */
-    /* R1 = (xa + xc) - (xb + xd) */
-    R0 = __SSAT(R0 - T0, 16u);
-    R1 = __SSAT(R1 - T1, 16u);
-
-    /* co2 & si2 are read from Coefficient pointer */
-    Co2 = pCoef16[2u * ic * 2u];
-    Si2 = pCoef16[(2u * ic * 2u) + 1];
-
-    /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out1 = (q15_t) ((Co2 * R0 + Si2 * R1) >> 16u);
-    /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out2 = (q15_t) ((-Si2 * R0 + Co2 * R1) >> 16u);
-
-    /*  Reading i0+fftLen/4 */
-    /* input is down scale by 4 to avoid overflow */
-    /* T0 = yb, T1 =  xb */
-    T0 = pSrc16[i1 * 2u] >> 2;
-    T1 = pSrc16[(i1 * 2u) + 1] >> 2;
-
-    /* writing the butterfly processed i0 + fftLen/4 sample */
-    /* writing output(xc', yc') in little endian format */
-    pSrc16[i1 * 2u] = out1;
-    pSrc16[(i1 * 2u) + 1] = out2;
-
-    /*  Butterfly calculations */
-    /* input is down scale by 4 to avoid overflow */
-    /* U0 = yd, U1 = xd */
-    U0 = pSrc16[i3 * 2u] >> 2;
-    U1 = pSrc16[(i3 * 2u) + 1] >> 2;
-    /* T0 = yb-yd */
-    T0 = __SSAT(T0 - U0, 16);
-    /* T1 = xb-xd */
-    T1 = __SSAT(T1 - U1, 16);
-
-    /* R1 = (ya-yc) + (xb- xd),  R0 = (xa-xc) - (yb-yd)) */
-    R0 = (q15_t) __SSAT((q31_t) (S0 - T1), 16);
-    R1 = (q15_t) __SSAT((q31_t) (S1 + T0), 16);
-
-    /* S1 = (ya-yc) - (xb- xd), S0 = (xa-xc) + (yb-yd)) */
-    S0 = (q15_t) __SSAT(((q31_t) S0 + T1), 16u);
-    S1 = (q15_t) __SSAT(((q31_t) S1 - T0), 16u);
-
-    /* co1 & si1 are read from Coefficient pointer */
-    Co1 = pCoef16[ic * 2u];
-    Si1 = pCoef16[(ic * 2u) + 1];
-    /*  Butterfly process for the i0+fftLen/2 sample */
-    /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out1 = (q15_t) ((Si1 * S1 + Co1 * S0) >> 16);
-    /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out2 = (q15_t) ((-Si1 * S0 + Co1 * S1) >> 16);
-
-    /* writing output(xb', yb') in little endian format */
-    pSrc16[i2 * 2u] = out1;
-    pSrc16[(i2 * 2u) + 1] = out2;
-
-    /* Co3 & si3 are read from Coefficient pointer */
-    Co3 = pCoef16[3u * (ic * 2u)];
-    Si3 = pCoef16[(3u * (ic * 2u)) + 1];
-    /*  Butterfly process for the i0+3fftLen/4 sample */
-    /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */
-    out1 = (q15_t) ((Si3 * R1 + Co3 * R0) >> 16u);
-    /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */
-    out2 = (q15_t) ((-Si3 * R0 + Co3 * R1) >> 16u);
-    /* writing output(xd', yd') in little endian format */
-    pSrc16[i3 * 2u] = out1;
-    pSrc16[(i3 * 2u) + 1] = out2;
-
-    /*  Twiddle coefficients index modifier */
-    ic = ic + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1u;
-
-  } while(--j);
-  /* data is in 4.11(q11) format */
-
-  /* end of first stage process */
-
-
-  /* start of middle stage process */
-
-  /*  Twiddle coefficients index modifier */
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of Middle stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the middle stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ic = 0u;
-
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      Co1 = pCoef16[ic * 2u];
-      Si1 = pCoef16[(ic * 2u) + 1u];
-      Co2 = pCoef16[2u * (ic * 2u)];
-      Si2 = pCoef16[(2u * (ic * 2u)) + 1u];
-      Co3 = pCoef16[3u * (ic * 2u)];
-      Si3 = pCoef16[(3u * (ic * 2u)) + 1u];
-
-      /*  Twiddle coefficients index modifier */
-      ic = ic + twidCoefModifier;
-
-      /*  Butterfly implementation */
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /*  Reading i0, i0+fftLen/2 inputs */
-        /* Read ya (real), xa(imag) input */
-        T0 = pSrc16[i0 * 2u];
-        T1 = pSrc16[(i0 * 2u) + 1u];
-
-        /* Read yc (real), xc(imag) input */
-        S0 = pSrc16[i2 * 2u];
-        S1 = pSrc16[(i2 * 2u) + 1u];
-
-        /* R0 = (ya + yc), R1 = (xa + xc) */
-        R0 = __SSAT(T0 + S0, 16);
-        R1 = __SSAT(T1 + S1, 16);
-
-        /* S0 = (ya - yc), S1 =(xa - xc) */
-        S0 = __SSAT(T0 - S0, 16);
-        S1 = __SSAT(T1 - S1, 16);
-
-        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-        /* Read yb (real), xb(imag) input */
-        T0 = pSrc16[i1 * 2u];
-        T1 = pSrc16[(i1 * 2u) + 1u];
-
-        /* Read yd (real), xd(imag) input */
-        U0 = pSrc16[i3 * 2u];
-        U1 = pSrc16[(i3 * 2u) + 1u];
-
-
-        /* T0 = (yb + yd), T1 = (xb + xd) */
-        T0 = __SSAT(T0 + U0, 16);
-        T1 = __SSAT(T1 + U1, 16);
-
-        /*  writing the butterfly processed i0 sample */
-
-        /* xa' = xa + xb + xc + xd */
-        /* ya' = ya + yb + yc + yd */
-        out1 = ((R0 >> 1u) + (T0 >> 1u)) >> 1u;
-        out2 = ((R1 >> 1u) + (T1 >> 1u)) >> 1u;
-
-        pSrc16[i0 * 2u] = out1;
-        pSrc16[(2u * i0) + 1u] = out2;
-
-        /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
-        R0 = (R0 >> 1u) - (T0 >> 1u);
-        R1 = (R1 >> 1u) - (T1 >> 1u);
-
-        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out1 = (q15_t) ((Co2 * R0 + Si2 * R1) >> 16u);
-
-        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out2 = (q15_t) ((-Si2 * R0 + Co2 * R1) >> 16u);
-
-        /*  Reading i0+3fftLen/4 */
-        /* Read yb (real), xb(imag) input */
-        T0 = pSrc16[i1 * 2u];
-        T1 = pSrc16[(i1 * 2u) + 1u];
-
-        /*  writing the butterfly processed i0 + fftLen/4 sample */
-        /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-        /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        pSrc16[i1 * 2u] = out1;
-        pSrc16[(i1 * 2u) + 1u] = out2;
-
-        /*  Butterfly calculations */
-
-        /* Read yd (real), xd(imag) input */
-        U0 = pSrc16[i3 * 2u];
-        U1 = pSrc16[(i3 * 2u) + 1u];
-
-        /* T0 = yb-yd, T1 = xb-xd */
-        T0 = __SSAT(T0 - U0, 16);
-        T1 = __SSAT(T1 - U1, 16);
-
-        /* R0 = (ya-yc) + (xb- xd), R1 = (xa-xc) - (yb-yd)) */
-        R0 = (S0 >> 1u) - (T1 >> 1u);
-        R1 = (S1 >> 1u) + (T0 >> 1u);
-
-        /* S0 = (ya-yc) - (xb- xd), S1 = (xa-xc) + (yb-yd)) */
-        S0 = (S0 >> 1u) + (T1 >> 1u);
-        S1 = (S1 >> 1u) - (T0 >> 1u);
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = (q15_t) ((Co1 * S0 + Si1 * S1) >> 16u);
-
-        out2 = (q15_t) ((-Si1 * S0 + Co1 * S1) >> 16u);
-
-        /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-        /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-        pSrc16[i2 * 2u] = out1;
-        pSrc16[(i2 * 2u) + 1u] = out2;
-
-        /*  Butterfly process for the i0+3fftLen/4 sample */
-        out1 = (q15_t) ((Si3 * R1 + Co3 * R0) >> 16u);
-
-        out2 = (q15_t) ((-Si3 * R0 + Co3 * R1) >> 16u);
-        /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */
-        /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */
-        pSrc16[i3 * 2u] = out1;
-        pSrc16[(i3 * 2u) + 1u] = out2;
-      }
-    }
-    /*  Twiddle coefficients index modifier */
-    twidCoefModifier <<= 2u;
-  }
-  /* end of middle stage process */
-
-
-  /* data is in 10.6(q6) format for the 1024 point */
-  /* data is in 8.8(q8) format for the 256 point */
-  /* data is in 6.10(q10) format for the 64 point */
-  /* data is in 4.12(q12) format for the 16 point */
-
-  /*  Initializations for the last stage */
-  n1 = n2;
-  n2 >>= 2u;
-
-  /* start of last stage process */
-
-  /*  Butterfly implementation */
-  for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
-  {
-    /*  index calculation for the input as, */
-    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-    /* Read ya (real), xa(imag) input */
-    T0 = pSrc16[i0 * 2u];
-    T1 = pSrc16[(i0 * 2u) + 1u];
-
-    /* Read yc (real), xc(imag) input */
-    S0 = pSrc16[i2 * 2u];
-    S1 = pSrc16[(i2 * 2u) + 1u];
-
-    /* R0 = (ya + yc), R1 = (xa + xc) */
-    R0 = __SSAT(T0 + S0, 16u);
-    R1 = __SSAT(T1 + S1, 16u);
-
-    /* S0 = (ya - yc), S1 = (xa - xc) */
-    S0 = __SSAT(T0 - S0, 16u);
-    S1 = __SSAT(T1 - S1, 16u);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u];
-    T1 = pSrc16[(i1 * 2u) + 1u];
-    /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2u];
-    U1 = pSrc16[(i3 * 2u) + 1u];
-
-    /* T0 = (yb + yd), T1 = (xb + xd)) */
-    T0 = __SSAT(T0 + U0, 16u);
-    T1 = __SSAT(T1 + U1, 16u);
-
-    /*  writing the butterfly processed i0 sample */
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
-    pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
-
-    /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
-    R0 = (R0 >> 1u) - (T0 >> 1u);
-    R1 = (R1 >> 1u) - (T1 >> 1u);
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u];
-    T1 = pSrc16[(i1 * 2u) + 1u];
-
-    /*  writing the butterfly processed i0 + fftLen/4 sample */
-    /* xc' = (xa-xb+xc-xd) */
-    /* yc' = (ya-yb+yc-yd) */
-    pSrc16[i1 * 2u] = R0;
-    pSrc16[(i1 * 2u) + 1u] = R1;
-
-    /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2u];
-    U1 = pSrc16[(i3 * 2u) + 1u];
-    /* T0 = (yb - yd), T1 = (xb - xd)  */
-    T0 = __SSAT(T0 - U0, 16u);
-    T1 = __SSAT(T1 - U1, 16u);
-
-    /*  writing the butterfly processed i0 + fftLen/2 sample */
-    /* xb' = (xa+yb-xc-yd) */
-    /* yb' = (ya-xb-yc+xd) */
-    pSrc16[i2 * 2u] = (S0 >> 1u) + (T1 >> 1u);
-    pSrc16[(i2 * 2u) + 1u] = (S1 >> 1u) - (T0 >> 1u);
-
-    /*  writing the butterfly processed i0 + 3fftLen/4 sample */
-    /* xd' = (xa-yb-xc+yd) */
-    /* yd' = (ya+xb-yc-xd) */
-    pSrc16[i3 * 2u] = (S0 >> 1u) - (T1 >> 1u);
-    pSrc16[(i3 * 2u) + 1u] = (S1 >> 1u) + (T0 >> 1u);
-
-  }
-
-  /* end of last stage process */
-
-  /* output is in 11.5(q5) format for the 1024 point */
-  /* output is in 9.7(q7) format for the 256 point   */
-  /* output is in 7.9(q9) format for the 64 point  */
-  /* output is in 5.11(q11) format for the 16 point  */
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-
-/**    
- * @brief  Core function for the Q15 CIFFT butterfly process.   
- * @param[in, out] *pSrc16          points to the in-place buffer of Q15 data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef16         points to twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.   
- */
-
-/*    
-* Radix-4 IFFT algorithm used is :    
-*    
-* CIFFT uses same twiddle coefficients as CFFT function    
-*  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]    
-*    
-*    
-* IFFT is implemented with following changes in equations from FFT    
-*    
-* Input real and imaginary data:    
-* x(n) = xa + j * ya    
-* x(n+N/4 ) = xb + j * yb    
-* x(n+N/2 ) = xc + j * yc    
-* x(n+3N 4) = xd + j * yd    
-*    
-*    
-* Output real and imaginary data:    
-* x(4r) = xa'+ j * ya'    
-* x(4r+1) = xb'+ j * yb'    
-* x(4r+2) = xc'+ j * yc'    
-* x(4r+3) = xd'+ j * yd'    
-*    
-*    
-* Twiddle factors for radix-4 IFFT:    
-* Wn = co1 + j * (si1)    
-* W2n = co2 + j * (si2)    
-* W3n = co3 + j * (si3)    
-    
-* The real and imaginary output values for the radix-4 butterfly are    
-* xa' = xa + xb + xc + xd    
-* ya' = ya + yb + yc + yd    
-* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)    
-* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)    
-* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)    
-* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)    
-* xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)    
-* yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)    
-*    
-*/
-
-void arm_radix4_butterfly_inverse_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  q15_t * pCoef16,
-  uint32_t twidCoefModifier)
-{
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t R, S, T, U;
-  q31_t C1, C2, C3, out1, out2;
-  uint32_t n1, n2, ic, i0, j, k;
-
-  q15_t *ptr1;
-  q15_t *pSi0;
-  q15_t *pSi1;
-  q15_t *pSi2;
-  q15_t *pSi3;
-
-  q31_t xaya, xbyb, xcyc, xdyd;
-
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-
-  /* Index for twiddle coefficient */
-  ic = 0u;
-
-  /* Index for input read and output write */
-  j = n2;
-  
-  pSi0 = pSrc16;
-  pSi1 = pSi0 + 2 * n2;
-  pSi2 = pSi1 + 2 * n2;
-  pSi3 = pSi2 + 2 * n2;
-
-  /* Input is in 1.15(q15) format */
-
-  /*  start of first stage process */
-  do
-  {
-    /*  Butterfly implementation */
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-    /* Read ya (real), xa(imag) input */
-    T = _SIMD32_OFFSET(pSi0);
-    T = __SHADD16(T, 0);
-    T = __SHADD16(T, 0);
-
-    /* Read yc (real), xc(imag) input */
-    S = _SIMD32_OFFSET(pSi2);
-    S = __SHADD16(S, 0);
-    S = __SHADD16(S, 0);
-
-    /* R = packed((ya + yc), (xa + xc) ) */
-    R = __QADD16(T, S);
-
-    /* S = packed((ya - yc), (xa - xc) ) */
-    S = __QSUB16(T, S);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* Read yb (real), xb(imag) input */
-    T = _SIMD32_OFFSET(pSi1);
-    T = __SHADD16(T, 0);
-    T = __SHADD16(T, 0);
-
-    /* Read yd (real), xd(imag) input */
-    U = _SIMD32_OFFSET(pSi3);
-    U = __SHADD16(U, 0);
-    U = __SHADD16(U, 0);
-
-    /* T = packed((yb + yd), (xb + xd) ) */
-    T = __QADD16(T, U);
-
-    /*  writing the butterfly processed i0 sample */
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    _SIMD32_OFFSET(pSi0) = __SHADD16(R, T);
-    pSi0 += 2;
-
-    /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
-    R = __QSUB16(R, T);
-
-    /* co2 & si2 are read from SIMD Coefficient pointer */
-    C2 = _SIMD32_OFFSET(pCoef16 + (4u * ic));
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out1 = __SMUSD(C2, R) >> 16u;
-    /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out2 = __SMUADX(C2, R);
-
-#else
-
-    /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out1 = __SMUADX(C2, R) >> 16u;
-    /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out2 = __SMUSD(__QSUB16(0, C2), R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /*  Reading i0+fftLen/4 */
-    /* T = packed(yb, xb) */
-    T = _SIMD32_OFFSET(pSi1);
-    T = __SHADD16(T, 0);
-    T = __SHADD16(T, 0);
-
-    /* writing the butterfly processed i0 + fftLen/4 sample */
-    /* writing output(xc', yc') in little endian format */
-    _SIMD32_OFFSET(pSi1) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-    pSi1 += 2;
-
-    /*  Butterfly calculations */
-    /* U = packed(yd, xd) */
-    U = _SIMD32_OFFSET(pSi3);
-    U = __SHADD16(U, 0);
-    U = __SHADD16(U, 0);
-
-    /* T = packed(yb-yd, xb-xd) */
-    T = __QSUB16(T, U);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-    R = __QSAX(S, T);
-    /* S = packed((ya-yc) + (xb- xd),  (xa-xc) - (yb-yd)) */
-    S = __QASX(S, T);
-
-#else
-
-    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-    R = __QASX(S, T);
-    /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-    S = __QSAX(S, T);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /* co1 & si1 are read from SIMD Coefficient pointer */
-    C1 = _SIMD32_OFFSET(pCoef16 + (2u * ic));
-    /*  Butterfly process for the i0+fftLen/2 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out1 = __SMUSD(C1, S) >> 16u;
-    /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out2 = __SMUADX(C1, S);
-
-#else
-
-    /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out1 = __SMUADX(C1, S) >> 16u;
-    /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out2 = __SMUSD(__QSUB16(0, C1), S);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /* writing output(xb', yb') in little endian format */
-    _SIMD32_OFFSET(pSi2) =
-      ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF);
-    pSi2 += 2;
-
-
-    /* co3 & si3 are read from SIMD Coefficient pointer */
-    C3 = _SIMD32_OFFSET(pCoef16 + (6u * ic));
-    /*  Butterfly process for the i0+3fftLen/4 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-    out1 = __SMUSD(C3, R) >> 16u;
-    /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-    out2 = __SMUADX(C3, R);
-
-#else
-
-    /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-    out1 = __SMUADX(C3, R) >> 16u;
-    /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-    out2 = __SMUSD(__QSUB16(0, C3), R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-    /* writing output(xd', yd') in little endian format */
-    _SIMD32_OFFSET(pSi3) =
-      ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-    pSi3 += 2;
-
-    /*  Twiddle coefficients index modifier */
-    ic = ic + twidCoefModifier;
-
-  } while(--j);
-  /* data is in 4.11(q11) format */
-
-  /* end of first stage process */
-
-
-  /* start of middle stage process */
-
-  /*  Twiddle coefficients index modifier */
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of Middle stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the middle stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ic = 0u;
-
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      C1 = _SIMD32_OFFSET(pCoef16 + (2u * ic));
-      C2 = _SIMD32_OFFSET(pCoef16 + (4u * ic));
-      C3 = _SIMD32_OFFSET(pCoef16 + (6u * ic));
-
-      /*  Twiddle coefficients index modifier */
-      ic = ic + twidCoefModifier;
-      
-      pSi0 = pSrc16 + 2 * j;
-      pSi1 = pSi0 + 2 * n2;
-      pSi2 = pSi1 + 2 * n2;
-      pSi3 = pSi2 + 2 * n2;
-
-      /*  Butterfly implementation */
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  Reading i0, i0+fftLen/2 inputs */
-        /* Read ya (real), xa(imag) input */
-        T = _SIMD32_OFFSET(pSi0);
-
-        /* Read yc (real), xc(imag) input */
-        S = _SIMD32_OFFSET(pSi2);
-
-        /* R = packed( (ya + yc), (xa + xc)) */
-        R = __QADD16(T, S);
-
-        /* S = packed((ya - yc), (xa - xc)) */
-        S = __QSUB16(T, S);
-
-        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-        /* Read yb (real), xb(imag) input */
-        T = _SIMD32_OFFSET(pSi1);
-
-        /* Read yd (real), xd(imag) input */
-        U = _SIMD32_OFFSET(pSi3);
-
-        /* T = packed( (yb + yd), (xb + xd)) */
-        T = __QADD16(T, U);
-
-        /*  writing the butterfly processed i0 sample */
-
-        /* xa' = xa + xb + xc + xd */
-        /* ya' = ya + yb + yc + yd */
-        out1 = __SHADD16(R, T);
-        out1 = __SHADD16(out1, 0);
-        _SIMD32_OFFSET(pSi0) = out1;
-        pSi0 += 2 * n1;
-
-        /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
-        R = __SHSUB16(R, T);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out1 = __SMUSD(C2, R) >> 16u;
-
-        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out2 = __SMUADX(C2, R);
-
-#else
-
-        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out1 = __SMUADX(R, C2) >> 16u;
-
-        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out2 = __SMUSD(__QSUB16(0, C2), R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /*  Reading i0+3fftLen/4 */
-        /* Read yb (real), xb(imag) input */
-        T = _SIMD32_OFFSET(pSi1);
-
-        /*  writing the butterfly processed i0 + fftLen/4 sample */
-        /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-        /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        _SIMD32_OFFSET(pSi1) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-        pSi1 += 2 * n1;
-
-        /*  Butterfly calculations */
-
-        /* Read yd (real), xd(imag) input */
-        U = _SIMD32_OFFSET(pSi3);
-
-        /* T = packed(yb-yd, xb-xd) */
-        T = __QSUB16(T, U);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-        R = __SHSAX(S, T);
-
-        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-        S = __SHASX(S, T);
-
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = __SMUSD(C1, S) >> 16u;
-        out2 = __SMUADX(C1, S);
-
-#else
-
-        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-        R = __SHASX(S, T);
-
-        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-        S = __SHSAX(S, T);
-
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = __SMUADX(S, C1) >> 16u;
-        out2 = __SMUSD(__QSUB16(0, C1), S);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-        /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-        _SIMD32_OFFSET(pSi2) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-        pSi2 += 2 * n1;
-
-        /*  Butterfly process for the i0+3fftLen/4 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUSD(C3, R) >> 16u;
-        out2 = __SMUADX(C3, R);
-
-#else
-
-        out1 = __SMUADX(C3, R) >> 16u;
-        out2 = __SMUSD(__QSUB16(0, C3), R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-        /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-        _SIMD32_OFFSET(pSi3) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-        pSi3 += 2 * n1;
-      }
-    }
-    /*  Twiddle coefficients index modifier */
-    twidCoefModifier <<= 2u;
-  }
-  /* end of middle stage process */
-
-  /* data is in 10.6(q6) format for the 1024 point */
-  /* data is in 8.8(q8) format for the 256 point */
-  /* data is in 6.10(q10) format for the 64 point */
-  /* data is in 4.12(q12) format for the 16 point */
-
-  /*  Initializations for the last stage */
-  j = fftLen >> 2;
-
-  ptr1 = &pSrc16[0];
-
-  /* start of last stage process */
-
-  /*  Butterfly implementation */
-  do
-  {
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD32(ptr1)++;
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD32(ptr1)++;
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD32(ptr1)++;
-
-    /* Read xd (real), yd(imag) input */
-    xdyd = *__SIMD32(ptr1)++;
-
-    /* R = packed((ya + yc), (xa + xc)) */
-    R = __QADD16(xaya, xcyc);
-
-    /* T = packed((yb + yd), (xb + xd)) */
-    T = __QADD16(xbyb, xdyd);
-
-    /* pointer updation for writing */
-    ptr1 = ptr1 - 8u;
-
-
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    *__SIMD32(ptr1)++ = __SHADD16(R, T);
-
-    /* T = packed((yb + yd), (xb + xd)) */
-    T = __QADD16(xbyb, xdyd);
-
-    /* xc' = (xa-xb+xc-xd) */
-    /* yc' = (ya-yb+yc-yd) */
-    *__SIMD32(ptr1)++ = __SHSUB16(R, T);
-
-    /* S = packed((ya - yc), (xa - xc)) */
-    S = __QSUB16(xaya, xcyc);
-
-    /* Read yd (real), xd(imag) input */
-    /* T = packed( (yb - yd), (xb - xd))  */
-    U = __QSUB16(xbyb, xdyd);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* xb' = (xa+yb-xc-yd) */
-    /* yb' = (ya-xb-yc+xd) */
-    *__SIMD32(ptr1)++ = __SHASX(S, U);
-
-
-    /* xd' = (xa-yb-xc+yd) */
-    /* yd' = (ya+xb-yc-xd) */
-    *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
-#else
-
-    /* xb' = (xa+yb-xc-yd) */
-    /* yb' = (ya-xb-yc+xd) */
-    *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
-
-    /* xd' = (xa-yb-xc+yd) */
-    /* yd' = (ya+xb-yc-xd) */
-    *__SIMD32(ptr1)++ = __SHASX(S, U);
-
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-  } while(--j);
-
-  /* end of last stage  process */
-
-  /* output is in 11.5(q5) format for the 1024 point */
-  /* output is in 9.7(q7) format for the 256 point   */
-  /* output is in 7.9(q9) format for the 64 point  */
-  /* output is in 5.11(q11) format for the 16 point  */
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t R0, R1, S0, S1, T0, T1, U0, U1;
-  q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
-  uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
-
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-
-  /* Index for twiddle coefficient */
-  ic = 0u;
-
-  /* Index for input read and output write */
-  i0 = 0u;
-
-  j = n2;
-
-  /* Input is in 1.15(q15) format */
-
-  /*  Start of first stage process */
-  do
-  {
-    /*  Butterfly implementation */
-
-    /*  index calculation for the input as, */
-    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-    /* input is down scale by 4 to avoid overflow */
-    /* Read ya (real), xa(imag) input */
-    T0 = pSrc16[i0 * 2u] >> 2u;
-    T1 = pSrc16[(i0 * 2u) + 1u] >> 2u;
-    /* input is down scale by 4 to avoid overflow */
-    /* Read yc (real), xc(imag) input */
-    S0 = pSrc16[i2 * 2u] >> 2u;
-    S1 = pSrc16[(i2 * 2u) + 1u] >> 2u;
-
-    /* R0 = (ya + yc), R1 = (xa + xc) */
-    R0 = __SSAT(T0 + S0, 16u);
-    R1 = __SSAT(T1 + S1, 16u);
-    /* S0 = (ya - yc), S1 = (xa - xc) */
-    S0 = __SSAT(T0 - S0, 16u);
-    S1 = __SSAT(T1 - S1, 16u);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* input is down scale by 4 to avoid overflow */
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u] >> 2u;
-    T1 = pSrc16[(i1 * 2u) + 1u] >> 2u;
-    /* Read yd (real), xd(imag) input */
-    /* input is down scale by 4 to avoid overflow */
-    U0 = pSrc16[i3 * 2u] >> 2u;
-    U1 = pSrc16[(i3 * 2u) + 1u] >> 2u;
-
-    /* T0 = (yb + yd), T1 = (xb + xd) */
-    T0 = __SSAT(T0 + U0, 16u);
-    T1 = __SSAT(T1 + U1, 16u);
-
-    /*  writing the butterfly processed i0 sample */
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
-    pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
-
-    /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc)- (xb + xd) */
-    R0 = __SSAT(R0 - T0, 16u);
-    R1 = __SSAT(R1 - T1, 16u);
-    /* co2 & si2 are read from Coefficient pointer */
-    Co2 = pCoef16[2u * ic * 2u];
-    Si2 = pCoef16[(2u * ic * 2u) + 1u];
-    /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
-    out1 = (q15_t) ((Co2 * R0 - Si2 * R1) >> 16u);
-    /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
-    out2 = (q15_t) ((Si2 * R0 + Co2 * R1) >> 16u);
-
-    /*  Reading i0+fftLen/4 */
-    /* input is down scale by 4 to avoid overflow */
-    /* T0 = yb, T1 = xb */
-    T0 = pSrc16[i1 * 2u] >> 2u;
-    T1 = pSrc16[(i1 * 2u) + 1u] >> 2u;
-
-    /* writing the butterfly processed i0 + fftLen/4 sample */
-    /* writing output(xc', yc') in little endian format */
-    pSrc16[i1 * 2u] = out1;
-    pSrc16[(i1 * 2u) + 1u] = out2;
-
-    /*  Butterfly calculations */
-    /* input is down scale by 4 to avoid overflow */
-    /* U0 = yd, U1 = xd) */
-    U0 = pSrc16[i3 * 2u] >> 2u;
-    U1 = pSrc16[(i3 * 2u) + 1u] >> 2u;
-
-    /* T0 = yb-yd, T1 = xb-xd) */
-    T0 = __SSAT(T0 - U0, 16u);
-    T1 = __SSAT(T1 - U1, 16u);
-    /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */
-    R0 = (q15_t) __SSAT((q31_t) (S0 + T1), 16);
-    R1 = (q15_t) __SSAT((q31_t) (S1 - T0), 16);
-    /* S = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */
-    S0 = (q15_t) __SSAT((q31_t) (S0 - T1), 16);
-    S1 = (q15_t) __SSAT((q31_t) (S1 + T0), 16);
-
-    /* co1 & si1 are read from Coefficient pointer */
-    Co1 = pCoef16[ic * 2u];
-    Si1 = pCoef16[(ic * 2u) + 1u];
-    /*  Butterfly process for the i0+fftLen/2 sample */
-    /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
-    out1 = (q15_t) ((Co1 * S0 - Si1 * S1) >> 16u);
-    /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
-    out2 = (q15_t) ((Si1 * S0 + Co1 * S1) >> 16u);
-    /* writing output(xb', yb') in little endian format */
-    pSrc16[i2 * 2u] = out1;
-    pSrc16[(i2 * 2u) + 1u] = out2;
-
-    /* Co3 & si3 are read from Coefficient pointer */
-    Co3 = pCoef16[3u * ic * 2u];
-    Si3 = pCoef16[(3u * ic * 2u) + 1u];
-    /*  Butterfly process for the i0+3fftLen/4 sample */
-    /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */
-    out1 = (q15_t) ((Co3 * R0 - Si3 * R1) >> 16u);
-    /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */
-    out2 = (q15_t) ((Si3 * R0 + Co3 * R1) >> 16u);
-    /* writing output(xd', yd') in little endian format */
-    pSrc16[i3 * 2u] = out1;
-    pSrc16[(i3 * 2u) + 1u] = out2;
-
-    /*  Twiddle coefficients index modifier */
-    ic = ic + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1u;
-
-  } while(--j);
-
-  /*  End of first stage process */
-
-  /* data is in 4.11(q11) format */
-
-
-  /*  Start of Middle stage process */
-
-  /*  Twiddle coefficients index modifier */
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of Middle stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the middle stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ic = 0u;
-
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      Co1 = pCoef16[ic * 2u];
-      Si1 = pCoef16[(ic * 2u) + 1u];
-      Co2 = pCoef16[2u * ic * 2u];
-      Si2 = pCoef16[2u * ic * 2u + 1u];
-      Co3 = pCoef16[3u * ic * 2u];
-      Si3 = pCoef16[(3u * ic * 2u) + 1u];
-
-      /*  Twiddle coefficients index modifier */
-      ic = ic + twidCoefModifier;
-
-      /*  Butterfly implementation */
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /*  Reading i0, i0+fftLen/2 inputs */
-        /* Read ya (real), xa(imag) input */
-        T0 = pSrc16[i0 * 2u];
-        T1 = pSrc16[(i0 * 2u) + 1u];
-
-        /* Read yc (real), xc(imag) input */
-        S0 = pSrc16[i2 * 2u];
-        S1 = pSrc16[(i2 * 2u) + 1u];
-
-
-        /* R0 = (ya + yc), R1 = (xa + xc) */
-        R0 = __SSAT(T0 + S0, 16u);
-        R1 = __SSAT(T1 + S1, 16u);
-        /* S0 = (ya - yc), S1 = (xa - xc) */
-        S0 = __SSAT(T0 - S0, 16u);
-        S1 = __SSAT(T1 - S1, 16u);
-
-        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-        /* Read yb (real), xb(imag) input */
-        T0 = pSrc16[i1 * 2u];
-        T1 = pSrc16[(i1 * 2u) + 1u];
-
-        /* Read yd (real), xd(imag) input */
-        U0 = pSrc16[i3 * 2u];
-        U1 = pSrc16[(i3 * 2u) + 1u];
-
-        /* T0 = (yb + yd), T1 = (xb + xd) */
-        T0 = __SSAT(T0 + U0, 16u);
-        T1 = __SSAT(T1 + U1, 16u);
-
-        /*  writing the butterfly processed i0 sample */
-        /* xa' = xa + xb + xc + xd */
-        /* ya' = ya + yb + yc + yd */
-        pSrc16[i0 * 2u] = ((R0 >> 1u) + (T0 >> 1u)) >> 1u;
-        pSrc16[(i0 * 2u) + 1u] = ((R1 >> 1u) + (T1 >> 1u)) >> 1u;
-
-        /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
-        R0 = (R0 >> 1u) - (T0 >> 1u);
-        R1 = (R1 >> 1u) - (T1 >> 1u);
-
-        /* (ya-yb+yc-yd)* (si2) - (xa-xb+xc-xd)* co2 */
-        out1 = (q15_t) ((Co2 * R0 - Si2 * R1) >> 16);
-        /* (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
-        out2 = (q15_t) ((Si2 * R0 + Co2 * R1) >> 16);
-
-        /*  Reading i0+3fftLen/4 */
-        /* Read yb (real), xb(imag) input */
-        T0 = pSrc16[i1 * 2u];
-        T1 = pSrc16[(i1 * 2u) + 1u];
-
-        /*  writing the butterfly processed i0 + fftLen/4 sample */
-        /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
-        /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
-        pSrc16[i1 * 2u] = out1;
-        pSrc16[(i1 * 2u) + 1u] = out2;
-
-        /*  Butterfly calculations */
-        /* Read yd (real), xd(imag) input */
-        U0 = pSrc16[i3 * 2u];
-        U1 = pSrc16[(i3 * 2u) + 1u];
-
-        /* T0 = yb-yd, T1 = xb-xd) */
-        T0 = __SSAT(T0 - U0, 16u);
-        T1 = __SSAT(T1 - U1, 16u);
-
-        /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */
-        R0 = (S0 >> 1u) + (T1 >> 1u);
-        R1 = (S1 >> 1u) - (T0 >> 1u);
-
-        /* S1 = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */
-        S0 = (S0 >> 1u) - (T1 >> 1u);
-        S1 = (S1 >> 1u) + (T0 >> 1u);
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = (q15_t) ((Co1 * S0 - Si1 * S1) >> 16u);
-        out2 = (q15_t) ((Si1 * S0 + Co1 * S1) >> 16u);
-        /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
-        /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
-        pSrc16[i2 * 2u] = out1;
-        pSrc16[(i2 * 2u) + 1u] = out2;
-
-        /*  Butterfly process for the i0+3fftLen/4 sample */
-        out1 = (q15_t) ((Co3 * R0 - Si3 * R1) >> 16u);
-
-        out2 = (q15_t) ((Si3 * R0 + Co3 * R1) >> 16u);
-        /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */
-        /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */
-        pSrc16[i3 * 2u] = out1;
-        pSrc16[(i3 * 2u) + 1u] = out2;
-
-
-      }
-    }
-    /*  Twiddle coefficients index modifier */
-    twidCoefModifier <<= 2u;
-  }
-  /*  End of Middle stages process */
-
-
-  /* data is in 10.6(q6) format for the 1024 point */
-  /* data is in 8.8(q8) format for the 256 point   */
-  /* data is in 6.10(q10) format for the 64 point  */
-  /* data is in 4.12(q12) format for the 16 point  */
-
-  /* start of last stage process */
-
-
-  /*  Initializations for the last stage */
-  n1 = n2;
-  n2 >>= 2u;
-
-  /*  Butterfly implementation */
-  for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
-  {
-    /*  index calculation for the input as, */
-    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-    /* Read ya (real), xa(imag) input */
-    T0 = pSrc16[i0 * 2u];
-    T1 = pSrc16[(i0 * 2u) + 1u];
-    /* Read yc (real), xc(imag) input */
-    S0 = pSrc16[i2 * 2u];
-    S1 = pSrc16[(i2 * 2u) + 1u];
-
-    /* R0 = (ya + yc), R1 = (xa + xc) */
-    R0 = __SSAT(T0 + S0, 16u);
-    R1 = __SSAT(T1 + S1, 16u);
-    /* S0 = (ya - yc), S1 = (xa - xc) */
-    S0 = __SSAT(T0 - S0, 16u);
-    S1 = __SSAT(T1 - S1, 16u);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u];
-    T1 = pSrc16[(i1 * 2u) + 1u];
-    /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2u];
-    U1 = pSrc16[(i3 * 2u) + 1u];
-
-    /* T0 = (yb + yd), T1 = (xb + xd) */
-    T0 = __SSAT(T0 + U0, 16u);
-    T1 = __SSAT(T1 + U1, 16u);
-
-    /*  writing the butterfly processed i0 sample */
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
-    pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
-
-    /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
-    R0 = (R0 >> 1u) - (T0 >> 1u);
-    R1 = (R1 >> 1u) - (T1 >> 1u);
-
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u];
-    T1 = pSrc16[(i1 * 2u) + 1u];
-
-    /*  writing the butterfly processed i0 + fftLen/4 sample */
-    /* xc' = (xa-xb+xc-xd) */
-    /* yc' = (ya-yb+yc-yd) */
-    pSrc16[i1 * 2u] = R0;
-    pSrc16[(i1 * 2u) + 1u] = R1;
-
-    /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2u];
-    U1 = pSrc16[(i3 * 2u) + 1u];
-    /* T0 = (yb - yd), T1 = (xb - xd) */
-    T0 = __SSAT(T0 - U0, 16u);
-    T1 = __SSAT(T1 - U1, 16u);
-
-    /*  writing the butterfly processed i0 + fftLen/2 sample */
-    /* xb' = (xa-yb-xc+yd) */
-    /* yb' = (ya+xb-yc-xd) */
-    pSrc16[i2 * 2u] = (S0 >> 1u) - (T1 >> 1u);
-    pSrc16[(i2 * 2u) + 1u] = (S1 >> 1u) + (T0 >> 1u);
-
-
-    /*  writing the butterfly processed i0 + 3fftLen/4 sample */
-    /* xd' = (xa+yb-xc-yd) */
-    /* yd' = (ya-xb-yc+xd) */
-    pSrc16[i3 * 2u] = (S0 >> 1u) + (T1 >> 1u);
-    pSrc16[(i3 * 2u) + 1u] = (S1 >> 1u) - (T0 >> 1u);
-  }
-  /* end of last stage  process */
-
-  /* output is in 11.5(q5) format for the 1024 point */
-  /* output is in 9.7(q7) format for the 256 point   */
-  /* output is in 7.9(q9) format for the 64 point  */
-  /* output is in 5.11(q11) format for the 16 point  */
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c
deleted file mode 100755
index 0fbb40b6..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c
+++ /dev/null
@@ -1,1404 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_q31.c    
-*    
-* Description:	This file has function definition of Radix-4 FFT & IFFT function and    
-*				In-place bit reversal using bit reversal table    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-void arm_radix4_butterfly_inverse_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-q31_t * pCoef,
-uint32_t twidCoefModifier);
-
-void arm_radix4_butterfly_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-q31_t * pCoef,
-uint32_t twidCoefModifier);
-
-void arm_bitreversal_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTab);
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup ComplexFFT    
- * @{    
- */
-
-/**    
- * @details    
- * @brief Processing function for the Q31 CFFT/CIFFT.    
- * @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q31 and will be removed
- * @param[in]      *S    points to an instance of the Q31 CFFT/CIFFT structure.   
- * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.   
- * @return none.    
- *     
- * \par Input and output formats:    
- * \par    
- * Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.   
- * Hence the output format is different for different FFT sizes.    
- * The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:   
- * \par   
- * \image html CFFTQ31.gif "Input and Output Formats for Q31 CFFT"    
- * \image html CIFFTQ31.gif "Input and Output Formats for Q31 CIFFT"    
- *    
- */
-
-void arm_cfft_radix4_q31(
-  const arm_cfft_radix4_instance_q31 * S,
-  q31_t * pSrc)
-{
-  if(S->ifftFlag == 1u)
-  {
-    /* Complex IFFT radix-4 */
-    arm_radix4_butterfly_inverse_q31(pSrc, S->fftLen, S->pTwiddle,
-                                     S->twidCoefModifier);
-  }
-  else
-  {
-    /* Complex FFT radix-4 */
-    arm_radix4_butterfly_q31(pSrc, S->fftLen, S->pTwiddle,
-                             S->twidCoefModifier);
-  }
-
-
-  if(S->bitReverseFlag == 1u)
-  {
-    /*  Bit Reversal */
-    arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-  }
-
-}
-
-/**    
- * @} end of ComplexFFT group    
- */
-
-/*    
-* Radix-4 FFT algorithm used is :    
-*    
-* Input real and imaginary data:    
-* x(n) = xa + j * ya    
-* x(n+N/4 ) = xb + j * yb    
-* x(n+N/2 ) = xc + j * yc    
-* x(n+3N 4) = xd + j * yd    
-*    
-*    
-* Output real and imaginary data:    
-* x(4r) = xa'+ j * ya'    
-* x(4r+1) = xb'+ j * yb'    
-* x(4r+2) = xc'+ j * yc'    
-* x(4r+3) = xd'+ j * yd'    
-*    
-*    
-* Twiddle factors for radix-4 FFT:    
-* Wn = co1 + j * (- si1)    
-* W2n = co2 + j * (- si2)    
-* W3n = co3 + j * (- si3)    
-*    
-*  Butterfly implementation:    
-* xa' = xa + xb + xc + xd    
-* ya' = ya + yb + yc + yd    
-* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)    
-* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)    
-* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)    
-* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)    
-* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)    
-* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)    
-*    
-*/
-
-/**    
- * @brief  Core function for the Q31 CFFT butterfly process.   
- * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef           points to twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.   
- */
-
-void arm_radix4_butterfly_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint32_t twidCoefModifier)
-{
-#if defined(ARM_MATH_CM7)
-  uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
-  q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
-
-  q31_t xa, xb, xc, xd;
-  q31_t ya, yb, yc, yd;
-  q31_t xa_out, xb_out, xc_out, xd_out;
-  q31_t ya_out, yb_out, yc_out, yd_out;
-
-  q31_t *ptr1;
-  q63_t xaya, xbyb, xcyc, xdyd;
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-
-  /* start of first stage process */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-  i0 = 0u;
-  ia1 = 0u;
-
-  j = n2;
-
-  /*  Calculation of first stage */
-  do
-  {
-    /*  index calculation for the input as, */
-    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /* input is in 1.31(q31) format and provide 4 guard bits for the input */
-
-    /*  Butterfly implementation */
-    /* xa + xc */
-    r1 = (pSrc[(2u * i0)] >> 4u) + (pSrc[(2u * i2)] >> 4u);
-    /* xa - xc */
-    r2 = (pSrc[2u * i0] >> 4u) - (pSrc[2u * i2] >> 4u);
-
-    /* xb + xd */
-    t1 = (pSrc[2u * i1] >> 4u) + (pSrc[2u * i3] >> 4u);
-
-    /* ya + yc */
-    s1 = (pSrc[(2u * i0) + 1u] >> 4u) + (pSrc[(2u * i2) + 1u] >> 4u);
-    /* ya - yc */
-    s2 = (pSrc[(2u * i0) + 1u] >> 4u) - (pSrc[(2u * i2) + 1u] >> 4u);
-
-    /* xa' = xa + xb + xc + xd */
-    pSrc[2u * i0] = (r1 + t1);
-    /* (xa + xc) - (xb + xd) */
-    r1 = r1 - t1;
-    /* yb + yd */
-    t2 = (pSrc[(2u * i1) + 1u] >> 4u) + (pSrc[(2u * i3) + 1u] >> 4u);
-
-    /* ya' = ya + yb + yc + yd */
-    pSrc[(2u * i0) + 1u] = (s1 + t2);
-
-    /* (ya + yc) - (yb + yd) */
-    s1 = s1 - t2;
-
-    /* yb - yd */
-    t1 = (pSrc[(2u * i1) + 1u] >> 4u) - (pSrc[(2u * i3) + 1u] >> 4u);
-    /* xb - xd */
-    t2 = (pSrc[2u * i1] >> 4u) - (pSrc[2u * i3] >> 4u);
-
-    /*  index calculation for the coefficients */
-    ia2 = 2u * ia1;
-    co2 = pCoef[ia2 * 2u];
-    si2 = pCoef[(ia2 * 2u) + 1u];
-
-    /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-    pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
-                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1u;
-
-    /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-    pSrc[(2u * i1) + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
-                            ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1u;
-
-    /* (xa - xc) + (yb - yd) */
-    r1 = r2 + t1;
-    /* (xa - xc) - (yb - yd) */
-    r2 = r2 - t1;
-
-    /* (ya - yc) - (xb - xd) */
-    s1 = s2 - t2;
-    /* (ya - yc) + (xb - xd) */
-    s2 = s2 + t2;
-
-    co1 = pCoef[ia1 * 2u];
-    si1 = pCoef[(ia1 * 2u) + 1u];
-
-    /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-    pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
-                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1u;
-
-    /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-    pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
-                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1u;
-
-    /*  index calculation for the coefficients */
-    ia3 = 3u * ia1;
-    co3 = pCoef[ia3 * 2u];
-    si3 = pCoef[(ia3 * 2u) + 1u];
-
-    /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-    pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
-                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1u;
-
-    /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-    pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
-                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1u;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1u;
-
-  } while(--j);
-
-  /* end of first stage process */
-
-  /* data is in 5.27(q27) format */
-
-
-  /* start of Middle stages process */
-
-
-  /* each stage in middle stages provides two down scaling of the input */
-
-  twidCoefModifier <<= 2u;
-
-
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
-
-    /*  Calculation of first stage */
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /*  Butterfly implementation */
-        /* xa + xc */
-        r1 = pSrc[2u * i0] + pSrc[2u * i2];
-        /* xa - xc */
-        r2 = pSrc[2u * i0] - pSrc[2u * i2];
-
-        /* ya + yc */
-        s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
-        /* ya - yc */
-        s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
-
-        /* xb + xd */
-        t1 = pSrc[2u * i1] + pSrc[2u * i3];
-
-        /* xa' = xa + xb + xc + xd */
-        pSrc[2u * i0] = (r1 + t1) >> 2u;
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
-
-        /* yb + yd */
-        t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
-        /* ya' = ya + yb + yc + yd */
-        pSrc[(2u * i0) + 1u] = (s1 + t2) >> 2u;
-
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
-
-        /* (yb - yd) */
-        t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
-        /* (xb - xd) */
-        t2 = pSrc[2u * i1] - pSrc[2u * i3];
-
-        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-        pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
-                         ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1u;
-
-        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-        pSrc[(2u * i1) + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
-                                ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1u;
-
-        /* (xa - xc) + (yb - yd) */
-        r1 = r2 + t1;
-        /* (xa - xc) - (yb - yd) */
-        r2 = r2 - t1;
-
-        /* (ya - yc) -  (xb - xd) */
-        s1 = s2 - t2;
-        /* (ya - yc) +  (xb - xd) */
-        s2 = s2 + t2;
-
-        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-        pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
-                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1u;
-
-        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-        pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
-                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1u;
-
-        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-        pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
-                         ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1u;
-
-        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-        pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
-                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1u;
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
-#else
-  uint32_t n1, n2, ia1, ia2, ia3, i0, j, k;
-  q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
-
-  q31_t xa, xb, xc, xd;
-  q31_t ya, yb, yc, yd;
-  q31_t xa_out, xb_out, xc_out, xd_out;
-  q31_t ya_out, yb_out, yc_out, yd_out;
-
-  q31_t *ptr1;
-  q31_t *pSi0;
-  q31_t *pSi1;
-  q31_t *pSi2;
-  q31_t *pSi3;
-  q63_t xaya, xbyb, xcyc, xdyd;
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-
-  /* start of first stage process */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-
-  ia1 = 0u;
-
-  j = n2;
-  
-  pSi0 = pSrc;
-  pSi1 = pSi0 + 2 * n2;
-  pSi2 = pSi1 + 2 * n2;
-  pSi3 = pSi2 + 2 * n2;
-
-  /*  Calculation of first stage */
-  do
-  {
-    /* input is in 1.31(q31) format and provide 4 guard bits for the input */
-
-    /*  Butterfly implementation */
-    /* xa + xc */
-    r1 = (pSi0[0] >> 4u) + (pSi2[0] >> 4u);
-    /* xa - xc */
-    r2 = (pSi0[0] >> 4u) - (pSi2[0] >> 4u);
-
-    /* xb + xd */
-    t1 = (pSi1[0] >> 4u) + (pSi3[0] >> 4u);
-
-    /* ya + yc */
-    s1 = (pSi0[1] >> 4u) + (pSi2[1] >> 4u);
-    /* ya - yc */
-    s2 = (pSi0[1] >> 4u) - (pSi2[1] >> 4u);
-
-    /* xa' = xa + xb + xc + xd */
-    *pSi0++ = (r1 + t1);
-    /* (xa + xc) - (xb + xd) */
-    r1 = r1 - t1;
-    /* yb + yd */
-    t2 = (pSi1[1] >> 4u) + (pSi3[1] >> 4u);
-
-    /* ya' = ya + yb + yc + yd */
-    *pSi0++ = (s1 + t2);
-
-    /* (ya + yc) - (yb + yd) */
-    s1 = s1 - t2;
-
-    /* yb - yd */
-    t1 = (pSi1[1] >> 4u) - (pSi3[1] >> 4u);
-    /* xb - xd */
-    t2 = (pSi1[0] >> 4u) - (pSi3[0] >> 4u);
-
-    /*  index calculation for the coefficients */
-    ia2 = 2u * ia1;
-    co2 = pCoef[ia2 * 2u];
-    si2 = pCoef[(ia2 * 2u) + 1u];
-
-    /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-    *pSi1++ = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
-                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1u;
-
-    /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-    *pSi1++ = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
-                            ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1u;
-
-    /* (xa - xc) + (yb - yd) */
-    r1 = r2 + t1;
-    /* (xa - xc) - (yb - yd) */
-    r2 = r2 - t1;
-
-    /* (ya - yc) - (xb - xd) */
-    s1 = s2 - t2;
-    /* (ya - yc) + (xb - xd) */
-    s2 = s2 + t2;
-
-    co1 = pCoef[ia1 * 2u];
-    si1 = pCoef[(ia1 * 2u) + 1u];
-
-    /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-    *pSi2++ = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
-                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1u;
-
-    /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-    *pSi2++ = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
-                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1u;
-
-    /*  index calculation for the coefficients */
-    ia3 = 3u * ia1;
-    co3 = pCoef[ia3 * 2u];
-    si3 = pCoef[(ia3 * 2u) + 1u];
-
-    /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-    *pSi3++ = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
-                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1u;
-
-    /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-    *pSi3++ = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
-                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1u;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-  } while(--j);
-
-  /* end of first stage process */
-
-  /* data is in 5.27(q27) format */
-
-
-  /* start of Middle stages process */
-
-
-  /* each stage in middle stages provides two down scaling of the input */
-
-  twidCoefModifier <<= 2u;
-
-
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
-
-    /*  Calculation of first stage */
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-      
-      pSi0 = pSrc + 2 * j;
-      pSi1 = pSi0 + 2 * n2;
-      pSi2 = pSi1 + 2 * n2;
-      pSi3 = pSi2 + 2 * n2;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  Butterfly implementation */
-        /* xa + xc */
-        r1 = pSi0[0] + pSi2[0];
-
-        /* xa - xc */
-        r2 = pSi0[0] - pSi2[0];
-
-
-        /* ya + yc */
-        s1 = pSi0[1] + pSi2[1];
-
-        /* ya - yc */
-        s2 = pSi0[1] - pSi2[1];
-
-
-        /* xb + xd */
-        t1 = pSi1[0] + pSi3[0];
-
-
-        /* xa' = xa + xb + xc + xd */
-        pSi0[0] = (r1 + t1) >> 2u;
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
-
-        /* yb + yd */
-        t2 = pSi1[1] + pSi3[1];
-
-        /* ya' = ya + yb + yc + yd */
-        pSi0[1] = (s1 + t2) >> 2u;
-        pSi0 += 2 * n1;
-
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
-
-        /* (yb - yd) */
-        t1 = pSi1[1] - pSi3[1];
-
-        /* (xb - xd) */
-        t2 = pSi1[0] - pSi3[0];
-
-
-        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-        pSi1[0] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
-                         ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1u;
-
-        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-        pSi1[1] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
-                                ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1u;
-        pSi1 += 2 * n1;
-
-        /* (xa - xc) + (yb - yd) */
-        r1 = r2 + t1;
-        /* (xa - xc) - (yb - yd) */
-        r2 = r2 - t1;
-
-        /* (ya - yc) -  (xb - xd) */
-        s1 = s2 - t2;
-        /* (ya - yc) +  (xb - xd) */
-        s2 = s2 + t2;
-
-        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-        pSi2[0] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
-                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1u;
-
-        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-        pSi2[1] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
-                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1u;
-        pSi2 += 2 * n1;
-
-        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-        pSi3[0] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
-                         ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1u;
-
-        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-        pSi3[1] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
-                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1u;
-        pSi3 += 2 * n1;
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
-#endif
-
-  /* End of Middle stages process */
-
-  /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */
-  /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */
-  /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */
-  /* data is in 5.27(q27) format for the 16 point as there are no middle stages */
-
-
-  /* start of Last stage process */
-  /*  Initializations for the last stage */
-  j = fftLen >> 2;
-  ptr1 = &pSrc[0];
-
-  /*  Calculations of last stage */
-  do
-  {
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD64(ptr1)++;
-    xa = (q31_t) xaya;
-    ya = (q31_t) (xaya >> 32);
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD64(ptr1)++;
-    xb = (q31_t) xbyb;
-    yb = (q31_t) (xbyb >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD64(ptr1)++;
-    xc = (q31_t) xcyc;
-    yc = (q31_t) (xcyc >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xdyd = *__SIMD64(ptr1)++;
-    xd = (q31_t) xdyd;
-    yd = (q31_t) (xdyd >> 32);
-
-#else
-
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD64(ptr1)++;
-    ya = (q31_t) xaya;
-    xa = (q31_t) (xaya >> 32);
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD64(ptr1)++;
-    yb = (q31_t) xbyb;
-    xb = (q31_t) (xbyb >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD64(ptr1)++;
-    yc = (q31_t) xcyc;
-    xc = (q31_t) (xcyc >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xdyd = *__SIMD64(ptr1)++;
-    yd = (q31_t) xdyd;
-    xd = (q31_t) (xdyd >> 32);
-
-
-#endif
-
-    /* xa' = xa + xb + xc + xd */
-    xa_out = xa + xb + xc + xd;
-
-    /* ya' = ya + yb + yc + yd */
-    ya_out = ya + yb + yc + yd;
-
-    /* pointer updation for writing */
-    ptr1 = ptr1 - 8u;
-
-    /* writing xa' and ya' */
-    *ptr1++ = xa_out;
-    *ptr1++ = ya_out;
-
-    xc_out = (xa - xb + xc - xd);
-    yc_out = (ya - yb + yc - yd);
-
-    /* writing xc' and yc' */
-    *ptr1++ = xc_out;
-    *ptr1++ = yc_out;
-
-    xb_out = (xa + yb - xc - yd);
-    yb_out = (ya - xb - yc + xd);
-
-    /* writing xb' and yb' */
-    *ptr1++ = xb_out;
-    *ptr1++ = yb_out;
-
-    xd_out = (xa - yb - xc + yd);
-    yd_out = (ya + xb - yc - xd);
-
-    /* writing xd' and yd' */
-    *ptr1++ = xd_out;
-    *ptr1++ = yd_out;
-
-
-  } while(--j);
-
-  /* output is in 11.21(q21) format for the 1024 point */
-  /* output is in 9.23(q23) format for the 256 point */
-  /* output is in 7.25(q25) format for the 64 point */
-  /* output is in 5.27(q27) format for the 16 point */
-
-  /* End of last stage process */
-
-}
-
-
-/**    
- * @brief  Core function for the Q31 CIFFT butterfly process.   
- * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef           points to twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.   
- */
-
-
-/*    
-* Radix-4 IFFT algorithm used is :    
-*    
-* CIFFT uses same twiddle coefficients as CFFT Function    
-*  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]    
-*    
-*    
-* IFFT is implemented with following changes in equations from FFT    
-*    
-* Input real and imaginary data:    
-* x(n) = xa + j * ya    
-* x(n+N/4 ) = xb + j * yb    
-* x(n+N/2 ) = xc + j * yc    
-* x(n+3N 4) = xd + j * yd    
-*    
-*    
-* Output real and imaginary data:    
-* x(4r) = xa'+ j * ya'    
-* x(4r+1) = xb'+ j * yb'    
-* x(4r+2) = xc'+ j * yc'    
-* x(4r+3) = xd'+ j * yd'    
-*    
-*    
-* Twiddle factors for radix-4 IFFT:    
-* Wn = co1 + j * (si1)    
-* W2n = co2 + j * (si2)    
-* W3n = co3 + j * (si3)    
-    
-* The real and imaginary output values for the radix-4 butterfly are    
-* xa' = xa + xb + xc + xd    
-* ya' = ya + yb + yc + yd    
-* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)    
-* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)    
-* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)    
-* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)    
-* xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)    
-* yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)    
-*    
-*/
-
-void arm_radix4_butterfly_inverse_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint32_t twidCoefModifier)
-{
-#if defined(ARM_MATH_CM7)
-  uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
-  q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
-  q31_t xa, xb, xc, xd;
-  q31_t ya, yb, yc, yd;
-  q31_t xa_out, xb_out, xc_out, xd_out;
-  q31_t ya_out, yb_out, yc_out, yd_out;
-
-  q31_t *ptr1;
-  q63_t xaya, xbyb, xcyc, xdyd;
-
-  /* input is be 1.31(q31) format for all FFT sizes */
-  /* Total process is divided into three stages */
-  /* process first stage, middle stages, & last stage */
-
-  /* Start of first stage process */
-
-  /* Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-  i0 = 0u;
-  ia1 = 0u;
-
-  j = n2;
-
-  do
-  {
-
-    /* input is in 1.31(q31) format and provide 4 guard bits for the input */
-
-    /*  index calculation for the input as, */
-    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Butterfly implementation */
-    /* xa + xc */
-    r1 = (pSrc[2u * i0] >> 4u) + (pSrc[2u * i2] >> 4u);
-    /* xa - xc */
-    r2 = (pSrc[2u * i0] >> 4u) - (pSrc[2u * i2] >> 4u);
-
-    /* xb + xd */
-    t1 = (pSrc[2u * i1] >> 4u) + (pSrc[2u * i3] >> 4u);
-
-    /* ya + yc */
-    s1 = (pSrc[(2u * i0) + 1u] >> 4u) + (pSrc[(2u * i2) + 1u] >> 4u);
-    /* ya - yc */
-    s2 = (pSrc[(2u * i0) + 1u] >> 4u) - (pSrc[(2u * i2) + 1u] >> 4u);
-
-    /* xa' = xa + xb + xc + xd */
-    pSrc[2u * i0] = (r1 + t1);
-    /* (xa + xc) - (xb + xd) */
-    r1 = r1 - t1;
-    /* yb + yd */
-    t2 = (pSrc[(2u * i1) + 1u] >> 4u) + (pSrc[(2u * i3) + 1u] >> 4u);
-    /* ya' = ya + yb + yc + yd */
-    pSrc[(2u * i0) + 1u] = (s1 + t2);
-
-    /* (ya + yc) - (yb + yd) */
-    s1 = s1 - t2;
-
-    /* yb - yd */
-    t1 = (pSrc[(2u * i1) + 1u] >> 4u) - (pSrc[(2u * i3) + 1u] >> 4u);
-    /* xb - xd */
-    t2 = (pSrc[2u * i1] >> 4u) - (pSrc[2u * i3] >> 4u);
-
-    /*  index calculation for the coefficients */
-    ia2 = 2u * ia1;
-    co2 = pCoef[ia2 * 2u];
-    si2 = pCoef[(ia2 * 2u) + 1u];
-
-    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-    pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) -
-                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1u;
-
-    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-    pSrc[2u * i1 + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) +
-                          ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1u;
-
-    /* (xa - xc) - (yb - yd) */
-    r1 = r2 - t1;
-    /* (xa - xc) + (yb - yd) */
-    r2 = r2 + t1;
-
-    /* (ya - yc) + (xb - xd) */
-    s1 = s2 + t2;
-    /* (ya - yc) - (xb - xd) */
-    s2 = s2 - t2;
-
-    co1 = pCoef[ia1 * 2u];
-    si1 = pCoef[(ia1 * 2u) + 1u];
-
-    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-    pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
-                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1u;
-
-    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-    pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
-                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1u;
-
-    /*  index calculation for the coefficients */
-    ia3 = 3u * ia1;
-    co3 = pCoef[ia3 * 2u];
-    si3 = pCoef[(ia3 * 2u) + 1u];
-
-    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-    pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
-                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1u;
-
-    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-    pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
-                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1u;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1u;
-
-  } while(--j);
-
-  /* data is in 5.27(q27) format */
-  /* each stage provides two down scaling of the input */
-
-
-  /* Start of Middle stages process */
-
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of second stage to excluding last stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
-
-    for (j = 0; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /*  Butterfly implementation */
-        /* xa + xc */
-        r1 = pSrc[2u * i0] + pSrc[2u * i2];
-        /* xa - xc */
-        r2 = pSrc[2u * i0] - pSrc[2u * i2];
-
-        /* ya + yc */
-        s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
-        /* ya - yc */
-        s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
-
-        /* xb + xd */
-        t1 = pSrc[2u * i1] + pSrc[2u * i3];
-
-        /* xa' = xa + xb + xc + xd */
-        pSrc[2u * i0] = (r1 + t1) >> 2u;
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
-        /* yb + yd */
-        t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
-        /* ya' = ya + yb + yc + yd */
-        pSrc[(2u * i0) + 1u] = (s1 + t2) >> 2u;
-
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
-
-        /* (yb - yd) */
-        t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
-        /* (xb - xd) */
-        t2 = pSrc[2u * i1] - pSrc[2u * i3];
-
-        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-        pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32u)) -
-                         ((int32_t) (((q63_t) s1 * si2) >> 32u))) >> 1u;
-
-        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-        pSrc[(2u * i1) + 1u] =
-          (((int32_t) (((q63_t) s1 * co2) >> 32u)) +
-           ((int32_t) (((q63_t) r1 * si2) >> 32u))) >> 1u;
-
-        /* (xa - xc) - (yb - yd) */
-        r1 = r2 - t1;
-        /* (xa - xc) + (yb - yd) */
-        r2 = r2 + t1;
-
-        /* (ya - yc) +  (xb - xd) */
-        s1 = s2 + t2;
-        /* (ya - yc) -  (xb - xd) */
-        s2 = s2 - t2;
-
-        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-        pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
-                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1u;
-
-        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-        pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
-                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1u;
-
-        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-        pSrc[(2u * i3)] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
-                           ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1u;
-
-        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-        pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
-                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1u;
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
-#else
-  uint32_t n1, n2, ia1, ia2, ia3, i0, j, k;
-  q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
-  q31_t xa, xb, xc, xd;
-  q31_t ya, yb, yc, yd;
-  q31_t xa_out, xb_out, xc_out, xd_out;
-  q31_t ya_out, yb_out, yc_out, yd_out;
-
-  q31_t *ptr1;
-  q31_t *pSi0;
-  q31_t *pSi1;
-  q31_t *pSi2;
-  q31_t *pSi3;
-  q63_t xaya, xbyb, xcyc, xdyd;
-
-  /* input is be 1.31(q31) format for all FFT sizes */
-  /* Total process is divided into three stages */
-  /* process first stage, middle stages, & last stage */
-
-  /* Start of first stage process */
-
-  /* Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-
-  ia1 = 0u;
-
-  j = n2;
-  
-  pSi0 = pSrc;
-  pSi1 = pSi0 + 2 * n2;
-  pSi2 = pSi1 + 2 * n2;
-  pSi3 = pSi2 + 2 * n2;
-
-  do
-  {
-    /*  Butterfly implementation */
-    /* xa + xc */
-    r1 = (pSi0[0] >> 4u) + (pSi2[0] >> 4u);
-    /* xa - xc */
-    r2 = (pSi0[0] >> 4u) - (pSi2[0] >> 4u);
-
-    /* xb + xd */
-    t1 = (pSi1[0] >> 4u) + (pSi3[0] >> 4u);
-
-    /* ya + yc */
-    s1 = (pSi0[1] >> 4u) + (pSi2[1] >> 4u);
-    /* ya - yc */
-    s2 = (pSi0[1] >> 4u) - (pSi2[1] >> 4u);
-
-    /* xa' = xa + xb + xc + xd */
-    *pSi0++ = (r1 + t1);
-    /* (xa + xc) - (xb + xd) */
-    r1 = r1 - t1;
-    /* yb + yd */
-    t2 = (pSi1[1] >> 4u) + (pSi3[1] >> 4u);
-    /* ya' = ya + yb + yc + yd */
-    *pSi0++ = (s1 + t2);
-
-    /* (ya + yc) - (yb + yd) */
-    s1 = s1 - t2;
-
-    /* yb - yd */
-    t1 = (pSi1[1] >> 4u) - (pSi3[1] >> 4u);
-    /* xb - xd */
-    t2 = (pSi1[0] >> 4u) - (pSi3[0] >> 4u);
-
-    /*  index calculation for the coefficients */
-    ia2 = 2u * ia1;
-    co2 = pCoef[ia2 * 2u];
-    si2 = pCoef[(ia2 * 2u) + 1u];
-
-    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-    *pSi1++ = (((int32_t) (((q63_t) r1 * co2) >> 32)) -
-                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1u;
-
-    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-    *pSi1++ = (((int32_t) (((q63_t) s1 * co2) >> 32)) +
-                          ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1u;
-
-    /* (xa - xc) - (yb - yd) */
-    r1 = r2 - t1;
-    /* (xa - xc) + (yb - yd) */
-    r2 = r2 + t1;
-
-    /* (ya - yc) + (xb - xd) */
-    s1 = s2 + t2;
-    /* (ya - yc) - (xb - xd) */
-    s2 = s2 - t2;
-
-    co1 = pCoef[ia1 * 2u];
-    si1 = pCoef[(ia1 * 2u) + 1u];
-
-    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-    *pSi2++ = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
-                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1u;
-
-    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-    *pSi2++ = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
-                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1u;
-
-    /*  index calculation for the coefficients */
-    ia3 = 3u * ia1;
-    co3 = pCoef[ia3 * 2u];
-    si3 = pCoef[(ia3 * 2u) + 1u];
-
-    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-    *pSi3++ = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
-                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1u;
-
-    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-    *pSi3++ = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
-                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1u;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-  } while(--j);
-
-  /* data is in 5.27(q27) format */
-  /* each stage provides two down scaling of the input */
-
-
-  /* Start of Middle stages process */
-
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of second stage to excluding last stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
-
-    for (j = 0; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-      
-      pSi0 = pSrc + 2 * j;
-      pSi1 = pSi0 + 2 * n2;
-      pSi2 = pSi1 + 2 * n2;
-      pSi3 = pSi2 + 2 * n2;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  Butterfly implementation */
-        /* xa + xc */
-        r1 = pSi0[0] + pSi2[0];
-
-        /* xa - xc */
-        r2 = pSi0[0] - pSi2[0];
-
-
-        /* ya + yc */
-        s1 = pSi0[1] + pSi2[1];
-
-        /* ya - yc */
-        s2 = pSi0[1] - pSi2[1];
-
-
-        /* xb + xd */
-        t1 = pSi1[0] + pSi3[0];
-
-
-        /* xa' = xa + xb + xc + xd */
-        pSi0[0] = (r1 + t1) >> 2u;
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
-        /* yb + yd */
-        t2 = pSi1[1] + pSi3[1];
-
-        /* ya' = ya + yb + yc + yd */
-        pSi0[1] = (s1 + t2) >> 2u;
-        pSi0 += 2 * n1;
-
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
-
-        /* (yb - yd) */
-        t1 = pSi1[1] - pSi3[1];
-
-        /* (xb - xd) */
-        t2 = pSi1[0] - pSi3[0];
-
-
-        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-        pSi1[0] = (((int32_t) (((q63_t) r1 * co2) >> 32u)) -
-                         ((int32_t) (((q63_t) s1 * si2) >> 32u))) >> 1u;
-
-        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-        pSi1[1] =
-
-          (((int32_t) (((q63_t) s1 * co2) >> 32u)) +
-           ((int32_t) (((q63_t) r1 * si2) >> 32u))) >> 1u;
-        pSi1 += 2 * n1;
-
-        /* (xa - xc) - (yb - yd) */
-        r1 = r2 - t1;
-        /* (xa - xc) + (yb - yd) */
-        r2 = r2 + t1;
-
-        /* (ya - yc) +  (xb - xd) */
-        s1 = s2 + t2;
-        /* (ya - yc) -  (xb - xd) */
-        s2 = s2 - t2;
-
-        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-        pSi2[0] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
-                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1u;
-
-        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-        pSi2[1] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
-                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1u;
-        pSi2 += 2 * n1;
-
-        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-        pSi3[0] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
-                           ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1u;
-
-        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-        pSi3[1] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
-                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1u;
-        pSi3 += 2 * n1;
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
-#endif
-
-  /* End of Middle stages process */
-
-  /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */
-  /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */
-  /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */
-  /* data is in 5.27(q27) format for the 16 point as there are no middle stages */
-
-
-  /* Start of last stage process */
-
-
-  /*  Initializations for the last stage */
-  j = fftLen >> 2;
-  ptr1 = &pSrc[0];
-
-  /*  Calculations of last stage */
-  do
-  {
-#ifndef ARM_MATH_BIG_ENDIAN
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD64(ptr1)++;
-    xa = (q31_t) xaya;
-    ya = (q31_t) (xaya >> 32);
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD64(ptr1)++;
-    xb = (q31_t) xbyb;
-    yb = (q31_t) (xbyb >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD64(ptr1)++;
-    xc = (q31_t) xcyc;
-    yc = (q31_t) (xcyc >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xdyd = *__SIMD64(ptr1)++;
-    xd = (q31_t) xdyd;
-    yd = (q31_t) (xdyd >> 32);
-
-#else
-
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD64(ptr1)++;
-    ya = (q31_t) xaya;
-    xa = (q31_t) (xaya >> 32);
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD64(ptr1)++;
-    yb = (q31_t) xbyb;
-    xb = (q31_t) (xbyb >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD64(ptr1)++;
-    yc = (q31_t) xcyc;
-    xc = (q31_t) (xcyc >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xdyd = *__SIMD64(ptr1)++;
-    yd = (q31_t) xdyd;
-    xd = (q31_t) (xdyd >> 32);
-
-
-#endif
-
-    /* xa' = xa + xb + xc + xd */
-    xa_out = xa + xb + xc + xd;
-
-    /* ya' = ya + yb + yc + yd */
-    ya_out = ya + yb + yc + yd;
-
-    /* pointer updation for writing */
-    ptr1 = ptr1 - 8u;
-
-    /* writing xa' and ya' */
-    *ptr1++ = xa_out;
-    *ptr1++ = ya_out;
-
-    xc_out = (xa - xb + xc - xd);
-    yc_out = (ya - yb + yc - yd);
-
-    /* writing xc' and yc' */
-    *ptr1++ = xc_out;
-    *ptr1++ = yc_out;
-
-    xb_out = (xa - yb - xc + yd);
-    yb_out = (ya + xb - yc - xd);
-
-    /* writing xb' and yb' */
-    *ptr1++ = xb_out;
-    *ptr1++ = yb_out;
-
-    xd_out = (xa + yb - xc - yd);
-    yd_out = (ya - xb - yc + xd);
-
-    /* writing xd' and yd' */
-    *ptr1++ = xd_out;
-    *ptr1++ = yd_out;
-
-  } while(--j);
-
-  /* output is in 11.21(q21) format for the 1024 point */
-  /* output is in 9.23(q23) format for the 256 point */
-  /* output is in 7.25(q25) format for the 64 point */
-  /* output is in 5.27(q27) format for the 16 point */
-
-  /* End of last stage process */
-}
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix8_f32.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix8_f32.c
deleted file mode 100755
index 7ed8fded..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix8_f32.c
+++ /dev/null
@@ -1,384 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix8_f32.c    
-*    
-* Description:	Radix-8 Decimation in Frequency CFFT & CIFFT Floating point processing function        
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.      
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
-* @ingroup groupTransforms    
-*/
-
-/**    
-* @defgroup Radix8_CFFT_CIFFT Radix-8 Complex FFT Functions    
-*    
-* \par    
-* Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT).    
-* Computational complexity of CFFT reduces drastically when compared to DFT.    
-* \par    
-* This set of functions implements CFFT/CIFFT    
-* for floating-point data types.  The functions operates on in-place buffer which uses same buffer for input and output.    
-* Complex input is stored in input buffer in an interleaved fashion.    
-*    
-* \par    
-* The functions operate on blocks of input and output data and each call to the function processes    
-* 2*fftLen samples through the transform.  pSrc  points to In-place arrays containing 2*fftLen values.    
-* \par   
-* The pSrc points to the array of in-place buffer of size 2*fftLen and inputs and outputs are stored in an interleaved fashion as shown below.    
-* 
 {real[0], imag[0], real[1], imag[1],..} 
    
-*    
-* \par Lengths supported by the transform:   
-* \par    
-* Internally, the function utilize a Radix-8 decimation in frequency(DIF) algorithm    
-* and the size of the FFT supported are of the lengths [ 64, 512, 4096].   
-*     
-*    
-* \par Algorithm:    
-*    
-* Complex Fast Fourier Transform:    
-* \par     
-* Input real and imaginary data:    
-* 
    
-* x(n) = xa + j * ya    
-* x(n+N/4 ) = xb + j * yb    
-* x(n+N/2 ) = xc + j * yc    
-* x(n+3N 4) = xd + j * yd    
-* 
    
-* where N is length of FFT    
-* \par    
-* Output real and imaginary data:    
-* 
    
-* X(4r) = xa'+ j * ya'    
-* X(4r+1) = xb'+ j * yb'    
-* X(4r+2) = xc'+ j * yc'    
-* X(4r+3) = xd'+ j * yd'    
-* 
    
-* \par    
-* Twiddle factors for Radix-8 FFT:    
-* 
    
-* Wn = co1 + j * (- si1)    
-* W2n = co2 + j * (- si2)    
-* W3n = co3 + j * (- si3)    
-* 
    
-*    
-* \par    
-* \image html CFFT.gif "Radix-8 Decimation-in Frequency Complex Fast Fourier Transform"    
-*    
-* \par    
-* Output from Radix-8 CFFT Results in Digit reversal order. Interchange middle two branches of every butterfly results in Bit reversed output.    
-* \par    
-*  Butterfly CFFT equations:    
-* 
    
-* xa' = xa + xb + xc + xd    
-* ya' = ya + yb + yc + yd    
-* xc' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)    
-* yc' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)    
-* xb' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)    
-* yb' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)    
-* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)    
-* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)    
-* 
    
-*    
-* \par    
-* where fftLen length of CFFT/CIFFT; ifftFlag Flag for selection of CFFT or CIFFT(Set ifftFlag to calculate CIFFT otherwise calculates CFFT);    
-* bitReverseFlag Flag for selection of output order(Set bitReverseFlag to output in normal order otherwise output in bit reversed order);     
-* pTwiddlepoints to array of twiddle coefficients; pBitRevTable points to the array of bit reversal table.    
-* twidCoefModifier modifier for twiddle factor table which supports all FFT lengths with same table;     
-* pBitRevTable modifier for bit reversal table which supports all FFT lengths with same table.    
-* onebyfftLen value of 1/fftLen to calculate CIFFT;    
-*   
-* \par Fixed-Point Behavior    
-* Care must be taken when using the fixed-point versions of the CFFT/CIFFT function.    
-* Refer to the function specific documentation below for usage guidelines.    
-*/
-
-
-/*    
-* @brief  Core function for the floating-point CFFT butterfly process.   
-* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
-* @param[in]      fftLen           length of the FFT.   
-* @param[in]      *pCoef           points to the twiddle coefficient buffer.   
-* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
-* @return none.   
-*/
-
-void arm_radix8_butterfly_f32(
-float32_t * pSrc,
-uint16_t fftLen,
-const float32_t * pCoef,
-uint16_t twidCoefModifier)
-{
-   uint32_t ia1, ia2, ia3, ia4, ia5, ia6, ia7;
-   uint32_t i1, i2, i3, i4, i5, i6, i7, i8;
-   uint32_t id;
-   uint32_t n1, n2, j;
-   
-   float32_t r1, r2, r3, r4, r5, r6, r7, r8;
-   float32_t t1, t2;
-   float32_t s1, s2, s3, s4, s5, s6, s7, s8;
-   float32_t p1, p2, p3, p4;
-   float32_t co2, co3, co4, co5, co6, co7, co8;
-   float32_t si2, si3, si4, si5, si6, si7, si8;
-   const float32_t C81 = 0.70710678118f;
-
-   n2 = fftLen;
-   
-   do 
-   {
-      n1 = n2;
-      n2 = n2 >> 3;
-      i1 = 0;
-      
-      do
-      {
-         i2 = i1 + n2;
-         i3 = i2 + n2;
-         i4 = i3 + n2;
-         i5 = i4 + n2;
-         i6 = i5 + n2;
-         i7 = i6 + n2;
-         i8 = i7 + n2;
-         r1 = pSrc[2 * i1] + pSrc[2 * i5];
-         r5 = pSrc[2 * i1] - pSrc[2 * i5];
-         r2 = pSrc[2 * i2] + pSrc[2 * i6];
-         r6 = pSrc[2 * i2] - pSrc[2 * i6];
-         r3 = pSrc[2 * i3] + pSrc[2 * i7];
-         r7 = pSrc[2 * i3] - pSrc[2 * i7];
-         r4 = pSrc[2 * i4] + pSrc[2 * i8];
-         r8 = pSrc[2 * i4] - pSrc[2 * i8];
-         t1 = r1 - r3;
-         r1 = r1 + r3;
-         r3 = r2 - r4;
-         r2 = r2 + r4;
-         pSrc[2 * i1] = r1 + r2;   
-         pSrc[2 * i5] = r1 - r2;
-         r1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1];
-         s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1];
-         r2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1];
-         s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1];
-         s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1];
-         s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1];
-         r4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1];
-         s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1];
-         t2 = r1 - s3;
-         r1 = r1 + s3;
-         s3 = r2 - r4;
-         r2 = r2 + r4;
-         pSrc[2 * i1 + 1] = r1 + r2;
-         pSrc[2 * i5 + 1] = r1 - r2;
-         pSrc[2 * i3]     = t1 + s3;
-         pSrc[2 * i7]     = t1 - s3;
-         pSrc[2 * i3 + 1] = t2 - r3;
-         pSrc[2 * i7 + 1] = t2 + r3;
-         r1 = (r6 - r8) * C81;
-         r6 = (r6 + r8) * C81;
-         r2 = (s6 - s8) * C81;
-         s6 = (s6 + s8) * C81;
-         t1 = r5 - r1;
-         r5 = r5 + r1;
-         r8 = r7 - r6;
-         r7 = r7 + r6;
-         t2 = s5 - r2;
-         s5 = s5 + r2;
-         s8 = s7 - s6;
-         s7 = s7 + s6;
-         pSrc[2 * i2]     = r5 + s7;
-         pSrc[2 * i8]     = r5 - s7;
-         pSrc[2 * i6]     = t1 + s8;
-         pSrc[2 * i4]     = t1 - s8;
-         pSrc[2 * i2 + 1] = s5 - r7;
-         pSrc[2 * i8 + 1] = s5 + r7;
-         pSrc[2 * i6 + 1] = t2 - r8;
-         pSrc[2 * i4 + 1] = t2 + r8;
-         
-         i1 += n1;
-      } while(i1 < fftLen);
-      
-      if(n2 < 8)
-         break;
-      
-      ia1 = 0;
-      j = 1;
-      
-      do
-      {      
-         /*  index calculation for the coefficients */
-         id  = ia1 + twidCoefModifier;
-         ia1 = id;
-         ia2 = ia1 + id;
-         ia3 = ia2 + id;
-         ia4 = ia3 + id;
-         ia5 = ia4 + id;
-         ia6 = ia5 + id;
-         ia7 = ia6 + id;
-                  
-         co2 = pCoef[2 * ia1];
-         co3 = pCoef[2 * ia2];
-         co4 = pCoef[2 * ia3];
-         co5 = pCoef[2 * ia4];
-         co6 = pCoef[2 * ia5];
-         co7 = pCoef[2 * ia6];
-         co8 = pCoef[2 * ia7];
-         si2 = pCoef[2 * ia1 + 1];
-         si3 = pCoef[2 * ia2 + 1];
-         si4 = pCoef[2 * ia3 + 1];
-         si5 = pCoef[2 * ia4 + 1];
-         si6 = pCoef[2 * ia5 + 1];
-         si7 = pCoef[2 * ia6 + 1];
-         si8 = pCoef[2 * ia7 + 1];         
-         
-         i1 = j;
-         
-         do
-         {
-            /*  index calculation for the input */
-            i2 = i1 + n2;
-            i3 = i2 + n2;
-            i4 = i3 + n2;
-            i5 = i4 + n2;
-            i6 = i5 + n2;
-            i7 = i6 + n2;
-            i8 = i7 + n2;
-            r1 = pSrc[2 * i1] + pSrc[2 * i5];
-            r5 = pSrc[2 * i1] - pSrc[2 * i5];
-            r2 = pSrc[2 * i2] + pSrc[2 * i6];
-            r6 = pSrc[2 * i2] - pSrc[2 * i6];
-            r3 = pSrc[2 * i3] + pSrc[2 * i7];
-            r7 = pSrc[2 * i3] - pSrc[2 * i7];
-            r4 = pSrc[2 * i4] + pSrc[2 * i8];
-            r8 = pSrc[2 * i4] - pSrc[2 * i8];
-            t1 = r1 - r3;
-            r1 = r1 + r3;
-            r3 = r2 - r4;
-            r2 = r2 + r4;
-            pSrc[2 * i1] = r1 + r2;
-            r2 = r1 - r2;
-            s1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1];
-            s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1];
-            s2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1];
-            s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1];
-            s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1];
-            s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1];
-            s4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1];
-            s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1];
-            t2 = s1 - s3;
-            s1 = s1 + s3;
-            s3 = s2 - s4;
-            s2 = s2 + s4;
-            r1 = t1 + s3;
-            t1 = t1 - s3;
-            pSrc[2 * i1 + 1] = s1 + s2;
-            s2 = s1 - s2;
-            s1 = t2 - r3;
-            t2 = t2 + r3;
-            p1 = co5 * r2;
-            p2 = si5 * s2;
-            p3 = co5 * s2;
-            p4 = si5 * r2;
-            pSrc[2 * i5]     = p1 + p2;
-            pSrc[2 * i5 + 1] = p3 - p4;
-            p1 = co3 * r1;
-            p2 = si3 * s1;
-            p3 = co3 * s1;
-            p4 = si3 * r1;
-            pSrc[2 * i3]     = p1 + p2;
-            pSrc[2 * i3 + 1] = p3 - p4;
-            p1 = co7 * t1;
-            p2 = si7 * t2;
-            p3 = co7 * t2;
-            p4 = si7 * t1;
-            pSrc[2 * i7]     = p1 + p2;
-            pSrc[2 * i7 + 1] = p3 - p4;
-            r1 = (r6 - r8) * C81;
-            r6 = (r6 + r8) * C81;
-            s1 = (s6 - s8) * C81;
-            s6 = (s6 + s8) * C81;
-            t1 = r5 - r1;
-            r5 = r5 + r1;
-            r8 = r7 - r6;
-            r7 = r7 + r6;
-            t2 = s5 - s1;
-            s5 = s5 + s1;
-            s8 = s7 - s6;
-            s7 = s7 + s6;
-            r1 = r5 + s7;
-            r5 = r5 - s7;
-            r6 = t1 + s8;
-            t1 = t1 - s8;
-            s1 = s5 - r7;
-            s5 = s5 + r7;
-            s6 = t2 - r8;
-            t2 = t2 + r8;
-            p1 = co2 * r1;
-            p2 = si2 * s1;
-            p3 = co2 * s1;
-            p4 = si2 * r1;
-            pSrc[2 * i2]     = p1 + p2;
-            pSrc[2 * i2 + 1] = p3 - p4;
-            p1 = co8 * r5;
-            p2 = si8 * s5;
-            p3 = co8 * s5;
-            p4 = si8 * r5;
-            pSrc[2 * i8]     = p1 + p2;
-            pSrc[2 * i8 + 1] = p3 - p4;
-            p1 = co6 * r6;
-            p2 = si6 * s6;
-            p3 = co6 * s6;
-            p4 = si6 * r6;
-            pSrc[2 * i6]     = p1 + p2;
-            pSrc[2 * i6 + 1] = p3 - p4;
-            p1 = co4 * t1;
-            p2 = si4 * t2;
-            p3 = co4 * t2;
-            p4 = si4 * t1;
-            pSrc[2 * i4]     = p1 + p2;
-            pSrc[2 * i4 + 1] = p3 - p4;
-            
-            i1 += n1;
-         } while(i1 < fftLen);
-         
-         j++;
-      } while(j < n2);
-      
-      twidCoefModifier <<= 3;
-   } while(n2 > 7);   
-}
-
-/**    
-* @} end of Radix8_CFFT_CIFFT group    
-*/
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c
deleted file mode 100755
index 5ee7efaa..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c
+++ /dev/null
@@ -1,461 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_f32.c    
-*    
-* Description:	Processing function of DCT4 & IDCT4 F32.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.      
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @defgroup DCT4_IDCT4 DCT Type IV Functions    
- * Representation of signals by minimum number of values is important for storage and transmission.    
- * The possibility of large discontinuity between the beginning and end of a period of a signal    
- * in DFT can be avoided by extending the signal so that it is even-symmetric.    
- * Discrete Cosine Transform (DCT) is constructed such that its energy is heavily concentrated in the lower part of the    
- * spectrum and is very widely used in signal and image coding applications.    
- * The family of DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of homogeneous boundary conditions.    
- * DCT has an excellent energy-packing capability, hence has many applications and in data compression in particular.    
- *    
- * DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended real signal.    
- * Reordering of the input data makes the computation of DCT just a problem of    
- * computing the DFT of a real signal with a few additional operations.    
- * This approach provides regular, simple, and very efficient DCT algorithms for practical hardware and software implementations.    
- *     
- * DCT type-II can be implemented using Fast fourier transform (FFT) internally, as the transform is applied on real values, Real FFT can be used.    
- * DCT4 is implemented using DCT2 as their implementations are similar except with some added pre-processing and post-processing.    
- * DCT2 implementation can be described in the following steps:    
- * - Re-ordering input    
- * - Calculating Real FFT    
- * - Multiplication of weights and Real FFT output and getting real part from the product.    
- *    
- * This process is explained by the block diagram below:    
- * \image html DCT4.gif "Discrete Cosine Transform - type-IV"    
- *    
- * \par Algorithm:    
- * The N-point type-IV DCT is defined as a real, linear transformation by the formula:    
- * \image html DCT4Equation.gif    
- * where k = 0,1,2,.....N-1    
- *\par    
- * Its inverse is defined as follows:    
- * \image html IDCT4Equation.gif    
- * where n = 0,1,2,.....N-1    
- *\par    
- * The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying with an overall scale factor of sqrt(2/N).    
- * The symmetry of the transform matrix indicates that the fast algorithms for the forward    
- * and inverse transform computation are identical.    
- * Note that the implementation of Inverse DCT4 and DCT4 is same, hence same process function can be used for both.    
- *    
- * \par Lengths supported by the transform:    
- *  As DCT4 internally uses Real FFT, it supports all the lengths supported by arm_rfft_f32().    
- * The library provides separate functions for Q15, Q31, and floating-point data types.    
- * \par Instance Structure    
- * The instances for Real FFT and FFT, cosine values table and twiddle factor table are stored in an instance data structure.    
- * A separate instance structure must be defined for each transform.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Initializes Real FFT as its process function is used internally in DCT4, by calling arm_rfft_init_f32().    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Manually initialize the instance structure as follows:    
- * 
    
- *arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};    
- *arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};   
- *arm_dct4_instance_q15 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};   
- * 
   
- * where \c N is the length of the DCT4; \c Nby2 is half of the length of the DCT4;   
- * \c normalize is normalizing factor used and is equal to sqrt(2/N);    
- * \c pTwiddle points to the twiddle factor table;   
- * \c pCosFactor points to the cosFactor table;   
- * \c pRfft points to the real FFT instance;   
- * \c pCfft points to the complex FFT instance;   
- * The CFFT and RFFT structures also needs to be initialized, refer to arm_cfft_radix4_f32()   
- * and arm_rfft_f32() respectively for details regarding static initialization.   
- *   
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the DCT4 transform functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
- /**    
- * @addtogroup DCT4_IDCT4    
- * @{    
- */
-
-/**    
- * @brief Processing function for the floating-point DCT4/IDCT4.   
- * @param[in]       *S             points to an instance of the floating-point DCT4/IDCT4 structure.   
- * @param[in]       *pState        points to state buffer.   
- * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.   
- * @return none.   
- */
-
-void arm_dct4_f32(
-  const arm_dct4_instance_f32 * S,
-  float32_t * pState,
-  float32_t * pInlineBuffer)
-{
-  uint32_t i;                                    /* Loop counter */
-  float32_t *weights = S->pTwiddle;              /* Pointer to the Weights table */
-  float32_t *cosFact = S->pCosFactor;            /* Pointer to the cos factors table */
-  float32_t *pS1, *pS2, *pbuff;                  /* Temporary pointers for input buffer and pState buffer */
-  float32_t in;                                  /* Temporary variable */
-
-
-  /* DCT4 computation involves DCT2 (which is calculated using RFFT)    
-   * along with some pre-processing and post-processing.    
-   * Computational procedure is explained as follows:    
-   * (a) Pre-processing involves multiplying input with cos factor,    
-   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))    
-   *              where,    
-   *                 r(n) -- output of preprocessing    
-   *                 u(n) -- input to preprocessing(actual Source buffer)    
-   * (b) Calculation of DCT2 using FFT is divided into three steps:    
-   *                  Step1: Re-ordering of even and odd elements of input.    
-   *                  Step2: Calculating FFT of the re-ordered input.    
-   *                  Step3: Taking the real part of the product of FFT output and weights.    
-   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:    
-   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *                        where,    
-   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output    
-   * (d) Multiplying the output with the normalizing factor sqrt(2/N).    
-   */
-
-        /*-------- Pre-processing ------------*/
-  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
-  arm_scale_f32(pInlineBuffer, 2.0f, pInlineBuffer, S->N);
-  arm_mult_f32(pInlineBuffer, cosFact, pInlineBuffer, S->N);
-
-  /* ----------------------------------------------------------------    
-   * Step1: Re-ordering of even and odd elements as,    
-   *             pState[i] =  pInlineBuffer[2*i] and    
-   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2    
-   ---------------------------------------------------------------------*/
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
-  pS2 = pState + (S->N - 1u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
-  i = (uint32_t) S->Nby2 >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = (uint32_t) S->N >> 2u;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.    
-   * Compute 4 outputs at a time */
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_f32(S->pRfft, pInlineBuffer, pState);
-
-        /*----------------------------------------------------------------------    
-	 *  Step3: Multiply the FFT output with the weights.    
-	 *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
-  i = ((uint32_t) S->N - 1u) >> 2u;
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ * (float32_t) 0.5;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  i = ((uint32_t) S->N - 1u) % 0x4u;
-
-  while(i > 0u)
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-
-        /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = (uint32_t) S->N >> 2u;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initializing the loop counter to N/2 */
-  i = (uint32_t) S->Nby2;
-
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter */
-  i = (uint32_t) S->N;
-
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_f32(S->pRfft, pInlineBuffer, pState);
-
-        /*----------------------------------------------------------------------    
-	 *  Step3: Multiply the FFT output with the weights.    
-	 *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ * (float32_t) 0.5;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* Initializing the loop counter */
-  i = ((uint32_t) S->N - 1u);
-
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-        /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter */
-  i = (uint32_t) S->N;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c
deleted file mode 100755
index efc6501e..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c
+++ /dev/null
@@ -1,16519 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_init_f32.c    
-*    
-* Description:	Initialization function of DCT-4 & IDCT4 F32    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup DCT4_IDCT4    
- * @{    
- */
-
-/*    
-* @brief  Weights Table    
-*/
-
-/**    
-* \par    
-* Weights tables are generated using the formula : 
weights[n] = e^(-j*n*pi/(2*N))
    
-* \par    
-* C command to generate the table    
-* 
    
-* for(i = 0; i< N; i++)    
-* {    
-*    weights[2*i]= cos(i*c);    
-*    weights[(2*i)+1]= -sin(i * c);    
-* } 
    
-* \par    
-* Where N is the Number of weights to be calculated and c is pi/(2*N)    
-* \par    
-* In the tables below the real and imaginary values are placed alternatively, hence the    
-* array length is 2*N.    
-*/
-
-static const float32_t Weights_128[256] = {
-  1.000000000000000000f, 0.000000000000000000f, 0.999924701839144500f,
-  -0.012271538285719925f,
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-  0.013805388528060349, -0.999904701082852900, 0.013613658950295789,
-    -0.999907329851114300,
-  0.013421928871995907, -0.999909921855641540, 0.013230198300209845,
-    -0.999912477096339240,
-  0.013038467241987433, -0.999914995573113470, 0.012846735704377631,
-    -0.999917477285871770,
-  0.012655003694430301, -0.999919922234522750, 0.012463271219194662,
-    -0.999922330418976490,
-  0.012271538285719944, -0.999924701839144500, 0.012079804901056066,
-    -0.999927036494939640,
-  0.011888071072252072, -0.999929334386276070, 0.011696336806357907,
-    -0.999931595513069200,
-  0.011504602110422875, -0.999933819875236000, 0.011312866991496287,
-    -0.999936007472694620,
-  0.011121131456628141, -0.999938158305364590, 0.010929395512867561,
-    -0.999940272373166960,
-  0.010737659167264572, -0.999942349676023910, 0.010545922426868548,
-    -0.999944390213859060,
-  0.010354185298728884, -0.999946393986597460, 0.010162447789895645,
-    -0.999948360994165400,
-  0.009970709907418029, -0.999950291236490480, 0.009778971658346134,
-    -0.999952184713501780,
-  0.009587233049729183, -0.999954041425129780, 0.009395494088617302,
-    -0.999955861371306100,
-  0.009203754782059960, -0.999957644551963900, 0.009012015137106642,
-    -0.999959390967037450,
-  0.008820275160807512, -0.999961100616462820, 0.008628534860211857,
-    -0.999962773500176930,
-  0.008436794242369860, -0.999964409618118280, 0.008245053314331058,
-    -0.999966008970226920,
-  0.008053312083144991, -0.999967571556443780, 0.007861570555861883,
-    -0.999969097376711580,
-  0.007669828739531077, -0.999970586430974140, 0.007478086641202815,
-    -0.999972038719176730,
-  0.007286344267926684, -0.999973454241265940, 0.007094601626752279,
-    -0.999974832997189810,
-  0.006902858724729877, -0.999976174986897610, 0.006711115568908869,
-    -0.999977480210339940,
-  0.006519372166339549, -0.999978748667468830, 0.006327628524071549,
-    -0.999979980358237650,
-  0.006135884649154515, -0.999981175282601110, 0.005944140548638765,
-    -0.999982333440515350,
-  0.005752396229573737, -0.999983454831937730, 0.005560651699009764,
-    -0.999984539456826970,
-  0.005368906963996303, -0.999985587315143200, 0.005177162031583702,
-    -0.999986598406848000,
-  0.004985416908821652, -0.999987572731904080, 0.004793671602759852,
-    -0.999988510290275690,
-  0.004601926120448672, -0.999989411081928400, 0.004410180468937601,
-    -0.999990275106828920,
-  0.004218434655277024, -0.999991102364945590, 0.004026688686516664,
-    -0.999991892856248010,
-  0.003834942569706248, -0.999992646580707190, 0.003643196311896179,
-    -0.999993363538295150,
-  0.003451449920135975, -0.999994043728985820, 0.003259703401476044,
-    -0.999994687152754080,
-  0.003067956762966138, -0.999995293809576190, 0.002876210011656010,
-    -0.999995863699429940,
-  0.002684463154596083, -0.999996396822294350, 0.002492716198835898,
-    -0.999996893178149880,
-  0.002300969151425887, -0.999997352766978210, 0.002109222019415816,
-    -0.999997775588762350,
-  0.001917474809855460, -0.999998161643486980, 0.001725727529795258,
-    -0.999998510931137790,
-  0.001533980186284766, -0.999998823451701880, 0.001342232786374430,
-    -0.999999099205167830,
-  0.001150485337113809, -0.999999338191525530, 0.000958737845553352,
-    -0.999999540410766110,
-  0.000766990318742846, -0.999999705862882230, 0.000575242763732077,
-    -0.999999834547867670,
-  0.000383495187571497, -0.999999926465717890, 0.000191747597310674,
-    -0.999999981616429330,
-
-};
-
-/**    
-* \par    
-* cosFactor tables are generated using the formula : 
cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
    
-* \par    
-* C command to generate the table    
-* \par    
-* 
 for(i = 0; i< N; i++)    
-* {    
-*    cos_factors[i]= 2 * cos((2*i+1)*c/2);    
-* } 
    
-* \par    
-* where N is the number of factors to generate and c is pi/(2*N)    
-*/
-static const float32_t cos_factors_128[128] = {
-  0.999981175282601110f, 0.999830581795823400f, 0.999529417501093140f,
-  0.999077727752645360f,
-  0.998475580573294770f, 0.997723066644191640f, 0.996820299291165670f,
-  0.995767414467659820f,
-  0.994564570734255420f, 0.993211949234794500f, 0.991709753669099530f,
-  0.990058210262297120f,
-  0.988257567730749460f, 0.986308097244598670f, 0.984210092386929030f,
-  0.981963869109555240f,
-  0.979569765685440520f, 0.977028142657754390f, 0.974339382785575860f,
-  0.971503890986251780f,
-  0.968522094274417380f, 0.965394441697689400f, 0.962121404269041580f,
-  0.958703474895871600f,
-  0.955141168305770780f, 0.951435020969008340f, 0.947585591017741090f,
-  0.943593458161960390f,
-  0.939459223602189920f, 0.935183509938947610f, 0.930766961078983710f,
-  0.926210242138311380f,
-  0.921514039342042010f, 0.916679059921042700f, 0.911706032005429880f,
-  0.906595704514915330f,
-  0.901348847046022030f, 0.895966249756185220f, 0.890448723244757880f,
-  0.884797098430937790f,
-  0.879012226428633530f, 0.873094978418290090f, 0.867046245515692650f,
-  0.860866938637767310f,
-  0.854557988365400530f, 0.848120344803297230f, 0.841554977436898440f,
-  0.834862874986380010f,
-  0.828045045257755800f, 0.821102514991104650f, 0.814036329705948410f,
-  0.806847553543799330f,
-  0.799537269107905010f, 0.792106577300212390f, 0.784556597155575240f,
-  0.776888465673232440f,
-  0.769103337645579700f, 0.761202385484261780f, 0.753186799043612520f,
-  0.745057785441466060f,
-  0.736816568877369900f, 0.728464390448225200f, 0.720002507961381650f,
-  0.711432195745216430f,
-  0.702754744457225300f, 0.693971460889654000f, 0.685083667772700360f,
-  0.676092703575316030f,
-  0.666999922303637470f, 0.657806693297078640f, 0.648514401022112550f,
-  0.639124444863775730f,
-  0.629638238914927100f, 0.620057211763289210f, 0.610382806276309480f,
-  0.600616479383868970f,
-  0.590759701858874280f, 0.580813958095764530f, 0.570780745886967370f,
-  0.560661576197336030f,
-  0.550457972936604810f, 0.540171472729892970f, 0.529803624686294830f,
-  0.519355990165589530f,
-  0.508830142543106990f, 0.498227666972781870f, 0.487550160148436050f,
-  0.476799230063322250f,
-  0.465976495767966130f, 0.455083587126343840f, 0.444122144570429260f,
-  0.433093818853152010f,
-  0.422000270799799790f, 0.410843171057903910f, 0.399624199845646790f,
-  0.388345046698826300f,
-  0.377007410216418310f, 0.365612997804773960f, 0.354163525420490510f,
-  0.342660717311994380f,
-  0.331106305759876430f, 0.319502030816015750f, 0.307849640041534980f,
-  0.296150888243623960f,
-  0.284407537211271820f, 0.272621355449948980f, 0.260794117915275570f,
-  0.248927605745720260f,
-  0.237023605994367340f, 0.225083911359792780f, 0.213110319916091360f,
-  0.201104634842091960f,
-  0.189068664149806280f, 0.177004220412148860f, 0.164913120489970090f,
-  0.152797185258443410f,
-  0.140658239332849240f, 0.128498110793793220f, 0.116318630911904880f,
-  0.104121633872054730f,
-  0.091908956497132696f, 0.079682437971430126f, 0.067443919563664106f,
-  0.055195244349690031f,
-  0.042938256934940959f, 0.030674803176636581f, 0.018406729905804820f,
-  0.006135884649154515f
-};
-
-static const float32_t cos_factors_512[512] = {
-  0.999998823451701880f, 0.999989411081928400f, 0.999970586430974140f,
-  0.999942349676023910f,
-  0.999904701082852900f, 0.999857641005823860f, 0.999801169887884260f,
-  0.999735288260561680f,
-  0.999659996743959220f, 0.999575296046749220f, 0.999481186966166950f,
-  0.999377670388002850f,
-  0.999264747286594420f, 0.999142418724816910f, 0.999010685854073380f,
-  0.998869549914283560f,
-  0.998719012233872940f, 0.998559074229759310f, 0.998389737407340160f,
-  0.998211003360478190f,
-  0.998022873771486240f, 0.997825350411111640f, 0.997618435138519550f,
-  0.997402129901275300f,
-  0.997176436735326190f, 0.996941357764982160f, 0.996696895202896060f,
-  0.996443051350042630f,
-  0.996179828595696980f, 0.995907229417411720f, 0.995625256380994310f,
-  0.995333912140482280f,
-  0.995033199438118630f, 0.994723121104325700f, 0.994403680057679100f,
-  0.994074879304879370f,
-  0.993736721940724600f, 0.993389211148080650f, 0.993032350197851410f,
-  0.992666142448948020f,
-  0.992290591348257370f, 0.991905700430609330f, 0.991511473318743900f,
-  0.991107913723276890f,
-  0.990695025442664630f, 0.990272812363169110f, 0.989841278458820530f,
-  0.989400427791380380f,
-  0.988950264510302990f, 0.988490792852696590f, 0.988022017143283530f,
-  0.987543941794359230f,
-  0.987056571305750970f, 0.986559910264775410f, 0.986053963346195440f,
-  0.985538735312176060f,
-  0.985014231012239840f, 0.984480455383220930f, 0.983937413449218920f,
-  0.983385110321551180f,
-  0.982823551198705240f, 0.982252741366289370f, 0.981672686196983110f,
-  0.981083391150486710f,
-  0.980484861773469380f, 0.979877103699517640f, 0.979260122649082020f,
-  0.978633924429423210f,
-  0.977998514934557140f, 0.977353900145199960f, 0.976700086128711840f,
-  0.976037079039039020f,
-  0.975364885116656980f, 0.974683510688510670f, 0.973992962167955830f,
-  0.973293246054698250f,
-  0.972584368934732210f, 0.971866337480279400f, 0.971139158449725090f,
-  0.970402838687555500f,
-  0.969657385124292450f, 0.968902804776428870f, 0.968139104746362440f,
-  0.967366292222328510f,
-  0.966584374478333120f, 0.965793358874083680f, 0.964993252854920320f,
-  0.964184063951745830f,
-  0.963365799780954050f, 0.962538468044359160f, 0.961702076529122540f,
-  0.960856633107679660f,
-  0.960002145737665960f, 0.959138622461841890f, 0.958266071408017670f,
-  0.957384500788975860f,
-  0.956493918902395100f, 0.955594334130771110f, 0.954685754941338340f,
-  0.953768189885990330f,
-  0.952841647601198720f, 0.951906136807932350f, 0.950961666311575080f,
-  0.950008245001843000f,
-  0.949045881852700560f, 0.948074585922276230f, 0.947094366352777220f,
-  0.946105232370403450f,
-  0.945107193285260610f, 0.944100258491272660f, 0.943084437466093490f,
-  0.942059739771017310f,
-  0.941026175050889260f, 0.939983753034014050f, 0.938932483532064600f,
-  0.937872376439989890f,
-  0.936803441735921560f, 0.935725689481080370f, 0.934639129819680780f,
-  0.933543772978836170f,
-  0.932439629268462360f, 0.931326709081180430f, 0.930205022892219070f,
-  0.929074581259315860f,
-  0.927935394822617890f, 0.926787474304581750f, 0.925630830509872720f,
-  0.924465474325262600f,
-  0.923291416719527640f, 0.922108668743345180f, 0.920917241529189520f,
-  0.919717146291227360f,
-  0.918508394325212250f, 0.917290997008377910f, 0.916064965799331720f,
-  0.914830312237946200f,
-  0.913587047945250810f, 0.912335184623322750f, 0.911074734055176360f,
-  0.909805708104652220f,
-  0.908528118716306120f, 0.907241977915295820f, 0.905947297807268460f,
-  0.904644090578246240f,
-  0.903332368494511820f, 0.902012143902493180f, 0.900683429228646970f,
-  0.899346236979341570f,
-  0.898000579740739880f, 0.896646470178680150f, 0.895283921038557580f,
-  0.893912945145203250f,
-  0.892533555402764580f, 0.891145764794583180f, 0.889749586383072780f,
-  0.888345033309596350f,
-  0.886932118794342190f, 0.885510856136199950f, 0.884081258712634990f,
-  0.882643339979562790f,
-  0.881197113471222090f, 0.879742592800047410f, 0.878279791656541580f,
-  0.876808723809145650f,
-  0.875329403104110890f, 0.873841843465366860f, 0.872346058894391540f,
-  0.870842063470078980f,
-  0.869329871348606840f, 0.867809496763303320f, 0.866280954024512990f,
-  0.864744257519462380f,
-  0.863199421712124160f, 0.861646461143081300f, 0.860085390429390140f,
-  0.858516224264442740f,
-  0.856938977417828760f, 0.855353664735196030f, 0.853760301138111410f,
-  0.852158901623919830f,
-  0.850549481265603480f, 0.848932055211639610f, 0.847306638685858320f,
-  0.845673246987299070f,
-  0.844031895490066410f, 0.842382599643185850f, 0.840725374970458070f,
-  0.839060237070312740f,
-  0.837387201615661940f, 0.835706284353752600f, 0.834017501106018130f,
-  0.832320867767929680f,
-  0.830616400308846310f, 0.828904114771864870f, 0.827184027273669130f,
-  0.825456154004377550f,
-  0.823720511227391430f, 0.821977115279241550f, 0.820225982569434690f,
-  0.818467129580298660f,
-  0.816700572866827850f, 0.814926329056526620f, 0.813144414849253590f,
-  0.811354847017063730f,
-  0.809557642404051260f, 0.807752817926190360f, 0.805940390571176280f,
-  0.804120377398265810f,
-  0.802292795538115720f, 0.800457662192622820f, 0.798614994634760820f,
-  0.796764810208418830f,
-  0.794907126328237010f, 0.793041960479443640f, 0.791169330217690200f,
-  0.789289253168885650f,
-  0.787401747029031430f, 0.785506829564053930f, 0.783604518609638200f,
-  0.781694832071059390f,
-  0.779777787923014550f, 0.777853404209453150f, 0.775921699043407690f,
-  0.773982690606822900f,
-  0.772036397150384520f, 0.770082836993347900f, 0.768122028523365420f,
-  0.766153990196312920f,
-  0.764178740536116670f, 0.762196298134578900f, 0.760206681651202420f,
-  0.758209909813015280f,
-  0.756206001414394540f, 0.754194975316889170f, 0.752176850449042810f,
-  0.750151645806215070f,
-  0.748119380450403600f, 0.746080073510063780f, 0.744033744179929290f,
-  0.741980411720831070f,
-  0.739920095459516200f, 0.737852814788465980f, 0.735778589165713590f,
-  0.733697438114660370f,
-  0.731609381223892630f, 0.729514438146997010f, 0.727412628602375770f,
-  0.725303972373060770f,
-  0.723188489306527460f, 0.721066199314508110f, 0.718937122372804490f,
-  0.716801278521099540f,
-  0.714658687862769090f, 0.712509370564692320f, 0.710353346857062420f,
-  0.708190637033195400f,
-  0.706021261449339740f, 0.703845240524484940f, 0.701662594740168570f,
-  0.699473344640283770f,
-  0.697277510830886630f, 0.695075113980000880f, 0.692866174817424740f,
-  0.690650714134534720f,
-  0.688428752784090550f, 0.686200311680038700f, 0.683965411797315510f,
-  0.681724074171649820f,
-  0.679476319899365080f, 0.677222170137180450f, 0.674961646102012040f,
-  0.672694769070772970f,
-  0.670421560380173090f, 0.668142041426518560f, 0.665856233665509720f,
-  0.663564158612039880f,
-  0.661265837839992270f, 0.658961292982037320f, 0.656650545729429050f,
-  0.654333617831800550f,
-  0.652010531096959500f, 0.649681307390683190f, 0.647345968636512060f,
-  0.645004536815544040f,
-  0.642657033966226860f, 0.640303482184151670f, 0.637943903621844170f,
-  0.635578320488556230f,
-  0.633206755050057190f, 0.630829229628424470f, 0.628445766601832710f,
-  0.626056388404343520f,
-  0.623661117525694640f, 0.621259976511087660f, 0.618852987960976320f,
-  0.616440174530853650f,
-  0.614021558931038490f, 0.611597163926462020f, 0.609167012336453210f,
-  0.606731127034524480f,
-  0.604289530948156070f, 0.601842247058580030f, 0.599389298400564540f,
-  0.596930708062196500f,
-  0.594466499184664540f, 0.591996694962040990f, 0.589521318641063940f,
-  0.587040393520918080f,
-  0.584553942953015330f, 0.582061990340775550f, 0.579564559139405740f,
-  0.577061672855679550f,
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-  0.566996048825108680f,
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-  0.556845037275160100f,
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-  0.546610166910834860f,
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-  0.536292979065963180f,
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-  0.525895027471084740f,
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-  0.515417878019463150f,
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-  0.494232308515959730f,
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-  0.483527078932918740f,
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-  0.450980989045103810f,
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-  0.439994271309633260f,
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-  0.428941292055329550f,
-  0.426167888726799620f, 0.423390474143796100f, 0.420609074448402510f,
-  0.417823715820212380f,
-  0.415034424476081630f, 0.412241226669883000f, 0.409444148692257590f,
-  0.406643216870369140f,
-  0.403838457567654130f, 0.401029897183575790f, 0.398217562153373620f,
-  0.395401478947816300f,
-  0.392581674072951530f, 0.389758174069856410f, 0.386931005514388690f,
-  0.384100195016935040f,
-  0.381265769222162490f, 0.378427754808765620f, 0.375586178489217330f,
-  0.372741067009515810f,
-  0.369892447148934270f, 0.367040345719767240f, 0.364184789567079840f,
-  0.361325805568454340f,
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-  0.349856129790135030f,
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-  0.338333766965541290f,
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-  0.326760452320131790f,
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-  0.315137928752522440f,
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-  0.303467946572011370f,
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-  0.291752263234989370f,
-  0.288816408206049480f, 0.285877834727080730f, 0.282936570457055390f,
-  0.279992643080273380f,
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-  0.268190857063403180f,
-  0.265234030285511900f, 0.262274707023913590f, 0.259312915132886350f,
-  0.256348682489942910f,
-  0.253382036995570270f, 0.250413006572965280f, 0.247441619167773440f,
-  0.244467902747824210f,
-  0.241491885302869300f, 0.238513594844318500f, 0.235533059404975460f,
-  0.232550307038775330f,
-  0.229565365820518870f, 0.226578263845610110f, 0.223589029229790020f,
-  0.220597690108873650f,
-  0.217604274638483670f, 0.214608810993786920f, 0.211611327369227610f,
-  0.208611851978263460f,
-  0.205610413053099320f, 0.202607038844421110f, 0.199601757621131050f,
-  0.196594597670080220f,
-  0.193585587295803750f, 0.190574754820252800f, 0.187562128582529740f,
-  0.184547736938619640f,
-  0.181531608261125130f, 0.178513770938997590f, 0.175494253377271400f,
-  0.172473083996796030f,
-  0.169450291233967930f, 0.166425903540464220f, 0.163399949382973230f,
-  0.160372457242928400f,
-  0.157343455616238280f, 0.154312973013020240f, 0.151281037957330250f,
-  0.148247678986896200f,
-  0.145212924652847520f, 0.142176803519448000f, 0.139139344163826280f,
-  0.136100575175706200f,
-  0.133060525157139180f, 0.130019222722233350f, 0.126976696496885980f,
-  0.123932975118512200f,
-  0.120888087235777220f, 0.117842061508325020f, 0.114794926606510250f,
-  0.111746711211126660f,
-  0.108697444013138670f, 0.105647153713410700f, 0.102595869022436280f,
-  0.099543618660069444f,
-  0.096490431355252607f, 0.093436335845747912f, 0.090381360877865011f,
-  0.087325535206192226f,
-  0.084268887593324127f, 0.081211446809592386f, 0.078153241632794315f,
-  0.075094300847921291f,
-  0.072034653246889416f, 0.068974327628266732f, 0.065913352797003930f,
-  0.062851757564161420f,
-  0.059789570746640007f, 0.056726821166907783f, 0.053663537652730679f,
-  0.050599749036899337f,
-  0.047535484156959261f, 0.044470771854938744f, 0.041405640977076712f,
-  0.038340120373552791f,
-  0.035274238898213947f, 0.032208025408304704f, 0.029141508764193740f,
-  0.026074717829104040f,
-  0.023007681468839410f, 0.019940428551514598f, 0.016872987947281773f,
-  0.013805388528060349f,
-  0.010737659167264572f, 0.007669828739531077f, 0.004601926120448672f,
-  0.001533980186284766f
-};
-
-static const float32_t cos_factors_2048[2048] = {
-  0.999999926465717890f, 0.999999338191525530f, 0.999998161643486980f,
-  0.999996396822294350f,
-  0.999994043728985820f, 0.999991102364945590f, 0.999987572731904080f,
-  0.999983454831937730f,
-  0.999978748667468830f, 0.999973454241265940f, 0.999967571556443780f,
-  0.999961100616462820f,
-  0.999954041425129780f, 0.999946393986597460f, 0.999938158305364590f,
-  0.999929334386276070f,
-  0.999919922234522750f, 0.999909921855641540f, 0.999899333255515390f,
-  0.999888156440373320f,
-  0.999876391416790410f, 0.999864038191687680f, 0.999851096772332190f,
-  0.999837567166337090f,
-  0.999823449381661570f, 0.999808743426610520f, 0.999793449309835270f,
-  0.999777567040332940f,
-  0.999761096627446610f, 0.999744038080865430f, 0.999726391410624470f,
-  0.999708156627104880f,
-  0.999689333741033640f, 0.999669922763483760f, 0.999649923705874240f,
-  0.999629336579970110f,
-  0.999608161397882110f, 0.999586398172067070f, 0.999564046915327740f,
-  0.999541107640812940f,
-  0.999517580362016990f, 0.999493465092780590f, 0.999468761847290050f,
-  0.999443470640077770f,
-  0.999417591486021720f, 0.999391124400346050f, 0.999364069398620550f,
-  0.999336426496761240f,
-  0.999308195711029470f, 0.999279377058032710f, 0.999249970554724420f,
-  0.999219976218403530f,
-  0.999189394066714920f, 0.999158224117649430f, 0.999126466389543390f,
-  0.999094120901079070f,
-  0.999061187671284600f, 0.999027666719533690f, 0.998993558065545680f,
-  0.998958861729386080f,
-  0.998923577731465780f, 0.998887706092541290f, 0.998851246833715180f,
-  0.998814199976435390f,
-  0.998776565542495610f, 0.998738343554035230f, 0.998699534033539280f,
-  0.998660137003838490f,
-  0.998620152488108870f, 0.998579580509872500f, 0.998538421092996730f,
-  0.998496674261694640f,
-  0.998454340040524800f, 0.998411418454391300f, 0.998367909528543820f,
-  0.998323813288577560f,
-  0.998279129760433200f, 0.998233858970396850f, 0.998188000945100300f,
-  0.998141555711520520f,
-  0.998094523296980010f, 0.998046903729146840f, 0.997998697036034390f,
-  0.997949903246001190f,
-  0.997900522387751620f, 0.997850554490335110f, 0.997799999583146470f,
-  0.997748857695925690f,
-  0.997697128858758500f, 0.997644813102075420f, 0.997591910456652630f,
-  0.997538420953611340f,
-  0.997484344624417930f, 0.997429681500884180f, 0.997374431615167150f,
-  0.997318594999768600f,
-  0.997262171687536170f, 0.997205161711661850f, 0.997147565105683480f,
-  0.997089381903483400f,
-  0.997030612139289450f, 0.996971255847674320f, 0.996911313063555740f,
-  0.996850783822196610f,
-  0.996789668159204560f, 0.996727966110532490f, 0.996665677712478160f,
-  0.996602803001684130f,
-  0.996539342015137940f, 0.996475294790172160f, 0.996410661364464100f,
-  0.996345441776035900f,
-  0.996279636063254650f, 0.996213244264832040f, 0.996146266419824620f,
-  0.996078702567633980f,
-  0.996010552748005870f, 0.995941817001031350f, 0.995872495367145730f,
-  0.995802587887129160f,
-  0.995732094602106430f, 0.995661015553546910f, 0.995589350783264600f,
-  0.995517100333418110f,
-  0.995444264246510340f, 0.995370842565388990f, 0.995296835333246090f,
-  0.995222242593618360f,
-  0.995147064390386470f, 0.995071300767776170f, 0.994994951770357020f,
-  0.994918017443043200f,
-  0.994840497831093180f, 0.994762392980109930f, 0.994683702936040250f,
-  0.994604427745175660f,
-  0.994524567454151740f, 0.994444122109948040f, 0.994363091759888570f,
-  0.994281476451641550f,
-  0.994199276233218910f, 0.994116491152977070f, 0.994033121259616400f,
-  0.993949166602181130f,
-  0.993864627230059750f, 0.993779503192984580f, 0.993693794541031790f,
-  0.993607501324621610f,
-  0.993520623594518090f, 0.993433161401829360f, 0.993345114798006910f,
-  0.993256483834846440f,
-  0.993167268564487230f, 0.993077469039412300f, 0.992987085312448390f,
-  0.992896117436765980f,
-  0.992804565465879140f, 0.992712429453645460f, 0.992619709454266140f,
-  0.992526405522286100f,
-  0.992432517712593660f, 0.992338046080420420f, 0.992242990681341700f,
-  0.992147351571276090f,
-  0.992051128806485720f, 0.991954322443575950f, 0.991856932539495470f,
-  0.991758959151536110f,
-  0.991660402337333210f, 0.991561262154865290f, 0.991461538662453790f,
-  0.991361231918763460f,
-  0.991260341982802440f, 0.991158868913921350f, 0.991056812771814340f,
-  0.990954173616518500f,
-  0.990850951508413620f, 0.990747146508222710f, 0.990642758677011570f,
-  0.990537788076188750f,
-  0.990432234767505970f, 0.990326098813057330f, 0.990219380275280000f,
-  0.990112079216953770f,
-  0.990004195701200910f, 0.989895729791486660f, 0.989786681551618640f,
-  0.989677051045747210f,
-  0.989566838338365120f, 0.989456043494307710f, 0.989344666578752640f,
-  0.989232707657220050f,
-  0.989120166795572690f, 0.989007044060015270f, 0.988893339517095130f,
-  0.988779053233701520f,
-  0.988664185277066230f, 0.988548735714763200f, 0.988432704614708340f,
-  0.988316092045159690f,
-  0.988198898074717610f, 0.988081122772324070f, 0.987962766207263420f,
-  0.987843828449161740f,
-  0.987724309567986960f, 0.987604209634049160f, 0.987483528717999710f,
-  0.987362266890832400f,
-  0.987240424223882250f, 0.987118000788826280f, 0.986994996657682980f,
-  0.986871411902812470f,
-  0.986747246596916590f, 0.986622500813038480f, 0.986497174624562880f,
-  0.986371268105216030f,
-  0.986244781329065460f, 0.986117714370520090f, 0.985990067304330140f,
-  0.985861840205586980f,
-  0.985733033149723490f, 0.985603646212513400f, 0.985473679470071810f,
-  0.985343132998854790f,
-  0.985212006875659350f, 0.985080301177623800f, 0.984948015982227030f,
-  0.984815151367289140f,
-  0.984681707410970940f, 0.984547684191773960f, 0.984413081788540700f,
-  0.984277900280454370f,
-  0.984142139747038570f, 0.984005800268157870f, 0.983868881924017220f,
-  0.983731384795162090f,
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-  0.983175610055424420f,
-  0.983035220223095640f, 0.982894252096474070f, 0.982752705758487830f,
-  0.982610581292404750f,
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-  0.982036303824369020f,
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-  0.981452783056635520f,
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-  0.980860024481523870f,
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-  0.980258033678303550f,
-  0.980106094103951770f, 0.979953577958436740f, 0.979800485331479790f,
-  0.979646816313141210f,
-  0.979492570993820810f, 0.979337749464256780f, 0.979182351815526930f,
-  0.979026378139047580f,
-  0.978869828526574120f, 0.978712703070200420f, 0.978555001862359550f,
-  0.978396724995823090f,
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-  0.977757862810002760f,
-  0.977596709053411890f, 0.977434980201864260f, 0.977272676350500860f,
-  0.977109797594800880f,
-  0.976946344030581670f, 0.976782315753998650f, 0.976617712861545640f,
-  0.976452535450054060f,
-  0.976286783616693630f, 0.976120457458971910f, 0.975953557074734300f,
-  0.975786082562163930f,
-  0.975618034019781750f, 0.975449411546446380f, 0.975280215241354220f,
-  0.975110445204038890f,
-  0.974940101534371830f, 0.974769184332561770f, 0.974597693699155050f,
-  0.974425629735034990f,
-  0.974252992541422500f, 0.974079782219875680f, 0.973905998872289570f,
-  0.973731642600896400f,
-  0.973556713508265560f, 0.973381211697303290f, 0.973205137271252800f,
-  0.973028490333694210f,
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-  0.972316179551765300f,
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-  0.971594716959650160f,
-  0.971412922135170940f, 0.971230555853497380f, 0.971047618221911100f,
-  0.970864109348029470f,
-  0.970680029339806130f, 0.970495378305530560f, 0.970310156353828110f,
-  0.970124363593660280f,
-  0.969938000134323960f, 0.969751066085452140f, 0.969563561557013180f,
-  0.969375486659311280f,
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-  0.968617485593697540f,
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-  0.967850367531413620f,
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-  0.967074139692867040f,
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-  0.966288809384209690f,
-  0.966091055410438830f, 0.965892733110190860f, 0.965693842600133690f,
-  0.965494383997269500f,
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-  0.964690871009481030f,
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-  0.963878277983814200f,
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-  0.963056612568704340f,
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-  0.962225882497979020f,
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-  0.961386095590786250f,
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-  0.960537259751520050f,
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-  0.959679382969746750f,
-  0.959463502071417510f, 0.959247056745430090f, 0.959030047119113660f,
-  0.958812473320129310f,
-  0.958594335476470220f, 0.958375633716461170f, 0.958156368168758820f,
-  0.957936538962351420f,
-  0.957716146226558870f, 0.957495190091032570f, 0.957273670685755200f,
-  0.957051588141040970f,
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-  0.055578150871004817f,
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-  0.052514674564603257f,
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-  0.049450703970084824f,
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-  0.046386267926707213f,
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-  0.043321395278109784f,
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-  0.040256114872041358f,
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-  0.037190455560088091f,
-  0.036423984909444228f, 0.035657492831508264f, 0.034890979777187955f,
-  0.034124446197403423f,
-  0.033357892543086159f, 0.032591319265180385f, 0.031824726814640963f,
-  0.031058115642434700f,
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-  0.027991492756653365f,
-  0.027224794740987910f, 0.026458080709677145f, 0.025691351113759395f,
-  0.024924606404281485f,
-  0.024157847032300020f, 0.023391073448879338f, 0.022624286105092803f,
-  0.021857485452021874f,
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-  0.018790158768784596f,
-  0.018023298335773701f, 0.017256427300120978f, 0.016489546112956454f,
-  0.015722655225417017f,
-  0.014955755088644378f, 0.014188846153786343f, 0.013421928871995907f,
-  0.012655003694430301f,
-  0.011888071072252072f, 0.011121131456628141f, 0.010354185298728884f,
-  0.009587233049729183f,
-  0.008820275160807512f, 0.008053312083144991f, 0.007286344267926684f,
-  0.006519372166339549f,
-  0.005752396229573737f, 0.004985416908821652f, 0.004218434655277024f,
-  0.003451449920135975f,
-  0.002684463154596083f, 0.001917474809855460f, 0.001150485337113809f,
-  0.000383495187571497f
-};
-
-static const float32_t cos_factors_8192[8192] = {
-  1.999999990808214700, 1.999999917273932200, 1.999999770205369800,
-    1.999999549602533100,
-  1.999999255465430200, 1.999998887794072000, 1.999998446588471700,
-    1.999997931848645600,
-  1.999997343574612800, 1.999996681766395000, 1.999995946424016200,
-    1.999995137547503600,
-  1.999994255136887000, 1.999993299192198700, 1.999992269713474200,
-    1.999991166700750800,
-  1.999989990154069600, 1.999988740073473500, 1.999987416459008600,
-    1.999986019310723500,
-  1.999984548628669600, 1.999983004412901000, 1.999981386663474400,
-    1.999979695380449400,
-  1.999977930563888100, 1.999976092213855400, 1.999974180330418700,
-    1.999972194913648900,
-  1.999970135963618400, 1.999968003480403000, 1.999965797464081200,
-    1.999963517914734100,
-  1.999961164832445800, 1.999958738217302300, 1.999956238069392900,
-    1.999953664388809800,
-  1.999951017175647600, 1.999948296430003500, 1.999945502151977600,
-    1.999942634341672600,
-  1.999939692999193900, 1.999936678124649700, 1.999933589718150700,
-    1.999930427779810900,
-  1.999927192309745900, 1.999923883308075200, 1.999920500774920300,
-    1.999917044710405500,
-  1.999913515114657900, 1.999909911987807200, 1.999906235329986100,
-    1.999902485141329400,
-  1.999898661421975400, 1.999894764172064600, 1.999890793391740000,
-    1.999886749081147800,
-  1.999882631240436700, 1.999878439869758200, 1.999874174969266300,
-    1.999869836539117700,
-  1.999865424579472000, 1.999860939090491600, 1.999856380072341000,
-    1.999851747525188200,
-  1.999847041449203300, 1.999842261844559700, 1.999837408711432600,
-    1.999832482050000900,
-  1.999827481860445300, 1.999822408142949900, 1.999817260897701400,
-    1.999812040124888700,
-  1.999806745824704000, 1.999801377997341800, 1.999795936642999600,
-    1.999790421761877400,
-  1.999784833354177900, 1.999779171420106700, 1.999773435959872000,
-    1.999767626973684400,
-  1.999761744461757700, 1.999755788424308200, 1.999749758861554900,
-    1.999743655773719400,
-  1.999737479161026100, 1.999731229023702200, 1.999724905361977200,
-    1.999718508176084000,
-  1.999712037466257600, 1.999705493232735800, 1.999698875475759600,
-    1.999692184195571900,
-  1.999685419392419000, 1.999678581066549400, 1.999671669218214600,
-    1.999664683847668800,
-  1.999657624955168700, 1.999650492540973900, 1.999643286605346800,
-    1.999636007148552400,
-  1.999628654170857900, 1.999621227672533800, 1.999613727653853500,
-    1.999606154115092500,
-  1.999598507056529000, 1.999590786478444600, 1.999582992381123000,
-    1.999575124764850800,
-  1.999567183629917100, 1.999559168976613900, 1.999551080805236100,
-    1.999542919116081000,
-  1.999534683909448600, 1.999526375185641800, 1.999517992944965800,
-    1.999509537187729200,
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-  0.154585975290645110, 0.154203624509868190, 0.153821268059465250,
-    0.153438905953493550,
-  0.153056538206012340, 0.152674164831079730, 0.152291785842754070,
-    0.151909401255095250,
-  0.151527011082161540, 0.151144615338013210, 0.150762214036709470,
-    0.150379807192309620,
-  0.149997394818874590, 0.149614976930463660, 0.149232553541138180,
-    0.148850124664957870,
-  0.148467690315984390, 0.148085250508278370, 0.147702805255900570,
-    0.147320354572913260,
-  0.146937898473377210, 0.146555436971355090, 0.146172970080908520,
-    0.145790497816099230,
-  0.145408020190990560, 0.145025537219644170, 0.144643048916123810,
-    0.144260555294492000,
-  0.143878056368811510, 0.143495552153146630, 0.143113042661560050,
-    0.142730527908116440,
-  0.142348007906879320, 0.141965482671912420, 0.141582952217280980,
-    0.141200416557048680,
-  0.140817875705281120, 0.140435329676042390, 0.140052778483398480,
-    0.139670222141414250,
-  0.139287660664154770, 0.138905094065686600, 0.138522522360074780,
-    0.138139945561386200,
-  0.137757363683686740, 0.137374776741042340, 0.136992184747520560,
-    0.136609587717187310,
-  0.136226985664110460, 0.135844378602356760, 0.135461766545993150,
-    0.135079149509088060,
-  0.134696527505708320, 0.134313900549922760, 0.133931268655799020,
-    0.133548631837404950,
-  0.133165990108809860, 0.132783343484081580, 0.132400691977289760,
-    0.132018035602502530,
-  0.131635374373789940, 0.131252708305220960, 0.130870037410864640,
-    0.130487361704791580,
-  0.130104681201070800, 0.129721995913773260, 0.129339305856968730,
-    0.128956611044727220,
-  0.128573911491120210, 0.128191207210217570, 0.127808498216091110,
-    0.127425784522811530,
-  0.127043066144449680, 0.126660343095077900, 0.126277615388766920,
-    0.125894883039589430,
-  0.125512146061616980, 0.125129404468921260, 0.124746658275575490,
-    0.124363907495651240,
-  0.123981152143222060, 0.123598392232359880, 0.123215627777138580,
-    0.122832858791630880,
-  0.122450085289909640, 0.122067307286049230, 0.121684524794122440,
-    0.121301737828203960,
-  0.120918946402367330, 0.120536150530686250, 0.120153350227235940,
-    0.119770545506089950,
-  0.119387736381323830, 0.119004922867011920, 0.118622104977228730,
-    0.118239282726050290,
-  0.117856456127550970, 0.117473625195807100, 0.117090789944893860,
-    0.116707950388886520,
-  0.116325106541861910, 0.115942258417895240, 0.115559406031063570,
-    0.115176549395442460,
-  0.114793688525109290, 0.114410823434140360, 0.114027954136612060,
-    0.113645080646602280,
-  0.113262202978187320, 0.112879321145445350, 0.112496435162453430,
-    0.112113545043288730,
-  0.111730650802029900, 0.111347752452754000, 0.110964850009539970,
-    0.110581943486465610,
-  0.110199032897608850, 0.109816118257049110, 0.109433199578864170,
-    0.109050276877133770,
-  0.108667350165936400, 0.108284419459350770, 0.107901484771457020,
-    0.107518546116333660,
-  0.107135603508061170, 0.106752656960718350, 0.106369706488385940,
-    0.105986752105143480,
-  0.105603793825070680, 0.105220831662248700, 0.104837865630757090,
-    0.104454895744677270,
-  0.104071922018089540, 0.103688944465074300, 0.103305963099713400,
-    0.102922977936087120,
-  0.102539988988277600, 0.102156996270365800, 0.101773999796432830,
-    0.101390999580561250,
-  0.101007995636832020, 0.100624987979327970, 0.100241976622130760,
-    0.099858961579322170,
-  0.099475942864985456, 0.099092920493202258, 0.098709894478056073,
-    0.098326864833628791,
-  0.097943831574004214, 0.097560794713264939, 0.097177754265493674,
-    0.096794710244774623,
-  0.096411662665190329, 0.096028611540825232, 0.095645556885762609,
-    0.095262498714085819,
-  0.094879437039879722, 0.094496371877227495, 0.094113303240214247,
-    0.093730231142923864,
-  0.093347155599440373, 0.092964076623849271, 0.092580994230234359,
-    0.092197908432681386,
-  0.091814819245274432, 0.091431726682099479, 0.091048630757241303,
-    0.090665531484784803,
-  0.090282428878816323, 0.089899322953420582, 0.089516213722684160,
-    0.089133101200692441,
-  0.088749985401530951, 0.088366866339286629, 0.087983744028044805,
-    0.087600618481892656,
-  0.087217489714916191, 0.086834357741201490, 0.086451222574836131,
-    0.086068084229906014,
-  0.085684942720498897, 0.085301798060701386, 0.084918650264600160,
-    0.084535499346283349,
-  0.084152345319837438, 0.083769188199350780, 0.083386027998910095,
-    0.083002864732603973,
-  0.082619698414519799, 0.082236529058745025, 0.081853356679368619,
-    0.081470181290477811,
-  0.081087002906161790, 0.080703821540508452, 0.080320637207605849,
-    0.079937449921543474,
-  0.079554259696409127, 0.079171066546292510, 0.078787870485282088,
-    0.078404671527466441,
-  0.078021469686935602, 0.077638264977777913, 0.077255057414083589,
-    0.076871847009941652,
-  0.076488633779441206, 0.076105417736672773, 0.075722198895725248,
-    0.075338977270689375,
-  0.074955752875654230, 0.074572525724710764, 0.074189295831948693,
-    0.073806063211457842,
-  0.073422827877329483, 0.073039589843653177, 0.072656349124520389,
-    0.072273105734021334,
-  0.071889859686246352, 0.071506610995287156, 0.071123359675233852,
-    0.070740105740178361,
-  0.070356849204211397, 0.069973590081423773, 0.069590328385907715,
-    0.069207064131753759,
-  0.068823797333054326, 0.068440528003900616, 0.068057256158383886,
-    0.067673981810596848,
-  0.067290704974630494, 0.066907425664577733, 0.066524143894529736,
-    0.066140859678579578,
-  0.065757573030819083, 0.065374283965340146, 0.064990992496236119,
-    0.064607698637598646,
-  0.064224402403521202, 0.063841103808096086, 0.063457802865415636,
-    0.063074499589573618,
-  0.062691193994662109, 0.062307886094775049, 0.061924575904005130,
-    0.061541263436445129,
-  0.061157948706189229, 0.060774631727329942, 0.060391312513961619,
-    0.060007991080177375,
-  0.059624667440070382, 0.059241341607735261, 0.058858013597264912,
-    0.058474683422754095,
-  0.058091351098295878, 0.057708016637985186, 0.057324680055915692,
-    0.056941341366181127,
-  0.056558000582876661, 0.056174657720095743, 0.055791312791933681,
-    0.055407965812484541,
-  0.055024616795842439, 0.054641265756102911, 0.054257912707359794,
-    0.053874557663708772,
-  0.053491200639244271, 0.053107841648060788, 0.052724480704254229,
-    0.052341117821918783,
-  0.051957753015150501, 0.051574386298044173, 0.051191017684694640,
-    0.050807647189198162,
-  0.050424274825649297, 0.050040900608144430, 0.049657524550778251,
-    0.049274146667647289,
-  0.048890766972846805, 0.048507385480472134, 0.048124002204620014,
-    0.047740617159385448,
-  0.047357230358865306, 0.046973841817155179, 0.046590451548350717,
-    0.046207059566548990,
-  0.045823665885845313, 0.045440270520336883, 0.045056873484119603,
-    0.044673474791289434,
-  0.044290074455943754, 0.043906672492178188, 0.043523268914090238,
-    0.043139863735776100,
-  0.042756456971332048, 0.042373048634855741, 0.041989638740443119,
-    0.041606227302191955,
-  0.041222814334198304, 0.040839399850560058, 0.040455983865373815,
-    0.040072566392736257,
-  0.039689147446745419, 0.039305727041497644, 0.038922305191091085,
-    0.038538881909622631,
-  0.038155457211189216, 0.037772031109889144, 0.037388603619819022,
-    0.037005174755077273,
-  0.036621744529761024, 0.036238312957967478, 0.035854880053795196,
-    0.035471445831341021,
-  0.035088010304703626, 0.034704573487980395, 0.034321135395268765,
-    0.033937696040667535,
-  0.033554255438273790, 0.033170813602186440, 0.032787370546502645,
-    0.032403926285321405,
-  0.032020480832740429, 0.031637034202857461, 0.031253586409771626,
-    0.030870137467580314,
-  0.030486687390382738, 0.030103236192276818, 0.029719783887360508,
-    0.029336330489733147,
-  0.028952876013492331, 0.028569420472737472, 0.028185963881566689,
-    0.027802506254078142,
-  0.027419047604371360, 0.027035587946544135, 0.026652127294696067,
-    0.026268665662925468,
-  0.025885203065330677, 0.025501739516011413, 0.025118275029065638,
-    0.024734809618593138,
-  0.024351343298691951, 0.023967876083461924, 0.023584407987001611,
-    0.023200939023409587,
-  0.022817469206785804, 0.022433998551228459, 0.022050527070837558,
-    0.021667054779711814,
-  0.021283581691949955, 0.020900107821652084, 0.020516633182916549,
-    0.020133157789843505,
-  0.019749681656531803, 0.019366204797080316, 0.018982727225589285,
-    0.018599248956157190,
-  0.018215770002884327, 0.017832290379869671, 0.017448810101212228,
-    0.017065329181012358,
-  0.016681847633368677, 0.016298365472381587, 0.015914882712149747,
-    0.015531399366773606,
-  0.015147915450352307, 0.014764430976985016, 0.014380945960772247,
-    0.013997460415812761,
-  0.013613974356207112, 0.013230487796054543, 0.012847000749454314,
-    0.012463513230507034,
-  0.012080025253311559, 0.011696536831968529, 0.011313047980577277,
-    0.010929558713237145,
-  0.010546069044048827, 0.010162578987111254, 0.009779088556525145,
-    0.009395597766389905,
-  0.009012106630804949, 0.008628615163871038, 0.008245123379687167,
-    0.007861631292354124,
-  0.007478138915970929, 0.007094646264638386, 0.006711153352455981,
-    0.006327660193523208,
-  0.005944166801940901, 0.005560673191808128, 0.005177179377225743,
-    0.004793685372293270,
-  0.004410191191110246, 0.004026696847777542, 0.003643202356394263,
-    0.003259707731061291,
-  0.002876212985878184, 0.002492718134944503, 0.002109223192361147,
-    0.001725728172227238,
-  0.001342233088643682, 0.000958737955710053, 0.000575242787525925,
-    0.000191747598192208,
-
-};
-
-/**    
- * @brief  Initialization function for the floating-point DCT4/IDCT4.   
- * @param[in,out] *S         points to an instance of floating-point DCT4/IDCT4 structure.   
- * @param[in]     *S_RFFT    points to an instance of floating-point RFFT/RIFFT structure.   
- * @param[in]     *S_CFFT    points to an instance of floating-point CFFT/CIFFT structure.   
- * @param[in]     N			 length of the DCT4.   
- * @param[in]     Nby2       half of the length of the DCT4.   
- * @param[in]     normalize  normalizing factor.   
- * @return        arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length.   
- * \par Normalizing factor:    
- * The normalizing factor is sqrt(2/N), which depends on the size of transform N.    
- * Floating-point normalizing factors are mentioned in the table below for different DCT sizes:    
- * \image html dct4NormalizingF32Table.gif    
- */
-
-arm_status arm_dct4_init_f32(
-  arm_dct4_instance_f32 * S,
-  arm_rfft_instance_f32 * S_RFFT,
-  arm_cfft_radix4_instance_f32 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  float32_t normalize)
-{
-  /*  Initialize the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /* Initializing the pointer array with the weight table base addresses of different lengths */
-  float32_t *twiddlePtr[4] =
-    { (float32_t *) Weights_128, (float32_t *) Weights_512,
-    (float32_t *) Weights_2048, (float32_t *) Weights_8192
-  };
-
-  /* Initializing the pointer array with the cos factor table base addresses of different lengths */
-  float32_t *pCosFactor[4] =
-    { (float32_t *) cos_factors_128, (float32_t *) cos_factors_512,
-    (float32_t *) cos_factors_2048, (float32_t *) cos_factors_8192
-  };
-
-  /* Initialize the DCT4 length */
-  S->N = N;
-
-  /* Initialize the half of DCT4 length */
-  S->Nby2 = Nby2;
-
-  /* Initialize the DCT4 Normalizing factor */
-  S->normalize = normalize;
-
-  /* Initialize Real FFT Instance */
-  S->pRfft = S_RFFT;
-
-  /* Initialize Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  switch (N)
-  {
-    /* Initialize the table modifier values */
-  case 8192u:
-    S->pTwiddle = twiddlePtr[3];
-    S->pCosFactor = pCosFactor[3];
-    break;
-  case 2048u:
-    S->pTwiddle = twiddlePtr[2];
-    S->pCosFactor = pCosFactor[2];
-    break;
-  case 512u:
-    S->pTwiddle = twiddlePtr[1];
-    S->pCosFactor = pCosFactor[1];
-    break;
-  case 128u:
-    S->pTwiddle = twiddlePtr[0];
-    S->pCosFactor = pCosFactor[0];
-    break;
-  default:
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-
-  /* Initialize the RFFT/RIFFT */
-  arm_rfft_init_f32(S->pRfft, S->pCfft, S->N, 0u, 1u);
-
-  /* return the status of DCT4 Init function */
-  return (status);
-}
-
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c
deleted file mode 100755
index 7a78aa8e..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c
+++ /dev/null
@@ -1,4284 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_init_q15.c    
-*    
-* Description:	Initialization function of DCT-4 & IDCT4 Q15    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup DCT4_IDCT4    
- * @{    
- */
-
-/*    
-* @brief  Weights Table    
-*/
-
-/**    
-* \par    
-* Weights tables are generated using the formula : 
weights[n] = e^(-j*n*pi/(2*N))
    
-* \par    
-* C command to generate the table    
-* 
    
-* for(i = 0; i< N; i++)    
-* {    
-*   weights[2*i]= cos(i*c);    
-*   weights[(2*i)+1]= -sin(i * c);    
-* } 
    
-* \par    
-* where N is the Number of weights to be calculated and c is pi/(2*N)    
-* \par    
-* Converted the output to q15 format by multiplying with 2^31 and saturated if required.    
-* \par    
-* In the tables below the real and imaginary values are placed alternatively, hence the    
-* array length is 2*N.    
-*/
-
-static const q15_t ALIGN4 WeightsQ15_128[256] = {
-  0x7fff, 0x0, 0x7ffd, 0xfe6e, 0x7ff6, 0xfcdc, 0x7fe9, 0xfb4a,
-  0x7fd8, 0xf9b9, 0x7fc2, 0xf827, 0x7fa7, 0xf696, 0x7f87, 0xf505,
-  0x7f62, 0xf375, 0x7f38, 0xf1e5, 0x7f09, 0xf055, 0x7ed5, 0xeec7,
-  0x7e9d, 0xed38, 0x7e5f, 0xebab, 0x7e1d, 0xea1e, 0x7dd6, 0xe893,
-  0x7d8a, 0xe708, 0x7d39, 0xe57e, 0x7ce3, 0xe3f5, 0x7c89, 0xe26d,
-  0x7c29, 0xe0e7, 0x7bc5, 0xdf61, 0x7b5d, 0xdddd, 0x7aef, 0xdc5a,
-  0x7a7d, 0xdad8, 0x7a05, 0xd958, 0x798a, 0xd7da, 0x7909, 0xd65d,
-  0x7884, 0xd4e1, 0x77fa, 0xd368, 0x776c, 0xd1ef, 0x76d9, 0xd079,
-  0x7641, 0xcf05, 0x75a5, 0xcd92, 0x7504, 0xcc22, 0x745f, 0xcab3,
-  0x73b5, 0xc946, 0x7307, 0xc7dc, 0x7255, 0xc674, 0x719e, 0xc50e,
-  0x70e2, 0xc3aa, 0x7023, 0xc248, 0x6f5f, 0xc0e9, 0x6e96, 0xbf8d,
-  0x6dca, 0xbe32, 0x6cf9, 0xbcdb, 0x6c24, 0xbb86, 0x6b4a, 0xba33,
-  0x6a6d, 0xb8e4, 0x698c, 0xb797, 0x68a6, 0xb64c, 0x67bd, 0xb505,
-  0x66cf, 0xb3c1, 0x65dd, 0xb27f, 0x64e8, 0xb141, 0x63ef, 0xb005,
-  0x62f2, 0xaecd, 0x61f1, 0xad97, 0x60ec, 0xac65, 0x5fe3, 0xab36,
-  0x5ed7, 0xaa0b, 0x5dc7, 0xa8e3, 0x5cb4, 0xa7be, 0x5b9d, 0xa69c,
-  0x5a82, 0xa57e, 0x5964, 0xa463, 0x5842, 0xa34c, 0x571d, 0xa239,
-  0x55f5, 0xa129, 0x54ca, 0xa01d, 0x539b, 0x9f14, 0x5269, 0x9e0f,
-  0x5133, 0x9d0e, 0x4ffb, 0x9c11, 0x4ebf, 0x9b18, 0x4d81, 0x9a23,
-  0x4c3f, 0x9931, 0x4afb, 0x9843, 0x49b4, 0x975a, 0x4869, 0x9674,
-  0x471c, 0x9593, 0x45cd, 0x94b6, 0x447a, 0x93dc, 0x4325, 0x9307,
-  0x41ce, 0x9236, 0x4073, 0x916a, 0x3f17, 0x90a1, 0x3db8, 0x8fdd,
-  0x3c56, 0x8f1e, 0x3af2, 0x8e62, 0x398c, 0x8dab, 0x3824, 0x8cf9,
-  0x36ba, 0x8c4b, 0x354d, 0x8ba1, 0x33de, 0x8afc, 0x326e, 0x8a5b,
-  0x30fb, 0x89bf, 0x2f87, 0x8927, 0x2e11, 0x8894, 0x2c98, 0x8806,
-  0x2b1f, 0x877c, 0x29a3, 0x86f7, 0x2826, 0x8676, 0x26a8, 0x85fb,
-  0x2528, 0x8583, 0x23a6, 0x8511, 0x2223, 0x84a3, 0x209f, 0x843b,
-  0x1f19, 0x83d7, 0x1d93, 0x8377, 0x1c0b, 0x831d, 0x1a82, 0x82c7,
-  0x18f8, 0x8276, 0x176d, 0x822a, 0x15e2, 0x81e3, 0x1455, 0x81a1,
-  0x12c8, 0x8163, 0x1139, 0x812b, 0xfab, 0x80f7, 0xe1b, 0x80c8,
-  0xc8b, 0x809e, 0xafb, 0x8079, 0x96a, 0x8059, 0x7d9, 0x803e,
-  0x647, 0x8028, 0x4b6, 0x8017, 0x324, 0x800a, 0x192, 0x8003,
-};
-
-static const q15_t ALIGN4 WeightsQ15_512[1024] = {
-  0x7fff, 0x0, 0x7fff, 0xff9c, 0x7fff, 0xff37, 0x7ffe, 0xfed3,
-  0x7ffd, 0xfe6e, 0x7ffc, 0xfe0a, 0x7ffa, 0xfda5, 0x7ff8, 0xfd41,
-  0x7ff6, 0xfcdc, 0x7ff3, 0xfc78, 0x7ff0, 0xfc13, 0x7fed, 0xfbaf,
-  0x7fe9, 0xfb4a, 0x7fe5, 0xfae6, 0x7fe1, 0xfa81, 0x7fdd, 0xfa1d,
-  0x7fd8, 0xf9b9, 0x7fd3, 0xf954, 0x7fce, 0xf8f0, 0x7fc8, 0xf88b,
-  0x7fc2, 0xf827, 0x7fbc, 0xf7c3, 0x7fb5, 0xf75e, 0x7fae, 0xf6fa,
-  0x7fa7, 0xf696, 0x7f9f, 0xf632, 0x7f97, 0xf5cd, 0x7f8f, 0xf569,
-  0x7f87, 0xf505, 0x7f7e, 0xf4a1, 0x7f75, 0xf43d, 0x7f6b, 0xf3d9,
-  0x7f62, 0xf375, 0x7f58, 0xf311, 0x7f4d, 0xf2ad, 0x7f43, 0xf249,
-  0x7f38, 0xf1e5, 0x7f2d, 0xf181, 0x7f21, 0xf11d, 0x7f15, 0xf0b9,
-  0x7f09, 0xf055, 0x7efd, 0xeff2, 0x7ef0, 0xef8e, 0x7ee3, 0xef2a,
-  0x7ed5, 0xeec7, 0x7ec8, 0xee63, 0x7eba, 0xedff, 0x7eab, 0xed9c,
-  0x7e9d, 0xed38, 0x7e8e, 0xecd5, 0x7e7f, 0xec72, 0x7e6f, 0xec0e,
-  0x7e5f, 0xebab, 0x7e4f, 0xeb48, 0x7e3f, 0xeae5, 0x7e2e, 0xea81,
-  0x7e1d, 0xea1e, 0x7e0c, 0xe9bb, 0x7dfa, 0xe958, 0x7de8, 0xe8f6,
-  0x7dd6, 0xe893, 0x7dc3, 0xe830, 0x7db0, 0xe7cd, 0x7d9d, 0xe76a,
-  0x7d8a, 0xe708, 0x7d76, 0xe6a5, 0x7d62, 0xe643, 0x7d4e, 0xe5e0,
-  0x7d39, 0xe57e, 0x7d24, 0xe51c, 0x7d0f, 0xe4b9, 0x7cf9, 0xe457,
-  0x7ce3, 0xe3f5, 0x7ccd, 0xe393, 0x7cb7, 0xe331, 0x7ca0, 0xe2cf,
-  0x7c89, 0xe26d, 0x7c71, 0xe20b, 0x7c5a, 0xe1aa, 0x7c42, 0xe148,
-  0x7c29, 0xe0e7, 0x7c11, 0xe085, 0x7bf8, 0xe024, 0x7bdf, 0xdfc2,
-  0x7bc5, 0xdf61, 0x7bac, 0xdf00, 0x7b92, 0xde9f, 0x7b77, 0xde3e,
-  0x7b5d, 0xdddd, 0x7b42, 0xdd7c, 0x7b26, 0xdd1b, 0x7b0b, 0xdcbb,
-  0x7aef, 0xdc5a, 0x7ad3, 0xdbf9, 0x7ab6, 0xdb99, 0x7a9a, 0xdb39,
-  0x7a7d, 0xdad8, 0x7a5f, 0xda78, 0x7a42, 0xda18, 0x7a24, 0xd9b8,
-  0x7a05, 0xd958, 0x79e7, 0xd8f9, 0x79c8, 0xd899, 0x79a9, 0xd839,
-  0x798a, 0xd7da, 0x796a, 0xd77a, 0x794a, 0xd71b, 0x792a, 0xd6bc,
-  0x7909, 0xd65d, 0x78e8, 0xd5fe, 0x78c7, 0xd59f, 0x78a6, 0xd540,
-  0x7884, 0xd4e1, 0x7862, 0xd483, 0x7840, 0xd424, 0x781d, 0xd3c6,
-  0x77fa, 0xd368, 0x77d7, 0xd309, 0x77b4, 0xd2ab, 0x7790, 0xd24d,
-  0x776c, 0xd1ef, 0x7747, 0xd192, 0x7723, 0xd134, 0x76fe, 0xd0d7,
-  0x76d9, 0xd079, 0x76b3, 0xd01c, 0x768e, 0xcfbf, 0x7668, 0xcf62,
-  0x7641, 0xcf05, 0x761b, 0xcea8, 0x75f4, 0xce4b, 0x75cc, 0xcdef,
-  0x75a5, 0xcd92, 0x757d, 0xcd36, 0x7555, 0xccda, 0x752d, 0xcc7e,
-  0x7504, 0xcc22, 0x74db, 0xcbc6, 0x74b2, 0xcb6a, 0x7489, 0xcb0e,
-  0x745f, 0xcab3, 0x7435, 0xca58, 0x740b, 0xc9fc, 0x73e0, 0xc9a1,
-  0x73b5, 0xc946, 0x738a, 0xc8ec, 0x735f, 0xc891, 0x7333, 0xc836,
-  0x7307, 0xc7dc, 0x72db, 0xc782, 0x72af, 0xc728, 0x7282, 0xc6ce,
-  0x7255, 0xc674, 0x7227, 0xc61a, 0x71fa, 0xc5c0, 0x71cc, 0xc567,
-  0x719e, 0xc50e, 0x716f, 0xc4b4, 0x7141, 0xc45b, 0x7112, 0xc403,
-  0x70e2, 0xc3aa, 0x70b3, 0xc351, 0x7083, 0xc2f9, 0x7053, 0xc2a0,
-  0x7023, 0xc248, 0x6ff2, 0xc1f0, 0x6fc1, 0xc198, 0x6f90, 0xc141,
-  0x6f5f, 0xc0e9, 0x6f2d, 0xc092, 0x6efb, 0xc03b, 0x6ec9, 0xbfe3,
-  0x6e96, 0xbf8d, 0x6e63, 0xbf36, 0x6e30, 0xbedf, 0x6dfd, 0xbe89,
-  0x6dca, 0xbe32, 0x6d96, 0xbddc, 0x6d62, 0xbd86, 0x6d2d, 0xbd30,
-  0x6cf9, 0xbcdb, 0x6cc4, 0xbc85, 0x6c8f, 0xbc30, 0x6c59, 0xbbdb,
-  0x6c24, 0xbb86, 0x6bee, 0xbb31, 0x6bb8, 0xbadc, 0x6b81, 0xba88,
-  0x6b4a, 0xba33, 0x6b13, 0xb9df, 0x6adc, 0xb98b, 0x6aa5, 0xb937,
-  0x6a6d, 0xb8e4, 0x6a35, 0xb890, 0x69fd, 0xb83d, 0x69c4, 0xb7ea,
-  0x698c, 0xb797, 0x6953, 0xb744, 0x6919, 0xb6f1, 0x68e0, 0xb69f,
-  0x68a6, 0xb64c, 0x686c, 0xb5fa, 0x6832, 0xb5a8, 0x67f7, 0xb557,
-  0x67bd, 0xb505, 0x6782, 0xb4b4, 0x6746, 0xb462, 0x670b, 0xb411,
-  0x66cf, 0xb3c1, 0x6693, 0xb370, 0x6657, 0xb31f, 0x661a, 0xb2cf,
-  0x65dd, 0xb27f, 0x65a0, 0xb22f, 0x6563, 0xb1df, 0x6526, 0xb190,
-  0x64e8, 0xb141, 0x64aa, 0xb0f1, 0x646c, 0xb0a2, 0x642d, 0xb054,
-  0x63ef, 0xb005, 0x63b0, 0xafb7, 0x6371, 0xaf69, 0x6331, 0xaf1b,
-  0x62f2, 0xaecd, 0x62b2, 0xae7f, 0x6271, 0xae32, 0x6231, 0xade4,
-  0x61f1, 0xad97, 0x61b0, 0xad4b, 0x616f, 0xacfe, 0x612d, 0xacb2,
-  0x60ec, 0xac65, 0x60aa, 0xac19, 0x6068, 0xabcd, 0x6026, 0xab82,
-  0x5fe3, 0xab36, 0x5fa0, 0xaaeb, 0x5f5e, 0xaaa0, 0x5f1a, 0xaa55,
-  0x5ed7, 0xaa0b, 0x5e93, 0xa9c0, 0x5e50, 0xa976, 0x5e0b, 0xa92c,
-  0x5dc7, 0xa8e3, 0x5d83, 0xa899, 0x5d3e, 0xa850, 0x5cf9, 0xa807,
-  0x5cb4, 0xa7be, 0x5c6e, 0xa775, 0x5c29, 0xa72c, 0x5be3, 0xa6e4,
-  0x5b9d, 0xa69c, 0x5b56, 0xa654, 0x5b10, 0xa60d, 0x5ac9, 0xa5c5,
-  0x5a82, 0xa57e, 0x5a3b, 0xa537, 0x59f3, 0xa4f0, 0x59ac, 0xa4aa,
-  0x5964, 0xa463, 0x591c, 0xa41d, 0x58d4, 0xa3d7, 0x588b, 0xa392,
-  0x5842, 0xa34c, 0x57f9, 0xa307, 0x57b0, 0xa2c2, 0x5767, 0xa27d,
-  0x571d, 0xa239, 0x56d4, 0xa1f5, 0x568a, 0xa1b0, 0x5640, 0xa16d,
-  0x55f5, 0xa129, 0x55ab, 0xa0e6, 0x5560, 0xa0a2, 0x5515, 0xa060,
-  0x54ca, 0xa01d, 0x547e, 0x9fda, 0x5433, 0x9f98, 0x53e7, 0x9f56,
-  0x539b, 0x9f14, 0x534e, 0x9ed3, 0x5302, 0x9e91, 0x52b5, 0x9e50,
-  0x5269, 0x9e0f, 0x521c, 0x9dcf, 0x51ce, 0x9d8f, 0x5181, 0x9d4e,
-  0x5133, 0x9d0e, 0x50e5, 0x9ccf, 0x5097, 0x9c8f, 0x5049, 0x9c50,
-  0x4ffb, 0x9c11, 0x4fac, 0x9bd3, 0x4f5e, 0x9b94, 0x4f0f, 0x9b56,
-  0x4ebf, 0x9b18, 0x4e70, 0x9ada, 0x4e21, 0x9a9d, 0x4dd1, 0x9a60,
-  0x4d81, 0x9a23, 0x4d31, 0x99e6, 0x4ce1, 0x99a9, 0x4c90, 0x996d,
-  0x4c3f, 0x9931, 0x4bef, 0x98f5, 0x4b9e, 0x98ba, 0x4b4c, 0x987e,
-  0x4afb, 0x9843, 0x4aa9, 0x9809, 0x4a58, 0x97ce, 0x4a06, 0x9794,
-  0x49b4, 0x975a, 0x4961, 0x9720, 0x490f, 0x96e7, 0x48bc, 0x96ad,
-  0x4869, 0x9674, 0x4816, 0x963c, 0x47c3, 0x9603, 0x4770, 0x95cb,
-  0x471c, 0x9593, 0x46c9, 0x955b, 0x4675, 0x9524, 0x4621, 0x94ed,
-  0x45cd, 0x94b6, 0x4578, 0x947f, 0x4524, 0x9448, 0x44cf, 0x9412,
-  0x447a, 0x93dc, 0x4425, 0x93a7, 0x43d0, 0x9371, 0x437b, 0x933c,
-  0x4325, 0x9307, 0x42d0, 0x92d3, 0x427a, 0x929e, 0x4224, 0x926a,
-  0x41ce, 0x9236, 0x4177, 0x9203, 0x4121, 0x91d0, 0x40ca, 0x919d,
-  0x4073, 0x916a, 0x401d, 0x9137, 0x3fc5, 0x9105, 0x3f6e, 0x90d3,
-  0x3f17, 0x90a1, 0x3ebf, 0x9070, 0x3e68, 0x903f, 0x3e10, 0x900e,
-  0x3db8, 0x8fdd, 0x3d60, 0x8fad, 0x3d07, 0x8f7d, 0x3caf, 0x8f4d,
-  0x3c56, 0x8f1e, 0x3bfd, 0x8eee, 0x3ba5, 0x8ebf, 0x3b4c, 0x8e91,
-  0x3af2, 0x8e62, 0x3a99, 0x8e34, 0x3a40, 0x8e06, 0x39e6, 0x8dd9,
-  0x398c, 0x8dab, 0x3932, 0x8d7e, 0x38d8, 0x8d51, 0x387e, 0x8d25,
-  0x3824, 0x8cf9, 0x37ca, 0x8ccd, 0x376f, 0x8ca1, 0x3714, 0x8c76,
-  0x36ba, 0x8c4b, 0x365f, 0x8c20, 0x3604, 0x8bf5, 0x35a8, 0x8bcb,
-  0x354d, 0x8ba1, 0x34f2, 0x8b77, 0x3496, 0x8b4e, 0x343a, 0x8b25,
-  0x33de, 0x8afc, 0x3382, 0x8ad3, 0x3326, 0x8aab, 0x32ca, 0x8a83,
-  0x326e, 0x8a5b, 0x3211, 0x8a34, 0x31b5, 0x8a0c, 0x3158, 0x89e5,
-  0x30fb, 0x89bf, 0x309e, 0x8998, 0x3041, 0x8972, 0x2fe4, 0x894d,
-  0x2f87, 0x8927, 0x2f29, 0x8902, 0x2ecc, 0x88dd, 0x2e6e, 0x88b9,
-  0x2e11, 0x8894, 0x2db3, 0x8870, 0x2d55, 0x884c, 0x2cf7, 0x8829,
-  0x2c98, 0x8806, 0x2c3a, 0x87e3, 0x2bdc, 0x87c0, 0x2b7d, 0x879e,
-  0x2b1f, 0x877c, 0x2ac0, 0x875a, 0x2a61, 0x8739, 0x2a02, 0x8718,
-  0x29a3, 0x86f7, 0x2944, 0x86d6, 0x28e5, 0x86b6, 0x2886, 0x8696,
-  0x2826, 0x8676, 0x27c7, 0x8657, 0x2767, 0x8638, 0x2707, 0x8619,
-  0x26a8, 0x85fb, 0x2648, 0x85dc, 0x25e8, 0x85be, 0x2588, 0x85a1,
-  0x2528, 0x8583, 0x24c7, 0x8566, 0x2467, 0x854a, 0x2407, 0x852d,
-  0x23a6, 0x8511, 0x2345, 0x84f5, 0x22e5, 0x84da, 0x2284, 0x84be,
-  0x2223, 0x84a3, 0x21c2, 0x8489, 0x2161, 0x846e, 0x2100, 0x8454,
-  0x209f, 0x843b, 0x203e, 0x8421, 0x1fdc, 0x8408, 0x1f7b, 0x83ef,
-  0x1f19, 0x83d7, 0x1eb8, 0x83be, 0x1e56, 0x83a6, 0x1df5, 0x838f,
-  0x1d93, 0x8377, 0x1d31, 0x8360, 0x1ccf, 0x8349, 0x1c6d, 0x8333,
-  0x1c0b, 0x831d, 0x1ba9, 0x8307, 0x1b47, 0x82f1, 0x1ae4, 0x82dc,
-  0x1a82, 0x82c7, 0x1a20, 0x82b2, 0x19bd, 0x829e, 0x195b, 0x828a,
-  0x18f8, 0x8276, 0x1896, 0x8263, 0x1833, 0x8250, 0x17d0, 0x823d,
-  0x176d, 0x822a, 0x170a, 0x8218, 0x16a8, 0x8206, 0x1645, 0x81f4,
-  0x15e2, 0x81e3, 0x157f, 0x81d2, 0x151b, 0x81c1, 0x14b8, 0x81b1,
-  0x1455, 0x81a1, 0x13f2, 0x8191, 0x138e, 0x8181, 0x132b, 0x8172,
-  0x12c8, 0x8163, 0x1264, 0x8155, 0x1201, 0x8146, 0x119d, 0x8138,
-  0x1139, 0x812b, 0x10d6, 0x811d, 0x1072, 0x8110, 0x100e, 0x8103,
-  0xfab, 0x80f7, 0xf47, 0x80eb, 0xee3, 0x80df, 0xe7f, 0x80d3,
-  0xe1b, 0x80c8, 0xdb7, 0x80bd, 0xd53, 0x80b3, 0xcef, 0x80a8,
-  0xc8b, 0x809e, 0xc27, 0x8095, 0xbc3, 0x808b, 0xb5f, 0x8082,
-  0xafb, 0x8079, 0xa97, 0x8071, 0xa33, 0x8069, 0x9ce, 0x8061,
-  0x96a, 0x8059, 0x906, 0x8052, 0x8a2, 0x804b, 0x83d, 0x8044,
-  0x7d9, 0x803e, 0x775, 0x8038, 0x710, 0x8032, 0x6ac, 0x802d,
-  0x647, 0x8028, 0x5e3, 0x8023, 0x57f, 0x801f, 0x51a, 0x801b,
-  0x4b6, 0x8017, 0x451, 0x8013, 0x3ed, 0x8010, 0x388, 0x800d,
-  0x324, 0x800a, 0x2bf, 0x8008, 0x25b, 0x8006, 0x1f6, 0x8004,
-  0x192, 0x8003, 0x12d, 0x8002, 0xc9, 0x8001, 0x64, 0x8001,
-};
-
-static const q15_t ALIGN4 WeightsQ15_2048[4096] = {
-  0x7fff, 0x0, 0x7fff, 0xffe7, 0x7fff, 0xffce, 0x7fff, 0xffb5,
-  0x7fff, 0xff9c, 0x7fff, 0xff83, 0x7fff, 0xff6a, 0x7fff, 0xff51,
-  0x7fff, 0xff37, 0x7fff, 0xff1e, 0x7fff, 0xff05, 0x7ffe, 0xfeec,
-  0x7ffe, 0xfed3, 0x7ffe, 0xfeba, 0x7ffe, 0xfea1, 0x7ffd, 0xfe88,
-  0x7ffd, 0xfe6e, 0x7ffd, 0xfe55, 0x7ffc, 0xfe3c, 0x7ffc, 0xfe23,
-  0x7ffc, 0xfe0a, 0x7ffb, 0xfdf1, 0x7ffb, 0xfdd8, 0x7ffa, 0xfdbe,
-  0x7ffa, 0xfda5, 0x7ff9, 0xfd8c, 0x7ff9, 0xfd73, 0x7ff8, 0xfd5a,
-  0x7ff8, 0xfd41, 0x7ff7, 0xfd28, 0x7ff7, 0xfd0f, 0x7ff6, 0xfcf5,
-  0x7ff6, 0xfcdc, 0x7ff5, 0xfcc3, 0x7ff4, 0xfcaa, 0x7ff4, 0xfc91,
-  0x7ff3, 0xfc78, 0x7ff2, 0xfc5f, 0x7ff2, 0xfc46, 0x7ff1, 0xfc2c,
-  0x7ff0, 0xfc13, 0x7fef, 0xfbfa, 0x7fee, 0xfbe1, 0x7fee, 0xfbc8,
-  0x7fed, 0xfbaf, 0x7fec, 0xfb96, 0x7feb, 0xfb7d, 0x7fea, 0xfb64,
-  0x7fe9, 0xfb4a, 0x7fe8, 0xfb31, 0x7fe7, 0xfb18, 0x7fe6, 0xfaff,
-  0x7fe5, 0xfae6, 0x7fe4, 0xfacd, 0x7fe3, 0xfab4, 0x7fe2, 0xfa9b,
-  0x7fe1, 0xfa81, 0x7fe0, 0xfa68, 0x7fdf, 0xfa4f, 0x7fde, 0xfa36,
-  0x7fdd, 0xfa1d, 0x7fdc, 0xfa04, 0x7fda, 0xf9eb, 0x7fd9, 0xf9d2,
-  0x7fd8, 0xf9b9, 0x7fd7, 0xf9a0, 0x7fd6, 0xf986, 0x7fd4, 0xf96d,
-  0x7fd3, 0xf954, 0x7fd2, 0xf93b, 0x7fd0, 0xf922, 0x7fcf, 0xf909,
-  0x7fce, 0xf8f0, 0x7fcc, 0xf8d7, 0x7fcb, 0xf8be, 0x7fc9, 0xf8a5,
-  0x7fc8, 0xf88b, 0x7fc6, 0xf872, 0x7fc5, 0xf859, 0x7fc3, 0xf840,
-  0x7fc2, 0xf827, 0x7fc0, 0xf80e, 0x7fbf, 0xf7f5, 0x7fbd, 0xf7dc,
-  0x7fbc, 0xf7c3, 0x7fba, 0xf7aa, 0x7fb8, 0xf791, 0x7fb7, 0xf778,
-  0x7fb5, 0xf75e, 0x7fb3, 0xf745, 0x7fb1, 0xf72c, 0x7fb0, 0xf713,
-  0x7fae, 0xf6fa, 0x7fac, 0xf6e1, 0x7faa, 0xf6c8, 0x7fa9, 0xf6af,
-  0x7fa7, 0xf696, 0x7fa5, 0xf67d, 0x7fa3, 0xf664, 0x7fa1, 0xf64b,
-  0x7f9f, 0xf632, 0x7f9d, 0xf619, 0x7f9b, 0xf600, 0x7f99, 0xf5e7,
-  0x7f97, 0xf5cd, 0x7f95, 0xf5b4, 0x7f93, 0xf59b, 0x7f91, 0xf582,
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-  0x3824, 0x8cf9, 0x380d, 0x8cee, 0x37f7, 0x8ce3, 0x37e0, 0x8cd8,
-  0x37ca, 0x8ccd, 0x37b3, 0x8cc2, 0x379c, 0x8cb7, 0x3786, 0x8cac,
-  0x376f, 0x8ca1, 0x3758, 0x8c96, 0x3742, 0x8c8b, 0x372b, 0x8c81,
-  0x3714, 0x8c76, 0x36fe, 0x8c6b, 0x36e7, 0x8c60, 0x36d0, 0x8c55,
-  0x36ba, 0x8c4b, 0x36a3, 0x8c40, 0x368c, 0x8c35, 0x3675, 0x8c2a,
-  0x365f, 0x8c20, 0x3648, 0x8c15, 0x3631, 0x8c0a, 0x361a, 0x8c00,
-  0x3604, 0x8bf5, 0x35ed, 0x8beb, 0x35d6, 0x8be0, 0x35bf, 0x8bd5,
-  0x35a8, 0x8bcb, 0x3592, 0x8bc0, 0x357b, 0x8bb6, 0x3564, 0x8bab,
-  0x354d, 0x8ba1, 0x3536, 0x8b96, 0x351f, 0x8b8c, 0x3508, 0x8b82,
-  0x34f2, 0x8b77, 0x34db, 0x8b6d, 0x34c4, 0x8b62, 0x34ad, 0x8b58,
-  0x3496, 0x8b4e, 0x347f, 0x8b43, 0x3468, 0x8b39, 0x3451, 0x8b2f,
-  0x343a, 0x8b25, 0x3423, 0x8b1a, 0x340c, 0x8b10, 0x33f5, 0x8b06,
-  0x33de, 0x8afc, 0x33c7, 0x8af1, 0x33b0, 0x8ae7, 0x3399, 0x8add,
-  0x3382, 0x8ad3, 0x336b, 0x8ac9, 0x3354, 0x8abf, 0x333d, 0x8ab5,
-  0x3326, 0x8aab, 0x330f, 0x8aa1, 0x32f8, 0x8a97, 0x32e1, 0x8a8d,
-  0x32ca, 0x8a83, 0x32b3, 0x8a79, 0x329c, 0x8a6f, 0x3285, 0x8a65,
-  0x326e, 0x8a5b, 0x3257, 0x8a51, 0x3240, 0x8a47, 0x3228, 0x8a3d,
-  0x3211, 0x8a34, 0x31fa, 0x8a2a, 0x31e3, 0x8a20, 0x31cc, 0x8a16,
-  0x31b5, 0x8a0c, 0x319e, 0x8a03, 0x3186, 0x89f9, 0x316f, 0x89ef,
-  0x3158, 0x89e5, 0x3141, 0x89dc, 0x312a, 0x89d2, 0x3112, 0x89c8,
-  0x30fb, 0x89bf, 0x30e4, 0x89b5, 0x30cd, 0x89ac, 0x30b6, 0x89a2,
-  0x309e, 0x8998, 0x3087, 0x898f, 0x3070, 0x8985, 0x3059, 0x897c,
-  0x3041, 0x8972, 0x302a, 0x8969, 0x3013, 0x8960, 0x2ffb, 0x8956,
-  0x2fe4, 0x894d, 0x2fcd, 0x8943, 0x2fb5, 0x893a, 0x2f9e, 0x8931,
-  0x2f87, 0x8927, 0x2f6f, 0x891e, 0x2f58, 0x8915, 0x2f41, 0x890b,
-  0x2f29, 0x8902, 0x2f12, 0x88f9, 0x2efb, 0x88f0, 0x2ee3, 0x88e6,
-  0x2ecc, 0x88dd, 0x2eb5, 0x88d4, 0x2e9d, 0x88cb, 0x2e86, 0x88c2,
-  0x2e6e, 0x88b9, 0x2e57, 0x88af, 0x2e3f, 0x88a6, 0x2e28, 0x889d,
-  0x2e11, 0x8894, 0x2df9, 0x888b, 0x2de2, 0x8882, 0x2dca, 0x8879,
-  0x2db3, 0x8870, 0x2d9b, 0x8867, 0x2d84, 0x885e, 0x2d6c, 0x8855,
-  0x2d55, 0x884c, 0x2d3d, 0x8844, 0x2d26, 0x883b, 0x2d0e, 0x8832,
-  0x2cf7, 0x8829, 0x2cdf, 0x8820, 0x2cc8, 0x8817, 0x2cb0, 0x880f,
-  0x2c98, 0x8806, 0x2c81, 0x87fd, 0x2c69, 0x87f4, 0x2c52, 0x87ec,
-  0x2c3a, 0x87e3, 0x2c23, 0x87da, 0x2c0b, 0x87d2, 0x2bf3, 0x87c9,
-  0x2bdc, 0x87c0, 0x2bc4, 0x87b8, 0x2bad, 0x87af, 0x2b95, 0x87a7,
-  0x2b7d, 0x879e, 0x2b66, 0x8795, 0x2b4e, 0x878d, 0x2b36, 0x8784,
-  0x2b1f, 0x877c, 0x2b07, 0x8774, 0x2aef, 0x876b, 0x2ad8, 0x8763,
-  0x2ac0, 0x875a, 0x2aa8, 0x8752, 0x2a91, 0x874a, 0x2a79, 0x8741,
-  0x2a61, 0x8739, 0x2a49, 0x8731, 0x2a32, 0x8728, 0x2a1a, 0x8720,
-  0x2a02, 0x8718, 0x29eb, 0x870f, 0x29d3, 0x8707, 0x29bb, 0x86ff,
-  0x29a3, 0x86f7, 0x298b, 0x86ef, 0x2974, 0x86e7, 0x295c, 0x86de,
-  0x2944, 0x86d6, 0x292c, 0x86ce, 0x2915, 0x86c6, 0x28fd, 0x86be,
-  0x28e5, 0x86b6, 0x28cd, 0x86ae, 0x28b5, 0x86a6, 0x289d, 0x869e,
-  0x2886, 0x8696, 0x286e, 0x868e, 0x2856, 0x8686, 0x283e, 0x867e,
-  0x2826, 0x8676, 0x280e, 0x866e, 0x27f6, 0x8667, 0x27df, 0x865f,
-  0x27c7, 0x8657, 0x27af, 0x864f, 0x2797, 0x8647, 0x277f, 0x8640,
-  0x2767, 0x8638, 0x274f, 0x8630, 0x2737, 0x8628, 0x271f, 0x8621,
-  0x2707, 0x8619, 0x26ef, 0x8611, 0x26d8, 0x860a, 0x26c0, 0x8602,
-  0x26a8, 0x85fb, 0x2690, 0x85f3, 0x2678, 0x85eb, 0x2660, 0x85e4,
-  0x2648, 0x85dc, 0x2630, 0x85d5, 0x2618, 0x85cd, 0x2600, 0x85c6,
-  0x25e8, 0x85be, 0x25d0, 0x85b7, 0x25b8, 0x85b0, 0x25a0, 0x85a8,
-  0x2588, 0x85a1, 0x2570, 0x8599, 0x2558, 0x8592, 0x2540, 0x858b,
-  0x2528, 0x8583, 0x250f, 0x857c, 0x24f7, 0x8575, 0x24df, 0x856e,
-  0x24c7, 0x8566, 0x24af, 0x855f, 0x2497, 0x8558, 0x247f, 0x8551,
-  0x2467, 0x854a, 0x244f, 0x8543, 0x2437, 0x853b, 0x241f, 0x8534,
-  0x2407, 0x852d, 0x23ee, 0x8526, 0x23d6, 0x851f, 0x23be, 0x8518,
-  0x23a6, 0x8511, 0x238e, 0x850a, 0x2376, 0x8503, 0x235e, 0x84fc,
-  0x2345, 0x84f5, 0x232d, 0x84ee, 0x2315, 0x84e7, 0x22fd, 0x84e1,
-  0x22e5, 0x84da, 0x22cd, 0x84d3, 0x22b4, 0x84cc, 0x229c, 0x84c5,
-  0x2284, 0x84be, 0x226c, 0x84b8, 0x2254, 0x84b1, 0x223b, 0x84aa,
-  0x2223, 0x84a3, 0x220b, 0x849d, 0x21f3, 0x8496, 0x21da, 0x848f,
-  0x21c2, 0x8489, 0x21aa, 0x8482, 0x2192, 0x847c, 0x2179, 0x8475,
-  0x2161, 0x846e, 0x2149, 0x8468, 0x2131, 0x8461, 0x2118, 0x845b,
-  0x2100, 0x8454, 0x20e8, 0x844e, 0x20d0, 0x8447, 0x20b7, 0x8441,
-  0x209f, 0x843b, 0x2087, 0x8434, 0x206e, 0x842e, 0x2056, 0x8427,
-  0x203e, 0x8421, 0x2025, 0x841b, 0x200d, 0x8415, 0x1ff5, 0x840e,
-  0x1fdc, 0x8408, 0x1fc4, 0x8402, 0x1fac, 0x83fb, 0x1f93, 0x83f5,
-  0x1f7b, 0x83ef, 0x1f63, 0x83e9, 0x1f4a, 0x83e3, 0x1f32, 0x83dd,
-  0x1f19, 0x83d7, 0x1f01, 0x83d0, 0x1ee9, 0x83ca, 0x1ed0, 0x83c4,
-  0x1eb8, 0x83be, 0x1ea0, 0x83b8, 0x1e87, 0x83b2, 0x1e6f, 0x83ac,
-  0x1e56, 0x83a6, 0x1e3e, 0x83a0, 0x1e25, 0x839a, 0x1e0d, 0x8394,
-  0x1df5, 0x838f, 0x1ddc, 0x8389, 0x1dc4, 0x8383, 0x1dab, 0x837d,
-  0x1d93, 0x8377, 0x1d7a, 0x8371, 0x1d62, 0x836c, 0x1d49, 0x8366,
-  0x1d31, 0x8360, 0x1d18, 0x835a, 0x1d00, 0x8355, 0x1ce8, 0x834f,
-  0x1ccf, 0x8349, 0x1cb7, 0x8344, 0x1c9e, 0x833e, 0x1c86, 0x8338,
-  0x1c6d, 0x8333, 0x1c55, 0x832d, 0x1c3c, 0x8328, 0x1c24, 0x8322,
-  0x1c0b, 0x831d, 0x1bf2, 0x8317, 0x1bda, 0x8312, 0x1bc1, 0x830c,
-  0x1ba9, 0x8307, 0x1b90, 0x8301, 0x1b78, 0x82fc, 0x1b5f, 0x82f7,
-  0x1b47, 0x82f1, 0x1b2e, 0x82ec, 0x1b16, 0x82e7, 0x1afd, 0x82e1,
-  0x1ae4, 0x82dc, 0x1acc, 0x82d7, 0x1ab3, 0x82d1, 0x1a9b, 0x82cc,
-  0x1a82, 0x82c7, 0x1a6a, 0x82c2, 0x1a51, 0x82bd, 0x1a38, 0x82b7,
-  0x1a20, 0x82b2, 0x1a07, 0x82ad, 0x19ef, 0x82a8, 0x19d6, 0x82a3,
-  0x19bd, 0x829e, 0x19a5, 0x8299, 0x198c, 0x8294, 0x1973, 0x828f,
-  0x195b, 0x828a, 0x1942, 0x8285, 0x192a, 0x8280, 0x1911, 0x827b,
-  0x18f8, 0x8276, 0x18e0, 0x8271, 0x18c7, 0x826c, 0x18ae, 0x8268,
-  0x1896, 0x8263, 0x187d, 0x825e, 0x1864, 0x8259, 0x184c, 0x8254,
-  0x1833, 0x8250, 0x181a, 0x824b, 0x1802, 0x8246, 0x17e9, 0x8241,
-  0x17d0, 0x823d, 0x17b7, 0x8238, 0x179f, 0x8233, 0x1786, 0x822f,
-  0x176d, 0x822a, 0x1755, 0x8226, 0x173c, 0x8221, 0x1723, 0x821c,
-  0x170a, 0x8218, 0x16f2, 0x8213, 0x16d9, 0x820f, 0x16c0, 0x820a,
-  0x16a8, 0x8206, 0x168f, 0x8201, 0x1676, 0x81fd, 0x165d, 0x81f9,
-  0x1645, 0x81f4, 0x162c, 0x81f0, 0x1613, 0x81ec, 0x15fa, 0x81e7,
-  0x15e2, 0x81e3, 0x15c9, 0x81df, 0x15b0, 0x81da, 0x1597, 0x81d6,
-  0x157f, 0x81d2, 0x1566, 0x81ce, 0x154d, 0x81c9, 0x1534, 0x81c5,
-  0x151b, 0x81c1, 0x1503, 0x81bd, 0x14ea, 0x81b9, 0x14d1, 0x81b5,
-  0x14b8, 0x81b1, 0x149f, 0x81ad, 0x1487, 0x81a9, 0x146e, 0x81a5,
-  0x1455, 0x81a1, 0x143c, 0x819d, 0x1423, 0x8199, 0x140b, 0x8195,
-  0x13f2, 0x8191, 0x13d9, 0x818d, 0x13c0, 0x8189, 0x13a7, 0x8185,
-  0x138e, 0x8181, 0x1376, 0x817d, 0x135d, 0x817a, 0x1344, 0x8176,
-  0x132b, 0x8172, 0x1312, 0x816e, 0x12f9, 0x816b, 0x12e0, 0x8167,
-  0x12c8, 0x8163, 0x12af, 0x815f, 0x1296, 0x815c, 0x127d, 0x8158,
-  0x1264, 0x8155, 0x124b, 0x8151, 0x1232, 0x814d, 0x1219, 0x814a,
-  0x1201, 0x8146, 0x11e8, 0x8143, 0x11cf, 0x813f, 0x11b6, 0x813c,
-  0x119d, 0x8138, 0x1184, 0x8135, 0x116b, 0x8131, 0x1152, 0x812e,
-  0x1139, 0x812b, 0x1121, 0x8127, 0x1108, 0x8124, 0x10ef, 0x8121,
-  0x10d6, 0x811d, 0x10bd, 0x811a, 0x10a4, 0x8117, 0x108b, 0x8113,
-  0x1072, 0x8110, 0x1059, 0x810d, 0x1040, 0x810a, 0x1027, 0x8107,
-  0x100e, 0x8103, 0xff5, 0x8100, 0xfdd, 0x80fd, 0xfc4, 0x80fa,
-  0xfab, 0x80f7, 0xf92, 0x80f4, 0xf79, 0x80f1, 0xf60, 0x80ee,
-  0xf47, 0x80eb, 0xf2e, 0x80e8, 0xf15, 0x80e5, 0xefc, 0x80e2,
-  0xee3, 0x80df, 0xeca, 0x80dc, 0xeb1, 0x80d9, 0xe98, 0x80d6,
-  0xe7f, 0x80d3, 0xe66, 0x80d1, 0xe4d, 0x80ce, 0xe34, 0x80cb,
-  0xe1b, 0x80c8, 0xe02, 0x80c5, 0xde9, 0x80c3, 0xdd0, 0x80c0,
-  0xdb7, 0x80bd, 0xd9e, 0x80bb, 0xd85, 0x80b8, 0xd6c, 0x80b5,
-  0xd53, 0x80b3, 0xd3a, 0x80b0, 0xd21, 0x80ad, 0xd08, 0x80ab,
-  0xcef, 0x80a8, 0xcd6, 0x80a6, 0xcbd, 0x80a3, 0xca4, 0x80a1,
-  0xc8b, 0x809e, 0xc72, 0x809c, 0xc59, 0x8099, 0xc40, 0x8097,
-  0xc27, 0x8095, 0xc0e, 0x8092, 0xbf5, 0x8090, 0xbdc, 0x808e,
-  0xbc3, 0x808b, 0xbaa, 0x8089, 0xb91, 0x8087, 0xb78, 0x8084,
-  0xb5f, 0x8082, 0xb46, 0x8080, 0xb2d, 0x807e, 0xb14, 0x807b,
-  0xafb, 0x8079, 0xae2, 0x8077, 0xac9, 0x8075, 0xab0, 0x8073,
-  0xa97, 0x8071, 0xa7e, 0x806f, 0xa65, 0x806d, 0xa4c, 0x806b,
-  0xa33, 0x8069, 0xa19, 0x8067, 0xa00, 0x8065, 0x9e7, 0x8063,
-  0x9ce, 0x8061, 0x9b5, 0x805f, 0x99c, 0x805d, 0x983, 0x805b,
-  0x96a, 0x8059, 0x951, 0x8057, 0x938, 0x8056, 0x91f, 0x8054,
-  0x906, 0x8052, 0x8ed, 0x8050, 0x8d4, 0x804f, 0x8bb, 0x804d,
-  0x8a2, 0x804b, 0x888, 0x8049, 0x86f, 0x8048, 0x856, 0x8046,
-  0x83d, 0x8044, 0x824, 0x8043, 0x80b, 0x8041, 0x7f2, 0x8040,
-  0x7d9, 0x803e, 0x7c0, 0x803d, 0x7a7, 0x803b, 0x78e, 0x803a,
-  0x775, 0x8038, 0x75b, 0x8037, 0x742, 0x8035, 0x729, 0x8034,
-  0x710, 0x8032, 0x6f7, 0x8031, 0x6de, 0x8030, 0x6c5, 0x802e,
-  0x6ac, 0x802d, 0x693, 0x802c, 0x67a, 0x802a, 0x660, 0x8029,
-  0x647, 0x8028, 0x62e, 0x8027, 0x615, 0x8026, 0x5fc, 0x8024,
-  0x5e3, 0x8023, 0x5ca, 0x8022, 0x5b1, 0x8021, 0x598, 0x8020,
-  0x57f, 0x801f, 0x565, 0x801e, 0x54c, 0x801d, 0x533, 0x801c,
-  0x51a, 0x801b, 0x501, 0x801a, 0x4e8, 0x8019, 0x4cf, 0x8018,
-  0x4b6, 0x8017, 0x49c, 0x8016, 0x483, 0x8015, 0x46a, 0x8014,
-  0x451, 0x8013, 0x438, 0x8012, 0x41f, 0x8012, 0x406, 0x8011,
-  0x3ed, 0x8010, 0x3d4, 0x800f, 0x3ba, 0x800e, 0x3a1, 0x800e,
-  0x388, 0x800d, 0x36f, 0x800c, 0x356, 0x800c, 0x33d, 0x800b,
-  0x324, 0x800a, 0x30b, 0x800a, 0x2f1, 0x8009, 0x2d8, 0x8009,
-  0x2bf, 0x8008, 0x2a6, 0x8008, 0x28d, 0x8007, 0x274, 0x8007,
-  0x25b, 0x8006, 0x242, 0x8006, 0x228, 0x8005, 0x20f, 0x8005,
-  0x1f6, 0x8004, 0x1dd, 0x8004, 0x1c4, 0x8004, 0x1ab, 0x8003,
-  0x192, 0x8003, 0x178, 0x8003, 0x15f, 0x8002, 0x146, 0x8002,
-  0x12d, 0x8002, 0x114, 0x8002, 0xfb, 0x8001, 0xe2, 0x8001,
-  0xc9, 0x8001, 0xaf, 0x8001, 0x96, 0x8001, 0x7d, 0x8001,
-  0x64, 0x8001, 0x4b, 0x8001, 0x32, 0x8001, 0x19, 0x8001,
-};
-
-static const q15_t ALIGN4 WeightsQ15_8192[16384] = {
-  0x7fff, 0x0, 0x7fff, 0xfffa, 0x7fff, 0xfff4, 0x7fff, 0xffee,
-  0x7fff, 0xffe7, 0x7fff, 0xffe1, 0x7fff, 0xffdb, 0x7fff, 0xffd5,
-  0x7fff, 0xffce, 0x7fff, 0xffc8, 0x7fff, 0xffc2, 0x7fff, 0xffbb,
-  0x7fff, 0xffb5, 0x7fff, 0xffaf, 0x7fff, 0xffa9, 0x7fff, 0xffa2,
-  0x7fff, 0xff9c, 0x7fff, 0xff96, 0x7fff, 0xff8f, 0x7fff, 0xff89,
-  0x7fff, 0xff83, 0x7fff, 0xff7d, 0x7fff, 0xff76, 0x7fff, 0xff70,
-  0x7fff, 0xff6a, 0x7fff, 0xff63, 0x7fff, 0xff5d, 0x7fff, 0xff57,
-  0x7fff, 0xff51, 0x7fff, 0xff4a, 0x7fff, 0xff44, 0x7fff, 0xff3e,
-  0x7fff, 0xff37, 0x7fff, 0xff31, 0x7fff, 0xff2b, 0x7fff, 0xff25,
-  0x7fff, 0xff1e, 0x7fff, 0xff18, 0x7fff, 0xff12, 0x7fff, 0xff0b,
-  0x7fff, 0xff05, 0x7ffe, 0xfeff, 0x7ffe, 0xfef9, 0x7ffe, 0xfef2,
-  0x7ffe, 0xfeec, 0x7ffe, 0xfee6, 0x7ffe, 0xfedf, 0x7ffe, 0xfed9,
-  0x7ffe, 0xfed3, 0x7ffe, 0xfecd, 0x7ffe, 0xfec6, 0x7ffe, 0xfec0,
-  0x7ffe, 0xfeba, 0x7ffe, 0xfeb3, 0x7ffe, 0xfead, 0x7ffe, 0xfea7,
-  0x7ffe, 0xfea1, 0x7ffe, 0xfe9a, 0x7ffd, 0xfe94, 0x7ffd, 0xfe8e,
-  0x7ffd, 0xfe88, 0x7ffd, 0xfe81, 0x7ffd, 0xfe7b, 0x7ffd, 0xfe75,
-  0x7ffd, 0xfe6e, 0x7ffd, 0xfe68, 0x7ffd, 0xfe62, 0x7ffd, 0xfe5c,
-  0x7ffd, 0xfe55, 0x7ffd, 0xfe4f, 0x7ffd, 0xfe49, 0x7ffc, 0xfe42,
-  0x7ffc, 0xfe3c, 0x7ffc, 0xfe36, 0x7ffc, 0xfe30, 0x7ffc, 0xfe29,
-  0x7ffc, 0xfe23, 0x7ffc, 0xfe1d, 0x7ffc, 0xfe16, 0x7ffc, 0xfe10,
-  0x7ffc, 0xfe0a, 0x7ffc, 0xfe04, 0x7ffb, 0xfdfd, 0x7ffb, 0xfdf7,
-  0x7ffb, 0xfdf1, 0x7ffb, 0xfdea, 0x7ffb, 0xfde4, 0x7ffb, 0xfdde,
-  0x7ffb, 0xfdd8, 0x7ffb, 0xfdd1, 0x7ffb, 0xfdcb, 0x7ffb, 0xfdc5,
-  0x7ffa, 0xfdbe, 0x7ffa, 0xfdb8, 0x7ffa, 0xfdb2, 0x7ffa, 0xfdac,
-  0x7ffa, 0xfda5, 0x7ffa, 0xfd9f, 0x7ffa, 0xfd99, 0x7ffa, 0xfd93,
-  0x7ff9, 0xfd8c, 0x7ff9, 0xfd86, 0x7ff9, 0xfd80, 0x7ff9, 0xfd79,
-  0x7ff9, 0xfd73, 0x7ff9, 0xfd6d, 0x7ff9, 0xfd67, 0x7ff9, 0xfd60,
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-  0x7ff6, 0xfcdc, 0x7ff5, 0xfcd6, 0x7ff5, 0xfcd0, 0x7ff5, 0xfcc9,
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-  0x7fed, 0xfbaf, 0x7fed, 0xfba9, 0x7fec, 0xfba2, 0x7fec, 0xfb9c,
-  0x7fec, 0xfb96, 0x7fec, 0xfb8f, 0x7fec, 0xfb89, 0x7feb, 0xfb83,
-  0x7feb, 0xfb7d, 0x7feb, 0xfb76, 0x7feb, 0xfb70, 0x7fea, 0xfb6a,
-  0x7fea, 0xfb64, 0x7fea, 0xfb5d, 0x7fea, 0xfb57, 0x7fea, 0xfb51,
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-  0x7fe6, 0xfaff, 0x7fe6, 0xfaf9, 0x7fe6, 0xfaf3, 0x7fe6, 0xfaec,
-  0x7fe5, 0xfae6, 0x7fe5, 0xfae0, 0x7fe5, 0xfad9, 0x7fe5, 0xfad3,
-  0x7fe4, 0xfacd, 0x7fe4, 0xfac7, 0x7fe4, 0xfac0, 0x7fe4, 0xfaba,
-  0x7fe3, 0xfab4, 0x7fe3, 0xfaad, 0x7fe3, 0xfaa7, 0x7fe3, 0xfaa1,
-  0x7fe2, 0xfa9b, 0x7fe2, 0xfa94, 0x7fe2, 0xfa8e, 0x7fe2, 0xfa88,
-  0x7fe1, 0xfa81, 0x7fe1, 0xfa7b, 0x7fe1, 0xfa75, 0x7fe0, 0xfa6f,
-  0x7fe0, 0xfa68, 0x7fe0, 0xfa62, 0x7fe0, 0xfa5c, 0x7fdf, 0xfa56,
-  0x7fdf, 0xfa4f, 0x7fdf, 0xfa49, 0x7fdf, 0xfa43, 0x7fde, 0xfa3c,
-  0x7fde, 0xfa36, 0x7fde, 0xfa30, 0x7fdd, 0xfa2a, 0x7fdd, 0xfa23,
-  0x7fdd, 0xfa1d, 0x7fdd, 0xfa17, 0x7fdc, 0xfa11, 0x7fdc, 0xfa0a,
-  0x7fdc, 0xfa04, 0x7fdb, 0xf9fe, 0x7fdb, 0xf9f7, 0x7fdb, 0xf9f1,
-  0x7fda, 0xf9eb, 0x7fda, 0xf9e5, 0x7fda, 0xf9de, 0x7fda, 0xf9d8,
-  0x7fd9, 0xf9d2, 0x7fd9, 0xf9cb, 0x7fd9, 0xf9c5, 0x7fd8, 0xf9bf,
-  0x7fd8, 0xf9b9, 0x7fd8, 0xf9b2, 0x7fd7, 0xf9ac, 0x7fd7, 0xf9a6,
-  0x7fd7, 0xf9a0, 0x7fd6, 0xf999, 0x7fd6, 0xf993, 0x7fd6, 0xf98d,
-  0x7fd6, 0xf986, 0x7fd5, 0xf980, 0x7fd5, 0xf97a, 0x7fd5, 0xf974,
-  0x7fd4, 0xf96d, 0x7fd4, 0xf967, 0x7fd4, 0xf961, 0x7fd3, 0xf95b,
-  0x7fd3, 0xf954, 0x7fd3, 0xf94e, 0x7fd2, 0xf948, 0x7fd2, 0xf941,
-  0x7fd2, 0xf93b, 0x7fd1, 0xf935, 0x7fd1, 0xf92f, 0x7fd1, 0xf928,
-  0x7fd0, 0xf922, 0x7fd0, 0xf91c, 0x7fd0, 0xf916, 0x7fcf, 0xf90f,
-  0x7fcf, 0xf909, 0x7fcf, 0xf903, 0x7fce, 0xf8fc, 0x7fce, 0xf8f6,
-  0x7fce, 0xf8f0, 0x7fcd, 0xf8ea, 0x7fcd, 0xf8e3, 0x7fcd, 0xf8dd,
-  0x7fcc, 0xf8d7, 0x7fcc, 0xf8d0, 0x7fcb, 0xf8ca, 0x7fcb, 0xf8c4,
-  0x7fcb, 0xf8be, 0x7fca, 0xf8b7, 0x7fca, 0xf8b1, 0x7fca, 0xf8ab,
-  0x7fc9, 0xf8a5, 0x7fc9, 0xf89e, 0x7fc9, 0xf898, 0x7fc8, 0xf892,
-  0x7fc8, 0xf88b, 0x7fc7, 0xf885, 0x7fc7, 0xf87f, 0x7fc7, 0xf879,
-  0x7fc6, 0xf872, 0x7fc6, 0xf86c, 0x7fc6, 0xf866, 0x7fc5, 0xf860,
-  0x7fc5, 0xf859, 0x7fc5, 0xf853, 0x7fc4, 0xf84d, 0x7fc4, 0xf846,
-  0x7fc3, 0xf840, 0x7fc3, 0xf83a, 0x7fc3, 0xf834, 0x7fc2, 0xf82d,
-  0x7fc2, 0xf827, 0x7fc1, 0xf821, 0x7fc1, 0xf81b, 0x7fc1, 0xf814,
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-  0x7fbd, 0xf7dc, 0x7fbd, 0xf7d6, 0x7fbc, 0xf7cf, 0x7fbc, 0xf7c9,
-  0x7fbc, 0xf7c3, 0x7fbb, 0xf7bd, 0x7fbb, 0xf7b6, 0x7fba, 0xf7b0,
-  0x7fba, 0xf7aa, 0x7fb9, 0xf7a3, 0x7fb9, 0xf79d, 0x7fb9, 0xf797,
-  0x7fb8, 0xf791, 0x7fb8, 0xf78a, 0x7fb7, 0xf784, 0x7fb7, 0xf77e,
-  0x7fb7, 0xf778, 0x7fb6, 0xf771, 0x7fb6, 0xf76b, 0x7fb5, 0xf765,
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-  0x7f1b, 0xf0eb, 0x7f1a, 0xf0e5, 0x7f1a, 0xf0df, 0x7f19, 0xf0d8,
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-  0x7f12, 0xf0a0, 0x7f11, 0xf09a, 0x7f11, 0xf094, 0x7f10, 0xf08d,
-  0x7f0f, 0xf087, 0x7f0e, 0xf081, 0x7f0e, 0xf07b, 0x7f0d, 0xf075,
-  0x7f0c, 0xf06e, 0x7f0b, 0xf068, 0x7f0b, 0xf062, 0x7f0a, 0xf05c,
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-  0x7efd, 0xeff2, 0x7efc, 0xefeb, 0x7efb, 0xefe5, 0x7efa, 0xefdf,
-  0x7ef9, 0xefd9, 0x7ef9, 0xefd2, 0x7ef8, 0xefcc, 0x7ef7, 0xefc6,
-  0x7ef6, 0xefc0, 0x7ef5, 0xefb9, 0x7ef5, 0xefb3, 0x7ef4, 0xefad,
-  0x7ef3, 0xefa7, 0x7ef2, 0xefa1, 0x7ef1, 0xef9a, 0x7ef1, 0xef94,
-  0x7ef0, 0xef8e, 0x7eef, 0xef88, 0x7eee, 0xef81, 0x7eed, 0xef7b,
-  0x7eed, 0xef75, 0x7eec, 0xef6f, 0x7eeb, 0xef68, 0x7eea, 0xef62,
-  0x7ee9, 0xef5c, 0x7ee9, 0xef56, 0x7ee8, 0xef50, 0x7ee7, 0xef49,
-  0x7ee6, 0xef43, 0x7ee5, 0xef3d, 0x7ee4, 0xef37, 0x7ee4, 0xef30,
-  0x7ee3, 0xef2a, 0x7ee2, 0xef24, 0x7ee1, 0xef1e, 0x7ee0, 0xef18,
-  0x7edf, 0xef11, 0x7edf, 0xef0b, 0x7ede, 0xef05, 0x7edd, 0xeeff,
-  0x7edc, 0xeef8, 0x7edb, 0xeef2, 0x7eda, 0xeeec, 0x7eda, 0xeee6,
-  0x7ed9, 0xeedf, 0x7ed8, 0xeed9, 0x7ed7, 0xeed3, 0x7ed6, 0xeecd,
-  0x7ed5, 0xeec7, 0x7ed5, 0xeec0, 0x7ed4, 0xeeba, 0x7ed3, 0xeeb4,
-  0x7ed2, 0xeeae, 0x7ed1, 0xeea7, 0x7ed0, 0xeea1, 0x7ecf, 0xee9b,
-  0x7ecf, 0xee95, 0x7ece, 0xee8f, 0x7ecd, 0xee88, 0x7ecc, 0xee82,
-  0x7ecb, 0xee7c, 0x7eca, 0xee76, 0x7ec9, 0xee6f, 0x7ec9, 0xee69,
-  0x7ec8, 0xee63, 0x7ec7, 0xee5d, 0x7ec6, 0xee57, 0x7ec5, 0xee50,
-  0x7ec4, 0xee4a, 0x7ec3, 0xee44, 0x7ec3, 0xee3e, 0x7ec2, 0xee37,
-  0x7ec1, 0xee31, 0x7ec0, 0xee2b, 0x7ebf, 0xee25, 0x7ebe, 0xee1f,
-  0x7ebd, 0xee18, 0x7ebc, 0xee12, 0x7ebb, 0xee0c, 0x7ebb, 0xee06,
-  0x7eba, 0xedff, 0x7eb9, 0xedf9, 0x7eb8, 0xedf3, 0x7eb7, 0xeded,
-  0x7eb6, 0xede7, 0x7eb5, 0xede0, 0x7eb4, 0xedda, 0x7eb4, 0xedd4,
-  0x7eb3, 0xedce, 0x7eb2, 0xedc7, 0x7eb1, 0xedc1, 0x7eb0, 0xedbb,
-  0x7eaf, 0xedb5, 0x7eae, 0xedaf, 0x7ead, 0xeda8, 0x7eac, 0xeda2,
-  0x7eab, 0xed9c, 0x7eab, 0xed96, 0x7eaa, 0xed8f, 0x7ea9, 0xed89,
-  0x7ea8, 0xed83, 0x7ea7, 0xed7d, 0x7ea6, 0xed77, 0x7ea5, 0xed70,
-  0x7ea4, 0xed6a, 0x7ea3, 0xed64, 0x7ea2, 0xed5e, 0x7ea1, 0xed58,
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-  0x100e, 0x8103, 0x1008, 0x8103, 0x1002, 0x8102, 0xffc, 0x8101,
-  0xff5, 0x8100, 0xfef, 0x80ff, 0xfe9, 0x80ff, 0xfe3, 0x80fe,
-  0xfdd, 0x80fd, 0xfd6, 0x80fc, 0xfd0, 0x80fc, 0xfca, 0x80fb,
-  0xfc4, 0x80fa, 0xfbd, 0x80f9, 0xfb7, 0x80f8, 0xfb1, 0x80f8,
-  0xfab, 0x80f7, 0xfa4, 0x80f6, 0xf9e, 0x80f5, 0xf98, 0x80f5,
-  0xf92, 0x80f4, 0xf8b, 0x80f3, 0xf85, 0x80f2, 0xf7f, 0x80f2,
-  0xf79, 0x80f1, 0xf73, 0x80f0, 0xf6c, 0x80ef, 0xf66, 0x80ef,
-  0xf60, 0x80ee, 0xf5a, 0x80ed, 0xf53, 0x80ec, 0xf4d, 0x80ec,
-  0xf47, 0x80eb, 0xf41, 0x80ea, 0xf3a, 0x80e9, 0xf34, 0x80e9,
-  0xf2e, 0x80e8, 0xf28, 0x80e7, 0xf21, 0x80e6, 0xf1b, 0x80e6,
-  0xf15, 0x80e5, 0xf0f, 0x80e4, 0xf08, 0x80e3, 0xf02, 0x80e3,
-  0xefc, 0x80e2, 0xef6, 0x80e1, 0xef0, 0x80e0, 0xee9, 0x80e0,
-  0xee3, 0x80df, 0xedd, 0x80de, 0xed7, 0x80dd, 0xed0, 0x80dd,
-  0xeca, 0x80dc, 0xec4, 0x80db, 0xebe, 0x80db, 0xeb7, 0x80da,
-  0xeb1, 0x80d9, 0xeab, 0x80d8, 0xea5, 0x80d8, 0xe9e, 0x80d7,
-  0xe98, 0x80d6, 0xe92, 0x80d6, 0xe8c, 0x80d5, 0xe85, 0x80d4,
-  0xe7f, 0x80d3, 0xe79, 0x80d3, 0xe73, 0x80d2, 0xe6c, 0x80d1,
-  0xe66, 0x80d1, 0xe60, 0x80d0, 0xe5a, 0x80cf, 0xe53, 0x80ce,
-  0xe4d, 0x80ce, 0xe47, 0x80cd, 0xe41, 0x80cc, 0xe3a, 0x80cc,
-  0xe34, 0x80cb, 0xe2e, 0x80ca, 0xe28, 0x80ca, 0xe22, 0x80c9,
-  0xe1b, 0x80c8, 0xe15, 0x80c7, 0xe0f, 0x80c7, 0xe09, 0x80c6,
-  0xe02, 0x80c5, 0xdfc, 0x80c5, 0xdf6, 0x80c4, 0xdf0, 0x80c3,
-  0xde9, 0x80c3, 0xde3, 0x80c2, 0xddd, 0x80c1, 0xdd7, 0x80c1,
-  0xdd0, 0x80c0, 0xdca, 0x80bf, 0xdc4, 0x80bf, 0xdbe, 0x80be,
-  0xdb7, 0x80bd, 0xdb1, 0x80bd, 0xdab, 0x80bc, 0xda5, 0x80bb,
-  0xd9e, 0x80bb, 0xd98, 0x80ba, 0xd92, 0x80b9, 0xd8c, 0x80b9,
-  0xd85, 0x80b8, 0xd7f, 0x80b7, 0xd79, 0x80b7, 0xd73, 0x80b6,
-  0xd6c, 0x80b5, 0xd66, 0x80b5, 0xd60, 0x80b4, 0xd5a, 0x80b3,
-  0xd53, 0x80b3, 0xd4d, 0x80b2, 0xd47, 0x80b1, 0xd41, 0x80b1,
-  0xd3a, 0x80b0, 0xd34, 0x80af, 0xd2e, 0x80af, 0xd28, 0x80ae,
-  0xd21, 0x80ad, 0xd1b, 0x80ad, 0xd15, 0x80ac, 0xd0f, 0x80ab,
-  0xd08, 0x80ab, 0xd02, 0x80aa, 0xcfc, 0x80aa, 0xcf6, 0x80a9,
-  0xcef, 0x80a8, 0xce9, 0x80a8, 0xce3, 0x80a7, 0xcdd, 0x80a6,
-  0xcd6, 0x80a6, 0xcd0, 0x80a5, 0xcca, 0x80a5, 0xcc4, 0x80a4,
-  0xcbd, 0x80a3, 0xcb7, 0x80a3, 0xcb1, 0x80a2, 0xcab, 0x80a1,
-  0xca4, 0x80a1, 0xc9e, 0x80a0, 0xc98, 0x80a0, 0xc92, 0x809f,
-  0xc8b, 0x809e, 0xc85, 0x809e, 0xc7f, 0x809d, 0xc79, 0x809c,
-  0xc72, 0x809c, 0xc6c, 0x809b, 0xc66, 0x809b, 0xc60, 0x809a,
-  0xc59, 0x8099, 0xc53, 0x8099, 0xc4d, 0x8098, 0xc47, 0x8098,
-  0xc40, 0x8097, 0xc3a, 0x8096, 0xc34, 0x8096, 0xc2e, 0x8095,
-  0xc27, 0x8095, 0xc21, 0x8094, 0xc1b, 0x8093, 0xc14, 0x8093,
-  0xc0e, 0x8092, 0xc08, 0x8092, 0xc02, 0x8091, 0xbfb, 0x8090,
-  0xbf5, 0x8090, 0xbef, 0x808f, 0xbe9, 0x808f, 0xbe2, 0x808e,
-  0xbdc, 0x808e, 0xbd6, 0x808d, 0xbd0, 0x808c, 0xbc9, 0x808c,
-  0xbc3, 0x808b, 0xbbd, 0x808b, 0xbb7, 0x808a, 0xbb0, 0x8089,
-  0xbaa, 0x8089, 0xba4, 0x8088, 0xb9e, 0x8088, 0xb97, 0x8087,
-  0xb91, 0x8087, 0xb8b, 0x8086, 0xb85, 0x8085, 0xb7e, 0x8085,
-  0xb78, 0x8084, 0xb72, 0x8084, 0xb6c, 0x8083, 0xb65, 0x8083,
-  0xb5f, 0x8082, 0xb59, 0x8082, 0xb53, 0x8081, 0xb4c, 0x8080,
-  0xb46, 0x8080, 0xb40, 0x807f, 0xb3a, 0x807f, 0xb33, 0x807e,
-  0xb2d, 0x807e, 0xb27, 0x807d, 0xb20, 0x807d, 0xb1a, 0x807c,
-  0xb14, 0x807b, 0xb0e, 0x807b, 0xb07, 0x807a, 0xb01, 0x807a,
-  0xafb, 0x8079, 0xaf5, 0x8079, 0xaee, 0x8078, 0xae8, 0x8078,
-  0xae2, 0x8077, 0xadc, 0x8077, 0xad5, 0x8076, 0xacf, 0x8076,
-  0xac9, 0x8075, 0xac3, 0x8075, 0xabc, 0x8074, 0xab6, 0x8073,
-  0xab0, 0x8073, 0xaaa, 0x8072, 0xaa3, 0x8072, 0xa9d, 0x8071,
-  0xa97, 0x8071, 0xa90, 0x8070, 0xa8a, 0x8070, 0xa84, 0x806f,
-  0xa7e, 0x806f, 0xa77, 0x806e, 0xa71, 0x806e, 0xa6b, 0x806d,
-  0xa65, 0x806d, 0xa5e, 0x806c, 0xa58, 0x806c, 0xa52, 0x806b,
-  0xa4c, 0x806b, 0xa45, 0x806a, 0xa3f, 0x806a, 0xa39, 0x8069,
-  0xa33, 0x8069, 0xa2c, 0x8068, 0xa26, 0x8068, 0xa20, 0x8067,
-  0xa19, 0x8067, 0xa13, 0x8066, 0xa0d, 0x8066, 0xa07, 0x8065,
-  0xa00, 0x8065, 0x9fa, 0x8064, 0x9f4, 0x8064, 0x9ee, 0x8063,
-  0x9e7, 0x8063, 0x9e1, 0x8062, 0x9db, 0x8062, 0x9d5, 0x8061,
-  0x9ce, 0x8061, 0x9c8, 0x8060, 0x9c2, 0x8060, 0x9bc, 0x805f,
-  0x9b5, 0x805f, 0x9af, 0x805e, 0x9a9, 0x805e, 0x9a2, 0x805d,
-  0x99c, 0x805d, 0x996, 0x805d, 0x990, 0x805c, 0x989, 0x805c,
-  0x983, 0x805b, 0x97d, 0x805b, 0x977, 0x805a, 0x970, 0x805a,
-  0x96a, 0x8059, 0x964, 0x8059, 0x95e, 0x8058, 0x957, 0x8058,
-  0x951, 0x8057, 0x94b, 0x8057, 0x944, 0x8057, 0x93e, 0x8056,
-  0x938, 0x8056, 0x932, 0x8055, 0x92b, 0x8055, 0x925, 0x8054,
-  0x91f, 0x8054, 0x919, 0x8053, 0x912, 0x8053, 0x90c, 0x8052,
-  0x906, 0x8052, 0x900, 0x8052, 0x8f9, 0x8051, 0x8f3, 0x8051,
-  0x8ed, 0x8050, 0x8e6, 0x8050, 0x8e0, 0x804f, 0x8da, 0x804f,
-  0x8d4, 0x804f, 0x8cd, 0x804e, 0x8c7, 0x804e, 0x8c1, 0x804d,
-  0x8bb, 0x804d, 0x8b4, 0x804c, 0x8ae, 0x804c, 0x8a8, 0x804c,
-  0x8a2, 0x804b, 0x89b, 0x804b, 0x895, 0x804a, 0x88f, 0x804a,
-  0x888, 0x8049, 0x882, 0x8049, 0x87c, 0x8049, 0x876, 0x8048,
-  0x86f, 0x8048, 0x869, 0x8047, 0x863, 0x8047, 0x85d, 0x8047,
-  0x856, 0x8046, 0x850, 0x8046, 0x84a, 0x8045, 0x843, 0x8045,
-  0x83d, 0x8044, 0x837, 0x8044, 0x831, 0x8044, 0x82a, 0x8043,
-  0x824, 0x8043, 0x81e, 0x8042, 0x818, 0x8042, 0x811, 0x8042,
-  0x80b, 0x8041, 0x805, 0x8041, 0x7fe, 0x8040, 0x7f8, 0x8040,
-  0x7f2, 0x8040, 0x7ec, 0x803f, 0x7e5, 0x803f, 0x7df, 0x803f,
-  0x7d9, 0x803e, 0x7d3, 0x803e, 0x7cc, 0x803d, 0x7c6, 0x803d,
-  0x7c0, 0x803d, 0x7ba, 0x803c, 0x7b3, 0x803c, 0x7ad, 0x803b,
-  0x7a7, 0x803b, 0x7a0, 0x803b, 0x79a, 0x803a, 0x794, 0x803a,
-  0x78e, 0x803a, 0x787, 0x8039, 0x781, 0x8039, 0x77b, 0x8039,
-  0x775, 0x8038, 0x76e, 0x8038, 0x768, 0x8037, 0x762, 0x8037,
-  0x75b, 0x8037, 0x755, 0x8036, 0x74f, 0x8036, 0x749, 0x8036,
-  0x742, 0x8035, 0x73c, 0x8035, 0x736, 0x8035, 0x730, 0x8034,
-  0x729, 0x8034, 0x723, 0x8033, 0x71d, 0x8033, 0x716, 0x8033,
-  0x710, 0x8032, 0x70a, 0x8032, 0x704, 0x8032, 0x6fd, 0x8031,
-  0x6f7, 0x8031, 0x6f1, 0x8031, 0x6ea, 0x8030, 0x6e4, 0x8030,
-  0x6de, 0x8030, 0x6d8, 0x802f, 0x6d1, 0x802f, 0x6cb, 0x802f,
-  0x6c5, 0x802e, 0x6bf, 0x802e, 0x6b8, 0x802e, 0x6b2, 0x802d,
-  0x6ac, 0x802d, 0x6a5, 0x802d, 0x69f, 0x802c, 0x699, 0x802c,
-  0x693, 0x802c, 0x68c, 0x802b, 0x686, 0x802b, 0x680, 0x802b,
-  0x67a, 0x802a, 0x673, 0x802a, 0x66d, 0x802a, 0x667, 0x802a,
-  0x660, 0x8029, 0x65a, 0x8029, 0x654, 0x8029, 0x64e, 0x8028,
-  0x647, 0x8028, 0x641, 0x8028, 0x63b, 0x8027, 0x635, 0x8027,
-  0x62e, 0x8027, 0x628, 0x8026, 0x622, 0x8026, 0x61b, 0x8026,
-  0x615, 0x8026, 0x60f, 0x8025, 0x609, 0x8025, 0x602, 0x8025,
-  0x5fc, 0x8024, 0x5f6, 0x8024, 0x5ef, 0x8024, 0x5e9, 0x8023,
-  0x5e3, 0x8023, 0x5dd, 0x8023, 0x5d6, 0x8023, 0x5d0, 0x8022,
-  0x5ca, 0x8022, 0x5c4, 0x8022, 0x5bd, 0x8021, 0x5b7, 0x8021,
-  0x5b1, 0x8021, 0x5aa, 0x8021, 0x5a4, 0x8020, 0x59e, 0x8020,
-  0x598, 0x8020, 0x591, 0x8020, 0x58b, 0x801f, 0x585, 0x801f,
-  0x57f, 0x801f, 0x578, 0x801e, 0x572, 0x801e, 0x56c, 0x801e,
-  0x565, 0x801e, 0x55f, 0x801d, 0x559, 0x801d, 0x553, 0x801d,
-  0x54c, 0x801d, 0x546, 0x801c, 0x540, 0x801c, 0x539, 0x801c,
-  0x533, 0x801c, 0x52d, 0x801b, 0x527, 0x801b, 0x520, 0x801b,
-  0x51a, 0x801b, 0x514, 0x801a, 0x50d, 0x801a, 0x507, 0x801a,
-  0x501, 0x801a, 0x4fb, 0x8019, 0x4f4, 0x8019, 0x4ee, 0x8019,
-  0x4e8, 0x8019, 0x4e2, 0x8018, 0x4db, 0x8018, 0x4d5, 0x8018,
-  0x4cf, 0x8018, 0x4c8, 0x8017, 0x4c2, 0x8017, 0x4bc, 0x8017,
-  0x4b6, 0x8017, 0x4af, 0x8016, 0x4a9, 0x8016, 0x4a3, 0x8016,
-  0x49c, 0x8016, 0x496, 0x8016, 0x490, 0x8015, 0x48a, 0x8015,
-  0x483, 0x8015, 0x47d, 0x8015, 0x477, 0x8014, 0x471, 0x8014,
-  0x46a, 0x8014, 0x464, 0x8014, 0x45e, 0x8014, 0x457, 0x8013,
-  0x451, 0x8013, 0x44b, 0x8013, 0x445, 0x8013, 0x43e, 0x8013,
-  0x438, 0x8012, 0x432, 0x8012, 0x42b, 0x8012, 0x425, 0x8012,
-  0x41f, 0x8012, 0x419, 0x8011, 0x412, 0x8011, 0x40c, 0x8011,
-  0x406, 0x8011, 0x3ff, 0x8011, 0x3f9, 0x8010, 0x3f3, 0x8010,
-  0x3ed, 0x8010, 0x3e6, 0x8010, 0x3e0, 0x8010, 0x3da, 0x800f,
-  0x3d4, 0x800f, 0x3cd, 0x800f, 0x3c7, 0x800f, 0x3c1, 0x800f,
-  0x3ba, 0x800e, 0x3b4, 0x800e, 0x3ae, 0x800e, 0x3a8, 0x800e,
-  0x3a1, 0x800e, 0x39b, 0x800e, 0x395, 0x800d, 0x38e, 0x800d,
-  0x388, 0x800d, 0x382, 0x800d, 0x37c, 0x800d, 0x375, 0x800c,
-  0x36f, 0x800c, 0x369, 0x800c, 0x362, 0x800c, 0x35c, 0x800c,
-  0x356, 0x800c, 0x350, 0x800b, 0x349, 0x800b, 0x343, 0x800b,
-  0x33d, 0x800b, 0x337, 0x800b, 0x330, 0x800b, 0x32a, 0x800b,
-  0x324, 0x800a, 0x31d, 0x800a, 0x317, 0x800a, 0x311, 0x800a,
-  0x30b, 0x800a, 0x304, 0x800a, 0x2fe, 0x8009, 0x2f8, 0x8009,
-  0x2f1, 0x8009, 0x2eb, 0x8009, 0x2e5, 0x8009, 0x2df, 0x8009,
-  0x2d8, 0x8009, 0x2d2, 0x8008, 0x2cc, 0x8008, 0x2c5, 0x8008,
-  0x2bf, 0x8008, 0x2b9, 0x8008, 0x2b3, 0x8008, 0x2ac, 0x8008,
-  0x2a6, 0x8008, 0x2a0, 0x8007, 0x299, 0x8007, 0x293, 0x8007,
-  0x28d, 0x8007, 0x287, 0x8007, 0x280, 0x8007, 0x27a, 0x8007,
-  0x274, 0x8007, 0x26d, 0x8006, 0x267, 0x8006, 0x261, 0x8006,
-  0x25b, 0x8006, 0x254, 0x8006, 0x24e, 0x8006, 0x248, 0x8006,
-  0x242, 0x8006, 0x23b, 0x8005, 0x235, 0x8005, 0x22f, 0x8005,
-  0x228, 0x8005, 0x222, 0x8005, 0x21c, 0x8005, 0x216, 0x8005,
-  0x20f, 0x8005, 0x209, 0x8005, 0x203, 0x8005, 0x1fc, 0x8004,
-  0x1f6, 0x8004, 0x1f0, 0x8004, 0x1ea, 0x8004, 0x1e3, 0x8004,
-  0x1dd, 0x8004, 0x1d7, 0x8004, 0x1d0, 0x8004, 0x1ca, 0x8004,
-  0x1c4, 0x8004, 0x1be, 0x8004, 0x1b7, 0x8003, 0x1b1, 0x8003,
-  0x1ab, 0x8003, 0x1a4, 0x8003, 0x19e, 0x8003, 0x198, 0x8003,
-  0x192, 0x8003, 0x18b, 0x8003, 0x185, 0x8003, 0x17f, 0x8003,
-  0x178, 0x8003, 0x172, 0x8003, 0x16c, 0x8003, 0x166, 0x8002,
-  0x15f, 0x8002, 0x159, 0x8002, 0x153, 0x8002, 0x14d, 0x8002,
-  0x146, 0x8002, 0x140, 0x8002, 0x13a, 0x8002, 0x133, 0x8002,
-  0x12d, 0x8002, 0x127, 0x8002, 0x121, 0x8002, 0x11a, 0x8002,
-  0x114, 0x8002, 0x10e, 0x8002, 0x107, 0x8002, 0x101, 0x8002,
-  0xfb, 0x8001, 0xf5, 0x8001, 0xee, 0x8001, 0xe8, 0x8001,
-  0xe2, 0x8001, 0xdb, 0x8001, 0xd5, 0x8001, 0xcf, 0x8001,
-  0xc9, 0x8001, 0xc2, 0x8001, 0xbc, 0x8001, 0xb6, 0x8001,
-  0xaf, 0x8001, 0xa9, 0x8001, 0xa3, 0x8001, 0x9d, 0x8001,
-  0x96, 0x8001, 0x90, 0x8001, 0x8a, 0x8001, 0x83, 0x8001,
-  0x7d, 0x8001, 0x77, 0x8001, 0x71, 0x8001, 0x6a, 0x8001,
-  0x64, 0x8001, 0x5e, 0x8001, 0x57, 0x8001, 0x51, 0x8001,
-  0x4b, 0x8001, 0x45, 0x8001, 0x3e, 0x8001, 0x38, 0x8001,
-  0x32, 0x8001, 0x2b, 0x8001, 0x25, 0x8001, 0x1f, 0x8001,
-  0x19, 0x8001, 0x12, 0x8001, 0xc, 0x8001, 0x6, 0x8001,
-};
-
-
-/**    
-* \par    
-* cosFactor tables are generated using the formula : 
 cos_factors[n] = 2 * cos((2n+1)*pi/(4*N)) 
    
-* \par    
-* C command to generate the table    
-* 
    
-* for(i = 0; i< N; i++)    
-* {    
-*   cos_factors[i]= 2 * cos((2*i+1)*c/2);    
-* } 
    
-* \par    
-* where N is the number of factors to generate and c is pi/(2*N)    
-* \par    
-* Then converted to q15 format by multiplying with 2^31 and saturated if required.    
-    
-*/
-
-static const q15_t ALIGN4 cos_factorsQ15_128[128] = {
-  0x7fff, 0x7ffa, 0x7ff0, 0x7fe1, 0x7fce, 0x7fb5, 0x7f97, 0x7f75,
-  0x7f4d, 0x7f21, 0x7ef0, 0x7eba, 0x7e7f, 0x7e3f, 0x7dfa, 0x7db0,
-  0x7d62, 0x7d0f, 0x7cb7, 0x7c5a, 0x7bf8, 0x7b92, 0x7b26, 0x7ab6,
-  0x7a42, 0x79c8, 0x794a, 0x78c7, 0x7840, 0x77b4, 0x7723, 0x768e,
-  0x75f4, 0x7555, 0x74b2, 0x740b, 0x735f, 0x72af, 0x71fa, 0x7141,
-  0x7083, 0x6fc1, 0x6efb, 0x6e30, 0x6d62, 0x6c8f, 0x6bb8, 0x6adc,
-  0x69fd, 0x6919, 0x6832, 0x6746, 0x6657, 0x6563, 0x646c, 0x6371,
-  0x6271, 0x616f, 0x6068, 0x5f5e, 0x5e50, 0x5d3e, 0x5c29, 0x5b10,
-  0x59f3, 0x58d4, 0x57b0, 0x568a, 0x5560, 0x5433, 0x5302, 0x51ce,
-  0x5097, 0x4f5e, 0x4e21, 0x4ce1, 0x4b9e, 0x4a58, 0x490f, 0x47c3,
-  0x4675, 0x4524, 0x43d0, 0x427a, 0x4121, 0x3fc5, 0x3e68, 0x3d07,
-  0x3ba5, 0x3a40, 0x38d8, 0x376f, 0x3604, 0x3496, 0x3326, 0x31b5,
-  0x3041, 0x2ecc, 0x2d55, 0x2bdc, 0x2a61, 0x28e5, 0x2767, 0x25e8,
-  0x2467, 0x22e5, 0x2161, 0x1fdc, 0x1e56, 0x1ccf, 0x1b47, 0x19bd,
-  0x1833, 0x16a8, 0x151b, 0x138e, 0x1201, 0x1072, 0xee3, 0xd53,
-  0xbc3, 0xa33, 0x8a2, 0x710, 0x57f, 0x3ed, 0x25b, 0xc9
-};
-
-static const q15_t ALIGN4 cos_factorsQ15_512[512] = {
-  0x7fff, 0x7fff, 0x7fff, 0x7ffe, 0x7ffc, 0x7ffb, 0x7ff9, 0x7ff7,
-  0x7ff4, 0x7ff2, 0x7fee, 0x7feb, 0x7fe7, 0x7fe3, 0x7fdf, 0x7fda,
-  0x7fd6, 0x7fd0, 0x7fcb, 0x7fc5, 0x7fbf, 0x7fb8, 0x7fb1, 0x7faa,
-  0x7fa3, 0x7f9b, 0x7f93, 0x7f8b, 0x7f82, 0x7f79, 0x7f70, 0x7f67,
-  0x7f5d, 0x7f53, 0x7f48, 0x7f3d, 0x7f32, 0x7f27, 0x7f1b, 0x7f0f,
-  0x7f03, 0x7ef6, 0x7ee9, 0x7edc, 0x7ecf, 0x7ec1, 0x7eb3, 0x7ea4,
-  0x7e95, 0x7e86, 0x7e77, 0x7e67, 0x7e57, 0x7e47, 0x7e37, 0x7e26,
-  0x7e14, 0x7e03, 0x7df1, 0x7ddf, 0x7dcd, 0x7dba, 0x7da7, 0x7d94,
-  0x7d80, 0x7d6c, 0x7d58, 0x7d43, 0x7d2f, 0x7d19, 0x7d04, 0x7cee,
-  0x7cd8, 0x7cc2, 0x7cab, 0x7c94, 0x7c7d, 0x7c66, 0x7c4e, 0x7c36,
-  0x7c1d, 0x7c05, 0x7beb, 0x7bd2, 0x7bb9, 0x7b9f, 0x7b84, 0x7b6a,
-  0x7b4f, 0x7b34, 0x7b19, 0x7afd, 0x7ae1, 0x7ac5, 0x7aa8, 0x7a8b,
-  0x7a6e, 0x7a50, 0x7a33, 0x7a15, 0x79f6, 0x79d8, 0x79b9, 0x7999,
-  0x797a, 0x795a, 0x793a, 0x7919, 0x78f9, 0x78d8, 0x78b6, 0x7895,
-  0x7873, 0x7851, 0x782e, 0x780c, 0x77e9, 0x77c5, 0x77a2, 0x777e,
-  0x775a, 0x7735, 0x7710, 0x76eb, 0x76c6, 0x76a0, 0x767b, 0x7654,
-  0x762e, 0x7607, 0x75e0, 0x75b9, 0x7591, 0x7569, 0x7541, 0x7519,
-  0x74f0, 0x74c7, 0x749e, 0x7474, 0x744a, 0x7420, 0x73f6, 0x73cb,
-  0x73a0, 0x7375, 0x7349, 0x731d, 0x72f1, 0x72c5, 0x7298, 0x726b,
-  0x723e, 0x7211, 0x71e3, 0x71b5, 0x7186, 0x7158, 0x7129, 0x70fa,
-  0x70cb, 0x709b, 0x706b, 0x703b, 0x700a, 0x6fda, 0x6fa9, 0x6f77,
-  0x6f46, 0x6f14, 0x6ee2, 0x6eaf, 0x6e7d, 0x6e4a, 0x6e17, 0x6de3,
-  0x6db0, 0x6d7c, 0x6d48, 0x6d13, 0x6cde, 0x6ca9, 0x6c74, 0x6c3f,
-  0x6c09, 0x6bd3, 0x6b9c, 0x6b66, 0x6b2f, 0x6af8, 0x6ac1, 0x6a89,
-  0x6a51, 0x6a19, 0x69e1, 0x69a8, 0x696f, 0x6936, 0x68fd, 0x68c3,
-  0x6889, 0x684f, 0x6815, 0x67da, 0x679f, 0x6764, 0x6729, 0x66ed,
-  0x66b1, 0x6675, 0x6639, 0x65fc, 0x65bf, 0x6582, 0x6545, 0x6507,
-  0x64c9, 0x648b, 0x644d, 0x640e, 0x63cf, 0x6390, 0x6351, 0x6311,
-  0x62d2, 0x6292, 0x6251, 0x6211, 0x61d0, 0x618f, 0x614e, 0x610d,
-  0x60cb, 0x6089, 0x6047, 0x6004, 0x5fc2, 0x5f7f, 0x5f3c, 0x5ef9,
-  0x5eb5, 0x5e71, 0x5e2d, 0x5de9, 0x5da5, 0x5d60, 0x5d1b, 0x5cd6,
-  0x5c91, 0x5c4b, 0x5c06, 0x5bc0, 0x5b79, 0x5b33, 0x5aec, 0x5aa5,
-  0x5a5e, 0x5a17, 0x59d0, 0x5988, 0x5940, 0x58f8, 0x58af, 0x5867,
-  0x581e, 0x57d5, 0x578c, 0x5742, 0x56f9, 0x56af, 0x5665, 0x561a,
-  0x55d0, 0x5585, 0x553a, 0x54ef, 0x54a4, 0x5458, 0x540d, 0x53c1,
-  0x5375, 0x5328, 0x52dc, 0x528f, 0x5242, 0x51f5, 0x51a8, 0x515a,
-  0x510c, 0x50bf, 0x5070, 0x5022, 0x4fd4, 0x4f85, 0x4f36, 0x4ee7,
-  0x4e98, 0x4e48, 0x4df9, 0x4da9, 0x4d59, 0x4d09, 0x4cb8, 0x4c68,
-  0x4c17, 0x4bc6, 0x4b75, 0x4b24, 0x4ad2, 0x4a81, 0x4a2f, 0x49dd,
-  0x498a, 0x4938, 0x48e6, 0x4893, 0x4840, 0x47ed, 0x479a, 0x4746,
-  0x46f3, 0x469f, 0x464b, 0x45f7, 0x45a3, 0x454e, 0x44fa, 0x44a5,
-  0x4450, 0x43fb, 0x43a5, 0x4350, 0x42fa, 0x42a5, 0x424f, 0x41f9,
-  0x41a2, 0x414c, 0x40f6, 0x409f, 0x4048, 0x3ff1, 0x3f9a, 0x3f43,
-  0x3eeb, 0x3e93, 0x3e3c, 0x3de4, 0x3d8c, 0x3d33, 0x3cdb, 0x3c83,
-  0x3c2a, 0x3bd1, 0x3b78, 0x3b1f, 0x3ac6, 0x3a6c, 0x3a13, 0x39b9,
-  0x395f, 0x3906, 0x38ab, 0x3851, 0x37f7, 0x379c, 0x3742, 0x36e7,
-  0x368c, 0x3631, 0x35d6, 0x357b, 0x351f, 0x34c4, 0x3468, 0x340c,
-  0x33b0, 0x3354, 0x32f8, 0x329c, 0x3240, 0x31e3, 0x3186, 0x312a,
-  0x30cd, 0x3070, 0x3013, 0x2fb5, 0x2f58, 0x2efb, 0x2e9d, 0x2e3f,
-  0x2de2, 0x2d84, 0x2d26, 0x2cc8, 0x2c69, 0x2c0b, 0x2bad, 0x2b4e,
-  0x2aef, 0x2a91, 0x2a32, 0x29d3, 0x2974, 0x2915, 0x28b5, 0x2856,
-  0x27f6, 0x2797, 0x2737, 0x26d8, 0x2678, 0x2618, 0x25b8, 0x2558,
-  0x24f7, 0x2497, 0x2437, 0x23d6, 0x2376, 0x2315, 0x22b4, 0x2254,
-  0x21f3, 0x2192, 0x2131, 0x20d0, 0x206e, 0x200d, 0x1fac, 0x1f4a,
-  0x1ee9, 0x1e87, 0x1e25, 0x1dc4, 0x1d62, 0x1d00, 0x1c9e, 0x1c3c,
-  0x1bda, 0x1b78, 0x1b16, 0x1ab3, 0x1a51, 0x19ef, 0x198c, 0x192a,
-  0x18c7, 0x1864, 0x1802, 0x179f, 0x173c, 0x16d9, 0x1676, 0x1613,
-  0x15b0, 0x154d, 0x14ea, 0x1487, 0x1423, 0x13c0, 0x135d, 0x12f9,
-  0x1296, 0x1232, 0x11cf, 0x116b, 0x1108, 0x10a4, 0x1040, 0xfdd,
-  0xf79, 0xf15, 0xeb1, 0xe4d, 0xde9, 0xd85, 0xd21, 0xcbd,
-  0xc59, 0xbf5, 0xb91, 0xb2d, 0xac9, 0xa65, 0xa00, 0x99c,
-  0x938, 0x8d4, 0x86f, 0x80b, 0x7a7, 0x742, 0x6de, 0x67a,
-  0x615, 0x5b1, 0x54c, 0x4e8, 0x483, 0x41f, 0x3ba, 0x356,
-  0x2f1, 0x28d, 0x228, 0x1c4, 0x15f, 0xfb, 0x96, 0x32,
-};
-
-static const q15_t ALIGN4 cos_factorsQ15_2048[2048] = {
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7fff, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffd, 0x7ffd,
-  0x7ffd, 0x7ffd, 0x7ffc, 0x7ffc, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffa,
-  0x7ffa, 0x7ff9, 0x7ff9, 0x7ff8, 0x7ff8, 0x7ff7, 0x7ff7, 0x7ff6,
-  0x7ff5, 0x7ff5, 0x7ff4, 0x7ff3, 0x7ff3, 0x7ff2, 0x7ff1, 0x7ff0,
-  0x7ff0, 0x7fef, 0x7fee, 0x7fed, 0x7fec, 0x7fec, 0x7feb, 0x7fea,
-  0x7fe9, 0x7fe8, 0x7fe7, 0x7fe6, 0x7fe5, 0x7fe4, 0x7fe3, 0x7fe2,
-  0x7fe1, 0x7fe0, 0x7fdf, 0x7fdd, 0x7fdc, 0x7fdb, 0x7fda, 0x7fd9,
-  0x7fd7, 0x7fd6, 0x7fd5, 0x7fd4, 0x7fd2, 0x7fd1, 0x7fd0, 0x7fce,
-  0x7fcd, 0x7fcb, 0x7fca, 0x7fc9, 0x7fc7, 0x7fc6, 0x7fc4, 0x7fc3,
-  0x7fc1, 0x7fc0, 0x7fbe, 0x7fbc, 0x7fbb, 0x7fb9, 0x7fb7, 0x7fb6,
-  0x7fb4, 0x7fb2, 0x7fb1, 0x7faf, 0x7fad, 0x7fab, 0x7fa9, 0x7fa8,
-  0x7fa6, 0x7fa4, 0x7fa2, 0x7fa0, 0x7f9e, 0x7f9c, 0x7f9a, 0x7f98,
-  0x7f96, 0x7f94, 0x7f92, 0x7f90, 0x7f8e, 0x7f8c, 0x7f8a, 0x7f88,
-  0x7f86, 0x7f83, 0x7f81, 0x7f7f, 0x7f7d, 0x7f7b, 0x7f78, 0x7f76,
-  0x7f74, 0x7f71, 0x7f6f, 0x7f6d, 0x7f6a, 0x7f68, 0x7f65, 0x7f63,
-  0x7f60, 0x7f5e, 0x7f5b, 0x7f59, 0x7f56, 0x7f54, 0x7f51, 0x7f4f,
-  0x7f4c, 0x7f49, 0x7f47, 0x7f44, 0x7f41, 0x7f3f, 0x7f3c, 0x7f39,
-  0x7f36, 0x7f34, 0x7f31, 0x7f2e, 0x7f2b, 0x7f28, 0x7f25, 0x7f23,
-  0x7f20, 0x7f1d, 0x7f1a, 0x7f17, 0x7f14, 0x7f11, 0x7f0e, 0x7f0b,
-  0x7f08, 0x7f04, 0x7f01, 0x7efe, 0x7efb, 0x7ef8, 0x7ef5, 0x7ef1,
-  0x7eee, 0x7eeb, 0x7ee8, 0x7ee4, 0x7ee1, 0x7ede, 0x7eda, 0x7ed7,
-  0x7ed4, 0x7ed0, 0x7ecd, 0x7ec9, 0x7ec6, 0x7ec3, 0x7ebf, 0x7ebb,
-  0x7eb8, 0x7eb4, 0x7eb1, 0x7ead, 0x7eaa, 0x7ea6, 0x7ea2, 0x7e9f,
-  0x7e9b, 0x7e97, 0x7e94, 0x7e90, 0x7e8c, 0x7e88, 0x7e84, 0x7e81,
-  0x7e7d, 0x7e79, 0x7e75, 0x7e71, 0x7e6d, 0x7e69, 0x7e65, 0x7e61,
-  0x7e5d, 0x7e59, 0x7e55, 0x7e51, 0x7e4d, 0x7e49, 0x7e45, 0x7e41,
-  0x7e3d, 0x7e39, 0x7e34, 0x7e30, 0x7e2c, 0x7e28, 0x7e24, 0x7e1f,
-  0x7e1b, 0x7e17, 0x7e12, 0x7e0e, 0x7e0a, 0x7e05, 0x7e01, 0x7dfc,
-  0x7df8, 0x7df3, 0x7def, 0x7dea, 0x7de6, 0x7de1, 0x7ddd, 0x7dd8,
-  0x7dd4, 0x7dcf, 0x7dca, 0x7dc6, 0x7dc1, 0x7dbc, 0x7db8, 0x7db3,
-  0x7dae, 0x7da9, 0x7da5, 0x7da0, 0x7d9b, 0x7d96, 0x7d91, 0x7d8c,
-  0x7d87, 0x7d82, 0x7d7e, 0x7d79, 0x7d74, 0x7d6f, 0x7d6a, 0x7d65,
-  0x7d60, 0x7d5a, 0x7d55, 0x7d50, 0x7d4b, 0x7d46, 0x7d41, 0x7d3c,
-  0x7d36, 0x7d31, 0x7d2c, 0x7d27, 0x7d21, 0x7d1c, 0x7d17, 0x7d11,
-  0x7d0c, 0x7d07, 0x7d01, 0x7cfc, 0x7cf6, 0x7cf1, 0x7cec, 0x7ce6,
-  0x7ce1, 0x7cdb, 0x7cd5, 0x7cd0, 0x7cca, 0x7cc5, 0x7cbf, 0x7cb9,
-  0x7cb4, 0x7cae, 0x7ca8, 0x7ca3, 0x7c9d, 0x7c97, 0x7c91, 0x7c8c,
-  0x7c86, 0x7c80, 0x7c7a, 0x7c74, 0x7c6e, 0x7c69, 0x7c63, 0x7c5d,
-  0x7c57, 0x7c51, 0x7c4b, 0x7c45, 0x7c3f, 0x7c39, 0x7c33, 0x7c2d,
-  0x7c26, 0x7c20, 0x7c1a, 0x7c14, 0x7c0e, 0x7c08, 0x7c01, 0x7bfb,
-  0x7bf5, 0x7bef, 0x7be8, 0x7be2, 0x7bdc, 0x7bd5, 0x7bcf, 0x7bc9,
-  0x7bc2, 0x7bbc, 0x7bb5, 0x7baf, 0x7ba8, 0x7ba2, 0x7b9b, 0x7b95,
-  0x7b8e, 0x7b88, 0x7b81, 0x7b7a, 0x7b74, 0x7b6d, 0x7b67, 0x7b60,
-  0x7b59, 0x7b52, 0x7b4c, 0x7b45, 0x7b3e, 0x7b37, 0x7b31, 0x7b2a,
-  0x7b23, 0x7b1c, 0x7b15, 0x7b0e, 0x7b07, 0x7b00, 0x7af9, 0x7af2,
-  0x7aeb, 0x7ae4, 0x7add, 0x7ad6, 0x7acf, 0x7ac8, 0x7ac1, 0x7aba,
-  0x7ab3, 0x7aac, 0x7aa4, 0x7a9d, 0x7a96, 0x7a8f, 0x7a87, 0x7a80,
-  0x7a79, 0x7a72, 0x7a6a, 0x7a63, 0x7a5c, 0x7a54, 0x7a4d, 0x7a45,
-  0x7a3e, 0x7a36, 0x7a2f, 0x7a27, 0x7a20, 0x7a18, 0x7a11, 0x7a09,
-  0x7a02, 0x79fa, 0x79f2, 0x79eb, 0x79e3, 0x79db, 0x79d4, 0x79cc,
-  0x79c4, 0x79bc, 0x79b5, 0x79ad, 0x79a5, 0x799d, 0x7995, 0x798e,
-  0x7986, 0x797e, 0x7976, 0x796e, 0x7966, 0x795e, 0x7956, 0x794e,
-  0x7946, 0x793e, 0x7936, 0x792e, 0x7926, 0x791e, 0x7915, 0x790d,
-  0x7905, 0x78fd, 0x78f5, 0x78ec, 0x78e4, 0x78dc, 0x78d4, 0x78cb,
-  0x78c3, 0x78bb, 0x78b2, 0x78aa, 0x78a2, 0x7899, 0x7891, 0x7888,
-  0x7880, 0x7877, 0x786f, 0x7866, 0x785e, 0x7855, 0x784d, 0x7844,
-  0x783b, 0x7833, 0x782a, 0x7821, 0x7819, 0x7810, 0x7807, 0x77ff,
-  0x77f6, 0x77ed, 0x77e4, 0x77db, 0x77d3, 0x77ca, 0x77c1, 0x77b8,
-  0x77af, 0x77a6, 0x779d, 0x7794, 0x778b, 0x7782, 0x7779, 0x7770,
-  0x7767, 0x775e, 0x7755, 0x774c, 0x7743, 0x773a, 0x7731, 0x7727,
-  0x771e, 0x7715, 0x770c, 0x7703, 0x76f9, 0x76f0, 0x76e7, 0x76dd,
-  0x76d4, 0x76cb, 0x76c1, 0x76b8, 0x76af, 0x76a5, 0x769c, 0x7692,
-  0x7689, 0x767f, 0x7676, 0x766c, 0x7663, 0x7659, 0x7650, 0x7646,
-  0x763c, 0x7633, 0x7629, 0x761f, 0x7616, 0x760c, 0x7602, 0x75f9,
-  0x75ef, 0x75e5, 0x75db, 0x75d1, 0x75c8, 0x75be, 0x75b4, 0x75aa,
-  0x75a0, 0x7596, 0x758c, 0x7582, 0x7578, 0x756e, 0x7564, 0x755a,
-  0x7550, 0x7546, 0x753c, 0x7532, 0x7528, 0x751e, 0x7514, 0x7509,
-  0x74ff, 0x74f5, 0x74eb, 0x74e1, 0x74d6, 0x74cc, 0x74c2, 0x74b7,
-  0x74ad, 0x74a3, 0x7498, 0x748e, 0x7484, 0x7479, 0x746f, 0x7464,
-  0x745a, 0x744f, 0x7445, 0x743a, 0x7430, 0x7425, 0x741b, 0x7410,
-  0x7406, 0x73fb, 0x73f0, 0x73e6, 0x73db, 0x73d0, 0x73c6, 0x73bb,
-  0x73b0, 0x73a5, 0x739b, 0x7390, 0x7385, 0x737a, 0x736f, 0x7364,
-  0x7359, 0x734f, 0x7344, 0x7339, 0x732e, 0x7323, 0x7318, 0x730d,
-  0x7302, 0x72f7, 0x72ec, 0x72e1, 0x72d5, 0x72ca, 0x72bf, 0x72b4,
-  0x72a9, 0x729e, 0x7293, 0x7287, 0x727c, 0x7271, 0x7266, 0x725a,
-  0x724f, 0x7244, 0x7238, 0x722d, 0x7222, 0x7216, 0x720b, 0x71ff,
-  0x71f4, 0x71e9, 0x71dd, 0x71d2, 0x71c6, 0x71bb, 0x71af, 0x71a3,
-  0x7198, 0x718c, 0x7181, 0x7175, 0x7169, 0x715e, 0x7152, 0x7146,
-  0x713b, 0x712f, 0x7123, 0x7117, 0x710c, 0x7100, 0x70f4, 0x70e8,
-  0x70dc, 0x70d1, 0x70c5, 0x70b9, 0x70ad, 0x70a1, 0x7095, 0x7089,
-  0x707d, 0x7071, 0x7065, 0x7059, 0x704d, 0x7041, 0x7035, 0x7029,
-  0x701d, 0x7010, 0x7004, 0x6ff8, 0x6fec, 0x6fe0, 0x6fd3, 0x6fc7,
-  0x6fbb, 0x6faf, 0x6fa2, 0x6f96, 0x6f8a, 0x6f7d, 0x6f71, 0x6f65,
-  0x6f58, 0x6f4c, 0x6f3f, 0x6f33, 0x6f27, 0x6f1a, 0x6f0e, 0x6f01,
-  0x6ef5, 0x6ee8, 0x6edc, 0x6ecf, 0x6ec2, 0x6eb6, 0x6ea9, 0x6e9c,
-  0x6e90, 0x6e83, 0x6e76, 0x6e6a, 0x6e5d, 0x6e50, 0x6e44, 0x6e37,
-  0x6e2a, 0x6e1d, 0x6e10, 0x6e04, 0x6df7, 0x6dea, 0x6ddd, 0x6dd0,
-  0x6dc3, 0x6db6, 0x6da9, 0x6d9c, 0x6d8f, 0x6d82, 0x6d75, 0x6d68,
-  0x6d5b, 0x6d4e, 0x6d41, 0x6d34, 0x6d27, 0x6d1a, 0x6d0c, 0x6cff,
-  0x6cf2, 0x6ce5, 0x6cd8, 0x6cca, 0x6cbd, 0x6cb0, 0x6ca3, 0x6c95,
-  0x6c88, 0x6c7b, 0x6c6d, 0x6c60, 0x6c53, 0x6c45, 0x6c38, 0x6c2a,
-  0x6c1d, 0x6c0f, 0x6c02, 0x6bf5, 0x6be7, 0x6bd9, 0x6bcc, 0x6bbe,
-  0x6bb1, 0x6ba3, 0x6b96, 0x6b88, 0x6b7a, 0x6b6d, 0x6b5f, 0x6b51,
-  0x6b44, 0x6b36, 0x6b28, 0x6b1a, 0x6b0d, 0x6aff, 0x6af1, 0x6ae3,
-  0x6ad5, 0x6ac8, 0x6aba, 0x6aac, 0x6a9e, 0x6a90, 0x6a82, 0x6a74,
-  0x6a66, 0x6a58, 0x6a4a, 0x6a3c, 0x6a2e, 0x6a20, 0x6a12, 0x6a04,
-  0x69f6, 0x69e8, 0x69da, 0x69cb, 0x69bd, 0x69af, 0x69a1, 0x6993,
-  0x6985, 0x6976, 0x6968, 0x695a, 0x694b, 0x693d, 0x692f, 0x6921,
-  0x6912, 0x6904, 0x68f5, 0x68e7, 0x68d9, 0x68ca, 0x68bc, 0x68ad,
-  0x689f, 0x6890, 0x6882, 0x6873, 0x6865, 0x6856, 0x6848, 0x6839,
-  0x682b, 0x681c, 0x680d, 0x67ff, 0x67f0, 0x67e1, 0x67d3, 0x67c4,
-  0x67b5, 0x67a6, 0x6798, 0x6789, 0x677a, 0x676b, 0x675d, 0x674e,
-  0x673f, 0x6730, 0x6721, 0x6712, 0x6703, 0x66f4, 0x66e5, 0x66d6,
-  0x66c8, 0x66b9, 0x66aa, 0x669b, 0x668b, 0x667c, 0x666d, 0x665e,
-  0x664f, 0x6640, 0x6631, 0x6622, 0x6613, 0x6603, 0x65f4, 0x65e5,
-  0x65d6, 0x65c7, 0x65b7, 0x65a8, 0x6599, 0x658a, 0x657a, 0x656b,
-  0x655c, 0x654c, 0x653d, 0x652d, 0x651e, 0x650f, 0x64ff, 0x64f0,
-  0x64e0, 0x64d1, 0x64c1, 0x64b2, 0x64a2, 0x6493, 0x6483, 0x6474,
-  0x6464, 0x6454, 0x6445, 0x6435, 0x6426, 0x6416, 0x6406, 0x63f7,
-  0x63e7, 0x63d7, 0x63c7, 0x63b8, 0x63a8, 0x6398, 0x6388, 0x6378,
-  0x6369, 0x6359, 0x6349, 0x6339, 0x6329, 0x6319, 0x6309, 0x62f9,
-  0x62ea, 0x62da, 0x62ca, 0x62ba, 0x62aa, 0x629a, 0x628a, 0x627a,
-  0x6269, 0x6259, 0x6249, 0x6239, 0x6229, 0x6219, 0x6209, 0x61f9,
-  0x61e8, 0x61d8, 0x61c8, 0x61b8, 0x61a8, 0x6197, 0x6187, 0x6177,
-  0x6166, 0x6156, 0x6146, 0x6135, 0x6125, 0x6115, 0x6104, 0x60f4,
-  0x60e4, 0x60d3, 0x60c3, 0x60b2, 0x60a2, 0x6091, 0x6081, 0x6070,
-  0x6060, 0x604f, 0x603f, 0x602e, 0x601d, 0x600d, 0x5ffc, 0x5fec,
-  0x5fdb, 0x5fca, 0x5fba, 0x5fa9, 0x5f98, 0x5f87, 0x5f77, 0x5f66,
-  0x5f55, 0x5f44, 0x5f34, 0x5f23, 0x5f12, 0x5f01, 0x5ef0, 0x5edf,
-  0x5ecf, 0x5ebe, 0x5ead, 0x5e9c, 0x5e8b, 0x5e7a, 0x5e69, 0x5e58,
-  0x5e47, 0x5e36, 0x5e25, 0x5e14, 0x5e03, 0x5df2, 0x5de1, 0x5dd0,
-  0x5dbf, 0x5dad, 0x5d9c, 0x5d8b, 0x5d7a, 0x5d69, 0x5d58, 0x5d46,
-  0x5d35, 0x5d24, 0x5d13, 0x5d01, 0x5cf0, 0x5cdf, 0x5cce, 0x5cbc,
-  0x5cab, 0x5c9a, 0x5c88, 0x5c77, 0x5c66, 0x5c54, 0x5c43, 0x5c31,
-  0x5c20, 0x5c0e, 0x5bfd, 0x5beb, 0x5bda, 0x5bc8, 0x5bb7, 0x5ba5,
-  0x5b94, 0x5b82, 0x5b71, 0x5b5f, 0x5b4d, 0x5b3c, 0x5b2a, 0x5b19,
-  0x5b07, 0x5af5, 0x5ae4, 0x5ad2, 0x5ac0, 0x5aae, 0x5a9d, 0x5a8b,
-  0x5a79, 0x5a67, 0x5a56, 0x5a44, 0x5a32, 0x5a20, 0x5a0e, 0x59fc,
-  0x59ea, 0x59d9, 0x59c7, 0x59b5, 0x59a3, 0x5991, 0x597f, 0x596d,
-  0x595b, 0x5949, 0x5937, 0x5925, 0x5913, 0x5901, 0x58ef, 0x58dd,
-  0x58cb, 0x58b8, 0x58a6, 0x5894, 0x5882, 0x5870, 0x585e, 0x584b,
-  0x5839, 0x5827, 0x5815, 0x5803, 0x57f0, 0x57de, 0x57cc, 0x57b9,
-  0x57a7, 0x5795, 0x5783, 0x5770, 0x575e, 0x574b, 0x5739, 0x5727,
-  0x5714, 0x5702, 0x56ef, 0x56dd, 0x56ca, 0x56b8, 0x56a5, 0x5693,
-  0x5680, 0x566e, 0x565b, 0x5649, 0x5636, 0x5624, 0x5611, 0x55fe,
-  0x55ec, 0x55d9, 0x55c7, 0x55b4, 0x55a1, 0x558f, 0x557c, 0x5569,
-  0x5556, 0x5544, 0x5531, 0x551e, 0x550b, 0x54f9, 0x54e6, 0x54d3,
-  0x54c0, 0x54ad, 0x549a, 0x5488, 0x5475, 0x5462, 0x544f, 0x543c,
-  0x5429, 0x5416, 0x5403, 0x53f0, 0x53dd, 0x53ca, 0x53b7, 0x53a4,
-  0x5391, 0x537e, 0x536b, 0x5358, 0x5345, 0x5332, 0x531f, 0x530c,
-  0x52f8, 0x52e5, 0x52d2, 0x52bf, 0x52ac, 0x5299, 0x5285, 0x5272,
-  0x525f, 0x524c, 0x5238, 0x5225, 0x5212, 0x51ff, 0x51eb, 0x51d8,
-  0x51c5, 0x51b1, 0x519e, 0x518b, 0x5177, 0x5164, 0x5150, 0x513d,
-  0x512a, 0x5116, 0x5103, 0x50ef, 0x50dc, 0x50c8, 0x50b5, 0x50a1,
-  0x508e, 0x507a, 0x5067, 0x5053, 0x503f, 0x502c, 0x5018, 0x5005,
-  0x4ff1, 0x4fdd, 0x4fca, 0x4fb6, 0x4fa2, 0x4f8f, 0x4f7b, 0x4f67,
-  0x4f54, 0x4f40, 0x4f2c, 0x4f18, 0x4f05, 0x4ef1, 0x4edd, 0x4ec9,
-  0x4eb6, 0x4ea2, 0x4e8e, 0x4e7a, 0x4e66, 0x4e52, 0x4e3e, 0x4e2a,
-  0x4e17, 0x4e03, 0x4def, 0x4ddb, 0x4dc7, 0x4db3, 0x4d9f, 0x4d8b,
-  0x4d77, 0x4d63, 0x4d4f, 0x4d3b, 0x4d27, 0x4d13, 0x4cff, 0x4ceb,
-  0x4cd6, 0x4cc2, 0x4cae, 0x4c9a, 0x4c86, 0x4c72, 0x4c5e, 0x4c49,
-  0x4c35, 0x4c21, 0x4c0d, 0x4bf9, 0x4be4, 0x4bd0, 0x4bbc, 0x4ba8,
-  0x4b93, 0x4b7f, 0x4b6b, 0x4b56, 0x4b42, 0x4b2e, 0x4b19, 0x4b05,
-  0x4af1, 0x4adc, 0x4ac8, 0x4ab4, 0x4a9f, 0x4a8b, 0x4a76, 0x4a62,
-  0x4a4d, 0x4a39, 0x4a24, 0x4a10, 0x49fb, 0x49e7, 0x49d2, 0x49be,
-  0x49a9, 0x4995, 0x4980, 0x496c, 0x4957, 0x4942, 0x492e, 0x4919,
-  0x4905, 0x48f0, 0x48db, 0x48c7, 0x48b2, 0x489d, 0x4888, 0x4874,
-  0x485f, 0x484a, 0x4836, 0x4821, 0x480c, 0x47f7, 0x47e2, 0x47ce,
-  0x47b9, 0x47a4, 0x478f, 0x477a, 0x4765, 0x4751, 0x473c, 0x4727,
-  0x4712, 0x46fd, 0x46e8, 0x46d3, 0x46be, 0x46a9, 0x4694, 0x467f,
-  0x466a, 0x4655, 0x4640, 0x462b, 0x4616, 0x4601, 0x45ec, 0x45d7,
-  0x45c2, 0x45ad, 0x4598, 0x4583, 0x456e, 0x4559, 0x4544, 0x452e,
-  0x4519, 0x4504, 0x44ef, 0x44da, 0x44c5, 0x44af, 0x449a, 0x4485,
-  0x4470, 0x445a, 0x4445, 0x4430, 0x441b, 0x4405, 0x43f0, 0x43db,
-  0x43c5, 0x43b0, 0x439b, 0x4385, 0x4370, 0x435b, 0x4345, 0x4330,
-  0x431b, 0x4305, 0x42f0, 0x42da, 0x42c5, 0x42af, 0x429a, 0x4284,
-  0x426f, 0x425a, 0x4244, 0x422f, 0x4219, 0x4203, 0x41ee, 0x41d8,
-  0x41c3, 0x41ad, 0x4198, 0x4182, 0x416d, 0x4157, 0x4141, 0x412c,
-  0x4116, 0x4100, 0x40eb, 0x40d5, 0x40bf, 0x40aa, 0x4094, 0x407e,
-  0x4069, 0x4053, 0x403d, 0x4027, 0x4012, 0x3ffc, 0x3fe6, 0x3fd0,
-  0x3fbb, 0x3fa5, 0x3f8f, 0x3f79, 0x3f63, 0x3f4d, 0x3f38, 0x3f22,
-  0x3f0c, 0x3ef6, 0x3ee0, 0x3eca, 0x3eb4, 0x3e9e, 0x3e88, 0x3e73,
-  0x3e5d, 0x3e47, 0x3e31, 0x3e1b, 0x3e05, 0x3def, 0x3dd9, 0x3dc3,
-  0x3dad, 0x3d97, 0x3d81, 0x3d6b, 0x3d55, 0x3d3e, 0x3d28, 0x3d12,
-  0x3cfc, 0x3ce6, 0x3cd0, 0x3cba, 0x3ca4, 0x3c8e, 0x3c77, 0x3c61,
-  0x3c4b, 0x3c35, 0x3c1f, 0x3c09, 0x3bf2, 0x3bdc, 0x3bc6, 0x3bb0,
-  0x3b99, 0x3b83, 0x3b6d, 0x3b57, 0x3b40, 0x3b2a, 0x3b14, 0x3afe,
-  0x3ae7, 0x3ad1, 0x3abb, 0x3aa4, 0x3a8e, 0x3a78, 0x3a61, 0x3a4b,
-  0x3a34, 0x3a1e, 0x3a08, 0x39f1, 0x39db, 0x39c4, 0x39ae, 0x3998,
-  0x3981, 0x396b, 0x3954, 0x393e, 0x3927, 0x3911, 0x38fa, 0x38e4,
-  0x38cd, 0x38b7, 0x38a0, 0x388a, 0x3873, 0x385d, 0x3846, 0x382f,
-  0x3819, 0x3802, 0x37ec, 0x37d5, 0x37be, 0x37a8, 0x3791, 0x377a,
-  0x3764, 0x374d, 0x3736, 0x3720, 0x3709, 0x36f2, 0x36dc, 0x36c5,
-  0x36ae, 0x3698, 0x3681, 0x366a, 0x3653, 0x363d, 0x3626, 0x360f,
-  0x35f8, 0x35e1, 0x35cb, 0x35b4, 0x359d, 0x3586, 0x356f, 0x3558,
-  0x3542, 0x352b, 0x3514, 0x34fd, 0x34e6, 0x34cf, 0x34b8, 0x34a1,
-  0x348b, 0x3474, 0x345d, 0x3446, 0x342f, 0x3418, 0x3401, 0x33ea,
-  0x33d3, 0x33bc, 0x33a5, 0x338e, 0x3377, 0x3360, 0x3349, 0x3332,
-  0x331b, 0x3304, 0x32ed, 0x32d6, 0x32bf, 0x32a8, 0x3290, 0x3279,
-  0x3262, 0x324b, 0x3234, 0x321d, 0x3206, 0x31ef, 0x31d8, 0x31c0,
-  0x31a9, 0x3192, 0x317b, 0x3164, 0x314c, 0x3135, 0x311e, 0x3107,
-  0x30f0, 0x30d8, 0x30c1, 0x30aa, 0x3093, 0x307b, 0x3064, 0x304d,
-  0x3036, 0x301e, 0x3007, 0x2ff0, 0x2fd8, 0x2fc1, 0x2faa, 0x2f92,
-  0x2f7b, 0x2f64, 0x2f4c, 0x2f35, 0x2f1e, 0x2f06, 0x2eef, 0x2ed8,
-  0x2ec0, 0x2ea9, 0x2e91, 0x2e7a, 0x2e63, 0x2e4b, 0x2e34, 0x2e1c,
-  0x2e05, 0x2ded, 0x2dd6, 0x2dbe, 0x2da7, 0x2d8f, 0x2d78, 0x2d60,
-  0x2d49, 0x2d31, 0x2d1a, 0x2d02, 0x2ceb, 0x2cd3, 0x2cbc, 0x2ca4,
-  0x2c8d, 0x2c75, 0x2c5e, 0x2c46, 0x2c2e, 0x2c17, 0x2bff, 0x2be8,
-  0x2bd0, 0x2bb8, 0x2ba1, 0x2b89, 0x2b71, 0x2b5a, 0x2b42, 0x2b2b,
-  0x2b13, 0x2afb, 0x2ae4, 0x2acc, 0x2ab4, 0x2a9c, 0x2a85, 0x2a6d,
-  0x2a55, 0x2a3e, 0x2a26, 0x2a0e, 0x29f6, 0x29df, 0x29c7, 0x29af,
-  0x2997, 0x2980, 0x2968, 0x2950, 0x2938, 0x2920, 0x2909, 0x28f1,
-  0x28d9, 0x28c1, 0x28a9, 0x2892, 0x287a, 0x2862, 0x284a, 0x2832,
-  0x281a, 0x2802, 0x27eb, 0x27d3, 0x27bb, 0x27a3, 0x278b, 0x2773,
-  0x275b, 0x2743, 0x272b, 0x2713, 0x26fb, 0x26e4, 0x26cc, 0x26b4,
-  0x269c, 0x2684, 0x266c, 0x2654, 0x263c, 0x2624, 0x260c, 0x25f4,
-  0x25dc, 0x25c4, 0x25ac, 0x2594, 0x257c, 0x2564, 0x254c, 0x2534,
-  0x251c, 0x2503, 0x24eb, 0x24d3, 0x24bb, 0x24a3, 0x248b, 0x2473,
-  0x245b, 0x2443, 0x242b, 0x2413, 0x23fa, 0x23e2, 0x23ca, 0x23b2,
-  0x239a, 0x2382, 0x236a, 0x2352, 0x2339, 0x2321, 0x2309, 0x22f1,
-  0x22d9, 0x22c0, 0x22a8, 0x2290, 0x2278, 0x2260, 0x2247, 0x222f,
-  0x2217, 0x21ff, 0x21e7, 0x21ce, 0x21b6, 0x219e, 0x2186, 0x216d,
-  0x2155, 0x213d, 0x2125, 0x210c, 0x20f4, 0x20dc, 0x20c3, 0x20ab,
-  0x2093, 0x207a, 0x2062, 0x204a, 0x2032, 0x2019, 0x2001, 0x1fe9,
-  0x1fd0, 0x1fb8, 0x1f9f, 0x1f87, 0x1f6f, 0x1f56, 0x1f3e, 0x1f26,
-  0x1f0d, 0x1ef5, 0x1edd, 0x1ec4, 0x1eac, 0x1e93, 0x1e7b, 0x1e62,
-  0x1e4a, 0x1e32, 0x1e19, 0x1e01, 0x1de8, 0x1dd0, 0x1db7, 0x1d9f,
-  0x1d87, 0x1d6e, 0x1d56, 0x1d3d, 0x1d25, 0x1d0c, 0x1cf4, 0x1cdb,
-  0x1cc3, 0x1caa, 0x1c92, 0x1c79, 0x1c61, 0x1c48, 0x1c30, 0x1c17,
-  0x1bff, 0x1be6, 0x1bce, 0x1bb5, 0x1b9d, 0x1b84, 0x1b6c, 0x1b53,
-  0x1b3a, 0x1b22, 0x1b09, 0x1af1, 0x1ad8, 0x1ac0, 0x1aa7, 0x1a8e,
-  0x1a76, 0x1a5d, 0x1a45, 0x1a2c, 0x1a13, 0x19fb, 0x19e2, 0x19ca,
-  0x19b1, 0x1998, 0x1980, 0x1967, 0x194e, 0x1936, 0x191d, 0x1905,
-  0x18ec, 0x18d3, 0x18bb, 0x18a2, 0x1889, 0x1871, 0x1858, 0x183f,
-  0x1827, 0x180e, 0x17f5, 0x17dd, 0x17c4, 0x17ab, 0x1792, 0x177a,
-  0x1761, 0x1748, 0x1730, 0x1717, 0x16fe, 0x16e5, 0x16cd, 0x16b4,
-  0x169b, 0x1682, 0x166a, 0x1651, 0x1638, 0x161f, 0x1607, 0x15ee,
-  0x15d5, 0x15bc, 0x15a4, 0x158b, 0x1572, 0x1559, 0x1541, 0x1528,
-  0x150f, 0x14f6, 0x14dd, 0x14c5, 0x14ac, 0x1493, 0x147a, 0x1461,
-  0x1449, 0x1430, 0x1417, 0x13fe, 0x13e5, 0x13cc, 0x13b4, 0x139b,
-  0x1382, 0x1369, 0x1350, 0x1337, 0x131f, 0x1306, 0x12ed, 0x12d4,
-  0x12bb, 0x12a2, 0x1289, 0x1271, 0x1258, 0x123f, 0x1226, 0x120d,
-  0x11f4, 0x11db, 0x11c2, 0x11a9, 0x1191, 0x1178, 0x115f, 0x1146,
-  0x112d, 0x1114, 0x10fb, 0x10e2, 0x10c9, 0x10b0, 0x1098, 0x107f,
-  0x1066, 0x104d, 0x1034, 0x101b, 0x1002, 0xfe9, 0xfd0, 0xfb7,
-  0xf9e, 0xf85, 0xf6c, 0xf53, 0xf3a, 0xf21, 0xf08, 0xef0,
-  0xed7, 0xebe, 0xea5, 0xe8c, 0xe73, 0xe5a, 0xe41, 0xe28,
-  0xe0f, 0xdf6, 0xddd, 0xdc4, 0xdab, 0xd92, 0xd79, 0xd60,
-  0xd47, 0xd2e, 0xd15, 0xcfc, 0xce3, 0xcca, 0xcb1, 0xc98,
-  0xc7f, 0xc66, 0xc4d, 0xc34, 0xc1b, 0xc02, 0xbe9, 0xbd0,
-  0xbb7, 0xb9e, 0xb85, 0xb6c, 0xb53, 0xb3a, 0xb20, 0xb07,
-  0xaee, 0xad5, 0xabc, 0xaa3, 0xa8a, 0xa71, 0xa58, 0xa3f,
-  0xa26, 0xa0d, 0x9f4, 0x9db, 0x9c2, 0x9a9, 0x990, 0x977,
-  0x95e, 0x944, 0x92b, 0x912, 0x8f9, 0x8e0, 0x8c7, 0x8ae,
-  0x895, 0x87c, 0x863, 0x84a, 0x831, 0x818, 0x7fe, 0x7e5,
-  0x7cc, 0x7b3, 0x79a, 0x781, 0x768, 0x74f, 0x736, 0x71d,
-  0x704, 0x6ea, 0x6d1, 0x6b8, 0x69f, 0x686, 0x66d, 0x654,
-  0x63b, 0x622, 0x609, 0x5ef, 0x5d6, 0x5bd, 0x5a4, 0x58b,
-  0x572, 0x559, 0x540, 0x527, 0x50d, 0x4f4, 0x4db, 0x4c2,
-  0x4a9, 0x490, 0x477, 0x45e, 0x445, 0x42b, 0x412, 0x3f9,
-  0x3e0, 0x3c7, 0x3ae, 0x395, 0x37c, 0x362, 0x349, 0x330,
-  0x317, 0x2fe, 0x2e5, 0x2cc, 0x2b3, 0x299, 0x280, 0x267,
-  0x24e, 0x235, 0x21c, 0x203, 0x1ea, 0x1d0, 0x1b7, 0x19e,
-  0x185, 0x16c, 0x153, 0x13a, 0x121, 0x107, 0xee, 0xd5,
-  0xbc, 0xa3, 0x8a, 0x71, 0x57, 0x3e, 0x25, 0xc,
-
-};
-
-static const q15_t ALIGN4 cos_factorsQ15_8192[8192] = {
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe,
-  0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe,
-  0x7ffe, 0x7ffe, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd,
-  0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffc,
-  0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc,
-  0x7ffc, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffb,
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-  0x57b, 0x575, 0x56f, 0x569, 0x562, 0x55c, 0x556, 0x54f,
-  0x549, 0x543, 0x53d, 0x536, 0x530, 0x52a, 0x523, 0x51d,
-  0x517, 0x511, 0x50a, 0x504, 0x4fe, 0x4f8, 0x4f1, 0x4eb,
-  0x4e5, 0x4de, 0x4d8, 0x4d2, 0x4cc, 0x4c5, 0x4bf, 0x4b9,
-  0x4b2, 0x4ac, 0x4a6, 0x4a0, 0x499, 0x493, 0x48d, 0x487,
-  0x480, 0x47a, 0x474, 0x46d, 0x467, 0x461, 0x45b, 0x454,
-  0x44e, 0x448, 0x441, 0x43b, 0x435, 0x42f, 0x428, 0x422,
-  0x41c, 0x415, 0x40f, 0x409, 0x403, 0x3fc, 0x3f6, 0x3f0,
-  0x3ea, 0x3e3, 0x3dd, 0x3d7, 0x3d0, 0x3ca, 0x3c4, 0x3be,
-  0x3b7, 0x3b1, 0x3ab, 0x3a4, 0x39e, 0x398, 0x392, 0x38b,
-  0x385, 0x37f, 0x378, 0x372, 0x36c, 0x366, 0x35f, 0x359,
-  0x353, 0x34c, 0x346, 0x340, 0x33a, 0x333, 0x32d, 0x327,
-  0x321, 0x31a, 0x314, 0x30e, 0x307, 0x301, 0x2fb, 0x2f5,
-  0x2ee, 0x2e8, 0x2e2, 0x2db, 0x2d5, 0x2cf, 0x2c9, 0x2c2,
-  0x2bc, 0x2b6, 0x2af, 0x2a9, 0x2a3, 0x29d, 0x296, 0x290,
-  0x28a, 0x283, 0x27d, 0x277, 0x271, 0x26a, 0x264, 0x25e,
-  0x258, 0x251, 0x24b, 0x245, 0x23e, 0x238, 0x232, 0x22c,
-  0x225, 0x21f, 0x219, 0x212, 0x20c, 0x206, 0x200, 0x1f9,
-  0x1f3, 0x1ed, 0x1e6, 0x1e0, 0x1da, 0x1d4, 0x1cd, 0x1c7,
-  0x1c1, 0x1ba, 0x1b4, 0x1ae, 0x1a8, 0x1a1, 0x19b, 0x195,
-  0x18e, 0x188, 0x182, 0x17c, 0x175, 0x16f, 0x169, 0x162,
-  0x15c, 0x156, 0x150, 0x149, 0x143, 0x13d, 0x137, 0x130,
-  0x12a, 0x124, 0x11d, 0x117, 0x111, 0x10b, 0x104, 0xfe,
-  0xf8, 0xf1, 0xeb, 0xe5, 0xdf, 0xd8, 0xd2, 0xcc,
-  0xc5, 0xbf, 0xb9, 0xb3, 0xac, 0xa6, 0xa0, 0x99,
-  0x93, 0x8d, 0x87, 0x80, 0x7a, 0x74, 0x6d, 0x67,
-  0x61, 0x5b, 0x54, 0x4e, 0x48, 0x41, 0x3b, 0x35,
-  0x2f, 0x28, 0x22, 0x1c, 0x15, 0xf, 0x9, 0x3,
-};
-
-/**    
- * @brief  Initialization function for the Q15 DCT4/IDCT4.   
- * @param[in,out] *S         points to an instance of Q15 DCT4/IDCT4 structure.   
- * @param[in]     *S_RFFT    points to an instance of Q15 RFFT/RIFFT structure.   
- * @param[in]     *S_CFFT    points to an instance of Q15 CFFT/CIFFT structure.   
- * @param[in]     N          length of the DCT4.   
- * @param[in]     Nby2       half of the length of the DCT4.   
- * @param[in]     normalize  normalizing factor.   
- * @return  	  arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.   
- * \par Normalizing factor:    
- * The normalizing factor is sqrt(2/N), which depends on the size of transform N.    
- * Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes:    
- * \image html dct4NormalizingQ15Table.gif    
- */
-
-arm_status arm_dct4_init_q15(
-  arm_dct4_instance_q15 * S,
-  arm_rfft_instance_q15 * S_RFFT,
-  arm_cfft_radix4_instance_q15 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  q15_t normalize)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /* Initializing the pointer array with the weight table base addresses of different lengths */
-  q15_t *twiddlePtr[4] = { (q15_t *) WeightsQ15_128, (q15_t *) WeightsQ15_512,
-    (q15_t *) WeightsQ15_2048, (q15_t *) WeightsQ15_8192
-  };
-
-  /* Initializing the pointer array with the cos factor table base addresses of different lengths */
-  q15_t *pCosFactor[4] =
-    { (q15_t *) cos_factorsQ15_128, (q15_t *) cos_factorsQ15_512,
-    (q15_t *) cos_factorsQ15_2048, (q15_t *) cos_factorsQ15_8192
-  };
-
-  /* Initialize the DCT4 length */
-  S->N = N;
-
-  /* Initialize the half of DCT4 length */
-  S->Nby2 = Nby2;
-
-  /* Initialize the DCT4 Normalizing factor */
-  S->normalize = normalize;
-
-  /* Initialize Real FFT Instance */
-  S->pRfft = S_RFFT;
-
-  /* Initialize Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  switch (N)
-  {
-    /* Initialize the table modifier values */
-  case 8192u:
-    S->pTwiddle = twiddlePtr[3];
-    S->pCosFactor = pCosFactor[3];
-    break;
-  case 2048u:
-    S->pTwiddle = twiddlePtr[2];
-    S->pCosFactor = pCosFactor[2];
-    break;
-  case 512u:
-    S->pTwiddle = twiddlePtr[1];
-    S->pCosFactor = pCosFactor[1];
-    break;
-  case 128u:
-    S->pTwiddle = twiddlePtr[0];
-    S->pCosFactor = pCosFactor[0];
-    break;
-  default:
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-
-  /* Initialize the RFFT/RIFFT */
-  arm_rfft_init_q15(S->pRfft, S->N, 0u, 1u);
-
-  /* return the status of DCT4 Init function */
-  return (status);
-}
-
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c
deleted file mode 100755
index 1aa9081f..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c
+++ /dev/null
@@ -1,8364 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_init_q31.c    
-*    
-* Description:	Initialization function of DCT-4 & IDCT4 Q31    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup DCT4_IDCT4    
- * @{    
- */
-
-/*    
-* @brief  Weights Table    
-*/
-
-/**    
-* \par    
-* Weights tables are generated using the formula : 
weights[n] = e^(-j*n*pi/(2*N))
    
-* \par    
-* C command to generate the table    
-* 
    
-* for(i = 0; i< N; i++)    
-* {    
-*   weights[2*i]= cos(i*c);    
-*   weights[(2*i)+1]= -sin(i * c);    
-* } 
    
-* \par    
-* where N is the Number of weights to be calculated and c is pi/(2*N)    
-* \par    
-* Convert the output to q31 format by multiplying with 2^31 and saturated if required.    
-* \par    
-* In the tables below the real and imaginary values are placed alternatively, hence the    
-* array length is 2*N.    
-*/
-
-static const q31_t WeightsQ31_128[256] = {
-  0x7fffffff, 0x0, 0x7ffd885a, 0xfe6de2e0, 0x7ff62182, 0xfcdbd541, 0x7fe9cbc0,
-  0xfb49e6a3,
-  0x7fd8878e, 0xf9b82684, 0x7fc25596, 0xf826a462, 0x7fa736b4, 0xf6956fb7,
-  0x7f872bf3, 0xf50497fb,
-  0x7f62368f, 0xf3742ca2, 0x7f3857f6, 0xf1e43d1c, 0x7f0991c4, 0xf054d8d5,
-  0x7ed5e5c6, 0xeec60f31,
-  0x7e9d55fc, 0xed37ef91, 0x7e5fe493, 0xebaa894f, 0x7e1d93ea, 0xea1debbb,
-  0x7dd6668f, 0xe8922622,
-  0x7d8a5f40, 0xe70747c4, 0x7d3980ec, 0xe57d5fda, 0x7ce3ceb2, 0xe3f47d96,
-  0x7c894bde, 0xe26cb01b,
-  0x7c29fbee, 0xe0e60685, 0x7bc5e290, 0xdf608fe4, 0x7b5d039e, 0xdddc5b3b,
-  0x7aef6323, 0xdc597781,
-  0x7a7d055b, 0xdad7f3a2, 0x7a05eead, 0xd957de7a, 0x798a23b1, 0xd7d946d8,
-  0x7909a92d, 0xd65c3b7b,
-  0x78848414, 0xd4e0cb15, 0x77fab989, 0xd3670446, 0x776c4edb, 0xd1eef59e,
-  0x76d94989, 0xd078ad9e,
-  0x7641af3d, 0xcf043ab3, 0x75a585cf, 0xcd91ab39, 0x7504d345, 0xcc210d79,
-  0x745f9dd1, 0xcab26fa9,
-  0x73b5ebd1, 0xc945dfec, 0x7307c3d0, 0xc7db6c50, 0x72552c85, 0xc67322ce,
-  0x719e2cd2, 0xc50d1149,
-  0x70e2cbc6, 0xc3a94590, 0x7023109a, 0xc247cd5a, 0x6f5f02b2, 0xc0e8b648,
-  0x6e96a99d, 0xbf8c0de3,
-  0x6dca0d14, 0xbe31e19b, 0x6cf934fc, 0xbcda3ecb, 0x6c242960, 0xbb8532b0,
-  0x6b4af279, 0xba32ca71,
-  0x6a6d98a4, 0xb8e31319, 0x698c246c, 0xb796199b, 0x68a69e81, 0xb64beacd,
-  0x67bd0fbd, 0xb5049368,
-  0x66cf8120, 0xb3c0200c, 0x65ddfbd3, 0xb27e9d3c, 0x64e88926, 0xb140175b,
-  0x63ef3290, 0xb0049ab3,
-  0x62f201ac, 0xaecc336c, 0x61f1003f, 0xad96ed92, 0x60ec3830, 0xac64d510,
-  0x5fe3b38d, 0xab35f5b5,
-  0x5ed77c8a, 0xaa0a5b2e, 0x5dc79d7c, 0xa8e21106, 0x5cb420e0, 0xa7bd22ac,
-  0x5b9d1154, 0xa69b9b68,
-  0x5a82799a, 0xa57d8666, 0x59646498, 0xa462eeac, 0x5842dd54, 0xa34bdf20,
-  0x571deefa, 0xa2386284,
-  0x55f5a4d2, 0xa1288376, 0x54ca0a4b, 0xa01c4c73, 0x539b2af0, 0x9f13c7d0,
-  0x5269126e, 0x9e0effc1,
-  0x5133cc94, 0x9d0dfe54, 0x4ffb654d, 0x9c10cd70, 0x4ebfe8a5, 0x9b1776da,
-  0x4d8162c4, 0x9a22042d,
-  0x4c3fdff4, 0x99307ee0, 0x4afb6c98, 0x9842f043, 0x49b41533, 0x9759617f,
-  0x4869e665, 0x9673db94,
-  0x471cece7, 0x9592675c, 0x45cd358f, 0x94b50d87, 0x447acd50, 0x93dbd6a0,
-  0x4325c135, 0x9306cb04,
-  0x41ce1e65, 0x9235f2ec, 0x4073f21d, 0x91695663, 0x3f1749b8, 0x90a0fd4e,
-  0x3db832a6, 0x8fdcef66,
-  0x3c56ba70, 0x8f1d343a, 0x3af2eeb7, 0x8e61d32e, 0x398cdd32, 0x8daad37b,
-  0x382493b0, 0x8cf83c30,
-  0x36ba2014, 0x8c4a142f, 0x354d9057, 0x8ba0622f, 0x33def287, 0x8afb2cbb,
-  0x326e54c7, 0x8a5a7a31,
-  0x30fbc54d, 0x89be50c3, 0x2f875262, 0x8926b677, 0x2e110a62, 0x8893b125,
-  0x2c98fbba, 0x88054677,
-  0x2b1f34eb, 0x877b7bec, 0x29a3c485, 0x86f656d3, 0x2826b928, 0x8675dc4f,
-  0x26a82186, 0x85fa1153,
-  0x25280c5e, 0x8582faa5, 0x23a6887f, 0x85109cdd, 0x2223a4c5, 0x84a2fc62,
-  0x209f701c, 0x843a1d70,
-  0x1f19f97b, 0x83d60412, 0x1d934fe5, 0x8376b422, 0x1c0b826a, 0x831c314e,
-  0x1a82a026, 0x82c67f14,
-  0x18f8b83c, 0x8275a0c0, 0x176dd9de, 0x82299971, 0x15e21445, 0x81e26c16,
-  0x145576b1, 0x81a01b6d,
-  0x12c8106f, 0x8162aa04, 0x1139f0cf, 0x812a1a3a, 0xfab272b, 0x80f66e3c,
-  0xe1bc2e4, 0x80c7a80a,
-  0xc8bd35e, 0x809dc971, 0xafb6805, 0x8078d40d, 0x96a9049, 0x8058c94c,
-  0x7d95b9e, 0x803daa6a,
-  0x647d97c, 0x80277872, 0x4b6195d, 0x80163440, 0x3242abf, 0x8009de7e,
-  0x1921d20, 0x800277a6,
-};
-
-static const q31_t WeightsQ31_512[1024] = {
-  0x7fffffff, 0x0, 0x7fffd886, 0xff9b781d, 0x7fff6216, 0xff36f078, 0x7ffe9cb2,
-  0xfed2694f,
-  0x7ffd885a, 0xfe6de2e0, 0x7ffc250f, 0xfe095d69, 0x7ffa72d1, 0xfda4d929,
-  0x7ff871a2, 0xfd40565c,
-  0x7ff62182, 0xfcdbd541, 0x7ff38274, 0xfc775616, 0x7ff09478, 0xfc12d91a,
-  0x7fed5791, 0xfbae5e89,
-  0x7fe9cbc0, 0xfb49e6a3, 0x7fe5f108, 0xfae571a4, 0x7fe1c76b, 0xfa80ffcb,
-  0x7fdd4eec, 0xfa1c9157,
-  0x7fd8878e, 0xf9b82684, 0x7fd37153, 0xf953bf91, 0x7fce0c3e, 0xf8ef5cbb,
-  0x7fc85854, 0xf88afe42,
-  0x7fc25596, 0xf826a462, 0x7fbc040a, 0xf7c24f59, 0x7fb563b3, 0xf75dff66,
-  0x7fae7495, 0xf6f9b4c6,
-  0x7fa736b4, 0xf6956fb7, 0x7f9faa15, 0xf6313077, 0x7f97cebd, 0xf5ccf743,
-  0x7f8fa4b0, 0xf568c45b,
-  0x7f872bf3, 0xf50497fb, 0x7f7e648c, 0xf4a07261, 0x7f754e80, 0xf43c53cb,
-  0x7f6be9d4, 0xf3d83c77,
-  0x7f62368f, 0xf3742ca2, 0x7f5834b7, 0xf310248a, 0x7f4de451, 0xf2ac246e,
-  0x7f434563, 0xf2482c8a,
-  0x7f3857f6, 0xf1e43d1c, 0x7f2d1c0e, 0xf1805662, 0x7f2191b4, 0xf11c789a,
-  0x7f15b8ee, 0xf0b8a401,
-  0x7f0991c4, 0xf054d8d5, 0x7efd1c3c, 0xeff11753, 0x7ef05860, 0xef8d5fb8,
-  0x7ee34636, 0xef29b243,
-  0x7ed5e5c6, 0xeec60f31, 0x7ec8371a, 0xee6276bf, 0x7eba3a39, 0xedfee92b,
-  0x7eabef2c, 0xed9b66b2,
-  0x7e9d55fc, 0xed37ef91, 0x7e8e6eb2, 0xecd48407, 0x7e7f3957, 0xec71244f,
-  0x7e6fb5f4, 0xec0dd0a8,
-  0x7e5fe493, 0xebaa894f, 0x7e4fc53e, 0xeb474e81, 0x7e3f57ff, 0xeae4207a,
-  0x7e2e9cdf, 0xea80ff7a,
-  0x7e1d93ea, 0xea1debbb, 0x7e0c3d29, 0xe9bae57d, 0x7dfa98a8, 0xe957ecfb,
-  0x7de8a670, 0xe8f50273,
-  0x7dd6668f, 0xe8922622, 0x7dc3d90d, 0xe82f5844, 0x7db0fdf8, 0xe7cc9917,
-  0x7d9dd55a, 0xe769e8d8,
-  0x7d8a5f40, 0xe70747c4, 0x7d769bb5, 0xe6a4b616, 0x7d628ac6, 0xe642340d,
-  0x7d4e2c7f, 0xe5dfc1e5,
-  0x7d3980ec, 0xe57d5fda, 0x7d24881b, 0xe51b0e2a, 0x7d0f4218, 0xe4b8cd11,
-  0x7cf9aef0, 0xe4569ccb,
-  0x7ce3ceb2, 0xe3f47d96, 0x7ccda169, 0xe3926fad, 0x7cb72724, 0xe330734d,
-  0x7ca05ff1, 0xe2ce88b3,
-  0x7c894bde, 0xe26cb01b, 0x7c71eaf9, 0xe20ae9c1, 0x7c5a3d50, 0xe1a935e2,
-  0x7c4242f2, 0xe14794ba,
-  0x7c29fbee, 0xe0e60685, 0x7c116853, 0xe0848b7f, 0x7bf88830, 0xe02323e5,
-  0x7bdf5b94, 0xdfc1cff3,
-  0x7bc5e290, 0xdf608fe4, 0x7bac1d31, 0xdeff63f4, 0x7b920b89, 0xde9e4c60,
-  0x7b77ada8, 0xde3d4964,
-  0x7b5d039e, 0xdddc5b3b, 0x7b420d7a, 0xdd7b8220, 0x7b26cb4f, 0xdd1abe51,
-  0x7b0b3d2c, 0xdcba1008,
-  0x7aef6323, 0xdc597781, 0x7ad33d45, 0xdbf8f4f8, 0x7ab6cba4, 0xdb9888a8,
-  0x7a9a0e50, 0xdb3832cd,
-  0x7a7d055b, 0xdad7f3a2, 0x7a5fb0d8, 0xda77cb63, 0x7a4210d8, 0xda17ba4a,
-  0x7a24256f, 0xd9b7c094,
-  0x7a05eead, 0xd957de7a, 0x79e76ca7, 0xd8f81439, 0x79c89f6e, 0xd898620c,
-  0x79a98715, 0xd838c82d,
-  0x798a23b1, 0xd7d946d8, 0x796a7554, 0xd779de47, 0x794a7c12, 0xd71a8eb5,
-  0x792a37fe, 0xd6bb585e,
-  0x7909a92d, 0xd65c3b7b, 0x78e8cfb2, 0xd5fd3848, 0x78c7aba2, 0xd59e4eff,
-  0x78a63d11, 0xd53f7fda,
-  0x78848414, 0xd4e0cb15, 0x786280bf, 0xd48230e9, 0x78403329, 0xd423b191,
-  0x781d9b65, 0xd3c54d47,
-  0x77fab989, 0xd3670446, 0x77d78daa, 0xd308d6c7, 0x77b417df, 0xd2aac504,
-  0x7790583e, 0xd24ccf39,
-  0x776c4edb, 0xd1eef59e, 0x7747fbce, 0xd191386e, 0x77235f2d, 0xd13397e2,
-  0x76fe790e, 0xd0d61434,
-  0x76d94989, 0xd078ad9e, 0x76b3d0b4, 0xd01b6459, 0x768e0ea6, 0xcfbe389f,
-  0x76680376, 0xcf612aaa,
-  0x7641af3d, 0xcf043ab3, 0x761b1211, 0xcea768f2, 0x75f42c0b, 0xce4ab5a2,
-  0x75ccfd42, 0xcdee20fc,
-  0x75a585cf, 0xcd91ab39, 0x757dc5ca, 0xcd355491, 0x7555bd4c, 0xccd91d3d,
-  0x752d6c6c, 0xcc7d0578,
-  0x7504d345, 0xcc210d79, 0x74dbf1ef, 0xcbc53579, 0x74b2c884, 0xcb697db0,
-  0x7489571c, 0xcb0de658,
-  0x745f9dd1, 0xcab26fa9, 0x74359cbd, 0xca5719db, 0x740b53fb, 0xc9fbe527,
-  0x73e0c3a3, 0xc9a0d1c5,
-  0x73b5ebd1, 0xc945dfec, 0x738acc9e, 0xc8eb0fd6, 0x735f6626, 0xc89061ba,
-  0x7333b883, 0xc835d5d0,
-  0x7307c3d0, 0xc7db6c50, 0x72db8828, 0xc7812572, 0x72af05a7, 0xc727016d,
-  0x72823c67, 0xc6cd0079,
-  0x72552c85, 0xc67322ce, 0x7227d61c, 0xc61968a2, 0x71fa3949, 0xc5bfd22e,
-  0x71cc5626, 0xc5665fa9,
-  0x719e2cd2, 0xc50d1149, 0x716fbd68, 0xc4b3e746, 0x71410805, 0xc45ae1d7,
-  0x71120cc5, 0xc4020133,
-  0x70e2cbc6, 0xc3a94590, 0x70b34525, 0xc350af26, 0x708378ff, 0xc2f83e2a,
-  0x70536771, 0xc29ff2d4,
-  0x7023109a, 0xc247cd5a, 0x6ff27497, 0xc1efcdf3, 0x6fc19385, 0xc197f4d4,
-  0x6f906d84, 0xc1404233,
-  0x6f5f02b2, 0xc0e8b648, 0x6f2d532c, 0xc0915148, 0x6efb5f12, 0xc03a1368,
-  0x6ec92683, 0xbfe2fcdf,
-  0x6e96a99d, 0xbf8c0de3, 0x6e63e87f, 0xbf3546a8, 0x6e30e34a, 0xbedea765,
-  0x6dfd9a1c, 0xbe88304f,
-  0x6dca0d14, 0xbe31e19b, 0x6d963c54, 0xbddbbb7f, 0x6d6227fa, 0xbd85be30,
-  0x6d2dd027, 0xbd2fe9e2,
-  0x6cf934fc, 0xbcda3ecb, 0x6cc45698, 0xbc84bd1f, 0x6c8f351c, 0xbc2f6513,
-  0x6c59d0a9, 0xbbda36dd,
-  0x6c242960, 0xbb8532b0, 0x6bee3f62, 0xbb3058c0, 0x6bb812d1, 0xbadba943,
-  0x6b81a3cd, 0xba87246d,
-  0x6b4af279, 0xba32ca71, 0x6b13fef5, 0xb9de9b83, 0x6adcc964, 0xb98a97d8,
-  0x6aa551e9, 0xb936bfa4,
-  0x6a6d98a4, 0xb8e31319, 0x6a359db9, 0xb88f926d, 0x69fd614a, 0xb83c3dd1,
-  0x69c4e37a, 0xb7e9157a,
-  0x698c246c, 0xb796199b, 0x69532442, 0xb7434a67, 0x6919e320, 0xb6f0a812,
-  0x68e06129, 0xb69e32cd,
-  0x68a69e81, 0xb64beacd, 0x686c9b4b, 0xb5f9d043, 0x683257ab, 0xb5a7e362,
-  0x67f7d3c5, 0xb556245e,
-  0x67bd0fbd, 0xb5049368, 0x67820bb7, 0xb4b330b3, 0x6746c7d8, 0xb461fc70,
-  0x670b4444, 0xb410f6d3,
-  0x66cf8120, 0xb3c0200c, 0x66937e91, 0xb36f784f, 0x66573cbb, 0xb31effcc,
-  0x661abbc5, 0xb2ceb6b5,
-  0x65ddfbd3, 0xb27e9d3c, 0x65a0fd0b, 0xb22eb392, 0x6563bf92, 0xb1def9e9,
-  0x6526438f, 0xb18f7071,
-  0x64e88926, 0xb140175b, 0x64aa907f, 0xb0f0eeda, 0x646c59bf, 0xb0a1f71d,
-  0x642de50d, 0xb0533055,
-  0x63ef3290, 0xb0049ab3, 0x63b0426d, 0xafb63667, 0x637114cc, 0xaf6803a2,
-  0x6331a9d4, 0xaf1a0293,
-  0x62f201ac, 0xaecc336c, 0x62b21c7b, 0xae7e965b, 0x6271fa69, 0xae312b92,
-  0x62319b9d, 0xade3f33e,
-  0x61f1003f, 0xad96ed92, 0x61b02876, 0xad4a1aba, 0x616f146c, 0xacfd7ae8,
-  0x612dc447, 0xacb10e4b,
-  0x60ec3830, 0xac64d510, 0x60aa7050, 0xac18cf69, 0x60686ccf, 0xabccfd83,
-  0x60262dd6, 0xab815f8d,
-  0x5fe3b38d, 0xab35f5b5, 0x5fa0fe1f, 0xaaeac02c, 0x5f5e0db3, 0xaa9fbf1e,
-  0x5f1ae274, 0xaa54f2ba,
-  0x5ed77c8a, 0xaa0a5b2e, 0x5e93dc1f, 0xa9bff8a8, 0x5e50015d, 0xa975cb57,
-  0x5e0bec6e, 0xa92bd367,
-  0x5dc79d7c, 0xa8e21106, 0x5d8314b1, 0xa8988463, 0x5d3e5237, 0xa84f2daa,
-  0x5cf95638, 0xa8060d08,
-  0x5cb420e0, 0xa7bd22ac, 0x5c6eb258, 0xa7746ec0, 0x5c290acc, 0xa72bf174,
-  0x5be32a67, 0xa6e3aaf2,
-  0x5b9d1154, 0xa69b9b68, 0x5b56bfbd, 0xa653c303, 0x5b1035cf, 0xa60c21ee,
-  0x5ac973b5, 0xa5c4b855,
-  0x5a82799a, 0xa57d8666, 0x5a3b47ab, 0xa5368c4b, 0x59f3de12, 0xa4efca31,
-  0x59ac3cfd, 0xa4a94043,
-  0x59646498, 0xa462eeac, 0x591c550e, 0xa41cd599, 0x58d40e8c, 0xa3d6f534,
-  0x588b9140, 0xa3914da8,
-  0x5842dd54, 0xa34bdf20, 0x57f9f2f8, 0xa306a9c8, 0x57b0d256, 0xa2c1adc9,
-  0x57677b9d, 0xa27ceb4f,
-  0x571deefa, 0xa2386284, 0x56d42c99, 0xa1f41392, 0x568a34a9, 0xa1affea3,
-  0x56400758, 0xa16c23e1,
-  0x55f5a4d2, 0xa1288376, 0x55ab0d46, 0xa0e51d8c, 0x556040e2, 0xa0a1f24d,
-  0x55153fd4, 0xa05f01e1,
-  0x54ca0a4b, 0xa01c4c73, 0x547ea073, 0x9fd9d22a, 0x5433027d, 0x9f979331,
-  0x53e73097, 0x9f558fb0,
-  0x539b2af0, 0x9f13c7d0, 0x534ef1b5, 0x9ed23bb9, 0x53028518, 0x9e90eb94,
-  0x52b5e546, 0x9e4fd78a,
-  0x5269126e, 0x9e0effc1, 0x521c0cc2, 0x9dce6463, 0x51ced46e, 0x9d8e0597,
-  0x518169a5, 0x9d4de385,
-  0x5133cc94, 0x9d0dfe54, 0x50e5fd6d, 0x9cce562c, 0x5097fc5e, 0x9c8eeb34,
-  0x5049c999, 0x9c4fbd93,
-  0x4ffb654d, 0x9c10cd70, 0x4faccfab, 0x9bd21af3, 0x4f5e08e3, 0x9b93a641,
-  0x4f0f1126, 0x9b556f81,
-  0x4ebfe8a5, 0x9b1776da, 0x4e708f8f, 0x9ad9bc71, 0x4e210617, 0x9a9c406e,
-  0x4dd14c6e, 0x9a5f02f5,
-  0x4d8162c4, 0x9a22042d, 0x4d31494b, 0x99e5443b, 0x4ce10034, 0x99a8c345,
-  0x4c9087b1, 0x996c816f,
-  0x4c3fdff4, 0x99307ee0, 0x4bef092d, 0x98f4bbbc, 0x4b9e0390, 0x98b93828,
-  0x4b4ccf4d, 0x987df449,
-  0x4afb6c98, 0x9842f043, 0x4aa9dba2, 0x98082c3b, 0x4a581c9e, 0x97cda855,
-  0x4a062fbd, 0x979364b5,
-  0x49b41533, 0x9759617f, 0x4961cd33, 0x971f9ed7, 0x490f57ee, 0x96e61ce0,
-  0x48bcb599, 0x96acdbbe,
-  0x4869e665, 0x9673db94, 0x4816ea86, 0x963b1c86, 0x47c3c22f, 0x96029eb6,
-  0x47706d93, 0x95ca6247,
-  0x471cece7, 0x9592675c, 0x46c9405c, 0x955aae17, 0x46756828, 0x9523369c,
-  0x4621647d, 0x94ec010b,
-  0x45cd358f, 0x94b50d87, 0x4578db93, 0x947e5c33, 0x452456bd, 0x9447ed2f,
-  0x44cfa740, 0x9411c09e,
-  0x447acd50, 0x93dbd6a0, 0x4425c923, 0x93a62f57, 0x43d09aed, 0x9370cae4,
-  0x437b42e1, 0x933ba968,
-  0x4325c135, 0x9306cb04, 0x42d0161e, 0x92d22fd9, 0x427a41d0, 0x929dd806,
-  0x42244481, 0x9269c3ac,
-  0x41ce1e65, 0x9235f2ec, 0x4177cfb1, 0x920265e4, 0x4121589b, 0x91cf1cb6,
-  0x40cab958, 0x919c1781,
-  0x4073f21d, 0x91695663, 0x401d0321, 0x9136d97d, 0x3fc5ec98, 0x9104a0ee,
-  0x3f6eaeb8, 0x90d2acd4,
-  0x3f1749b8, 0x90a0fd4e, 0x3ebfbdcd, 0x906f927c, 0x3e680b2c, 0x903e6c7b,
-  0x3e10320d, 0x900d8b69,
-  0x3db832a6, 0x8fdcef66, 0x3d600d2c, 0x8fac988f, 0x3d07c1d6, 0x8f7c8701,
-  0x3caf50da, 0x8f4cbadb,
-  0x3c56ba70, 0x8f1d343a, 0x3bfdfecd, 0x8eedf33b, 0x3ba51e29, 0x8ebef7fb,
-  0x3b4c18ba, 0x8e904298,
-  0x3af2eeb7, 0x8e61d32e, 0x3a99a057, 0x8e33a9da, 0x3a402dd2, 0x8e05c6b7,
-  0x39e6975e, 0x8dd829e4,
-  0x398cdd32, 0x8daad37b, 0x3932ff87, 0x8d7dc399, 0x38d8fe93, 0x8d50fa59,
-  0x387eda8e, 0x8d2477d8,
-  0x382493b0, 0x8cf83c30, 0x37ca2a30, 0x8ccc477d, 0x376f9e46, 0x8ca099da,
-  0x3714f02a, 0x8c753362,
-  0x36ba2014, 0x8c4a142f, 0x365f2e3b, 0x8c1f3c5d, 0x36041ad9, 0x8bf4ac05,
-  0x35a8e625, 0x8bca6343,
-  0x354d9057, 0x8ba0622f, 0x34f219a8, 0x8b76a8e4, 0x34968250, 0x8b4d377c,
-  0x343aca87, 0x8b240e11,
-  0x33def287, 0x8afb2cbb, 0x3382fa88, 0x8ad29394, 0x3326e2c3, 0x8aaa42b4,
-  0x32caab6f, 0x8a823a36,
-  0x326e54c7, 0x8a5a7a31, 0x3211df04, 0x8a3302be, 0x31b54a5e, 0x8a0bd3f5,
-  0x3158970e, 0x89e4edef,
-  0x30fbc54d, 0x89be50c3, 0x309ed556, 0x8997fc8a, 0x3041c761, 0x8971f15a,
-  0x2fe49ba7, 0x894c2f4c,
-  0x2f875262, 0x8926b677, 0x2f29ebcc, 0x890186f2, 0x2ecc681e, 0x88dca0d3,
-  0x2e6ec792, 0x88b80432,
-  0x2e110a62, 0x8893b125, 0x2db330c7, 0x886fa7c2, 0x2d553afc, 0x884be821,
-  0x2cf72939, 0x88287256,
-  0x2c98fbba, 0x88054677, 0x2c3ab2b9, 0x87e2649b, 0x2bdc4e6f, 0x87bfccd7,
-  0x2b7dcf17, 0x879d7f41,
-  0x2b1f34eb, 0x877b7bec, 0x2ac08026, 0x8759c2ef, 0x2a61b101, 0x8738545e,
-  0x2a02c7b8, 0x8717304e,
-  0x29a3c485, 0x86f656d3, 0x2944a7a2, 0x86d5c802, 0x28e5714b, 0x86b583ee,
-  0x288621b9, 0x86958aac,
-  0x2826b928, 0x8675dc4f, 0x27c737d3, 0x865678eb, 0x27679df4, 0x86376092,
-  0x2707ebc7, 0x86189359,
-  0x26a82186, 0x85fa1153, 0x26483f6c, 0x85dbda91, 0x25e845b6, 0x85bdef28,
-  0x2588349d, 0x85a04f28,
-  0x25280c5e, 0x8582faa5, 0x24c7cd33, 0x8565f1b0, 0x24677758, 0x8549345c,
-  0x24070b08, 0x852cc2bb,
-  0x23a6887f, 0x85109cdd, 0x2345eff8, 0x84f4c2d4, 0x22e541af, 0x84d934b1,
-  0x22847de0, 0x84bdf286,
-  0x2223a4c5, 0x84a2fc62, 0x21c2b69c, 0x84885258, 0x2161b3a0, 0x846df477,
-  0x21009c0c, 0x8453e2cf,
-  0x209f701c, 0x843a1d70, 0x203e300d, 0x8420a46c, 0x1fdcdc1b, 0x840777d0,
-  0x1f7b7481, 0x83ee97ad,
-  0x1f19f97b, 0x83d60412, 0x1eb86b46, 0x83bdbd0e, 0x1e56ca1e, 0x83a5c2b0,
-  0x1df5163f, 0x838e1507,
-  0x1d934fe5, 0x8376b422, 0x1d31774d, 0x835fa00f, 0x1ccf8cb3, 0x8348d8dc,
-  0x1c6d9053, 0x83325e97,
-  0x1c0b826a, 0x831c314e, 0x1ba96335, 0x83065110, 0x1b4732ef, 0x82f0bde8,
-  0x1ae4f1d6, 0x82db77e5,
-  0x1a82a026, 0x82c67f14, 0x1a203e1b, 0x82b1d381, 0x19bdcbf3, 0x829d753a,
-  0x195b49ea, 0x8289644b,
-  0x18f8b83c, 0x8275a0c0, 0x18961728, 0x82622aa6, 0x183366e9, 0x824f0208,
-  0x17d0a7bc, 0x823c26f3,
-  0x176dd9de, 0x82299971, 0x170afd8d, 0x82175990, 0x16a81305, 0x82056758,
-  0x16451a83, 0x81f3c2d7,
-  0x15e21445, 0x81e26c16, 0x157f0086, 0x81d16321, 0x151bdf86, 0x81c0a801,
-  0x14b8b17f, 0x81b03ac2,
-  0x145576b1, 0x81a01b6d, 0x13f22f58, 0x81904a0c, 0x138edbb1, 0x8180c6a9,
-  0x132b7bf9, 0x8171914e,
-  0x12c8106f, 0x8162aa04, 0x1264994e, 0x815410d4, 0x120116d5, 0x8145c5c7,
-  0x119d8941, 0x8137c8e6,
-  0x1139f0cf, 0x812a1a3a, 0x10d64dbd, 0x811cb9ca, 0x1072a048, 0x810fa7a0,
-  0x100ee8ad, 0x8102e3c4,
-  0xfab272b, 0x80f66e3c, 0xf475bff, 0x80ea4712, 0xee38766, 0x80de6e4c,
-  0xe7fa99e, 0x80d2e3f2,
-  0xe1bc2e4, 0x80c7a80a, 0xdb7d376, 0x80bcba9d, 0xd53db92, 0x80b21baf,
-  0xcefdb76, 0x80a7cb49,
-  0xc8bd35e, 0x809dc971, 0xc27c389, 0x8094162c, 0xbc3ac35, 0x808ab180,
-  0xb5f8d9f, 0x80819b74,
-  0xafb6805, 0x8078d40d, 0xa973ba5, 0x80705b50, 0xa3308bd, 0x80683143,
-  0x9cecf89, 0x806055eb,
-  0x96a9049, 0x8058c94c, 0x9064b3a, 0x80518b6b, 0x8a2009a, 0x804a9c4d,
-  0x83db0a7, 0x8043fbf6,
-  0x7d95b9e, 0x803daa6a, 0x77501be, 0x8037a7ac, 0x710a345, 0x8031f3c2,
-  0x6ac406f, 0x802c8ead,
-  0x647d97c, 0x80277872, 0x5e36ea9, 0x8022b114, 0x57f0035, 0x801e3895,
-  0x51a8e5c, 0x801a0ef8,
-  0x4b6195d, 0x80163440, 0x451a177, 0x8012a86f, 0x3ed26e6, 0x800f6b88,
-  0x388a9ea, 0x800c7d8c,
-  0x3242abf, 0x8009de7e, 0x2bfa9a4, 0x80078e5e, 0x25b26d7, 0x80058d2f,
-  0x1f6a297, 0x8003daf1,
-  0x1921d20, 0x800277a6, 0x12d96b1, 0x8001634e, 0xc90f88, 0x80009dea,
-  0x6487e3, 0x8000277a,
-};
-
-static const q31_t WeightsQ31_2048[4096] = {
-  0x7fffffff, 0x0, 0x7ffffd88, 0xffe6de05, 0x7ffff621, 0xffcdbc0b, 0x7fffe9cb,
-  0xffb49a12,
-  0x7fffd886, 0xff9b781d, 0x7fffc251, 0xff82562c, 0x7fffa72c, 0xff69343f,
-  0x7fff8719, 0xff501258,
-  0x7fff6216, 0xff36f078, 0x7fff3824, 0xff1dcea0, 0x7fff0943, 0xff04acd0,
-  0x7ffed572, 0xfeeb8b0a,
-  0x7ffe9cb2, 0xfed2694f, 0x7ffe5f03, 0xfeb947a0, 0x7ffe1c65, 0xfea025fd,
-  0x7ffdd4d7, 0xfe870467,
-  0x7ffd885a, 0xfe6de2e0, 0x7ffd36ee, 0xfe54c169, 0x7ffce093, 0xfe3ba002,
-  0x7ffc8549, 0xfe227eac,
-  0x7ffc250f, 0xfe095d69, 0x7ffbbfe6, 0xfdf03c3a, 0x7ffb55ce, 0xfdd71b1e,
-  0x7ffae6c7, 0xfdbdfa18,
-  0x7ffa72d1, 0xfda4d929, 0x7ff9f9ec, 0xfd8bb850, 0x7ff97c18, 0xfd729790,
-  0x7ff8f954, 0xfd5976e9,
-  0x7ff871a2, 0xfd40565c, 0x7ff7e500, 0xfd2735ea, 0x7ff75370, 0xfd0e1594,
-  0x7ff6bcf0, 0xfcf4f55c,
-  0x7ff62182, 0xfcdbd541, 0x7ff58125, 0xfcc2b545, 0x7ff4dbd9, 0xfca9956a,
-  0x7ff4319d, 0xfc9075af,
-  0x7ff38274, 0xfc775616, 0x7ff2ce5b, 0xfc5e36a0, 0x7ff21553, 0xfc45174e,
-  0x7ff1575d, 0xfc2bf821,
-  0x7ff09478, 0xfc12d91a, 0x7fefcca4, 0xfbf9ba39, 0x7feeffe1, 0xfbe09b80,
-  0x7fee2e30, 0xfbc77cf0,
-  0x7fed5791, 0xfbae5e89, 0x7fec7c02, 0xfb95404d, 0x7feb9b85, 0xfb7c223d,
-  0x7feab61a, 0xfb630459,
-  0x7fe9cbc0, 0xfb49e6a3, 0x7fe8dc78, 0xfb30c91b, 0x7fe7e841, 0xfb17abc2,
-  0x7fe6ef1c, 0xfafe8e9b,
-  0x7fe5f108, 0xfae571a4, 0x7fe4ee06, 0xfacc54e0, 0x7fe3e616, 0xfab3384f,
-  0x7fe2d938, 0xfa9a1bf3,
-  0x7fe1c76b, 0xfa80ffcb, 0x7fe0b0b1, 0xfa67e3da, 0x7fdf9508, 0xfa4ec821,
-  0x7fde7471, 0xfa35ac9f,
-  0x7fdd4eec, 0xfa1c9157, 0x7fdc247a, 0xfa037648, 0x7fdaf519, 0xf9ea5b75,
-  0x7fd9c0ca, 0xf9d140de,
-  0x7fd8878e, 0xf9b82684, 0x7fd74964, 0xf99f0c68, 0x7fd6064c, 0xf985f28a,
-  0x7fd4be46, 0xf96cd8ed,
-  0x7fd37153, 0xf953bf91, 0x7fd21f72, 0xf93aa676, 0x7fd0c8a3, 0xf9218d9e,
-  0x7fcf6ce8, 0xf908750a,
-  0x7fce0c3e, 0xf8ef5cbb, 0x7fcca6a7, 0xf8d644b2, 0x7fcb3c23, 0xf8bd2cef,
-  0x7fc9ccb2, 0xf8a41574,
-  0x7fc85854, 0xf88afe42, 0x7fc6df08, 0xf871e759, 0x7fc560cf, 0xf858d0bb,
-  0x7fc3dda9, 0xf83fba68,
-  0x7fc25596, 0xf826a462, 0x7fc0c896, 0xf80d8ea9, 0x7fbf36aa, 0xf7f4793e,
-  0x7fbd9fd0, 0xf7db6423,
-  0x7fbc040a, 0xf7c24f59, 0x7fba6357, 0xf7a93ae0, 0x7fb8bdb8, 0xf79026b9,
-  0x7fb7132b, 0xf77712e5,
-  0x7fb563b3, 0xf75dff66, 0x7fb3af4e, 0xf744ec3b, 0x7fb1f5fc, 0xf72bd967,
-  0x7fb037bf, 0xf712c6ea,
-  0x7fae7495, 0xf6f9b4c6, 0x7facac7f, 0xf6e0a2fa, 0x7faadf7c, 0xf6c79188,
-  0x7fa90d8e, 0xf6ae8071,
-  0x7fa736b4, 0xf6956fb7, 0x7fa55aee, 0xf67c5f59, 0x7fa37a3c, 0xf6634f59,
-  0x7fa1949e, 0xf64a3fb8,
-  0x7f9faa15, 0xf6313077, 0x7f9dbaa0, 0xf6182196, 0x7f9bc640, 0xf5ff1318,
-  0x7f99ccf4, 0xf5e604fc,
-  0x7f97cebd, 0xf5ccf743, 0x7f95cb9a, 0xf5b3e9f0, 0x7f93c38c, 0xf59add02,
-  0x7f91b694, 0xf581d07b,
-  0x7f8fa4b0, 0xf568c45b, 0x7f8d8de1, 0xf54fb8a4, 0x7f8b7227, 0xf536ad56,
-  0x7f895182, 0xf51da273,
-  0x7f872bf3, 0xf50497fb, 0x7f850179, 0xf4eb8def, 0x7f82d214, 0xf4d28451,
-  0x7f809dc5, 0xf4b97b21,
-  0x7f7e648c, 0xf4a07261, 0x7f7c2668, 0xf4876a10, 0x7f79e35a, 0xf46e6231,
-  0x7f779b62, 0xf4555ac5,
-  0x7f754e80, 0xf43c53cb, 0x7f72fcb4, 0xf4234d45, 0x7f70a5fe, 0xf40a4735,
-  0x7f6e4a5e, 0xf3f1419a,
-  0x7f6be9d4, 0xf3d83c77, 0x7f698461, 0xf3bf37cb, 0x7f671a05, 0xf3a63398,
-  0x7f64aabf, 0xf38d2fe0,
-  0x7f62368f, 0xf3742ca2, 0x7f5fbd77, 0xf35b29e0, 0x7f5d3f75, 0xf342279b,
-  0x7f5abc8a, 0xf32925d3,
-  0x7f5834b7, 0xf310248a, 0x7f55a7fa, 0xf2f723c1, 0x7f531655, 0xf2de2379,
-  0x7f507fc7, 0xf2c523b2,
-  0x7f4de451, 0xf2ac246e, 0x7f4b43f2, 0xf29325ad, 0x7f489eaa, 0xf27a2771,
-  0x7f45f47b, 0xf26129ba,
-  0x7f434563, 0xf2482c8a, 0x7f409164, 0xf22f2fe1, 0x7f3dd87c, 0xf21633c0,
-  0x7f3b1aad, 0xf1fd3829,
-  0x7f3857f6, 0xf1e43d1c, 0x7f359057, 0xf1cb429a, 0x7f32c3d1, 0xf1b248a5,
-  0x7f2ff263, 0xf1994f3d,
-  0x7f2d1c0e, 0xf1805662, 0x7f2a40d2, 0xf1675e17, 0x7f2760af, 0xf14e665c,
-  0x7f247ba5, 0xf1356f32,
-  0x7f2191b4, 0xf11c789a, 0x7f1ea2dc, 0xf1038295, 0x7f1baf1e, 0xf0ea8d24,
-  0x7f18b679, 0xf0d19848,
-  0x7f15b8ee, 0xf0b8a401, 0x7f12b67c, 0xf09fb051, 0x7f0faf25, 0xf086bd39,
-  0x7f0ca2e7, 0xf06dcaba,
-  0x7f0991c4, 0xf054d8d5, 0x7f067bba, 0xf03be78a, 0x7f0360cb, 0xf022f6da,
-  0x7f0040f6, 0xf00a06c8,
-  0x7efd1c3c, 0xeff11753, 0x7ef9f29d, 0xefd8287c, 0x7ef6c418, 0xefbf3a45,
-  0x7ef390ae, 0xefa64cae,
-  0x7ef05860, 0xef8d5fb8, 0x7eed1b2c, 0xef747365, 0x7ee9d914, 0xef5b87b5,
-  0x7ee69217, 0xef429caa,
-  0x7ee34636, 0xef29b243, 0x7edff570, 0xef10c883, 0x7edc9fc6, 0xeef7df6a,
-  0x7ed94538, 0xeedef6f9,
-  0x7ed5e5c6, 0xeec60f31, 0x7ed28171, 0xeead2813, 0x7ecf1837, 0xee9441a0,
-  0x7ecbaa1a, 0xee7b5bd9,
-  0x7ec8371a, 0xee6276bf, 0x7ec4bf36, 0xee499253, 0x7ec14270, 0xee30ae96,
-  0x7ebdc0c6, 0xee17cb88,
-  0x7eba3a39, 0xedfee92b, 0x7eb6aeca, 0xede60780, 0x7eb31e78, 0xedcd2687,
-  0x7eaf8943, 0xedb44642,
-  0x7eabef2c, 0xed9b66b2, 0x7ea85033, 0xed8287d7, 0x7ea4ac58, 0xed69a9b3,
-  0x7ea1039b, 0xed50cc46,
-  0x7e9d55fc, 0xed37ef91, 0x7e99a37c, 0xed1f1396, 0x7e95ec1a, 0xed063856,
-  0x7e922fd6, 0xeced5dd0,
-  0x7e8e6eb2, 0xecd48407, 0x7e8aa8ac, 0xecbbaafb, 0x7e86ddc6, 0xeca2d2ad,
-  0x7e830dff, 0xec89fb1e,
-  0x7e7f3957, 0xec71244f, 0x7e7b5fce, 0xec584e41, 0x7e778166, 0xec3f78f6,
-  0x7e739e1d, 0xec26a46d,
-  0x7e6fb5f4, 0xec0dd0a8, 0x7e6bc8eb, 0xebf4fda8, 0x7e67d703, 0xebdc2b6e,
-  0x7e63e03b, 0xebc359fb,
-  0x7e5fe493, 0xebaa894f, 0x7e5be40c, 0xeb91b96c, 0x7e57dea7, 0xeb78ea52,
-  0x7e53d462, 0xeb601c04,
-  0x7e4fc53e, 0xeb474e81, 0x7e4bb13c, 0xeb2e81ca, 0x7e47985b, 0xeb15b5e1,
-  0x7e437a9c, 0xeafceac6,
-  0x7e3f57ff, 0xeae4207a, 0x7e3b3083, 0xeacb56ff, 0x7e37042a, 0xeab28e56,
-  0x7e32d2f4, 0xea99c67e,
-  0x7e2e9cdf, 0xea80ff7a, 0x7e2a61ed, 0xea683949, 0x7e26221f, 0xea4f73ee,
-  0x7e21dd73, 0xea36af69,
-  0x7e1d93ea, 0xea1debbb, 0x7e194584, 0xea0528e5, 0x7e14f242, 0xe9ec66e8,
-  0x7e109a24, 0xe9d3a5c5,
-  0x7e0c3d29, 0xe9bae57d, 0x7e07db52, 0xe9a22610, 0x7e0374a0, 0xe9896781,
-  0x7dff0911, 0xe970a9ce,
-  0x7dfa98a8, 0xe957ecfb, 0x7df62362, 0xe93f3107, 0x7df1a942, 0xe92675f4,
-  0x7ded2a47, 0xe90dbbc2,
-  0x7de8a670, 0xe8f50273, 0x7de41dc0, 0xe8dc4a07, 0x7ddf9034, 0xe8c39280,
-  0x7ddafdce, 0xe8aadbde,
-  0x7dd6668f, 0xe8922622, 0x7dd1ca75, 0xe879714d, 0x7dcd2981, 0xe860bd61,
-  0x7dc883b4, 0xe8480a5d,
-  0x7dc3d90d, 0xe82f5844, 0x7dbf298d, 0xe816a716, 0x7dba7534, 0xe7fdf6d4,
-  0x7db5bc02, 0xe7e5477f,
-  0x7db0fdf8, 0xe7cc9917, 0x7dac3b15, 0xe7b3eb9f, 0x7da77359, 0xe79b3f16,
-  0x7da2a6c6, 0xe782937e,
-  0x7d9dd55a, 0xe769e8d8, 0x7d98ff17, 0xe7513f25, 0x7d9423fc, 0xe7389665,
-  0x7d8f4409, 0xe71fee99,
-  0x7d8a5f40, 0xe70747c4, 0x7d85759f, 0xe6eea1e4, 0x7d808728, 0xe6d5fcfc,
-  0x7d7b93da, 0xe6bd590d,
-  0x7d769bb5, 0xe6a4b616, 0x7d719eba, 0xe68c141a, 0x7d6c9ce9, 0xe6737319,
-  0x7d679642, 0xe65ad315,
-  0x7d628ac6, 0xe642340d, 0x7d5d7a74, 0xe6299604, 0x7d58654d, 0xe610f8f9,
-  0x7d534b50, 0xe5f85cef,
-  0x7d4e2c7f, 0xe5dfc1e5, 0x7d4908d9, 0xe5c727dd, 0x7d43e05e, 0xe5ae8ed8,
-  0x7d3eb30f, 0xe595f6d7,
-  0x7d3980ec, 0xe57d5fda, 0x7d3449f5, 0xe564c9e3, 0x7d2f0e2b, 0xe54c34f3,
-  0x7d29cd8c, 0xe533a10a,
-  0x7d24881b, 0xe51b0e2a, 0x7d1f3dd6, 0xe5027c53, 0x7d19eebf, 0xe4e9eb87,
-  0x7d149ad5, 0xe4d15bc6,
-  0x7d0f4218, 0xe4b8cd11, 0x7d09e489, 0xe4a03f69, 0x7d048228, 0xe487b2d0,
-  0x7cff1af5, 0xe46f2745,
-  0x7cf9aef0, 0xe4569ccb, 0x7cf43e1a, 0xe43e1362, 0x7ceec873, 0xe4258b0a,
-  0x7ce94dfb, 0xe40d03c6,
-  0x7ce3ceb2, 0xe3f47d96, 0x7cde4a98, 0xe3dbf87a, 0x7cd8c1ae, 0xe3c37474,
-  0x7cd333f3, 0xe3aaf184,
-  0x7ccda169, 0xe3926fad, 0x7cc80a0f, 0xe379eeed, 0x7cc26de5, 0xe3616f48,
-  0x7cbcccec, 0xe348f0bd,
-  0x7cb72724, 0xe330734d, 0x7cb17c8d, 0xe317f6fa, 0x7cabcd28, 0xe2ff7bc3,
-  0x7ca618f3, 0xe2e701ac,
-  0x7ca05ff1, 0xe2ce88b3, 0x7c9aa221, 0xe2b610da, 0x7c94df83, 0xe29d9a23,
-  0x7c8f1817, 0xe285248d,
-  0x7c894bde, 0xe26cb01b, 0x7c837ad8, 0xe2543ccc, 0x7c7da505, 0xe23bcaa2,
-  0x7c77ca65, 0xe223599e,
-  0x7c71eaf9, 0xe20ae9c1, 0x7c6c06c0, 0xe1f27b0b, 0x7c661dbc, 0xe1da0d7e,
-  0x7c602fec, 0xe1c1a11b,
-  0x7c5a3d50, 0xe1a935e2, 0x7c5445e9, 0xe190cbd4, 0x7c4e49b7, 0xe17862f3,
-  0x7c4848ba, 0xe15ffb3f,
-  0x7c4242f2, 0xe14794ba, 0x7c3c3860, 0xe12f2f63, 0x7c362904, 0xe116cb3d,
-  0x7c3014de, 0xe0fe6848,
-  0x7c29fbee, 0xe0e60685, 0x7c23de35, 0xe0cda5f5, 0x7c1dbbb3, 0xe0b54698,
-  0x7c179467, 0xe09ce871,
-  0x7c116853, 0xe0848b7f, 0x7c0b3777, 0xe06c2fc4, 0x7c0501d2, 0xe053d541,
-  0x7bfec765, 0xe03b7bf6,
-  0x7bf88830, 0xe02323e5, 0x7bf24434, 0xe00acd0e, 0x7bebfb70, 0xdff27773,
-  0x7be5ade6, 0xdfda2314,
-  0x7bdf5b94, 0xdfc1cff3, 0x7bd9047c, 0xdfa97e0f, 0x7bd2a89e, 0xdf912d6b,
-  0x7bcc47fa, 0xdf78de07,
-  0x7bc5e290, 0xdf608fe4, 0x7bbf7860, 0xdf484302, 0x7bb9096b, 0xdf2ff764,
-  0x7bb295b0, 0xdf17ad0a,
-  0x7bac1d31, 0xdeff63f4, 0x7ba59fee, 0xdee71c24, 0x7b9f1de6, 0xdeced59b,
-  0x7b989719, 0xdeb69059,
-  0x7b920b89, 0xde9e4c60, 0x7b8b7b36, 0xde8609b1, 0x7b84e61f, 0xde6dc84b,
-  0x7b7e4c45, 0xde558831,
-  0x7b77ada8, 0xde3d4964, 0x7b710a49, 0xde250be3, 0x7b6a6227, 0xde0ccfb1,
-  0x7b63b543, 0xddf494ce,
-  0x7b5d039e, 0xdddc5b3b, 0x7b564d36, 0xddc422f8, 0x7b4f920e, 0xddabec08,
-  0x7b48d225, 0xdd93b66a,
-  0x7b420d7a, 0xdd7b8220, 0x7b3b4410, 0xdd634f2b, 0x7b3475e5, 0xdd4b1d8c,
-  0x7b2da2fa, 0xdd32ed43,
-  0x7b26cb4f, 0xdd1abe51, 0x7b1feee5, 0xdd0290b8, 0x7b190dbc, 0xdcea6478,
-  0x7b1227d3, 0xdcd23993,
-  0x7b0b3d2c, 0xdcba1008, 0x7b044dc7, 0xdca1e7da, 0x7afd59a4, 0xdc89c109,
-  0x7af660c2, 0xdc719b96,
-  0x7aef6323, 0xdc597781, 0x7ae860c7, 0xdc4154cd, 0x7ae159ae, 0xdc293379,
-  0x7ada4dd8, 0xdc111388,
-  0x7ad33d45, 0xdbf8f4f8, 0x7acc27f7, 0xdbe0d7cd, 0x7ac50dec, 0xdbc8bc06,
-  0x7abdef25, 0xdbb0a1a4,
-  0x7ab6cba4, 0xdb9888a8, 0x7aafa367, 0xdb807114, 0x7aa8766f, 0xdb685ae9,
-  0x7aa144bc, 0xdb504626,
-  0x7a9a0e50, 0xdb3832cd, 0x7a92d329, 0xdb2020e0, 0x7a8b9348, 0xdb08105e,
-  0x7a844eae, 0xdaf00149,
-  0x7a7d055b, 0xdad7f3a2, 0x7a75b74f, 0xdabfe76a, 0x7a6e648a, 0xdaa7dca1,
-  0x7a670d0d, 0xda8fd349,
-  0x7a5fb0d8, 0xda77cb63, 0x7a584feb, 0xda5fc4ef, 0x7a50ea47, 0xda47bfee,
-  0x7a497feb, 0xda2fbc61,
-  0x7a4210d8, 0xda17ba4a, 0x7a3a9d0f, 0xd9ffb9a9, 0x7a332490, 0xd9e7ba7f,
-  0x7a2ba75a, 0xd9cfbccd,
-  0x7a24256f, 0xd9b7c094, 0x7a1c9ece, 0xd99fc5d4, 0x7a151378, 0xd987cc90,
-  0x7a0d836d, 0xd96fd4c7,
-  0x7a05eead, 0xd957de7a, 0x79fe5539, 0xd93fe9ab, 0x79f6b711, 0xd927f65b,
-  0x79ef1436, 0xd910048a,
-  0x79e76ca7, 0xd8f81439, 0x79dfc064, 0xd8e0256a, 0x79d80f6f, 0xd8c8381d,
-  0x79d059c8, 0xd8b04c52,
-  0x79c89f6e, 0xd898620c, 0x79c0e062, 0xd880794b, 0x79b91ca4, 0xd868920f,
-  0x79b15435, 0xd850ac5a,
-  0x79a98715, 0xd838c82d, 0x79a1b545, 0xd820e589, 0x7999dec4, 0xd809046e,
-  0x79920392, 0xd7f124dd,
-  0x798a23b1, 0xd7d946d8, 0x79823f20, 0xd7c16a5f, 0x797a55e0, 0xd7a98f73,
-  0x797267f2, 0xd791b616,
-  0x796a7554, 0xd779de47, 0x79627e08, 0xd7620808, 0x795a820e, 0xd74a335b,
-  0x79528167, 0xd732603f,
-  0x794a7c12, 0xd71a8eb5, 0x79427210, 0xd702bec0, 0x793a6361, 0xd6eaf05f,
-  0x79325006, 0xd6d32393,
-  0x792a37fe, 0xd6bb585e, 0x79221b4b, 0xd6a38ec0, 0x7919f9ec, 0xd68bc6ba,
-  0x7911d3e2, 0xd674004e,
-  0x7909a92d, 0xd65c3b7b, 0x790179cd, 0xd6447844, 0x78f945c3, 0xd62cb6a8,
-  0x78f10d0f, 0xd614f6a9,
-  0x78e8cfb2, 0xd5fd3848, 0x78e08dab, 0xd5e57b85, 0x78d846fb, 0xd5cdc062,
-  0x78cffba3, 0xd5b606e0,
-  0x78c7aba2, 0xd59e4eff, 0x78bf56f9, 0xd58698c0, 0x78b6fda8, 0xd56ee424,
-  0x78ae9fb0, 0xd557312d,
-  0x78a63d11, 0xd53f7fda, 0x789dd5cb, 0xd527d02e, 0x789569df, 0xd5102228,
-  0x788cf94c, 0xd4f875ca,
-  0x78848414, 0xd4e0cb15, 0x787c0a36, 0xd4c92209, 0x78738bb3, 0xd4b17aa8,
-  0x786b088c, 0xd499d4f2,
-  0x786280bf, 0xd48230e9, 0x7859f44f, 0xd46a8e8d, 0x7851633b, 0xd452eddf,
-  0x7848cd83, 0xd43b4ee0,
-  0x78403329, 0xd423b191, 0x7837942b, 0xd40c15f3, 0x782ef08b, 0xd3f47c06,
-  0x78264849, 0xd3dce3cd,
-  0x781d9b65, 0xd3c54d47, 0x7814e9df, 0xd3adb876, 0x780c33b8, 0xd396255a,
-  0x780378f1, 0xd37e93f4,
-  0x77fab989, 0xd3670446, 0x77f1f581, 0xd34f764f, 0x77e92cd9, 0xd337ea12,
-  0x77e05f91, 0xd3205f8f,
-  0x77d78daa, 0xd308d6c7, 0x77ceb725, 0xd2f14fba, 0x77c5dc01, 0xd2d9ca6a,
-  0x77bcfc3f, 0xd2c246d8,
-  0x77b417df, 0xd2aac504, 0x77ab2ee2, 0xd29344f0, 0x77a24148, 0xd27bc69c,
-  0x77994f11, 0xd2644a0a,
-  0x7790583e, 0xd24ccf39, 0x77875cce, 0xd235562b, 0x777e5cc3, 0xd21ddee2,
-  0x7775581d, 0xd206695d,
-  0x776c4edb, 0xd1eef59e, 0x776340ff, 0xd1d783a6, 0x775a2e89, 0xd1c01375,
-  0x77511778, 0xd1a8a50d,
-  0x7747fbce, 0xd191386e, 0x773edb8b, 0xd179cd99, 0x7735b6af, 0xd1626490,
-  0x772c8d3a, 0xd14afd52,
-  0x77235f2d, 0xd13397e2, 0x771a2c88, 0xd11c343f, 0x7710f54c, 0xd104d26b,
-  0x7707b979, 0xd0ed7267,
-  0x76fe790e, 0xd0d61434, 0x76f5340e, 0xd0beb7d2, 0x76ebea77, 0xd0a75d42,
-  0x76e29c4b, 0xd0900486,
-  0x76d94989, 0xd078ad9e, 0x76cff232, 0xd061588b, 0x76c69647, 0xd04a054e,
-  0x76bd35c7, 0xd032b3e7,
-  0x76b3d0b4, 0xd01b6459, 0x76aa670d, 0xd00416a3, 0x76a0f8d2, 0xcfeccac7,
-  0x76978605, 0xcfd580c6,
-  0x768e0ea6, 0xcfbe389f, 0x768492b4, 0xcfa6f255, 0x767b1231, 0xcf8fade9,
-  0x76718d1c, 0xcf786b5a,
-  0x76680376, 0xcf612aaa, 0x765e7540, 0xcf49ebda, 0x7654e279, 0xcf32aeeb,
-  0x764b4b23, 0xcf1b73de,
-  0x7641af3d, 0xcf043ab3, 0x76380ec8, 0xceed036b, 0x762e69c4, 0xced5ce08,
-  0x7624c031, 0xcebe9a8a,
-  0x761b1211, 0xcea768f2, 0x76115f63, 0xce903942, 0x7607a828, 0xce790b79,
-  0x75fdec60, 0xce61df99,
-  0x75f42c0b, 0xce4ab5a2, 0x75ea672a, 0xce338d97, 0x75e09dbd, 0xce1c6777,
-  0x75d6cfc5, 0xce054343,
-  0x75ccfd42, 0xcdee20fc, 0x75c32634, 0xcdd700a4, 0x75b94a9c, 0xcdbfe23a,
-  0x75af6a7b, 0xcda8c5c1,
-  0x75a585cf, 0xcd91ab39, 0x759b9c9b, 0xcd7a92a2, 0x7591aedd, 0xcd637bfe,
-  0x7587bc98, 0xcd4c674d,
-  0x757dc5ca, 0xcd355491, 0x7573ca75, 0xcd1e43ca, 0x7569ca99, 0xcd0734f9,
-  0x755fc635, 0xccf0281f,
-  0x7555bd4c, 0xccd91d3d, 0x754bafdc, 0xccc21455, 0x75419de7, 0xccab0d65,
-  0x7537876c, 0xcc940871,
-  0x752d6c6c, 0xcc7d0578, 0x75234ce8, 0xcc66047b, 0x751928e0, 0xcc4f057c,
-  0x750f0054, 0xcc38087b,
-  0x7504d345, 0xcc210d79, 0x74faa1b3, 0xcc0a1477, 0x74f06b9e, 0xcbf31d75,
-  0x74e63108, 0xcbdc2876,
-  0x74dbf1ef, 0xcbc53579, 0x74d1ae55, 0xcbae447f, 0x74c7663a, 0xcb97558a,
-  0x74bd199f, 0xcb80689a,
-  0x74b2c884, 0xcb697db0, 0x74a872e8, 0xcb5294ce, 0x749e18cd, 0xcb3badf3,
-  0x7493ba34, 0xcb24c921,
-  0x7489571c, 0xcb0de658, 0x747eef85, 0xcaf7059a, 0x74748371, 0xcae026e8,
-  0x746a12df, 0xcac94a42,
-  0x745f9dd1, 0xcab26fa9, 0x74552446, 0xca9b971e, 0x744aa63f, 0xca84c0a3,
-  0x744023bc, 0xca6dec37,
-  0x74359cbd, 0xca5719db, 0x742b1144, 0xca404992, 0x74208150, 0xca297b5a,
-  0x7415ece2, 0xca12af37,
-  0x740b53fb, 0xc9fbe527, 0x7400b69a, 0xc9e51d2d, 0x73f614c0, 0xc9ce5748,
-  0x73eb6e6e, 0xc9b7937a,
-  0x73e0c3a3, 0xc9a0d1c5, 0x73d61461, 0xc98a1227, 0x73cb60a8, 0xc97354a4,
-  0x73c0a878, 0xc95c993a,
-  0x73b5ebd1, 0xc945dfec, 0x73ab2ab4, 0xc92f28ba, 0x73a06522, 0xc91873a5,
-  0x73959b1b, 0xc901c0ae,
-  0x738acc9e, 0xc8eb0fd6, 0x737ff9ae, 0xc8d4611d, 0x73752249, 0xc8bdb485,
-  0x736a4671, 0xc8a70a0e,
-  0x735f6626, 0xc89061ba, 0x73548168, 0xc879bb89, 0x73499838, 0xc863177b,
-  0x733eaa96, 0xc84c7593,
-  0x7333b883, 0xc835d5d0, 0x7328c1ff, 0xc81f3834, 0x731dc70a, 0xc8089cbf,
-  0x7312c7a5, 0xc7f20373,
-  0x7307c3d0, 0xc7db6c50, 0x72fcbb8c, 0xc7c4d757, 0x72f1aed9, 0xc7ae4489,
-  0x72e69db7, 0xc797b3e7,
-  0x72db8828, 0xc7812572, 0x72d06e2b, 0xc76a992a, 0x72c54fc1, 0xc7540f11,
-  0x72ba2cea, 0xc73d8727,
-  0x72af05a7, 0xc727016d, 0x72a3d9f7, 0xc7107de4, 0x7298a9dd, 0xc6f9fc8d,
-  0x728d7557, 0xc6e37d69,
-  0x72823c67, 0xc6cd0079, 0x7276ff0d, 0xc6b685bd, 0x726bbd48, 0xc6a00d37,
-  0x7260771b, 0xc68996e7,
-  0x72552c85, 0xc67322ce, 0x7249dd86, 0xc65cb0ed, 0x723e8a20, 0xc6464144,
-  0x72333251, 0xc62fd3d6,
-  0x7227d61c, 0xc61968a2, 0x721c7580, 0xc602ffaa, 0x7211107e, 0xc5ec98ee,
-  0x7205a716, 0xc5d6346f,
-  0x71fa3949, 0xc5bfd22e, 0x71eec716, 0xc5a9722c, 0x71e35080, 0xc593146a,
-  0x71d7d585, 0xc57cb8e9,
-  0x71cc5626, 0xc5665fa9, 0x71c0d265, 0xc55008ab, 0x71b54a41, 0xc539b3f1,
-  0x71a9bdba, 0xc523617a,
-  0x719e2cd2, 0xc50d1149, 0x71929789, 0xc4f6c35d, 0x7186fdde, 0xc4e077b8,
-  0x717b5fd3, 0xc4ca2e5b,
-  0x716fbd68, 0xc4b3e746, 0x7164169d, 0xc49da27a, 0x71586b74, 0xc4875ff9,
-  0x714cbbeb, 0xc4711fc2,
-  0x71410805, 0xc45ae1d7, 0x71354fc0, 0xc444a639, 0x7129931f, 0xc42e6ce8,
-  0x711dd220, 0xc41835e6,
-  0x71120cc5, 0xc4020133, 0x7106430e, 0xc3ebced0, 0x70fa74fc, 0xc3d59ebe,
-  0x70eea28e, 0xc3bf70fd,
-  0x70e2cbc6, 0xc3a94590, 0x70d6f0a4, 0xc3931c76, 0x70cb1128, 0xc37cf5b0,
-  0x70bf2d53, 0xc366d140,
-  0x70b34525, 0xc350af26, 0x70a7589f, 0xc33a8f62, 0x709b67c0, 0xc32471f7,
-  0x708f728b, 0xc30e56e4,
-  0x708378ff, 0xc2f83e2a, 0x70777b1c, 0xc2e227cb, 0x706b78e3, 0xc2cc13c7,
-  0x705f7255, 0xc2b6021f,
-  0x70536771, 0xc29ff2d4, 0x70475839, 0xc289e5e7, 0x703b44ad, 0xc273db58,
-  0x702f2ccd, 0xc25dd329,
-  0x7023109a, 0xc247cd5a, 0x7016f014, 0xc231c9ec, 0x700acb3c, 0xc21bc8e1,
-  0x6ffea212, 0xc205ca38,
-  0x6ff27497, 0xc1efcdf3, 0x6fe642ca, 0xc1d9d412, 0x6fda0cae, 0xc1c3dc97,
-  0x6fcdd241, 0xc1ade781,
-  0x6fc19385, 0xc197f4d4, 0x6fb5507a, 0xc182048d, 0x6fa90921, 0xc16c16b0,
-  0x6f9cbd79, 0xc1562b3d,
-  0x6f906d84, 0xc1404233, 0x6f841942, 0xc12a5b95, 0x6f77c0b3, 0xc1147764,
-  0x6f6b63d8, 0xc0fe959f,
-  0x6f5f02b2, 0xc0e8b648, 0x6f529d40, 0xc0d2d960, 0x6f463383, 0xc0bcfee7,
-  0x6f39c57d, 0xc0a726df,
-  0x6f2d532c, 0xc0915148, 0x6f20dc92, 0xc07b7e23, 0x6f1461b0, 0xc065ad70,
-  0x6f07e285, 0xc04fdf32,
-  0x6efb5f12, 0xc03a1368, 0x6eeed758, 0xc0244a14, 0x6ee24b57, 0xc00e8336,
-  0x6ed5bb10, 0xbff8bece,
-  0x6ec92683, 0xbfe2fcdf, 0x6ebc8db0, 0xbfcd3d69, 0x6eaff099, 0xbfb7806c,
-  0x6ea34f3d, 0xbfa1c5ea,
-  0x6e96a99d, 0xbf8c0de3, 0x6e89ffb9, 0xbf765858, 0x6e7d5193, 0xbf60a54a,
-  0x6e709f2a, 0xbf4af4ba,
-  0x6e63e87f, 0xbf3546a8, 0x6e572d93, 0xbf1f9b16, 0x6e4a6e66, 0xbf09f205,
-  0x6e3daaf8, 0xbef44b74,
-  0x6e30e34a, 0xbedea765, 0x6e24175c, 0xbec905d9, 0x6e174730, 0xbeb366d1,
-  0x6e0a72c5, 0xbe9dca4e,
-  0x6dfd9a1c, 0xbe88304f, 0x6df0bd35, 0xbe7298d7, 0x6de3dc11, 0xbe5d03e6,
-  0x6dd6f6b1, 0xbe47717c,
-  0x6dca0d14, 0xbe31e19b, 0x6dbd1f3c, 0xbe1c5444, 0x6db02d29, 0xbe06c977,
-  0x6da336dc, 0xbdf14135,
-  0x6d963c54, 0xbddbbb7f, 0x6d893d93, 0xbdc63856, 0x6d7c3a98, 0xbdb0b7bb,
-  0x6d6f3365, 0xbd9b39ad,
-  0x6d6227fa, 0xbd85be30, 0x6d551858, 0xbd704542, 0x6d48047e, 0xbd5acee5,
-  0x6d3aec6e, 0xbd455b1a,
-  0x6d2dd027, 0xbd2fe9e2, 0x6d20afac, 0xbd1a7b3d, 0x6d138afb, 0xbd050f2c,
-  0x6d066215, 0xbcefa5b0,
-  0x6cf934fc, 0xbcda3ecb, 0x6cec03af, 0xbcc4da7b, 0x6cdece2f, 0xbcaf78c4,
-  0x6cd1947c, 0xbc9a19a5,
-  0x6cc45698, 0xbc84bd1f, 0x6cb71482, 0xbc6f6333, 0x6ca9ce3b, 0xbc5a0be2,
-  0x6c9c83c3, 0xbc44b72c,
-  0x6c8f351c, 0xbc2f6513, 0x6c81e245, 0xbc1a1598, 0x6c748b3f, 0xbc04c8ba,
-  0x6c67300b, 0xbbef7e7c,
-  0x6c59d0a9, 0xbbda36dd, 0x6c4c6d1a, 0xbbc4f1df, 0x6c3f055d, 0xbbafaf82,
-  0x6c319975, 0xbb9a6fc7,
-  0x6c242960, 0xbb8532b0, 0x6c16b521, 0xbb6ff83c, 0x6c093cb6, 0xbb5ac06d,
-  0x6bfbc021, 0xbb458b43,
-  0x6bee3f62, 0xbb3058c0, 0x6be0ba7b, 0xbb1b28e4, 0x6bd3316a, 0xbb05fbb0,
-  0x6bc5a431, 0xbaf0d125,
-  0x6bb812d1, 0xbadba943, 0x6baa7d49, 0xbac6840c, 0x6b9ce39b, 0xbab16180,
-  0x6b8f45c7, 0xba9c41a0,
-  0x6b81a3cd, 0xba87246d, 0x6b73fdae, 0xba7209e7, 0x6b66536b, 0xba5cf210,
-  0x6b58a503, 0xba47dce8,
-  0x6b4af279, 0xba32ca71, 0x6b3d3bcb, 0xba1dbaaa, 0x6b2f80fb, 0xba08ad95,
-  0x6b21c208, 0xb9f3a332,
-  0x6b13fef5, 0xb9de9b83, 0x6b0637c1, 0xb9c99688, 0x6af86c6c, 0xb9b49442,
-  0x6aea9cf8, 0xb99f94b2,
-  0x6adcc964, 0xb98a97d8, 0x6acef1b2, 0xb9759db6, 0x6ac115e2, 0xb960a64c,
-  0x6ab335f4, 0xb94bb19b,
-  0x6aa551e9, 0xb936bfa4, 0x6a9769c1, 0xb921d067, 0x6a897d7d, 0xb90ce3e6,
-  0x6a7b8d1e, 0xb8f7fa21,
-  0x6a6d98a4, 0xb8e31319, 0x6a5fa010, 0xb8ce2ecf, 0x6a51a361, 0xb8b94d44,
-  0x6a43a29a, 0xb8a46e78,
-  0x6a359db9, 0xb88f926d, 0x6a2794c1, 0xb87ab922, 0x6a1987b0, 0xb865e299,
-  0x6a0b7689, 0xb8510ed4,
-  0x69fd614a, 0xb83c3dd1, 0x69ef47f6, 0xb8276f93, 0x69e12a8c, 0xb812a41a,
-  0x69d3090e, 0xb7fddb67,
-  0x69c4e37a, 0xb7e9157a, 0x69b6b9d3, 0xb7d45255, 0x69a88c19, 0xb7bf91f8,
-  0x699a5a4c, 0xb7aad465,
-  0x698c246c, 0xb796199b, 0x697dea7b, 0xb781619c, 0x696fac78, 0xb76cac69,
-  0x69616a65, 0xb757fa01,
-  0x69532442, 0xb7434a67, 0x6944da10, 0xb72e9d9b, 0x69368bce, 0xb719f39e,
-  0x6928397e, 0xb7054c6f,
-  0x6919e320, 0xb6f0a812, 0x690b88b5, 0xb6dc0685, 0x68fd2a3d, 0xb6c767ca,
-  0x68eec7b9, 0xb6b2cbe2,
-  0x68e06129, 0xb69e32cd, 0x68d1f68f, 0xb6899c8d, 0x68c387e9, 0xb6750921,
-  0x68b5153a, 0xb660788c,
-  0x68a69e81, 0xb64beacd, 0x689823bf, 0xb6375fe5, 0x6889a4f6, 0xb622d7d6,
-  0x687b2224, 0xb60e529f,
-  0x686c9b4b, 0xb5f9d043, 0x685e106c, 0xb5e550c1, 0x684f8186, 0xb5d0d41a,
-  0x6840ee9b, 0xb5bc5a50,
-  0x683257ab, 0xb5a7e362, 0x6823bcb7, 0xb5936f53, 0x68151dbe, 0xb57efe22,
-  0x68067ac3, 0xb56a8fd0,
-  0x67f7d3c5, 0xb556245e, 0x67e928c5, 0xb541bbcd, 0x67da79c3, 0xb52d561e,
-  0x67cbc6c0, 0xb518f351,
-  0x67bd0fbd, 0xb5049368, 0x67ae54ba, 0xb4f03663, 0x679f95b7, 0xb4dbdc42,
-  0x6790d2b6, 0xb4c78507,
-  0x67820bb7, 0xb4b330b3, 0x677340ba, 0xb49edf45, 0x676471c0, 0xb48a90c0,
-  0x67559eca, 0xb4764523,
-  0x6746c7d8, 0xb461fc70, 0x6737ecea, 0xb44db6a8, 0x67290e02, 0xb43973ca,
-  0x671a2b20, 0xb42533d8,
-  0x670b4444, 0xb410f6d3, 0x66fc596f, 0xb3fcbcbb, 0x66ed6aa1, 0xb3e88592,
-  0x66de77dc, 0xb3d45157,
-  0x66cf8120, 0xb3c0200c, 0x66c0866d, 0xb3abf1b2, 0x66b187c3, 0xb397c649,
-  0x66a28524, 0xb3839dd3,
-  0x66937e91, 0xb36f784f, 0x66847408, 0xb35b55bf, 0x6675658c, 0xb3473623,
-  0x6666531d, 0xb333197c,
-  0x66573cbb, 0xb31effcc, 0x66482267, 0xb30ae912, 0x66390422, 0xb2f6d550,
-  0x6629e1ec, 0xb2e2c486,
-  0x661abbc5, 0xb2ceb6b5, 0x660b91af, 0xb2baabde, 0x65fc63a9, 0xb2a6a402,
-  0x65ed31b5, 0xb2929f21,
-  0x65ddfbd3, 0xb27e9d3c, 0x65cec204, 0xb26a9e54, 0x65bf8447, 0xb256a26a,
-  0x65b0429f, 0xb242a97e,
-  0x65a0fd0b, 0xb22eb392, 0x6591b38c, 0xb21ac0a6, 0x65826622, 0xb206d0ba,
-  0x657314cf, 0xb1f2e3d0,
-  0x6563bf92, 0xb1def9e9, 0x6554666d, 0xb1cb1304, 0x6545095f, 0xb1b72f23,
-  0x6535a86b, 0xb1a34e47,
-  0x6526438f, 0xb18f7071, 0x6516dacd, 0xb17b95a0, 0x65076e25, 0xb167bdd7,
-  0x64f7fd98, 0xb153e915,
-  0x64e88926, 0xb140175b, 0x64d910d1, 0xb12c48ab, 0x64c99498, 0xb1187d05,
-  0x64ba147d, 0xb104b46a,
-  0x64aa907f, 0xb0f0eeda, 0x649b08a0, 0xb0dd2c56, 0x648b7ce0, 0xb0c96ce0,
-  0x647bed3f, 0xb0b5b077,
-  0x646c59bf, 0xb0a1f71d, 0x645cc260, 0xb08e40d2, 0x644d2722, 0xb07a8d97,
-  0x643d8806, 0xb066dd6d,
-  0x642de50d, 0xb0533055, 0x641e3e38, 0xb03f864f, 0x640e9386, 0xb02bdf5c,
-  0x63fee4f8, 0xb0183b7d,
-  0x63ef3290, 0xb0049ab3, 0x63df7c4d, 0xaff0fcfe, 0x63cfc231, 0xafdd625f,
-  0x63c0043b, 0xafc9cad7,
-  0x63b0426d, 0xafb63667, 0x63a07cc7, 0xafa2a50f, 0x6390b34a, 0xaf8f16d1,
-  0x6380e5f6, 0xaf7b8bac,
-  0x637114cc, 0xaf6803a2, 0x63613fcd, 0xaf547eb3, 0x635166f9, 0xaf40fce1,
-  0x63418a50, 0xaf2d7e2b,
-  0x6331a9d4, 0xaf1a0293, 0x6321c585, 0xaf068a1a, 0x6311dd64, 0xaef314c0,
-  0x6301f171, 0xaedfa285,
-  0x62f201ac, 0xaecc336c, 0x62e20e17, 0xaeb8c774, 0x62d216b3, 0xaea55e9e,
-  0x62c21b7e, 0xae91f8eb,
-  0x62b21c7b, 0xae7e965b, 0x62a219aa, 0xae6b36f0, 0x6292130c, 0xae57daab,
-  0x628208a1, 0xae44818b,
-  0x6271fa69, 0xae312b92, 0x6261e866, 0xae1dd8c0, 0x6251d298, 0xae0a8916,
-  0x6241b8ff, 0xadf73c96,
-  0x62319b9d, 0xade3f33e, 0x62217a72, 0xadd0ad12, 0x6211557e, 0xadbd6a10,
-  0x62012cc2, 0xadaa2a3b,
-  0x61f1003f, 0xad96ed92, 0x61e0cff5, 0xad83b416, 0x61d09be5, 0xad707dc8,
-  0x61c06410, 0xad5d4aaa,
-  0x61b02876, 0xad4a1aba, 0x619fe918, 0xad36edfc, 0x618fa5f7, 0xad23c46e,
-  0x617f5f12, 0xad109e12,
-  0x616f146c, 0xacfd7ae8, 0x615ec603, 0xacea5af2, 0x614e73da, 0xacd73e30,
-  0x613e1df0, 0xacc424a3,
-  0x612dc447, 0xacb10e4b, 0x611d66de, 0xac9dfb29, 0x610d05b7, 0xac8aeb3e,
-  0x60fca0d2, 0xac77de8b,
-  0x60ec3830, 0xac64d510, 0x60dbcbd1, 0xac51cecf, 0x60cb5bb7, 0xac3ecbc7,
-  0x60bae7e1, 0xac2bcbfa,
-  0x60aa7050, 0xac18cf69, 0x6099f505, 0xac05d613, 0x60897601, 0xabf2dffb,
-  0x6078f344, 0xabdfed1f,
-  0x60686ccf, 0xabccfd83, 0x6057e2a2, 0xabba1125, 0x604754bf, 0xaba72807,
-  0x6036c325, 0xab944229,
-  0x60262dd6, 0xab815f8d, 0x601594d1, 0xab6e8032, 0x6004f819, 0xab5ba41a,
-  0x5ff457ad, 0xab48cb46,
-  0x5fe3b38d, 0xab35f5b5, 0x5fd30bbc, 0xab23236a, 0x5fc26038, 0xab105464,
-  0x5fb1b104, 0xaafd88a4,
-  0x5fa0fe1f, 0xaaeac02c, 0x5f90478a, 0xaad7fafb, 0x5f7f8d46, 0xaac53912,
-  0x5f6ecf53, 0xaab27a73,
-  0x5f5e0db3, 0xaa9fbf1e, 0x5f4d4865, 0xaa8d0713, 0x5f3c7f6b, 0xaa7a5253,
-  0x5f2bb2c5, 0xaa67a0e0,
-  0x5f1ae274, 0xaa54f2ba, 0x5f0a0e77, 0xaa4247e1, 0x5ef936d1, 0xaa2fa056,
-  0x5ee85b82, 0xaa1cfc1a,
-  0x5ed77c8a, 0xaa0a5b2e, 0x5ec699e9, 0xa9f7bd92, 0x5eb5b3a2, 0xa9e52347,
-  0x5ea4c9b3, 0xa9d28c4e,
-  0x5e93dc1f, 0xa9bff8a8, 0x5e82eae5, 0xa9ad6855, 0x5e71f606, 0xa99adb56,
-  0x5e60fd84, 0xa98851ac,
-  0x5e50015d, 0xa975cb57, 0x5e3f0194, 0xa9634858, 0x5e2dfe29, 0xa950c8b0,
-  0x5e1cf71c, 0xa93e4c5f,
-  0x5e0bec6e, 0xa92bd367, 0x5dfade20, 0xa9195dc7, 0x5de9cc33, 0xa906eb82,
-  0x5dd8b6a7, 0xa8f47c97,
-  0x5dc79d7c, 0xa8e21106, 0x5db680b4, 0xa8cfa8d2, 0x5da5604f, 0xa8bd43fa,
-  0x5d943c4e, 0xa8aae280,
-  0x5d8314b1, 0xa8988463, 0x5d71e979, 0xa88629a5, 0x5d60baa7, 0xa873d246,
-  0x5d4f883b, 0xa8617e48,
-  0x5d3e5237, 0xa84f2daa, 0x5d2d189a, 0xa83ce06e, 0x5d1bdb65, 0xa82a9693,
-  0x5d0a9a9a, 0xa818501c,
-  0x5cf95638, 0xa8060d08, 0x5ce80e41, 0xa7f3cd59, 0x5cd6c2b5, 0xa7e1910f,
-  0x5cc57394, 0xa7cf582a,
-  0x5cb420e0, 0xa7bd22ac, 0x5ca2ca99, 0xa7aaf094, 0x5c9170bf, 0xa798c1e5,
-  0x5c801354, 0xa786969e,
-  0x5c6eb258, 0xa7746ec0, 0x5c5d4dcc, 0xa7624a4d, 0x5c4be5b0, 0xa7502943,
-  0x5c3a7a05, 0xa73e0ba5,
-  0x5c290acc, 0xa72bf174, 0x5c179806, 0xa719daae, 0x5c0621b2, 0xa707c757,
-  0x5bf4a7d2, 0xa6f5b76d,
-  0x5be32a67, 0xa6e3aaf2, 0x5bd1a971, 0xa6d1a1e7, 0x5bc024f0, 0xa6bf9c4b,
-  0x5bae9ce7, 0xa6ad9a21,
-  0x5b9d1154, 0xa69b9b68, 0x5b8b8239, 0xa689a022, 0x5b79ef96, 0xa677a84e,
-  0x5b68596d, 0xa665b3ee,
-  0x5b56bfbd, 0xa653c303, 0x5b452288, 0xa641d58c, 0x5b3381ce, 0xa62feb8b,
-  0x5b21dd90, 0xa61e0501,
-  0x5b1035cf, 0xa60c21ee, 0x5afe8a8b, 0xa5fa4252, 0x5aecdbc5, 0xa5e8662f,
-  0x5adb297d, 0xa5d68d85,
-  0x5ac973b5, 0xa5c4b855, 0x5ab7ba6c, 0xa5b2e6a0, 0x5aa5fda5, 0xa5a11866,
-  0x5a943d5e, 0xa58f4da8,
-  0x5a82799a, 0xa57d8666, 0x5a70b258, 0xa56bc2a2, 0x5a5ee79a, 0xa55a025b,
-  0x5a4d1960, 0xa5484594,
-  0x5a3b47ab, 0xa5368c4b, 0x5a29727b, 0xa524d683, 0x5a1799d1, 0xa513243b,
-  0x5a05bdae, 0xa5017575,
-  0x59f3de12, 0xa4efca31, 0x59e1faff, 0xa4de2270, 0x59d01475, 0xa4cc7e32,
-  0x59be2a74, 0xa4badd78,
-  0x59ac3cfd, 0xa4a94043, 0x599a4c12, 0xa497a693, 0x598857b2, 0xa486106a,
-  0x59765fde, 0xa4747dc7,
-  0x59646498, 0xa462eeac, 0x595265df, 0xa4516319, 0x594063b5, 0xa43fdb10,
-  0x592e5e19, 0xa42e568f,
-  0x591c550e, 0xa41cd599, 0x590a4893, 0xa40b582e, 0x58f838a9, 0xa3f9de4e,
-  0x58e62552, 0xa3e867fa,
-  0x58d40e8c, 0xa3d6f534, 0x58c1f45b, 0xa3c585fb, 0x58afd6bd, 0xa3b41a50,
-  0x589db5b3, 0xa3a2b234,
-  0x588b9140, 0xa3914da8, 0x58796962, 0xa37fecac, 0x58673e1b, 0xa36e8f41,
-  0x58550f6c, 0xa35d3567,
-  0x5842dd54, 0xa34bdf20, 0x5830a7d6, 0xa33a8c6c, 0x581e6ef1, 0xa3293d4b,
-  0x580c32a7, 0xa317f1bf,
-  0x57f9f2f8, 0xa306a9c8, 0x57e7afe4, 0xa2f56566, 0x57d5696d, 0xa2e4249b,
-  0x57c31f92, 0xa2d2e766,
-  0x57b0d256, 0xa2c1adc9, 0x579e81b8, 0xa2b077c5, 0x578c2dba, 0xa29f4559,
-  0x5779d65b, 0xa28e1687,
-  0x57677b9d, 0xa27ceb4f, 0x57551d80, 0xa26bc3b2, 0x5742bc06, 0xa25a9fb1,
-  0x5730572e, 0xa2497f4c,
-  0x571deefa, 0xa2386284, 0x570b8369, 0xa2274959, 0x56f9147e, 0xa21633cd,
-  0x56e6a239, 0xa20521e0,
-  0x56d42c99, 0xa1f41392, 0x56c1b3a1, 0xa1e308e4, 0x56af3750, 0xa1d201d7,
-  0x569cb7a8, 0xa1c0fe6c,
-  0x568a34a9, 0xa1affea3, 0x5677ae54, 0xa19f027c, 0x566524aa, 0xa18e09fa,
-  0x565297ab, 0xa17d151b,
-  0x56400758, 0xa16c23e1, 0x562d73b2, 0xa15b364d, 0x561adcb9, 0xa14a4c5e,
-  0x5608426e, 0xa1396617,
-  0x55f5a4d2, 0xa1288376, 0x55e303e6, 0xa117a47e, 0x55d05faa, 0xa106c92f,
-  0x55bdb81f, 0xa0f5f189,
-  0x55ab0d46, 0xa0e51d8c, 0x55985f20, 0xa0d44d3b, 0x5585adad, 0xa0c38095,
-  0x5572f8ed, 0xa0b2b79b,
-  0x556040e2, 0xa0a1f24d, 0x554d858d, 0xa09130ad, 0x553ac6ee, 0xa08072ba,
-  0x55280505, 0xa06fb876,
-  0x55153fd4, 0xa05f01e1, 0x5502775c, 0xa04e4efc, 0x54efab9c, 0xa03d9fc8,
-  0x54dcdc96, 0xa02cf444,
-  0x54ca0a4b, 0xa01c4c73, 0x54b734ba, 0xa00ba853, 0x54a45be6, 0x9ffb07e7,
-  0x54917fce, 0x9fea6b2f,
-  0x547ea073, 0x9fd9d22a, 0x546bbdd7, 0x9fc93cdb, 0x5458d7f9, 0x9fb8ab41,
-  0x5445eedb, 0x9fa81d5e,
-  0x5433027d, 0x9f979331, 0x542012e1, 0x9f870cbc, 0x540d2005, 0x9f7689ff,
-  0x53fa29ed, 0x9f660afb,
-  0x53e73097, 0x9f558fb0, 0x53d43406, 0x9f45181f, 0x53c13439, 0x9f34a449,
-  0x53ae3131, 0x9f24342f,
-  0x539b2af0, 0x9f13c7d0, 0x53882175, 0x9f035f2e, 0x537514c2, 0x9ef2fa49,
-  0x536204d7, 0x9ee29922,
-  0x534ef1b5, 0x9ed23bb9, 0x533bdb5d, 0x9ec1e210, 0x5328c1d0, 0x9eb18c26,
-  0x5315a50e, 0x9ea139fd,
-  0x53028518, 0x9e90eb94, 0x52ef61ee, 0x9e80a0ee, 0x52dc3b92, 0x9e705a09,
-  0x52c91204, 0x9e6016e8,
-  0x52b5e546, 0x9e4fd78a, 0x52a2b556, 0x9e3f9bf0, 0x528f8238, 0x9e2f641b,
-  0x527c4bea, 0x9e1f300b,
-  0x5269126e, 0x9e0effc1, 0x5255d5c5, 0x9dfed33e, 0x524295f0, 0x9deeaa82,
-  0x522f52ee, 0x9dde858e,
-  0x521c0cc2, 0x9dce6463, 0x5208c36a, 0x9dbe4701, 0x51f576ea, 0x9dae2d68,
-  0x51e22740, 0x9d9e179a,
-  0x51ced46e, 0x9d8e0597, 0x51bb7e75, 0x9d7df75f, 0x51a82555, 0x9d6decf4,
-  0x5194c910, 0x9d5de656,
-  0x518169a5, 0x9d4de385, 0x516e0715, 0x9d3de482, 0x515aa162, 0x9d2de94d,
-  0x5147388c, 0x9d1df1e9,
-  0x5133cc94, 0x9d0dfe54, 0x51205d7b, 0x9cfe0e8f, 0x510ceb40, 0x9cee229c,
-  0x50f975e6, 0x9cde3a7b,
-  0x50e5fd6d, 0x9cce562c, 0x50d281d5, 0x9cbe75b0, 0x50bf031f, 0x9cae9907,
-  0x50ab814d, 0x9c9ec033,
-  0x5097fc5e, 0x9c8eeb34, 0x50847454, 0x9c7f1a0a, 0x5070e92f, 0x9c6f4cb6,
-  0x505d5af1, 0x9c5f8339,
-  0x5049c999, 0x9c4fbd93, 0x50363529, 0x9c3ffbc5, 0x50229da1, 0x9c303dcf,
-  0x500f0302, 0x9c2083b3,
-  0x4ffb654d, 0x9c10cd70, 0x4fe7c483, 0x9c011b08, 0x4fd420a4, 0x9bf16c7a,
-  0x4fc079b1, 0x9be1c1c8,
-  0x4faccfab, 0x9bd21af3, 0x4f992293, 0x9bc277fa, 0x4f857269, 0x9bb2d8de,
-  0x4f71bf2e, 0x9ba33da0,
-  0x4f5e08e3, 0x9b93a641, 0x4f4a4f89, 0x9b8412c1, 0x4f369320, 0x9b748320,
-  0x4f22d3aa, 0x9b64f760,
-  0x4f0f1126, 0x9b556f81, 0x4efb4b96, 0x9b45eb83, 0x4ee782fb, 0x9b366b68,
-  0x4ed3b755, 0x9b26ef2f,
-  0x4ebfe8a5, 0x9b1776da, 0x4eac16eb, 0x9b080268, 0x4e984229, 0x9af891db,
-  0x4e846a60, 0x9ae92533,
-  0x4e708f8f, 0x9ad9bc71, 0x4e5cb1b9, 0x9aca5795, 0x4e48d0dd, 0x9abaf6a1,
-  0x4e34ecfc, 0x9aab9993,
-  0x4e210617, 0x9a9c406e, 0x4e0d1c30, 0x9a8ceb31, 0x4df92f46, 0x9a7d99de,
-  0x4de53f5a, 0x9a6e4c74,
-  0x4dd14c6e, 0x9a5f02f5, 0x4dbd5682, 0x9a4fbd61, 0x4da95d96, 0x9a407bb9,
-  0x4d9561ac, 0x9a313dfc,
-  0x4d8162c4, 0x9a22042d, 0x4d6d60df, 0x9a12ce4b, 0x4d595bfe, 0x9a039c57,
-  0x4d455422, 0x99f46e51,
-  0x4d31494b, 0x99e5443b, 0x4d1d3b7a, 0x99d61e14, 0x4d092ab0, 0x99c6fbde,
-  0x4cf516ee, 0x99b7dd99,
-  0x4ce10034, 0x99a8c345, 0x4ccce684, 0x9999ace3, 0x4cb8c9dd, 0x998a9a74,
-  0x4ca4aa41, 0x997b8bf8,
-  0x4c9087b1, 0x996c816f, 0x4c7c622d, 0x995d7adc, 0x4c6839b7, 0x994e783d,
-  0x4c540e4e, 0x993f7993,
-  0x4c3fdff4, 0x99307ee0, 0x4c2baea9, 0x99218824, 0x4c177a6e, 0x9912955f,
-  0x4c034345, 0x9903a691,
-  0x4bef092d, 0x98f4bbbc, 0x4bdacc28, 0x98e5d4e0, 0x4bc68c36, 0x98d6f1fe,
-  0x4bb24958, 0x98c81316,
-  0x4b9e0390, 0x98b93828, 0x4b89badd, 0x98aa6136, 0x4b756f40, 0x989b8e40,
-  0x4b6120bb, 0x988cbf46,
-  0x4b4ccf4d, 0x987df449, 0x4b387af9, 0x986f2d4a, 0x4b2423be, 0x98606a49,
-  0x4b0fc99d, 0x9851ab46,
-  0x4afb6c98, 0x9842f043, 0x4ae70caf, 0x98343940, 0x4ad2a9e2, 0x9825863d,
-  0x4abe4433, 0x9816d73b,
-  0x4aa9dba2, 0x98082c3b, 0x4a957030, 0x97f9853d, 0x4a8101de, 0x97eae242,
-  0x4a6c90ad, 0x97dc4349,
-  0x4a581c9e, 0x97cda855, 0x4a43a5b0, 0x97bf1165, 0x4a2f2be6, 0x97b07e7a,
-  0x4a1aaf3f, 0x97a1ef94,
-  0x4a062fbd, 0x979364b5, 0x49f1ad61, 0x9784dddc, 0x49dd282a, 0x97765b0a,
-  0x49c8a01b, 0x9767dc41,
-  0x49b41533, 0x9759617f, 0x499f8774, 0x974aeac6, 0x498af6df, 0x973c7817,
-  0x49766373, 0x972e0971,
-  0x4961cd33, 0x971f9ed7, 0x494d341e, 0x97113847, 0x49389836, 0x9702d5c3,
-  0x4923f97b, 0x96f4774b,
-  0x490f57ee, 0x96e61ce0, 0x48fab391, 0x96d7c682, 0x48e60c62, 0x96c97432,
-  0x48d16265, 0x96bb25f0,
-  0x48bcb599, 0x96acdbbe, 0x48a805ff, 0x969e959b, 0x48935397, 0x96905388,
-  0x487e9e64, 0x96821585,
-  0x4869e665, 0x9673db94, 0x48552b9b, 0x9665a5b4, 0x48406e08, 0x965773e7,
-  0x482badab, 0x9649462d,
-  0x4816ea86, 0x963b1c86, 0x48022499, 0x962cf6f2, 0x47ed5be6, 0x961ed574,
-  0x47d8906d, 0x9610b80a,
-  0x47c3c22f, 0x96029eb6, 0x47aef12c, 0x95f48977, 0x479a1d67, 0x95e67850,
-  0x478546de, 0x95d86b3f,
-  0x47706d93, 0x95ca6247, 0x475b9188, 0x95bc5d66, 0x4746b2bc, 0x95ae5c9f,
-  0x4731d131, 0x95a05ff0,
-  0x471cece7, 0x9592675c, 0x470805df, 0x958472e2, 0x46f31c1a, 0x95768283,
-  0x46de2f99, 0x9568963f,
-  0x46c9405c, 0x955aae17, 0x46b44e65, 0x954cca0c, 0x469f59b4, 0x953eea1e,
-  0x468a624a, 0x95310e4e,
-  0x46756828, 0x9523369c, 0x46606b4e, 0x95156308, 0x464b6bbe, 0x95079394,
-  0x46366978, 0x94f9c83f,
-  0x4621647d, 0x94ec010b, 0x460c5cce, 0x94de3df8, 0x45f7526b, 0x94d07f05,
-  0x45e24556, 0x94c2c435,
-  0x45cd358f, 0x94b50d87, 0x45b82318, 0x94a75afd, 0x45a30df0, 0x9499ac95,
-  0x458df619, 0x948c0252,
-  0x4578db93, 0x947e5c33, 0x4563be60, 0x9470ba39, 0x454e9e80, 0x94631c65,
-  0x45397bf4, 0x945582b7,
-  0x452456bd, 0x9447ed2f, 0x450f2edb, 0x943a5bcf, 0x44fa0450, 0x942cce96,
-  0x44e4d71c, 0x941f4585,
-  0x44cfa740, 0x9411c09e, 0x44ba74bd, 0x94043fdf, 0x44a53f93, 0x93f6c34a,
-  0x449007c4, 0x93e94adf,
-  0x447acd50, 0x93dbd6a0, 0x44659039, 0x93ce668b, 0x4450507e, 0x93c0faa3,
-  0x443b0e21, 0x93b392e6,
-  0x4425c923, 0x93a62f57, 0x44108184, 0x9398cff5, 0x43fb3746, 0x938b74c1,
-  0x43e5ea68, 0x937e1dbb,
-  0x43d09aed, 0x9370cae4, 0x43bb48d4, 0x93637c3d, 0x43a5f41e, 0x935631c5,
-  0x43909ccd, 0x9348eb7e,
-  0x437b42e1, 0x933ba968, 0x4365e65b, 0x932e6b84, 0x4350873c, 0x932131d1,
-  0x433b2585, 0x9313fc51,
-  0x4325c135, 0x9306cb04, 0x43105a50, 0x92f99deb, 0x42faf0d4, 0x92ec7505,
-  0x42e584c3, 0x92df5054,
-  0x42d0161e, 0x92d22fd9, 0x42baa4e6, 0x92c51392, 0x42a5311b, 0x92b7fb82,
-  0x428fbabe, 0x92aae7a8,
-  0x427a41d0, 0x929dd806, 0x4264c653, 0x9290cc9b, 0x424f4845, 0x9283c568,
-  0x4239c7aa, 0x9276c26d,
-  0x42244481, 0x9269c3ac, 0x420ebecb, 0x925cc924, 0x41f93689, 0x924fd2d7,
-  0x41e3abbc, 0x9242e0c4,
-  0x41ce1e65, 0x9235f2ec, 0x41b88e84, 0x9229094f, 0x41a2fc1a, 0x921c23ef,
-  0x418d6729, 0x920f42cb,
-  0x4177cfb1, 0x920265e4, 0x416235b2, 0x91f58d3b, 0x414c992f, 0x91e8b8d0,
-  0x4136fa27, 0x91dbe8a4,
-  0x4121589b, 0x91cf1cb6, 0x410bb48c, 0x91c25508, 0x40f60dfb, 0x91b5919a,
-  0x40e064ea, 0x91a8d26d,
-  0x40cab958, 0x919c1781, 0x40b50b46, 0x918f60d6, 0x409f5ab6, 0x9182ae6d,
-  0x4089a7a8, 0x91760047,
-  0x4073f21d, 0x91695663, 0x405e3a16, 0x915cb0c3, 0x40487f94, 0x91500f67,
-  0x4032c297, 0x91437250,
-  0x401d0321, 0x9136d97d, 0x40074132, 0x912a44f0, 0x3ff17cca, 0x911db4a9,
-  0x3fdbb5ec, 0x911128a8,
-  0x3fc5ec98, 0x9104a0ee, 0x3fb020ce, 0x90f81d7b, 0x3f9a5290, 0x90eb9e50,
-  0x3f8481dd, 0x90df236e,
-  0x3f6eaeb8, 0x90d2acd4, 0x3f58d921, 0x90c63a83, 0x3f430119, 0x90b9cc7d,
-  0x3f2d26a0, 0x90ad62c0,
-  0x3f1749b8, 0x90a0fd4e, 0x3f016a61, 0x90949c28, 0x3eeb889c, 0x90883f4d,
-  0x3ed5a46b, 0x907be6be,
-  0x3ebfbdcd, 0x906f927c, 0x3ea9d4c3, 0x90634287, 0x3e93e950, 0x9056f6df,
-  0x3e7dfb73, 0x904aaf86,
-  0x3e680b2c, 0x903e6c7b, 0x3e52187f, 0x90322dbf, 0x3e3c2369, 0x9025f352,
-  0x3e262bee, 0x9019bd36,
-  0x3e10320d, 0x900d8b69, 0x3dfa35c8, 0x90015dee, 0x3de4371f, 0x8ff534c4,
-  0x3dce3614, 0x8fe90fec,
-  0x3db832a6, 0x8fdcef66, 0x3da22cd7, 0x8fd0d333, 0x3d8c24a8, 0x8fc4bb53,
-  0x3d761a19, 0x8fb8a7c7,
-  0x3d600d2c, 0x8fac988f, 0x3d49fde1, 0x8fa08dab, 0x3d33ec39, 0x8f94871d,
-  0x3d1dd835, 0x8f8884e4,
-  0x3d07c1d6, 0x8f7c8701, 0x3cf1a91c, 0x8f708d75, 0x3cdb8e09, 0x8f649840,
-  0x3cc5709e, 0x8f58a761,
-  0x3caf50da, 0x8f4cbadb, 0x3c992ec0, 0x8f40d2ad, 0x3c830a50, 0x8f34eed8,
-  0x3c6ce38a, 0x8f290f5c,
-  0x3c56ba70, 0x8f1d343a, 0x3c408f03, 0x8f115d72, 0x3c2a6142, 0x8f058b04,
-  0x3c143130, 0x8ef9bcf2,
-  0x3bfdfecd, 0x8eedf33b, 0x3be7ca1a, 0x8ee22de0, 0x3bd19318, 0x8ed66ce1,
-  0x3bbb59c7, 0x8ecab040,
-  0x3ba51e29, 0x8ebef7fb, 0x3b8ee03e, 0x8eb34415, 0x3b78a007, 0x8ea7948c,
-  0x3b625d86, 0x8e9be963,
-  0x3b4c18ba, 0x8e904298, 0x3b35d1a5, 0x8e84a02d, 0x3b1f8848, 0x8e790222,
-  0x3b093ca3, 0x8e6d6877,
-  0x3af2eeb7, 0x8e61d32e, 0x3adc9e86, 0x8e564246, 0x3ac64c0f, 0x8e4ab5bf,
-  0x3aaff755, 0x8e3f2d9b,
-  0x3a99a057, 0x8e33a9da, 0x3a834717, 0x8e282a7b, 0x3a6ceb96, 0x8e1caf80,
-  0x3a568dd4, 0x8e1138ea,
-  0x3a402dd2, 0x8e05c6b7, 0x3a29cb91, 0x8dfa58ea, 0x3a136712, 0x8deeef82,
-  0x39fd0056, 0x8de38a80,
-  0x39e6975e, 0x8dd829e4, 0x39d02c2a, 0x8dcccdaf, 0x39b9bebc, 0x8dc175e0,
-  0x39a34f13, 0x8db6227a,
-  0x398cdd32, 0x8daad37b, 0x39766919, 0x8d9f88e5, 0x395ff2c9, 0x8d9442b8,
-  0x39497a43, 0x8d8900f3,
-  0x3932ff87, 0x8d7dc399, 0x391c8297, 0x8d728aa9, 0x39060373, 0x8d675623,
-  0x38ef821c, 0x8d5c2609,
-  0x38d8fe93, 0x8d50fa59, 0x38c278d9, 0x8d45d316, 0x38abf0ef, 0x8d3ab03f,
-  0x389566d6, 0x8d2f91d5,
-  0x387eda8e, 0x8d2477d8, 0x38684c19, 0x8d196249, 0x3851bb77, 0x8d0e5127,
-  0x383b28a9, 0x8d034474,
-  0x382493b0, 0x8cf83c30, 0x380dfc8d, 0x8ced385b, 0x37f76341, 0x8ce238f6,
-  0x37e0c7cc, 0x8cd73e01,
-  0x37ca2a30, 0x8ccc477d, 0x37b38a6d, 0x8cc1556a, 0x379ce885, 0x8cb667c8,
-  0x37864477, 0x8cab7e98,
-  0x376f9e46, 0x8ca099da, 0x3758f5f2, 0x8c95b98f, 0x37424b7b, 0x8c8addb7,
-  0x372b9ee3, 0x8c800652,
-  0x3714f02a, 0x8c753362, 0x36fe3f52, 0x8c6a64e5, 0x36e78c5b, 0x8c5f9ade,
-  0x36d0d746, 0x8c54d54c,
-  0x36ba2014, 0x8c4a142f, 0x36a366c6, 0x8c3f5788, 0x368cab5c, 0x8c349f58,
-  0x3675edd9, 0x8c29eb9f,
-  0x365f2e3b, 0x8c1f3c5d, 0x36486c86, 0x8c149192, 0x3631a8b8, 0x8c09eb40,
-  0x361ae2d3, 0x8bff4966,
-  0x36041ad9, 0x8bf4ac05, 0x35ed50c9, 0x8bea131e, 0x35d684a6, 0x8bdf7eb0,
-  0x35bfb66e, 0x8bd4eebc,
-  0x35a8e625, 0x8bca6343, 0x359213c9, 0x8bbfdc44, 0x357b3f5d, 0x8bb559c1,
-  0x356468e2, 0x8baadbba,
-  0x354d9057, 0x8ba0622f, 0x3536b5be, 0x8b95ed21, 0x351fd918, 0x8b8b7c8f,
-  0x3508fa66, 0x8b81107b,
-  0x34f219a8, 0x8b76a8e4, 0x34db36df, 0x8b6c45cc, 0x34c4520d, 0x8b61e733,
-  0x34ad6b32, 0x8b578d18,
-  0x34968250, 0x8b4d377c, 0x347f9766, 0x8b42e661, 0x3468aa76, 0x8b3899c6,
-  0x3451bb81, 0x8b2e51ab,
-  0x343aca87, 0x8b240e11, 0x3423d78a, 0x8b19cef8, 0x340ce28b, 0x8b0f9462,
-  0x33f5eb89, 0x8b055e4d,
-  0x33def287, 0x8afb2cbb, 0x33c7f785, 0x8af0ffac, 0x33b0fa84, 0x8ae6d720,
-  0x3399fb85, 0x8adcb318,
-  0x3382fa88, 0x8ad29394, 0x336bf78f, 0x8ac87894, 0x3354f29b, 0x8abe6219,
-  0x333debab, 0x8ab45024,
-  0x3326e2c3, 0x8aaa42b4, 0x330fd7e1, 0x8aa039cb, 0x32f8cb07, 0x8a963567,
-  0x32e1bc36, 0x8a8c358b,
-  0x32caab6f, 0x8a823a36, 0x32b398b3, 0x8a784368, 0x329c8402, 0x8a6e5123,
-  0x32856d5e, 0x8a646365,
-  0x326e54c7, 0x8a5a7a31, 0x32573a3f, 0x8a509585, 0x32401dc6, 0x8a46b564,
-  0x3228ff5c, 0x8a3cd9cc,
-  0x3211df04, 0x8a3302be, 0x31fabcbd, 0x8a29303b, 0x31e39889, 0x8a1f6243,
-  0x31cc7269, 0x8a1598d6,
-  0x31b54a5e, 0x8a0bd3f5, 0x319e2067, 0x8a0213a0, 0x3186f487, 0x89f857d8,
-  0x316fc6be, 0x89eea09d,
-  0x3158970e, 0x89e4edef, 0x31416576, 0x89db3fcf, 0x312a31f8, 0x89d1963c,
-  0x3112fc95, 0x89c7f138,
-  0x30fbc54d, 0x89be50c3, 0x30e48c22, 0x89b4b4dd, 0x30cd5115, 0x89ab1d87,
-  0x30b61426, 0x89a18ac0,
-  0x309ed556, 0x8997fc8a, 0x308794a6, 0x898e72e4, 0x30705217, 0x8984edcf,
-  0x30590dab, 0x897b6d4c,
-  0x3041c761, 0x8971f15a, 0x302a7f3a, 0x896879fb, 0x30133539, 0x895f072e,
-  0x2ffbe95d, 0x895598f3,
-  0x2fe49ba7, 0x894c2f4c, 0x2fcd4c19, 0x8942ca39, 0x2fb5fab2, 0x893969b9,
-  0x2f9ea775, 0x89300dce,
-  0x2f875262, 0x8926b677, 0x2f6ffb7a, 0x891d63b5, 0x2f58a2be, 0x89141589,
-  0x2f41482e, 0x890acbf2,
-  0x2f29ebcc, 0x890186f2, 0x2f128d99, 0x88f84687, 0x2efb2d95, 0x88ef0ab4,
-  0x2ee3cbc1, 0x88e5d378,
-  0x2ecc681e, 0x88dca0d3, 0x2eb502ae, 0x88d372c6, 0x2e9d9b70, 0x88ca4951,
-  0x2e863267, 0x88c12475,
-  0x2e6ec792, 0x88b80432, 0x2e575af3, 0x88aee888, 0x2e3fec8b, 0x88a5d177,
-  0x2e287c5a, 0x889cbf01,
-  0x2e110a62, 0x8893b125, 0x2df996a3, 0x888aa7e3, 0x2de2211e, 0x8881a33d,
-  0x2dcaa9d5, 0x8878a332,
-  0x2db330c7, 0x886fa7c2, 0x2d9bb5f6, 0x8866b0ef, 0x2d843964, 0x885dbeb8,
-  0x2d6cbb10, 0x8854d11e,
-  0x2d553afc, 0x884be821, 0x2d3db928, 0x884303c1, 0x2d263596, 0x883a23ff,
-  0x2d0eb046, 0x883148db,
-  0x2cf72939, 0x88287256, 0x2cdfa071, 0x881fa06f, 0x2cc815ee, 0x8816d327,
-  0x2cb089b1, 0x880e0a7f,
-  0x2c98fbba, 0x88054677, 0x2c816c0c, 0x87fc870f, 0x2c69daa6, 0x87f3cc48,
-  0x2c52478a, 0x87eb1621,
-  0x2c3ab2b9, 0x87e2649b, 0x2c231c33, 0x87d9b7b7, 0x2c0b83fa, 0x87d10f75,
-  0x2bf3ea0d, 0x87c86bd5,
-  0x2bdc4e6f, 0x87bfccd7, 0x2bc4b120, 0x87b7327d, 0x2bad1221, 0x87ae9cc5,
-  0x2b957173, 0x87a60bb1,
-  0x2b7dcf17, 0x879d7f41, 0x2b662b0e, 0x8794f774, 0x2b4e8558, 0x878c744d,
-  0x2b36ddf7, 0x8783f5ca,
-  0x2b1f34eb, 0x877b7bec, 0x2b078a36, 0x877306b4, 0x2aefddd8, 0x876a9621,
-  0x2ad82fd2, 0x87622a35,
-  0x2ac08026, 0x8759c2ef, 0x2aa8ced3, 0x87516050, 0x2a911bdc, 0x87490258,
-  0x2a796740, 0x8740a907,
-  0x2a61b101, 0x8738545e, 0x2a49f920, 0x8730045d, 0x2a323f9e, 0x8727b905,
-  0x2a1a847b, 0x871f7255,
-  0x2a02c7b8, 0x8717304e, 0x29eb0957, 0x870ef2f1, 0x29d34958, 0x8706ba3d,
-  0x29bb87bc, 0x86fe8633,
-  0x29a3c485, 0x86f656d3, 0x298bffb2, 0x86ee2c1e, 0x29743946, 0x86e60614,
-  0x295c7140, 0x86dde4b5,
-  0x2944a7a2, 0x86d5c802, 0x292cdc6d, 0x86cdaffa, 0x29150fa1, 0x86c59c9f,
-  0x28fd4140, 0x86bd8df0,
-  0x28e5714b, 0x86b583ee, 0x28cd9fc1, 0x86ad7e99, 0x28b5cca5, 0x86a57df2,
-  0x289df7f8, 0x869d81f8,
-  0x288621b9, 0x86958aac, 0x286e49ea, 0x868d980e, 0x2856708d, 0x8685aa20,
-  0x283e95a1, 0x867dc0e0,
-  0x2826b928, 0x8675dc4f, 0x280edb23, 0x866dfc6e, 0x27f6fb92, 0x8666213c,
-  0x27df1a77, 0x865e4abb,
-  0x27c737d3, 0x865678eb, 0x27af53a6, 0x864eabcb, 0x27976df1, 0x8646e35c,
-  0x277f86b5, 0x863f1f9e,
-  0x27679df4, 0x86376092, 0x274fb3ae, 0x862fa638, 0x2737c7e3, 0x8627f091,
-  0x271fda96, 0x86203f9c,
-  0x2707ebc7, 0x86189359, 0x26effb76, 0x8610ebca, 0x26d809a5, 0x860948ef,
-  0x26c01655, 0x8601aac7,
-  0x26a82186, 0x85fa1153, 0x26902b39, 0x85f27c93, 0x26783370, 0x85eaec88,
-  0x26603a2c, 0x85e36132,
-  0x26483f6c, 0x85dbda91, 0x26304333, 0x85d458a6, 0x26184581, 0x85ccdb70,
-  0x26004657, 0x85c562f1,
-  0x25e845b6, 0x85bdef28, 0x25d0439f, 0x85b68015, 0x25b84012, 0x85af15b9,
-  0x25a03b11, 0x85a7b015,
-  0x2588349d, 0x85a04f28, 0x25702cb7, 0x8598f2f3, 0x2558235f, 0x85919b76,
-  0x25401896, 0x858a48b1,
-  0x25280c5e, 0x8582faa5, 0x250ffeb7, 0x857bb152, 0x24f7efa2, 0x85746cb8,
-  0x24dfdf20, 0x856d2cd7,
-  0x24c7cd33, 0x8565f1b0, 0x24afb9da, 0x855ebb44, 0x2497a517, 0x85578991,
-  0x247f8eec, 0x85505c99,
-  0x24677758, 0x8549345c, 0x244f5e5c, 0x854210db, 0x243743fa, 0x853af214,
-  0x241f2833, 0x8533d809,
-  0x24070b08, 0x852cc2bb, 0x23eeec78, 0x8525b228, 0x23d6cc87, 0x851ea652,
-  0x23beab33, 0x85179f39,
-  0x23a6887f, 0x85109cdd, 0x238e646a, 0x85099f3e, 0x23763ef7, 0x8502a65c,
-  0x235e1826, 0x84fbb239,
-  0x2345eff8, 0x84f4c2d4, 0x232dc66d, 0x84edd82d, 0x23159b88, 0x84e6f244,
-  0x22fd6f48, 0x84e0111b,
-  0x22e541af, 0x84d934b1, 0x22cd12bd, 0x84d25d06, 0x22b4e274, 0x84cb8a1b,
-  0x229cb0d5, 0x84c4bbf0,
-  0x22847de0, 0x84bdf286, 0x226c4996, 0x84b72ddb, 0x225413f8, 0x84b06df2,
-  0x223bdd08, 0x84a9b2ca,
-  0x2223a4c5, 0x84a2fc62, 0x220b6b32, 0x849c4abd, 0x21f3304f, 0x84959dd9,
-  0x21daf41d, 0x848ef5b7,
-  0x21c2b69c, 0x84885258, 0x21aa77cf, 0x8481b3bb, 0x219237b5, 0x847b19e1,
-  0x2179f64f, 0x847484ca,
-  0x2161b3a0, 0x846df477, 0x21496fa7, 0x846768e7, 0x21312a65, 0x8460e21a,
-  0x2118e3dc, 0x845a6012,
-  0x21009c0c, 0x8453e2cf, 0x20e852f6, 0x844d6a50, 0x20d0089c, 0x8446f695,
-  0x20b7bcfe, 0x844087a0,
-  0x209f701c, 0x843a1d70, 0x208721f9, 0x8433b806, 0x206ed295, 0x842d5762,
-  0x205681f1, 0x8426fb84,
-  0x203e300d, 0x8420a46c, 0x2025dcec, 0x841a521a, 0x200d888d, 0x84140490,
-  0x1ff532f2, 0x840dbbcc,
-  0x1fdcdc1b, 0x840777d0, 0x1fc4840a, 0x8401389b, 0x1fac2abf, 0x83fafe2e,
-  0x1f93d03c, 0x83f4c889,
-  0x1f7b7481, 0x83ee97ad, 0x1f63178f, 0x83e86b99, 0x1f4ab968, 0x83e2444d,
-  0x1f325a0b, 0x83dc21cb,
-  0x1f19f97b, 0x83d60412, 0x1f0197b8, 0x83cfeb22, 0x1ee934c3, 0x83c9d6fc,
-  0x1ed0d09d, 0x83c3c7a0,
-  0x1eb86b46, 0x83bdbd0e, 0x1ea004c1, 0x83b7b746, 0x1e879d0d, 0x83b1b649,
-  0x1e6f342c, 0x83abba17,
-  0x1e56ca1e, 0x83a5c2b0, 0x1e3e5ee5, 0x839fd014, 0x1e25f282, 0x8399e244,
-  0x1e0d84f5, 0x8393f940,
-  0x1df5163f, 0x838e1507, 0x1ddca662, 0x8388359b, 0x1dc4355e, 0x83825afb,
-  0x1dabc334, 0x837c8528,
-  0x1d934fe5, 0x8376b422, 0x1d7adb73, 0x8370e7e9, 0x1d6265dd, 0x836b207d,
-  0x1d49ef26, 0x83655ddf,
-  0x1d31774d, 0x835fa00f, 0x1d18fe54, 0x8359e70d, 0x1d00843d, 0x835432d8,
-  0x1ce80906, 0x834e8373,
-  0x1ccf8cb3, 0x8348d8dc, 0x1cb70f43, 0x83433314, 0x1c9e90b8, 0x833d921b,
-  0x1c861113, 0x8337f5f1,
-  0x1c6d9053, 0x83325e97, 0x1c550e7c, 0x832ccc0d, 0x1c3c8b8c, 0x83273e52,
-  0x1c240786, 0x8321b568,
-  0x1c0b826a, 0x831c314e, 0x1bf2fc3a, 0x8316b205, 0x1bda74f6, 0x8311378d,
-  0x1bc1ec9e, 0x830bc1e6,
-  0x1ba96335, 0x83065110, 0x1b90d8bb, 0x8300e50b, 0x1b784d30, 0x82fb7dd8,
-  0x1b5fc097, 0x82f61b77,
-  0x1b4732ef, 0x82f0bde8, 0x1b2ea43a, 0x82eb652b, 0x1b161479, 0x82e61141,
-  0x1afd83ad, 0x82e0c22a,
-  0x1ae4f1d6, 0x82db77e5, 0x1acc5ef6, 0x82d63274, 0x1ab3cb0d, 0x82d0f1d5,
-  0x1a9b361d, 0x82cbb60b,
-  0x1a82a026, 0x82c67f14, 0x1a6a0929, 0x82c14cf1, 0x1a517128, 0x82bc1fa2,
-  0x1a38d823, 0x82b6f727,
-  0x1a203e1b, 0x82b1d381, 0x1a07a311, 0x82acb4b0, 0x19ef0707, 0x82a79ab3,
-  0x19d669fc, 0x82a2858c,
-  0x19bdcbf3, 0x829d753a, 0x19a52ceb, 0x829869be, 0x198c8ce7, 0x82936317,
-  0x1973ebe6, 0x828e6146,
-  0x195b49ea, 0x8289644b, 0x1942a6f3, 0x82846c26, 0x192a0304, 0x827f78d8,
-  0x19115e1c, 0x827a8a61,
-  0x18f8b83c, 0x8275a0c0, 0x18e01167, 0x8270bbf7, 0x18c7699b, 0x826bdc04,
-  0x18aec0db, 0x826700e9,
-  0x18961728, 0x82622aa6, 0x187d6c82, 0x825d593a, 0x1864c0ea, 0x82588ca7,
-  0x184c1461, 0x8253c4eb,
-  0x183366e9, 0x824f0208, 0x181ab881, 0x824a43fe, 0x1802092c, 0x82458acc,
-  0x17e958ea, 0x8240d673,
-  0x17d0a7bc, 0x823c26f3, 0x17b7f5a3, 0x82377c4c, 0x179f429f, 0x8232d67f,
-  0x17868eb3, 0x822e358b,
-  0x176dd9de, 0x82299971, 0x17552422, 0x82250232, 0x173c6d80, 0x82206fcc,
-  0x1723b5f9, 0x821be240,
-  0x170afd8d, 0x82175990, 0x16f2443e, 0x8212d5b9, 0x16d98a0c, 0x820e56be,
-  0x16c0cef9, 0x8209dc9e,
-  0x16a81305, 0x82056758, 0x168f5632, 0x8200f6ef, 0x1676987f, 0x81fc8b60,
-  0x165dd9f0, 0x81f824ae,
-  0x16451a83, 0x81f3c2d7, 0x162c5a3b, 0x81ef65dc, 0x16139918, 0x81eb0dbe,
-  0x15fad71b, 0x81e6ba7c,
-  0x15e21445, 0x81e26c16, 0x15c95097, 0x81de228d, 0x15b08c12, 0x81d9dde1,
-  0x1597c6b7, 0x81d59e13,
-  0x157f0086, 0x81d16321, 0x15663982, 0x81cd2d0c, 0x154d71aa, 0x81c8fbd6,
-  0x1534a901, 0x81c4cf7d,
-  0x151bdf86, 0x81c0a801, 0x1503153a, 0x81bc8564, 0x14ea4a1f, 0x81b867a5,
-  0x14d17e36, 0x81b44ec4,
-  0x14b8b17f, 0x81b03ac2, 0x149fe3fc, 0x81ac2b9e, 0x148715ae, 0x81a82159,
-  0x146e4694, 0x81a41bf4,
-  0x145576b1, 0x81a01b6d, 0x143ca605, 0x819c1fc5, 0x1423d492, 0x819828fd,
-  0x140b0258, 0x81943715,
-  0x13f22f58, 0x81904a0c, 0x13d95b93, 0x818c61e3, 0x13c0870a, 0x81887e9a,
-  0x13a7b1bf, 0x8184a032,
-  0x138edbb1, 0x8180c6a9, 0x137604e2, 0x817cf201, 0x135d2d53, 0x8179223a,
-  0x13445505, 0x81755754,
-  0x132b7bf9, 0x8171914e, 0x1312a230, 0x816dd02a, 0x12f9c7aa, 0x816a13e6,
-  0x12e0ec6a, 0x81665c84,
-  0x12c8106f, 0x8162aa04, 0x12af33ba, 0x815efc65, 0x1296564d, 0x815b53a8,
-  0x127d7829, 0x8157afcd,
-  0x1264994e, 0x815410d4, 0x124bb9be, 0x815076bd, 0x1232d979, 0x814ce188,
-  0x1219f880, 0x81495136,
-  0x120116d5, 0x8145c5c7, 0x11e83478, 0x81423f3a, 0x11cf516a, 0x813ebd90,
-  0x11b66dad, 0x813b40ca,
-  0x119d8941, 0x8137c8e6, 0x1184a427, 0x813455e6, 0x116bbe60, 0x8130e7c9,
-  0x1152d7ed, 0x812d7e8f,
-  0x1139f0cf, 0x812a1a3a, 0x11210907, 0x8126bac8, 0x11082096, 0x8123603a,
-  0x10ef377d, 0x81200a90,
-  0x10d64dbd, 0x811cb9ca, 0x10bd6356, 0x81196de9, 0x10a4784b, 0x811626ec,
-  0x108b8c9b, 0x8112e4d4,
-  0x1072a048, 0x810fa7a0, 0x1059b352, 0x810c6f52, 0x1040c5bb, 0x81093be8,
-  0x1027d784, 0x81060d63,
-  0x100ee8ad, 0x8102e3c4, 0xff5f938, 0x80ffbf0a, 0xfdd0926, 0x80fc9f35,
-  0xfc41876, 0x80f98446,
-  0xfab272b, 0x80f66e3c, 0xf923546, 0x80f35d19, 0xf7942c7, 0x80f050db,
-  0xf604faf, 0x80ed4984,
-  0xf475bff, 0x80ea4712, 0xf2e67b8, 0x80e74987, 0xf1572dc, 0x80e450e2,
-  0xefc7d6b, 0x80e15d24,
-  0xee38766, 0x80de6e4c, 0xeca90ce, 0x80db845b, 0xeb199a4, 0x80d89f51,
-  0xe98a1e9, 0x80d5bf2e,
-  0xe7fa99e, 0x80d2e3f2, 0xe66b0c3, 0x80d00d9d, 0xe4db75b, 0x80cd3c2f,
-  0xe34bd66, 0x80ca6fa9,
-  0xe1bc2e4, 0x80c7a80a, 0xe02c7d7, 0x80c4e553, 0xde9cc40, 0x80c22784,
-  0xdd0d01f, 0x80bf6e9c,
-  0xdb7d376, 0x80bcba9d, 0xd9ed646, 0x80ba0b85, 0xd85d88f, 0x80b76156,
-  0xd6cda53, 0x80b4bc0e,
-  0xd53db92, 0x80b21baf, 0xd3adc4e, 0x80af8039, 0xd21dc87, 0x80ace9ab,
-  0xd08dc3f, 0x80aa5806,
-  0xcefdb76, 0x80a7cb49, 0xcd6da2d, 0x80a54376, 0xcbdd865, 0x80a2c08b,
-  0xca4d620, 0x80a04289,
-  0xc8bd35e, 0x809dc971, 0xc72d020, 0x809b5541, 0xc59cc68, 0x8098e5fb,
-  0xc40c835, 0x80967b9f,
-  0xc27c389, 0x8094162c, 0xc0ebe66, 0x8091b5a2, 0xbf5b8cb, 0x808f5a02,
-  0xbdcb2bb, 0x808d034c,
-  0xbc3ac35, 0x808ab180, 0xbaaa53b, 0x8088649e, 0xb919dcf, 0x80861ca6,
-  0xb7895f0, 0x8083d998,
-  0xb5f8d9f, 0x80819b74, 0xb4684df, 0x807f623b, 0xb2d7baf, 0x807d2dec,
-  0xb147211, 0x807afe87,
-  0xafb6805, 0x8078d40d, 0xae25d8d, 0x8076ae7e, 0xac952aa, 0x80748dd9,
-  0xab0475c, 0x8072721f,
-  0xa973ba5, 0x80705b50, 0xa7e2f85, 0x806e496c, 0xa6522fe, 0x806c3c74,
-  0xa4c1610, 0x806a3466,
-  0xa3308bd, 0x80683143, 0xa19fb04, 0x8066330c, 0xa00ece8, 0x806439c0,
-  0x9e7de6a, 0x80624560,
-  0x9cecf89, 0x806055eb, 0x9b5c048, 0x805e6b62, 0x99cb0a7, 0x805c85c4,
-  0x983a0a7, 0x805aa512,
-  0x96a9049, 0x8058c94c, 0x9517f8f, 0x8056f272, 0x9386e78, 0x80552084,
-  0x91f5d06, 0x80535381,
-  0x9064b3a, 0x80518b6b, 0x8ed3916, 0x804fc841, 0x8d42699, 0x804e0a04,
-  0x8bb13c5, 0x804c50b2,
-  0x8a2009a, 0x804a9c4d, 0x888ed1b, 0x8048ecd5, 0x86fd947, 0x80474248,
-  0x856c520, 0x80459ca9,
-  0x83db0a7, 0x8043fbf6, 0x8249bdd, 0x80426030, 0x80b86c2, 0x8040c956,
-  0x7f27157, 0x803f376a,
-  0x7d95b9e, 0x803daa6a, 0x7c04598, 0x803c2257, 0x7a72f45, 0x803a9f31,
-  0x78e18a7, 0x803920f8,
-  0x77501be, 0x8037a7ac, 0x75bea8c, 0x8036334e, 0x742d311, 0x8034c3dd,
-  0x729bb4e, 0x80335959,
-  0x710a345, 0x8031f3c2, 0x6f78af6, 0x80309318, 0x6de7262, 0x802f375d,
-  0x6c5598a, 0x802de08e,
-  0x6ac406f, 0x802c8ead, 0x6932713, 0x802b41ba, 0x67a0d76, 0x8029f9b4,
-  0x660f398, 0x8028b69c,
-  0x647d97c, 0x80277872, 0x62ebf22, 0x80263f36, 0x615a48b, 0x80250ae7,
-  0x5fc89b8, 0x8023db86,
-  0x5e36ea9, 0x8022b114, 0x5ca5361, 0x80218b8f, 0x5b137df, 0x80206af8,
-  0x5981c26, 0x801f4f4f,
-  0x57f0035, 0x801e3895, 0x565e40d, 0x801d26c8, 0x54cc7b1, 0x801c19ea,
-  0x533ab20, 0x801b11fa,
-  0x51a8e5c, 0x801a0ef8, 0x5017165, 0x801910e4, 0x4e8543e, 0x801817bf,
-  0x4cf36e5, 0x80172388,
-  0x4b6195d, 0x80163440, 0x49cfba7, 0x801549e6, 0x483ddc3, 0x8014647b,
-  0x46abfb3, 0x801383fe,
-  0x451a177, 0x8012a86f, 0x4388310, 0x8011d1d0, 0x41f6480, 0x8011001f,
-  0x40645c7, 0x8010335c,
-  0x3ed26e6, 0x800f6b88, 0x3d407df, 0x800ea8a3, 0x3bae8b2, 0x800deaad,
-  0x3a1c960, 0x800d31a5,
-  0x388a9ea, 0x800c7d8c, 0x36f8a51, 0x800bce63, 0x3566a96, 0x800b2427,
-  0x33d4abb, 0x800a7edb,
-  0x3242abf, 0x8009de7e, 0x30b0aa4, 0x80094310, 0x2f1ea6c, 0x8008ac90,
-  0x2d8ca16, 0x80081b00,
-  0x2bfa9a4, 0x80078e5e, 0x2a68917, 0x800706ac, 0x28d6870, 0x800683e8,
-  0x27447b0, 0x80060614,
-  0x25b26d7, 0x80058d2f, 0x24205e8, 0x80051939, 0x228e4e2, 0x8004aa32,
-  0x20fc3c6, 0x8004401a,
-  0x1f6a297, 0x8003daf1, 0x1dd8154, 0x80037ab7, 0x1c45ffe, 0x80031f6d,
-  0x1ab3e97, 0x8002c912,
-  0x1921d20, 0x800277a6, 0x178fb99, 0x80022b29, 0x15fda03, 0x8001e39b,
-  0x146b860, 0x8001a0fd,
-  0x12d96b1, 0x8001634e, 0x11474f6, 0x80012a8e, 0xfb5330, 0x8000f6bd,
-  0xe23160, 0x8000c7dc,
-  0xc90f88, 0x80009dea, 0xafeda8, 0x800078e7, 0x96cbc1, 0x800058d4, 0x7da9d4,
-  0x80003daf,
-  0x6487e3, 0x8000277a, 0x4b65ee, 0x80001635, 0x3243f5, 0x800009df, 0x1921fb,
-  0x80000278,
-};
-
-static const q31_t WeightsQ31_8192[16384] = {
-  0x7fffffff, 0x0, 0x7fffffd9, 0xfff9b781, 0x7fffff62, 0xfff36f02, 0x7ffffe9d,
-    0xffed2684,
-  0x7ffffd88, 0xffe6de05, 0x7ffffc25, 0xffe09586, 0x7ffffa73, 0xffda4d08,
-    0x7ffff872, 0xffd40489,
-  0x7ffff621, 0xffcdbc0b, 0x7ffff382, 0xffc7738c, 0x7ffff094, 0xffc12b0e,
-    0x7fffed57, 0xffbae290,
-  0x7fffe9cb, 0xffb49a12, 0x7fffe5f0, 0xffae5195, 0x7fffe1c6, 0xffa80917,
-    0x7fffdd4d, 0xffa1c09a,
-  0x7fffd886, 0xff9b781d, 0x7fffd36f, 0xff952fa0, 0x7fffce09, 0xff8ee724,
-    0x7fffc854, 0xff889ea7,
-  0x7fffc251, 0xff82562c, 0x7fffbbfe, 0xff7c0db0, 0x7fffb55c, 0xff75c535,
-    0x7fffae6c, 0xff6f7cba,
-  0x7fffa72c, 0xff69343f, 0x7fff9f9e, 0xff62ebc5, 0x7fff97c1, 0xff5ca34b,
-    0x7fff8f94, 0xff565ad1,
-  0x7fff8719, 0xff501258, 0x7fff7e4f, 0xff49c9df, 0x7fff7536, 0xff438167,
-    0x7fff6bcd, 0xff3d38ef,
-  0x7fff6216, 0xff36f078, 0x7fff5810, 0xff30a801, 0x7fff4dbb, 0xff2a5f8b,
-    0x7fff4317, 0xff241715,
-  0x7fff3824, 0xff1dcea0, 0x7fff2ce2, 0xff17862b, 0x7fff2151, 0xff113db7,
-    0x7fff1572, 0xff0af543,
-  0x7fff0943, 0xff04acd0, 0x7ffefcc5, 0xfefe645e, 0x7ffeeff8, 0xfef81bec,
-    0x7ffee2dd, 0xfef1d37b,
-  0x7ffed572, 0xfeeb8b0a, 0x7ffec7b9, 0xfee5429a, 0x7ffeb9b0, 0xfedefa2b,
-    0x7ffeab59, 0xfed8b1bd,
-  0x7ffe9cb2, 0xfed2694f, 0x7ffe8dbd, 0xfecc20e2, 0x7ffe7e79, 0xfec5d876,
-    0x7ffe6ee5, 0xfebf900a,
-  0x7ffe5f03, 0xfeb947a0, 0x7ffe4ed2, 0xfeb2ff36, 0x7ffe3e52, 0xfeacb6cc,
-    0x7ffe2d83, 0xfea66e64,
-  0x7ffe1c65, 0xfea025fd, 0x7ffe0af8, 0xfe99dd96, 0x7ffdf93c, 0xfe939530,
-    0x7ffde731, 0xfe8d4ccb,
-  0x7ffdd4d7, 0xfe870467, 0x7ffdc22e, 0xfe80bc04, 0x7ffdaf37, 0xfe7a73a2,
-    0x7ffd9bf0, 0xfe742b41,
-  0x7ffd885a, 0xfe6de2e0, 0x7ffd7476, 0xfe679a81, 0x7ffd6042, 0xfe615223,
-    0x7ffd4bc0, 0xfe5b09c5,
-  0x7ffd36ee, 0xfe54c169, 0x7ffd21ce, 0xfe4e790d, 0x7ffd0c5f, 0xfe4830b3,
-    0x7ffcf6a0, 0xfe41e85a,
-  0x7ffce093, 0xfe3ba002, 0x7ffcca37, 0xfe3557ab, 0x7ffcb38c, 0xfe2f0f55,
-    0x7ffc9c92, 0xfe28c700,
-  0x7ffc8549, 0xfe227eac, 0x7ffc6db1, 0xfe1c365a, 0x7ffc55ca, 0xfe15ee09,
-    0x7ffc3d94, 0xfe0fa5b8,
-  0x7ffc250f, 0xfe095d69, 0x7ffc0c3b, 0xfe03151c, 0x7ffbf319, 0xfdfccccf,
-    0x7ffbd9a7, 0xfdf68484,
-  0x7ffbbfe6, 0xfdf03c3a, 0x7ffba5d7, 0xfde9f3f1, 0x7ffb8b78, 0xfde3aba9,
-    0x7ffb70cb, 0xfddd6363,
-  0x7ffb55ce, 0xfdd71b1e, 0x7ffb3a83, 0xfdd0d2db, 0x7ffb1ee9, 0xfdca8a99,
-    0x7ffb0300, 0xfdc44258,
-  0x7ffae6c7, 0xfdbdfa18, 0x7ffaca40, 0xfdb7b1da, 0x7ffaad6a, 0xfdb1699e,
-    0x7ffa9045, 0xfdab2162,
-  0x7ffa72d1, 0xfda4d929, 0x7ffa550e, 0xfd9e90f0, 0x7ffa36fc, 0xfd9848b9,
-    0x7ffa189c, 0xfd920084,
-  0x7ff9f9ec, 0xfd8bb850, 0x7ff9daed, 0xfd85701e, 0x7ff9bba0, 0xfd7f27ed,
-    0x7ff99c03, 0xfd78dfbd,
-  0x7ff97c18, 0xfd729790, 0x7ff95bdd, 0xfd6c4f64, 0x7ff93b54, 0xfd660739,
-    0x7ff91a7b, 0xfd5fbf10,
-  0x7ff8f954, 0xfd5976e9, 0x7ff8d7de, 0xfd532ec3, 0x7ff8b619, 0xfd4ce69f,
-    0x7ff89405, 0xfd469e7c,
-  0x7ff871a2, 0xfd40565c, 0x7ff84ef0, 0xfd3a0e3d, 0x7ff82bef, 0xfd33c61f,
-    0x7ff8089f, 0xfd2d7e04,
-  0x7ff7e500, 0xfd2735ea, 0x7ff7c113, 0xfd20edd2, 0x7ff79cd6, 0xfd1aa5bc,
-    0x7ff7784a, 0xfd145da7,
-  0x7ff75370, 0xfd0e1594, 0x7ff72e46, 0xfd07cd83, 0x7ff708ce, 0xfd018574,
-    0x7ff6e307, 0xfcfb3d67,
-  0x7ff6bcf0, 0xfcf4f55c, 0x7ff6968b, 0xfceead52, 0x7ff66fd7, 0xfce8654b,
-    0x7ff648d4, 0xfce21d45,
-  0x7ff62182, 0xfcdbd541, 0x7ff5f9e1, 0xfcd58d3f, 0x7ff5d1f1, 0xfccf453f,
-    0x7ff5a9b2, 0xfcc8fd41,
-  0x7ff58125, 0xfcc2b545, 0x7ff55848, 0xfcbc6d4c, 0x7ff52f1d, 0xfcb62554,
-    0x7ff505a2, 0xfcafdd5e,
-  0x7ff4dbd9, 0xfca9956a, 0x7ff4b1c0, 0xfca34d78, 0x7ff48759, 0xfc9d0588,
-    0x7ff45ca3, 0xfc96bd9b,
-  0x7ff4319d, 0xfc9075af, 0x7ff40649, 0xfc8a2dc6, 0x7ff3daa6, 0xfc83e5de,
-    0x7ff3aeb4, 0xfc7d9df9,
-  0x7ff38274, 0xfc775616, 0x7ff355e4, 0xfc710e36, 0x7ff32905, 0xfc6ac657,
-    0x7ff2fbd7, 0xfc647e7b,
-  0x7ff2ce5b, 0xfc5e36a0, 0x7ff2a08f, 0xfc57eec9, 0x7ff27275, 0xfc51a6f3,
-    0x7ff2440b, 0xfc4b5f20,
-  0x7ff21553, 0xfc45174e, 0x7ff1e64c, 0xfc3ecf80, 0x7ff1b6f6, 0xfc3887b3,
-    0x7ff18751, 0xfc323fe9,
-  0x7ff1575d, 0xfc2bf821, 0x7ff1271a, 0xfc25b05c, 0x7ff0f688, 0xfc1f6899,
-    0x7ff0c5a7, 0xfc1920d8,
-  0x7ff09478, 0xfc12d91a, 0x7ff062f9, 0xfc0c915e, 0x7ff0312c, 0xfc0649a5,
-    0x7fefff0f, 0xfc0001ee,
-  0x7fefcca4, 0xfbf9ba39, 0x7fef99ea, 0xfbf37287, 0x7fef66e1, 0xfbed2ad8,
-    0x7fef3388, 0xfbe6e32b,
-  0x7feeffe1, 0xfbe09b80, 0x7feecbec, 0xfbda53d8, 0x7fee97a7, 0xfbd40c33,
-    0x7fee6313, 0xfbcdc490,
-  0x7fee2e30, 0xfbc77cf0, 0x7fedf8ff, 0xfbc13552, 0x7fedc37e, 0xfbbaedb7,
-    0x7fed8daf, 0xfbb4a61f,
-  0x7fed5791, 0xfbae5e89, 0x7fed2123, 0xfba816f6, 0x7fecea67, 0xfba1cf66,
-    0x7fecb35c, 0xfb9b87d8,
-  0x7fec7c02, 0xfb95404d, 0x7fec4459, 0xfb8ef8c5, 0x7fec0c62, 0xfb88b13f,
-    0x7febd41b, 0xfb8269bd,
-  0x7feb9b85, 0xfb7c223d, 0x7feb62a1, 0xfb75dac0, 0x7feb296d, 0xfb6f9345,
-    0x7feaefeb, 0xfb694bce,
-  0x7feab61a, 0xfb630459, 0x7fea7bfa, 0xfb5cbce7, 0x7fea418b, 0xfb567578,
-    0x7fea06cd, 0xfb502e0c,
-  0x7fe9cbc0, 0xfb49e6a3, 0x7fe99064, 0xfb439f3c, 0x7fe954ba, 0xfb3d57d9,
-    0x7fe918c0, 0xfb371078,
-  0x7fe8dc78, 0xfb30c91b, 0x7fe89fe0, 0xfb2a81c0, 0x7fe862fa, 0xfb243a69,
-    0x7fe825c5, 0xfb1df314,
-  0x7fe7e841, 0xfb17abc2, 0x7fe7aa6e, 0xfb116474, 0x7fe76c4c, 0xfb0b1d28,
-    0x7fe72ddb, 0xfb04d5e0,
-  0x7fe6ef1c, 0xfafe8e9b, 0x7fe6b00d, 0xfaf84758, 0x7fe670b0, 0xfaf20019,
-    0x7fe63103, 0xfaebb8dd,
-  0x7fe5f108, 0xfae571a4, 0x7fe5b0be, 0xfadf2a6e, 0x7fe57025, 0xfad8e33c,
-    0x7fe52f3d, 0xfad29c0c,
-  0x7fe4ee06, 0xfacc54e0, 0x7fe4ac81, 0xfac60db7, 0x7fe46aac, 0xfabfc691,
-    0x7fe42889, 0xfab97f6e,
-  0x7fe3e616, 0xfab3384f, 0x7fe3a355, 0xfaacf133, 0x7fe36045, 0xfaa6aa1a,
-    0x7fe31ce6, 0xfaa06305,
-  0x7fe2d938, 0xfa9a1bf3, 0x7fe2953b, 0xfa93d4e4, 0x7fe250ef, 0xfa8d8dd8,
-    0x7fe20c55, 0xfa8746d0,
-  0x7fe1c76b, 0xfa80ffcb, 0x7fe18233, 0xfa7ab8ca, 0x7fe13cac, 0xfa7471cc,
-    0x7fe0f6d6, 0xfa6e2ad1,
-  0x7fe0b0b1, 0xfa67e3da, 0x7fe06a3d, 0xfa619ce7, 0x7fe0237a, 0xfa5b55f7,
-    0x7fdfdc69, 0xfa550f0a,
-  0x7fdf9508, 0xfa4ec821, 0x7fdf4d59, 0xfa48813b, 0x7fdf055a, 0xfa423a59,
-    0x7fdebd0d, 0xfa3bf37a,
-  0x7fde7471, 0xfa35ac9f, 0x7fde2b86, 0xfa2f65c8, 0x7fdde24d, 0xfa291ef4,
-    0x7fdd98c4, 0xfa22d823,
-  0x7fdd4eec, 0xfa1c9157, 0x7fdd04c6, 0xfa164a8e, 0x7fdcba51, 0xfa1003c8,
-    0x7fdc6f8d, 0xfa09bd06,
-  0x7fdc247a, 0xfa037648, 0x7fdbd918, 0xf9fd2f8e, 0x7fdb8d67, 0xf9f6e8d7,
-    0x7fdb4167, 0xf9f0a224,
-  0x7fdaf519, 0xf9ea5b75, 0x7fdaa87c, 0xf9e414ca, 0x7fda5b8f, 0xf9ddce22,
-    0x7fda0e54, 0xf9d7877e,
-  0x7fd9c0ca, 0xf9d140de, 0x7fd972f2, 0xf9cafa42, 0x7fd924ca, 0xf9c4b3a9,
-    0x7fd8d653, 0xf9be6d15,
-  0x7fd8878e, 0xf9b82684, 0x7fd8387a, 0xf9b1dff7, 0x7fd7e917, 0xf9ab996e,
-    0x7fd79965, 0xf9a552e9,
-  0x7fd74964, 0xf99f0c68, 0x7fd6f914, 0xf998c5ea, 0x7fd6a875, 0xf9927f71,
-    0x7fd65788, 0xf98c38fc,
-  0x7fd6064c, 0xf985f28a, 0x7fd5b4c1, 0xf97fac1d, 0x7fd562e7, 0xf97965b4,
-    0x7fd510be, 0xf9731f4e,
-  0x7fd4be46, 0xf96cd8ed, 0x7fd46b80, 0xf9669290, 0x7fd4186a, 0xf9604c37,
-    0x7fd3c506, 0xf95a05e2,
-  0x7fd37153, 0xf953bf91, 0x7fd31d51, 0xf94d7944, 0x7fd2c900, 0xf94732fb,
-    0x7fd27460, 0xf940ecb7,
-  0x7fd21f72, 0xf93aa676, 0x7fd1ca35, 0xf934603a, 0x7fd174a8, 0xf92e1a02,
-    0x7fd11ecd, 0xf927d3ce,
-  0x7fd0c8a3, 0xf9218d9e, 0x7fd0722b, 0xf91b4773, 0x7fd01b63, 0xf915014c,
-    0x7fcfc44d, 0xf90ebb29,
-  0x7fcf6ce8, 0xf908750a, 0x7fcf1533, 0xf9022ef0, 0x7fcebd31, 0xf8fbe8da,
-    0x7fce64df, 0xf8f5a2c9,
-  0x7fce0c3e, 0xf8ef5cbb, 0x7fcdb34f, 0xf8e916b2, 0x7fcd5a11, 0xf8e2d0ae,
-    0x7fcd0083, 0xf8dc8aae,
-  0x7fcca6a7, 0xf8d644b2, 0x7fcc4c7d, 0xf8cffebb, 0x7fcbf203, 0xf8c9b8c8,
-    0x7fcb973b, 0xf8c372d9,
-  0x7fcb3c23, 0xf8bd2cef, 0x7fcae0bd, 0xf8b6e70a, 0x7fca8508, 0xf8b0a129,
-    0x7fca2905, 0xf8aa5b4c,
-  0x7fc9ccb2, 0xf8a41574, 0x7fc97011, 0xf89dcfa1, 0x7fc91320, 0xf89789d2,
-    0x7fc8b5e1, 0xf8914407,
-  0x7fc85854, 0xf88afe42, 0x7fc7fa77, 0xf884b880, 0x7fc79c4b, 0xf87e72c4,
-    0x7fc73dd1, 0xf8782d0c,
-  0x7fc6df08, 0xf871e759, 0x7fc67ff0, 0xf86ba1aa, 0x7fc62089, 0xf8655c00,
-    0x7fc5c0d3, 0xf85f165b,
-  0x7fc560cf, 0xf858d0bb, 0x7fc5007c, 0xf8528b1f, 0x7fc49fda, 0xf84c4588,
-    0x7fc43ee9, 0xf845fff5,
-  0x7fc3dda9, 0xf83fba68, 0x7fc37c1b, 0xf83974df, 0x7fc31a3d, 0xf8332f5b,
-    0x7fc2b811, 0xf82ce9dc,
-  0x7fc25596, 0xf826a462, 0x7fc1f2cc, 0xf8205eec, 0x7fc18fb4, 0xf81a197b,
-    0x7fc12c4d, 0xf813d410,
-  0x7fc0c896, 0xf80d8ea9, 0x7fc06491, 0xf8074947, 0x7fc0003e, 0xf80103ea,
-    0x7fbf9b9b, 0xf7fabe92,
-  0x7fbf36aa, 0xf7f4793e, 0x7fbed16a, 0xf7ee33f0, 0x7fbe6bdb, 0xf7e7eea7,
-    0x7fbe05fd, 0xf7e1a963,
-  0x7fbd9fd0, 0xf7db6423, 0x7fbd3955, 0xf7d51ee9, 0x7fbcd28b, 0xf7ced9b4,
-    0x7fbc6b72, 0xf7c89484,
-  0x7fbc040a, 0xf7c24f59, 0x7fbb9c53, 0xf7bc0a33, 0x7fbb344e, 0xf7b5c512,
-    0x7fbacbfa, 0xf7af7ff6,
-  0x7fba6357, 0xf7a93ae0, 0x7fb9fa65, 0xf7a2f5ce, 0x7fb99125, 0xf79cb0c2,
-    0x7fb92796, 0xf7966bbb,
-  0x7fb8bdb8, 0xf79026b9, 0x7fb8538b, 0xf789e1bc, 0x7fb7e90f, 0xf7839cc4,
-    0x7fb77e45, 0xf77d57d2,
-  0x7fb7132b, 0xf77712e5, 0x7fb6a7c3, 0xf770cdfd, 0x7fb63c0d, 0xf76a891b,
-    0x7fb5d007, 0xf764443d,
-  0x7fb563b3, 0xf75dff66, 0x7fb4f710, 0xf757ba93, 0x7fb48a1e, 0xf75175c6,
-    0x7fb41cdd, 0xf74b30fe,
-  0x7fb3af4e, 0xf744ec3b, 0x7fb34170, 0xf73ea77e, 0x7fb2d343, 0xf73862c6,
-    0x7fb264c7, 0xf7321e14,
-  0x7fb1f5fc, 0xf72bd967, 0x7fb186e3, 0xf72594c0, 0x7fb1177b, 0xf71f501e,
-    0x7fb0a7c4, 0xf7190b81,
-  0x7fb037bf, 0xf712c6ea, 0x7fafc76a, 0xf70c8259, 0x7faf56c7, 0xf7063dcd,
-    0x7faee5d5, 0xf6fff946,
-  0x7fae7495, 0xf6f9b4c6, 0x7fae0305, 0xf6f3704a, 0x7fad9127, 0xf6ed2bd4,
-    0x7fad1efa, 0xf6e6e764,
-  0x7facac7f, 0xf6e0a2fa, 0x7fac39b4, 0xf6da5e95, 0x7fabc69b, 0xf6d41a36,
-    0x7fab5333, 0xf6cdd5dc,
-  0x7faadf7c, 0xf6c79188, 0x7faa6b77, 0xf6c14d3a, 0x7fa9f723, 0xf6bb08f1,
-    0x7fa98280, 0xf6b4c4ae,
-  0x7fa90d8e, 0xf6ae8071, 0x7fa8984e, 0xf6a83c3a, 0x7fa822bf, 0xf6a1f808,
-    0x7fa7ace1, 0xf69bb3dd,
-  0x7fa736b4, 0xf6956fb7, 0x7fa6c039, 0xf68f2b96, 0x7fa6496e, 0xf688e77c,
-    0x7fa5d256, 0xf682a367,
-  0x7fa55aee, 0xf67c5f59, 0x7fa4e338, 0xf6761b50, 0x7fa46b32, 0xf66fd74d,
-    0x7fa3f2df, 0xf6699350,
-  0x7fa37a3c, 0xf6634f59, 0x7fa3014b, 0xf65d0b68, 0x7fa2880b, 0xf656c77c,
-    0x7fa20e7c, 0xf6508397,
-  0x7fa1949e, 0xf64a3fb8, 0x7fa11a72, 0xf643fbdf, 0x7fa09ff7, 0xf63db80b,
-    0x7fa0252e, 0xf637743e,
-  0x7f9faa15, 0xf6313077, 0x7f9f2eae, 0xf62aecb5, 0x7f9eb2f8, 0xf624a8fa,
-    0x7f9e36f4, 0xf61e6545,
-  0x7f9dbaa0, 0xf6182196, 0x7f9d3dfe, 0xf611dded, 0x7f9cc10d, 0xf60b9a4b,
-    0x7f9c43ce, 0xf60556ae,
-  0x7f9bc640, 0xf5ff1318, 0x7f9b4863, 0xf5f8cf87, 0x7f9aca37, 0xf5f28bfd,
-    0x7f9a4bbd, 0xf5ec4879,
-  0x7f99ccf4, 0xf5e604fc, 0x7f994ddc, 0xf5dfc184, 0x7f98ce76, 0xf5d97e13,
-    0x7f984ec1, 0xf5d33aa8,
-  0x7f97cebd, 0xf5ccf743, 0x7f974e6a, 0xf5c6b3e5, 0x7f96cdc9, 0xf5c0708d,
-    0x7f964cd9, 0xf5ba2d3b,
-  0x7f95cb9a, 0xf5b3e9f0, 0x7f954a0d, 0xf5ada6ab, 0x7f94c831, 0xf5a7636c,
-    0x7f944606, 0xf5a12034,
-  0x7f93c38c, 0xf59add02, 0x7f9340c4, 0xf59499d6, 0x7f92bdad, 0xf58e56b1,
-    0x7f923a48, 0xf5881393,
-  0x7f91b694, 0xf581d07b, 0x7f913291, 0xf57b8d69, 0x7f90ae3f, 0xf5754a5e,
-    0x7f90299f, 0xf56f0759,
-  0x7f8fa4b0, 0xf568c45b, 0x7f8f1f72, 0xf5628163, 0x7f8e99e6, 0xf55c3e72,
-    0x7f8e140a, 0xf555fb88,
-  0x7f8d8de1, 0xf54fb8a4, 0x7f8d0768, 0xf54975c6, 0x7f8c80a1, 0xf54332ef,
-    0x7f8bf98b, 0xf53cf01f,
-  0x7f8b7227, 0xf536ad56, 0x7f8aea74, 0xf5306a93, 0x7f8a6272, 0xf52a27d7,
-    0x7f89da21, 0xf523e521,
-  0x7f895182, 0xf51da273, 0x7f88c894, 0xf5175fca, 0x7f883f58, 0xf5111d29,
-    0x7f87b5cd, 0xf50ada8f,
-  0x7f872bf3, 0xf50497fb, 0x7f86a1ca, 0xf4fe556e, 0x7f861753, 0xf4f812e7,
-    0x7f858c8d, 0xf4f1d068,
-  0x7f850179, 0xf4eb8def, 0x7f847616, 0xf4e54b7d, 0x7f83ea64, 0xf4df0912,
-    0x7f835e64, 0xf4d8c6ae,
-  0x7f82d214, 0xf4d28451, 0x7f824577, 0xf4cc41fb, 0x7f81b88a, 0xf4c5ffab,
-    0x7f812b4f, 0xf4bfbd63,
-  0x7f809dc5, 0xf4b97b21, 0x7f800fed, 0xf4b338e7, 0x7f7f81c6, 0xf4acf6b3,
-    0x7f7ef350, 0xf4a6b486,
-  0x7f7e648c, 0xf4a07261, 0x7f7dd579, 0xf49a3042, 0x7f7d4617, 0xf493ee2b,
-    0x7f7cb667, 0xf48dac1a,
-  0x7f7c2668, 0xf4876a10, 0x7f7b961b, 0xf481280e, 0x7f7b057e, 0xf47ae613,
-    0x7f7a7494, 0xf474a41f,
-  0x7f79e35a, 0xf46e6231, 0x7f7951d2, 0xf468204b, 0x7f78bffb, 0xf461de6d,
-    0x7f782dd6, 0xf45b9c95,
-  0x7f779b62, 0xf4555ac5, 0x7f77089f, 0xf44f18fb, 0x7f76758e, 0xf448d739,
-    0x7f75e22e, 0xf442957e,
-  0x7f754e80, 0xf43c53cb, 0x7f74ba83, 0xf436121e, 0x7f742637, 0xf42fd079,
-    0x7f73919d, 0xf4298edc,
-  0x7f72fcb4, 0xf4234d45, 0x7f72677c, 0xf41d0bb6, 0x7f71d1f6, 0xf416ca2e,
-    0x7f713c21, 0xf41088ae,
-  0x7f70a5fe, 0xf40a4735, 0x7f700f8c, 0xf40405c3, 0x7f6f78cb, 0xf3fdc459,
-    0x7f6ee1bc, 0xf3f782f6,
-  0x7f6e4a5e, 0xf3f1419a, 0x7f6db2b1, 0xf3eb0046, 0x7f6d1ab6, 0xf3e4bef9,
-    0x7f6c826d, 0xf3de7db4,
-  0x7f6be9d4, 0xf3d83c77, 0x7f6b50ed, 0xf3d1fb40, 0x7f6ab7b8, 0xf3cbba12,
-    0x7f6a1e34, 0xf3c578eb,
-  0x7f698461, 0xf3bf37cb, 0x7f68ea40, 0xf3b8f6b3, 0x7f684fd0, 0xf3b2b5a3,
-    0x7f67b512, 0xf3ac749a,
-  0x7f671a05, 0xf3a63398, 0x7f667ea9, 0xf39ff29f, 0x7f65e2ff, 0xf399b1ad,
-    0x7f654706, 0xf39370c2,
-  0x7f64aabf, 0xf38d2fe0, 0x7f640e29, 0xf386ef05, 0x7f637144, 0xf380ae31,
-    0x7f62d411, 0xf37a6d66,
-  0x7f62368f, 0xf3742ca2, 0x7f6198bf, 0xf36debe6, 0x7f60faa0, 0xf367ab31,
-    0x7f605c33, 0xf3616a85,
-  0x7f5fbd77, 0xf35b29e0, 0x7f5f1e6c, 0xf354e943, 0x7f5e7f13, 0xf34ea8ae,
-    0x7f5ddf6b, 0xf3486820,
-  0x7f5d3f75, 0xf342279b, 0x7f5c9f30, 0xf33be71d, 0x7f5bfe9d, 0xf335a6a7,
-    0x7f5b5dbb, 0xf32f6639,
-  0x7f5abc8a, 0xf32925d3, 0x7f5a1b0b, 0xf322e575, 0x7f59793e, 0xf31ca51f,
-    0x7f58d721, 0xf31664d1,
-  0x7f5834b7, 0xf310248a, 0x7f5791fd, 0xf309e44c, 0x7f56eef5, 0xf303a416,
-    0x7f564b9f, 0xf2fd63e8,
-  0x7f55a7fa, 0xf2f723c1, 0x7f550407, 0xf2f0e3a3, 0x7f545fc5, 0xf2eaa38d,
-    0x7f53bb34, 0xf2e4637f,
-  0x7f531655, 0xf2de2379, 0x7f527127, 0xf2d7e37b, 0x7f51cbab, 0xf2d1a385,
-    0x7f5125e0, 0xf2cb6398,
-  0x7f507fc7, 0xf2c523b2, 0x7f4fd95f, 0xf2bee3d5, 0x7f4f32a9, 0xf2b8a400,
-    0x7f4e8ba4, 0xf2b26433,
-  0x7f4de451, 0xf2ac246e, 0x7f4d3caf, 0xf2a5e4b1, 0x7f4c94be, 0xf29fa4fd,
-    0x7f4bec7f, 0xf2996551,
-  0x7f4b43f2, 0xf29325ad, 0x7f4a9b16, 0xf28ce612, 0x7f49f1eb, 0xf286a67e,
-    0x7f494872, 0xf28066f4,
-  0x7f489eaa, 0xf27a2771, 0x7f47f494, 0xf273e7f7, 0x7f474a30, 0xf26da885,
-    0x7f469f7d, 0xf267691b,
-  0x7f45f47b, 0xf26129ba, 0x7f45492b, 0xf25aea61, 0x7f449d8c, 0xf254ab11,
-    0x7f43f19f, 0xf24e6bc9,
-  0x7f434563, 0xf2482c8a, 0x7f4298d9, 0xf241ed53, 0x7f41ec01, 0xf23bae24,
-    0x7f413ed9, 0xf2356efe,
-  0x7f409164, 0xf22f2fe1, 0x7f3fe3a0, 0xf228f0cc, 0x7f3f358d, 0xf222b1c0,
-    0x7f3e872c, 0xf21c72bc,
-  0x7f3dd87c, 0xf21633c0, 0x7f3d297e, 0xf20ff4ce, 0x7f3c7a31, 0xf209b5e4,
-    0x7f3bca96, 0xf2037702,
-  0x7f3b1aad, 0xf1fd3829, 0x7f3a6a75, 0xf1f6f959, 0x7f39b9ee, 0xf1f0ba91,
-    0x7f390919, 0xf1ea7bd2,
-  0x7f3857f6, 0xf1e43d1c, 0x7f37a684, 0xf1ddfe6f, 0x7f36f4c3, 0xf1d7bfca,
-    0x7f3642b4, 0xf1d1812e,
-  0x7f359057, 0xf1cb429a, 0x7f34ddab, 0xf1c50410, 0x7f342ab1, 0xf1bec58e,
-    0x7f337768, 0xf1b88715,
-  0x7f32c3d1, 0xf1b248a5, 0x7f320feb, 0xf1ac0a3e, 0x7f315bb7, 0xf1a5cbdf,
-    0x7f30a734, 0xf19f8d89,
-  0x7f2ff263, 0xf1994f3d, 0x7f2f3d44, 0xf19310f9, 0x7f2e87d6, 0xf18cd2be,
-    0x7f2dd219, 0xf186948c,
-  0x7f2d1c0e, 0xf1805662, 0x7f2c65b5, 0xf17a1842, 0x7f2baf0d, 0xf173da2b,
-    0x7f2af817, 0xf16d9c1d,
-  0x7f2a40d2, 0xf1675e17, 0x7f29893f, 0xf161201b, 0x7f28d15d, 0xf15ae228,
-    0x7f28192d, 0xf154a43d,
-  0x7f2760af, 0xf14e665c, 0x7f26a7e2, 0xf1482884, 0x7f25eec7, 0xf141eab5,
-    0x7f25355d, 0xf13bacef,
-  0x7f247ba5, 0xf1356f32, 0x7f23c19e, 0xf12f317e, 0x7f230749, 0xf128f3d4,
-    0x7f224ca6, 0xf122b632,
-  0x7f2191b4, 0xf11c789a, 0x7f20d674, 0xf1163b0b, 0x7f201ae5, 0xf10ffd85,
-    0x7f1f5f08, 0xf109c009,
-  0x7f1ea2dc, 0xf1038295, 0x7f1de662, 0xf0fd452b, 0x7f1d299a, 0xf0f707ca,
-    0x7f1c6c83, 0xf0f0ca72,
-  0x7f1baf1e, 0xf0ea8d24, 0x7f1af16a, 0xf0e44fdf, 0x7f1a3368, 0xf0de12a3,
-    0x7f197518, 0xf0d7d571,
-  0x7f18b679, 0xf0d19848, 0x7f17f78c, 0xf0cb5b28, 0x7f173850, 0xf0c51e12,
-    0x7f1678c6, 0xf0bee105,
-  0x7f15b8ee, 0xf0b8a401, 0x7f14f8c7, 0xf0b26707, 0x7f143852, 0xf0ac2a16,
-    0x7f13778e, 0xf0a5ed2f,
-  0x7f12b67c, 0xf09fb051, 0x7f11f51c, 0xf099737d, 0x7f11336d, 0xf09336b2,
-    0x7f107170, 0xf08cf9f1,
-  0x7f0faf25, 0xf086bd39, 0x7f0eec8b, 0xf080808b, 0x7f0e29a3, 0xf07a43e7,
-    0x7f0d666c, 0xf074074c,
-  0x7f0ca2e7, 0xf06dcaba, 0x7f0bdf14, 0xf0678e32, 0x7f0b1af2, 0xf06151b4,
-    0x7f0a5682, 0xf05b1540,
-  0x7f0991c4, 0xf054d8d5, 0x7f08ccb7, 0xf04e9c73, 0x7f08075c, 0xf048601c,
-    0x7f0741b2, 0xf04223ce,
-  0x7f067bba, 0xf03be78a, 0x7f05b574, 0xf035ab4f, 0x7f04eedf, 0xf02f6f1f,
-    0x7f0427fc, 0xf02932f8,
-  0x7f0360cb, 0xf022f6da, 0x7f02994b, 0xf01cbac7, 0x7f01d17d, 0xf0167ebd,
-    0x7f010961, 0xf01042be,
-  0x7f0040f6, 0xf00a06c8, 0x7eff783d, 0xf003cadc, 0x7efeaf36, 0xeffd8ef9,
-    0x7efde5e0, 0xeff75321,
-  0x7efd1c3c, 0xeff11753, 0x7efc524a, 0xefeadb8e, 0x7efb8809, 0xefe49fd3,
-    0x7efabd7a, 0xefde6423,
-  0x7ef9f29d, 0xefd8287c, 0x7ef92771, 0xefd1ecdf, 0x7ef85bf7, 0xefcbb14c,
-    0x7ef7902f, 0xefc575c3,
-  0x7ef6c418, 0xefbf3a45, 0x7ef5f7b3, 0xefb8fed0, 0x7ef52b00, 0xefb2c365,
-    0x7ef45dfe, 0xefac8804,
-  0x7ef390ae, 0xefa64cae, 0x7ef2c310, 0xefa01161, 0x7ef1f524, 0xef99d61f,
-    0x7ef126e9, 0xef939ae6,
-  0x7ef05860, 0xef8d5fb8, 0x7eef8988, 0xef872494, 0x7eeeba62, 0xef80e97a,
-    0x7eedeaee, 0xef7aae6b,
-  0x7eed1b2c, 0xef747365, 0x7eec4b1b, 0xef6e386a, 0x7eeb7abc, 0xef67fd79,
-    0x7eeaaa0f, 0xef61c292,
-  0x7ee9d914, 0xef5b87b5, 0x7ee907ca, 0xef554ce3, 0x7ee83632, 0xef4f121b,
-    0x7ee7644c, 0xef48d75d,
-  0x7ee69217, 0xef429caa, 0x7ee5bf94, 0xef3c6201, 0x7ee4ecc3, 0xef362762,
-    0x7ee419a3, 0xef2feccd,
-  0x7ee34636, 0xef29b243, 0x7ee2727a, 0xef2377c4, 0x7ee19e6f, 0xef1d3d4e,
-    0x7ee0ca17, 0xef1702e4,
-  0x7edff570, 0xef10c883, 0x7edf207b, 0xef0a8e2d, 0x7ede4b38, 0xef0453e2,
-    0x7edd75a6, 0xeefe19a1,
-  0x7edc9fc6, 0xeef7df6a, 0x7edbc998, 0xeef1a53e, 0x7edaf31c, 0xeeeb6b1c,
-    0x7eda1c51, 0xeee53105,
-  0x7ed94538, 0xeedef6f9, 0x7ed86dd1, 0xeed8bcf7, 0x7ed7961c, 0xeed28300,
-    0x7ed6be18, 0xeecc4913,
-  0x7ed5e5c6, 0xeec60f31, 0x7ed50d26, 0xeebfd55a, 0x7ed43438, 0xeeb99b8d,
-    0x7ed35afb, 0xeeb361cb,
-  0x7ed28171, 0xeead2813, 0x7ed1a798, 0xeea6ee66, 0x7ed0cd70, 0xeea0b4c4,
-    0x7ecff2fb, 0xee9a7b2d,
-  0x7ecf1837, 0xee9441a0, 0x7ece3d25, 0xee8e081e, 0x7ecd61c5, 0xee87cea7,
-    0x7ecc8617, 0xee81953b,
-  0x7ecbaa1a, 0xee7b5bd9, 0x7ecacdd0, 0xee752283, 0x7ec9f137, 0xee6ee937,
-    0x7ec9144f, 0xee68aff6,
-  0x7ec8371a, 0xee6276bf, 0x7ec75996, 0xee5c3d94, 0x7ec67bc5, 0xee560473,
-    0x7ec59da5, 0xee4fcb5e,
-  0x7ec4bf36, 0xee499253, 0x7ec3e07a, 0xee435953, 0x7ec3016f, 0xee3d205e,
-    0x7ec22217, 0xee36e775,
-  0x7ec14270, 0xee30ae96, 0x7ec0627a, 0xee2a75c2, 0x7ebf8237, 0xee243cf9,
-    0x7ebea1a6, 0xee1e043b,
-  0x7ebdc0c6, 0xee17cb88, 0x7ebcdf98, 0xee1192e0, 0x7ebbfe1c, 0xee0b5a43,
-    0x7ebb1c52, 0xee0521b2,
-  0x7eba3a39, 0xedfee92b, 0x7eb957d2, 0xedf8b0b0, 0x7eb8751e, 0xedf2783f,
-    0x7eb7921b, 0xedec3fda,
-  0x7eb6aeca, 0xede60780, 0x7eb5cb2a, 0xeddfcf31, 0x7eb4e73d, 0xedd996ed,
-    0x7eb40301, 0xedd35eb5,
-  0x7eb31e78, 0xedcd2687, 0x7eb239a0, 0xedc6ee65, 0x7eb1547a, 0xedc0b64e,
-    0x7eb06f05, 0xedba7e43,
-  0x7eaf8943, 0xedb44642, 0x7eaea333, 0xedae0e4d, 0x7eadbcd4, 0xeda7d664,
-    0x7eacd627, 0xeda19e85,
-  0x7eabef2c, 0xed9b66b2, 0x7eab07e3, 0xed952eea, 0x7eaa204c, 0xed8ef72e,
-    0x7ea93867, 0xed88bf7d,
-  0x7ea85033, 0xed8287d7, 0x7ea767b2, 0xed7c503d, 0x7ea67ee2, 0xed7618ae,
-    0x7ea595c4, 0xed6fe12b,
-  0x7ea4ac58, 0xed69a9b3, 0x7ea3c29e, 0xed637246, 0x7ea2d896, 0xed5d3ae5,
-    0x7ea1ee3f, 0xed570390,
-  0x7ea1039b, 0xed50cc46, 0x7ea018a8, 0xed4a9507, 0x7e9f2d68, 0xed445dd5,
-    0x7e9e41d9, 0xed3e26ad,
-  0x7e9d55fc, 0xed37ef91, 0x7e9c69d1, 0xed31b881, 0x7e9b7d58, 0xed2b817d,
-    0x7e9a9091, 0xed254a84,
-  0x7e99a37c, 0xed1f1396, 0x7e98b618, 0xed18dcb5, 0x7e97c867, 0xed12a5df,
-    0x7e96da67, 0xed0c6f14,
-  0x7e95ec1a, 0xed063856, 0x7e94fd7e, 0xed0001a3, 0x7e940e94, 0xecf9cafb,
-    0x7e931f5c, 0xecf39460,
-  0x7e922fd6, 0xeced5dd0, 0x7e914002, 0xece7274c, 0x7e904fe0, 0xece0f0d4,
-    0x7e8f5f70, 0xecdaba67,
-  0x7e8e6eb2, 0xecd48407, 0x7e8d7da6, 0xecce4db2, 0x7e8c8c4b, 0xecc81769,
-    0x7e8b9aa3, 0xecc1e12c,
-  0x7e8aa8ac, 0xecbbaafb, 0x7e89b668, 0xecb574d5, 0x7e88c3d5, 0xecaf3ebc,
-    0x7e87d0f5, 0xeca908ae,
-  0x7e86ddc6, 0xeca2d2ad, 0x7e85ea49, 0xec9c9cb7, 0x7e84f67e, 0xec9666cd,
-    0x7e840265, 0xec9030f0,
-  0x7e830dff, 0xec89fb1e, 0x7e82194a, 0xec83c558, 0x7e812447, 0xec7d8f9e,
-    0x7e802ef6, 0xec7759f1,
-  0x7e7f3957, 0xec71244f, 0x7e7e436a, 0xec6aeeba, 0x7e7d4d2f, 0xec64b930,
-    0x7e7c56a5, 0xec5e83b3,
-  0x7e7b5fce, 0xec584e41, 0x7e7a68a9, 0xec5218dc, 0x7e797136, 0xec4be383,
-    0x7e787975, 0xec45ae36,
-  0x7e778166, 0xec3f78f6, 0x7e768908, 0xec3943c1, 0x7e75905d, 0xec330e99,
-    0x7e749764, 0xec2cd97d,
-  0x7e739e1d, 0xec26a46d, 0x7e72a488, 0xec206f69, 0x7e71aaa4, 0xec1a3a72,
-    0x7e70b073, 0xec140587,
-  0x7e6fb5f4, 0xec0dd0a8, 0x7e6ebb27, 0xec079bd6, 0x7e6dc00c, 0xec01670f,
-    0x7e6cc4a2, 0xebfb3256,
-  0x7e6bc8eb, 0xebf4fda8, 0x7e6acce6, 0xebeec907, 0x7e69d093, 0xebe89472,
-    0x7e68d3f2, 0xebe25fea,
-  0x7e67d703, 0xebdc2b6e, 0x7e66d9c6, 0xebd5f6fe, 0x7e65dc3b, 0xebcfc29b,
-    0x7e64de62, 0xebc98e45,
-  0x7e63e03b, 0xebc359fb, 0x7e62e1c6, 0xebbd25bd, 0x7e61e303, 0xebb6f18c,
-    0x7e60e3f2, 0xebb0bd67,
-  0x7e5fe493, 0xebaa894f, 0x7e5ee4e6, 0xeba45543, 0x7e5de4ec, 0xeb9e2144,
-    0x7e5ce4a3, 0xeb97ed52,
-  0x7e5be40c, 0xeb91b96c, 0x7e5ae328, 0xeb8b8593, 0x7e59e1f5, 0xeb8551c6,
-    0x7e58e075, 0xeb7f1e06,
-  0x7e57dea7, 0xeb78ea52, 0x7e56dc8a, 0xeb72b6ac, 0x7e55da20, 0xeb6c8312,
-    0x7e54d768, 0xeb664f84,
-  0x7e53d462, 0xeb601c04, 0x7e52d10e, 0xeb59e890, 0x7e51cd6c, 0xeb53b529,
-    0x7e50c97c, 0xeb4d81ce,
-  0x7e4fc53e, 0xeb474e81, 0x7e4ec0b2, 0xeb411b40, 0x7e4dbbd9, 0xeb3ae80c,
-    0x7e4cb6b1, 0xeb34b4e4,
-  0x7e4bb13c, 0xeb2e81ca, 0x7e4aab78, 0xeb284ebc, 0x7e49a567, 0xeb221bbb,
-    0x7e489f08, 0xeb1be8c8,
-  0x7e47985b, 0xeb15b5e1, 0x7e469160, 0xeb0f8307, 0x7e458a17, 0xeb095039,
-    0x7e448281, 0xeb031d79,
-  0x7e437a9c, 0xeafceac6, 0x7e427269, 0xeaf6b81f, 0x7e4169e9, 0xeaf08586,
-    0x7e40611b, 0xeaea52fa,
-  0x7e3f57ff, 0xeae4207a, 0x7e3e4e95, 0xeaddee08, 0x7e3d44dd, 0xead7bba3,
-    0x7e3c3ad7, 0xead1894b,
-  0x7e3b3083, 0xeacb56ff, 0x7e3a25e2, 0xeac524c1, 0x7e391af3, 0xeabef290,
-    0x7e380fb5, 0xeab8c06c,
-  0x7e37042a, 0xeab28e56, 0x7e35f851, 0xeaac5c4c, 0x7e34ec2b, 0xeaa62a4f,
-    0x7e33dfb6, 0xea9ff860,
-  0x7e32d2f4, 0xea99c67e, 0x7e31c5e3, 0xea9394a9, 0x7e30b885, 0xea8d62e1,
-    0x7e2faad9, 0xea873127,
-  0x7e2e9cdf, 0xea80ff7a, 0x7e2d8e97, 0xea7acdda, 0x7e2c8002, 0xea749c47,
-    0x7e2b711f, 0xea6e6ac2,
-  0x7e2a61ed, 0xea683949, 0x7e29526e, 0xea6207df, 0x7e2842a2, 0xea5bd681,
-    0x7e273287, 0xea55a531,
-  0x7e26221f, 0xea4f73ee, 0x7e251168, 0xea4942b9, 0x7e240064, 0xea431191,
-    0x7e22ef12, 0xea3ce077,
-  0x7e21dd73, 0xea36af69, 0x7e20cb85, 0xea307e6a, 0x7e1fb94a, 0xea2a4d78,
-    0x7e1ea6c1, 0xea241c93,
-  0x7e1d93ea, 0xea1debbb, 0x7e1c80c5, 0xea17baf2, 0x7e1b6d53, 0xea118a35,
-    0x7e1a5992, 0xea0b5987,
-  0x7e194584, 0xea0528e5, 0x7e183128, 0xe9fef852, 0x7e171c7f, 0xe9f8c7cc,
-    0x7e160787, 0xe9f29753,
-  0x7e14f242, 0xe9ec66e8, 0x7e13dcaf, 0xe9e6368b, 0x7e12c6ce, 0xe9e0063c,
-    0x7e11b0a0, 0xe9d9d5fa,
-  0x7e109a24, 0xe9d3a5c5, 0x7e0f835a, 0xe9cd759f, 0x7e0e6c42, 0xe9c74586,
-    0x7e0d54dc, 0xe9c1157a,
-  0x7e0c3d29, 0xe9bae57d, 0x7e0b2528, 0xe9b4b58d, 0x7e0a0cd9, 0xe9ae85ab,
-    0x7e08f43d, 0xe9a855d7,
-  0x7e07db52, 0xe9a22610, 0x7e06c21a, 0xe99bf658, 0x7e05a894, 0xe995c6ad,
-    0x7e048ec1, 0xe98f9710,
-  0x7e0374a0, 0xe9896781, 0x7e025a31, 0xe98337ff, 0x7e013f74, 0xe97d088c,
-    0x7e00246a, 0xe976d926,
-  0x7dff0911, 0xe970a9ce, 0x7dfded6c, 0xe96a7a85, 0x7dfcd178, 0xe9644b49,
-    0x7dfbb537, 0xe95e1c1b,
-  0x7dfa98a8, 0xe957ecfb, 0x7df97bcb, 0xe951bde9, 0x7df85ea0, 0xe94b8ee5,
-    0x7df74128, 0xe9455fef,
-  0x7df62362, 0xe93f3107, 0x7df5054f, 0xe939022d, 0x7df3e6ee, 0xe932d361,
-    0x7df2c83f, 0xe92ca4a4,
-  0x7df1a942, 0xe92675f4, 0x7df089f8, 0xe9204752, 0x7def6a60, 0xe91a18bf,
-    0x7dee4a7a, 0xe913ea39,
-  0x7ded2a47, 0xe90dbbc2, 0x7dec09c6, 0xe9078d59, 0x7deae8f7, 0xe9015efe,
-    0x7de9c7da, 0xe8fb30b1,
-  0x7de8a670, 0xe8f50273, 0x7de784b9, 0xe8eed443, 0x7de662b3, 0xe8e8a621,
-    0x7de54060, 0xe8e2780d,
-  0x7de41dc0, 0xe8dc4a07, 0x7de2fad1, 0xe8d61c10, 0x7de1d795, 0xe8cfee27,
-    0x7de0b40b, 0xe8c9c04c,
-  0x7ddf9034, 0xe8c39280, 0x7dde6c0f, 0xe8bd64c2, 0x7ddd479d, 0xe8b73712,
-    0x7ddc22dc, 0xe8b10971,
-  0x7ddafdce, 0xe8aadbde, 0x7dd9d873, 0xe8a4ae59, 0x7dd8b2ca, 0xe89e80e3,
-    0x7dd78cd3, 0xe898537b,
-  0x7dd6668f, 0xe8922622, 0x7dd53ffc, 0xe88bf8d7, 0x7dd4191d, 0xe885cb9a,
-    0x7dd2f1f0, 0xe87f9e6c,
-  0x7dd1ca75, 0xe879714d, 0x7dd0a2ac, 0xe873443c, 0x7dcf7a96, 0xe86d173a,
-    0x7dce5232, 0xe866ea46,
-  0x7dcd2981, 0xe860bd61, 0x7dcc0082, 0xe85a908a, 0x7dcad736, 0xe85463c2,
-    0x7dc9ad9c, 0xe84e3708,
-  0x7dc883b4, 0xe8480a5d, 0x7dc7597f, 0xe841ddc1, 0x7dc62efc, 0xe83bb133,
-    0x7dc5042b, 0xe83584b4,
-  0x7dc3d90d, 0xe82f5844, 0x7dc2ada2, 0xe8292be3, 0x7dc181e8, 0xe822ff90,
-    0x7dc055e2, 0xe81cd34b,
-  0x7dbf298d, 0xe816a716, 0x7dbdfceb, 0xe8107aef, 0x7dbccffc, 0xe80a4ed7,
-    0x7dbba2bf, 0xe80422ce,
-  0x7dba7534, 0xe7fdf6d4, 0x7db9475c, 0xe7f7cae8, 0x7db81936, 0xe7f19f0c,
-    0x7db6eac3, 0xe7eb733e,
-  0x7db5bc02, 0xe7e5477f, 0x7db48cf4, 0xe7df1bcf, 0x7db35d98, 0xe7d8f02d,
-    0x7db22def, 0xe7d2c49b,
-  0x7db0fdf8, 0xe7cc9917, 0x7dafcdb3, 0xe7c66da3, 0x7dae9d21, 0xe7c0423d,
-    0x7dad6c42, 0xe7ba16e7,
-  0x7dac3b15, 0xe7b3eb9f, 0x7dab099a, 0xe7adc066, 0x7da9d7d2, 0xe7a7953d,
-    0x7da8a5bc, 0xe7a16a22,
-  0x7da77359, 0xe79b3f16, 0x7da640a9, 0xe795141a, 0x7da50dab, 0xe78ee92c,
-    0x7da3da5f, 0xe788be4e,
-  0x7da2a6c6, 0xe782937e, 0x7da172df, 0xe77c68be, 0x7da03eab, 0xe7763e0d,
-    0x7d9f0a29, 0xe770136b,
-  0x7d9dd55a, 0xe769e8d8, 0x7d9ca03e, 0xe763be55, 0x7d9b6ad3, 0xe75d93e0,
-    0x7d9a351c, 0xe757697b,
-  0x7d98ff17, 0xe7513f25, 0x7d97c8c4, 0xe74b14de, 0x7d969224, 0xe744eaa6,
-    0x7d955b37, 0xe73ec07e,
-  0x7d9423fc, 0xe7389665, 0x7d92ec73, 0xe7326c5b, 0x7d91b49e, 0xe72c4260,
-    0x7d907c7a, 0xe7261875,
-  0x7d8f4409, 0xe71fee99, 0x7d8e0b4b, 0xe719c4cd, 0x7d8cd240, 0xe7139b10,
-    0x7d8b98e6, 0xe70d7162,
-  0x7d8a5f40, 0xe70747c4, 0x7d89254c, 0xe7011e35, 0x7d87eb0a, 0xe6faf4b5,
-    0x7d86b07c, 0xe6f4cb45,
-  0x7d85759f, 0xe6eea1e4, 0x7d843a76, 0xe6e87893, 0x7d82fefe, 0xe6e24f51,
-    0x7d81c33a, 0xe6dc261f,
-  0x7d808728, 0xe6d5fcfc, 0x7d7f4ac8, 0xe6cfd3e9, 0x7d7e0e1c, 0xe6c9aae5,
-    0x7d7cd121, 0xe6c381f1,
-  0x7d7b93da, 0xe6bd590d, 0x7d7a5645, 0xe6b73038, 0x7d791862, 0xe6b10772,
-    0x7d77da32, 0xe6aadebc,
-  0x7d769bb5, 0xe6a4b616, 0x7d755cea, 0xe69e8d80, 0x7d741dd2, 0xe69864f9,
-    0x7d72de6d, 0xe6923c82,
-  0x7d719eba, 0xe68c141a, 0x7d705eba, 0xe685ebc2, 0x7d6f1e6c, 0xe67fc37a,
-    0x7d6dddd2, 0xe6799b42,
-  0x7d6c9ce9, 0xe6737319, 0x7d6b5bb4, 0xe66d4b01, 0x7d6a1a31, 0xe66722f7,
-    0x7d68d860, 0xe660fafe,
-  0x7d679642, 0xe65ad315, 0x7d6653d7, 0xe654ab3b, 0x7d65111f, 0xe64e8371,
-    0x7d63ce19, 0xe6485bb7,
-  0x7d628ac6, 0xe642340d, 0x7d614725, 0xe63c0c73, 0x7d600338, 0xe635e4e9,
-    0x7d5ebefc, 0xe62fbd6e,
-  0x7d5d7a74, 0xe6299604, 0x7d5c359e, 0xe6236ea9, 0x7d5af07b, 0xe61d475e,
-    0x7d59ab0a, 0xe6172024,
-  0x7d58654d, 0xe610f8f9, 0x7d571f41, 0xe60ad1de, 0x7d55d8e9, 0xe604aad4,
-    0x7d549243, 0xe5fe83d9,
-  0x7d534b50, 0xe5f85cef, 0x7d520410, 0xe5f23614, 0x7d50bc82, 0xe5ec0f4a,
-    0x7d4f74a7, 0xe5e5e88f,
-  0x7d4e2c7f, 0xe5dfc1e5, 0x7d4ce409, 0xe5d99b4b, 0x7d4b9b46, 0xe5d374c1,
-    0x7d4a5236, 0xe5cd4e47,
-  0x7d4908d9, 0xe5c727dd, 0x7d47bf2e, 0xe5c10184, 0x7d467536, 0xe5badb3a,
-    0x7d452af1, 0xe5b4b501,
-  0x7d43e05e, 0xe5ae8ed8, 0x7d42957e, 0xe5a868bf, 0x7d414a51, 0xe5a242b7,
-    0x7d3ffed7, 0xe59c1cbf,
-  0x7d3eb30f, 0xe595f6d7, 0x7d3d66fa, 0xe58fd0ff, 0x7d3c1a98, 0xe589ab38,
-    0x7d3acde9, 0xe5838581,
-  0x7d3980ec, 0xe57d5fda, 0x7d3833a2, 0xe5773a44, 0x7d36e60b, 0xe57114be,
-    0x7d359827, 0xe56aef49,
-  0x7d3449f5, 0xe564c9e3, 0x7d32fb76, 0xe55ea48f, 0x7d31acaa, 0xe5587f4a,
-    0x7d305d91, 0xe5525a17,
-  0x7d2f0e2b, 0xe54c34f3, 0x7d2dbe77, 0xe5460fe0, 0x7d2c6e76, 0xe53feade,
-    0x7d2b1e28, 0xe539c5ec,
-  0x7d29cd8c, 0xe533a10a, 0x7d287ca4, 0xe52d7c39, 0x7d272b6e, 0xe5275779,
-    0x7d25d9eb, 0xe52132c9,
-  0x7d24881b, 0xe51b0e2a, 0x7d2335fe, 0xe514e99b, 0x7d21e393, 0xe50ec51d,
-    0x7d2090db, 0xe508a0b0,
-  0x7d1f3dd6, 0xe5027c53, 0x7d1dea84, 0xe4fc5807, 0x7d1c96e5, 0xe4f633cc,
-    0x7d1b42f9, 0xe4f00fa1,
-  0x7d19eebf, 0xe4e9eb87, 0x7d189a38, 0xe4e3c77d, 0x7d174564, 0xe4dda385,
-    0x7d15f043, 0xe4d77f9d,
-  0x7d149ad5, 0xe4d15bc6, 0x7d134519, 0xe4cb37ff, 0x7d11ef11, 0xe4c5144a,
-    0x7d1098bb, 0xe4bef0a5,
-  0x7d0f4218, 0xe4b8cd11, 0x7d0deb28, 0xe4b2a98e, 0x7d0c93eb, 0xe4ac861b,
-    0x7d0b3c60, 0xe4a662ba,
-  0x7d09e489, 0xe4a03f69, 0x7d088c64, 0xe49a1c29, 0x7d0733f3, 0xe493f8fb,
-    0x7d05db34, 0xe48dd5dd,
-  0x7d048228, 0xe487b2d0, 0x7d0328cf, 0xe4818fd4, 0x7d01cf29, 0xe47b6ce9,
-    0x7d007535, 0xe4754a0e,
-  0x7cff1af5, 0xe46f2745, 0x7cfdc068, 0xe469048d, 0x7cfc658d, 0xe462e1e6,
-    0x7cfb0a65, 0xe45cbf50,
-  0x7cf9aef0, 0xe4569ccb, 0x7cf8532f, 0xe4507a57, 0x7cf6f720, 0xe44a57f4,
-    0x7cf59ac4, 0xe44435a2,
-  0x7cf43e1a, 0xe43e1362, 0x7cf2e124, 0xe437f132, 0x7cf183e1, 0xe431cf14,
-    0x7cf02651, 0xe42bad07,
-  0x7ceec873, 0xe4258b0a, 0x7ced6a49, 0xe41f6920, 0x7cec0bd1, 0xe4194746,
-    0x7ceaad0c, 0xe413257d,
-  0x7ce94dfb, 0xe40d03c6, 0x7ce7ee9c, 0xe406e220, 0x7ce68ef0, 0xe400c08b,
-    0x7ce52ef7, 0xe3fa9f08,
-  0x7ce3ceb2, 0xe3f47d96, 0x7ce26e1f, 0xe3ee5c35, 0x7ce10d3f, 0xe3e83ae5,
-    0x7cdfac12, 0xe3e219a7,
-  0x7cde4a98, 0xe3dbf87a, 0x7cdce8d1, 0xe3d5d75e, 0x7cdb86bd, 0xe3cfb654,
-    0x7cda245c, 0xe3c9955b,
-  0x7cd8c1ae, 0xe3c37474, 0x7cd75eb3, 0xe3bd539e, 0x7cd5fb6a, 0xe3b732d9,
-    0x7cd497d5, 0xe3b11226,
-  0x7cd333f3, 0xe3aaf184, 0x7cd1cfc4, 0xe3a4d0f4, 0x7cd06b48, 0xe39eb075,
-    0x7ccf067f, 0xe3989008,
-  0x7ccda169, 0xe3926fad, 0x7ccc3c06, 0xe38c4f63, 0x7ccad656, 0xe3862f2a,
-    0x7cc97059, 0xe3800f03,
-  0x7cc80a0f, 0xe379eeed, 0x7cc6a378, 0xe373ceea, 0x7cc53c94, 0xe36daef7,
-    0x7cc3d563, 0xe3678f17,
-  0x7cc26de5, 0xe3616f48, 0x7cc1061a, 0xe35b4f8b, 0x7cbf9e03, 0xe3552fdf,
-    0x7cbe359e, 0xe34f1045,
-  0x7cbcccec, 0xe348f0bd, 0x7cbb63ee, 0xe342d146, 0x7cb9faa2, 0xe33cb1e1,
-    0x7cb8910a, 0xe336928e,
-  0x7cb72724, 0xe330734d, 0x7cb5bcf2, 0xe32a541d, 0x7cb45272, 0xe3243500,
-    0x7cb2e7a6, 0xe31e15f4,
-  0x7cb17c8d, 0xe317f6fa, 0x7cb01127, 0xe311d811, 0x7caea574, 0xe30bb93b,
-    0x7cad3974, 0xe3059a76,
-  0x7cabcd28, 0xe2ff7bc3, 0x7caa608e, 0xe2f95d23, 0x7ca8f3a7, 0xe2f33e94,
-    0x7ca78674, 0xe2ed2017,
-  0x7ca618f3, 0xe2e701ac, 0x7ca4ab26, 0xe2e0e352, 0x7ca33d0c, 0xe2dac50b,
-    0x7ca1cea5, 0xe2d4a6d6,
-  0x7ca05ff1, 0xe2ce88b3, 0x7c9ef0f0, 0xe2c86aa2, 0x7c9d81a3, 0xe2c24ca2,
-    0x7c9c1208, 0xe2bc2eb5,
-  0x7c9aa221, 0xe2b610da, 0x7c9931ec, 0xe2aff311, 0x7c97c16b, 0xe2a9d55a,
-    0x7c96509d, 0xe2a3b7b5,
-  0x7c94df83, 0xe29d9a23, 0x7c936e1b, 0xe2977ca2, 0x7c91fc66, 0xe2915f34,
-    0x7c908a65, 0xe28b41d7,
-  0x7c8f1817, 0xe285248d, 0x7c8da57c, 0xe27f0755, 0x7c8c3294, 0xe278ea30,
-    0x7c8abf5f, 0xe272cd1c,
-  0x7c894bde, 0xe26cb01b, 0x7c87d810, 0xe266932c, 0x7c8663f4, 0xe260764f,
-    0x7c84ef8c, 0xe25a5984,
-  0x7c837ad8, 0xe2543ccc, 0x7c8205d6, 0xe24e2026, 0x7c809088, 0xe2480393,
-    0x7c7f1aed, 0xe241e711,
-  0x7c7da505, 0xe23bcaa2, 0x7c7c2ed0, 0xe235ae46, 0x7c7ab84e, 0xe22f91fc,
-    0x7c794180, 0xe22975c4,
-  0x7c77ca65, 0xe223599e, 0x7c7652fd, 0xe21d3d8b, 0x7c74db48, 0xe217218b,
-    0x7c736347, 0xe211059d,
-  0x7c71eaf9, 0xe20ae9c1, 0x7c70725e, 0xe204cdf8, 0x7c6ef976, 0xe1feb241,
-    0x7c6d8041, 0xe1f8969d,
-  0x7c6c06c0, 0xe1f27b0b, 0x7c6a8cf2, 0xe1ec5f8c, 0x7c6912d7, 0xe1e64420,
-    0x7c679870, 0xe1e028c6,
-  0x7c661dbc, 0xe1da0d7e, 0x7c64a2bb, 0xe1d3f24a, 0x7c63276d, 0xe1cdd727,
-    0x7c61abd3, 0xe1c7bc18,
-  0x7c602fec, 0xe1c1a11b, 0x7c5eb3b8, 0xe1bb8631, 0x7c5d3737, 0xe1b56b59,
-    0x7c5bba6a, 0xe1af5094,
-  0x7c5a3d50, 0xe1a935e2, 0x7c58bfe9, 0xe1a31b42, 0x7c574236, 0xe19d00b6,
-    0x7c55c436, 0xe196e63c,
-  0x7c5445e9, 0xe190cbd4, 0x7c52c74f, 0xe18ab180, 0x7c514869, 0xe184973e,
-    0x7c4fc936, 0xe17e7d0f,
-  0x7c4e49b7, 0xe17862f3, 0x7c4cc9ea, 0xe17248ea, 0x7c4b49d2, 0xe16c2ef4,
-    0x7c49c96c, 0xe1661510,
-  0x7c4848ba, 0xe15ffb3f, 0x7c46c7bb, 0xe159e182, 0x7c45466f, 0xe153c7d7,
-    0x7c43c4d7, 0xe14dae3f,
-  0x7c4242f2, 0xe14794ba, 0x7c40c0c1, 0xe1417b48, 0x7c3f3e42, 0xe13b61e9,
-    0x7c3dbb78, 0xe135489d,
-  0x7c3c3860, 0xe12f2f63, 0x7c3ab4fc, 0xe129163d, 0x7c39314b, 0xe122fd2a,
-    0x7c37ad4e, 0xe11ce42a,
-  0x7c362904, 0xe116cb3d, 0x7c34a46d, 0xe110b263, 0x7c331f8a, 0xe10a999c,
-    0x7c319a5a, 0xe10480e9,
-  0x7c3014de, 0xe0fe6848, 0x7c2e8f15, 0xe0f84fbb, 0x7c2d08ff, 0xe0f23740,
-    0x7c2b829d, 0xe0ec1ed9,
-  0x7c29fbee, 0xe0e60685, 0x7c2874f3, 0xe0dfee44, 0x7c26edab, 0xe0d9d616,
-    0x7c256616, 0xe0d3bdfc,
-  0x7c23de35, 0xe0cda5f5, 0x7c225607, 0xe0c78e01, 0x7c20cd8d, 0xe0c17620,
-    0x7c1f44c6, 0xe0bb5e53,
-  0x7c1dbbb3, 0xe0b54698, 0x7c1c3253, 0xe0af2ef2, 0x7c1aa8a6, 0xe0a9175e,
-    0x7c191ead, 0xe0a2ffde,
-  0x7c179467, 0xe09ce871, 0x7c1609d5, 0xe096d117, 0x7c147ef6, 0xe090b9d1,
-    0x7c12f3cb, 0xe08aa29f,
-  0x7c116853, 0xe0848b7f, 0x7c0fdc8f, 0xe07e7473, 0x7c0e507e, 0xe0785d7b,
-    0x7c0cc421, 0xe0724696,
-  0x7c0b3777, 0xe06c2fc4, 0x7c09aa80, 0xe0661906, 0x7c081d3d, 0xe060025c,
-    0x7c068fae, 0xe059ebc5,
-  0x7c0501d2, 0xe053d541, 0x7c0373a9, 0xe04dbed1, 0x7c01e534, 0xe047a875,
-    0x7c005673, 0xe041922c,
-  0x7bfec765, 0xe03b7bf6, 0x7bfd380a, 0xe03565d5, 0x7bfba863, 0xe02f4fc6,
-    0x7bfa1870, 0xe02939cc,
-  0x7bf88830, 0xe02323e5, 0x7bf6f7a4, 0xe01d0e12, 0x7bf566cb, 0xe016f852,
-    0x7bf3d5a6, 0xe010e2a7,
-  0x7bf24434, 0xe00acd0e, 0x7bf0b276, 0xe004b78a, 0x7bef206b, 0xdffea219,
-    0x7bed8e14, 0xdff88cbc,
-  0x7bebfb70, 0xdff27773, 0x7bea6880, 0xdfec623e, 0x7be8d544, 0xdfe64d1c,
-    0x7be741bb, 0xdfe0380e,
-  0x7be5ade6, 0xdfda2314, 0x7be419c4, 0xdfd40e2e, 0x7be28556, 0xdfcdf95c,
-    0x7be0f09b, 0xdfc7e49d,
-  0x7bdf5b94, 0xdfc1cff3, 0x7bddc641, 0xdfbbbb5c, 0x7bdc30a1, 0xdfb5a6d9,
-    0x7bda9ab5, 0xdfaf926a,
-  0x7bd9047c, 0xdfa97e0f, 0x7bd76df7, 0xdfa369c8, 0x7bd5d726, 0xdf9d5595,
-    0x7bd44008, 0xdf974176,
-  0x7bd2a89e, 0xdf912d6b, 0x7bd110e8, 0xdf8b1974, 0x7bcf78e5, 0xdf850591,
-    0x7bcde095, 0xdf7ef1c2,
-  0x7bcc47fa, 0xdf78de07, 0x7bcaaf12, 0xdf72ca60, 0x7bc915dd, 0xdf6cb6cd,
-    0x7bc77c5d, 0xdf66a34e,
-  0x7bc5e290, 0xdf608fe4, 0x7bc44876, 0xdf5a7c8d, 0x7bc2ae10, 0xdf54694b,
-    0x7bc1135e, 0xdf4e561c,
-  0x7bbf7860, 0xdf484302, 0x7bbddd15, 0xdf422ffd, 0x7bbc417e, 0xdf3c1d0b,
-    0x7bbaa59a, 0xdf360a2d,
-  0x7bb9096b, 0xdf2ff764, 0x7bb76cef, 0xdf29e4af, 0x7bb5d026, 0xdf23d20e,
-    0x7bb43311, 0xdf1dbf82,
-  0x7bb295b0, 0xdf17ad0a, 0x7bb0f803, 0xdf119aa6, 0x7baf5a09, 0xdf0b8856,
-    0x7badbbc3, 0xdf05761b,
-  0x7bac1d31, 0xdeff63f4, 0x7baa7e53, 0xdef951e2, 0x7ba8df28, 0xdef33fe3,
-    0x7ba73fb1, 0xdeed2dfa,
-  0x7ba59fee, 0xdee71c24, 0x7ba3ffde, 0xdee10a63, 0x7ba25f82, 0xdedaf8b7,
-    0x7ba0beda, 0xded4e71f,
-  0x7b9f1de6, 0xdeced59b, 0x7b9d7ca5, 0xdec8c42c, 0x7b9bdb18, 0xdec2b2d1,
-    0x7b9a393f, 0xdebca18b,
-  0x7b989719, 0xdeb69059, 0x7b96f4a8, 0xdeb07f3c, 0x7b9551ea, 0xdeaa6e34,
-    0x7b93aee0, 0xdea45d40,
-  0x7b920b89, 0xde9e4c60, 0x7b9067e7, 0xde983b95, 0x7b8ec3f8, 0xde922adf,
-    0x7b8d1fbd, 0xde8c1a3e,
-  0x7b8b7b36, 0xde8609b1, 0x7b89d662, 0xde7ff938, 0x7b883143, 0xde79e8d5,
-    0x7b868bd7, 0xde73d886,
-  0x7b84e61f, 0xde6dc84b, 0x7b83401b, 0xde67b826, 0x7b8199ca, 0xde61a815,
-    0x7b7ff32e, 0xde5b9819,
-  0x7b7e4c45, 0xde558831, 0x7b7ca510, 0xde4f785f, 0x7b7afd8f, 0xde4968a1,
-    0x7b7955c2, 0xde4358f8,
-  0x7b77ada8, 0xde3d4964, 0x7b760542, 0xde3739e4, 0x7b745c91, 0xde312a7a,
-    0x7b72b393, 0xde2b1b24,
-  0x7b710a49, 0xde250be3, 0x7b6f60b2, 0xde1efcb7, 0x7b6db6d0, 0xde18eda0,
-    0x7b6c0ca2, 0xde12de9e,
-  0x7b6a6227, 0xde0ccfb1, 0x7b68b760, 0xde06c0d9, 0x7b670c4d, 0xde00b216,
-    0x7b6560ee, 0xddfaa367,
-  0x7b63b543, 0xddf494ce, 0x7b62094c, 0xddee8649, 0x7b605d09, 0xdde877da,
-    0x7b5eb079, 0xdde26980,
-  0x7b5d039e, 0xdddc5b3b, 0x7b5b5676, 0xddd64d0a, 0x7b59a902, 0xddd03eef,
-    0x7b57fb42, 0xddca30e9,
-  0x7b564d36, 0xddc422f8, 0x7b549ede, 0xddbe151d, 0x7b52f03a, 0xddb80756,
-    0x7b51414a, 0xddb1f9a4,
-  0x7b4f920e, 0xddabec08, 0x7b4de286, 0xdda5de81, 0x7b4c32b1, 0xdd9fd10f,
-    0x7b4a8291, 0xdd99c3b2,
-  0x7b48d225, 0xdd93b66a, 0x7b47216c, 0xdd8da938, 0x7b457068, 0xdd879c1b,
-    0x7b43bf17, 0xdd818f13,
-  0x7b420d7a, 0xdd7b8220, 0x7b405b92, 0xdd757543, 0x7b3ea95d, 0xdd6f687b,
-    0x7b3cf6dc, 0xdd695bc9,
-  0x7b3b4410, 0xdd634f2b, 0x7b3990f7, 0xdd5d42a3, 0x7b37dd92, 0xdd573631,
-    0x7b3629e1, 0xdd5129d4,
-  0x7b3475e5, 0xdd4b1d8c, 0x7b32c19c, 0xdd451159, 0x7b310d07, 0xdd3f053c,
-    0x7b2f5826, 0xdd38f935,
-  0x7b2da2fa, 0xdd32ed43, 0x7b2bed81, 0xdd2ce166, 0x7b2a37bc, 0xdd26d59f,
-    0x7b2881ac, 0xdd20c9ed,
-  0x7b26cb4f, 0xdd1abe51, 0x7b2514a6, 0xdd14b2ca, 0x7b235db2, 0xdd0ea759,
-    0x7b21a671, 0xdd089bfe,
-  0x7b1feee5, 0xdd0290b8, 0x7b1e370d, 0xdcfc8588, 0x7b1c7ee8, 0xdcf67a6d,
-    0x7b1ac678, 0xdcf06f68,
-  0x7b190dbc, 0xdcea6478, 0x7b1754b3, 0xdce4599e, 0x7b159b5f, 0xdcde4eda,
-    0x7b13e1bf, 0xdcd8442b,
-  0x7b1227d3, 0xdcd23993, 0x7b106d9b, 0xdccc2f0f, 0x7b0eb318, 0xdcc624a2,
-    0x7b0cf848, 0xdcc01a4a,
-  0x7b0b3d2c, 0xdcba1008, 0x7b0981c5, 0xdcb405dc, 0x7b07c612, 0xdcadfbc5,
-    0x7b060a12, 0xdca7f1c5,
-  0x7b044dc7, 0xdca1e7da, 0x7b029130, 0xdc9bde05, 0x7b00d44d, 0xdc95d446,
-    0x7aff171e, 0xdc8fca9c,
-  0x7afd59a4, 0xdc89c109, 0x7afb9bdd, 0xdc83b78b, 0x7af9ddcb, 0xdc7dae23,
-    0x7af81f6c, 0xdc77a4d2,
-  0x7af660c2, 0xdc719b96, 0x7af4a1cc, 0xdc6b9270, 0x7af2e28b, 0xdc658960,
-    0x7af122fd, 0xdc5f8066,
-  0x7aef6323, 0xdc597781, 0x7aeda2fe, 0xdc536eb3, 0x7aebe28d, 0xdc4d65fb,
-    0x7aea21d0, 0xdc475d59,
-  0x7ae860c7, 0xdc4154cd, 0x7ae69f73, 0xdc3b4c57, 0x7ae4ddd2, 0xdc3543f7,
-    0x7ae31be6, 0xdc2f3bad,
-  0x7ae159ae, 0xdc293379, 0x7adf972a, 0xdc232b5c, 0x7addd45b, 0xdc1d2354,
-    0x7adc113f, 0xdc171b63,
-  0x7ada4dd8, 0xdc111388, 0x7ad88a25, 0xdc0b0bc2, 0x7ad6c626, 0xdc050414,
-    0x7ad501dc, 0xdbfefc7b,
-  0x7ad33d45, 0xdbf8f4f8, 0x7ad17863, 0xdbf2ed8c, 0x7acfb336, 0xdbece636,
-    0x7acdedbc, 0xdbe6def6,
-  0x7acc27f7, 0xdbe0d7cd, 0x7aca61e6, 0xdbdad0b9, 0x7ac89b89, 0xdbd4c9bc,
-    0x7ac6d4e0, 0xdbcec2d6,
-  0x7ac50dec, 0xdbc8bc06, 0x7ac346ac, 0xdbc2b54c, 0x7ac17f20, 0xdbbcaea8,
-    0x7abfb749, 0xdbb6a81b,
-  0x7abdef25, 0xdbb0a1a4, 0x7abc26b7, 0xdbaa9b43, 0x7aba5dfc, 0xdba494f9,
-    0x7ab894f6, 0xdb9e8ec6,
-  0x7ab6cba4, 0xdb9888a8, 0x7ab50206, 0xdb9282a2, 0x7ab3381d, 0xdb8c7cb1,
-    0x7ab16de7, 0xdb8676d8,
-  0x7aafa367, 0xdb807114, 0x7aadd89a, 0xdb7a6b68, 0x7aac0d82, 0xdb7465d1,
-    0x7aaa421e, 0xdb6e6052,
-  0x7aa8766f, 0xdb685ae9, 0x7aa6aa74, 0xdb625596, 0x7aa4de2d, 0xdb5c505a,
-    0x7aa3119a, 0xdb564b35,
-  0x7aa144bc, 0xdb504626, 0x7a9f7793, 0xdb4a412e, 0x7a9daa1d, 0xdb443c4c,
-    0x7a9bdc5c, 0xdb3e3781,
-  0x7a9a0e50, 0xdb3832cd, 0x7a983ff7, 0xdb322e30, 0x7a967153, 0xdb2c29a9,
-    0x7a94a264, 0xdb262539,
-  0x7a92d329, 0xdb2020e0, 0x7a9103a2, 0xdb1a1c9d, 0x7a8f33d0, 0xdb141871,
-    0x7a8d63b2, 0xdb0e145c,
-  0x7a8b9348, 0xdb08105e, 0x7a89c293, 0xdb020c77, 0x7a87f192, 0xdafc08a6,
-    0x7a862046, 0xdaf604ec,
-  0x7a844eae, 0xdaf00149, 0x7a827ccb, 0xdae9fdbd, 0x7a80aa9c, 0xdae3fa48,
-    0x7a7ed821, 0xdaddf6ea,
-  0x7a7d055b, 0xdad7f3a2, 0x7a7b3249, 0xdad1f072, 0x7a795eec, 0xdacbed58,
-    0x7a778b43, 0xdac5ea56,
-  0x7a75b74f, 0xdabfe76a, 0x7a73e30f, 0xdab9e495, 0x7a720e84, 0xdab3e1d8,
-    0x7a7039ad, 0xdaaddf31,
-  0x7a6e648a, 0xdaa7dca1, 0x7a6c8f1c, 0xdaa1da29, 0x7a6ab963, 0xda9bd7c7,
-    0x7a68e35e, 0xda95d57d,
-  0x7a670d0d, 0xda8fd349, 0x7a653671, 0xda89d12d, 0x7a635f8a, 0xda83cf28,
-    0x7a618857, 0xda7dcd3a,
-  0x7a5fb0d8, 0xda77cb63, 0x7a5dd90e, 0xda71c9a3, 0x7a5c00f9, 0xda6bc7fa,
-    0x7a5a2898, 0xda65c669,
-  0x7a584feb, 0xda5fc4ef, 0x7a5676f3, 0xda59c38c, 0x7a549db0, 0xda53c240,
-    0x7a52c421, 0xda4dc10b,
-  0x7a50ea47, 0xda47bfee, 0x7a4f1021, 0xda41bee8, 0x7a4d35b0, 0xda3bbdf9,
-    0x7a4b5af3, 0xda35bd22,
-  0x7a497feb, 0xda2fbc61, 0x7a47a498, 0xda29bbb9, 0x7a45c8f9, 0xda23bb27,
-    0x7a43ed0e, 0xda1dbaad,
-  0x7a4210d8, 0xda17ba4a, 0x7a403457, 0xda11b9ff, 0x7a3e578b, 0xda0bb9cb,
-    0x7a3c7a73, 0xda05b9ae,
-  0x7a3a9d0f, 0xd9ffb9a9, 0x7a38bf60, 0xd9f9b9bb, 0x7a36e166, 0xd9f3b9e5,
-    0x7a350321, 0xd9edba26,
-  0x7a332490, 0xd9e7ba7f, 0x7a3145b3, 0xd9e1baef, 0x7a2f668c, 0xd9dbbb77,
-    0x7a2d8719, 0xd9d5bc16,
-  0x7a2ba75a, 0xd9cfbccd, 0x7a29c750, 0xd9c9bd9b, 0x7a27e6fb, 0xd9c3be81,
-    0x7a26065b, 0xd9bdbf7e,
-  0x7a24256f, 0xd9b7c094, 0x7a224437, 0xd9b1c1c0, 0x7a2062b5, 0xd9abc305,
-    0x7a1e80e7, 0xd9a5c461,
-  0x7a1c9ece, 0xd99fc5d4, 0x7a1abc69, 0xd999c75f, 0x7a18d9b9, 0xd993c902,
-    0x7a16f6be, 0xd98dcabd,
-  0x7a151378, 0xd987cc90, 0x7a132fe6, 0xd981ce7a, 0x7a114c09, 0xd97bd07c,
-    0x7a0f67e0, 0xd975d295,
-  0x7a0d836d, 0xd96fd4c7, 0x7a0b9eae, 0xd969d710, 0x7a09b9a4, 0xd963d971,
-    0x7a07d44e, 0xd95ddbea,
-  0x7a05eead, 0xd957de7a, 0x7a0408c1, 0xd951e123, 0x7a02228a, 0xd94be3e3,
-    0x7a003c07, 0xd945e6bb,
-  0x79fe5539, 0xd93fe9ab, 0x79fc6e20, 0xd939ecb3, 0x79fa86bc, 0xd933efd3,
-    0x79f89f0c, 0xd92df30b,
-  0x79f6b711, 0xd927f65b, 0x79f4cecb, 0xd921f9c3, 0x79f2e63a, 0xd91bfd43,
-    0x79f0fd5d, 0xd91600da,
-  0x79ef1436, 0xd910048a, 0x79ed2ac3, 0xd90a0852, 0x79eb4105, 0xd9040c32,
-    0x79e956fb, 0xd8fe1029,
-  0x79e76ca7, 0xd8f81439, 0x79e58207, 0xd8f21861, 0x79e3971c, 0xd8ec1ca1,
-    0x79e1abe6, 0xd8e620fa,
-  0x79dfc064, 0xd8e0256a, 0x79ddd498, 0xd8da29f2, 0x79dbe880, 0xd8d42e93,
-    0x79d9fc1d, 0xd8ce334c,
-  0x79d80f6f, 0xd8c8381d, 0x79d62276, 0xd8c23d06, 0x79d43532, 0xd8bc4207,
-    0x79d247a2, 0xd8b64720,
-  0x79d059c8, 0xd8b04c52, 0x79ce6ba2, 0xd8aa519c, 0x79cc7d31, 0xd8a456ff,
-    0x79ca8e75, 0xd89e5c79,
-  0x79c89f6e, 0xd898620c, 0x79c6b01b, 0xd89267b7, 0x79c4c07e, 0xd88c6d7b,
-    0x79c2d095, 0xd8867356,
-  0x79c0e062, 0xd880794b, 0x79beefe3, 0xd87a7f57, 0x79bcff19, 0xd874857c,
-    0x79bb0e04, 0xd86e8bb9,
-  0x79b91ca4, 0xd868920f, 0x79b72af9, 0xd862987d, 0x79b53903, 0xd85c9f04,
-    0x79b346c2, 0xd856a5a3,
-  0x79b15435, 0xd850ac5a, 0x79af615e, 0xd84ab32a, 0x79ad6e3c, 0xd844ba13,
-    0x79ab7ace, 0xd83ec114,
-  0x79a98715, 0xd838c82d, 0x79a79312, 0xd832cf5f, 0x79a59ec3, 0xd82cd6aa,
-    0x79a3aa29, 0xd826de0d,
-  0x79a1b545, 0xd820e589, 0x799fc015, 0xd81aed1d, 0x799dca9a, 0xd814f4ca,
-    0x799bd4d4, 0xd80efc8f,
-  0x7999dec4, 0xd809046e, 0x7997e868, 0xd8030c64, 0x7995f1c1, 0xd7fd1474,
-    0x7993facf, 0xd7f71c9c,
-  0x79920392, 0xd7f124dd, 0x79900c0a, 0xd7eb2d37, 0x798e1438, 0xd7e535a9,
-    0x798c1c1a, 0xd7df3e34,
-  0x798a23b1, 0xd7d946d8, 0x79882afd, 0xd7d34f94, 0x798631ff, 0xd7cd586a,
-    0x798438b5, 0xd7c76158,
-  0x79823f20, 0xd7c16a5f, 0x79804541, 0xd7bb737f, 0x797e4b16, 0xd7b57cb7,
-    0x797c50a1, 0xd7af8609,
-  0x797a55e0, 0xd7a98f73, 0x79785ad5, 0xd7a398f6, 0x79765f7f, 0xd79da293,
-    0x797463de, 0xd797ac48,
-  0x797267f2, 0xd791b616, 0x79706bbb, 0xd78bbffc, 0x796e6f39, 0xd785c9fc,
-    0x796c726c, 0xd77fd415,
-  0x796a7554, 0xd779de47, 0x796877f1, 0xd773e892, 0x79667a44, 0xd76df2f6,
-    0x79647c4c, 0xd767fd72,
-  0x79627e08, 0xd7620808, 0x79607f7a, 0xd75c12b7, 0x795e80a1, 0xd7561d7f,
-    0x795c817d, 0xd7502860,
-  0x795a820e, 0xd74a335b, 0x79588255, 0xd7443e6e, 0x79568250, 0xd73e499a,
-    0x79548201, 0xd73854e0,
-  0x79528167, 0xd732603f, 0x79508082, 0xd72c6bb6, 0x794e7f52, 0xd7267748,
-    0x794c7dd7, 0xd72082f2,
-  0x794a7c12, 0xd71a8eb5, 0x79487a01, 0xd7149a92, 0x794677a6, 0xd70ea688,
-    0x79447500, 0xd708b297,
-  0x79427210, 0xd702bec0, 0x79406ed4, 0xd6fccb01, 0x793e6b4e, 0xd6f6d75d,
-    0x793c677d, 0xd6f0e3d1,
-  0x793a6361, 0xd6eaf05f, 0x79385efa, 0xd6e4fd06, 0x79365a49, 0xd6df09c6,
-    0x7934554d, 0xd6d916a0,
-  0x79325006, 0xd6d32393, 0x79304a74, 0xd6cd30a0, 0x792e4497, 0xd6c73dc6,
-    0x792c3e70, 0xd6c14b05,
-  0x792a37fe, 0xd6bb585e, 0x79283141, 0xd6b565d0, 0x79262a3a, 0xd6af735c,
-    0x792422e8, 0xd6a98101,
-  0x79221b4b, 0xd6a38ec0, 0x79201363, 0xd69d9c98, 0x791e0b31, 0xd697aa8a,
-    0x791c02b4, 0xd691b895,
-  0x7919f9ec, 0xd68bc6ba, 0x7917f0d9, 0xd685d4f9, 0x7915e77c, 0xd67fe351,
-    0x7913ddd4, 0xd679f1c2,
-  0x7911d3e2, 0xd674004e, 0x790fc9a4, 0xd66e0ef2, 0x790dbf1d, 0xd6681db1,
-    0x790bb44a, 0xd6622c89,
-  0x7909a92d, 0xd65c3b7b, 0x79079dc5, 0xd6564a87, 0x79059212, 0xd65059ac,
-    0x79038615, 0xd64a68eb,
-  0x790179cd, 0xd6447844, 0x78ff6d3b, 0xd63e87b6, 0x78fd605d, 0xd6389742,
-    0x78fb5336, 0xd632a6e8,
-  0x78f945c3, 0xd62cb6a8, 0x78f73806, 0xd626c681, 0x78f529fe, 0xd620d675,
-    0x78f31bac, 0xd61ae682,
-  0x78f10d0f, 0xd614f6a9, 0x78eefe28, 0xd60f06ea, 0x78eceef6, 0xd6091745,
-    0x78eadf79, 0xd60327b9,
-  0x78e8cfb2, 0xd5fd3848, 0x78e6bfa0, 0xd5f748f0, 0x78e4af44, 0xd5f159b3,
-    0x78e29e9d, 0xd5eb6a8f,
-  0x78e08dab, 0xd5e57b85, 0x78de7c6f, 0xd5df8c96, 0x78dc6ae8, 0xd5d99dc0,
-    0x78da5917, 0xd5d3af04,
-  0x78d846fb, 0xd5cdc062, 0x78d63495, 0xd5c7d1db, 0x78d421e4, 0xd5c1e36d,
-    0x78d20ee9, 0xd5bbf519,
-  0x78cffba3, 0xd5b606e0, 0x78cde812, 0xd5b018c0, 0x78cbd437, 0xd5aa2abb,
-    0x78c9c012, 0xd5a43cd0,
-  0x78c7aba2, 0xd59e4eff, 0x78c596e7, 0xd5986148, 0x78c381e2, 0xd59273ab,
-    0x78c16c93, 0xd58c8628,
-  0x78bf56f9, 0xd58698c0, 0x78bd4114, 0xd580ab72, 0x78bb2ae5, 0xd57abe3d,
-    0x78b9146c, 0xd574d124,
-  0x78b6fda8, 0xd56ee424, 0x78b4e69a, 0xd568f73f, 0x78b2cf41, 0xd5630a74,
-    0x78b0b79e, 0xd55d1dc3,
-  0x78ae9fb0, 0xd557312d, 0x78ac8778, 0xd55144b0, 0x78aa6ef5, 0xd54b584f,
-    0x78a85628, 0xd5456c07,
-  0x78a63d11, 0xd53f7fda, 0x78a423af, 0xd53993c7, 0x78a20a03, 0xd533a7cf,
-    0x789ff00c, 0xd52dbbf1,
-  0x789dd5cb, 0xd527d02e, 0x789bbb3f, 0xd521e484, 0x7899a06a, 0xd51bf8f6,
-    0x78978549, 0xd5160d82,
-  0x789569df, 0xd5102228, 0x78934e2a, 0xd50a36e9, 0x7891322a, 0xd5044bc4,
-    0x788f15e0, 0xd4fe60ba,
-  0x788cf94c, 0xd4f875ca, 0x788adc6e, 0xd4f28af5, 0x7888bf45, 0xd4eca03a,
-    0x7886a1d1, 0xd4e6b59a,
-  0x78848414, 0xd4e0cb15, 0x7882660c, 0xd4dae0aa, 0x788047ba, 0xd4d4f65a,
-    0x787e291d, 0xd4cf0c24,
-  0x787c0a36, 0xd4c92209, 0x7879eb05, 0xd4c33809, 0x7877cb89, 0xd4bd4e23,
-    0x7875abc3, 0xd4b76458,
-  0x78738bb3, 0xd4b17aa8, 0x78716b59, 0xd4ab9112, 0x786f4ab4, 0xd4a5a798,
-    0x786d29c5, 0xd49fbe37,
-  0x786b088c, 0xd499d4f2, 0x7868e708, 0xd493ebc8, 0x7866c53a, 0xd48e02b8,
-    0x7864a322, 0xd48819c3,
-  0x786280bf, 0xd48230e9, 0x78605e13, 0xd47c4829, 0x785e3b1c, 0xd4765f85,
-    0x785c17db, 0xd47076fb,
-  0x7859f44f, 0xd46a8e8d, 0x7857d079, 0xd464a639, 0x7855ac5a, 0xd45ebe00,
-    0x785387ef, 0xd458d5e2,
-  0x7851633b, 0xd452eddf, 0x784f3e3c, 0xd44d05f6, 0x784d18f4, 0xd4471e29,
-    0x784af361, 0xd4413677,
-  0x7848cd83, 0xd43b4ee0, 0x7846a75c, 0xd4356763, 0x784480ea, 0xd42f8002,
-    0x78425a2f, 0xd42998bc,
-  0x78403329, 0xd423b191, 0x783e0bd9, 0xd41dca81, 0x783be43e, 0xd417e38c,
-    0x7839bc5a, 0xd411fcb2,
-  0x7837942b, 0xd40c15f3, 0x78356bb2, 0xd4062f4f, 0x783342ef, 0xd40048c6,
-    0x783119e2, 0xd3fa6259,
-  0x782ef08b, 0xd3f47c06, 0x782cc6ea, 0xd3ee95cf, 0x782a9cfe, 0xd3e8afb3,
-    0x782872c8, 0xd3e2c9b2,
-  0x78264849, 0xd3dce3cd, 0x78241d7f, 0xd3d6fe03, 0x7821f26b, 0xd3d11853,
-    0x781fc70d, 0xd3cb32c0,
-  0x781d9b65, 0xd3c54d47, 0x781b6f72, 0xd3bf67ea, 0x78194336, 0xd3b982a8,
-    0x781716b0, 0xd3b39d81,
-  0x7814e9df, 0xd3adb876, 0x7812bcc4, 0xd3a7d385, 0x78108f60, 0xd3a1eeb1,
-    0x780e61b1, 0xd39c09f7,
-  0x780c33b8, 0xd396255a, 0x780a0575, 0xd39040d7, 0x7807d6e9, 0xd38a5c70,
-    0x7805a812, 0xd3847824,
-  0x780378f1, 0xd37e93f4, 0x78014986, 0xd378afdf, 0x77ff19d1, 0xd372cbe6,
-    0x77fce9d2, 0xd36ce808,
-  0x77fab989, 0xd3670446, 0x77f888f6, 0xd361209f, 0x77f65819, 0xd35b3d13,
-    0x77f426f2, 0xd35559a4,
-  0x77f1f581, 0xd34f764f, 0x77efc3c5, 0xd3499317, 0x77ed91c0, 0xd343affa,
-    0x77eb5f71, 0xd33dccf8,
-  0x77e92cd9, 0xd337ea12, 0x77e6f9f6, 0xd3320748, 0x77e4c6c9, 0xd32c2499,
-    0x77e29352, 0xd3264206,
-  0x77e05f91, 0xd3205f8f, 0x77de2b86, 0xd31a7d33, 0x77dbf732, 0xd3149af3,
-    0x77d9c293, 0xd30eb8cf,
-  0x77d78daa, 0xd308d6c7, 0x77d55878, 0xd302f4da, 0x77d322fc, 0xd2fd1309,
-    0x77d0ed35, 0xd2f73154,
-  0x77ceb725, 0xd2f14fba, 0x77cc80cb, 0xd2eb6e3c, 0x77ca4a27, 0xd2e58cdb,
-    0x77c81339, 0xd2dfab95,
-  0x77c5dc01, 0xd2d9ca6a, 0x77c3a47f, 0xd2d3e95c, 0x77c16cb4, 0xd2ce0869,
-    0x77bf349f, 0xd2c82793,
-  0x77bcfc3f, 0xd2c246d8, 0x77bac396, 0xd2bc6639, 0x77b88aa3, 0xd2b685b6,
-    0x77b65166, 0xd2b0a54f,
-  0x77b417df, 0xd2aac504, 0x77b1de0f, 0xd2a4e4d5, 0x77afa3f5, 0xd29f04c2,
-    0x77ad6990, 0xd29924cb,
-  0x77ab2ee2, 0xd29344f0, 0x77a8f3ea, 0xd28d6531, 0x77a6b8a9, 0xd287858e,
-    0x77a47d1d, 0xd281a607,
-  0x77a24148, 0xd27bc69c, 0x77a00529, 0xd275e74d, 0x779dc8c0, 0xd270081b,
-    0x779b8c0e, 0xd26a2904,
-  0x77994f11, 0xd2644a0a, 0x779711cb, 0xd25e6b2b, 0x7794d43b, 0xd2588c69,
-    0x77929661, 0xd252adc3,
-  0x7790583e, 0xd24ccf39, 0x778e19d0, 0xd246f0cb, 0x778bdb19, 0xd241127a,
-    0x77899c19, 0xd23b3444,
-  0x77875cce, 0xd235562b, 0x77851d3a, 0xd22f782f, 0x7782dd5c, 0xd2299a4e,
-    0x77809d35, 0xd223bc8a,
-  0x777e5cc3, 0xd21ddee2, 0x777c1c08, 0xd2180156, 0x7779db03, 0xd21223e7,
-    0x777799b5, 0xd20c4694,
-  0x7775581d, 0xd206695d, 0x7773163b, 0xd2008c43, 0x7770d40f, 0xd1faaf45,
-    0x776e919a, 0xd1f4d263,
-  0x776c4edb, 0xd1eef59e, 0x776a0bd3, 0xd1e918f5, 0x7767c880, 0xd1e33c69,
-    0x776584e5, 0xd1dd5ff9,
-  0x776340ff, 0xd1d783a6, 0x7760fcd0, 0xd1d1a76f, 0x775eb857, 0xd1cbcb54,
-    0x775c7395, 0xd1c5ef56,
-  0x775a2e89, 0xd1c01375, 0x7757e933, 0xd1ba37b0, 0x7755a394, 0xd1b45c08,
-    0x77535dab, 0xd1ae807c,
-  0x77511778, 0xd1a8a50d, 0x774ed0fc, 0xd1a2c9ba, 0x774c8a36, 0xd19cee84,
-    0x774a4327, 0xd197136b,
-  0x7747fbce, 0xd191386e, 0x7745b42c, 0xd18b5d8e, 0x77436c40, 0xd18582ca,
-    0x7741240a, 0xd17fa823,
-  0x773edb8b, 0xd179cd99, 0x773c92c2, 0xd173f32c, 0x773a49b0, 0xd16e18db,
-    0x77380054, 0xd1683ea7,
-  0x7735b6af, 0xd1626490, 0x77336cc0, 0xd15c8a95, 0x77312287, 0xd156b0b7,
-    0x772ed805, 0xd150d6f6,
-  0x772c8d3a, 0xd14afd52, 0x772a4225, 0xd14523cb, 0x7727f6c6, 0xd13f4a60,
-    0x7725ab1f, 0xd1397113,
-  0x77235f2d, 0xd13397e2, 0x772112f2, 0xd12dbece, 0x771ec66e, 0xd127e5d7,
-    0x771c79a0, 0xd1220cfc,
-  0x771a2c88, 0xd11c343f, 0x7717df27, 0xd1165b9f, 0x7715917d, 0xd110831b,
-    0x77134389, 0xd10aaab5,
-  0x7710f54c, 0xd104d26b, 0x770ea6c5, 0xd0fefa3f, 0x770c57f5, 0xd0f9222f,
-    0x770a08dc, 0xd0f34a3d,
-  0x7707b979, 0xd0ed7267, 0x770569cc, 0xd0e79aaf, 0x770319d6, 0xd0e1c313,
-    0x7700c997, 0xd0dbeb95,
-  0x76fe790e, 0xd0d61434, 0x76fc283c, 0xd0d03cf0, 0x76f9d721, 0xd0ca65c9,
-    0x76f785bc, 0xd0c48ebf,
-  0x76f5340e, 0xd0beb7d2, 0x76f2e216, 0xd0b8e102, 0x76f08fd5, 0xd0b30a50,
-    0x76ee3d4b, 0xd0ad33ba,
-  0x76ebea77, 0xd0a75d42, 0x76e9975a, 0xd0a186e7, 0x76e743f4, 0xd09bb0aa,
-    0x76e4f044, 0xd095da89,
-  0x76e29c4b, 0xd0900486, 0x76e04808, 0xd08a2ea0, 0x76ddf37c, 0xd08458d7,
-    0x76db9ea7, 0xd07e832c,
-  0x76d94989, 0xd078ad9e, 0x76d6f421, 0xd072d82d, 0x76d49e70, 0xd06d02da,
-    0x76d24876, 0xd0672da3,
-  0x76cff232, 0xd061588b, 0x76cd9ba5, 0xd05b838f, 0x76cb44cf, 0xd055aeb1,
-    0x76c8edb0, 0xd04fd9f1,
-  0x76c69647, 0xd04a054e, 0x76c43e95, 0xd04430c8, 0x76c1e699, 0xd03e5c60,
-    0x76bf8e55, 0xd0388815,
-  0x76bd35c7, 0xd032b3e7, 0x76badcf0, 0xd02cdfd8, 0x76b883d0, 0xd0270be5,
-    0x76b62a66, 0xd0213810,
-  0x76b3d0b4, 0xd01b6459, 0x76b176b8, 0xd01590bf, 0x76af1c72, 0xd00fbd43,
-    0x76acc1e4, 0xd009e9e4,
-  0x76aa670d, 0xd00416a3, 0x76a80bec, 0xcffe4380, 0x76a5b082, 0xcff8707a,
-    0x76a354cf, 0xcff29d92,
-  0x76a0f8d2, 0xcfeccac7, 0x769e9c8d, 0xcfe6f81a, 0x769c3ffe, 0xcfe1258b,
-    0x7699e326, 0xcfdb531a,
-  0x76978605, 0xcfd580c6, 0x7695289b, 0xcfcfae8f, 0x7692cae8, 0xcfc9dc77,
-    0x76906ceb, 0xcfc40a7c,
-  0x768e0ea6, 0xcfbe389f, 0x768bb017, 0xcfb866e0, 0x7689513f, 0xcfb2953f,
-    0x7686f21e, 0xcfacc3bb,
-  0x768492b4, 0xcfa6f255, 0x76823301, 0xcfa1210d, 0x767fd304, 0xcf9b4fe3,
-    0x767d72bf, 0xcf957ed7,
-  0x767b1231, 0xcf8fade9, 0x7678b159, 0xcf89dd18, 0x76765038, 0xcf840c65,
-    0x7673eecf, 0xcf7e3bd1,
-  0x76718d1c, 0xcf786b5a, 0x766f2b20, 0xcf729b01, 0x766cc8db, 0xcf6ccac6,
-    0x766a664d, 0xcf66faa9,
-  0x76680376, 0xcf612aaa, 0x7665a056, 0xcf5b5ac9, 0x76633ced, 0xcf558b06,
-    0x7660d93b, 0xcf4fbb61,
-  0x765e7540, 0xcf49ebda, 0x765c10fc, 0xcf441c71, 0x7659ac6f, 0xcf3e4d26,
-    0x76574798, 0xcf387dfa,
-  0x7654e279, 0xcf32aeeb, 0x76527d11, 0xcf2cdffa, 0x76501760, 0xcf271128,
-    0x764db166, 0xcf214274,
-  0x764b4b23, 0xcf1b73de, 0x7648e497, 0xcf15a566, 0x76467dc2, 0xcf0fd70c,
-    0x764416a4, 0xcf0a08d0,
-  0x7641af3d, 0xcf043ab3, 0x763f478d, 0xcefe6cb3, 0x763cdf94, 0xcef89ed2,
-    0x763a7752, 0xcef2d110,
-  0x76380ec8, 0xceed036b, 0x7635a5f4, 0xcee735e5, 0x76333cd8, 0xcee1687d,
-    0x7630d372, 0xcedb9b33,
-  0x762e69c4, 0xced5ce08, 0x762bffcd, 0xced000fb, 0x7629958c, 0xceca340c,
-    0x76272b03, 0xcec4673c,
-  0x7624c031, 0xcebe9a8a, 0x76225517, 0xceb8cdf7, 0x761fe9b3, 0xceb30181,
-    0x761d7e06, 0xcead352b,
-  0x761b1211, 0xcea768f2, 0x7618a5d3, 0xcea19cd8, 0x7616394c, 0xce9bd0dd,
-    0x7613cc7c, 0xce960500,
-  0x76115f63, 0xce903942, 0x760ef201, 0xce8a6da2, 0x760c8457, 0xce84a220,
-    0x760a1664, 0xce7ed6bd,
-  0x7607a828, 0xce790b79, 0x760539a3, 0xce734053, 0x7602cad5, 0xce6d754c,
-    0x76005bbf, 0xce67aa63,
-  0x75fdec60, 0xce61df99, 0x75fb7cb8, 0xce5c14ed, 0x75f90cc7, 0xce564a60,
-    0x75f69c8d, 0xce507ff2,
-  0x75f42c0b, 0xce4ab5a2, 0x75f1bb40, 0xce44eb71, 0x75ef4a2c, 0xce3f215f,
-    0x75ecd8cf, 0xce39576c,
-  0x75ea672a, 0xce338d97, 0x75e7f53c, 0xce2dc3e1, 0x75e58305, 0xce27fa49,
-    0x75e31086, 0xce2230d0,
-  0x75e09dbd, 0xce1c6777, 0x75de2aac, 0xce169e3b, 0x75dbb753, 0xce10d51f,
-    0x75d943b0, 0xce0b0c21,
-  0x75d6cfc5, 0xce054343, 0x75d45b92, 0xcdff7a83, 0x75d1e715, 0xcdf9b1e2,
-    0x75cf7250, 0xcdf3e95f,
-  0x75ccfd42, 0xcdee20fc, 0x75ca87ec, 0xcde858b8, 0x75c8124d, 0xcde29092,
-    0x75c59c65, 0xcddcc88b,
-  0x75c32634, 0xcdd700a4, 0x75c0afbb, 0xcdd138db, 0x75be38fa, 0xcdcb7131,
-    0x75bbc1ef, 0xcdc5a9a6,
-  0x75b94a9c, 0xcdbfe23a, 0x75b6d301, 0xcdba1aee, 0x75b45b1d, 0xcdb453c0,
-    0x75b1e2f0, 0xcdae8cb1,
-  0x75af6a7b, 0xcda8c5c1, 0x75acf1bd, 0xcda2fef0, 0x75aa78b6, 0xcd9d383f,
-    0x75a7ff67, 0xcd9771ac,
-  0x75a585cf, 0xcd91ab39, 0x75a30bef, 0xcd8be4e4, 0x75a091c6, 0xcd861eaf,
-    0x759e1755, 0xcd805899,
-  0x759b9c9b, 0xcd7a92a2, 0x75992198, 0xcd74ccca, 0x7596a64d, 0xcd6f0711,
-    0x75942ab9, 0xcd694178,
-  0x7591aedd, 0xcd637bfe, 0x758f32b9, 0xcd5db6a3, 0x758cb64c, 0xcd57f167,
-    0x758a3996, 0xcd522c4a,
-  0x7587bc98, 0xcd4c674d, 0x75853f51, 0xcd46a26f, 0x7582c1c2, 0xcd40ddb0,
-    0x758043ea, 0xcd3b1911,
-  0x757dc5ca, 0xcd355491, 0x757b4762, 0xcd2f9030, 0x7578c8b0, 0xcd29cbee,
-    0x757649b7, 0xcd2407cc,
-  0x7573ca75, 0xcd1e43ca, 0x75714aea, 0xcd187fe6, 0x756ecb18, 0xcd12bc22,
-    0x756c4afc, 0xcd0cf87e,
-  0x7569ca99, 0xcd0734f9, 0x756749ec, 0xcd017193, 0x7564c8f8, 0xccfbae4d,
-    0x756247bb, 0xccf5eb26,
-  0x755fc635, 0xccf0281f, 0x755d4467, 0xccea6538, 0x755ac251, 0xcce4a26f,
-    0x75583ff3, 0xccdedfc7,
-  0x7555bd4c, 0xccd91d3d, 0x75533a5c, 0xccd35ad4, 0x7550b725, 0xcccd988a,
-    0x754e33a4, 0xccc7d65f,
-  0x754bafdc, 0xccc21455, 0x75492bcb, 0xccbc5269, 0x7546a772, 0xccb6909e,
-    0x754422d0, 0xccb0cef2,
-  0x75419de7, 0xccab0d65, 0x753f18b4, 0xcca54bf9, 0x753c933a, 0xcc9f8aac,
-    0x753a0d77, 0xcc99c97e,
-  0x7537876c, 0xcc940871, 0x75350118, 0xcc8e4783, 0x75327a7d, 0xcc8886b5,
-    0x752ff399, 0xcc82c607,
-  0x752d6c6c, 0xcc7d0578, 0x752ae4f8, 0xcc774509, 0x75285d3b, 0xcc7184ba,
-    0x7525d536, 0xcc6bc48b,
-  0x75234ce8, 0xcc66047b, 0x7520c453, 0xcc60448c, 0x751e3b75, 0xcc5a84bc,
-    0x751bb24f, 0xcc54c50c,
-  0x751928e0, 0xcc4f057c, 0x75169f2a, 0xcc49460c, 0x7514152b, 0xcc4386bc,
-    0x75118ae4, 0xcc3dc78b,
-  0x750f0054, 0xcc38087b, 0x750c757d, 0xcc32498a, 0x7509ea5d, 0xcc2c8aba,
-    0x75075ef5, 0xcc26cc09,
-  0x7504d345, 0xcc210d79, 0x7502474d, 0xcc1b4f08, 0x74ffbb0d, 0xcc1590b8,
-    0x74fd2e84, 0xcc0fd287,
-  0x74faa1b3, 0xcc0a1477, 0x74f8149a, 0xcc045686, 0x74f58739, 0xcbfe98b6,
-    0x74f2f990, 0xcbf8db05,
-  0x74f06b9e, 0xcbf31d75, 0x74eddd65, 0xcbed6005, 0x74eb4ee3, 0xcbe7a2b5,
-    0x74e8c01a, 0xcbe1e585,
-  0x74e63108, 0xcbdc2876, 0x74e3a1ae, 0xcbd66b86, 0x74e1120c, 0xcbd0aeb7,
-    0x74de8221, 0xcbcaf208,
-  0x74dbf1ef, 0xcbc53579, 0x74d96175, 0xcbbf790a, 0x74d6d0b2, 0xcbb9bcbb,
-    0x74d43fa8, 0xcbb4008d,
-  0x74d1ae55, 0xcbae447f, 0x74cf1cbb, 0xcba88891, 0x74cc8ad8, 0xcba2ccc4,
-    0x74c9f8ad, 0xcb9d1117,
-  0x74c7663a, 0xcb97558a, 0x74c4d380, 0xcb919a1d, 0x74c2407d, 0xcb8bded1,
-    0x74bfad32, 0xcb8623a5,
-  0x74bd199f, 0xcb80689a, 0x74ba85c4, 0xcb7aadaf, 0x74b7f1a1, 0xcb74f2e4,
-    0x74b55d36, 0xcb6f383a,
-  0x74b2c884, 0xcb697db0, 0x74b03389, 0xcb63c347, 0x74ad9e46, 0xcb5e08fe,
-    0x74ab08bb, 0xcb584ed6,
-  0x74a872e8, 0xcb5294ce, 0x74a5dccd, 0xcb4cdae6, 0x74a3466b, 0xcb47211f,
-    0x74a0afc0, 0xcb416779,
-  0x749e18cd, 0xcb3badf3, 0x749b8193, 0xcb35f48d, 0x7498ea11, 0xcb303b49,
-    0x74965246, 0xcb2a8224,
-  0x7493ba34, 0xcb24c921, 0x749121da, 0xcb1f103e, 0x748e8938, 0xcb19577b,
-    0x748bf04d, 0xcb139ed9,
-  0x7489571c, 0xcb0de658, 0x7486bda2, 0xcb082df8, 0x748423e0, 0xcb0275b8,
-    0x748189d7, 0xcafcbd99,
-  0x747eef85, 0xcaf7059a, 0x747c54ec, 0xcaf14dbd, 0x7479ba0b, 0xcaeb9600,
-    0x74771ee2, 0xcae5de64,
-  0x74748371, 0xcae026e8, 0x7471e7b8, 0xcada6f8d, 0x746f4bb8, 0xcad4b853,
-    0x746caf70, 0xcacf013a,
-  0x746a12df, 0xcac94a42, 0x74677608, 0xcac3936b, 0x7464d8e8, 0xcabddcb4,
-    0x74623b80, 0xcab8261e,
-  0x745f9dd1, 0xcab26fa9, 0x745cffda, 0xcaacb955, 0x745a619b, 0xcaa70322,
-    0x7457c314, 0xcaa14d10,
-  0x74552446, 0xca9b971e, 0x74528530, 0xca95e14e, 0x744fe5d2, 0xca902b9f,
-    0x744d462c, 0xca8a7610,
-  0x744aa63f, 0xca84c0a3, 0x7448060a, 0xca7f0b56, 0x7445658d, 0xca79562b,
-    0x7442c4c8, 0xca73a120,
-  0x744023bc, 0xca6dec37, 0x743d8268, 0xca68376e, 0x743ae0cc, 0xca6282c7,
-    0x74383ee9, 0xca5cce40,
-  0x74359cbd, 0xca5719db, 0x7432fa4b, 0xca516597, 0x74305790, 0xca4bb174,
-    0x742db48e, 0xca45fd72,
-  0x742b1144, 0xca404992, 0x74286db3, 0xca3a95d2, 0x7425c9da, 0xca34e234,
-    0x742325b9, 0xca2f2eb6,
-  0x74208150, 0xca297b5a, 0x741ddca0, 0xca23c820, 0x741b37a9, 0xca1e1506,
-    0x74189269, 0xca18620e,
-  0x7415ece2, 0xca12af37, 0x74134714, 0xca0cfc81, 0x7410a0fe, 0xca0749ec,
-    0x740dfaa0, 0xca019779,
-  0x740b53fb, 0xc9fbe527, 0x7408ad0e, 0xc9f632f6, 0x740605d9, 0xc9f080e7,
-    0x74035e5d, 0xc9eacef9,
-  0x7400b69a, 0xc9e51d2d, 0x73fe0e8f, 0xc9df6b81, 0x73fb663c, 0xc9d9b9f7,
-    0x73f8bda2, 0xc9d4088f,
-  0x73f614c0, 0xc9ce5748, 0x73f36b97, 0xc9c8a622, 0x73f0c226, 0xc9c2f51e,
-    0x73ee186e, 0xc9bd443c,
-  0x73eb6e6e, 0xc9b7937a, 0x73e8c426, 0xc9b1e2db, 0x73e61997, 0xc9ac325d,
-    0x73e36ec1, 0xc9a68200,
-  0x73e0c3a3, 0xc9a0d1c5, 0x73de183e, 0xc99b21ab, 0x73db6c91, 0xc99571b3,
-    0x73d8c09d, 0xc98fc1dc,
-  0x73d61461, 0xc98a1227, 0x73d367de, 0xc9846294, 0x73d0bb13, 0xc97eb322,
-    0x73ce0e01, 0xc97903d2,
-  0x73cb60a8, 0xc97354a4, 0x73c8b307, 0xc96da597, 0x73c6051f, 0xc967f6ac,
-    0x73c356ef, 0xc96247e2,
-  0x73c0a878, 0xc95c993a, 0x73bdf9b9, 0xc956eab4, 0x73bb4ab3, 0xc9513c50,
-    0x73b89b66, 0xc94b8e0d,
-  0x73b5ebd1, 0xc945dfec, 0x73b33bf5, 0xc94031ed, 0x73b08bd1, 0xc93a8410,
-    0x73addb67, 0xc934d654,
-  0x73ab2ab4, 0xc92f28ba, 0x73a879bb, 0xc9297b42, 0x73a5c87a, 0xc923cdec,
-    0x73a316f2, 0xc91e20b8,
-  0x73a06522, 0xc91873a5, 0x739db30b, 0xc912c6b5, 0x739b00ad, 0xc90d19e6,
-    0x73984e07, 0xc9076d39,
-  0x73959b1b, 0xc901c0ae, 0x7392e7e6, 0xc8fc1445, 0x7390346b, 0xc8f667fe,
-    0x738d80a8, 0xc8f0bbd9,
-  0x738acc9e, 0xc8eb0fd6, 0x7388184d, 0xc8e563f5, 0x738563b5, 0xc8dfb836,
-    0x7382aed5, 0xc8da0c99,
-  0x737ff9ae, 0xc8d4611d, 0x737d4440, 0xc8ceb5c4, 0x737a8e8a, 0xc8c90a8d,
-    0x7377d88d, 0xc8c35f78,
-  0x73752249, 0xc8bdb485, 0x73726bbe, 0xc8b809b4, 0x736fb4ec, 0xc8b25f06,
-    0x736cfdd2, 0xc8acb479,
-  0x736a4671, 0xc8a70a0e, 0x73678ec9, 0xc8a15fc6, 0x7364d6da, 0xc89bb5a0,
-    0x73621ea4, 0xc8960b9c,
-  0x735f6626, 0xc89061ba, 0x735cad61, 0xc88ab7fa, 0x7359f456, 0xc8850e5d,
-    0x73573b03, 0xc87f64e2,
-  0x73548168, 0xc879bb89, 0x7351c787, 0xc8741252, 0x734f0d5f, 0xc86e693d,
-    0x734c52ef, 0xc868c04b,
-  0x73499838, 0xc863177b, 0x7346dd3a, 0xc85d6ece, 0x734421f6, 0xc857c642,
-    0x7341666a, 0xc8521dd9,
-  0x733eaa96, 0xc84c7593, 0x733bee7c, 0xc846cd6e, 0x7339321b, 0xc841256d,
-    0x73367572, 0xc83b7d8d,
-  0x7333b883, 0xc835d5d0, 0x7330fb4d, 0xc8302e35, 0x732e3dcf, 0xc82a86bd,
-    0x732b800a, 0xc824df67,
-  0x7328c1ff, 0xc81f3834, 0x732603ac, 0xc8199123, 0x73234512, 0xc813ea35,
-    0x73208632, 0xc80e4369,
-  0x731dc70a, 0xc8089cbf, 0x731b079b, 0xc802f638, 0x731847e5, 0xc7fd4fd4,
-    0x731587e8, 0xc7f7a992,
-  0x7312c7a5, 0xc7f20373, 0x7310071a, 0xc7ec5d76, 0x730d4648, 0xc7e6b79c,
-    0x730a8530, 0xc7e111e5,
-  0x7307c3d0, 0xc7db6c50, 0x73050229, 0xc7d5c6de, 0x7302403c, 0xc7d0218e,
-    0x72ff7e07, 0xc7ca7c61,
-  0x72fcbb8c, 0xc7c4d757, 0x72f9f8c9, 0xc7bf3270, 0x72f735c0, 0xc7b98dab,
-    0x72f47270, 0xc7b3e909,
-  0x72f1aed9, 0xc7ae4489, 0x72eeeafb, 0xc7a8a02c, 0x72ec26d6, 0xc7a2fbf3,
-    0x72e9626a, 0xc79d57db,
-  0x72e69db7, 0xc797b3e7, 0x72e3d8be, 0xc7921015, 0x72e1137d, 0xc78c6c67,
-    0x72de4df6, 0xc786c8db,
-  0x72db8828, 0xc7812572, 0x72d8c213, 0xc77b822b, 0x72d5fbb7, 0xc775df08,
-    0x72d33514, 0xc7703c08,
-  0x72d06e2b, 0xc76a992a, 0x72cda6fb, 0xc764f66f, 0x72cadf83, 0xc75f53d7,
-    0x72c817c6, 0xc759b163,
-  0x72c54fc1, 0xc7540f11, 0x72c28775, 0xc74e6ce2, 0x72bfbee3, 0xc748cad6,
-    0x72bcf60a, 0xc74328ed,
-  0x72ba2cea, 0xc73d8727, 0x72b76383, 0xc737e584, 0x72b499d6, 0xc7324404,
-    0x72b1cfe1, 0xc72ca2a7,
-  0x72af05a7, 0xc727016d, 0x72ac3b25, 0xc7216056, 0x72a9705c, 0xc71bbf62,
-    0x72a6a54d, 0xc7161e92,
-  0x72a3d9f7, 0xc7107de4, 0x72a10e5b, 0xc70add5a, 0x729e4277, 0xc7053cf2,
-    0x729b764d, 0xc6ff9cae,
-  0x7298a9dd, 0xc6f9fc8d, 0x7295dd25, 0xc6f45c8f, 0x72931027, 0xc6eebcb5,
-    0x729042e3, 0xc6e91cfd,
-  0x728d7557, 0xc6e37d69, 0x728aa785, 0xc6ddddf8, 0x7287d96c, 0xc6d83eab,
-    0x72850b0d, 0xc6d29f80,
-  0x72823c67, 0xc6cd0079, 0x727f6d7a, 0xc6c76195, 0x727c9e47, 0xc6c1c2d4,
-    0x7279cecd, 0xc6bc2437,
-  0x7276ff0d, 0xc6b685bd, 0x72742f05, 0xc6b0e767, 0x72715eb8, 0xc6ab4933,
-    0x726e8e23, 0xc6a5ab23,
-  0x726bbd48, 0xc6a00d37, 0x7268ec27, 0xc69a6f6e, 0x72661abf, 0xc694d1c8,
-    0x72634910, 0xc68f3446,
-  0x7260771b, 0xc68996e7, 0x725da4df, 0xc683f9ab, 0x725ad25d, 0xc67e5c93,
-    0x7257ff94, 0xc678bf9f,
-  0x72552c85, 0xc67322ce, 0x7252592f, 0xc66d8620, 0x724f8593, 0xc667e996,
-    0x724cb1b0, 0xc6624d30,
-  0x7249dd86, 0xc65cb0ed, 0x72470916, 0xc65714cd, 0x72443460, 0xc65178d1,
-    0x72415f63, 0xc64bdcf9,
-  0x723e8a20, 0xc6464144, 0x723bb496, 0xc640a5b3, 0x7238dec5, 0xc63b0a46,
-    0x723608af, 0xc6356efc,
-  0x72333251, 0xc62fd3d6, 0x72305bae, 0xc62a38d4, 0x722d84c4, 0xc6249df5,
-    0x722aad93, 0xc61f033a,
-  0x7227d61c, 0xc61968a2, 0x7224fe5f, 0xc613ce2f, 0x7222265b, 0xc60e33df,
-    0x721f4e11, 0xc60899b2,
-  0x721c7580, 0xc602ffaa, 0x72199ca9, 0xc5fd65c5, 0x7216c38c, 0xc5f7cc04,
-    0x7213ea28, 0xc5f23267,
-  0x7211107e, 0xc5ec98ee, 0x720e368d, 0xc5e6ff98, 0x720b5c57, 0xc5e16667,
-    0x720881d9, 0xc5dbcd59,
-  0x7205a716, 0xc5d6346f, 0x7202cc0c, 0xc5d09ba9, 0x71fff0bc, 0xc5cb0307,
-    0x71fd1525, 0xc5c56a89,
-  0x71fa3949, 0xc5bfd22e, 0x71f75d25, 0xc5ba39f8, 0x71f480bc, 0xc5b4a1e5,
-    0x71f1a40c, 0xc5af09f7,
-  0x71eec716, 0xc5a9722c, 0x71ebe9da, 0xc5a3da86, 0x71e90c57, 0xc59e4303,
-    0x71e62e8f, 0xc598aba5,
-  0x71e35080, 0xc593146a, 0x71e0722a, 0xc58d7d54, 0x71dd938f, 0xc587e661,
-    0x71dab4ad, 0xc5824f93,
-  0x71d7d585, 0xc57cb8e9, 0x71d4f617, 0xc5772263, 0x71d21662, 0xc5718c00,
-    0x71cf3667, 0xc56bf5c2,
-  0x71cc5626, 0xc5665fa9, 0x71c9759f, 0xc560c9b3, 0x71c694d2, 0xc55b33e2,
-    0x71c3b3bf, 0xc5559e34,
-  0x71c0d265, 0xc55008ab, 0x71bdf0c5, 0xc54a7346, 0x71bb0edf, 0xc544de05,
-    0x71b82cb3, 0xc53f48e9,
-  0x71b54a41, 0xc539b3f1, 0x71b26788, 0xc5341f1d, 0x71af848a, 0xc52e8a6d,
-    0x71aca145, 0xc528f5e1,
-  0x71a9bdba, 0xc523617a, 0x71a6d9e9, 0xc51dcd37, 0x71a3f5d2, 0xc5183919,
-    0x71a11175, 0xc512a51f,
-  0x719e2cd2, 0xc50d1149, 0x719b47e9, 0xc5077d97, 0x719862b9, 0xc501ea0a,
-    0x71957d44, 0xc4fc56a2,
-  0x71929789, 0xc4f6c35d, 0x718fb187, 0xc4f1303d, 0x718ccb3f, 0xc4eb9d42,
-    0x7189e4b2, 0xc4e60a6b,
-  0x7186fdde, 0xc4e077b8, 0x718416c4, 0xc4dae52a, 0x71812f65, 0xc4d552c1,
-    0x717e47bf, 0xc4cfc07c,
-  0x717b5fd3, 0xc4ca2e5b, 0x717877a1, 0xc4c49c5f, 0x71758f29, 0xc4bf0a87,
-    0x7172a66c, 0xc4b978d4,
-  0x716fbd68, 0xc4b3e746, 0x716cd41e, 0xc4ae55dc, 0x7169ea8f, 0xc4a8c497,
-    0x716700b9, 0xc4a33376,
-  0x7164169d, 0xc49da27a, 0x71612c3c, 0xc49811a3, 0x715e4194, 0xc49280f0,
-    0x715b56a7, 0xc48cf062,
-  0x71586b74, 0xc4875ff9, 0x71557ffa, 0xc481cfb4, 0x7152943b, 0xc47c3f94,
-    0x714fa836, 0xc476af98,
-  0x714cbbeb, 0xc4711fc2, 0x7149cf5a, 0xc46b9010, 0x7146e284, 0xc4660083,
-    0x7143f567, 0xc460711b,
-  0x71410805, 0xc45ae1d7, 0x713e1a5c, 0xc45552b8, 0x713b2c6e, 0xc44fc3be,
-    0x71383e3a, 0xc44a34e9,
-  0x71354fc0, 0xc444a639, 0x71326101, 0xc43f17ad, 0x712f71fb, 0xc4398947,
-    0x712c82b0, 0xc433fb05,
-  0x7129931f, 0xc42e6ce8, 0x7126a348, 0xc428def0, 0x7123b32b, 0xc423511d,
-    0x7120c2c8, 0xc41dc36f,
-  0x711dd220, 0xc41835e6, 0x711ae132, 0xc412a882, 0x7117effe, 0xc40d1b42,
-    0x7114fe84, 0xc4078e28,
-  0x71120cc5, 0xc4020133, 0x710f1ac0, 0xc3fc7462, 0x710c2875, 0xc3f6e7b7,
-    0x710935e4, 0xc3f15b31,
-  0x7106430e, 0xc3ebced0, 0x71034ff2, 0xc3e64294, 0x71005c90, 0xc3e0b67d,
-    0x70fd68e9, 0xc3db2a8b,
-  0x70fa74fc, 0xc3d59ebe, 0x70f780c9, 0xc3d01316, 0x70f48c50, 0xc3ca8793,
-    0x70f19792, 0xc3c4fc36,
-  0x70eea28e, 0xc3bf70fd, 0x70ebad45, 0xc3b9e5ea, 0x70e8b7b5, 0xc3b45afc,
-    0x70e5c1e1, 0xc3aed034,
-  0x70e2cbc6, 0xc3a94590, 0x70dfd566, 0xc3a3bb12, 0x70dcdec0, 0xc39e30b8,
-    0x70d9e7d5, 0xc398a685,
-  0x70d6f0a4, 0xc3931c76, 0x70d3f92d, 0xc38d928d, 0x70d10171, 0xc38808c9,
-    0x70ce096f, 0xc3827f2a,
-  0x70cb1128, 0xc37cf5b0, 0x70c8189b, 0xc3776c5c, 0x70c51fc8, 0xc371e32d,
-    0x70c226b0, 0xc36c5a24,
-  0x70bf2d53, 0xc366d140, 0x70bc33b0, 0xc3614881, 0x70b939c7, 0xc35bbfe8,
-    0x70b63f99, 0xc3563774,
-  0x70b34525, 0xc350af26, 0x70b04a6b, 0xc34b26fc, 0x70ad4f6d, 0xc3459ef9,
-    0x70aa5428, 0xc340171b,
-  0x70a7589f, 0xc33a8f62, 0x70a45ccf, 0xc33507cf, 0x70a160ba, 0xc32f8061,
-    0x709e6460, 0xc329f919,
-  0x709b67c0, 0xc32471f7, 0x70986adb, 0xc31eeaf9, 0x70956db1, 0xc3196422,
-    0x70927041, 0xc313dd70,
-  0x708f728b, 0xc30e56e4, 0x708c7490, 0xc308d07d, 0x70897650, 0xc3034a3c,
-    0x708677ca, 0xc2fdc420,
-  0x708378ff, 0xc2f83e2a, 0x708079ee, 0xc2f2b85a, 0x707d7a98, 0xc2ed32af,
-    0x707a7afd, 0xc2e7ad2a,
-  0x70777b1c, 0xc2e227cb, 0x70747af6, 0xc2dca291, 0x70717a8a, 0xc2d71d7e,
-    0x706e79d9, 0xc2d1988f,
-  0x706b78e3, 0xc2cc13c7, 0x706877a7, 0xc2c68f24, 0x70657626, 0xc2c10aa7,
-    0x70627460, 0xc2bb8650,
-  0x705f7255, 0xc2b6021f, 0x705c7004, 0xc2b07e14, 0x70596d6d, 0xc2aafa2e,
-    0x70566a92, 0xc2a5766e,
-  0x70536771, 0xc29ff2d4, 0x7050640b, 0xc29a6f60, 0x704d6060, 0xc294ec12,
-    0x704a5c6f, 0xc28f68e9,
-  0x70475839, 0xc289e5e7, 0x704453be, 0xc284630a, 0x70414efd, 0xc27ee054,
-    0x703e49f8, 0xc2795dc3,
-  0x703b44ad, 0xc273db58, 0x70383f1d, 0xc26e5913, 0x70353947, 0xc268d6f5,
-    0x7032332d, 0xc26354fc,
-  0x702f2ccd, 0xc25dd329, 0x702c2628, 0xc258517c, 0x70291f3e, 0xc252cff5,
-    0x7026180e, 0xc24d4e95,
-  0x7023109a, 0xc247cd5a, 0x702008e0, 0xc2424c46, 0x701d00e1, 0xc23ccb57,
-    0x7019f89d, 0xc2374a8f,
-  0x7016f014, 0xc231c9ec, 0x7013e746, 0xc22c4970, 0x7010de32, 0xc226c91a,
-    0x700dd4da, 0xc22148ea,
-  0x700acb3c, 0xc21bc8e1, 0x7007c159, 0xc21648fd, 0x7004b731, 0xc210c940,
-    0x7001acc4, 0xc20b49a9,
-  0x6ffea212, 0xc205ca38, 0x6ffb971b, 0xc2004aed, 0x6ff88bde, 0xc1facbc9,
-    0x6ff5805d, 0xc1f54cca,
-  0x6ff27497, 0xc1efcdf3, 0x6fef688b, 0xc1ea4f41, 0x6fec5c3b, 0xc1e4d0b6,
-    0x6fe94fa5, 0xc1df5251,
-  0x6fe642ca, 0xc1d9d412, 0x6fe335ab, 0xc1d455f9, 0x6fe02846, 0xc1ced807,
-    0x6fdd1a9c, 0xc1c95a3c,
-  0x6fda0cae, 0xc1c3dc97, 0x6fd6fe7a, 0xc1be5f18, 0x6fd3f001, 0xc1b8e1bf,
-    0x6fd0e144, 0xc1b3648d,
-  0x6fcdd241, 0xc1ade781, 0x6fcac2fa, 0xc1a86a9c, 0x6fc7b36d, 0xc1a2edde,
-    0x6fc4a39c, 0xc19d7145,
-  0x6fc19385, 0xc197f4d4, 0x6fbe832a, 0xc1927888, 0x6fbb728a, 0xc18cfc63,
-    0x6fb861a4, 0xc1878065,
-  0x6fb5507a, 0xc182048d, 0x6fb23f0b, 0xc17c88dc, 0x6faf2d57, 0xc1770d52,
-    0x6fac1b5f, 0xc17191ee,
-  0x6fa90921, 0xc16c16b0, 0x6fa5f69e, 0xc1669b99, 0x6fa2e3d7, 0xc16120a9,
-    0x6f9fd0cb, 0xc15ba5df,
-  0x6f9cbd79, 0xc1562b3d, 0x6f99a9e3, 0xc150b0c0, 0x6f969608, 0xc14b366b,
-    0x6f9381e9, 0xc145bc3c,
-  0x6f906d84, 0xc1404233, 0x6f8d58db, 0xc13ac852, 0x6f8a43ed, 0xc1354e97,
-    0x6f872eba, 0xc12fd503,
-  0x6f841942, 0xc12a5b95, 0x6f810386, 0xc124e24f, 0x6f7ded84, 0xc11f692f,
-    0x6f7ad73e, 0xc119f036,
-  0x6f77c0b3, 0xc1147764, 0x6f74a9e4, 0xc10efeb8, 0x6f7192cf, 0xc1098634,
-    0x6f6e7b76, 0xc1040dd6,
-  0x6f6b63d8, 0xc0fe959f, 0x6f684bf6, 0xc0f91d8f, 0x6f6533ce, 0xc0f3a5a6,
-    0x6f621b62, 0xc0ee2de3,
-  0x6f5f02b2, 0xc0e8b648, 0x6f5be9bc, 0xc0e33ed4, 0x6f58d082, 0xc0ddc786,
-    0x6f55b703, 0xc0d8505f,
-  0x6f529d40, 0xc0d2d960, 0x6f4f8338, 0xc0cd6287, 0x6f4c68eb, 0xc0c7ebd6,
-    0x6f494e5a, 0xc0c2754b,
-  0x6f463383, 0xc0bcfee7, 0x6f431869, 0xc0b788ab, 0x6f3ffd09, 0xc0b21295,
-    0x6f3ce165, 0xc0ac9ca6,
-  0x6f39c57d, 0xc0a726df, 0x6f36a94f, 0xc0a1b13e, 0x6f338cde, 0xc09c3bc5,
-    0x6f307027, 0xc096c673,
-  0x6f2d532c, 0xc0915148, 0x6f2a35ed, 0xc08bdc44, 0x6f271868, 0xc0866767,
-    0x6f23faa0, 0xc080f2b1,
-  0x6f20dc92, 0xc07b7e23, 0x6f1dbe41, 0xc07609bb, 0x6f1a9faa, 0xc070957b,
-    0x6f1780cf, 0xc06b2162,
-  0x6f1461b0, 0xc065ad70, 0x6f11424c, 0xc06039a6, 0x6f0e22a3, 0xc05ac603,
-    0x6f0b02b6, 0xc0555287,
-  0x6f07e285, 0xc04fdf32, 0x6f04c20f, 0xc04a6c05, 0x6f01a155, 0xc044f8fe,
-    0x6efe8056, 0xc03f8620,
-  0x6efb5f12, 0xc03a1368, 0x6ef83d8a, 0xc034a0d8, 0x6ef51bbe, 0xc02f2e6f,
-    0x6ef1f9ad, 0xc029bc2e,
-  0x6eeed758, 0xc0244a14, 0x6eebb4bf, 0xc01ed821, 0x6ee891e1, 0xc0196656,
-    0x6ee56ebe, 0xc013f4b2,
-  0x6ee24b57, 0xc00e8336, 0x6edf27ac, 0xc00911e1, 0x6edc03bc, 0xc003a0b3,
-    0x6ed8df88, 0xbffe2fad,
-  0x6ed5bb10, 0xbff8bece, 0x6ed29653, 0xbff34e17, 0x6ecf7152, 0xbfeddd88,
-    0x6ecc4c0d, 0xbfe86d20,
-  0x6ec92683, 0xbfe2fcdf, 0x6ec600b5, 0xbfdd8cc6, 0x6ec2daa2, 0xbfd81cd5,
-    0x6ebfb44b, 0xbfd2ad0b,
-  0x6ebc8db0, 0xbfcd3d69, 0x6eb966d1, 0xbfc7cdee, 0x6eb63fad, 0xbfc25e9b,
-    0x6eb31845, 0xbfbcef70,
-  0x6eaff099, 0xbfb7806c, 0x6eacc8a8, 0xbfb21190, 0x6ea9a073, 0xbfaca2dc,
-    0x6ea677fa, 0xbfa7344f,
-  0x6ea34f3d, 0xbfa1c5ea, 0x6ea0263b, 0xbf9c57ac, 0x6e9cfcf5, 0xbf96e997,
-    0x6e99d36b, 0xbf917ba9,
-  0x6e96a99d, 0xbf8c0de3, 0x6e937f8a, 0xbf86a044, 0x6e905534, 0xbf8132ce,
-    0x6e8d2a99, 0xbf7bc57f,
-  0x6e89ffb9, 0xbf765858, 0x6e86d496, 0xbf70eb59, 0x6e83a92f, 0xbf6b7e81,
-    0x6e807d83, 0xbf6611d2,
-  0x6e7d5193, 0xbf60a54a, 0x6e7a255f, 0xbf5b38ea, 0x6e76f8e7, 0xbf55ccb2,
-    0x6e73cc2b, 0xbf5060a2,
-  0x6e709f2a, 0xbf4af4ba, 0x6e6d71e6, 0xbf4588fa, 0x6e6a445d, 0xbf401d61,
-    0x6e671690, 0xbf3ab1f1,
-  0x6e63e87f, 0xbf3546a8, 0x6e60ba2a, 0xbf2fdb88, 0x6e5d8b91, 0xbf2a708f,
-    0x6e5a5cb4, 0xbf2505bf,
-  0x6e572d93, 0xbf1f9b16, 0x6e53fe2e, 0xbf1a3096, 0x6e50ce84, 0xbf14c63d,
-    0x6e4d9e97, 0xbf0f5c0d,
-  0x6e4a6e66, 0xbf09f205, 0x6e473df0, 0xbf048824, 0x6e440d37, 0xbeff1e6c,
-    0x6e40dc39, 0xbef9b4dc,
-  0x6e3daaf8, 0xbef44b74, 0x6e3a7972, 0xbeeee234, 0x6e3747a9, 0xbee9791c,
-    0x6e34159b, 0xbee4102d,
-  0x6e30e34a, 0xbedea765, 0x6e2db0b4, 0xbed93ec6, 0x6e2a7ddb, 0xbed3d64f,
-    0x6e274abe, 0xbece6e00,
-  0x6e24175c, 0xbec905d9, 0x6e20e3b7, 0xbec39ddb, 0x6e1dafce, 0xbebe3605,
-    0x6e1a7ba1, 0xbeb8ce57,
-  0x6e174730, 0xbeb366d1, 0x6e14127b, 0xbeadff74, 0x6e10dd82, 0xbea8983f,
-    0x6e0da845, 0xbea33132,
-  0x6e0a72c5, 0xbe9dca4e, 0x6e073d00, 0xbe986391, 0x6e0406f8, 0xbe92fcfe,
-    0x6e00d0ac, 0xbe8d9692,
-  0x6dfd9a1c, 0xbe88304f, 0x6dfa6348, 0xbe82ca35, 0x6df72c30, 0xbe7d6442,
-    0x6df3f4d4, 0xbe77fe78,
-  0x6df0bd35, 0xbe7298d7, 0x6ded8552, 0xbe6d335e, 0x6dea4d2b, 0xbe67ce0d,
-    0x6de714c0, 0xbe6268e5,
-  0x6de3dc11, 0xbe5d03e6, 0x6de0a31f, 0xbe579f0f, 0x6ddd69e9, 0xbe523a60,
-    0x6dda306f, 0xbe4cd5da,
-  0x6dd6f6b1, 0xbe47717c, 0x6dd3bcaf, 0xbe420d47, 0x6dd0826a, 0xbe3ca93b,
-    0x6dcd47e1, 0xbe374557,
-  0x6dca0d14, 0xbe31e19b, 0x6dc6d204, 0xbe2c7e09, 0x6dc396b0, 0xbe271a9f,
-    0x6dc05b18, 0xbe21b75d,
-  0x6dbd1f3c, 0xbe1c5444, 0x6db9e31d, 0xbe16f154, 0x6db6a6ba, 0xbe118e8c,
-    0x6db36a14, 0xbe0c2bed,
-  0x6db02d29, 0xbe06c977, 0x6daceffb, 0xbe01672a, 0x6da9b28a, 0xbdfc0505,
-    0x6da674d5, 0xbdf6a309,
-  0x6da336dc, 0xbdf14135, 0x6d9ff89f, 0xbdebdf8b, 0x6d9cba1f, 0xbde67e09,
-    0x6d997b5b, 0xbde11cb0,
-  0x6d963c54, 0xbddbbb7f, 0x6d92fd09, 0xbdd65a78, 0x6d8fbd7a, 0xbdd0f999,
-    0x6d8c7da8, 0xbdcb98e3,
-  0x6d893d93, 0xbdc63856, 0x6d85fd39, 0xbdc0d7f2, 0x6d82bc9d, 0xbdbb77b7,
-    0x6d7f7bbc, 0xbdb617a4,
-  0x6d7c3a98, 0xbdb0b7bb, 0x6d78f931, 0xbdab57fa, 0x6d75b786, 0xbda5f862,
-    0x6d727597, 0xbda098f3,
-  0x6d6f3365, 0xbd9b39ad, 0x6d6bf0f0, 0xbd95da91, 0x6d68ae37, 0xbd907b9d,
-    0x6d656b3a, 0xbd8b1cd2,
-  0x6d6227fa, 0xbd85be30, 0x6d5ee477, 0xbd805fb7, 0x6d5ba0b0, 0xbd7b0167,
-    0x6d585ca6, 0xbd75a340,
-  0x6d551858, 0xbd704542, 0x6d51d3c6, 0xbd6ae76d, 0x6d4e8ef2, 0xbd6589c1,
-    0x6d4b49da, 0xbd602c3f,
-  0x6d48047e, 0xbd5acee5, 0x6d44bedf, 0xbd5571b5, 0x6d4178fd, 0xbd5014ad,
-    0x6d3e32d7, 0xbd4ab7cf,
-  0x6d3aec6e, 0xbd455b1a, 0x6d37a5c1, 0xbd3ffe8e, 0x6d345ed1, 0xbd3aa22c,
-    0x6d31179e, 0xbd3545f2,
-  0x6d2dd027, 0xbd2fe9e2, 0x6d2a886e, 0xbd2a8dfb, 0x6d274070, 0xbd25323d,
-    0x6d23f830, 0xbd1fd6a8,
-  0x6d20afac, 0xbd1a7b3d, 0x6d1d66e4, 0xbd151ffb, 0x6d1a1dda, 0xbd0fc4e2,
-    0x6d16d48c, 0xbd0a69f2,
-  0x6d138afb, 0xbd050f2c, 0x6d104126, 0xbcffb48f, 0x6d0cf70f, 0xbcfa5a1b,
-    0x6d09acb4, 0xbcf4ffd1,
-  0x6d066215, 0xbcefa5b0, 0x6d031734, 0xbcea4bb9, 0x6cffcc0f, 0xbce4f1eb,
-    0x6cfc80a7, 0xbcdf9846,
-  0x6cf934fc, 0xbcda3ecb, 0x6cf5e90d, 0xbcd4e579, 0x6cf29cdc, 0xbccf8c50,
-    0x6cef5067, 0xbcca3351,
-  0x6cec03af, 0xbcc4da7b, 0x6ce8b6b4, 0xbcbf81cf, 0x6ce56975, 0xbcba294d,
-    0x6ce21bf4, 0xbcb4d0f4,
-  0x6cdece2f, 0xbcaf78c4, 0x6cdb8027, 0xbcaa20be, 0x6cd831dc, 0xbca4c8e1,
-    0x6cd4e34e, 0xbc9f712e,
-  0x6cd1947c, 0xbc9a19a5, 0x6cce4568, 0xbc94c245, 0x6ccaf610, 0xbc8f6b0f,
-    0x6cc7a676, 0xbc8a1402,
-  0x6cc45698, 0xbc84bd1f, 0x6cc10677, 0xbc7f6665, 0x6cbdb613, 0xbc7a0fd6,
-    0x6cba656c, 0xbc74b96f,
-  0x6cb71482, 0xbc6f6333, 0x6cb3c355, 0xbc6a0d20, 0x6cb071e4, 0xbc64b737,
-    0x6cad2031, 0xbc5f6177,
-  0x6ca9ce3b, 0xbc5a0be2, 0x6ca67c01, 0xbc54b676, 0x6ca32985, 0xbc4f6134,
-    0x6c9fd6c6, 0xbc4a0c1b,
-  0x6c9c83c3, 0xbc44b72c, 0x6c99307e, 0xbc3f6267, 0x6c95dcf6, 0xbc3a0dcc,
-    0x6c92892a, 0xbc34b95b,
-  0x6c8f351c, 0xbc2f6513, 0x6c8be0cb, 0xbc2a10f6, 0x6c888c36, 0xbc24bd02,
-    0x6c85375f, 0xbc1f6938,
-  0x6c81e245, 0xbc1a1598, 0x6c7e8ce8, 0xbc14c221, 0x6c7b3748, 0xbc0f6ed5,
-    0x6c77e165, 0xbc0a1bb3,
-  0x6c748b3f, 0xbc04c8ba, 0x6c7134d7, 0xbbff75ec, 0x6c6dde2b, 0xbbfa2347,
-    0x6c6a873d, 0xbbf4d0cc,
-  0x6c67300b, 0xbbef7e7c, 0x6c63d897, 0xbbea2c55, 0x6c6080e0, 0xbbe4da58,
-    0x6c5d28e6, 0xbbdf8885,
-  0x6c59d0a9, 0xbbda36dd, 0x6c56782a, 0xbbd4e55e, 0x6c531f67, 0xbbcf940a,
-    0x6c4fc662, 0xbbca42df,
-  0x6c4c6d1a, 0xbbc4f1df, 0x6c49138f, 0xbbbfa108, 0x6c45b9c1, 0xbbba505c,
-    0x6c425fb1, 0xbbb4ffda,
-  0x6c3f055d, 0xbbafaf82, 0x6c3baac7, 0xbbaa5f54, 0x6c384fef, 0xbba50f50,
-    0x6c34f4d3, 0xbb9fbf77,
-  0x6c319975, 0xbb9a6fc7, 0x6c2e3dd4, 0xbb952042, 0x6c2ae1f0, 0xbb8fd0e7,
-    0x6c2785ca, 0xbb8a81b6,
-  0x6c242960, 0xbb8532b0, 0x6c20ccb4, 0xbb7fe3d3, 0x6c1d6fc6, 0xbb7a9521,
-    0x6c1a1295, 0xbb754699,
-  0x6c16b521, 0xbb6ff83c, 0x6c13576a, 0xbb6aaa09, 0x6c0ff971, 0xbb655c00,
-    0x6c0c9b35, 0xbb600e21,
-  0x6c093cb6, 0xbb5ac06d, 0x6c05ddf5, 0xbb5572e3, 0x6c027ef1, 0xbb502583,
-    0x6bff1faa, 0xbb4ad84e,
-  0x6bfbc021, 0xbb458b43, 0x6bf86055, 0xbb403e63, 0x6bf50047, 0xbb3af1ad,
-    0x6bf19ff6, 0xbb35a521,
-  0x6bee3f62, 0xbb3058c0, 0x6beade8c, 0xbb2b0c8a, 0x6be77d74, 0xbb25c07d,
-    0x6be41c18, 0xbb20749c,
-  0x6be0ba7b, 0xbb1b28e4, 0x6bdd589a, 0xbb15dd57, 0x6bd9f677, 0xbb1091f5,
-    0x6bd69412, 0xbb0b46bd,
-  0x6bd3316a, 0xbb05fbb0, 0x6bcfce80, 0xbb00b0ce, 0x6bcc6b53, 0xbafb6615,
-    0x6bc907e3, 0xbaf61b88,
-  0x6bc5a431, 0xbaf0d125, 0x6bc2403d, 0xbaeb86ed, 0x6bbedc06, 0xbae63cdf,
-    0x6bbb778d, 0xbae0f2fc,
-  0x6bb812d1, 0xbadba943, 0x6bb4add3, 0xbad65fb5, 0x6bb14892, 0xbad11652,
-    0x6bade30f, 0xbacbcd1a,
-  0x6baa7d49, 0xbac6840c, 0x6ba71741, 0xbac13b29, 0x6ba3b0f7, 0xbabbf270,
-    0x6ba04a6a, 0xbab6a9e3,
-  0x6b9ce39b, 0xbab16180, 0x6b997c8a, 0xbaac1948, 0x6b961536, 0xbaa6d13a,
-    0x6b92ada0, 0xbaa18958,
-  0x6b8f45c7, 0xba9c41a0, 0x6b8bddac, 0xba96fa13, 0x6b88754f, 0xba91b2b1,
-    0x6b850caf, 0xba8c6b79,
-  0x6b81a3cd, 0xba87246d, 0x6b7e3aa9, 0xba81dd8b, 0x6b7ad142, 0xba7c96d4,
-    0x6b776799, 0xba775048,
-  0x6b73fdae, 0xba7209e7, 0x6b709381, 0xba6cc3b1, 0x6b6d2911, 0xba677da6,
-    0x6b69be5f, 0xba6237c5,
-  0x6b66536b, 0xba5cf210, 0x6b62e834, 0xba57ac86, 0x6b5f7cbc, 0xba526726,
-    0x6b5c1101, 0xba4d21f2,
-  0x6b58a503, 0xba47dce8, 0x6b5538c4, 0xba42980a, 0x6b51cc42, 0xba3d5356,
-    0x6b4e5f7f, 0xba380ece,
-  0x6b4af279, 0xba32ca71, 0x6b478530, 0xba2d863e, 0x6b4417a6, 0xba284237,
-    0x6b40a9d9, 0xba22fe5b,
-  0x6b3d3bcb, 0xba1dbaaa, 0x6b39cd7a, 0xba187724, 0x6b365ee7, 0xba1333c9,
-    0x6b32f012, 0xba0df099,
-  0x6b2f80fb, 0xba08ad95, 0x6b2c11a1, 0xba036abb, 0x6b28a206, 0xb9fe280d,
-    0x6b253228, 0xb9f8e58a,
-  0x6b21c208, 0xb9f3a332, 0x6b1e51a7, 0xb9ee6106, 0x6b1ae103, 0xb9e91f04,
-    0x6b17701d, 0xb9e3dd2e,
-  0x6b13fef5, 0xb9de9b83, 0x6b108d8b, 0xb9d95a03, 0x6b0d1bdf, 0xb9d418af,
-    0x6b09a9f1, 0xb9ced786,
-  0x6b0637c1, 0xb9c99688, 0x6b02c54f, 0xb9c455b6, 0x6aff529a, 0xb9bf150e,
-    0x6afbdfa4, 0xb9b9d493,
-  0x6af86c6c, 0xb9b49442, 0x6af4f8f2, 0xb9af541d, 0x6af18536, 0xb9aa1423,
-    0x6aee1138, 0xb9a4d455,
-  0x6aea9cf8, 0xb99f94b2, 0x6ae72876, 0xb99a553a, 0x6ae3b3b2, 0xb99515ee,
-    0x6ae03eac, 0xb98fd6cd,
-  0x6adcc964, 0xb98a97d8, 0x6ad953db, 0xb985590e, 0x6ad5de0f, 0xb9801a70,
-    0x6ad26802, 0xb97adbfd,
-  0x6acef1b2, 0xb9759db6, 0x6acb7b21, 0xb9705f9a, 0x6ac8044e, 0xb96b21aa,
-    0x6ac48d39, 0xb965e3e5,
-  0x6ac115e2, 0xb960a64c, 0x6abd9e49, 0xb95b68de, 0x6aba266e, 0xb9562b9c,
-    0x6ab6ae52, 0xb950ee86,
-  0x6ab335f4, 0xb94bb19b, 0x6aafbd54, 0xb94674dc, 0x6aac4472, 0xb9413848,
-    0x6aa8cb4e, 0xb93bfbe0,
-  0x6aa551e9, 0xb936bfa4, 0x6aa1d841, 0xb9318393, 0x6a9e5e58, 0xb92c47ae,
-    0x6a9ae42e, 0xb9270bf5,
-  0x6a9769c1, 0xb921d067, 0x6a93ef13, 0xb91c9505, 0x6a907423, 0xb91759cf,
-    0x6a8cf8f1, 0xb9121ec5,
-  0x6a897d7d, 0xb90ce3e6, 0x6a8601c8, 0xb907a933, 0x6a8285d1, 0xb9026eac,
-    0x6a7f0999, 0xb8fd3451,
-  0x6a7b8d1e, 0xb8f7fa21, 0x6a781062, 0xb8f2c01d, 0x6a749365, 0xb8ed8646,
-    0x6a711625, 0xb8e84c99,
-  0x6a6d98a4, 0xb8e31319, 0x6a6a1ae2, 0xb8ddd9c5, 0x6a669cdd, 0xb8d8a09d,
-    0x6a631e97, 0xb8d367a0,
-  0x6a5fa010, 0xb8ce2ecf, 0x6a5c2147, 0xb8c8f62b, 0x6a58a23c, 0xb8c3bdb2,
-    0x6a5522ef, 0xb8be8565,
-  0x6a51a361, 0xb8b94d44, 0x6a4e2392, 0xb8b4154f, 0x6a4aa381, 0xb8aedd86,
-    0x6a47232e, 0xb8a9a5e9,
-  0x6a43a29a, 0xb8a46e78, 0x6a4021c4, 0xb89f3733, 0x6a3ca0ad, 0xb89a001a,
-    0x6a391f54, 0xb894c92d,
-  0x6a359db9, 0xb88f926d, 0x6a321bdd, 0xb88a5bd8, 0x6a2e99c0, 0xb885256f,
-    0x6a2b1761, 0xb87fef33,
-  0x6a2794c1, 0xb87ab922, 0x6a2411df, 0xb875833e, 0x6a208ebb, 0xb8704d85,
-    0x6a1d0b57, 0xb86b17f9,
-  0x6a1987b0, 0xb865e299, 0x6a1603c8, 0xb860ad66, 0x6a127f9f, 0xb85b785e,
-    0x6a0efb35, 0xb8564383,
-  0x6a0b7689, 0xb8510ed4, 0x6a07f19b, 0xb84bda51, 0x6a046c6c, 0xb846a5fa,
-    0x6a00e6fc, 0xb84171cf,
-  0x69fd614a, 0xb83c3dd1, 0x69f9db57, 0xb83709ff, 0x69f65523, 0xb831d659,
-    0x69f2cead, 0xb82ca2e0,
-  0x69ef47f6, 0xb8276f93, 0x69ebc0fe, 0xb8223c72, 0x69e839c4, 0xb81d097e,
-    0x69e4b249, 0xb817d6b6,
-  0x69e12a8c, 0xb812a41a, 0x69dda28f, 0xb80d71aa, 0x69da1a50, 0xb8083f67,
-    0x69d691cf, 0xb8030d51,
-  0x69d3090e, 0xb7fddb67, 0x69cf800b, 0xb7f8a9a9, 0x69cbf6c7, 0xb7f37818,
-    0x69c86d41, 0xb7ee46b3,
-  0x69c4e37a, 0xb7e9157a, 0x69c15973, 0xb7e3e46e, 0x69bdcf29, 0xb7deb38f,
-    0x69ba449f, 0xb7d982dc,
-  0x69b6b9d3, 0xb7d45255, 0x69b32ec7, 0xb7cf21fb, 0x69afa378, 0xb7c9f1ce,
-    0x69ac17e9, 0xb7c4c1cd,
-  0x69a88c19, 0xb7bf91f8, 0x69a50007, 0xb7ba6251, 0x69a173b5, 0xb7b532d6,
-    0x699de721, 0xb7b00387,
-  0x699a5a4c, 0xb7aad465, 0x6996cd35, 0xb7a5a570, 0x69933fde, 0xb7a076a7,
-    0x698fb246, 0xb79b480b,
-  0x698c246c, 0xb796199b, 0x69889651, 0xb790eb58, 0x698507f6, 0xb78bbd42,
-    0x69817959, 0xb7868f59,
-  0x697dea7b, 0xb781619c, 0x697a5b5c, 0xb77c340c, 0x6976cbfc, 0xb77706a9,
-    0x69733c5b, 0xb771d972,
-  0x696fac78, 0xb76cac69, 0x696c1c55, 0xb7677f8c, 0x69688bf1, 0xb76252db,
-    0x6964fb4c, 0xb75d2658,
-  0x69616a65, 0xb757fa01, 0x695dd93e, 0xb752cdd8, 0x695a47d6, 0xb74da1db,
-    0x6956b62d, 0xb748760b,
-  0x69532442, 0xb7434a67, 0x694f9217, 0xb73e1ef1, 0x694bffab, 0xb738f3a7,
-    0x69486cfe, 0xb733c88b,
-  0x6944da10, 0xb72e9d9b, 0x694146e1, 0xb72972d8, 0x693db371, 0xb7244842,
-    0x693a1fc0, 0xb71f1dd9,
-  0x69368bce, 0xb719f39e, 0x6932f79b, 0xb714c98e, 0x692f6328, 0xb70f9fac,
-    0x692bce73, 0xb70a75f7,
-  0x6928397e, 0xb7054c6f, 0x6924a448, 0xb7002314, 0x69210ed1, 0xb6faf9e6,
-    0x691d7919, 0xb6f5d0e5,
-  0x6919e320, 0xb6f0a812, 0x69164ce7, 0xb6eb7f6b, 0x6912b66c, 0xb6e656f1,
-    0x690f1fb1, 0xb6e12ea4,
-  0x690b88b5, 0xb6dc0685, 0x6907f178, 0xb6d6de92, 0x690459fb, 0xb6d1b6cd,
-    0x6900c23c, 0xb6cc8f35,
-  0x68fd2a3d, 0xb6c767ca, 0x68f991fd, 0xb6c2408c, 0x68f5f97d, 0xb6bd197c,
-    0x68f260bb, 0xb6b7f298,
-  0x68eec7b9, 0xb6b2cbe2, 0x68eb2e76, 0xb6ada559, 0x68e794f3, 0xb6a87efd,
-    0x68e3fb2e, 0xb6a358ce,
-  0x68e06129, 0xb69e32cd, 0x68dcc6e4, 0xb6990cf9, 0x68d92c5d, 0xb693e752,
-    0x68d59196, 0xb68ec1d9,
-  0x68d1f68f, 0xb6899c8d, 0x68ce5b46, 0xb684776e, 0x68cabfbd, 0xb67f527c,
-    0x68c723f3, 0xb67a2db8,
-  0x68c387e9, 0xb6750921, 0x68bfeb9e, 0xb66fe4b8, 0x68bc4f13, 0xb66ac07c,
-    0x68b8b247, 0xb6659c6d,
-  0x68b5153a, 0xb660788c, 0x68b177ed, 0xb65b54d8, 0x68adda5f, 0xb6563151,
-    0x68aa3c90, 0xb6510df8,
-  0x68a69e81, 0xb64beacd, 0x68a30031, 0xb646c7ce, 0x689f61a1, 0xb641a4fe,
-    0x689bc2d1, 0xb63c825b,
-  0x689823bf, 0xb6375fe5, 0x6894846e, 0xb6323d9d, 0x6890e4dc, 0xb62d1b82,
-    0x688d4509, 0xb627f995,
-  0x6889a4f6, 0xb622d7d6, 0x688604a2, 0xb61db644, 0x6882640e, 0xb61894df,
-    0x687ec339, 0xb61373a9,
-  0x687b2224, 0xb60e529f, 0x687780ce, 0xb60931c4, 0x6873df38, 0xb6041116,
-    0x68703d62, 0xb5fef095,
-  0x686c9b4b, 0xb5f9d043, 0x6868f8f4, 0xb5f4b01e, 0x6865565c, 0xb5ef9026,
-    0x6861b384, 0xb5ea705d,
-  0x685e106c, 0xb5e550c1, 0x685a6d13, 0xb5e03153, 0x6856c979, 0xb5db1212,
-    0x685325a0, 0xb5d5f2ff,
-  0x684f8186, 0xb5d0d41a, 0x684bdd2c, 0xb5cbb563, 0x68483891, 0xb5c696da,
-    0x684493b6, 0xb5c1787e,
-  0x6840ee9b, 0xb5bc5a50, 0x683d493f, 0xb5b73c50, 0x6839a3a4, 0xb5b21e7e,
-    0x6835fdc7, 0xb5ad00d9,
-  0x683257ab, 0xb5a7e362, 0x682eb14e, 0xb5a2c61a, 0x682b0ab1, 0xb59da8ff,
-    0x682763d4, 0xb5988c12,
-  0x6823bcb7, 0xb5936f53, 0x68201559, 0xb58e52c2, 0x681c6dbb, 0xb589365e,
-    0x6818c5dd, 0xb5841a29,
-  0x68151dbe, 0xb57efe22, 0x68117560, 0xb579e248, 0x680dccc1, 0xb574c69d,
-    0x680a23e2, 0xb56fab1f,
-  0x68067ac3, 0xb56a8fd0, 0x6802d164, 0xb56574ae, 0x67ff27c4, 0xb56059bb,
-    0x67fb7de5, 0xb55b3ef5,
-  0x67f7d3c5, 0xb556245e, 0x67f42965, 0xb55109f5, 0x67f07ec5, 0xb54befba,
-    0x67ecd3e5, 0xb546d5ac,
-  0x67e928c5, 0xb541bbcd, 0x67e57d64, 0xb53ca21c, 0x67e1d1c4, 0xb5378899,
-    0x67de25e3, 0xb5326f45,
-  0x67da79c3, 0xb52d561e, 0x67d6cd62, 0xb5283d26, 0x67d320c1, 0xb523245b,
-    0x67cf73e1, 0xb51e0bbf,
-  0x67cbc6c0, 0xb518f351, 0x67c8195f, 0xb513db12, 0x67c46bbe, 0xb50ec300,
-    0x67c0bddd, 0xb509ab1d,
-  0x67bd0fbd, 0xb5049368, 0x67b9615c, 0xb4ff7be1, 0x67b5b2bb, 0xb4fa6489,
-    0x67b203da, 0xb4f54d5f,
-  0x67ae54ba, 0xb4f03663, 0x67aaa559, 0xb4eb1f95, 0x67a6f5b8, 0xb4e608f6,
-    0x67a345d8, 0xb4e0f285,
-  0x679f95b7, 0xb4dbdc42, 0x679be557, 0xb4d6c62e, 0x679834b6, 0xb4d1b048,
-    0x679483d6, 0xb4cc9a90,
-  0x6790d2b6, 0xb4c78507, 0x678d2156, 0xb4c26fad, 0x67896fb6, 0xb4bd5a80,
-    0x6785bdd6, 0xb4b84582,
-  0x67820bb7, 0xb4b330b3, 0x677e5957, 0xb4ae1c12, 0x677aa6b8, 0xb4a9079f,
-    0x6776f3d9, 0xb4a3f35b,
-  0x677340ba, 0xb49edf45, 0x676f8d5b, 0xb499cb5e, 0x676bd9bd, 0xb494b7a6,
-    0x676825de, 0xb48fa41c,
-  0x676471c0, 0xb48a90c0, 0x6760bd62, 0xb4857d93, 0x675d08c4, 0xb4806a95,
-    0x675953e7, 0xb47b57c5,
-  0x67559eca, 0xb4764523, 0x6751e96d, 0xb47132b1, 0x674e33d0, 0xb46c206d,
-    0x674a7df4, 0xb4670e57,
-  0x6746c7d8, 0xb461fc70, 0x6743117c, 0xb45ceab8, 0x673f5ae0, 0xb457d92f,
-    0x673ba405, 0xb452c7d4,
-  0x6737ecea, 0xb44db6a8, 0x67343590, 0xb448a5aa, 0x67307df5, 0xb44394db,
-    0x672cc61c, 0xb43e843b,
-  0x67290e02, 0xb43973ca, 0x672555a9, 0xb4346387, 0x67219d10, 0xb42f5373,
-    0x671de438, 0xb42a438e,
-  0x671a2b20, 0xb42533d8, 0x671671c8, 0xb4202451, 0x6712b831, 0xb41b14f8,
-    0x670efe5a, 0xb41605ce,
-  0x670b4444, 0xb410f6d3, 0x670789ee, 0xb40be807, 0x6703cf58, 0xb406d969,
-    0x67001483, 0xb401cafb,
-  0x66fc596f, 0xb3fcbcbb, 0x66f89e1b, 0xb3f7aeaa, 0x66f4e287, 0xb3f2a0c9,
-    0x66f126b4, 0xb3ed9316,
-  0x66ed6aa1, 0xb3e88592, 0x66e9ae4f, 0xb3e3783d, 0x66e5f1be, 0xb3de6b17,
-    0x66e234ed, 0xb3d95e1f,
-  0x66de77dc, 0xb3d45157, 0x66daba8c, 0xb3cf44be, 0x66d6fcfd, 0xb3ca3854,
-    0x66d33f2e, 0xb3c52c19,
-  0x66cf8120, 0xb3c0200c, 0x66cbc2d2, 0xb3bb142f, 0x66c80445, 0xb3b60881,
-    0x66c44579, 0xb3b0fd02,
-  0x66c0866d, 0xb3abf1b2, 0x66bcc721, 0xb3a6e691, 0x66b90797, 0xb3a1dba0,
-    0x66b547cd, 0xb39cd0dd,
-  0x66b187c3, 0xb397c649, 0x66adc77b, 0xb392bbe5, 0x66aa06f3, 0xb38db1b0,
-    0x66a6462b, 0xb388a7aa,
-  0x66a28524, 0xb3839dd3, 0x669ec3de, 0xb37e942b, 0x669b0259, 0xb3798ab2,
-    0x66974095, 0xb3748169,
-  0x66937e91, 0xb36f784f, 0x668fbc4e, 0xb36a6f64, 0x668bf9cb, 0xb36566a8,
-    0x66883709, 0xb3605e1c,
-  0x66847408, 0xb35b55bf, 0x6680b0c8, 0xb3564d91, 0x667ced49, 0xb3514592,
-    0x6679298a, 0xb34c3dc3,
-  0x6675658c, 0xb3473623, 0x6671a14f, 0xb3422eb2, 0x666ddcd3, 0xb33d2771,
-    0x666a1818, 0xb338205f,
-  0x6666531d, 0xb333197c, 0x66628de4, 0xb32e12c9, 0x665ec86b, 0xb3290c45,
-    0x665b02b3, 0xb32405f1,
-  0x66573cbb, 0xb31effcc, 0x66537685, 0xb319f9d6, 0x664fb010, 0xb314f410,
-    0x664be95b, 0xb30fee79,
-  0x66482267, 0xb30ae912, 0x66445b35, 0xb305e3da, 0x664093c3, 0xb300ded2,
-    0x663ccc12, 0xb2fbd9f9,
-  0x66390422, 0xb2f6d550, 0x66353bf3, 0xb2f1d0d6, 0x66317385, 0xb2eccc8c,
-    0x662daad8, 0xb2e7c871,
-  0x6629e1ec, 0xb2e2c486, 0x662618c1, 0xb2ddc0ca, 0x66224f56, 0xb2d8bd3e,
-    0x661e85ad, 0xb2d3b9e2,
-  0x661abbc5, 0xb2ceb6b5, 0x6616f19e, 0xb2c9b3b8, 0x66132738, 0xb2c4b0ea,
-    0x660f5c93, 0xb2bfae4c,
-  0x660b91af, 0xb2baabde, 0x6607c68c, 0xb2b5a99f, 0x6603fb2a, 0xb2b0a790,
-    0x66002f89, 0xb2aba5b1,
-  0x65fc63a9, 0xb2a6a402, 0x65f8978b, 0xb2a1a282, 0x65f4cb2d, 0xb29ca132,
-    0x65f0fe91, 0xb297a011,
-  0x65ed31b5, 0xb2929f21, 0x65e9649b, 0xb28d9e60, 0x65e59742, 0xb2889dcf,
-    0x65e1c9aa, 0xb2839d6d,
-  0x65ddfbd3, 0xb27e9d3c, 0x65da2dbd, 0xb2799d3a, 0x65d65f69, 0xb2749d68,
-    0x65d290d6, 0xb26f9dc6,
-  0x65cec204, 0xb26a9e54, 0x65caf2f3, 0xb2659f12, 0x65c723a3, 0xb2609fff,
-    0x65c35415, 0xb25ba11d,
-  0x65bf8447, 0xb256a26a, 0x65bbb43b, 0xb251a3e7, 0x65b7e3f1, 0xb24ca594,
-    0x65b41367, 0xb247a771,
-  0x65b0429f, 0xb242a97e, 0x65ac7198, 0xb23dabbb, 0x65a8a052, 0xb238ae28,
-    0x65a4cece, 0xb233b0c5,
-  0x65a0fd0b, 0xb22eb392, 0x659d2b09, 0xb229b68f, 0x659958c9, 0xb224b9bc,
-    0x6595864a, 0xb21fbd19,
-  0x6591b38c, 0xb21ac0a6, 0x658de08f, 0xb215c463, 0x658a0d54, 0xb210c850,
-    0x658639db, 0xb20bcc6d,
-  0x65826622, 0xb206d0ba, 0x657e922b, 0xb201d537, 0x657abdf6, 0xb1fcd9e5,
-    0x6576e982, 0xb1f7dec2,
-  0x657314cf, 0xb1f2e3d0, 0x656f3fde, 0xb1ede90e, 0x656b6aae, 0xb1e8ee7c,
-    0x6567953f, 0xb1e3f41a,
-  0x6563bf92, 0xb1def9e9, 0x655fe9a7, 0xb1d9ffe7, 0x655c137d, 0xb1d50616,
-    0x65583d14, 0xb1d00c75,
-  0x6554666d, 0xb1cb1304, 0x65508f87, 0xb1c619c3, 0x654cb863, 0xb1c120b3,
-    0x6548e101, 0xb1bc27d3,
-  0x6545095f, 0xb1b72f23, 0x65413180, 0xb1b236a4, 0x653d5962, 0xb1ad3e55,
-    0x65398105, 0xb1a84636,
-  0x6535a86b, 0xb1a34e47, 0x6531cf91, 0xb19e5689, 0x652df679, 0xb1995efb,
-    0x652a1d23, 0xb194679e,
-  0x6526438f, 0xb18f7071, 0x652269bc, 0xb18a7974, 0x651e8faa, 0xb18582a8,
-    0x651ab55b, 0xb1808c0c,
-  0x6516dacd, 0xb17b95a0, 0x65130000, 0xb1769f65, 0x650f24f5, 0xb171a95b,
-    0x650b49ac, 0xb16cb380,
-  0x65076e25, 0xb167bdd7, 0x6503925f, 0xb162c85d, 0x64ffb65b, 0xb15dd315,
-    0x64fbda18, 0xb158ddfd,
-  0x64f7fd98, 0xb153e915, 0x64f420d9, 0xb14ef45e, 0x64f043dc, 0xb149ffd7,
-    0x64ec66a0, 0xb1450b81,
-  0x64e88926, 0xb140175b, 0x64e4ab6e, 0xb13b2367, 0x64e0cd78, 0xb1362fa2,
-    0x64dcef44, 0xb1313c0e,
-  0x64d910d1, 0xb12c48ab, 0x64d53220, 0xb1275579, 0x64d15331, 0xb1226277,
-    0x64cd7404, 0xb11d6fa6,
-  0x64c99498, 0xb1187d05, 0x64c5b4ef, 0xb1138a95, 0x64c1d507, 0xb10e9856,
-    0x64bdf4e1, 0xb109a648,
-  0x64ba147d, 0xb104b46a, 0x64b633da, 0xb0ffc2bd, 0x64b252fa, 0xb0fad140,
-    0x64ae71dc, 0xb0f5dff5,
-  0x64aa907f, 0xb0f0eeda, 0x64a6aee4, 0xb0ebfdf0, 0x64a2cd0c, 0xb0e70d37,
-    0x649eeaf5, 0xb0e21cae,
-  0x649b08a0, 0xb0dd2c56, 0x6497260d, 0xb0d83c2f, 0x6493433c, 0xb0d34c39,
-    0x648f602d, 0xb0ce5c74,
-  0x648b7ce0, 0xb0c96ce0, 0x64879955, 0xb0c47d7c, 0x6483b58c, 0xb0bf8e4a,
-    0x647fd185, 0xb0ba9f48,
-  0x647bed3f, 0xb0b5b077, 0x647808bc, 0xb0b0c1d7, 0x647423fb, 0xb0abd368,
-    0x64703efc, 0xb0a6e52a,
-  0x646c59bf, 0xb0a1f71d, 0x64687444, 0xb09d0941, 0x64648e8c, 0xb0981b96,
-    0x6460a895, 0xb0932e1b,
-  0x645cc260, 0xb08e40d2, 0x6458dbed, 0xb08953ba, 0x6454f53d, 0xb08466d3,
-    0x64510e4e, 0xb07f7a1c,
-  0x644d2722, 0xb07a8d97, 0x64493fb8, 0xb075a143, 0x64455810, 0xb070b520,
-    0x6441702a, 0xb06bc92e,
-  0x643d8806, 0xb066dd6d, 0x64399fa5, 0xb061f1de, 0x6435b706, 0xb05d067f,
-    0x6431ce28, 0xb0581b51,
-  0x642de50d, 0xb0533055, 0x6429fbb5, 0xb04e458a, 0x6426121e, 0xb0495af0,
-    0x6422284a, 0xb0447087,
-  0x641e3e38, 0xb03f864f, 0x641a53e8, 0xb03a9c49, 0x6416695a, 0xb035b273,
-    0x64127e8f, 0xb030c8cf,
-  0x640e9386, 0xb02bdf5c, 0x640aa83f, 0xb026f61b, 0x6406bcba, 0xb0220d0a,
-    0x6402d0f8, 0xb01d242b,
-  0x63fee4f8, 0xb0183b7d, 0x63faf8bb, 0xb0135301, 0x63f70c3f, 0xb00e6ab5,
-    0x63f31f86, 0xb009829c,
-  0x63ef3290, 0xb0049ab3, 0x63eb455c, 0xafffb2fc, 0x63e757ea, 0xaffacb76,
-    0x63e36a3a, 0xaff5e421,
-  0x63df7c4d, 0xaff0fcfe, 0x63db8e22, 0xafec160c, 0x63d79fba, 0xafe72f4c,
-    0x63d3b114, 0xafe248bd,
-  0x63cfc231, 0xafdd625f, 0x63cbd310, 0xafd87c33, 0x63c7e3b1, 0xafd39638,
-    0x63c3f415, 0xafceb06f,
-  0x63c0043b, 0xafc9cad7, 0x63bc1424, 0xafc4e571, 0x63b823cf, 0xafc0003c,
-    0x63b4333d, 0xafbb1b39,
-  0x63b0426d, 0xafb63667, 0x63ac5160, 0xafb151c7, 0x63a86015, 0xafac6d58,
-    0x63a46e8d, 0xafa7891b,
-  0x63a07cc7, 0xafa2a50f, 0x639c8ac4, 0xaf9dc135, 0x63989884, 0xaf98dd8d,
-    0x6394a606, 0xaf93fa16,
-  0x6390b34a, 0xaf8f16d1, 0x638cc051, 0xaf8a33bd, 0x6388cd1b, 0xaf8550db,
-    0x6384d9a7, 0xaf806e2b,
-  0x6380e5f6, 0xaf7b8bac, 0x637cf208, 0xaf76a95f, 0x6378fddc, 0xaf71c743,
-    0x63750973, 0xaf6ce55a,
-  0x637114cc, 0xaf6803a2, 0x636d1fe9, 0xaf63221c, 0x63692ac7, 0xaf5e40c7,
-    0x63653569, 0xaf595fa4,
-  0x63613fcd, 0xaf547eb3, 0x635d49f4, 0xaf4f9df4, 0x635953dd, 0xaf4abd66,
-    0x63555d8a, 0xaf45dd0b,
-  0x635166f9, 0xaf40fce1, 0x634d702b, 0xaf3c1ce9, 0x6349791f, 0xaf373d22,
-    0x634581d6, 0xaf325d8e,
-  0x63418a50, 0xaf2d7e2b, 0x633d928d, 0xaf289efa, 0x63399a8d, 0xaf23bffb,
-    0x6335a24f, 0xaf1ee12e,
-  0x6331a9d4, 0xaf1a0293, 0x632db11c, 0xaf15242a, 0x6329b827, 0xaf1045f3,
-    0x6325bef5, 0xaf0b67ed,
-  0x6321c585, 0xaf068a1a, 0x631dcbd9, 0xaf01ac78, 0x6319d1ef, 0xaefccf09,
-    0x6315d7c8, 0xaef7f1cb,
-  0x6311dd64, 0xaef314c0, 0x630de2c3, 0xaeee37e6, 0x6309e7e4, 0xaee95b3f,
-    0x6305ecc9, 0xaee47ec9,
-  0x6301f171, 0xaedfa285, 0x62fdf5db, 0xaedac674, 0x62f9fa09, 0xaed5ea95,
-    0x62f5fdf9, 0xaed10ee7,
-  0x62f201ac, 0xaecc336c, 0x62ee0523, 0xaec75823, 0x62ea085c, 0xaec27d0c,
-    0x62e60b58, 0xaebda227,
-  0x62e20e17, 0xaeb8c774, 0x62de109a, 0xaeb3ecf3, 0x62da12df, 0xaeaf12a4,
-    0x62d614e7, 0xaeaa3888,
-  0x62d216b3, 0xaea55e9e, 0x62ce1841, 0xaea084e6, 0x62ca1992, 0xae9bab60,
-    0x62c61aa7, 0xae96d20c,
-  0x62c21b7e, 0xae91f8eb, 0x62be1c19, 0xae8d1ffb, 0x62ba1c77, 0xae88473e,
-    0x62b61c98, 0xae836eb4,
-  0x62b21c7b, 0xae7e965b, 0x62ae1c23, 0xae79be35, 0x62aa1b8d, 0xae74e641,
-    0x62a61aba, 0xae700e80,
-  0x62a219aa, 0xae6b36f0, 0x629e185e, 0xae665f93, 0x629a16d5, 0xae618869,
-    0x6296150f, 0xae5cb171,
-  0x6292130c, 0xae57daab, 0x628e10cc, 0xae530417, 0x628a0e50, 0xae4e2db6,
-    0x62860b97, 0xae495787,
-  0x628208a1, 0xae44818b, 0x627e056e, 0xae3fabc1, 0x627a01fe, 0xae3ad629,
-    0x6275fe52, 0xae3600c4,
-  0x6271fa69, 0xae312b92, 0x626df643, 0xae2c5691, 0x6269f1e1, 0xae2781c4,
-    0x6265ed42, 0xae22ad29,
-  0x6261e866, 0xae1dd8c0, 0x625de34e, 0xae19048a, 0x6259ddf8, 0xae143086,
-    0x6255d866, 0xae0f5cb5,
-  0x6251d298, 0xae0a8916, 0x624dcc8d, 0xae05b5aa, 0x6249c645, 0xae00e271,
-    0x6245bfc0, 0xadfc0f6a,
-  0x6241b8ff, 0xadf73c96, 0x623db202, 0xadf269f4, 0x6239aac7, 0xaded9785,
-    0x6235a351, 0xade8c548,
-  0x62319b9d, 0xade3f33e, 0x622d93ad, 0xaddf2167, 0x62298b81, 0xadda4fc3,
-    0x62258317, 0xadd57e51,
-  0x62217a72, 0xadd0ad12, 0x621d7190, 0xadcbdc05, 0x62196871, 0xadc70b2c,
-    0x62155f16, 0xadc23a85,
-  0x6211557e, 0xadbd6a10, 0x620d4baa, 0xadb899cf, 0x62094199, 0xadb3c9c0,
-    0x6205374c, 0xadaef9e4,
-  0x62012cc2, 0xadaa2a3b, 0x61fd21fc, 0xada55ac4, 0x61f916f9, 0xada08b80,
-    0x61f50bba, 0xad9bbc70,
-  0x61f1003f, 0xad96ed92, 0x61ecf487, 0xad921ee6, 0x61e8e893, 0xad8d506e,
-    0x61e4dc62, 0xad888229,
-  0x61e0cff5, 0xad83b416, 0x61dcc34c, 0xad7ee636, 0x61d8b666, 0xad7a1889,
-    0x61d4a944, 0xad754b0f,
-  0x61d09be5, 0xad707dc8, 0x61cc8e4b, 0xad6bb0b4, 0x61c88074, 0xad66e3d3,
-    0x61c47260, 0xad621725,
-  0x61c06410, 0xad5d4aaa, 0x61bc5584, 0xad587e61, 0x61b846bc, 0xad53b24c,
-    0x61b437b7, 0xad4ee66a,
-  0x61b02876, 0xad4a1aba, 0x61ac18f9, 0xad454f3e, 0x61a80940, 0xad4083f5,
-    0x61a3f94a, 0xad3bb8df,
-  0x619fe918, 0xad36edfc, 0x619bd8aa, 0xad32234b, 0x6197c800, 0xad2d58ce,
-    0x6193b719, 0xad288e85,
-  0x618fa5f7, 0xad23c46e, 0x618b9498, 0xad1efa8a, 0x618782fd, 0xad1a30d9,
-    0x61837126, 0xad15675c,
-  0x617f5f12, 0xad109e12, 0x617b4cc3, 0xad0bd4fb, 0x61773a37, 0xad070c17,
-    0x61732770, 0xad024366,
-  0x616f146c, 0xacfd7ae8, 0x616b012c, 0xacf8b29e, 0x6166edb0, 0xacf3ea87,
-    0x6162d9f8, 0xacef22a3,
-  0x615ec603, 0xacea5af2, 0x615ab1d3, 0xace59375, 0x61569d67, 0xace0cc2b,
-    0x615288be, 0xacdc0514,
-  0x614e73da, 0xacd73e30, 0x614a5eba, 0xacd27780, 0x6146495d, 0xaccdb103,
-    0x614233c5, 0xacc8eab9,
-  0x613e1df0, 0xacc424a3, 0x613a07e0, 0xacbf5ec0, 0x6135f193, 0xacba9910,
-    0x6131db0b, 0xacb5d394,
-  0x612dc447, 0xacb10e4b, 0x6129ad46, 0xacac4935, 0x6125960a, 0xaca78453,
-    0x61217e92, 0xaca2bfa4,
-  0x611d66de, 0xac9dfb29, 0x61194eee, 0xac9936e1, 0x611536c2, 0xac9472cd,
-    0x61111e5b, 0xac8faeec,
-  0x610d05b7, 0xac8aeb3e, 0x6108ecd8, 0xac8627c4, 0x6104d3bc, 0xac81647e,
-    0x6100ba65, 0xac7ca16b,
-  0x60fca0d2, 0xac77de8b, 0x60f88703, 0xac731bdf, 0x60f46cf9, 0xac6e5967,
-    0x60f052b2, 0xac699722,
-  0x60ec3830, 0xac64d510, 0x60e81d72, 0xac601333, 0x60e40278, 0xac5b5189,
-    0x60dfe743, 0xac569012,
-  0x60dbcbd1, 0xac51cecf, 0x60d7b024, 0xac4d0dc0, 0x60d3943b, 0xac484ce4,
-    0x60cf7817, 0xac438c3c,
-  0x60cb5bb7, 0xac3ecbc7, 0x60c73f1b, 0xac3a0b87, 0x60c32243, 0xac354b7a,
-    0x60bf0530, 0xac308ba0,
-  0x60bae7e1, 0xac2bcbfa, 0x60b6ca56, 0xac270c88, 0x60b2ac8f, 0xac224d4a,
-    0x60ae8e8d, 0xac1d8e40,
-  0x60aa7050, 0xac18cf69, 0x60a651d7, 0xac1410c6, 0x60a23322, 0xac0f5256,
-    0x609e1431, 0xac0a941b,
-  0x6099f505, 0xac05d613, 0x6095d59d, 0xac01183f, 0x6091b5fa, 0xabfc5a9f,
-    0x608d961b, 0xabf79d33,
-  0x60897601, 0xabf2dffb, 0x608555ab, 0xabee22f6, 0x60813519, 0xabe96625,
-    0x607d144c, 0xabe4a988,
-  0x6078f344, 0xabdfed1f, 0x6074d200, 0xabdb30ea, 0x6070b080, 0xabd674e9,
-    0x606c8ec5, 0xabd1b91c,
-  0x60686ccf, 0xabccfd83, 0x60644a9d, 0xabc8421d, 0x6060282f, 0xabc386ec,
-    0x605c0587, 0xabbecbee,
-  0x6057e2a2, 0xabba1125, 0x6053bf82, 0xabb5568f, 0x604f9c27, 0xabb09c2e,
-    0x604b7891, 0xababe200,
-  0x604754bf, 0xaba72807, 0x604330b1, 0xaba26e41, 0x603f0c69, 0xab9db4b0,
-    0x603ae7e5, 0xab98fb52,
-  0x6036c325, 0xab944229, 0x60329e2a, 0xab8f8934, 0x602e78f4, 0xab8ad073,
-    0x602a5383, 0xab8617e6,
-  0x60262dd6, 0xab815f8d, 0x602207ee, 0xab7ca768, 0x601de1ca, 0xab77ef77,
-    0x6019bb6b, 0xab7337bb,
-  0x601594d1, 0xab6e8032, 0x60116dfc, 0xab69c8de, 0x600d46ec, 0xab6511be,
-    0x60091fa0, 0xab605ad2,
-  0x6004f819, 0xab5ba41a, 0x6000d057, 0xab56ed97, 0x5ffca859, 0xab523748,
-    0x5ff88021, 0xab4d812d,
-  0x5ff457ad, 0xab48cb46, 0x5ff02efe, 0xab441593, 0x5fec0613, 0xab3f6015,
-    0x5fe7dcee, 0xab3aaacb,
-  0x5fe3b38d, 0xab35f5b5, 0x5fdf89f2, 0xab3140d4, 0x5fdb601b, 0xab2c8c27,
-    0x5fd73609, 0xab27d7ae,
-  0x5fd30bbc, 0xab23236a, 0x5fcee133, 0xab1e6f5a, 0x5fcab670, 0xab19bb7e,
-    0x5fc68b72, 0xab1507d7,
-  0x5fc26038, 0xab105464, 0x5fbe34c4, 0xab0ba125, 0x5fba0914, 0xab06ee1b,
-    0x5fb5dd29, 0xab023b46,
-  0x5fb1b104, 0xaafd88a4, 0x5fad84a3, 0xaaf8d637, 0x5fa95807, 0xaaf423ff,
-    0x5fa52b31, 0xaaef71fb,
-  0x5fa0fe1f, 0xaaeac02c, 0x5f9cd0d2, 0xaae60e91, 0x5f98a34a, 0xaae15d2a,
-    0x5f947588, 0xaadcabf8,
-  0x5f90478a, 0xaad7fafb, 0x5f8c1951, 0xaad34a32, 0x5f87eade, 0xaace999d,
-    0x5f83bc2f, 0xaac9e93e,
-  0x5f7f8d46, 0xaac53912, 0x5f7b5e22, 0xaac0891c, 0x5f772ec2, 0xaabbd959,
-    0x5f72ff28, 0xaab729cc,
-  0x5f6ecf53, 0xaab27a73, 0x5f6a9f44, 0xaaadcb4f, 0x5f666ef9, 0xaaa91c5f,
-    0x5f623e73, 0xaaa46da4,
-  0x5f5e0db3, 0xaa9fbf1e, 0x5f59dcb8, 0xaa9b10cc, 0x5f55ab82, 0xaa9662af,
-    0x5f517a11, 0xaa91b4c7,
-  0x5f4d4865, 0xaa8d0713, 0x5f49167f, 0xaa885994, 0x5f44e45e, 0xaa83ac4a,
-    0x5f40b202, 0xaa7eff34,
-  0x5f3c7f6b, 0xaa7a5253, 0x5f384c9a, 0xaa75a5a8, 0x5f34198e, 0xaa70f930,
-    0x5f2fe647, 0xaa6c4cee,
-  0x5f2bb2c5, 0xaa67a0e0, 0x5f277f09, 0xaa62f507, 0x5f234b12, 0xaa5e4963,
-    0x5f1f16e0, 0xaa599df4,
-  0x5f1ae274, 0xaa54f2ba, 0x5f16adcc, 0xaa5047b4, 0x5f1278eb, 0xaa4b9ce3,
-    0x5f0e43ce, 0xaa46f248,
-  0x5f0a0e77, 0xaa4247e1, 0x5f05d8e6, 0xaa3d9daf, 0x5f01a31a, 0xaa38f3b1,
-    0x5efd6d13, 0xaa3449e9,
-  0x5ef936d1, 0xaa2fa056, 0x5ef50055, 0xaa2af6f7, 0x5ef0c99f, 0xaa264dce,
-    0x5eec92ae, 0xaa21a4d9,
-  0x5ee85b82, 0xaa1cfc1a, 0x5ee4241c, 0xaa18538f, 0x5edfec7b, 0xaa13ab3a,
-    0x5edbb49f, 0xaa0f0319,
-  0x5ed77c8a, 0xaa0a5b2e, 0x5ed34439, 0xaa05b377, 0x5ecf0baf, 0xaa010bf6,
-    0x5ecad2e9, 0xa9fc64a9,
-  0x5ec699e9, 0xa9f7bd92, 0x5ec260af, 0xa9f316b0, 0x5ebe273b, 0xa9ee7002,
-    0x5eb9ed8b, 0xa9e9c98a,
-  0x5eb5b3a2, 0xa9e52347, 0x5eb1797e, 0xa9e07d39, 0x5ead3f1f, 0xa9dbd761,
-    0x5ea90487, 0xa9d731bd,
-  0x5ea4c9b3, 0xa9d28c4e, 0x5ea08ea6, 0xa9cde715, 0x5e9c535e, 0xa9c94211,
-    0x5e9817dc, 0xa9c49d42,
-  0x5e93dc1f, 0xa9bff8a8, 0x5e8fa028, 0xa9bb5444, 0x5e8b63f7, 0xa9b6b014,
-    0x5e87278b, 0xa9b20c1a,
-  0x5e82eae5, 0xa9ad6855, 0x5e7eae05, 0xa9a8c4c5, 0x5e7a70ea, 0xa9a4216b,
-    0x5e763395, 0xa99f7e46,
-  0x5e71f606, 0xa99adb56, 0x5e6db83d, 0xa996389b, 0x5e697a39, 0xa9919616,
-    0x5e653bfc, 0xa98cf3c6,
-  0x5e60fd84, 0xa98851ac, 0x5e5cbed1, 0xa983afc6, 0x5e587fe5, 0xa97f0e16,
-    0x5e5440be, 0xa97a6c9c,
-  0x5e50015d, 0xa975cb57, 0x5e4bc1c2, 0xa9712a47, 0x5e4781ed, 0xa96c896c,
-    0x5e4341de, 0xa967e8c7,
-  0x5e3f0194, 0xa9634858, 0x5e3ac110, 0xa95ea81d, 0x5e368053, 0xa95a0819,
-    0x5e323f5b, 0xa9556849,
-  0x5e2dfe29, 0xa950c8b0, 0x5e29bcbd, 0xa94c294b, 0x5e257b17, 0xa9478a1c,
-    0x5e213936, 0xa942eb23,
-  0x5e1cf71c, 0xa93e4c5f, 0x5e18b4c8, 0xa939add1, 0x5e147239, 0xa9350f78,
-    0x5e102f71, 0xa9307155,
-  0x5e0bec6e, 0xa92bd367, 0x5e07a932, 0xa92735af, 0x5e0365bb, 0xa922982c,
-    0x5dff220b, 0xa91dfadf,
-  0x5dfade20, 0xa9195dc7, 0x5df699fc, 0xa914c0e6, 0x5df2559e, 0xa9102439,
-    0x5dee1105, 0xa90b87c3,
-  0x5de9cc33, 0xa906eb82, 0x5de58727, 0xa9024f76, 0x5de141e1, 0xa8fdb3a1,
-    0x5ddcfc61, 0xa8f91801,
-  0x5dd8b6a7, 0xa8f47c97, 0x5dd470b3, 0xa8efe162, 0x5dd02a85, 0xa8eb4663,
-    0x5dcbe41d, 0xa8e6ab9a,
-  0x5dc79d7c, 0xa8e21106, 0x5dc356a1, 0xa8dd76a9, 0x5dbf0f8c, 0xa8d8dc81,
-    0x5dbac83d, 0xa8d4428f,
-  0x5db680b4, 0xa8cfa8d2, 0x5db238f1, 0xa8cb0f4b, 0x5dadf0f5, 0xa8c675fb,
-    0x5da9a8bf, 0xa8c1dce0,
-  0x5da5604f, 0xa8bd43fa, 0x5da117a5, 0xa8b8ab4b, 0x5d9ccec2, 0xa8b412d1,
-    0x5d9885a5, 0xa8af7a8e,
-  0x5d943c4e, 0xa8aae280, 0x5d8ff2bd, 0xa8a64aa8, 0x5d8ba8f3, 0xa8a1b306,
-    0x5d875eef, 0xa89d1b99,
-  0x5d8314b1, 0xa8988463, 0x5d7eca39, 0xa893ed63, 0x5d7a7f88, 0xa88f5698,
-    0x5d76349d, 0xa88ac004,
-  0x5d71e979, 0xa88629a5, 0x5d6d9e1b, 0xa881937c, 0x5d695283, 0xa87cfd8a,
-    0x5d6506b2, 0xa87867cd,
-  0x5d60baa7, 0xa873d246, 0x5d5c6e62, 0xa86f3cf6, 0x5d5821e4, 0xa86aa7db,
-    0x5d53d52d, 0xa86612f6,
-  0x5d4f883b, 0xa8617e48, 0x5d4b3b10, 0xa85ce9cf, 0x5d46edac, 0xa858558d,
-    0x5d42a00e, 0xa853c180,
-  0x5d3e5237, 0xa84f2daa, 0x5d3a0426, 0xa84a9a0a, 0x5d35b5db, 0xa84606a0,
-    0x5d316757, 0xa841736c,
-  0x5d2d189a, 0xa83ce06e, 0x5d28c9a3, 0xa8384da6, 0x5d247a72, 0xa833bb14,
-    0x5d202b09, 0xa82f28b9,
-  0x5d1bdb65, 0xa82a9693, 0x5d178b89, 0xa82604a4, 0x5d133b72, 0xa82172eb,
-    0x5d0eeb23, 0xa81ce169,
-  0x5d0a9a9a, 0xa818501c, 0x5d0649d7, 0xa813bf06, 0x5d01f8dc, 0xa80f2e26,
-    0x5cfda7a7, 0xa80a9d7c,
-  0x5cf95638, 0xa8060d08, 0x5cf50490, 0xa8017ccb, 0x5cf0b2af, 0xa7fcecc4,
-    0x5cec6095, 0xa7f85cf3,
-  0x5ce80e41, 0xa7f3cd59, 0x5ce3bbb4, 0xa7ef3df5, 0x5cdf68ed, 0xa7eaaec7,
-    0x5cdb15ed, 0xa7e61fd0,
-  0x5cd6c2b5, 0xa7e1910f, 0x5cd26f42, 0xa7dd0284, 0x5cce1b97, 0xa7d8742f,
-    0x5cc9c7b2, 0xa7d3e611,
-  0x5cc57394, 0xa7cf582a, 0x5cc11f3d, 0xa7caca79, 0x5cbccaac, 0xa7c63cfe,
-    0x5cb875e3, 0xa7c1afb9,
-  0x5cb420e0, 0xa7bd22ac, 0x5cafcba4, 0xa7b895d4, 0x5cab762f, 0xa7b40933,
-    0x5ca72080, 0xa7af7cc8,
-  0x5ca2ca99, 0xa7aaf094, 0x5c9e7478, 0xa7a66497, 0x5c9a1e1e, 0xa7a1d8d0,
-    0x5c95c78b, 0xa79d4d3f,
-  0x5c9170bf, 0xa798c1e5, 0x5c8d19ba, 0xa79436c1, 0x5c88c27c, 0xa78fabd4,
-    0x5c846b05, 0xa78b211e,
-  0x5c801354, 0xa786969e, 0x5c7bbb6b, 0xa7820c55, 0x5c776348, 0xa77d8242,
-    0x5c730aed, 0xa778f866,
-  0x5c6eb258, 0xa7746ec0, 0x5c6a598b, 0xa76fe551, 0x5c660084, 0xa76b5c19,
-    0x5c61a745, 0xa766d317,
-  0x5c5d4dcc, 0xa7624a4d, 0x5c58f41a, 0xa75dc1b8, 0x5c549a30, 0xa759395b,
-    0x5c50400d, 0xa754b134,
-  0x5c4be5b0, 0xa7502943, 0x5c478b1b, 0xa74ba18a, 0x5c43304d, 0xa7471a07,
-    0x5c3ed545, 0xa74292bb,
-  0x5c3a7a05, 0xa73e0ba5, 0x5c361e8c, 0xa73984c7, 0x5c31c2db, 0xa734fe1f,
-    0x5c2d66f0, 0xa73077ae,
-  0x5c290acc, 0xa72bf174, 0x5c24ae70, 0xa7276b70, 0x5c2051db, 0xa722e5a3,
-    0x5c1bf50d, 0xa71e600d,
-  0x5c179806, 0xa719daae, 0x5c133ac6, 0xa7155586, 0x5c0edd4e, 0xa710d095,
-    0x5c0a7f9c, 0xa70c4bda,
-  0x5c0621b2, 0xa707c757, 0x5c01c38f, 0xa703430a, 0x5bfd6534, 0xa6febef4,
-    0x5bf906a0, 0xa6fa3b15,
-  0x5bf4a7d2, 0xa6f5b76d, 0x5bf048cd, 0xa6f133fc, 0x5bebe98e, 0xa6ecb0c2,
-    0x5be78a17, 0xa6e82dbe,
-  0x5be32a67, 0xa6e3aaf2, 0x5bdeca7f, 0xa6df285d, 0x5bda6a5d, 0xa6daa5fe,
-    0x5bd60a03, 0xa6d623d7,
-  0x5bd1a971, 0xa6d1a1e7, 0x5bcd48a6, 0xa6cd202d, 0x5bc8e7a2, 0xa6c89eab,
-    0x5bc48666, 0xa6c41d60,
-  0x5bc024f0, 0xa6bf9c4b, 0x5bbbc343, 0xa6bb1b6e, 0x5bb7615d, 0xa6b69ac8,
-    0x5bb2ff3e, 0xa6b21a59,
-  0x5bae9ce7, 0xa6ad9a21, 0x5baa3a57, 0xa6a91a20, 0x5ba5d78e, 0xa6a49a56,
-    0x5ba1748d, 0xa6a01ac4,
-  0x5b9d1154, 0xa69b9b68, 0x5b98ade2, 0xa6971c44, 0x5b944a37, 0xa6929d57,
-    0x5b8fe654, 0xa68e1ea1,
-  0x5b8b8239, 0xa689a022, 0x5b871de5, 0xa68521da, 0x5b82b958, 0xa680a3ca,
-    0x5b7e5493, 0xa67c25f0,
-  0x5b79ef96, 0xa677a84e, 0x5b758a60, 0xa6732ae3, 0x5b7124f2, 0xa66eadb0,
-    0x5b6cbf4c, 0xa66a30b3,
-  0x5b68596d, 0xa665b3ee, 0x5b63f355, 0xa6613760, 0x5b5f8d06, 0xa65cbb0a,
-    0x5b5b267e, 0xa6583eeb,
-  0x5b56bfbd, 0xa653c303, 0x5b5258c4, 0xa64f4752, 0x5b4df193, 0xa64acbd9,
-    0x5b498a2a, 0xa6465097,
-  0x5b452288, 0xa641d58c, 0x5b40baae, 0xa63d5ab9, 0x5b3c529c, 0xa638e01d,
-    0x5b37ea51, 0xa63465b9,
-  0x5b3381ce, 0xa62feb8b, 0x5b2f1913, 0xa62b7196, 0x5b2ab020, 0xa626f7d7,
-    0x5b2646f4, 0xa6227e50,
-  0x5b21dd90, 0xa61e0501, 0x5b1d73f4, 0xa6198be9, 0x5b190a20, 0xa6151308,
-    0x5b14a014, 0xa6109a5f,
-  0x5b1035cf, 0xa60c21ee, 0x5b0bcb52, 0xa607a9b4, 0x5b07609d, 0xa60331b1,
-    0x5b02f5b0, 0xa5feb9e6,
-  0x5afe8a8b, 0xa5fa4252, 0x5afa1f2e, 0xa5f5caf6, 0x5af5b398, 0xa5f153d2,
-    0x5af147ca, 0xa5ecdce5,
-  0x5aecdbc5, 0xa5e8662f, 0x5ae86f87, 0xa5e3efb1, 0x5ae40311, 0xa5df796b,
-    0x5adf9663, 0xa5db035c,
-  0x5adb297d, 0xa5d68d85, 0x5ad6bc5f, 0xa5d217e6, 0x5ad24f09, 0xa5cda27e,
-    0x5acde17b, 0xa5c92d4e,
-  0x5ac973b5, 0xa5c4b855, 0x5ac505b7, 0xa5c04395, 0x5ac09781, 0xa5bbcf0b,
-    0x5abc2912, 0xa5b75aba,
-  0x5ab7ba6c, 0xa5b2e6a0, 0x5ab34b8e, 0xa5ae72be, 0x5aaedc78, 0xa5a9ff14,
-    0x5aaa6d2b, 0xa5a58ba1,
-  0x5aa5fda5, 0xa5a11866, 0x5aa18de7, 0xa59ca563, 0x5a9d1df1, 0xa5983297,
-    0x5a98adc4, 0xa593c004,
-  0x5a943d5e, 0xa58f4da8, 0x5a8fccc1, 0xa58adb84, 0x5a8b5bec, 0xa5866997,
-    0x5a86eadf, 0xa581f7e3,
-  0x5a82799a, 0xa57d8666, 0x5a7e081d, 0xa5791521, 0x5a799669, 0xa574a414,
-    0x5a75247c, 0xa570333f,
-  0x5a70b258, 0xa56bc2a2, 0x5a6c3ffc, 0xa567523c, 0x5a67cd69, 0xa562e20f,
-    0x5a635a9d, 0xa55e7219,
-  0x5a5ee79a, 0xa55a025b, 0x5a5a745f, 0xa55592d5, 0x5a5600ec, 0xa5512388,
-    0x5a518d42, 0xa54cb472,
-  0x5a4d1960, 0xa5484594, 0x5a48a546, 0xa543d6ee, 0x5a4430f5, 0xa53f687f,
-    0x5a3fbc6b, 0xa53afa49,
-  0x5a3b47ab, 0xa5368c4b, 0x5a36d2b2, 0xa5321e85, 0x5a325d82, 0xa52db0f7,
-    0x5a2de81a, 0xa52943a1,
-  0x5a29727b, 0xa524d683, 0x5a24fca4, 0xa520699d, 0x5a208695, 0xa51bfcef,
-    0x5a1c104f, 0xa5179079,
-  0x5a1799d1, 0xa513243b, 0x5a13231b, 0xa50eb836, 0x5a0eac2e, 0xa50a4c68,
-    0x5a0a350a, 0xa505e0d2,
-  0x5a05bdae, 0xa5017575, 0x5a01461a, 0xa4fd0a50, 0x59fcce4f, 0xa4f89f63,
-    0x59f8564c, 0xa4f434ae,
-  0x59f3de12, 0xa4efca31, 0x59ef65a1, 0xa4eb5fec, 0x59eaecf8, 0xa4e6f5e0,
-    0x59e67417, 0xa4e28c0c,
-  0x59e1faff, 0xa4de2270, 0x59dd81b0, 0xa4d9b90c, 0x59d90829, 0xa4d54fe0,
-    0x59d48e6a, 0xa4d0e6ed,
-  0x59d01475, 0xa4cc7e32, 0x59cb9a47, 0xa4c815af, 0x59c71fe3, 0xa4c3ad64,
-    0x59c2a547, 0xa4bf4552,
-  0x59be2a74, 0xa4badd78, 0x59b9af69, 0xa4b675d6, 0x59b53427, 0xa4b20e6d,
-    0x59b0b8ae, 0xa4ada73c,
-  0x59ac3cfd, 0xa4a94043, 0x59a7c115, 0xa4a4d982, 0x59a344f6, 0xa4a072fa,
-    0x599ec8a0, 0xa49c0cab,
-  0x599a4c12, 0xa497a693, 0x5995cf4d, 0xa49340b4, 0x59915250, 0xa48edb0e,
-    0x598cd51d, 0xa48a75a0,
-  0x598857b2, 0xa486106a, 0x5983da10, 0xa481ab6d, 0x597f5c36, 0xa47d46a8,
-    0x597ade26, 0xa478e21b,
-  0x59765fde, 0xa4747dc7, 0x5971e15f, 0xa47019ac, 0x596d62a9, 0xa46bb5c9,
-    0x5968e3bc, 0xa467521e,
-  0x59646498, 0xa462eeac, 0x595fe53c, 0xa45e8b73, 0x595b65aa, 0xa45a2872,
-    0x5956e5e0, 0xa455c5a9,
-  0x595265df, 0xa4516319, 0x594de5a7, 0xa44d00c2, 0x59496538, 0xa4489ea3,
-    0x5944e492, 0xa4443cbd,
-  0x594063b5, 0xa43fdb10, 0x593be2a0, 0xa43b799a, 0x59376155, 0xa437185e,
-    0x5932dfd3, 0xa432b75a,
-  0x592e5e19, 0xa42e568f, 0x5929dc29, 0xa429f5fd, 0x59255a02, 0xa42595a3,
-    0x5920d7a3, 0xa4213581,
-  0x591c550e, 0xa41cd599, 0x5917d242, 0xa41875e9, 0x59134f3e, 0xa4141672,
-    0x590ecc04, 0xa40fb733,
-  0x590a4893, 0xa40b582e, 0x5905c4eb, 0xa406f960, 0x5901410c, 0xa4029acc,
-    0x58fcbcf6, 0xa3fe3c71,
-  0x58f838a9, 0xa3f9de4e, 0x58f3b426, 0xa3f58064, 0x58ef2f6b, 0xa3f122b2,
-    0x58eaaa7a, 0xa3ecc53a,
-  0x58e62552, 0xa3e867fa, 0x58e19ff3, 0xa3e40af3, 0x58dd1a5d, 0xa3dfae25,
-    0x58d89490, 0xa3db5190,
-  0x58d40e8c, 0xa3d6f534, 0x58cf8852, 0xa3d29910, 0x58cb01e1, 0xa3ce3d25,
-    0x58c67b39, 0xa3c9e174,
-  0x58c1f45b, 0xa3c585fb, 0x58bd6d45, 0xa3c12abb, 0x58b8e5f9, 0xa3bccfb3,
-    0x58b45e76, 0xa3b874e5,
-  0x58afd6bd, 0xa3b41a50, 0x58ab4ecc, 0xa3afbff3, 0x58a6c6a5, 0xa3ab65d0,
-    0x58a23e48, 0xa3a70be6,
-  0x589db5b3, 0xa3a2b234, 0x58992ce9, 0xa39e58bb, 0x5894a3e7, 0xa399ff7c,
-    0x58901aaf, 0xa395a675,
-  0x588b9140, 0xa3914da8, 0x5887079a, 0xa38cf513, 0x58827dbe, 0xa3889cb8,
-    0x587df3ab, 0xa3844495,
-  0x58796962, 0xa37fecac, 0x5874dee2, 0xa37b94fb, 0x5870542c, 0xa3773d84,
-    0x586bc93f, 0xa372e646,
-  0x58673e1b, 0xa36e8f41, 0x5862b2c1, 0xa36a3875, 0x585e2730, 0xa365e1e2,
-    0x58599b69, 0xa3618b88,
-  0x58550f6c, 0xa35d3567, 0x58508338, 0xa358df80, 0x584bf6cd, 0xa35489d1,
-    0x58476a2c, 0xa350345c,
-  0x5842dd54, 0xa34bdf20, 0x583e5047, 0xa3478a1d, 0x5839c302, 0xa3433554,
-    0x58353587, 0xa33ee0c3,
-  0x5830a7d6, 0xa33a8c6c, 0x582c19ef, 0xa336384e, 0x58278bd1, 0xa331e469,
-    0x5822fd7c, 0xa32d90be,
-  0x581e6ef1, 0xa3293d4b, 0x5819e030, 0xa324ea13, 0x58155139, 0xa3209713,
-    0x5810c20b, 0xa31c444c,
-  0x580c32a7, 0xa317f1bf, 0x5807a30d, 0xa3139f6b, 0x5803133c, 0xa30f4d51,
-    0x57fe8335, 0xa30afb70,
-  0x57f9f2f8, 0xa306a9c8, 0x57f56284, 0xa3025859, 0x57f0d1da, 0xa2fe0724,
-    0x57ec40fa, 0xa2f9b629,
-  0x57e7afe4, 0xa2f56566, 0x57e31e97, 0xa2f114dd, 0x57de8d15, 0xa2ecc48e,
-    0x57d9fb5c, 0xa2e87477,
-  0x57d5696d, 0xa2e4249b, 0x57d0d747, 0xa2dfd4f7, 0x57cc44ec, 0xa2db858e,
-    0x57c7b25a, 0xa2d7365d,
-  0x57c31f92, 0xa2d2e766, 0x57be8c94, 0xa2ce98a9, 0x57b9f960, 0xa2ca4a25,
-    0x57b565f6, 0xa2c5fbda,
-  0x57b0d256, 0xa2c1adc9, 0x57ac3e80, 0xa2bd5ff2, 0x57a7aa73, 0xa2b91254,
-    0x57a31631, 0xa2b4c4f0,
-  0x579e81b8, 0xa2b077c5, 0x5799ed0a, 0xa2ac2ad3, 0x57955825, 0xa2a7de1c,
-    0x5790c30a, 0xa2a3919e,
-  0x578c2dba, 0xa29f4559, 0x57879833, 0xa29af94e, 0x57830276, 0xa296ad7d,
-    0x577e6c84, 0xa29261e5,
-  0x5779d65b, 0xa28e1687, 0x57753ffc, 0xa289cb63, 0x5770a968, 0xa2858078,
-    0x576c129d, 0xa28135c7,
-  0x57677b9d, 0xa27ceb4f, 0x5762e467, 0xa278a111, 0x575e4cfa, 0xa274570d,
-    0x5759b558, 0xa2700d43,
-  0x57551d80, 0xa26bc3b2, 0x57508572, 0xa2677a5b, 0x574bed2f, 0xa263313e,
-    0x574754b5, 0xa25ee85b,
-  0x5742bc06, 0xa25a9fb1, 0x573e2320, 0xa2565741, 0x57398a05, 0xa2520f0b,
-    0x5734f0b5, 0xa24dc70f,
-  0x5730572e, 0xa2497f4c, 0x572bbd71, 0xa24537c3, 0x5727237f, 0xa240f074,
-    0x57228957, 0xa23ca95f,
-  0x571deefa, 0xa2386284, 0x57195466, 0xa2341be3, 0x5714b99d, 0xa22fd57b,
-    0x57101e9e, 0xa22b8f4d,
-  0x570b8369, 0xa2274959, 0x5706e7ff, 0xa223039f, 0x57024c5f, 0xa21ebe1f,
-    0x56fdb08a, 0xa21a78d9,
-  0x56f9147e, 0xa21633cd, 0x56f4783d, 0xa211eefb, 0x56efdbc7, 0xa20daa62,
-    0x56eb3f1a, 0xa2096604,
-  0x56e6a239, 0xa20521e0, 0x56e20521, 0xa200ddf5, 0x56dd67d4, 0xa1fc9a45,
-    0x56d8ca51, 0xa1f856ce,
-  0x56d42c99, 0xa1f41392, 0x56cf8eab, 0xa1efd08f, 0x56caf088, 0xa1eb8dc7,
-    0x56c6522f, 0xa1e74b38,
-  0x56c1b3a1, 0xa1e308e4, 0x56bd14dd, 0xa1dec6ca, 0x56b875e4, 0xa1da84e9,
-    0x56b3d6b5, 0xa1d64343,
-  0x56af3750, 0xa1d201d7, 0x56aa97b7, 0xa1cdc0a5, 0x56a5f7e7, 0xa1c97fad,
-    0x56a157e3, 0xa1c53ef0,
-  0x569cb7a8, 0xa1c0fe6c, 0x56981739, 0xa1bcbe22, 0x56937694, 0xa1b87e13,
-    0x568ed5b9, 0xa1b43e3e,
-  0x568a34a9, 0xa1affea3, 0x56859364, 0xa1abbf42, 0x5680f1ea, 0xa1a7801b,
-    0x567c503a, 0xa1a3412f,
-  0x5677ae54, 0xa19f027c, 0x56730c3a, 0xa19ac404, 0x566e69ea, 0xa19685c7,
-    0x5669c765, 0xa19247c3,
-  0x566524aa, 0xa18e09fa, 0x566081ba, 0xa189cc6b, 0x565bde95, 0xa1858f16,
-    0x56573b3b, 0xa18151fb,
-  0x565297ab, 0xa17d151b, 0x564df3e6, 0xa178d875, 0x56494fec, 0xa1749c09,
-    0x5644abbc, 0xa1705fd8,
-  0x56400758, 0xa16c23e1, 0x563b62be, 0xa167e824, 0x5636bdef, 0xa163aca2,
-    0x563218eb, 0xa15f715a,
-  0x562d73b2, 0xa15b364d, 0x5628ce43, 0xa156fb79, 0x5624289f, 0xa152c0e1,
-    0x561f82c7, 0xa14e8682,
-  0x561adcb9, 0xa14a4c5e, 0x56163676, 0xa1461275, 0x56118ffe, 0xa141d8c5,
-    0x560ce950, 0xa13d9f51,
-  0x5608426e, 0xa1396617, 0x56039b57, 0xa1352d17, 0x55fef40a, 0xa130f451,
-    0x55fa4c89, 0xa12cbbc7,
-  0x55f5a4d2, 0xa1288376, 0x55f0fce7, 0xa1244b61, 0x55ec54c6, 0xa1201385,
-    0x55e7ac71, 0xa11bdbe4,
-  0x55e303e6, 0xa117a47e, 0x55de5b27, 0xa1136d52, 0x55d9b232, 0xa10f3661,
-    0x55d50909, 0xa10affab,
-  0x55d05faa, 0xa106c92f, 0x55cbb617, 0xa10292ed, 0x55c70c4f, 0xa0fe5ce6,
-    0x55c26251, 0xa0fa271a,
-  0x55bdb81f, 0xa0f5f189, 0x55b90db8, 0xa0f1bc32, 0x55b4631d, 0xa0ed8715,
-    0x55afb84c, 0xa0e95234,
-  0x55ab0d46, 0xa0e51d8c, 0x55a6620c, 0xa0e0e920, 0x55a1b69d, 0xa0dcb4ee,
-    0x559d0af9, 0xa0d880f7,
-  0x55985f20, 0xa0d44d3b, 0x5593b312, 0xa0d019b9, 0x558f06d0, 0xa0cbe672,
-    0x558a5a58, 0xa0c7b366,
-  0x5585adad, 0xa0c38095, 0x558100cc, 0xa0bf4dfe, 0x557c53b6, 0xa0bb1ba2,
-    0x5577a66c, 0xa0b6e981,
-  0x5572f8ed, 0xa0b2b79b, 0x556e4b39, 0xa0ae85ef, 0x55699d51, 0xa0aa547e,
-    0x5564ef34, 0xa0a62348,
-  0x556040e2, 0xa0a1f24d, 0x555b925c, 0xa09dc18d, 0x5556e3a1, 0xa0999107,
-    0x555234b1, 0xa09560bc,
-  0x554d858d, 0xa09130ad, 0x5548d634, 0xa08d00d8, 0x554426a7, 0xa088d13e,
-    0x553f76e4, 0xa084a1de,
-  0x553ac6ee, 0xa08072ba, 0x553616c2, 0xa07c43d1, 0x55316663, 0xa0781522,
-    0x552cb5ce, 0xa073e6af,
-  0x55280505, 0xa06fb876, 0x55235408, 0xa06b8a78, 0x551ea2d6, 0xa0675cb6,
-    0x5519f16f, 0xa0632f2e,
-  0x55153fd4, 0xa05f01e1, 0x55108e05, 0xa05ad4cf, 0x550bdc01, 0xa056a7f9,
-    0x550729c9, 0xa0527b5d,
-  0x5502775c, 0xa04e4efc, 0x54fdc4ba, 0xa04a22d7, 0x54f911e5, 0xa045f6ec,
-    0x54f45edb, 0xa041cb3c,
-  0x54efab9c, 0xa03d9fc8, 0x54eaf829, 0xa039748e, 0x54e64482, 0xa0354990,
-    0x54e190a6, 0xa0311ecd,
-  0x54dcdc96, 0xa02cf444, 0x54d82852, 0xa028c9f7, 0x54d373d9, 0xa0249fe5,
-    0x54cebf2c, 0xa020760e,
-  0x54ca0a4b, 0xa01c4c73, 0x54c55535, 0xa0182312, 0x54c09feb, 0xa013f9ed,
-    0x54bbea6d, 0xa00fd102,
-  0x54b734ba, 0xa00ba853, 0x54b27ed3, 0xa0077fdf, 0x54adc8b8, 0xa00357a7,
-    0x54a91269, 0x9fff2fa9,
-  0x54a45be6, 0x9ffb07e7, 0x549fa52e, 0x9ff6e060, 0x549aee42, 0x9ff2b914,
-    0x54963722, 0x9fee9204,
-  0x54917fce, 0x9fea6b2f, 0x548cc845, 0x9fe64495, 0x54881089, 0x9fe21e36,
-    0x54835898, 0x9fddf812,
-  0x547ea073, 0x9fd9d22a, 0x5479e81a, 0x9fd5ac7d, 0x54752f8d, 0x9fd1870c,
-    0x547076cc, 0x9fcd61d6,
-  0x546bbdd7, 0x9fc93cdb, 0x546704ae, 0x9fc5181b, 0x54624b50, 0x9fc0f397,
-    0x545d91bf, 0x9fbccf4f,
-  0x5458d7f9, 0x9fb8ab41, 0x54541e00, 0x9fb4876f, 0x544f63d2, 0x9fb063d9,
-    0x544aa971, 0x9fac407e,
-  0x5445eedb, 0x9fa81d5e, 0x54413412, 0x9fa3fa79, 0x543c7914, 0x9f9fd7d1,
-    0x5437bde3, 0x9f9bb563,
-  0x5433027d, 0x9f979331, 0x542e46e4, 0x9f93713b, 0x54298b17, 0x9f8f4f80,
-    0x5424cf16, 0x9f8b2e00,
-  0x542012e1, 0x9f870cbc, 0x541b5678, 0x9f82ebb4, 0x541699db, 0x9f7ecae7,
-    0x5411dd0a, 0x9f7aaa55,
-  0x540d2005, 0x9f7689ff, 0x540862cd, 0x9f7269e5, 0x5403a561, 0x9f6e4a06,
-    0x53fee7c1, 0x9f6a2a63,
-  0x53fa29ed, 0x9f660afb, 0x53f56be5, 0x9f61ebcf, 0x53f0adaa, 0x9f5dccde,
-    0x53ebef3a, 0x9f59ae29,
-  0x53e73097, 0x9f558fb0, 0x53e271c0, 0x9f517173, 0x53ddb2b6, 0x9f4d5371,
-    0x53d8f378, 0x9f4935aa,
-  0x53d43406, 0x9f45181f, 0x53cf7460, 0x9f40fad0, 0x53cab486, 0x9f3cddbd,
-    0x53c5f479, 0x9f38c0e5,
-  0x53c13439, 0x9f34a449, 0x53bc73c4, 0x9f3087e9, 0x53b7b31c, 0x9f2c6bc5,
-    0x53b2f240, 0x9f284fdc,
-  0x53ae3131, 0x9f24342f, 0x53a96fee, 0x9f2018bd, 0x53a4ae77, 0x9f1bfd88,
-    0x539feccd, 0x9f17e28e,
-  0x539b2af0, 0x9f13c7d0, 0x539668de, 0x9f0fad4e, 0x5391a699, 0x9f0b9307,
-    0x538ce421, 0x9f0778fd,
-  0x53882175, 0x9f035f2e, 0x53835e95, 0x9eff459b, 0x537e9b82, 0x9efb2c44,
-    0x5379d83c, 0x9ef71328,
-  0x537514c2, 0x9ef2fa49, 0x53705114, 0x9eeee1a5, 0x536b8d33, 0x9eeac93e,
-    0x5366c91f, 0x9ee6b112,
-  0x536204d7, 0x9ee29922, 0x535d405c, 0x9ede816e, 0x53587bad, 0x9eda69f6,
-    0x5353b6cb, 0x9ed652ba,
-  0x534ef1b5, 0x9ed23bb9, 0x534a2c6c, 0x9ece24f5, 0x534566f0, 0x9eca0e6d,
-    0x5340a140, 0x9ec5f820,
-  0x533bdb5d, 0x9ec1e210, 0x53371547, 0x9ebdcc3b, 0x53324efd, 0x9eb9b6a3,
-    0x532d8880, 0x9eb5a146,
-  0x5328c1d0, 0x9eb18c26, 0x5323faec, 0x9ead7742, 0x531f33d5, 0x9ea96299,
-    0x531a6c8b, 0x9ea54e2d,
-  0x5315a50e, 0x9ea139fd, 0x5310dd5d, 0x9e9d2608, 0x530c1579, 0x9e991250,
-    0x53074d62, 0x9e94fed4,
-  0x53028518, 0x9e90eb94, 0x52fdbc9a, 0x9e8cd890, 0x52f8f3e9, 0x9e88c5c9,
-    0x52f42b05, 0x9e84b33d,
-  0x52ef61ee, 0x9e80a0ee, 0x52ea98a4, 0x9e7c8eda, 0x52e5cf27, 0x9e787d03,
-    0x52e10576, 0x9e746b68,
-  0x52dc3b92, 0x9e705a09, 0x52d7717b, 0x9e6c48e7, 0x52d2a732, 0x9e683800,
-    0x52cddcb5, 0x9e642756,
-  0x52c91204, 0x9e6016e8, 0x52c44721, 0x9e5c06b6, 0x52bf7c0b, 0x9e57f6c0,
-    0x52bab0c2, 0x9e53e707,
-  0x52b5e546, 0x9e4fd78a, 0x52b11996, 0x9e4bc849, 0x52ac4db4, 0x9e47b944,
-    0x52a7819f, 0x9e43aa7c,
-  0x52a2b556, 0x9e3f9bf0, 0x529de8db, 0x9e3b8da0, 0x52991c2d, 0x9e377f8c,
-    0x52944f4c, 0x9e3371b5,
-  0x528f8238, 0x9e2f641b, 0x528ab4f1, 0x9e2b56bc, 0x5285e777, 0x9e27499a,
-    0x528119ca, 0x9e233cb4,
-  0x527c4bea, 0x9e1f300b, 0x52777dd7, 0x9e1b239e, 0x5272af92, 0x9e17176d,
-    0x526de11a, 0x9e130b79,
-  0x5269126e, 0x9e0effc1, 0x52644390, 0x9e0af446, 0x525f7480, 0x9e06e907,
-    0x525aa53c, 0x9e02de04,
-  0x5255d5c5, 0x9dfed33e, 0x5251061c, 0x9dfac8b4, 0x524c3640, 0x9df6be67,
-    0x52476631, 0x9df2b456,
-  0x524295f0, 0x9deeaa82, 0x523dc57b, 0x9deaa0ea, 0x5238f4d4, 0x9de6978f,
-    0x523423fb, 0x9de28e70,
-  0x522f52ee, 0x9dde858e, 0x522a81af, 0x9dda7ce9, 0x5225b03d, 0x9dd6747f,
-    0x5220de99, 0x9dd26c53,
-  0x521c0cc2, 0x9dce6463, 0x52173ab8, 0x9dca5caf, 0x5212687b, 0x9dc65539,
-    0x520d960c, 0x9dc24dfe,
-  0x5208c36a, 0x9dbe4701, 0x5203f096, 0x9dba4040, 0x51ff1d8f, 0x9db639bb,
-    0x51fa4a56, 0x9db23373,
-  0x51f576ea, 0x9dae2d68, 0x51f0a34b, 0x9daa279a, 0x51ebcf7a, 0x9da62208,
-    0x51e6fb76, 0x9da21cb2,
-  0x51e22740, 0x9d9e179a, 0x51dd52d7, 0x9d9a12be, 0x51d87e3c, 0x9d960e1f,
-    0x51d3a96f, 0x9d9209bd,
-  0x51ced46e, 0x9d8e0597, 0x51c9ff3c, 0x9d8a01ae, 0x51c529d7, 0x9d85fe02,
-    0x51c0543f, 0x9d81fa92,
-  0x51bb7e75, 0x9d7df75f, 0x51b6a879, 0x9d79f469, 0x51b1d24a, 0x9d75f1b0,
-    0x51acfbe9, 0x9d71ef34,
-  0x51a82555, 0x9d6decf4, 0x51a34e8f, 0x9d69eaf1, 0x519e7797, 0x9d65e92b,
-    0x5199a06d, 0x9d61e7a2,
-  0x5194c910, 0x9d5de656, 0x518ff180, 0x9d59e546, 0x518b19bf, 0x9d55e473,
-    0x518641cb, 0x9d51e3dd,
-  0x518169a5, 0x9d4de385, 0x517c914c, 0x9d49e368, 0x5177b8c2, 0x9d45e389,
-    0x5172e005, 0x9d41e3e7,
-  0x516e0715, 0x9d3de482, 0x51692df4, 0x9d39e559, 0x516454a0, 0x9d35e66e,
-    0x515f7b1a, 0x9d31e7bf,
-  0x515aa162, 0x9d2de94d, 0x5155c778, 0x9d29eb19, 0x5150ed5c, 0x9d25ed21,
-    0x514c130d, 0x9d21ef66,
-  0x5147388c, 0x9d1df1e9, 0x51425dd9, 0x9d19f4a8, 0x513d82f4, 0x9d15f7a4,
-    0x5138a7dd, 0x9d11fadd,
-  0x5133cc94, 0x9d0dfe54, 0x512ef119, 0x9d0a0207, 0x512a156b, 0x9d0605f7,
-    0x5125398c, 0x9d020a25,
-  0x51205d7b, 0x9cfe0e8f, 0x511b8137, 0x9cfa1337, 0x5116a4c1, 0x9cf6181c,
-    0x5111c81a, 0x9cf21d3d,
-  0x510ceb40, 0x9cee229c, 0x51080e35, 0x9cea2838, 0x510330f7, 0x9ce62e11,
-    0x50fe5388, 0x9ce23427,
-  0x50f975e6, 0x9cde3a7b, 0x50f49813, 0x9cda410b, 0x50efba0d, 0x9cd647d9,
-    0x50eadbd6, 0x9cd24ee4,
-  0x50e5fd6d, 0x9cce562c, 0x50e11ed2, 0x9cca5db1, 0x50dc4005, 0x9cc66573,
-    0x50d76106, 0x9cc26d73,
-  0x50d281d5, 0x9cbe75b0, 0x50cda272, 0x9cba7e2a, 0x50c8c2de, 0x9cb686e1,
-    0x50c3e317, 0x9cb28fd5,
-  0x50bf031f, 0x9cae9907, 0x50ba22f5, 0x9caaa276, 0x50b5429a, 0x9ca6ac23,
-    0x50b0620c, 0x9ca2b60c,
-  0x50ab814d, 0x9c9ec033, 0x50a6a05c, 0x9c9aca97, 0x50a1bf39, 0x9c96d539,
-    0x509cdde4, 0x9c92e017,
-  0x5097fc5e, 0x9c8eeb34, 0x50931aa6, 0x9c8af68d, 0x508e38bd, 0x9c870224,
-    0x508956a1, 0x9c830df8,
-  0x50847454, 0x9c7f1a0a, 0x507f91d5, 0x9c7b2659, 0x507aaf25, 0x9c7732e5,
-    0x5075cc43, 0x9c733faf,
-  0x5070e92f, 0x9c6f4cb6, 0x506c05ea, 0x9c6b59fa, 0x50672273, 0x9c67677c,
-    0x50623ecb, 0x9c63753c,
-  0x505d5af1, 0x9c5f8339, 0x505876e5, 0x9c5b9173, 0x505392a8, 0x9c579feb,
-    0x504eae39, 0x9c53aea0,
-  0x5049c999, 0x9c4fbd93, 0x5044e4c7, 0x9c4bccc3, 0x503fffc4, 0x9c47dc31,
-    0x503b1a8f, 0x9c43ebdc,
-  0x50363529, 0x9c3ffbc5, 0x50314f91, 0x9c3c0beb, 0x502c69c8, 0x9c381c4f,
-    0x502783cd, 0x9c342cf0,
-  0x50229da1, 0x9c303dcf, 0x501db743, 0x9c2c4eec, 0x5018d0b4, 0x9c286046,
-    0x5013e9f4, 0x9c2471de,
-  0x500f0302, 0x9c2083b3, 0x500a1bdf, 0x9c1c95c6, 0x5005348a, 0x9c18a816,
-    0x50004d04, 0x9c14baa4,
-  0x4ffb654d, 0x9c10cd70, 0x4ff67d64, 0x9c0ce07a, 0x4ff1954b, 0x9c08f3c1,
-    0x4fecacff, 0x9c050745,
-  0x4fe7c483, 0x9c011b08, 0x4fe2dbd5, 0x9bfd2f08, 0x4fddf2f6, 0x9bf94346,
-    0x4fd909e5, 0x9bf557c1,
-  0x4fd420a4, 0x9bf16c7a, 0x4fcf3731, 0x9bed8171, 0x4fca4d8d, 0x9be996a6,
-    0x4fc563b7, 0x9be5ac18,
-  0x4fc079b1, 0x9be1c1c8, 0x4fbb8f79, 0x9bddd7b6, 0x4fb6a510, 0x9bd9ede2,
-    0x4fb1ba76, 0x9bd6044b,
-  0x4faccfab, 0x9bd21af3, 0x4fa7e4af, 0x9bce31d8, 0x4fa2f981, 0x9bca48fa,
-    0x4f9e0e22, 0x9bc6605b,
-  0x4f992293, 0x9bc277fa, 0x4f9436d2, 0x9bbe8fd6, 0x4f8f4ae0, 0x9bbaa7f0,
-    0x4f8a5ebd, 0x9bb6c048,
-  0x4f857269, 0x9bb2d8de, 0x4f8085e4, 0x9baef1b2, 0x4f7b992d, 0x9bab0ac3,
-    0x4f76ac46, 0x9ba72413,
-  0x4f71bf2e, 0x9ba33da0, 0x4f6cd1e5, 0x9b9f576b, 0x4f67e46a, 0x9b9b7174,
-    0x4f62f6bf, 0x9b978bbc,
-  0x4f5e08e3, 0x9b93a641, 0x4f591ad6, 0x9b8fc104, 0x4f542c98, 0x9b8bdc05,
-    0x4f4f3e29, 0x9b87f744,
-  0x4f4a4f89, 0x9b8412c1, 0x4f4560b8, 0x9b802e7b, 0x4f4071b6, 0x9b7c4a74,
-    0x4f3b8284, 0x9b7866ab,
-  0x4f369320, 0x9b748320, 0x4f31a38c, 0x9b709fd3, 0x4f2cb3c7, 0x9b6cbcc4,
-    0x4f27c3d1, 0x9b68d9f3,
-  0x4f22d3aa, 0x9b64f760, 0x4f1de352, 0x9b61150b, 0x4f18f2c9, 0x9b5d32f4,
-    0x4f140210, 0x9b59511c,
-  0x4f0f1126, 0x9b556f81, 0x4f0a200b, 0x9b518e24, 0x4f052ec0, 0x9b4dad06,
-    0x4f003d43, 0x9b49cc26,
-  0x4efb4b96, 0x9b45eb83, 0x4ef659b8, 0x9b420b1f, 0x4ef167aa, 0x9b3e2af9,
-    0x4eec756b, 0x9b3a4b11,
-  0x4ee782fb, 0x9b366b68, 0x4ee2905a, 0x9b328bfc, 0x4edd9d89, 0x9b2eaccf,
-    0x4ed8aa87, 0x9b2acde0,
-  0x4ed3b755, 0x9b26ef2f, 0x4ecec3f2, 0x9b2310bc, 0x4ec9d05e, 0x9b1f3288,
-    0x4ec4dc99, 0x9b1b5492,
-  0x4ebfe8a5, 0x9b1776da, 0x4ebaf47f, 0x9b139960, 0x4eb60029, 0x9b0fbc24,
-    0x4eb10ba2, 0x9b0bdf27,
-  0x4eac16eb, 0x9b080268, 0x4ea72203, 0x9b0425e8, 0x4ea22ceb, 0x9b0049a5,
-    0x4e9d37a3, 0x9afc6da1,
-  0x4e984229, 0x9af891db, 0x4e934c80, 0x9af4b654, 0x4e8e56a5, 0x9af0db0b,
-    0x4e89609b, 0x9aed0000,
-  0x4e846a60, 0x9ae92533, 0x4e7f73f4, 0x9ae54aa5, 0x4e7a7d58, 0x9ae17056,
-    0x4e75868c, 0x9add9644,
-  0x4e708f8f, 0x9ad9bc71, 0x4e6b9862, 0x9ad5e2dd, 0x4e66a105, 0x9ad20987,
-    0x4e61a977, 0x9ace306f,
-  0x4e5cb1b9, 0x9aca5795, 0x4e57b9ca, 0x9ac67efb, 0x4e52c1ab, 0x9ac2a69e,
-    0x4e4dc95c, 0x9abece80,
-  0x4e48d0dd, 0x9abaf6a1, 0x4e43d82d, 0x9ab71eff, 0x4e3edf4d, 0x9ab3479d,
-    0x4e39e63d, 0x9aaf7079,
-  0x4e34ecfc, 0x9aab9993, 0x4e2ff38b, 0x9aa7c2ec, 0x4e2af9ea, 0x9aa3ec83,
-    0x4e260019, 0x9aa01659,
-  0x4e210617, 0x9a9c406e, 0x4e1c0be6, 0x9a986ac1, 0x4e171184, 0x9a949552,
-    0x4e1216f2, 0x9a90c022,
-  0x4e0d1c30, 0x9a8ceb31, 0x4e08213e, 0x9a89167e, 0x4e03261b, 0x9a85420a,
-    0x4dfe2ac9, 0x9a816dd5,
-  0x4df92f46, 0x9a7d99de, 0x4df43393, 0x9a79c625, 0x4def37b0, 0x9a75f2ac,
-    0x4dea3b9d, 0x9a721f71,
-  0x4de53f5a, 0x9a6e4c74, 0x4de042e7, 0x9a6a79b6, 0x4ddb4644, 0x9a66a737,
-    0x4dd64971, 0x9a62d4f7,
-  0x4dd14c6e, 0x9a5f02f5, 0x4dcc4f3b, 0x9a5b3132, 0x4dc751d8, 0x9a575fae,
-    0x4dc25445, 0x9a538e68,
-  0x4dbd5682, 0x9a4fbd61, 0x4db8588f, 0x9a4bec99, 0x4db35a6c, 0x9a481c0f,
-    0x4dae5c19, 0x9a444bc5,
-  0x4da95d96, 0x9a407bb9, 0x4da45ee3, 0x9a3cabeb, 0x4d9f6001, 0x9a38dc5d,
-    0x4d9a60ee, 0x9a350d0d,
-  0x4d9561ac, 0x9a313dfc, 0x4d90623a, 0x9a2d6f2a, 0x4d8b6298, 0x9a29a097,
-    0x4d8662c6, 0x9a25d243,
-  0x4d8162c4, 0x9a22042d, 0x4d7c6293, 0x9a1e3656, 0x4d776231, 0x9a1a68be,
-    0x4d7261a0, 0x9a169b65,
-  0x4d6d60df, 0x9a12ce4b, 0x4d685fef, 0x9a0f016f, 0x4d635ece, 0x9a0b34d3,
-    0x4d5e5d7e, 0x9a076875,
-  0x4d595bfe, 0x9a039c57, 0x4d545a4f, 0x99ffd077, 0x4d4f5870, 0x99fc04d6,
-    0x4d4a5661, 0x99f83974,
-  0x4d455422, 0x99f46e51, 0x4d4051b4, 0x99f0a36d, 0x4d3b4f16, 0x99ecd8c8,
-    0x4d364c48, 0x99e90e62,
-  0x4d31494b, 0x99e5443b, 0x4d2c461e, 0x99e17a53, 0x4d2742c2, 0x99ddb0aa,
-    0x4d223f36, 0x99d9e73f,
-  0x4d1d3b7a, 0x99d61e14, 0x4d18378f, 0x99d25528, 0x4d133374, 0x99ce8c7b,
-    0x4d0e2f2a, 0x99cac40d,
-  0x4d092ab0, 0x99c6fbde, 0x4d042607, 0x99c333ee, 0x4cff212e, 0x99bf6c3d,
-    0x4cfa1c26, 0x99bba4cb,
-  0x4cf516ee, 0x99b7dd99, 0x4cf01187, 0x99b416a5, 0x4ceb0bf0, 0x99b04ff0,
-    0x4ce6062a, 0x99ac897b,
-  0x4ce10034, 0x99a8c345, 0x4cdbfa0f, 0x99a4fd4d, 0x4cd6f3bb, 0x99a13795,
-    0x4cd1ed37, 0x999d721c,
-  0x4ccce684, 0x9999ace3, 0x4cc7dfa1, 0x9995e7e8, 0x4cc2d88f, 0x9992232d,
-    0x4cbdd14e, 0x998e5eb1,
-  0x4cb8c9dd, 0x998a9a74, 0x4cb3c23d, 0x9986d676, 0x4caeba6e, 0x998312b7,
-    0x4ca9b26f, 0x997f4f38,
-  0x4ca4aa41, 0x997b8bf8, 0x4c9fa1e4, 0x9977c8f7, 0x4c9a9958, 0x99740635,
-    0x4c95909c, 0x997043b2,
-  0x4c9087b1, 0x996c816f, 0x4c8b7e97, 0x9968bf6b, 0x4c86754e, 0x9964fda7,
-    0x4c816bd5, 0x99613c22,
-  0x4c7c622d, 0x995d7adc, 0x4c775856, 0x9959b9d5, 0x4c724e50, 0x9955f90d,
-    0x4c6d441b, 0x99523885,
-  0x4c6839b7, 0x994e783d, 0x4c632f23, 0x994ab833, 0x4c5e2460, 0x9946f869,
-    0x4c59196f, 0x994338df,
-  0x4c540e4e, 0x993f7993, 0x4c4f02fe, 0x993bba87, 0x4c49f77f, 0x9937fbbb,
-    0x4c44ebd1, 0x99343d2e,
-  0x4c3fdff4, 0x99307ee0, 0x4c3ad3e7, 0x992cc0d2, 0x4c35c7ac, 0x99290303,
-    0x4c30bb42, 0x99254574,
-  0x4c2baea9, 0x99218824, 0x4c26a1e1, 0x991dcb13, 0x4c2194e9, 0x991a0e42,
-    0x4c1c87c3, 0x991651b1,
-  0x4c177a6e, 0x9912955f, 0x4c126cea, 0x990ed94c, 0x4c0d5f37, 0x990b1d79,
-    0x4c085156, 0x990761e5,
-  0x4c034345, 0x9903a691, 0x4bfe3505, 0x98ffeb7d, 0x4bf92697, 0x98fc30a8,
-    0x4bf417f9, 0x98f87612,
-  0x4bef092d, 0x98f4bbbc, 0x4be9fa32, 0x98f101a6, 0x4be4eb08, 0x98ed47cf,
-    0x4bdfdbaf, 0x98e98e38,
-  0x4bdacc28, 0x98e5d4e0, 0x4bd5bc72, 0x98e21bc8, 0x4bd0ac8d, 0x98de62f0,
-    0x4bcb9c79, 0x98daaa57,
-  0x4bc68c36, 0x98d6f1fe, 0x4bc17bc5, 0x98d339e4, 0x4bbc6b25, 0x98cf820b,
-    0x4bb75a56, 0x98cbca70,
-  0x4bb24958, 0x98c81316, 0x4bad382c, 0x98c45bfb, 0x4ba826d1, 0x98c0a520,
-    0x4ba31548, 0x98bcee84,
-  0x4b9e0390, 0x98b93828, 0x4b98f1a9, 0x98b5820c, 0x4b93df93, 0x98b1cc30,
-    0x4b8ecd4f, 0x98ae1693,
-  0x4b89badd, 0x98aa6136, 0x4b84a83b, 0x98a6ac19, 0x4b7f956b, 0x98a2f73c,
-    0x4b7a826d, 0x989f429e,
-  0x4b756f40, 0x989b8e40, 0x4b705be4, 0x9897da22, 0x4b6b485a, 0x98942643,
-    0x4b6634a2, 0x989072a5,
-  0x4b6120bb, 0x988cbf46, 0x4b5c0ca5, 0x98890c27, 0x4b56f861, 0x98855948,
-    0x4b51e3ee, 0x9881a6a9,
-  0x4b4ccf4d, 0x987df449, 0x4b47ba7e, 0x987a422a, 0x4b42a580, 0x9876904a,
-    0x4b3d9053, 0x9872deaa,
-  0x4b387af9, 0x986f2d4a, 0x4b336570, 0x986b7c2a, 0x4b2e4fb8, 0x9867cb4a,
-    0x4b2939d2, 0x98641aa9,
-  0x4b2423be, 0x98606a49, 0x4b1f0d7b, 0x985cba28, 0x4b19f70a, 0x98590a48,
-    0x4b14e06b, 0x98555aa7,
-  0x4b0fc99d, 0x9851ab46, 0x4b0ab2a1, 0x984dfc26, 0x4b059b77, 0x984a4d45,
-    0x4b00841f, 0x98469ea4,
-  0x4afb6c98, 0x9842f043, 0x4af654e3, 0x983f4223, 0x4af13d00, 0x983b9442,
-    0x4aec24ee, 0x9837e6a1,
-  0x4ae70caf, 0x98343940, 0x4ae1f441, 0x98308c1f, 0x4adcdba5, 0x982cdf3f,
-    0x4ad7c2da, 0x9829329e,
-  0x4ad2a9e2, 0x9825863d, 0x4acd90bb, 0x9821da1d, 0x4ac87767, 0x981e2e3c,
-    0x4ac35de4, 0x981a829c,
-  0x4abe4433, 0x9816d73b, 0x4ab92a54, 0x98132c1b, 0x4ab41046, 0x980f813b,
-    0x4aaef60b, 0x980bd69b,
-  0x4aa9dba2, 0x98082c3b, 0x4aa4c10b, 0x9804821b, 0x4a9fa645, 0x9800d83c,
-    0x4a9a8b52, 0x97fd2e9c,
-  0x4a957030, 0x97f9853d, 0x4a9054e1, 0x97f5dc1e, 0x4a8b3963, 0x97f2333f,
-    0x4a861db8, 0x97ee8aa0,
-  0x4a8101de, 0x97eae242, 0x4a7be5d7, 0x97e73a23, 0x4a76c9a2, 0x97e39245,
-    0x4a71ad3e, 0x97dfeaa7,
-  0x4a6c90ad, 0x97dc4349, 0x4a6773ee, 0x97d89c2c, 0x4a625701, 0x97d4f54f,
-    0x4a5d39e6, 0x97d14eb2,
-  0x4a581c9e, 0x97cda855, 0x4a52ff27, 0x97ca0239, 0x4a4de182, 0x97c65c5c,
-    0x4a48c3b0, 0x97c2b6c1,
-  0x4a43a5b0, 0x97bf1165, 0x4a3e8782, 0x97bb6c4a, 0x4a396926, 0x97b7c76f,
-    0x4a344a9d, 0x97b422d4,
-  0x4a2f2be6, 0x97b07e7a, 0x4a2a0d01, 0x97acda60, 0x4a24edee, 0x97a93687,
-    0x4a1fcead, 0x97a592ed,
-  0x4a1aaf3f, 0x97a1ef94, 0x4a158fa3, 0x979e4c7c, 0x4a106fda, 0x979aa9a4,
-    0x4a0b4fe2, 0x9797070c,
-  0x4a062fbd, 0x979364b5, 0x4a010f6b, 0x978fc29e, 0x49fbeeea, 0x978c20c8,
-    0x49f6ce3c, 0x97887f32,
-  0x49f1ad61, 0x9784dddc, 0x49ec8c57, 0x97813cc7, 0x49e76b21, 0x977d9bf2,
-    0x49e249bc, 0x9779fb5e,
-  0x49dd282a, 0x97765b0a, 0x49d8066b, 0x9772baf7, 0x49d2e47e, 0x976f1b24,
-    0x49cdc263, 0x976b7b92,
-  0x49c8a01b, 0x9767dc41, 0x49c37da5, 0x97643d2f, 0x49be5b02, 0x97609e5f,
-    0x49b93832, 0x975cffcf,
-  0x49b41533, 0x9759617f, 0x49aef208, 0x9755c370, 0x49a9ceaf, 0x975225a1,
-    0x49a4ab28, 0x974e8813,
-  0x499f8774, 0x974aeac6, 0x499a6393, 0x97474db9, 0x49953f84, 0x9743b0ed,
-    0x49901b48, 0x97401462,
-  0x498af6df, 0x973c7817, 0x4985d248, 0x9738dc0d, 0x4980ad84, 0x97354043,
-    0x497b8892, 0x9731a4ba,
-  0x49766373, 0x972e0971, 0x49713e27, 0x972a6e6a, 0x496c18ae, 0x9726d3a3,
-    0x4966f307, 0x9723391c,
-  0x4961cd33, 0x971f9ed7, 0x495ca732, 0x971c04d2, 0x49578103, 0x97186b0d,
-    0x49525aa7, 0x9714d18a,
-  0x494d341e, 0x97113847, 0x49480d68, 0x970d9f45, 0x4942e684, 0x970a0683,
-    0x493dbf74, 0x97066e03,
-  0x49389836, 0x9702d5c3, 0x493370cb, 0x96ff3dc4, 0x492e4933, 0x96fba605,
-    0x4929216e, 0x96f80e88,
-  0x4923f97b, 0x96f4774b, 0x491ed15c, 0x96f0e04f, 0x4919a90f, 0x96ed4994,
-    0x49148095, 0x96e9b319,
-  0x490f57ee, 0x96e61ce0, 0x490a2f1b, 0x96e286e7, 0x4905061a, 0x96def12f,
-    0x48ffdcec, 0x96db5bb8,
-  0x48fab391, 0x96d7c682, 0x48f58a09, 0x96d4318d, 0x48f06054, 0x96d09cd8,
-    0x48eb3672, 0x96cd0865,
-  0x48e60c62, 0x96c97432, 0x48e0e227, 0x96c5e040, 0x48dbb7be, 0x96c24c8f,
-    0x48d68d28, 0x96beb91f,
-  0x48d16265, 0x96bb25f0, 0x48cc3775, 0x96b79302, 0x48c70c59, 0x96b40055,
-    0x48c1e10f, 0x96b06de9,
-  0x48bcb599, 0x96acdbbe, 0x48b789f5, 0x96a949d3, 0x48b25e25, 0x96a5b82a,
-    0x48ad3228, 0x96a226c2,
-  0x48a805ff, 0x969e959b, 0x48a2d9a8, 0x969b04b4, 0x489dad25, 0x9697740f,
-    0x48988074, 0x9693e3ab,
-  0x48935397, 0x96905388, 0x488e268e, 0x968cc3a5, 0x4888f957, 0x96893404,
-    0x4883cbf4, 0x9685a4a4,
-  0x487e9e64, 0x96821585, 0x487970a7, 0x967e86a7, 0x487442be, 0x967af80a,
-    0x486f14a8, 0x967769af,
-  0x4869e665, 0x9673db94, 0x4864b7f5, 0x96704dba, 0x485f8959, 0x966cc022,
-    0x485a5a90, 0x966932cb,
-  0x48552b9b, 0x9665a5b4, 0x484ffc79, 0x966218df, 0x484acd2a, 0x965e8c4b,
-    0x48459daf, 0x965afff9,
-  0x48406e08, 0x965773e7, 0x483b3e33, 0x9653e817, 0x48360e32, 0x96505c88,
-    0x4830de05, 0x964cd139,
-  0x482badab, 0x9649462d, 0x48267d24, 0x9645bb61, 0x48214c71, 0x964230d7,
-    0x481c1b92, 0x963ea68d,
-  0x4816ea86, 0x963b1c86, 0x4811b94d, 0x963792bf, 0x480c87e8, 0x96340939,
-    0x48075657, 0x96307ff5,
-  0x48022499, 0x962cf6f2, 0x47fcf2af, 0x96296e31, 0x47f7c099, 0x9625e5b0,
-    0x47f28e56, 0x96225d71,
-  0x47ed5be6, 0x961ed574, 0x47e8294a, 0x961b4db7, 0x47e2f682, 0x9617c63c,
-    0x47ddc38e, 0x96143f02,
-  0x47d8906d, 0x9610b80a, 0x47d35d20, 0x960d3153, 0x47ce29a7, 0x9609aadd,
-    0x47c8f601, 0x960624a9,
-  0x47c3c22f, 0x96029eb6, 0x47be8e31, 0x95ff1904, 0x47b95a06, 0x95fb9394,
-    0x47b425af, 0x95f80e65,
-  0x47aef12c, 0x95f48977, 0x47a9bc7d, 0x95f104cb, 0x47a487a2, 0x95ed8061,
-    0x479f529a, 0x95e9fc38,
-  0x479a1d67, 0x95e67850, 0x4794e807, 0x95e2f4a9, 0x478fb27b, 0x95df7145,
-    0x478a7cc2, 0x95dbee21,
-  0x478546de, 0x95d86b3f, 0x478010cd, 0x95d4e89f, 0x477ada91, 0x95d16640,
-    0x4775a428, 0x95cde423,
-  0x47706d93, 0x95ca6247, 0x476b36d3, 0x95c6e0ac, 0x4765ffe6, 0x95c35f53,
-    0x4760c8cd, 0x95bfde3c,
-  0x475b9188, 0x95bc5d66, 0x47565a17, 0x95b8dcd2, 0x4751227a, 0x95b55c7f,
-    0x474beab1, 0x95b1dc6e,
-  0x4746b2bc, 0x95ae5c9f, 0x47417a9b, 0x95aadd11, 0x473c424e, 0x95a75dc4,
-    0x473709d5, 0x95a3deb9,
-  0x4731d131, 0x95a05ff0, 0x472c9860, 0x959ce169, 0x47275f63, 0x95996323,
-    0x4722263b, 0x9595e51e,
-  0x471cece7, 0x9592675c, 0x4717b367, 0x958ee9db, 0x471279ba, 0x958b6c9b,
-    0x470d3fe3, 0x9587ef9e,
-  0x470805df, 0x958472e2, 0x4702cbaf, 0x9580f667, 0x46fd9154, 0x957d7a2f,
-    0x46f856cd, 0x9579fe38,
-  0x46f31c1a, 0x95768283, 0x46ede13b, 0x9573070f, 0x46e8a631, 0x956f8bdd,
-    0x46e36afb, 0x956c10ed,
-  0x46de2f99, 0x9568963f, 0x46d8f40b, 0x95651bd2, 0x46d3b852, 0x9561a1a8,
-    0x46ce7c6d, 0x955e27bf,
-  0x46c9405c, 0x955aae17, 0x46c40420, 0x955734b2, 0x46bec7b8, 0x9553bb8e,
-    0x46b98b24, 0x955042ac,
-  0x46b44e65, 0x954cca0c, 0x46af117a, 0x954951ae, 0x46a9d464, 0x9545d992,
-    0x46a49722, 0x954261b7,
-  0x469f59b4, 0x953eea1e, 0x469a1c1b, 0x953b72c7, 0x4694de56, 0x9537fbb2,
-    0x468fa066, 0x953484df,
-  0x468a624a, 0x95310e4e, 0x46852403, 0x952d97fe, 0x467fe590, 0x952a21f1,
-    0x467aa6f2, 0x9526ac25,
-  0x46756828, 0x9523369c, 0x46702933, 0x951fc154, 0x466aea12, 0x951c4c4e,
-    0x4665aac6, 0x9518d78a,
-  0x46606b4e, 0x95156308, 0x465b2bab, 0x9511eec8, 0x4655ebdd, 0x950e7aca,
-    0x4650abe3, 0x950b070e,
-  0x464b6bbe, 0x95079394, 0x46462b6d, 0x9504205c, 0x4640eaf2, 0x9500ad66,
-    0x463baa4a, 0x94fd3ab1,
-  0x46366978, 0x94f9c83f, 0x4631287a, 0x94f6560f, 0x462be751, 0x94f2e421,
-    0x4626a5fd, 0x94ef7275,
-  0x4621647d, 0x94ec010b, 0x461c22d2, 0x94e88fe3, 0x4616e0fc, 0x94e51efd,
-    0x46119efa, 0x94e1ae59,
-  0x460c5cce, 0x94de3df8, 0x46071a76, 0x94dacdd8, 0x4601d7f3, 0x94d75dfa,
-    0x45fc9545, 0x94d3ee5f,
-  0x45f7526b, 0x94d07f05, 0x45f20f67, 0x94cd0fee, 0x45eccc37, 0x94c9a119,
-    0x45e788dc, 0x94c63286,
-  0x45e24556, 0x94c2c435, 0x45dd01a5, 0x94bf5627, 0x45d7bdc9, 0x94bbe85a,
-    0x45d279c2, 0x94b87ad0,
-  0x45cd358f, 0x94b50d87, 0x45c7f132, 0x94b1a081, 0x45c2acaa, 0x94ae33be,
-    0x45bd67f6, 0x94aac73c,
-  0x45b82318, 0x94a75afd, 0x45b2de0e, 0x94a3eeff, 0x45ad98da, 0x94a08344,
-    0x45a8537a, 0x949d17cc,
-  0x45a30df0, 0x9499ac95, 0x459dc83b, 0x949641a1, 0x4598825a, 0x9492d6ef,
-    0x45933c4f, 0x948f6c7f,
-  0x458df619, 0x948c0252, 0x4588afb8, 0x94889867, 0x4583692c, 0x94852ebe,
-    0x457e2275, 0x9481c557,
-  0x4578db93, 0x947e5c33, 0x45739487, 0x947af351, 0x456e4d4f, 0x94778ab1,
-    0x456905ed, 0x94742254,
-  0x4563be60, 0x9470ba39, 0x455e76a8, 0x946d5260, 0x45592ec6, 0x9469eaca,
-    0x4553e6b8, 0x94668376,
-  0x454e9e80, 0x94631c65, 0x4549561d, 0x945fb596, 0x45440d90, 0x945c4f09,
-    0x453ec4d7, 0x9458e8bf,
-  0x45397bf4, 0x945582b7, 0x453432e6, 0x94521cf1, 0x452ee9ae, 0x944eb76e,
-    0x4529a04b, 0x944b522d,
-  0x452456bd, 0x9447ed2f, 0x451f0d04, 0x94448873, 0x4519c321, 0x944123fa,
-    0x45147913, 0x943dbfc3,
-  0x450f2edb, 0x943a5bcf, 0x4509e478, 0x9436f81d, 0x450499eb, 0x943394ad,
-    0x44ff4f32, 0x94303180,
-  0x44fa0450, 0x942cce96, 0x44f4b943, 0x94296bee, 0x44ef6e0b, 0x94260989,
-    0x44ea22a9, 0x9422a766,
-  0x44e4d71c, 0x941f4585, 0x44df8b64, 0x941be3e8, 0x44da3f83, 0x9418828c,
-    0x44d4f376, 0x94152174,
-  0x44cfa740, 0x9411c09e, 0x44ca5adf, 0x940e600a, 0x44c50e53, 0x940affb9,
-    0x44bfc19d, 0x94079fab,
-  0x44ba74bd, 0x94043fdf, 0x44b527b2, 0x9400e056, 0x44afda7d, 0x93fd810f,
-    0x44aa8d1d, 0x93fa220b,
-  0x44a53f93, 0x93f6c34a, 0x449ff1df, 0x93f364cb, 0x449aa400, 0x93f0068f,
-    0x449555f7, 0x93eca896,
-  0x449007c4, 0x93e94adf, 0x448ab967, 0x93e5ed6b, 0x44856adf, 0x93e2903a,
-    0x44801c2d, 0x93df334c,
-  0x447acd50, 0x93dbd6a0, 0x44757e4a, 0x93d87a36, 0x44702f19, 0x93d51e10,
-    0x446adfbe, 0x93d1c22c,
-  0x44659039, 0x93ce668b, 0x44604089, 0x93cb0b2d, 0x445af0b0, 0x93c7b011,
-    0x4455a0ac, 0x93c45539,
-  0x4450507e, 0x93c0faa3, 0x444b0026, 0x93bda04f, 0x4445afa4, 0x93ba463f,
-    0x44405ef8, 0x93b6ec71,
-  0x443b0e21, 0x93b392e6, 0x4435bd21, 0x93b0399e, 0x44306bf6, 0x93ace099,
-    0x442b1aa2, 0x93a987d6,
-  0x4425c923, 0x93a62f57, 0x4420777b, 0x93a2d71a, 0x441b25a8, 0x939f7f20,
-    0x4415d3ab, 0x939c2769,
-  0x44108184, 0x9398cff5, 0x440b2f34, 0x939578c3, 0x4405dcb9, 0x939221d5,
-    0x44008a14, 0x938ecb29,
-  0x43fb3746, 0x938b74c1, 0x43f5e44d, 0x93881e9b, 0x43f0912b, 0x9384c8b8,
-    0x43eb3ddf, 0x93817318,
-  0x43e5ea68, 0x937e1dbb, 0x43e096c8, 0x937ac8a1, 0x43db42fe, 0x937773ca,
-    0x43d5ef0a, 0x93741f35,
-  0x43d09aed, 0x9370cae4, 0x43cb46a5, 0x936d76d6, 0x43c5f234, 0x936a230a,
-    0x43c09d99, 0x9366cf82,
-  0x43bb48d4, 0x93637c3d, 0x43b5f3e5, 0x9360293a, 0x43b09ecc, 0x935cd67b,
-    0x43ab498a, 0x935983ff,
-  0x43a5f41e, 0x935631c5, 0x43a09e89, 0x9352dfcf, 0x439b48c9, 0x934f8e1c,
-    0x4395f2e0, 0x934c3cab,
-  0x43909ccd, 0x9348eb7e, 0x438b4691, 0x93459a94, 0x4385f02a, 0x934249ed,
-    0x4380999b, 0x933ef989,
-  0x437b42e1, 0x933ba968, 0x4375ebfe, 0x9338598a, 0x437094f1, 0x933509f0,
-    0x436b3dbb, 0x9331ba98,
-  0x4365e65b, 0x932e6b84, 0x43608ed2, 0x932b1cb2, 0x435b371f, 0x9327ce24,
-    0x4355df42, 0x93247fd9,
-  0x4350873c, 0x932131d1, 0x434b2f0c, 0x931de40c, 0x4345d6b3, 0x931a968b,
-    0x43407e31, 0x9317494c,
-  0x433b2585, 0x9313fc51, 0x4335ccaf, 0x9310af99, 0x433073b0, 0x930d6324,
-    0x432b1a87, 0x930a16f3,
-  0x4325c135, 0x9306cb04, 0x432067ba, 0x93037f59, 0x431b0e15, 0x930033f1,
-    0x4315b447, 0x92fce8cc,
-  0x43105a50, 0x92f99deb, 0x430b002f, 0x92f6534c, 0x4305a5e5, 0x92f308f1,
-    0x43004b71, 0x92efbeda,
-  0x42faf0d4, 0x92ec7505, 0x42f5960e, 0x92e92b74, 0x42f03b1e, 0x92e5e226,
-    0x42eae005, 0x92e2991c,
-  0x42e584c3, 0x92df5054, 0x42e02958, 0x92dc07d0, 0x42dacdc3, 0x92d8bf90,
-    0x42d57205, 0x92d57792,
-  0x42d0161e, 0x92d22fd9, 0x42caba0e, 0x92cee862, 0x42c55dd4, 0x92cba12f,
-    0x42c00172, 0x92c85a3f,
-  0x42baa4e6, 0x92c51392, 0x42b54831, 0x92c1cd29, 0x42afeb53, 0x92be8703,
-    0x42aa8e4b, 0x92bb4121,
-  0x42a5311b, 0x92b7fb82, 0x429fd3c1, 0x92b4b626, 0x429a763f, 0x92b1710e,
-    0x42951893, 0x92ae2c3a,
-  0x428fbabe, 0x92aae7a8, 0x428a5cc0, 0x92a7a35a, 0x4284fe99, 0x92a45f50,
-    0x427fa049, 0x92a11b89,
-  0x427a41d0, 0x929dd806, 0x4274e32e, 0x929a94c6, 0x426f8463, 0x929751c9,
-    0x426a256f, 0x92940f10,
-  0x4264c653, 0x9290cc9b, 0x425f670d, 0x928d8a69, 0x425a079e, 0x928a487a,
-    0x4254a806, 0x928706cf,
-  0x424f4845, 0x9283c568, 0x4249e85c, 0x92808444, 0x42448849, 0x927d4363,
-    0x423f280e, 0x927a02c7,
-  0x4239c7aa, 0x9276c26d, 0x4234671d, 0x92738258, 0x422f0667, 0x92704286,
-    0x4229a588, 0x926d02f7,
-  0x42244481, 0x9269c3ac, 0x421ee350, 0x926684a5, 0x421981f7, 0x926345e1,
-    0x42142075, 0x92600761,
-  0x420ebecb, 0x925cc924, 0x42095cf7, 0x92598b2b, 0x4203fafb, 0x92564d76,
-    0x41fe98d6, 0x92531005,
-  0x41f93689, 0x924fd2d7, 0x41f3d413, 0x924c95ec, 0x41ee7174, 0x92495946,
-    0x41e90eac, 0x92461ce3,
-  0x41e3abbc, 0x9242e0c4, 0x41de48a3, 0x923fa4e8, 0x41d8e561, 0x923c6950,
-    0x41d381f7, 0x92392dfc,
-  0x41ce1e65, 0x9235f2ec, 0x41c8baa9, 0x9232b81f, 0x41c356c5, 0x922f7d96,
-    0x41bdf2b9, 0x922c4351,
-  0x41b88e84, 0x9229094f, 0x41b32a26, 0x9225cf91, 0x41adc5a0, 0x92229617,
-    0x41a860f1, 0x921f5ce1,
-  0x41a2fc1a, 0x921c23ef, 0x419d971b, 0x9218eb40, 0x419831f3, 0x9215b2d5,
-    0x4192cca2, 0x92127aae,
-  0x418d6729, 0x920f42cb, 0x41880188, 0x920c0b2c, 0x41829bbe, 0x9208d3d0,
-    0x417d35cb, 0x92059cb8,
-  0x4177cfb1, 0x920265e4, 0x4172696e, 0x91ff2f54, 0x416d0302, 0x91fbf908,
-    0x41679c6f, 0x91f8c300,
-  0x416235b2, 0x91f58d3b, 0x415ccece, 0x91f257bb, 0x415767c1, 0x91ef227e,
-    0x4152008c, 0x91ebed85,
-  0x414c992f, 0x91e8b8d0, 0x414731a9, 0x91e5845f, 0x4141c9fb, 0x91e25032,
-    0x413c6225, 0x91df1c49,
-  0x4136fa27, 0x91dbe8a4, 0x41319200, 0x91d8b542, 0x412c29b1, 0x91d58225,
-    0x4126c13a, 0x91d24f4c,
-  0x4121589b, 0x91cf1cb6, 0x411befd3, 0x91cbea65, 0x411686e4, 0x91c8b857,
-    0x41111dcc, 0x91c5868e,
-  0x410bb48c, 0x91c25508, 0x41064b24, 0x91bf23c7, 0x4100e194, 0x91bbf2c9,
-    0x40fb77dc, 0x91b8c210,
-  0x40f60dfb, 0x91b5919a, 0x40f0a3f3, 0x91b26169, 0x40eb39c3, 0x91af317c,
-    0x40e5cf6a, 0x91ac01d2,
-  0x40e064ea, 0x91a8d26d, 0x40dafa41, 0x91a5a34c, 0x40d58f71, 0x91a2746f,
-    0x40d02478, 0x919f45d6,
-  0x40cab958, 0x919c1781, 0x40c54e0f, 0x9198e970, 0x40bfe29f, 0x9195bba3,
-    0x40ba7706, 0x91928e1a,
-  0x40b50b46, 0x918f60d6, 0x40af9f5e, 0x918c33d5, 0x40aa334e, 0x91890719,
-    0x40a4c716, 0x9185daa1,
-  0x409f5ab6, 0x9182ae6d, 0x4099ee2e, 0x917f827d, 0x4094817f, 0x917c56d1,
-    0x408f14a7, 0x91792b6a,
-  0x4089a7a8, 0x91760047, 0x40843a81, 0x9172d567, 0x407ecd32, 0x916faacc,
-    0x40795fbc, 0x916c8076,
-  0x4073f21d, 0x91695663, 0x406e8457, 0x91662c95, 0x40691669, 0x9163030b,
-    0x4063a854, 0x915fd9c5,
-  0x405e3a16, 0x915cb0c3, 0x4058cbb1, 0x91598806, 0x40535d24, 0x91565f8d,
-    0x404dee70, 0x91533758,
-  0x40487f94, 0x91500f67, 0x40431090, 0x914ce7bb, 0x403da165, 0x9149c053,
-    0x40383212, 0x9146992f,
-  0x4032c297, 0x91437250, 0x402d52f5, 0x91404bb5, 0x4027e32b, 0x913d255e,
-    0x4022733a, 0x9139ff4b,
-  0x401d0321, 0x9136d97d, 0x401792e0, 0x9133b3f3, 0x40122278, 0x91308eae,
-    0x400cb1e9, 0x912d69ad,
-  0x40074132, 0x912a44f0, 0x4001d053, 0x91272078, 0x3ffc5f4d, 0x9123fc44,
-    0x3ff6ee1f, 0x9120d854,
-  0x3ff17cca, 0x911db4a9, 0x3fec0b4e, 0x911a9142, 0x3fe699aa, 0x91176e1f,
-    0x3fe127df, 0x91144b41,
-  0x3fdbb5ec, 0x911128a8, 0x3fd643d2, 0x910e0653, 0x3fd0d191, 0x910ae442,
-    0x3fcb5f28, 0x9107c276,
-  0x3fc5ec98, 0x9104a0ee, 0x3fc079e0, 0x91017faa, 0x3fbb0702, 0x90fe5eab,
-    0x3fb593fb, 0x90fb3df1,
-  0x3fb020ce, 0x90f81d7b, 0x3faaad79, 0x90f4fd4a, 0x3fa539fd, 0x90f1dd5d,
-    0x3f9fc65a, 0x90eebdb4,
-  0x3f9a5290, 0x90eb9e50, 0x3f94de9e, 0x90e87f31, 0x3f8f6a85, 0x90e56056,
-    0x3f89f645, 0x90e241bf,
-  0x3f8481dd, 0x90df236e, 0x3f7f0d4f, 0x90dc0560, 0x3f799899, 0x90d8e798,
-    0x3f7423bc, 0x90d5ca13,
-  0x3f6eaeb8, 0x90d2acd4, 0x3f69398d, 0x90cf8fd9, 0x3f63c43b, 0x90cc7322,
-    0x3f5e4ec2, 0x90c956b1,
-  0x3f58d921, 0x90c63a83, 0x3f53635a, 0x90c31e9b, 0x3f4ded6b, 0x90c002f7,
-    0x3f487755, 0x90bce797,
-  0x3f430119, 0x90b9cc7d, 0x3f3d8ab5, 0x90b6b1a6, 0x3f38142a, 0x90b39715,
-    0x3f329d79, 0x90b07cc8,
-  0x3f2d26a0, 0x90ad62c0, 0x3f27afa1, 0x90aa48fd, 0x3f22387a, 0x90a72f7e,
-    0x3f1cc12c, 0x90a41644,
-  0x3f1749b8, 0x90a0fd4e, 0x3f11d21d, 0x909de49e, 0x3f0c5a5a, 0x909acc32,
-    0x3f06e271, 0x9097b40a,
-  0x3f016a61, 0x90949c28, 0x3efbf22a, 0x9091848a, 0x3ef679cc, 0x908e6d31,
-    0x3ef10148, 0x908b561c,
-  0x3eeb889c, 0x90883f4d, 0x3ee60fca, 0x908528c2, 0x3ee096d1, 0x9082127c,
-    0x3edb1db1, 0x907efc7a,
-  0x3ed5a46b, 0x907be6be, 0x3ed02afd, 0x9078d146, 0x3ecab169, 0x9075bc13,
-    0x3ec537ae, 0x9072a725,
-  0x3ebfbdcd, 0x906f927c, 0x3eba43c4, 0x906c7e17, 0x3eb4c995, 0x906969f8,
-    0x3eaf4f40, 0x9066561d,
-  0x3ea9d4c3, 0x90634287, 0x3ea45a21, 0x90602f35, 0x3e9edf57, 0x905d1c29,
-    0x3e996467, 0x905a0962,
-  0x3e93e950, 0x9056f6df, 0x3e8e6e12, 0x9053e4a1, 0x3e88f2ae, 0x9050d2a9,
-    0x3e837724, 0x904dc0f5,
-  0x3e7dfb73, 0x904aaf86, 0x3e787f9b, 0x90479e5c, 0x3e73039d, 0x90448d76,
-    0x3e6d8778, 0x90417cd6,
-  0x3e680b2c, 0x903e6c7b, 0x3e628ebb, 0x903b5c64, 0x3e5d1222, 0x90384c93,
-    0x3e579564, 0x90353d06,
-  0x3e52187f, 0x90322dbf, 0x3e4c9b73, 0x902f1ebc, 0x3e471e41, 0x902c0fff,
-    0x3e41a0e8, 0x90290186,
-  0x3e3c2369, 0x9025f352, 0x3e36a5c4, 0x9022e564, 0x3e3127f9, 0x901fd7ba,
-    0x3e2baa07, 0x901cca55,
-  0x3e262bee, 0x9019bd36, 0x3e20adaf, 0x9016b05b, 0x3e1b2f4a, 0x9013a3c5,
-    0x3e15b0bf, 0x90109775,
-  0x3e10320d, 0x900d8b69, 0x3e0ab336, 0x900a7fa3, 0x3e053437, 0x90077422,
-    0x3dffb513, 0x900468e5,
-  0x3dfa35c8, 0x90015dee, 0x3df4b657, 0x8ffe533c, 0x3def36c0, 0x8ffb48cf,
-    0x3de9b703, 0x8ff83ea7,
-  0x3de4371f, 0x8ff534c4, 0x3ddeb716, 0x8ff22b26, 0x3dd936e6, 0x8fef21ce,
-    0x3dd3b690, 0x8fec18ba,
-  0x3dce3614, 0x8fe90fec, 0x3dc8b571, 0x8fe60763, 0x3dc334a9, 0x8fe2ff1f,
-    0x3dbdb3ba, 0x8fdff720,
-  0x3db832a6, 0x8fdcef66, 0x3db2b16b, 0x8fd9e7f2, 0x3dad300b, 0x8fd6e0c2,
-    0x3da7ae84, 0x8fd3d9d8,
-  0x3da22cd7, 0x8fd0d333, 0x3d9cab04, 0x8fcdccd3, 0x3d97290b, 0x8fcac6b9,
-    0x3d91a6ed, 0x8fc7c0e3,
-  0x3d8c24a8, 0x8fc4bb53, 0x3d86a23d, 0x8fc1b608, 0x3d811fac, 0x8fbeb103,
-    0x3d7b9cf6, 0x8fbbac42,
-  0x3d761a19, 0x8fb8a7c7, 0x3d709717, 0x8fb5a391, 0x3d6b13ee, 0x8fb29fa0,
-    0x3d6590a0, 0x8faf9bf5,
-  0x3d600d2c, 0x8fac988f, 0x3d5a8992, 0x8fa9956e, 0x3d5505d2, 0x8fa69293,
-    0x3d4f81ec, 0x8fa38ffc,
-  0x3d49fde1, 0x8fa08dab, 0x3d4479b0, 0x8f9d8ba0, 0x3d3ef559, 0x8f9a89da,
-    0x3d3970dc, 0x8f978859,
-  0x3d33ec39, 0x8f94871d, 0x3d2e6771, 0x8f918627, 0x3d28e282, 0x8f8e8576,
-    0x3d235d6f, 0x8f8b850a,
-  0x3d1dd835, 0x8f8884e4, 0x3d1852d6, 0x8f858503, 0x3d12cd51, 0x8f828568,
-    0x3d0d47a6, 0x8f7f8612,
-  0x3d07c1d6, 0x8f7c8701, 0x3d023be0, 0x8f798836, 0x3cfcb5c4, 0x8f7689b0,
-    0x3cf72f83, 0x8f738b70,
-  0x3cf1a91c, 0x8f708d75, 0x3cec2290, 0x8f6d8fbf, 0x3ce69bde, 0x8f6a924f,
-    0x3ce11507, 0x8f679525,
-  0x3cdb8e09, 0x8f649840, 0x3cd606e7, 0x8f619ba0, 0x3cd07f9f, 0x8f5e9f46,
-    0x3ccaf831, 0x8f5ba331,
-  0x3cc5709e, 0x8f58a761, 0x3cbfe8e5, 0x8f55abd8, 0x3cba6107, 0x8f52b093,
-    0x3cb4d904, 0x8f4fb595,
-  0x3caf50da, 0x8f4cbadb, 0x3ca9c88c, 0x8f49c067, 0x3ca44018, 0x8f46c639,
-    0x3c9eb77f, 0x8f43cc50,
-  0x3c992ec0, 0x8f40d2ad, 0x3c93a5dc, 0x8f3dd950, 0x3c8e1cd3, 0x8f3ae038,
-    0x3c8893a4, 0x8f37e765,
-  0x3c830a50, 0x8f34eed8, 0x3c7d80d6, 0x8f31f691, 0x3c77f737, 0x8f2efe8f,
-    0x3c726d73, 0x8f2c06d3,
-  0x3c6ce38a, 0x8f290f5c, 0x3c67597b, 0x8f26182b, 0x3c61cf48, 0x8f232140,
-    0x3c5c44ee, 0x8f202a9a,
-  0x3c56ba70, 0x8f1d343a, 0x3c512fcc, 0x8f1a3e1f, 0x3c4ba504, 0x8f17484b,
-    0x3c461a16, 0x8f1452bb,
-  0x3c408f03, 0x8f115d72, 0x3c3b03ca, 0x8f0e686e, 0x3c35786d, 0x8f0b73b0,
-    0x3c2fecea, 0x8f087f37,
-  0x3c2a6142, 0x8f058b04, 0x3c24d575, 0x8f029717, 0x3c1f4983, 0x8effa370,
-    0x3c19bd6c, 0x8efcb00e,
-  0x3c143130, 0x8ef9bcf2, 0x3c0ea4cf, 0x8ef6ca1c, 0x3c091849, 0x8ef3d78b,
-    0x3c038b9e, 0x8ef0e540,
-  0x3bfdfecd, 0x8eedf33b, 0x3bf871d8, 0x8eeb017c, 0x3bf2e4be, 0x8ee81002,
-    0x3bed577e, 0x8ee51ece,
-  0x3be7ca1a, 0x8ee22de0, 0x3be23c91, 0x8edf3d38, 0x3bdcaee3, 0x8edc4cd5,
-    0x3bd72110, 0x8ed95cb8,
-  0x3bd19318, 0x8ed66ce1, 0x3bcc04fb, 0x8ed37d50, 0x3bc676b9, 0x8ed08e05,
-    0x3bc0e853, 0x8ecd9eff,
-  0x3bbb59c7, 0x8ecab040, 0x3bb5cb17, 0x8ec7c1c6, 0x3bb03c42, 0x8ec4d392,
-    0x3baaad48, 0x8ec1e5a4,
-  0x3ba51e29, 0x8ebef7fb, 0x3b9f8ee5, 0x8ebc0a99, 0x3b99ff7d, 0x8eb91d7c,
-    0x3b946ff0, 0x8eb630a6,
-  0x3b8ee03e, 0x8eb34415, 0x3b895068, 0x8eb057ca, 0x3b83c06c, 0x8ead6bc5,
-    0x3b7e304c, 0x8eaa8006,
-  0x3b78a007, 0x8ea7948c, 0x3b730f9e, 0x8ea4a959, 0x3b6d7f10, 0x8ea1be6c,
-    0x3b67ee5d, 0x8e9ed3c4,
-  0x3b625d86, 0x8e9be963, 0x3b5ccc8a, 0x8e98ff47, 0x3b573b69, 0x8e961571,
-    0x3b51aa24, 0x8e932be2,
-  0x3b4c18ba, 0x8e904298, 0x3b46872c, 0x8e8d5994, 0x3b40f579, 0x8e8a70d7,
-    0x3b3b63a1, 0x8e87885f,
-  0x3b35d1a5, 0x8e84a02d, 0x3b303f84, 0x8e81b841, 0x3b2aad3f, 0x8e7ed09b,
-    0x3b251ad6, 0x8e7be93c,
-  0x3b1f8848, 0x8e790222, 0x3b19f595, 0x8e761b4e, 0x3b1462be, 0x8e7334c1,
-    0x3b0ecfc3, 0x8e704e79,
-  0x3b093ca3, 0x8e6d6877, 0x3b03a95e, 0x8e6a82bc, 0x3afe15f6, 0x8e679d47,
-    0x3af88269, 0x8e64b817,
-  0x3af2eeb7, 0x8e61d32e, 0x3aed5ae1, 0x8e5eee8b, 0x3ae7c6e7, 0x8e5c0a2e,
-    0x3ae232c9, 0x8e592617,
-  0x3adc9e86, 0x8e564246, 0x3ad70a1f, 0x8e535ebb, 0x3ad17593, 0x8e507b76,
-    0x3acbe0e3, 0x8e4d9878,
-  0x3ac64c0f, 0x8e4ab5bf, 0x3ac0b717, 0x8e47d34d, 0x3abb21fb, 0x8e44f121,
-    0x3ab58cba, 0x8e420f3b,
-  0x3aaff755, 0x8e3f2d9b, 0x3aaa61cc, 0x8e3c4c41, 0x3aa4cc1e, 0x8e396b2e,
-    0x3a9f364d, 0x8e368a61,
-  0x3a99a057, 0x8e33a9da, 0x3a940a3e, 0x8e30c999, 0x3a8e7400, 0x8e2de99e,
-    0x3a88dd9d, 0x8e2b09e9,
-  0x3a834717, 0x8e282a7b, 0x3a7db06d, 0x8e254b53, 0x3a78199f, 0x8e226c71,
-    0x3a7282ac, 0x8e1f8dd6,
-  0x3a6ceb96, 0x8e1caf80, 0x3a67545b, 0x8e19d171, 0x3a61bcfd, 0x8e16f3a9,
-    0x3a5c257a, 0x8e141626,
-  0x3a568dd4, 0x8e1138ea, 0x3a50f609, 0x8e0e5bf4, 0x3a4b5e1b, 0x8e0b7f44,
-    0x3a45c608, 0x8e08a2db,
-  0x3a402dd2, 0x8e05c6b7, 0x3a3a9577, 0x8e02eadb, 0x3a34fcf9, 0x8e000f44,
-    0x3a2f6457, 0x8dfd33f4,
-  0x3a29cb91, 0x8dfa58ea, 0x3a2432a7, 0x8df77e27, 0x3a1e9999, 0x8df4a3a9,
-    0x3a190068, 0x8df1c973,
-  0x3a136712, 0x8deeef82, 0x3a0dcd99, 0x8dec15d8, 0x3a0833fc, 0x8de93c74,
-    0x3a029a3b, 0x8de66357,
-  0x39fd0056, 0x8de38a80, 0x39f7664e, 0x8de0b1ef, 0x39f1cc21, 0x8dddd9a5,
-    0x39ec31d1, 0x8ddb01a1,
-  0x39e6975e, 0x8dd829e4, 0x39e0fcc6, 0x8dd5526d, 0x39db620b, 0x8dd27b3c,
-    0x39d5c72c, 0x8dcfa452,
-  0x39d02c2a, 0x8dcccdaf, 0x39ca9104, 0x8dc9f751, 0x39c4f5ba, 0x8dc7213b,
-    0x39bf5a4d, 0x8dc44b6a,
-  0x39b9bebc, 0x8dc175e0, 0x39b42307, 0x8dbea09d, 0x39ae872f, 0x8dbbcba0,
-    0x39a8eb33, 0x8db8f6ea,
-  0x39a34f13, 0x8db6227a, 0x399db2d0, 0x8db34e50, 0x3998166a, 0x8db07a6d,
-    0x399279e0, 0x8dada6d1,
-  0x398cdd32, 0x8daad37b, 0x39874061, 0x8da8006c, 0x3981a36d, 0x8da52da3,
-    0x397c0655, 0x8da25b21,
-  0x39766919, 0x8d9f88e5, 0x3970cbba, 0x8d9cb6f0, 0x396b2e38, 0x8d99e541,
-    0x39659092, 0x8d9713d9,
-  0x395ff2c9, 0x8d9442b8, 0x395a54dd, 0x8d9171dd, 0x3954b6cd, 0x8d8ea148,
-    0x394f1899, 0x8d8bd0fb,
-  0x39497a43, 0x8d8900f3, 0x3943dbc9, 0x8d863133, 0x393e3d2c, 0x8d8361b9,
-    0x39389e6b, 0x8d809286,
-  0x3932ff87, 0x8d7dc399, 0x392d6080, 0x8d7af4f3, 0x3927c155, 0x8d782694,
-    0x39222208, 0x8d75587b,
-  0x391c8297, 0x8d728aa9, 0x3916e303, 0x8d6fbd1d, 0x3911434b, 0x8d6cefd9,
-    0x390ba371, 0x8d6a22db,
-  0x39060373, 0x8d675623, 0x39006352, 0x8d6489b3, 0x38fac30e, 0x8d61bd89,
-    0x38f522a6, 0x8d5ef1a5,
-  0x38ef821c, 0x8d5c2609, 0x38e9e16e, 0x8d595ab3, 0x38e4409e, 0x8d568fa4,
-    0x38de9faa, 0x8d53c4db,
-  0x38d8fe93, 0x8d50fa59, 0x38d35d59, 0x8d4e301f, 0x38cdbbfc, 0x8d4b662a,
-    0x38c81a7c, 0x8d489c7d,
-  0x38c278d9, 0x8d45d316, 0x38bcd713, 0x8d4309f6, 0x38b7352a, 0x8d40411d,
-    0x38b1931e, 0x8d3d788b,
-  0x38abf0ef, 0x8d3ab03f, 0x38a64e9d, 0x8d37e83a, 0x38a0ac29, 0x8d35207d,
-    0x389b0991, 0x8d325905,
-  0x389566d6, 0x8d2f91d5, 0x388fc3f8, 0x8d2ccaec, 0x388a20f8, 0x8d2a0449,
-    0x38847dd5, 0x8d273ded,
-  0x387eda8e, 0x8d2477d8, 0x38793725, 0x8d21b20a, 0x38739399, 0x8d1eec83,
-    0x386defeb, 0x8d1c2742,
-  0x38684c19, 0x8d196249, 0x3862a825, 0x8d169d96, 0x385d040d, 0x8d13d92a,
-    0x38575fd4, 0x8d111505,
-  0x3851bb77, 0x8d0e5127, 0x384c16f7, 0x8d0b8d90, 0x38467255, 0x8d08ca40,
-    0x3840cd90, 0x8d060737,
-  0x383b28a9, 0x8d034474, 0x3835839f, 0x8d0081f9, 0x382fde72, 0x8cfdbfc4,
-    0x382a3922, 0x8cfafdd7,
-  0x382493b0, 0x8cf83c30, 0x381eee1b, 0x8cf57ad0, 0x38194864, 0x8cf2b9b8,
-    0x3813a28a, 0x8ceff8e6,
-  0x380dfc8d, 0x8ced385b, 0x3808566e, 0x8cea7818, 0x3802b02c, 0x8ce7b81b,
-    0x37fd09c8, 0x8ce4f865,
-  0x37f76341, 0x8ce238f6, 0x37f1bc97, 0x8cdf79ce, 0x37ec15cb, 0x8cdcbaee,
-    0x37e66edd, 0x8cd9fc54,
-  0x37e0c7cc, 0x8cd73e01, 0x37db2099, 0x8cd47ff6, 0x37d57943, 0x8cd1c231,
-    0x37cfd1cb, 0x8ccf04b3,
-  0x37ca2a30, 0x8ccc477d, 0x37c48273, 0x8cc98a8e, 0x37beda93, 0x8cc6cde5,
-    0x37b93292, 0x8cc41184,
-  0x37b38a6d, 0x8cc1556a, 0x37ade227, 0x8cbe9996, 0x37a839be, 0x8cbbde0a,
-    0x37a29132, 0x8cb922c6,
-  0x379ce885, 0x8cb667c8, 0x37973fb5, 0x8cb3ad11, 0x379196c3, 0x8cb0f2a1,
-    0x378bedae, 0x8cae3879,
-  0x37864477, 0x8cab7e98, 0x37809b1e, 0x8ca8c4fd, 0x377af1a3, 0x8ca60baa,
-    0x37754806, 0x8ca3529f,
-  0x376f9e46, 0x8ca099da, 0x3769f464, 0x8c9de15c, 0x37644a60, 0x8c9b2926,
-    0x375ea03a, 0x8c987137,
-  0x3758f5f2, 0x8c95b98f, 0x37534b87, 0x8c93022e, 0x374da0fa, 0x8c904b14,
-    0x3747f64c, 0x8c8d9442,
-  0x37424b7b, 0x8c8addb7, 0x373ca088, 0x8c882773, 0x3736f573, 0x8c857176,
-    0x37314a3c, 0x8c82bbc0,
-  0x372b9ee3, 0x8c800652, 0x3725f367, 0x8c7d512b, 0x372047ca, 0x8c7a9c4b,
-    0x371a9c0b, 0x8c77e7b3,
-  0x3714f02a, 0x8c753362, 0x370f4427, 0x8c727f58, 0x37099802, 0x8c6fcb95,
-    0x3703ebbb, 0x8c6d181a,
-  0x36fe3f52, 0x8c6a64e5, 0x36f892c7, 0x8c67b1f9, 0x36f2e61a, 0x8c64ff53,
-    0x36ed394b, 0x8c624cf5,
-  0x36e78c5b, 0x8c5f9ade, 0x36e1df48, 0x8c5ce90e, 0x36dc3214, 0x8c5a3786,
-    0x36d684be, 0x8c578645,
-  0x36d0d746, 0x8c54d54c, 0x36cb29ac, 0x8c522499, 0x36c57bf0, 0x8c4f742f,
-    0x36bfce13, 0x8c4cc40b,
-  0x36ba2014, 0x8c4a142f, 0x36b471f3, 0x8c47649a, 0x36aec3b0, 0x8c44b54d,
-    0x36a9154c, 0x8c420647,
-  0x36a366c6, 0x8c3f5788, 0x369db81e, 0x8c3ca911, 0x36980954, 0x8c39fae1,
-    0x36925a69, 0x8c374cf9,
-  0x368cab5c, 0x8c349f58, 0x3686fc2e, 0x8c31f1ff, 0x36814cde, 0x8c2f44ed,
-    0x367b9d6c, 0x8c2c9822,
-  0x3675edd9, 0x8c29eb9f, 0x36703e24, 0x8c273f63, 0x366a8e4d, 0x8c24936f,
-    0x3664de55, 0x8c21e7c2,
-  0x365f2e3b, 0x8c1f3c5d, 0x36597e00, 0x8c1c913f, 0x3653cda3, 0x8c19e669,
-    0x364e1d25, 0x8c173bda,
-  0x36486c86, 0x8c149192, 0x3642bbc4, 0x8c11e792, 0x363d0ae2, 0x8c0f3dda,
-    0x363759de, 0x8c0c9469,
-  0x3631a8b8, 0x8c09eb40, 0x362bf771, 0x8c07425e, 0x36264609, 0x8c0499c4,
-    0x3620947f, 0x8c01f171,
-  0x361ae2d3, 0x8bff4966, 0x36153107, 0x8bfca1a3, 0x360f7f19, 0x8bf9fa27,
-    0x3609cd0a, 0x8bf752f2,
-  0x36041ad9, 0x8bf4ac05, 0x35fe6887, 0x8bf20560, 0x35f8b614, 0x8bef5f02,
-    0x35f3037f, 0x8becb8ec,
-  0x35ed50c9, 0x8bea131e, 0x35e79df2, 0x8be76d97, 0x35e1eafa, 0x8be4c857,
-    0x35dc37e0, 0x8be22360,
-  0x35d684a6, 0x8bdf7eb0, 0x35d0d14a, 0x8bdcda47, 0x35cb1dcc, 0x8bda3626,
-    0x35c56a2e, 0x8bd7924d,
-  0x35bfb66e, 0x8bd4eebc, 0x35ba028e, 0x8bd24b72, 0x35b44e8c, 0x8bcfa870,
-    0x35ae9a69, 0x8bcd05b5,
-  0x35a8e625, 0x8bca6343, 0x35a331c0, 0x8bc7c117, 0x359d7d39, 0x8bc51f34,
-    0x3597c892, 0x8bc27d98,
-  0x359213c9, 0x8bbfdc44, 0x358c5ee0, 0x8bbd3b38, 0x3586a9d5, 0x8bba9a73,
-    0x3580f4aa, 0x8bb7f9f6,
-  0x357b3f5d, 0x8bb559c1, 0x357589f0, 0x8bb2b9d4, 0x356fd461, 0x8bb01a2e,
-    0x356a1eb2, 0x8bad7ad0,
-  0x356468e2, 0x8baadbba, 0x355eb2f0, 0x8ba83cec, 0x3558fcde, 0x8ba59e65,
-    0x355346ab, 0x8ba30026,
-  0x354d9057, 0x8ba0622f, 0x3547d9e2, 0x8b9dc480, 0x3542234c, 0x8b9b2718,
-    0x353c6c95, 0x8b9889f8,
-  0x3536b5be, 0x8b95ed21, 0x3530fec6, 0x8b935090, 0x352b47ad, 0x8b90b448,
-    0x35259073, 0x8b8e1848,
-  0x351fd918, 0x8b8b7c8f, 0x351a219c, 0x8b88e11e, 0x35146a00, 0x8b8645f5,
-    0x350eb243, 0x8b83ab14,
-  0x3508fa66, 0x8b81107b, 0x35034267, 0x8b7e7629, 0x34fd8a48, 0x8b7bdc20,
-    0x34f7d208, 0x8b79425e,
-  0x34f219a8, 0x8b76a8e4, 0x34ec6127, 0x8b740fb3, 0x34e6a885, 0x8b7176c8,
-    0x34e0efc2, 0x8b6ede26,
-  0x34db36df, 0x8b6c45cc, 0x34d57ddc, 0x8b69adba, 0x34cfc4b7, 0x8b6715ef,
-    0x34ca0b73, 0x8b647e6d,
-  0x34c4520d, 0x8b61e733, 0x34be9887, 0x8b5f5040, 0x34b8dee1, 0x8b5cb995,
-    0x34b3251a, 0x8b5a2333,
-  0x34ad6b32, 0x8b578d18, 0x34a7b12a, 0x8b54f745, 0x34a1f702, 0x8b5261ba,
-    0x349c3cb9, 0x8b4fcc77,
-  0x34968250, 0x8b4d377c, 0x3490c7c6, 0x8b4aa2ca, 0x348b0d1c, 0x8b480e5f,
-    0x34855251, 0x8b457a3c,
-  0x347f9766, 0x8b42e661, 0x3479dc5b, 0x8b4052ce, 0x3474212f, 0x8b3dbf83,
-    0x346e65e3, 0x8b3b2c80,
-  0x3468aa76, 0x8b3899c6, 0x3462eee9, 0x8b360753, 0x345d333c, 0x8b337528,
-    0x3457776f, 0x8b30e345,
-  0x3451bb81, 0x8b2e51ab, 0x344bff73, 0x8b2bc058, 0x34464345, 0x8b292f4e,
-    0x344086f6, 0x8b269e8b,
-  0x343aca87, 0x8b240e11, 0x34350df8, 0x8b217ddf, 0x342f5149, 0x8b1eedf4,
-    0x3429947a, 0x8b1c5e52,
-  0x3423d78a, 0x8b19cef8, 0x341e1a7b, 0x8b173fe6, 0x34185d4b, 0x8b14b11d,
-    0x34129ffb, 0x8b12229b,
-  0x340ce28b, 0x8b0f9462, 0x340724fb, 0x8b0d0670, 0x3401674a, 0x8b0a78c7,
-    0x33fba97a, 0x8b07eb66,
-  0x33f5eb89, 0x8b055e4d, 0x33f02d79, 0x8b02d17c, 0x33ea6f48, 0x8b0044f3,
-    0x33e4b0f8, 0x8afdb8b3,
-  0x33def287, 0x8afb2cbb, 0x33d933f7, 0x8af8a10b, 0x33d37546, 0x8af615a3,
-    0x33cdb676, 0x8af38a83,
-  0x33c7f785, 0x8af0ffac, 0x33c23875, 0x8aee751c, 0x33bc7944, 0x8aebead5,
-    0x33b6b9f4, 0x8ae960d6,
-  0x33b0fa84, 0x8ae6d720, 0x33ab3af4, 0x8ae44db1, 0x33a57b44, 0x8ae1c48b,
-    0x339fbb74, 0x8adf3bad,
-  0x3399fb85, 0x8adcb318, 0x33943b75, 0x8ada2aca, 0x338e7b46, 0x8ad7a2c5,
-    0x3388baf7, 0x8ad51b08,
-  0x3382fa88, 0x8ad29394, 0x337d39f9, 0x8ad00c67, 0x3377794b, 0x8acd8583,
-    0x3371b87d, 0x8acafee8,
-  0x336bf78f, 0x8ac87894, 0x33663682, 0x8ac5f289, 0x33607554, 0x8ac36cc6,
-    0x335ab407, 0x8ac0e74c,
-  0x3354f29b, 0x8abe6219, 0x334f310e, 0x8abbdd30, 0x33496f62, 0x8ab9588e,
-    0x3343ad97, 0x8ab6d435,
-  0x333debab, 0x8ab45024, 0x333829a1, 0x8ab1cc5c, 0x33326776, 0x8aaf48db,
-    0x332ca52c, 0x8aacc5a4,
-  0x3326e2c3, 0x8aaa42b4, 0x33212039, 0x8aa7c00d, 0x331b5d91, 0x8aa53daf,
-    0x33159ac8, 0x8aa2bb99,
-  0x330fd7e1, 0x8aa039cb, 0x330a14da, 0x8a9db845, 0x330451b3, 0x8a9b3708,
-    0x32fe8e6d, 0x8a98b614,
-  0x32f8cb07, 0x8a963567, 0x32f30782, 0x8a93b504, 0x32ed43de, 0x8a9134e8,
-    0x32e7801a, 0x8a8eb516,
-  0x32e1bc36, 0x8a8c358b, 0x32dbf834, 0x8a89b649, 0x32d63412, 0x8a873750,
-    0x32d06fd0, 0x8a84b89e,
-  0x32caab6f, 0x8a823a36, 0x32c4e6ef, 0x8a7fbc16, 0x32bf2250, 0x8a7d3e3e,
-    0x32b95d91, 0x8a7ac0af,
-  0x32b398b3, 0x8a784368, 0x32add3b6, 0x8a75c66a, 0x32a80e99, 0x8a7349b4,
-    0x32a2495d, 0x8a70cd47,
-  0x329c8402, 0x8a6e5123, 0x3296be88, 0x8a6bd547, 0x3290f8ef, 0x8a6959b3,
-    0x328b3336, 0x8a66de68,
-  0x32856d5e, 0x8a646365, 0x327fa767, 0x8a61e8ab, 0x3279e151, 0x8a5f6e3a,
-    0x32741b1c, 0x8a5cf411,
-  0x326e54c7, 0x8a5a7a31, 0x32688e54, 0x8a580099, 0x3262c7c1, 0x8a55874a,
-    0x325d0110, 0x8a530e43,
-  0x32573a3f, 0x8a509585, 0x3251734f, 0x8a4e1d10, 0x324bac40, 0x8a4ba4e3,
-    0x3245e512, 0x8a492cff,
-  0x32401dc6, 0x8a46b564, 0x323a565a, 0x8a443e11, 0x32348ecf, 0x8a41c706,
-    0x322ec725, 0x8a3f5045,
-  0x3228ff5c, 0x8a3cd9cc, 0x32233775, 0x8a3a639b, 0x321d6f6e, 0x8a37edb3,
-    0x3217a748, 0x8a357814,
-  0x3211df04, 0x8a3302be, 0x320c16a1, 0x8a308db0, 0x32064e1e, 0x8a2e18eb,
-    0x3200857d, 0x8a2ba46e,
-  0x31fabcbd, 0x8a29303b, 0x31f4f3df, 0x8a26bc50, 0x31ef2ae1, 0x8a2448ad,
-    0x31e961c5, 0x8a21d554,
-  0x31e39889, 0x8a1f6243, 0x31ddcf30, 0x8a1cef7a, 0x31d805b7, 0x8a1a7cfb,
-    0x31d23c1f, 0x8a180ac4,
-  0x31cc7269, 0x8a1598d6, 0x31c6a894, 0x8a132731, 0x31c0dea1, 0x8a10b5d4,
-    0x31bb148f, 0x8a0e44c0,
-  0x31b54a5e, 0x8a0bd3f5, 0x31af800e, 0x8a096373, 0x31a9b5a0, 0x8a06f339,
-    0x31a3eb13, 0x8a048348,
-  0x319e2067, 0x8a0213a0, 0x3198559d, 0x89ffa441, 0x31928ab4, 0x89fd352b,
-    0x318cbfad, 0x89fac65d,
-  0x3186f487, 0x89f857d8, 0x31812943, 0x89f5e99c, 0x317b5de0, 0x89f37ba9,
-    0x3175925e, 0x89f10dff,
-  0x316fc6be, 0x89eea09d, 0x3169fb00, 0x89ec3384, 0x31642f23, 0x89e9c6b4,
-    0x315e6328, 0x89e75a2d,
-  0x3158970e, 0x89e4edef, 0x3152cad5, 0x89e281fa, 0x314cfe7f, 0x89e0164d,
-    0x31473209, 0x89ddaae9,
-  0x31416576, 0x89db3fcf, 0x313b98c4, 0x89d8d4fd, 0x3135cbf4, 0x89d66a74,
-    0x312fff05, 0x89d40033,
-  0x312a31f8, 0x89d1963c, 0x312464cd, 0x89cf2c8e, 0x311e9783, 0x89ccc328,
-    0x3118ca1b, 0x89ca5a0c,
-  0x3112fc95, 0x89c7f138, 0x310d2ef0, 0x89c588ae, 0x3107612e, 0x89c3206c,
-    0x3101934d, 0x89c0b873,
-  0x30fbc54d, 0x89be50c3, 0x30f5f730, 0x89bbe95c, 0x30f028f4, 0x89b9823e,
-    0x30ea5a9a, 0x89b71b69,
-  0x30e48c22, 0x89b4b4dd, 0x30debd8c, 0x89b24e9a, 0x30d8eed8, 0x89afe8a0,
-    0x30d32006, 0x89ad82ef,
-  0x30cd5115, 0x89ab1d87, 0x30c78206, 0x89a8b868, 0x30c1b2da, 0x89a65391,
-    0x30bbe38f, 0x89a3ef04,
-  0x30b61426, 0x89a18ac0, 0x30b0449f, 0x899f26c5, 0x30aa74fa, 0x899cc313,
-    0x30a4a537, 0x899a5faa,
-  0x309ed556, 0x8997fc8a, 0x30990557, 0x899599b3, 0x3093353a, 0x89933725,
-    0x308d64ff, 0x8990d4e0,
-  0x308794a6, 0x898e72e4, 0x3081c42f, 0x898c1131, 0x307bf39b, 0x8989afc8,
-    0x307622e8, 0x89874ea7,
-  0x30705217, 0x8984edcf, 0x306a8129, 0x89828d41, 0x3064b01d, 0x89802cfc,
-    0x305edef3, 0x897dccff,
-  0x30590dab, 0x897b6d4c, 0x30533c45, 0x89790de2, 0x304d6ac1, 0x8976aec1,
-    0x30479920, 0x89744fe9,
-  0x3041c761, 0x8971f15a, 0x303bf584, 0x896f9315, 0x30362389, 0x896d3518,
-    0x30305171, 0x896ad765,
-  0x302a7f3a, 0x896879fb, 0x3024ace6, 0x89661cda, 0x301eda75, 0x8963c002,
-    0x301907e6, 0x89616373,
-  0x30133539, 0x895f072e, 0x300d626e, 0x895cab31, 0x30078f86, 0x895a4f7e,
-    0x3001bc80, 0x8957f414,
-  0x2ffbe95d, 0x895598f3, 0x2ff6161c, 0x89533e1c, 0x2ff042bd, 0x8950e38e,
-    0x2fea6f41, 0x894e8948,
-  0x2fe49ba7, 0x894c2f4c, 0x2fdec7f0, 0x8949d59a, 0x2fd8f41b, 0x89477c30,
-    0x2fd32028, 0x89452310,
-  0x2fcd4c19, 0x8942ca39, 0x2fc777eb, 0x894071ab, 0x2fc1a3a0, 0x893e1967,
-    0x2fbbcf38, 0x893bc16b,
-  0x2fb5fab2, 0x893969b9, 0x2fb0260f, 0x89371250, 0x2faa514f, 0x8934bb31,
-    0x2fa47c71, 0x8932645b,
-  0x2f9ea775, 0x89300dce, 0x2f98d25d, 0x892db78a, 0x2f92fd26, 0x892b6190,
-    0x2f8d27d3, 0x89290bdf,
-  0x2f875262, 0x8926b677, 0x2f817cd4, 0x89246159, 0x2f7ba729, 0x89220c84,
-    0x2f75d160, 0x891fb7f8,
-  0x2f6ffb7a, 0x891d63b5, 0x2f6a2577, 0x891b0fbc, 0x2f644f56, 0x8918bc0c,
-    0x2f5e7919, 0x891668a6,
-  0x2f58a2be, 0x89141589, 0x2f52cc46, 0x8911c2b5, 0x2f4cf5b0, 0x890f702b,
-    0x2f471efe, 0x890d1dea,
-  0x2f41482e, 0x890acbf2, 0x2f3b7141, 0x89087a44, 0x2f359a37, 0x890628df,
-    0x2f2fc310, 0x8903d7c4,
-  0x2f29ebcc, 0x890186f2, 0x2f24146b, 0x88ff3669, 0x2f1e3ced, 0x88fce62a,
-    0x2f186551, 0x88fa9634,
-  0x2f128d99, 0x88f84687, 0x2f0cb5c3, 0x88f5f724, 0x2f06ddd1, 0x88f3a80b,
-    0x2f0105c1, 0x88f1593b,
-  0x2efb2d95, 0x88ef0ab4, 0x2ef5554b, 0x88ecbc77, 0x2eef7ce5, 0x88ea6e83,
-    0x2ee9a461, 0x88e820d9,
-  0x2ee3cbc1, 0x88e5d378, 0x2eddf304, 0x88e38660, 0x2ed81a29, 0x88e13992,
-    0x2ed24132, 0x88deed0e,
-  0x2ecc681e, 0x88dca0d3, 0x2ec68eed, 0x88da54e1, 0x2ec0b5a0, 0x88d8093a,
-    0x2ebadc35, 0x88d5bddb,
-  0x2eb502ae, 0x88d372c6, 0x2eaf290a, 0x88d127fb, 0x2ea94f49, 0x88cedd79,
-    0x2ea3756b, 0x88cc9340,
-  0x2e9d9b70, 0x88ca4951, 0x2e97c159, 0x88c7ffac, 0x2e91e725, 0x88c5b650,
-    0x2e8c0cd4, 0x88c36d3e,
-  0x2e863267, 0x88c12475, 0x2e8057dd, 0x88bedbf6, 0x2e7a7d36, 0x88bc93c0,
-    0x2e74a272, 0x88ba4bd4,
-  0x2e6ec792, 0x88b80432, 0x2e68ec95, 0x88b5bcd9, 0x2e63117c, 0x88b375ca,
-    0x2e5d3646, 0x88b12f04,
-  0x2e575af3, 0x88aee888, 0x2e517f84, 0x88aca255, 0x2e4ba3f8, 0x88aa5c6c,
-    0x2e45c850, 0x88a816cd,
-  0x2e3fec8b, 0x88a5d177, 0x2e3a10aa, 0x88a38c6b, 0x2e3434ac, 0x88a147a9,
-    0x2e2e5891, 0x889f0330,
-  0x2e287c5a, 0x889cbf01, 0x2e22a007, 0x889a7b1b, 0x2e1cc397, 0x88983780,
-    0x2e16e70b, 0x8895f42d,
-  0x2e110a62, 0x8893b125, 0x2e0b2d9d, 0x88916e66, 0x2e0550bb, 0x888f2bf1,
-    0x2dff73bd, 0x888ce9c5,
-  0x2df996a3, 0x888aa7e3, 0x2df3b96c, 0x8888664b, 0x2deddc19, 0x888624fd,
-    0x2de7feaa, 0x8883e3f8,
-  0x2de2211e, 0x8881a33d, 0x2ddc4376, 0x887f62cb, 0x2dd665b2, 0x887d22a4,
-    0x2dd087d1, 0x887ae2c6,
-  0x2dcaa9d5, 0x8878a332, 0x2dc4cbbc, 0x887663e7, 0x2dbeed86, 0x887424e7,
-    0x2db90f35, 0x8871e630,
-  0x2db330c7, 0x886fa7c2, 0x2dad523d, 0x886d699f, 0x2da77397, 0x886b2bc5,
-    0x2da194d5, 0x8868ee35,
-  0x2d9bb5f6, 0x8866b0ef, 0x2d95d6fc, 0x886473f2, 0x2d8ff7e5, 0x88623740,
-    0x2d8a18b3, 0x885ffad7,
-  0x2d843964, 0x885dbeb8, 0x2d7e59f9, 0x885b82e3, 0x2d787a72, 0x88594757,
-    0x2d729acf, 0x88570c16,
-  0x2d6cbb10, 0x8854d11e, 0x2d66db35, 0x88529670, 0x2d60fb3e, 0x88505c0b,
-    0x2d5b1b2b, 0x884e21f1,
-  0x2d553afc, 0x884be821, 0x2d4f5ab1, 0x8849ae9a, 0x2d497a4a, 0x8847755d,
-    0x2d4399c7, 0x88453c6a,
-  0x2d3db928, 0x884303c1, 0x2d37d86d, 0x8840cb61, 0x2d31f797, 0x883e934c,
-    0x2d2c16a4, 0x883c5b81,
-  0x2d263596, 0x883a23ff, 0x2d20546b, 0x8837ecc7, 0x2d1a7325, 0x8835b5d9,
-    0x2d1491c4, 0x88337f35,
-  0x2d0eb046, 0x883148db, 0x2d08ceac, 0x882f12cb, 0x2d02ecf7, 0x882cdd04,
-    0x2cfd0b26, 0x882aa788,
-  0x2cf72939, 0x88287256, 0x2cf14731, 0x88263d6d, 0x2ceb650d, 0x882408ce,
-    0x2ce582cd, 0x8821d47a,
-  0x2cdfa071, 0x881fa06f, 0x2cd9bdfa, 0x881d6cae, 0x2cd3db67, 0x881b3937,
-    0x2ccdf8b8, 0x8819060a,
-  0x2cc815ee, 0x8816d327, 0x2cc23308, 0x8814a08f, 0x2cbc5006, 0x88126e40,
-    0x2cb66ce9, 0x88103c3b,
-  0x2cb089b1, 0x880e0a7f, 0x2caaa65c, 0x880bd90e, 0x2ca4c2ed, 0x8809a7e7,
-    0x2c9edf61, 0x8807770a,
-  0x2c98fbba, 0x88054677, 0x2c9317f8, 0x8803162e, 0x2c8d341a, 0x8800e62f,
-    0x2c875021, 0x87feb67a,
-  0x2c816c0c, 0x87fc870f, 0x2c7b87dc, 0x87fa57ee, 0x2c75a390, 0x87f82917,
-    0x2c6fbf29, 0x87f5fa8b,
-  0x2c69daa6, 0x87f3cc48, 0x2c63f609, 0x87f19e4f, 0x2c5e114f, 0x87ef70a0,
-    0x2c582c7b, 0x87ed433c,
-  0x2c52478a, 0x87eb1621, 0x2c4c627f, 0x87e8e950, 0x2c467d58, 0x87e6bcca,
-    0x2c409816, 0x87e4908e,
-  0x2c3ab2b9, 0x87e2649b, 0x2c34cd40, 0x87e038f3, 0x2c2ee7ad, 0x87de0d95,
-    0x2c2901fd, 0x87dbe281,
-  0x2c231c33, 0x87d9b7b7, 0x2c1d364e, 0x87d78d38, 0x2c17504d, 0x87d56302,
-    0x2c116a31, 0x87d33916,
-  0x2c0b83fa, 0x87d10f75, 0x2c059da7, 0x87cee61e, 0x2bffb73a, 0x87ccbd11,
-    0x2bf9d0b1, 0x87ca944e,
-  0x2bf3ea0d, 0x87c86bd5, 0x2bee034e, 0x87c643a6, 0x2be81c74, 0x87c41bc2,
-    0x2be2357f, 0x87c1f427,
-  0x2bdc4e6f, 0x87bfccd7, 0x2bd66744, 0x87bda5d1, 0x2bd07ffe, 0x87bb7f16,
-    0x2bca989d, 0x87b958a4,
-  0x2bc4b120, 0x87b7327d, 0x2bbec989, 0x87b50c9f, 0x2bb8e1d7, 0x87b2e70c,
-    0x2bb2fa0a, 0x87b0c1c4,
-  0x2bad1221, 0x87ae9cc5, 0x2ba72a1e, 0x87ac7811, 0x2ba14200, 0x87aa53a6,
-    0x2b9b59c7, 0x87a82f87,
-  0x2b957173, 0x87a60bb1, 0x2b8f8905, 0x87a3e825, 0x2b89a07b, 0x87a1c4e4,
-    0x2b83b7d7, 0x879fa1ed,
-  0x2b7dcf17, 0x879d7f41, 0x2b77e63d, 0x879b5cde, 0x2b71fd48, 0x87993ac6,
-    0x2b6c1438, 0x879718f8,
-  0x2b662b0e, 0x8794f774, 0x2b6041c9, 0x8792d63b, 0x2b5a5868, 0x8790b54c,
-    0x2b546eee, 0x878e94a7,
-  0x2b4e8558, 0x878c744d, 0x2b489ba8, 0x878a543d, 0x2b42b1dd, 0x87883477,
-    0x2b3cc7f7, 0x878614fb,
-  0x2b36ddf7, 0x8783f5ca, 0x2b30f3dc, 0x8781d6e3, 0x2b2b09a6, 0x877fb846,
-    0x2b251f56, 0x877d99f4,
-  0x2b1f34eb, 0x877b7bec, 0x2b194a66, 0x87795e2f, 0x2b135fc6, 0x877740bb,
-    0x2b0d750b, 0x87752392,
-  0x2b078a36, 0x877306b4, 0x2b019f46, 0x8770ea20, 0x2afbb43c, 0x876ecdd6,
-    0x2af5c917, 0x876cb1d6,
-  0x2aefddd8, 0x876a9621, 0x2ae9f27e, 0x87687ab7, 0x2ae4070a, 0x87665f96,
-    0x2ade1b7c, 0x876444c1,
-  0x2ad82fd2, 0x87622a35, 0x2ad2440f, 0x87600ff4, 0x2acc5831, 0x875df5fd,
-    0x2ac66c39, 0x875bdc51,
-  0x2ac08026, 0x8759c2ef, 0x2aba93f9, 0x8757a9d8, 0x2ab4a7b1, 0x8755910b,
-    0x2aaebb50, 0x87537888,
-  0x2aa8ced3, 0x87516050, 0x2aa2e23d, 0x874f4862, 0x2a9cf58c, 0x874d30bf,
-    0x2a9708c1, 0x874b1966,
-  0x2a911bdc, 0x87490258, 0x2a8b2edc, 0x8746eb94, 0x2a8541c3, 0x8744d51b,
-    0x2a7f548e, 0x8742beec,
-  0x2a796740, 0x8740a907, 0x2a7379d8, 0x873e936d, 0x2a6d8c55, 0x873c7e1e,
-    0x2a679eb8, 0x873a6919,
-  0x2a61b101, 0x8738545e, 0x2a5bc330, 0x87363fee, 0x2a55d545, 0x87342bc9,
-    0x2a4fe740, 0x873217ee,
-  0x2a49f920, 0x8730045d, 0x2a440ae7, 0x872df117, 0x2a3e1c93, 0x872bde1c,
-    0x2a382e25, 0x8729cb6b,
-  0x2a323f9e, 0x8727b905, 0x2a2c50fc, 0x8725a6e9, 0x2a266240, 0x87239518,
-    0x2a20736a, 0x87218391,
-  0x2a1a847b, 0x871f7255, 0x2a149571, 0x871d6163, 0x2a0ea64d, 0x871b50bc,
-    0x2a08b710, 0x87194060,
-  0x2a02c7b8, 0x8717304e, 0x29fcd847, 0x87152087, 0x29f6e8bb, 0x8713110a,
-    0x29f0f916, 0x871101d8,
-  0x29eb0957, 0x870ef2f1, 0x29e5197e, 0x870ce454, 0x29df298b, 0x870ad602,
-    0x29d9397f, 0x8708c7fa,
-  0x29d34958, 0x8706ba3d, 0x29cd5918, 0x8704acca, 0x29c768be, 0x87029fa3,
-    0x29c1784a, 0x870092c5,
-  0x29bb87bc, 0x86fe8633, 0x29b59715, 0x86fc79eb, 0x29afa654, 0x86fa6dee,
-    0x29a9b579, 0x86f8623b,
-  0x29a3c485, 0x86f656d3, 0x299dd377, 0x86f44bb6, 0x2997e24f, 0x86f240e3,
-    0x2991f10e, 0x86f0365c,
-  0x298bffb2, 0x86ee2c1e, 0x29860e3e, 0x86ec222c, 0x29801caf, 0x86ea1884,
-    0x297a2b07, 0x86e80f27,
-  0x29743946, 0x86e60614, 0x296e476b, 0x86e3fd4c, 0x29685576, 0x86e1f4cf,
-    0x29626368, 0x86dfec9d,
-  0x295c7140, 0x86dde4b5, 0x29567eff, 0x86dbdd18, 0x29508ca4, 0x86d9d5c6,
-    0x294a9a30, 0x86d7cebf,
-  0x2944a7a2, 0x86d5c802, 0x293eb4fb, 0x86d3c190, 0x2938c23a, 0x86d1bb69,
-    0x2932cf60, 0x86cfb58c,
-  0x292cdc6d, 0x86cdaffa, 0x2926e960, 0x86cbaab3, 0x2920f63a, 0x86c9a5b7,
-    0x291b02fa, 0x86c7a106,
-  0x29150fa1, 0x86c59c9f, 0x290f1c2f, 0x86c39883, 0x290928a3, 0x86c194b2,
-    0x290334ff, 0x86bf912c,
-  0x28fd4140, 0x86bd8df0, 0x28f74d69, 0x86bb8b00, 0x28f15978, 0x86b9885a,
-    0x28eb656e, 0x86b785ff,
-  0x28e5714b, 0x86b583ee, 0x28df7d0e, 0x86b38229, 0x28d988b8, 0x86b180ae,
-    0x28d3944a, 0x86af7f7e,
-  0x28cd9fc1, 0x86ad7e99, 0x28c7ab20, 0x86ab7dff, 0x28c1b666, 0x86a97db0,
-    0x28bbc192, 0x86a77dab,
-  0x28b5cca5, 0x86a57df2, 0x28afd7a0, 0x86a37e83, 0x28a9e281, 0x86a17f5f,
-    0x28a3ed49, 0x869f8086,
-  0x289df7f8, 0x869d81f8, 0x2898028e, 0x869b83b4, 0x28920d0a, 0x869985bc,
-    0x288c176e, 0x8697880f,
-  0x288621b9, 0x86958aac, 0x28802beb, 0x86938d94, 0x287a3604, 0x869190c7,
-    0x28744004, 0x868f9445,
-  0x286e49ea, 0x868d980e, 0x286853b8, 0x868b9c22, 0x28625d6d, 0x8689a081,
-    0x285c670a, 0x8687a52b,
-  0x2856708d, 0x8685aa20, 0x285079f7, 0x8683af5f, 0x284a8349, 0x8681b4ea,
-    0x28448c81, 0x867fbabf,
-  0x283e95a1, 0x867dc0e0, 0x28389ea8, 0x867bc74b, 0x2832a796, 0x8679ce01,
-    0x282cb06c, 0x8677d503,
-  0x2826b928, 0x8675dc4f, 0x2820c1cc, 0x8673e3e6, 0x281aca57, 0x8671ebc8,
-    0x2814d2c9, 0x866ff3f6,
-  0x280edb23, 0x866dfc6e, 0x2808e364, 0x866c0531, 0x2802eb8c, 0x866a0e3f,
-    0x27fcf39c, 0x86681798,
-  0x27f6fb92, 0x8666213c, 0x27f10371, 0x86642b2c, 0x27eb0b36, 0x86623566,
-    0x27e512e3, 0x86603feb,
-  0x27df1a77, 0x865e4abb, 0x27d921f3, 0x865c55d7, 0x27d32956, 0x865a613d,
-    0x27cd30a1, 0x86586cee,
-  0x27c737d3, 0x865678eb, 0x27c13eec, 0x86548532, 0x27bb45ed, 0x865291c4,
-    0x27b54cd6, 0x86509ea2,
-  0x27af53a6, 0x864eabcb, 0x27a95a5d, 0x864cb93e, 0x27a360fc, 0x864ac6fd,
-    0x279d6783, 0x8648d507,
-  0x27976df1, 0x8646e35c, 0x27917447, 0x8644f1fc, 0x278b7a84, 0x864300e7,
-    0x278580a9, 0x8641101d,
-  0x277f86b5, 0x863f1f9e, 0x27798caa, 0x863d2f6b, 0x27739285, 0x863b3f82,
-    0x276d9849, 0x86394fe5,
-  0x27679df4, 0x86376092, 0x2761a387, 0x8635718b, 0x275ba901, 0x863382cf,
-    0x2755ae64, 0x8631945e,
-  0x274fb3ae, 0x862fa638, 0x2749b8e0, 0x862db85e, 0x2743bdf9, 0x862bcace,
-    0x273dc2fa, 0x8629dd8a,
-  0x2737c7e3, 0x8627f091, 0x2731ccb4, 0x862603e3, 0x272bd16d, 0x86241780,
-    0x2725d60e, 0x86222b68,
-  0x271fda96, 0x86203f9c, 0x2719df06, 0x861e541a, 0x2713e35f, 0x861c68e4,
-    0x270de79f, 0x861a7df9,
-  0x2707ebc7, 0x86189359, 0x2701efd7, 0x8616a905, 0x26fbf3ce, 0x8614befb,
-    0x26f5f7ae, 0x8612d53d,
-  0x26effb76, 0x8610ebca, 0x26e9ff26, 0x860f02a3, 0x26e402bd, 0x860d19c6,
-    0x26de063d, 0x860b3135,
-  0x26d809a5, 0x860948ef, 0x26d20cf5, 0x860760f4, 0x26cc102d, 0x86057944,
-    0x26c6134d, 0x860391e0,
-  0x26c01655, 0x8601aac7, 0x26ba1945, 0x85ffc3f9, 0x26b41c1d, 0x85fddd76,
-    0x26ae1edd, 0x85fbf73f,
-  0x26a82186, 0x85fa1153, 0x26a22416, 0x85f82bb2, 0x269c268f, 0x85f6465c,
-    0x269628f0, 0x85f46152,
-  0x26902b39, 0x85f27c93, 0x268a2d6b, 0x85f09820, 0x26842f84, 0x85eeb3f7,
-    0x267e3186, 0x85ecd01a,
-  0x26783370, 0x85eaec88, 0x26723543, 0x85e90942, 0x266c36fe, 0x85e72647,
-    0x266638a1, 0x85e54397,
-  0x26603a2c, 0x85e36132, 0x265a3b9f, 0x85e17f19, 0x26543cfb, 0x85df9d4b,
-    0x264e3e40, 0x85ddbbc9,
-  0x26483f6c, 0x85dbda91, 0x26424082, 0x85d9f9a5, 0x263c417f, 0x85d81905,
-    0x26364265, 0x85d638b0,
-  0x26304333, 0x85d458a6, 0x262a43ea, 0x85d278e7, 0x26244489, 0x85d09974,
-    0x261e4511, 0x85ceba4d,
-  0x26184581, 0x85ccdb70, 0x261245da, 0x85cafcdf, 0x260c461b, 0x85c91e9a,
-    0x26064645, 0x85c740a0,
-  0x26004657, 0x85c562f1, 0x25fa4652, 0x85c3858d, 0x25f44635, 0x85c1a875,
-    0x25ee4601, 0x85bfcba9,
-  0x25e845b6, 0x85bdef28, 0x25e24553, 0x85bc12f2, 0x25dc44d9, 0x85ba3707,
-    0x25d64447, 0x85b85b68,
-  0x25d0439f, 0x85b68015, 0x25ca42de, 0x85b4a50d, 0x25c44207, 0x85b2ca50,
-    0x25be4118, 0x85b0efdf,
-  0x25b84012, 0x85af15b9, 0x25b23ef5, 0x85ad3bdf, 0x25ac3dc0, 0x85ab6250,
-    0x25a63c74, 0x85a9890d,
-  0x25a03b11, 0x85a7b015, 0x259a3997, 0x85a5d768, 0x25943806, 0x85a3ff07,
-    0x258e365d, 0x85a226f2,
-  0x2588349d, 0x85a04f28, 0x258232c6, 0x859e77a9, 0x257c30d8, 0x859ca076,
-    0x25762ed3, 0x859ac98f,
-  0x25702cb7, 0x8598f2f3, 0x256a2a83, 0x85971ca2, 0x25642839, 0x8595469d,
-    0x255e25d7, 0x859370e4,
-  0x2558235f, 0x85919b76, 0x255220cf, 0x858fc653, 0x254c1e28, 0x858df17c,
-    0x25461b6b, 0x858c1cf1,
-  0x25401896, 0x858a48b1, 0x253a15aa, 0x858874bd, 0x253412a8, 0x8586a114,
-    0x252e0f8e, 0x8584cdb7,
-  0x25280c5e, 0x8582faa5, 0x25220916, 0x858127df, 0x251c05b8, 0x857f5564,
-    0x25160243, 0x857d8335,
-  0x250ffeb7, 0x857bb152, 0x2509fb14, 0x8579dfba, 0x2503f75a, 0x85780e6e,
-    0x24fdf389, 0x85763d6d,
-  0x24f7efa2, 0x85746cb8, 0x24f1eba4, 0x85729c4e, 0x24ebe78f, 0x8570cc30,
-    0x24e5e363, 0x856efc5e,
-  0x24dfdf20, 0x856d2cd7, 0x24d9dac7, 0x856b5d9c, 0x24d3d657, 0x85698ead,
-    0x24cdd1d0, 0x8567c009,
-  0x24c7cd33, 0x8565f1b0, 0x24c1c87f, 0x856423a4, 0x24bbc3b4, 0x856255e3,
-    0x24b5bed2, 0x8560886d,
-  0x24afb9da, 0x855ebb44, 0x24a9b4cb, 0x855cee66, 0x24a3afa6, 0x855b21d3,
-    0x249daa6a, 0x8559558c,
-  0x2497a517, 0x85578991, 0x24919fae, 0x8555bde2, 0x248b9a2f, 0x8553f27e,
-    0x24859498, 0x85522766,
-  0x247f8eec, 0x85505c99, 0x24798928, 0x854e9219, 0x2473834f, 0x854cc7e3,
-    0x246d7d5e, 0x854afdfa,
-  0x24677758, 0x8549345c, 0x2461713a, 0x85476b0a, 0x245b6b07, 0x8545a204,
-    0x245564bd, 0x8543d949,
-  0x244f5e5c, 0x854210db, 0x244957e5, 0x854048b7, 0x24435158, 0x853e80e0,
-    0x243d4ab4, 0x853cb954,
-  0x243743fa, 0x853af214, 0x24313d2a, 0x85392b20, 0x242b3644, 0x85376477,
-    0x24252f47, 0x85359e1a,
-  0x241f2833, 0x8533d809, 0x2419210a, 0x85321244, 0x241319ca, 0x85304cca,
-    0x240d1274, 0x852e879d,
-  0x24070b08, 0x852cc2bb, 0x24010385, 0x852afe24, 0x23fafbec, 0x852939da,
-    0x23f4f43e, 0x852775db,
-  0x23eeec78, 0x8525b228, 0x23e8e49d, 0x8523eec1, 0x23e2dcac, 0x85222ba5,
-    0x23dcd4a4, 0x852068d6,
-  0x23d6cc87, 0x851ea652, 0x23d0c453, 0x851ce41a, 0x23cabc09, 0x851b222e,
-    0x23c4b3a9, 0x8519608d,
-  0x23beab33, 0x85179f39, 0x23b8a2a7, 0x8515de30, 0x23b29a05, 0x85141d73,
-    0x23ac914d, 0x85125d02,
-  0x23a6887f, 0x85109cdd, 0x23a07f9a, 0x850edd03, 0x239a76a0, 0x850d1d75,
-    0x23946d90, 0x850b5e34,
-  0x238e646a, 0x85099f3e, 0x23885b2e, 0x8507e094, 0x238251dd, 0x85062235,
-    0x237c4875, 0x85046423,
-  0x23763ef7, 0x8502a65c, 0x23703564, 0x8500e8e2, 0x236a2bba, 0x84ff2bb3,
-    0x236421fb, 0x84fd6ed0,
-  0x235e1826, 0x84fbb239, 0x23580e3b, 0x84f9f5ee, 0x2352043b, 0x84f839ee,
-    0x234bfa24, 0x84f67e3b,
-  0x2345eff8, 0x84f4c2d4, 0x233fe5b6, 0x84f307b8, 0x2339db5e, 0x84f14ce8,
-    0x2333d0f1, 0x84ef9265,
-  0x232dc66d, 0x84edd82d, 0x2327bbd5, 0x84ec1e41, 0x2321b126, 0x84ea64a1,
-    0x231ba662, 0x84e8ab4d,
-  0x23159b88, 0x84e6f244, 0x230f9098, 0x84e53988, 0x23098593, 0x84e38118,
-    0x23037a78, 0x84e1c8f3,
-  0x22fd6f48, 0x84e0111b, 0x22f76402, 0x84de598f, 0x22f158a7, 0x84dca24e,
-    0x22eb4d36, 0x84daeb5a,
-  0x22e541af, 0x84d934b1, 0x22df3613, 0x84d77e54, 0x22d92a61, 0x84d5c844,
-    0x22d31e9a, 0x84d4127f,
-  0x22cd12bd, 0x84d25d06, 0x22c706cb, 0x84d0a7da, 0x22c0fac4, 0x84cef2f9,
-    0x22baeea7, 0x84cd3e64,
-  0x22b4e274, 0x84cb8a1b, 0x22aed62c, 0x84c9d61f, 0x22a8c9cf, 0x84c8226e,
-    0x22a2bd5d, 0x84c66f09,
-  0x229cb0d5, 0x84c4bbf0, 0x2296a437, 0x84c30924, 0x22909785, 0x84c156a3,
-    0x228a8abd, 0x84bfa46e,
-  0x22847de0, 0x84bdf286, 0x227e70ed, 0x84bc40e9, 0x227863e5, 0x84ba8f98,
-    0x227256c8, 0x84b8de94,
-  0x226c4996, 0x84b72ddb, 0x22663c4e, 0x84b57d6f, 0x22602ef1, 0x84b3cd4f,
-    0x225a217f, 0x84b21d7a,
-  0x225413f8, 0x84b06df2, 0x224e065c, 0x84aebeb6, 0x2247f8aa, 0x84ad0fc6,
-    0x2241eae3, 0x84ab6122,
-  0x223bdd08, 0x84a9b2ca, 0x2235cf17, 0x84a804be, 0x222fc111, 0x84a656fe,
-    0x2229b2f6, 0x84a4a98a,
-  0x2223a4c5, 0x84a2fc62, 0x221d9680, 0x84a14f87, 0x22178826, 0x849fa2f7,
-    0x221179b7, 0x849df6b4,
-  0x220b6b32, 0x849c4abd, 0x22055c99, 0x849a9f12, 0x21ff4dea, 0x8498f3b3,
-    0x21f93f27, 0x849748a0,
-  0x21f3304f, 0x84959dd9, 0x21ed2162, 0x8493f35e, 0x21e71260, 0x84924930,
-    0x21e10349, 0x84909f4e,
-  0x21daf41d, 0x848ef5b7, 0x21d4e4dc, 0x848d4c6d, 0x21ced586, 0x848ba36f,
-    0x21c8c61c, 0x8489fabe,
-  0x21c2b69c, 0x84885258, 0x21bca708, 0x8486aa3e, 0x21b6975f, 0x84850271,
-    0x21b087a1, 0x84835af0,
-  0x21aa77cf, 0x8481b3bb, 0x21a467e7, 0x84800cd2, 0x219e57eb, 0x847e6636,
-    0x219847da, 0x847cbfe5,
-  0x219237b5, 0x847b19e1, 0x218c277a, 0x84797429, 0x2186172b, 0x8477cebd,
-    0x218006c8, 0x8476299e,
-  0x2179f64f, 0x847484ca, 0x2173e5c2, 0x8472e043, 0x216dd521, 0x84713c08,
-    0x2167c46b, 0x846f9819,
-  0x2161b3a0, 0x846df477, 0x215ba2c0, 0x846c5120, 0x215591cc, 0x846aae16,
-    0x214f80c4, 0x84690b58,
-  0x21496fa7, 0x846768e7, 0x21435e75, 0x8465c6c1, 0x213d4d2f, 0x846424e8,
-    0x21373bd4, 0x8462835b,
-  0x21312a65, 0x8460e21a, 0x212b18e1, 0x845f4126, 0x21250749, 0x845da07e,
-    0x211ef59d, 0x845c0022,
-  0x2118e3dc, 0x845a6012, 0x2112d206, 0x8458c04f, 0x210cc01d, 0x845720d8,
-    0x2106ae1e, 0x845581ad,
-  0x21009c0c, 0x8453e2cf, 0x20fa89e5, 0x8452443d, 0x20f477aa, 0x8450a5f7,
-    0x20ee655a, 0x844f07fd,
-  0x20e852f6, 0x844d6a50, 0x20e2407e, 0x844bccef, 0x20dc2df2, 0x844a2fda,
-    0x20d61b51, 0x84489311,
-  0x20d0089c, 0x8446f695, 0x20c9f5d3, 0x84455a66, 0x20c3e2f5, 0x8443be82,
-    0x20bdd003, 0x844222eb,
-  0x20b7bcfe, 0x844087a0, 0x20b1a9e4, 0x843eeca2, 0x20ab96b5, 0x843d51f0,
-    0x20a58373, 0x843bb78a,
-  0x209f701c, 0x843a1d70, 0x20995cb2, 0x843883a3, 0x20934933, 0x8436ea23,
-    0x208d35a0, 0x843550ee,
-  0x208721f9, 0x8433b806, 0x20810e3e, 0x84321f6b, 0x207afa6f, 0x8430871b,
-    0x2074e68c, 0x842eef18,
-  0x206ed295, 0x842d5762, 0x2068be8a, 0x842bbff8, 0x2062aa6b, 0x842a28da,
-    0x205c9638, 0x84289209,
-  0x205681f1, 0x8426fb84, 0x20506d96, 0x8425654b, 0x204a5927, 0x8423cf5f,
-    0x204444a4, 0x842239bf,
-  0x203e300d, 0x8420a46c, 0x20381b63, 0x841f0f65, 0x203206a4, 0x841d7aaa,
-    0x202bf1d2, 0x841be63c,
-  0x2025dcec, 0x841a521a, 0x201fc7f2, 0x8418be45, 0x2019b2e4, 0x84172abc,
-    0x20139dc2, 0x84159780,
-  0x200d888d, 0x84140490, 0x20077344, 0x841271ec, 0x20015de7, 0x8410df95,
-    0x1ffb4876, 0x840f4d8a,
-  0x1ff532f2, 0x840dbbcc, 0x1fef1d59, 0x840c2a5a, 0x1fe907ae, 0x840a9935,
-    0x1fe2f1ee, 0x8409085c,
-  0x1fdcdc1b, 0x840777d0, 0x1fd6c634, 0x8405e790, 0x1fd0b03a, 0x8404579d,
-    0x1fca9a2b, 0x8402c7f6,
-  0x1fc4840a, 0x8401389b, 0x1fbe6dd4, 0x83ffa98d, 0x1fb8578b, 0x83fe1acc,
-    0x1fb2412f, 0x83fc8c57,
-  0x1fac2abf, 0x83fafe2e, 0x1fa6143b, 0x83f97052, 0x1f9ffda4, 0x83f7e2c3,
-    0x1f99e6fa, 0x83f65580,
-  0x1f93d03c, 0x83f4c889, 0x1f8db96a, 0x83f33bdf, 0x1f87a285, 0x83f1af82,
-    0x1f818b8d, 0x83f02371,
-  0x1f7b7481, 0x83ee97ad, 0x1f755d61, 0x83ed0c35, 0x1f6f462f, 0x83eb810a,
-    0x1f692ee9, 0x83e9f62b,
-  0x1f63178f, 0x83e86b99, 0x1f5d0022, 0x83e6e153, 0x1f56e8a2, 0x83e5575a,
-    0x1f50d10e, 0x83e3cdad,
-  0x1f4ab968, 0x83e2444d, 0x1f44a1ad, 0x83e0bb3a, 0x1f3e89e0, 0x83df3273,
-    0x1f3871ff, 0x83dda9f9,
-  0x1f325a0b, 0x83dc21cb, 0x1f2c4204, 0x83da99ea, 0x1f2629ea, 0x83d91255,
-    0x1f2011bc, 0x83d78b0d,
-  0x1f19f97b, 0x83d60412, 0x1f13e127, 0x83d47d63, 0x1f0dc8c0, 0x83d2f701,
-    0x1f07b045, 0x83d170eb,
-  0x1f0197b8, 0x83cfeb22, 0x1efb7f17, 0x83ce65a6, 0x1ef56664, 0x83cce076,
-    0x1eef4d9d, 0x83cb5b93,
-  0x1ee934c3, 0x83c9d6fc, 0x1ee31bd6, 0x83c852b2, 0x1edd02d6, 0x83c6ceb5,
-    0x1ed6e9c3, 0x83c54b04,
-  0x1ed0d09d, 0x83c3c7a0, 0x1ecab763, 0x83c24488, 0x1ec49e17, 0x83c0c1be,
-    0x1ebe84b8, 0x83bf3f3f,
-  0x1eb86b46, 0x83bdbd0e, 0x1eb251c1, 0x83bc3b29, 0x1eac3829, 0x83bab991,
-    0x1ea61e7e, 0x83b93845,
-  0x1ea004c1, 0x83b7b746, 0x1e99eaf0, 0x83b63694, 0x1e93d10c, 0x83b4b62e,
-    0x1e8db716, 0x83b33616,
-  0x1e879d0d, 0x83b1b649, 0x1e8182f1, 0x83b036ca, 0x1e7b68c2, 0x83aeb797,
-    0x1e754e80, 0x83ad38b1,
-  0x1e6f342c, 0x83abba17, 0x1e6919c4, 0x83aa3bca, 0x1e62ff4a, 0x83a8bdca,
-    0x1e5ce4be, 0x83a74017,
-  0x1e56ca1e, 0x83a5c2b0, 0x1e50af6c, 0x83a44596, 0x1e4a94a7, 0x83a2c8c9,
-    0x1e4479cf, 0x83a14c48,
-  0x1e3e5ee5, 0x839fd014, 0x1e3843e8, 0x839e542d, 0x1e3228d9, 0x839cd893,
-    0x1e2c0db6, 0x839b5d45,
-  0x1e25f282, 0x8399e244, 0x1e1fd73a, 0x83986790, 0x1e19bbe0, 0x8396ed29,
-    0x1e13a074, 0x8395730e,
-  0x1e0d84f5, 0x8393f940, 0x1e076963, 0x83927fbf, 0x1e014dbf, 0x8391068a,
-    0x1dfb3208, 0x838f8da2,
-  0x1df5163f, 0x838e1507, 0x1deefa63, 0x838c9cb9, 0x1de8de75, 0x838b24b8,
-    0x1de2c275, 0x8389ad03,
-  0x1ddca662, 0x8388359b, 0x1dd68a3c, 0x8386be80, 0x1dd06e04, 0x838547b2,
-    0x1dca51ba, 0x8383d130,
-  0x1dc4355e, 0x83825afb, 0x1dbe18ef, 0x8380e513, 0x1db7fc6d, 0x837f6f78,
-    0x1db1dfda, 0x837dfa2a,
-  0x1dabc334, 0x837c8528, 0x1da5a67c, 0x837b1074, 0x1d9f89b1, 0x83799c0c,
-    0x1d996cd4, 0x837827f0,
-  0x1d934fe5, 0x8376b422, 0x1d8d32e4, 0x837540a1, 0x1d8715d0, 0x8373cd6c,
-    0x1d80f8ab, 0x83725a84,
-  0x1d7adb73, 0x8370e7e9, 0x1d74be29, 0x836f759b, 0x1d6ea0cc, 0x836e039a,
-    0x1d68835e, 0x836c91e5,
-  0x1d6265dd, 0x836b207d, 0x1d5c484b, 0x8369af63, 0x1d562aa6, 0x83683e95,
-    0x1d500cef, 0x8366ce14,
-  0x1d49ef26, 0x83655ddf, 0x1d43d14b, 0x8363edf8, 0x1d3db35e, 0x83627e5d,
-    0x1d37955e, 0x83610f10,
-  0x1d31774d, 0x835fa00f, 0x1d2b592a, 0x835e315b, 0x1d253af5, 0x835cc2f4,
-    0x1d1f1cae, 0x835b54da,
-  0x1d18fe54, 0x8359e70d, 0x1d12dfe9, 0x8358798c, 0x1d0cc16c, 0x83570c59,
-    0x1d06a2dd, 0x83559f72,
-  0x1d00843d, 0x835432d8, 0x1cfa658a, 0x8352c68c, 0x1cf446c5, 0x83515a8c,
-    0x1cee27ef, 0x834feed9,
-  0x1ce80906, 0x834e8373, 0x1ce1ea0c, 0x834d185a, 0x1cdbcb00, 0x834bad8e,
-    0x1cd5abe3, 0x834a430e,
-  0x1ccf8cb3, 0x8348d8dc, 0x1cc96d72, 0x83476ef6, 0x1cc34e1f, 0x8346055e,
-    0x1cbd2eba, 0x83449c12,
-  0x1cb70f43, 0x83433314, 0x1cb0efbb, 0x8341ca62, 0x1caad021, 0x834061fd,
-    0x1ca4b075, 0x833ef9e6,
-  0x1c9e90b8, 0x833d921b, 0x1c9870e9, 0x833c2a9d, 0x1c925109, 0x833ac36c,
-    0x1c8c3116, 0x83395c88,
-  0x1c861113, 0x8337f5f1, 0x1c7ff0fd, 0x83368fa7, 0x1c79d0d6, 0x833529aa,
-    0x1c73b09d, 0x8333c3fa,
-  0x1c6d9053, 0x83325e97, 0x1c676ff8, 0x8330f981, 0x1c614f8b, 0x832f94b8,
-    0x1c5b2f0c, 0x832e303c,
-  0x1c550e7c, 0x832ccc0d, 0x1c4eedda, 0x832b682b, 0x1c48cd27, 0x832a0496,
-    0x1c42ac62, 0x8328a14d,
-  0x1c3c8b8c, 0x83273e52, 0x1c366aa5, 0x8325dba4, 0x1c3049ac, 0x83247943,
-    0x1c2a28a2, 0x8323172f,
-  0x1c240786, 0x8321b568, 0x1c1de659, 0x832053ee, 0x1c17c51b, 0x831ef2c1,
-    0x1c11a3cb, 0x831d91e1,
-  0x1c0b826a, 0x831c314e, 0x1c0560f8, 0x831ad109, 0x1bff3f75, 0x83197110,
-    0x1bf91de0, 0x83181164,
-  0x1bf2fc3a, 0x8316b205, 0x1becda83, 0x831552f4, 0x1be6b8ba, 0x8313f42f,
-    0x1be096e0, 0x831295b7,
-  0x1bda74f6, 0x8311378d, 0x1bd452f9, 0x830fd9af, 0x1bce30ec, 0x830e7c1f,
-    0x1bc80ece, 0x830d1edc,
-  0x1bc1ec9e, 0x830bc1e6, 0x1bbbca5e, 0x830a653c, 0x1bb5a80c, 0x830908e0,
-    0x1baf85a9, 0x8307acd1,
-  0x1ba96335, 0x83065110, 0x1ba340b0, 0x8304f59b, 0x1b9d1e1a, 0x83039a73,
-    0x1b96fb73, 0x83023f98,
-  0x1b90d8bb, 0x8300e50b, 0x1b8ab5f2, 0x82ff8acb, 0x1b849317, 0x82fe30d7,
-    0x1b7e702c, 0x82fcd731,
-  0x1b784d30, 0x82fb7dd8, 0x1b722a23, 0x82fa24cc, 0x1b6c0705, 0x82f8cc0d,
-    0x1b65e3d7, 0x82f7739c,
-  0x1b5fc097, 0x82f61b77, 0x1b599d46, 0x82f4c3a0, 0x1b5379e5, 0x82f36c15,
-    0x1b4d5672, 0x82f214d8,
-  0x1b4732ef, 0x82f0bde8, 0x1b410f5b, 0x82ef6745, 0x1b3aebb6, 0x82ee10ef,
-    0x1b34c801, 0x82ecbae7,
-  0x1b2ea43a, 0x82eb652b, 0x1b288063, 0x82ea0fbd, 0x1b225c7b, 0x82e8ba9c,
-    0x1b1c3883, 0x82e765c8,
-  0x1b161479, 0x82e61141, 0x1b0ff05f, 0x82e4bd07, 0x1b09cc34, 0x82e3691b,
-    0x1b03a7f9, 0x82e2157c,
-  0x1afd83ad, 0x82e0c22a, 0x1af75f50, 0x82df6f25, 0x1af13ae3, 0x82de1c6d,
-    0x1aeb1665, 0x82dcca02,
-  0x1ae4f1d6, 0x82db77e5, 0x1adecd37, 0x82da2615, 0x1ad8a887, 0x82d8d492,
-    0x1ad283c7, 0x82d7835c,
-  0x1acc5ef6, 0x82d63274, 0x1ac63a14, 0x82d4e1d8, 0x1ac01522, 0x82d3918a,
-    0x1ab9f020, 0x82d24189,
-  0x1ab3cb0d, 0x82d0f1d5, 0x1aada5e9, 0x82cfa26f, 0x1aa780b6, 0x82ce5356,
-    0x1aa15b71, 0x82cd048a,
-  0x1a9b361d, 0x82cbb60b, 0x1a9510b7, 0x82ca67d9, 0x1a8eeb42, 0x82c919f5,
-    0x1a88c5bc, 0x82c7cc5e,
-  0x1a82a026, 0x82c67f14, 0x1a7c7a7f, 0x82c53217, 0x1a7654c8, 0x82c3e568,
-    0x1a702f01, 0x82c29906,
-  0x1a6a0929, 0x82c14cf1, 0x1a63e341, 0x82c00129, 0x1a5dbd49, 0x82beb5af,
-    0x1a579741, 0x82bd6a82,
-  0x1a517128, 0x82bc1fa2, 0x1a4b4aff, 0x82bad50f, 0x1a4524c6, 0x82b98aca,
-    0x1a3efe7c, 0x82b840d2,
-  0x1a38d823, 0x82b6f727, 0x1a32b1b9, 0x82b5adca, 0x1a2c8b3f, 0x82b464ba,
-    0x1a2664b5, 0x82b31bf7,
-  0x1a203e1b, 0x82b1d381, 0x1a1a1771, 0x82b08b59, 0x1a13f0b6, 0x82af437e,
-    0x1a0dc9ec, 0x82adfbf0,
-  0x1a07a311, 0x82acb4b0, 0x1a017c27, 0x82ab6dbd, 0x19fb552c, 0x82aa2717,
-    0x19f52e22, 0x82a8e0bf,
-  0x19ef0707, 0x82a79ab3, 0x19e8dfdc, 0x82a654f6, 0x19e2b8a2, 0x82a50f85,
-    0x19dc9157, 0x82a3ca62,
-  0x19d669fc, 0x82a2858c, 0x19d04292, 0x82a14104, 0x19ca1b17, 0x829ffcc8,
-    0x19c3f38d, 0x829eb8db,
-  0x19bdcbf3, 0x829d753a, 0x19b7a449, 0x829c31e7, 0x19b17c8f, 0x829aeee1,
-    0x19ab54c5, 0x8299ac29,
-  0x19a52ceb, 0x829869be, 0x199f0502, 0x829727a0, 0x1998dd09, 0x8295e5cf,
-    0x1992b4ff, 0x8294a44c,
-  0x198c8ce7, 0x82936317, 0x198664be, 0x8292222e, 0x19803c86, 0x8290e194,
-    0x197a143e, 0x828fa146,
-  0x1973ebe6, 0x828e6146, 0x196dc37e, 0x828d2193, 0x19679b07, 0x828be22e,
-    0x19617280, 0x828aa316,
-  0x195b49ea, 0x8289644b, 0x19552144, 0x828825ce, 0x194ef88e, 0x8286e79e,
-    0x1948cfc8, 0x8285a9bb,
-  0x1942a6f3, 0x82846c26, 0x193c7e0f, 0x82832edf, 0x1936551b, 0x8281f1e4,
-    0x19302c17, 0x8280b538,
-  0x192a0304, 0x827f78d8, 0x1923d9e1, 0x827e3cc6, 0x191db0af, 0x827d0102,
-    0x1917876d, 0x827bc58a,
-  0x19115e1c, 0x827a8a61, 0x190b34bb, 0x82794f84, 0x19050b4b, 0x827814f6,
-    0x18fee1cb, 0x8276dab4,
-  0x18f8b83c, 0x8275a0c0, 0x18f28e9e, 0x8274671a, 0x18ec64f0, 0x82732dc0,
-    0x18e63b33, 0x8271f4b5,
-  0x18e01167, 0x8270bbf7, 0x18d9e78b, 0x826f8386, 0x18d3bda0, 0x826e4b62,
-    0x18cd93a5, 0x826d138d,
-  0x18c7699b, 0x826bdc04, 0x18c13f82, 0x826aa4c9, 0x18bb155a, 0x82696ddc,
-    0x18b4eb22, 0x8268373c,
-  0x18aec0db, 0x826700e9, 0x18a89685, 0x8265cae4, 0x18a26c20, 0x8264952d,
-    0x189c41ab, 0x82635fc2,
-  0x18961728, 0x82622aa6, 0x188fec95, 0x8260f5d7, 0x1889c1f3, 0x825fc155,
-    0x18839742, 0x825e8d21,
-  0x187d6c82, 0x825d593a, 0x187741b2, 0x825c25a1, 0x187116d4, 0x825af255,
-    0x186aebe6, 0x8259bf57,
-  0x1864c0ea, 0x82588ca7, 0x185e95de, 0x82575a44, 0x18586ac3, 0x8256282e,
-    0x18523f9a, 0x8254f666,
-  0x184c1461, 0x8253c4eb, 0x1845e919, 0x825293be, 0x183fbdc3, 0x825162df,
-    0x1839925d, 0x8250324d,
-  0x183366e9, 0x824f0208, 0x182d3b65, 0x824dd211, 0x18270fd3, 0x824ca268,
-    0x1820e431, 0x824b730c,
-  0x181ab881, 0x824a43fe, 0x18148cc2, 0x8249153d, 0x180e60f4, 0x8247e6ca,
-    0x18083518, 0x8246b8a4,
-  0x1802092c, 0x82458acc, 0x17fbdd32, 0x82445d41, 0x17f5b129, 0x82433004,
-    0x17ef8511, 0x82420315,
-  0x17e958ea, 0x8240d673, 0x17e32cb5, 0x823faa1e, 0x17dd0070, 0x823e7e18,
-    0x17d6d41d, 0x823d525e,
-  0x17d0a7bc, 0x823c26f3, 0x17ca7b4c, 0x823afbd5, 0x17c44ecd, 0x8239d104,
-    0x17be223f, 0x8238a681,
-  0x17b7f5a3, 0x82377c4c, 0x17b1c8f8, 0x82365264, 0x17ab9c3e, 0x823528ca,
-    0x17a56f76, 0x8233ff7e,
-  0x179f429f, 0x8232d67f, 0x179915ba, 0x8231adce, 0x1792e8c6, 0x8230856a,
-    0x178cbbc4, 0x822f5d54,
-  0x17868eb3, 0x822e358b, 0x17806194, 0x822d0e10, 0x177a3466, 0x822be6e3,
-    0x17740729, 0x822ac004,
-  0x176dd9de, 0x82299971, 0x1767ac85, 0x8228732d, 0x17617f1d, 0x82274d36,
-    0x175b51a7, 0x8226278d,
-  0x17552422, 0x82250232, 0x174ef68f, 0x8223dd24, 0x1748c8ee, 0x8222b863,
-    0x17429b3e, 0x822193f1,
-  0x173c6d80, 0x82206fcc, 0x17363fb4, 0x821f4bf5, 0x173011d9, 0x821e286b,
-    0x1729e3f0, 0x821d052f,
-  0x1723b5f9, 0x821be240, 0x171d87f3, 0x821abfa0, 0x171759df, 0x82199d4d,
-    0x17112bbd, 0x82187b47,
-  0x170afd8d, 0x82175990, 0x1704cf4f, 0x82163826, 0x16fea102, 0x82151709,
-    0x16f872a7, 0x8213f63a,
-  0x16f2443e, 0x8212d5b9, 0x16ec15c7, 0x8211b586, 0x16e5e741, 0x821095a0,
-    0x16dfb8ae, 0x820f7608,
-  0x16d98a0c, 0x820e56be, 0x16d35b5c, 0x820d37c1, 0x16cd2c9f, 0x820c1912,
-    0x16c6fdd3, 0x820afab1,
-  0x16c0cef9, 0x8209dc9e, 0x16baa011, 0x8208bed8, 0x16b4711b, 0x8207a160,
-    0x16ae4217, 0x82068435,
-  0x16a81305, 0x82056758, 0x16a1e3e5, 0x82044ac9, 0x169bb4b7, 0x82032e88,
-    0x1695857b, 0x82021294,
-  0x168f5632, 0x8200f6ef, 0x168926da, 0x81ffdb96, 0x1682f774, 0x81fec08c,
-    0x167cc801, 0x81fda5cf,
-  0x1676987f, 0x81fc8b60, 0x167068f0, 0x81fb713f, 0x166a3953, 0x81fa576c,
-    0x166409a8, 0x81f93de6,
-  0x165dd9f0, 0x81f824ae, 0x1657aa29, 0x81f70bc3, 0x16517a55, 0x81f5f327,
-    0x164b4a73, 0x81f4dad8,
-  0x16451a83, 0x81f3c2d7, 0x163eea86, 0x81f2ab24, 0x1638ba7a, 0x81f193be,
-    0x16328a61, 0x81f07ca6,
-  0x162c5a3b, 0x81ef65dc, 0x16262a06, 0x81ee4f60, 0x161ff9c4, 0x81ed3932,
-    0x1619c975, 0x81ec2351,
-  0x16139918, 0x81eb0dbe, 0x160d68ad, 0x81e9f879, 0x16073834, 0x81e8e381,
-    0x160107ae, 0x81e7ced8,
-  0x15fad71b, 0x81e6ba7c, 0x15f4a679, 0x81e5a66e, 0x15ee75cb, 0x81e492ad,
-    0x15e8450e, 0x81e37f3b,
-  0x15e21445, 0x81e26c16, 0x15dbe36d, 0x81e1593f, 0x15d5b288, 0x81e046b6,
-    0x15cf8196, 0x81df347b,
-  0x15c95097, 0x81de228d, 0x15c31f89, 0x81dd10ee, 0x15bcee6f, 0x81dbff9c,
-    0x15b6bd47, 0x81daee98,
-  0x15b08c12, 0x81d9dde1, 0x15aa5acf, 0x81d8cd79, 0x15a4297f, 0x81d7bd5e,
-    0x159df821, 0x81d6ad92,
-  0x1597c6b7, 0x81d59e13, 0x1591953e, 0x81d48ee1, 0x158b63b9, 0x81d37ffe,
-    0x15853226, 0x81d27169,
-  0x157f0086, 0x81d16321, 0x1578ced9, 0x81d05527, 0x15729d1f, 0x81cf477b,
-    0x156c6b57, 0x81ce3a1d,
-  0x15663982, 0x81cd2d0c, 0x156007a0, 0x81cc204a, 0x1559d5b1, 0x81cb13d5,
-    0x1553a3b4, 0x81ca07af,
-  0x154d71aa, 0x81c8fbd6, 0x15473f94, 0x81c7f04b, 0x15410d70, 0x81c6e50d,
-    0x153adb3f, 0x81c5da1e,
-  0x1534a901, 0x81c4cf7d, 0x152e76b5, 0x81c3c529, 0x1528445d, 0x81c2bb23,
-    0x152211f8, 0x81c1b16b,
-  0x151bdf86, 0x81c0a801, 0x1515ad06, 0x81bf9ee5, 0x150f7a7a, 0x81be9617,
-    0x150947e1, 0x81bd8d97,
-  0x1503153a, 0x81bc8564, 0x14fce287, 0x81bb7d7f, 0x14f6afc7, 0x81ba75e9,
-    0x14f07cf9, 0x81b96ea0,
-  0x14ea4a1f, 0x81b867a5, 0x14e41738, 0x81b760f8, 0x14dde445, 0x81b65a99,
-    0x14d7b144, 0x81b55488,
-  0x14d17e36, 0x81b44ec4, 0x14cb4b1c, 0x81b3494f, 0x14c517f4, 0x81b24427,
-    0x14bee4c0, 0x81b13f4e,
-  0x14b8b17f, 0x81b03ac2, 0x14b27e32, 0x81af3684, 0x14ac4ad7, 0x81ae3294,
-    0x14a61770, 0x81ad2ef2,
-  0x149fe3fc, 0x81ac2b9e, 0x1499b07c, 0x81ab2898, 0x14937cee, 0x81aa25e0,
-    0x148d4954, 0x81a92376,
-  0x148715ae, 0x81a82159, 0x1480e1fa, 0x81a71f8b, 0x147aae3a, 0x81a61e0b,
-    0x14747a6d, 0x81a51cd8,
-  0x146e4694, 0x81a41bf4, 0x146812ae, 0x81a31b5d, 0x1461debc, 0x81a21b14,
-    0x145baabd, 0x81a11b1a,
-  0x145576b1, 0x81a01b6d, 0x144f4299, 0x819f1c0e, 0x14490e74, 0x819e1cfd,
-    0x1442da43, 0x819d1e3a,
-  0x143ca605, 0x819c1fc5, 0x143671bb, 0x819b219e, 0x14303d65, 0x819a23c5,
-    0x142a0902, 0x8199263a,
-  0x1423d492, 0x819828fd, 0x141da016, 0x81972c0e, 0x14176b8e, 0x81962f6d,
-    0x141136f9, 0x8195331a,
-  0x140b0258, 0x81943715, 0x1404cdaa, 0x81933b5e, 0x13fe98f1, 0x81923ff4,
-    0x13f8642a, 0x819144d9,
-  0x13f22f58, 0x81904a0c, 0x13ebfa79, 0x818f4f8d, 0x13e5c58e, 0x818e555c,
-    0x13df9097, 0x818d5b78,
-  0x13d95b93, 0x818c61e3, 0x13d32683, 0x818b689c, 0x13ccf167, 0x818a6fa3,
-    0x13c6bc3f, 0x818976f8,
-  0x13c0870a, 0x81887e9a, 0x13ba51ca, 0x8187868b, 0x13b41c7d, 0x81868eca,
-    0x13ade724, 0x81859757,
-  0x13a7b1bf, 0x8184a032, 0x13a17c4d, 0x8183a95b, 0x139b46d0, 0x8182b2d1,
-    0x13951146, 0x8181bc96,
-  0x138edbb1, 0x8180c6a9, 0x1388a60f, 0x817fd10a, 0x13827062, 0x817edbb9,
-    0x137c3aa8, 0x817de6b6,
-  0x137604e2, 0x817cf201, 0x136fcf10, 0x817bfd9b, 0x13699933, 0x817b0982,
-    0x13636349, 0x817a15b7,
-  0x135d2d53, 0x8179223a, 0x1356f752, 0x81782f0b, 0x1350c144, 0x81773c2b,
-    0x134a8b2b, 0x81764998,
-  0x13445505, 0x81755754, 0x133e1ed4, 0x8174655d, 0x1337e897, 0x817373b5,
-    0x1331b24e, 0x8172825a,
-  0x132b7bf9, 0x8171914e, 0x13254599, 0x8170a090, 0x131f0f2c, 0x816fb020,
-    0x1318d8b4, 0x816ebffe,
-  0x1312a230, 0x816dd02a, 0x130c6ba0, 0x816ce0a4, 0x13063505, 0x816bf16c,
-    0x12fffe5d, 0x816b0282,
-  0x12f9c7aa, 0x816a13e6, 0x12f390ec, 0x81692599, 0x12ed5a21, 0x81683799,
-    0x12e7234b, 0x816749e8,
-  0x12e0ec6a, 0x81665c84, 0x12dab57c, 0x81656f6f, 0x12d47e83, 0x816482a8,
-    0x12ce477f, 0x8163962f,
-  0x12c8106f, 0x8162aa04, 0x12c1d953, 0x8161be27, 0x12bba22b, 0x8160d298,
-    0x12b56af9, 0x815fe758,
-  0x12af33ba, 0x815efc65, 0x12a8fc70, 0x815e11c1, 0x12a2c51b, 0x815d276a,
-    0x129c8dba, 0x815c3d62,
-  0x1296564d, 0x815b53a8, 0x12901ed5, 0x815a6a3c, 0x1289e752, 0x8159811e,
-    0x1283afc3, 0x8158984e,
-  0x127d7829, 0x8157afcd, 0x12774083, 0x8156c799, 0x127108d2, 0x8155dfb4,
-    0x126ad116, 0x8154f81d,
-  0x1264994e, 0x815410d4, 0x125e617b, 0x815329d9, 0x1258299c, 0x8152432c,
-    0x1251f1b3, 0x81515ccd,
-  0x124bb9be, 0x815076bd, 0x124581bd, 0x814f90fb, 0x123f49b2, 0x814eab86,
-    0x1239119b, 0x814dc660,
-  0x1232d979, 0x814ce188, 0x122ca14b, 0x814bfcff, 0x12266913, 0x814b18c3,
-    0x122030cf, 0x814a34d6,
-  0x1219f880, 0x81495136, 0x1213c026, 0x81486de5, 0x120d87c1, 0x81478ae2,
-    0x12074f50, 0x8146a82e,
-  0x120116d5, 0x8145c5c7, 0x11fade4e, 0x8144e3ae, 0x11f4a5bd, 0x814401e4,
-    0x11ee6d20, 0x81432068,
-  0x11e83478, 0x81423f3a, 0x11e1fbc5, 0x81415e5a, 0x11dbc307, 0x81407dc9,
-    0x11d58a3e, 0x813f9d86,
-  0x11cf516a, 0x813ebd90, 0x11c9188b, 0x813ddde9, 0x11c2dfa2, 0x813cfe91,
-    0x11bca6ad, 0x813c1f86,
-  0x11b66dad, 0x813b40ca, 0x11b034a2, 0x813a625b, 0x11a9fb8d, 0x8139843b,
-    0x11a3c26c, 0x8138a66a,
-  0x119d8941, 0x8137c8e6, 0x1197500a, 0x8136ebb1, 0x119116c9, 0x81360ec9,
-    0x118add7d, 0x81353230,
-  0x1184a427, 0x813455e6, 0x117e6ac5, 0x813379e9, 0x11783159, 0x81329e3b,
-    0x1171f7e2, 0x8131c2db,
-  0x116bbe60, 0x8130e7c9, 0x116584d3, 0x81300d05, 0x115f4b3c, 0x812f3290,
-    0x1159119a, 0x812e5868,
-  0x1152d7ed, 0x812d7e8f, 0x114c9e35, 0x812ca505, 0x11466473, 0x812bcbc8,
-    0x11402aa6, 0x812af2da,
-  0x1139f0cf, 0x812a1a3a, 0x1133b6ed, 0x812941e8, 0x112d7d00, 0x812869e4,
-    0x11274309, 0x8127922f,
-  0x11210907, 0x8126bac8, 0x111acefb, 0x8125e3af, 0x111494e4, 0x81250ce4,
-    0x110e5ac2, 0x81243668,
-  0x11082096, 0x8123603a, 0x1101e65f, 0x81228a5a, 0x10fbac1e, 0x8121b4c8,
-    0x10f571d3, 0x8120df85,
-  0x10ef377d, 0x81200a90, 0x10e8fd1c, 0x811f35e9, 0x10e2c2b2, 0x811e6191,
-    0x10dc883c, 0x811d8d86,
-  0x10d64dbd, 0x811cb9ca, 0x10d01333, 0x811be65d, 0x10c9d89e, 0x811b133d,
-    0x10c39dff, 0x811a406c,
-  0x10bd6356, 0x81196de9, 0x10b728a3, 0x81189bb4, 0x10b0ede5, 0x8117c9ce,
-    0x10aab31d, 0x8116f836,
-  0x10a4784b, 0x811626ec, 0x109e3d6e, 0x811555f1, 0x10980287, 0x81148544,
-    0x1091c796, 0x8113b4e5,
-  0x108b8c9b, 0x8112e4d4, 0x10855195, 0x81121512, 0x107f1686, 0x8111459e,
-    0x1078db6c, 0x81107678,
-  0x1072a048, 0x810fa7a0, 0x106c651a, 0x810ed917, 0x106629e1, 0x810e0adc,
-    0x105fee9f, 0x810d3cf0,
-  0x1059b352, 0x810c6f52, 0x105377fc, 0x810ba202, 0x104d3c9b, 0x810ad500,
-    0x10470130, 0x810a084d,
-  0x1040c5bb, 0x81093be8, 0x103a8a3d, 0x81086fd1, 0x10344eb4, 0x8107a409,
-    0x102e1321, 0x8106d88f,
-  0x1027d784, 0x81060d63, 0x10219bdd, 0x81054286, 0x101b602d, 0x810477f7,
-    0x10152472, 0x8103adb6,
-  0x100ee8ad, 0x8102e3c4, 0x1008acdf, 0x81021a20, 0x10027107, 0x810150ca,
-    0xffc3524, 0x810087c3,
-  0xff5f938, 0x80ffbf0a, 0xfefbd42, 0x80fef69f, 0xfe98143, 0x80fe2e83,
-    0xfe34539, 0x80fd66b5,
-  0xfdd0926, 0x80fc9f35, 0xfd6cd08, 0x80fbd804, 0xfd090e1, 0x80fb1121,
-    0xfca54b1, 0x80fa4a8c,
-  0xfc41876, 0x80f98446, 0xfbddc32, 0x80f8be4e, 0xfb79fe4, 0x80f7f8a4,
-    0xfb1638d, 0x80f73349,
-  0xfab272b, 0x80f66e3c, 0xfa4eac0, 0x80f5a97e, 0xf9eae4c, 0x80f4e50e,
-    0xf9871ce, 0x80f420ec,
-  0xf923546, 0x80f35d19, 0xf8bf8b4, 0x80f29994, 0xf85bc19, 0x80f1d65d,
-    0xf7f7f75, 0x80f11375,
-  0xf7942c7, 0x80f050db, 0xf73060f, 0x80ef8e90, 0xf6cc94e, 0x80eecc93,
-    0xf668c83, 0x80ee0ae4,
-  0xf604faf, 0x80ed4984, 0xf5a12d1, 0x80ec8872, 0xf53d5ea, 0x80ebc7ae,
-    0xf4d98f9, 0x80eb0739,
-  0xf475bff, 0x80ea4712, 0xf411efb, 0x80e9873a, 0xf3ae1ee, 0x80e8c7b0,
-    0xf34a4d8, 0x80e80874,
-  0xf2e67b8, 0x80e74987, 0xf282a8f, 0x80e68ae8, 0xf21ed5d, 0x80e5cc98,
-    0xf1bb021, 0x80e50e96,
-  0xf1572dc, 0x80e450e2, 0xf0f358e, 0x80e3937d, 0xf08f836, 0x80e2d666,
-    0xf02bad5, 0x80e2199e,
-  0xefc7d6b, 0x80e15d24, 0xef63ff7, 0x80e0a0f8, 0xef0027b, 0x80dfe51b,
-    0xee9c4f5, 0x80df298c,
-  0xee38766, 0x80de6e4c, 0xedd49ce, 0x80ddb35a, 0xed70c2c, 0x80dcf8b7,
-    0xed0ce82, 0x80dc3e62,
-  0xeca90ce, 0x80db845b, 0xec45311, 0x80dacaa3, 0xebe154b, 0x80da1139,
-    0xeb7d77c, 0x80d9581e,
-  0xeb199a4, 0x80d89f51, 0xeab5bc3, 0x80d7e6d3, 0xea51dd8, 0x80d72ea3,
-    0xe9edfe5, 0x80d676c1,
-  0xe98a1e9, 0x80d5bf2e, 0xe9263e3, 0x80d507e9, 0xe8c25d5, 0x80d450f3,
-    0xe85e7be, 0x80d39a4b,
-  0xe7fa99e, 0x80d2e3f2, 0xe796b74, 0x80d22de7, 0xe732d42, 0x80d1782a,
-    0xe6cef07, 0x80d0c2bc,
-  0xe66b0c3, 0x80d00d9d, 0xe607277, 0x80cf58cc, 0xe5a3421, 0x80cea449,
-    0xe53f5c2, 0x80cdf015,
-  0xe4db75b, 0x80cd3c2f, 0xe4778eb, 0x80cc8898, 0xe413a72, 0x80cbd54f,
-    0xe3afbf0, 0x80cb2255,
-  0xe34bd66, 0x80ca6fa9, 0xe2e7ed2, 0x80c9bd4c, 0xe284036, 0x80c90b3d,
-    0xe220191, 0x80c8597c,
-  0xe1bc2e4, 0x80c7a80a, 0xe15842e, 0x80c6f6e7, 0xe0f456f, 0x80c64612,
-    0xe0906a7, 0x80c5958b,
-  0xe02c7d7, 0x80c4e553, 0xdfc88fe, 0x80c4356a, 0xdf64a1c, 0x80c385cf,
-    0xdf00b32, 0x80c2d682,
-  0xde9cc40, 0x80c22784, 0xde38d44, 0x80c178d4, 0xddd4e40, 0x80c0ca73,
-    0xdd70f34, 0x80c01c60,
-  0xdd0d01f, 0x80bf6e9c, 0xdca9102, 0x80bec127, 0xdc451dc, 0x80be13ff,
-    0xdbe12ad, 0x80bd6727,
-  0xdb7d376, 0x80bcba9d, 0xdb19437, 0x80bc0e61, 0xdab54ef, 0x80bb6274,
-    0xda5159f, 0x80bab6d5,
-  0xd9ed646, 0x80ba0b85, 0xd9896e5, 0x80b96083, 0xd92577b, 0x80b8b5d0,
-    0xd8c1809, 0x80b80b6c,
-  0xd85d88f, 0x80b76156, 0xd7f990c, 0x80b6b78e, 0xd795982, 0x80b60e15,
-    0xd7319ee, 0x80b564ea,
-  0xd6cda53, 0x80b4bc0e, 0xd669aaf, 0x80b41381, 0xd605b03, 0x80b36b42,
-    0xd5a1b4f, 0x80b2c351,
-  0xd53db92, 0x80b21baf, 0xd4d9bcd, 0x80b1745c, 0xd475c00, 0x80b0cd57,
-    0xd411c2b, 0x80b026a1,
-  0xd3adc4e, 0x80af8039, 0xd349c68, 0x80aeda20, 0xd2e5c7b, 0x80ae3455,
-    0xd281c85, 0x80ad8ed9,
-  0xd21dc87, 0x80ace9ab, 0xd1b9c81, 0x80ac44cc, 0xd155c73, 0x80aba03b,
-    0xd0f1c5d, 0x80aafbf9,
-  0xd08dc3f, 0x80aa5806, 0xd029c18, 0x80a9b461, 0xcfc5bea, 0x80a9110b,
-    0xcf61bb4, 0x80a86e03,
-  0xcefdb76, 0x80a7cb49, 0xce99b2f, 0x80a728df, 0xce35ae1, 0x80a686c2,
-    0xcdd1a8b, 0x80a5e4f5,
-  0xcd6da2d, 0x80a54376, 0xcd099c7, 0x80a4a245, 0xcca5959, 0x80a40163,
-    0xcc418e3, 0x80a360d0,
-  0xcbdd865, 0x80a2c08b, 0xcb797e0, 0x80a22095, 0xcb15752, 0x80a180ed,
-    0xcab16bd, 0x80a0e194,
-  0xca4d620, 0x80a04289, 0xc9e957b, 0x809fa3cd, 0xc9854cf, 0x809f0560,
-    0xc92141a, 0x809e6741,
-  0xc8bd35e, 0x809dc971, 0xc85929a, 0x809d2bef, 0xc7f51cf, 0x809c8ebc,
-    0xc7910fb, 0x809bf1d7,
-  0xc72d020, 0x809b5541, 0xc6c8f3e, 0x809ab8fa, 0xc664e53, 0x809a1d01,
-    0xc600d61, 0x80998157,
-  0xc59cc68, 0x8098e5fb, 0xc538b66, 0x80984aee, 0xc4d4a5d, 0x8097b030,
-    0xc47094d, 0x809715c0,
-  0xc40c835, 0x80967b9f, 0xc3a8715, 0x8095e1cc, 0xc3445ee, 0x80954848,
-    0xc2e04c0, 0x8094af13,
-  0xc27c389, 0x8094162c, 0xc21824c, 0x80937d93, 0xc1b4107, 0x8092e54a,
-    0xc14ffba, 0x80924d4f,
-  0xc0ebe66, 0x8091b5a2, 0xc087d0a, 0x80911e44, 0xc023ba7, 0x80908735,
-    0xbfbfa3d, 0x808ff074,
-  0xbf5b8cb, 0x808f5a02, 0xbef7752, 0x808ec3df, 0xbe935d2, 0x808e2e0a,
-    0xbe2f44a, 0x808d9884,
-  0xbdcb2bb, 0x808d034c, 0xbd67124, 0x808c6e63, 0xbd02f87, 0x808bd9c9,
-    0xbc9ede2, 0x808b457d,
-  0xbc3ac35, 0x808ab180, 0xbbd6a82, 0x808a1dd2, 0xbb728c7, 0x80898a72,
-    0xbb0e705, 0x8088f761,
-  0xbaaa53b, 0x8088649e, 0xba4636b, 0x8087d22a, 0xb9e2193, 0x80874005,
-    0xb97dfb5, 0x8086ae2e,
-  0xb919dcf, 0x80861ca6, 0xb8b5be1, 0x80858b6c, 0xb8519ed, 0x8084fa82,
-    0xb7ed7f2, 0x808469e5,
-  0xb7895f0, 0x8083d998, 0xb7253e6, 0x80834999, 0xb6c11d5, 0x8082b9e9,
-    0xb65cfbe, 0x80822a87,
-  0xb5f8d9f, 0x80819b74, 0xb594b7a, 0x80810cb0, 0xb53094d, 0x80807e3a,
-    0xb4cc719, 0x807ff013,
-  0xb4684df, 0x807f623b, 0xb40429d, 0x807ed4b1, 0xb3a0055, 0x807e4776,
-    0xb33be05, 0x807dba89,
-  0xb2d7baf, 0x807d2dec, 0xb273952, 0x807ca19c, 0xb20f6ee, 0x807c159c,
-    0xb1ab483, 0x807b89ea,
-  0xb147211, 0x807afe87, 0xb0e2f98, 0x807a7373, 0xb07ed19, 0x8079e8ad,
-    0xb01aa92, 0x80795e36,
-  0xafb6805, 0x8078d40d, 0xaf52571, 0x80784a33, 0xaeee2d7, 0x8077c0a8,
-    0xae8a036, 0x8077376c,
-  0xae25d8d, 0x8076ae7e, 0xadc1adf, 0x807625df, 0xad5d829, 0x80759d8e,
-    0xacf956d, 0x8075158c,
-  0xac952aa, 0x80748dd9, 0xac30fe1, 0x80740675, 0xabccd11, 0x80737f5f,
-    0xab68a3a, 0x8072f898,
-  0xab0475c, 0x8072721f, 0xaaa0478, 0x8071ebf6, 0xaa3c18e, 0x8071661a,
-    0xa9d7e9d, 0x8070e08e,
-  0xa973ba5, 0x80705b50, 0xa90f8a7, 0x806fd661, 0xa8ab5a2, 0x806f51c1,
-    0xa847297, 0x806ecd6f,
-  0xa7e2f85, 0x806e496c, 0xa77ec6d, 0x806dc5b8, 0xa71a94f, 0x806d4253,
-    0xa6b662a, 0x806cbf3c,
-  0xa6522fe, 0x806c3c74, 0xa5edfcc, 0x806bb9fa, 0xa589c94, 0x806b37cf,
-    0xa525955, 0x806ab5f3,
-  0xa4c1610, 0x806a3466, 0xa45d2c5, 0x8069b327, 0xa3f8f73, 0x80693237,
-    0xa394c1b, 0x8068b196,
-  0xa3308bd, 0x80683143, 0xa2cc558, 0x8067b13f, 0xa2681ed, 0x8067318a,
-    0xa203e7c, 0x8066b224,
-  0xa19fb04, 0x8066330c, 0xa13b787, 0x8065b443, 0xa0d7403, 0x806535c9,
-    0xa073079, 0x8064b79d,
-  0xa00ece8, 0x806439c0, 0x9faa952, 0x8063bc32, 0x9f465b5, 0x80633ef3,
-    0x9ee2213, 0x8062c202,
-  0x9e7de6a, 0x80624560, 0x9e19abb, 0x8061c90c, 0x9db5706, 0x80614d08,
-    0x9d5134b, 0x8060d152,
-  0x9cecf89, 0x806055eb, 0x9c88bc2, 0x805fdad2, 0x9c247f5, 0x805f6009,
-    0x9bc0421, 0x805ee58e,
-  0x9b5c048, 0x805e6b62, 0x9af7c69, 0x805df184, 0x9a93884, 0x805d77f5,
-    0x9a2f498, 0x805cfeb5,
-  0x99cb0a7, 0x805c85c4, 0x9966cb0, 0x805c0d21, 0x99028b3, 0x805b94ce,
-    0x989e4b0, 0x805b1cc8,
-  0x983a0a7, 0x805aa512, 0x97d5c99, 0x805a2daa, 0x9771884, 0x8059b692,
-    0x970d46a, 0x80593fc7,
-  0x96a9049, 0x8058c94c, 0x9644c23, 0x8058531f, 0x95e07f8, 0x8057dd41,
-    0x957c3c6, 0x805767b2,
-  0x9517f8f, 0x8056f272, 0x94b3b52, 0x80567d80, 0x944f70f, 0x805608dd,
-    0x93eb2c6, 0x80559489,
-  0x9386e78, 0x80552084, 0x9322a24, 0x8054accd, 0x92be5ca, 0x80543965,
-    0x925a16b, 0x8053c64c,
-  0x91f5d06, 0x80535381, 0x919189c, 0x8052e106, 0x912d42c, 0x80526ed9,
-    0x90c8fb6, 0x8051fcfb,
-  0x9064b3a, 0x80518b6b, 0x90006ba, 0x80511a2b, 0x8f9c233, 0x8050a939,
-    0x8f37da7, 0x80503896,
-  0x8ed3916, 0x804fc841, 0x8e6f47f, 0x804f583c, 0x8e0afe2, 0x804ee885,
-    0x8da6b40, 0x804e791d,
-  0x8d42699, 0x804e0a04, 0x8cde1ec, 0x804d9b39, 0x8c79d3a, 0x804d2cbd,
-    0x8c15882, 0x804cbe90,
-  0x8bb13c5, 0x804c50b2, 0x8b4cf02, 0x804be323, 0x8ae8a3a, 0x804b75e2,
-    0x8a8456d, 0x804b08f0,
-  0x8a2009a, 0x804a9c4d, 0x89bbbc3, 0x804a2ff9, 0x89576e5, 0x8049c3f3,
-    0x88f3203, 0x8049583d,
-  0x888ed1b, 0x8048ecd5, 0x882a82e, 0x804881bb, 0x87c633c, 0x804816f1,
-    0x8761e44, 0x8047ac75,
-  0x86fd947, 0x80474248, 0x8699445, 0x8046d86a, 0x8634f3e, 0x80466edb,
-    0x85d0a32, 0x8046059b,
-  0x856c520, 0x80459ca9, 0x850800a, 0x80453406, 0x84a3aee, 0x8044cbb2,
-    0x843f5cd, 0x804463ad,
-  0x83db0a7, 0x8043fbf6, 0x8376b7c, 0x8043948e, 0x831264c, 0x80432d75,
-    0x82ae117, 0x8042c6ab,
-  0x8249bdd, 0x80426030, 0x81e569d, 0x8041fa03, 0x8181159, 0x80419425,
-    0x811cc10, 0x80412e96,
-  0x80b86c2, 0x8040c956, 0x805416e, 0x80406465, 0x7fefc16, 0x803fffc2,
-    0x7f8b6b9, 0x803f9b6f,
-  0x7f27157, 0x803f376a, 0x7ec2bf0, 0x803ed3b3, 0x7e5e685, 0x803e704c,
-    0x7dfa114, 0x803e0d34,
-  0x7d95b9e, 0x803daa6a, 0x7d31624, 0x803d47ef, 0x7ccd0a5, 0x803ce5c3,
-    0x7c68b21, 0x803c83e5,
-  0x7c04598, 0x803c2257, 0x7ba000b, 0x803bc117, 0x7b3ba78, 0x803b6026,
-    0x7ad74e1, 0x803aff84,
-  0x7a72f45, 0x803a9f31, 0x7a0e9a5, 0x803a3f2d, 0x79aa400, 0x8039df77,
-    0x7945e56, 0x80398010,
-  0x78e18a7, 0x803920f8, 0x787d2f4, 0x8038c22f, 0x7818d3c, 0x803863b5,
-    0x77b4780, 0x80380589,
-  0x77501be, 0x8037a7ac, 0x76ebbf9, 0x80374a1f, 0x768762e, 0x8036ece0,
-    0x762305f, 0x80368fef,
-  0x75bea8c, 0x8036334e, 0x755a4b4, 0x8035d6fb, 0x74f5ed7, 0x80357af8,
-    0x74918f6, 0x80351f43,
-  0x742d311, 0x8034c3dd, 0x73c8d27, 0x803468c5, 0x7364738, 0x80340dfd,
-    0x7300145, 0x8033b383,
-  0x729bb4e, 0x80335959, 0x7237552, 0x8032ff7d, 0x71d2f52, 0x8032a5ef,
-    0x716e94e, 0x80324cb1,
-  0x710a345, 0x8031f3c2, 0x70a5d37, 0x80319b21, 0x7041726, 0x803142cf,
-    0x6fdd110, 0x8030eacd,
-  0x6f78af6, 0x80309318, 0x6f144d7, 0x80303bb3, 0x6eafeb4, 0x802fe49d,
-    0x6e4b88d, 0x802f8dd5,
-  0x6de7262, 0x802f375d, 0x6d82c32, 0x802ee133, 0x6d1e5fe, 0x802e8b58,
-    0x6cb9fc6, 0x802e35cb,
-  0x6c5598a, 0x802de08e, 0x6bf1349, 0x802d8ba0, 0x6b8cd05, 0x802d3700,
-    0x6b286bc, 0x802ce2af,
-  0x6ac406f, 0x802c8ead, 0x6a5fa1e, 0x802c3afa, 0x69fb3c9, 0x802be796,
-    0x6996d70, 0x802b9480,
-  0x6932713, 0x802b41ba, 0x68ce0b2, 0x802aef42, 0x6869a4c, 0x802a9d19,
-    0x68053e3, 0x802a4b3f,
-  0x67a0d76, 0x8029f9b4, 0x673c704, 0x8029a878, 0x66d808f, 0x8029578b,
-    0x6673a16, 0x802906ec,
-  0x660f398, 0x8028b69c, 0x65aad17, 0x8028669b, 0x6546692, 0x802816e9,
-    0x64e2009, 0x8027c786,
-  0x647d97c, 0x80277872, 0x64192eb, 0x802729ad, 0x63b4c57, 0x8026db36,
-    0x63505be, 0x80268d0e,
-  0x62ebf22, 0x80263f36, 0x6287882, 0x8025f1ac, 0x62231de, 0x8025a471,
-    0x61beb36, 0x80255784,
-  0x615a48b, 0x80250ae7, 0x60f5ddc, 0x8024be99, 0x6091729, 0x80247299,
-    0x602d072, 0x802426e8,
-  0x5fc89b8, 0x8023db86, 0x5f642fa, 0x80239073, 0x5effc38, 0x802345af,
-    0x5e9b572, 0x8022fb3a,
-  0x5e36ea9, 0x8022b114, 0x5dd27dd, 0x8022673c, 0x5d6e10c, 0x80221db3,
-    0x5d09a38, 0x8021d47a,
-  0x5ca5361, 0x80218b8f, 0x5c40c86, 0x802142f3, 0x5bdc5a7, 0x8020faa6,
-    0x5b77ec5, 0x8020b2a7,
-  0x5b137df, 0x80206af8, 0x5aaf0f6, 0x80202397, 0x5a4aa09, 0x801fdc86,
-    0x59e6319, 0x801f95c3,
-  0x5981c26, 0x801f4f4f, 0x591d52f, 0x801f092a, 0x58b8e34, 0x801ec354,
-    0x5854736, 0x801e7dcd,
-  0x57f0035, 0x801e3895, 0x578b930, 0x801df3ab, 0x5727228, 0x801daf11,
-    0x56c2b1c, 0x801d6ac5,
-  0x565e40d, 0x801d26c8, 0x55f9cfb, 0x801ce31a, 0x55955e6, 0x801c9fbb,
-    0x5530ecd, 0x801c5cab,
-  0x54cc7b1, 0x801c19ea, 0x5468092, 0x801bd777, 0x540396f, 0x801b9554,
-    0x539f249, 0x801b537f,
-  0x533ab20, 0x801b11fa, 0x52d63f4, 0x801ad0c3, 0x5271cc4, 0x801a8fdb,
-    0x520d592, 0x801a4f42,
-  0x51a8e5c, 0x801a0ef8, 0x5144723, 0x8019cefd, 0x50dffe7, 0x80198f50,
-    0x507b8a8, 0x80194ff3,
-  0x5017165, 0x801910e4, 0x4fb2a20, 0x8018d225, 0x4f4e2d8, 0x801893b4,
-    0x4ee9b8c, 0x80185592,
-  0x4e8543e, 0x801817bf, 0x4e20cec, 0x8017da3b, 0x4dbc597, 0x80179d06,
-    0x4d57e40, 0x80176020,
-  0x4cf36e5, 0x80172388, 0x4c8ef88, 0x8016e740, 0x4c2a827, 0x8016ab46,
-    0x4bc60c4, 0x80166f9c,
-  0x4b6195d, 0x80163440, 0x4afd1f4, 0x8015f933, 0x4a98a88, 0x8015be75,
-    0x4a34319, 0x80158406,
-  0x49cfba7, 0x801549e6, 0x496b432, 0x80151015, 0x4906cbb, 0x8014d693,
-    0x48a2540, 0x80149d5f,
-  0x483ddc3, 0x8014647b, 0x47d9643, 0x80142be5, 0x4774ec1, 0x8013f39e,
-    0x471073b, 0x8013bba7,
-  0x46abfb3, 0x801383fe, 0x4647828, 0x80134ca4, 0x45e309a, 0x80131599,
-    0x457e90a, 0x8012dedd,
-  0x451a177, 0x8012a86f, 0x44b59e1, 0x80127251, 0x4451249, 0x80123c82,
-    0x43ecaae, 0x80120701,
-  0x4388310, 0x8011d1d0, 0x4323b70, 0x80119ced, 0x42bf3cd, 0x80116859,
-    0x425ac28, 0x80113414,
-  0x41f6480, 0x8011001f, 0x4191cd5, 0x8010cc78, 0x412d528, 0x8010991f,
-    0x40c8d79, 0x80106616,
-  0x40645c7, 0x8010335c, 0x3fffe12, 0x801000f1, 0x3f9b65b, 0x800fced4,
-    0x3f36ea2, 0x800f9d07,
-  0x3ed26e6, 0x800f6b88, 0x3e6df28, 0x800f3a59, 0x3e09767, 0x800f0978,
-    0x3da4fa4, 0x800ed8e6,
-  0x3d407df, 0x800ea8a3, 0x3cdc017, 0x800e78af, 0x3c7784d, 0x800e490a,
-    0x3c13080, 0x800e19b4,
-  0x3bae8b2, 0x800deaad, 0x3b4a0e0, 0x800dbbf5, 0x3ae590d, 0x800d8d8b,
-    0x3a81137, 0x800d5f71,
-  0x3a1c960, 0x800d31a5, 0x39b8185, 0x800d0429, 0x39539a9, 0x800cd6fb,
-    0x38ef1ca, 0x800caa1c,
-  0x388a9ea, 0x800c7d8c, 0x3826207, 0x800c514c, 0x37c1a22, 0x800c255a,
-    0x375d23a, 0x800bf9b7,
-  0x36f8a51, 0x800bce63, 0x3694265, 0x800ba35d, 0x362fa78, 0x800b78a7,
-    0x35cb288, 0x800b4e40,
-  0x3566a96, 0x800b2427, 0x35022a2, 0x800afa5e, 0x349daac, 0x800ad0e3,
-    0x34392b4, 0x800aa7b8,
-  0x33d4abb, 0x800a7edb, 0x33702bf, 0x800a564e, 0x330bac1, 0x800a2e0f,
-    0x32a72c1, 0x800a061f,
-  0x3242abf, 0x8009de7e, 0x31de2bb, 0x8009b72c, 0x3179ab5, 0x80099029,
-    0x31152ae, 0x80096975,
-  0x30b0aa4, 0x80094310, 0x304c299, 0x80091cf9, 0x2fe7a8c, 0x8008f732,
-    0x2f8327d, 0x8008d1ba,
-  0x2f1ea6c, 0x8008ac90, 0x2eba259, 0x800887b6, 0x2e55a44, 0x8008632a,
-    0x2df122e, 0x80083eed,
-  0x2d8ca16, 0x80081b00, 0x2d281fc, 0x8007f761, 0x2cc39e1, 0x8007d411,
-    0x2c5f1c3, 0x8007b110,
-  0x2bfa9a4, 0x80078e5e, 0x2b96184, 0x80076bfb, 0x2b31961, 0x800749e7,
-    0x2acd13d, 0x80072822,
-  0x2a68917, 0x800706ac, 0x2a040f0, 0x8006e585, 0x299f8c7, 0x8006c4ac,
-    0x293b09c, 0x8006a423,
-  0x28d6870, 0x800683e8, 0x2872043, 0x800663fd, 0x280d813, 0x80064460,
-    0x27a8fe2, 0x80062513,
-  0x27447b0, 0x80060614, 0x26dff7c, 0x8005e764, 0x267b747, 0x8005c904,
-    0x2616f10, 0x8005aaf2,
-  0x25b26d7, 0x80058d2f, 0x254de9e, 0x80056fbb, 0x24e9662, 0x80055296,
-    0x2484e26, 0x800535c0,
-  0x24205e8, 0x80051939, 0x23bbda8, 0x8004fd00, 0x2357567, 0x8004e117,
-    0x22f2d25, 0x8004c57d,
-  0x228e4e2, 0x8004aa32, 0x2229c9d, 0x80048f35, 0x21c5457, 0x80047488,
-    0x2160c0f, 0x80045a29,
-  0x20fc3c6, 0x8004401a, 0x2097b7c, 0x80042659, 0x2033331, 0x80040ce7,
-    0x1fceae4, 0x8003f3c5,
-  0x1f6a297, 0x8003daf1, 0x1f05a48, 0x8003c26c, 0x1ea11f7, 0x8003aa36,
-    0x1e3c9a6, 0x8003924f,
-  0x1dd8154, 0x80037ab7, 0x1d73900, 0x8003636e, 0x1d0f0ab, 0x80034c74,
-    0x1caa855, 0x800335c9,
-  0x1c45ffe, 0x80031f6d, 0x1be17a6, 0x80030960, 0x1b7cf4d, 0x8002f3a1,
-    0x1b186f3, 0x8002de32,
-  0x1ab3e97, 0x8002c912, 0x1a4f63b, 0x8002b440, 0x19eaddd, 0x80029fbe,
-    0x198657f, 0x80028b8a,
-  0x1921d20, 0x800277a6, 0x18bd4bf, 0x80026410, 0x1858c5e, 0x800250c9,
-    0x17f43fc, 0x80023dd2,
-  0x178fb99, 0x80022b29, 0x172b335, 0x800218cf, 0x16c6ad0, 0x800206c4,
-    0x166226a, 0x8001f508,
-  0x15fda03, 0x8001e39b, 0x159919c, 0x8001d27d, 0x1534934, 0x8001c1ae,
-    0x14d00ca, 0x8001b12e,
-  0x146b860, 0x8001a0fd, 0x1406ff6, 0x8001911b, 0x13a278a, 0x80018187,
-    0x133df1e, 0x80017243,
-  0x12d96b1, 0x8001634e, 0x1274e43, 0x800154a7, 0x12105d5, 0x80014650,
-    0x11abd66, 0x80013847,
-  0x11474f6, 0x80012a8e, 0x10e2c85, 0x80011d23, 0x107e414, 0x80011008,
-    0x1019ba2, 0x8001033b,
-  0xfb5330, 0x8000f6bd, 0xf50abd, 0x8000ea8e, 0xeec249, 0x8000deaf, 0xe879d5,
-    0x8000d31e,
-  0xe23160, 0x8000c7dc, 0xdbe8eb, 0x8000bce9, 0xd5a075, 0x8000b245, 0xcf57ff,
-    0x8000a7f0,
-  0xc90f88, 0x80009dea, 0xc2c711, 0x80009433, 0xbc7e99, 0x80008aca, 0xb63621,
-    0x800081b1,
-  0xafeda8, 0x800078e7, 0xa9a52f, 0x8000706c, 0xa35cb5, 0x8000683f, 0x9d143b,
-    0x80006062,
-  0x96cbc1, 0x800058d4, 0x908346, 0x80005194, 0x8a3acb, 0x80004aa4, 0x83f250,
-    0x80004402,
-  0x7da9d4, 0x80003daf, 0x776159, 0x800037ac, 0x7118dc, 0x800031f7, 0x6ad060,
-    0x80002c91,
-  0x6487e3, 0x8000277a, 0x5e3f66, 0x800022b3, 0x57f6e9, 0x80001e3a, 0x51ae6b,
-    0x80001a10,
-  0x4b65ee, 0x80001635, 0x451d70, 0x800012a9, 0x3ed4f2, 0x80000f6c, 0x388c74,
-    0x80000c7e,
-  0x3243f5, 0x800009df, 0x2bfb77, 0x8000078e, 0x25b2f8, 0x8000058d, 0x1f6a7a,
-    0x800003db,
-  0x1921fb, 0x80000278, 0x12d97c, 0x80000163, 0xc90fe, 0x8000009e, 0x6487f,
-    0x80000027,
-
-};
-
-/**    
-* \par    
-* cosFactor tables are generated using the formula : 
cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
    
-* \par    
-* C command to generate the table    
-* 
    
-* for(i = 0; i< N; i++)    
-* {    
-*   cos_factors[i]= 2 * cos((2*i+1)*c/2);    
-* } 
    
-* \par    
-* where N is the number of factors to generate and c is pi/(2*N)    
-* \par    
-* Then converted to q31 format by multiplying with 2^31 and saturated if required.    
-*/
-
-
-static const q31_t cos_factorsQ31_128[128] = {
-  0x7fff6216, 0x7ffa72d1, 0x7ff09478, 0x7fe1c76b, 0x7fce0c3e, 0x7fb563b3,
-  0x7f97cebd, 0x7f754e80,
-  0x7f4de451, 0x7f2191b4, 0x7ef05860, 0x7eba3a39, 0x7e7f3957, 0x7e3f57ff,
-  0x7dfa98a8, 0x7db0fdf8,
-  0x7d628ac6, 0x7d0f4218, 0x7cb72724, 0x7c5a3d50, 0x7bf88830, 0x7b920b89,
-  0x7b26cb4f, 0x7ab6cba4,
-  0x7a4210d8, 0x79c89f6e, 0x794a7c12, 0x78c7aba2, 0x78403329, 0x77b417df,
-  0x77235f2d, 0x768e0ea6,
-  0x75f42c0b, 0x7555bd4c, 0x74b2c884, 0x740b53fb, 0x735f6626, 0x72af05a7,
-  0x71fa3949, 0x71410805,
-  0x708378ff, 0x6fc19385, 0x6efb5f12, 0x6e30e34a, 0x6d6227fa, 0x6c8f351c,
-  0x6bb812d1, 0x6adcc964,
-  0x69fd614a, 0x6919e320, 0x683257ab, 0x6746c7d8, 0x66573cbb, 0x6563bf92,
-  0x646c59bf, 0x637114cc,
-  0x6271fa69, 0x616f146c, 0x60686ccf, 0x5f5e0db3, 0x5e50015d, 0x5d3e5237,
-  0x5c290acc, 0x5b1035cf,
-  0x59f3de12, 0x58d40e8c, 0x57b0d256, 0x568a34a9, 0x556040e2, 0x5433027d,
-  0x53028518, 0x51ced46e,
-  0x5097fc5e, 0x4f5e08e3, 0x4e210617, 0x4ce10034, 0x4b9e0390, 0x4a581c9e,
-  0x490f57ee, 0x47c3c22f,
-  0x46756828, 0x452456bd, 0x43d09aed, 0x427a41d0, 0x4121589b, 0x3fc5ec98,
-  0x3e680b2c, 0x3d07c1d6,
-  0x3ba51e29, 0x3a402dd2, 0x38d8fe93, 0x376f9e46, 0x36041ad9, 0x34968250,
-  0x3326e2c3, 0x31b54a5e,
-  0x3041c761, 0x2ecc681e, 0x2d553afc, 0x2bdc4e6f, 0x2a61b101, 0x28e5714b,
-  0x27679df4, 0x25e845b6,
-  0x24677758, 0x22e541af, 0x2161b3a0, 0x1fdcdc1b, 0x1e56ca1e, 0x1ccf8cb3,
-  0x1b4732ef, 0x19bdcbf3,
-  0x183366e9, 0x16a81305, 0x151bdf86, 0x138edbb1, 0x120116d5, 0x1072a048,
-  0xee38766, 0xd53db92,
-  0xbc3ac35, 0xa3308bd, 0x8a2009a, 0x710a345, 0x57f0035, 0x3ed26e6, 0x25b26d7,
-  0xc90f88,
-};
-
-static const q31_t cos_factorsQ31_512[512] = {
-  0x7ffff621, 0x7fffa72c, 0x7fff0943, 0x7ffe1c65, 0x7ffce093, 0x7ffb55ce,
-  0x7ff97c18, 0x7ff75370,
-  0x7ff4dbd9, 0x7ff21553, 0x7feeffe1, 0x7feb9b85, 0x7fe7e841, 0x7fe3e616,
-  0x7fdf9508, 0x7fdaf519,
-  0x7fd6064c, 0x7fd0c8a3, 0x7fcb3c23, 0x7fc560cf, 0x7fbf36aa, 0x7fb8bdb8,
-  0x7fb1f5fc, 0x7faadf7c,
-  0x7fa37a3c, 0x7f9bc640, 0x7f93c38c, 0x7f8b7227, 0x7f82d214, 0x7f79e35a,
-  0x7f70a5fe, 0x7f671a05,
-  0x7f5d3f75, 0x7f531655, 0x7f489eaa, 0x7f3dd87c, 0x7f32c3d1, 0x7f2760af,
-  0x7f1baf1e, 0x7f0faf25,
-  0x7f0360cb, 0x7ef6c418, 0x7ee9d914, 0x7edc9fc6, 0x7ecf1837, 0x7ec14270,
-  0x7eb31e78, 0x7ea4ac58,
-  0x7e95ec1a, 0x7e86ddc6, 0x7e778166, 0x7e67d703, 0x7e57dea7, 0x7e47985b,
-  0x7e37042a, 0x7e26221f,
-  0x7e14f242, 0x7e0374a0, 0x7df1a942, 0x7ddf9034, 0x7dcd2981, 0x7dba7534,
-  0x7da77359, 0x7d9423fc,
-  0x7d808728, 0x7d6c9ce9, 0x7d58654d, 0x7d43e05e, 0x7d2f0e2b, 0x7d19eebf,
-  0x7d048228, 0x7ceec873,
-  0x7cd8c1ae, 0x7cc26de5, 0x7cabcd28, 0x7c94df83, 0x7c7da505, 0x7c661dbc,
-  0x7c4e49b7, 0x7c362904,
-  0x7c1dbbb3, 0x7c0501d2, 0x7bebfb70, 0x7bd2a89e, 0x7bb9096b, 0x7b9f1de6,
-  0x7b84e61f, 0x7b6a6227,
-  0x7b4f920e, 0x7b3475e5, 0x7b190dbc, 0x7afd59a4, 0x7ae159ae, 0x7ac50dec,
-  0x7aa8766f, 0x7a8b9348,
-  0x7a6e648a, 0x7a50ea47, 0x7a332490, 0x7a151378, 0x79f6b711, 0x79d80f6f,
-  0x79b91ca4, 0x7999dec4,
-  0x797a55e0, 0x795a820e, 0x793a6361, 0x7919f9ec, 0x78f945c3, 0x78d846fb,
-  0x78b6fda8, 0x789569df,
-  0x78738bb3, 0x7851633b, 0x782ef08b, 0x780c33b8, 0x77e92cd9, 0x77c5dc01,
-  0x77a24148, 0x777e5cc3,
-  0x775a2e89, 0x7735b6af, 0x7710f54c, 0x76ebea77, 0x76c69647, 0x76a0f8d2,
-  0x767b1231, 0x7654e279,
-  0x762e69c4, 0x7607a828, 0x75e09dbd, 0x75b94a9c, 0x7591aedd, 0x7569ca99,
-  0x75419de7, 0x751928e0,
-  0x74f06b9e, 0x74c7663a, 0x749e18cd, 0x74748371, 0x744aa63f, 0x74208150,
-  0x73f614c0, 0x73cb60a8,
-  0x73a06522, 0x73752249, 0x73499838, 0x731dc70a, 0x72f1aed9, 0x72c54fc1,
-  0x7298a9dd, 0x726bbd48,
-  0x723e8a20, 0x7211107e, 0x71e35080, 0x71b54a41, 0x7186fdde, 0x71586b74,
-  0x7129931f, 0x70fa74fc,
-  0x70cb1128, 0x709b67c0, 0x706b78e3, 0x703b44ad, 0x700acb3c, 0x6fda0cae,
-  0x6fa90921, 0x6f77c0b3,
-  0x6f463383, 0x6f1461b0, 0x6ee24b57, 0x6eaff099, 0x6e7d5193, 0x6e4a6e66,
-  0x6e174730, 0x6de3dc11,
-  0x6db02d29, 0x6d7c3a98, 0x6d48047e, 0x6d138afb, 0x6cdece2f, 0x6ca9ce3b,
-  0x6c748b3f, 0x6c3f055d,
-  0x6c093cb6, 0x6bd3316a, 0x6b9ce39b, 0x6b66536b, 0x6b2f80fb, 0x6af86c6c,
-  0x6ac115e2, 0x6a897d7d,
-  0x6a51a361, 0x6a1987b0, 0x69e12a8c, 0x69a88c19, 0x696fac78, 0x69368bce,
-  0x68fd2a3d, 0x68c387e9,
-  0x6889a4f6, 0x684f8186, 0x68151dbe, 0x67da79c3, 0x679f95b7, 0x676471c0,
-  0x67290e02, 0x66ed6aa1,
-  0x66b187c3, 0x6675658c, 0x66390422, 0x65fc63a9, 0x65bf8447, 0x65826622,
-  0x6545095f, 0x65076e25,
-  0x64c99498, 0x648b7ce0, 0x644d2722, 0x640e9386, 0x63cfc231, 0x6390b34a,
-  0x635166f9, 0x6311dd64,
-  0x62d216b3, 0x6292130c, 0x6251d298, 0x6211557e, 0x61d09be5, 0x618fa5f7,
-  0x614e73da, 0x610d05b7,
-  0x60cb5bb7, 0x60897601, 0x604754bf, 0x6004f819, 0x5fc26038, 0x5f7f8d46,
-  0x5f3c7f6b, 0x5ef936d1,
-  0x5eb5b3a2, 0x5e71f606, 0x5e2dfe29, 0x5de9cc33, 0x5da5604f, 0x5d60baa7,
-  0x5d1bdb65, 0x5cd6c2b5,
-  0x5c9170bf, 0x5c4be5b0, 0x5c0621b2, 0x5bc024f0, 0x5b79ef96, 0x5b3381ce,
-  0x5aecdbc5, 0x5aa5fda5,
-  0x5a5ee79a, 0x5a1799d1, 0x59d01475, 0x598857b2, 0x594063b5, 0x58f838a9,
-  0x58afd6bd, 0x58673e1b,
-  0x581e6ef1, 0x57d5696d, 0x578c2dba, 0x5742bc06, 0x56f9147e, 0x56af3750,
-  0x566524aa, 0x561adcb9,
-  0x55d05faa, 0x5585adad, 0x553ac6ee, 0x54efab9c, 0x54a45be6, 0x5458d7f9,
-  0x540d2005, 0x53c13439,
-  0x537514c2, 0x5328c1d0, 0x52dc3b92, 0x528f8238, 0x524295f0, 0x51f576ea,
-  0x51a82555, 0x515aa162,
-  0x510ceb40, 0x50bf031f, 0x5070e92f, 0x50229da1, 0x4fd420a4, 0x4f857269,
-  0x4f369320, 0x4ee782fb,
-  0x4e984229, 0x4e48d0dd, 0x4df92f46, 0x4da95d96, 0x4d595bfe, 0x4d092ab0,
-  0x4cb8c9dd, 0x4c6839b7,
-  0x4c177a6e, 0x4bc68c36, 0x4b756f40, 0x4b2423be, 0x4ad2a9e2, 0x4a8101de,
-  0x4a2f2be6, 0x49dd282a,
-  0x498af6df, 0x49389836, 0x48e60c62, 0x48935397, 0x48406e08, 0x47ed5be6,
-  0x479a1d67, 0x4746b2bc,
-  0x46f31c1a, 0x469f59b4, 0x464b6bbe, 0x45f7526b, 0x45a30df0, 0x454e9e80,
-  0x44fa0450, 0x44a53f93,
-  0x4450507e, 0x43fb3746, 0x43a5f41e, 0x4350873c, 0x42faf0d4, 0x42a5311b,
-  0x424f4845, 0x41f93689,
-  0x41a2fc1a, 0x414c992f, 0x40f60dfb, 0x409f5ab6, 0x40487f94, 0x3ff17cca,
-  0x3f9a5290, 0x3f430119,
-  0x3eeb889c, 0x3e93e950, 0x3e3c2369, 0x3de4371f, 0x3d8c24a8, 0x3d33ec39,
-  0x3cdb8e09, 0x3c830a50,
-  0x3c2a6142, 0x3bd19318, 0x3b78a007, 0x3b1f8848, 0x3ac64c0f, 0x3a6ceb96,
-  0x3a136712, 0x39b9bebc,
-  0x395ff2c9, 0x39060373, 0x38abf0ef, 0x3851bb77, 0x37f76341, 0x379ce885,
-  0x37424b7b, 0x36e78c5b,
-  0x368cab5c, 0x3631a8b8, 0x35d684a6, 0x357b3f5d, 0x351fd918, 0x34c4520d,
-  0x3468aa76, 0x340ce28b,
-  0x33b0fa84, 0x3354f29b, 0x32f8cb07, 0x329c8402, 0x32401dc6, 0x31e39889,
-  0x3186f487, 0x312a31f8,
-  0x30cd5115, 0x30705217, 0x30133539, 0x2fb5fab2, 0x2f58a2be, 0x2efb2d95,
-  0x2e9d9b70, 0x2e3fec8b,
-  0x2de2211e, 0x2d843964, 0x2d263596, 0x2cc815ee, 0x2c69daa6, 0x2c0b83fa,
-  0x2bad1221, 0x2b4e8558,
-  0x2aefddd8, 0x2a911bdc, 0x2a323f9e, 0x29d34958, 0x29743946, 0x29150fa1,
-  0x28b5cca5, 0x2856708d,
-  0x27f6fb92, 0x27976df1, 0x2737c7e3, 0x26d809a5, 0x26783370, 0x26184581,
-  0x25b84012, 0x2558235f,
-  0x24f7efa2, 0x2497a517, 0x243743fa, 0x23d6cc87, 0x23763ef7, 0x23159b88,
-  0x22b4e274, 0x225413f8,
-  0x21f3304f, 0x219237b5, 0x21312a65, 0x20d0089c, 0x206ed295, 0x200d888d,
-  0x1fac2abf, 0x1f4ab968,
-  0x1ee934c3, 0x1e879d0d, 0x1e25f282, 0x1dc4355e, 0x1d6265dd, 0x1d00843d,
-  0x1c9e90b8, 0x1c3c8b8c,
-  0x1bda74f6, 0x1b784d30, 0x1b161479, 0x1ab3cb0d, 0x1a517128, 0x19ef0707,
-  0x198c8ce7, 0x192a0304,
-  0x18c7699b, 0x1864c0ea, 0x1802092c, 0x179f429f, 0x173c6d80, 0x16d98a0c,
-  0x1676987f, 0x16139918,
-  0x15b08c12, 0x154d71aa, 0x14ea4a1f, 0x148715ae, 0x1423d492, 0x13c0870a,
-  0x135d2d53, 0x12f9c7aa,
-  0x1296564d, 0x1232d979, 0x11cf516a, 0x116bbe60, 0x11082096, 0x10a4784b,
-  0x1040c5bb, 0xfdd0926,
-  0xf7942c7, 0xf1572dc, 0xeb199a4, 0xe4db75b, 0xde9cc40, 0xd85d88f, 0xd21dc87,
-  0xcbdd865,
-  0xc59cc68, 0xbf5b8cb, 0xb919dcf, 0xb2d7baf, 0xac952aa, 0xa6522fe, 0xa00ece8,
-  0x99cb0a7,
-  0x9386e78, 0x8d42699, 0x86fd947, 0x80b86c2, 0x7a72f45, 0x742d311, 0x6de7262,
-  0x67a0d76,
-  0x615a48b, 0x5b137df, 0x54cc7b1, 0x4e8543e, 0x483ddc3, 0x41f6480, 0x3bae8b2,
-  0x3566a96,
-  0x2f1ea6c, 0x28d6870, 0x228e4e2, 0x1c45ffe, 0x15fda03, 0xfb5330, 0x96cbc1,
-  0x3243f5,
-};
-
-static const q31_t cos_factorsQ31_2048[2048] = {
-  0x7fffff62, 0x7ffffa73, 0x7ffff094, 0x7fffe1c6, 0x7fffce09, 0x7fffb55c,
-  0x7fff97c1, 0x7fff7536,
-  0x7fff4dbb, 0x7fff2151, 0x7ffeeff8, 0x7ffeb9b0, 0x7ffe7e79, 0x7ffe3e52,
-  0x7ffdf93c, 0x7ffdaf37,
-  0x7ffd6042, 0x7ffd0c5f, 0x7ffcb38c, 0x7ffc55ca, 0x7ffbf319, 0x7ffb8b78,
-  0x7ffb1ee9, 0x7ffaad6a,
-  0x7ffa36fc, 0x7ff9bba0, 0x7ff93b54, 0x7ff8b619, 0x7ff82bef, 0x7ff79cd6,
-  0x7ff708ce, 0x7ff66fd7,
-  0x7ff5d1f1, 0x7ff52f1d, 0x7ff48759, 0x7ff3daa6, 0x7ff32905, 0x7ff27275,
-  0x7ff1b6f6, 0x7ff0f688,
-  0x7ff0312c, 0x7fef66e1, 0x7fee97a7, 0x7fedc37e, 0x7fecea67, 0x7fec0c62,
-  0x7feb296d, 0x7fea418b,
-  0x7fe954ba, 0x7fe862fa, 0x7fe76c4c, 0x7fe670b0, 0x7fe57025, 0x7fe46aac,
-  0x7fe36045, 0x7fe250ef,
-  0x7fe13cac, 0x7fe0237a, 0x7fdf055a, 0x7fdde24d, 0x7fdcba51, 0x7fdb8d67,
-  0x7fda5b8f, 0x7fd924ca,
-  0x7fd7e917, 0x7fd6a875, 0x7fd562e7, 0x7fd4186a, 0x7fd2c900, 0x7fd174a8,
-  0x7fd01b63, 0x7fcebd31,
-  0x7fcd5a11, 0x7fcbf203, 0x7fca8508, 0x7fc91320, 0x7fc79c4b, 0x7fc62089,
-  0x7fc49fda, 0x7fc31a3d,
-  0x7fc18fb4, 0x7fc0003e, 0x7fbe6bdb, 0x7fbcd28b, 0x7fbb344e, 0x7fb99125,
-  0x7fb7e90f, 0x7fb63c0d,
-  0x7fb48a1e, 0x7fb2d343, 0x7fb1177b, 0x7faf56c7, 0x7fad9127, 0x7fabc69b,
-  0x7fa9f723, 0x7fa822bf,
-  0x7fa6496e, 0x7fa46b32, 0x7fa2880b, 0x7fa09ff7, 0x7f9eb2f8, 0x7f9cc10d,
-  0x7f9aca37, 0x7f98ce76,
-  0x7f96cdc9, 0x7f94c831, 0x7f92bdad, 0x7f90ae3f, 0x7f8e99e6, 0x7f8c80a1,
-  0x7f8a6272, 0x7f883f58,
-  0x7f861753, 0x7f83ea64, 0x7f81b88a, 0x7f7f81c6, 0x7f7d4617, 0x7f7b057e,
-  0x7f78bffb, 0x7f76758e,
-  0x7f742637, 0x7f71d1f6, 0x7f6f78cb, 0x7f6d1ab6, 0x7f6ab7b8, 0x7f684fd0,
-  0x7f65e2ff, 0x7f637144,
-  0x7f60faa0, 0x7f5e7f13, 0x7f5bfe9d, 0x7f59793e, 0x7f56eef5, 0x7f545fc5,
-  0x7f51cbab, 0x7f4f32a9,
-  0x7f4c94be, 0x7f49f1eb, 0x7f474a30, 0x7f449d8c, 0x7f41ec01, 0x7f3f358d,
-  0x7f3c7a31, 0x7f39b9ee,
-  0x7f36f4c3, 0x7f342ab1, 0x7f315bb7, 0x7f2e87d6, 0x7f2baf0d, 0x7f28d15d,
-  0x7f25eec7, 0x7f230749,
-  0x7f201ae5, 0x7f1d299a, 0x7f1a3368, 0x7f173850, 0x7f143852, 0x7f11336d,
-  0x7f0e29a3, 0x7f0b1af2,
-  0x7f08075c, 0x7f04eedf, 0x7f01d17d, 0x7efeaf36, 0x7efb8809, 0x7ef85bf7,
-  0x7ef52b00, 0x7ef1f524,
-  0x7eeeba62, 0x7eeb7abc, 0x7ee83632, 0x7ee4ecc3, 0x7ee19e6f, 0x7ede4b38,
-  0x7edaf31c, 0x7ed7961c,
-  0x7ed43438, 0x7ed0cd70, 0x7ecd61c5, 0x7ec9f137, 0x7ec67bc5, 0x7ec3016f,
-  0x7ebf8237, 0x7ebbfe1c,
-  0x7eb8751e, 0x7eb4e73d, 0x7eb1547a, 0x7eadbcd4, 0x7eaa204c, 0x7ea67ee2,
-  0x7ea2d896, 0x7e9f2d68,
-  0x7e9b7d58, 0x7e97c867, 0x7e940e94, 0x7e904fe0, 0x7e8c8c4b, 0x7e88c3d5,
-  0x7e84f67e, 0x7e812447,
-  0x7e7d4d2f, 0x7e797136, 0x7e75905d, 0x7e71aaa4, 0x7e6dc00c, 0x7e69d093,
-  0x7e65dc3b, 0x7e61e303,
-  0x7e5de4ec, 0x7e59e1f5, 0x7e55da20, 0x7e51cd6c, 0x7e4dbbd9, 0x7e49a567,
-  0x7e458a17, 0x7e4169e9,
-  0x7e3d44dd, 0x7e391af3, 0x7e34ec2b, 0x7e30b885, 0x7e2c8002, 0x7e2842a2,
-  0x7e240064, 0x7e1fb94a,
-  0x7e1b6d53, 0x7e171c7f, 0x7e12c6ce, 0x7e0e6c42, 0x7e0a0cd9, 0x7e05a894,
-  0x7e013f74, 0x7dfcd178,
-  0x7df85ea0, 0x7df3e6ee, 0x7def6a60, 0x7deae8f7, 0x7de662b3, 0x7de1d795,
-  0x7ddd479d, 0x7dd8b2ca,
-  0x7dd4191d, 0x7dcf7a96, 0x7dcad736, 0x7dc62efc, 0x7dc181e8, 0x7dbccffc,
-  0x7db81936, 0x7db35d98,
-  0x7dae9d21, 0x7da9d7d2, 0x7da50dab, 0x7da03eab, 0x7d9b6ad3, 0x7d969224,
-  0x7d91b49e, 0x7d8cd240,
-  0x7d87eb0a, 0x7d82fefe, 0x7d7e0e1c, 0x7d791862, 0x7d741dd2, 0x7d6f1e6c,
-  0x7d6a1a31, 0x7d65111f,
-  0x7d600338, 0x7d5af07b, 0x7d55d8e9, 0x7d50bc82, 0x7d4b9b46, 0x7d467536,
-  0x7d414a51, 0x7d3c1a98,
-  0x7d36e60b, 0x7d31acaa, 0x7d2c6e76, 0x7d272b6e, 0x7d21e393, 0x7d1c96e5,
-  0x7d174564, 0x7d11ef11,
-  0x7d0c93eb, 0x7d0733f3, 0x7d01cf29, 0x7cfc658d, 0x7cf6f720, 0x7cf183e1,
-  0x7cec0bd1, 0x7ce68ef0,
-  0x7ce10d3f, 0x7cdb86bd, 0x7cd5fb6a, 0x7cd06b48, 0x7ccad656, 0x7cc53c94,
-  0x7cbf9e03, 0x7cb9faa2,
-  0x7cb45272, 0x7caea574, 0x7ca8f3a7, 0x7ca33d0c, 0x7c9d81a3, 0x7c97c16b,
-  0x7c91fc66, 0x7c8c3294,
-  0x7c8663f4, 0x7c809088, 0x7c7ab84e, 0x7c74db48, 0x7c6ef976, 0x7c6912d7,
-  0x7c63276d, 0x7c5d3737,
-  0x7c574236, 0x7c514869, 0x7c4b49d2, 0x7c45466f, 0x7c3f3e42, 0x7c39314b,
-  0x7c331f8a, 0x7c2d08ff,
-  0x7c26edab, 0x7c20cd8d, 0x7c1aa8a6, 0x7c147ef6, 0x7c0e507e, 0x7c081d3d,
-  0x7c01e534, 0x7bfba863,
-  0x7bf566cb, 0x7bef206b, 0x7be8d544, 0x7be28556, 0x7bdc30a1, 0x7bd5d726,
-  0x7bcf78e5, 0x7bc915dd,
-  0x7bc2ae10, 0x7bbc417e, 0x7bb5d026, 0x7baf5a09, 0x7ba8df28, 0x7ba25f82,
-  0x7b9bdb18, 0x7b9551ea,
-  0x7b8ec3f8, 0x7b883143, 0x7b8199ca, 0x7b7afd8f, 0x7b745c91, 0x7b6db6d0,
-  0x7b670c4d, 0x7b605d09,
-  0x7b59a902, 0x7b52f03a, 0x7b4c32b1, 0x7b457068, 0x7b3ea95d, 0x7b37dd92,
-  0x7b310d07, 0x7b2a37bc,
-  0x7b235db2, 0x7b1c7ee8, 0x7b159b5f, 0x7b0eb318, 0x7b07c612, 0x7b00d44d,
-  0x7af9ddcb, 0x7af2e28b,
-  0x7aebe28d, 0x7ae4ddd2, 0x7addd45b, 0x7ad6c626, 0x7acfb336, 0x7ac89b89,
-  0x7ac17f20, 0x7aba5dfc,
-  0x7ab3381d, 0x7aac0d82, 0x7aa4de2d, 0x7a9daa1d, 0x7a967153, 0x7a8f33d0,
-  0x7a87f192, 0x7a80aa9c,
-  0x7a795eec, 0x7a720e84, 0x7a6ab963, 0x7a635f8a, 0x7a5c00f9, 0x7a549db0,
-  0x7a4d35b0, 0x7a45c8f9,
-  0x7a3e578b, 0x7a36e166, 0x7a2f668c, 0x7a27e6fb, 0x7a2062b5, 0x7a18d9b9,
-  0x7a114c09, 0x7a09b9a4,
-  0x7a02228a, 0x79fa86bc, 0x79f2e63a, 0x79eb4105, 0x79e3971c, 0x79dbe880,
-  0x79d43532, 0x79cc7d31,
-  0x79c4c07e, 0x79bcff19, 0x79b53903, 0x79ad6e3c, 0x79a59ec3, 0x799dca9a,
-  0x7995f1c1, 0x798e1438,
-  0x798631ff, 0x797e4b16, 0x79765f7f, 0x796e6f39, 0x79667a44, 0x795e80a1,
-  0x79568250, 0x794e7f52,
-  0x794677a6, 0x793e6b4e, 0x79365a49, 0x792e4497, 0x79262a3a, 0x791e0b31,
-  0x7915e77c, 0x790dbf1d,
-  0x79059212, 0x78fd605d, 0x78f529fe, 0x78eceef6, 0x78e4af44, 0x78dc6ae8,
-  0x78d421e4, 0x78cbd437,
-  0x78c381e2, 0x78bb2ae5, 0x78b2cf41, 0x78aa6ef5, 0x78a20a03, 0x7899a06a,
-  0x7891322a, 0x7888bf45,
-  0x788047ba, 0x7877cb89, 0x786f4ab4, 0x7866c53a, 0x785e3b1c, 0x7855ac5a,
-  0x784d18f4, 0x784480ea,
-  0x783be43e, 0x783342ef, 0x782a9cfe, 0x7821f26b, 0x78194336, 0x78108f60,
-  0x7807d6e9, 0x77ff19d1,
-  0x77f65819, 0x77ed91c0, 0x77e4c6c9, 0x77dbf732, 0x77d322fc, 0x77ca4a27,
-  0x77c16cb4, 0x77b88aa3,
-  0x77afa3f5, 0x77a6b8a9, 0x779dc8c0, 0x7794d43b, 0x778bdb19, 0x7782dd5c,
-  0x7779db03, 0x7770d40f,
-  0x7767c880, 0x775eb857, 0x7755a394, 0x774c8a36, 0x77436c40, 0x773a49b0,
-  0x77312287, 0x7727f6c6,
-  0x771ec66e, 0x7715917d, 0x770c57f5, 0x770319d6, 0x76f9d721, 0x76f08fd5,
-  0x76e743f4, 0x76ddf37c,
-  0x76d49e70, 0x76cb44cf, 0x76c1e699, 0x76b883d0, 0x76af1c72, 0x76a5b082,
-  0x769c3ffe, 0x7692cae8,
-  0x7689513f, 0x767fd304, 0x76765038, 0x766cc8db, 0x76633ced, 0x7659ac6f,
-  0x76501760, 0x76467dc2,
-  0x763cdf94, 0x76333cd8, 0x7629958c, 0x761fe9b3, 0x7616394c, 0x760c8457,
-  0x7602cad5, 0x75f90cc7,
-  0x75ef4a2c, 0x75e58305, 0x75dbb753, 0x75d1e715, 0x75c8124d, 0x75be38fa,
-  0x75b45b1d, 0x75aa78b6,
-  0x75a091c6, 0x7596a64d, 0x758cb64c, 0x7582c1c2, 0x7578c8b0, 0x756ecb18,
-  0x7564c8f8, 0x755ac251,
-  0x7550b725, 0x7546a772, 0x753c933a, 0x75327a7d, 0x75285d3b, 0x751e3b75,
-  0x7514152b, 0x7509ea5d,
-  0x74ffbb0d, 0x74f58739, 0x74eb4ee3, 0x74e1120c, 0x74d6d0b2, 0x74cc8ad8,
-  0x74c2407d, 0x74b7f1a1,
-  0x74ad9e46, 0x74a3466b, 0x7498ea11, 0x748e8938, 0x748423e0, 0x7479ba0b,
-  0x746f4bb8, 0x7464d8e8,
-  0x745a619b, 0x744fe5d2, 0x7445658d, 0x743ae0cc, 0x74305790, 0x7425c9da,
-  0x741b37a9, 0x7410a0fe,
-  0x740605d9, 0x73fb663c, 0x73f0c226, 0x73e61997, 0x73db6c91, 0x73d0bb13,
-  0x73c6051f, 0x73bb4ab3,
-  0x73b08bd1, 0x73a5c87a, 0x739b00ad, 0x7390346b, 0x738563b5, 0x737a8e8a,
-  0x736fb4ec, 0x7364d6da,
-  0x7359f456, 0x734f0d5f, 0x734421f6, 0x7339321b, 0x732e3dcf, 0x73234512,
-  0x731847e5, 0x730d4648,
-  0x7302403c, 0x72f735c0, 0x72ec26d6, 0x72e1137d, 0x72d5fbb7, 0x72cadf83,
-  0x72bfbee3, 0x72b499d6,
-  0x72a9705c, 0x729e4277, 0x72931027, 0x7287d96c, 0x727c9e47, 0x72715eb8,
-  0x72661abf, 0x725ad25d,
-  0x724f8593, 0x72443460, 0x7238dec5, 0x722d84c4, 0x7222265b, 0x7216c38c,
-  0x720b5c57, 0x71fff0bc,
-  0x71f480bc, 0x71e90c57, 0x71dd938f, 0x71d21662, 0x71c694d2, 0x71bb0edf,
-  0x71af848a, 0x71a3f5d2,
-  0x719862b9, 0x718ccb3f, 0x71812f65, 0x71758f29, 0x7169ea8f, 0x715e4194,
-  0x7152943b, 0x7146e284,
-  0x713b2c6e, 0x712f71fb, 0x7123b32b, 0x7117effe, 0x710c2875, 0x71005c90,
-  0x70f48c50, 0x70e8b7b5,
-  0x70dcdec0, 0x70d10171, 0x70c51fc8, 0x70b939c7, 0x70ad4f6d, 0x70a160ba,
-  0x70956db1, 0x70897650,
-  0x707d7a98, 0x70717a8a, 0x70657626, 0x70596d6d, 0x704d6060, 0x70414efd,
-  0x70353947, 0x70291f3e,
-  0x701d00e1, 0x7010de32, 0x7004b731, 0x6ff88bde, 0x6fec5c3b, 0x6fe02846,
-  0x6fd3f001, 0x6fc7b36d,
-  0x6fbb728a, 0x6faf2d57, 0x6fa2e3d7, 0x6f969608, 0x6f8a43ed, 0x6f7ded84,
-  0x6f7192cf, 0x6f6533ce,
-  0x6f58d082, 0x6f4c68eb, 0x6f3ffd09, 0x6f338cde, 0x6f271868, 0x6f1a9faa,
-  0x6f0e22a3, 0x6f01a155,
-  0x6ef51bbe, 0x6ee891e1, 0x6edc03bc, 0x6ecf7152, 0x6ec2daa2, 0x6eb63fad,
-  0x6ea9a073, 0x6e9cfcf5,
-  0x6e905534, 0x6e83a92f, 0x6e76f8e7, 0x6e6a445d, 0x6e5d8b91, 0x6e50ce84,
-  0x6e440d37, 0x6e3747a9,
-  0x6e2a7ddb, 0x6e1dafce, 0x6e10dd82, 0x6e0406f8, 0x6df72c30, 0x6dea4d2b,
-  0x6ddd69e9, 0x6dd0826a,
-  0x6dc396b0, 0x6db6a6ba, 0x6da9b28a, 0x6d9cba1f, 0x6d8fbd7a, 0x6d82bc9d,
-  0x6d75b786, 0x6d68ae37,
-  0x6d5ba0b0, 0x6d4e8ef2, 0x6d4178fd, 0x6d345ed1, 0x6d274070, 0x6d1a1dda,
-  0x6d0cf70f, 0x6cffcc0f,
-  0x6cf29cdc, 0x6ce56975, 0x6cd831dc, 0x6ccaf610, 0x6cbdb613, 0x6cb071e4,
-  0x6ca32985, 0x6c95dcf6,
-  0x6c888c36, 0x6c7b3748, 0x6c6dde2b, 0x6c6080e0, 0x6c531f67, 0x6c45b9c1,
-  0x6c384fef, 0x6c2ae1f0,
-  0x6c1d6fc6, 0x6c0ff971, 0x6c027ef1, 0x6bf50047, 0x6be77d74, 0x6bd9f677,
-  0x6bcc6b53, 0x6bbedc06,
-  0x6bb14892, 0x6ba3b0f7, 0x6b961536, 0x6b88754f, 0x6b7ad142, 0x6b6d2911,
-  0x6b5f7cbc, 0x6b51cc42,
-  0x6b4417a6, 0x6b365ee7, 0x6b28a206, 0x6b1ae103, 0x6b0d1bdf, 0x6aff529a,
-  0x6af18536, 0x6ae3b3b2,
-  0x6ad5de0f, 0x6ac8044e, 0x6aba266e, 0x6aac4472, 0x6a9e5e58, 0x6a907423,
-  0x6a8285d1, 0x6a749365,
-  0x6a669cdd, 0x6a58a23c, 0x6a4aa381, 0x6a3ca0ad, 0x6a2e99c0, 0x6a208ebb,
-  0x6a127f9f, 0x6a046c6c,
-  0x69f65523, 0x69e839c4, 0x69da1a50, 0x69cbf6c7, 0x69bdcf29, 0x69afa378,
-  0x69a173b5, 0x69933fde,
-  0x698507f6, 0x6976cbfc, 0x69688bf1, 0x695a47d6, 0x694bffab, 0x693db371,
-  0x692f6328, 0x69210ed1,
-  0x6912b66c, 0x690459fb, 0x68f5f97d, 0x68e794f3, 0x68d92c5d, 0x68cabfbd,
-  0x68bc4f13, 0x68adda5f,
-  0x689f61a1, 0x6890e4dc, 0x6882640e, 0x6873df38, 0x6865565c, 0x6856c979,
-  0x68483891, 0x6839a3a4,
-  0x682b0ab1, 0x681c6dbb, 0x680dccc1, 0x67ff27c4, 0x67f07ec5, 0x67e1d1c4,
-  0x67d320c1, 0x67c46bbe,
-  0x67b5b2bb, 0x67a6f5b8, 0x679834b6, 0x67896fb6, 0x677aa6b8, 0x676bd9bd,
-  0x675d08c4, 0x674e33d0,
-  0x673f5ae0, 0x67307df5, 0x67219d10, 0x6712b831, 0x6703cf58, 0x66f4e287,
-  0x66e5f1be, 0x66d6fcfd,
-  0x66c80445, 0x66b90797, 0x66aa06f3, 0x669b0259, 0x668bf9cb, 0x667ced49,
-  0x666ddcd3, 0x665ec86b,
-  0x664fb010, 0x664093c3, 0x66317385, 0x66224f56, 0x66132738, 0x6603fb2a,
-  0x65f4cb2d, 0x65e59742,
-  0x65d65f69, 0x65c723a3, 0x65b7e3f1, 0x65a8a052, 0x659958c9, 0x658a0d54,
-  0x657abdf6, 0x656b6aae,
-  0x655c137d, 0x654cb863, 0x653d5962, 0x652df679, 0x651e8faa, 0x650f24f5,
-  0x64ffb65b, 0x64f043dc,
-  0x64e0cd78, 0x64d15331, 0x64c1d507, 0x64b252fa, 0x64a2cd0c, 0x6493433c,
-  0x6483b58c, 0x647423fb,
-  0x64648e8c, 0x6454f53d, 0x64455810, 0x6435b706, 0x6426121e, 0x6416695a,
-  0x6406bcba, 0x63f70c3f,
-  0x63e757ea, 0x63d79fba, 0x63c7e3b1, 0x63b823cf, 0x63a86015, 0x63989884,
-  0x6388cd1b, 0x6378fddc,
-  0x63692ac7, 0x635953dd, 0x6349791f, 0x63399a8d, 0x6329b827, 0x6319d1ef,
-  0x6309e7e4, 0x62f9fa09,
-  0x62ea085c, 0x62da12df, 0x62ca1992, 0x62ba1c77, 0x62aa1b8d, 0x629a16d5,
-  0x628a0e50, 0x627a01fe,
-  0x6269f1e1, 0x6259ddf8, 0x6249c645, 0x6239aac7, 0x62298b81, 0x62196871,
-  0x62094199, 0x61f916f9,
-  0x61e8e893, 0x61d8b666, 0x61c88074, 0x61b846bc, 0x61a80940, 0x6197c800,
-  0x618782fd, 0x61773a37,
-  0x6166edb0, 0x61569d67, 0x6146495d, 0x6135f193, 0x6125960a, 0x611536c2,
-  0x6104d3bc, 0x60f46cf9,
-  0x60e40278, 0x60d3943b, 0x60c32243, 0x60b2ac8f, 0x60a23322, 0x6091b5fa,
-  0x60813519, 0x6070b080,
-  0x6060282f, 0x604f9c27, 0x603f0c69, 0x602e78f4, 0x601de1ca, 0x600d46ec,
-  0x5ffca859, 0x5fec0613,
-  0x5fdb601b, 0x5fcab670, 0x5fba0914, 0x5fa95807, 0x5f98a34a, 0x5f87eade,
-  0x5f772ec2, 0x5f666ef9,
-  0x5f55ab82, 0x5f44e45e, 0x5f34198e, 0x5f234b12, 0x5f1278eb, 0x5f01a31a,
-  0x5ef0c99f, 0x5edfec7b,
-  0x5ecf0baf, 0x5ebe273b, 0x5ead3f1f, 0x5e9c535e, 0x5e8b63f7, 0x5e7a70ea,
-  0x5e697a39, 0x5e587fe5,
-  0x5e4781ed, 0x5e368053, 0x5e257b17, 0x5e147239, 0x5e0365bb, 0x5df2559e,
-  0x5de141e1, 0x5dd02a85,
-  0x5dbf0f8c, 0x5dadf0f5, 0x5d9ccec2, 0x5d8ba8f3, 0x5d7a7f88, 0x5d695283,
-  0x5d5821e4, 0x5d46edac,
-  0x5d35b5db, 0x5d247a72, 0x5d133b72, 0x5d01f8dc, 0x5cf0b2af, 0x5cdf68ed,
-  0x5cce1b97, 0x5cbccaac,
-  0x5cab762f, 0x5c9a1e1e, 0x5c88c27c, 0x5c776348, 0x5c660084, 0x5c549a30,
-  0x5c43304d, 0x5c31c2db,
-  0x5c2051db, 0x5c0edd4e, 0x5bfd6534, 0x5bebe98e, 0x5bda6a5d, 0x5bc8e7a2,
-  0x5bb7615d, 0x5ba5d78e,
-  0x5b944a37, 0x5b82b958, 0x5b7124f2, 0x5b5f8d06, 0x5b4df193, 0x5b3c529c,
-  0x5b2ab020, 0x5b190a20,
-  0x5b07609d, 0x5af5b398, 0x5ae40311, 0x5ad24f09, 0x5ac09781, 0x5aaedc78,
-  0x5a9d1df1, 0x5a8b5bec,
-  0x5a799669, 0x5a67cd69, 0x5a5600ec, 0x5a4430f5, 0x5a325d82, 0x5a208695,
-  0x5a0eac2e, 0x59fcce4f,
-  0x59eaecf8, 0x59d90829, 0x59c71fe3, 0x59b53427, 0x59a344f6, 0x59915250,
-  0x597f5c36, 0x596d62a9,
-  0x595b65aa, 0x59496538, 0x59376155, 0x59255a02, 0x59134f3e, 0x5901410c,
-  0x58ef2f6b, 0x58dd1a5d,
-  0x58cb01e1, 0x58b8e5f9, 0x58a6c6a5, 0x5894a3e7, 0x58827dbe, 0x5870542c,
-  0x585e2730, 0x584bf6cd,
-  0x5839c302, 0x58278bd1, 0x58155139, 0x5803133c, 0x57f0d1da, 0x57de8d15,
-  0x57cc44ec, 0x57b9f960,
-  0x57a7aa73, 0x57955825, 0x57830276, 0x5770a968, 0x575e4cfa, 0x574bed2f,
-  0x57398a05, 0x5727237f,
-  0x5714b99d, 0x57024c5f, 0x56efdbc7, 0x56dd67d4, 0x56caf088, 0x56b875e4,
-  0x56a5f7e7, 0x56937694,
-  0x5680f1ea, 0x566e69ea, 0x565bde95, 0x56494fec, 0x5636bdef, 0x5624289f,
-  0x56118ffe, 0x55fef40a,
-  0x55ec54c6, 0x55d9b232, 0x55c70c4f, 0x55b4631d, 0x55a1b69d, 0x558f06d0,
-  0x557c53b6, 0x55699d51,
-  0x5556e3a1, 0x554426a7, 0x55316663, 0x551ea2d6, 0x550bdc01, 0x54f911e5,
-  0x54e64482, 0x54d373d9,
-  0x54c09feb, 0x54adc8b8, 0x549aee42, 0x54881089, 0x54752f8d, 0x54624b50,
-  0x544f63d2, 0x543c7914,
-  0x54298b17, 0x541699db, 0x5403a561, 0x53f0adaa, 0x53ddb2b6, 0x53cab486,
-  0x53b7b31c, 0x53a4ae77,
-  0x5391a699, 0x537e9b82, 0x536b8d33, 0x53587bad, 0x534566f0, 0x53324efd,
-  0x531f33d5, 0x530c1579,
-  0x52f8f3e9, 0x52e5cf27, 0x52d2a732, 0x52bf7c0b, 0x52ac4db4, 0x52991c2d,
-  0x5285e777, 0x5272af92,
-  0x525f7480, 0x524c3640, 0x5238f4d4, 0x5225b03d, 0x5212687b, 0x51ff1d8f,
-  0x51ebcf7a, 0x51d87e3c,
-  0x51c529d7, 0x51b1d24a, 0x519e7797, 0x518b19bf, 0x5177b8c2, 0x516454a0,
-  0x5150ed5c, 0x513d82f4,
-  0x512a156b, 0x5116a4c1, 0x510330f7, 0x50efba0d, 0x50dc4005, 0x50c8c2de,
-  0x50b5429a, 0x50a1bf39,
-  0x508e38bd, 0x507aaf25, 0x50672273, 0x505392a8, 0x503fffc4, 0x502c69c8,
-  0x5018d0b4, 0x5005348a,
-  0x4ff1954b, 0x4fddf2f6, 0x4fca4d8d, 0x4fb6a510, 0x4fa2f981, 0x4f8f4ae0,
-  0x4f7b992d, 0x4f67e46a,
-  0x4f542c98, 0x4f4071b6, 0x4f2cb3c7, 0x4f18f2c9, 0x4f052ec0, 0x4ef167aa,
-  0x4edd9d89, 0x4ec9d05e,
-  0x4eb60029, 0x4ea22ceb, 0x4e8e56a5, 0x4e7a7d58, 0x4e66a105, 0x4e52c1ab,
-  0x4e3edf4d, 0x4e2af9ea,
-  0x4e171184, 0x4e03261b, 0x4def37b0, 0x4ddb4644, 0x4dc751d8, 0x4db35a6c,
-  0x4d9f6001, 0x4d8b6298,
-  0x4d776231, 0x4d635ece, 0x4d4f5870, 0x4d3b4f16, 0x4d2742c2, 0x4d133374,
-  0x4cff212e, 0x4ceb0bf0,
-  0x4cd6f3bb, 0x4cc2d88f, 0x4caeba6e, 0x4c9a9958, 0x4c86754e, 0x4c724e50,
-  0x4c5e2460, 0x4c49f77f,
-  0x4c35c7ac, 0x4c2194e9, 0x4c0d5f37, 0x4bf92697, 0x4be4eb08, 0x4bd0ac8d,
-  0x4bbc6b25, 0x4ba826d1,
-  0x4b93df93, 0x4b7f956b, 0x4b6b485a, 0x4b56f861, 0x4b42a580, 0x4b2e4fb8,
-  0x4b19f70a, 0x4b059b77,
-  0x4af13d00, 0x4adcdba5, 0x4ac87767, 0x4ab41046, 0x4a9fa645, 0x4a8b3963,
-  0x4a76c9a2, 0x4a625701,
-  0x4a4de182, 0x4a396926, 0x4a24edee, 0x4a106fda, 0x49fbeeea, 0x49e76b21,
-  0x49d2e47e, 0x49be5b02,
-  0x49a9ceaf, 0x49953f84, 0x4980ad84, 0x496c18ae, 0x49578103, 0x4942e684,
-  0x492e4933, 0x4919a90f,
-  0x4905061a, 0x48f06054, 0x48dbb7be, 0x48c70c59, 0x48b25e25, 0x489dad25,
-  0x4888f957, 0x487442be,
-  0x485f8959, 0x484acd2a, 0x48360e32, 0x48214c71, 0x480c87e8, 0x47f7c099,
-  0x47e2f682, 0x47ce29a7,
-  0x47b95a06, 0x47a487a2, 0x478fb27b, 0x477ada91, 0x4765ffe6, 0x4751227a,
-  0x473c424e, 0x47275f63,
-  0x471279ba, 0x46fd9154, 0x46e8a631, 0x46d3b852, 0x46bec7b8, 0x46a9d464,
-  0x4694de56, 0x467fe590,
-  0x466aea12, 0x4655ebdd, 0x4640eaf2, 0x462be751, 0x4616e0fc, 0x4601d7f3,
-  0x45eccc37, 0x45d7bdc9,
-  0x45c2acaa, 0x45ad98da, 0x4598825a, 0x4583692c, 0x456e4d4f, 0x45592ec6,
-  0x45440d90, 0x452ee9ae,
-  0x4519c321, 0x450499eb, 0x44ef6e0b, 0x44da3f83, 0x44c50e53, 0x44afda7d,
-  0x449aa400, 0x44856adf,
-  0x44702f19, 0x445af0b0, 0x4445afa4, 0x44306bf6, 0x441b25a8, 0x4405dcb9,
-  0x43f0912b, 0x43db42fe,
-  0x43c5f234, 0x43b09ecc, 0x439b48c9, 0x4385f02a, 0x437094f1, 0x435b371f,
-  0x4345d6b3, 0x433073b0,
-  0x431b0e15, 0x4305a5e5, 0x42f03b1e, 0x42dacdc3, 0x42c55dd4, 0x42afeb53,
-  0x429a763f, 0x4284fe99,
-  0x426f8463, 0x425a079e, 0x42448849, 0x422f0667, 0x421981f7, 0x4203fafb,
-  0x41ee7174, 0x41d8e561,
-  0x41c356c5, 0x41adc5a0, 0x419831f3, 0x41829bbe, 0x416d0302, 0x415767c1,
-  0x4141c9fb, 0x412c29b1,
-  0x411686e4, 0x4100e194, 0x40eb39c3, 0x40d58f71, 0x40bfe29f, 0x40aa334e,
-  0x4094817f, 0x407ecd32,
-  0x40691669, 0x40535d24, 0x403da165, 0x4027e32b, 0x40122278, 0x3ffc5f4d,
-  0x3fe699aa, 0x3fd0d191,
-  0x3fbb0702, 0x3fa539fd, 0x3f8f6a85, 0x3f799899, 0x3f63c43b, 0x3f4ded6b,
-  0x3f38142a, 0x3f22387a,
-  0x3f0c5a5a, 0x3ef679cc, 0x3ee096d1, 0x3ecab169, 0x3eb4c995, 0x3e9edf57,
-  0x3e88f2ae, 0x3e73039d,
-  0x3e5d1222, 0x3e471e41, 0x3e3127f9, 0x3e1b2f4a, 0x3e053437, 0x3def36c0,
-  0x3dd936e6, 0x3dc334a9,
-  0x3dad300b, 0x3d97290b, 0x3d811fac, 0x3d6b13ee, 0x3d5505d2, 0x3d3ef559,
-  0x3d28e282, 0x3d12cd51,
-  0x3cfcb5c4, 0x3ce69bde, 0x3cd07f9f, 0x3cba6107, 0x3ca44018, 0x3c8e1cd3,
-  0x3c77f737, 0x3c61cf48,
-  0x3c4ba504, 0x3c35786d, 0x3c1f4983, 0x3c091849, 0x3bf2e4be, 0x3bdcaee3,
-  0x3bc676b9, 0x3bb03c42,
-  0x3b99ff7d, 0x3b83c06c, 0x3b6d7f10, 0x3b573b69, 0x3b40f579, 0x3b2aad3f,
-  0x3b1462be, 0x3afe15f6,
-  0x3ae7c6e7, 0x3ad17593, 0x3abb21fb, 0x3aa4cc1e, 0x3a8e7400, 0x3a78199f,
-  0x3a61bcfd, 0x3a4b5e1b,
-  0x3a34fcf9, 0x3a1e9999, 0x3a0833fc, 0x39f1cc21, 0x39db620b, 0x39c4f5ba,
-  0x39ae872f, 0x3998166a,
-  0x3981a36d, 0x396b2e38, 0x3954b6cd, 0x393e3d2c, 0x3927c155, 0x3911434b,
-  0x38fac30e, 0x38e4409e,
-  0x38cdbbfc, 0x38b7352a, 0x38a0ac29, 0x388a20f8, 0x38739399, 0x385d040d,
-  0x38467255, 0x382fde72,
-  0x38194864, 0x3802b02c, 0x37ec15cb, 0x37d57943, 0x37beda93, 0x37a839be,
-  0x379196c3, 0x377af1a3,
-  0x37644a60, 0x374da0fa, 0x3736f573, 0x372047ca, 0x37099802, 0x36f2e61a,
-  0x36dc3214, 0x36c57bf0,
-  0x36aec3b0, 0x36980954, 0x36814cde, 0x366a8e4d, 0x3653cda3, 0x363d0ae2,
-  0x36264609, 0x360f7f19,
-  0x35f8b614, 0x35e1eafa, 0x35cb1dcc, 0x35b44e8c, 0x359d7d39, 0x3586a9d5,
-  0x356fd461, 0x3558fcde,
-  0x3542234c, 0x352b47ad, 0x35146a00, 0x34fd8a48, 0x34e6a885, 0x34cfc4b7,
-  0x34b8dee1, 0x34a1f702,
-  0x348b0d1c, 0x3474212f, 0x345d333c, 0x34464345, 0x342f5149, 0x34185d4b,
-  0x3401674a, 0x33ea6f48,
-  0x33d37546, 0x33bc7944, 0x33a57b44, 0x338e7b46, 0x3377794b, 0x33607554,
-  0x33496f62, 0x33326776,
-  0x331b5d91, 0x330451b3, 0x32ed43de, 0x32d63412, 0x32bf2250, 0x32a80e99,
-  0x3290f8ef, 0x3279e151,
-  0x3262c7c1, 0x324bac40, 0x32348ecf, 0x321d6f6e, 0x32064e1e, 0x31ef2ae1,
-  0x31d805b7, 0x31c0dea1,
-  0x31a9b5a0, 0x31928ab4, 0x317b5de0, 0x31642f23, 0x314cfe7f, 0x3135cbf4,
-  0x311e9783, 0x3107612e,
-  0x30f028f4, 0x30d8eed8, 0x30c1b2da, 0x30aa74fa, 0x3093353a, 0x307bf39b,
-  0x3064b01d, 0x304d6ac1,
-  0x30362389, 0x301eda75, 0x30078f86, 0x2ff042bd, 0x2fd8f41b, 0x2fc1a3a0,
-  0x2faa514f, 0x2f92fd26,
-  0x2f7ba729, 0x2f644f56, 0x2f4cf5b0, 0x2f359a37, 0x2f1e3ced, 0x2f06ddd1,
-  0x2eef7ce5, 0x2ed81a29,
-  0x2ec0b5a0, 0x2ea94f49, 0x2e91e725, 0x2e7a7d36, 0x2e63117c, 0x2e4ba3f8,
-  0x2e3434ac, 0x2e1cc397,
-  0x2e0550bb, 0x2deddc19, 0x2dd665b2, 0x2dbeed86, 0x2da77397, 0x2d8ff7e5,
-  0x2d787a72, 0x2d60fb3e,
-  0x2d497a4a, 0x2d31f797, 0x2d1a7325, 0x2d02ecf7, 0x2ceb650d, 0x2cd3db67,
-  0x2cbc5006, 0x2ca4c2ed,
-  0x2c8d341a, 0x2c75a390, 0x2c5e114f, 0x2c467d58, 0x2c2ee7ad, 0x2c17504d,
-  0x2bffb73a, 0x2be81c74,
-  0x2bd07ffe, 0x2bb8e1d7, 0x2ba14200, 0x2b89a07b, 0x2b71fd48, 0x2b5a5868,
-  0x2b42b1dd, 0x2b2b09a6,
-  0x2b135fc6, 0x2afbb43c, 0x2ae4070a, 0x2acc5831, 0x2ab4a7b1, 0x2a9cf58c,
-  0x2a8541c3, 0x2a6d8c55,
-  0x2a55d545, 0x2a3e1c93, 0x2a266240, 0x2a0ea64d, 0x29f6e8bb, 0x29df298b,
-  0x29c768be, 0x29afa654,
-  0x2997e24f, 0x29801caf, 0x29685576, 0x29508ca4, 0x2938c23a, 0x2920f63a,
-  0x290928a3, 0x28f15978,
-  0x28d988b8, 0x28c1b666, 0x28a9e281, 0x28920d0a, 0x287a3604, 0x28625d6d,
-  0x284a8349, 0x2832a796,
-  0x281aca57, 0x2802eb8c, 0x27eb0b36, 0x27d32956, 0x27bb45ed, 0x27a360fc,
-  0x278b7a84, 0x27739285,
-  0x275ba901, 0x2743bdf9, 0x272bd16d, 0x2713e35f, 0x26fbf3ce, 0x26e402bd,
-  0x26cc102d, 0x26b41c1d,
-  0x269c268f, 0x26842f84, 0x266c36fe, 0x26543cfb, 0x263c417f, 0x26244489,
-  0x260c461b, 0x25f44635,
-  0x25dc44d9, 0x25c44207, 0x25ac3dc0, 0x25943806, 0x257c30d8, 0x25642839,
-  0x254c1e28, 0x253412a8,
-  0x251c05b8, 0x2503f75a, 0x24ebe78f, 0x24d3d657, 0x24bbc3b4, 0x24a3afa6,
-  0x248b9a2f, 0x2473834f,
-  0x245b6b07, 0x24435158, 0x242b3644, 0x241319ca, 0x23fafbec, 0x23e2dcac,
-  0x23cabc09, 0x23b29a05,
-  0x239a76a0, 0x238251dd, 0x236a2bba, 0x2352043b, 0x2339db5e, 0x2321b126,
-  0x23098593, 0x22f158a7,
-  0x22d92a61, 0x22c0fac4, 0x22a8c9cf, 0x22909785, 0x227863e5, 0x22602ef1,
-  0x2247f8aa, 0x222fc111,
-  0x22178826, 0x21ff4dea, 0x21e71260, 0x21ced586, 0x21b6975f, 0x219e57eb,
-  0x2186172b, 0x216dd521,
-  0x215591cc, 0x213d4d2f, 0x21250749, 0x210cc01d, 0x20f477aa, 0x20dc2df2,
-  0x20c3e2f5, 0x20ab96b5,
-  0x20934933, 0x207afa6f, 0x2062aa6b, 0x204a5927, 0x203206a4, 0x2019b2e4,
-  0x20015de7, 0x1fe907ae,
-  0x1fd0b03a, 0x1fb8578b, 0x1f9ffda4, 0x1f87a285, 0x1f6f462f, 0x1f56e8a2,
-  0x1f3e89e0, 0x1f2629ea,
-  0x1f0dc8c0, 0x1ef56664, 0x1edd02d6, 0x1ec49e17, 0x1eac3829, 0x1e93d10c,
-  0x1e7b68c2, 0x1e62ff4a,
-  0x1e4a94a7, 0x1e3228d9, 0x1e19bbe0, 0x1e014dbf, 0x1de8de75, 0x1dd06e04,
-  0x1db7fc6d, 0x1d9f89b1,
-  0x1d8715d0, 0x1d6ea0cc, 0x1d562aa6, 0x1d3db35e, 0x1d253af5, 0x1d0cc16c,
-  0x1cf446c5, 0x1cdbcb00,
-  0x1cc34e1f, 0x1caad021, 0x1c925109, 0x1c79d0d6, 0x1c614f8b, 0x1c48cd27,
-  0x1c3049ac, 0x1c17c51b,
-  0x1bff3f75, 0x1be6b8ba, 0x1bce30ec, 0x1bb5a80c, 0x1b9d1e1a, 0x1b849317,
-  0x1b6c0705, 0x1b5379e5,
-  0x1b3aebb6, 0x1b225c7b, 0x1b09cc34, 0x1af13ae3, 0x1ad8a887, 0x1ac01522,
-  0x1aa780b6, 0x1a8eeb42,
-  0x1a7654c8, 0x1a5dbd49, 0x1a4524c6, 0x1a2c8b3f, 0x1a13f0b6, 0x19fb552c,
-  0x19e2b8a2, 0x19ca1b17,
-  0x19b17c8f, 0x1998dd09, 0x19803c86, 0x19679b07, 0x194ef88e, 0x1936551b,
-  0x191db0af, 0x19050b4b,
-  0x18ec64f0, 0x18d3bda0, 0x18bb155a, 0x18a26c20, 0x1889c1f3, 0x187116d4,
-  0x18586ac3, 0x183fbdc3,
-  0x18270fd3, 0x180e60f4, 0x17f5b129, 0x17dd0070, 0x17c44ecd, 0x17ab9c3e,
-  0x1792e8c6, 0x177a3466,
-  0x17617f1d, 0x1748c8ee, 0x173011d9, 0x171759df, 0x16fea102, 0x16e5e741,
-  0x16cd2c9f, 0x16b4711b,
-  0x169bb4b7, 0x1682f774, 0x166a3953, 0x16517a55, 0x1638ba7a, 0x161ff9c4,
-  0x16073834, 0x15ee75cb,
-  0x15d5b288, 0x15bcee6f, 0x15a4297f, 0x158b63b9, 0x15729d1f, 0x1559d5b1,
-  0x15410d70, 0x1528445d,
-  0x150f7a7a, 0x14f6afc7, 0x14dde445, 0x14c517f4, 0x14ac4ad7, 0x14937cee,
-  0x147aae3a, 0x1461debc,
-  0x14490e74, 0x14303d65, 0x14176b8e, 0x13fe98f1, 0x13e5c58e, 0x13ccf167,
-  0x13b41c7d, 0x139b46d0,
-  0x13827062, 0x13699933, 0x1350c144, 0x1337e897, 0x131f0f2c, 0x13063505,
-  0x12ed5a21, 0x12d47e83,
-  0x12bba22b, 0x12a2c51b, 0x1289e752, 0x127108d2, 0x1258299c, 0x123f49b2,
-  0x12266913, 0x120d87c1,
-  0x11f4a5bd, 0x11dbc307, 0x11c2dfa2, 0x11a9fb8d, 0x119116c9, 0x11783159,
-  0x115f4b3c, 0x11466473,
-  0x112d7d00, 0x111494e4, 0x10fbac1e, 0x10e2c2b2, 0x10c9d89e, 0x10b0ede5,
-  0x10980287, 0x107f1686,
-  0x106629e1, 0x104d3c9b, 0x10344eb4, 0x101b602d, 0x10027107, 0xfe98143,
-  0xfd090e1, 0xfb79fe4,
-  0xf9eae4c, 0xf85bc19, 0xf6cc94e, 0xf53d5ea, 0xf3ae1ee, 0xf21ed5d, 0xf08f836,
-  0xef0027b,
-  0xed70c2c, 0xebe154b, 0xea51dd8, 0xe8c25d5, 0xe732d42, 0xe5a3421, 0xe413a72,
-  0xe284036,
-  0xe0f456f, 0xdf64a1c, 0xddd4e40, 0xdc451dc, 0xdab54ef, 0xd92577b, 0xd795982,
-  0xd605b03,
-  0xd475c00, 0xd2e5c7b, 0xd155c73, 0xcfc5bea, 0xce35ae1, 0xcca5959, 0xcb15752,
-  0xc9854cf,
-  0xc7f51cf, 0xc664e53, 0xc4d4a5d, 0xc3445ee, 0xc1b4107, 0xc023ba7, 0xbe935d2,
-  0xbd02f87,
-  0xbb728c7, 0xb9e2193, 0xb8519ed, 0xb6c11d5, 0xb53094d, 0xb3a0055, 0xb20f6ee,
-  0xb07ed19,
-  0xaeee2d7, 0xad5d829, 0xabccd11, 0xaa3c18e, 0xa8ab5a2, 0xa71a94f, 0xa589c94,
-  0xa3f8f73,
-  0xa2681ed, 0xa0d7403, 0x9f465b5, 0x9db5706, 0x9c247f5, 0x9a93884, 0x99028b3,
-  0x9771884,
-  0x95e07f8, 0x944f70f, 0x92be5ca, 0x912d42c, 0x8f9c233, 0x8e0afe2, 0x8c79d3a,
-  0x8ae8a3a,
-  0x89576e5, 0x87c633c, 0x8634f3e, 0x84a3aee, 0x831264c, 0x8181159, 0x7fefc16,
-  0x7e5e685,
-  0x7ccd0a5, 0x7b3ba78, 0x79aa400, 0x7818d3c, 0x768762e, 0x74f5ed7, 0x7364738,
-  0x71d2f52,
-  0x7041726, 0x6eafeb4, 0x6d1e5fe, 0x6b8cd05, 0x69fb3c9, 0x6869a4c, 0x66d808f,
-  0x6546692,
-  0x63b4c57, 0x62231de, 0x6091729, 0x5effc38, 0x5d6e10c, 0x5bdc5a7, 0x5a4aa09,
-  0x58b8e34,
-  0x5727228, 0x55955e6, 0x540396f, 0x5271cc4, 0x50dffe7, 0x4f4e2d8, 0x4dbc597,
-  0x4c2a827,
-  0x4a98a88, 0x4906cbb, 0x4774ec1, 0x45e309a, 0x4451249, 0x42bf3cd, 0x412d528,
-  0x3f9b65b,
-  0x3e09767, 0x3c7784d, 0x3ae590d, 0x39539a9, 0x37c1a22, 0x362fa78, 0x349daac,
-  0x330bac1,
-  0x3179ab5, 0x2fe7a8c, 0x2e55a44, 0x2cc39e1, 0x2b31961, 0x299f8c7, 0x280d813,
-  0x267b747,
-  0x24e9662, 0x2357567, 0x21c5457, 0x2033331, 0x1ea11f7, 0x1d0f0ab, 0x1b7cf4d,
-  0x19eaddd,
-  0x1858c5e, 0x16c6ad0, 0x1534934, 0x13a278a, 0x12105d5, 0x107e414, 0xeec249,
-  0xd5a075,
-  0xbc7e99, 0xa35cb5, 0x8a3acb, 0x7118dc, 0x57f6e9, 0x3ed4f2, 0x25b2f8,
-  0xc90fe,
-
-};
-
-static const q31_t cos_factorsQ31_8192[8192] = {
-  0x7ffffff6, 0x7fffffa7, 0x7fffff09, 0x7ffffe1c, 0x7ffffce1, 0x7ffffb56,
-    0x7ffff97c, 0x7ffff753,
-  0x7ffff4dc, 0x7ffff215, 0x7fffef00, 0x7fffeb9b, 0x7fffe7e8, 0x7fffe3e5,
-    0x7fffdf94, 0x7fffdaf3,
-  0x7fffd604, 0x7fffd0c6, 0x7fffcb39, 0x7fffc55c, 0x7fffbf31, 0x7fffb8b7,
-    0x7fffb1ee, 0x7fffaad6,
-  0x7fffa36f, 0x7fff9bb9, 0x7fff93b4, 0x7fff8b61, 0x7fff82be, 0x7fff79cc,
-    0x7fff708b, 0x7fff66fc,
-  0x7fff5d1d, 0x7fff52ef, 0x7fff4873, 0x7fff3da8, 0x7fff328d, 0x7fff2724,
-    0x7fff1b6b, 0x7fff0f64,
-  0x7fff030e, 0x7ffef669, 0x7ffee975, 0x7ffedc31, 0x7ffece9f, 0x7ffec0be,
-    0x7ffeb28e, 0x7ffea40f,
-  0x7ffe9542, 0x7ffe8625, 0x7ffe76b9, 0x7ffe66fe, 0x7ffe56f5, 0x7ffe469c,
-    0x7ffe35f4, 0x7ffe24fe,
-  0x7ffe13b8, 0x7ffe0224, 0x7ffdf040, 0x7ffdde0e, 0x7ffdcb8d, 0x7ffdb8bc,
-    0x7ffda59d, 0x7ffd922f,
-  0x7ffd7e72, 0x7ffd6a66, 0x7ffd560b, 0x7ffd4161, 0x7ffd2c68, 0x7ffd1720,
-    0x7ffd0189, 0x7ffceba4,
-  0x7ffcd56f, 0x7ffcbeeb, 0x7ffca819, 0x7ffc90f7, 0x7ffc7987, 0x7ffc61c7,
-    0x7ffc49b9, 0x7ffc315b,
-  0x7ffc18af, 0x7ffbffb4, 0x7ffbe66a, 0x7ffbccd0, 0x7ffbb2e8, 0x7ffb98b1,
-    0x7ffb7e2b, 0x7ffb6356,
-  0x7ffb4833, 0x7ffb2cc0, 0x7ffb10fe, 0x7ffaf4ed, 0x7ffad88e, 0x7ffabbdf,
-    0x7ffa9ee2, 0x7ffa8195,
-  0x7ffa63fa, 0x7ffa460f, 0x7ffa27d6, 0x7ffa094e, 0x7ff9ea76, 0x7ff9cb50,
-    0x7ff9abdb, 0x7ff98c17,
-  0x7ff96c04, 0x7ff94ba2, 0x7ff92af1, 0x7ff909f2, 0x7ff8e8a3, 0x7ff8c705,
-    0x7ff8a519, 0x7ff882dd,
-  0x7ff86053, 0x7ff83d79, 0x7ff81a51, 0x7ff7f6da, 0x7ff7d313, 0x7ff7aefe,
-    0x7ff78a9a, 0x7ff765e7,
-  0x7ff740e5, 0x7ff71b94, 0x7ff6f5f4, 0x7ff6d005, 0x7ff6a9c8, 0x7ff6833b,
-    0x7ff65c5f, 0x7ff63535,
-  0x7ff60dbb, 0x7ff5e5f3, 0x7ff5bddc, 0x7ff59576, 0x7ff56cc0, 0x7ff543bc,
-    0x7ff51a69, 0x7ff4f0c7,
-  0x7ff4c6d6, 0x7ff49c96, 0x7ff47208, 0x7ff4472a, 0x7ff41bfd, 0x7ff3f082,
-    0x7ff3c4b7, 0x7ff3989e,
-  0x7ff36c36, 0x7ff33f7e, 0x7ff31278, 0x7ff2e523, 0x7ff2b77f, 0x7ff2898c,
-    0x7ff25b4a, 0x7ff22cb9,
-  0x7ff1fdd9, 0x7ff1ceab, 0x7ff19f2d, 0x7ff16f61, 0x7ff13f45, 0x7ff10edb,
-    0x7ff0de22, 0x7ff0ad19,
-  0x7ff07bc2, 0x7ff04a1c, 0x7ff01827, 0x7fefe5e4, 0x7fefb351, 0x7fef806f,
-    0x7fef4d3e, 0x7fef19bf,
-  0x7feee5f0, 0x7feeb1d3, 0x7fee7d67, 0x7fee48ac, 0x7fee13a1, 0x7fedde48,
-    0x7feda8a0, 0x7fed72aa,
-  0x7fed3c64, 0x7fed05cf, 0x7fecceec, 0x7fec97b9, 0x7fec6038, 0x7fec2867,
-    0x7febf048, 0x7febb7da,
-  0x7feb7f1d, 0x7feb4611, 0x7feb0cb6, 0x7fead30c, 0x7fea9914, 0x7fea5ecc,
-    0x7fea2436, 0x7fe9e950,
-  0x7fe9ae1c, 0x7fe97299, 0x7fe936c7, 0x7fe8faa6, 0x7fe8be36, 0x7fe88177,
-    0x7fe84469, 0x7fe8070d,
-  0x7fe7c961, 0x7fe78b67, 0x7fe74d1e, 0x7fe70e85, 0x7fe6cf9e, 0x7fe69068,
-    0x7fe650e3, 0x7fe61110,
-  0x7fe5d0ed, 0x7fe5907b, 0x7fe54fbb, 0x7fe50eac, 0x7fe4cd4d, 0x7fe48ba0,
-    0x7fe449a4, 0x7fe40759,
-  0x7fe3c4bf, 0x7fe381d7, 0x7fe33e9f, 0x7fe2fb19, 0x7fe2b743, 0x7fe2731f,
-    0x7fe22eac, 0x7fe1e9ea,
-  0x7fe1a4d9, 0x7fe15f79, 0x7fe119cb, 0x7fe0d3cd, 0x7fe08d81, 0x7fe046e5,
-    0x7fdffffb, 0x7fdfb8c2,
-  0x7fdf713a, 0x7fdf2963, 0x7fdee13e, 0x7fde98c9, 0x7fde5006, 0x7fde06f3,
-    0x7fddbd92, 0x7fdd73e2,
-  0x7fdd29e3, 0x7fdcdf95, 0x7fdc94f9, 0x7fdc4a0d, 0x7fdbfed3, 0x7fdbb349,
-    0x7fdb6771, 0x7fdb1b4a,
-  0x7fdaced4, 0x7fda820f, 0x7fda34fc, 0x7fd9e799, 0x7fd999e8, 0x7fd94be8,
-    0x7fd8fd98, 0x7fd8aefa,
-  0x7fd8600e, 0x7fd810d2, 0x7fd7c147, 0x7fd7716e, 0x7fd72146, 0x7fd6d0cf,
-    0x7fd68009, 0x7fd62ef4,
-  0x7fd5dd90, 0x7fd58bdd, 0x7fd539dc, 0x7fd4e78c, 0x7fd494ed, 0x7fd441ff,
-    0x7fd3eec2, 0x7fd39b36,
-  0x7fd3475c, 0x7fd2f332, 0x7fd29eba, 0x7fd249f3, 0x7fd1f4dd, 0x7fd19f78,
-    0x7fd149c5, 0x7fd0f3c2,
-  0x7fd09d71, 0x7fd046d1, 0x7fcfefe2, 0x7fcf98a4, 0x7fcf4117, 0x7fcee93c,
-    0x7fce9112, 0x7fce3898,
-  0x7fcddfd0, 0x7fcd86b9, 0x7fcd2d54, 0x7fccd39f, 0x7fcc799c, 0x7fcc1f4a,
-    0x7fcbc4a9, 0x7fcb69b9,
-  0x7fcb0e7a, 0x7fcab2ed, 0x7fca5710, 0x7fc9fae5, 0x7fc99e6b, 0x7fc941a2,
-    0x7fc8e48b, 0x7fc88724,
-  0x7fc8296f, 0x7fc7cb6b, 0x7fc76d18, 0x7fc70e76, 0x7fc6af86, 0x7fc65046,
-    0x7fc5f0b8, 0x7fc590db,
-  0x7fc530af, 0x7fc4d035, 0x7fc46f6b, 0x7fc40e53, 0x7fc3acec, 0x7fc34b36,
-    0x7fc2e931, 0x7fc286de,
-  0x7fc2243b, 0x7fc1c14a, 0x7fc15e0a, 0x7fc0fa7b, 0x7fc0969e, 0x7fc03271,
-    0x7fbfcdf6, 0x7fbf692c,
-  0x7fbf0414, 0x7fbe9eac, 0x7fbe38f6, 0x7fbdd2f0, 0x7fbd6c9c, 0x7fbd05fa,
-    0x7fbc9f08, 0x7fbc37c8,
-  0x7fbbd039, 0x7fbb685b, 0x7fbb002e, 0x7fba97b2, 0x7fba2ee8, 0x7fb9c5cf,
-    0x7fb95c67, 0x7fb8f2b0,
-  0x7fb888ab, 0x7fb81e57, 0x7fb7b3b4, 0x7fb748c2, 0x7fb6dd81, 0x7fb671f2,
-    0x7fb60614, 0x7fb599e7,
-  0x7fb52d6b, 0x7fb4c0a1, 0x7fb45387, 0x7fb3e61f, 0x7fb37869, 0x7fb30a63,
-    0x7fb29c0f, 0x7fb22d6c,
-  0x7fb1be7a, 0x7fb14f39, 0x7fb0dfaa, 0x7fb06fcb, 0x7fafff9e, 0x7faf8f23,
-    0x7faf1e58, 0x7faead3f,
-  0x7fae3bd7, 0x7fadca20, 0x7fad581b, 0x7face5c6, 0x7fac7323, 0x7fac0031,
-    0x7fab8cf1, 0x7fab1962,
-  0x7faaa584, 0x7faa3157, 0x7fa9bcdb, 0x7fa94811, 0x7fa8d2f8, 0x7fa85d90,
-    0x7fa7e7d9, 0x7fa771d4,
-  0x7fa6fb80, 0x7fa684dd, 0x7fa60dec, 0x7fa596ac, 0x7fa51f1d, 0x7fa4a73f,
-    0x7fa42f12, 0x7fa3b697,
-  0x7fa33dcd, 0x7fa2c4b5, 0x7fa24b4d, 0x7fa1d197, 0x7fa15792, 0x7fa0dd3f,
-    0x7fa0629c, 0x7f9fe7ab,
-  0x7f9f6c6b, 0x7f9ef0dd, 0x7f9e7500, 0x7f9df8d4, 0x7f9d7c59, 0x7f9cff90,
-    0x7f9c8278, 0x7f9c0511,
-  0x7f9b875b, 0x7f9b0957, 0x7f9a8b04, 0x7f9a0c62, 0x7f998d72, 0x7f990e33,
-    0x7f988ea5, 0x7f980ec8,
-  0x7f978e9d, 0x7f970e23, 0x7f968d5b, 0x7f960c43, 0x7f958add, 0x7f950929,
-    0x7f948725, 0x7f9404d3,
-  0x7f938232, 0x7f92ff43, 0x7f927c04, 0x7f91f878, 0x7f91749c, 0x7f90f072,
-    0x7f906bf9, 0x7f8fe731,
-  0x7f8f621b, 0x7f8edcb6, 0x7f8e5702, 0x7f8dd0ff, 0x7f8d4aae, 0x7f8cc40f,
-    0x7f8c3d20, 0x7f8bb5e3,
-  0x7f8b2e57, 0x7f8aa67d, 0x7f8a1e54, 0x7f8995dc, 0x7f890d15, 0x7f888400,
-    0x7f87fa9c, 0x7f8770ea,
-  0x7f86e6e9, 0x7f865c99, 0x7f85d1fa, 0x7f85470d, 0x7f84bbd1, 0x7f843047,
-    0x7f83a46e, 0x7f831846,
-  0x7f828bcf, 0x7f81ff0a, 0x7f8171f6, 0x7f80e494, 0x7f8056e3, 0x7f7fc8e3,
-    0x7f7f3a95, 0x7f7eabf8,
-  0x7f7e1d0c, 0x7f7d8dd2, 0x7f7cfe49, 0x7f7c6e71, 0x7f7bde4b, 0x7f7b4dd6,
-    0x7f7abd13, 0x7f7a2c01,
-  0x7f799aa0, 0x7f7908f0, 0x7f7876f2, 0x7f77e4a6, 0x7f77520a, 0x7f76bf21,
-    0x7f762be8, 0x7f759861,
-  0x7f75048b, 0x7f747067, 0x7f73dbf4, 0x7f734732, 0x7f72b222, 0x7f721cc3,
-    0x7f718715, 0x7f70f119,
-  0x7f705ace, 0x7f6fc435, 0x7f6f2d4d, 0x7f6e9617, 0x7f6dfe91, 0x7f6d66be,
-    0x7f6cce9b, 0x7f6c362a,
-  0x7f6b9d6b, 0x7f6b045d, 0x7f6a6b00, 0x7f69d154, 0x7f69375a, 0x7f689d12,
-    0x7f68027b, 0x7f676795,
-  0x7f66cc61, 0x7f6630de, 0x7f65950c, 0x7f64f8ec, 0x7f645c7d, 0x7f63bfc0,
-    0x7f6322b4, 0x7f62855a,
-  0x7f61e7b1, 0x7f6149b9, 0x7f60ab73, 0x7f600cdf, 0x7f5f6dfb, 0x7f5ecec9,
-    0x7f5e2f49, 0x7f5d8f7a,
-  0x7f5cef5c, 0x7f5c4ef0, 0x7f5bae36, 0x7f5b0d2c, 0x7f5a6bd5, 0x7f59ca2e,
-    0x7f592839, 0x7f5885f6,
-  0x7f57e364, 0x7f574083, 0x7f569d54, 0x7f55f9d6, 0x7f55560a, 0x7f54b1ef,
-    0x7f540d86, 0x7f5368ce,
-  0x7f52c3c8, 0x7f521e73, 0x7f5178cf, 0x7f50d2dd, 0x7f502c9d, 0x7f4f860e,
-    0x7f4edf30, 0x7f4e3804,
-  0x7f4d9089, 0x7f4ce8c0, 0x7f4c40a8, 0x7f4b9842, 0x7f4aef8d, 0x7f4a468a,
-    0x7f499d38, 0x7f48f398,
-  0x7f4849a9, 0x7f479f6c, 0x7f46f4e0, 0x7f464a06, 0x7f459edd, 0x7f44f365,
-    0x7f44479f, 0x7f439b8b,
-  0x7f42ef28, 0x7f424277, 0x7f419577, 0x7f40e828, 0x7f403a8b, 0x7f3f8ca0,
-    0x7f3ede66, 0x7f3e2fde,
-  0x7f3d8107, 0x7f3cd1e2, 0x7f3c226e, 0x7f3b72ab, 0x7f3ac29b, 0x7f3a123b,
-    0x7f39618e, 0x7f38b091,
-  0x7f37ff47, 0x7f374dad, 0x7f369bc6, 0x7f35e990, 0x7f35370b, 0x7f348438,
-    0x7f33d116, 0x7f331da6,
-  0x7f3269e8, 0x7f31b5db, 0x7f31017f, 0x7f304cd6, 0x7f2f97dd, 0x7f2ee296,
-    0x7f2e2d01, 0x7f2d771e,
-  0x7f2cc0eb, 0x7f2c0a6b, 0x7f2b539c, 0x7f2a9c7e, 0x7f29e512, 0x7f292d58,
-    0x7f28754f, 0x7f27bcf8,
-  0x7f270452, 0x7f264b5e, 0x7f25921c, 0x7f24d88b, 0x7f241eab, 0x7f23647e,
-    0x7f22aa01, 0x7f21ef37,
-  0x7f21341e, 0x7f2078b6, 0x7f1fbd00, 0x7f1f00fc, 0x7f1e44a9, 0x7f1d8808,
-    0x7f1ccb18, 0x7f1c0dda,
-  0x7f1b504e, 0x7f1a9273, 0x7f19d44a, 0x7f1915d2, 0x7f18570c, 0x7f1797f8,
-    0x7f16d895, 0x7f1618e4,
-  0x7f1558e4, 0x7f149896, 0x7f13d7fa, 0x7f13170f, 0x7f1255d6, 0x7f11944f,
-    0x7f10d279, 0x7f101054,
-  0x7f0f4de2, 0x7f0e8b21, 0x7f0dc811, 0x7f0d04b3, 0x7f0c4107, 0x7f0b7d0d,
-    0x7f0ab8c4, 0x7f09f42d,
-  0x7f092f47, 0x7f086a13, 0x7f07a491, 0x7f06dec0, 0x7f0618a1, 0x7f055233,
-    0x7f048b78, 0x7f03c46d,
-  0x7f02fd15, 0x7f02356e, 0x7f016d79, 0x7f00a535, 0x7effdca4, 0x7eff13c3,
-    0x7efe4a95, 0x7efd8118,
-  0x7efcb74d, 0x7efbed33, 0x7efb22cb, 0x7efa5815, 0x7ef98d11, 0x7ef8c1be,
-    0x7ef7f61d, 0x7ef72a2d,
-  0x7ef65def, 0x7ef59163, 0x7ef4c489, 0x7ef3f760, 0x7ef329e9, 0x7ef25c24,
-    0x7ef18e10, 0x7ef0bfae,
-  0x7eeff0fe, 0x7eef21ff, 0x7eee52b2, 0x7eed8317, 0x7eecb32d, 0x7eebe2f6,
-    0x7eeb1270, 0x7eea419b,
-  0x7ee97079, 0x7ee89f08, 0x7ee7cd49, 0x7ee6fb3b, 0x7ee628df, 0x7ee55635,
-    0x7ee4833d, 0x7ee3aff6,
-  0x7ee2dc61, 0x7ee2087e, 0x7ee1344d, 0x7ee05fcd, 0x7edf8aff, 0x7edeb5e3,
-    0x7edde079, 0x7edd0ac0,
-  0x7edc34b9, 0x7edb5e64, 0x7eda87c0, 0x7ed9b0ce, 0x7ed8d98e, 0x7ed80200,
-    0x7ed72a24, 0x7ed651f9,
-  0x7ed57980, 0x7ed4a0b9, 0x7ed3c7a3, 0x7ed2ee40, 0x7ed2148e, 0x7ed13a8e,
-    0x7ed0603f, 0x7ecf85a3,
-  0x7eceaab8, 0x7ecdcf7f, 0x7eccf3f8, 0x7ecc1822, 0x7ecb3bff, 0x7eca5f8d,
-    0x7ec982cd, 0x7ec8a5bf,
-  0x7ec7c862, 0x7ec6eab7, 0x7ec60cbe, 0x7ec52e77, 0x7ec44fe2, 0x7ec370fe,
-    0x7ec291cd, 0x7ec1b24d,
-  0x7ec0d27f, 0x7ebff263, 0x7ebf11f8, 0x7ebe313f, 0x7ebd5039, 0x7ebc6ee4,
-    0x7ebb8d40, 0x7ebaab4f,
-  0x7eb9c910, 0x7eb8e682, 0x7eb803a6, 0x7eb7207c, 0x7eb63d04, 0x7eb5593d,
-    0x7eb47529, 0x7eb390c6,
-  0x7eb2ac15, 0x7eb1c716, 0x7eb0e1c9, 0x7eaffc2e, 0x7eaf1645, 0x7eae300d,
-    0x7ead4987, 0x7eac62b3,
-  0x7eab7b91, 0x7eaa9421, 0x7ea9ac63, 0x7ea8c457, 0x7ea7dbfc, 0x7ea6f353,
-    0x7ea60a5d, 0x7ea52118,
-  0x7ea43785, 0x7ea34da4, 0x7ea26374, 0x7ea178f7, 0x7ea08e2b, 0x7e9fa312,
-    0x7e9eb7aa, 0x7e9dcbf4,
-  0x7e9cdff0, 0x7e9bf39e, 0x7e9b06fe, 0x7e9a1a10, 0x7e992cd4, 0x7e983f49,
-    0x7e975171, 0x7e96634a,
-  0x7e9574d6, 0x7e948613, 0x7e939702, 0x7e92a7a3, 0x7e91b7f6, 0x7e90c7fb,
-    0x7e8fd7b2, 0x7e8ee71b,
-  0x7e8df636, 0x7e8d0502, 0x7e8c1381, 0x7e8b21b1, 0x7e8a2f94, 0x7e893d28,
-    0x7e884a6f, 0x7e875767,
-  0x7e866411, 0x7e85706d, 0x7e847c7c, 0x7e83883c, 0x7e8293ae, 0x7e819ed2,
-    0x7e80a9a8, 0x7e7fb430,
-  0x7e7ebe6a, 0x7e7dc856, 0x7e7cd1f4, 0x7e7bdb44, 0x7e7ae446, 0x7e79ecf9,
-    0x7e78f55f, 0x7e77fd77,
-  0x7e770541, 0x7e760cbd, 0x7e7513ea, 0x7e741aca, 0x7e73215c, 0x7e7227a0,
-    0x7e712d96, 0x7e70333d,
-  0x7e6f3897, 0x7e6e3da3, 0x7e6d4261, 0x7e6c46d1, 0x7e6b4af2, 0x7e6a4ec6,
-    0x7e69524c, 0x7e685584,
-  0x7e67586e, 0x7e665b0a, 0x7e655d58, 0x7e645f58, 0x7e63610a, 0x7e62626e,
-    0x7e616384, 0x7e60644c,
-  0x7e5f64c7, 0x7e5e64f3, 0x7e5d64d1, 0x7e5c6461, 0x7e5b63a4, 0x7e5a6298,
-    0x7e59613f, 0x7e585f97,
-  0x7e575da2, 0x7e565b5f, 0x7e5558ce, 0x7e5455ef, 0x7e5352c1, 0x7e524f46,
-    0x7e514b7e, 0x7e504767,
-  0x7e4f4302, 0x7e4e3e4f, 0x7e4d394f, 0x7e4c3400, 0x7e4b2e64, 0x7e4a287a,
-    0x7e492241, 0x7e481bbb,
-  0x7e4714e7, 0x7e460dc5, 0x7e450656, 0x7e43fe98, 0x7e42f68c, 0x7e41ee33,
-    0x7e40e58c, 0x7e3fdc97,
-  0x7e3ed353, 0x7e3dc9c3, 0x7e3cbfe4, 0x7e3bb5b7, 0x7e3aab3c, 0x7e39a074,
-    0x7e38955e, 0x7e3789fa,
-  0x7e367e48, 0x7e357248, 0x7e3465fa, 0x7e33595e, 0x7e324c75, 0x7e313f3e,
-    0x7e3031b9, 0x7e2f23e6,
-  0x7e2e15c5, 0x7e2d0756, 0x7e2bf89a, 0x7e2ae990, 0x7e29da38, 0x7e28ca92,
-    0x7e27ba9e, 0x7e26aa5d,
-  0x7e2599cd, 0x7e2488f0, 0x7e2377c5, 0x7e22664c, 0x7e215486, 0x7e204271,
-    0x7e1f300f, 0x7e1e1d5f,
-  0x7e1d0a61, 0x7e1bf716, 0x7e1ae37c, 0x7e19cf95, 0x7e18bb60, 0x7e17a6dd,
-    0x7e16920d, 0x7e157cee,
-  0x7e146782, 0x7e1351c9, 0x7e123bc1, 0x7e11256c, 0x7e100ec8, 0x7e0ef7d7,
-    0x7e0de099, 0x7e0cc90c,
-  0x7e0bb132, 0x7e0a990a, 0x7e098095, 0x7e0867d1, 0x7e074ec0, 0x7e063561,
-    0x7e051bb4, 0x7e0401ba,
-  0x7e02e772, 0x7e01ccdc, 0x7e00b1f9, 0x7dff96c7, 0x7dfe7b48, 0x7dfd5f7b,
-    0x7dfc4361, 0x7dfb26f9,
-  0x7dfa0a43, 0x7df8ed3f, 0x7df7cfee, 0x7df6b24f, 0x7df59462, 0x7df47628,
-    0x7df357a0, 0x7df238ca,
-  0x7df119a7, 0x7deffa35, 0x7deeda77, 0x7dedba6a, 0x7dec9a10, 0x7deb7968,
-    0x7dea5872, 0x7de9372f,
-  0x7de8159e, 0x7de6f3c0, 0x7de5d193, 0x7de4af1a, 0x7de38c52, 0x7de2693d,
-    0x7de145da, 0x7de02229,
-  0x7ddefe2b, 0x7dddd9e0, 0x7ddcb546, 0x7ddb905f, 0x7dda6b2a, 0x7dd945a8,
-    0x7dd81fd8, 0x7dd6f9ba,
-  0x7dd5d34f, 0x7dd4ac96, 0x7dd38590, 0x7dd25e3c, 0x7dd1369a, 0x7dd00eab,
-    0x7dcee66e, 0x7dcdbde3,
-  0x7dcc950b, 0x7dcb6be6, 0x7dca4272, 0x7dc918b1, 0x7dc7eea3, 0x7dc6c447,
-    0x7dc5999d, 0x7dc46ea6,
-  0x7dc34361, 0x7dc217cf, 0x7dc0ebef, 0x7dbfbfc1, 0x7dbe9346, 0x7dbd667d,
-    0x7dbc3967, 0x7dbb0c03,
-  0x7db9de52, 0x7db8b053, 0x7db78207, 0x7db6536d, 0x7db52485, 0x7db3f550,
-    0x7db2c5cd, 0x7db195fd,
-  0x7db065df, 0x7daf3574, 0x7dae04bb, 0x7dacd3b5, 0x7daba261, 0x7daa70c0,
-    0x7da93ed1, 0x7da80c95,
-  0x7da6da0b, 0x7da5a733, 0x7da4740e, 0x7da3409c, 0x7da20cdc, 0x7da0d8cf,
-    0x7d9fa474, 0x7d9e6fcb,
-  0x7d9d3ad6, 0x7d9c0592, 0x7d9ad001, 0x7d999a23, 0x7d9863f7, 0x7d972d7e,
-    0x7d95f6b7, 0x7d94bfa3,
-  0x7d938841, 0x7d925092, 0x7d911896, 0x7d8fe04c, 0x7d8ea7b4, 0x7d8d6ecf,
-    0x7d8c359d, 0x7d8afc1d,
-  0x7d89c250, 0x7d888835, 0x7d874dcd, 0x7d861317, 0x7d84d814, 0x7d839cc4,
-    0x7d826126, 0x7d81253a,
-  0x7d7fe902, 0x7d7eac7c, 0x7d7d6fa8, 0x7d7c3287, 0x7d7af519, 0x7d79b75d,
-    0x7d787954, 0x7d773afd,
-  0x7d75fc59, 0x7d74bd68, 0x7d737e29, 0x7d723e9d, 0x7d70fec4, 0x7d6fbe9d,
-    0x7d6e7e29, 0x7d6d3d67,
-  0x7d6bfc58, 0x7d6abafc, 0x7d697952, 0x7d68375b, 0x7d66f517, 0x7d65b285,
-    0x7d646fa6, 0x7d632c79,
-  0x7d61e8ff, 0x7d60a538, 0x7d5f6124, 0x7d5e1cc2, 0x7d5cd813, 0x7d5b9316,
-    0x7d5a4dcc, 0x7d590835,
-  0x7d57c251, 0x7d567c1f, 0x7d5535a0, 0x7d53eed3, 0x7d52a7ba, 0x7d516053,
-    0x7d50189e, 0x7d4ed09d,
-  0x7d4d884e, 0x7d4c3fb1, 0x7d4af6c8, 0x7d49ad91, 0x7d48640d, 0x7d471a3c,
-    0x7d45d01d, 0x7d4485b1,
-  0x7d433af8, 0x7d41eff1, 0x7d40a49e, 0x7d3f58fd, 0x7d3e0d0e, 0x7d3cc0d3,
-    0x7d3b744a, 0x7d3a2774,
-  0x7d38da51, 0x7d378ce0, 0x7d363f23, 0x7d34f118, 0x7d33a2bf, 0x7d32541a,
-    0x7d310527, 0x7d2fb5e7,
-  0x7d2e665a, 0x7d2d1680, 0x7d2bc659, 0x7d2a75e4, 0x7d292522, 0x7d27d413,
-    0x7d2682b6, 0x7d25310d,
-  0x7d23df16, 0x7d228cd2, 0x7d213a41, 0x7d1fe762, 0x7d1e9437, 0x7d1d40be,
-    0x7d1becf8, 0x7d1a98e5,
-  0x7d194485, 0x7d17efd8, 0x7d169add, 0x7d154595, 0x7d13f001, 0x7d129a1f,
-    0x7d1143ef, 0x7d0fed73,
-  0x7d0e96aa, 0x7d0d3f93, 0x7d0be82f, 0x7d0a907e, 0x7d093880, 0x7d07e035,
-    0x7d06879d, 0x7d052eb8,
-  0x7d03d585, 0x7d027c05, 0x7d012239, 0x7cffc81f, 0x7cfe6db8, 0x7cfd1304,
-    0x7cfbb803, 0x7cfa5cb4,
-  0x7cf90119, 0x7cf7a531, 0x7cf648fb, 0x7cf4ec79, 0x7cf38fa9, 0x7cf2328c,
-    0x7cf0d522, 0x7cef776b,
-  0x7cee1967, 0x7cecbb16, 0x7ceb5c78, 0x7ce9fd8d, 0x7ce89e55, 0x7ce73ed0,
-    0x7ce5defd, 0x7ce47ede,
-  0x7ce31e72, 0x7ce1bdb8, 0x7ce05cb2, 0x7cdefb5e, 0x7cdd99be, 0x7cdc37d0,
-    0x7cdad596, 0x7cd9730e,
-  0x7cd8103a, 0x7cd6ad18, 0x7cd549aa, 0x7cd3e5ee, 0x7cd281e5, 0x7cd11d90,
-    0x7ccfb8ed, 0x7cce53fe,
-  0x7ccceec1, 0x7ccb8937, 0x7cca2361, 0x7cc8bd3d, 0x7cc756cd, 0x7cc5f010,
-    0x7cc48905, 0x7cc321ae,
-  0x7cc1ba09, 0x7cc05218, 0x7cbee9da, 0x7cbd814f, 0x7cbc1877, 0x7cbaaf51,
-    0x7cb945df, 0x7cb7dc20,
-  0x7cb67215, 0x7cb507bc, 0x7cb39d16, 0x7cb23223, 0x7cb0c6e4, 0x7caf5b57,
-    0x7cadef7e, 0x7cac8358,
-  0x7cab16e4, 0x7ca9aa24, 0x7ca83d17, 0x7ca6cfbd, 0x7ca56216, 0x7ca3f423,
-    0x7ca285e2, 0x7ca11755,
-  0x7c9fa87a, 0x7c9e3953, 0x7c9cc9df, 0x7c9b5a1e, 0x7c99ea10, 0x7c9879b6,
-    0x7c97090e, 0x7c95981a,
-  0x7c9426d8, 0x7c92b54a, 0x7c91436f, 0x7c8fd148, 0x7c8e5ed3, 0x7c8cec12,
-    0x7c8b7903, 0x7c8a05a8,
-  0x7c889200, 0x7c871e0c, 0x7c85a9ca, 0x7c84353c, 0x7c82c060, 0x7c814b39,
-    0x7c7fd5c4, 0x7c7e6002,
-  0x7c7ce9f4, 0x7c7b7399, 0x7c79fcf1, 0x7c7885fc, 0x7c770eba, 0x7c75972c,
-    0x7c741f51, 0x7c72a729,
-  0x7c712eb5, 0x7c6fb5f3, 0x7c6e3ce5, 0x7c6cc38a, 0x7c6b49e3, 0x7c69cfee,
-    0x7c6855ad, 0x7c66db1f,
-  0x7c656045, 0x7c63e51e, 0x7c6269aa, 0x7c60ede9, 0x7c5f71db, 0x7c5df581,
-    0x7c5c78da, 0x7c5afbe6,
-  0x7c597ea6, 0x7c580119, 0x7c56833f, 0x7c550519, 0x7c5386a6, 0x7c5207e6,
-    0x7c5088d9, 0x7c4f0980,
-  0x7c4d89da, 0x7c4c09e8, 0x7c4a89a8, 0x7c49091c, 0x7c478844, 0x7c46071f,
-    0x7c4485ad, 0x7c4303ee,
-  0x7c4181e3, 0x7c3fff8b, 0x7c3e7ce7, 0x7c3cf9f5, 0x7c3b76b8, 0x7c39f32d,
-    0x7c386f56, 0x7c36eb33,
-  0x7c3566c2, 0x7c33e205, 0x7c325cfc, 0x7c30d7a6, 0x7c2f5203, 0x7c2dcc14,
-    0x7c2c45d8, 0x7c2abf4f,
-  0x7c29387a, 0x7c27b158, 0x7c2629ea, 0x7c24a22f, 0x7c231a28, 0x7c2191d4,
-    0x7c200933, 0x7c1e8046,
-  0x7c1cf70c, 0x7c1b6d86, 0x7c19e3b3, 0x7c185994, 0x7c16cf28, 0x7c15446f,
-    0x7c13b96a, 0x7c122e19,
-  0x7c10a27b, 0x7c0f1690, 0x7c0d8a59, 0x7c0bfdd5, 0x7c0a7105, 0x7c08e3e8,
-    0x7c07567f, 0x7c05c8c9,
-  0x7c043ac7, 0x7c02ac78, 0x7c011ddd, 0x7bff8ef5, 0x7bfdffc1, 0x7bfc7041,
-    0x7bfae073, 0x7bf9505a,
-  0x7bf7bff4, 0x7bf62f41, 0x7bf49e42, 0x7bf30cf6, 0x7bf17b5e, 0x7befe97a,
-    0x7bee5749, 0x7becc4cc,
-  0x7beb3202, 0x7be99eec, 0x7be80b89, 0x7be677da, 0x7be4e3df, 0x7be34f97,
-    0x7be1bb02, 0x7be02621,
-  0x7bde90f4, 0x7bdcfb7b, 0x7bdb65b5, 0x7bd9cfa2, 0x7bd83944, 0x7bd6a298,
-    0x7bd50ba1, 0x7bd3745d,
-  0x7bd1dccc, 0x7bd044f0, 0x7bceacc7, 0x7bcd1451, 0x7bcb7b8f, 0x7bc9e281,
-    0x7bc84927, 0x7bc6af80,
-  0x7bc5158c, 0x7bc37b4d, 0x7bc1e0c1, 0x7bc045e9, 0x7bbeaac4, 0x7bbd0f53,
-    0x7bbb7396, 0x7bb9d78c,
-  0x7bb83b36, 0x7bb69e94, 0x7bb501a5, 0x7bb3646a, 0x7bb1c6e3, 0x7bb02910,
-    0x7bae8af0, 0x7bacec84,
-  0x7bab4dcc, 0x7ba9aec7, 0x7ba80f76, 0x7ba66fd9, 0x7ba4cfef, 0x7ba32fba,
-    0x7ba18f38, 0x7b9fee69,
-  0x7b9e4d4f, 0x7b9cabe8, 0x7b9b0a35, 0x7b996836, 0x7b97c5ea, 0x7b962352,
-    0x7b94806e, 0x7b92dd3e,
-  0x7b9139c2, 0x7b8f95f9, 0x7b8df1e4, 0x7b8c4d83, 0x7b8aa8d6, 0x7b8903dc,
-    0x7b875e96, 0x7b85b904,
-  0x7b841326, 0x7b826cfc, 0x7b80c686, 0x7b7f1fc3, 0x7b7d78b4, 0x7b7bd159,
-    0x7b7a29b2, 0x7b7881be,
-  0x7b76d97f, 0x7b7530f3, 0x7b73881b, 0x7b71def7, 0x7b703587, 0x7b6e8bcb,
-    0x7b6ce1c2, 0x7b6b376e,
-  0x7b698ccd, 0x7b67e1e0, 0x7b6636a7, 0x7b648b22, 0x7b62df51, 0x7b613334,
-    0x7b5f86ca, 0x7b5dda15,
-  0x7b5c2d13, 0x7b5a7fc6, 0x7b58d22c, 0x7b572446, 0x7b557614, 0x7b53c796,
-    0x7b5218cc, 0x7b5069b6,
-  0x7b4eba53, 0x7b4d0aa5, 0x7b4b5aab, 0x7b49aa64, 0x7b47f9d2, 0x7b4648f3,
-    0x7b4497c9, 0x7b42e652,
-  0x7b413490, 0x7b3f8281, 0x7b3dd026, 0x7b3c1d80, 0x7b3a6a8d, 0x7b38b74e,
-    0x7b3703c3, 0x7b354fed,
-  0x7b339bca, 0x7b31e75b, 0x7b3032a0, 0x7b2e7d9a, 0x7b2cc847, 0x7b2b12a8,
-    0x7b295cbe, 0x7b27a687,
-  0x7b25f004, 0x7b243936, 0x7b22821b, 0x7b20cab5, 0x7b1f1302, 0x7b1d5b04,
-    0x7b1ba2b9, 0x7b19ea23,
-  0x7b183141, 0x7b167813, 0x7b14be99, 0x7b1304d3, 0x7b114ac1, 0x7b0f9063,
-    0x7b0dd5b9, 0x7b0c1ac4,
-  0x7b0a5f82, 0x7b08a3f5, 0x7b06e81b, 0x7b052bf6, 0x7b036f85, 0x7b01b2c8,
-    0x7afff5bf, 0x7afe386a,
-  0x7afc7aca, 0x7afabcdd, 0x7af8fea5, 0x7af74021, 0x7af58151, 0x7af3c235,
-    0x7af202cd, 0x7af0431a,
-  0x7aee831a, 0x7aecc2cf, 0x7aeb0238, 0x7ae94155, 0x7ae78026, 0x7ae5beac,
-    0x7ae3fce6, 0x7ae23ad4,
-  0x7ae07876, 0x7adeb5cc, 0x7adcf2d6, 0x7adb2f95, 0x7ad96c08, 0x7ad7a82f,
-    0x7ad5e40a, 0x7ad41f9a,
-  0x7ad25ade, 0x7ad095d6, 0x7aced082, 0x7acd0ae3, 0x7acb44f8, 0x7ac97ec1,
-    0x7ac7b83e, 0x7ac5f170,
-  0x7ac42a55, 0x7ac262ef, 0x7ac09b3e, 0x7abed341, 0x7abd0af7, 0x7abb4263,
-    0x7ab97982, 0x7ab7b056,
-  0x7ab5e6de, 0x7ab41d1b, 0x7ab2530b, 0x7ab088b0, 0x7aaebe0a, 0x7aacf318,
-    0x7aab27da, 0x7aa95c50,
-  0x7aa7907b, 0x7aa5c45a, 0x7aa3f7ed, 0x7aa22b35, 0x7aa05e31, 0x7a9e90e1,
-    0x7a9cc346, 0x7a9af55f,
-  0x7a99272d, 0x7a9758af, 0x7a9589e5, 0x7a93bad0, 0x7a91eb6f, 0x7a901bc2,
-    0x7a8e4bca, 0x7a8c7b87,
-  0x7a8aaaf7, 0x7a88da1c, 0x7a8708f6, 0x7a853784, 0x7a8365c6, 0x7a8193bd,
-    0x7a7fc168, 0x7a7deec8,
-  0x7a7c1bdc, 0x7a7a48a4, 0x7a787521, 0x7a76a153, 0x7a74cd38, 0x7a72f8d3,
-    0x7a712422, 0x7a6f4f25,
-  0x7a6d79dd, 0x7a6ba449, 0x7a69ce6a, 0x7a67f83f, 0x7a6621c9, 0x7a644b07,
-    0x7a6273fa, 0x7a609ca1,
-  0x7a5ec4fc, 0x7a5ced0d, 0x7a5b14d1, 0x7a593c4b, 0x7a576379, 0x7a558a5b,
-    0x7a53b0f2, 0x7a51d73d,
-  0x7a4ffd3d, 0x7a4e22f2, 0x7a4c485b, 0x7a4a6d78, 0x7a48924b, 0x7a46b6d1,
-    0x7a44db0d, 0x7a42fefd,
-  0x7a4122a1, 0x7a3f45fa, 0x7a3d6908, 0x7a3b8bca, 0x7a39ae41, 0x7a37d06d,
-    0x7a35f24d, 0x7a3413e2,
-  0x7a32352b, 0x7a305629, 0x7a2e76dc, 0x7a2c9743, 0x7a2ab75f, 0x7a28d72f,
-    0x7a26f6b4, 0x7a2515ee,
-  0x7a2334dd, 0x7a215380, 0x7a1f71d7, 0x7a1d8fe4, 0x7a1bada5, 0x7a19cb1b,
-    0x7a17e845, 0x7a160524,
-  0x7a1421b8, 0x7a123e01, 0x7a1059fe, 0x7a0e75b0, 0x7a0c9117, 0x7a0aac32,
-    0x7a08c702, 0x7a06e187,
-  0x7a04fbc1, 0x7a0315af, 0x7a012f52, 0x79ff48aa, 0x79fd61b6, 0x79fb7a77,
-    0x79f992ed, 0x79f7ab18,
-  0x79f5c2f8, 0x79f3da8c, 0x79f1f1d5, 0x79f008d3, 0x79ee1f86, 0x79ec35ed,
-    0x79ea4c09, 0x79e861da,
-  0x79e67760, 0x79e48c9b, 0x79e2a18a, 0x79e0b62e, 0x79deca87, 0x79dcde95,
-    0x79daf258, 0x79d905d0,
-  0x79d718fc, 0x79d52bdd, 0x79d33e73, 0x79d150be, 0x79cf62be, 0x79cd7473,
-    0x79cb85dc, 0x79c996fb,
-  0x79c7a7ce, 0x79c5b856, 0x79c3c893, 0x79c1d885, 0x79bfe82c, 0x79bdf788,
-    0x79bc0698, 0x79ba155e,
-  0x79b823d8, 0x79b63207, 0x79b43fec, 0x79b24d85, 0x79b05ad3, 0x79ae67d6,
-    0x79ac748e, 0x79aa80fb,
-  0x79a88d1d, 0x79a698f4, 0x79a4a480, 0x79a2afc1, 0x79a0bab6, 0x799ec561,
-    0x799ccfc1, 0x799ad9d5,
-  0x7998e39f, 0x7996ed1e, 0x7994f651, 0x7992ff3a, 0x799107d8, 0x798f102a,
-    0x798d1832, 0x798b1fef,
-  0x79892761, 0x79872e87, 0x79853563, 0x79833bf4, 0x7981423a, 0x797f4835,
-    0x797d4de5, 0x797b534a,
-  0x79795864, 0x79775d33, 0x797561b8, 0x797365f1, 0x797169df, 0x796f6d83,
-    0x796d70dc, 0x796b73e9,
-  0x796976ac, 0x79677924, 0x79657b51, 0x79637d33, 0x79617eca, 0x795f8017,
-    0x795d8118, 0x795b81cf,
-  0x7959823b, 0x7957825c, 0x79558232, 0x795381bd, 0x795180fe, 0x794f7ff3,
-    0x794d7e9e, 0x794b7cfe,
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-    0x7820dcc5, 0x781eb142,
-  0x781c8575, 0x781a595d, 0x78182cfc, 0x78160051, 0x7813d35b, 0x7811a61b,
-    0x780f7892, 0x780d4abe,
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-    0x77a59aec, 0x77a35f3c,
-  0x77a12342, 0x779ee6fe, 0x779caa70, 0x779a6d99, 0x77983077, 0x7795f30c,
-    0x7793b557, 0x77917759,
-  0x778f3910, 0x778cfa7e, 0x778abba2, 0x77887c7d, 0x77863d0d, 0x7783fd54,
-    0x7781bd52, 0x777f7d05,
-  0x777d3c6f, 0x777afb8f, 0x7778ba65, 0x777678f2, 0x77743735, 0x7771f52e,
-    0x776fb2de, 0x776d7044,
-  0x776b2d60, 0x7768ea33, 0x7766a6bc, 0x776462fb, 0x77621ef1, 0x775fda9d,
-    0x775d95ff, 0x775b5118,
-  0x77590be7, 0x7756c66c, 0x775480a8, 0x77523a9b, 0x774ff443, 0x774dada2,
-    0x774b66b8, 0x77491f84,
-  0x7746d806, 0x7744903f, 0x7742482e, 0x773fffd4, 0x773db730, 0x773b6e42,
-    0x7739250b, 0x7736db8b,
-  0x773491c0, 0x773247ad, 0x772ffd50, 0x772db2a9, 0x772b67b9, 0x77291c7f,
-    0x7726d0fc, 0x7724852f,
-  0x77223919, 0x771fecb9, 0x771da010, 0x771b531d, 0x771905e1, 0x7716b85b,
-    0x77146a8c, 0x77121c74,
-  0x770fce12, 0x770d7f66, 0x770b3072, 0x7708e133, 0x770691ab, 0x770441da,
-    0x7701f1c0, 0x76ffa15c,
-  0x76fd50ae, 0x76faffb8, 0x76f8ae78, 0x76f65cee, 0x76f40b1b, 0x76f1b8ff,
-    0x76ef6699, 0x76ed13ea,
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-    0x76dcc91b, 0x76da7421,
-  0x76d81ede, 0x76d5c952, 0x76d3737c, 0x76d11d5d, 0x76cec6f5, 0x76cc7043,
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-    0x76b75724, 0x76b4fd96,
-  0x76b2a3bf, 0x76b0499e, 0x76adef34, 0x76ab9481, 0x76a93985, 0x76a6de40,
-    0x76a482b1, 0x76a226da,
-  0x769fcab9, 0x769d6e4f, 0x769b119b, 0x7698b49f, 0x76965759, 0x7693f9ca,
-    0x76919bf3, 0x768f3dd2,
-  0x768cdf67, 0x768a80b4, 0x768821b8, 0x7685c272, 0x768362e4, 0x7681030c,
-    0x767ea2eb, 0x767c4281,
-  0x7679e1ce, 0x767780d2, 0x76751f8d, 0x7672bdfe, 0x76705c27, 0x766dfa07,
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-  0x7666d1ef, 0x76646eab, 0x76620b1d, 0x765fa747, 0x765d4327, 0x765adebe,
-    0x76587a0d, 0x76561512,
-  0x7653afce, 0x76514a42, 0x764ee46c, 0x764c7e4d, 0x764a17e6, 0x7647b135,
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-  0x76407b6e, 0x763e139a, 0x763bab7c, 0x76394316, 0x7636da67, 0x7634716f,
-    0x7632082e, 0x762f9ea4,
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-  0x7619dbfb, 0x76176f98, 0x761502ed, 0x761295f9, 0x761028bb, 0x760dbb35,
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-  0x757c869f, 0x757a0812, 0x7577893d, 0x75750a1f, 0x75728ab9, 0x75700b0a,
-    0x756d8b13, 0x756b0ad3,
-  0x75688a4b, 0x7566097b, 0x75638862, 0x75610701, 0x755e8557, 0x755c0365,
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-  0x75405b57, 0x753dd600, 0x753b5061, 0x7538ca7b, 0x7536444b, 0x7533bdd4,
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-  0x752c28bb, 0x7529a122, 0x75271941, 0x75249118, 0x752208a7, 0x751f7fed,
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-  0x73b493ec, 0x73b1e3ec, 0x73af33a5, 0x73ac8316, 0x73a9d240, 0x73a72123,
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-  0x7389727f, 0x7386be0a, 0x7384094e, 0x7381544a, 0x737e9f00, 0x737be96e,
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-  0x7373c70d, 0x7371105e, 0x736e5968, 0x736ba22b, 0x7368eaa6, 0x736632db,
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-  0x731c675b, 0x7319a7c9, 0x7316e7f0, 0x731427cf, 0x73116768, 0x730ea6ba,
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-  0x73066306, 0x7303a13b, 0x7300df2a, 0x72fe1cd2, 0x72fb5a34, 0x72f8974e,
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-  0x72da2526, 0x72d75eee, 0x72d4986f, 0x72d1d1a9, 0x72cf0a9c, 0x72cc4348,
-    0x72c97bad, 0x72c6b3cc,
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-    0x72b334e4, 0x72b06acd,
-  0x72ada06f, 0x72aad5c9, 0x72a80ade, 0x72a53fab, 0x72a27432, 0x729fa872,
-    0x729cdc6b, 0x729a101e,
-  0x7297438a, 0x729476af, 0x7291a98e, 0x728edc26, 0x728c0e77, 0x72894082,
-    0x72867245, 0x7283a3c3,
-  0x7280d4f9, 0x727e05e9, 0x727b3693, 0x727866f6, 0x72759712, 0x7272c6e7,
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-  0x726a54c1, 0x7267837c, 0x7264b1f0, 0x7261e01e, 0x725f0e06, 0x725c3ba7,
-    0x72596901, 0x72569615,
-  0x7253c2e3, 0x7250ef6a, 0x724e1baa, 0x724b47a4, 0x72487357, 0x72459ec4,
-    0x7242c9ea, 0x723ff4ca,
-  0x723d1f63, 0x723a49b6, 0x723773c3, 0x72349d89, 0x7231c708, 0x722ef041,
-    0x722c1934, 0x722941e0,
-  0x72266a46, 0x72239266, 0x7220ba3f, 0x721de1d1, 0x721b091d, 0x72183023,
-    0x721556e3, 0x72127d5c,
-  0x720fa38e, 0x720cc97b, 0x7209ef21, 0x72071480, 0x7204399a, 0x72015e6d,
-    0x71fe82f9, 0x71fba740,
-  0x71f8cb40, 0x71f5eefa, 0x71f3126d, 0x71f0359a, 0x71ed5881, 0x71ea7b22,
-    0x71e79d7c, 0x71e4bf90,
-  0x71e1e15e, 0x71df02e5, 0x71dc2427, 0x71d94522, 0x71d665d6, 0x71d38645,
-    0x71d0a66d, 0x71cdc650,
-  0x71cae5ec, 0x71c80542, 0x71c52451, 0x71c2431b, 0x71bf619e, 0x71bc7fdb,
-    0x71b99dd2, 0x71b6bb83,
-  0x71b3d8ed, 0x71b0f612, 0x71ae12f0, 0x71ab2f89, 0x71a84bdb, 0x71a567e7,
-    0x71a283ad, 0x719f9f2c,
-  0x719cba66, 0x7199d55a, 0x7196f008, 0x71940a6f, 0x71912490, 0x718e3e6c,
-    0x718b5801, 0x71887151,
-  0x71858a5a, 0x7182a31d, 0x717fbb9a, 0x717cd3d2, 0x7179ebc3, 0x7177036e,
-    0x71741ad3, 0x717131f3,
-  0x716e48cc, 0x716b5f5f, 0x716875ad, 0x71658bb4, 0x7162a175, 0x715fb6f1,
-    0x715ccc26, 0x7159e116,
-  0x7156f5c0, 0x71540a24, 0x71511e42, 0x714e321a, 0x714b45ac, 0x714858f8,
-    0x71456bfe, 0x71427ebf,
-  0x713f9139, 0x713ca36e, 0x7139b55d, 0x7136c706, 0x7133d869, 0x7130e987,
-    0x712dfa5e, 0x712b0af0,
-  0x71281b3c, 0x71252b42, 0x71223b02, 0x711f4a7d, 0x711c59b2, 0x711968a1,
-    0x7116774a, 0x711385ad,
-  0x711093cb, 0x710da1a3, 0x710aaf35, 0x7107bc82, 0x7104c989, 0x7101d64a,
-    0x70fee2c5, 0x70fbeefb,
-  0x70f8faeb, 0x70f60695, 0x70f311fa, 0x70f01d19, 0x70ed27f2, 0x70ea3286,
-    0x70e73cd4, 0x70e446dc,
-  0x70e1509f, 0x70de5a1c, 0x70db6353, 0x70d86c45, 0x70d574f1, 0x70d27d58,
-    0x70cf8579, 0x70cc8d54,
-  0x70c994ea, 0x70c69c3a, 0x70c3a345, 0x70c0aa0a, 0x70bdb08a, 0x70bab6c4,
-    0x70b7bcb8, 0x70b4c267,
-  0x70b1c7d1, 0x70aeccf5, 0x70abd1d3, 0x70a8d66c, 0x70a5dac0, 0x70a2dece,
-    0x709fe296, 0x709ce619,
-  0x7099e957, 0x7096ec4f, 0x7093ef01, 0x7090f16e, 0x708df396, 0x708af579,
-    0x7087f715, 0x7084f86d,
-  0x7081f97f, 0x707efa4c, 0x707bfad3, 0x7078fb15, 0x7075fb11, 0x7072fac9,
-    0x706ffa3a, 0x706cf967,
-  0x7069f84e, 0x7066f6f0, 0x7063f54c, 0x7060f363, 0x705df135, 0x705aeec1,
-    0x7057ec08, 0x7054e90a,
-  0x7051e5c7, 0x704ee23e, 0x704bde70, 0x7048da5d, 0x7045d604, 0x7042d166,
-    0x703fcc83, 0x703cc75b,
-  0x7039c1ed, 0x7036bc3b, 0x7033b643, 0x7030b005, 0x702da983, 0x702aa2bb,
-    0x70279baf, 0x7024945d,
-  0x70218cc6, 0x701e84e9, 0x701b7cc8, 0x70187461, 0x70156bb5, 0x701262c4,
-    0x700f598e, 0x700c5013,
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-    0x6ee70058, 0x6ee3dd13,
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-    0x6eb4ac02, 0x6eb18477,
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-  0x6e48d633, 0x6e45a59c, 0x6e4274c1, 0x6e3f43a1, 0x6e3c123e, 0x6e38e096,
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-    0x6e1c15c0, 0x6e18e171,
-  0x6e15acde, 0x6e127807, 0x6e0f42ec, 0x6e0c0d8e, 0x6e08d7eb, 0x6e05a205,
-    0x6e026bda, 0x6dff356c,
-  0x6dfbfeba, 0x6df8c7c4, 0x6df5908b, 0x6df2590d, 0x6def214c, 0x6debe947,
-    0x6de8b0fe, 0x6de57871,
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-    0x6dcee52e, 0x6dcbaa83,
-  0x6dc86f95, 0x6dc53462, 0x6dc1f8ec, 0x6dbebd33, 0x6dbb8135, 0x6db844f4,
-    0x6db5086f, 0x6db1cba7,
-  0x6dae8e9b, 0x6dab514b, 0x6da813b8, 0x6da4d5e1, 0x6da197c6, 0x6d9e5968,
-    0x6d9b1ac6, 0x6d97dbe0,
-  0x6d949cb7, 0x6d915d4a, 0x6d8e1d9a, 0x6d8adda6, 0x6d879d6e, 0x6d845cf3,
-    0x6d811c35, 0x6d7ddb33,
-  0x6d7a99ed, 0x6d775864, 0x6d741697, 0x6d70d487, 0x6d6d9233, 0x6d6a4f9c,
-    0x6d670cc1, 0x6d63c9a3,
-  0x6d608641, 0x6d5d429c, 0x6d59feb3, 0x6d56ba87, 0x6d537617, 0x6d503164,
-    0x6d4cec6e, 0x6d49a734,
-  0x6d4661b7, 0x6d431bf6, 0x6d3fd5f2, 0x6d3c8fab, 0x6d394920, 0x6d360252,
-    0x6d32bb40, 0x6d2f73eb,
-  0x6d2c2c53, 0x6d28e477, 0x6d259c58, 0x6d2253f6, 0x6d1f0b50, 0x6d1bc267,
-    0x6d18793b, 0x6d152fcc,
-  0x6d11e619, 0x6d0e9c23, 0x6d0b51e9, 0x6d08076d, 0x6d04bcad, 0x6d0171aa,
-    0x6cfe2663, 0x6cfadada,
-  0x6cf78f0d, 0x6cf442fd, 0x6cf0f6aa, 0x6cedaa13, 0x6cea5d3a, 0x6ce7101d,
-    0x6ce3c2bd, 0x6ce0751a,
-  0x6cdd2733, 0x6cd9d90a, 0x6cd68a9d, 0x6cd33bed, 0x6ccfecfa, 0x6ccc9dc4,
-    0x6cc94e4b, 0x6cc5fe8f,
-  0x6cc2ae90, 0x6cbf5e4d, 0x6cbc0dc8, 0x6cb8bcff, 0x6cb56bf4, 0x6cb21aa5,
-    0x6caec913, 0x6cab773e,
-  0x6ca82527, 0x6ca4d2cc, 0x6ca1802e, 0x6c9e2d4d, 0x6c9ada29, 0x6c9786c2,
-    0x6c943318, 0x6c90df2c,
-  0x6c8d8afc, 0x6c8a3689, 0x6c86e1d3, 0x6c838cdb, 0x6c80379f, 0x6c7ce220,
-    0x6c798c5f, 0x6c76365b,
-  0x6c72e013, 0x6c6f8989, 0x6c6c32bc, 0x6c68dbac, 0x6c658459, 0x6c622cc4,
-    0x6c5ed4eb, 0x6c5b7cd0,
-  0x6c582472, 0x6c54cbd1, 0x6c5172ed, 0x6c4e19c6, 0x6c4ac05d, 0x6c4766b0,
-    0x6c440cc1, 0x6c40b28f,
-  0x6c3d581b, 0x6c39fd63, 0x6c36a269, 0x6c33472c, 0x6c2febad, 0x6c2c8fea,
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-  0x6c227b13, 0x6c1f1e45, 0x6c1bc136, 0x6c1863e3, 0x6c15064e, 0x6c11a876,
-    0x6c0e4a5b, 0x6c0aebfe,
-  0x6c078d5e, 0x6c042e7b, 0x6c00cf56, 0x6bfd6fee, 0x6bfa1044, 0x6bf6b056,
-    0x6bf35027, 0x6befefb5,
-  0x6bec8f00, 0x6be92e08, 0x6be5ccce, 0x6be26b52, 0x6bdf0993, 0x6bdba791,
-    0x6bd8454d, 0x6bd4e2c6,
-  0x6bd17ffd, 0x6bce1cf1, 0x6bcab9a3, 0x6bc75613, 0x6bc3f23f, 0x6bc08e2a,
-    0x6bbd29d2, 0x6bb9c537,
-  0x6bb6605a, 0x6bb2fb3b, 0x6baf95d9, 0x6bac3034, 0x6ba8ca4e, 0x6ba56425,
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-  0x6b9b301b, 0x6b97c8e8, 0x6b946173, 0x6b90f9bc, 0x6b8d91c2, 0x6b8a2986,
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-  0x6b7fef43, 0x6b7c85fe, 0x6b791c76, 0x6b75b2ac, 0x6b7248a0, 0x6b6ede51,
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-  0x6b649dd8, 0x6b613280, 0x6b5dc6e6, 0x6b5a5b0a, 0x6b56eeec, 0x6b53828b,
-    0x6b5015e9, 0x6b4ca904,
-  0x6b493bdd, 0x6b45ce73, 0x6b4260c8, 0x6b3ef2da, 0x6b3b84ab, 0x6b381639,
-    0x6b34a785, 0x6b31388e,
-  0x6b2dc956, 0x6b2a59dc, 0x6b26ea1f, 0x6b237a21, 0x6b2009e0, 0x6b1c995d,
-    0x6b192898, 0x6b15b791,
-  0x6b124648, 0x6b0ed4bd, 0x6b0b62f0, 0x6b07f0e1, 0x6b047e90, 0x6b010bfd,
-    0x6afd9928, 0x6afa2610,
-  0x6af6b2b7, 0x6af33f1c, 0x6aefcb3f, 0x6aec5720, 0x6ae8e2bf, 0x6ae56e1c,
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-  0x6adb0ea8, 0x6ad798fd, 0x6ad42311, 0x6ad0ace2, 0x6acd3672, 0x6ac9bfc0,
-    0x6ac648cb, 0x6ac2d195,
-  0x6abf5a1e, 0x6abbe264, 0x6ab86a68, 0x6ab4f22b, 0x6ab179ac, 0x6aae00eb,
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-  0x6aa3951d, 0x6aa01b55, 0x6a9ca14b, 0x6a992700, 0x6a95ac72, 0x6a9231a3,
-    0x6a8eb692, 0x6a8b3b3f,
-  0x6a87bfab, 0x6a8443d5, 0x6a80c7bd, 0x6a7d4b64, 0x6a79cec8, 0x6a7651ec,
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-  0x6a6bd9cb, 0x6a685be8, 0x6a64ddc2, 0x6a615f5c, 0x6a5de0b3, 0x6a5a61c9,
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-  0x6a33dcd4, 0x6a305ad7, 0x6a2cd899, 0x6a295619, 0x6a25d358, 0x6a225055,
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-  0x6a17c5c5, 0x6a1441bc, 0x6a10bd72, 0x6a0d38e7, 0x6a09b41a, 0x6a062f0c,
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-  0x684daf61, 0x684a0ae6, 0x6846662c, 0x6842c131, 0x683f1bf5, 0x683b7679,
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-    0x67a51dd0, 0x67a16dcf,
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-    0x678796ce, 0x6783e4cf,
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-    0x674c58ea, 0x6748a2ee,
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-    0x672ea210, 0x672aea17,
-  0x672731dd, 0x67237964, 0x671fc0ac, 0x671c07b4, 0x67184e7c, 0x67149504,
-    0x6710db4d, 0x670d2157,
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-    0x66f304a6, 0x66ef48b3,
-  0x66eb8c80, 0x66e7d00f, 0x66e4135d, 0x66e0566c, 0x66dc993c, 0x66d8dbcd,
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-    0x66b727ba, 0x66b367d0,
-  0x66afa7a7, 0x66abe73f, 0x66a82697, 0x66a465b0, 0x66a0a489, 0x669ce324,
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-    0x665ce596, 0x66591fbf,
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-    0x663eaff2, 0x663ae822,
-  0x66372012, 0x663357c4, 0x662f8f36, 0x662bc66a, 0x6627fd5e, 0x66243413,
-    0x66206a8a, 0x661ca0c1,
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-    0x6588239f, 0x65845006,
-  0x65807c2f, 0x657ca818, 0x6578d3c4, 0x6574ff30, 0x65712a5e, 0x656d554d,
-    0x65697ffe, 0x6565aa71,
-  0x6561d4a4, 0x655dfe99, 0x655a2850, 0x655651c8, 0x65527b02, 0x654ea3fd,
-    0x654accba, 0x6546f538,
-  0x65431d77, 0x653f4579, 0x653b6d3b, 0x653794c0, 0x6533bc06, 0x652fe30d,
-    0x652c09d6, 0x65283061,
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-    0x650d3759, 0x65095bf0,
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-    0x64ee5546, 0x64ea77eb,
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-    0x64b06273, 0x64ac8135,
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-    0x649151bc, 0x648d6e8e,
-  0x64898b22, 0x6485a778, 0x6481c390, 0x647ddf6a, 0x6479fb06, 0x64761664,
-    0x64723184, 0x646e4c66,
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-    0x645301cd, 0x644f1ac0,
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-    0x6433c29f, 0x642fd9a3,
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-    0x641473fc, 0x64108912,
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-    0x63f515eb, 0x63f12913,
-  0x63ed3bfd, 0x63e94eaa, 0x63e5611a, 0x63e1734b, 0x63dd853f, 0x63d996f6,
-    0x63d5a86f, 0x63d1b9aa,
-  0x63cdcaa8, 0x63c9db68, 0x63c5ebeb, 0x63c1fc30, 0x63be0c37, 0x63ba1c01,
-    0x63b62b8e, 0x63b23add,
-  0x63ae49ee, 0x63aa58c2, 0x63a66759, 0x63a275b2, 0x639e83cd, 0x639a91ac,
-    0x63969f4c, 0x6392acaf,
-  0x638eb9d5, 0x638ac6be, 0x6386d369, 0x6382dfd6, 0x637eec07, 0x637af7fa,
-    0x637703af, 0x63730f27,
-  0x636f1a62, 0x636b2560, 0x63673020, 0x63633aa3, 0x635f44e8, 0x635b4ef0,
-    0x635758bb, 0x63536249,
-  0x634f6b99, 0x634b74ad, 0x63477d82, 0x6343861b, 0x633f8e76, 0x633b9695,
-    0x63379e76, 0x6333a619,
-  0x632fad80, 0x632bb4a9, 0x6327bb96, 0x6323c245, 0x631fc8b7, 0x631bceeb,
-    0x6317d4e3, 0x6313da9e,
-  0x630fe01b, 0x630be55b, 0x6307ea5e, 0x6303ef25, 0x62fff3ae, 0x62fbf7fa,
-    0x62f7fc08, 0x62f3ffda,
-  0x62f0036f, 0x62ec06c7, 0x62e809e2, 0x62e40cbf, 0x62e00f60, 0x62dc11c4,
-    0x62d813eb, 0x62d415d4,
-  0x62d01781, 0x62cc18f1, 0x62c81a24, 0x62c41b1a, 0x62c01bd3, 0x62bc1c4f,
-    0x62b81c8f, 0x62b41c91,
-  0x62b01c57, 0x62ac1bdf, 0x62a81b2b, 0x62a41a3a, 0x62a0190c, 0x629c17a1,
-    0x629815fa, 0x62941415,
-  0x629011f4, 0x628c0f96, 0x62880cfb, 0x62840a23, 0x6280070f, 0x627c03be,
-    0x62780030, 0x6273fc65,
-  0x626ff85e, 0x626bf41a, 0x6267ef99, 0x6263eadc, 0x625fe5e1, 0x625be0ab,
-    0x6257db37, 0x6253d587,
-  0x624fcf9a, 0x624bc970, 0x6247c30a, 0x6243bc68, 0x623fb588, 0x623bae6c,
-    0x6237a714, 0x62339f7e,
-  0x622f97ad, 0x622b8f9e, 0x62278754, 0x62237ecc, 0x621f7608, 0x621b6d08,
-    0x621763cb, 0x62135a51,
-  0x620f509b, 0x620b46a9, 0x62073c7a, 0x6203320e, 0x61ff2766, 0x61fb1c82,
-    0x61f71161, 0x61f30604,
-  0x61eefa6b, 0x61eaee95, 0x61e6e282, 0x61e2d633, 0x61dec9a8, 0x61dabce0,
-    0x61d6afdd, 0x61d2a29c,
-  0x61ce9520, 0x61ca8767, 0x61c67971, 0x61c26b40, 0x61be5cd2, 0x61ba4e28,
-    0x61b63f41, 0x61b2301e,
-  0x61ae20bf, 0x61aa1124, 0x61a6014d, 0x61a1f139, 0x619de0e9, 0x6199d05d,
-    0x6195bf94, 0x6191ae90,
-  0x618d9d4f, 0x61898bd2, 0x61857a19, 0x61816824, 0x617d55f2, 0x61794385,
-    0x617530db, 0x61711df5,
-  0x616d0ad3, 0x6168f775, 0x6164e3db, 0x6160d005, 0x615cbbf3, 0x6158a7a4,
-    0x6154931a, 0x61507e54,
-  0x614c6951, 0x61485413, 0x61443e98, 0x614028e2, 0x613c12f0, 0x6137fcc1,
-    0x6133e657, 0x612fcfb0,
-  0x612bb8ce, 0x6127a1b0, 0x61238a56, 0x611f72c0, 0x611b5aee, 0x611742e0,
-    0x61132a96, 0x610f1210,
-  0x610af94f, 0x6106e051, 0x6102c718, 0x60feada3, 0x60fa93f2, 0x60f67a05,
-    0x60f25fdd, 0x60ee4579,
-  0x60ea2ad8, 0x60e60ffd, 0x60e1f4e5, 0x60ddd991, 0x60d9be02, 0x60d5a237,
-    0x60d18631, 0x60cd69ee,
-  0x60c94d70, 0x60c530b6, 0x60c113c1, 0x60bcf690, 0x60b8d923, 0x60b4bb7a,
-    0x60b09d96, 0x60ac7f76,
-  0x60a8611b, 0x60a44284, 0x60a023b1, 0x609c04a3, 0x6097e559, 0x6093c5d3,
-    0x608fa612, 0x608b8616,
-  0x608765dd, 0x6083456a, 0x607f24ba, 0x607b03d0, 0x6076e2a9, 0x6072c148,
-    0x606e9faa, 0x606a7dd2,
-  0x60665bbd, 0x6062396e, 0x605e16e2, 0x6059f41c, 0x6055d11a, 0x6051addc,
-    0x604d8a63, 0x604966af,
-  0x604542bf, 0x60411e94, 0x603cfa2e, 0x6038d58c, 0x6034b0af, 0x60308b97,
-    0x602c6643, 0x602840b4,
-  0x60241ae9, 0x601ff4e3, 0x601bcea2, 0x6017a826, 0x6013816e, 0x600f5a7b,
-    0x600b334d, 0x60070be4,
-  0x6002e43f, 0x5ffebc5f, 0x5ffa9444, 0x5ff66bee, 0x5ff2435d, 0x5fee1a90,
-    0x5fe9f188, 0x5fe5c845,
-  0x5fe19ec7, 0x5fdd750e, 0x5fd94b19, 0x5fd520ea, 0x5fd0f67f, 0x5fcccbd9,
-    0x5fc8a0f8, 0x5fc475dc,
-  0x5fc04a85, 0x5fbc1ef3, 0x5fb7f326, 0x5fb3c71e, 0x5faf9adb, 0x5fab6e5d,
-    0x5fa741a3, 0x5fa314af,
-  0x5f9ee780, 0x5f9aba16, 0x5f968c70, 0x5f925e90, 0x5f8e3075, 0x5f8a021f,
-    0x5f85d38e, 0x5f81a4c2,
-  0x5f7d75bb, 0x5f794679, 0x5f7516fd, 0x5f70e745, 0x5f6cb753, 0x5f688726,
-    0x5f6456be, 0x5f60261b,
-  0x5f5bf53d, 0x5f57c424, 0x5f5392d1, 0x5f4f6143, 0x5f4b2f7a, 0x5f46fd76,
-    0x5f42cb37, 0x5f3e98be,
-  0x5f3a660a, 0x5f36331b, 0x5f31fff1, 0x5f2dcc8d, 0x5f2998ee, 0x5f256515,
-    0x5f213100, 0x5f1cfcb1,
-  0x5f18c827, 0x5f149363, 0x5f105e64, 0x5f0c292a, 0x5f07f3b6, 0x5f03be07,
-    0x5eff881d, 0x5efb51f9,
-  0x5ef71b9b, 0x5ef2e501, 0x5eeeae2d, 0x5eea771f, 0x5ee63fd6, 0x5ee20853,
-    0x5eddd094, 0x5ed9989c,
-  0x5ed56069, 0x5ed127fb, 0x5eccef53, 0x5ec8b671, 0x5ec47d54, 0x5ec043fc,
-    0x5ebc0a6a, 0x5eb7d09e,
-  0x5eb39697, 0x5eaf5c56, 0x5eab21da, 0x5ea6e724, 0x5ea2ac34, 0x5e9e7109,
-    0x5e9a35a4, 0x5e95fa05,
-  0x5e91be2b, 0x5e8d8217, 0x5e8945c8, 0x5e85093f, 0x5e80cc7c, 0x5e7c8f7f,
-    0x5e785247, 0x5e7414d5,
-  0x5e6fd729, 0x5e6b9943, 0x5e675b22, 0x5e631cc7, 0x5e5ede32, 0x5e5a9f62,
-    0x5e566059, 0x5e522115,
-  0x5e4de197, 0x5e49a1df, 0x5e4561ed, 0x5e4121c0, 0x5e3ce15a, 0x5e38a0b9,
-    0x5e345fde, 0x5e301ec9,
-  0x5e2bdd7a, 0x5e279bf1, 0x5e235a2e, 0x5e1f1830, 0x5e1ad5f9, 0x5e169388,
-    0x5e1250dc, 0x5e0e0df7,
-  0x5e09cad7, 0x5e05877e, 0x5e0143ea, 0x5dfd001d, 0x5df8bc15, 0x5df477d4,
-    0x5df03359, 0x5debeea3,
-  0x5de7a9b4, 0x5de3648b, 0x5ddf1f28, 0x5ddad98b, 0x5dd693b4, 0x5dd24da3,
-    0x5dce0759, 0x5dc9c0d4,
-  0x5dc57a16, 0x5dc1331d, 0x5dbcebeb, 0x5db8a480, 0x5db45cda, 0x5db014fa,
-    0x5dabcce1, 0x5da7848e,
-  0x5da33c01, 0x5d9ef33b, 0x5d9aaa3a, 0x5d966100, 0x5d92178d, 0x5d8dcddf,
-    0x5d8983f8, 0x5d8539d7,
-  0x5d80ef7c, 0x5d7ca4e8, 0x5d785a1a, 0x5d740f12, 0x5d6fc3d1, 0x5d6b7856,
-    0x5d672ca2, 0x5d62e0b4,
-  0x5d5e948c, 0x5d5a482a, 0x5d55fb90, 0x5d51aebb, 0x5d4d61ad, 0x5d491465,
-    0x5d44c6e4, 0x5d40792a,
-  0x5d3c2b35, 0x5d37dd08, 0x5d338ea0, 0x5d2f4000, 0x5d2af125, 0x5d26a212,
-    0x5d2252c5, 0x5d1e033e,
-  0x5d19b37e, 0x5d156385, 0x5d111352, 0x5d0cc2e5, 0x5d087240, 0x5d042161,
-    0x5cffd048, 0x5cfb7ef7,
-  0x5cf72d6b, 0x5cf2dba7, 0x5cee89a9, 0x5cea3772, 0x5ce5e501, 0x5ce19258,
-    0x5cdd3f75, 0x5cd8ec58,
-  0x5cd49903, 0x5cd04574, 0x5ccbf1ab, 0x5cc79daa, 0x5cc3496f, 0x5cbef4fc,
-    0x5cbaa04f, 0x5cb64b68,
-  0x5cb1f649, 0x5cada0f0, 0x5ca94b5e, 0x5ca4f594, 0x5ca09f8f, 0x5c9c4952,
-    0x5c97f2dc, 0x5c939c2c,
-  0x5c8f4544, 0x5c8aee22, 0x5c8696c7, 0x5c823f34, 0x5c7de767, 0x5c798f61,
-    0x5c753722, 0x5c70deaa,
-  0x5c6c85f9, 0x5c682d0f, 0x5c63d3eb, 0x5c5f7a8f, 0x5c5b20fa, 0x5c56c72c,
-    0x5c526d25, 0x5c4e12e5,
-  0x5c49b86d, 0x5c455dbb, 0x5c4102d0, 0x5c3ca7ad, 0x5c384c50, 0x5c33f0bb,
-    0x5c2f94ec, 0x5c2b38e5,
-  0x5c26dca5, 0x5c22802c, 0x5c1e237b, 0x5c19c690, 0x5c15696d, 0x5c110c11,
-    0x5c0cae7c, 0x5c0850ae,
-  0x5c03f2a8, 0x5bff9469, 0x5bfb35f1, 0x5bf6d740, 0x5bf27857, 0x5bee1935,
-    0x5be9b9da, 0x5be55a46,
-  0x5be0fa7a, 0x5bdc9a75, 0x5bd83a37, 0x5bd3d9c1, 0x5bcf7912, 0x5bcb182b,
-    0x5bc6b70b, 0x5bc255b2,
-  0x5bbdf421, 0x5bb99257, 0x5bb53054, 0x5bb0ce19, 0x5bac6ba6, 0x5ba808f9,
-    0x5ba3a615, 0x5b9f42f7,
-  0x5b9adfa2, 0x5b967c13, 0x5b92184d, 0x5b8db44d, 0x5b895016, 0x5b84eba6,
-    0x5b8086fd, 0x5b7c221c,
-  0x5b77bd02, 0x5b7357b0, 0x5b6ef226, 0x5b6a8c63, 0x5b662668, 0x5b61c035,
-    0x5b5d59c9, 0x5b58f324,
-  0x5b548c48, 0x5b502533, 0x5b4bbde6, 0x5b475660, 0x5b42eea2, 0x5b3e86ac,
-    0x5b3a1e7e, 0x5b35b617,
-  0x5b314d78, 0x5b2ce4a1, 0x5b287b91, 0x5b241249, 0x5b1fa8c9, 0x5b1b3f11,
-    0x5b16d521, 0x5b126af8,
-  0x5b0e0098, 0x5b0995ff, 0x5b052b2e, 0x5b00c025, 0x5afc54e3, 0x5af7e96a,
-    0x5af37db8, 0x5aef11cf,
-  0x5aeaa5ad, 0x5ae63953, 0x5ae1ccc1, 0x5add5ff7, 0x5ad8f2f5, 0x5ad485bb,
-    0x5ad01849, 0x5acbaa9f,
-  0x5ac73cbd, 0x5ac2cea3, 0x5abe6050, 0x5ab9f1c6, 0x5ab58304, 0x5ab1140a,
-    0x5aaca4d8, 0x5aa8356f,
-  0x5aa3c5cd, 0x5a9f55f3, 0x5a9ae5e2, 0x5a967598, 0x5a920517, 0x5a8d945d,
-    0x5a89236c, 0x5a84b243,
-  0x5a8040e3, 0x5a7bcf4a, 0x5a775d7a, 0x5a72eb71, 0x5a6e7931, 0x5a6a06ba,
-    0x5a65940a, 0x5a612123,
-  0x5a5cae04, 0x5a583aad, 0x5a53c71e, 0x5a4f5358, 0x5a4adf5a, 0x5a466b24,
-    0x5a41f6b7, 0x5a3d8212,
-  0x5a390d35, 0x5a349821, 0x5a3022d5, 0x5a2bad51, 0x5a273796, 0x5a22c1a3,
-    0x5a1e4b79, 0x5a19d517,
-  0x5a155e7d, 0x5a10e7ac, 0x5a0c70a3, 0x5a07f963, 0x5a0381eb, 0x59ff0a3c,
-    0x59fa9255, 0x59f61a36,
-  0x59f1a1e0, 0x59ed2953, 0x59e8b08e, 0x59e43792, 0x59dfbe5e, 0x59db44f3,
-    0x59d6cb50, 0x59d25176,
-  0x59cdd765, 0x59c95d1c, 0x59c4e29c, 0x59c067e4, 0x59bbecf5, 0x59b771cf,
-    0x59b2f671, 0x59ae7add,
-  0x59a9ff10, 0x59a5830d, 0x59a106d2, 0x599c8a60, 0x59980db6, 0x599390d5,
-    0x598f13bd, 0x598a966e,
-  0x598618e8, 0x59819b2a, 0x597d1d35, 0x59789f09, 0x597420a6, 0x596fa20b,
-    0x596b233a, 0x5966a431,
-  0x596224f1, 0x595da57a, 0x595925cc, 0x5954a5e6, 0x595025ca, 0x594ba576,
-    0x594724ec, 0x5942a42a,
-  0x593e2331, 0x5939a202, 0x5935209b, 0x59309efd, 0x592c1d28, 0x59279b1c,
-    0x592318d9, 0x591e9660,
-  0x591a13af, 0x591590c7, 0x59110da8, 0x590c8a53, 0x590806c6, 0x59038302,
-    0x58feff08, 0x58fa7ad7,
-  0x58f5f66e, 0x58f171cf, 0x58ececf9, 0x58e867ed, 0x58e3e2a9, 0x58df5d2e,
-    0x58dad77d, 0x58d65195,
-  0x58d1cb76, 0x58cd4520, 0x58c8be94, 0x58c437d1, 0x58bfb0d7, 0x58bb29a6,
-    0x58b6a23e, 0x58b21aa0,
-  0x58ad92cb, 0x58a90ac0, 0x58a4827d, 0x589ffa04, 0x589b7155, 0x5896e86f,
-    0x58925f52, 0x588dd5fe,
-  0x58894c74, 0x5884c2b3, 0x588038bb, 0x587bae8d, 0x58772429, 0x5872998e,
-    0x586e0ebc, 0x586983b4,
-  0x5864f875, 0x58606d00, 0x585be154, 0x58575571, 0x5852c958, 0x584e3d09,
-    0x5849b083, 0x584523c7,
-  0x584096d4, 0x583c09ab, 0x58377c4c, 0x5832eeb6, 0x582e60e9, 0x5829d2e6,
-    0x582544ad, 0x5820b63e,
-  0x581c2798, 0x581798bb, 0x581309a9, 0x580e7a60, 0x5809eae1, 0x58055b2b,
-    0x5800cb3f, 0x57fc3b1d,
-  0x57f7aac5, 0x57f31a36, 0x57ee8971, 0x57e9f876, 0x57e56744, 0x57e0d5dd,
-    0x57dc443f, 0x57d7b26b,
-  0x57d32061, 0x57ce8e20, 0x57c9fbaa, 0x57c568fd, 0x57c0d61a, 0x57bc4301,
-    0x57b7afb2, 0x57b31c2d,
-  0x57ae8872, 0x57a9f480, 0x57a56059, 0x57a0cbfb, 0x579c3768, 0x5797a29e,
-    0x57930d9e, 0x578e7869,
-  0x5789e2fd, 0x57854d5b, 0x5780b784, 0x577c2176, 0x57778b32, 0x5772f4b9,
-    0x576e5e09, 0x5769c724,
-  0x57653009, 0x576098b7, 0x575c0130, 0x57576973, 0x5752d180, 0x574e3957,
-    0x5749a0f9, 0x57450864,
-  0x57406f9a, 0x573bd69a, 0x57373d64, 0x5732a3f8, 0x572e0a56, 0x5729707f,
-    0x5724d672, 0x57203c2f,
-  0x571ba1b7, 0x57170708, 0x57126c24, 0x570dd10a, 0x570935bb, 0x57049a36,
-    0x56fffe7b, 0x56fb628b,
-  0x56f6c664, 0x56f22a09, 0x56ed8d77, 0x56e8f0b0, 0x56e453b4, 0x56dfb681,
-    0x56db1919, 0x56d67b7c,
-  0x56d1dda9, 0x56cd3fa1, 0x56c8a162, 0x56c402ef, 0x56bf6446, 0x56bac567,
-    0x56b62653, 0x56b18709,
-  0x56ace78a, 0x56a847d6, 0x56a3a7ec, 0x569f07cc, 0x569a6777, 0x5695c6ed,
-    0x5691262d, 0x568c8538,
-  0x5687e40e, 0x568342ae, 0x567ea118, 0x5679ff4e, 0x56755d4e, 0x5670bb19,
-    0x566c18ae, 0x5667760e,
-  0x5662d339, 0x565e302e, 0x56598cee, 0x5654e979, 0x565045cf, 0x564ba1f0,
-    0x5646fddb, 0x56425991,
-  0x563db512, 0x5639105d, 0x56346b74, 0x562fc655, 0x562b2101, 0x56267b78,
-    0x5621d5ba, 0x561d2fc6,
-  0x5618899e, 0x5613e340, 0x560f3cae, 0x560a95e6, 0x5605eee9, 0x560147b7,
-    0x55fca050, 0x55f7f8b4,
-  0x55f350e3, 0x55eea8dd, 0x55ea00a2, 0x55e55832, 0x55e0af8d, 0x55dc06b3,
-    0x55d75da4, 0x55d2b460,
-  0x55ce0ae7, 0x55c96139, 0x55c4b757, 0x55c00d3f, 0x55bb62f3, 0x55b6b871,
-    0x55b20dbb, 0x55ad62d0,
-  0x55a8b7b0, 0x55a40c5b, 0x559f60d1, 0x559ab513, 0x55960920, 0x55915cf8,
-    0x558cb09b, 0x55880409,
-  0x55835743, 0x557eaa48, 0x5579fd18, 0x55754fb3, 0x5570a21a, 0x556bf44c,
-    0x55674649, 0x55629812,
-  0x555de9a6, 0x55593b05, 0x55548c30, 0x554fdd26, 0x554b2de7, 0x55467e74,
-    0x5541cecc, 0x553d1ef0,
-  0x55386edf, 0x5533be99, 0x552f0e1f, 0x552a5d70, 0x5525ac8d, 0x5520fb75,
-    0x551c4a29, 0x551798a8,
-  0x5512e6f3, 0x550e3509, 0x550982eb, 0x5504d099, 0x55001e12, 0x54fb6b56,
-    0x54f6b866, 0x54f20542,
-  0x54ed51e9, 0x54e89e5c, 0x54e3ea9a, 0x54df36a5, 0x54da827a, 0x54d5ce1c,
-    0x54d11989, 0x54cc64c2,
-  0x54c7afc6, 0x54c2fa96, 0x54be4532, 0x54b98f9a, 0x54b4d9cd, 0x54b023cc,
-    0x54ab6d97, 0x54a6b72e,
-  0x54a20090, 0x549d49bf, 0x549892b9, 0x5493db7f, 0x548f2410, 0x548a6c6e,
-    0x5485b497, 0x5480fc8c,
-  0x547c444d, 0x54778bda, 0x5472d333, 0x546e1a58, 0x54696149, 0x5464a805,
-    0x545fee8e, 0x545b34e3,
-  0x54567b03, 0x5451c0f0, 0x544d06a8, 0x54484c2d, 0x5443917d, 0x543ed699,
-    0x543a1b82, 0x54356037,
-  0x5430a4b7, 0x542be904, 0x54272d1d, 0x54227102, 0x541db4b3, 0x5418f830,
-    0x54143b79, 0x540f7e8e,
-  0x540ac170, 0x5406041d, 0x54014697, 0x53fc88dd, 0x53f7caef, 0x53f30cce,
-    0x53ee4e78, 0x53e98fef,
-  0x53e4d132, 0x53e01242, 0x53db531d, 0x53d693c5, 0x53d1d439, 0x53cd147a,
-    0x53c85486, 0x53c3945f,
-  0x53bed405, 0x53ba1377, 0x53b552b5, 0x53b091bf, 0x53abd096, 0x53a70f39,
-    0x53a24da9, 0x539d8be5,
-  0x5398c9ed, 0x539407c2, 0x538f4564, 0x538a82d1, 0x5385c00c, 0x5380fd12,
-    0x537c39e6, 0x53777685,
-  0x5372b2f2, 0x536def2a, 0x53692b30, 0x53646701, 0x535fa2a0, 0x535ade0b,
-    0x53561942, 0x53515447,
-  0x534c8f17, 0x5347c9b5, 0x5343041f, 0x533e3e55, 0x53397859, 0x5334b229,
-    0x532febc5, 0x532b252f,
-  0x53265e65, 0x53219767, 0x531cd037, 0x531808d3, 0x5313413c, 0x530e7972,
-    0x5309b174, 0x5304e943,
-  0x530020df, 0x52fb5848, 0x52f68f7e, 0x52f1c680, 0x52ecfd4f, 0x52e833ec,
-    0x52e36a55, 0x52dea08a,
-  0x52d9d68d, 0x52d50c5d, 0x52d041f9, 0x52cb7763, 0x52c6ac99, 0x52c1e19d,
-    0x52bd166d, 0x52b84b0a,
-  0x52b37f74, 0x52aeb3ac, 0x52a9e7b0, 0x52a51b81, 0x52a04f1f, 0x529b828a,
-    0x5296b5c3, 0x5291e8c8,
-  0x528d1b9b, 0x52884e3a, 0x528380a7, 0x527eb2e0, 0x5279e4e7, 0x527516bb,
-    0x5270485c, 0x526b79ca,
-  0x5266ab06, 0x5261dc0e, 0x525d0ce4, 0x52583d87, 0x52536df7, 0x524e9e34,
-    0x5249ce3f, 0x5244fe17,
-  0x52402dbc, 0x523b5d2e, 0x52368c6e, 0x5231bb7b, 0x522cea55, 0x522818fc,
-    0x52234771, 0x521e75b3,
-  0x5219a3c3, 0x5214d1a0, 0x520fff4a, 0x520b2cc2, 0x52065a07, 0x52018719,
-    0x51fcb3f9, 0x51f7e0a6,
-  0x51f30d21, 0x51ee3969, 0x51e9657e, 0x51e49162, 0x51dfbd12, 0x51dae890,
-    0x51d613dc, 0x51d13ef5,
-  0x51cc69db, 0x51c79490, 0x51c2bf11, 0x51bde960, 0x51b9137d, 0x51b43d68,
-    0x51af6720, 0x51aa90a5,
-  0x51a5b9f9, 0x51a0e31a, 0x519c0c08, 0x519734c4, 0x51925d4e, 0x518d85a6,
-    0x5188adcb, 0x5183d5be,
-  0x517efd7f, 0x517a250d, 0x51754c69, 0x51707393, 0x516b9a8b, 0x5166c150,
-    0x5161e7e4, 0x515d0e45,
-  0x51583473, 0x51535a70, 0x514e803b, 0x5149a5d3, 0x5144cb39, 0x513ff06d,
-    0x513b156f, 0x51363a3f,
-  0x51315edd, 0x512c8348, 0x5127a782, 0x5122cb8a, 0x511def5f, 0x51191302,
-    0x51143674, 0x510f59b3,
-  0x510a7cc1, 0x51059f9c, 0x5100c246, 0x50fbe4bd, 0x50f70703, 0x50f22916,
-    0x50ed4af8, 0x50e86ca8,
-  0x50e38e25, 0x50deaf71, 0x50d9d08b, 0x50d4f173, 0x50d0122a, 0x50cb32ae,
-    0x50c65301, 0x50c17322,
-  0x50bc9311, 0x50b7b2ce, 0x50b2d259, 0x50adf1b3, 0x50a910db, 0x50a42fd1,
-    0x509f4e95, 0x509a6d28,
-  0x50958b88, 0x5090a9b8, 0x508bc7b5, 0x5086e581, 0x5082031b, 0x507d2083,
-    0x50783dba, 0x50735abf,
-  0x506e7793, 0x50699435, 0x5064b0a5, 0x505fcce4, 0x505ae8f1, 0x505604cd,
-    0x50512077, 0x504c3bef,
-  0x50475736, 0x5042724c, 0x503d8d30, 0x5038a7e2, 0x5033c263, 0x502edcb2,
-    0x5029f6d1, 0x502510bd,
-  0x50202a78, 0x501b4402, 0x50165d5a, 0x50117681, 0x500c8f77, 0x5007a83b,
-    0x5002c0cd, 0x4ffdd92f,
-  0x4ff8f15f, 0x4ff4095e, 0x4fef212b, 0x4fea38c7, 0x4fe55032, 0x4fe0676c,
-    0x4fdb7e74, 0x4fd6954b,
-  0x4fd1abf0, 0x4fccc265, 0x4fc7d8a8, 0x4fc2eeba, 0x4fbe049b, 0x4fb91a4b,
-    0x4fb42fc9, 0x4faf4517,
-  0x4faa5a33, 0x4fa56f1e, 0x4fa083d8, 0x4f9b9861, 0x4f96acb8, 0x4f91c0df,
-    0x4f8cd4d4, 0x4f87e899,
-  0x4f82fc2c, 0x4f7e0f8f, 0x4f7922c0, 0x4f7435c0, 0x4f6f488f, 0x4f6a5b2e,
-    0x4f656d9b, 0x4f607fd7,
-  0x4f5b91e3, 0x4f56a3bd, 0x4f51b566, 0x4f4cc6df, 0x4f47d827, 0x4f42e93d,
-    0x4f3dfa23, 0x4f390ad8,
-  0x4f341b5c, 0x4f2f2baf, 0x4f2a3bd2, 0x4f254bc3, 0x4f205b84, 0x4f1b6b14,
-    0x4f167a73, 0x4f1189a1,
-  0x4f0c989f, 0x4f07a76b, 0x4f02b608, 0x4efdc473, 0x4ef8d2ad, 0x4ef3e0b7,
-    0x4eeeee90, 0x4ee9fc39,
-  0x4ee509b1, 0x4ee016f8, 0x4edb240e, 0x4ed630f4, 0x4ed13da9, 0x4ecc4a2e,
-    0x4ec75682, 0x4ec262a5,
-  0x4ebd6e98, 0x4eb87a5a, 0x4eb385ec, 0x4eae914d, 0x4ea99c7d, 0x4ea4a77d,
-    0x4e9fb24d, 0x4e9abcec,
-  0x4e95c75b, 0x4e90d199, 0x4e8bdba6, 0x4e86e583, 0x4e81ef30, 0x4e7cf8ac,
-    0x4e7801f8, 0x4e730b14,
-  0x4e6e13ff, 0x4e691cba, 0x4e642544, 0x4e5f2d9e, 0x4e5a35c7, 0x4e553dc1,
-    0x4e50458a, 0x4e4b4d22,
-  0x4e46548b, 0x4e415bc3, 0x4e3c62cb, 0x4e3769a2, 0x4e32704a, 0x4e2d76c1,
-    0x4e287d08, 0x4e23831e,
-  0x4e1e8905, 0x4e198ebb, 0x4e149441, 0x4e0f9997, 0x4e0a9ebd, 0x4e05a3b2,
-    0x4e00a878, 0x4dfbad0d,
-  0x4df6b173, 0x4df1b5a8, 0x4decb9ad, 0x4de7bd82, 0x4de2c127, 0x4dddc49c,
-    0x4dd8c7e1, 0x4dd3caf6,
-  0x4dcecdda, 0x4dc9d08f, 0x4dc4d314, 0x4dbfd569, 0x4dbad78e, 0x4db5d983,
-    0x4db0db48, 0x4dabdcdd,
-  0x4da6de43, 0x4da1df78, 0x4d9ce07d, 0x4d97e153, 0x4d92e1f9, 0x4d8de26f,
-    0x4d88e2b5, 0x4d83e2cb,
-  0x4d7ee2b1, 0x4d79e268, 0x4d74e1ef, 0x4d6fe146, 0x4d6ae06d, 0x4d65df64,
-    0x4d60de2c, 0x4d5bdcc4,
-  0x4d56db2d, 0x4d51d965, 0x4d4cd76e, 0x4d47d547, 0x4d42d2f1, 0x4d3dd06b,
-    0x4d38cdb5, 0x4d33cad0,
-  0x4d2ec7bb, 0x4d29c476, 0x4d24c102, 0x4d1fbd5e, 0x4d1ab98b, 0x4d15b588,
-    0x4d10b155, 0x4d0bacf3,
-  0x4d06a862, 0x4d01a3a0, 0x4cfc9eb0, 0x4cf79990, 0x4cf29440, 0x4ced8ec1,
-    0x4ce88913, 0x4ce38335,
-  0x4cde7d28, 0x4cd976eb, 0x4cd4707f, 0x4ccf69e3, 0x4cca6318, 0x4cc55c1e,
-    0x4cc054f4, 0x4cbb4d9b,
-  0x4cb64613, 0x4cb13e5b, 0x4cac3674, 0x4ca72e5e, 0x4ca22619, 0x4c9d1da4,
-    0x4c981500, 0x4c930c2d,
-  0x4c8e032a, 0x4c88f9f8, 0x4c83f097, 0x4c7ee707, 0x4c79dd48, 0x4c74d359,
-    0x4c6fc93b, 0x4c6abeef,
-  0x4c65b473, 0x4c60a9c8, 0x4c5b9eed, 0x4c5693e4, 0x4c5188ac, 0x4c4c7d44,
-    0x4c4771ae, 0x4c4265e8,
-  0x4c3d59f3, 0x4c384dd0, 0x4c33417d, 0x4c2e34fb, 0x4c29284b, 0x4c241b6b,
-    0x4c1f0e5c, 0x4c1a011f,
-  0x4c14f3b2, 0x4c0fe617, 0x4c0ad84c, 0x4c05ca53, 0x4c00bc2b, 0x4bfbadd4,
-    0x4bf69f4e, 0x4bf19099,
-  0x4bec81b5, 0x4be772a3, 0x4be26362, 0x4bdd53f2, 0x4bd84453, 0x4bd33485,
-    0x4bce2488, 0x4bc9145d,
-  0x4bc40403, 0x4bbef37b, 0x4bb9e2c3, 0x4bb4d1dd, 0x4bafc0c8, 0x4baaaf85,
-    0x4ba59e12, 0x4ba08c72,
-  0x4b9b7aa2, 0x4b9668a4, 0x4b915677, 0x4b8c441c, 0x4b873192, 0x4b821ed9,
-    0x4b7d0bf2, 0x4b77f8dc,
-  0x4b72e598, 0x4b6dd225, 0x4b68be84, 0x4b63aab4, 0x4b5e96b6, 0x4b598289,
-    0x4b546e2d, 0x4b4f59a4,
-  0x4b4a44eb, 0x4b453005, 0x4b401aef, 0x4b3b05ac, 0x4b35f03a, 0x4b30da9a,
-    0x4b2bc4cb, 0x4b26aece,
-  0x4b2198a2, 0x4b1c8248, 0x4b176bc0, 0x4b12550a, 0x4b0d3e25, 0x4b082712,
-    0x4b030fd1, 0x4afdf861,
-  0x4af8e0c3, 0x4af3c8f7, 0x4aeeb0fd, 0x4ae998d4, 0x4ae4807d, 0x4adf67f8,
-    0x4ada4f45, 0x4ad53664,
-  0x4ad01d54, 0x4acb0417, 0x4ac5eaab, 0x4ac0d111, 0x4abbb749, 0x4ab69d53,
-    0x4ab1832f, 0x4aac68dc,
-  0x4aa74e5c, 0x4aa233ae, 0x4a9d18d1, 0x4a97fdc7, 0x4a92e28e, 0x4a8dc728,
-    0x4a88ab93, 0x4a838fd1,
-  0x4a7e73e0, 0x4a7957c2, 0x4a743b76, 0x4a6f1efc, 0x4a6a0253, 0x4a64e57d,
-    0x4a5fc879, 0x4a5aab48,
-  0x4a558de8, 0x4a50705a, 0x4a4b529f, 0x4a4634b6, 0x4a41169f, 0x4a3bf85a,
-    0x4a36d9e7, 0x4a31bb47,
-  0x4a2c9c79, 0x4a277d7d, 0x4a225e53, 0x4a1d3efc, 0x4a181f77, 0x4a12ffc4,
-    0x4a0ddfe4, 0x4a08bfd5,
-  0x4a039f9a, 0x49fe7f30, 0x49f95e99, 0x49f43dd4, 0x49ef1ce2, 0x49e9fbc2,
-    0x49e4da74, 0x49dfb8f9,
-  0x49da9750, 0x49d5757a, 0x49d05376, 0x49cb3145, 0x49c60ee6, 0x49c0ec59,
-    0x49bbc9a0, 0x49b6a6b8,
-  0x49b183a3, 0x49ac6061, 0x49a73cf1, 0x49a21954, 0x499cf589, 0x4997d191,
-    0x4992ad6c, 0x498d8919,
-  0x49886499, 0x49833fec, 0x497e1b11, 0x4978f609, 0x4973d0d3, 0x496eab70,
-    0x496985e0, 0x49646023,
-  0x495f3a38, 0x495a1420, 0x4954eddb, 0x494fc768, 0x494aa0c9, 0x494579fc,
-    0x49405302, 0x493b2bdb,
-  0x49360486, 0x4930dd05, 0x492bb556, 0x49268d7a, 0x49216571, 0x491c3d3b,
-    0x491714d8, 0x4911ec47,
-  0x490cc38a, 0x49079aa0, 0x49027188, 0x48fd4844, 0x48f81ed2, 0x48f2f534,
-    0x48edcb68, 0x48e8a170,
-  0x48e3774a, 0x48de4cf8, 0x48d92278, 0x48d3f7cc, 0x48ceccf3, 0x48c9a1ed,
-    0x48c476b9, 0x48bf4b59,
-  0x48ba1fcd, 0x48b4f413, 0x48afc82c, 0x48aa9c19, 0x48a56fd9, 0x48a0436c,
-    0x489b16d2, 0x4895ea0b,
-  0x4890bd18, 0x488b8ff8, 0x488662ab, 0x48813531, 0x487c078b, 0x4876d9b8,
-    0x4871abb8, 0x486c7d8c,
-  0x48674f33, 0x486220ad, 0x485cf1fa, 0x4857c31b, 0x48529410, 0x484d64d7,
-    0x48483572, 0x484305e1,
-  0x483dd623, 0x4838a638, 0x48337621, 0x482e45dd, 0x4829156d, 0x4823e4d0,
-    0x481eb407, 0x48198311,
-  0x481451ef, 0x480f20a0, 0x4809ef25, 0x4804bd7e, 0x47ff8baa, 0x47fa59a9,
-    0x47f5277d, 0x47eff523,
-  0x47eac29e, 0x47e58fec, 0x47e05d0e, 0x47db2a03, 0x47d5f6cc, 0x47d0c369,
-    0x47cb8fd9, 0x47c65c1d,
-  0x47c12835, 0x47bbf421, 0x47b6bfe0, 0x47b18b74, 0x47ac56da, 0x47a72215,
-    0x47a1ed24, 0x479cb806,
-  0x479782bc, 0x47924d46, 0x478d17a4, 0x4787e1d6, 0x4782abdb, 0x477d75b5,
-    0x47783f62, 0x477308e3,
-  0x476dd239, 0x47689b62, 0x4763645f, 0x475e2d30, 0x4758f5d5, 0x4753be4e,
-    0x474e869b, 0x47494ebc,
-  0x474416b1, 0x473ede7a, 0x4739a617, 0x47346d89, 0x472f34ce, 0x4729fbe7,
-    0x4724c2d5, 0x471f8996,
-  0x471a502c, 0x47151696, 0x470fdcd4, 0x470aa2e6, 0x470568cd, 0x47002e87,
-    0x46faf416, 0x46f5b979,
-  0x46f07eb0, 0x46eb43bc, 0x46e6089b, 0x46e0cd4f, 0x46db91d8, 0x46d65634,
-    0x46d11a65, 0x46cbde6a,
-  0x46c6a244, 0x46c165f1, 0x46bc2974, 0x46b6ecca, 0x46b1aff5, 0x46ac72f4,
-    0x46a735c8, 0x46a1f870,
-  0x469cbaed, 0x46977d3e, 0x46923f63, 0x468d015d, 0x4687c32c, 0x468284cf,
-    0x467d4646, 0x46780792,
-  0x4672c8b3, 0x466d89a8, 0x46684a71, 0x46630b0f, 0x465dcb82, 0x46588bc9,
-    0x46534be5, 0x464e0bd6,
-  0x4648cb9b, 0x46438b35, 0x463e4aa3, 0x463909e7, 0x4633c8fe, 0x462e87eb,
-    0x462946ac, 0x46240542,
-  0x461ec3ad, 0x461981ec, 0x46144001, 0x460efde9, 0x4609bba7, 0x4604793a,
-    0x45ff36a1, 0x45f9f3dd,
-  0x45f4b0ee, 0x45ef6dd4, 0x45ea2a8f, 0x45e4e71f, 0x45dfa383, 0x45da5fbc,
-    0x45d51bcb, 0x45cfd7ae,
-  0x45ca9366, 0x45c54ef3, 0x45c00a55, 0x45bac58c, 0x45b58098, 0x45b03b79,
-    0x45aaf630, 0x45a5b0bb,
-  0x45a06b1b, 0x459b2550, 0x4595df5a, 0x45909939, 0x458b52ee, 0x45860c77,
-    0x4580c5d6, 0x457b7f0a,
-  0x45763813, 0x4570f0f1, 0x456ba9a4, 0x4566622c, 0x45611a8a, 0x455bd2bc,
-    0x45568ac4, 0x455142a2,
-  0x454bfa54, 0x4546b1dc, 0x45416939, 0x453c206b, 0x4536d773, 0x45318e4f,
-    0x452c4502, 0x4526fb89,
-  0x4521b1e6, 0x451c6818, 0x45171e20, 0x4511d3fd, 0x450c89af, 0x45073f37,
-    0x4501f494, 0x44fca9c6,
-  0x44f75ecf, 0x44f213ac, 0x44ecc85f, 0x44e77ce7, 0x44e23145, 0x44dce579,
-    0x44d79982, 0x44d24d60,
-  0x44cd0114, 0x44c7b49e, 0x44c267fd, 0x44bd1b32, 0x44b7ce3c, 0x44b2811c,
-    0x44ad33d2, 0x44a7e65d,
-  0x44a298be, 0x449d4af5, 0x4497fd01, 0x4492aee3, 0x448d609b, 0x44881228,
-    0x4482c38b, 0x447d74c4,
-  0x447825d2, 0x4472d6b7, 0x446d8771, 0x44683801, 0x4462e866, 0x445d98a2,
-    0x445848b3, 0x4452f89b,
-  0x444da858, 0x444857ea, 0x44430753, 0x443db692, 0x443865a7, 0x44331491,
-    0x442dc351, 0x442871e8,
-  0x44232054, 0x441dce96, 0x44187caf, 0x44132a9d, 0x440dd861, 0x440885fc,
-    0x4403336c, 0x43fde0b2,
-  0x43f88dcf, 0x43f33ac1, 0x43ede78a, 0x43e89429, 0x43e3409d, 0x43ddece8,
-    0x43d8990a, 0x43d34501,
-  0x43cdf0ce, 0x43c89c72, 0x43c347eb, 0x43bdf33b, 0x43b89e62, 0x43b3495e,
-    0x43adf431, 0x43a89ed9,
-  0x43a34959, 0x439df3ae, 0x43989dda, 0x439347dc, 0x438df1b4, 0x43889b63,
-    0x438344e8, 0x437dee43,
-  0x43789775, 0x4373407d, 0x436de95b, 0x43689210, 0x43633a9c, 0x435de2fd,
-    0x43588b36, 0x43533344,
-  0x434ddb29, 0x434882e5, 0x43432a77, 0x433dd1e0, 0x4338791f, 0x43332035,
-    0x432dc721, 0x43286de4,
-  0x4323147d, 0x431dbaed, 0x43186133, 0x43130751, 0x430dad44, 0x4308530f,
-    0x4302f8b0, 0x42fd9e28,
-  0x42f84376, 0x42f2e89b, 0x42ed8d97, 0x42e83269, 0x42e2d713, 0x42dd7b93,
-    0x42d81fe9, 0x42d2c417,
-  0x42cd681b, 0x42c80bf6, 0x42c2afa8, 0x42bd5331, 0x42b7f690, 0x42b299c7,
-    0x42ad3cd4, 0x42a7dfb8,
-  0x42a28273, 0x429d2505, 0x4297c76e, 0x429269ae, 0x428d0bc4, 0x4287adb2,
-    0x42824f76, 0x427cf112,
-  0x42779285, 0x427233ce, 0x426cd4ef, 0x426775e6, 0x426216b5, 0x425cb75a,
-    0x425757d7, 0x4251f82b,
-  0x424c9856, 0x42473858, 0x4241d831, 0x423c77e1, 0x42371769, 0x4231b6c7,
-    0x422c55fd, 0x4226f50a,
-  0x422193ee, 0x421c32a9, 0x4216d13c, 0x42116fa5, 0x420c0de6, 0x4206abfe,
-    0x420149ee, 0x41fbe7b5,
-  0x41f68553, 0x41f122c8, 0x41ebc015, 0x41e65d39, 0x41e0fa35, 0x41db9707,
-    0x41d633b1, 0x41d0d033,
-  0x41cb6c8c, 0x41c608bc, 0x41c0a4c4, 0x41bb40a3, 0x41b5dc5a, 0x41b077e8,
-    0x41ab134e, 0x41a5ae8b,
-  0x41a049a0, 0x419ae48c, 0x41957f4f, 0x419019eb, 0x418ab45d, 0x41854ea8,
-    0x417fe8ca, 0x417a82c3,
-  0x41751c94, 0x416fb63d, 0x416a4fbd, 0x4164e916, 0x415f8245, 0x415a1b4d,
-    0x4154b42c, 0x414f4ce2,
-  0x4149e571, 0x41447dd7, 0x413f1615, 0x4139ae2b, 0x41344618, 0x412edddd,
-    0x4129757b, 0x41240cef,
-  0x411ea43c, 0x41193b61, 0x4113d25d, 0x410e6931, 0x4108ffdd, 0x41039661,
-    0x40fe2cbd, 0x40f8c2f1,
-  0x40f358fc, 0x40edeee0, 0x40e8849b, 0x40e31a2f, 0x40ddaf9b, 0x40d844de,
-    0x40d2d9f9, 0x40cd6eed,
-  0x40c803b8, 0x40c2985c, 0x40bd2cd8, 0x40b7c12b, 0x40b25557, 0x40ace95b,
-    0x40a77d37, 0x40a210eb,
-  0x409ca477, 0x409737dc, 0x4091cb18, 0x408c5e2d, 0x4086f11a, 0x408183df,
-    0x407c167c, 0x4076a8f1,
-  0x40713b3f, 0x406bcd65, 0x40665f63, 0x4060f13a, 0x405b82e9, 0x40561470,
-    0x4050a5cf, 0x404b3707,
-  0x4045c817, 0x404058ff, 0x403ae9c0, 0x40357a59, 0x40300acb, 0x402a9b15,
-    0x40252b37, 0x401fbb32,
-  0x401a4b05, 0x4014dab1, 0x400f6a35, 0x4009f992, 0x400488c7, 0x3fff17d5,
-    0x3ff9a6bb, 0x3ff4357a,
-  0x3feec411, 0x3fe95281, 0x3fe3e0c9, 0x3fde6eeb, 0x3fd8fce4, 0x3fd38ab6,
-    0x3fce1861, 0x3fc8a5e5,
-  0x3fc33341, 0x3fbdc076, 0x3fb84d83, 0x3fb2da6a, 0x3fad6729, 0x3fa7f3c0,
-    0x3fa28031, 0x3f9d0c7a,
-  0x3f97989c, 0x3f922496, 0x3f8cb06a, 0x3f873c16, 0x3f81c79b, 0x3f7c52f9,
-    0x3f76de30, 0x3f71693f,
-  0x3f6bf428, 0x3f667ee9, 0x3f610983, 0x3f5b93f6, 0x3f561e42, 0x3f50a867,
-    0x3f4b3265, 0x3f45bc3c,
-  0x3f4045ec, 0x3f3acf75, 0x3f3558d7, 0x3f2fe211, 0x3f2a6b25, 0x3f24f412,
-    0x3f1f7cd8, 0x3f1a0577,
-  0x3f148def, 0x3f0f1640, 0x3f099e6b, 0x3f04266e, 0x3efeae4a, 0x3ef93600,
-    0x3ef3bd8f, 0x3eee44f7,
-  0x3ee8cc38, 0x3ee35352, 0x3eddda46, 0x3ed86113, 0x3ed2e7b9, 0x3ecd6e38,
-    0x3ec7f491, 0x3ec27ac2,
-  0x3ebd00cd, 0x3eb786b2, 0x3eb20c6f, 0x3eac9206, 0x3ea71777, 0x3ea19cc1,
-    0x3e9c21e4, 0x3e96a6e0,
-  0x3e912bb6, 0x3e8bb065, 0x3e8634ee, 0x3e80b950, 0x3e7b3d8c, 0x3e75c1a1,
-    0x3e70458f, 0x3e6ac957,
-  0x3e654cf8, 0x3e5fd073, 0x3e5a53c8, 0x3e54d6f6, 0x3e4f59fe, 0x3e49dcdf,
-    0x3e445f99, 0x3e3ee22e,
-  0x3e39649c, 0x3e33e6e3, 0x3e2e6904, 0x3e28eaff, 0x3e236cd4, 0x3e1dee82,
-    0x3e18700a, 0x3e12f16b,
-  0x3e0d72a6, 0x3e07f3bb, 0x3e0274aa, 0x3dfcf572, 0x3df77615, 0x3df1f691,
-    0x3dec76e6, 0x3de6f716,
-  0x3de1771f, 0x3ddbf703, 0x3dd676c0, 0x3dd0f656, 0x3dcb75c7, 0x3dc5f512,
-    0x3dc07436, 0x3dbaf335,
-  0x3db5720d, 0x3daff0c0, 0x3daa6f4c, 0x3da4edb2, 0x3d9f6bf2, 0x3d99ea0d,
-    0x3d946801, 0x3d8ee5cf,
-  0x3d896377, 0x3d83e0f9, 0x3d7e5e56, 0x3d78db8c, 0x3d73589d, 0x3d6dd587,
-    0x3d68524c, 0x3d62ceeb,
-  0x3d5d4b64, 0x3d57c7b7, 0x3d5243e4, 0x3d4cbfeb, 0x3d473bcd, 0x3d41b789,
-    0x3d3c331f, 0x3d36ae8f,
-  0x3d3129da, 0x3d2ba4fe, 0x3d261ffd, 0x3d209ad7, 0x3d1b158a, 0x3d159018,
-    0x3d100a80, 0x3d0a84c3,
-  0x3d04fee0, 0x3cff78d7, 0x3cf9f2a9, 0x3cf46c55, 0x3ceee5db, 0x3ce95f3c,
-    0x3ce3d877, 0x3cde518d,
-  0x3cd8ca7d, 0x3cd34347, 0x3ccdbbed, 0x3cc8346c, 0x3cc2acc6, 0x3cbd24fb,
-    0x3cb79d0a, 0x3cb214f4,
-  0x3cac8cb8, 0x3ca70457, 0x3ca17bd0, 0x3c9bf324, 0x3c966a53, 0x3c90e15c,
-    0x3c8b5840, 0x3c85cefe,
-  0x3c804598, 0x3c7abc0c, 0x3c75325a, 0x3c6fa883, 0x3c6a1e87, 0x3c649466,
-    0x3c5f0a20, 0x3c597fb4,
-  0x3c53f523, 0x3c4e6a6d, 0x3c48df91, 0x3c435491, 0x3c3dc96b, 0x3c383e20,
-    0x3c32b2b0, 0x3c2d271b,
-  0x3c279b61, 0x3c220f81, 0x3c1c837d, 0x3c16f753, 0x3c116b04, 0x3c0bde91,
-    0x3c0651f8, 0x3c00c53a,
-  0x3bfb3857, 0x3bf5ab50, 0x3bf01e23, 0x3bea90d1, 0x3be5035a, 0x3bdf75bf,
-    0x3bd9e7fe, 0x3bd45a19,
-  0x3bcecc0e, 0x3bc93ddf, 0x3bc3af8b, 0x3bbe2112, 0x3bb89274, 0x3bb303b1,
-    0x3bad74c9, 0x3ba7e5bd,
-  0x3ba2568c, 0x3b9cc736, 0x3b9737bb, 0x3b91a81c, 0x3b8c1857, 0x3b86886e,
-    0x3b80f861, 0x3b7b682e,
-  0x3b75d7d7, 0x3b70475c, 0x3b6ab6bb, 0x3b6525f6, 0x3b5f950c, 0x3b5a03fe,
-    0x3b5472cb, 0x3b4ee173,
-  0x3b494ff7, 0x3b43be57, 0x3b3e2c91, 0x3b389aa8, 0x3b330899, 0x3b2d7666,
-    0x3b27e40f, 0x3b225193,
-  0x3b1cbef3, 0x3b172c2e, 0x3b119945, 0x3b0c0637, 0x3b067305, 0x3b00dfaf,
-    0x3afb4c34, 0x3af5b894,
-  0x3af024d1, 0x3aea90e9, 0x3ae4fcdc, 0x3adf68ac, 0x3ad9d457, 0x3ad43fdd,
-    0x3aceab40, 0x3ac9167e,
-  0x3ac38198, 0x3abdec8d, 0x3ab8575f, 0x3ab2c20c, 0x3aad2c95, 0x3aa796fa,
-    0x3aa2013a, 0x3a9c6b57,
-  0x3a96d54f, 0x3a913f23, 0x3a8ba8d3, 0x3a86125f, 0x3a807bc7, 0x3a7ae50a,
-    0x3a754e2a, 0x3a6fb726,
-  0x3a6a1ffd, 0x3a6488b1, 0x3a5ef140, 0x3a5959ab, 0x3a53c1f3, 0x3a4e2a16,
-    0x3a489216, 0x3a42f9f2,
-  0x3a3d61a9, 0x3a37c93d, 0x3a3230ad, 0x3a2c97f9, 0x3a26ff21, 0x3a216625,
-    0x3a1bcd05, 0x3a1633c1,
-  0x3a109a5a, 0x3a0b00cf, 0x3a056720, 0x39ffcd4d, 0x39fa3356, 0x39f4993c,
-    0x39eefefe, 0x39e9649c,
-  0x39e3ca17, 0x39de2f6d, 0x39d894a0, 0x39d2f9b0, 0x39cd5e9b, 0x39c7c363,
-    0x39c22808, 0x39bc8c89,
-  0x39b6f0e6, 0x39b1551f, 0x39abb935, 0x39a61d28, 0x39a080f6, 0x399ae4a2,
-    0x39954829, 0x398fab8e,
-  0x398a0ece, 0x398471ec, 0x397ed4e5, 0x397937bc, 0x39739a6e, 0x396dfcfe,
-    0x39685f6a, 0x3962c1b2,
-  0x395d23d7, 0x395785d9, 0x3951e7b8, 0x394c4973, 0x3946ab0a, 0x39410c7f,
-    0x393b6dd0, 0x3935cefd,
-  0x39303008, 0x392a90ef, 0x3924f1b3, 0x391f5254, 0x3919b2d1, 0x3914132b,
-    0x390e7362, 0x3908d376,
-  0x39033367, 0x38fd9334, 0x38f7f2de, 0x38f25266, 0x38ecb1ca, 0x38e7110a,
-    0x38e17028, 0x38dbcf23,
-  0x38d62dfb, 0x38d08caf, 0x38caeb41, 0x38c549af, 0x38bfa7fb, 0x38ba0623,
-    0x38b46429, 0x38aec20b,
-  0x38a91fcb, 0x38a37d67, 0x389ddae1, 0x38983838, 0x3892956c, 0x388cf27d,
-    0x38874f6b, 0x3881ac36,
-  0x387c08de, 0x38766564, 0x3870c1c6, 0x386b1e06, 0x38657a23, 0x385fd61d,
-    0x385a31f5, 0x38548daa,
-  0x384ee93b, 0x384944ab, 0x38439ff7, 0x383dfb21, 0x38385628, 0x3832b10d,
-    0x382d0bce, 0x3827666d,
-  0x3821c0ea, 0x381c1b44, 0x3816757b, 0x3810cf90, 0x380b2982, 0x38058351,
-    0x37ffdcfe, 0x37fa3688,
-  0x37f48ff0, 0x37eee936, 0x37e94259, 0x37e39b59, 0x37ddf437, 0x37d84cf2,
-    0x37d2a58b, 0x37ccfe02,
-  0x37c75656, 0x37c1ae87, 0x37bc0697, 0x37b65e84, 0x37b0b64e, 0x37ab0df6,
-    0x37a5657c, 0x379fbce0,
-  0x379a1421, 0x37946b40, 0x378ec23d, 0x37891917, 0x37836fcf, 0x377dc665,
-    0x37781cd9, 0x3772732a,
-  0x376cc959, 0x37671f66, 0x37617551, 0x375bcb1a, 0x375620c1, 0x37507645,
-    0x374acba7, 0x374520e7,
-  0x373f7606, 0x3739cb02, 0x37341fdc, 0x372e7493, 0x3728c929, 0x37231d9d,
-    0x371d71ef, 0x3717c61f,
-  0x37121a2d, 0x370c6e19, 0x3706c1e2, 0x3701158a, 0x36fb6910, 0x36f5bc75,
-    0x36f00fb7, 0x36ea62d7,
-  0x36e4b5d6, 0x36df08b2, 0x36d95b6d, 0x36d3ae06, 0x36ce007d, 0x36c852d2,
-    0x36c2a506, 0x36bcf718,
-  0x36b74908, 0x36b19ad6, 0x36abec82, 0x36a63e0d, 0x36a08f76, 0x369ae0bd,
-    0x369531e3, 0x368f82e7,
-  0x3689d3c9, 0x3684248a, 0x367e7529, 0x3678c5a7, 0x36731602, 0x366d663d,
-    0x3667b655, 0x3662064c,
-  0x365c5622, 0x3656a5d6, 0x3650f569, 0x364b44da, 0x36459429, 0x363fe357,
-    0x363a3264, 0x3634814f,
-  0x362ed019, 0x36291ec1, 0x36236d48, 0x361dbbad, 0x361809f1, 0x36125814,
-    0x360ca615, 0x3606f3f5,
-  0x360141b4, 0x35fb8f52, 0x35f5dcce, 0x35f02a28, 0x35ea7762, 0x35e4c47a,
-    0x35df1171, 0x35d95e47,
-  0x35d3aafc, 0x35cdf78f, 0x35c84401, 0x35c29052, 0x35bcdc82, 0x35b72891,
-    0x35b1747e, 0x35abc04b,
-  0x35a60bf6, 0x35a05781, 0x359aa2ea, 0x3594ee32, 0x358f3959, 0x3589845f,
-    0x3583cf44, 0x357e1a08,
-  0x357864ab, 0x3572af2d, 0x356cf98e, 0x356743ce, 0x35618ded, 0x355bd7eb,
-    0x355621c9, 0x35506b85,
-  0x354ab520, 0x3544fe9b, 0x353f47f5, 0x3539912e, 0x3533da46, 0x352e233d,
-    0x35286c14, 0x3522b4c9,
-  0x351cfd5e, 0x351745d2, 0x35118e26, 0x350bd658, 0x35061e6a, 0x3500665c,
-    0x34faae2c, 0x34f4f5dc,
-  0x34ef3d6b, 0x34e984da, 0x34e3cc28, 0x34de1355, 0x34d85a62, 0x34d2a14e,
-    0x34cce819, 0x34c72ec4,
-  0x34c1754e, 0x34bbbbb8, 0x34b60202, 0x34b0482a, 0x34aa8e33, 0x34a4d41a,
-    0x349f19e2, 0x34995f88,
-  0x3493a50f, 0x348dea75, 0x34882fba, 0x348274e0, 0x347cb9e4, 0x3476fec9,
-    0x3471438d, 0x346b8830,
-  0x3465ccb4, 0x34601117, 0x345a5559, 0x3454997c, 0x344edd7e, 0x34492160,
-    0x34436521, 0x343da8c3,
-  0x3437ec44, 0x34322fa5, 0x342c72e6, 0x3426b606, 0x3420f907, 0x341b3be7,
-    0x34157ea7, 0x340fc147,
-  0x340a03c7, 0x34044626, 0x33fe8866, 0x33f8ca86, 0x33f30c85, 0x33ed4e65,
-    0x33e79024, 0x33e1d1c4,
-  0x33dc1343, 0x33d654a2, 0x33d095e2, 0x33cad701, 0x33c51801, 0x33bf58e1,
-    0x33b999a0, 0x33b3da40,
-  0x33ae1ac0, 0x33a85b20, 0x33a29b60, 0x339cdb81, 0x33971b81, 0x33915b62,
-    0x338b9b22, 0x3385dac4,
-  0x33801a45, 0x337a59a6, 0x337498e8, 0x336ed80a, 0x3369170c, 0x336355ef,
-    0x335d94b2, 0x3357d355,
-  0x335211d8, 0x334c503c, 0x33468e80, 0x3340cca5, 0x333b0aaa, 0x3335488f,
-    0x332f8655, 0x3329c3fb,
-  0x33240182, 0x331e3ee9, 0x33187c31, 0x3312b959, 0x330cf661, 0x3307334a,
-    0x33017014, 0x32fbacbe,
-  0x32f5e948, 0x32f025b4, 0x32ea61ff, 0x32e49e2c, 0x32deda39, 0x32d91626,
-    0x32d351f5, 0x32cd8da4,
-  0x32c7c933, 0x32c204a3, 0x32bc3ff4, 0x32b67b26, 0x32b0b638, 0x32aaf12b,
-    0x32a52bff, 0x329f66b4,
-  0x3299a149, 0x3293dbbf, 0x328e1616, 0x3288504e, 0x32828a67, 0x327cc460,
-    0x3276fe3a, 0x327137f6,
-  0x326b7192, 0x3265ab0f, 0x325fe46c, 0x325a1dab, 0x325456cb, 0x324e8fcc,
-    0x3248c8ad, 0x32430170,
-  0x323d3a14, 0x32377298, 0x3231aafe, 0x322be345, 0x32261b6c, 0x32205375,
-    0x321a8b5f, 0x3214c32a,
-  0x320efad6, 0x32093263, 0x320369d2, 0x31fda121, 0x31f7d852, 0x31f20f64,
-    0x31ec4657, 0x31e67d2b,
-  0x31e0b3e0, 0x31daea77, 0x31d520ef, 0x31cf5748, 0x31c98d83, 0x31c3c39e,
-    0x31bdf99b, 0x31b82f7a,
-  0x31b2653a, 0x31ac9adb, 0x31a6d05d, 0x31a105c1, 0x319b3b06, 0x3195702d,
-    0x318fa535, 0x3189da1e,
-  0x31840ee9, 0x317e4395, 0x31787823, 0x3172ac92, 0x316ce0e3, 0x31671515,
-    0x31614929, 0x315b7d1e,
-  0x3155b0f5, 0x314fe4ae, 0x314a1848, 0x31444bc3, 0x313e7f21, 0x3138b260,
-    0x3132e580, 0x312d1882,
-  0x31274b66, 0x31217e2c, 0x311bb0d3, 0x3115e35c, 0x311015c6, 0x310a4813,
-    0x31047a41, 0x30feac51,
-  0x30f8de42, 0x30f31016, 0x30ed41cb, 0x30e77362, 0x30e1a4db, 0x30dbd636,
-    0x30d60772, 0x30d03891,
-  0x30ca6991, 0x30c49a74, 0x30becb38, 0x30b8fbde, 0x30b32c66, 0x30ad5cd0,
-    0x30a78d1c, 0x30a1bd4a,
-  0x309bed5a, 0x30961d4c, 0x30904d20, 0x308a7cd6, 0x3084ac6e, 0x307edbe9,
-    0x30790b45, 0x30733a83,
-  0x306d69a4, 0x306798a7, 0x3061c78b, 0x305bf652, 0x305624fb, 0x30505387,
-    0x304a81f4, 0x3044b044,
-  0x303ede76, 0x30390c8a, 0x30333a80, 0x302d6859, 0x30279614, 0x3021c3b1,
-    0x301bf131, 0x30161e93,
-  0x30104bd7, 0x300a78fe, 0x3004a607, 0x2ffed2f2, 0x2ff8ffc0, 0x2ff32c70,
-    0x2fed5902, 0x2fe78577,
-  0x2fe1b1cf, 0x2fdbde09, 0x2fd60a25, 0x2fd03624, 0x2fca6206, 0x2fc48dc9,
-    0x2fbeb970, 0x2fb8e4f9,
-  0x2fb31064, 0x2fad3bb3, 0x2fa766e3, 0x2fa191f7, 0x2f9bbced, 0x2f95e7c5,
-    0x2f901280, 0x2f8a3d1e,
-  0x2f84679f, 0x2f7e9202, 0x2f78bc48, 0x2f72e671, 0x2f6d107c, 0x2f673a6a,
-    0x2f61643b, 0x2f5b8def,
-  0x2f55b785, 0x2f4fe0ff, 0x2f4a0a5b, 0x2f44339a, 0x2f3e5cbb, 0x2f3885c0,
-    0x2f32aea8, 0x2f2cd772,
-  0x2f27001f, 0x2f2128af, 0x2f1b5122, 0x2f157979, 0x2f0fa1b2, 0x2f09c9ce,
-    0x2f03f1cd, 0x2efe19ae,
-  0x2ef84173, 0x2ef2691b, 0x2eec90a7, 0x2ee6b815, 0x2ee0df66, 0x2edb069a,
-    0x2ed52db1, 0x2ecf54ac,
-  0x2ec97b89, 0x2ec3a24a, 0x2ebdc8ee, 0x2eb7ef75, 0x2eb215df, 0x2eac3c2d,
-    0x2ea6625d, 0x2ea08871,
-  0x2e9aae68, 0x2e94d443, 0x2e8efa00, 0x2e891fa1, 0x2e834525, 0x2e7d6a8d,
-    0x2e778fd8, 0x2e71b506,
-  0x2e6bda17, 0x2e65ff0c, 0x2e6023e5, 0x2e5a48a0, 0x2e546d3f, 0x2e4e91c2,
-    0x2e48b628, 0x2e42da71,
-  0x2e3cfe9e, 0x2e3722ae, 0x2e3146a2, 0x2e2b6a79, 0x2e258e34, 0x2e1fb1d3,
-    0x2e19d554, 0x2e13f8ba,
-  0x2e0e1c03, 0x2e083f30, 0x2e026240, 0x2dfc8534, 0x2df6a80b, 0x2df0cac6,
-    0x2deaed65, 0x2de50fe8,
-  0x2ddf324e, 0x2dd95498, 0x2dd376c5, 0x2dcd98d7, 0x2dc7bacc, 0x2dc1dca4,
-    0x2dbbfe61, 0x2db62001,
-  0x2db04186, 0x2daa62ee, 0x2da4843a, 0x2d9ea569, 0x2d98c67d, 0x2d92e774,
-    0x2d8d084f, 0x2d87290f,
-  0x2d8149b2, 0x2d7b6a39, 0x2d758aa4, 0x2d6faaf3, 0x2d69cb26, 0x2d63eb3d,
-    0x2d5e0b38, 0x2d582b17,
-  0x2d524ada, 0x2d4c6a81, 0x2d468a0c, 0x2d40a97b, 0x2d3ac8ce, 0x2d34e805,
-    0x2d2f0721, 0x2d292620,
-  0x2d234504, 0x2d1d63cc, 0x2d178278, 0x2d11a108, 0x2d0bbf7d, 0x2d05ddd5,
-    0x2cfffc12, 0x2cfa1a33,
-  0x2cf43839, 0x2cee5622, 0x2ce873f0, 0x2ce291a2, 0x2cdcaf39, 0x2cd6ccb4,
-    0x2cd0ea13, 0x2ccb0756,
-  0x2cc5247e, 0x2cbf418b, 0x2cb95e7b, 0x2cb37b51, 0x2cad980a, 0x2ca7b4a8,
-    0x2ca1d12a, 0x2c9bed91,
-  0x2c9609dd, 0x2c90260d, 0x2c8a4221, 0x2c845e1a, 0x2c7e79f7, 0x2c7895b9,
-    0x2c72b160, 0x2c6ccceb,
-  0x2c66e85b, 0x2c6103af, 0x2c5b1ee8, 0x2c553a06, 0x2c4f5508, 0x2c496fef,
-    0x2c438abb, 0x2c3da56b,
-  0x2c37c000, 0x2c31da7a, 0x2c2bf4d8, 0x2c260f1c, 0x2c202944, 0x2c1a4351,
-    0x2c145d42, 0x2c0e7719,
-  0x2c0890d4, 0x2c02aa74, 0x2bfcc3f9, 0x2bf6dd63, 0x2bf0f6b1, 0x2beb0fe5,
-    0x2be528fd, 0x2bdf41fb,
-  0x2bd95add, 0x2bd373a4, 0x2bcd8c51, 0x2bc7a4e2, 0x2bc1bd58, 0x2bbbd5b3,
-    0x2bb5edf4, 0x2bb00619,
-  0x2baa1e23, 0x2ba43613, 0x2b9e4de7, 0x2b9865a1, 0x2b927d3f, 0x2b8c94c3,
-    0x2b86ac2c, 0x2b80c37a,
-  0x2b7adaae, 0x2b74f1c6, 0x2b6f08c4, 0x2b691fa6, 0x2b63366f, 0x2b5d4d1c,
-    0x2b5763ae, 0x2b517a26,
-  0x2b4b9083, 0x2b45a6c6, 0x2b3fbced, 0x2b39d2fa, 0x2b33e8ed, 0x2b2dfec5,
-    0x2b281482, 0x2b222a24,
-  0x2b1c3fac, 0x2b165519, 0x2b106a6c, 0x2b0a7fa4, 0x2b0494c2, 0x2afea9c5,
-    0x2af8bead, 0x2af2d37b,
-  0x2aece82f, 0x2ae6fcc8, 0x2ae11146, 0x2adb25aa, 0x2ad539f4, 0x2acf4e23,
-    0x2ac96238, 0x2ac37633,
-  0x2abd8a13, 0x2ab79dd8, 0x2ab1b184, 0x2aabc515, 0x2aa5d88b, 0x2a9febe8,
-    0x2a99ff2a, 0x2a941252,
-  0x2a8e255f, 0x2a883853, 0x2a824b2c, 0x2a7c5deb, 0x2a76708f, 0x2a70831a,
-    0x2a6a958a, 0x2a64a7e0,
-  0x2a5eba1c, 0x2a58cc3e, 0x2a52de46, 0x2a4cf033, 0x2a470207, 0x2a4113c0,
-    0x2a3b2560, 0x2a3536e5,
-  0x2a2f4850, 0x2a2959a1, 0x2a236ad9, 0x2a1d7bf6, 0x2a178cf9, 0x2a119de2,
-    0x2a0baeb2, 0x2a05bf67,
-  0x29ffd003, 0x29f9e084, 0x29f3f0ec, 0x29ee013a, 0x29e8116e, 0x29e22188,
-    0x29dc3188, 0x29d6416f,
-  0x29d0513b, 0x29ca60ee, 0x29c47087, 0x29be8007, 0x29b88f6c, 0x29b29eb8,
-    0x29acadea, 0x29a6bd02,
-  0x29a0cc01, 0x299adae6, 0x2994e9b1, 0x298ef863, 0x298906fb, 0x2983157a,
-    0x297d23df, 0x2977322a,
-  0x2971405b, 0x296b4e74, 0x29655c72, 0x295f6a57, 0x29597823, 0x295385d5,
-    0x294d936d, 0x2947a0ec,
-  0x2941ae52, 0x293bbb9e, 0x2935c8d1, 0x292fd5ea, 0x2929e2ea, 0x2923efd0,
-    0x291dfc9d, 0x29180951,
-  0x291215eb, 0x290c226c, 0x29062ed4, 0x29003b23, 0x28fa4758, 0x28f45374,
-    0x28ee5f76, 0x28e86b5f,
-  0x28e27730, 0x28dc82e6, 0x28d68e84, 0x28d09a09, 0x28caa574, 0x28c4b0c6,
-    0x28bebbff, 0x28b8c71f,
-  0x28b2d226, 0x28acdd13, 0x28a6e7e8, 0x28a0f2a3, 0x289afd46, 0x289507cf,
-    0x288f123f, 0x28891c97,
-  0x288326d5, 0x287d30fa, 0x28773b07, 0x287144fa, 0x286b4ed5, 0x28655896,
-    0x285f623f, 0x28596bce,
-  0x28537545, 0x284d7ea3, 0x284787e8, 0x28419114, 0x283b9a28, 0x2835a322,
-    0x282fac04, 0x2829b4cd,
-  0x2823bd7d, 0x281dc615, 0x2817ce93, 0x2811d6f9, 0x280bdf46, 0x2805e77b,
-    0x27ffef97, 0x27f9f79a,
-  0x27f3ff85, 0x27ee0756, 0x27e80f10, 0x27e216b0, 0x27dc1e38, 0x27d625a8,
-    0x27d02cff, 0x27ca343d,
-  0x27c43b63, 0x27be4270, 0x27b84965, 0x27b25041, 0x27ac5705, 0x27a65db0,
-    0x27a06443, 0x279a6abd,
-  0x2794711f, 0x278e7768, 0x27887d99, 0x278283b2, 0x277c89b3, 0x27768f9b,
-    0x2770956a, 0x276a9b21,
-  0x2764a0c0, 0x275ea647, 0x2758abb6, 0x2752b10c, 0x274cb64a, 0x2746bb6f,
-    0x2740c07d, 0x273ac572,
-  0x2734ca4f, 0x272ecf14, 0x2728d3c0, 0x2722d855, 0x271cdcd1, 0x2716e136,
-    0x2710e582, 0x270ae9b6,
-  0x2704edd2, 0x26fef1d5, 0x26f8f5c1, 0x26f2f995, 0x26ecfd51, 0x26e700f5,
-    0x26e10480, 0x26db07f4,
-  0x26d50b50, 0x26cf0e94, 0x26c911c0, 0x26c314d4, 0x26bd17d0, 0x26b71ab4,
-    0x26b11d80, 0x26ab2034,
-  0x26a522d1, 0x269f2556, 0x269927c3, 0x26932a18, 0x268d2c55, 0x26872e7b,
-    0x26813088, 0x267b327e,
-  0x2675345d, 0x266f3623, 0x266937d2, 0x26633969, 0x265d3ae9, 0x26573c50,
-    0x26513da1, 0x264b3ed9,
-  0x26453ffa, 0x263f4103, 0x263941f5, 0x263342cf, 0x262d4392, 0x2627443d,
-    0x262144d0, 0x261b454c,
-  0x261545b0, 0x260f45fd, 0x26094633, 0x26034651, 0x25fd4657, 0x25f74646,
-    0x25f1461e, 0x25eb45de,
-  0x25e54587, 0x25df4519, 0x25d94493, 0x25d343f6, 0x25cd4341, 0x25c74276,
-    0x25c14192, 0x25bb4098,
-  0x25b53f86, 0x25af3e5d, 0x25a93d1d, 0x25a33bc6, 0x259d3a57, 0x259738d1,
-    0x25913734, 0x258b3580,
-  0x258533b5, 0x257f31d2, 0x25792fd8, 0x25732dc8, 0x256d2ba0, 0x25672961,
-    0x2561270b, 0x255b249e,
-  0x2555221a, 0x254f1f7e, 0x25491ccc, 0x25431a03, 0x253d1723, 0x2537142c,
-    0x2531111e, 0x252b0df9,
-  0x25250abd, 0x251f076a, 0x25190400, 0x25130080, 0x250cfce8, 0x2506f93a,
-    0x2500f574, 0x24faf198,
-  0x24f4eda6, 0x24eee99c, 0x24e8e57c, 0x24e2e144, 0x24dcdcf6, 0x24d6d892,
-    0x24d0d416, 0x24cacf84,
-  0x24c4cadb, 0x24bec61c, 0x24b8c146, 0x24b2bc59, 0x24acb756, 0x24a6b23b,
-    0x24a0ad0b, 0x249aa7c4,
-  0x2494a266, 0x248e9cf1, 0x24889766, 0x248291c5, 0x247c8c0d, 0x2476863e,
-    0x24708059, 0x246a7a5e,
-  0x2464744c, 0x245e6e23, 0x245867e4, 0x2452618f, 0x244c5b24, 0x244654a1,
-    0x24404e09, 0x243a475a,
-  0x24344095, 0x242e39ba, 0x242832c8, 0x24222bc0, 0x241c24a1, 0x24161d6d,
-    0x24101622, 0x240a0ec1,
-  0x24040749, 0x23fdffbc, 0x23f7f818, 0x23f1f05e, 0x23ebe88e, 0x23e5e0a7,
-    0x23dfd8ab, 0x23d9d098,
-  0x23d3c86f, 0x23cdc031, 0x23c7b7dc, 0x23c1af71, 0x23bba6f0, 0x23b59e59,
-    0x23af95ac, 0x23a98ce8,
-  0x23a3840f, 0x239d7b20, 0x2397721b, 0x23916900, 0x238b5fcf, 0x23855688,
-    0x237f4d2b, 0x237943b9,
-  0x23733a30, 0x236d3092, 0x236726dd, 0x23611d13, 0x235b1333, 0x2355093e,
-    0x234eff32, 0x2348f511,
-  0x2342eada, 0x233ce08d, 0x2336d62a, 0x2330cbb2, 0x232ac124, 0x2324b680,
-    0x231eabc7, 0x2318a0f8,
-  0x23129613, 0x230c8b19, 0x23068009, 0x230074e3, 0x22fa69a8, 0x22f45e57,
-    0x22ee52f1, 0x22e84775,
-  0x22e23be4, 0x22dc303d, 0x22d62480, 0x22d018ae, 0x22ca0cc7, 0x22c400ca,
-    0x22bdf4b8, 0x22b7e890,
-  0x22b1dc53, 0x22abd001, 0x22a5c399, 0x229fb71b, 0x2299aa89, 0x22939de1,
-    0x228d9123, 0x22878451,
-  0x22817769, 0x227b6a6c, 0x22755d59, 0x226f5032, 0x226942f5, 0x226335a2,
-    0x225d283b, 0x22571abe,
-  0x22510d2d, 0x224aff86, 0x2244f1c9, 0x223ee3f8, 0x2238d612, 0x2232c816,
-    0x222cba06, 0x2226abe0,
-  0x22209da5, 0x221a8f56, 0x221480f1, 0x220e7277, 0x220863e8, 0x22025544,
-    0x21fc468b, 0x21f637be,
-  0x21f028db, 0x21ea19e3, 0x21e40ad7, 0x21ddfbb5, 0x21d7ec7f, 0x21d1dd34,
-    0x21cbcdd3, 0x21c5be5e,
-  0x21bfaed5, 0x21b99f36, 0x21b38f83, 0x21ad7fba, 0x21a76fdd, 0x21a15fec,
-    0x219b4fe5, 0x21953fca,
-  0x218f2f9a, 0x21891f55, 0x21830efc, 0x217cfe8e, 0x2176ee0b, 0x2170dd74,
-    0x216accc8, 0x2164bc08,
-  0x215eab33, 0x21589a49, 0x2152894b, 0x214c7838, 0x21466710, 0x214055d4,
-    0x213a4484, 0x2134331f,
-  0x212e21a6, 0x21281018, 0x2121fe76, 0x211becbf, 0x2115daf4, 0x210fc914,
-    0x2109b720, 0x2103a518,
-  0x20fd92fb, 0x20f780ca, 0x20f16e84, 0x20eb5c2b, 0x20e549bd, 0x20df373a,
-    0x20d924a4, 0x20d311f9,
-  0x20ccff3a, 0x20c6ec66, 0x20c0d97f, 0x20bac683, 0x20b4b373, 0x20aea04f,
-    0x20a88d17, 0x20a279ca,
-  0x209c666a, 0x209652f5, 0x20903f6c, 0x208a2bcf, 0x2084181e, 0x207e0459,
-    0x2077f080, 0x2071dc93,
-  0x206bc892, 0x2065b47d, 0x205fa054, 0x20598c17, 0x205377c6, 0x204d6361,
-    0x20474ee8, 0x20413a5b,
-  0x203b25bb, 0x20351106, 0x202efc3e, 0x2028e761, 0x2022d271, 0x201cbd6d,
-    0x2016a856, 0x2010932a,
-  0x200a7deb, 0x20046898, 0x1ffe5331, 0x1ff83db6, 0x1ff22828, 0x1fec1286,
-    0x1fe5fcd0, 0x1fdfe707,
-  0x1fd9d12a, 0x1fd3bb39, 0x1fcda535, 0x1fc78f1d, 0x1fc178f1, 0x1fbb62b2,
-    0x1fb54c60, 0x1faf35f9,
-  0x1fa91f80, 0x1fa308f2, 0x1f9cf252, 0x1f96db9d, 0x1f90c4d5, 0x1f8aadfa,
-    0x1f84970b, 0x1f7e8009,
-  0x1f7868f4, 0x1f7251ca, 0x1f6c3a8e, 0x1f66233e, 0x1f600bdb, 0x1f59f465,
-    0x1f53dcdb, 0x1f4dc53d,
-  0x1f47ad8d, 0x1f4195c9, 0x1f3b7df2, 0x1f356608, 0x1f2f4e0a, 0x1f2935f9,
-    0x1f231dd5, 0x1f1d059e,
-  0x1f16ed54, 0x1f10d4f6, 0x1f0abc85, 0x1f04a401, 0x1efe8b6a, 0x1ef872c0,
-    0x1ef25a03, 0x1eec4132,
-  0x1ee6284f, 0x1ee00f58, 0x1ed9f64f, 0x1ed3dd32, 0x1ecdc402, 0x1ec7aac0,
-    0x1ec1916a, 0x1ebb7802,
-  0x1eb55e86, 0x1eaf44f8, 0x1ea92b56, 0x1ea311a2, 0x1e9cf7db, 0x1e96de01,
-    0x1e90c414, 0x1e8aaa14,
-  0x1e849001, 0x1e7e75dc, 0x1e785ba3, 0x1e724158, 0x1e6c26fa, 0x1e660c8a,
-    0x1e5ff206, 0x1e59d770,
-  0x1e53bcc7, 0x1e4da20c, 0x1e47873d, 0x1e416c5d, 0x1e3b5169, 0x1e353663,
-    0x1e2f1b4a, 0x1e29001e,
-  0x1e22e4e0, 0x1e1cc990, 0x1e16ae2c, 0x1e1092b6, 0x1e0a772e, 0x1e045b93,
-    0x1dfe3fe6, 0x1df82426,
-  0x1df20853, 0x1debec6f, 0x1de5d077, 0x1ddfb46e, 0x1dd99851, 0x1dd37c23,
-    0x1dcd5fe2, 0x1dc7438e,
-  0x1dc12729, 0x1dbb0ab0, 0x1db4ee26, 0x1daed189, 0x1da8b4da, 0x1da29819,
-    0x1d9c7b45, 0x1d965e5f,
-  0x1d904167, 0x1d8a245c, 0x1d840740, 0x1d7dea11, 0x1d77ccd0, 0x1d71af7d,
-    0x1d6b9217, 0x1d6574a0,
-  0x1d5f5716, 0x1d59397a, 0x1d531bcc, 0x1d4cfe0d, 0x1d46e03a, 0x1d40c256,
-    0x1d3aa460, 0x1d348658,
-  0x1d2e683e, 0x1d284a12, 0x1d222bd3, 0x1d1c0d83, 0x1d15ef21, 0x1d0fd0ad,
-    0x1d09b227, 0x1d03938f,
-  0x1cfd74e5, 0x1cf7562a, 0x1cf1375c, 0x1ceb187d, 0x1ce4f98c, 0x1cdeda89,
-    0x1cd8bb74, 0x1cd29c4d,
-  0x1ccc7d15, 0x1cc65dca, 0x1cc03e6e, 0x1cba1f01, 0x1cb3ff81, 0x1caddff0,
-    0x1ca7c04d, 0x1ca1a099,
-  0x1c9b80d3, 0x1c9560fb, 0x1c8f4112, 0x1c892117, 0x1c83010a, 0x1c7ce0ec,
-    0x1c76c0bc, 0x1c70a07b,
-  0x1c6a8028, 0x1c645fc3, 0x1c5e3f4d, 0x1c581ec6, 0x1c51fe2d, 0x1c4bdd83,
-    0x1c45bcc7, 0x1c3f9bf9,
-  0x1c397b1b, 0x1c335a2b, 0x1c2d3929, 0x1c271816, 0x1c20f6f2, 0x1c1ad5bc,
-    0x1c14b475, 0x1c0e931d,
-  0x1c0871b4, 0x1c025039, 0x1bfc2ead, 0x1bf60d0f, 0x1befeb60, 0x1be9c9a1,
-    0x1be3a7cf, 0x1bdd85ed,
-  0x1bd763fa, 0x1bd141f5, 0x1bcb1fdf, 0x1bc4fdb8, 0x1bbedb80, 0x1bb8b937,
-    0x1bb296dc, 0x1bac7471,
-  0x1ba651f5, 0x1ba02f67, 0x1b9a0cc8, 0x1b93ea19, 0x1b8dc758, 0x1b87a487,
-    0x1b8181a4, 0x1b7b5eb0,
-  0x1b753bac, 0x1b6f1897, 0x1b68f570, 0x1b62d239, 0x1b5caef1, 0x1b568b98,
-    0x1b50682e, 0x1b4a44b3,
-  0x1b442127, 0x1b3dfd8b, 0x1b37d9de, 0x1b31b620, 0x1b2b9251, 0x1b256e71,
-    0x1b1f4a81, 0x1b192680,
-  0x1b13026e, 0x1b0cde4c, 0x1b06ba19, 0x1b0095d5, 0x1afa7180, 0x1af44d1b,
-    0x1aee28a6, 0x1ae8041f,
-  0x1ae1df88, 0x1adbbae1, 0x1ad59629, 0x1acf7160, 0x1ac94c87, 0x1ac3279d,
-    0x1abd02a3, 0x1ab6dd98,
-  0x1ab0b87d, 0x1aaa9352, 0x1aa46e16, 0x1a9e48c9, 0x1a98236c, 0x1a91fdff,
-    0x1a8bd881, 0x1a85b2f3,
-  0x1a7f8d54, 0x1a7967a6, 0x1a7341e6, 0x1a6d1c17, 0x1a66f637, 0x1a60d047,
-    0x1a5aaa47, 0x1a548436,
-  0x1a4e5e15, 0x1a4837e4, 0x1a4211a3, 0x1a3beb52, 0x1a35c4f0, 0x1a2f9e7e,
-    0x1a2977fc, 0x1a23516a,
-  0x1a1d2ac8, 0x1a170416, 0x1a10dd53, 0x1a0ab681, 0x1a048f9e, 0x19fe68ac,
-    0x19f841a9, 0x19f21a96,
-  0x19ebf374, 0x19e5cc41, 0x19dfa4fe, 0x19d97dac, 0x19d35649, 0x19cd2ed7,
-    0x19c70754, 0x19c0dfc2,
-  0x19bab820, 0x19b4906e, 0x19ae68ac, 0x19a840da, 0x19a218f9, 0x199bf107,
-    0x1995c906, 0x198fa0f5,
-  0x198978d4, 0x198350a4, 0x197d2864, 0x19770014, 0x1970d7b4, 0x196aaf45,
-    0x196486c6, 0x195e5e37,
-  0x19583599, 0x19520ceb, 0x194be42d, 0x1945bb60, 0x193f9283, 0x19396997,
-    0x1933409b, 0x192d178f,
-  0x1926ee74, 0x1920c54a, 0x191a9c10, 0x191472c6, 0x190e496d, 0x19082005,
-    0x1901f68d, 0x18fbcd06,
-  0x18f5a36f, 0x18ef79c9, 0x18e95014, 0x18e3264f, 0x18dcfc7b, 0x18d6d297,
-    0x18d0a8a4, 0x18ca7ea2,
-  0x18c45491, 0x18be2a70, 0x18b80040, 0x18b1d601, 0x18ababb2, 0x18a58154,
-    0x189f56e8, 0x18992c6b,
-  0x189301e0, 0x188cd746, 0x1886ac9c, 0x188081e4, 0x187a571c, 0x18742c45,
-    0x186e015f, 0x1867d66a,
-  0x1861ab66, 0x185b8053, 0x18555530, 0x184f29ff, 0x1848febf, 0x1842d370,
-    0x183ca812, 0x18367ca5,
-  0x18305129, 0x182a259e, 0x1823fa04, 0x181dce5b, 0x1817a2a4, 0x181176dd,
-    0x180b4b08, 0x18051f24,
-  0x17fef331, 0x17f8c72f, 0x17f29b1e, 0x17ec6eff, 0x17e642d1, 0x17e01694,
-    0x17d9ea49, 0x17d3bdee,
-  0x17cd9186, 0x17c7650e, 0x17c13888, 0x17bb0bf3, 0x17b4df4f, 0x17aeb29d,
-    0x17a885dc, 0x17a2590d,
-  0x179c2c2f, 0x1795ff42, 0x178fd247, 0x1789a53d, 0x17837825, 0x177d4afe,
-    0x17771dc9, 0x1770f086,
-  0x176ac333, 0x176495d3, 0x175e6864, 0x17583ae7, 0x17520d5b, 0x174bdfc1,
-    0x1745b218, 0x173f8461,
-  0x1739569c, 0x173328c8, 0x172cfae6, 0x1726ccf6, 0x17209ef8, 0x171a70eb,
-    0x171442d0, 0x170e14a7,
-  0x1707e670, 0x1701b82a, 0x16fb89d6, 0x16f55b74, 0x16ef2d04, 0x16e8fe86,
-    0x16e2cff9, 0x16dca15f,
-  0x16d672b6, 0x16d043ff, 0x16ca153a, 0x16c3e667, 0x16bdb787, 0x16b78898,
-    0x16b1599b, 0x16ab2a90,
-  0x16a4fb77, 0x169ecc50, 0x16989d1b, 0x16926dd8, 0x168c3e87, 0x16860f29,
-    0x167fdfbc, 0x1679b042,
-  0x167380ba, 0x166d5123, 0x1667217f, 0x1660f1ce, 0x165ac20e, 0x16549241,
-    0x164e6266, 0x1648327d,
-  0x16420286, 0x163bd282, 0x1635a270, 0x162f7250, 0x16294222, 0x162311e7,
-    0x161ce19e, 0x1616b148,
-  0x161080e4, 0x160a5072, 0x16041ff3, 0x15fdef66, 0x15f7becc, 0x15f18e24,
-    0x15eb5d6e, 0x15e52cab,
-  0x15defbdb, 0x15d8cafd, 0x15d29a11, 0x15cc6918, 0x15c63812, 0x15c006fe,
-    0x15b9d5dd, 0x15b3a4ae,
-  0x15ad7372, 0x15a74228, 0x15a110d2, 0x159adf6e, 0x1594adfc, 0x158e7c7d,
-    0x15884af1, 0x15821958,
-  0x157be7b1, 0x1575b5fe, 0x156f843c, 0x1569526e, 0x15632093, 0x155ceeaa,
-    0x1556bcb4, 0x15508ab1,
-  0x154a58a1, 0x15442683, 0x153df459, 0x1537c221, 0x15318fdd, 0x152b5d8b,
-    0x15252b2c, 0x151ef8c0,
-  0x1518c648, 0x151293c2, 0x150c612f, 0x15062e8f, 0x14fffbe2, 0x14f9c928,
-    0x14f39662, 0x14ed638e,
-  0x14e730ae, 0x14e0fdc0, 0x14dacac6, 0x14d497bf, 0x14ce64ab, 0x14c8318a,
-    0x14c1fe5c, 0x14bbcb22,
-  0x14b597da, 0x14af6486, 0x14a93125, 0x14a2fdb8, 0x149cca3e, 0x149696b7,
-    0x14906323, 0x148a2f82,
-  0x1483fbd5, 0x147dc81c, 0x14779455, 0x14716082, 0x146b2ca3, 0x1464f8b7,
-    0x145ec4be, 0x145890b9,
-  0x14525ca7, 0x144c2888, 0x1445f45d, 0x143fc026, 0x14398be2, 0x14335792,
-    0x142d2335, 0x1426eecb,
-  0x1420ba56, 0x141a85d3, 0x14145145, 0x140e1caa, 0x1407e803, 0x1401b34f,
-    0x13fb7e8f, 0x13f549c3,
-  0x13ef14ea, 0x13e8e005, 0x13e2ab14, 0x13dc7616, 0x13d6410d, 0x13d00bf7,
-    0x13c9d6d4, 0x13c3a1a6,
-  0x13bd6c6b, 0x13b73725, 0x13b101d2, 0x13aacc73, 0x13a49707, 0x139e6190,
-    0x13982c0d, 0x1391f67d,
-  0x138bc0e1, 0x13858b3a, 0x137f5586, 0x13791fc6, 0x1372e9fb, 0x136cb423,
-    0x13667e3f, 0x13604850,
-  0x135a1254, 0x1353dc4c, 0x134da639, 0x1347701a, 0x134139ee, 0x133b03b7,
-    0x1334cd74, 0x132e9725,
-  0x132860ca, 0x13222a64, 0x131bf3f2, 0x1315bd73, 0x130f86ea, 0x13095054,
-    0x130319b3, 0x12fce305,
-  0x12f6ac4d, 0x12f07588, 0x12ea3eb8, 0x12e407dc, 0x12ddd0f4, 0x12d79a01,
-    0x12d16303, 0x12cb2bf8,
-  0x12c4f4e2, 0x12bebdc1, 0x12b88693, 0x12b24f5b, 0x12ac1817, 0x12a5e0c7,
-    0x129fa96c, 0x12997205,
-  0x12933a93, 0x128d0315, 0x1286cb8c, 0x128093f7, 0x127a5c57, 0x127424ac,
-    0x126decf5, 0x1267b533,
-  0x12617d66, 0x125b458d, 0x12550da9, 0x124ed5ba, 0x12489dbf, 0x124265b9,
-    0x123c2da8, 0x1235f58b,
-  0x122fbd63, 0x12298530, 0x12234cf2, 0x121d14a9, 0x1216dc54, 0x1210a3f5,
-    0x120a6b8a, 0x12043314,
-  0x11fdfa93, 0x11f7c207, 0x11f18970, 0x11eb50cd, 0x11e51820, 0x11dedf68,
-    0x11d8a6a4, 0x11d26dd6,
-  0x11cc34fc, 0x11c5fc18, 0x11bfc329, 0x11b98a2e, 0x11b35129, 0x11ad1819,
-    0x11a6defe, 0x11a0a5d8,
-  0x119a6ca7, 0x1194336b, 0x118dfa25, 0x1187c0d3, 0x11818777, 0x117b4e10,
-    0x1175149e, 0x116edb22,
-  0x1168a19b, 0x11626809, 0x115c2e6c, 0x1155f4c4, 0x114fbb12, 0x11498156,
-    0x1143478e, 0x113d0dbc,
-  0x1136d3df, 0x113099f8, 0x112a6006, 0x11242609, 0x111dec02, 0x1117b1f0,
-    0x111177d4, 0x110b3dad,
-  0x1105037c, 0x10fec940, 0x10f88efa, 0x10f254a9, 0x10ec1a4e, 0x10e5dfe8,
-    0x10dfa578, 0x10d96afe,
-  0x10d33079, 0x10ccf5ea, 0x10c6bb50, 0x10c080ac, 0x10ba45fe, 0x10b40b45,
-    0x10add082, 0x10a795b5,
-  0x10a15ade, 0x109b1ffc, 0x1094e510, 0x108eaa1a, 0x10886f19, 0x1082340f,
-    0x107bf8fa, 0x1075bddb,
-  0x106f82b2, 0x1069477f, 0x10630c41, 0x105cd0fa, 0x105695a8, 0x10505a4d,
-    0x104a1ee7, 0x1043e377,
-  0x103da7fd, 0x10376c79, 0x103130ec, 0x102af554, 0x1024b9b2, 0x101e7e06,
-    0x10184251, 0x10120691,
-  0x100bcac7, 0x10058ef4, 0xfff5317, 0xff91730, 0xff2db3e, 0xfec9f44,
-    0xfe6633f, 0xfe02730,
-  0xfd9eb18, 0xfd3aef6, 0xfcd72ca, 0xfc73695, 0xfc0fa55, 0xfbabe0c, 0xfb481ba,
-    0xfae455d,
-  0xfa808f7, 0xfa1cc87, 0xf9b900e, 0xf95538b, 0xf8f16fe, 0xf88da68, 0xf829dc8,
-    0xf7c611f,
-  0xf76246c, 0xf6fe7af, 0xf69aae9, 0xf636e1a, 0xf5d3141, 0xf56f45e, 0xf50b773,
-    0xf4a7a7d,
-  0xf443d7e, 0xf3e0076, 0xf37c365, 0xf318649, 0xf2b4925, 0xf250bf7, 0xf1ecec0,
-    0xf189180,
-  0xf125436, 0xf0c16e3, 0xf05d987, 0xeff9c21, 0xef95eb2, 0xef3213a, 0xeece3b9,
-    0xee6a62f,
-  0xee0689b, 0xeda2afe, 0xed3ed58, 0xecdafa9, 0xec771f1, 0xec1342f, 0xebaf665,
-    0xeb4b891,
-  0xeae7ab4, 0xea83ccf, 0xea1fee0, 0xe9bc0e8, 0xe9582e7, 0xe8f44dd, 0xe8906cb,
-    0xe82c8af,
-  0xe7c8a8a, 0xe764c5c, 0xe700e26, 0xe69cfe6, 0xe63919e, 0xe5d534d, 0xe5714f3,
-    0xe50d690,
-  0xe4a9824, 0xe4459af, 0xe3e1b32, 0xe37dcac, 0xe319e1d, 0xe2b5f85, 0xe2520e5,
-    0xe1ee23c,
-  0xe18a38a, 0xe1264cf, 0xe0c260c, 0xe05e740, 0xdffa86b, 0xdf9698e, 0xdf32aa8,
-    0xdecebba,
-  0xde6acc3, 0xde06dc3, 0xdda2ebb, 0xdd3efab, 0xdcdb091, 0xdc77170, 0xdc13245,
-    0xdbaf313,
-  0xdb4b3d7, 0xdae7494, 0xda83548, 0xda1f5f3, 0xd9bb696, 0xd957731, 0xd8f37c3,
-    0xd88f84d,
-  0xd82b8cf, 0xd7c7948, 0xd7639b9, 0xd6ffa22, 0xd69ba82, 0xd637ada, 0xd5d3b2a,
-    0xd56fb71,
-  0xd50bbb1, 0xd4a7be8, 0xd443c17, 0xd3dfc3e, 0xd37bc5c, 0xd317c73, 0xd2b3c81,
-    0xd24fc87,
-  0xd1ebc85, 0xd187c7b, 0xd123c69, 0xd0bfc4f, 0xd05bc2d, 0xcff7c02, 0xcf93bd0,
-    0xcf2fb96,
-  0xcecbb53, 0xce67b09, 0xce03ab7, 0xcd9fa5d, 0xcd3b9fb, 0xccd7991, 0xcc7391f,
-    0xcc0f8a5,
-  0xcbab824, 0xcb4779a, 0xcae3709, 0xca7f670, 0xca1b5cf, 0xc9b7526, 0xc953475,
-    0xc8ef3bd,
-  0xc88b2fd, 0xc827235, 0xc7c3166, 0xc75f08f, 0xc6fafb0, 0xc696ec9, 0xc632ddb,
-    0xc5cece5,
-  0xc56abe8, 0xc506ae3, 0xc4a29d6, 0xc43e8c2, 0xc3da7a6, 0xc376683, 0xc312558,
-    0xc2ae425,
-  0xc24a2eb, 0xc1e61aa, 0xc182061, 0xc11df11, 0xc0b9db9, 0xc055c5a, 0xbff1af3,
-    0xbf8d985,
-  0xbf29810, 0xbec5693, 0xbe6150f, 0xbdfd383, 0xbd991f0, 0xbd35056, 0xbcd0eb5,
-    0xbc6cd0c,
-  0xbc08b5c, 0xbba49a5, 0xbb407e7, 0xbadc621, 0xba78454, 0xba14280, 0xb9b00a5,
-    0xb94bec2,
-  0xb8e7cd9, 0xb883ae8, 0xb81f8f0, 0xb7bb6f2, 0xb7574ec, 0xb6f32df, 0xb68f0cb,
-    0xb62aeaf,
-  0xb5c6c8d, 0xb562a64, 0xb4fe834, 0xb49a5fd, 0xb4363bf, 0xb3d217a, 0xb36df2e,
-    0xb309cdb,
-  0xb2a5a81, 0xb241820, 0xb1dd5b9, 0xb17934b, 0xb1150d5, 0xb0b0e59, 0xb04cbd6,
-    0xafe894d,
-  0xaf846bc, 0xaf20425, 0xaebc187, 0xae57ee2, 0xadf3c37, 0xad8f985, 0xad2b6cc,
-    0xacc740c,
-  0xac63146, 0xabfee79, 0xab9aba6, 0xab368cc, 0xaad25eb, 0xaa6e304, 0xaa0a016,
-    0xa9a5d22,
-  0xa941a27, 0xa8dd725, 0xa87941d, 0xa81510f, 0xa7b0dfa, 0xa74cadf, 0xa6e87bd,
-    0xa684495,
-  0xa620166, 0xa5bbe31, 0xa557af5, 0xa4f37b3, 0xa48f46b, 0xa42b11d, 0xa3c6dc8,
-    0xa362a6d,
-  0xa2fe70b, 0xa29a3a3, 0xa236035, 0xa1d1cc1, 0xa16d946, 0xa1095c6, 0xa0a523f,
-    0xa040eb1,
-  0x9fdcb1e, 0x9f78784, 0x9f143e5, 0x9eb003f, 0x9e4bc93, 0x9de78e1, 0x9d83529,
-    0x9d1f16b,
-  0x9cbada7, 0x9c569dc, 0x9bf260c, 0x9b8e236, 0x9b29e59, 0x9ac5a77, 0x9a6168f,
-    0x99fd2a0,
-  0x9998eac, 0x9934ab2, 0x98d06b2, 0x986c2ac, 0x9807ea1, 0x97a3a8f, 0x973f678,
-    0x96db25a,
-  0x9676e37, 0x9612a0e, 0x95ae5e0, 0x954a1ab, 0x94e5d71, 0x9481931, 0x941d4eb,
-    0x93b90a0,
-  0x9354c4f, 0x92f07f8, 0x928c39b, 0x9227f39, 0x91c3ad2, 0x915f664, 0x90fb1f1,
-    0x9096d79,
-  0x90328fb, 0x8fce477, 0x8f69fee, 0x8f05b5f, 0x8ea16cb, 0x8e3d231, 0x8dd8d92,
-    0x8d748ed,
-  0x8d10443, 0x8cabf93, 0x8c47ade, 0x8be3624, 0x8b7f164, 0x8b1ac9f, 0x8ab67d4,
-    0x8a52304,
-  0x89ede2f, 0x8989955, 0x8925475, 0x88c0f90, 0x885caa5, 0x87f85b5, 0x87940c1,
-    0x872fbc6,
-  0x86cb6c7, 0x86671c2, 0x8602cb9, 0x859e7aa, 0x853a296, 0x84d5d7d, 0x847185e,
-    0x840d33b,
-  0x83a8e12, 0x83448e5, 0x82e03b2, 0x827be7a, 0x821793e, 0x81b33fc, 0x814eeb5,
-    0x80ea969,
-  0x8086419, 0x8021ec3, 0x7fbd968, 0x7f59409, 0x7ef4ea4, 0x7e9093b, 0x7e2c3cd,
-    0x7dc7e5a,
-  0x7d638e2, 0x7cff365, 0x7c9ade4, 0x7c3685d, 0x7bd22d2, 0x7b6dd42, 0x7b097ad,
-    0x7aa5214,
-  0x7a40c76, 0x79dc6d3, 0x797812b, 0x7913b7f, 0x78af5ce, 0x784b019, 0x77e6a5e,
-    0x77824a0,
-  0x771dedc, 0x76b9914, 0x7655347, 0x75f0d76, 0x758c7a1, 0x75281c6, 0x74c3be7,
-    0x745f604,
-  0x73fb01c, 0x7396a30, 0x733243f, 0x72cde4a, 0x7269851, 0x7205253, 0x71a0c50,
-    0x713c64a,
-  0x70d803f, 0x7073a2f, 0x700f41b, 0x6faae03, 0x6f467e7, 0x6ee21c6, 0x6e7dba1,
-    0x6e19578,
-  0x6db4f4a, 0x6d50919, 0x6cec2e3, 0x6c87ca9, 0x6c2366a, 0x6bbf028, 0x6b5a9e1,
-    0x6af6396,
-  0x6a91d47, 0x6a2d6f4, 0x69c909d, 0x6964a42, 0x69003e3, 0x689bd80, 0x6837718,
-    0x67d30ad,
-  0x676ea3d, 0x670a3ca, 0x66a5d53, 0x66416d8, 0x65dd058, 0x65789d5, 0x651434e,
-    0x64afcc3,
-  0x644b634, 0x63e6fa2, 0x638290b, 0x631e271, 0x62b9bd3, 0x6255531, 0x61f0e8b,
-    0x618c7e1,
-  0x6128134, 0x60c3a83, 0x605f3ce, 0x5ffad15, 0x5f96659, 0x5f31f99, 0x5ecd8d6,
-    0x5e6920e,
-  0x5e04b43, 0x5da0475, 0x5d3bda3, 0x5cd76cd, 0x5c72ff4, 0x5c0e917, 0x5baa237,
-    0x5b45b53,
-  0x5ae146b, 0x5a7cd80, 0x5a18692, 0x59b3fa0, 0x594f8aa, 0x58eb1b2, 0x5886ab5,
-    0x58223b6,
-  0x57bdcb3, 0x57595ac, 0x56f4ea2, 0x5690795, 0x562c085, 0x55c7971, 0x556325a,
-    0x54feb3f,
-  0x549a422, 0x5435d01, 0x53d15dd, 0x536ceb5, 0x530878a, 0x52a405d, 0x523f92c,
-    0x51db1f7,
-  0x5176ac0, 0x5112385, 0x50adc48, 0x5049507, 0x4fe4dc3, 0x4f8067c, 0x4f1bf32,
-    0x4eb77e5,
-  0x4e53095, 0x4dee942, 0x4d8a1ec, 0x4d25a93, 0x4cc1337, 0x4c5cbd8, 0x4bf8476,
-    0x4b93d11,
-  0x4b2f5a9, 0x4acae3e, 0x4a666d1, 0x4a01f60, 0x499d7ed, 0x4939077, 0x48d48fe,
-    0x4870182,
-  0x480ba04, 0x47a7282, 0x4742afe, 0x46de377, 0x4679bee, 0x4615461, 0x45b0cd2,
-    0x454c541,
-  0x44e7dac, 0x4483615, 0x441ee7c, 0x43ba6df, 0x4355f40, 0x42f179f, 0x428cffb,
-    0x4228854,
-  0x41c40ab, 0x415f8ff, 0x40fb151, 0x40969a0, 0x40321ed, 0x3fcda37, 0x3f6927f,
-    0x3f04ac4,
-  0x3ea0307, 0x3e3bb48, 0x3dd7386, 0x3d72bc2, 0x3d0e3fb, 0x3ca9c32, 0x3c45467,
-    0x3be0c99,
-  0x3b7c4c9, 0x3b17cf7, 0x3ab3523, 0x3a4ed4c, 0x39ea573, 0x3985d97, 0x39215ba,
-    0x38bcdda,
-  0x38585f8, 0x37f3e14, 0x378f62e, 0x372ae46, 0x36c665b, 0x3661e6f, 0x35fd680,
-    0x3598e8f,
-  0x353469c, 0x34cfea8, 0x346b6b1, 0x3406eb8, 0x33a26bd, 0x333dec0, 0x32d96c1,
-    0x3274ec0,
-  0x32106bd, 0x31abeb9, 0x31476b2, 0x30e2ea9, 0x307e69f, 0x3019e93, 0x2fb5684,
-    0x2f50e74,
-  0x2eec663, 0x2e87e4f, 0x2e2363a, 0x2dbee22, 0x2d5a609, 0x2cf5def, 0x2c915d2,
-    0x2c2cdb4,
-  0x2bc8594, 0x2b63d73, 0x2aff54f, 0x2a9ad2a, 0x2a36504, 0x29d1cdc, 0x296d4b2,
-    0x2908c87,
-  0x28a445a, 0x283fc2b, 0x27db3fb, 0x2776bc9, 0x2712396, 0x26adb62, 0x264932b,
-    0x25e4af4,
-  0x25802bb, 0x251ba80, 0x24b7244, 0x2452a07, 0x23ee1c8, 0x2389988, 0x2325147,
-    0x22c0904,
-  0x225c0bf, 0x21f787a, 0x2193033, 0x212e7eb, 0x20c9fa1, 0x2065757, 0x2000f0b,
-    0x1f9c6be,
-  0x1f37e6f, 0x1ed3620, 0x1e6edcf, 0x1e0a57d, 0x1da5d2a, 0x1d414d6, 0x1cdcc80,
-    0x1c7842a,
-  0x1c13bd2, 0x1baf37a, 0x1b4ab20, 0x1ae62c5, 0x1a81a69, 0x1a1d20c, 0x19b89ae,
-    0x1954150,
-  0x18ef8f0, 0x188b08f, 0x182682d, 0x17c1fcb, 0x175d767, 0x16f8f03, 0x169469d,
-    0x162fe37,
-  0x15cb5d0, 0x1566d68, 0x15024ff, 0x149dc96, 0x143942b, 0x13d4bc0, 0x1370354,
-    0x130bae7,
-  0x12a727a, 0x1242a0c, 0x11de19d, 0x117992e, 0x11150be, 0x10b084d, 0x104bfdb,
-    0xfe7769,
-  0xf82ef6, 0xf1e683, 0xeb9e0f, 0xe5559b, 0xdf0d26, 0xd8c4b0, 0xd27c3a,
-    0xcc33c3,
-  0xc5eb4c, 0xbfa2d5, 0xb95a5d, 0xb311e4, 0xacc96b, 0xa680f2, 0xa03878,
-    0x99effe,
-  0x93a784, 0x8d5f09, 0x87168e, 0x80ce12, 0x7a8597, 0x743d1a, 0x6df49e,
-    0x67ac21,
-  0x6163a5, 0x5b1b27, 0x54d2aa, 0x4e8a2c, 0x4841af, 0x41f931, 0x3bb0b3,
-    0x356835,
-  0x2f1fb6, 0x28d738, 0x228eb9, 0x1c463b, 0x15fdbc, 0xfb53d, 0x96cbe, 0x3243f,
-
-};
-
-/**    
- * @brief  Initialization function for the Q31 DCT4/IDCT4.   
- * @param[in,out] *S         points to an instance of Q31 DCT4/IDCT4 structure.   
- * @param[in]     *S_RFFT    points to an instance of Q31 RFFT/RIFFT structure   
- * @param[in]     *S_CFFT    points to an instance of Q31 CFFT/CIFFT structure   
- * @param[in]     N          length of the DCT4.   
- * @param[in]     Nby2       half of the length of the DCT4.   
- * @param[in]     normalize  normalizing factor.   
- * @return		  arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.   
- * \par Normalizing factor:    
- * The normalizing factor is sqrt(2/N), which depends on the size of transform N.    
- * Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes:    
- * \image html dct4NormalizingQ31Table.gif    
- */
-
-arm_status arm_dct4_init_q31(
-  arm_dct4_instance_q31 * S,
-  arm_rfft_instance_q31 * S_RFFT,
-  arm_cfft_radix4_instance_q31 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  q31_t normalize)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /* Initializing the pointer array with the weight table base addresses of different lengths */
-  q31_t *twiddlePtr[4] = { (q31_t *) WeightsQ31_128, (q31_t *) WeightsQ31_512,
-    (q31_t *) WeightsQ31_2048, (q31_t *) WeightsQ31_8192
-  };
-
-  /* Initializing the pointer array with the cos factor table base addresses of different lengths */
-  q31_t *pCosFactor[4] =
-    { (q31_t *) cos_factorsQ31_128, (q31_t *) cos_factorsQ31_512,
-    (q31_t *) cos_factorsQ31_2048, (q31_t *) cos_factorsQ31_8192
-  };
-
-  /* Initialize the DCT4 length */
-  S->N = N;
-
-  /* Initialize the half of DCT4 length */
-  S->Nby2 = Nby2;
-
-  /* Initialize the DCT4 Normalizing factor */
-  S->normalize = normalize;
-
-  /* Initialize Real FFT Instance */
-  S->pRfft = S_RFFT;
-
-  /* Initialize Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  switch (N)
-  {
-    /* Initialize the table modifier values */
-  case 8192u:
-    S->pTwiddle = twiddlePtr[3];
-    S->pCosFactor = pCosFactor[3];
-    break;
-  case 2048u:
-    S->pTwiddle = twiddlePtr[2];
-    S->pCosFactor = pCosFactor[2];
-    break;
-  case 512u:
-    S->pTwiddle = twiddlePtr[1];
-    S->pCosFactor = pCosFactor[1];
-    break;
-  case 128u:
-    S->pTwiddle = twiddlePtr[0];
-    S->pCosFactor = pCosFactor[0];
-    break;
-  default:
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-
-  /* Initialize the RFFT/RIFFT Function */
-  arm_rfft_init_q31(S->pRfft,  S->N, 0, 1);
-
-  /* return the status of DCT4 Init function */
-  return (status);
-}
-
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c
deleted file mode 100755
index 38131d5a..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c
+++ /dev/null
@@ -1,394 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_q15.c    
-*    
-* Description:	Processing function of DCT4 & IDCT4 Q15.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @addtogroup DCT4_IDCT4    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 DCT4/IDCT4.   
- * @param[in]       *S             points to an instance of the Q15 DCT4 structure.   
- * @param[in]       *pState        points to state buffer.   
- * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.   
- * @return none.   
- *     
- * \par Input an output formats:    
- * Internally inputs are downscaled in the RFFT process function to avoid overflows.    
- * Number of bits downscaled, depends on the size of the transform.    
- * The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:     
- *    
- * \image html dct4FormatsQ15Table.gif    
- */
-
-void arm_dct4_q15(
-  const arm_dct4_instance_q15 * S,
-  q15_t * pState,
-  q15_t * pInlineBuffer)
-{
-  uint32_t i;                                    /* Loop counter */
-  q15_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
-  q15_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
-  q15_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
-  q15_t in;                                      /* Temporary variable */
-
-
-  /* DCT4 computation involves DCT2 (which is calculated using RFFT)    
-   * along with some pre-processing and post-processing.    
-   * Computational procedure is explained as follows:    
-   * (a) Pre-processing involves multiplying input with cos factor,    
-   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))    
-   *              where,    
-   *                 r(n) -- output of preprocessing    
-   *                 u(n) -- input to preprocessing(actual Source buffer)    
-   * (b) Calculation of DCT2 using FFT is divided into three steps:    
-   *                  Step1: Re-ordering of even and odd elements of input.    
-   *                  Step2: Calculating FFT of the re-ordered input.    
-   *                  Step3: Taking the real part of the product of FFT output and weights.    
-   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:    
-   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *                        where,    
-   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output    
-   * (d) Multiplying the output with the normalizing factor sqrt(2/N).    
-   */
-
-        /*-------- Pre-processing ------------*/
-  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
-  arm_mult_q15(pInlineBuffer, cosFact, pInlineBuffer, S->N);
-  arm_shift_q15(pInlineBuffer, 1, pInlineBuffer, S->N);
-
-  /* ----------------------------------------------------------------    
-   * Step1: Re-ordering of even and odd elements as    
-   *             pState[i] =  pInlineBuffer[2*i] and    
-   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2    
-   ---------------------------------------------------------------------*/
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
-  pS2 = pState + (S->N - 1u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
-  i = (uint32_t) S->Nby2 >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = (uint32_t) S->N >> 2u;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.    
-   * Compute 4 outputs at a time */
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q15(S->pRfft, pInlineBuffer, pState);
-
- /*----------------------------------------------------------------------    
-  *  Step3: Multiply the FFT output with the weights.    
-  *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N);
-
-  /* The output of complex multiplication is in 3.13 format.    
-   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
-  arm_shift_q15(pState, 2, pState, S->N * 2);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
-  i = ((uint32_t) S->N - 1u) >> 2u;
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ >> 1u;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  i = ((uint32_t) S->N - 1u) % 0x4u;
-
-  while(i > 0u)
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-
-   /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = (uint32_t) S->N >> 2u;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
-
-    in = *pbuff;
-    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
-
-    in = *pbuff;
-    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
-
-    in = *pbuff;
-    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initializing the loop counter to N/2 */
-  i = (uint32_t) S->Nby2;
-
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter */
-  i = (uint32_t) S->N;
-
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q15(S->pRfft, pInlineBuffer, pState);
-
- /*----------------------------------------------------------------------    
-  *  Step3: Multiply the FFT output with the weights.    
-  *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N);
-
-  /* The output of complex multiplication is in 3.13 format.    
-   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
-  arm_shift_q15(pState, 2, pState, S->N * 2);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* Initializing the loop counter */
-  i = ((uint32_t) S->N - 1u);
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ >> 1u;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-   /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter */
-  i = (uint32_t) S->N;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c
deleted file mode 100755
index b8ec1518..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c
+++ /dev/null
@@ -1,395 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_q31.c    
-*    
-* Description:	Processing function of DCT4 & IDCT4 Q31.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @addtogroup DCT4_IDCT4    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 DCT4/IDCT4.   
- * @param[in]       *S             points to an instance of the Q31 DCT4 structure.   
- * @param[in]       *pState        points to state buffer.   
- * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.   
- * @return none.   
- * \par Input an output formats:    
- * Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process,    
- * as the conversion from DCT2 to DCT4 involves one subtraction.    
- * Internally inputs are downscaled in the RFFT process function to avoid overflows.    
- * Number of bits downscaled, depends on the size of the transform.    
- * The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:     
- *    
- * \image html dct4FormatsQ31Table.gif    
- */
-
-void arm_dct4_q31(
-  const arm_dct4_instance_q31 * S,
-  q31_t * pState,
-  q31_t * pInlineBuffer)
-{
-  uint16_t i;                                    /* Loop counter */
-  q31_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
-  q31_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
-  q31_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
-  q31_t in;                                      /* Temporary variable */
-
-
-  /* DCT4 computation involves DCT2 (which is calculated using RFFT)    
-   * along with some pre-processing and post-processing.    
-   * Computational procedure is explained as follows:    
-   * (a) Pre-processing involves multiplying input with cos factor,    
-   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))    
-   *              where,    
-   *                 r(n) -- output of preprocessing    
-   *                 u(n) -- input to preprocessing(actual Source buffer)    
-   * (b) Calculation of DCT2 using FFT is divided into three steps:    
-   *                  Step1: Re-ordering of even and odd elements of input.    
-   *                  Step2: Calculating FFT of the re-ordered input.    
-   *                  Step3: Taking the real part of the product of FFT output and weights.    
-   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:    
-   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *                        where,    
-   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output    
-   * (d) Multiplying the output with the normalizing factor sqrt(2/N).    
-   */
-
-        /*-------- Pre-processing ------------*/
-  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
-  arm_mult_q31(pInlineBuffer, cosFact, pInlineBuffer, S->N);
-  arm_shift_q31(pInlineBuffer, 1, pInlineBuffer, S->N);
-
-  /* ----------------------------------------------------------------    
-   * Step1: Re-ordering of even and odd elements as    
-   *             pState[i] =  pInlineBuffer[2*i] and    
-   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2    
-   ---------------------------------------------------------------------*/
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
-  pS2 = pState + (S->N - 1u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
-  i = S->Nby2 >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = S->N >> 2u;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.    
-   * Compute 4 outputs at a time */
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q31(S->pRfft, pInlineBuffer, pState);
-
-  /*----------------------------------------------------------------------    
-   *  Step3: Multiply the FFT output with the weights.    
-   *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N);
-
-  /* The output of complex multiplication is in 3.29 format.    
-   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
-  arm_shift_q31(pState, 2, pState, S->N * 2);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
-  i = (S->N - 1u) >> 2u;
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ >> 1u;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  i = (S->N - 1u) % 0x4u;
-
-  while(i > 0u)
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-
-        /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = S->N >> 2u;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
-
-    in = *pbuff;
-    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
-
-    in = *pbuff;
-    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
-
-    in = *pbuff;
-    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initializing the loop counter to N/2 */
-  i = S->Nby2;
-
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter */
-  i = S->N;
-
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q31(S->pRfft, pInlineBuffer, pState);
-
-  /*----------------------------------------------------------------------    
-   *  Step3: Multiply the FFT output with the weights.    
-   *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N);
-
-  /* The output of complex multiplication is in 3.29 format.    
-   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
-  arm_shift_q31(pState, 2, pState, S->N * 2);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ >> 1u;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* Initializing the loop counter */
-  i = (S->N - 1u);
-
-  while(i > 0u)
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-
-        /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter */
-  i = S->N;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c
deleted file mode 100755
index b72f8fd9..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c
+++ /dev/null
@@ -1,329 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_f32.c    
-*    
-* Description:	RFFT & RIFFT Floating point process function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-extern void arm_radix4_butterfly_f32(
-    float32_t * pSrc,
-    uint16_t fftLen,
-    float32_t * pCoef,
-    uint16_t twidCoefModifier);
-
-extern void arm_radix4_butterfly_inverse_f32(
-    float32_t * pSrc,
-    uint16_t fftLen,
-    float32_t * pCoef,
-    uint16_t twidCoefModifier,
-    float32_t onebyfftLen);
-
-extern void arm_bitreversal_f32(
-    float32_t * pSrc,
-    uint16_t fftSize,
-    uint16_t bitRevFactor,
-    uint16_t * pBitRevTab);
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/*--------------------------------------------------------------------    
- *		Internal functions prototypes    
- *--------------------------------------------------------------------*/
-
-void arm_split_rfft_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pATable,
-  float32_t * pBTable,
-  float32_t * pDst,
-  uint32_t modifier);
-void arm_split_rifft_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pATable,
-  float32_t * pBTable,
-  float32_t * pDst,
-  uint32_t modifier);
-
-/**    
- * @addtogroup RealFFT    
- * @{    
- */
-
-/**    
- * @brief Processing function for the floating-point RFFT/RIFFT.   
- * @deprecated Do not use this function.  It has been superceded by \ref arm_rfft_fast_f32 and will be removed
- * in the future.
- * @param[in]  *S    points to an instance of the floating-point RFFT/RIFFT structure.   
- * @param[in]  *pSrc points to the input buffer.   
- * @param[out] *pDst points to the output buffer.   
- * @return none.   
- */
-
-void arm_rfft_f32(
-  const arm_rfft_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst)
-{
-  const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft;
-
-
-  /* Calculation of Real IFFT of input */
-  if(S->ifftFlagR == 1u)
-  {
-    /*  Real IFFT core process */
-    arm_split_rifft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal,
-                        S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-
-
-    /* Complex radix-4 IFFT process */
-    arm_radix4_butterfly_inverse_f32(pDst, S_CFFT->fftLen,
-                                     S_CFFT->pTwiddle,
-                                     S_CFFT->twidCoefModifier,
-                                     S_CFFT->onebyfftLen);
-
-    /* Bit reversal process */
-    if(S->bitReverseFlagR == 1u)
-    {
-      arm_bitreversal_f32(pDst, S_CFFT->fftLen,
-                          S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
-    }
-  }
-  else
-  {
-
-    /* Calculation of RFFT of input */
-
-    /* Complex radix-4 FFT process */
-    arm_radix4_butterfly_f32(pSrc, S_CFFT->fftLen,
-                             S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
-
-    /* Bit reversal process */
-    if(S->bitReverseFlagR == 1u)
-    {
-      arm_bitreversal_f32(pSrc, S_CFFT->fftLen,
-                          S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
-    }
-
-
-    /*  Real FFT core process */
-    arm_split_rfft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal,
-                       S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-  }
-
-}
-
-/**    
-   * @} end of RealFFT group    
-   */
-
-/**    
- * @brief  Core Real FFT process    
- * @param[in]   *pSrc 				points to the input buffer.    
- * @param[in]   fftLen  			length of FFT.    
- * @param[in]   *pATable 			points to the twiddle Coef A buffer.    
- * @param[in]   *pBTable 			points to the twiddle Coef B buffer.    
- * @param[out]  *pDst 				points to the output buffer.    
- * @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.    
- */
-
-void arm_split_rfft_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pATable,
-  float32_t * pBTable,
-  float32_t * pDst,
-  uint32_t modifier)
-{
-  uint32_t i;                                    /* Loop Counter */
-  float32_t outR, outI;                          /* Temporary variables for output */
-  float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
-  float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
-  float32_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4u * fftLen) - 1u];      /* temp pointers for output buffer */
-  float32_t *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2u * fftLen) - 1u];      /* temp pointers for input buffer */
-
-  /* Init coefficient pointers */
-  pCoefA = &pATable[modifier * 2u];
-  pCoefB = &pBTable[modifier * 2u];
-
-  i = fftLen - 1u;
-
-  while(i > 0u)
-  {
-    /*    
-       outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]    
-       + pSrc[2 * n - 2 * i] * pBTable[2 * i] +    
-       pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-     */
-
-    /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +    
-       pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
-
-    /* read pATable[2 * i] */
-    CoefA1 = *pCoefA++;
-    /* pATable[2 * i + 1] */
-    CoefA2 = *pCoefA;
-
-    /* pSrc[2 * i] * pATable[2 * i] */
-    outR = *pSrc1 * CoefA1;
-    /* pSrc[2 * i] * CoefA2 */
-    outI = *pSrc1++ * CoefA2;
-
-    /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
-    outR -= (*pSrc1 + *pSrc2) * CoefA2;
-    /* pSrc[2 * i + 1] * CoefA1 */
-    outI += *pSrc1++ * CoefA1;
-
-    CoefB1 = *pCoefB;
-
-    /* pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
-    outI -= *pSrc2-- * CoefB1;
-    /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
-    outI -= *pSrc2 * CoefA2;
-
-    /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
-    outR += *pSrc2-- * CoefB1;
-
-    /* write output */
-    *pDst1++ = outR;
-    *pDst1++ = outI;
-
-    /* write complex conjugate output */
-    *pDst2-- = -outI;
-    *pDst2-- = outR;
-
-    /* update coefficient pointer */
-    pCoefB = pCoefB + (modifier * 2u);
-    pCoefA = pCoefA + ((modifier * 2u) - 1u);
-
-    i--;
-
-  }
-
-  pDst[2u * fftLen] = pSrc[0] - pSrc[1];
-  pDst[(2u * fftLen) + 1u] = 0.0f;
-
-  pDst[0] = pSrc[0] + pSrc[1];
-  pDst[1] = 0.0f;
-
-}
-
-
-/**    
- * @brief  Core Real IFFT process    
- * @param[in]   *pSrc 				points to the input buffer.    
- * @param[in]   fftLen  			length of FFT.   
- * @param[in]   *pATable 			points to the twiddle Coef A buffer.   
- * @param[in]   *pBTable 			points to the twiddle Coef B buffer.   
- * @param[out]  *pDst 				points to the output buffer.   
- * @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.    
- * @return none.    
- */
-
-void arm_split_rifft_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pATable,
-  float32_t * pBTable,
-  float32_t * pDst,
-  uint32_t modifier)
-{
-  float32_t outR, outI;                          /* Temporary variables for output */
-  float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
-  float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
-  float32_t *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2u * fftLen) + 1u];
-
-  pCoefA = &pATable[0];
-  pCoefB = &pBTable[0];
-
-  while(fftLen > 0u)
-  {
-    /*    
-       outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +    
-       pIn[2 * n - 2 * i] * pBTable[2 * i] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-
-       outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -    
-       pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);    
-
-     */
-
-    CoefA1 = *pCoefA++;
-    CoefA2 = *pCoefA;
-
-    /* outR = (pSrc[2 * i] * CoefA1 */
-    outR = *pSrc1 * CoefA1;
-
-    /* - pSrc[2 * i] * CoefA2 */
-    outI = -(*pSrc1++) * CoefA2;
-
-    /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
-    outR += (*pSrc1 + *pSrc2) * CoefA2;
-
-    /* pSrc[2 * i + 1] * CoefA1 */
-    outI += (*pSrc1++) * CoefA1;
-
-    CoefB1 = *pCoefB;
-
-    /* - pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
-    outI -= *pSrc2-- * CoefB1;
-
-    /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
-    outR += *pSrc2 * CoefB1;
-
-    /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
-    outI += *pSrc2-- * CoefA2;
-
-    /* write output */
-    *pDst++ = outR;
-    *pDst++ = outI;
-
-    /* update coefficient pointer */
-    pCoefB = pCoefB + (modifier * 2u);
-    pCoefA = pCoefA + ((modifier * 2u) - 1u);
-
-    /* Decrement loop count */
-    fftLen--;
-  }
-
-}
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_f32.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_f32.c
deleted file mode 100755
index d4970b6b..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_f32.c
+++ /dev/null
@@ -1,353 +0,0 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*
-* Project: 	    CMSIS DSP Library
-* Title:	    arm_rfft_f32.c
-*
-* Description:	RFFT & RIFFT Floating point process function
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-void stage_rfft_f32(
-  arm_rfft_fast_instance_f32 * S,
-  float32_t * p, float32_t * pOut)
-{
-   uint32_t  k;								   /* Loop Counter                     */
-   float32_t twR, twI;						   /* RFFT Twiddle coefficients        */
-   float32_t * pCoeff = S->pTwiddleRFFT;  /* Points to RFFT Twiddle factors   */
-   float32_t *pA = p;						   /* increasing pointer               */
-   float32_t *pB = p;						   /* decreasing pointer               */
-   float32_t xAR, xAI, xBR, xBI;				/* temporary variables              */
-   float32_t t1a, t1b;				         /* temporary variables              */
-   float32_t p0, p1, p2, p3;				   /* temporary variables              */
-
-
-   k = (S->Sint).fftLen - 1;					
-
-   /* Pack first and last sample of the frequency domain together */
-
-   xBR = pB[0];
-   xBI = pB[1];
-   xAR = pA[0];
-   xAI = pA[1];
-
-   twR = *pCoeff++ ;
-   twI = *pCoeff++ ;
-   
-   // U1 = XA(1) + XB(1); % It is real
-   t1a = xBR + xAR  ;
-   
-   // U2 = XB(1) - XA(1); % It is imaginary
-   t1b = xBI + xAI  ;
-
-   // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
-   // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
-   *pOut++ = 0.5f * ( t1a + t1b );
-   *pOut++ = 0.5f * ( t1a - t1b );
-
-   // XA(1) = 1/2*( U1 - imag(U2) +  i*( U1 +imag(U2) ));
-   pB  = p + 2*k;
-   pA += 2;
-
-   do
-   {
-      /*
-         function X = my_split_rfft(X, ifftFlag)
-         % X is a series of real numbers
-         L  = length(X);
-         XC = X(1:2:end) +i*X(2:2:end);
-         XA = fft(XC);
-         XB = conj(XA([1 end:-1:2]));
-         TW = i*exp(-2*pi*i*[0:L/2-1]/L).';
-         for l = 2:L/2
-            XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l)));
-         end
-         XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1))));
-         X = XA;
-      */
-
-      xBI = pB[1];
-      xBR = pB[0];
-      xAR = pA[0];
-      xAI = pA[1];
-
-      twR = *pCoeff++;
-      twI = *pCoeff++;
-
-      t1a = xBR - xAR ;
-      t1b = xBI + xAI ;
-
-      // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
-      // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
-      p0 = twR * t1a;
-      p1 = twI * t1a;
-      p2 = twR * t1b;
-      p3 = twI * t1b;
-
-      *pOut++ = 0.5f * (xAR + xBR + p0 + p3 ); //xAR
-      *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI
-
-      pA += 2;
-      pB -= 2;
-      k--;
-   } while(k > 0u);
-}
-
-/* Prepares data for inverse cfft */
-void merge_rfft_f32(
-arm_rfft_fast_instance_f32 * S,
-float32_t * p, float32_t * pOut)
-{
-   uint32_t  k;								/* Loop Counter                     */
-   float32_t twR, twI;						/* RFFT Twiddle coefficients        */
-   float32_t *pCoeff = S->pTwiddleRFFT;		/* Points to RFFT Twiddle factors   */
-   float32_t *pA = p;						/* increasing pointer               */
-   float32_t *pB = p;						/* decreasing pointer               */
-   float32_t xAR, xAI, xBR, xBI;			/* temporary variables              */
-   float32_t t1a, t1b, r, s, t, u;			/* temporary variables              */
-
-   k = (S->Sint).fftLen - 1;					
-
-   xAR = pA[0];
-   xAI = pA[1];
-
-   pCoeff += 2 ;
-
-   *pOut++ = 0.5f * ( xAR + xAI );
-   *pOut++ = 0.5f * ( xAR - xAI );
-
-   pB  =  p + 2*k ;
-   pA +=  2	   ;
-
-   while(k > 0u)
-   {
-      /* G is half of the frequency complex spectrum */
-      //for k = 2:N
-      //    Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2))));
-      xBI =   pB[1]    ;
-      xBR =   pB[0]    ;
-      xAR =  pA[0];
-      xAI =  pA[1];
-
-      twR = *pCoeff++;
-      twI = *pCoeff++;
-
-      t1a = xAR - xBR ;
-      t1b = xAI + xBI ;
-
-      r = twR * t1a;
-      s = twI * t1b;
-      t = twI * t1a;
-      u = twR * t1b;
-
-      // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI);
-      // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI);
-      *pOut++ = 0.5f * (xAR + xBR - r - s ); //xAR
-      *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI
-
-      pA += 2;
-      pB -= 2;
-      k--;
-   }
-
-}
-
-/**
-* @ingroup groupTransforms
-*/
-
-/**
- * @defgroup Fast Real FFT Functions
- *
- * \par
- * The CMSIS DSP library includes specialized algorithms for computing the
- * FFT of real data sequences.  The FFT is defined over complex data but
- * in many applications the input is real.  Real FFT algorithms take advantage
- * of the symmetry properties of the FFT and have a speed advantage over complex
- * algorithms of the same length.
- * \par
- * The Fast RFFT algorith relays on the mixed radix CFFT that save processor usage.
- * \par
- * The real length N forward FFT of a sequence is computed using the steps shown below.
- * \par
- * \image html RFFT.gif "Real Fast Fourier Transform"
- * \par
- * The real sequence is initially treated as if it were complex to perform a CFFT.
- * Later, a processing stage reshapes the data to obtain half of the frequency spectrum
- * in complex format. Except the first complex number that contains the two real numbers
- * X[0] and X[N/2] all the data is complex. In other words, the first complex sample
- * contains two real values packed.
- * \par
- * The input for the inverse RFFT should keep the same format as the output of the 
- * forward RFFT. A first processing stage pre-process the data to later perform an
- * inverse CFFT.
- * \par    
- * \image html RIFFT.gif "Real Inverse Fast Fourier Transform"    
- * \par    
- * The algorithms for floating-point, Q15, and Q31 data are slightly different
- * and we describe each algorithm in turn.
- * \par Floating-point
- * The main functions are arm_rfft_fast_f32()
- * and arm_rfft_fast_init_f32().  The older functions
- * arm_rfft_f32() and arm_rfft_init_f32() have been
- * deprecated but are still documented.
- * \par
- * The FFT of a real N-point sequence has even symmetry in the frequency
- * domain.  The second half of the data equals the conjugate of the first half
- * flipped in frequency:
- * 
- *X[0] - real data
- *X[1] - complex data
- *X[2] - complex data
- *... 
- *X[fftLen/2-1] - complex data
- *X[fftLen/2] - real data
- *X[fftLen/2+1] - conjugate of X[fftLen/2-1]
- *X[fftLen/2+2] - conjugate of X[fftLen/2-2]
- *... 
- *X[fftLen-1] - conjugate of X[1]
- * 

- * Looking at the data, we see that we can uniquely represent the FFT using only
- * 
- *N/2+1 samples:
- *X[0] - real data
- *X[1] - complex data
- *X[2] - complex data
- *... 
- *X[fftLen/2-1] - complex data
- *X[fftLen/2] - real data
- * 

- * Looking more closely we see that the first and last samples are real valued.
- * They can be packed together and we can thus represent the FFT of an N-point
- * real sequence by N/2 complex values:
- * 
- *X[0],X[N/2] - packed real data: X[0] + jX[N/2]
- *X[1] - complex data
- *X[2] - complex data
- *... 
- *X[fftLen/2-1] - complex data
- * 

- * The real FFT functions pack the frequency domain data in this fashion.  The
- * forward transform outputs the data in this form and the inverse transform
- * expects input data in this form.  The function always performs the needed
- * bitreversal so that the input and output data is always in normal order.  The 
- * functions support lengths of [32, 64, 128, ..., 4096] samples.
- * \par
- * The forward and inverse real FFT functions apply the standard FFT scaling; no
- * scaling on the forward transform and 1/fftLen scaling on the inverse
- * transform.
- * \par Q15 and Q31
- * The real algorithms are defined in a similar manner and utilize N/2 complex
- * transforms behind the scenes.  
- * \par
- * The complex transforms used internally include scaling to prevent fixed-point
- * overflows.  The overall scaling equals 1/(fftLen/2).
- * \par
- * A separate instance structure must be defined for each transform used but 
- * twiddle factor and bit reversal tables can be reused.
- * \par
- * There is also an associated initialization function for each data type. 
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.   
- * - Initializes twiddle factor table and bit reversal table pointers.
- * - Initializes the internal complex FFT data structure.
- * \par   
- * Use of the initialization function is optional.   
- * However, if the initialization function is used, then the instance structure 
- * cannot be placed into a const data section. To place an instance structure 
- * into a const data section, the instance structure should be manually 
- * initialized as follows:
- * 
- *arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
- *arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
- * 

- * where fftLenReal is the length of the real transform;
- * fftLenBy2 length of  the internal complex transform.
- * ifftFlagR Selects forward (=0) or inverse (=1) transform.
- * bitReverseFlagR Selects bit reversed output (=0) or normal order
- * output (=1).
- * twidCoefRModifier stride modifier for the twiddle factor table.
- * The value is based on the FFT length;
- * pTwiddleARealpoints to the A array of twiddle coefficients; 
- * pTwiddleBRealpoints to the B array of twiddle coefficients;    
- * pCfft points to the CFFT Instance structure. The CFFT structure
- * must also be initialized.  Refer to arm_cfft_radix4_f32() for details regarding    
- * static initialization of the complex FFT instance structure.    
- */
-
-/**
-* @addtogroup RealFFT
-* @{
-*/
-
-/**
-* @brief Processing function for the floating-point real FFT.
-* @param[in]  *S              points to an arm_rfft_fast_instance_f32 structure.
-* @param[in]  *p              points to the input buffer.
-* @param[in]  *pOut           points to the output buffer.
-* @param[in]  ifftFlag        RFFT if flag is 0, RIFFT if flag is 1
-* @return none.
-*/
-
-void arm_rfft_fast_f32(
-arm_rfft_fast_instance_f32 * S,
-float32_t * p, float32_t * pOut,
-uint8_t ifftFlag)
-{
-   arm_cfft_instance_f32 * Sint = &(S->Sint);
-   Sint->fftLen = S->fftLenRFFT / 2;
-
-   /* Calculation of Real FFT */
-   if(ifftFlag)
-   {
-      /*  Real FFT compression */
-      merge_rfft_f32(S, p, pOut);
-
-      /* Complex radix-4 IFFT process */
-      arm_cfft_f32( Sint, pOut, ifftFlag, 1);
-   }
-   else
-   {
-      /* Calculation of RFFT of input */
-      arm_cfft_f32( Sint, p, ifftFlag, 1);
-   
-      /*  Real FFT extraction */
-      stage_rfft_f32(S, p, pOut);
-   }
-}
-
-/**    
-* @} end of RealFFT group    
-*/
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_init_f32.c
deleted file mode 100755
index ba66980d..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_init_f32.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_init_f32.c   
-*    
-* Description:	Split Radix Decimation in Frequency CFFT Floating point processing function   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**   
- * @ingroup groupTransforms   
- */
-
-/**   
- * @addtogroup RealFFT   
- * @{   
- */
-
-/**   
-* @brief  Initialization function for the floating-point real FFT.  
-* @param[in,out] *S             points to an arm_rfft_fast_instance_f32 structure.
-* @param[in]     fftLen         length of the Real Sequence.  
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.  
-*   
-* \par Description:  
-* \par   
-* The parameter fftLen	Specifies length of RFFT/CIFFT process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096.   
-* \par   
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.   
-*/
-arm_status arm_rfft_fast_init_f32(
-  arm_rfft_fast_instance_f32 * S,
-  uint16_t fftLen)
-{
-  arm_cfft_instance_f32 * Sint;
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-  /*  Initialise the FFT length */
-  Sint = &(S->Sint);
-  Sint->fftLen = fftLen/2;
-  S->fftLenRFFT = fftLen;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (Sint->fftLen)
-  {
-  case 2048u:
-    /*  Initializations of structure parameters for 2048 point FFT */
-    /*  Initialise the bit reversal table length */
-    Sint->bitRevLength = ARMBITREVINDEXTABLE2048_TABLE_LENGTH;
-    /*  Initialise the bit reversal table pointer */
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable2048;
-    /*  Initialise the Twiddle coefficient pointers */
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_2048;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_4096;
-    break;
-  case 1024u:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE1024_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable1024;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_1024;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_2048;
-    break;
-  case 512u:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE_512_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable512;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_512;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_1024;
-    break;
-  case 256u:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE_256_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable256;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_256;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_512;
-    break;
-  case 128u:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE_128_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable128;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_128;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_256;
-    break;
-  case 64u:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE__64_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable64;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_64;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_128;
-    break;
-  case 32u:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE__32_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable32;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_32;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_64;
-    break;
-  case 16u:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE__16_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable16;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_16;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_32;
-    break;
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**   
- * @} end of RealFFT group   
- */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c
deleted file mode 100755
index b9b50049..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c
+++ /dev/null
@@ -1,8376 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_init_f32.c    
-*    
-* Description:	RFFT & RIFFT Floating point initialisation function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup RealFFT    
- * @{    
- */
-
-/**    
-* \par    
-* Generation of realCoefA array:    
-* \par    
-* 	n = 4096    
-* 
for (i = 0; i < n; i++)    
-*  {    
-*    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-*  } 
    
-*/
-
-
-
-static const float32_t realCoefA[8192] = {
-  0.500000000000000f, -0.500000000000000f, 0.499616503715515f,
-    -0.499999850988388f,
-  0.499233007431030f, -0.499999403953552f, 0.498849511146545f,
-    -0.499998688697815f,
-  0.498466014862061f, -0.499997645616531f, 0.498082518577576f,
-    -0.499996334314346f,
-  0.497699022293091f, -0.499994695186615f, 0.497315555810928f,
-    -0.499992787837982f,
-  0.496932059526443f, -0.499990582466125f, 0.496548563241959f,
-    -0.499988079071045f,
-  0.496165096759796f, -0.499985307455063f, 0.495781600475311f,
-    -0.499982208013535f,
-  0.495398133993149f, -0.499978810548782f, 0.495014637708664f,
-    -0.499975144863129f,
-  0.494631171226501f, -0.499971181154251f, 0.494247704744339f,
-    -0.499966919422150f,
-  0.493864238262177f, -0.499962359666824f, 0.493480771780014f,
-    -0.499957501888275f,
-  0.493097305297852f, -0.499952346086502f, 0.492713838815689f,
-    -0.499946922063828f,
-  0.492330402135849f, -0.499941170215607f, 0.491946935653687f,
-    -0.499935150146484f,
-  0.491563498973846f, -0.499928832054138f, 0.491180062294006f,
-    -0.499922215938568f,
-  0.490796625614166f, -0.499915301799774f, 0.490413218736649f,
-    -0.499908089637756f,
-  0.490029782056808f, -0.499900579452515f, 0.489646375179291f,
-    -0.499892801046371f,
-  0.489262968301773f, -0.499884694814682f, 0.488879561424255f,
-    -0.499876320362091f,
-  0.488496154546738f, -0.499867647886276f, 0.488112777471542f,
-    -0.499858677387238f,
-  0.487729400396347f, -0.499849408864975f, 0.487346023321152f,
-    -0.499839842319489f,
-  0.486962646245956f, -0.499830007553101f, 0.486579269170761f,
-    -0.499819844961166f,
-  0.486195921897888f, -0.499809414148331f, 0.485812574625015f,
-    -0.499798685312271f,
-  0.485429257154465f, -0.499787658452988f, 0.485045909881592f,
-    -0.499776333570480f,
-  0.484662592411041f, -0.499764710664749f, 0.484279274940491f,
-    -0.499752789735794f,
-  0.483895987272263f, -0.499740600585938f, 0.483512699604034f,
-    -0.499728083610535f,
-  0.483129411935806f, -0.499715298414230f, 0.482746154069901f,
-    -0.499702215194702f,
-  0.482362866401672f, -0.499688833951950f, 0.481979638338089f,
-    -0.499675154685974f,
-  0.481596380472183f, -0.499661177396774f, 0.481213152408600f,
-    -0.499646931886673f,
-  0.480829954147339f, -0.499632388353348f, 0.480446726083755f,
-    -0.499617516994476f,
-  0.480063527822495f, -0.499602377414703f, 0.479680359363556f,
-    -0.499586939811707f,
-  0.479297190904617f, -0.499571204185486f, 0.478914022445679f,
-    -0.499555170536041f,
-  0.478530883789063f, -0.499538868665695f, 0.478147745132446f,
-    -0.499522238969803f,
-  0.477764606475830f, -0.499505341053009f, 0.477381497621536f,
-    -0.499488145112991f,
-  0.476998418569565f, -0.499470651149750f, 0.476615339517593f,
-    -0.499452859163284f,
-  0.476232260465622f, -0.499434769153595f, 0.475849211215973f,
-    -0.499416410923004f,
-  0.475466161966324f, -0.499397724866867f, 0.475083142518997f,
-    -0.499378770589828f,
-  0.474700123071671f, -0.499359518289566f, 0.474317133426666f,
-    -0.499339967966080f,
-  0.473934143781662f, -0.499320119619370f, 0.473551183938980f,
-    -0.499299973249435f,
-  0.473168224096298f, -0.499279528856277f, 0.472785294055939f,
-    -0.499258816242218f,
-  0.472402364015579f, -0.499237775802612f, 0.472019463777542f,
-    -0.499216467142105f,
-  0.471636593341827f, -0.499194860458374f, 0.471253722906113f,
-    -0.499172955751419f,
-  0.470870882272720f, -0.499150782823563f, 0.470488041639328f,
-    -0.499128282070160f,
-  0.470105201005936f, -0.499105513095856f, 0.469722419977188f,
-    -0.499082416296005f,
-  0.469339638948441f, -0.499059051275253f, 0.468956857919693f,
-    -0.499035388231277f,
-  0.468574106693268f, -0.499011427164078f, 0.468191385269165f,
-    -0.498987197875977f,
-  0.467808693647385f, -0.498962640762329f, 0.467426002025604f,
-    -0.498937815427780f,
-  0.467043310403824f, -0.498912662267685f, 0.466660678386688f,
-    -0.498887240886688f,
-  0.466278046369553f, -0.498861521482468f, 0.465895414352417f,
-    -0.498835533857346f,
-  0.465512841939926f, -0.498809218406677f, 0.465130269527435f,
-    -0.498782604932785f,
-  0.464747726917267f, -0.498755723237991f, 0.464365184307098f,
-    -0.498728543519974f,
-  0.463982671499252f, -0.498701065778732f, 0.463600188493729f,
-    -0.498673290014267f,
-  0.463217705488205f, -0.498645216226578f, 0.462835282087326f,
-    -0.498616874217987f,
-  0.462452858686447f, -0.498588204383850f, 0.462070435285568f,
-    -0.498559266328812f,
-  0.461688071489334f, -0.498530030250549f, 0.461305707693100f,
-    -0.498500496149063f,
-  0.460923373699188f, -0.498470664024353f, 0.460541069507599f,
-    -0.498440563678741f,
-  0.460158795118332f, -0.498410135507584f, 0.459776520729065f,
-    -0.498379439115524f,
-  0.459394276142120f, -0.498348444700241f, 0.459012061357498f,
-    -0.498317152261734f,
-  0.458629876375198f, -0.498285561800003f, 0.458247691392899f,
-    -0.498253703117371f,
-  0.457865566015244f, -0.498221516609192f, 0.457483440637589f,
-    -0.498189061880112f,
-  0.457101345062256f, -0.498156309127808f, 0.456719279289246f,
-    -0.498123258352280f,
-  0.456337243318558f, -0.498089909553528f, 0.455955207347870f,
-    -0.498056292533875f,
-  0.455573230981827f, -0.498022347688675f, 0.455191254615784f,
-    -0.497988134622574f,
-  0.454809308052063f, -0.497953623533249f, 0.454427421092987f,
-    -0.497918814420700f,
-  0.454045534133911f, -0.497883707284927f, 0.453663676977158f,
-    -0.497848302125931f,
-  0.453281819820404f, -0.497812628746033f, 0.452900022268295f,
-    -0.497776657342911f,
-  0.452518254518509f, -0.497740387916565f, 0.452136516571045f,
-    -0.497703820466995f,
-  0.451754778623581f, -0.497666954994202f, 0.451373100280762f,
-    -0.497629791498184f,
-  0.450991421937943f, -0.497592359781265f, 0.450609803199768f,
-    -0.497554630041122f,
-  0.450228184461594f, -0.497516602277756f, 0.449846625328064f,
-    -0.497478276491165f,
-  0.449465066194534f, -0.497439652681351f, 0.449083566665649f,
-    -0.497400760650635f,
-  0.448702067136765f, -0.497361570596695f, 0.448320597410202f,
-    -0.497322082519531f,
-  0.447939187288284f, -0.497282296419144f, 0.447557777166367f,
-    -0.497242212295532f,
-  0.447176426649094f, -0.497201830148697f, 0.446795076131821f,
-    -0.497161179780960f,
-  0.446413785219193f, -0.497120231389999f, 0.446032524108887f,
-    -0.497078984975815f,
-  0.445651292800903f, -0.497037440538406f, 0.445270061492920f,
-    -0.496995598077774f,
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-    -0.496911078691483f,
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-    -0.496825367212296f,
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-    -0.496738493442535f,
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-    -0.496650427579880f,
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-    -0.496561229228973f,
-  0.441078960895538f, -0.496516168117523f, 0.440698176622391f,
-    -0.496470838785172f,
-  0.440317392349243f, -0.496425211429596f, 0.439936667680740f,
-    -0.496379286050797f,
-  0.439555943012238f, -0.496333062648773f, 0.439175277948380f,
-    -0.496286571025848f,
-  0.438794672489166f, -0.496239781379700f, 0.438414067029953f,
-    -0.496192663908005f,
-  0.438033521175385f, -0.496145308017731f, 0.437653005123138f,
-    -0.496097624301910f,
-  0.437272518873215f, -0.496049642562866f, 0.436892062425613f,
-    -0.496001392602921f,
-  0.436511665582657f, -0.495952844619751f, 0.436131268739700f,
-    -0.495903998613358f,
-  0.435750931501389f, -0.495854884386063f, 0.435370653867722f,
-    -0.495805442333221f,
-  0.434990376234055f, -0.495755732059479f, 0.434610158205032f,
-    -0.495705723762512f,
-  0.434229999780655f, -0.495655417442322f, 0.433849841356277f,
-    -0.495604842901230f,
-  0.433469742536545f, -0.495553970336914f, 0.433089673519135f,
-    -0.495502769947052f,
-  0.432709634304047f, -0.495451331138611f, 0.432329654693604f,
-    -0.495399564504623f,
-  0.431949704885483f, -0.495347499847412f, 0.431569814682007f,
-    -0.495295166969299f,
-  0.431189924478531f, -0.495242536067963f, 0.430810123682022f,
-    -0.495189607143402f,
-  0.430430322885513f, -0.495136409997940f, 0.430050581693649f,
-    -0.495082914829254f,
-  0.429670870304108f, -0.495029091835022f, 0.429291218519211f,
-    -0.494975030422211f,
-  0.428911596536636f, -0.494920641183853f, 0.428532034158707f,
-    -0.494865983724594f,
-  0.428152471780777f, -0.494810998439789f, 0.427772998809814f,
-    -0.494755744934082f,
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-    -0.494644373655319f,
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-    -0.494531840085983f,
-  0.425876170396805f, -0.494475126266479f, 0.425496935844421f,
-    -0.494418144226074f,
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-    -0.494303256273270f,
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-    -0.494187235832214f,
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-    -0.494070053100586f,
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-    -0.493951678276062f,
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-    -0.493832170963287f,
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-    -0.493711471557617f,
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-    -0.493589639663696f,
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-    -0.493466645479202f,
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-    -0.492834210395813f,
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-    -0.492704242467880f,
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-    -0.489395678043365f,
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-    -0.489237964153290f,
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-    -0.488432198762894f,
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-    -0.488267600536346f,
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-    -0.488101840019226f,
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-    -0.487934947013855f,
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-  0.403207212686539f, 0.490541696548462f, 0.403583467006683f,
-    0.490615785121918f,
-  0.403959810733795f, 0.490689605474472f, 0.404336184263229f,
-    0.490763127803802f,
-  0.404712617397308f, 0.490836352109909f, 0.405089110136032f,
-    0.490909278392792f,
-  0.405465662479401f, 0.490981936454773f, 0.405842274427414f,
-    0.491054296493530f,
-  0.406218945980072f, 0.491126358509064f, 0.406595647335052f,
-    0.491198152303696f,
-  0.406972438097000f, 0.491269648075104f, 0.407349258661270f,
-    0.491340845823288f,
-  0.407726138830185f, 0.491411775350571f, 0.408103078603745f,
-    0.491482406854630f,
-  0.408480048179626f, 0.491552740335464f, 0.408857107162476f,
-    0.491622805595398f,
-  0.409234195947647f, 0.491692543029785f, 0.409611344337463f,
-    0.491762012243271f,
-  0.409988552331924f, 0.491831213235855f, 0.410365819931030f,
-    0.491900116205215f,
-  0.410743117332459f, 0.491968721151352f, 0.411120474338531f,
-    0.492037028074265f,
-  0.411497890949249f, 0.492105036973953f, 0.411875367164612f,
-    0.492172777652740f,
-  0.412252873182297f, 0.492240220308304f, 0.412630438804626f,
-    0.492307394742966f,
-  0.413008064031601f, 0.492374241352081f, 0.413385748863220f,
-    0.492440819740295f,
-  0.413763463497162f, 0.492507129907608f, 0.414141237735748f,
-    0.492573112249374f,
-  0.414519041776657f, 0.492638826370239f, 0.414896935224533f,
-    0.492704242467880f,
-  0.415274858474731f, 0.492769360542297f, 0.415652841329575f,
-    0.492834210395813f,
-  0.416030853986740f, 0.492898762226105f, 0.416408926248550f,
-    0.492963016033173f,
-  0.416787058115005f, 0.493026971817017f, 0.417165219783783f,
-    0.493090659379959f,
-  0.417543441057205f, 0.493154048919678f, 0.417921721935272f,
-    0.493217140436172f,
-  0.418300032615662f, 0.493279963731766f, 0.418678402900696f,
-    0.493342459201813f,
-  0.419056802988052f, 0.493404686450958f, 0.419435262680054f,
-    0.493466645479202f,
-  0.419813781976700f, 0.493528276681900f, 0.420192331075668f,
-    0.493589639663696f,
-  0.420570939779282f, 0.493650704622269f, 0.420949578285217f,
-    0.493711471557617f,
-  0.421328276395798f, 0.493771970272064f, 0.421707004308701f,
-    0.493832170963287f,
-  0.422085791826248f, 0.493892073631287f, 0.422464638948441f,
-    0.493951678276062f,
-  0.422843515872955f, 0.494011014699936f, 0.423222452402115f,
-    0.494070053100586f,
-  0.423601418733597f, 0.494128793478012f, 0.423980414867401f,
-    0.494187235832214f,
-  0.424359470605850f, 0.494245409965515f, 0.424738585948944f,
-    0.494303256273270f,
-  0.425117731094360f, 0.494360834360123f, 0.425496935844421f,
-    0.494418144226074f,
-  0.425876170396805f, 0.494475126266479f, 0.426255434751511f,
-    0.494531840085983f,
-  0.426634758710861f, 0.494588255882263f, 0.427014142274857f,
-    0.494644373655319f,
-  0.427393525838852f, 0.494700223207474f, 0.427772998809814f,
-    0.494755744934082f,
-  0.428152471780777f, 0.494810998439789f, 0.428532034158707f,
-    0.494865983724594f,
-  0.428911596536636f, 0.494920641183853f, 0.429291218519211f,
-    0.494975030422211f,
-  0.429670870304108f, 0.495029091835022f, 0.430050581693649f,
-    0.495082914829254f,
-  0.430430322885513f, 0.495136409997940f, 0.430810123682022f,
-    0.495189607143402f,
-  0.431189924478531f, 0.495242536067963f, 0.431569814682007f,
-    0.495295166969299f,
-  0.431949704885483f, 0.495347499847412f, 0.432329654693604f,
-    0.495399564504623f,
-  0.432709634304047f, 0.495451331138611f, 0.433089673519135f,
-    0.495502769947052f,
-  0.433469742536545f, 0.495553970336914f, 0.433849841356277f,
-    0.495604842901230f,
-  0.434229999780655f, 0.495655417442322f, 0.434610158205032f,
-    0.495705723762512f,
-  0.434990376234055f, 0.495755732059479f, 0.435370653867722f,
-    0.495805442333221f,
-  0.435750931501389f, 0.495854884386063f, 0.436131268739700f,
-    0.495903998613358f,
-  0.436511665582657f, 0.495952844619751f, 0.436892062425613f,
-    0.496001392602921f,
-  0.437272518873215f, 0.496049642562866f, 0.437653005123138f,
-    0.496097624301910f,
-  0.438033521175385f, 0.496145308017731f, 0.438414067029953f,
-    0.496192663908005f,
-  0.438794672489166f, 0.496239781379700f, 0.439175277948380f,
-    0.496286571025848f,
-  0.439555943012238f, 0.496333062648773f, 0.439936667680740f,
-    0.496379286050797f,
-  0.440317392349243f, 0.496425211429596f, 0.440698176622391f,
-    0.496470838785172f,
-  0.441078960895538f, 0.496516168117523f, 0.441459804773331f,
-    0.496561229228973f,
-  0.441840678453445f, 0.496605962514877f, 0.442221581935883f,
-    0.496650427579880f,
-  0.442602545022964f, 0.496694594621658f, 0.442983508110046f,
-    0.496738493442535f,
-  0.443364530801773f, 0.496782064437866f, 0.443745553493500f,
-    0.496825367212296f,
-  0.444126635789871f, 0.496868371963501f, 0.444507747888565f,
-    0.496911078691483f,
-  0.444888889789581f, 0.496953487396240f, 0.445270061492920f,
-    0.496995598077774f,
-  0.445651292800903f, 0.497037440538406f, 0.446032524108887f,
-    0.497078984975815f,
-  0.446413785219193f, 0.497120231389999f, 0.446795076131821f,
-    0.497161179780960f,
-  0.447176426649094f, 0.497201830148697f, 0.447557777166367f,
-    0.497242212295532f,
-  0.447939187288284f, 0.497282296419144f, 0.448320597410202f,
-    0.497322082519531f,
-  0.448702067136765f, 0.497361570596695f, 0.449083566665649f,
-    0.497400760650635f,
-  0.449465066194534f, 0.497439652681351f, 0.449846625328064f,
-    0.497478276491165f,
-  0.450228184461594f, 0.497516602277756f, 0.450609803199768f,
-    0.497554630041122f,
-  0.450991421937943f, 0.497592359781265f, 0.451373100280762f,
-    0.497629791498184f,
-  0.451754778623581f, 0.497666954994202f, 0.452136516571045f,
-    0.497703820466995f,
-  0.452518254518509f, 0.497740387916565f, 0.452900022268295f,
-    0.497776657342911f,
-  0.453281819820404f, 0.497812628746033f, 0.453663676977158f,
-    0.497848302125931f,
-  0.454045534133911f, 0.497883707284927f, 0.454427421092987f,
-    0.497918814420700f,
-  0.454809308052063f, 0.497953623533249f, 0.455191254615784f,
-    0.497988134622574f,
-  0.455573230981827f, 0.498022347688675f, 0.455955207347870f,
-    0.498056292533875f,
-  0.456337243318558f, 0.498089909553528f, 0.456719279289246f,
-    0.498123258352280f,
-  0.457101345062256f, 0.498156309127808f, 0.457483440637589f,
-    0.498189061880112f,
-  0.457865566015244f, 0.498221516609192f, 0.458247691392899f,
-    0.498253703117371f,
-  0.458629876375198f, 0.498285561800003f, 0.459012061357498f,
-    0.498317152261734f,
-  0.459394276142120f, 0.498348444700241f, 0.459776520729065f,
-    0.498379439115524f,
-  0.460158795118332f, 0.498410135507584f, 0.460541069507599f,
-    0.498440563678741f,
-  0.460923373699188f, 0.498470664024353f, 0.461305707693100f,
-    0.498500496149063f,
-  0.461688071489334f, 0.498530030250549f, 0.462070435285568f,
-    0.498559266328812f,
-  0.462452858686447f, 0.498588204383850f, 0.462835282087326f,
-    0.498616874217987f,
-  0.463217705488205f, 0.498645216226578f, 0.463600188493729f,
-    0.498673290014267f,
-  0.463982671499252f, 0.498701065778732f, 0.464365184307098f,
-    0.498728543519974f,
-  0.464747726917267f, 0.498755723237991f, 0.465130269527435f,
-    0.498782604932785f,
-  0.465512841939926f, 0.498809218406677f, 0.465895414352417f,
-    0.498835533857346f,
-  0.466278046369553f, 0.498861521482468f, 0.466660678386688f,
-    0.498887240886688f,
-  0.467043310403824f, 0.498912662267685f, 0.467426002025604f,
-    0.498937815427780f,
-  0.467808693647385f, 0.498962640762329f, 0.468191385269165f,
-    0.498987197875977f,
-  0.468574106693268f, 0.499011427164078f, 0.468956857919693f,
-    0.499035388231277f,
-  0.469339638948441f, 0.499059051275253f, 0.469722419977188f,
-    0.499082416296005f,
-  0.470105201005936f, 0.499105513095856f, 0.470488041639328f,
-    0.499128282070160f,
-  0.470870882272720f, 0.499150782823563f, 0.471253722906113f,
-    0.499172955751419f,
-  0.471636593341827f, 0.499194860458374f, 0.472019463777542f,
-    0.499216467142105f,
-  0.472402364015579f, 0.499237775802612f, 0.472785294055939f,
-    0.499258816242218f,
-  0.473168224096298f, 0.499279528856277f, 0.473551183938980f,
-    0.499299973249435f,
-  0.473934143781662f, 0.499320119619370f, 0.474317133426666f,
-    0.499339967966080f,
-  0.474700123071671f, 0.499359518289566f, 0.475083142518997f,
-    0.499378770589828f,
-  0.475466161966324f, 0.499397724866867f, 0.475849211215973f,
-    0.499416410923004f,
-  0.476232260465622f, 0.499434769153595f, 0.476615339517593f,
-    0.499452859163284f,
-  0.476998418569565f, 0.499470651149750f, 0.477381497621536f,
-    0.499488145112991f,
-  0.477764606475830f, 0.499505341053009f, 0.478147745132446f,
-    0.499522238969803f,
-  0.478530883789063f, 0.499538868665695f, 0.478914022445679f,
-    0.499555170536041f,
-  0.479297190904617f, 0.499571204185486f, 0.479680359363556f,
-    0.499586939811707f,
-  0.480063527822495f, 0.499602377414703f, 0.480446726083755f,
-    0.499617516994476f,
-  0.480829954147339f, 0.499632388353348f, 0.481213152408600f,
-    0.499646931886673f,
-  0.481596380472183f, 0.499661177396774f, 0.481979638338089f,
-    0.499675154685974f,
-  0.482362866401672f, 0.499688833951950f, 0.482746154069901f,
-    0.499702215194702f,
-  0.483129411935806f, 0.499715298414230f, 0.483512699604034f,
-    0.499728083610535f,
-  0.483895987272263f, 0.499740600585938f, 0.484279274940491f,
-    0.499752789735794f,
-  0.484662592411041f, 0.499764710664749f, 0.485045909881592f,
-    0.499776333570480f,
-  0.485429257154465f, 0.499787658452988f, 0.485812574625015f,
-    0.499798685312271f,
-  0.486195921897888f, 0.499809414148331f, 0.486579269170761f,
-    0.499819844961166f,
-  0.486962646245956f, 0.499830007553101f, 0.487346023321152f,
-    0.499839842319489f,
-  0.487729400396347f, 0.499849408864975f, 0.488112777471542f,
-    0.499858677387238f,
-  0.488496154546738f, 0.499867647886276f, 0.488879561424255f,
-    0.499876320362091f,
-  0.489262968301773f, 0.499884694814682f, 0.489646375179291f,
-    0.499892801046371f,
-  0.490029782056808f, 0.499900579452515f, 0.490413218736649f,
-    0.499908089637756f,
-  0.490796625614166f, 0.499915301799774f, 0.491180062294006f,
-    0.499922215938568f,
-  0.491563498973846f, 0.499928832054138f, 0.491946935653687f,
-    0.499935150146484f,
-  0.492330402135849f, 0.499941170215607f, 0.492713838815689f,
-    0.499946922063828f,
-  0.493097305297852f, 0.499952346086502f, 0.493480771780014f,
-    0.499957501888275f,
-  0.493864238262177f, 0.499962359666824f, 0.494247704744339f,
-    0.499966919422150f,
-  0.494631171226501f, 0.499971181154251f, 0.495014637708664f,
-    0.499975144863129f,
-  0.495398133993149f, 0.499978810548782f, 0.495781600475311f,
-    0.499982208013535f,
-  0.496165096759796f, 0.499985307455063f, 0.496548563241959f,
-    0.499988079071045f,
-  0.496932059526443f, 0.499990582466125f, 0.497315555810928f,
-    0.499992787837982f,
-  0.497699022293091f, 0.499994695186615f, 0.498082518577576f,
-    0.499996334314346f,
-  0.498466014862061f, 0.499997645616531f, 0.498849511146545f,
-    0.499998688697815f,
-  0.499233007431030f, 0.499999403953552f, 0.499616503715515f,
-    0.499999850988388f,
-};
-
-
-/**    
-* \par   
-* Generation of realCoefB array:    
-* \par   
-* n = 4096    
-* 
for (i = 0; i < n; i++)    
-* {    
-*    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-*  } 
    
-*    
-*/
-static const float32_t realCoefB[8192] = {
-  0.500000000000000f, 0.500000000000000f, 0.500383496284485f,
-    0.499999850988388f,
-  0.500766992568970f, 0.499999403953552f, 0.501150488853455f,
-    0.499998688697815f,
-  0.501533985137939f, 0.499997645616531f, 0.501917481422424f,
-    0.499996334314346f,
-  0.502300977706909f, 0.499994695186615f, 0.502684473991394f,
-    0.499992787837982f,
-  0.503067970275879f, 0.499990582466125f, 0.503451406955719f,
-    0.499988079071045f,
-  0.503834903240204f, 0.499985307455063f, 0.504218399524689f,
-    0.499982208013535f,
-  0.504601895809174f, 0.499978810548782f, 0.504985332489014f,
-    0.499975144863129f,
-  0.505368828773499f, 0.499971181154251f, 0.505752325057983f,
-    0.499966919422150f,
-  0.506135761737823f, 0.499962359666824f, 0.506519258022308f,
-    0.499957501888275f,
-  0.506902694702148f, 0.499952346086502f, 0.507286131381989f,
-    0.499946922063828f,
-  0.507669627666473f, 0.499941170215607f, 0.508053064346313f,
-    0.499935150146484f,
-  0.508436501026154f, 0.499928832054138f, 0.508819937705994f,
-    0.499922215938568f,
-  0.509203374385834f, 0.499915301799774f, 0.509586811065674f,
-    0.499908089637756f,
-  0.509970188140869f, 0.499900579452515f, 0.510353624820709f,
-    0.499892801046371f,
-  0.510737061500549f, 0.499884694814682f, 0.511120438575745f,
-    0.499876320362091f,
-  0.511503815650940f, 0.499867647886276f, 0.511887252330780f,
-    0.499858677387238f,
-  0.512270629405975f, 0.499849408864975f, 0.512654006481171f,
-    0.499839842319489f,
-  0.513037383556366f, 0.499830007553101f, 0.513420701026917f,
-    0.499819844961166f,
-  0.513804078102112f, 0.499809414148331f, 0.514187395572662f,
-    0.499798685312271f,
-  0.514570772647858f, 0.499787658452988f, 0.514954090118408f,
-    0.499776333570480f,
-  0.515337407588959f, 0.499764710664749f, 0.515720725059509f,
-    0.499752789735794f,
-  0.516103982925415f, 0.499740600585938f, 0.516487300395966f,
-    0.499728083610535f,
-  0.516870558261871f, 0.499715298414230f, 0.517253875732422f,
-    0.499702215194702f,
-  0.517637133598328f, 0.499688833951950f, 0.518020391464233f,
-    0.499675154685974f,
-  0.518403589725494f, 0.499661177396774f, 0.518786847591400f,
-    0.499646931886673f,
-  0.519170045852661f, 0.499632388353348f, 0.519553244113922f,
-    0.499617516994476f,
-  0.519936442375183f, 0.499602377414703f, 0.520319640636444f,
-    0.499586939811707f,
-  0.520702838897705f, 0.499571204185486f, 0.521085977554321f,
-    0.499555170536041f,
-  0.521469116210938f, 0.499538868665695f, 0.521852254867554f,
-    0.499522238969803f,
-  0.522235393524170f, 0.499505341053009f, 0.522618472576141f,
-    0.499488145112991f,
-  0.523001611232758f, 0.499470651149750f, 0.523384690284729f,
-    0.499452859163284f,
-  0.523767769336700f, 0.499434769153595f, 0.524150788784027f,
-    0.499416410923004f,
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-  0.571088373661041f, -0.494920641183853f, 0.570708811283112f,
-    -0.494975030422211f,
-  0.570329129695892f, -0.495029091835022f, 0.569949388504028f,
-    -0.495082914829254f,
-  0.569569647312164f, -0.495136409997940f, 0.569189906120300f,
-    -0.495189607143402f,
-  0.568810045719147f, -0.495242536067963f, 0.568430185317993f,
-    -0.495295166969299f,
-  0.568050265312195f, -0.495347499847412f, 0.567670345306396f,
-    -0.495399564504623f,
-  0.567290365695953f, -0.495451331138611f, 0.566910326480865f,
-    -0.495502769947052f,
-  0.566530287265778f, -0.495553970336914f, 0.566150128841400f,
-    -0.495604842901230f,
-  0.565770030021667f, -0.495655417442322f, 0.565389811992645f,
-    -0.495705723762512f,
-  0.565009593963623f, -0.495755732059479f, 0.564629375934601f,
-    -0.495805442333221f,
-  0.564249038696289f, -0.495854884386063f, 0.563868701457977f,
-    -0.495903998613358f,
-  0.563488364219666f, -0.495952844619751f, 0.563107967376709f,
-    -0.496001392602921f,
-  0.562727510929108f, -0.496049642562866f, 0.562346994876862f,
-    -0.496097624301910f,
-  0.561966478824615f, -0.496145308017731f, 0.561585903167725f,
-    -0.496192663908005f,
-  0.561205327510834f, -0.496239781379700f, 0.560824692249298f,
-    -0.496286571025848f,
-  0.560444056987762f, -0.496333062648773f, 0.560063362121582f,
-    -0.496379286050797f,
-  0.559682607650757f, -0.496425211429596f, 0.559301853179932f,
-    -0.496470838785172f,
-  0.558921039104462f, -0.496516168117523f, 0.558540165424347f,
-    -0.496561229228973f,
-  0.558159291744232f, -0.496605962514877f, 0.557778418064117f,
-    -0.496650427579880f,
-  0.557397484779358f, -0.496694594621658f, 0.557016491889954f,
-    -0.496738493442535f,
-  0.556635499000549f, -0.496782064437866f, 0.556254446506500f,
-    -0.496825367212296f,
-  0.555873334407806f, -0.496868371963501f, 0.555492222309113f,
-    -0.496911078691483f,
-  0.555111110210419f, -0.496953487396240f, 0.554729938507080f,
-    -0.496995598077774f,
-  0.554348707199097f, -0.497037440538406f, 0.553967475891113f,
-    -0.497078984975815f,
-  0.553586184978485f, -0.497120231389999f, 0.553204894065857f,
-    -0.497161179780960f,
-  0.552823603153229f, -0.497201830148697f, 0.552442193031311f,
-    -0.497242212295532f,
-  0.552060842514038f, -0.497282296419144f, 0.551679372787476f,
-    -0.497322082519531f,
-  0.551297962665558f, -0.497361570596695f, 0.550916433334351f,
-    -0.497400760650635f,
-  0.550534904003143f, -0.497439652681351f, 0.550153374671936f,
-    -0.497478276491165f,
-  0.549771785736084f, -0.497516602277756f, 0.549390196800232f,
-    -0.497554630041122f,
-  0.549008548259735f, -0.497592359781265f, 0.548626899719238f,
-    -0.497629791498184f,
-  0.548245191574097f, -0.497666954994202f, 0.547863483428955f,
-    -0.497703820466995f,
-  0.547481775283813f, -0.497740387916565f, 0.547099947929382f,
-    -0.497776657342911f,
-  0.546718180179596f, -0.497812628746033f, 0.546336352825165f,
-    -0.497848302125931f,
-  0.545954465866089f, -0.497883707284927f, 0.545572578907013f,
-    -0.497918814420700f,
-  0.545190691947937f, -0.497953623533249f, 0.544808745384216f,
-    -0.497988134622574f,
-  0.544426798820496f, -0.498022347688675f, 0.544044792652130f,
-    -0.498056292533875f,
-  0.543662786483765f, -0.498089909553528f, 0.543280720710754f,
-    -0.498123258352280f,
-  0.542898654937744f, -0.498156309127808f, 0.542516589164734f,
-    -0.498189061880112f,
-  0.542134463787079f, -0.498221516609192f, 0.541752278804779f,
-    -0.498253703117371f,
-  0.541370153427124f, -0.498285561800003f, 0.540987968444824f,
-    -0.498317152261734f,
-  0.540605723857880f, -0.498348444700241f, 0.540223479270935f,
-    -0.498379439115524f,
-  0.539841234683990f, -0.498410135507584f, 0.539458930492401f,
-    -0.498440563678741f,
-  0.539076626300812f, -0.498470664024353f, 0.538694262504578f,
-    -0.498500496149063f,
-  0.538311958312988f, -0.498530030250549f, 0.537929534912109f,
-    -0.498559266328812f,
-  0.537547171115875f, -0.498588204383850f, 0.537164747714996f,
-    -0.498616874217987f,
-  0.536782264709473f, -0.498645216226578f, 0.536399841308594f,
-    -0.498673290014267f,
-  0.536017298698425f, -0.498701065778732f, 0.535634815692902f,
-    -0.498728543519974f,
-  0.535252273082733f, -0.498755723237991f, 0.534869730472565f,
-    -0.498782604932785f,
-  0.534487187862396f, -0.498809218406677f, 0.534104585647583f,
-    -0.498835533857346f,
-  0.533721983432770f, -0.498861521482468f, 0.533339321613312f,
-    -0.498887240886688f,
-  0.532956659793854f, -0.498912662267685f, 0.532573997974396f,
-    -0.498937815427780f,
-  0.532191336154938f, -0.498962640762329f, 0.531808614730835f,
-    -0.498987197875977f,
-  0.531425893306732f, -0.499011427164078f, 0.531043112277985f,
-    -0.499035388231277f,
-  0.530660390853882f, -0.499059051275253f, 0.530277609825134f,
-    -0.499082416296005f,
-  0.529894769191742f, -0.499105513095856f, 0.529511988162994f,
-    -0.499128282070160f,
-  0.529129147529602f, -0.499150782823563f, 0.528746306896210f,
-    -0.499172955751419f,
-  0.528363406658173f, -0.499194860458374f, 0.527980506420136f,
-    -0.499216467142105f,
-  0.527597606182098f, -0.499237775802612f, 0.527214705944061f,
-    -0.499258816242218f,
-  0.526831746101379f, -0.499279528856277f, 0.526448845863342f,
-    -0.499299973249435f,
-  0.526065826416016f, -0.499320119619370f, 0.525682866573334f,
-    -0.499339967966080f,
-  0.525299847126007f, -0.499359518289566f, 0.524916887283325f,
-    -0.499378770589828f,
-  0.524533808231354f, -0.499397724866867f, 0.524150788784027f,
-    -0.499416410923004f,
-  0.523767769336700f, -0.499434769153595f, 0.523384690284729f,
-    -0.499452859163284f,
-  0.523001611232758f, -0.499470651149750f, 0.522618472576141f,
-    -0.499488145112991f,
-  0.522235393524170f, -0.499505341053009f, 0.521852254867554f,
-    -0.499522238969803f,
-  0.521469116210938f, -0.499538868665695f, 0.521085977554321f,
-    -0.499555170536041f,
-  0.520702838897705f, -0.499571204185486f, 0.520319640636444f,
-    -0.499586939811707f,
-  0.519936442375183f, -0.499602377414703f, 0.519553244113922f,
-    -0.499617516994476f,
-  0.519170045852661f, -0.499632388353348f, 0.518786847591400f,
-    -0.499646931886673f,
-  0.518403589725494f, -0.499661177396774f, 0.518020391464233f,
-    -0.499675154685974f,
-  0.517637133598328f, -0.499688833951950f, 0.517253875732422f,
-    -0.499702215194702f,
-  0.516870558261871f, -0.499715298414230f, 0.516487300395966f,
-    -0.499728083610535f,
-  0.516103982925415f, -0.499740600585938f, 0.515720725059509f,
-    -0.499752789735794f,
-  0.515337407588959f, -0.499764710664749f, 0.514954090118408f,
-    -0.499776333570480f,
-  0.514570772647858f, -0.499787658452988f, 0.514187395572662f,
-    -0.499798685312271f,
-  0.513804078102112f, -0.499809414148331f, 0.513420701026917f,
-    -0.499819844961166f,
-  0.513037383556366f, -0.499830007553101f, 0.512654006481171f,
-    -0.499839842319489f,
-  0.512270629405975f, -0.499849408864975f, 0.511887252330780f,
-    -0.499858677387238f,
-  0.511503815650940f, -0.499867647886276f, 0.511120438575745f,
-    -0.499876320362091f,
-  0.510737061500549f, -0.499884694814682f, 0.510353624820709f,
-    -0.499892801046371f,
-  0.509970188140869f, -0.499900579452515f, 0.509586811065674f,
-    -0.499908089637756f,
-  0.509203374385834f, -0.499915301799774f, 0.508819937705994f,
-    -0.499922215938568f,
-  0.508436501026154f, -0.499928832054138f, 0.508053064346313f,
-    -0.499935150146484f,
-  0.507669627666473f, -0.499941170215607f, 0.507286131381989f,
-    -0.499946922063828f,
-  0.506902694702148f, -0.499952346086502f, 0.506519258022308f,
-    -0.499957501888275f,
-  0.506135761737823f, -0.499962359666824f, 0.505752325057983f,
-    -0.499966919422150f,
-  0.505368828773499f, -0.499971181154251f, 0.504985332489014f,
-    -0.499975144863129f,
-  0.504601895809174f, -0.499978810548782f, 0.504218399524689f,
-    -0.499982208013535f,
-  0.503834903240204f, -0.499985307455063f, 0.503451406955719f,
-    -0.499988079071045f,
-  0.503067970275879f, -0.499990582466125f, 0.502684473991394f,
-    -0.499992787837982f,
-  0.502300977706909f, -0.499994695186615f, 0.501917481422424f,
-    -0.499996334314346f,
-  0.501533985137939f, -0.499997645616531f, 0.501150488853455f,
-    -0.499998688697815f,
-  0.500766992568970f, -0.499999403953552f, 0.500383496284485f,
-    -0.499999850988388f,
-};
-
-
-
-/**    
-* @brief  Initialization function for the floating-point RFFT/RIFFT.   
-* @deprecated Do not use this function.  It has been superceded by \ref arm_rfft_fast_init_f32 and will be removed
-* in the future.
-* @param[in,out] *S             points to an instance of the floating-point RFFT/RIFFT structure.   
-* @param[in,out] *S_CFFT        points to an instance of the floating-point CFFT/CIFFT structure.   
-* @param[in]     fftLenReal     length of the FFT.   
-* @param[in]     ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.   
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.   
-*    
-* \par Description:   
-* \par   
-* The parameter fftLenReal	Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.    
-* \par    
-* The parameter ifftFlagR controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.    
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par    
-* This function also initializes Twiddle factor table.     
-*/
-
-arm_status arm_rfft_init_f32(
-  arm_rfft_instance_f32 * S,
-  arm_cfft_radix4_instance_f32 * S_CFFT,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag)
-{
-
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialize the Real FFT length */
-  S->fftLenReal = (uint16_t) fftLenReal;
-
-  /*  Initialize the Complex FFT length */
-  S->fftLenBy2 = (uint16_t) fftLenReal / 2u;
-
-  /*  Initialize the Twiddle coefficientA pointer */
-  S->pTwiddleAReal = (float32_t *) realCoefA;
-
-  /*  Initialize the Twiddle coefficientB pointer */
-  S->pTwiddleBReal = (float32_t *) realCoefB;
-
-  /*  Initialize the Flag for selection of RFFT or RIFFT */
-  S->ifftFlagR = (uint8_t) ifftFlagR;
-
-  /*  Initialize the Flag for calculation Bit reversal or not */
-  S->bitReverseFlagR = (uint8_t) bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLenReal)
-  {
-    /* Init table modifier value */
-  case 8192u:
-    S->twidCoefRModifier = 1u;
-    break;
-  case 2048u:
-    S->twidCoefRModifier = 4u;
-    break;
-  case 512u:
-    S->twidCoefRModifier = 16u;
-    break;
-  case 128u:
-    S->twidCoefRModifier = 64u;
-    break;
-  default:
-    /*  Reporting argument error if rfftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  /* Init Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  if(S->ifftFlagR)
-  {
-    /* Initializes the CIFFT Module for fftLenreal/2 length */
-    arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 1u, 0u);
-  }
-  else
-  {
-    /* Initializes the CFFT Module for fftLenreal/2 length */
-    arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 0u, 0u);
-  }
-
-  /* return the status of RFFT Init function */
-  return (status);
-
-}
-
-  /**    
-   * @} end of RealFFT group    
-   */
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c
deleted file mode 100755
index 31b97b49..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c
+++ /dev/null
@@ -1,2235 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_init_q15.c    
-*    
-* Description:	RFFT & RIFFT Q15 initialisation function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-#include "arm_const_structs.h"
-
-/**    
-* @ingroup groupTransforms    
-*/
-
-/**    
-* @addtogroup RealFFT    
-* @{    
-*/
-
-
-
-/**    
-* \par    
-* Generation fixed-point realCoefAQ15 array in Q15 format:    
-* \par    
-* n = 4096    
-* 
for (i = 0; i < n; i++)    
-*  {    
-*    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-*  } 
    
-* \par    
-* Convert to fixed point Q15 format    
-*       round(pATable[i] * pow(2, 15))    
-*/
-static const q15_t ALIGN4 realCoefAQ15[8192] = {
-    0x4000, 0xc000, 0x3ff3, 0xc000, 0x3fe7, 0xc000, 0x3fda, 0xc000,
-    0x3fce, 0xc000, 0x3fc1, 0xc000, 0x3fb5, 0xc000, 0x3fa8, 0xc000,
-    0x3f9b, 0xc000, 0x3f8f, 0xc000, 0x3f82, 0xc000, 0x3f76, 0xc001,
-    0x3f69, 0xc001, 0x3f5d, 0xc001, 0x3f50, 0xc001, 0x3f44, 0xc001,
-    0x3f37, 0xc001, 0x3f2a, 0xc001, 0x3f1e, 0xc002, 0x3f11, 0xc002,
-    0x3f05, 0xc002, 0x3ef8, 0xc002, 0x3eec, 0xc002, 0x3edf, 0xc003,
-    0x3ed2, 0xc003, 0x3ec6, 0xc003, 0x3eb9, 0xc003, 0x3ead, 0xc004,
-    0x3ea0, 0xc004, 0x3e94, 0xc004, 0x3e87, 0xc004, 0x3e7a, 0xc005,
-    0x3e6e, 0xc005, 0x3e61, 0xc005, 0x3e55, 0xc006, 0x3e48, 0xc006,
-    0x3e3c, 0xc006, 0x3e2f, 0xc007, 0x3e23, 0xc007, 0x3e16, 0xc007,
-    0x3e09, 0xc008, 0x3dfd, 0xc008, 0x3df0, 0xc009, 0x3de4, 0xc009,
-    0x3dd7, 0xc009, 0x3dcb, 0xc00a, 0x3dbe, 0xc00a, 0x3db2, 0xc00b,
-    0x3da5, 0xc00b, 0x3d98, 0xc00c, 0x3d8c, 0xc00c, 0x3d7f, 0xc00d,
-    0x3d73, 0xc00d, 0x3d66, 0xc00e, 0x3d5a, 0xc00e, 0x3d4d, 0xc00f,
-    0x3d40, 0xc00f, 0x3d34, 0xc010, 0x3d27, 0xc010, 0x3d1b, 0xc011,
-    0x3d0e, 0xc011, 0x3d02, 0xc012, 0x3cf5, 0xc013, 0x3ce9, 0xc013,
-    0x3cdc, 0xc014, 0x3cd0, 0xc014, 0x3cc3, 0xc015, 0x3cb6, 0xc016,
-    0x3caa, 0xc016, 0x3c9d, 0xc017, 0x3c91, 0xc018, 0x3c84, 0xc018,
-    0x3c78, 0xc019, 0x3c6b, 0xc01a, 0x3c5f, 0xc01a, 0x3c52, 0xc01b,
-    0x3c45, 0xc01c, 0x3c39, 0xc01d, 0x3c2c, 0xc01d, 0x3c20, 0xc01e,
-    0x3c13, 0xc01f, 0x3c07, 0xc020, 0x3bfa, 0xc020, 0x3bee, 0xc021,
-    0x3be1, 0xc022, 0x3bd5, 0xc023, 0x3bc8, 0xc024, 0x3bbc, 0xc024,
-    0x3baf, 0xc025, 0x3ba2, 0xc026, 0x3b96, 0xc027, 0x3b89, 0xc028,
-    0x3b7d, 0xc029, 0x3b70, 0xc02a, 0x3b64, 0xc02b, 0x3b57, 0xc02b,
-    0x3b4b, 0xc02c, 0x3b3e, 0xc02d, 0x3b32, 0xc02e, 0x3b25, 0xc02f,
-    0x3b19, 0xc030, 0x3b0c, 0xc031, 0x3b00, 0xc032, 0x3af3, 0xc033,
-    0x3ae6, 0xc034, 0x3ada, 0xc035, 0x3acd, 0xc036, 0x3ac1, 0xc037,
-    0x3ab4, 0xc038, 0x3aa8, 0xc039, 0x3a9b, 0xc03a, 0x3a8f, 0xc03b,
-    0x3a82, 0xc03c, 0x3a76, 0xc03d, 0x3a69, 0xc03f, 0x3a5d, 0xc040,
-    0x3a50, 0xc041, 0x3a44, 0xc042, 0x3a37, 0xc043, 0x3a2b, 0xc044,
-    0x3a1e, 0xc045, 0x3a12, 0xc047, 0x3a05, 0xc048, 0x39f9, 0xc049,
-    0x39ec, 0xc04a, 0x39e0, 0xc04b, 0x39d3, 0xc04c, 0x39c7, 0xc04e,
-    0x39ba, 0xc04f, 0x39ae, 0xc050, 0x39a1, 0xc051, 0x3995, 0xc053,
-    0x3988, 0xc054, 0x397c, 0xc055, 0x396f, 0xc056, 0x3963, 0xc058,
-    0x3956, 0xc059, 0x394a, 0xc05a, 0x393d, 0xc05c, 0x3931, 0xc05d,
-    0x3924, 0xc05e, 0x3918, 0xc060, 0x390b, 0xc061, 0x38ff, 0xc062,
-    0x38f2, 0xc064, 0x38e6, 0xc065, 0x38d9, 0xc067, 0x38cd, 0xc068,
-    0x38c0, 0xc069, 0x38b4, 0xc06b, 0x38a7, 0xc06c, 0x389b, 0xc06e,
-    0x388e, 0xc06f, 0x3882, 0xc071, 0x3875, 0xc072, 0x3869, 0xc074,
-    0x385c, 0xc075, 0x3850, 0xc077, 0x3843, 0xc078, 0x3837, 0xc07a,
-    0x382a, 0xc07b, 0x381e, 0xc07d, 0x3811, 0xc07e, 0x3805, 0xc080,
-    0x37f9, 0xc081, 0x37ec, 0xc083, 0x37e0, 0xc085, 0x37d3, 0xc086,
-    0x37c7, 0xc088, 0x37ba, 0xc089, 0x37ae, 0xc08b, 0x37a1, 0xc08d,
-    0x3795, 0xc08e, 0x3788, 0xc090, 0x377c, 0xc092, 0x376f, 0xc093,
-    0x3763, 0xc095, 0x3757, 0xc097, 0x374a, 0xc098, 0x373e, 0xc09a,
-    0x3731, 0xc09c, 0x3725, 0xc09e, 0x3718, 0xc09f, 0x370c, 0xc0a1,
-    0x36ff, 0xc0a3, 0x36f3, 0xc0a5, 0x36e7, 0xc0a6, 0x36da, 0xc0a8,
-    0x36ce, 0xc0aa, 0x36c1, 0xc0ac, 0x36b5, 0xc0ae, 0x36a8, 0xc0af,
-    0x369c, 0xc0b1, 0x3690, 0xc0b3, 0x3683, 0xc0b5, 0x3677, 0xc0b7,
-    0x366a, 0xc0b9, 0x365e, 0xc0bb, 0x3651, 0xc0bd, 0x3645, 0xc0be,
-    0x3639, 0xc0c0, 0x362c, 0xc0c2, 0x3620, 0xc0c4, 0x3613, 0xc0c6,
-    0x3607, 0xc0c8, 0x35fa, 0xc0ca, 0x35ee, 0xc0cc, 0x35e2, 0xc0ce,
-    0x35d5, 0xc0d0, 0x35c9, 0xc0d2, 0x35bc, 0xc0d4, 0x35b0, 0xc0d6,
-    0x35a4, 0xc0d8, 0x3597, 0xc0da, 0x358b, 0xc0dc, 0x357e, 0xc0de,
-    0x3572, 0xc0e0, 0x3566, 0xc0e2, 0x3559, 0xc0e4, 0x354d, 0xc0e7,
-    0x3540, 0xc0e9, 0x3534, 0xc0eb, 0x3528, 0xc0ed, 0x351b, 0xc0ef,
-    0x350f, 0xc0f1, 0x3503, 0xc0f3, 0x34f6, 0xc0f6, 0x34ea, 0xc0f8,
-    0x34dd, 0xc0fa, 0x34d1, 0xc0fc, 0x34c5, 0xc0fe, 0x34b8, 0xc100,
-    0x34ac, 0xc103, 0x34a0, 0xc105, 0x3493, 0xc107, 0x3487, 0xc109,
-    0x347b, 0xc10c, 0x346e, 0xc10e, 0x3462, 0xc110, 0x3455, 0xc113,
-    0x3449, 0xc115, 0x343d, 0xc117, 0x3430, 0xc119, 0x3424, 0xc11c,
-    0x3418, 0xc11e, 0x340b, 0xc120, 0x33ff, 0xc123, 0x33f3, 0xc125,
-    0x33e6, 0xc128, 0x33da, 0xc12a, 0x33ce, 0xc12c, 0x33c1, 0xc12f,
-    0x33b5, 0xc131, 0x33a9, 0xc134, 0x339c, 0xc136, 0x3390, 0xc138,
-    0x3384, 0xc13b, 0x3377, 0xc13d, 0x336b, 0xc140, 0x335f, 0xc142,
-    0x3352, 0xc145, 0x3346, 0xc147, 0x333a, 0xc14a, 0x332d, 0xc14c,
-    0x3321, 0xc14f, 0x3315, 0xc151, 0x3308, 0xc154, 0x32fc, 0xc156,
-    0x32f0, 0xc159, 0x32e4, 0xc15b, 0x32d7, 0xc15e, 0x32cb, 0xc161,
-    0x32bf, 0xc163, 0x32b2, 0xc166, 0x32a6, 0xc168, 0x329a, 0xc16b,
-    0x328e, 0xc16e, 0x3281, 0xc170, 0x3275, 0xc173, 0x3269, 0xc176,
-    0x325c, 0xc178, 0x3250, 0xc17b, 0x3244, 0xc17e, 0x3238, 0xc180,
-    0x322b, 0xc183, 0x321f, 0xc186, 0x3213, 0xc189, 0x3207, 0xc18b,
-    0x31fa, 0xc18e, 0x31ee, 0xc191, 0x31e2, 0xc194, 0x31d5, 0xc196,
-    0x31c9, 0xc199, 0x31bd, 0xc19c, 0x31b1, 0xc19f, 0x31a4, 0xc1a2,
-    0x3198, 0xc1a4, 0x318c, 0xc1a7, 0x3180, 0xc1aa, 0x3174, 0xc1ad,
-    0x3167, 0xc1b0, 0x315b, 0xc1b3, 0x314f, 0xc1b6, 0x3143, 0xc1b8,
-    0x3136, 0xc1bb, 0x312a, 0xc1be, 0x311e, 0xc1c1, 0x3112, 0xc1c4,
-    0x3105, 0xc1c7, 0x30f9, 0xc1ca, 0x30ed, 0xc1cd, 0x30e1, 0xc1d0,
-    0x30d5, 0xc1d3, 0x30c8, 0xc1d6, 0x30bc, 0xc1d9, 0x30b0, 0xc1dc,
-    0x30a4, 0xc1df, 0x3098, 0xc1e2, 0x308b, 0xc1e5, 0x307f, 0xc1e8,
-    0x3073, 0xc1eb, 0x3067, 0xc1ee, 0x305b, 0xc1f1, 0x304e, 0xc1f4,
-    0x3042, 0xc1f7, 0x3036, 0xc1fa, 0x302a, 0xc1fd, 0x301e, 0xc201,
-    0x3012, 0xc204, 0x3005, 0xc207, 0x2ff9, 0xc20a, 0x2fed, 0xc20d,
-    0x2fe1, 0xc210, 0x2fd5, 0xc213, 0x2fc9, 0xc217, 0x2fbc, 0xc21a,
-    0x2fb0, 0xc21d, 0x2fa4, 0xc220, 0x2f98, 0xc223, 0x2f8c, 0xc227,
-    0x2f80, 0xc22a, 0x2f74, 0xc22d, 0x2f67, 0xc230, 0x2f5b, 0xc234,
-    0x2f4f, 0xc237, 0x2f43, 0xc23a, 0x2f37, 0xc23e, 0x2f2b, 0xc241,
-    0x2f1f, 0xc244, 0x2f13, 0xc247, 0x2f06, 0xc24b, 0x2efa, 0xc24e,
-    0x2eee, 0xc251, 0x2ee2, 0xc255, 0x2ed6, 0xc258, 0x2eca, 0xc25c,
-    0x2ebe, 0xc25f, 0x2eb2, 0xc262, 0x2ea6, 0xc266, 0x2e99, 0xc269,
-    0x2e8d, 0xc26d, 0x2e81, 0xc270, 0x2e75, 0xc273, 0x2e69, 0xc277,
-    0x2e5d, 0xc27a, 0x2e51, 0xc27e, 0x2e45, 0xc281, 0x2e39, 0xc285,
-    0x2e2d, 0xc288, 0x2e21, 0xc28c, 0x2e15, 0xc28f, 0x2e09, 0xc293,
-    0x2dfc, 0xc296, 0x2df0, 0xc29a, 0x2de4, 0xc29d, 0x2dd8, 0xc2a1,
-    0x2dcc, 0xc2a5, 0x2dc0, 0xc2a8, 0x2db4, 0xc2ac, 0x2da8, 0xc2af,
-    0x2d9c, 0xc2b3, 0x2d90, 0xc2b7, 0x2d84, 0xc2ba, 0x2d78, 0xc2be,
-    0x2d6c, 0xc2c1, 0x2d60, 0xc2c5, 0x2d54, 0xc2c9, 0x2d48, 0xc2cc,
-    0x2d3c, 0xc2d0, 0x2d30, 0xc2d4, 0x2d24, 0xc2d8, 0x2d18, 0xc2db,
-    0x2d0c, 0xc2df, 0x2d00, 0xc2e3, 0x2cf4, 0xc2e6, 0x2ce8, 0xc2ea,
-    0x2cdc, 0xc2ee, 0x2cd0, 0xc2f2, 0x2cc4, 0xc2f5, 0x2cb8, 0xc2f9,
-    0x2cac, 0xc2fd, 0x2ca0, 0xc301, 0x2c94, 0xc305, 0x2c88, 0xc308,
-    0x2c7c, 0xc30c, 0x2c70, 0xc310, 0x2c64, 0xc314, 0x2c58, 0xc318,
-    0x2c4c, 0xc31c, 0x2c40, 0xc320, 0x2c34, 0xc323, 0x2c28, 0xc327,
-    0x2c1c, 0xc32b, 0x2c10, 0xc32f, 0x2c05, 0xc333, 0x2bf9, 0xc337,
-    0x2bed, 0xc33b, 0x2be1, 0xc33f, 0x2bd5, 0xc343, 0x2bc9, 0xc347,
-    0x2bbd, 0xc34b, 0x2bb1, 0xc34f, 0x2ba5, 0xc353, 0x2b99, 0xc357,
-    0x2b8d, 0xc35b, 0x2b81, 0xc35f, 0x2b75, 0xc363, 0x2b6a, 0xc367,
-    0x2b5e, 0xc36b, 0x2b52, 0xc36f, 0x2b46, 0xc373, 0x2b3a, 0xc377,
-    0x2b2e, 0xc37b, 0x2b22, 0xc37f, 0x2b16, 0xc383, 0x2b0a, 0xc387,
-    0x2aff, 0xc38c, 0x2af3, 0xc390, 0x2ae7, 0xc394, 0x2adb, 0xc398,
-    0x2acf, 0xc39c, 0x2ac3, 0xc3a0, 0x2ab7, 0xc3a5, 0x2aac, 0xc3a9,
-    0x2aa0, 0xc3ad, 0x2a94, 0xc3b1, 0x2a88, 0xc3b5, 0x2a7c, 0xc3ba,
-    0x2a70, 0xc3be, 0x2a65, 0xc3c2, 0x2a59, 0xc3c6, 0x2a4d, 0xc3ca,
-    0x2a41, 0xc3cf, 0x2a35, 0xc3d3, 0x2a29, 0xc3d7, 0x2a1e, 0xc3dc,
-    0x2a12, 0xc3e0, 0x2a06, 0xc3e4, 0x29fa, 0xc3e9, 0x29ee, 0xc3ed,
-    0x29e3, 0xc3f1, 0x29d7, 0xc3f6, 0x29cb, 0xc3fa, 0x29bf, 0xc3fe,
-    0x29b4, 0xc403, 0x29a8, 0xc407, 0x299c, 0xc40b, 0x2990, 0xc410,
-    0x2984, 0xc414, 0x2979, 0xc419, 0x296d, 0xc41d, 0x2961, 0xc422,
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-    0x2926, 0xc438, 0x291b, 0xc43c, 0x290f, 0xc441, 0x2903, 0xc445,
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-    0x28c9, 0xc45c, 0x28bd, 0xc461, 0x28b1, 0xc465, 0x28a5, 0xc46a,
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-    0x286b, 0xc481, 0x285f, 0xc485, 0x2854, 0xc48a, 0x2848, 0xc48f,
-    0x283c, 0xc493, 0x2831, 0xc498, 0x2825, 0xc49d, 0x2819, 0xc4a1,
-    0x280e, 0xc4a6, 0x2802, 0xc4ab, 0x27f6, 0xc4b0, 0x27eb, 0xc4b4,
-    0x27df, 0xc4b9, 0x27d3, 0xc4be, 0x27c8, 0xc4c2, 0x27bc, 0xc4c7,
-    0x27b1, 0xc4cc, 0x27a5, 0xc4d1, 0x2799, 0xc4d6, 0x278e, 0xc4da,
-    0x2782, 0xc4df, 0x2777, 0xc4e4, 0x276b, 0xc4e9, 0x275f, 0xc4ee,
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-    0x269b, 0xc541, 0x268f, 0xc546, 0x2684, 0xc54b, 0x2678, 0xc550,
-    0x266d, 0xc555, 0x2661, 0xc55a, 0x2656, 0xc55f, 0x264a, 0xc564,
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-    0x25e3, 0xc592, 0x25d7, 0xc597, 0x25cc, 0xc59c, 0x25c0, 0xc5a1,
-    0x25b5, 0xc5a7, 0x25a9, 0xc5ac, 0x259e, 0xc5b1, 0x2592, 0xc5b6,
-    0x2587, 0xc5bb, 0x257c, 0xc5c1, 0x2570, 0xc5c6, 0x2565, 0xc5cb,
-    0x2559, 0xc5d0, 0x254e, 0xc5d5, 0x2542, 0xc5db, 0x2537, 0xc5e0,
-    0x252c, 0xc5e5, 0x2520, 0xc5ea, 0x2515, 0xc5f0, 0x2509, 0xc5f5,
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-    0x24a3, 0xc625, 0x2498, 0xc62a, 0x248c, 0xc630, 0x2481, 0xc635,
-    0x2476, 0xc63b, 0x246a, 0xc640, 0x245f, 0xc645, 0x2454, 0xc64b,
-    0x2448, 0xc650, 0x243d, 0xc656, 0x2432, 0xc65b, 0x2426, 0xc661,
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-    0x23c1, 0xc692, 0x23b5, 0xc698, 0x23aa, 0xc69d, 0x239f, 0xc6a3,
-    0x2394, 0xc6a8, 0x2388, 0xc6ae, 0x237d, 0xc6b4, 0x2372, 0xc6b9,
-    0x2367, 0xc6bf, 0x235b, 0xc6c5, 0x2350, 0xc6ca, 0x2345, 0xc6d0,
-    0x233a, 0xc6d5, 0x232e, 0xc6db, 0x2323, 0xc6e1, 0x2318, 0xc6e6,
-    0x230d, 0xc6ec, 0x2301, 0xc6f2, 0x22f6, 0xc6f7, 0x22eb, 0xc6fd,
-    0x22e0, 0xc703, 0x22d5, 0xc709, 0x22ca, 0xc70e, 0x22be, 0xc714,
-    0x22b3, 0xc71a, 0x22a8, 0xc720, 0x229d, 0xc725, 0x2292, 0xc72b,
-    0x2287, 0xc731, 0x227b, 0xc737, 0x2270, 0xc73d, 0x2265, 0xc742,
-    0x225a, 0xc748, 0x224f, 0xc74e, 0x2244, 0xc754, 0x2239, 0xc75a,
-    0x222d, 0xc75f, 0x2222, 0xc765, 0x2217, 0xc76b, 0x220c, 0xc771,
-    0x2201, 0xc777, 0x21f6, 0xc77d, 0x21eb, 0xc783, 0x21e0, 0xc789,
-    0x21d5, 0xc78f, 0x21ca, 0xc795, 0x21be, 0xc79a, 0x21b3, 0xc7a0,
-    0x21a8, 0xc7a6, 0x219d, 0xc7ac, 0x2192, 0xc7b2, 0x2187, 0xc7b8,
-    0x217c, 0xc7be, 0x2171, 0xc7c4, 0x2166, 0xc7ca, 0x215b, 0xc7d0,
-    0x2150, 0xc7d6, 0x2145, 0xc7dc, 0x213a, 0xc7e2, 0x212f, 0xc7e8,
-    0x2124, 0xc7ee, 0x2119, 0xc7f5, 0x210e, 0xc7fb, 0x2103, 0xc801,
-    0x20f8, 0xc807, 0x20ed, 0xc80d, 0x20e2, 0xc813, 0x20d7, 0xc819,
-    0x20cc, 0xc81f, 0x20c1, 0xc825, 0x20b6, 0xc82b, 0x20ab, 0xc832,
-    0x20a0, 0xc838, 0x2095, 0xc83e, 0x208a, 0xc844, 0x207f, 0xc84a,
-    0x2074, 0xc850, 0x2069, 0xc857, 0x205e, 0xc85d, 0x2054, 0xc863,
-    0x2049, 0xc869, 0x203e, 0xc870, 0x2033, 0xc876, 0x2028, 0xc87c,
-    0x201d, 0xc882, 0x2012, 0xc889, 0x2007, 0xc88f, 0x1ffc, 0xc895,
-    0x1ff1, 0xc89b, 0x1fe7, 0xc8a2, 0x1fdc, 0xc8a8, 0x1fd1, 0xc8ae,
-    0x1fc6, 0xc8b5, 0x1fbb, 0xc8bb, 0x1fb0, 0xc8c1, 0x1fa5, 0xc8c8,
-    0x1f9b, 0xc8ce, 0x1f90, 0xc8d4, 0x1f85, 0xc8db, 0x1f7a, 0xc8e1,
-    0x1f6f, 0xc8e8, 0x1f65, 0xc8ee, 0x1f5a, 0xc8f4, 0x1f4f, 0xc8fb,
-    0x1f44, 0xc901, 0x1f39, 0xc908, 0x1f2f, 0xc90e, 0x1f24, 0xc915,
-    0x1f19, 0xc91b, 0x1f0e, 0xc921, 0x1f03, 0xc928, 0x1ef9, 0xc92e,
-    0x1eee, 0xc935, 0x1ee3, 0xc93b, 0x1ed8, 0xc942, 0x1ece, 0xc948,
-    0x1ec3, 0xc94f, 0x1eb8, 0xc955, 0x1ead, 0xc95c, 0x1ea3, 0xc963,
-    0x1e98, 0xc969, 0x1e8d, 0xc970, 0x1e83, 0xc976, 0x1e78, 0xc97d,
-    0x1e6d, 0xc983, 0x1e62, 0xc98a, 0x1e58, 0xc991, 0x1e4d, 0xc997,
-    0x1e42, 0xc99e, 0x1e38, 0xc9a4, 0x1e2d, 0xc9ab, 0x1e22, 0xc9b2,
-    0x1e18, 0xc9b8, 0x1e0d, 0xc9bf, 0x1e02, 0xc9c6, 0x1df8, 0xc9cc,
-    0x1ded, 0xc9d3, 0x1de2, 0xc9da, 0x1dd8, 0xc9e0, 0x1dcd, 0xc9e7,
-    0x1dc3, 0xc9ee, 0x1db8, 0xc9f5, 0x1dad, 0xc9fb, 0x1da3, 0xca02,
-    0x1d98, 0xca09, 0x1d8e, 0xca10, 0x1d83, 0xca16, 0x1d78, 0xca1d,
-    0x1d6e, 0xca24, 0x1d63, 0xca2b, 0x1d59, 0xca32, 0x1d4e, 0xca38,
-    0x1d44, 0xca3f, 0x1d39, 0xca46, 0x1d2e, 0xca4d, 0x1d24, 0xca54,
-    0x1d19, 0xca5b, 0x1d0f, 0xca61, 0x1d04, 0xca68, 0x1cfa, 0xca6f,
-    0x1cef, 0xca76, 0x1ce5, 0xca7d, 0x1cda, 0xca84, 0x1cd0, 0xca8b,
-    0x1cc5, 0xca92, 0x1cbb, 0xca99, 0x1cb0, 0xca9f, 0x1ca6, 0xcaa6,
-    0x1c9b, 0xcaad, 0x1c91, 0xcab4, 0x1c86, 0xcabb, 0x1c7c, 0xcac2,
-    0x1c72, 0xcac9, 0x1c67, 0xcad0, 0x1c5d, 0xcad7, 0x1c52, 0xcade,
-    0x1c48, 0xcae5, 0x1c3d, 0xcaec, 0x1c33, 0xcaf3, 0x1c29, 0xcafa,
-    0x1c1e, 0xcb01, 0x1c14, 0xcb08, 0x1c09, 0xcb0f, 0x1bff, 0xcb16,
-    0x1bf5, 0xcb1e, 0x1bea, 0xcb25, 0x1be0, 0xcb2c, 0x1bd5, 0xcb33,
-    0x1bcb, 0xcb3a, 0x1bc1, 0xcb41, 0x1bb6, 0xcb48, 0x1bac, 0xcb4f,
-    0x1ba2, 0xcb56, 0x1b97, 0xcb5e, 0x1b8d, 0xcb65, 0x1b83, 0xcb6c,
-    0x1b78, 0xcb73, 0x1b6e, 0xcb7a, 0x1b64, 0xcb81, 0x1b59, 0xcb89,
-    0x1b4f, 0xcb90, 0x1b45, 0xcb97, 0x1b3b, 0xcb9e, 0x1b30, 0xcba5,
-    0x1b26, 0xcbad, 0x1b1c, 0xcbb4, 0x1b11, 0xcbbb, 0x1b07, 0xcbc2,
-    0x1afd, 0xcbca, 0x1af3, 0xcbd1, 0x1ae8, 0xcbd8, 0x1ade, 0xcbe0,
-    0x1ad4, 0xcbe7, 0x1aca, 0xcbee, 0x1abf, 0xcbf5, 0x1ab5, 0xcbfd,
-    0x1aab, 0xcc04, 0x1aa1, 0xcc0b, 0x1a97, 0xcc13, 0x1a8c, 0xcc1a,
-    0x1a82, 0xcc21, 0x1a78, 0xcc29, 0x1a6e, 0xcc30, 0x1a64, 0xcc38,
-    0x1a5a, 0xcc3f, 0x1a4f, 0xcc46, 0x1a45, 0xcc4e, 0x1a3b, 0xcc55,
-    0x1a31, 0xcc5d, 0x1a27, 0xcc64, 0x1a1d, 0xcc6b, 0x1a13, 0xcc73,
-    0x1a08, 0xcc7a, 0x19fe, 0xcc82, 0x19f4, 0xcc89, 0x19ea, 0xcc91,
-    0x19e0, 0xcc98, 0x19d6, 0xcca0, 0x19cc, 0xcca7, 0x19c2, 0xccaf,
-    0x19b8, 0xccb6, 0x19ae, 0xccbe, 0x19a4, 0xccc5, 0x199a, 0xcccd,
-    0x198f, 0xccd4, 0x1985, 0xccdc, 0x197b, 0xcce3, 0x1971, 0xcceb,
-    0x1967, 0xccf3, 0x195d, 0xccfa, 0x1953, 0xcd02, 0x1949, 0xcd09,
-    0x193f, 0xcd11, 0x1935, 0xcd19, 0x192b, 0xcd20, 0x1921, 0xcd28,
-    0x1917, 0xcd30, 0x190d, 0xcd37, 0x1903, 0xcd3f, 0x18f9, 0xcd46,
-    0x18ef, 0xcd4e, 0x18e6, 0xcd56, 0x18dc, 0xcd5d, 0x18d2, 0xcd65,
-    0x18c8, 0xcd6d, 0x18be, 0xcd75, 0x18b4, 0xcd7c, 0x18aa, 0xcd84,
-    0x18a0, 0xcd8c, 0x1896, 0xcd93, 0x188c, 0xcd9b, 0x1882, 0xcda3,
-    0x1878, 0xcdab, 0x186f, 0xcdb2, 0x1865, 0xcdba, 0x185b, 0xcdc2,
-    0x1851, 0xcdca, 0x1847, 0xcdd2, 0x183d, 0xcdd9, 0x1833, 0xcde1,
-    0x182a, 0xcde9, 0x1820, 0xcdf1, 0x1816, 0xcdf9, 0x180c, 0xce01,
-    0x1802, 0xce08, 0x17f8, 0xce10, 0x17ef, 0xce18, 0x17e5, 0xce20,
-    0x17db, 0xce28, 0x17d1, 0xce30, 0x17c8, 0xce38, 0x17be, 0xce40,
-    0x17b4, 0xce47, 0x17aa, 0xce4f, 0x17a0, 0xce57, 0x1797, 0xce5f,
-    0x178d, 0xce67, 0x1783, 0xce6f, 0x177a, 0xce77, 0x1770, 0xce7f,
-    0x1766, 0xce87, 0x175c, 0xce8f, 0x1753, 0xce97, 0x1749, 0xce9f,
-    0x173f, 0xcea7, 0x1736, 0xceaf, 0x172c, 0xceb7, 0x1722, 0xcebf,
-    0x1719, 0xcec7, 0x170f, 0xcecf, 0x1705, 0xced7, 0x16fc, 0xcedf,
-    0x16f2, 0xcee7, 0x16e8, 0xceef, 0x16df, 0xcef7, 0x16d5, 0xceff,
-    0x16cb, 0xcf07, 0x16c2, 0xcf10, 0x16b8, 0xcf18, 0x16af, 0xcf20,
-    0x16a5, 0xcf28, 0x169b, 0xcf30, 0x1692, 0xcf38, 0x1688, 0xcf40,
-    0x167f, 0xcf48, 0x1675, 0xcf51, 0x166c, 0xcf59, 0x1662, 0xcf61,
-    0x1659, 0xcf69, 0x164f, 0xcf71, 0x1645, 0xcf79, 0x163c, 0xcf82,
-    0x1632, 0xcf8a, 0x1629, 0xcf92, 0x161f, 0xcf9a, 0x1616, 0xcfa3,
-    0x160c, 0xcfab, 0x1603, 0xcfb3, 0x15f9, 0xcfbb, 0x15f0, 0xcfc4,
-    0x15e6, 0xcfcc, 0x15dd, 0xcfd4, 0x15d4, 0xcfdc, 0x15ca, 0xcfe5,
-    0x15c1, 0xcfed, 0x15b7, 0xcff5, 0x15ae, 0xcffe, 0x15a4, 0xd006,
-    0x159b, 0xd00e, 0x1592, 0xd016, 0x1588, 0xd01f, 0x157f, 0xd027,
-    0x1575, 0xd030, 0x156c, 0xd038, 0x1563, 0xd040, 0x1559, 0xd049,
-    0x1550, 0xd051, 0x1547, 0xd059, 0x153d, 0xd062, 0x1534, 0xd06a,
-    0x152a, 0xd073, 0x1521, 0xd07b, 0x1518, 0xd083, 0x150e, 0xd08c,
-    0x1505, 0xd094, 0x14fc, 0xd09d, 0x14f3, 0xd0a5, 0x14e9, 0xd0ae,
-    0x14e0, 0xd0b6, 0x14d7, 0xd0bf, 0x14cd, 0xd0c7, 0x14c4, 0xd0d0,
-    0x14bb, 0xd0d8, 0x14b2, 0xd0e0, 0x14a8, 0xd0e9, 0x149f, 0xd0f2,
-    0x1496, 0xd0fa, 0x148d, 0xd103, 0x1483, 0xd10b, 0x147a, 0xd114,
-    0x1471, 0xd11c, 0x1468, 0xd125, 0x145f, 0xd12d, 0x1455, 0xd136,
-    0x144c, 0xd13e, 0x1443, 0xd147, 0x143a, 0xd150, 0x1431, 0xd158,
-    0x1428, 0xd161, 0x141e, 0xd169, 0x1415, 0xd172, 0x140c, 0xd17b,
-    0x1403, 0xd183, 0x13fa, 0xd18c, 0x13f1, 0xd195, 0x13e8, 0xd19d,
-    0x13df, 0xd1a6, 0x13d5, 0xd1af, 0x13cc, 0xd1b7, 0x13c3, 0xd1c0,
-    0x13ba, 0xd1c9, 0x13b1, 0xd1d1, 0x13a8, 0xd1da, 0x139f, 0xd1e3,
-    0x1396, 0xd1eb, 0x138d, 0xd1f4, 0x1384, 0xd1fd, 0x137b, 0xd206,
-    0x1372, 0xd20e, 0x1369, 0xd217, 0x1360, 0xd220, 0x1357, 0xd229,
-    0x134e, 0xd231, 0x1345, 0xd23a, 0x133c, 0xd243, 0x1333, 0xd24c,
-    0x132a, 0xd255, 0x1321, 0xd25d, 0x1318, 0xd266, 0x130f, 0xd26f,
-    0x1306, 0xd278, 0x12fd, 0xd281, 0x12f4, 0xd28a, 0x12eb, 0xd292,
-    0x12e2, 0xd29b, 0x12d9, 0xd2a4, 0x12d1, 0xd2ad, 0x12c8, 0xd2b6,
-    0x12bf, 0xd2bf, 0x12b6, 0xd2c8, 0x12ad, 0xd2d1, 0x12a4, 0xd2d9,
-    0x129b, 0xd2e2, 0x1292, 0xd2eb, 0x128a, 0xd2f4, 0x1281, 0xd2fd,
-    0x1278, 0xd306, 0x126f, 0xd30f, 0x1266, 0xd318, 0x125d, 0xd321,
-    0x1255, 0xd32a, 0x124c, 0xd333, 0x1243, 0xd33c, 0x123a, 0xd345,
-    0x1231, 0xd34e, 0x1229, 0xd357, 0x1220, 0xd360, 0x1217, 0xd369,
-    0x120e, 0xd372, 0x1206, 0xd37b, 0x11fd, 0xd384, 0x11f4, 0xd38d,
-    0x11eb, 0xd396, 0x11e3, 0xd39f, 0x11da, 0xd3a8, 0x11d1, 0xd3b1,
-    0x11c9, 0xd3ba, 0x11c0, 0xd3c3, 0x11b7, 0xd3cc, 0x11af, 0xd3d5,
-    0x11a6, 0xd3df, 0x119d, 0xd3e8, 0x1195, 0xd3f1, 0x118c, 0xd3fa,
-    0x1183, 0xd403, 0x117b, 0xd40c, 0x1172, 0xd415, 0x1169, 0xd41e,
-    0x1161, 0xd428, 0x1158, 0xd431, 0x1150, 0xd43a, 0x1147, 0xd443,
-    0x113e, 0xd44c, 0x1136, 0xd455, 0x112d, 0xd45f, 0x1125, 0xd468,
-    0x111c, 0xd471, 0x1114, 0xd47a, 0x110b, 0xd483, 0x1103, 0xd48d,
-    0x10fa, 0xd496, 0x10f2, 0xd49f, 0x10e9, 0xd4a8, 0x10e0, 0xd4b2,
-    0x10d8, 0xd4bb, 0x10d0, 0xd4c4, 0x10c7, 0xd4cd, 0x10bf, 0xd4d7,
-    0x10b6, 0xd4e0, 0x10ae, 0xd4e9, 0x10a5, 0xd4f3, 0x109d, 0xd4fc,
-    0x1094, 0xd505, 0x108c, 0xd50e, 0x1083, 0xd518, 0x107b, 0xd521,
-    0x1073, 0xd52a, 0x106a, 0xd534, 0x1062, 0xd53d, 0x1059, 0xd547,
-    0x1051, 0xd550, 0x1049, 0xd559, 0x1040, 0xd563, 0x1038, 0xd56c,
-    0x1030, 0xd575, 0x1027, 0xd57f, 0x101f, 0xd588, 0x1016, 0xd592,
-    0x100e, 0xd59b, 0x1006, 0xd5a4, 0xffe, 0xd5ae, 0xff5, 0xd5b7,
-    0xfed, 0xd5c1, 0xfe5, 0xd5ca, 0xfdc, 0xd5d4, 0xfd4, 0xd5dd,
-    0xfcc, 0xd5e6, 0xfc4, 0xd5f0, 0xfbb, 0xd5f9, 0xfb3, 0xd603,
-    0xfab, 0xd60c, 0xfa3, 0xd616, 0xf9a, 0xd61f, 0xf92, 0xd629,
-    0xf8a, 0xd632, 0xf82, 0xd63c, 0xf79, 0xd645, 0xf71, 0xd64f,
-    0xf69, 0xd659, 0xf61, 0xd662, 0xf59, 0xd66c, 0xf51, 0xd675,
-    0xf48, 0xd67f, 0xf40, 0xd688, 0xf38, 0xd692, 0xf30, 0xd69b,
-    0xf28, 0xd6a5, 0xf20, 0xd6af, 0xf18, 0xd6b8, 0xf10, 0xd6c2,
-    0xf07, 0xd6cb, 0xeff, 0xd6d5, 0xef7, 0xd6df, 0xeef, 0xd6e8,
-    0xee7, 0xd6f2, 0xedf, 0xd6fc, 0xed7, 0xd705, 0xecf, 0xd70f,
-    0xec7, 0xd719, 0xebf, 0xd722, 0xeb7, 0xd72c, 0xeaf, 0xd736,
-    0xea7, 0xd73f, 0xe9f, 0xd749, 0xe97, 0xd753, 0xe8f, 0xd75c,
-    0xe87, 0xd766, 0xe7f, 0xd770, 0xe77, 0xd77a, 0xe6f, 0xd783,
-    0xe67, 0xd78d, 0xe5f, 0xd797, 0xe57, 0xd7a0, 0xe4f, 0xd7aa,
-    0xe47, 0xd7b4, 0xe40, 0xd7be, 0xe38, 0xd7c8, 0xe30, 0xd7d1,
-    0xe28, 0xd7db, 0xe20, 0xd7e5, 0xe18, 0xd7ef, 0xe10, 0xd7f8,
-    0xe08, 0xd802, 0xe01, 0xd80c, 0xdf9, 0xd816, 0xdf1, 0xd820,
-    0xde9, 0xd82a, 0xde1, 0xd833, 0xdd9, 0xd83d, 0xdd2, 0xd847,
-    0xdca, 0xd851, 0xdc2, 0xd85b, 0xdba, 0xd865, 0xdb2, 0xd86f,
-    0xdab, 0xd878, 0xda3, 0xd882, 0xd9b, 0xd88c, 0xd93, 0xd896,
-    0xd8c, 0xd8a0, 0xd84, 0xd8aa, 0xd7c, 0xd8b4, 0xd75, 0xd8be,
-    0xd6d, 0xd8c8, 0xd65, 0xd8d2, 0xd5d, 0xd8dc, 0xd56, 0xd8e6,
-    0xd4e, 0xd8ef, 0xd46, 0xd8f9, 0xd3f, 0xd903, 0xd37, 0xd90d,
-    0xd30, 0xd917, 0xd28, 0xd921, 0xd20, 0xd92b, 0xd19, 0xd935,
-    0xd11, 0xd93f, 0xd09, 0xd949, 0xd02, 0xd953, 0xcfa, 0xd95d,
-    0xcf3, 0xd967, 0xceb, 0xd971, 0xce3, 0xd97b, 0xcdc, 0xd985,
-    0xcd4, 0xd98f, 0xccd, 0xd99a, 0xcc5, 0xd9a4, 0xcbe, 0xd9ae,
-    0xcb6, 0xd9b8, 0xcaf, 0xd9c2, 0xca7, 0xd9cc, 0xca0, 0xd9d6,
-    0xc98, 0xd9e0, 0xc91, 0xd9ea, 0xc89, 0xd9f4, 0xc82, 0xd9fe,
-    0xc7a, 0xda08, 0xc73, 0xda13, 0xc6b, 0xda1d, 0xc64, 0xda27,
-    0xc5d, 0xda31, 0xc55, 0xda3b, 0xc4e, 0xda45, 0xc46, 0xda4f,
-    0xc3f, 0xda5a, 0xc38, 0xda64, 0xc30, 0xda6e, 0xc29, 0xda78,
-    0xc21, 0xda82, 0xc1a, 0xda8c, 0xc13, 0xda97, 0xc0b, 0xdaa1,
-    0xc04, 0xdaab, 0xbfd, 0xdab5, 0xbf5, 0xdabf, 0xbee, 0xdaca,
-    0xbe7, 0xdad4, 0xbe0, 0xdade, 0xbd8, 0xdae8, 0xbd1, 0xdaf3,
-    0xbca, 0xdafd, 0xbc2, 0xdb07, 0xbbb, 0xdb11, 0xbb4, 0xdb1c,
-    0xbad, 0xdb26, 0xba5, 0xdb30, 0xb9e, 0xdb3b, 0xb97, 0xdb45,
-    0xb90, 0xdb4f, 0xb89, 0xdb59, 0xb81, 0xdb64, 0xb7a, 0xdb6e,
-    0xb73, 0xdb78, 0xb6c, 0xdb83, 0xb65, 0xdb8d, 0xb5e, 0xdb97,
-    0xb56, 0xdba2, 0xb4f, 0xdbac, 0xb48, 0xdbb6, 0xb41, 0xdbc1,
-    0xb3a, 0xdbcb, 0xb33, 0xdbd5, 0xb2c, 0xdbe0, 0xb25, 0xdbea,
-    0xb1e, 0xdbf5, 0xb16, 0xdbff, 0xb0f, 0xdc09, 0xb08, 0xdc14,
-    0xb01, 0xdc1e, 0xafa, 0xdc29, 0xaf3, 0xdc33, 0xaec, 0xdc3d,
-    0xae5, 0xdc48, 0xade, 0xdc52, 0xad7, 0xdc5d, 0xad0, 0xdc67,
-    0xac9, 0xdc72, 0xac2, 0xdc7c, 0xabb, 0xdc86, 0xab4, 0xdc91,
-    0xaad, 0xdc9b, 0xaa6, 0xdca6, 0xa9f, 0xdcb0, 0xa99, 0xdcbb,
-    0xa92, 0xdcc5, 0xa8b, 0xdcd0, 0xa84, 0xdcda, 0xa7d, 0xdce5,
-    0xa76, 0xdcef, 0xa6f, 0xdcfa, 0xa68, 0xdd04, 0xa61, 0xdd0f,
-    0xa5b, 0xdd19, 0xa54, 0xdd24, 0xa4d, 0xdd2e, 0xa46, 0xdd39,
-    0xa3f, 0xdd44, 0xa38, 0xdd4e, 0xa32, 0xdd59, 0xa2b, 0xdd63,
-    0xa24, 0xdd6e, 0xa1d, 0xdd78, 0xa16, 0xdd83, 0xa10, 0xdd8e,
-    0xa09, 0xdd98, 0xa02, 0xdda3, 0x9fb, 0xddad, 0x9f5, 0xddb8,
-    0x9ee, 0xddc3, 0x9e7, 0xddcd, 0x9e0, 0xddd8, 0x9da, 0xdde2,
-    0x9d3, 0xdded, 0x9cc, 0xddf8, 0x9c6, 0xde02, 0x9bf, 0xde0d,
-    0x9b8, 0xde18, 0x9b2, 0xde22, 0x9ab, 0xde2d, 0x9a4, 0xde38,
-    0x99e, 0xde42, 0x997, 0xde4d, 0x991, 0xde58, 0x98a, 0xde62,
-    0x983, 0xde6d, 0x97d, 0xde78, 0x976, 0xde83, 0x970, 0xde8d,
-    0x969, 0xde98, 0x963, 0xdea3, 0x95c, 0xdead, 0x955, 0xdeb8,
-    0x94f, 0xdec3, 0x948, 0xdece, 0x942, 0xded8, 0x93b, 0xdee3,
-    0x935, 0xdeee, 0x92e, 0xdef9, 0x928, 0xdf03, 0x921, 0xdf0e,
-    0x91b, 0xdf19, 0x915, 0xdf24, 0x90e, 0xdf2f, 0x908, 0xdf39,
-    0x901, 0xdf44, 0x8fb, 0xdf4f, 0x8f4, 0xdf5a, 0x8ee, 0xdf65,
-    0x8e8, 0xdf6f, 0x8e1, 0xdf7a, 0x8db, 0xdf85, 0x8d4, 0xdf90,
-    0x8ce, 0xdf9b, 0x8c8, 0xdfa5, 0x8c1, 0xdfb0, 0x8bb, 0xdfbb,
-    0x8b5, 0xdfc6, 0x8ae, 0xdfd1, 0x8a8, 0xdfdc, 0x8a2, 0xdfe7,
-    0x89b, 0xdff1, 0x895, 0xdffc, 0x88f, 0xe007, 0x889, 0xe012,
-    0x882, 0xe01d, 0x87c, 0xe028, 0x876, 0xe033, 0x870, 0xe03e,
-    0x869, 0xe049, 0x863, 0xe054, 0x85d, 0xe05e, 0x857, 0xe069,
-    0x850, 0xe074, 0x84a, 0xe07f, 0x844, 0xe08a, 0x83e, 0xe095,
-    0x838, 0xe0a0, 0x832, 0xe0ab, 0x82b, 0xe0b6, 0x825, 0xe0c1,
-    0x81f, 0xe0cc, 0x819, 0xe0d7, 0x813, 0xe0e2, 0x80d, 0xe0ed,
-    0x807, 0xe0f8, 0x801, 0xe103, 0x7fb, 0xe10e, 0x7f5, 0xe119,
-    0x7ee, 0xe124, 0x7e8, 0xe12f, 0x7e2, 0xe13a, 0x7dc, 0xe145,
-    0x7d6, 0xe150, 0x7d0, 0xe15b, 0x7ca, 0xe166, 0x7c4, 0xe171,
-    0x7be, 0xe17c, 0x7b8, 0xe187, 0x7b2, 0xe192, 0x7ac, 0xe19d,
-    0x7a6, 0xe1a8, 0x7a0, 0xe1b3, 0x79a, 0xe1be, 0x795, 0xe1ca,
-    0x78f, 0xe1d5, 0x789, 0xe1e0, 0x783, 0xe1eb, 0x77d, 0xe1f6,
-    0x777, 0xe201, 0x771, 0xe20c, 0x76b, 0xe217, 0x765, 0xe222,
-    0x75f, 0xe22d, 0x75a, 0xe239, 0x754, 0xe244, 0x74e, 0xe24f,
-    0x748, 0xe25a, 0x742, 0xe265, 0x73d, 0xe270, 0x737, 0xe27b,
-    0x731, 0xe287, 0x72b, 0xe292, 0x725, 0xe29d, 0x720, 0xe2a8,
-    0x71a, 0xe2b3, 0x714, 0xe2be, 0x70e, 0xe2ca, 0x709, 0xe2d5,
-    0x703, 0xe2e0, 0x6fd, 0xe2eb, 0x6f7, 0xe2f6, 0x6f2, 0xe301,
-    0x6ec, 0xe30d, 0x6e6, 0xe318, 0x6e1, 0xe323, 0x6db, 0xe32e,
-    0x6d5, 0xe33a, 0x6d0, 0xe345, 0x6ca, 0xe350, 0x6c5, 0xe35b,
-    0x6bf, 0xe367, 0x6b9, 0xe372, 0x6b4, 0xe37d, 0x6ae, 0xe388,
-    0x6a8, 0xe394, 0x6a3, 0xe39f, 0x69d, 0xe3aa, 0x698, 0xe3b5,
-    0x692, 0xe3c1, 0x68d, 0xe3cc, 0x687, 0xe3d7, 0x682, 0xe3e2,
-    0x67c, 0xe3ee, 0x677, 0xe3f9, 0x671, 0xe404, 0x66c, 0xe410,
-    0x666, 0xe41b, 0x661, 0xe426, 0x65b, 0xe432, 0x656, 0xe43d,
-    0x650, 0xe448, 0x64b, 0xe454, 0x645, 0xe45f, 0x640, 0xe46a,
-    0x63b, 0xe476, 0x635, 0xe481, 0x630, 0xe48c, 0x62a, 0xe498,
-    0x625, 0xe4a3, 0x620, 0xe4ae, 0x61a, 0xe4ba, 0x615, 0xe4c5,
-    0x610, 0xe4d0, 0x60a, 0xe4dc, 0x605, 0xe4e7, 0x600, 0xe4f3,
-    0x5fa, 0xe4fe, 0x5f5, 0xe509, 0x5f0, 0xe515, 0x5ea, 0xe520,
-    0x5e5, 0xe52c, 0x5e0, 0xe537, 0x5db, 0xe542, 0x5d5, 0xe54e,
-    0x5d0, 0xe559, 0x5cb, 0xe565, 0x5c6, 0xe570, 0x5c1, 0xe57c,
-    0x5bb, 0xe587, 0x5b6, 0xe592, 0x5b1, 0xe59e, 0x5ac, 0xe5a9,
-    0x5a7, 0xe5b5, 0x5a1, 0xe5c0, 0x59c, 0xe5cc, 0x597, 0xe5d7,
-    0x592, 0xe5e3, 0x58d, 0xe5ee, 0x588, 0xe5fa, 0x583, 0xe605,
-    0x57e, 0xe611, 0x578, 0xe61c, 0x573, 0xe628, 0x56e, 0xe633,
-    0x569, 0xe63f, 0x564, 0xe64a, 0x55f, 0xe656, 0x55a, 0xe661,
-    0x555, 0xe66d, 0x550, 0xe678, 0x54b, 0xe684, 0x546, 0xe68f,
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-    0x2c1c, 0x3cd5, 0x2c28, 0x3cd9, 0x2c34, 0x3cdd, 0x2c40, 0x3ce0,
-    0x2c4c, 0x3ce4, 0x2c58, 0x3ce8, 0x2c64, 0x3cec, 0x2c70, 0x3cf0,
-    0x2c7c, 0x3cf4, 0x2c88, 0x3cf8, 0x2c94, 0x3cfb, 0x2ca0, 0x3cff,
-    0x2cac, 0x3d03, 0x2cb8, 0x3d07, 0x2cc4, 0x3d0b, 0x2cd0, 0x3d0e,
-    0x2cdc, 0x3d12, 0x2ce8, 0x3d16, 0x2cf4, 0x3d1a, 0x2d00, 0x3d1d,
-    0x2d0c, 0x3d21, 0x2d18, 0x3d25, 0x2d24, 0x3d28, 0x2d30, 0x3d2c,
-    0x2d3c, 0x3d30, 0x2d48, 0x3d34, 0x2d54, 0x3d37, 0x2d60, 0x3d3b,
-    0x2d6c, 0x3d3f, 0x2d78, 0x3d42, 0x2d84, 0x3d46, 0x2d90, 0x3d49,
-    0x2d9c, 0x3d4d, 0x2da8, 0x3d51, 0x2db4, 0x3d54, 0x2dc0, 0x3d58,
-    0x2dcc, 0x3d5b, 0x2dd8, 0x3d5f, 0x2de4, 0x3d63, 0x2df0, 0x3d66,
-    0x2dfc, 0x3d6a, 0x2e09, 0x3d6d, 0x2e15, 0x3d71, 0x2e21, 0x3d74,
-    0x2e2d, 0x3d78, 0x2e39, 0x3d7b, 0x2e45, 0x3d7f, 0x2e51, 0x3d82,
-    0x2e5d, 0x3d86, 0x2e69, 0x3d89, 0x2e75, 0x3d8d, 0x2e81, 0x3d90,
-    0x2e8d, 0x3d93, 0x2e99, 0x3d97, 0x2ea6, 0x3d9a, 0x2eb2, 0x3d9e,
-    0x2ebe, 0x3da1, 0x2eca, 0x3da4, 0x2ed6, 0x3da8, 0x2ee2, 0x3dab,
-    0x2eee, 0x3daf, 0x2efa, 0x3db2, 0x2f06, 0x3db5, 0x2f13, 0x3db9,
-    0x2f1f, 0x3dbc, 0x2f2b, 0x3dbf, 0x2f37, 0x3dc2, 0x2f43, 0x3dc6,
-    0x2f4f, 0x3dc9, 0x2f5b, 0x3dcc, 0x2f67, 0x3dd0, 0x2f74, 0x3dd3,
-    0x2f80, 0x3dd6, 0x2f8c, 0x3dd9, 0x2f98, 0x3ddd, 0x2fa4, 0x3de0,
-    0x2fb0, 0x3de3, 0x2fbc, 0x3de6, 0x2fc9, 0x3de9, 0x2fd5, 0x3ded,
-    0x2fe1, 0x3df0, 0x2fed, 0x3df3, 0x2ff9, 0x3df6, 0x3005, 0x3df9,
-    0x3012, 0x3dfc, 0x301e, 0x3dff, 0x302a, 0x3e03, 0x3036, 0x3e06,
-    0x3042, 0x3e09, 0x304e, 0x3e0c, 0x305b, 0x3e0f, 0x3067, 0x3e12,
-    0x3073, 0x3e15, 0x307f, 0x3e18, 0x308b, 0x3e1b, 0x3098, 0x3e1e,
-    0x30a4, 0x3e21, 0x30b0, 0x3e24, 0x30bc, 0x3e27, 0x30c8, 0x3e2a,
-    0x30d5, 0x3e2d, 0x30e1, 0x3e30, 0x30ed, 0x3e33, 0x30f9, 0x3e36,
-    0x3105, 0x3e39, 0x3112, 0x3e3c, 0x311e, 0x3e3f, 0x312a, 0x3e42,
-    0x3136, 0x3e45, 0x3143, 0x3e48, 0x314f, 0x3e4a, 0x315b, 0x3e4d,
-    0x3167, 0x3e50, 0x3174, 0x3e53, 0x3180, 0x3e56, 0x318c, 0x3e59,
-    0x3198, 0x3e5c, 0x31a4, 0x3e5e, 0x31b1, 0x3e61, 0x31bd, 0x3e64,
-    0x31c9, 0x3e67, 0x31d5, 0x3e6a, 0x31e2, 0x3e6c, 0x31ee, 0x3e6f,
-    0x31fa, 0x3e72, 0x3207, 0x3e75, 0x3213, 0x3e77, 0x321f, 0x3e7a,
-    0x322b, 0x3e7d, 0x3238, 0x3e80, 0x3244, 0x3e82, 0x3250, 0x3e85,
-    0x325c, 0x3e88, 0x3269, 0x3e8a, 0x3275, 0x3e8d, 0x3281, 0x3e90,
-    0x328e, 0x3e92, 0x329a, 0x3e95, 0x32a6, 0x3e98, 0x32b2, 0x3e9a,
-    0x32bf, 0x3e9d, 0x32cb, 0x3e9f, 0x32d7, 0x3ea2, 0x32e4, 0x3ea5,
-    0x32f0, 0x3ea7, 0x32fc, 0x3eaa, 0x3308, 0x3eac, 0x3315, 0x3eaf,
-    0x3321, 0x3eb1, 0x332d, 0x3eb4, 0x333a, 0x3eb6, 0x3346, 0x3eb9,
-    0x3352, 0x3ebb, 0x335f, 0x3ebe, 0x336b, 0x3ec0, 0x3377, 0x3ec3,
-    0x3384, 0x3ec5, 0x3390, 0x3ec8, 0x339c, 0x3eca, 0x33a9, 0x3ecc,
-    0x33b5, 0x3ecf, 0x33c1, 0x3ed1, 0x33ce, 0x3ed4, 0x33da, 0x3ed6,
-    0x33e6, 0x3ed8, 0x33f3, 0x3edb, 0x33ff, 0x3edd, 0x340b, 0x3ee0,
-    0x3418, 0x3ee2, 0x3424, 0x3ee4, 0x3430, 0x3ee7, 0x343d, 0x3ee9,
-    0x3449, 0x3eeb, 0x3455, 0x3eed, 0x3462, 0x3ef0, 0x346e, 0x3ef2,
-    0x347b, 0x3ef4, 0x3487, 0x3ef7, 0x3493, 0x3ef9, 0x34a0, 0x3efb,
-    0x34ac, 0x3efd, 0x34b8, 0x3f00, 0x34c5, 0x3f02, 0x34d1, 0x3f04,
-    0x34dd, 0x3f06, 0x34ea, 0x3f08, 0x34f6, 0x3f0a, 0x3503, 0x3f0d,
-    0x350f, 0x3f0f, 0x351b, 0x3f11, 0x3528, 0x3f13, 0x3534, 0x3f15,
-    0x3540, 0x3f17, 0x354d, 0x3f19, 0x3559, 0x3f1c, 0x3566, 0x3f1e,
-    0x3572, 0x3f20, 0x357e, 0x3f22, 0x358b, 0x3f24, 0x3597, 0x3f26,
-    0x35a4, 0x3f28, 0x35b0, 0x3f2a, 0x35bc, 0x3f2c, 0x35c9, 0x3f2e,
-    0x35d5, 0x3f30, 0x35e2, 0x3f32, 0x35ee, 0x3f34, 0x35fa, 0x3f36,
-    0x3607, 0x3f38, 0x3613, 0x3f3a, 0x3620, 0x3f3c, 0x362c, 0x3f3e,
-    0x3639, 0x3f40, 0x3645, 0x3f42, 0x3651, 0x3f43, 0x365e, 0x3f45,
-    0x366a, 0x3f47, 0x3677, 0x3f49, 0x3683, 0x3f4b, 0x3690, 0x3f4d,
-    0x369c, 0x3f4f, 0x36a8, 0x3f51, 0x36b5, 0x3f52, 0x36c1, 0x3f54,
-    0x36ce, 0x3f56, 0x36da, 0x3f58, 0x36e7, 0x3f5a, 0x36f3, 0x3f5b,
-    0x36ff, 0x3f5d, 0x370c, 0x3f5f, 0x3718, 0x3f61, 0x3725, 0x3f62,
-    0x3731, 0x3f64, 0x373e, 0x3f66, 0x374a, 0x3f68, 0x3757, 0x3f69,
-    0x3763, 0x3f6b, 0x376f, 0x3f6d, 0x377c, 0x3f6e, 0x3788, 0x3f70,
-    0x3795, 0x3f72, 0x37a1, 0x3f73, 0x37ae, 0x3f75, 0x37ba, 0x3f77,
-    0x37c7, 0x3f78, 0x37d3, 0x3f7a, 0x37e0, 0x3f7b, 0x37ec, 0x3f7d,
-    0x37f9, 0x3f7f, 0x3805, 0x3f80, 0x3811, 0x3f82, 0x381e, 0x3f83,
-    0x382a, 0x3f85, 0x3837, 0x3f86, 0x3843, 0x3f88, 0x3850, 0x3f89,
-    0x385c, 0x3f8b, 0x3869, 0x3f8c, 0x3875, 0x3f8e, 0x3882, 0x3f8f,
-    0x388e, 0x3f91, 0x389b, 0x3f92, 0x38a7, 0x3f94, 0x38b4, 0x3f95,
-    0x38c0, 0x3f97, 0x38cd, 0x3f98, 0x38d9, 0x3f99, 0x38e6, 0x3f9b,
-    0x38f2, 0x3f9c, 0x38ff, 0x3f9e, 0x390b, 0x3f9f, 0x3918, 0x3fa0,
-    0x3924, 0x3fa2, 0x3931, 0x3fa3, 0x393d, 0x3fa4, 0x394a, 0x3fa6,
-    0x3956, 0x3fa7, 0x3963, 0x3fa8, 0x396f, 0x3faa, 0x397c, 0x3fab,
-    0x3988, 0x3fac, 0x3995, 0x3fad, 0x39a1, 0x3faf, 0x39ae, 0x3fb0,
-    0x39ba, 0x3fb1, 0x39c7, 0x3fb2, 0x39d3, 0x3fb4, 0x39e0, 0x3fb5,
-    0x39ec, 0x3fb6, 0x39f9, 0x3fb7, 0x3a05, 0x3fb8, 0x3a12, 0x3fb9,
-    0x3a1e, 0x3fbb, 0x3a2b, 0x3fbc, 0x3a37, 0x3fbd, 0x3a44, 0x3fbe,
-    0x3a50, 0x3fbf, 0x3a5d, 0x3fc0, 0x3a69, 0x3fc1, 0x3a76, 0x3fc3,
-    0x3a82, 0x3fc4, 0x3a8f, 0x3fc5, 0x3a9b, 0x3fc6, 0x3aa8, 0x3fc7,
-    0x3ab4, 0x3fc8, 0x3ac1, 0x3fc9, 0x3acd, 0x3fca, 0x3ada, 0x3fcb,
-    0x3ae6, 0x3fcc, 0x3af3, 0x3fcd, 0x3b00, 0x3fce, 0x3b0c, 0x3fcf,
-    0x3b19, 0x3fd0, 0x3b25, 0x3fd1, 0x3b32, 0x3fd2, 0x3b3e, 0x3fd3,
-    0x3b4b, 0x3fd4, 0x3b57, 0x3fd5, 0x3b64, 0x3fd5, 0x3b70, 0x3fd6,
-    0x3b7d, 0x3fd7, 0x3b89, 0x3fd8, 0x3b96, 0x3fd9, 0x3ba2, 0x3fda,
-    0x3baf, 0x3fdb, 0x3bbc, 0x3fdc, 0x3bc8, 0x3fdc, 0x3bd5, 0x3fdd,
-    0x3be1, 0x3fde, 0x3bee, 0x3fdf, 0x3bfa, 0x3fe0, 0x3c07, 0x3fe0,
-    0x3c13, 0x3fe1, 0x3c20, 0x3fe2, 0x3c2c, 0x3fe3, 0x3c39, 0x3fe3,
-    0x3c45, 0x3fe4, 0x3c52, 0x3fe5, 0x3c5f, 0x3fe6, 0x3c6b, 0x3fe6,
-    0x3c78, 0x3fe7, 0x3c84, 0x3fe8, 0x3c91, 0x3fe8, 0x3c9d, 0x3fe9,
-    0x3caa, 0x3fea, 0x3cb6, 0x3fea, 0x3cc3, 0x3feb, 0x3cd0, 0x3fec,
-    0x3cdc, 0x3fec, 0x3ce9, 0x3fed, 0x3cf5, 0x3fed, 0x3d02, 0x3fee,
-    0x3d0e, 0x3fef, 0x3d1b, 0x3fef, 0x3d27, 0x3ff0, 0x3d34, 0x3ff0,
-    0x3d40, 0x3ff1, 0x3d4d, 0x3ff1, 0x3d5a, 0x3ff2, 0x3d66, 0x3ff2,
-    0x3d73, 0x3ff3, 0x3d7f, 0x3ff3, 0x3d8c, 0x3ff4, 0x3d98, 0x3ff4,
-    0x3da5, 0x3ff5, 0x3db2, 0x3ff5, 0x3dbe, 0x3ff6, 0x3dcb, 0x3ff6,
-    0x3dd7, 0x3ff7, 0x3de4, 0x3ff7, 0x3df0, 0x3ff7, 0x3dfd, 0x3ff8,
-    0x3e09, 0x3ff8, 0x3e16, 0x3ff9, 0x3e23, 0x3ff9, 0x3e2f, 0x3ff9,
-    0x3e3c, 0x3ffa, 0x3e48, 0x3ffa, 0x3e55, 0x3ffa, 0x3e61, 0x3ffb,
-    0x3e6e, 0x3ffb, 0x3e7a, 0x3ffb, 0x3e87, 0x3ffc, 0x3e94, 0x3ffc,
-    0x3ea0, 0x3ffc, 0x3ead, 0x3ffc, 0x3eb9, 0x3ffd, 0x3ec6, 0x3ffd,
-    0x3ed2, 0x3ffd, 0x3edf, 0x3ffd, 0x3eec, 0x3ffe, 0x3ef8, 0x3ffe,
-    0x3f05, 0x3ffe, 0x3f11, 0x3ffe, 0x3f1e, 0x3ffe, 0x3f2a, 0x3fff,
-    0x3f37, 0x3fff, 0x3f44, 0x3fff, 0x3f50, 0x3fff, 0x3f5d, 0x3fff,
-    0x3f69, 0x3fff, 0x3f76, 0x3fff, 0x3f82, 0x4000, 0x3f8f, 0x4000,
-    0x3f9b, 0x4000, 0x3fa8, 0x4000, 0x3fb5, 0x4000, 0x3fc1, 0x4000,
-    0x3fce, 0x4000, 0x3fda, 0x4000, 0x3fe7, 0x4000, 0x3ff3, 0x4000,
-};
-
-/**    
-* \par   
-* Generation of real_CoefB array:    
-* \par    
-* n = 4096    
-* 
for (i = 0; i < n; i++)    
-*  {    
-*    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-*  } 
   
-* \par    
-* Convert to fixed point Q15 format    
-*       round(pBTable[i] * pow(2, 15))    
-*    
-*/
-static const q15_t ALIGN4 realCoefBQ15[8192] = {
-    0x4000, 0x4000, 0x400d, 0x4000, 0x4019, 0x4000, 0x4026, 0x4000,
-    0x4032, 0x4000, 0x403f, 0x4000, 0x404b, 0x4000, 0x4058, 0x4000,
-    0x4065, 0x4000, 0x4071, 0x4000, 0x407e, 0x4000, 0x408a, 0x3fff,
-    0x4097, 0x3fff, 0x40a3, 0x3fff, 0x40b0, 0x3fff, 0x40bc, 0x3fff,
-    0x40c9, 0x3fff, 0x40d6, 0x3fff, 0x40e2, 0x3ffe, 0x40ef, 0x3ffe,
-    0x40fb, 0x3ffe, 0x4108, 0x3ffe, 0x4114, 0x3ffe, 0x4121, 0x3ffd,
-    0x412e, 0x3ffd, 0x413a, 0x3ffd, 0x4147, 0x3ffd, 0x4153, 0x3ffc,
-    0x4160, 0x3ffc, 0x416c, 0x3ffc, 0x4179, 0x3ffc, 0x4186, 0x3ffb,
-    0x4192, 0x3ffb, 0x419f, 0x3ffb, 0x41ab, 0x3ffa, 0x41b8, 0x3ffa,
-    0x41c4, 0x3ffa, 0x41d1, 0x3ff9, 0x41dd, 0x3ff9, 0x41ea, 0x3ff9,
-    0x41f7, 0x3ff8, 0x4203, 0x3ff8, 0x4210, 0x3ff7, 0x421c, 0x3ff7,
-    0x4229, 0x3ff7, 0x4235, 0x3ff6, 0x4242, 0x3ff6, 0x424e, 0x3ff5,
-    0x425b, 0x3ff5, 0x4268, 0x3ff4, 0x4274, 0x3ff4, 0x4281, 0x3ff3,
-    0x428d, 0x3ff3, 0x429a, 0x3ff2, 0x42a6, 0x3ff2, 0x42b3, 0x3ff1,
-    0x42c0, 0x3ff1, 0x42cc, 0x3ff0, 0x42d9, 0x3ff0, 0x42e5, 0x3fef,
-    0x42f2, 0x3fef, 0x42fe, 0x3fee, 0x430b, 0x3fed, 0x4317, 0x3fed,
-    0x4324, 0x3fec, 0x4330, 0x3fec, 0x433d, 0x3feb, 0x434a, 0x3fea,
-    0x4356, 0x3fea, 0x4363, 0x3fe9, 0x436f, 0x3fe8, 0x437c, 0x3fe8,
-    0x4388, 0x3fe7, 0x4395, 0x3fe6, 0x43a1, 0x3fe6, 0x43ae, 0x3fe5,
-    0x43bb, 0x3fe4, 0x43c7, 0x3fe3, 0x43d4, 0x3fe3, 0x43e0, 0x3fe2,
-    0x43ed, 0x3fe1, 0x43f9, 0x3fe0, 0x4406, 0x3fe0, 0x4412, 0x3fdf,
-    0x441f, 0x3fde, 0x442b, 0x3fdd, 0x4438, 0x3fdc, 0x4444, 0x3fdc,
-    0x4451, 0x3fdb, 0x445e, 0x3fda, 0x446a, 0x3fd9, 0x4477, 0x3fd8,
-    0x4483, 0x3fd7, 0x4490, 0x3fd6, 0x449c, 0x3fd5, 0x44a9, 0x3fd5,
-    0x44b5, 0x3fd4, 0x44c2, 0x3fd3, 0x44ce, 0x3fd2, 0x44db, 0x3fd1,
-    0x44e7, 0x3fd0, 0x44f4, 0x3fcf, 0x4500, 0x3fce, 0x450d, 0x3fcd,
-    0x451a, 0x3fcc, 0x4526, 0x3fcb, 0x4533, 0x3fca, 0x453f, 0x3fc9,
-    0x454c, 0x3fc8, 0x4558, 0x3fc7, 0x4565, 0x3fc6, 0x4571, 0x3fc5,
-    0x457e, 0x3fc4, 0x458a, 0x3fc3, 0x4597, 0x3fc1, 0x45a3, 0x3fc0,
-    0x45b0, 0x3fbf, 0x45bc, 0x3fbe, 0x45c9, 0x3fbd, 0x45d5, 0x3fbc,
-    0x45e2, 0x3fbb, 0x45ee, 0x3fb9, 0x45fb, 0x3fb8, 0x4607, 0x3fb7,
-    0x4614, 0x3fb6, 0x4620, 0x3fb5, 0x462d, 0x3fb4, 0x4639, 0x3fb2,
-    0x4646, 0x3fb1, 0x4652, 0x3fb0, 0x465f, 0x3faf, 0x466b, 0x3fad,
-    0x4678, 0x3fac, 0x4684, 0x3fab, 0x4691, 0x3faa, 0x469d, 0x3fa8,
-    0x46aa, 0x3fa7, 0x46b6, 0x3fa6, 0x46c3, 0x3fa4, 0x46cf, 0x3fa3,
-    0x46dc, 0x3fa2, 0x46e8, 0x3fa0, 0x46f5, 0x3f9f, 0x4701, 0x3f9e,
-    0x470e, 0x3f9c, 0x471a, 0x3f9b, 0x4727, 0x3f99, 0x4733, 0x3f98,
-    0x4740, 0x3f97, 0x474c, 0x3f95, 0x4759, 0x3f94, 0x4765, 0x3f92,
-    0x4772, 0x3f91, 0x477e, 0x3f8f, 0x478b, 0x3f8e, 0x4797, 0x3f8c,
-    0x47a4, 0x3f8b, 0x47b0, 0x3f89, 0x47bd, 0x3f88, 0x47c9, 0x3f86,
-    0x47d6, 0x3f85, 0x47e2, 0x3f83, 0x47ef, 0x3f82, 0x47fb, 0x3f80,
-    0x4807, 0x3f7f, 0x4814, 0x3f7d, 0x4820, 0x3f7b, 0x482d, 0x3f7a,
-    0x4839, 0x3f78, 0x4846, 0x3f77, 0x4852, 0x3f75, 0x485f, 0x3f73,
-    0x486b, 0x3f72, 0x4878, 0x3f70, 0x4884, 0x3f6e, 0x4891, 0x3f6d,
-    0x489d, 0x3f6b, 0x48a9, 0x3f69, 0x48b6, 0x3f68, 0x48c2, 0x3f66,
-    0x48cf, 0x3f64, 0x48db, 0x3f62, 0x48e8, 0x3f61, 0x48f4, 0x3f5f,
-    0x4901, 0x3f5d, 0x490d, 0x3f5b, 0x4919, 0x3f5a, 0x4926, 0x3f58,
-    0x4932, 0x3f56, 0x493f, 0x3f54, 0x494b, 0x3f52, 0x4958, 0x3f51,
-    0x4964, 0x3f4f, 0x4970, 0x3f4d, 0x497d, 0x3f4b, 0x4989, 0x3f49,
-    0x4996, 0x3f47, 0x49a2, 0x3f45, 0x49af, 0x3f43, 0x49bb, 0x3f42,
-    0x49c7, 0x3f40, 0x49d4, 0x3f3e, 0x49e0, 0x3f3c, 0x49ed, 0x3f3a,
-    0x49f9, 0x3f38, 0x4a06, 0x3f36, 0x4a12, 0x3f34, 0x4a1e, 0x3f32,
-    0x4a2b, 0x3f30, 0x4a37, 0x3f2e, 0x4a44, 0x3f2c, 0x4a50, 0x3f2a,
-    0x4a5c, 0x3f28, 0x4a69, 0x3f26, 0x4a75, 0x3f24, 0x4a82, 0x3f22,
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-    0x73a3, 0xda31, 0x739c, 0xda27, 0x7395, 0xda1d, 0x738d, 0xda13,
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-    0x71d8, 0xd7db, 0x71d0, 0xd7d1, 0x71c8, 0xd7c8, 0x71c0, 0xd7be,
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-    0x70d8, 0xd6a5, 0x70d0, 0xd69b, 0x70c8, 0xd692, 0x70c0, 0xd688,
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-    0x7034, 0xd5e6, 0x702c, 0xd5dd, 0x7024, 0xd5d4, 0x701b, 0xd5ca,
-    0x7013, 0xd5c1, 0x700b, 0xd5b7, 0x7002, 0xd5ae, 0x6ffa, 0xd5a4,
-    0x6ff2, 0xd59b, 0x6fea, 0xd592, 0x6fe1, 0xd588, 0x6fd9, 0xd57f,
-    0x6fd0, 0xd575, 0x6fc8, 0xd56c, 0x6fc0, 0xd563, 0x6fb7, 0xd559,
-    0x6faf, 0xd550, 0x6fa7, 0xd547, 0x6f9e, 0xd53d, 0x6f96, 0xd534,
-    0x6f8d, 0xd52a, 0x6f85, 0xd521, 0x6f7d, 0xd518, 0x6f74, 0xd50e,
-    0x6f6c, 0xd505, 0x6f63, 0xd4fc, 0x6f5b, 0xd4f3, 0x6f52, 0xd4e9,
-    0x6f4a, 0xd4e0, 0x6f41, 0xd4d7, 0x6f39, 0xd4cd, 0x6f30, 0xd4c4,
-    0x6f28, 0xd4bb, 0x6f20, 0xd4b2, 0x6f17, 0xd4a8, 0x6f0e, 0xd49f,
-    0x6f06, 0xd496, 0x6efd, 0xd48d, 0x6ef5, 0xd483, 0x6eec, 0xd47a,
-    0x6ee4, 0xd471, 0x6edb, 0xd468, 0x6ed3, 0xd45f, 0x6eca, 0xd455,
-    0x6ec2, 0xd44c, 0x6eb9, 0xd443, 0x6eb0, 0xd43a, 0x6ea8, 0xd431,
-    0x6e9f, 0xd428, 0x6e97, 0xd41e, 0x6e8e, 0xd415, 0x6e85, 0xd40c,
-    0x6e7d, 0xd403, 0x6e74, 0xd3fa, 0x6e6b, 0xd3f1, 0x6e63, 0xd3e8,
-    0x6e5a, 0xd3df, 0x6e51, 0xd3d5, 0x6e49, 0xd3cc, 0x6e40, 0xd3c3,
-    0x6e37, 0xd3ba, 0x6e2f, 0xd3b1, 0x6e26, 0xd3a8, 0x6e1d, 0xd39f,
-    0x6e15, 0xd396, 0x6e0c, 0xd38d, 0x6e03, 0xd384, 0x6dfa, 0xd37b,
-    0x6df2, 0xd372, 0x6de9, 0xd369, 0x6de0, 0xd360, 0x6dd7, 0xd357,
-    0x6dcf, 0xd34e, 0x6dc6, 0xd345, 0x6dbd, 0xd33c, 0x6db4, 0xd333,
-    0x6dab, 0xd32a, 0x6da3, 0xd321, 0x6d9a, 0xd318, 0x6d91, 0xd30f,
-    0x6d88, 0xd306, 0x6d7f, 0xd2fd, 0x6d76, 0xd2f4, 0x6d6e, 0xd2eb,
-    0x6d65, 0xd2e2, 0x6d5c, 0xd2d9, 0x6d53, 0xd2d1, 0x6d4a, 0xd2c8,
-    0x6d41, 0xd2bf, 0x6d38, 0xd2b6, 0x6d2f, 0xd2ad, 0x6d27, 0xd2a4,
-    0x6d1e, 0xd29b, 0x6d15, 0xd292, 0x6d0c, 0xd28a, 0x6d03, 0xd281,
-    0x6cfa, 0xd278, 0x6cf1, 0xd26f, 0x6ce8, 0xd266, 0x6cdf, 0xd25d,
-    0x6cd6, 0xd255, 0x6ccd, 0xd24c, 0x6cc4, 0xd243, 0x6cbb, 0xd23a,
-    0x6cb2, 0xd231, 0x6ca9, 0xd229, 0x6ca0, 0xd220, 0x6c97, 0xd217,
-    0x6c8e, 0xd20e, 0x6c85, 0xd206, 0x6c7c, 0xd1fd, 0x6c73, 0xd1f4,
-    0x6c6a, 0xd1eb, 0x6c61, 0xd1e3, 0x6c58, 0xd1da, 0x6c4f, 0xd1d1,
-    0x6c46, 0xd1c9, 0x6c3d, 0xd1c0, 0x6c34, 0xd1b7, 0x6c2b, 0xd1af,
-    0x6c21, 0xd1a6, 0x6c18, 0xd19d, 0x6c0f, 0xd195, 0x6c06, 0xd18c,
-    0x6bfd, 0xd183, 0x6bf4, 0xd17b, 0x6beb, 0xd172, 0x6be2, 0xd169,
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-    0x6b45, 0xd0d8, 0x6b3c, 0xd0d0, 0x6b33, 0xd0c7, 0x6b29, 0xd0bf,
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-    0x6afb, 0xd094, 0x6af2, 0xd08c, 0x6ae8, 0xd083, 0x6adf, 0xd07b,
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-    0x6a3f, 0xcfed, 0x6a36, 0xcfe5, 0x6a2c, 0xcfdc, 0x6a23, 0xcfd4,
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-    0x69f4, 0xcfab, 0x69ea, 0xcfa3, 0x69e1, 0xcf9a, 0x69d7, 0xcf92,
-    0x69ce, 0xcf8a, 0x69c4, 0xcf82, 0x69bb, 0xcf79, 0x69b1, 0xcf71,
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-    0x603a, 0xc8b5, 0x602f, 0xc8ae, 0x6024, 0xc8a8, 0x6019, 0xc8a2,
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-    0x5f8c, 0xc850, 0x5f81, 0xc84a, 0x5f76, 0xc844, 0x5f6b, 0xc83e,
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-    0x5f08, 0xc807, 0x5efd, 0xc801, 0x5ef2, 0xc7fb, 0x5ee7, 0xc7f5,
-    0x5edc, 0xc7ee, 0x5ed1, 0xc7e8, 0x5ec6, 0xc7e2, 0x5ebb, 0xc7dc,
-    0x5eb0, 0xc7d6, 0x5ea5, 0xc7d0, 0x5e9a, 0xc7ca, 0x5e8f, 0xc7c4,
-    0x5e84, 0xc7be, 0x5e79, 0xc7b8, 0x5e6e, 0xc7b2, 0x5e63, 0xc7ac,
-    0x5e58, 0xc7a6, 0x5e4d, 0xc7a0, 0x5e42, 0xc79a, 0x5e36, 0xc795,
-    0x5e2b, 0xc78f, 0x5e20, 0xc789, 0x5e15, 0xc783, 0x5e0a, 0xc77d,
-    0x5dff, 0xc777, 0x5df4, 0xc771, 0x5de9, 0xc76b, 0x5dde, 0xc765,
-    0x5dd3, 0xc75f, 0x5dc7, 0xc75a, 0x5dbc, 0xc754, 0x5db1, 0xc74e,
-    0x5da6, 0xc748, 0x5d9b, 0xc742, 0x5d90, 0xc73d, 0x5d85, 0xc737,
-    0x5d79, 0xc731, 0x5d6e, 0xc72b, 0x5d63, 0xc725, 0x5d58, 0xc720,
-    0x5d4d, 0xc71a, 0x5d42, 0xc714, 0x5d36, 0xc70e, 0x5d2b, 0xc709,
-    0x5d20, 0xc703, 0x5d15, 0xc6fd, 0x5d0a, 0xc6f7, 0x5cff, 0xc6f2,
-    0x5cf3, 0xc6ec, 0x5ce8, 0xc6e6, 0x5cdd, 0xc6e1, 0x5cd2, 0xc6db,
-    0x5cc6, 0xc6d5, 0x5cbb, 0xc6d0, 0x5cb0, 0xc6ca, 0x5ca5, 0xc6c5,
-    0x5c99, 0xc6bf, 0x5c8e, 0xc6b9, 0x5c83, 0xc6b4, 0x5c78, 0xc6ae,
-    0x5c6c, 0xc6a8, 0x5c61, 0xc6a3, 0x5c56, 0xc69d, 0x5c4b, 0xc698,
-    0x5c3f, 0xc692, 0x5c34, 0xc68d, 0x5c29, 0xc687, 0x5c1e, 0xc682,
-    0x5c12, 0xc67c, 0x5c07, 0xc677, 0x5bfc, 0xc671, 0x5bf0, 0xc66c,
-    0x5be5, 0xc666, 0x5bda, 0xc661, 0x5bce, 0xc65b, 0x5bc3, 0xc656,
-    0x5bb8, 0xc650, 0x5bac, 0xc64b, 0x5ba1, 0xc645, 0x5b96, 0xc640,
-    0x5b8a, 0xc63b, 0x5b7f, 0xc635, 0x5b74, 0xc630, 0x5b68, 0xc62a,
-    0x5b5d, 0xc625, 0x5b52, 0xc620, 0x5b46, 0xc61a, 0x5b3b, 0xc615,
-    0x5b30, 0xc610, 0x5b24, 0xc60a, 0x5b19, 0xc605, 0x5b0d, 0xc600,
-    0x5b02, 0xc5fa, 0x5af7, 0xc5f5, 0x5aeb, 0xc5f0, 0x5ae0, 0xc5ea,
-    0x5ad4, 0xc5e5, 0x5ac9, 0xc5e0, 0x5abe, 0xc5db, 0x5ab2, 0xc5d5,
-    0x5aa7, 0xc5d0, 0x5a9b, 0xc5cb, 0x5a90, 0xc5c6, 0x5a84, 0xc5c1,
-    0x5a79, 0xc5bb, 0x5a6e, 0xc5b6, 0x5a62, 0xc5b1, 0x5a57, 0xc5ac,
-    0x5a4b, 0xc5a7, 0x5a40, 0xc5a1, 0x5a34, 0xc59c, 0x5a29, 0xc597,
-    0x5a1d, 0xc592, 0x5a12, 0xc58d, 0x5a06, 0xc588, 0x59fb, 0xc583,
-    0x59ef, 0xc57e, 0x59e4, 0xc578, 0x59d8, 0xc573, 0x59cd, 0xc56e,
-    0x59c1, 0xc569, 0x59b6, 0xc564, 0x59aa, 0xc55f, 0x599f, 0xc55a,
-    0x5993, 0xc555, 0x5988, 0xc550, 0x597c, 0xc54b, 0x5971, 0xc546,
-    0x5965, 0xc541, 0x595a, 0xc53c, 0x594e, 0xc537, 0x5943, 0xc532,
-    0x5937, 0xc52d, 0x592c, 0xc528, 0x5920, 0xc523, 0x5914, 0xc51e,
-    0x5909, 0xc51a, 0x58fd, 0xc515, 0x58f2, 0xc510, 0x58e6, 0xc50b,
-    0x58db, 0xc506, 0x58cf, 0xc501, 0x58c3, 0xc4fc, 0x58b8, 0xc4f7,
-    0x58ac, 0xc4f2, 0x58a1, 0xc4ee, 0x5895, 0xc4e9, 0x5889, 0xc4e4,
-    0x587e, 0xc4df, 0x5872, 0xc4da, 0x5867, 0xc4d6, 0x585b, 0xc4d1,
-    0x584f, 0xc4cc, 0x5844, 0xc4c7, 0x5838, 0xc4c2, 0x582d, 0xc4be,
-    0x5821, 0xc4b9, 0x5815, 0xc4b4, 0x580a, 0xc4b0, 0x57fe, 0xc4ab,
-    0x57f2, 0xc4a6, 0x57e7, 0xc4a1, 0x57db, 0xc49d, 0x57cf, 0xc498,
-    0x57c4, 0xc493, 0x57b8, 0xc48f, 0x57ac, 0xc48a, 0x57a1, 0xc485,
-    0x5795, 0xc481, 0x5789, 0xc47c, 0x577e, 0xc478, 0x5772, 0xc473,
-    0x5766, 0xc46e, 0x575b, 0xc46a, 0x574f, 0xc465, 0x5743, 0xc461,
-    0x5737, 0xc45c, 0x572c, 0xc457, 0x5720, 0xc453, 0x5714, 0xc44e,
-    0x5709, 0xc44a, 0x56fd, 0xc445, 0x56f1, 0xc441, 0x56e5, 0xc43c,
-    0x56da, 0xc438, 0x56ce, 0xc433, 0x56c2, 0xc42f, 0x56b6, 0xc42a,
-    0x56ab, 0xc426, 0x569f, 0xc422, 0x5693, 0xc41d, 0x5687, 0xc419,
-    0x567c, 0xc414, 0x5670, 0xc410, 0x5664, 0xc40b, 0x5658, 0xc407,
-    0x564c, 0xc403, 0x5641, 0xc3fe, 0x5635, 0xc3fa, 0x5629, 0xc3f6,
-    0x561d, 0xc3f1, 0x5612, 0xc3ed, 0x5606, 0xc3e9, 0x55fa, 0xc3e4,
-    0x55ee, 0xc3e0, 0x55e2, 0xc3dc, 0x55d7, 0xc3d7, 0x55cb, 0xc3d3,
-    0x55bf, 0xc3cf, 0x55b3, 0xc3ca, 0x55a7, 0xc3c6, 0x559b, 0xc3c2,
-    0x5590, 0xc3be, 0x5584, 0xc3ba, 0x5578, 0xc3b5, 0x556c, 0xc3b1,
-    0x5560, 0xc3ad, 0x5554, 0xc3a9, 0x5549, 0xc3a5, 0x553d, 0xc3a0,
-    0x5531, 0xc39c, 0x5525, 0xc398, 0x5519, 0xc394, 0x550d, 0xc390,
-    0x5501, 0xc38c, 0x54f6, 0xc387, 0x54ea, 0xc383, 0x54de, 0xc37f,
-    0x54d2, 0xc37b, 0x54c6, 0xc377, 0x54ba, 0xc373, 0x54ae, 0xc36f,
-    0x54a2, 0xc36b, 0x5496, 0xc367, 0x548b, 0xc363, 0x547f, 0xc35f,
-    0x5473, 0xc35b, 0x5467, 0xc357, 0x545b, 0xc353, 0x544f, 0xc34f,
-    0x5443, 0xc34b, 0x5437, 0xc347, 0x542b, 0xc343, 0x541f, 0xc33f,
-    0x5413, 0xc33b, 0x5407, 0xc337, 0x53fb, 0xc333, 0x53f0, 0xc32f,
-    0x53e4, 0xc32b, 0x53d8, 0xc327, 0x53cc, 0xc323, 0x53c0, 0xc320,
-    0x53b4, 0xc31c, 0x53a8, 0xc318, 0x539c, 0xc314, 0x5390, 0xc310,
-    0x5384, 0xc30c, 0x5378, 0xc308, 0x536c, 0xc305, 0x5360, 0xc301,
-    0x5354, 0xc2fd, 0x5348, 0xc2f9, 0x533c, 0xc2f5, 0x5330, 0xc2f2,
-    0x5324, 0xc2ee, 0x5318, 0xc2ea, 0x530c, 0xc2e6, 0x5300, 0xc2e3,
-    0x52f4, 0xc2df, 0x52e8, 0xc2db, 0x52dc, 0xc2d8, 0x52d0, 0xc2d4,
-    0x52c4, 0xc2d0, 0x52b8, 0xc2cc, 0x52ac, 0xc2c9, 0x52a0, 0xc2c5,
-    0x5294, 0xc2c1, 0x5288, 0xc2be, 0x527c, 0xc2ba, 0x5270, 0xc2b7,
-    0x5264, 0xc2b3, 0x5258, 0xc2af, 0x524c, 0xc2ac, 0x5240, 0xc2a8,
-    0x5234, 0xc2a5, 0x5228, 0xc2a1, 0x521c, 0xc29d, 0x5210, 0xc29a,
-    0x5204, 0xc296, 0x51f7, 0xc293, 0x51eb, 0xc28f, 0x51df, 0xc28c,
-    0x51d3, 0xc288, 0x51c7, 0xc285, 0x51bb, 0xc281, 0x51af, 0xc27e,
-    0x51a3, 0xc27a, 0x5197, 0xc277, 0x518b, 0xc273, 0x517f, 0xc270,
-    0x5173, 0xc26d, 0x5167, 0xc269, 0x515a, 0xc266, 0x514e, 0xc262,
-    0x5142, 0xc25f, 0x5136, 0xc25c, 0x512a, 0xc258, 0x511e, 0xc255,
-    0x5112, 0xc251, 0x5106, 0xc24e, 0x50fa, 0xc24b, 0x50ed, 0xc247,
-    0x50e1, 0xc244, 0x50d5, 0xc241, 0x50c9, 0xc23e, 0x50bd, 0xc23a,
-    0x50b1, 0xc237, 0x50a5, 0xc234, 0x5099, 0xc230, 0x508c, 0xc22d,
-    0x5080, 0xc22a, 0x5074, 0xc227, 0x5068, 0xc223, 0x505c, 0xc220,
-    0x5050, 0xc21d, 0x5044, 0xc21a, 0x5037, 0xc217, 0x502b, 0xc213,
-    0x501f, 0xc210, 0x5013, 0xc20d, 0x5007, 0xc20a, 0x4ffb, 0xc207,
-    0x4fee, 0xc204, 0x4fe2, 0xc201, 0x4fd6, 0xc1fd, 0x4fca, 0xc1fa,
-    0x4fbe, 0xc1f7, 0x4fb2, 0xc1f4, 0x4fa5, 0xc1f1, 0x4f99, 0xc1ee,
-    0x4f8d, 0xc1eb, 0x4f81, 0xc1e8, 0x4f75, 0xc1e5, 0x4f68, 0xc1e2,
-    0x4f5c, 0xc1df, 0x4f50, 0xc1dc, 0x4f44, 0xc1d9, 0x4f38, 0xc1d6,
-    0x4f2b, 0xc1d3, 0x4f1f, 0xc1d0, 0x4f13, 0xc1cd, 0x4f07, 0xc1ca,
-    0x4efb, 0xc1c7, 0x4eee, 0xc1c4, 0x4ee2, 0xc1c1, 0x4ed6, 0xc1be,
-    0x4eca, 0xc1bb, 0x4ebd, 0xc1b8, 0x4eb1, 0xc1b6, 0x4ea5, 0xc1b3,
-    0x4e99, 0xc1b0, 0x4e8c, 0xc1ad, 0x4e80, 0xc1aa, 0x4e74, 0xc1a7,
-    0x4e68, 0xc1a4, 0x4e5c, 0xc1a2, 0x4e4f, 0xc19f, 0x4e43, 0xc19c,
-    0x4e37, 0xc199, 0x4e2b, 0xc196, 0x4e1e, 0xc194, 0x4e12, 0xc191,
-    0x4e06, 0xc18e, 0x4df9, 0xc18b, 0x4ded, 0xc189, 0x4de1, 0xc186,
-    0x4dd5, 0xc183, 0x4dc8, 0xc180, 0x4dbc, 0xc17e, 0x4db0, 0xc17b,
-    0x4da4, 0xc178, 0x4d97, 0xc176, 0x4d8b, 0xc173, 0x4d7f, 0xc170,
-    0x4d72, 0xc16e, 0x4d66, 0xc16b, 0x4d5a, 0xc168, 0x4d4e, 0xc166,
-    0x4d41, 0xc163, 0x4d35, 0xc161, 0x4d29, 0xc15e, 0x4d1c, 0xc15b,
-    0x4d10, 0xc159, 0x4d04, 0xc156, 0x4cf8, 0xc154, 0x4ceb, 0xc151,
-    0x4cdf, 0xc14f, 0x4cd3, 0xc14c, 0x4cc6, 0xc14a, 0x4cba, 0xc147,
-    0x4cae, 0xc145, 0x4ca1, 0xc142, 0x4c95, 0xc140, 0x4c89, 0xc13d,
-    0x4c7c, 0xc13b, 0x4c70, 0xc138, 0x4c64, 0xc136, 0x4c57, 0xc134,
-    0x4c4b, 0xc131, 0x4c3f, 0xc12f, 0x4c32, 0xc12c, 0x4c26, 0xc12a,
-    0x4c1a, 0xc128, 0x4c0d, 0xc125, 0x4c01, 0xc123, 0x4bf5, 0xc120,
-    0x4be8, 0xc11e, 0x4bdc, 0xc11c, 0x4bd0, 0xc119, 0x4bc3, 0xc117,
-    0x4bb7, 0xc115, 0x4bab, 0xc113, 0x4b9e, 0xc110, 0x4b92, 0xc10e,
-    0x4b85, 0xc10c, 0x4b79, 0xc109, 0x4b6d, 0xc107, 0x4b60, 0xc105,
-    0x4b54, 0xc103, 0x4b48, 0xc100, 0x4b3b, 0xc0fe, 0x4b2f, 0xc0fc,
-    0x4b23, 0xc0fa, 0x4b16, 0xc0f8, 0x4b0a, 0xc0f6, 0x4afd, 0xc0f3,
-    0x4af1, 0xc0f1, 0x4ae5, 0xc0ef, 0x4ad8, 0xc0ed, 0x4acc, 0xc0eb,
-    0x4ac0, 0xc0e9, 0x4ab3, 0xc0e7, 0x4aa7, 0xc0e4, 0x4a9a, 0xc0e2,
-    0x4a8e, 0xc0e0, 0x4a82, 0xc0de, 0x4a75, 0xc0dc, 0x4a69, 0xc0da,
-    0x4a5c, 0xc0d8, 0x4a50, 0xc0d6, 0x4a44, 0xc0d4, 0x4a37, 0xc0d2,
-    0x4a2b, 0xc0d0, 0x4a1e, 0xc0ce, 0x4a12, 0xc0cc, 0x4a06, 0xc0ca,
-    0x49f9, 0xc0c8, 0x49ed, 0xc0c6, 0x49e0, 0xc0c4, 0x49d4, 0xc0c2,
-    0x49c7, 0xc0c0, 0x49bb, 0xc0be, 0x49af, 0xc0bd, 0x49a2, 0xc0bb,
-    0x4996, 0xc0b9, 0x4989, 0xc0b7, 0x497d, 0xc0b5, 0x4970, 0xc0b3,
-    0x4964, 0xc0b1, 0x4958, 0xc0af, 0x494b, 0xc0ae, 0x493f, 0xc0ac,
-    0x4932, 0xc0aa, 0x4926, 0xc0a8, 0x4919, 0xc0a6, 0x490d, 0xc0a5,
-    0x4901, 0xc0a3, 0x48f4, 0xc0a1, 0x48e8, 0xc09f, 0x48db, 0xc09e,
-    0x48cf, 0xc09c, 0x48c2, 0xc09a, 0x48b6, 0xc098, 0x48a9, 0xc097,
-    0x489d, 0xc095, 0x4891, 0xc093, 0x4884, 0xc092, 0x4878, 0xc090,
-    0x486b, 0xc08e, 0x485f, 0xc08d, 0x4852, 0xc08b, 0x4846, 0xc089,
-    0x4839, 0xc088, 0x482d, 0xc086, 0x4820, 0xc085, 0x4814, 0xc083,
-    0x4807, 0xc081, 0x47fb, 0xc080, 0x47ef, 0xc07e, 0x47e2, 0xc07d,
-    0x47d6, 0xc07b, 0x47c9, 0xc07a, 0x47bd, 0xc078, 0x47b0, 0xc077,
-    0x47a4, 0xc075, 0x4797, 0xc074, 0x478b, 0xc072, 0x477e, 0xc071,
-    0x4772, 0xc06f, 0x4765, 0xc06e, 0x4759, 0xc06c, 0x474c, 0xc06b,
-    0x4740, 0xc069, 0x4733, 0xc068, 0x4727, 0xc067, 0x471a, 0xc065,
-    0x470e, 0xc064, 0x4701, 0xc062, 0x46f5, 0xc061, 0x46e8, 0xc060,
-    0x46dc, 0xc05e, 0x46cf, 0xc05d, 0x46c3, 0xc05c, 0x46b6, 0xc05a,
-    0x46aa, 0xc059, 0x469d, 0xc058, 0x4691, 0xc056, 0x4684, 0xc055,
-    0x4678, 0xc054, 0x466b, 0xc053, 0x465f, 0xc051, 0x4652, 0xc050,
-    0x4646, 0xc04f, 0x4639, 0xc04e, 0x462d, 0xc04c, 0x4620, 0xc04b,
-    0x4614, 0xc04a, 0x4607, 0xc049, 0x45fb, 0xc048, 0x45ee, 0xc047,
-    0x45e2, 0xc045, 0x45d5, 0xc044, 0x45c9, 0xc043, 0x45bc, 0xc042,
-    0x45b0, 0xc041, 0x45a3, 0xc040, 0x4597, 0xc03f, 0x458a, 0xc03d,
-    0x457e, 0xc03c, 0x4571, 0xc03b, 0x4565, 0xc03a, 0x4558, 0xc039,
-    0x454c, 0xc038, 0x453f, 0xc037, 0x4533, 0xc036, 0x4526, 0xc035,
-    0x451a, 0xc034, 0x450d, 0xc033, 0x4500, 0xc032, 0x44f4, 0xc031,
-    0x44e7, 0xc030, 0x44db, 0xc02f, 0x44ce, 0xc02e, 0x44c2, 0xc02d,
-    0x44b5, 0xc02c, 0x44a9, 0xc02b, 0x449c, 0xc02b, 0x4490, 0xc02a,
-    0x4483, 0xc029, 0x4477, 0xc028, 0x446a, 0xc027, 0x445e, 0xc026,
-    0x4451, 0xc025, 0x4444, 0xc024, 0x4438, 0xc024, 0x442b, 0xc023,
-    0x441f, 0xc022, 0x4412, 0xc021, 0x4406, 0xc020, 0x43f9, 0xc020,
-    0x43ed, 0xc01f, 0x43e0, 0xc01e, 0x43d4, 0xc01d, 0x43c7, 0xc01d,
-    0x43bb, 0xc01c, 0x43ae, 0xc01b, 0x43a1, 0xc01a, 0x4395, 0xc01a,
-    0x4388, 0xc019, 0x437c, 0xc018, 0x436f, 0xc018, 0x4363, 0xc017,
-    0x4356, 0xc016, 0x434a, 0xc016, 0x433d, 0xc015, 0x4330, 0xc014,
-    0x4324, 0xc014, 0x4317, 0xc013, 0x430b, 0xc013, 0x42fe, 0xc012,
-    0x42f2, 0xc011, 0x42e5, 0xc011, 0x42d9, 0xc010, 0x42cc, 0xc010,
-    0x42c0, 0xc00f, 0x42b3, 0xc00f, 0x42a6, 0xc00e, 0x429a, 0xc00e,
-    0x428d, 0xc00d, 0x4281, 0xc00d, 0x4274, 0xc00c, 0x4268, 0xc00c,
-    0x425b, 0xc00b, 0x424e, 0xc00b, 0x4242, 0xc00a, 0x4235, 0xc00a,
-    0x4229, 0xc009, 0x421c, 0xc009, 0x4210, 0xc009, 0x4203, 0xc008,
-    0x41f7, 0xc008, 0x41ea, 0xc007, 0x41dd, 0xc007, 0x41d1, 0xc007,
-    0x41c4, 0xc006, 0x41b8, 0xc006, 0x41ab, 0xc006, 0x419f, 0xc005,
-    0x4192, 0xc005, 0x4186, 0xc005, 0x4179, 0xc004, 0x416c, 0xc004,
-    0x4160, 0xc004, 0x4153, 0xc004, 0x4147, 0xc003, 0x413a, 0xc003,
-    0x412e, 0xc003, 0x4121, 0xc003, 0x4114, 0xc002, 0x4108, 0xc002,
-    0x40fb, 0xc002, 0x40ef, 0xc002, 0x40e2, 0xc002, 0x40d6, 0xc001,
-    0x40c9, 0xc001, 0x40bc, 0xc001, 0x40b0, 0xc001, 0x40a3, 0xc001,
-    0x4097, 0xc001, 0x408a, 0xc001, 0x407e, 0xc000, 0x4071, 0xc000,
-    0x4065, 0xc000, 0x4058, 0xc000, 0x404b, 0xc000, 0x403f, 0xc000,
-    0x4032, 0xc000, 0x4026, 0xc000, 0x4019, 0xc000, 0x400d, 0xc000,
-};
-
-/**    
-* @brief  Initialization function for the Q15 RFFT/RIFFT.   
-* @param[in, out] *S             points to an instance of the Q15 RFFT/RIFFT structure.   
-* @param[in]      fftLenReal     length of the FFT.   
-* @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.   
-* @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.   
-*    
-* \par Description:   
-* \par   
-* The parameter fftLenReal	Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.    
-* \par    
-* The parameter ifftFlagR controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.    
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par    
-* This function also initializes Twiddle factor table.     
-*/
-arm_status arm_rfft_init_q15(
-    arm_rfft_instance_q15 * S,
-    uint32_t fftLenReal,
-    uint32_t ifftFlagR,
-    uint32_t bitReverseFlag)
-{
-    /*  Initialise the default arm status */
-    arm_status status = ARM_MATH_SUCCESS;
-
-    /*  Initialize the Real FFT length */
-    S->fftLenReal = (uint16_t) fftLenReal;
-
-    /*  Initialize the Twiddle coefficientA pointer */
-    S->pTwiddleAReal = (q15_t *) realCoefAQ15;
-
-    /*  Initialize the Twiddle coefficientB pointer */
-    S->pTwiddleBReal = (q15_t *) realCoefBQ15;
-
-    /*  Initialize the Flag for selection of RFFT or RIFFT */
-    S->ifftFlagR = (uint8_t) ifftFlagR;
-
-    /*  Initialize the Flag for calculation Bit reversal or not */
-    S->bitReverseFlagR = (uint8_t) bitReverseFlag;
-
-    /*  Initialization of coef modifier depending on the FFT length */
-    switch (S->fftLenReal)
-    {
-    case 8192u:
-        S->twidCoefRModifier = 1u;
-        S->pCfft = &arm_cfft_sR_q15_len4096;
-        break;
-    case 4096u:
-        S->twidCoefRModifier = 2u;
-        S->pCfft = &arm_cfft_sR_q15_len2048;
-        break;
-    case 2048u:
-        S->twidCoefRModifier = 4u;
-        S->pCfft = &arm_cfft_sR_q15_len1024;
-        break;
-    case 1024u:
-        S->twidCoefRModifier = 8u;
-        S->pCfft = &arm_cfft_sR_q15_len512;
-        break;
-    case 512u:
-        S->twidCoefRModifier = 16u;
-        S->pCfft = &arm_cfft_sR_q15_len256;
-        break;
-    case 256u:
-        S->twidCoefRModifier = 32u;
-        S->pCfft = &arm_cfft_sR_q15_len128;
-        break;
-    case 128u:
-        S->twidCoefRModifier = 64u;
-        S->pCfft = &arm_cfft_sR_q15_len64;
-        break;
-    case 64u:
-        S->twidCoefRModifier = 128u;
-        S->pCfft = &arm_cfft_sR_q15_len32;
-        break;
-    case 32u:
-        S->twidCoefRModifier = 256u;
-        S->pCfft = &arm_cfft_sR_q15_len16;
-        break;
-    default:
-        /*  Reporting argument error if rfftSize is not valid value */
-        status = ARM_MATH_ARGUMENT_ERROR;
-        break;
-    }
-
-    /* return the status of RFFT Init function */
-    return (status);
-}
-
-/**    
-* @} end of RealFFT group    
-*/
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c
deleted file mode 100755
index 8ff254c0..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c
+++ /dev/null
@@ -1,4285 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_init_q31.c    
-*    
-* Description:	RFFT & RIFFT Q31 initialisation function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-#include "arm_const_structs.h"
-
-/**    
-* @ingroup groupTransforms    
-*/
-
-/**    
-* @addtogroup RealFFT    
-* @{    
-*/
-
-/**    
-* \par    
-* Generation fixed-point realCoefAQ31 array in Q31 format:    
-* \par    
-* n = 4096    
-* 
for (i = 0; i < n; i++)    
-* {    
-*    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-* }
    
-* \par    
-* Convert to fixed point Q31 format    
-*     round(pATable[i] * pow(2, 31))    
-*/
-
-
-static const q31_t realCoefAQ31[8192] = {
-    0x40000000, 0xc0000000, 0x3ff36f02, 0xc000013c,
-    0x3fe6de05, 0xc00004ef, 0x3fda4d09, 0xc0000b1a,
-    0x3fcdbc0f, 0xc00013bd, 0x3fc12b16, 0xc0001ed8,
-    0x3fb49a1f, 0xc0002c6a, 0x3fa8092c, 0xc0003c74,
-    0x3f9b783c, 0xc0004ef5, 0x3f8ee750, 0xc00063ee,
-    0x3f825668, 0xc0007b5f, 0x3f75c585, 0xc0009547,
-    0x3f6934a8, 0xc000b1a7, 0x3f5ca3d0, 0xc000d07e,
-    0x3f5012fe, 0xc000f1ce, 0x3f438234, 0xc0011594,
-    0x3f36f170, 0xc0013bd3, 0x3f2a60b4, 0xc0016489,
-    0x3f1dd001, 0xc0018fb6, 0x3f113f56, 0xc001bd5c,
-    0x3f04aeb5, 0xc001ed78, 0x3ef81e1d, 0xc002200d,
-    0x3eeb8d8f, 0xc0025519, 0x3edefd0c, 0xc0028c9c,
-    0x3ed26c94, 0xc002c697, 0x3ec5dc28, 0xc003030a,
-    0x3eb94bc8, 0xc00341f4, 0x3eacbb74, 0xc0038356,
-    0x3ea02b2e, 0xc003c72f, 0x3e939af5, 0xc0040d80,
-    0x3e870aca, 0xc0045648, 0x3e7a7aae, 0xc004a188,
-    0x3e6deaa1, 0xc004ef3f, 0x3e615aa3, 0xc0053f6e,
-    0x3e54cab5, 0xc0059214, 0x3e483ad8, 0xc005e731,
-    0x3e3bab0b, 0xc0063ec6, 0x3e2f1b50, 0xc00698d3,
-    0x3e228ba7, 0xc006f556, 0x3e15fc11, 0xc0075452,
-    0x3e096c8d, 0xc007b5c4, 0x3dfcdd1d, 0xc00819ae,
-    0x3df04dc0, 0xc008800f, 0x3de3be78, 0xc008e8e8,
-    0x3dd72f45, 0xc0095438, 0x3dcaa027, 0xc009c1ff,
-    0x3dbe111e, 0xc00a323d, 0x3db1822c, 0xc00aa4f3,
-    0x3da4f351, 0xc00b1a20, 0x3d98648d, 0xc00b91c4,
-    0x3d8bd5e1, 0xc00c0be0, 0x3d7f474d, 0xc00c8872,
-    0x3d72b8d2, 0xc00d077c, 0x3d662a70, 0xc00d88fd,
-    0x3d599c28, 0xc00e0cf5, 0x3d4d0df9, 0xc00e9364,
-    0x3d407fe6, 0xc00f1c4a, 0x3d33f1ed, 0xc00fa7a8,
-    0x3d276410, 0xc010357c, 0x3d1ad650, 0xc010c5c7,
-    0x3d0e48ab, 0xc011588a, 0x3d01bb24, 0xc011edc3,
-    0x3cf52dbb, 0xc0128574, 0x3ce8a06f, 0xc0131f9b,
-    0x3cdc1342, 0xc013bc39, 0x3ccf8634, 0xc0145b4e,
-    0x3cc2f945, 0xc014fcda, 0x3cb66c77, 0xc015a0dd,
-    0x3ca9dfc8, 0xc0164757, 0x3c9d533b, 0xc016f047,
-    0x3c90c6cf, 0xc0179bae, 0x3c843a85, 0xc018498c,
-    0x3c77ae5e, 0xc018f9e1, 0x3c6b2259, 0xc019acac,
-    0x3c5e9678, 0xc01a61ee, 0x3c520aba, 0xc01b19a7,
-    0x3c457f21, 0xc01bd3d6, 0x3c38f3ac, 0xc01c907c,
-    0x3c2c685d, 0xc01d4f99, 0x3c1fdd34, 0xc01e112b,
-    0x3c135231, 0xc01ed535, 0x3c06c754, 0xc01f9bb5,
-    0x3bfa3c9f, 0xc02064ab, 0x3bedb212, 0xc0213018,
-    0x3be127ac, 0xc021fdfb, 0x3bd49d70, 0xc022ce54,
-    0x3bc8135c, 0xc023a124, 0x3bbb8973, 0xc024766a,
-    0x3baeffb3, 0xc0254e27, 0x3ba2761e, 0xc0262859,
-    0x3b95ecb4, 0xc0270502, 0x3b896375, 0xc027e421,
-    0x3b7cda63, 0xc028c5b6, 0x3b70517d, 0xc029a9c1,
-    0x3b63c8c4, 0xc02a9042, 0x3b574039, 0xc02b7939,
-    0x3b4ab7db, 0xc02c64a6, 0x3b3e2fac, 0xc02d5289,
-    0x3b31a7ac, 0xc02e42e2, 0x3b251fdc, 0xc02f35b1,
-    0x3b18983b, 0xc0302af5, 0x3b0c10cb, 0xc03122b0,
-    0x3aff898c, 0xc0321ce0, 0x3af3027e, 0xc0331986,
-    0x3ae67ba2, 0xc03418a2, 0x3ad9f4f8, 0xc0351a33,
-    0x3acd6e81, 0xc0361e3a, 0x3ac0e83d, 0xc03724b6,
-    0x3ab4622d, 0xc0382da8, 0x3aa7dc52, 0xc0393910,
-    0x3a9b56ab, 0xc03a46ed, 0x3a8ed139, 0xc03b573f,
-    0x3a824bfd, 0xc03c6a07, 0x3a75c6f8, 0xc03d7f44,
-    0x3a694229, 0xc03e96f6, 0x3a5cbd91, 0xc03fb11d,
-    0x3a503930, 0xc040cdba, 0x3a43b508, 0xc041eccc,
-    0x3a373119, 0xc0430e53, 0x3a2aad62, 0xc044324f,
-    0x3a1e29e5, 0xc04558c0, 0x3a11a6a3, 0xc04681a6,
-    0x3a05239a, 0xc047ad01, 0x39f8a0cd, 0xc048dad1,
-    0x39ec1e3b, 0xc04a0b16, 0x39df9be6, 0xc04b3dcf,
-    0x39d319cc, 0xc04c72fe, 0x39c697f0, 0xc04daaa1,
-    0x39ba1651, 0xc04ee4b8, 0x39ad94f0, 0xc0502145,
-    0x39a113cd, 0xc0516045, 0x399492ea, 0xc052a1bb,
-    0x39881245, 0xc053e5a5, 0x397b91e1, 0xc0552c03,
-    0x396f11bc, 0xc05674d6, 0x396291d9, 0xc057c01d,
-    0x39561237, 0xc0590dd8, 0x394992d7, 0xc05a5e07,
-    0x393d13b8, 0xc05bb0ab, 0x393094dd, 0xc05d05c3,
-    0x39241645, 0xc05e5d4e, 0x391797f0, 0xc05fb74e,
-    0x390b19e0, 0xc06113c2, 0x38fe9c15, 0xc06272aa,
-    0x38f21e8e, 0xc063d405, 0x38e5a14d, 0xc06537d4,
-    0x38d92452, 0xc0669e18, 0x38cca79e, 0xc06806ce,
-    0x38c02b31, 0xc06971f9, 0x38b3af0c, 0xc06adf97,
-    0x38a7332e, 0xc06c4fa8, 0x389ab799, 0xc06dc22e,
-    0x388e3c4d, 0xc06f3726, 0x3881c14b, 0xc070ae92,
-    0x38754692, 0xc0722871, 0x3868cc24, 0xc073a4c3,
-    0x385c5201, 0xc0752389, 0x384fd829, 0xc076a4c2,
-    0x38435e9d, 0xc078286e, 0x3836e55d, 0xc079ae8c,
-    0x382a6c6a, 0xc07b371e, 0x381df3c5, 0xc07cc223,
-    0x38117b6d, 0xc07e4f9b, 0x38050364, 0xc07fdf85,
-    0x37f88ba9, 0xc08171e2, 0x37ec143e, 0xc08306b2,
-    0x37df9d22, 0xc0849df4, 0x37d32657, 0xc08637a9,
-    0x37c6afdc, 0xc087d3d0, 0x37ba39b3, 0xc089726a,
-    0x37adc3db, 0xc08b1376, 0x37a14e55, 0xc08cb6f5,
-    0x3794d922, 0xc08e5ce5, 0x37886442, 0xc0900548,
-    0x377befb5, 0xc091b01d, 0x376f7b7d, 0xc0935d64,
-    0x37630799, 0xc0950d1d, 0x3756940a, 0xc096bf48,
-    0x374a20d0, 0xc09873e4, 0x373daded, 0xc09a2af3,
-    0x37313b60, 0xc09be473, 0x3724c92a, 0xc09da065,
-    0x3718574b, 0xc09f5ec8, 0x370be5c4, 0xc0a11f9d,
-    0x36ff7496, 0xc0a2e2e3, 0x36f303c0, 0xc0a4a89b,
-    0x36e69344, 0xc0a670c4, 0x36da2321, 0xc0a83b5e,
-    0x36cdb359, 0xc0aa086a, 0x36c143ec, 0xc0abd7e6,
-    0x36b4d4d9, 0xc0ada9d4, 0x36a86623, 0xc0af7e33,
-    0x369bf7c9, 0xc0b15502, 0x368f89cb, 0xc0b32e42,
-    0x36831c2b, 0xc0b509f3, 0x3676aee8, 0xc0b6e815,
-    0x366a4203, 0xc0b8c8a7, 0x365dd57d, 0xc0baabaa,
-    0x36516956, 0xc0bc911d, 0x3644fd8f, 0xc0be7901,
-    0x36389228, 0xc0c06355, 0x362c2721, 0xc0c25019,
-    0x361fbc7b, 0xc0c43f4d, 0x36135237, 0xc0c630f2,
-    0x3606e854, 0xc0c82506, 0x35fa7ed4, 0xc0ca1b8a,
-    0x35ee15b7, 0xc0cc147f, 0x35e1acfd, 0xc0ce0fe3,
-    0x35d544a7, 0xc0d00db6, 0x35c8dcb6, 0xc0d20dfa,
-    0x35bc7529, 0xc0d410ad, 0x35b00e02, 0xc0d615cf,
-    0x35a3a740, 0xc0d81d61, 0x359740e5, 0xc0da2762,
-    0x358adaf0, 0xc0dc33d2, 0x357e7563, 0xc0de42b2,
-    0x3572103d, 0xc0e05401, 0x3565ab80, 0xc0e267be,
-    0x3559472b, 0xc0e47deb, 0x354ce33f, 0xc0e69686,
-    0x35407fbd, 0xc0e8b190, 0x35341ca5, 0xc0eacf09,
-    0x3527b9f7, 0xc0eceef1, 0x351b57b5, 0xc0ef1147,
-    0x350ef5de, 0xc0f1360b, 0x35029473, 0xc0f35d3e,
-    0x34f63374, 0xc0f586df, 0x34e9d2e3, 0xc0f7b2ee,
-    0x34dd72be, 0xc0f9e16b, 0x34d11308, 0xc0fc1257,
-    0x34c4b3c0, 0xc0fe45b0, 0x34b854e7, 0xc1007b77,
-    0x34abf67e, 0xc102b3ac, 0x349f9884, 0xc104ee4f,
-    0x34933afa, 0xc1072b5f, 0x3486dde1, 0xc1096add,
-    0x347a8139, 0xc10bacc8, 0x346e2504, 0xc10df120,
-    0x3461c940, 0xc11037e6, 0x34556def, 0xc1128119,
-    0x34491311, 0xc114ccb9, 0x343cb8a7, 0xc1171ac6,
-    0x34305eb0, 0xc1196b3f, 0x3424052f, 0xc11bbe26,
-    0x3417ac22, 0xc11e1379, 0x340b538b, 0xc1206b39,
-    0x33fefb6a, 0xc122c566, 0x33f2a3bf, 0xc12521ff,
-    0x33e64c8c, 0xc1278104, 0x33d9f5cf, 0xc129e276,
-    0x33cd9f8b, 0xc12c4653, 0x33c149bf, 0xc12eac9d,
-    0x33b4f46c, 0xc1311553, 0x33a89f92, 0xc1338075,
-    0x339c4b32, 0xc135ee02, 0x338ff74d, 0xc1385dfb,
-    0x3383a3e2, 0xc13ad060, 0x337750f2, 0xc13d4530,
-    0x336afe7e, 0xc13fbc6c, 0x335eac86, 0xc1423613,
-    0x33525b0b, 0xc144b225, 0x33460a0d, 0xc14730a3,
-    0x3339b98d, 0xc149b18b, 0x332d698a, 0xc14c34df,
-    0x33211a07, 0xc14eba9d, 0x3314cb02, 0xc15142c6,
-    0x33087c7d, 0xc153cd5a, 0x32fc2e77, 0xc1565a58,
-    0x32efe0f2, 0xc158e9c1, 0x32e393ef, 0xc15b7b94,
-    0x32d7476c, 0xc15e0fd1, 0x32cafb6b, 0xc160a678,
-    0x32beafed, 0xc1633f8a, 0x32b264f2, 0xc165db05,
-    0x32a61a7a, 0xc16878eb, 0x3299d085, 0xc16b193a,
-    0x328d8715, 0xc16dbbf3, 0x32813e2a, 0xc1706115,
-    0x3274f5c3, 0xc17308a1, 0x3268ade3, 0xc175b296,
-    0x325c6688, 0xc1785ef4, 0x32501fb5, 0xc17b0dbb,
-    0x3243d968, 0xc17dbeec, 0x323793a3, 0xc1807285,
-    0x322b4e66, 0xc1832888, 0x321f09b1, 0xc185e0f3,
-    0x3212c585, 0xc1889bc6, 0x320681e3, 0xc18b5903,
-    0x31fa3ecb, 0xc18e18a7, 0x31edfc3d, 0xc190dab4,
-    0x31e1ba3a, 0xc1939f29, 0x31d578c2, 0xc1966606,
-    0x31c937d6, 0xc1992f4c, 0x31bcf777, 0xc19bfaf9,
-    0x31b0b7a4, 0xc19ec90d, 0x31a4785e, 0xc1a1998a,
-    0x319839a6, 0xc1a46c6e, 0x318bfb7d, 0xc1a741b9,
-    0x317fbde2, 0xc1aa196c, 0x317380d6, 0xc1acf386,
-    0x31674459, 0xc1afd007, 0x315b086d, 0xc1b2aef0,
-    0x314ecd11, 0xc1b5903f, 0x31429247, 0xc1b873f5,
-    0x3136580d, 0xc1bb5a11, 0x312a1e66, 0xc1be4294,
-    0x311de551, 0xc1c12d7e, 0x3111accf, 0xc1c41ace,
-    0x310574e0, 0xc1c70a84, 0x30f93d86, 0xc1c9fca0,
-    0x30ed06bf, 0xc1ccf122, 0x30e0d08d, 0xc1cfe80a,
-    0x30d49af1, 0xc1d2e158, 0x30c865ea, 0xc1d5dd0c,
-    0x30bc317a, 0xc1d8db25, 0x30affda0, 0xc1dbdba3,
-    0x30a3ca5d, 0xc1dede87, 0x309797b2, 0xc1e1e3d0,
-    0x308b659f, 0xc1e4eb7e, 0x307f3424, 0xc1e7f591,
-    0x30730342, 0xc1eb0209, 0x3066d2fa, 0xc1ee10e5,
-    0x305aa34c, 0xc1f12227, 0x304e7438, 0xc1f435cc,
-    0x304245c0, 0xc1f74bd6, 0x303617e2, 0xc1fa6445,
-    0x3029eaa1, 0xc1fd7f17, 0x301dbdfb, 0xc2009c4e,
-    0x301191f3, 0xc203bbe8, 0x30056687, 0xc206dde6,
-    0x2ff93bba, 0xc20a0248, 0x2fed118a, 0xc20d290d,
-    0x2fe0e7f9, 0xc2105236, 0x2fd4bf08, 0xc2137dc2,
-    0x2fc896b5, 0xc216abb1, 0x2fbc6f03, 0xc219dc03,
-    0x2fb047f2, 0xc21d0eb8, 0x2fa42181, 0xc22043d0,
-    0x2f97fbb2, 0xc2237b4b, 0x2f8bd685, 0xc226b528,
-    0x2f7fb1fa, 0xc229f167, 0x2f738e12, 0xc22d3009,
-    0x2f676ace, 0xc230710d, 0x2f5b482d, 0xc233b473,
-    0x2f4f2630, 0xc236fa3b, 0x2f4304d8, 0xc23a4265,
-    0x2f36e426, 0xc23d8cf1, 0x2f2ac419, 0xc240d9de,
-    0x2f1ea4b2, 0xc244292c, 0x2f1285f2, 0xc2477adc,
-    0x2f0667d9, 0xc24aceed, 0x2efa4a67, 0xc24e255e,
-    0x2eee2d9d, 0xc2517e31, 0x2ee2117c, 0xc254d965,
-    0x2ed5f604, 0xc25836f9, 0x2ec9db35, 0xc25b96ee,
-    0x2ebdc110, 0xc25ef943, 0x2eb1a796, 0xc2625df8,
-    0x2ea58ec6, 0xc265c50e, 0x2e9976a1, 0xc2692e83,
-    0x2e8d5f29, 0xc26c9a58, 0x2e81485c, 0xc270088e,
-    0x2e75323c, 0xc2737922, 0x2e691cc9, 0xc276ec16,
-    0x2e5d0804, 0xc27a616a, 0x2e50f3ed, 0xc27dd91c,
-    0x2e44e084, 0xc281532e, 0x2e38cdcb, 0xc284cf9f,
-    0x2e2cbbc1, 0xc2884e6e, 0x2e20aa67, 0xc28bcf9c,
-    0x2e1499bd, 0xc28f5329, 0x2e0889c4, 0xc292d914,
-    0x2dfc7a7c, 0xc296615d, 0x2df06be6, 0xc299ec05,
-    0x2de45e03, 0xc29d790a, 0x2dd850d2, 0xc2a1086d,
-    0x2dcc4454, 0xc2a49a2e, 0x2dc0388a, 0xc2a82e4d,
-    0x2db42d74, 0xc2abc4c9, 0x2da82313, 0xc2af5da2,
-    0x2d9c1967, 0xc2b2f8d8, 0x2d901070, 0xc2b6966c,
-    0x2d84082f, 0xc2ba365c, 0x2d7800a5, 0xc2bdd8a9,
-    0x2d6bf9d1, 0xc2c17d52, 0x2d5ff3b5, 0xc2c52459,
-    0x2d53ee51, 0xc2c8cdbb, 0x2d47e9a5, 0xc2cc7979,
-    0x2d3be5b1, 0xc2d02794, 0x2d2fe277, 0xc2d3d80a,
-    0x2d23dff7, 0xc2d78add, 0x2d17de31, 0xc2db400a,
-    0x2d0bdd25, 0xc2def794, 0x2cffdcd4, 0xc2e2b178,
-    0x2cf3dd3f, 0xc2e66db8, 0x2ce7de66, 0xc2ea2c53,
-    0x2cdbe04a, 0xc2eded49, 0x2ccfe2ea, 0xc2f1b099,
-    0x2cc3e648, 0xc2f57644, 0x2cb7ea63, 0xc2f93e4a,
-    0x2cabef3d, 0xc2fd08a9, 0x2c9ff4d6, 0xc300d563,
-    0x2c93fb2e, 0xc304a477, 0x2c880245, 0xc30875e5,
-    0x2c7c0a1d, 0xc30c49ad, 0x2c7012b5, 0xc3101fce,
-    0x2c641c0e, 0xc313f848, 0x2c582629, 0xc317d31c,
-    0x2c4c3106, 0xc31bb049, 0x2c403ca5, 0xc31f8fcf,
-    0x2c344908, 0xc32371ae, 0x2c28562d, 0xc32755e5,
-    0x2c1c6417, 0xc32b3c75, 0x2c1072c4, 0xc32f255e,
-    0x2c048237, 0xc333109e, 0x2bf8926f, 0xc336fe37,
-    0x2beca36c, 0xc33aee27, 0x2be0b52f, 0xc33ee070,
-    0x2bd4c7ba, 0xc342d510, 0x2bc8db0b, 0xc346cc07,
-    0x2bbcef23, 0xc34ac556, 0x2bb10404, 0xc34ec0fc,
-    0x2ba519ad, 0xc352bef9, 0x2b99301f, 0xc356bf4d,
-    0x2b8d475b, 0xc35ac1f7, 0x2b815f60, 0xc35ec6f8,
-    0x2b75782f, 0xc362ce50, 0x2b6991ca, 0xc366d7fd,
-    0x2b5dac2f, 0xc36ae401, 0x2b51c760, 0xc36ef25b,
-    0x2b45e35d, 0xc373030a, 0x2b3a0027, 0xc377160f,
-    0x2b2e1dbe, 0xc37b2b6a, 0x2b223c22, 0xc37f4319,
-    0x2b165b54, 0xc3835d1e, 0x2b0a7b54, 0xc3877978,
-    0x2afe9c24, 0xc38b9827, 0x2af2bdc3, 0xc38fb92a,
-    0x2ae6e031, 0xc393dc82, 0x2adb0370, 0xc398022f,
-    0x2acf277f, 0xc39c2a2f, 0x2ac34c60, 0xc3a05484,
-    0x2ab77212, 0xc3a4812c, 0x2aab9896, 0xc3a8b028,
-    0x2a9fbfed, 0xc3ace178, 0x2a93e817, 0xc3b1151b,
-    0x2a881114, 0xc3b54b11, 0x2a7c3ae5, 0xc3b9835a,
-    0x2a70658a, 0xc3bdbdf6, 0x2a649105, 0xc3c1fae5,
-    0x2a58bd54, 0xc3c63a26, 0x2a4cea79, 0xc3ca7bba,
-    0x2a411874, 0xc3cebfa0, 0x2a354746, 0xc3d305d8,
-    0x2a2976ef, 0xc3d74e62, 0x2a1da770, 0xc3db993e,
-    0x2a11d8c8, 0xc3dfe66c, 0x2a060af9, 0xc3e435ea,
-    0x29fa3e03, 0xc3e887bb, 0x29ee71e6, 0xc3ecdbdc,
-    0x29e2a6a3, 0xc3f1324e, 0x29d6dc3b, 0xc3f58b10,
-    0x29cb12ad, 0xc3f9e624, 0x29bf49fa, 0xc3fe4388,
-    0x29b38223, 0xc402a33c, 0x29a7bb28, 0xc4070540,
-    0x299bf509, 0xc40b6994, 0x29902fc7, 0xc40fd037,
-    0x29846b63, 0xc414392b, 0x2978a7dd, 0xc418a46d,
-    0x296ce535, 0xc41d11ff, 0x2961236c, 0xc42181e0,
-    0x29556282, 0xc425f410, 0x2949a278, 0xc42a688f,
-    0x293de34e, 0xc42edf5c, 0x29322505, 0xc4335877,
-    0x2926679c, 0xc437d3e1, 0x291aab16, 0xc43c5199,
-    0x290eef71, 0xc440d19e, 0x290334af, 0xc44553f2,
-    0x28f77acf, 0xc449d892, 0x28ebc1d3, 0xc44e5f80,
-    0x28e009ba, 0xc452e8bc, 0x28d45286, 0xc4577444,
-    0x28c89c37, 0xc45c0219, 0x28bce6cd, 0xc460923b,
-    0x28b13248, 0xc46524a9, 0x28a57ea9, 0xc469b963,
-    0x2899cbf1, 0xc46e5069, 0x288e1a20, 0xc472e9bc,
-    0x28826936, 0xc477855a, 0x2876b934, 0xc47c2344,
-    0x286b0a1a, 0xc480c379, 0x285f5be9, 0xc48565f9,
-    0x2853aea1, 0xc48a0ac4, 0x28480243, 0xc48eb1db,
-    0x283c56cf, 0xc4935b3c, 0x2830ac45, 0xc49806e7,
-    0x282502a7, 0xc49cb4dd, 0x281959f4, 0xc4a1651c,
-    0x280db22d, 0xc4a617a6, 0x28020b52, 0xc4aacc7a,
-    0x27f66564, 0xc4af8397, 0x27eac063, 0xc4b43cfd,
-    0x27df1c50, 0xc4b8f8ad, 0x27d3792b, 0xc4bdb6a6,
-    0x27c7d6f4, 0xc4c276e8, 0x27bc35ad, 0xc4c73972,
-    0x27b09555, 0xc4cbfe45, 0x27a4f5ed, 0xc4d0c560,
-    0x27995776, 0xc4d58ec3, 0x278db9ef, 0xc4da5a6f,
-    0x27821d59, 0xc4df2862, 0x277681b6, 0xc4e3f89c,
-    0x276ae704, 0xc4e8cb1e, 0x275f4d45, 0xc4ed9fe7,
-    0x2753b479, 0xc4f276f7, 0x27481ca1, 0xc4f7504e,
-    0x273c85bc, 0xc4fc2bec, 0x2730efcc, 0xc50109d0,
-    0x27255ad1, 0xc505e9fb, 0x2719c6cb, 0xc50acc6b,
-    0x270e33bb, 0xc50fb121, 0x2702a1a1, 0xc514981d,
-    0x26f7107e, 0xc519815f, 0x26eb8052, 0xc51e6ce6,
-    0x26dff11d, 0xc5235ab2, 0x26d462e1, 0xc5284ac3,
-    0x26c8d59c, 0xc52d3d18, 0x26bd4951, 0xc53231b3,
-    0x26b1bdff, 0xc5372891, 0x26a633a6, 0xc53c21b4,
-    0x269aaa48, 0xc5411d1b, 0x268f21e5, 0xc5461ac6,
-    0x26839a7c, 0xc54b1ab4, 0x26781410, 0xc5501ce5,
-    0x266c8e9f, 0xc555215a, 0x26610a2a, 0xc55a2812,
-    0x265586b3, 0xc55f310d, 0x264a0438, 0xc5643c4a,
-    0x263e82bc, 0xc56949ca, 0x2633023e, 0xc56e598c,
-    0x262782be, 0xc5736b90, 0x261c043d, 0xc5787fd6,
-    0x261086bc, 0xc57d965d, 0x26050a3b, 0xc582af26,
-    0x25f98ebb, 0xc587ca31, 0x25ee143b, 0xc58ce77c,
-    0x25e29abc, 0xc5920708, 0x25d72240, 0xc59728d5,
-    0x25cbaac5, 0xc59c4ce3, 0x25c0344d, 0xc5a17330,
-    0x25b4bed8, 0xc5a69bbe, 0x25a94a67, 0xc5abc68c,
-    0x259dd6f9, 0xc5b0f399, 0x25926490, 0xc5b622e6,
-    0x2586f32c, 0xc5bb5472, 0x257b82cd, 0xc5c0883d,
-    0x25701374, 0xc5c5be47, 0x2564a521, 0xc5caf690,
-    0x255937d5, 0xc5d03118, 0x254dcb8f, 0xc5d56ddd,
-    0x25426051, 0xc5daace1, 0x2536f61b, 0xc5dfee22,
-    0x252b8cee, 0xc5e531a1, 0x252024c9, 0xc5ea775e,
-    0x2514bdad, 0xc5efbf58, 0x2509579b, 0xc5f5098f,
-    0x24fdf294, 0xc5fa5603, 0x24f28e96, 0xc5ffa4b3,
-    0x24e72ba4, 0xc604f5a0, 0x24dbc9bd, 0xc60a48c9,
-    0x24d068e2, 0xc60f9e2e, 0x24c50914, 0xc614f5cf,
-    0x24b9aa52, 0xc61a4fac, 0x24ae4c9d, 0xc61fabc4,
-    0x24a2eff6, 0xc6250a18, 0x2497945d, 0xc62a6aa6,
-    0x248c39d3, 0xc62fcd6f, 0x2480e057, 0xc6353273,
-    0x247587eb, 0xc63a99b1, 0x246a308f, 0xc6400329,
-    0x245eda43, 0xc6456edb, 0x24538507, 0xc64adcc7,
-    0x244830dd, 0xc6504ced, 0x243cddc4, 0xc655bf4c,
-    0x24318bbe, 0xc65b33e4, 0x24263ac9, 0xc660aab5,
-    0x241aeae8, 0xc66623be, 0x240f9c1a, 0xc66b9f01,
-    0x24044e60, 0xc6711c7b, 0x23f901ba, 0xc6769c2e,
-    0x23edb628, 0xc67c1e18, 0x23e26bac, 0xc681a23a,
-    0x23d72245, 0xc6872894, 0x23cbd9f4, 0xc68cb124,
-    0x23c092b9, 0xc6923bec, 0x23b54c95, 0xc697c8eb,
-    0x23aa0788, 0xc69d5820, 0x239ec393, 0xc6a2e98b,
-    0x239380b6, 0xc6a87d2d, 0x23883ef2, 0xc6ae1304,
-    0x237cfe47, 0xc6b3ab12, 0x2371beb5, 0xc6b94554,
-    0x2366803c, 0xc6bee1cd, 0x235b42df, 0xc6c4807a,
-    0x2350069b, 0xc6ca215c, 0x2344cb73, 0xc6cfc472,
-    0x23399167, 0xc6d569be, 0x232e5876, 0xc6db113d,
-    0x232320a2, 0xc6e0baf0, 0x2317e9eb, 0xc6e666d7,
-    0x230cb451, 0xc6ec14f2, 0x23017fd5, 0xc6f1c540,
-    0x22f64c77, 0xc6f777c1, 0x22eb1a37, 0xc6fd2c75,
-    0x22dfe917, 0xc702e35c, 0x22d4b916, 0xc7089c75,
-    0x22c98a35, 0xc70e57c0, 0x22be5c74, 0xc714153e,
-    0x22b32fd4, 0xc719d4ed, 0x22a80456, 0xc71f96ce,
-    0x229cd9f8, 0xc7255ae0, 0x2291b0bd, 0xc72b2123,
-    0x228688a4, 0xc730e997, 0x227b61af, 0xc736b43c,
-    0x22703bdc, 0xc73c8111, 0x2265172e, 0xc7425016,
-    0x2259f3a3, 0xc748214c, 0x224ed13d, 0xc74df4b1,
-    0x2243affc, 0xc753ca46, 0x22388fe1, 0xc759a20a,
-    0x222d70eb, 0xc75f7bfe, 0x2222531c, 0xc7655820,
-    0x22173674, 0xc76b3671, 0x220c1af3, 0xc77116f0,
-    0x22010099, 0xc776f99d, 0x21f5e768, 0xc77cde79,
-    0x21eacf5f, 0xc782c582, 0x21dfb87f, 0xc788aeb9,
-    0x21d4a2c8, 0xc78e9a1d, 0x21c98e3b, 0xc79487ae,
-    0x21be7ad8, 0xc79a776c, 0x21b368a0, 0xc7a06957,
-    0x21a85793, 0xc7a65d6e, 0x219d47b1, 0xc7ac53b1,
-    0x219238fb, 0xc7b24c20, 0x21872b72, 0xc7b846ba,
-    0x217c1f15, 0xc7be4381, 0x217113e5, 0xc7c44272,
-    0x216609e3, 0xc7ca438f, 0x215b0110, 0xc7d046d6,
-    0x214ff96a, 0xc7d64c47, 0x2144f2f3, 0xc7dc53e3,
-    0x2139edac, 0xc7e25daa, 0x212ee995, 0xc7e8699a,
-    0x2123e6ad, 0xc7ee77b3, 0x2118e4f6, 0xc7f487f6,
-    0x210de470, 0xc7fa9a62, 0x2102e51c, 0xc800aef7,
-    0x20f7e6f9, 0xc806c5b5, 0x20ecea09, 0xc80cde9b,
-    0x20e1ee4b, 0xc812f9a9, 0x20d6f3c1, 0xc81916df,
-    0x20cbfa6a, 0xc81f363d, 0x20c10247, 0xc82557c3,
-    0x20b60b58, 0xc82b7b70, 0x20ab159e, 0xc831a143,
-    0x20a0211a, 0xc837c93e, 0x20952dcb, 0xc83df35f,
-    0x208a3bb2, 0xc8441fa6, 0x207f4acf, 0xc84a4e14,
-    0x20745b24, 0xc8507ea7, 0x20696cb0, 0xc856b160,
-    0x205e7f74, 0xc85ce63e, 0x2053936f, 0xc8631d42,
-    0x2048a8a4, 0xc869566a, 0x203dbf11, 0xc86f91b7,
-    0x2032d6b8, 0xc875cf28, 0x2027ef99, 0xc87c0ebd,
-    0x201d09b4, 0xc8825077, 0x2012250a, 0xc8889454,
-    0x2007419b, 0xc88eda54, 0x1ffc5f67, 0xc8952278,
-    0x1ff17e70, 0xc89b6cbf, 0x1fe69eb4, 0xc8a1b928,
-    0x1fdbc036, 0xc8a807b4, 0x1fd0e2f5, 0xc8ae5862,
-    0x1fc606f1, 0xc8b4ab32, 0x1fbb2c2c, 0xc8bb0023,
-    0x1fb052a5, 0xc8c15736, 0x1fa57a5d, 0xc8c7b06b,
-    0x1f9aa354, 0xc8ce0bc0, 0x1f8fcd8b, 0xc8d46936,
-    0x1f84f902, 0xc8dac8cd, 0x1f7a25ba, 0xc8e12a84,
-    0x1f6f53b3, 0xc8e78e5b, 0x1f6482ed, 0xc8edf452,
-    0x1f59b369, 0xc8f45c68, 0x1f4ee527, 0xc8fac69e,
-    0x1f441828, 0xc90132f2, 0x1f394c6b, 0xc907a166,
-    0x1f2e81f3, 0xc90e11f7, 0x1f23b8be, 0xc91484a8,
-    0x1f18f0ce, 0xc91af976, 0x1f0e2a22, 0xc9217062,
-    0x1f0364bc, 0xc927e96b, 0x1ef8a09b, 0xc92e6492,
-    0x1eedddc0, 0xc934e1d6, 0x1ee31c2b, 0xc93b6137,
-    0x1ed85bdd, 0xc941e2b4, 0x1ecd9cd7, 0xc948664d,
-    0x1ec2df18, 0xc94eec03, 0x1eb822a1, 0xc95573d4,
-    0x1ead6773, 0xc95bfdc1, 0x1ea2ad8d, 0xc96289c9,
-    0x1e97f4f1, 0xc96917ec, 0x1e8d3d9e, 0xc96fa82a,
-    0x1e828796, 0xc9763a83, 0x1e77d2d8, 0xc97ccef5,
-    0x1e6d1f65, 0xc9836582, 0x1e626d3e, 0xc989fe29,
-    0x1e57bc62, 0xc99098e9, 0x1e4d0cd2, 0xc99735c2,
-    0x1e425e8f, 0xc99dd4b4, 0x1e37b199, 0xc9a475bf,
-    0x1e2d05f1, 0xc9ab18e3, 0x1e225b96, 0xc9b1be1e,
-    0x1e17b28a, 0xc9b86572, 0x1e0d0acc, 0xc9bf0edd,
-    0x1e02645d, 0xc9c5ba60, 0x1df7bf3e, 0xc9cc67fa,
-    0x1ded1b6e, 0xc9d317ab, 0x1de278ef, 0xc9d9c973,
-    0x1dd7d7c1, 0xc9e07d51, 0x1dcd37e4, 0xc9e73346,
-    0x1dc29958, 0xc9edeb50, 0x1db7fc1e, 0xc9f4a570,
-    0x1dad6036, 0xc9fb61a5, 0x1da2c5a2, 0xca021fef,
-    0x1d982c60, 0xca08e04f, 0x1d8d9472, 0xca0fa2c3,
-    0x1d82fdd8, 0xca16674b, 0x1d786892, 0xca1d2de7,
-    0x1d6dd4a2, 0xca23f698, 0x1d634206, 0xca2ac15b,
-    0x1d58b0c0, 0xca318e32, 0x1d4e20d0, 0xca385d1d,
-    0x1d439236, 0xca3f2e19, 0x1d3904f4, 0xca460129,
-    0x1d2e7908, 0xca4cd64b, 0x1d23ee74, 0xca53ad7e,
-    0x1d196538, 0xca5a86c4, 0x1d0edd55, 0xca61621b,
-    0x1d0456ca, 0xca683f83, 0x1cf9d199, 0xca6f1efc,
-    0x1cef4dc2, 0xca760086, 0x1ce4cb44, 0xca7ce420,
-    0x1cda4a21, 0xca83c9ca, 0x1ccfca59, 0xca8ab184,
-    0x1cc54bec, 0xca919b4e, 0x1cbacedb, 0xca988727,
-    0x1cb05326, 0xca9f750f, 0x1ca5d8cd, 0xcaa66506,
-    0x1c9b5fd2, 0xcaad570c, 0x1c90e834, 0xcab44b1f,
-    0x1c8671f3, 0xcabb4141, 0x1c7bfd11, 0xcac23971,
-    0x1c71898d, 0xcac933ae, 0x1c671768, 0xcad02ff8,
-    0x1c5ca6a2, 0xcad72e4f, 0x1c52373c, 0xcade2eb3,
-    0x1c47c936, 0xcae53123, 0x1c3d5c91, 0xcaec35a0,
-    0x1c32f14d, 0xcaf33c28, 0x1c28876a, 0xcafa44bc,
-    0x1c1e1ee9, 0xcb014f5b, 0x1c13b7c9, 0xcb085c05,
-    0x1c09520d, 0xcb0f6aba, 0x1bfeedb3, 0xcb167b79,
-    0x1bf48abd, 0xcb1d8e43, 0x1bea292b, 0xcb24a316,
-    0x1bdfc8fc, 0xcb2bb9f4, 0x1bd56a32, 0xcb32d2da,
-    0x1bcb0cce, 0xcb39edca, 0x1bc0b0ce, 0xcb410ac3,
-    0x1bb65634, 0xcb4829c4, 0x1babfd01, 0xcb4f4acd,
-    0x1ba1a534, 0xcb566ddf, 0x1b974ece, 0xcb5d92f8,
-    0x1b8cf9cf, 0xcb64ba19, 0x1b82a638, 0xcb6be341,
-    0x1b785409, 0xcb730e70, 0x1b6e0342, 0xcb7a3ba5,
-    0x1b63b3e5, 0xcb816ae1, 0x1b5965f1, 0xcb889c23,
-    0x1b4f1967, 0xcb8fcf6b, 0x1b44ce46, 0xcb9704b9,
-    0x1b3a8491, 0xcb9e3c0b, 0x1b303c46, 0xcba57563,
-    0x1b25f566, 0xcbacb0bf, 0x1b1baff2, 0xcbb3ee20,
-    0x1b116beb, 0xcbbb2d85, 0x1b072950, 0xcbc26eee,
-    0x1afce821, 0xcbc9b25a, 0x1af2a860, 0xcbd0f7ca,
-    0x1ae86a0d, 0xcbd83f3d, 0x1ade2d28, 0xcbdf88b3,
-    0x1ad3f1b1, 0xcbe6d42b, 0x1ac9b7a9, 0xcbee21a5,
-    0x1abf7f11, 0xcbf57121, 0x1ab547e8, 0xcbfcc29f,
-    0x1aab122f, 0xcc04161e, 0x1aa0dde7, 0xcc0b6b9e,
-    0x1a96ab0f, 0xcc12c31f, 0x1a8c79a9, 0xcc1a1ca0,
-    0x1a8249b4, 0xcc217822, 0x1a781b31, 0xcc28d5a3,
-    0x1a6dee21, 0xcc303524, 0x1a63c284, 0xcc3796a5,
-    0x1a599859, 0xcc3efa25, 0x1a4f6fa3, 0xcc465fa3,
-    0x1a454860, 0xcc4dc720, 0x1a3b2292, 0xcc55309b,
-    0x1a30fe38, 0xcc5c9c14, 0x1a26db54, 0xcc64098b,
-    0x1a1cb9e5, 0xcc6b78ff, 0x1a1299ec, 0xcc72ea70,
-    0x1a087b69, 0xcc7a5dde, 0x19fe5e5e, 0xcc81d349,
-    0x19f442c9, 0xcc894aaf, 0x19ea28ac, 0xcc90c412,
-    0x19e01006, 0xcc983f70, 0x19d5f8d9, 0xcc9fbcca,
-    0x19cbe325, 0xcca73c1e, 0x19c1cee9, 0xccaebd6e,
-    0x19b7bc27, 0xccb640b8, 0x19adaadf, 0xccbdc5fc,
-    0x19a39b11, 0xccc54d3a, 0x19998cbe, 0xccccd671,
-    0x198f7fe6, 0xccd461a2, 0x19857489, 0xccdbeecc,
-    0x197b6aa8, 0xcce37def, 0x19716243, 0xcceb0f0a,
-    0x19675b5a, 0xccf2a21d, 0x195d55ef, 0xccfa3729,
-    0x19535201, 0xcd01ce2b, 0x19494f90, 0xcd096725,
-    0x193f4e9e, 0xcd110216, 0x19354f2a, 0xcd189efe,
-    0x192b5135, 0xcd203ddc, 0x192154bf, 0xcd27deb0,
-    0x191759c9, 0xcd2f817b, 0x190d6053, 0xcd37263a,
-    0x1903685d, 0xcd3eccef, 0x18f971e8, 0xcd467599,
-    0x18ef7cf4, 0xcd4e2037, 0x18e58982, 0xcd55ccca,
-    0x18db9792, 0xcd5d7b50, 0x18d1a724, 0xcd652bcb,
-    0x18c7b838, 0xcd6cde39, 0x18bdcad0, 0xcd74929a,
-    0x18b3deeb, 0xcd7c48ee, 0x18a9f48a, 0xcd840134,
-    0x18a00bae, 0xcd8bbb6d, 0x18962456, 0xcd937798,
-    0x188c3e83, 0xcd9b35b4, 0x18825a35, 0xcda2f5c2,
-    0x1878776d, 0xcdaab7c0, 0x186e962b, 0xcdb27bb0,
-    0x1864b670, 0xcdba4190, 0x185ad83c, 0xcdc20960,
-    0x1850fb8e, 0xcdc9d320, 0x18472069, 0xcdd19ed0,
-    0x183d46cc, 0xcdd96c6f, 0x18336eb7, 0xcde13bfd,
-    0x1829982b, 0xcde90d79, 0x181fc328, 0xcdf0e0e4,
-    0x1815efae, 0xcdf8b63d, 0x180c1dbf, 0xce008d84,
-    0x18024d59, 0xce0866b8, 0x17f87e7f, 0xce1041d9,
-    0x17eeb130, 0xce181ee8, 0x17e4e56c, 0xce1ffde2,
-    0x17db1b34, 0xce27dec9, 0x17d15288, 0xce2fc19c,
-    0x17c78b68, 0xce37a65b, 0x17bdc5d6, 0xce3f8d05,
-    0x17b401d1, 0xce47759a, 0x17aa3f5a, 0xce4f6019,
-    0x17a07e70, 0xce574c84, 0x1796bf16, 0xce5f3ad8,
-    0x178d014a, 0xce672b16, 0x1783450d, 0xce6f1d3d,
-    0x17798a60, 0xce77114e, 0x176fd143, 0xce7f0748,
-    0x176619b6, 0xce86ff2a, 0x175c63ba, 0xce8ef8f4,
-    0x1752af4f, 0xce96f4a7, 0x1748fc75, 0xce9ef241,
-    0x173f4b2e, 0xcea6f1c2, 0x17359b78, 0xceaef32b,
-    0x172bed55, 0xceb6f67a, 0x172240c5, 0xcebefbb0,
-    0x171895c9, 0xcec702cb, 0x170eec60, 0xcecf0bcd,
-    0x1705448b, 0xced716b4, 0x16fb9e4b, 0xcedf2380,
-    0x16f1f99f, 0xcee73231, 0x16e85689, 0xceef42c7,
-    0x16deb508, 0xcef75541, 0x16d5151d, 0xceff699f,
-    0x16cb76c9, 0xcf077fe1, 0x16c1da0b, 0xcf0f9805,
-    0x16b83ee4, 0xcf17b20d, 0x16aea555, 0xcf1fcdf8,
-    0x16a50d5d, 0xcf27ebc5, 0x169b76fe, 0xcf300b74,
-    0x1691e237, 0xcf382d05, 0x16884f09, 0xcf405077,
-    0x167ebd74, 0xcf4875ca, 0x16752d79, 0xcf509cfe,
-    0x166b9f18, 0xcf58c613, 0x16621251, 0xcf60f108,
-    0x16588725, 0xcf691ddd, 0x164efd94, 0xcf714c91,
-    0x1645759f, 0xcf797d24, 0x163bef46, 0xcf81af97,
-    0x16326a88, 0xcf89e3e8, 0x1628e767, 0xcf921a17,
-    0x161f65e4, 0xcf9a5225, 0x1615e5fd, 0xcfa28c10,
-    0x160c67b4, 0xcfaac7d8, 0x1602eb0a, 0xcfb3057d,
-    0x15f96ffd, 0xcfbb4500, 0x15eff690, 0xcfc3865e,
-    0x15e67ec1, 0xcfcbc999, 0x15dd0892, 0xcfd40eaf,
-    0x15d39403, 0xcfdc55a1, 0x15ca2115, 0xcfe49e6d,
-    0x15c0afc6, 0xcfece915, 0x15b74019, 0xcff53597,
-    0x15add20d, 0xcffd83f4, 0x15a465a3, 0xd005d42a,
-    0x159afadb, 0xd00e2639, 0x159191b5, 0xd0167a22,
-    0x15882a32, 0xd01ecfe4, 0x157ec452, 0xd027277e,
-    0x15756016, 0xd02f80f1, 0x156bfd7d, 0xd037dc3b,
-    0x15629c89, 0xd040395d, 0x15593d3a, 0xd0489856,
-    0x154fdf8f, 0xd050f926, 0x15468389, 0xd0595bcd,
-    0x153d292a, 0xd061c04a, 0x1533d070, 0xd06a269d,
-    0x152a795d, 0xd0728ec6, 0x152123f0, 0xd07af8c4,
-    0x1517d02b, 0xd0836497, 0x150e7e0d, 0xd08bd23f,
-    0x15052d97, 0xd09441bb, 0x14fbdec9, 0xd09cb30b,
-    0x14f291a4, 0xd0a5262f, 0x14e94627, 0xd0ad9b26,
-    0x14dffc54, 0xd0b611f1, 0x14d6b42b, 0xd0be8a8d,
-    0x14cd6dab, 0xd0c704fd, 0x14c428d6, 0xd0cf813e,
-    0x14bae5ab, 0xd0d7ff51, 0x14b1a42c, 0xd0e07f36,
-    0x14a86458, 0xd0e900ec, 0x149f2630, 0xd0f18472,
-    0x1495e9b3, 0xd0fa09c9, 0x148caee4, 0xd10290f0,
-    0x148375c1, 0xd10b19e7, 0x147a3e4b, 0xd113a4ad,
-    0x14710883, 0xd11c3142, 0x1467d469, 0xd124bfa6,
-    0x145ea1fd, 0xd12d4fd9, 0x14557140, 0xd135e1d9,
-    0x144c4232, 0xd13e75a8, 0x144314d3, 0xd1470b44,
-    0x1439e923, 0xd14fa2ad, 0x1430bf24, 0xd1583be2,
-    0x142796d5, 0xd160d6e5, 0x141e7037, 0xd16973b3,
-    0x14154b4a, 0xd172124d, 0x140c280e, 0xd17ab2b3,
-    0x14030684, 0xd18354e4, 0x13f9e6ad, 0xd18bf8e0,
-    0x13f0c887, 0xd1949ea6, 0x13e7ac15, 0xd19d4636,
-    0x13de9156, 0xd1a5ef90, 0x13d5784a, 0xd1ae9ab4,
-    0x13cc60f2, 0xd1b747a0, 0x13c34b4f, 0xd1bff656,
-    0x13ba3760, 0xd1c8a6d4, 0x13b12526, 0xd1d1591a,
-    0x13a814a2, 0xd1da0d28, 0x139f05d3, 0xd1e2c2fd,
-    0x1395f8ba, 0xd1eb7a9a, 0x138ced57, 0xd1f433fd,
-    0x1383e3ab, 0xd1fcef27, 0x137adbb6, 0xd205ac17,
-    0x1371d579, 0xd20e6acc, 0x1368d0f3, 0xd2172b48,
-    0x135fce26, 0xd21fed88, 0x1356cd11, 0xd228b18d,
-    0x134dcdb4, 0xd2317756, 0x1344d011, 0xd23a3ee4,
-    0x133bd427, 0xd2430835, 0x1332d9f7, 0xd24bd34a,
-    0x1329e181, 0xd254a021, 0x1320eac6, 0xd25d6ebc,
-    0x1317f5c6, 0xd2663f19, 0x130f0280, 0xd26f1138,
-    0x130610f7, 0xd277e518, 0x12fd2129, 0xd280babb,
-    0x12f43318, 0xd289921e, 0x12eb46c3, 0xd2926b41,
-    0x12e25c2b, 0xd29b4626, 0x12d97350, 0xd2a422ca,
-    0x12d08c33, 0xd2ad012e, 0x12c7a6d4, 0xd2b5e151,
-    0x12bec333, 0xd2bec333, 0x12b5e151, 0xd2c7a6d4,
-    0x12ad012e, 0xd2d08c33, 0x12a422ca, 0xd2d97350,
-    0x129b4626, 0xd2e25c2b, 0x12926b41, 0xd2eb46c3,
-    0x1289921e, 0xd2f43318, 0x1280babb, 0xd2fd2129,
-    0x1277e518, 0xd30610f7, 0x126f1138, 0xd30f0280,
-    0x12663f19, 0xd317f5c6, 0x125d6ebc, 0xd320eac6,
-    0x1254a021, 0xd329e181, 0x124bd34a, 0xd332d9f7,
-    0x12430835, 0xd33bd427, 0x123a3ee4, 0xd344d011,
-    0x12317756, 0xd34dcdb4, 0x1228b18d, 0xd356cd11,
-    0x121fed88, 0xd35fce26, 0x12172b48, 0xd368d0f3,
-    0x120e6acc, 0xd371d579, 0x1205ac17, 0xd37adbb6,
-    0x11fcef27, 0xd383e3ab, 0x11f433fd, 0xd38ced57,
-    0x11eb7a9a, 0xd395f8ba, 0x11e2c2fd, 0xd39f05d3,
-    0x11da0d28, 0xd3a814a2, 0x11d1591a, 0xd3b12526,
-    0x11c8a6d4, 0xd3ba3760, 0x11bff656, 0xd3c34b4f,
-    0x11b747a0, 0xd3cc60f2, 0x11ae9ab4, 0xd3d5784a,
-    0x11a5ef90, 0xd3de9156, 0x119d4636, 0xd3e7ac15,
-    0x11949ea6, 0xd3f0c887, 0x118bf8e0, 0xd3f9e6ad,
-    0x118354e4, 0xd4030684, 0x117ab2b3, 0xd40c280e,
-    0x1172124d, 0xd4154b4a, 0x116973b3, 0xd41e7037,
-    0x1160d6e5, 0xd42796d5, 0x11583be2, 0xd430bf24,
-    0x114fa2ad, 0xd439e923, 0x11470b44, 0xd44314d3,
-    0x113e75a8, 0xd44c4232, 0x1135e1d9, 0xd4557140,
-    0x112d4fd9, 0xd45ea1fd, 0x1124bfa6, 0xd467d469,
-    0x111c3142, 0xd4710883, 0x1113a4ad, 0xd47a3e4b,
-    0x110b19e7, 0xd48375c1, 0x110290f0, 0xd48caee4,
-    0x10fa09c9, 0xd495e9b3, 0x10f18472, 0xd49f2630,
-    0x10e900ec, 0xd4a86458, 0x10e07f36, 0xd4b1a42c,
-    0x10d7ff51, 0xd4bae5ab, 0x10cf813e, 0xd4c428d6,
-    0x10c704fd, 0xd4cd6dab, 0x10be8a8d, 0xd4d6b42b,
-    0x10b611f1, 0xd4dffc54, 0x10ad9b26, 0xd4e94627,
-    0x10a5262f, 0xd4f291a4, 0x109cb30b, 0xd4fbdec9,
-    0x109441bb, 0xd5052d97, 0x108bd23f, 0xd50e7e0d,
-    0x10836497, 0xd517d02b, 0x107af8c4, 0xd52123f0,
-    0x10728ec6, 0xd52a795d, 0x106a269d, 0xd533d070,
-    0x1061c04a, 0xd53d292a, 0x10595bcd, 0xd5468389,
-    0x1050f926, 0xd54fdf8f, 0x10489856, 0xd5593d3a,
-    0x1040395d, 0xd5629c89, 0x1037dc3b, 0xd56bfd7d,
-    0x102f80f1, 0xd5756016, 0x1027277e, 0xd57ec452,
-    0x101ecfe4, 0xd5882a32, 0x10167a22, 0xd59191b5,
-    0x100e2639, 0xd59afadb, 0x1005d42a, 0xd5a465a3,
-    0xffd83f4, 0xd5add20d, 0xff53597, 0xd5b74019,
-    0xfece915, 0xd5c0afc6, 0xfe49e6d, 0xd5ca2115,
-    0xfdc55a1, 0xd5d39403, 0xfd40eaf, 0xd5dd0892,
-    0xfcbc999, 0xd5e67ec1, 0xfc3865e, 0xd5eff690,
-    0xfbb4500, 0xd5f96ffd, 0xfb3057d, 0xd602eb0a,
-    0xfaac7d8, 0xd60c67b4, 0xfa28c10, 0xd615e5fd,
-    0xf9a5225, 0xd61f65e4, 0xf921a17, 0xd628e767,
-    0xf89e3e8, 0xd6326a88, 0xf81af97, 0xd63bef46,
-    0xf797d24, 0xd645759f, 0xf714c91, 0xd64efd94,
-    0xf691ddd, 0xd6588725, 0xf60f108, 0xd6621251,
-    0xf58c613, 0xd66b9f18, 0xf509cfe, 0xd6752d79,
-    0xf4875ca, 0xd67ebd74, 0xf405077, 0xd6884f09,
-    0xf382d05, 0xd691e237, 0xf300b74, 0xd69b76fe,
-    0xf27ebc5, 0xd6a50d5d, 0xf1fcdf8, 0xd6aea555,
-    0xf17b20d, 0xd6b83ee4, 0xf0f9805, 0xd6c1da0b,
-    0xf077fe1, 0xd6cb76c9, 0xeff699f, 0xd6d5151d,
-    0xef75541, 0xd6deb508, 0xeef42c7, 0xd6e85689,
-    0xee73231, 0xd6f1f99f, 0xedf2380, 0xd6fb9e4b,
-    0xed716b4, 0xd705448b, 0xecf0bcd, 0xd70eec60,
-    0xec702cb, 0xd71895c9, 0xebefbb0, 0xd72240c5,
-    0xeb6f67a, 0xd72bed55, 0xeaef32b, 0xd7359b78,
-    0xea6f1c2, 0xd73f4b2e, 0xe9ef241, 0xd748fc75,
-    0xe96f4a7, 0xd752af4f, 0xe8ef8f4, 0xd75c63ba,
-    0xe86ff2a, 0xd76619b6, 0xe7f0748, 0xd76fd143,
-    0xe77114e, 0xd7798a60, 0xe6f1d3d, 0xd783450d,
-    0xe672b16, 0xd78d014a, 0xe5f3ad8, 0xd796bf16,
-    0xe574c84, 0xd7a07e70, 0xe4f6019, 0xd7aa3f5a,
-    0xe47759a, 0xd7b401d1, 0xe3f8d05, 0xd7bdc5d6,
-    0xe37a65b, 0xd7c78b68, 0xe2fc19c, 0xd7d15288,
-    0xe27dec9, 0xd7db1b34, 0xe1ffde2, 0xd7e4e56c,
-    0xe181ee8, 0xd7eeb130, 0xe1041d9, 0xd7f87e7f,
-    0xe0866b8, 0xd8024d59, 0xe008d84, 0xd80c1dbf,
-    0xdf8b63d, 0xd815efae, 0xdf0e0e4, 0xd81fc328,
-    0xde90d79, 0xd829982b, 0xde13bfd, 0xd8336eb7,
-    0xdd96c6f, 0xd83d46cc, 0xdd19ed0, 0xd8472069,
-    0xdc9d320, 0xd850fb8e, 0xdc20960, 0xd85ad83c,
-    0xdba4190, 0xd864b670, 0xdb27bb0, 0xd86e962b,
-    0xdaab7c0, 0xd878776d, 0xda2f5c2, 0xd8825a35,
-    0xd9b35b4, 0xd88c3e83, 0xd937798, 0xd8962456,
-    0xd8bbb6d, 0xd8a00bae, 0xd840134, 0xd8a9f48a,
-    0xd7c48ee, 0xd8b3deeb, 0xd74929a, 0xd8bdcad0,
-    0xd6cde39, 0xd8c7b838, 0xd652bcb, 0xd8d1a724,
-    0xd5d7b50, 0xd8db9792, 0xd55ccca, 0xd8e58982,
-    0xd4e2037, 0xd8ef7cf4, 0xd467599, 0xd8f971e8,
-    0xd3eccef, 0xd903685d, 0xd37263a, 0xd90d6053,
-    0xd2f817b, 0xd91759c9, 0xd27deb0, 0xd92154bf,
-    0xd203ddc, 0xd92b5135, 0xd189efe, 0xd9354f2a,
-    0xd110216, 0xd93f4e9e, 0xd096725, 0xd9494f90,
-    0xd01ce2b, 0xd9535201, 0xcfa3729, 0xd95d55ef,
-    0xcf2a21d, 0xd9675b5a, 0xceb0f0a, 0xd9716243,
-    0xce37def, 0xd97b6aa8, 0xcdbeecc, 0xd9857489,
-    0xcd461a2, 0xd98f7fe6, 0xcccd671, 0xd9998cbe,
-    0xcc54d3a, 0xd9a39b11, 0xcbdc5fc, 0xd9adaadf,
-    0xcb640b8, 0xd9b7bc27, 0xcaebd6e, 0xd9c1cee9,
-    0xca73c1e, 0xd9cbe325, 0xc9fbcca, 0xd9d5f8d9,
-    0xc983f70, 0xd9e01006, 0xc90c412, 0xd9ea28ac,
-    0xc894aaf, 0xd9f442c9, 0xc81d349, 0xd9fe5e5e,
-    0xc7a5dde, 0xda087b69, 0xc72ea70, 0xda1299ec,
-    0xc6b78ff, 0xda1cb9e5, 0xc64098b, 0xda26db54,
-    0xc5c9c14, 0xda30fe38, 0xc55309b, 0xda3b2292,
-    0xc4dc720, 0xda454860, 0xc465fa3, 0xda4f6fa3,
-    0xc3efa25, 0xda599859, 0xc3796a5, 0xda63c284,
-    0xc303524, 0xda6dee21, 0xc28d5a3, 0xda781b31,
-    0xc217822, 0xda8249b4, 0xc1a1ca0, 0xda8c79a9,
-    0xc12c31f, 0xda96ab0f, 0xc0b6b9e, 0xdaa0dde7,
-    0xc04161e, 0xdaab122f, 0xbfcc29f, 0xdab547e8,
-    0xbf57121, 0xdabf7f11, 0xbee21a5, 0xdac9b7a9,
-    0xbe6d42b, 0xdad3f1b1, 0xbdf88b3, 0xdade2d28,
-    0xbd83f3d, 0xdae86a0d, 0xbd0f7ca, 0xdaf2a860,
-    0xbc9b25a, 0xdafce821, 0xbc26eee, 0xdb072950,
-    0xbbb2d85, 0xdb116beb, 0xbb3ee20, 0xdb1baff2,
-    0xbacb0bf, 0xdb25f566, 0xba57563, 0xdb303c46,
-    0xb9e3c0b, 0xdb3a8491, 0xb9704b9, 0xdb44ce46,
-    0xb8fcf6b, 0xdb4f1967, 0xb889c23, 0xdb5965f1,
-    0xb816ae1, 0xdb63b3e5, 0xb7a3ba5, 0xdb6e0342,
-    0xb730e70, 0xdb785409, 0xb6be341, 0xdb82a638,
-    0xb64ba19, 0xdb8cf9cf, 0xb5d92f8, 0xdb974ece,
-    0xb566ddf, 0xdba1a534, 0xb4f4acd, 0xdbabfd01,
-    0xb4829c4, 0xdbb65634, 0xb410ac3, 0xdbc0b0ce,
-    0xb39edca, 0xdbcb0cce, 0xb32d2da, 0xdbd56a32,
-    0xb2bb9f4, 0xdbdfc8fc, 0xb24a316, 0xdbea292b,
-    0xb1d8e43, 0xdbf48abd, 0xb167b79, 0xdbfeedb3,
-    0xb0f6aba, 0xdc09520d, 0xb085c05, 0xdc13b7c9,
-    0xb014f5b, 0xdc1e1ee9, 0xafa44bc, 0xdc28876a,
-    0xaf33c28, 0xdc32f14d, 0xaec35a0, 0xdc3d5c91,
-    0xae53123, 0xdc47c936, 0xade2eb3, 0xdc52373c,
-    0xad72e4f, 0xdc5ca6a2, 0xad02ff8, 0xdc671768,
-    0xac933ae, 0xdc71898d, 0xac23971, 0xdc7bfd11,
-    0xabb4141, 0xdc8671f3, 0xab44b1f, 0xdc90e834,
-    0xaad570c, 0xdc9b5fd2, 0xaa66506, 0xdca5d8cd,
-    0xa9f750f, 0xdcb05326, 0xa988727, 0xdcbacedb,
-    0xa919b4e, 0xdcc54bec, 0xa8ab184, 0xdccfca59,
-    0xa83c9ca, 0xdcda4a21, 0xa7ce420, 0xdce4cb44,
-    0xa760086, 0xdcef4dc2, 0xa6f1efc, 0xdcf9d199,
-    0xa683f83, 0xdd0456ca, 0xa61621b, 0xdd0edd55,
-    0xa5a86c4, 0xdd196538, 0xa53ad7e, 0xdd23ee74,
-    0xa4cd64b, 0xdd2e7908, 0xa460129, 0xdd3904f4,
-    0xa3f2e19, 0xdd439236, 0xa385d1d, 0xdd4e20d0,
-    0xa318e32, 0xdd58b0c0, 0xa2ac15b, 0xdd634206,
-    0xa23f698, 0xdd6dd4a2, 0xa1d2de7, 0xdd786892,
-    0xa16674b, 0xdd82fdd8, 0xa0fa2c3, 0xdd8d9472,
-    0xa08e04f, 0xdd982c60, 0xa021fef, 0xdda2c5a2,
-    0x9fb61a5, 0xddad6036, 0x9f4a570, 0xddb7fc1e,
-    0x9edeb50, 0xddc29958, 0x9e73346, 0xddcd37e4,
-    0x9e07d51, 0xddd7d7c1, 0x9d9c973, 0xdde278ef,
-    0x9d317ab, 0xdded1b6e, 0x9cc67fa, 0xddf7bf3e,
-    0x9c5ba60, 0xde02645d, 0x9bf0edd, 0xde0d0acc,
-    0x9b86572, 0xde17b28a, 0x9b1be1e, 0xde225b96,
-    0x9ab18e3, 0xde2d05f1, 0x9a475bf, 0xde37b199,
-    0x99dd4b4, 0xde425e8f, 0x99735c2, 0xde4d0cd2,
-    0x99098e9, 0xde57bc62, 0x989fe29, 0xde626d3e,
-    0x9836582, 0xde6d1f65, 0x97ccef5, 0xde77d2d8,
-    0x9763a83, 0xde828796, 0x96fa82a, 0xde8d3d9e,
-    0x96917ec, 0xde97f4f1, 0x96289c9, 0xdea2ad8d,
-    0x95bfdc1, 0xdead6773, 0x95573d4, 0xdeb822a1,
-    0x94eec03, 0xdec2df18, 0x948664d, 0xdecd9cd7,
-    0x941e2b4, 0xded85bdd, 0x93b6137, 0xdee31c2b,
-    0x934e1d6, 0xdeedddc0, 0x92e6492, 0xdef8a09b,
-    0x927e96b, 0xdf0364bc, 0x9217062, 0xdf0e2a22,
-    0x91af976, 0xdf18f0ce, 0x91484a8, 0xdf23b8be,
-    0x90e11f7, 0xdf2e81f3, 0x907a166, 0xdf394c6b,
-    0x90132f2, 0xdf441828, 0x8fac69e, 0xdf4ee527,
-    0x8f45c68, 0xdf59b369, 0x8edf452, 0xdf6482ed,
-    0x8e78e5b, 0xdf6f53b3, 0x8e12a84, 0xdf7a25ba,
-    0x8dac8cd, 0xdf84f902, 0x8d46936, 0xdf8fcd8b,
-    0x8ce0bc0, 0xdf9aa354, 0x8c7b06b, 0xdfa57a5d,
-    0x8c15736, 0xdfb052a5, 0x8bb0023, 0xdfbb2c2c,
-    0x8b4ab32, 0xdfc606f1, 0x8ae5862, 0xdfd0e2f5,
-    0x8a807b4, 0xdfdbc036, 0x8a1b928, 0xdfe69eb4,
-    0x89b6cbf, 0xdff17e70, 0x8952278, 0xdffc5f67,
-    0x88eda54, 0xe007419b, 0x8889454, 0xe012250a,
-    0x8825077, 0xe01d09b4, 0x87c0ebd, 0xe027ef99,
-    0x875cf28, 0xe032d6b8, 0x86f91b7, 0xe03dbf11,
-    0x869566a, 0xe048a8a4, 0x8631d42, 0xe053936f,
-    0x85ce63e, 0xe05e7f74, 0x856b160, 0xe0696cb0,
-    0x8507ea7, 0xe0745b24, 0x84a4e14, 0xe07f4acf,
-    0x8441fa6, 0xe08a3bb2, 0x83df35f, 0xe0952dcb,
-    0x837c93e, 0xe0a0211a, 0x831a143, 0xe0ab159e,
-    0x82b7b70, 0xe0b60b58, 0x82557c3, 0xe0c10247,
-    0x81f363d, 0xe0cbfa6a, 0x81916df, 0xe0d6f3c1,
-    0x812f9a9, 0xe0e1ee4b, 0x80cde9b, 0xe0ecea09,
-    0x806c5b5, 0xe0f7e6f9, 0x800aef7, 0xe102e51c,
-    0x7fa9a62, 0xe10de470, 0x7f487f6, 0xe118e4f6,
-    0x7ee77b3, 0xe123e6ad, 0x7e8699a, 0xe12ee995,
-    0x7e25daa, 0xe139edac, 0x7dc53e3, 0xe144f2f3,
-    0x7d64c47, 0xe14ff96a, 0x7d046d6, 0xe15b0110,
-    0x7ca438f, 0xe16609e3, 0x7c44272, 0xe17113e5,
-    0x7be4381, 0xe17c1f15, 0x7b846ba, 0xe1872b72,
-    0x7b24c20, 0xe19238fb, 0x7ac53b1, 0xe19d47b1,
-    0x7a65d6e, 0xe1a85793, 0x7a06957, 0xe1b368a0,
-    0x79a776c, 0xe1be7ad8, 0x79487ae, 0xe1c98e3b,
-    0x78e9a1d, 0xe1d4a2c8, 0x788aeb9, 0xe1dfb87f,
-    0x782c582, 0xe1eacf5f, 0x77cde79, 0xe1f5e768,
-    0x776f99d, 0xe2010099, 0x77116f0, 0xe20c1af3,
-    0x76b3671, 0xe2173674, 0x7655820, 0xe222531c,
-    0x75f7bfe, 0xe22d70eb, 0x759a20a, 0xe2388fe1,
-    0x753ca46, 0xe243affc, 0x74df4b1, 0xe24ed13d,
-    0x748214c, 0xe259f3a3, 0x7425016, 0xe265172e,
-    0x73c8111, 0xe2703bdc, 0x736b43c, 0xe27b61af,
-    0x730e997, 0xe28688a4, 0x72b2123, 0xe291b0bd,
-    0x7255ae0, 0xe29cd9f8, 0x71f96ce, 0xe2a80456,
-    0x719d4ed, 0xe2b32fd4, 0x714153e, 0xe2be5c74,
-    0x70e57c0, 0xe2c98a35, 0x7089c75, 0xe2d4b916,
-    0x702e35c, 0xe2dfe917, 0x6fd2c75, 0xe2eb1a37,
-    0x6f777c1, 0xe2f64c77, 0x6f1c540, 0xe3017fd5,
-    0x6ec14f2, 0xe30cb451, 0x6e666d7, 0xe317e9eb,
-    0x6e0baf0, 0xe32320a2, 0x6db113d, 0xe32e5876,
-    0x6d569be, 0xe3399167, 0x6cfc472, 0xe344cb73,
-    0x6ca215c, 0xe350069b, 0x6c4807a, 0xe35b42df,
-    0x6bee1cd, 0xe366803c, 0x6b94554, 0xe371beb5,
-    0x6b3ab12, 0xe37cfe47, 0x6ae1304, 0xe3883ef2,
-    0x6a87d2d, 0xe39380b6, 0x6a2e98b, 0xe39ec393,
-    0x69d5820, 0xe3aa0788, 0x697c8eb, 0xe3b54c95,
-    0x6923bec, 0xe3c092b9, 0x68cb124, 0xe3cbd9f4,
-    0x6872894, 0xe3d72245, 0x681a23a, 0xe3e26bac,
-    0x67c1e18, 0xe3edb628, 0x6769c2e, 0xe3f901ba,
-    0x6711c7b, 0xe4044e60, 0x66b9f01, 0xe40f9c1a,
-    0x66623be, 0xe41aeae8, 0x660aab5, 0xe4263ac9,
-    0x65b33e4, 0xe4318bbe, 0x655bf4c, 0xe43cddc4,
-    0x6504ced, 0xe44830dd, 0x64adcc7, 0xe4538507,
-    0x6456edb, 0xe45eda43, 0x6400329, 0xe46a308f,
-    0x63a99b1, 0xe47587eb, 0x6353273, 0xe480e057,
-    0x62fcd6f, 0xe48c39d3, 0x62a6aa6, 0xe497945d,
-    0x6250a18, 0xe4a2eff6, 0x61fabc4, 0xe4ae4c9d,
-    0x61a4fac, 0xe4b9aa52, 0x614f5cf, 0xe4c50914,
-    0x60f9e2e, 0xe4d068e2, 0x60a48c9, 0xe4dbc9bd,
-    0x604f5a0, 0xe4e72ba4, 0x5ffa4b3, 0xe4f28e96,
-    0x5fa5603, 0xe4fdf294, 0x5f5098f, 0xe509579b,
-    0x5efbf58, 0xe514bdad, 0x5ea775e, 0xe52024c9,
-    0x5e531a1, 0xe52b8cee, 0x5dfee22, 0xe536f61b,
-    0x5daace1, 0xe5426051, 0x5d56ddd, 0xe54dcb8f,
-    0x5d03118, 0xe55937d5, 0x5caf690, 0xe564a521,
-    0x5c5be47, 0xe5701374, 0x5c0883d, 0xe57b82cd,
-    0x5bb5472, 0xe586f32c, 0x5b622e6, 0xe5926490,
-    0x5b0f399, 0xe59dd6f9, 0x5abc68c, 0xe5a94a67,
-    0x5a69bbe, 0xe5b4bed8, 0x5a17330, 0xe5c0344d,
-    0x59c4ce3, 0xe5cbaac5, 0x59728d5, 0xe5d72240,
-    0x5920708, 0xe5e29abc, 0x58ce77c, 0xe5ee143b,
-    0x587ca31, 0xe5f98ebb, 0x582af26, 0xe6050a3b,
-    0x57d965d, 0xe61086bc, 0x5787fd6, 0xe61c043d,
-    0x5736b90, 0xe62782be, 0x56e598c, 0xe633023e,
-    0x56949ca, 0xe63e82bc, 0x5643c4a, 0xe64a0438,
-    0x55f310d, 0xe65586b3, 0x55a2812, 0xe6610a2a,
-    0x555215a, 0xe66c8e9f, 0x5501ce5, 0xe6781410,
-    0x54b1ab4, 0xe6839a7c, 0x5461ac6, 0xe68f21e5,
-    0x5411d1b, 0xe69aaa48, 0x53c21b4, 0xe6a633a6,
-    0x5372891, 0xe6b1bdff, 0x53231b3, 0xe6bd4951,
-    0x52d3d18, 0xe6c8d59c, 0x5284ac3, 0xe6d462e1,
-    0x5235ab2, 0xe6dff11d, 0x51e6ce6, 0xe6eb8052,
-    0x519815f, 0xe6f7107e, 0x514981d, 0xe702a1a1,
-    0x50fb121, 0xe70e33bb, 0x50acc6b, 0xe719c6cb,
-    0x505e9fb, 0xe7255ad1, 0x50109d0, 0xe730efcc,
-    0x4fc2bec, 0xe73c85bc, 0x4f7504e, 0xe7481ca1,
-    0x4f276f7, 0xe753b479, 0x4ed9fe7, 0xe75f4d45,
-    0x4e8cb1e, 0xe76ae704, 0x4e3f89c, 0xe77681b6,
-    0x4df2862, 0xe7821d59, 0x4da5a6f, 0xe78db9ef,
-    0x4d58ec3, 0xe7995776, 0x4d0c560, 0xe7a4f5ed,
-    0x4cbfe45, 0xe7b09555, 0x4c73972, 0xe7bc35ad,
-    0x4c276e8, 0xe7c7d6f4, 0x4bdb6a6, 0xe7d3792b,
-    0x4b8f8ad, 0xe7df1c50, 0x4b43cfd, 0xe7eac063,
-    0x4af8397, 0xe7f66564, 0x4aacc7a, 0xe8020b52,
-    0x4a617a6, 0xe80db22d, 0x4a1651c, 0xe81959f4,
-    0x49cb4dd, 0xe82502a7, 0x49806e7, 0xe830ac45,
-    0x4935b3c, 0xe83c56cf, 0x48eb1db, 0xe8480243,
-    0x48a0ac4, 0xe853aea1, 0x48565f9, 0xe85f5be9,
-    0x480c379, 0xe86b0a1a, 0x47c2344, 0xe876b934,
-    0x477855a, 0xe8826936, 0x472e9bc, 0xe88e1a20,
-    0x46e5069, 0xe899cbf1, 0x469b963, 0xe8a57ea9,
-    0x46524a9, 0xe8b13248, 0x460923b, 0xe8bce6cd,
-    0x45c0219, 0xe8c89c37, 0x4577444, 0xe8d45286,
-    0x452e8bc, 0xe8e009ba, 0x44e5f80, 0xe8ebc1d3,
-    0x449d892, 0xe8f77acf, 0x44553f2, 0xe90334af,
-    0x440d19e, 0xe90eef71, 0x43c5199, 0xe91aab16,
-    0x437d3e1, 0xe926679c, 0x4335877, 0xe9322505,
-    0x42edf5c, 0xe93de34e, 0x42a688f, 0xe949a278,
-    0x425f410, 0xe9556282, 0x42181e0, 0xe961236c,
-    0x41d11ff, 0xe96ce535, 0x418a46d, 0xe978a7dd,
-    0x414392b, 0xe9846b63, 0x40fd037, 0xe9902fc7,
-    0x40b6994, 0xe99bf509, 0x4070540, 0xe9a7bb28,
-    0x402a33c, 0xe9b38223, 0x3fe4388, 0xe9bf49fa,
-    0x3f9e624, 0xe9cb12ad, 0x3f58b10, 0xe9d6dc3b,
-    0x3f1324e, 0xe9e2a6a3, 0x3ecdbdc, 0xe9ee71e6,
-    0x3e887bb, 0xe9fa3e03, 0x3e435ea, 0xea060af9,
-    0x3dfe66c, 0xea11d8c8, 0x3db993e, 0xea1da770,
-    0x3d74e62, 0xea2976ef, 0x3d305d8, 0xea354746,
-    0x3cebfa0, 0xea411874, 0x3ca7bba, 0xea4cea79,
-    0x3c63a26, 0xea58bd54, 0x3c1fae5, 0xea649105,
-    0x3bdbdf6, 0xea70658a, 0x3b9835a, 0xea7c3ae5,
-    0x3b54b11, 0xea881114, 0x3b1151b, 0xea93e817,
-    0x3ace178, 0xea9fbfed, 0x3a8b028, 0xeaab9896,
-    0x3a4812c, 0xeab77212, 0x3a05484, 0xeac34c60,
-    0x39c2a2f, 0xeacf277f, 0x398022f, 0xeadb0370,
-    0x393dc82, 0xeae6e031, 0x38fb92a, 0xeaf2bdc3,
-    0x38b9827, 0xeafe9c24, 0x3877978, 0xeb0a7b54,
-    0x3835d1e, 0xeb165b54, 0x37f4319, 0xeb223c22,
-    0x37b2b6a, 0xeb2e1dbe, 0x377160f, 0xeb3a0027,
-    0x373030a, 0xeb45e35d, 0x36ef25b, 0xeb51c760,
-    0x36ae401, 0xeb5dac2f, 0x366d7fd, 0xeb6991ca,
-    0x362ce50, 0xeb75782f, 0x35ec6f8, 0xeb815f60,
-    0x35ac1f7, 0xeb8d475b, 0x356bf4d, 0xeb99301f,
-    0x352bef9, 0xeba519ad, 0x34ec0fc, 0xebb10404,
-    0x34ac556, 0xebbcef23, 0x346cc07, 0xebc8db0b,
-    0x342d510, 0xebd4c7ba, 0x33ee070, 0xebe0b52f,
-    0x33aee27, 0xebeca36c, 0x336fe37, 0xebf8926f,
-    0x333109e, 0xec048237, 0x32f255e, 0xec1072c4,
-    0x32b3c75, 0xec1c6417, 0x32755e5, 0xec28562d,
-    0x32371ae, 0xec344908, 0x31f8fcf, 0xec403ca5,
-    0x31bb049, 0xec4c3106, 0x317d31c, 0xec582629,
-    0x313f848, 0xec641c0e, 0x3101fce, 0xec7012b5,
-    0x30c49ad, 0xec7c0a1d, 0x30875e5, 0xec880245,
-    0x304a477, 0xec93fb2e, 0x300d563, 0xec9ff4d6,
-    0x2fd08a9, 0xecabef3d, 0x2f93e4a, 0xecb7ea63,
-    0x2f57644, 0xecc3e648, 0x2f1b099, 0xeccfe2ea,
-    0x2eded49, 0xecdbe04a, 0x2ea2c53, 0xece7de66,
-    0x2e66db8, 0xecf3dd3f, 0x2e2b178, 0xecffdcd4,
-    0x2def794, 0xed0bdd25, 0x2db400a, 0xed17de31,
-    0x2d78add, 0xed23dff7, 0x2d3d80a, 0xed2fe277,
-    0x2d02794, 0xed3be5b1, 0x2cc7979, 0xed47e9a5,
-    0x2c8cdbb, 0xed53ee51, 0x2c52459, 0xed5ff3b5,
-    0x2c17d52, 0xed6bf9d1, 0x2bdd8a9, 0xed7800a5,
-    0x2ba365c, 0xed84082f, 0x2b6966c, 0xed901070,
-    0x2b2f8d8, 0xed9c1967, 0x2af5da2, 0xeda82313,
-    0x2abc4c9, 0xedb42d74, 0x2a82e4d, 0xedc0388a,
-    0x2a49a2e, 0xedcc4454, 0x2a1086d, 0xedd850d2,
-    0x29d790a, 0xede45e03, 0x299ec05, 0xedf06be6,
-    0x296615d, 0xedfc7a7c, 0x292d914, 0xee0889c4,
-    0x28f5329, 0xee1499bd, 0x28bcf9c, 0xee20aa67,
-    0x2884e6e, 0xee2cbbc1, 0x284cf9f, 0xee38cdcb,
-    0x281532e, 0xee44e084, 0x27dd91c, 0xee50f3ed,
-    0x27a616a, 0xee5d0804, 0x276ec16, 0xee691cc9,
-    0x2737922, 0xee75323c, 0x270088e, 0xee81485c,
-    0x26c9a58, 0xee8d5f29, 0x2692e83, 0xee9976a1,
-    0x265c50e, 0xeea58ec6, 0x2625df8, 0xeeb1a796,
-    0x25ef943, 0xeebdc110, 0x25b96ee, 0xeec9db35,
-    0x25836f9, 0xeed5f604, 0x254d965, 0xeee2117c,
-    0x2517e31, 0xeeee2d9d, 0x24e255e, 0xeefa4a67,
-    0x24aceed, 0xef0667d9, 0x2477adc, 0xef1285f2,
-    0x244292c, 0xef1ea4b2, 0x240d9de, 0xef2ac419,
-    0x23d8cf1, 0xef36e426, 0x23a4265, 0xef4304d8,
-    0x236fa3b, 0xef4f2630, 0x233b473, 0xef5b482d,
-    0x230710d, 0xef676ace, 0x22d3009, 0xef738e12,
-    0x229f167, 0xef7fb1fa, 0x226b528, 0xef8bd685,
-    0x2237b4b, 0xef97fbb2, 0x22043d0, 0xefa42181,
-    0x21d0eb8, 0xefb047f2, 0x219dc03, 0xefbc6f03,
-    0x216abb1, 0xefc896b5, 0x2137dc2, 0xefd4bf08,
-    0x2105236, 0xefe0e7f9, 0x20d290d, 0xefed118a,
-    0x20a0248, 0xeff93bba, 0x206dde6, 0xf0056687,
-    0x203bbe8, 0xf01191f3, 0x2009c4e, 0xf01dbdfb,
-    0x1fd7f17, 0xf029eaa1, 0x1fa6445, 0xf03617e2,
-    0x1f74bd6, 0xf04245c0, 0x1f435cc, 0xf04e7438,
-    0x1f12227, 0xf05aa34c, 0x1ee10e5, 0xf066d2fa,
-    0x1eb0209, 0xf0730342, 0x1e7f591, 0xf07f3424,
-    0x1e4eb7e, 0xf08b659f, 0x1e1e3d0, 0xf09797b2,
-    0x1dede87, 0xf0a3ca5d, 0x1dbdba3, 0xf0affda0,
-    0x1d8db25, 0xf0bc317a, 0x1d5dd0c, 0xf0c865ea,
-    0x1d2e158, 0xf0d49af1, 0x1cfe80a, 0xf0e0d08d,
-    0x1ccf122, 0xf0ed06bf, 0x1c9fca0, 0xf0f93d86,
-    0x1c70a84, 0xf10574e0, 0x1c41ace, 0xf111accf,
-    0x1c12d7e, 0xf11de551, 0x1be4294, 0xf12a1e66,
-    0x1bb5a11, 0xf136580d, 0x1b873f5, 0xf1429247,
-    0x1b5903f, 0xf14ecd11, 0x1b2aef0, 0xf15b086d,
-    0x1afd007, 0xf1674459, 0x1acf386, 0xf17380d6,
-    0x1aa196c, 0xf17fbde2, 0x1a741b9, 0xf18bfb7d,
-    0x1a46c6e, 0xf19839a6, 0x1a1998a, 0xf1a4785e,
-    0x19ec90d, 0xf1b0b7a4, 0x19bfaf9, 0xf1bcf777,
-    0x1992f4c, 0xf1c937d6, 0x1966606, 0xf1d578c2,
-    0x1939f29, 0xf1e1ba3a, 0x190dab4, 0xf1edfc3d,
-    0x18e18a7, 0xf1fa3ecb, 0x18b5903, 0xf20681e3,
-    0x1889bc6, 0xf212c585, 0x185e0f3, 0xf21f09b1,
-    0x1832888, 0xf22b4e66, 0x1807285, 0xf23793a3,
-    0x17dbeec, 0xf243d968, 0x17b0dbb, 0xf2501fb5,
-    0x1785ef4, 0xf25c6688, 0x175b296, 0xf268ade3,
-    0x17308a1, 0xf274f5c3, 0x1706115, 0xf2813e2a,
-    0x16dbbf3, 0xf28d8715, 0x16b193a, 0xf299d085,
-    0x16878eb, 0xf2a61a7a, 0x165db05, 0xf2b264f2,
-    0x1633f8a, 0xf2beafed, 0x160a678, 0xf2cafb6b,
-    0x15e0fd1, 0xf2d7476c, 0x15b7b94, 0xf2e393ef,
-    0x158e9c1, 0xf2efe0f2, 0x1565a58, 0xf2fc2e77,
-    0x153cd5a, 0xf3087c7d, 0x15142c6, 0xf314cb02,
-    0x14eba9d, 0xf3211a07, 0x14c34df, 0xf32d698a,
-    0x149b18b, 0xf339b98d, 0x14730a3, 0xf3460a0d,
-    0x144b225, 0xf3525b0b, 0x1423613, 0xf35eac86,
-    0x13fbc6c, 0xf36afe7e, 0x13d4530, 0xf37750f2,
-    0x13ad060, 0xf383a3e2, 0x1385dfb, 0xf38ff74d,
-    0x135ee02, 0xf39c4b32, 0x1338075, 0xf3a89f92,
-    0x1311553, 0xf3b4f46c, 0x12eac9d, 0xf3c149bf,
-    0x12c4653, 0xf3cd9f8b, 0x129e276, 0xf3d9f5cf,
-    0x1278104, 0xf3e64c8c, 0x12521ff, 0xf3f2a3bf,
-    0x122c566, 0xf3fefb6a, 0x1206b39, 0xf40b538b,
-    0x11e1379, 0xf417ac22, 0x11bbe26, 0xf424052f,
-    0x1196b3f, 0xf4305eb0, 0x1171ac6, 0xf43cb8a7,
-    0x114ccb9, 0xf4491311, 0x1128119, 0xf4556def,
-    0x11037e6, 0xf461c940, 0x10df120, 0xf46e2504,
-    0x10bacc8, 0xf47a8139, 0x1096add, 0xf486dde1,
-    0x1072b5f, 0xf4933afa, 0x104ee4f, 0xf49f9884,
-    0x102b3ac, 0xf4abf67e, 0x1007b77, 0xf4b854e7,
-    0xfe45b0, 0xf4c4b3c0, 0xfc1257, 0xf4d11308,
-    0xf9e16b, 0xf4dd72be, 0xf7b2ee, 0xf4e9d2e3,
-    0xf586df, 0xf4f63374, 0xf35d3e, 0xf5029473,
-    0xf1360b, 0xf50ef5de, 0xef1147, 0xf51b57b5,
-    0xeceef1, 0xf527b9f7, 0xeacf09, 0xf5341ca5,
-    0xe8b190, 0xf5407fbd, 0xe69686, 0xf54ce33f,
-    0xe47deb, 0xf559472b, 0xe267be, 0xf565ab80,
-    0xe05401, 0xf572103d, 0xde42b2, 0xf57e7563,
-    0xdc33d2, 0xf58adaf0, 0xda2762, 0xf59740e5,
-    0xd81d61, 0xf5a3a740, 0xd615cf, 0xf5b00e02,
-    0xd410ad, 0xf5bc7529, 0xd20dfa, 0xf5c8dcb6,
-    0xd00db6, 0xf5d544a7, 0xce0fe3, 0xf5e1acfd,
-    0xcc147f, 0xf5ee15b7, 0xca1b8a, 0xf5fa7ed4,
-    0xc82506, 0xf606e854, 0xc630f2, 0xf6135237,
-    0xc43f4d, 0xf61fbc7b, 0xc25019, 0xf62c2721,
-    0xc06355, 0xf6389228, 0xbe7901, 0xf644fd8f,
-    0xbc911d, 0xf6516956, 0xbaabaa, 0xf65dd57d,
-    0xb8c8a7, 0xf66a4203, 0xb6e815, 0xf676aee8,
-    0xb509f3, 0xf6831c2b, 0xb32e42, 0xf68f89cb,
-    0xb15502, 0xf69bf7c9, 0xaf7e33, 0xf6a86623,
-    0xada9d4, 0xf6b4d4d9, 0xabd7e6, 0xf6c143ec,
-    0xaa086a, 0xf6cdb359, 0xa83b5e, 0xf6da2321,
-    0xa670c4, 0xf6e69344, 0xa4a89b, 0xf6f303c0,
-    0xa2e2e3, 0xf6ff7496, 0xa11f9d, 0xf70be5c4,
-    0x9f5ec8, 0xf718574b, 0x9da065, 0xf724c92a,
-    0x9be473, 0xf7313b60, 0x9a2af3, 0xf73daded,
-    0x9873e4, 0xf74a20d0, 0x96bf48, 0xf756940a,
-    0x950d1d, 0xf7630799, 0x935d64, 0xf76f7b7d,
-    0x91b01d, 0xf77befb5, 0x900548, 0xf7886442,
-    0x8e5ce5, 0xf794d922, 0x8cb6f5, 0xf7a14e55,
-    0x8b1376, 0xf7adc3db, 0x89726a, 0xf7ba39b3,
-    0x87d3d0, 0xf7c6afdc, 0x8637a9, 0xf7d32657,
-    0x849df4, 0xf7df9d22, 0x8306b2, 0xf7ec143e,
-    0x8171e2, 0xf7f88ba9, 0x7fdf85, 0xf8050364,
-    0x7e4f9b, 0xf8117b6d, 0x7cc223, 0xf81df3c5,
-    0x7b371e, 0xf82a6c6a, 0x79ae8c, 0xf836e55d,
-    0x78286e, 0xf8435e9d, 0x76a4c2, 0xf84fd829,
-    0x752389, 0xf85c5201, 0x73a4c3, 0xf868cc24,
-    0x722871, 0xf8754692, 0x70ae92, 0xf881c14b,
-    0x6f3726, 0xf88e3c4d, 0x6dc22e, 0xf89ab799,
-    0x6c4fa8, 0xf8a7332e, 0x6adf97, 0xf8b3af0c,
-    0x6971f9, 0xf8c02b31, 0x6806ce, 0xf8cca79e,
-    0x669e18, 0xf8d92452, 0x6537d4, 0xf8e5a14d,
-    0x63d405, 0xf8f21e8e, 0x6272aa, 0xf8fe9c15,
-    0x6113c2, 0xf90b19e0, 0x5fb74e, 0xf91797f0,
-    0x5e5d4e, 0xf9241645, 0x5d05c3, 0xf93094dd,
-    0x5bb0ab, 0xf93d13b8, 0x5a5e07, 0xf94992d7,
-    0x590dd8, 0xf9561237, 0x57c01d, 0xf96291d9,
-    0x5674d6, 0xf96f11bc, 0x552c03, 0xf97b91e1,
-    0x53e5a5, 0xf9881245, 0x52a1bb, 0xf99492ea,
-    0x516045, 0xf9a113cd, 0x502145, 0xf9ad94f0,
-    0x4ee4b8, 0xf9ba1651, 0x4daaa1, 0xf9c697f0,
-    0x4c72fe, 0xf9d319cc, 0x4b3dcf, 0xf9df9be6,
-    0x4a0b16, 0xf9ec1e3b, 0x48dad1, 0xf9f8a0cd,
-    0x47ad01, 0xfa05239a, 0x4681a6, 0xfa11a6a3,
-    0x4558c0, 0xfa1e29e5, 0x44324f, 0xfa2aad62,
-    0x430e53, 0xfa373119, 0x41eccc, 0xfa43b508,
-    0x40cdba, 0xfa503930, 0x3fb11d, 0xfa5cbd91,
-    0x3e96f6, 0xfa694229, 0x3d7f44, 0xfa75c6f8,
-    0x3c6a07, 0xfa824bfd, 0x3b573f, 0xfa8ed139,
-    0x3a46ed, 0xfa9b56ab, 0x393910, 0xfaa7dc52,
-    0x382da8, 0xfab4622d, 0x3724b6, 0xfac0e83d,
-    0x361e3a, 0xfacd6e81, 0x351a33, 0xfad9f4f8,
-    0x3418a2, 0xfae67ba2, 0x331986, 0xfaf3027e,
-    0x321ce0, 0xfaff898c, 0x3122b0, 0xfb0c10cb,
-    0x302af5, 0xfb18983b, 0x2f35b1, 0xfb251fdc,
-    0x2e42e2, 0xfb31a7ac, 0x2d5289, 0xfb3e2fac,
-    0x2c64a6, 0xfb4ab7db, 0x2b7939, 0xfb574039,
-    0x2a9042, 0xfb63c8c4, 0x29a9c1, 0xfb70517d,
-    0x28c5b6, 0xfb7cda63, 0x27e421, 0xfb896375,
-    0x270502, 0xfb95ecb4, 0x262859, 0xfba2761e,
-    0x254e27, 0xfbaeffb3, 0x24766a, 0xfbbb8973,
-    0x23a124, 0xfbc8135c, 0x22ce54, 0xfbd49d70,
-    0x21fdfb, 0xfbe127ac, 0x213018, 0xfbedb212,
-    0x2064ab, 0xfbfa3c9f, 0x1f9bb5, 0xfc06c754,
-    0x1ed535, 0xfc135231, 0x1e112b, 0xfc1fdd34,
-    0x1d4f99, 0xfc2c685d, 0x1c907c, 0xfc38f3ac,
-    0x1bd3d6, 0xfc457f21, 0x1b19a7, 0xfc520aba,
-    0x1a61ee, 0xfc5e9678, 0x19acac, 0xfc6b2259,
-    0x18f9e1, 0xfc77ae5e, 0x18498c, 0xfc843a85,
-    0x179bae, 0xfc90c6cf, 0x16f047, 0xfc9d533b,
-    0x164757, 0xfca9dfc8, 0x15a0dd, 0xfcb66c77,
-    0x14fcda, 0xfcc2f945, 0x145b4e, 0xfccf8634,
-    0x13bc39, 0xfcdc1342, 0x131f9b, 0xfce8a06f,
-    0x128574, 0xfcf52dbb, 0x11edc3, 0xfd01bb24,
-    0x11588a, 0xfd0e48ab, 0x10c5c7, 0xfd1ad650,
-    0x10357c, 0xfd276410, 0xfa7a8, 0xfd33f1ed,
-    0xf1c4a, 0xfd407fe6, 0xe9364, 0xfd4d0df9,
-    0xe0cf5, 0xfd599c28, 0xd88fd, 0xfd662a70,
-    0xd077c, 0xfd72b8d2, 0xc8872, 0xfd7f474d,
-    0xc0be0, 0xfd8bd5e1, 0xb91c4, 0xfd98648d,
-    0xb1a20, 0xfda4f351, 0xaa4f3, 0xfdb1822c,
-    0xa323d, 0xfdbe111e, 0x9c1ff, 0xfdcaa027,
-    0x95438, 0xfdd72f45, 0x8e8e8, 0xfde3be78,
-    0x8800f, 0xfdf04dc0, 0x819ae, 0xfdfcdd1d,
-    0x7b5c4, 0xfe096c8d, 0x75452, 0xfe15fc11,
-    0x6f556, 0xfe228ba7, 0x698d3, 0xfe2f1b50,
-    0x63ec6, 0xfe3bab0b, 0x5e731, 0xfe483ad8,
-    0x59214, 0xfe54cab5, 0x53f6e, 0xfe615aa3,
-    0x4ef3f, 0xfe6deaa1, 0x4a188, 0xfe7a7aae,
-    0x45648, 0xfe870aca, 0x40d80, 0xfe939af5,
-    0x3c72f, 0xfea02b2e, 0x38356, 0xfeacbb74,
-    0x341f4, 0xfeb94bc8, 0x3030a, 0xfec5dc28,
-    0x2c697, 0xfed26c94, 0x28c9c, 0xfedefd0c,
-    0x25519, 0xfeeb8d8f, 0x2200d, 0xfef81e1d,
-    0x1ed78, 0xff04aeb5, 0x1bd5c, 0xff113f56,
-    0x18fb6, 0xff1dd001, 0x16489, 0xff2a60b4,
-    0x13bd3, 0xff36f170, 0x11594, 0xff438234,
-    0xf1ce, 0xff5012fe, 0xd07e, 0xff5ca3d0,
-    0xb1a7, 0xff6934a8, 0x9547, 0xff75c585,
-    0x7b5f, 0xff825668, 0x63ee, 0xff8ee750,
-    0x4ef5, 0xff9b783c, 0x3c74, 0xffa8092c,
-    0x2c6a, 0xffb49a1f, 0x1ed8, 0xffc12b16,
-    0x13bd, 0xffcdbc0f, 0xb1a, 0xffda4d09,
-    0x4ef, 0xffe6de05, 0x13c, 0xfff36f02,
-    0x0, 0x0, 0x13c, 0xc90fe,
-    0x4ef, 0x1921fb, 0xb1a, 0x25b2f7,
-    0x13bd, 0x3243f1, 0x1ed8, 0x3ed4ea,
-    0x2c6a, 0x4b65e1, 0x3c74, 0x57f6d4,
-    0x4ef5, 0x6487c4, 0x63ee, 0x7118b0,
-    0x7b5f, 0x7da998, 0x9547, 0x8a3a7b,
-    0xb1a7, 0x96cb58, 0xd07e, 0xa35c30,
-    0xf1ce, 0xafed02, 0x11594, 0xbc7dcc,
-    0x13bd3, 0xc90e90, 0x16489, 0xd59f4c,
-    0x18fb6, 0xe22fff, 0x1bd5c, 0xeec0aa,
-    0x1ed78, 0xfb514b, 0x2200d, 0x107e1e3,
-    0x25519, 0x1147271, 0x28c9c, 0x12102f4,
-    0x2c697, 0x12d936c, 0x3030a, 0x13a23d8,
-    0x341f4, 0x146b438, 0x38356, 0x153448c,
-    0x3c72f, 0x15fd4d2, 0x40d80, 0x16c650b,
-    0x45648, 0x178f536, 0x4a188, 0x1858552,
-    0x4ef3f, 0x192155f, 0x53f6e, 0x19ea55d,
-    0x59214, 0x1ab354b, 0x5e731, 0x1b7c528,
-    0x63ec6, 0x1c454f5, 0x698d3, 0x1d0e4b0,
-    0x6f556, 0x1dd7459, 0x75452, 0x1ea03ef,
-    0x7b5c4, 0x1f69373, 0x819ae, 0x20322e3,
-    0x8800f, 0x20fb240, 0x8e8e8, 0x21c4188,
-    0x95438, 0x228d0bb, 0x9c1ff, 0x2355fd9,
-    0xa323d, 0x241eee2, 0xaa4f3, 0x24e7dd4,
-    0xb1a20, 0x25b0caf, 0xb91c4, 0x2679b73,
-    0xc0be0, 0x2742a1f, 0xc8872, 0x280b8b3,
-    0xd077c, 0x28d472e, 0xd88fd, 0x299d590,
-    0xe0cf5, 0x2a663d8, 0xe9364, 0x2b2f207,
-    0xf1c4a, 0x2bf801a, 0xfa7a8, 0x2cc0e13,
-    0x10357c, 0x2d89bf0, 0x10c5c7, 0x2e529b0,
-    0x11588a, 0x2f1b755, 0x11edc3, 0x2fe44dc,
-    0x128574, 0x30ad245, 0x131f9b, 0x3175f91,
-    0x13bc39, 0x323ecbe, 0x145b4e, 0x33079cc,
-    0x14fcda, 0x33d06bb, 0x15a0dd, 0x3499389,
-    0x164757, 0x3562038, 0x16f047, 0x362acc5,
-    0x179bae, 0x36f3931, 0x18498c, 0x37bc57b,
-    0x18f9e1, 0x38851a2, 0x19acac, 0x394dda7,
-    0x1a61ee, 0x3a16988, 0x1b19a7, 0x3adf546,
-    0x1bd3d6, 0x3ba80df, 0x1c907c, 0x3c70c54,
-    0x1d4f99, 0x3d397a3, 0x1e112b, 0x3e022cc,
-    0x1ed535, 0x3ecadcf, 0x1f9bb5, 0x3f938ac,
-    0x2064ab, 0x405c361, 0x213018, 0x4124dee,
-    0x21fdfb, 0x41ed854, 0x22ce54, 0x42b6290,
-    0x23a124, 0x437eca4, 0x24766a, 0x444768d,
-    0x254e27, 0x451004d, 0x262859, 0x45d89e2,
-    0x270502, 0x46a134c, 0x27e421, 0x4769c8b,
-    0x28c5b6, 0x483259d, 0x29a9c1, 0x48fae83,
-    0x2a9042, 0x49c373c, 0x2b7939, 0x4a8bfc7,
-    0x2c64a6, 0x4b54825, 0x2d5289, 0x4c1d054,
-    0x2e42e2, 0x4ce5854, 0x2f35b1, 0x4dae024,
-    0x302af5, 0x4e767c5, 0x3122b0, 0x4f3ef35,
-    0x321ce0, 0x5007674, 0x331986, 0x50cfd82,
-    0x3418a2, 0x519845e, 0x351a33, 0x5260b08,
-    0x361e3a, 0x532917f, 0x3724b6, 0x53f17c3,
-    0x382da8, 0x54b9dd3, 0x393910, 0x55823ae,
-    0x3a46ed, 0x564a955, 0x3b573f, 0x5712ec7,
-    0x3c6a07, 0x57db403, 0x3d7f44, 0x58a3908,
-    0x3e96f6, 0x596bdd7, 0x3fb11d, 0x5a3426f,
-    0x40cdba, 0x5afc6d0, 0x41eccc, 0x5bc4af8,
-    0x430e53, 0x5c8cee7, 0x44324f, 0x5d5529e,
-    0x4558c0, 0x5e1d61b, 0x4681a6, 0x5ee595d,
-    0x47ad01, 0x5fadc66, 0x48dad1, 0x6075f33,
-    0x4a0b16, 0x613e1c5, 0x4b3dcf, 0x620641a,
-    0x4c72fe, 0x62ce634, 0x4daaa1, 0x6396810,
-    0x4ee4b8, 0x645e9af, 0x502145, 0x6526b10,
-    0x516045, 0x65eec33, 0x52a1bb, 0x66b6d16,
-    0x53e5a5, 0x677edbb, 0x552c03, 0x6846e1f,
-    0x5674d6, 0x690ee44, 0x57c01d, 0x69d6e27,
-    0x590dd8, 0x6a9edc9, 0x5a5e07, 0x6b66d29,
-    0x5bb0ab, 0x6c2ec48, 0x5d05c3, 0x6cf6b23,
-    0x5e5d4e, 0x6dbe9bb, 0x5fb74e, 0x6e86810,
-    0x6113c2, 0x6f4e620, 0x6272aa, 0x70163eb,
-    0x63d405, 0x70de172, 0x6537d4, 0x71a5eb3,
-    0x669e18, 0x726dbae, 0x6806ce, 0x7335862,
-    0x6971f9, 0x73fd4cf, 0x6adf97, 0x74c50f4,
-    0x6c4fa8, 0x758ccd2, 0x6dc22e, 0x7654867,
-    0x6f3726, 0x771c3b3, 0x70ae92, 0x77e3eb5,
-    0x722871, 0x78ab96e, 0x73a4c3, 0x79733dc,
-    0x752389, 0x7a3adff, 0x76a4c2, 0x7b027d7,
-    0x78286e, 0x7bca163, 0x79ae8c, 0x7c91aa3,
-    0x7b371e, 0x7d59396, 0x7cc223, 0x7e20c3b,
-    0x7e4f9b, 0x7ee8493, 0x7fdf85, 0x7fafc9c,
-    0x8171e2, 0x8077457, 0x8306b2, 0x813ebc2,
-    0x849df4, 0x82062de, 0x8637a9, 0x82cd9a9,
-    0x87d3d0, 0x8395024, 0x89726a, 0x845c64d,
-    0x8b1376, 0x8523c25, 0x8cb6f5, 0x85eb1ab,
-    0x8e5ce5, 0x86b26de, 0x900548, 0x8779bbe,
-    0x91b01d, 0x884104b, 0x935d64, 0x8908483,
-    0x950d1d, 0x89cf867, 0x96bf48, 0x8a96bf6,
-    0x9873e4, 0x8b5df30, 0x9a2af3, 0x8c25213,
-    0x9be473, 0x8cec4a0, 0x9da065, 0x8db36d6,
-    0x9f5ec8, 0x8e7a8b5, 0xa11f9d, 0x8f41a3c,
-    0xa2e2e3, 0x9008b6a, 0xa4a89b, 0x90cfc40,
-    0xa670c4, 0x9196cbc, 0xa83b5e, 0x925dcdf,
-    0xaa086a, 0x9324ca7, 0xabd7e6, 0x93ebc14,
-    0xada9d4, 0x94b2b27, 0xaf7e33, 0x95799dd,
-    0xb15502, 0x9640837, 0xb32e42, 0x9707635,
-    0xb509f3, 0x97ce3d5, 0xb6e815, 0x9895118,
-    0xb8c8a7, 0x995bdfd, 0xbaabaa, 0x9a22a83,
-    0xbc911d, 0x9ae96aa, 0xbe7901, 0x9bb0271,
-    0xc06355, 0x9c76dd8, 0xc25019, 0x9d3d8df,
-    0xc43f4d, 0x9e04385, 0xc630f2, 0x9ecadc9,
-    0xc82506, 0x9f917ac, 0xca1b8a, 0xa05812c,
-    0xcc147f, 0xa11ea49, 0xce0fe3, 0xa1e5303,
-    0xd00db6, 0xa2abb59, 0xd20dfa, 0xa37234a,
-    0xd410ad, 0xa438ad7, 0xd615cf, 0xa4ff1fe,
-    0xd81d61, 0xa5c58c0, 0xda2762, 0xa68bf1b,
-    0xdc33d2, 0xa752510, 0xde42b2, 0xa818a9d,
-    0xe05401, 0xa8defc3, 0xe267be, 0xa9a5480,
-    0xe47deb, 0xaa6b8d5, 0xe69686, 0xab31cc1,
-    0xe8b190, 0xabf8043, 0xeacf09, 0xacbe35b,
-    0xeceef1, 0xad84609, 0xef1147, 0xae4a84b,
-    0xf1360b, 0xaf10a22, 0xf35d3e, 0xafd6b8d,
-    0xf586df, 0xb09cc8c, 0xf7b2ee, 0xb162d1d,
-    0xf9e16b, 0xb228d42, 0xfc1257, 0xb2eecf8,
-    0xfe45b0, 0xb3b4c40, 0x1007b77, 0xb47ab19,
-    0x102b3ac, 0xb540982, 0x104ee4f, 0xb60677c,
-    0x1072b5f, 0xb6cc506, 0x1096add, 0xb79221f,
-    0x10bacc8, 0xb857ec7, 0x10df120, 0xb91dafc,
-    0x11037e6, 0xb9e36c0, 0x1128119, 0xbaa9211,
-    0x114ccb9, 0xbb6ecef, 0x1171ac6, 0xbc34759,
-    0x1196b3f, 0xbcfa150, 0x11bbe26, 0xbdbfad1,
-    0x11e1379, 0xbe853de, 0x1206b39, 0xbf4ac75,
-    0x122c566, 0xc010496, 0x12521ff, 0xc0d5c41,
-    0x1278104, 0xc19b374, 0x129e276, 0xc260a31,
-    0x12c4653, 0xc326075, 0x12eac9d, 0xc3eb641,
-    0x1311553, 0xc4b0b94, 0x1338075, 0xc57606e,
-    0x135ee02, 0xc63b4ce, 0x1385dfb, 0xc7008b3,
-    0x13ad060, 0xc7c5c1e, 0x13d4530, 0xc88af0e,
-    0x13fbc6c, 0xc950182, 0x1423613, 0xca1537a,
-    0x144b225, 0xcada4f5, 0x14730a3, 0xcb9f5f3,
-    0x149b18b, 0xcc64673, 0x14c34df, 0xcd29676,
-    0x14eba9d, 0xcdee5f9, 0x15142c6, 0xceb34fe,
-    0x153cd5a, 0xcf78383, 0x1565a58, 0xd03d189,
-    0x158e9c1, 0xd101f0e, 0x15b7b94, 0xd1c6c11,
-    0x15e0fd1, 0xd28b894, 0x160a678, 0xd350495,
-    0x1633f8a, 0xd415013, 0x165db05, 0xd4d9b0e,
-    0x16878eb, 0xd59e586, 0x16b193a, 0xd662f7b,
-    0x16dbbf3, 0xd7278eb, 0x1706115, 0xd7ec1d6,
-    0x17308a1, 0xd8b0a3d, 0x175b296, 0xd97521d,
-    0x1785ef4, 0xda39978, 0x17b0dbb, 0xdafe04b,
-    0x17dbeec, 0xdbc2698, 0x1807285, 0xdc86c5d,
-    0x1832888, 0xdd4b19a, 0x185e0f3, 0xde0f64f,
-    0x1889bc6, 0xded3a7b, 0x18b5903, 0xdf97e1d,
-    0x18e18a7, 0xe05c135, 0x190dab4, 0xe1203c3,
-    0x1939f29, 0xe1e45c6, 0x1966606, 0xe2a873e,
-    0x1992f4c, 0xe36c82a, 0x19bfaf9, 0xe430889,
-    0x19ec90d, 0xe4f485c, 0x1a1998a, 0xe5b87a2,
-    0x1a46c6e, 0xe67c65a, 0x1a741b9, 0xe740483,
-    0x1aa196c, 0xe80421e, 0x1acf386, 0xe8c7f2a,
-    0x1afd007, 0xe98bba7, 0x1b2aef0, 0xea4f793,
-    0x1b5903f, 0xeb132ef, 0x1b873f5, 0xebd6db9,
-    0x1bb5a11, 0xec9a7f3, 0x1be4294, 0xed5e19a,
-    0x1c12d7e, 0xee21aaf, 0x1c41ace, 0xeee5331,
-    0x1c70a84, 0xefa8b20, 0x1c9fca0, 0xf06c27a,
-    0x1ccf122, 0xf12f941, 0x1cfe80a, 0xf1f2f73,
-    0x1d2e158, 0xf2b650f, 0x1d5dd0c, 0xf379a16,
-    0x1d8db25, 0xf43ce86, 0x1dbdba3, 0xf500260,
-    0x1dede87, 0xf5c35a3, 0x1e1e3d0, 0xf68684e,
-    0x1e4eb7e, 0xf749a61, 0x1e7f591, 0xf80cbdc,
-    0x1eb0209, 0xf8cfcbe, 0x1ee10e5, 0xf992d06,
-    0x1f12227, 0xfa55cb4, 0x1f435cc, 0xfb18bc8,
-    0x1f74bd6, 0xfbdba40, 0x1fa6445, 0xfc9e81e,
-    0x1fd7f17, 0xfd6155f, 0x2009c4e, 0xfe24205,
-    0x203bbe8, 0xfee6e0d, 0x206dde6, 0xffa9979,
-    0x20a0248, 0x1006c446, 0x20d290d, 0x1012ee76,
-    0x2105236, 0x101f1807, 0x2137dc2, 0x102b40f8,
-    0x216abb1, 0x1037694b, 0x219dc03, 0x104390fd,
-    0x21d0eb8, 0x104fb80e, 0x22043d0, 0x105bde7f,
-    0x2237b4b, 0x1068044e, 0x226b528, 0x1074297b,
-    0x229f167, 0x10804e06, 0x22d3009, 0x108c71ee,
-    0x230710d, 0x10989532, 0x233b473, 0x10a4b7d3,
-    0x236fa3b, 0x10b0d9d0, 0x23a4265, 0x10bcfb28,
-    0x23d8cf1, 0x10c91bda, 0x240d9de, 0x10d53be7,
-    0x244292c, 0x10e15b4e, 0x2477adc, 0x10ed7a0e,
-    0x24aceed, 0x10f99827, 0x24e255e, 0x1105b599,
-    0x2517e31, 0x1111d263, 0x254d965, 0x111dee84,
-    0x25836f9, 0x112a09fc, 0x25b96ee, 0x113624cb,
-    0x25ef943, 0x11423ef0, 0x2625df8, 0x114e586a,
-    0x265c50e, 0x115a713a, 0x2692e83, 0x1166895f,
-    0x26c9a58, 0x1172a0d7, 0x270088e, 0x117eb7a4,
-    0x2737922, 0x118acdc4, 0x276ec16, 0x1196e337,
-    0x27a616a, 0x11a2f7fc, 0x27dd91c, 0x11af0c13,
-    0x281532e, 0x11bb1f7c, 0x284cf9f, 0x11c73235,
-    0x2884e6e, 0x11d3443f, 0x28bcf9c, 0x11df5599,
-    0x28f5329, 0x11eb6643, 0x292d914, 0x11f7763c,
-    0x296615d, 0x12038584, 0x299ec05, 0x120f941a,
-    0x29d790a, 0x121ba1fd, 0x2a1086d, 0x1227af2e,
-    0x2a49a2e, 0x1233bbac, 0x2a82e4d, 0x123fc776,
-    0x2abc4c9, 0x124bd28c, 0x2af5da2, 0x1257dced,
-    0x2b2f8d8, 0x1263e699, 0x2b6966c, 0x126fef90,
-    0x2ba365c, 0x127bf7d1, 0x2bdd8a9, 0x1287ff5b,
-    0x2c17d52, 0x1294062f, 0x2c52459, 0x12a00c4b,
-    0x2c8cdbb, 0x12ac11af, 0x2cc7979, 0x12b8165b,
-    0x2d02794, 0x12c41a4f, 0x2d3d80a, 0x12d01d89,
-    0x2d78add, 0x12dc2009, 0x2db400a, 0x12e821cf,
-    0x2def794, 0x12f422db, 0x2e2b178, 0x1300232c,
-    0x2e66db8, 0x130c22c1, 0x2ea2c53, 0x1318219a,
-    0x2eded49, 0x13241fb6, 0x2f1b099, 0x13301d16,
-    0x2f57644, 0x133c19b8, 0x2f93e4a, 0x1348159d,
-    0x2fd08a9, 0x135410c3, 0x300d563, 0x13600b2a,
-    0x304a477, 0x136c04d2, 0x30875e5, 0x1377fdbb,
-    0x30c49ad, 0x1383f5e3, 0x3101fce, 0x138fed4b,
-    0x313f848, 0x139be3f2, 0x317d31c, 0x13a7d9d7,
-    0x31bb049, 0x13b3cefa, 0x31f8fcf, 0x13bfc35b,
-    0x32371ae, 0x13cbb6f8, 0x32755e5, 0x13d7a9d3,
-    0x32b3c75, 0x13e39be9, 0x32f255e, 0x13ef8d3c,
-    0x333109e, 0x13fb7dc9, 0x336fe37, 0x14076d91,
-    0x33aee27, 0x14135c94, 0x33ee070, 0x141f4ad1,
-    0x342d510, 0x142b3846, 0x346cc07, 0x143724f5,
-    0x34ac556, 0x144310dd, 0x34ec0fc, 0x144efbfc,
-    0x352bef9, 0x145ae653, 0x356bf4d, 0x1466cfe1,
-    0x35ac1f7, 0x1472b8a5, 0x35ec6f8, 0x147ea0a0,
-    0x362ce50, 0x148a87d1, 0x366d7fd, 0x14966e36,
-    0x36ae401, 0x14a253d1, 0x36ef25b, 0x14ae38a0,
-    0x373030a, 0x14ba1ca3, 0x377160f, 0x14c5ffd9,
-    0x37b2b6a, 0x14d1e242, 0x37f4319, 0x14ddc3de,
-    0x3835d1e, 0x14e9a4ac, 0x3877978, 0x14f584ac,
-    0x38b9827, 0x150163dc, 0x38fb92a, 0x150d423d,
-    0x393dc82, 0x15191fcf, 0x398022f, 0x1524fc90,
-    0x39c2a2f, 0x1530d881, 0x3a05484, 0x153cb3a0,
-    0x3a4812c, 0x15488dee, 0x3a8b028, 0x1554676a,
-    0x3ace178, 0x15604013, 0x3b1151b, 0x156c17e9,
-    0x3b54b11, 0x1577eeec, 0x3b9835a, 0x1583c51b,
-    0x3bdbdf6, 0x158f9a76, 0x3c1fae5, 0x159b6efb,
-    0x3c63a26, 0x15a742ac, 0x3ca7bba, 0x15b31587,
-    0x3cebfa0, 0x15bee78c, 0x3d305d8, 0x15cab8ba,
-    0x3d74e62, 0x15d68911, 0x3db993e, 0x15e25890,
-    0x3dfe66c, 0x15ee2738, 0x3e435ea, 0x15f9f507,
-    0x3e887bb, 0x1605c1fd, 0x3ecdbdc, 0x16118e1a,
-    0x3f1324e, 0x161d595d, 0x3f58b10, 0x162923c5,
-    0x3f9e624, 0x1634ed53, 0x3fe4388, 0x1640b606,
-    0x402a33c, 0x164c7ddd, 0x4070540, 0x165844d8,
-    0x40b6994, 0x16640af7, 0x40fd037, 0x166fd039,
-    0x414392b, 0x167b949d, 0x418a46d, 0x16875823,
-    0x41d11ff, 0x16931acb, 0x42181e0, 0x169edc94,
-    0x425f410, 0x16aa9d7e, 0x42a688f, 0x16b65d88,
-    0x42edf5c, 0x16c21cb2, 0x4335877, 0x16cddafb,
-    0x437d3e1, 0x16d99864, 0x43c5199, 0x16e554ea,
-    0x440d19e, 0x16f1108f, 0x44553f2, 0x16fccb51,
-    0x449d892, 0x17088531, 0x44e5f80, 0x17143e2d,
-    0x452e8bc, 0x171ff646, 0x4577444, 0x172bad7a,
-    0x45c0219, 0x173763c9, 0x460923b, 0x17431933,
-    0x46524a9, 0x174ecdb8, 0x469b963, 0x175a8157,
-    0x46e5069, 0x1766340f, 0x472e9bc, 0x1771e5e0,
-    0x477855a, 0x177d96ca, 0x47c2344, 0x178946cc,
-    0x480c379, 0x1794f5e6, 0x48565f9, 0x17a0a417,
-    0x48a0ac4, 0x17ac515f, 0x48eb1db, 0x17b7fdbd,
-    0x4935b3c, 0x17c3a931, 0x49806e7, 0x17cf53bb,
-    0x49cb4dd, 0x17dafd59, 0x4a1651c, 0x17e6a60c,
-    0x4a617a6, 0x17f24dd3, 0x4aacc7a, 0x17fdf4ae,
-    0x4af8397, 0x18099a9c, 0x4b43cfd, 0x18153f9d,
-    0x4b8f8ad, 0x1820e3b0, 0x4bdb6a6, 0x182c86d5,
-    0x4c276e8, 0x1838290c, 0x4c73972, 0x1843ca53,
-    0x4cbfe45, 0x184f6aab, 0x4d0c560, 0x185b0a13,
-    0x4d58ec3, 0x1866a88a, 0x4da5a6f, 0x18724611,
-    0x4df2862, 0x187de2a7, 0x4e3f89c, 0x18897e4a,
-    0x4e8cb1e, 0x189518fc, 0x4ed9fe7, 0x18a0b2bb,
-    0x4f276f7, 0x18ac4b87, 0x4f7504e, 0x18b7e35f,
-    0x4fc2bec, 0x18c37a44, 0x50109d0, 0x18cf1034,
-    0x505e9fb, 0x18daa52f, 0x50acc6b, 0x18e63935,
-    0x50fb121, 0x18f1cc45, 0x514981d, 0x18fd5e5f,
-    0x519815f, 0x1908ef82, 0x51e6ce6, 0x19147fae,
-    0x5235ab2, 0x19200ee3, 0x5284ac3, 0x192b9d1f,
-    0x52d3d18, 0x19372a64, 0x53231b3, 0x1942b6af,
-    0x5372891, 0x194e4201, 0x53c21b4, 0x1959cc5a,
-    0x5411d1b, 0x196555b8, 0x5461ac6, 0x1970de1b,
-    0x54b1ab4, 0x197c6584, 0x5501ce5, 0x1987ebf0,
-    0x555215a, 0x19937161, 0x55a2812, 0x199ef5d6,
-    0x55f310d, 0x19aa794d, 0x5643c4a, 0x19b5fbc8,
-    0x56949ca, 0x19c17d44, 0x56e598c, 0x19ccfdc2,
-    0x5736b90, 0x19d87d42, 0x5787fd6, 0x19e3fbc3,
-    0x57d965d, 0x19ef7944, 0x582af26, 0x19faf5c5,
-    0x587ca31, 0x1a067145, 0x58ce77c, 0x1a11ebc5,
-    0x5920708, 0x1a1d6544, 0x59728d5, 0x1a28ddc0,
-    0x59c4ce3, 0x1a34553b, 0x5a17330, 0x1a3fcbb3,
-    0x5a69bbe, 0x1a4b4128, 0x5abc68c, 0x1a56b599,
-    0x5b0f399, 0x1a622907, 0x5b622e6, 0x1a6d9b70,
-    0x5bb5472, 0x1a790cd4, 0x5c0883d, 0x1a847d33,
-    0x5c5be47, 0x1a8fec8c, 0x5caf690, 0x1a9b5adf,
-    0x5d03118, 0x1aa6c82b, 0x5d56ddd, 0x1ab23471,
-    0x5daace1, 0x1abd9faf, 0x5dfee22, 0x1ac909e5,
-    0x5e531a1, 0x1ad47312, 0x5ea775e, 0x1adfdb37,
-    0x5efbf58, 0x1aeb4253, 0x5f5098f, 0x1af6a865,
-    0x5fa5603, 0x1b020d6c, 0x5ffa4b3, 0x1b0d716a,
-    0x604f5a0, 0x1b18d45c, 0x60a48c9, 0x1b243643,
-    0x60f9e2e, 0x1b2f971e, 0x614f5cf, 0x1b3af6ec,
-    0x61a4fac, 0x1b4655ae, 0x61fabc4, 0x1b51b363,
-    0x6250a18, 0x1b5d100a, 0x62a6aa6, 0x1b686ba3,
-    0x62fcd6f, 0x1b73c62d, 0x6353273, 0x1b7f1fa9,
-    0x63a99b1, 0x1b8a7815, 0x6400329, 0x1b95cf71,
-    0x6456edb, 0x1ba125bd, 0x64adcc7, 0x1bac7af9,
-    0x6504ced, 0x1bb7cf23, 0x655bf4c, 0x1bc3223c,
-    0x65b33e4, 0x1bce7442, 0x660aab5, 0x1bd9c537,
-    0x66623be, 0x1be51518, 0x66b9f01, 0x1bf063e6,
-    0x6711c7b, 0x1bfbb1a0, 0x6769c2e, 0x1c06fe46,
-    0x67c1e18, 0x1c1249d8, 0x681a23a, 0x1c1d9454,
-    0x6872894, 0x1c28ddbb, 0x68cb124, 0x1c34260c,
-    0x6923bec, 0x1c3f6d47, 0x697c8eb, 0x1c4ab36b,
-    0x69d5820, 0x1c55f878, 0x6a2e98b, 0x1c613c6d,
-    0x6a87d2d, 0x1c6c7f4a, 0x6ae1304, 0x1c77c10e,
-    0x6b3ab12, 0x1c8301b9, 0x6b94554, 0x1c8e414b,
-    0x6bee1cd, 0x1c997fc4, 0x6c4807a, 0x1ca4bd21,
-    0x6ca215c, 0x1caff965, 0x6cfc472, 0x1cbb348d,
-    0x6d569be, 0x1cc66e99, 0x6db113d, 0x1cd1a78a,
-    0x6e0baf0, 0x1cdcdf5e, 0x6e666d7, 0x1ce81615,
-    0x6ec14f2, 0x1cf34baf, 0x6f1c540, 0x1cfe802b,
-    0x6f777c1, 0x1d09b389, 0x6fd2c75, 0x1d14e5c9,
-    0x702e35c, 0x1d2016e9, 0x7089c75, 0x1d2b46ea,
-    0x70e57c0, 0x1d3675cb, 0x714153e, 0x1d41a38c,
-    0x719d4ed, 0x1d4cd02c, 0x71f96ce, 0x1d57fbaa,
-    0x7255ae0, 0x1d632608, 0x72b2123, 0x1d6e4f43,
-    0x730e997, 0x1d79775c, 0x736b43c, 0x1d849e51,
-    0x73c8111, 0x1d8fc424, 0x7425016, 0x1d9ae8d2,
-    0x748214c, 0x1da60c5d, 0x74df4b1, 0x1db12ec3,
-    0x753ca46, 0x1dbc5004, 0x759a20a, 0x1dc7701f,
-    0x75f7bfe, 0x1dd28f15, 0x7655820, 0x1dddace4,
-    0x76b3671, 0x1de8c98c, 0x77116f0, 0x1df3e50d,
-    0x776f99d, 0x1dfeff67, 0x77cde79, 0x1e0a1898,
-    0x782c582, 0x1e1530a1, 0x788aeb9, 0x1e204781,
-    0x78e9a1d, 0x1e2b5d38, 0x79487ae, 0x1e3671c5,
-    0x79a776c, 0x1e418528, 0x7a06957, 0x1e4c9760,
-    0x7a65d6e, 0x1e57a86d, 0x7ac53b1, 0x1e62b84f,
-    0x7b24c20, 0x1e6dc705, 0x7b846ba, 0x1e78d48e,
-    0x7be4381, 0x1e83e0eb, 0x7c44272, 0x1e8eec1b,
-    0x7ca438f, 0x1e99f61d, 0x7d046d6, 0x1ea4fef0,
-    0x7d64c47, 0x1eb00696, 0x7dc53e3, 0x1ebb0d0d,
-    0x7e25daa, 0x1ec61254, 0x7e8699a, 0x1ed1166b,
-    0x7ee77b3, 0x1edc1953, 0x7f487f6, 0x1ee71b0a,
-    0x7fa9a62, 0x1ef21b90, 0x800aef7, 0x1efd1ae4,
-    0x806c5b5, 0x1f081907, 0x80cde9b, 0x1f1315f7,
-    0x812f9a9, 0x1f1e11b5, 0x81916df, 0x1f290c3f,
-    0x81f363d, 0x1f340596, 0x82557c3, 0x1f3efdb9,
-    0x82b7b70, 0x1f49f4a8, 0x831a143, 0x1f54ea62,
-    0x837c93e, 0x1f5fdee6, 0x83df35f, 0x1f6ad235,
-    0x8441fa6, 0x1f75c44e, 0x84a4e14, 0x1f80b531,
-    0x8507ea7, 0x1f8ba4dc, 0x856b160, 0x1f969350,
-    0x85ce63e, 0x1fa1808c, 0x8631d42, 0x1fac6c91,
-    0x869566a, 0x1fb7575c, 0x86f91b7, 0x1fc240ef,
-    0x875cf28, 0x1fcd2948, 0x87c0ebd, 0x1fd81067,
-    0x8825077, 0x1fe2f64c, 0x8889454, 0x1feddaf6,
-    0x88eda54, 0x1ff8be65, 0x8952278, 0x2003a099,
-    0x89b6cbf, 0x200e8190, 0x8a1b928, 0x2019614c,
-    0x8a807b4, 0x20243fca, 0x8ae5862, 0x202f1d0b,
-    0x8b4ab32, 0x2039f90f, 0x8bb0023, 0x2044d3d4,
-    0x8c15736, 0x204fad5b, 0x8c7b06b, 0x205a85a3,
-    0x8ce0bc0, 0x20655cac, 0x8d46936, 0x20703275,
-    0x8dac8cd, 0x207b06fe, 0x8e12a84, 0x2085da46,
-    0x8e78e5b, 0x2090ac4d, 0x8edf452, 0x209b7d13,
-    0x8f45c68, 0x20a64c97, 0x8fac69e, 0x20b11ad9,
-    0x90132f2, 0x20bbe7d8, 0x907a166, 0x20c6b395,
-    0x90e11f7, 0x20d17e0d, 0x91484a8, 0x20dc4742,
-    0x91af976, 0x20e70f32, 0x9217062, 0x20f1d5de,
-    0x927e96b, 0x20fc9b44, 0x92e6492, 0x21075f65,
-    0x934e1d6, 0x21122240, 0x93b6137, 0x211ce3d5,
-    0x941e2b4, 0x2127a423, 0x948664d, 0x21326329,
-    0x94eec03, 0x213d20e8, 0x95573d4, 0x2147dd5f,
-    0x95bfdc1, 0x2152988d, 0x96289c9, 0x215d5273,
-    0x96917ec, 0x21680b0f, 0x96fa82a, 0x2172c262,
-    0x9763a83, 0x217d786a, 0x97ccef5, 0x21882d28,
-    0x9836582, 0x2192e09b, 0x989fe29, 0x219d92c2,
-    0x99098e9, 0x21a8439e, 0x99735c2, 0x21b2f32e,
-    0x99dd4b4, 0x21bda171, 0x9a475bf, 0x21c84e67,
-    0x9ab18e3, 0x21d2fa0f, 0x9b1be1e, 0x21dda46a,
-    0x9b86572, 0x21e84d76, 0x9bf0edd, 0x21f2f534,
-    0x9c5ba60, 0x21fd9ba3, 0x9cc67fa, 0x220840c2,
-    0x9d317ab, 0x2212e492, 0x9d9c973, 0x221d8711,
-    0x9e07d51, 0x2228283f, 0x9e73346, 0x2232c81c,
-    0x9edeb50, 0x223d66a8, 0x9f4a570, 0x224803e2,
-    0x9fb61a5, 0x22529fca, 0xa021fef, 0x225d3a5e,
-    0xa08e04f, 0x2267d3a0, 0xa0fa2c3, 0x22726b8e,
-    0xa16674b, 0x227d0228, 0xa1d2de7, 0x2287976e,
-    0xa23f698, 0x22922b5e, 0xa2ac15b, 0x229cbdfa,
-    0xa318e32, 0x22a74f40, 0xa385d1d, 0x22b1df30,
-    0xa3f2e19, 0x22bc6dca, 0xa460129, 0x22c6fb0c,
-    0xa4cd64b, 0x22d186f8, 0xa53ad7e, 0x22dc118c,
-    0xa5a86c4, 0x22e69ac8, 0xa61621b, 0x22f122ab,
-    0xa683f83, 0x22fba936, 0xa6f1efc, 0x23062e67,
-    0xa760086, 0x2310b23e, 0xa7ce420, 0x231b34bc,
-    0xa83c9ca, 0x2325b5df, 0xa8ab184, 0x233035a7,
-    0xa919b4e, 0x233ab414, 0xa988727, 0x23453125,
-    0xa9f750f, 0x234facda, 0xaa66506, 0x235a2733,
-    0xaad570c, 0x2364a02e, 0xab44b1f, 0x236f17cc,
-    0xabb4141, 0x23798e0d, 0xac23971, 0x238402ef,
-    0xac933ae, 0x238e7673, 0xad02ff8, 0x2398e898,
-    0xad72e4f, 0x23a3595e, 0xade2eb3, 0x23adc8c4,
-    0xae53123, 0x23b836ca, 0xaec35a0, 0x23c2a36f,
-    0xaf33c28, 0x23cd0eb3, 0xafa44bc, 0x23d77896,
-    0xb014f5b, 0x23e1e117, 0xb085c05, 0x23ec4837,
-    0xb0f6aba, 0x23f6adf3, 0xb167b79, 0x2401124d,
-    0xb1d8e43, 0x240b7543, 0xb24a316, 0x2415d6d5,
-    0xb2bb9f4, 0x24203704, 0xb32d2da, 0x242a95ce,
-    0xb39edca, 0x2434f332, 0xb410ac3, 0x243f4f32,
-    0xb4829c4, 0x2449a9cc, 0xb4f4acd, 0x245402ff,
-    0xb566ddf, 0x245e5acc, 0xb5d92f8, 0x2468b132,
-    0xb64ba19, 0x24730631, 0xb6be341, 0x247d59c8,
-    0xb730e70, 0x2487abf7, 0xb7a3ba5, 0x2491fcbe,
-    0xb816ae1, 0x249c4c1b, 0xb889c23, 0x24a69a0f,
-    0xb8fcf6b, 0x24b0e699, 0xb9704b9, 0x24bb31ba,
-    0xb9e3c0b, 0x24c57b6f, 0xba57563, 0x24cfc3ba,
-    0xbacb0bf, 0x24da0a9a, 0xbb3ee20, 0x24e4500e,
-    0xbbb2d85, 0x24ee9415, 0xbc26eee, 0x24f8d6b0,
-    0xbc9b25a, 0x250317df, 0xbd0f7ca, 0x250d57a0,
-    0xbd83f3d, 0x251795f3, 0xbdf88b3, 0x2521d2d8,
-    0xbe6d42b, 0x252c0e4f, 0xbee21a5, 0x25364857,
-    0xbf57121, 0x254080ef, 0xbfcc29f, 0x254ab818,
-    0xc04161e, 0x2554edd1, 0xc0b6b9e, 0x255f2219,
-    0xc12c31f, 0x256954f1, 0xc1a1ca0, 0x25738657,
-    0xc217822, 0x257db64c, 0xc28d5a3, 0x2587e4cf,
-    0xc303524, 0x259211df, 0xc3796a5, 0x259c3d7c,
-    0xc3efa25, 0x25a667a7, 0xc465fa3, 0x25b0905d,
-    0xc4dc720, 0x25bab7a0, 0xc55309b, 0x25c4dd6e,
-    0xc5c9c14, 0x25cf01c8, 0xc64098b, 0x25d924ac,
-    0xc6b78ff, 0x25e3461b, 0xc72ea70, 0x25ed6614,
-    0xc7a5dde, 0x25f78497, 0xc81d349, 0x2601a1a2,
-    0xc894aaf, 0x260bbd37, 0xc90c412, 0x2615d754,
-    0xc983f70, 0x261feffa, 0xc9fbcca, 0x262a0727,
-    0xca73c1e, 0x26341cdb, 0xcaebd6e, 0x263e3117,
-    0xcb640b8, 0x264843d9, 0xcbdc5fc, 0x26525521,
-    0xcc54d3a, 0x265c64ef, 0xcccd671, 0x26667342,
-    0xcd461a2, 0x2670801a, 0xcdbeecc, 0x267a8b77,
-    0xce37def, 0x26849558, 0xceb0f0a, 0x268e9dbd,
-    0xcf2a21d, 0x2698a4a6, 0xcfa3729, 0x26a2aa11,
-    0xd01ce2b, 0x26acadff, 0xd096725, 0x26b6b070,
-    0xd110216, 0x26c0b162, 0xd189efe, 0x26cab0d6,
-    0xd203ddc, 0x26d4aecb, 0xd27deb0, 0x26deab41,
-    0xd2f817b, 0x26e8a637, 0xd37263a, 0x26f29fad,
-    0xd3eccef, 0x26fc97a3, 0xd467599, 0x27068e18,
-    0xd4e2037, 0x2710830c, 0xd55ccca, 0x271a767e,
-    0xd5d7b50, 0x2724686e, 0xd652bcb, 0x272e58dc,
-    0xd6cde39, 0x273847c8, 0xd74929a, 0x27423530,
-    0xd7c48ee, 0x274c2115, 0xd840134, 0x27560b76,
-    0xd8bbb6d, 0x275ff452, 0xd937798, 0x2769dbaa,
-    0xd9b35b4, 0x2773c17d, 0xda2f5c2, 0x277da5cb,
-    0xdaab7c0, 0x27878893, 0xdb27bb0, 0x279169d5,
-    0xdba4190, 0x279b4990, 0xdc20960, 0x27a527c4,
-    0xdc9d320, 0x27af0472, 0xdd19ed0, 0x27b8df97,
-    0xdd96c6f, 0x27c2b934, 0xde13bfd, 0x27cc9149,
-    0xde90d79, 0x27d667d5, 0xdf0e0e4, 0x27e03cd8,
-    0xdf8b63d, 0x27ea1052, 0xe008d84, 0x27f3e241,
-    0xe0866b8, 0x27fdb2a7, 0xe1041d9, 0x28078181,
-    0xe181ee8, 0x28114ed0, 0xe1ffde2, 0x281b1a94,
-    0xe27dec9, 0x2824e4cc, 0xe2fc19c, 0x282ead78,
-    0xe37a65b, 0x28387498, 0xe3f8d05, 0x28423a2a,
-    0xe47759a, 0x284bfe2f, 0xe4f6019, 0x2855c0a6,
-    0xe574c84, 0x285f8190, 0xe5f3ad8, 0x286940ea,
-    0xe672b16, 0x2872feb6, 0xe6f1d3d, 0x287cbaf3,
-    0xe77114e, 0x288675a0, 0xe7f0748, 0x28902ebd,
-    0xe86ff2a, 0x2899e64a, 0xe8ef8f4, 0x28a39c46,
-    0xe96f4a7, 0x28ad50b1, 0xe9ef241, 0x28b7038b,
-    0xea6f1c2, 0x28c0b4d2, 0xeaef32b, 0x28ca6488,
-    0xeb6f67a, 0x28d412ab, 0xebefbb0, 0x28ddbf3b,
-    0xec702cb, 0x28e76a37, 0xecf0bcd, 0x28f113a0,
-    0xed716b4, 0x28fabb75, 0xedf2380, 0x290461b5,
-    0xee73231, 0x290e0661, 0xeef42c7, 0x2917a977,
-    0xef75541, 0x29214af8, 0xeff699f, 0x292aeae3,
-    0xf077fe1, 0x29348937, 0xf0f9805, 0x293e25f5,
-    0xf17b20d, 0x2947c11c, 0xf1fcdf8, 0x29515aab,
-    0xf27ebc5, 0x295af2a3, 0xf300b74, 0x29648902,
-    0xf382d05, 0x296e1dc9, 0xf405077, 0x2977b0f7,
-    0xf4875ca, 0x2981428c, 0xf509cfe, 0x298ad287,
-    0xf58c613, 0x299460e8, 0xf60f108, 0x299dedaf,
-    0xf691ddd, 0x29a778db, 0xf714c91, 0x29b1026c,
-    0xf797d24, 0x29ba8a61, 0xf81af97, 0x29c410ba,
-    0xf89e3e8, 0x29cd9578, 0xf921a17, 0x29d71899,
-    0xf9a5225, 0x29e09a1c, 0xfa28c10, 0x29ea1a03,
-    0xfaac7d8, 0x29f3984c, 0xfb3057d, 0x29fd14f6,
-    0xfbb4500, 0x2a069003, 0xfc3865e, 0x2a100970,
-    0xfcbc999, 0x2a19813f, 0xfd40eaf, 0x2a22f76e,
-    0xfdc55a1, 0x2a2c6bfd, 0xfe49e6d, 0x2a35deeb,
-    0xfece915, 0x2a3f503a, 0xff53597, 0x2a48bfe7,
-    0xffd83f4, 0x2a522df3, 0x1005d42a, 0x2a5b9a5d,
-    0x100e2639, 0x2a650525, 0x10167a22, 0x2a6e6e4b,
-    0x101ecfe4, 0x2a77d5ce, 0x1027277e, 0x2a813bae,
-    0x102f80f1, 0x2a8a9fea, 0x1037dc3b, 0x2a940283,
-    0x1040395d, 0x2a9d6377, 0x10489856, 0x2aa6c2c6,
-    0x1050f926, 0x2ab02071, 0x10595bcd, 0x2ab97c77,
-    0x1061c04a, 0x2ac2d6d6, 0x106a269d, 0x2acc2f90,
-    0x10728ec6, 0x2ad586a3, 0x107af8c4, 0x2adedc10,
-    0x10836497, 0x2ae82fd5, 0x108bd23f, 0x2af181f3,
-    0x109441bb, 0x2afad269, 0x109cb30b, 0x2b042137,
-    0x10a5262f, 0x2b0d6e5c, 0x10ad9b26, 0x2b16b9d9,
-    0x10b611f1, 0x2b2003ac, 0x10be8a8d, 0x2b294bd5,
-    0x10c704fd, 0x2b329255, 0x10cf813e, 0x2b3bd72a,
-    0x10d7ff51, 0x2b451a55, 0x10e07f36, 0x2b4e5bd4,
-    0x10e900ec, 0x2b579ba8, 0x10f18472, 0x2b60d9d0,
-    0x10fa09c9, 0x2b6a164d, 0x110290f0, 0x2b73511c,
-    0x110b19e7, 0x2b7c8a3f, 0x1113a4ad, 0x2b85c1b5,
-    0x111c3142, 0x2b8ef77d, 0x1124bfa6, 0x2b982b97,
-    0x112d4fd9, 0x2ba15e03, 0x1135e1d9, 0x2baa8ec0,
-    0x113e75a8, 0x2bb3bdce, 0x11470b44, 0x2bbceb2d,
-    0x114fa2ad, 0x2bc616dd, 0x11583be2, 0x2bcf40dc,
-    0x1160d6e5, 0x2bd8692b, 0x116973b3, 0x2be18fc9,
-    0x1172124d, 0x2beab4b6, 0x117ab2b3, 0x2bf3d7f2,
-    0x118354e4, 0x2bfcf97c, 0x118bf8e0, 0x2c061953,
-    0x11949ea6, 0x2c0f3779, 0x119d4636, 0x2c1853eb,
-    0x11a5ef90, 0x2c216eaa, 0x11ae9ab4, 0x2c2a87b6,
-    0x11b747a0, 0x2c339f0e, 0x11bff656, 0x2c3cb4b1,
-    0x11c8a6d4, 0x2c45c8a0, 0x11d1591a, 0x2c4edada,
-    0x11da0d28, 0x2c57eb5e, 0x11e2c2fd, 0x2c60fa2d,
-    0x11eb7a9a, 0x2c6a0746, 0x11f433fd, 0x2c7312a9,
-    0x11fcef27, 0x2c7c1c55, 0x1205ac17, 0x2c85244a,
-    0x120e6acc, 0x2c8e2a87, 0x12172b48, 0x2c972f0d,
-    0x121fed88, 0x2ca031da, 0x1228b18d, 0x2ca932ef,
-    0x12317756, 0x2cb2324c, 0x123a3ee4, 0x2cbb2fef,
-    0x12430835, 0x2cc42bd9, 0x124bd34a, 0x2ccd2609,
-    0x1254a021, 0x2cd61e7f, 0x125d6ebc, 0x2cdf153a,
-    0x12663f19, 0x2ce80a3a, 0x126f1138, 0x2cf0fd80,
-    0x1277e518, 0x2cf9ef09, 0x1280babb, 0x2d02ded7,
-    0x1289921e, 0x2d0bcce8, 0x12926b41, 0x2d14b93d,
-    0x129b4626, 0x2d1da3d5, 0x12a422ca, 0x2d268cb0,
-    0x12ad012e, 0x2d2f73cd, 0x12b5e151, 0x2d38592c,
-    0x12bec333, 0x2d413ccd, 0x12c7a6d4, 0x2d4a1eaf,
-    0x12d08c33, 0x2d52fed2, 0x12d97350, 0x2d5bdd36,
-    0x12e25c2b, 0x2d64b9da, 0x12eb46c3, 0x2d6d94bf,
-    0x12f43318, 0x2d766de2, 0x12fd2129, 0x2d7f4545,
-    0x130610f7, 0x2d881ae8, 0x130f0280, 0x2d90eec8,
-    0x1317f5c6, 0x2d99c0e7, 0x1320eac6, 0x2da29144,
-    0x1329e181, 0x2dab5fdf, 0x1332d9f7, 0x2db42cb6,
-    0x133bd427, 0x2dbcf7cb, 0x1344d011, 0x2dc5c11c,
-    0x134dcdb4, 0x2dce88aa, 0x1356cd11, 0x2dd74e73,
-    0x135fce26, 0x2de01278, 0x1368d0f3, 0x2de8d4b8,
-    0x1371d579, 0x2df19534, 0x137adbb6, 0x2dfa53e9,
-    0x1383e3ab, 0x2e0310d9, 0x138ced57, 0x2e0bcc03,
-    0x1395f8ba, 0x2e148566, 0x139f05d3, 0x2e1d3d03,
-    0x13a814a2, 0x2e25f2d8, 0x13b12526, 0x2e2ea6e6,
-    0x13ba3760, 0x2e37592c, 0x13c34b4f, 0x2e4009aa,
-    0x13cc60f2, 0x2e48b860, 0x13d5784a, 0x2e51654c,
-    0x13de9156, 0x2e5a1070, 0x13e7ac15, 0x2e62b9ca,
-    0x13f0c887, 0x2e6b615a, 0x13f9e6ad, 0x2e740720,
-    0x14030684, 0x2e7cab1c, 0x140c280e, 0x2e854d4d,
-    0x14154b4a, 0x2e8dedb3, 0x141e7037, 0x2e968c4d,
-    0x142796d5, 0x2e9f291b, 0x1430bf24, 0x2ea7c41e,
-    0x1439e923, 0x2eb05d53, 0x144314d3, 0x2eb8f4bc,
-    0x144c4232, 0x2ec18a58, 0x14557140, 0x2eca1e27,
-    0x145ea1fd, 0x2ed2b027, 0x1467d469, 0x2edb405a,
-    0x14710883, 0x2ee3cebe, 0x147a3e4b, 0x2eec5b53,
-    0x148375c1, 0x2ef4e619, 0x148caee4, 0x2efd6f10,
-    0x1495e9b3, 0x2f05f637, 0x149f2630, 0x2f0e7b8e,
-    0x14a86458, 0x2f16ff14, 0x14b1a42c, 0x2f1f80ca,
-    0x14bae5ab, 0x2f2800af, 0x14c428d6, 0x2f307ec2,
-    0x14cd6dab, 0x2f38fb03, 0x14d6b42b, 0x2f417573,
-    0x14dffc54, 0x2f49ee0f, 0x14e94627, 0x2f5264da,
-    0x14f291a4, 0x2f5ad9d1, 0x14fbdec9, 0x2f634cf5,
-    0x15052d97, 0x2f6bbe45, 0x150e7e0d, 0x2f742dc1,
-    0x1517d02b, 0x2f7c9b69, 0x152123f0, 0x2f85073c,
-    0x152a795d, 0x2f8d713a, 0x1533d070, 0x2f95d963,
-    0x153d292a, 0x2f9e3fb6, 0x15468389, 0x2fa6a433,
-    0x154fdf8f, 0x2faf06da, 0x15593d3a, 0x2fb767aa,
-    0x15629c89, 0x2fbfc6a3, 0x156bfd7d, 0x2fc823c5,
-    0x15756016, 0x2fd07f0f, 0x157ec452, 0x2fd8d882,
-    0x15882a32, 0x2fe1301c, 0x159191b5, 0x2fe985de,
-    0x159afadb, 0x2ff1d9c7, 0x15a465a3, 0x2ffa2bd6,
-    0x15add20d, 0x30027c0c, 0x15b74019, 0x300aca69,
-    0x15c0afc6, 0x301316eb, 0x15ca2115, 0x301b6193,
-    0x15d39403, 0x3023aa5f, 0x15dd0892, 0x302bf151,
-    0x15e67ec1, 0x30343667, 0x15eff690, 0x303c79a2,
-    0x15f96ffd, 0x3044bb00, 0x1602eb0a, 0x304cfa83,
-    0x160c67b4, 0x30553828, 0x1615e5fd, 0x305d73f0,
-    0x161f65e4, 0x3065addb, 0x1628e767, 0x306de5e9,
-    0x16326a88, 0x30761c18, 0x163bef46, 0x307e5069,
-    0x1645759f, 0x308682dc, 0x164efd94, 0x308eb36f,
-    0x16588725, 0x3096e223, 0x16621251, 0x309f0ef8,
-    0x166b9f18, 0x30a739ed, 0x16752d79, 0x30af6302,
-    0x167ebd74, 0x30b78a36, 0x16884f09, 0x30bfaf89,
-    0x1691e237, 0x30c7d2fb, 0x169b76fe, 0x30cff48c,
-    0x16a50d5d, 0x30d8143b, 0x16aea555, 0x30e03208,
-    0x16b83ee4, 0x30e84df3, 0x16c1da0b, 0x30f067fb,
-    0x16cb76c9, 0x30f8801f, 0x16d5151d, 0x31009661,
-    0x16deb508, 0x3108aabf, 0x16e85689, 0x3110bd39,
-    0x16f1f99f, 0x3118cdcf, 0x16fb9e4b, 0x3120dc80,
-    0x1705448b, 0x3128e94c, 0x170eec60, 0x3130f433,
-    0x171895c9, 0x3138fd35, 0x172240c5, 0x31410450,
-    0x172bed55, 0x31490986, 0x17359b78, 0x31510cd5,
-    0x173f4b2e, 0x31590e3e, 0x1748fc75, 0x31610dbf,
-    0x1752af4f, 0x31690b59, 0x175c63ba, 0x3171070c,
-    0x176619b6, 0x317900d6, 0x176fd143, 0x3180f8b8,
-    0x17798a60, 0x3188eeb2, 0x1783450d, 0x3190e2c3,
-    0x178d014a, 0x3198d4ea, 0x1796bf16, 0x31a0c528,
-    0x17a07e70, 0x31a8b37c, 0x17aa3f5a, 0x31b09fe7,
-    0x17b401d1, 0x31b88a66, 0x17bdc5d6, 0x31c072fb,
-    0x17c78b68, 0x31c859a5, 0x17d15288, 0x31d03e64,
-    0x17db1b34, 0x31d82137, 0x17e4e56c, 0x31e0021e,
-    0x17eeb130, 0x31e7e118, 0x17f87e7f, 0x31efbe27,
-    0x18024d59, 0x31f79948, 0x180c1dbf, 0x31ff727c,
-    0x1815efae, 0x320749c3, 0x181fc328, 0x320f1f1c,
-    0x1829982b, 0x3216f287, 0x18336eb7, 0x321ec403,
-    0x183d46cc, 0x32269391, 0x18472069, 0x322e6130,
-    0x1850fb8e, 0x32362ce0, 0x185ad83c, 0x323df6a0,
-    0x1864b670, 0x3245be70, 0x186e962b, 0x324d8450,
-    0x1878776d, 0x32554840, 0x18825a35, 0x325d0a3e,
-    0x188c3e83, 0x3264ca4c, 0x18962456, 0x326c8868,
-    0x18a00bae, 0x32744493, 0x18a9f48a, 0x327bfecc,
-    0x18b3deeb, 0x3283b712, 0x18bdcad0, 0x328b6d66,
-    0x18c7b838, 0x329321c7, 0x18d1a724, 0x329ad435,
-    0x18db9792, 0x32a284b0, 0x18e58982, 0x32aa3336,
-    0x18ef7cf4, 0x32b1dfc9, 0x18f971e8, 0x32b98a67,
-    0x1903685d, 0x32c13311, 0x190d6053, 0x32c8d9c6,
-    0x191759c9, 0x32d07e85, 0x192154bf, 0x32d82150,
-    0x192b5135, 0x32dfc224, 0x19354f2a, 0x32e76102,
-    0x193f4e9e, 0x32eefdea, 0x19494f90, 0x32f698db,
-    0x19535201, 0x32fe31d5, 0x195d55ef, 0x3305c8d7,
-    0x19675b5a, 0x330d5de3, 0x19716243, 0x3314f0f6,
-    0x197b6aa8, 0x331c8211, 0x19857489, 0x33241134,
-    0x198f7fe6, 0x332b9e5e, 0x19998cbe, 0x3333298f,
-    0x19a39b11, 0x333ab2c6, 0x19adaadf, 0x33423a04,
-    0x19b7bc27, 0x3349bf48, 0x19c1cee9, 0x33514292,
-    0x19cbe325, 0x3358c3e2, 0x19d5f8d9, 0x33604336,
-    0x19e01006, 0x3367c090, 0x19ea28ac, 0x336f3bee,
-    0x19f442c9, 0x3376b551, 0x19fe5e5e, 0x337e2cb7,
-    0x1a087b69, 0x3385a222, 0x1a1299ec, 0x338d1590,
-    0x1a1cb9e5, 0x33948701, 0x1a26db54, 0x339bf675,
-    0x1a30fe38, 0x33a363ec, 0x1a3b2292, 0x33aacf65,
-    0x1a454860, 0x33b238e0, 0x1a4f6fa3, 0x33b9a05d,
-    0x1a599859, 0x33c105db, 0x1a63c284, 0x33c8695b,
-    0x1a6dee21, 0x33cfcadc, 0x1a781b31, 0x33d72a5d,
-    0x1a8249b4, 0x33de87de, 0x1a8c79a9, 0x33e5e360,
-    0x1a96ab0f, 0x33ed3ce1, 0x1aa0dde7, 0x33f49462,
-    0x1aab122f, 0x33fbe9e2, 0x1ab547e8, 0x34033d61,
-    0x1abf7f11, 0x340a8edf, 0x1ac9b7a9, 0x3411de5b,
-    0x1ad3f1b1, 0x34192bd5, 0x1ade2d28, 0x3420774d,
-    0x1ae86a0d, 0x3427c0c3, 0x1af2a860, 0x342f0836,
-    0x1afce821, 0x34364da6, 0x1b072950, 0x343d9112,
-    0x1b116beb, 0x3444d27b, 0x1b1baff2, 0x344c11e0,
-    0x1b25f566, 0x34534f41, 0x1b303c46, 0x345a8a9d,
-    0x1b3a8491, 0x3461c3f5, 0x1b44ce46, 0x3468fb47,
-    0x1b4f1967, 0x34703095, 0x1b5965f1, 0x347763dd,
-    0x1b63b3e5, 0x347e951f, 0x1b6e0342, 0x3485c45b,
-    0x1b785409, 0x348cf190, 0x1b82a638, 0x34941cbf,
-    0x1b8cf9cf, 0x349b45e7, 0x1b974ece, 0x34a26d08,
-    0x1ba1a534, 0x34a99221, 0x1babfd01, 0x34b0b533,
-    0x1bb65634, 0x34b7d63c, 0x1bc0b0ce, 0x34bef53d,
-    0x1bcb0cce, 0x34c61236, 0x1bd56a32, 0x34cd2d26,
-    0x1bdfc8fc, 0x34d4460c, 0x1bea292b, 0x34db5cea,
-    0x1bf48abd, 0x34e271bd, 0x1bfeedb3, 0x34e98487,
-    0x1c09520d, 0x34f09546, 0x1c13b7c9, 0x34f7a3fb,
-    0x1c1e1ee9, 0x34feb0a5, 0x1c28876a, 0x3505bb44,
-    0x1c32f14d, 0x350cc3d8, 0x1c3d5c91, 0x3513ca60,
-    0x1c47c936, 0x351acedd, 0x1c52373c, 0x3521d14d,
-    0x1c5ca6a2, 0x3528d1b1, 0x1c671768, 0x352fd008,
-    0x1c71898d, 0x3536cc52, 0x1c7bfd11, 0x353dc68f,
-    0x1c8671f3, 0x3544bebf, 0x1c90e834, 0x354bb4e1,
-    0x1c9b5fd2, 0x3552a8f4, 0x1ca5d8cd, 0x35599afa,
-    0x1cb05326, 0x35608af1, 0x1cbacedb, 0x356778d9,
-    0x1cc54bec, 0x356e64b2, 0x1ccfca59, 0x35754e7c,
-    0x1cda4a21, 0x357c3636, 0x1ce4cb44, 0x35831be0,
-    0x1cef4dc2, 0x3589ff7a, 0x1cf9d199, 0x3590e104,
-    0x1d0456ca, 0x3597c07d, 0x1d0edd55, 0x359e9de5,
-    0x1d196538, 0x35a5793c, 0x1d23ee74, 0x35ac5282,
-    0x1d2e7908, 0x35b329b5, 0x1d3904f4, 0x35b9fed7,
-    0x1d439236, 0x35c0d1e7, 0x1d4e20d0, 0x35c7a2e3,
-    0x1d58b0c0, 0x35ce71ce, 0x1d634206, 0x35d53ea5,
-    0x1d6dd4a2, 0x35dc0968, 0x1d786892, 0x35e2d219,
-    0x1d82fdd8, 0x35e998b5, 0x1d8d9472, 0x35f05d3d,
-    0x1d982c60, 0x35f71fb1, 0x1da2c5a2, 0x35fde011,
-    0x1dad6036, 0x36049e5b, 0x1db7fc1e, 0x360b5a90,
-    0x1dc29958, 0x361214b0, 0x1dcd37e4, 0x3618ccba,
-    0x1dd7d7c1, 0x361f82af, 0x1de278ef, 0x3626368d,
-    0x1ded1b6e, 0x362ce855, 0x1df7bf3e, 0x36339806,
-    0x1e02645d, 0x363a45a0, 0x1e0d0acc, 0x3640f123,
-    0x1e17b28a, 0x36479a8e, 0x1e225b96, 0x364e41e2,
-    0x1e2d05f1, 0x3654e71d, 0x1e37b199, 0x365b8a41,
-    0x1e425e8f, 0x36622b4c, 0x1e4d0cd2, 0x3668ca3e,
-    0x1e57bc62, 0x366f6717, 0x1e626d3e, 0x367601d7,
-    0x1e6d1f65, 0x367c9a7e, 0x1e77d2d8, 0x3683310b,
-    0x1e828796, 0x3689c57d, 0x1e8d3d9e, 0x369057d6,
-    0x1e97f4f1, 0x3696e814, 0x1ea2ad8d, 0x369d7637,
-    0x1ead6773, 0x36a4023f, 0x1eb822a1, 0x36aa8c2c,
-    0x1ec2df18, 0x36b113fd, 0x1ecd9cd7, 0x36b799b3,
-    0x1ed85bdd, 0x36be1d4c, 0x1ee31c2b, 0x36c49ec9,
-    0x1eedddc0, 0x36cb1e2a, 0x1ef8a09b, 0x36d19b6e,
-    0x1f0364bc, 0x36d81695, 0x1f0e2a22, 0x36de8f9e,
-    0x1f18f0ce, 0x36e5068a, 0x1f23b8be, 0x36eb7b58,
-    0x1f2e81f3, 0x36f1ee09, 0x1f394c6b, 0x36f85e9a,
-    0x1f441828, 0x36fecd0e, 0x1f4ee527, 0x37053962,
-    0x1f59b369, 0x370ba398, 0x1f6482ed, 0x37120bae,
-    0x1f6f53b3, 0x371871a5, 0x1f7a25ba, 0x371ed57c,
-    0x1f84f902, 0x37253733, 0x1f8fcd8b, 0x372b96ca,
-    0x1f9aa354, 0x3731f440, 0x1fa57a5d, 0x37384f95,
-    0x1fb052a5, 0x373ea8ca, 0x1fbb2c2c, 0x3744ffdd,
-    0x1fc606f1, 0x374b54ce, 0x1fd0e2f5, 0x3751a79e,
-    0x1fdbc036, 0x3757f84c, 0x1fe69eb4, 0x375e46d8,
-    0x1ff17e70, 0x37649341, 0x1ffc5f67, 0x376add88,
-    0x2007419b, 0x377125ac, 0x2012250a, 0x37776bac,
-    0x201d09b4, 0x377daf89, 0x2027ef99, 0x3783f143,
-    0x2032d6b8, 0x378a30d8, 0x203dbf11, 0x37906e49,
-    0x2048a8a4, 0x3796a996, 0x2053936f, 0x379ce2be,
-    0x205e7f74, 0x37a319c2, 0x20696cb0, 0x37a94ea0,
-    0x20745b24, 0x37af8159, 0x207f4acf, 0x37b5b1ec,
-    0x208a3bb2, 0x37bbe05a, 0x20952dcb, 0x37c20ca1,
-    0x20a0211a, 0x37c836c2, 0x20ab159e, 0x37ce5ebd,
-    0x20b60b58, 0x37d48490, 0x20c10247, 0x37daa83d,
-    0x20cbfa6a, 0x37e0c9c3, 0x20d6f3c1, 0x37e6e921,
-    0x20e1ee4b, 0x37ed0657, 0x20ecea09, 0x37f32165,
-    0x20f7e6f9, 0x37f93a4b, 0x2102e51c, 0x37ff5109,
-    0x210de470, 0x3805659e, 0x2118e4f6, 0x380b780a,
-    0x2123e6ad, 0x3811884d, 0x212ee995, 0x38179666,
-    0x2139edac, 0x381da256, 0x2144f2f3, 0x3823ac1d,
-    0x214ff96a, 0x3829b3b9, 0x215b0110, 0x382fb92a,
-    0x216609e3, 0x3835bc71, 0x217113e5, 0x383bbd8e,
-    0x217c1f15, 0x3841bc7f, 0x21872b72, 0x3847b946,
-    0x219238fb, 0x384db3e0, 0x219d47b1, 0x3853ac4f,
-    0x21a85793, 0x3859a292, 0x21b368a0, 0x385f96a9,
-    0x21be7ad8, 0x38658894, 0x21c98e3b, 0x386b7852,
-    0x21d4a2c8, 0x387165e3, 0x21dfb87f, 0x38775147,
-    0x21eacf5f, 0x387d3a7e, 0x21f5e768, 0x38832187,
-    0x22010099, 0x38890663, 0x220c1af3, 0x388ee910,
-    0x22173674, 0x3894c98f, 0x2222531c, 0x389aa7e0,
-    0x222d70eb, 0x38a08402, 0x22388fe1, 0x38a65df6,
-    0x2243affc, 0x38ac35ba, 0x224ed13d, 0x38b20b4f,
-    0x2259f3a3, 0x38b7deb4, 0x2265172e, 0x38bdafea,
-    0x22703bdc, 0x38c37eef, 0x227b61af, 0x38c94bc4,
-    0x228688a4, 0x38cf1669, 0x2291b0bd, 0x38d4dedd,
-    0x229cd9f8, 0x38daa520, 0x22a80456, 0x38e06932,
-    0x22b32fd4, 0x38e62b13, 0x22be5c74, 0x38ebeac2,
-    0x22c98a35, 0x38f1a840, 0x22d4b916, 0x38f7638b,
-    0x22dfe917, 0x38fd1ca4, 0x22eb1a37, 0x3902d38b,
-    0x22f64c77, 0x3908883f, 0x23017fd5, 0x390e3ac0,
-    0x230cb451, 0x3913eb0e, 0x2317e9eb, 0x39199929,
-    0x232320a2, 0x391f4510, 0x232e5876, 0x3924eec3,
-    0x23399167, 0x392a9642, 0x2344cb73, 0x39303b8e,
-    0x2350069b, 0x3935dea4, 0x235b42df, 0x393b7f86,
-    0x2366803c, 0x39411e33, 0x2371beb5, 0x3946baac,
-    0x237cfe47, 0x394c54ee, 0x23883ef2, 0x3951ecfc,
-    0x239380b6, 0x395782d3, 0x239ec393, 0x395d1675,
-    0x23aa0788, 0x3962a7e0, 0x23b54c95, 0x39683715,
-    0x23c092b9, 0x396dc414, 0x23cbd9f4, 0x39734edc,
-    0x23d72245, 0x3978d76c, 0x23e26bac, 0x397e5dc6,
-    0x23edb628, 0x3983e1e8, 0x23f901ba, 0x398963d2,
-    0x24044e60, 0x398ee385, 0x240f9c1a, 0x399460ff,
-    0x241aeae8, 0x3999dc42, 0x24263ac9, 0x399f554b,
-    0x24318bbe, 0x39a4cc1c, 0x243cddc4, 0x39aa40b4,
-    0x244830dd, 0x39afb313, 0x24538507, 0x39b52339,
-    0x245eda43, 0x39ba9125, 0x246a308f, 0x39bffcd7,
-    0x247587eb, 0x39c5664f, 0x2480e057, 0x39cacd8d,
-    0x248c39d3, 0x39d03291, 0x2497945d, 0x39d5955a,
-    0x24a2eff6, 0x39daf5e8, 0x24ae4c9d, 0x39e0543c,
-    0x24b9aa52, 0x39e5b054, 0x24c50914, 0x39eb0a31,
-    0x24d068e2, 0x39f061d2, 0x24dbc9bd, 0x39f5b737,
-    0x24e72ba4, 0x39fb0a60, 0x24f28e96, 0x3a005b4d,
-    0x24fdf294, 0x3a05a9fd, 0x2509579b, 0x3a0af671,
-    0x2514bdad, 0x3a1040a8, 0x252024c9, 0x3a1588a2,
-    0x252b8cee, 0x3a1ace5f, 0x2536f61b, 0x3a2011de,
-    0x25426051, 0x3a25531f, 0x254dcb8f, 0x3a2a9223,
-    0x255937d5, 0x3a2fcee8, 0x2564a521, 0x3a350970,
-    0x25701374, 0x3a3a41b9, 0x257b82cd, 0x3a3f77c3,
-    0x2586f32c, 0x3a44ab8e, 0x25926490, 0x3a49dd1a,
-    0x259dd6f9, 0x3a4f0c67, 0x25a94a67, 0x3a543974,
-    0x25b4bed8, 0x3a596442, 0x25c0344d, 0x3a5e8cd0,
-    0x25cbaac5, 0x3a63b31d, 0x25d72240, 0x3a68d72b,
-    0x25e29abc, 0x3a6df8f8, 0x25ee143b, 0x3a731884,
-    0x25f98ebb, 0x3a7835cf, 0x26050a3b, 0x3a7d50da,
-    0x261086bc, 0x3a8269a3, 0x261c043d, 0x3a87802a,
-    0x262782be, 0x3a8c9470, 0x2633023e, 0x3a91a674,
-    0x263e82bc, 0x3a96b636, 0x264a0438, 0x3a9bc3b6,
-    0x265586b3, 0x3aa0cef3, 0x26610a2a, 0x3aa5d7ee,
-    0x266c8e9f, 0x3aaadea6, 0x26781410, 0x3aafe31b,
-    0x26839a7c, 0x3ab4e54c, 0x268f21e5, 0x3ab9e53a,
-    0x269aaa48, 0x3abee2e5, 0x26a633a6, 0x3ac3de4c,
-    0x26b1bdff, 0x3ac8d76f, 0x26bd4951, 0x3acdce4d,
-    0x26c8d59c, 0x3ad2c2e8, 0x26d462e1, 0x3ad7b53d,
-    0x26dff11d, 0x3adca54e, 0x26eb8052, 0x3ae1931a,
-    0x26f7107e, 0x3ae67ea1, 0x2702a1a1, 0x3aeb67e3,
-    0x270e33bb, 0x3af04edf, 0x2719c6cb, 0x3af53395,
-    0x27255ad1, 0x3afa1605, 0x2730efcc, 0x3afef630,
-    0x273c85bc, 0x3b03d414, 0x27481ca1, 0x3b08afb2,
-    0x2753b479, 0x3b0d8909, 0x275f4d45, 0x3b126019,
-    0x276ae704, 0x3b1734e2, 0x277681b6, 0x3b1c0764,
-    0x27821d59, 0x3b20d79e, 0x278db9ef, 0x3b25a591,
-    0x27995776, 0x3b2a713d, 0x27a4f5ed, 0x3b2f3aa0,
-    0x27b09555, 0x3b3401bb, 0x27bc35ad, 0x3b38c68e,
-    0x27c7d6f4, 0x3b3d8918, 0x27d3792b, 0x3b42495a,
-    0x27df1c50, 0x3b470753, 0x27eac063, 0x3b4bc303,
-    0x27f66564, 0x3b507c69, 0x28020b52, 0x3b553386,
-    0x280db22d, 0x3b59e85a, 0x281959f4, 0x3b5e9ae4,
-    0x282502a7, 0x3b634b23, 0x2830ac45, 0x3b67f919,
-    0x283c56cf, 0x3b6ca4c4, 0x28480243, 0x3b714e25,
-    0x2853aea1, 0x3b75f53c, 0x285f5be9, 0x3b7a9a07,
-    0x286b0a1a, 0x3b7f3c87, 0x2876b934, 0x3b83dcbc,
-    0x28826936, 0x3b887aa6, 0x288e1a20, 0x3b8d1644,
-    0x2899cbf1, 0x3b91af97, 0x28a57ea9, 0x3b96469d,
-    0x28b13248, 0x3b9adb57, 0x28bce6cd, 0x3b9f6dc5,
-    0x28c89c37, 0x3ba3fde7, 0x28d45286, 0x3ba88bbc,
-    0x28e009ba, 0x3bad1744, 0x28ebc1d3, 0x3bb1a080,
-    0x28f77acf, 0x3bb6276e, 0x290334af, 0x3bbaac0e,
-    0x290eef71, 0x3bbf2e62, 0x291aab16, 0x3bc3ae67,
-    0x2926679c, 0x3bc82c1f, 0x29322505, 0x3bcca789,
-    0x293de34e, 0x3bd120a4, 0x2949a278, 0x3bd59771,
-    0x29556282, 0x3bda0bf0, 0x2961236c, 0x3bde7e20,
-    0x296ce535, 0x3be2ee01, 0x2978a7dd, 0x3be75b93,
-    0x29846b63, 0x3bebc6d5, 0x29902fc7, 0x3bf02fc9,
-    0x299bf509, 0x3bf4966c, 0x29a7bb28, 0x3bf8fac0,
-    0x29b38223, 0x3bfd5cc4, 0x29bf49fa, 0x3c01bc78,
-    0x29cb12ad, 0x3c0619dc, 0x29d6dc3b, 0x3c0a74f0,
-    0x29e2a6a3, 0x3c0ecdb2, 0x29ee71e6, 0x3c132424,
-    0x29fa3e03, 0x3c177845, 0x2a060af9, 0x3c1bca16,
-    0x2a11d8c8, 0x3c201994, 0x2a1da770, 0x3c2466c2,
-    0x2a2976ef, 0x3c28b19e, 0x2a354746, 0x3c2cfa28,
-    0x2a411874, 0x3c314060, 0x2a4cea79, 0x3c358446,
-    0x2a58bd54, 0x3c39c5da, 0x2a649105, 0x3c3e051b,
-    0x2a70658a, 0x3c42420a, 0x2a7c3ae5, 0x3c467ca6,
-    0x2a881114, 0x3c4ab4ef, 0x2a93e817, 0x3c4eeae5,
-    0x2a9fbfed, 0x3c531e88, 0x2aab9896, 0x3c574fd8,
-    0x2ab77212, 0x3c5b7ed4, 0x2ac34c60, 0x3c5fab7c,
-    0x2acf277f, 0x3c63d5d1, 0x2adb0370, 0x3c67fdd1,
-    0x2ae6e031, 0x3c6c237e, 0x2af2bdc3, 0x3c7046d6,
-    0x2afe9c24, 0x3c7467d9, 0x2b0a7b54, 0x3c788688,
-    0x2b165b54, 0x3c7ca2e2, 0x2b223c22, 0x3c80bce7,
-    0x2b2e1dbe, 0x3c84d496, 0x2b3a0027, 0x3c88e9f1,
-    0x2b45e35d, 0x3c8cfcf6, 0x2b51c760, 0x3c910da5,
-    0x2b5dac2f, 0x3c951bff, 0x2b6991ca, 0x3c992803,
-    0x2b75782f, 0x3c9d31b0, 0x2b815f60, 0x3ca13908,
-    0x2b8d475b, 0x3ca53e09, 0x2b99301f, 0x3ca940b3,
-    0x2ba519ad, 0x3cad4107, 0x2bb10404, 0x3cb13f04,
-    0x2bbcef23, 0x3cb53aaa, 0x2bc8db0b, 0x3cb933f9,
-    0x2bd4c7ba, 0x3cbd2af0, 0x2be0b52f, 0x3cc11f90,
-    0x2beca36c, 0x3cc511d9, 0x2bf8926f, 0x3cc901c9,
-    0x2c048237, 0x3cccef62, 0x2c1072c4, 0x3cd0daa2,
-    0x2c1c6417, 0x3cd4c38b, 0x2c28562d, 0x3cd8aa1b,
-    0x2c344908, 0x3cdc8e52, 0x2c403ca5, 0x3ce07031,
-    0x2c4c3106, 0x3ce44fb7, 0x2c582629, 0x3ce82ce4,
-    0x2c641c0e, 0x3cec07b8, 0x2c7012b5, 0x3cefe032,
-    0x2c7c0a1d, 0x3cf3b653, 0x2c880245, 0x3cf78a1b,
-    0x2c93fb2e, 0x3cfb5b89, 0x2c9ff4d6, 0x3cff2a9d,
-    0x2cabef3d, 0x3d02f757, 0x2cb7ea63, 0x3d06c1b6,
-    0x2cc3e648, 0x3d0a89bc, 0x2ccfe2ea, 0x3d0e4f67,
-    0x2cdbe04a, 0x3d1212b7, 0x2ce7de66, 0x3d15d3ad,
-    0x2cf3dd3f, 0x3d199248, 0x2cffdcd4, 0x3d1d4e88,
-    0x2d0bdd25, 0x3d21086c, 0x2d17de31, 0x3d24bff6,
-    0x2d23dff7, 0x3d287523, 0x2d2fe277, 0x3d2c27f6,
-    0x2d3be5b1, 0x3d2fd86c, 0x2d47e9a5, 0x3d338687,
-    0x2d53ee51, 0x3d373245, 0x2d5ff3b5, 0x3d3adba7,
-    0x2d6bf9d1, 0x3d3e82ae, 0x2d7800a5, 0x3d422757,
-    0x2d84082f, 0x3d45c9a4, 0x2d901070, 0x3d496994,
-    0x2d9c1967, 0x3d4d0728, 0x2da82313, 0x3d50a25e,
-    0x2db42d74, 0x3d543b37, 0x2dc0388a, 0x3d57d1b3,
-    0x2dcc4454, 0x3d5b65d2, 0x2dd850d2, 0x3d5ef793,
-    0x2de45e03, 0x3d6286f6, 0x2df06be6, 0x3d6613fb,
-    0x2dfc7a7c, 0x3d699ea3, 0x2e0889c4, 0x3d6d26ec,
-    0x2e1499bd, 0x3d70acd7, 0x2e20aa67, 0x3d743064,
-    0x2e2cbbc1, 0x3d77b192, 0x2e38cdcb, 0x3d7b3061,
-    0x2e44e084, 0x3d7eacd2, 0x2e50f3ed, 0x3d8226e4,
-    0x2e5d0804, 0x3d859e96, 0x2e691cc9, 0x3d8913ea,
-    0x2e75323c, 0x3d8c86de, 0x2e81485c, 0x3d8ff772,
-    0x2e8d5f29, 0x3d9365a8, 0x2e9976a1, 0x3d96d17d,
-    0x2ea58ec6, 0x3d9a3af2, 0x2eb1a796, 0x3d9da208,
-    0x2ebdc110, 0x3da106bd, 0x2ec9db35, 0x3da46912,
-    0x2ed5f604, 0x3da7c907, 0x2ee2117c, 0x3dab269b,
-    0x2eee2d9d, 0x3dae81cf, 0x2efa4a67, 0x3db1daa2,
-    0x2f0667d9, 0x3db53113, 0x2f1285f2, 0x3db88524,
-    0x2f1ea4b2, 0x3dbbd6d4, 0x2f2ac419, 0x3dbf2622,
-    0x2f36e426, 0x3dc2730f, 0x2f4304d8, 0x3dc5bd9b,
-    0x2f4f2630, 0x3dc905c5, 0x2f5b482d, 0x3dcc4b8d,
-    0x2f676ace, 0x3dcf8ef3, 0x2f738e12, 0x3dd2cff7,
-    0x2f7fb1fa, 0x3dd60e99, 0x2f8bd685, 0x3dd94ad8,
-    0x2f97fbb2, 0x3ddc84b5, 0x2fa42181, 0x3ddfbc30,
-    0x2fb047f2, 0x3de2f148, 0x2fbc6f03, 0x3de623fd,
-    0x2fc896b5, 0x3de9544f, 0x2fd4bf08, 0x3dec823e,
-    0x2fe0e7f9, 0x3defadca, 0x2fed118a, 0x3df2d6f3,
-    0x2ff93bba, 0x3df5fdb8, 0x30056687, 0x3df9221a,
-    0x301191f3, 0x3dfc4418, 0x301dbdfb, 0x3dff63b2,
-    0x3029eaa1, 0x3e0280e9, 0x303617e2, 0x3e059bbb,
-    0x304245c0, 0x3e08b42a, 0x304e7438, 0x3e0bca34,
-    0x305aa34c, 0x3e0eddd9, 0x3066d2fa, 0x3e11ef1b,
-    0x30730342, 0x3e14fdf7, 0x307f3424, 0x3e180a6f,
-    0x308b659f, 0x3e1b1482, 0x309797b2, 0x3e1e1c30,
-    0x30a3ca5d, 0x3e212179, 0x30affda0, 0x3e24245d,
-    0x30bc317a, 0x3e2724db, 0x30c865ea, 0x3e2a22f4,
-    0x30d49af1, 0x3e2d1ea8, 0x30e0d08d, 0x3e3017f6,
-    0x30ed06bf, 0x3e330ede, 0x30f93d86, 0x3e360360,
-    0x310574e0, 0x3e38f57c, 0x3111accf, 0x3e3be532,
-    0x311de551, 0x3e3ed282, 0x312a1e66, 0x3e41bd6c,
-    0x3136580d, 0x3e44a5ef, 0x31429247, 0x3e478c0b,
-    0x314ecd11, 0x3e4a6fc1, 0x315b086d, 0x3e4d5110,
-    0x31674459, 0x3e502ff9, 0x317380d6, 0x3e530c7a,
-    0x317fbde2, 0x3e55e694, 0x318bfb7d, 0x3e58be47,
-    0x319839a6, 0x3e5b9392, 0x31a4785e, 0x3e5e6676,
-    0x31b0b7a4, 0x3e6136f3, 0x31bcf777, 0x3e640507,
-    0x31c937d6, 0x3e66d0b4, 0x31d578c2, 0x3e6999fa,
-    0x31e1ba3a, 0x3e6c60d7, 0x31edfc3d, 0x3e6f254c,
-    0x31fa3ecb, 0x3e71e759, 0x320681e3, 0x3e74a6fd,
-    0x3212c585, 0x3e77643a, 0x321f09b1, 0x3e7a1f0d,
-    0x322b4e66, 0x3e7cd778, 0x323793a3, 0x3e7f8d7b,
-    0x3243d968, 0x3e824114, 0x32501fb5, 0x3e84f245,
-    0x325c6688, 0x3e87a10c, 0x3268ade3, 0x3e8a4d6a,
-    0x3274f5c3, 0x3e8cf75f, 0x32813e2a, 0x3e8f9eeb,
-    0x328d8715, 0x3e92440d, 0x3299d085, 0x3e94e6c6,
-    0x32a61a7a, 0x3e978715, 0x32b264f2, 0x3e9a24fb,
-    0x32beafed, 0x3e9cc076, 0x32cafb6b, 0x3e9f5988,
-    0x32d7476c, 0x3ea1f02f, 0x32e393ef, 0x3ea4846c,
-    0x32efe0f2, 0x3ea7163f, 0x32fc2e77, 0x3ea9a5a8,
-    0x33087c7d, 0x3eac32a6, 0x3314cb02, 0x3eaebd3a,
-    0x33211a07, 0x3eb14563, 0x332d698a, 0x3eb3cb21,
-    0x3339b98d, 0x3eb64e75, 0x33460a0d, 0x3eb8cf5d,
-    0x33525b0b, 0x3ebb4ddb, 0x335eac86, 0x3ebdc9ed,
-    0x336afe7e, 0x3ec04394, 0x337750f2, 0x3ec2bad0,
-    0x3383a3e2, 0x3ec52fa0, 0x338ff74d, 0x3ec7a205,
-    0x339c4b32, 0x3eca11fe, 0x33a89f92, 0x3ecc7f8b,
-    0x33b4f46c, 0x3eceeaad, 0x33c149bf, 0x3ed15363,
-    0x33cd9f8b, 0x3ed3b9ad, 0x33d9f5cf, 0x3ed61d8a,
-    0x33e64c8c, 0x3ed87efc, 0x33f2a3bf, 0x3edade01,
-    0x33fefb6a, 0x3edd3a9a, 0x340b538b, 0x3edf94c7,
-    0x3417ac22, 0x3ee1ec87, 0x3424052f, 0x3ee441da,
-    0x34305eb0, 0x3ee694c1, 0x343cb8a7, 0x3ee8e53a,
-    0x34491311, 0x3eeb3347, 0x34556def, 0x3eed7ee7,
-    0x3461c940, 0x3eefc81a, 0x346e2504, 0x3ef20ee0,
-    0x347a8139, 0x3ef45338, 0x3486dde1, 0x3ef69523,
-    0x34933afa, 0x3ef8d4a1, 0x349f9884, 0x3efb11b1,
-    0x34abf67e, 0x3efd4c54, 0x34b854e7, 0x3eff8489,
-    0x34c4b3c0, 0x3f01ba50, 0x34d11308, 0x3f03eda9,
-    0x34dd72be, 0x3f061e95, 0x34e9d2e3, 0x3f084d12,
-    0x34f63374, 0x3f0a7921, 0x35029473, 0x3f0ca2c2,
-    0x350ef5de, 0x3f0ec9f5, 0x351b57b5, 0x3f10eeb9,
-    0x3527b9f7, 0x3f13110f, 0x35341ca5, 0x3f1530f7,
-    0x35407fbd, 0x3f174e70, 0x354ce33f, 0x3f19697a,
-    0x3559472b, 0x3f1b8215, 0x3565ab80, 0x3f1d9842,
-    0x3572103d, 0x3f1fabff, 0x357e7563, 0x3f21bd4e,
-    0x358adaf0, 0x3f23cc2e, 0x359740e5, 0x3f25d89e,
-    0x35a3a740, 0x3f27e29f, 0x35b00e02, 0x3f29ea31,
-    0x35bc7529, 0x3f2bef53, 0x35c8dcb6, 0x3f2df206,
-    0x35d544a7, 0x3f2ff24a, 0x35e1acfd, 0x3f31f01d,
-    0x35ee15b7, 0x3f33eb81, 0x35fa7ed4, 0x3f35e476,
-    0x3606e854, 0x3f37dafa, 0x36135237, 0x3f39cf0e,
-    0x361fbc7b, 0x3f3bc0b3, 0x362c2721, 0x3f3dafe7,
-    0x36389228, 0x3f3f9cab, 0x3644fd8f, 0x3f4186ff,
-    0x36516956, 0x3f436ee3, 0x365dd57d, 0x3f455456,
-    0x366a4203, 0x3f473759, 0x3676aee8, 0x3f4917eb,
-    0x36831c2b, 0x3f4af60d, 0x368f89cb, 0x3f4cd1be,
-    0x369bf7c9, 0x3f4eaafe, 0x36a86623, 0x3f5081cd,
-    0x36b4d4d9, 0x3f52562c, 0x36c143ec, 0x3f54281a,
-    0x36cdb359, 0x3f55f796, 0x36da2321, 0x3f57c4a2,
-    0x36e69344, 0x3f598f3c, 0x36f303c0, 0x3f5b5765,
-    0x36ff7496, 0x3f5d1d1d, 0x370be5c4, 0x3f5ee063,
-    0x3718574b, 0x3f60a138, 0x3724c92a, 0x3f625f9b,
-    0x37313b60, 0x3f641b8d, 0x373daded, 0x3f65d50d,
-    0x374a20d0, 0x3f678c1c, 0x3756940a, 0x3f6940b8,
-    0x37630799, 0x3f6af2e3, 0x376f7b7d, 0x3f6ca29c,
-    0x377befb5, 0x3f6e4fe3, 0x37886442, 0x3f6ffab8,
-    0x3794d922, 0x3f71a31b, 0x37a14e55, 0x3f73490b,
-    0x37adc3db, 0x3f74ec8a, 0x37ba39b3, 0x3f768d96,
-    0x37c6afdc, 0x3f782c30, 0x37d32657, 0x3f79c857,
-    0x37df9d22, 0x3f7b620c, 0x37ec143e, 0x3f7cf94e,
-    0x37f88ba9, 0x3f7e8e1e, 0x38050364, 0x3f80207b,
-    0x38117b6d, 0x3f81b065, 0x381df3c5, 0x3f833ddd,
-    0x382a6c6a, 0x3f84c8e2, 0x3836e55d, 0x3f865174,
-    0x38435e9d, 0x3f87d792, 0x384fd829, 0x3f895b3e,
-    0x385c5201, 0x3f8adc77, 0x3868cc24, 0x3f8c5b3d,
-    0x38754692, 0x3f8dd78f, 0x3881c14b, 0x3f8f516e,
-    0x388e3c4d, 0x3f90c8da, 0x389ab799, 0x3f923dd2,
-    0x38a7332e, 0x3f93b058, 0x38b3af0c, 0x3f952069,
-    0x38c02b31, 0x3f968e07, 0x38cca79e, 0x3f97f932,
-    0x38d92452, 0x3f9961e8, 0x38e5a14d, 0x3f9ac82c,
-    0x38f21e8e, 0x3f9c2bfb, 0x38fe9c15, 0x3f9d8d56,
-    0x390b19e0, 0x3f9eec3e, 0x391797f0, 0x3fa048b2,
-    0x39241645, 0x3fa1a2b2, 0x393094dd, 0x3fa2fa3d,
-    0x393d13b8, 0x3fa44f55, 0x394992d7, 0x3fa5a1f9,
-    0x39561237, 0x3fa6f228, 0x396291d9, 0x3fa83fe3,
-    0x396f11bc, 0x3fa98b2a, 0x397b91e1, 0x3faad3fd,
-    0x39881245, 0x3fac1a5b, 0x399492ea, 0x3fad5e45,
-    0x39a113cd, 0x3fae9fbb, 0x39ad94f0, 0x3fafdebb,
-    0x39ba1651, 0x3fb11b48, 0x39c697f0, 0x3fb2555f,
-    0x39d319cc, 0x3fb38d02, 0x39df9be6, 0x3fb4c231,
-    0x39ec1e3b, 0x3fb5f4ea, 0x39f8a0cd, 0x3fb7252f,
-    0x3a05239a, 0x3fb852ff, 0x3a11a6a3, 0x3fb97e5a,
-    0x3a1e29e5, 0x3fbaa740, 0x3a2aad62, 0x3fbbcdb1,
-    0x3a373119, 0x3fbcf1ad, 0x3a43b508, 0x3fbe1334,
-    0x3a503930, 0x3fbf3246, 0x3a5cbd91, 0x3fc04ee3,
-    0x3a694229, 0x3fc1690a, 0x3a75c6f8, 0x3fc280bc,
-    0x3a824bfd, 0x3fc395f9, 0x3a8ed139, 0x3fc4a8c1,
-    0x3a9b56ab, 0x3fc5b913, 0x3aa7dc52, 0x3fc6c6f0,
-    0x3ab4622d, 0x3fc7d258, 0x3ac0e83d, 0x3fc8db4a,
-    0x3acd6e81, 0x3fc9e1c6, 0x3ad9f4f8, 0x3fcae5cd,
-    0x3ae67ba2, 0x3fcbe75e, 0x3af3027e, 0x3fcce67a,
-    0x3aff898c, 0x3fcde320, 0x3b0c10cb, 0x3fcedd50,
-    0x3b18983b, 0x3fcfd50b, 0x3b251fdc, 0x3fd0ca4f,
-    0x3b31a7ac, 0x3fd1bd1e, 0x3b3e2fac, 0x3fd2ad77,
-    0x3b4ab7db, 0x3fd39b5a, 0x3b574039, 0x3fd486c7,
-    0x3b63c8c4, 0x3fd56fbe, 0x3b70517d, 0x3fd6563f,
-    0x3b7cda63, 0x3fd73a4a, 0x3b896375, 0x3fd81bdf,
-    0x3b95ecb4, 0x3fd8fafe, 0x3ba2761e, 0x3fd9d7a7,
-    0x3baeffb3, 0x3fdab1d9, 0x3bbb8973, 0x3fdb8996,
-    0x3bc8135c, 0x3fdc5edc, 0x3bd49d70, 0x3fdd31ac,
-    0x3be127ac, 0x3fde0205, 0x3bedb212, 0x3fdecfe8,
-    0x3bfa3c9f, 0x3fdf9b55, 0x3c06c754, 0x3fe0644b,
-    0x3c135231, 0x3fe12acb, 0x3c1fdd34, 0x3fe1eed5,
-    0x3c2c685d, 0x3fe2b067, 0x3c38f3ac, 0x3fe36f84,
-    0x3c457f21, 0x3fe42c2a, 0x3c520aba, 0x3fe4e659,
-    0x3c5e9678, 0x3fe59e12, 0x3c6b2259, 0x3fe65354,
-    0x3c77ae5e, 0x3fe7061f, 0x3c843a85, 0x3fe7b674,
-    0x3c90c6cf, 0x3fe86452, 0x3c9d533b, 0x3fe90fb9,
-    0x3ca9dfc8, 0x3fe9b8a9, 0x3cb66c77, 0x3fea5f23,
-    0x3cc2f945, 0x3feb0326, 0x3ccf8634, 0x3feba4b2,
-    0x3cdc1342, 0x3fec43c7, 0x3ce8a06f, 0x3fece065,
-    0x3cf52dbb, 0x3fed7a8c, 0x3d01bb24, 0x3fee123d,
-    0x3d0e48ab, 0x3feea776, 0x3d1ad650, 0x3fef3a39,
-    0x3d276410, 0x3fefca84, 0x3d33f1ed, 0x3ff05858,
-    0x3d407fe6, 0x3ff0e3b6, 0x3d4d0df9, 0x3ff16c9c,
-    0x3d599c28, 0x3ff1f30b, 0x3d662a70, 0x3ff27703,
-    0x3d72b8d2, 0x3ff2f884, 0x3d7f474d, 0x3ff3778e,
-    0x3d8bd5e1, 0x3ff3f420, 0x3d98648d, 0x3ff46e3c,
-    0x3da4f351, 0x3ff4e5e0, 0x3db1822c, 0x3ff55b0d,
-    0x3dbe111e, 0x3ff5cdc3, 0x3dcaa027, 0x3ff63e01,
-    0x3dd72f45, 0x3ff6abc8, 0x3de3be78, 0x3ff71718,
-    0x3df04dc0, 0x3ff77ff1, 0x3dfcdd1d, 0x3ff7e652,
-    0x3e096c8d, 0x3ff84a3c, 0x3e15fc11, 0x3ff8abae,
-    0x3e228ba7, 0x3ff90aaa, 0x3e2f1b50, 0x3ff9672d,
-    0x3e3bab0b, 0x3ff9c13a, 0x3e483ad8, 0x3ffa18cf,
-    0x3e54cab5, 0x3ffa6dec, 0x3e615aa3, 0x3ffac092,
-    0x3e6deaa1, 0x3ffb10c1, 0x3e7a7aae, 0x3ffb5e78,
-    0x3e870aca, 0x3ffba9b8, 0x3e939af5, 0x3ffbf280,
-    0x3ea02b2e, 0x3ffc38d1, 0x3eacbb74, 0x3ffc7caa,
-    0x3eb94bc8, 0x3ffcbe0c, 0x3ec5dc28, 0x3ffcfcf6,
-    0x3ed26c94, 0x3ffd3969, 0x3edefd0c, 0x3ffd7364,
-    0x3eeb8d8f, 0x3ffdaae7, 0x3ef81e1d, 0x3ffddff3,
-    0x3f04aeb5, 0x3ffe1288, 0x3f113f56, 0x3ffe42a4,
-    0x3f1dd001, 0x3ffe704a, 0x3f2a60b4, 0x3ffe9b77,
-    0x3f36f170, 0x3ffec42d, 0x3f438234, 0x3ffeea6c,
-    0x3f5012fe, 0x3fff0e32, 0x3f5ca3d0, 0x3fff2f82,
-    0x3f6934a8, 0x3fff4e59, 0x3f75c585, 0x3fff6ab9,
-    0x3f825668, 0x3fff84a1, 0x3f8ee750, 0x3fff9c12,
-    0x3f9b783c, 0x3fffb10b, 0x3fa8092c, 0x3fffc38c,
-    0x3fb49a1f, 0x3fffd396, 0x3fc12b16, 0x3fffe128,
-    0x3fcdbc0f, 0x3fffec43, 0x3fda4d09, 0x3ffff4e6,
-    0x3fe6de05, 0x3ffffb11, 0x3ff36f02, 0x3ffffec4,
-};
-
-
-/**    
-* \par   
-* Generation of realCoefBQ31 array:    
-* \par    
-*  n = 4096        
-* 
for (i = 0; i < n; i++)    
-* {    
-*    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-* } 
    
-* \par    
-* Convert to fixed point Q31 format    
-*     round(pBTable[i] * pow(2, 31))    
-*    
-*/
-
-static const q31_t realCoefBQ31[8192] = {
-    0x40000000, 0x40000000, 0x400c90fe, 0x3ffffec4,
-    0x401921fb, 0x3ffffb11, 0x4025b2f7, 0x3ffff4e6,
-    0x403243f1, 0x3fffec43, 0x403ed4ea, 0x3fffe128,
-    0x404b65e1, 0x3fffd396, 0x4057f6d4, 0x3fffc38c,
-    0x406487c4, 0x3fffb10b, 0x407118b0, 0x3fff9c12,
-    0x407da998, 0x3fff84a1, 0x408a3a7b, 0x3fff6ab9,
-    0x4096cb58, 0x3fff4e59, 0x40a35c30, 0x3fff2f82,
-    0x40afed02, 0x3fff0e32, 0x40bc7dcc, 0x3ffeea6c,
-    0x40c90e90, 0x3ffec42d, 0x40d59f4c, 0x3ffe9b77,
-    0x40e22fff, 0x3ffe704a, 0x40eec0aa, 0x3ffe42a4,
-    0x40fb514b, 0x3ffe1288, 0x4107e1e3, 0x3ffddff3,
-    0x41147271, 0x3ffdaae7, 0x412102f4, 0x3ffd7364,
-    0x412d936c, 0x3ffd3969, 0x413a23d8, 0x3ffcfcf6,
-    0x4146b438, 0x3ffcbe0c, 0x4153448c, 0x3ffc7caa,
-    0x415fd4d2, 0x3ffc38d1, 0x416c650b, 0x3ffbf280,
-    0x4178f536, 0x3ffba9b8, 0x41858552, 0x3ffb5e78,
-    0x4192155f, 0x3ffb10c1, 0x419ea55d, 0x3ffac092,
-    0x41ab354b, 0x3ffa6dec, 0x41b7c528, 0x3ffa18cf,
-    0x41c454f5, 0x3ff9c13a, 0x41d0e4b0, 0x3ff9672d,
-    0x41dd7459, 0x3ff90aaa, 0x41ea03ef, 0x3ff8abae,
-    0x41f69373, 0x3ff84a3c, 0x420322e3, 0x3ff7e652,
-    0x420fb240, 0x3ff77ff1, 0x421c4188, 0x3ff71718,
-    0x4228d0bb, 0x3ff6abc8, 0x42355fd9, 0x3ff63e01,
-    0x4241eee2, 0x3ff5cdc3, 0x424e7dd4, 0x3ff55b0d,
-    0x425b0caf, 0x3ff4e5e0, 0x42679b73, 0x3ff46e3c,
-    0x42742a1f, 0x3ff3f420, 0x4280b8b3, 0x3ff3778e,
-    0x428d472e, 0x3ff2f884, 0x4299d590, 0x3ff27703,
-    0x42a663d8, 0x3ff1f30b, 0x42b2f207, 0x3ff16c9c,
-    0x42bf801a, 0x3ff0e3b6, 0x42cc0e13, 0x3ff05858,
-    0x42d89bf0, 0x3fefca84, 0x42e529b0, 0x3fef3a39,
-    0x42f1b755, 0x3feea776, 0x42fe44dc, 0x3fee123d,
-    0x430ad245, 0x3fed7a8c, 0x43175f91, 0x3fece065,
-    0x4323ecbe, 0x3fec43c7, 0x433079cc, 0x3feba4b2,
-    0x433d06bb, 0x3feb0326, 0x43499389, 0x3fea5f23,
-    0x43562038, 0x3fe9b8a9, 0x4362acc5, 0x3fe90fb9,
-    0x436f3931, 0x3fe86452, 0x437bc57b, 0x3fe7b674,
-    0x438851a2, 0x3fe7061f, 0x4394dda7, 0x3fe65354,
-    0x43a16988, 0x3fe59e12, 0x43adf546, 0x3fe4e659,
-    0x43ba80df, 0x3fe42c2a, 0x43c70c54, 0x3fe36f84,
-    0x43d397a3, 0x3fe2b067, 0x43e022cc, 0x3fe1eed5,
-    0x43ecadcf, 0x3fe12acb, 0x43f938ac, 0x3fe0644b,
-    0x4405c361, 0x3fdf9b55, 0x44124dee, 0x3fdecfe8,
-    0x441ed854, 0x3fde0205, 0x442b6290, 0x3fdd31ac,
-    0x4437eca4, 0x3fdc5edc, 0x4444768d, 0x3fdb8996,
-    0x4451004d, 0x3fdab1d9, 0x445d89e2, 0x3fd9d7a7,
-    0x446a134c, 0x3fd8fafe, 0x44769c8b, 0x3fd81bdf,
-    0x4483259d, 0x3fd73a4a, 0x448fae83, 0x3fd6563f,
-    0x449c373c, 0x3fd56fbe, 0x44a8bfc7, 0x3fd486c7,
-    0x44b54825, 0x3fd39b5a, 0x44c1d054, 0x3fd2ad77,
-    0x44ce5854, 0x3fd1bd1e, 0x44dae024, 0x3fd0ca4f,
-    0x44e767c5, 0x3fcfd50b, 0x44f3ef35, 0x3fcedd50,
-    0x45007674, 0x3fcde320, 0x450cfd82, 0x3fcce67a,
-    0x4519845e, 0x3fcbe75e, 0x45260b08, 0x3fcae5cd,
-    0x4532917f, 0x3fc9e1c6, 0x453f17c3, 0x3fc8db4a,
-    0x454b9dd3, 0x3fc7d258, 0x455823ae, 0x3fc6c6f0,
-    0x4564a955, 0x3fc5b913, 0x45712ec7, 0x3fc4a8c1,
-    0x457db403, 0x3fc395f9, 0x458a3908, 0x3fc280bc,
-    0x4596bdd7, 0x3fc1690a, 0x45a3426f, 0x3fc04ee3,
-    0x45afc6d0, 0x3fbf3246, 0x45bc4af8, 0x3fbe1334,
-    0x45c8cee7, 0x3fbcf1ad, 0x45d5529e, 0x3fbbcdb1,
-    0x45e1d61b, 0x3fbaa740, 0x45ee595d, 0x3fb97e5a,
-    0x45fadc66, 0x3fb852ff, 0x46075f33, 0x3fb7252f,
-    0x4613e1c5, 0x3fb5f4ea, 0x4620641a, 0x3fb4c231,
-    0x462ce634, 0x3fb38d02, 0x46396810, 0x3fb2555f,
-    0x4645e9af, 0x3fb11b48, 0x46526b10, 0x3fafdebb,
-    0x465eec33, 0x3fae9fbb, 0x466b6d16, 0x3fad5e45,
-    0x4677edbb, 0x3fac1a5b, 0x46846e1f, 0x3faad3fd,
-    0x4690ee44, 0x3fa98b2a, 0x469d6e27, 0x3fa83fe3,
-    0x46a9edc9, 0x3fa6f228, 0x46b66d29, 0x3fa5a1f9,
-    0x46c2ec48, 0x3fa44f55, 0x46cf6b23, 0x3fa2fa3d,
-    0x46dbe9bb, 0x3fa1a2b2, 0x46e86810, 0x3fa048b2,
-    0x46f4e620, 0x3f9eec3e, 0x470163eb, 0x3f9d8d56,
-    0x470de172, 0x3f9c2bfb, 0x471a5eb3, 0x3f9ac82c,
-    0x4726dbae, 0x3f9961e8, 0x47335862, 0x3f97f932,
-    0x473fd4cf, 0x3f968e07, 0x474c50f4, 0x3f952069,
-    0x4758ccd2, 0x3f93b058, 0x47654867, 0x3f923dd2,
-    0x4771c3b3, 0x3f90c8da, 0x477e3eb5, 0x3f8f516e,
-    0x478ab96e, 0x3f8dd78f, 0x479733dc, 0x3f8c5b3d,
-    0x47a3adff, 0x3f8adc77, 0x47b027d7, 0x3f895b3e,
-    0x47bca163, 0x3f87d792, 0x47c91aa3, 0x3f865174,
-    0x47d59396, 0x3f84c8e2, 0x47e20c3b, 0x3f833ddd,
-    0x47ee8493, 0x3f81b065, 0x47fafc9c, 0x3f80207b,
-    0x48077457, 0x3f7e8e1e, 0x4813ebc2, 0x3f7cf94e,
-    0x482062de, 0x3f7b620c, 0x482cd9a9, 0x3f79c857,
-    0x48395024, 0x3f782c30, 0x4845c64d, 0x3f768d96,
-    0x48523c25, 0x3f74ec8a, 0x485eb1ab, 0x3f73490b,
-    0x486b26de, 0x3f71a31b, 0x48779bbe, 0x3f6ffab8,
-    0x4884104b, 0x3f6e4fe3, 0x48908483, 0x3f6ca29c,
-    0x489cf867, 0x3f6af2e3, 0x48a96bf6, 0x3f6940b8,
-    0x48b5df30, 0x3f678c1c, 0x48c25213, 0x3f65d50d,
-    0x48cec4a0, 0x3f641b8d, 0x48db36d6, 0x3f625f9b,
-    0x48e7a8b5, 0x3f60a138, 0x48f41a3c, 0x3f5ee063,
-    0x49008b6a, 0x3f5d1d1d, 0x490cfc40, 0x3f5b5765,
-    0x49196cbc, 0x3f598f3c, 0x4925dcdf, 0x3f57c4a2,
-    0x49324ca7, 0x3f55f796, 0x493ebc14, 0x3f54281a,
-    0x494b2b27, 0x3f52562c, 0x495799dd, 0x3f5081cd,
-    0x49640837, 0x3f4eaafe, 0x49707635, 0x3f4cd1be,
-    0x497ce3d5, 0x3f4af60d, 0x49895118, 0x3f4917eb,
-    0x4995bdfd, 0x3f473759, 0x49a22a83, 0x3f455456,
-    0x49ae96aa, 0x3f436ee3, 0x49bb0271, 0x3f4186ff,
-    0x49c76dd8, 0x3f3f9cab, 0x49d3d8df, 0x3f3dafe7,
-    0x49e04385, 0x3f3bc0b3, 0x49ecadc9, 0x3f39cf0e,
-    0x49f917ac, 0x3f37dafa, 0x4a05812c, 0x3f35e476,
-    0x4a11ea49, 0x3f33eb81, 0x4a1e5303, 0x3f31f01d,
-    0x4a2abb59, 0x3f2ff24a, 0x4a37234a, 0x3f2df206,
-    0x4a438ad7, 0x3f2bef53, 0x4a4ff1fe, 0x3f29ea31,
-    0x4a5c58c0, 0x3f27e29f, 0x4a68bf1b, 0x3f25d89e,
-    0x4a752510, 0x3f23cc2e, 0x4a818a9d, 0x3f21bd4e,
-    0x4a8defc3, 0x3f1fabff, 0x4a9a5480, 0x3f1d9842,
-    0x4aa6b8d5, 0x3f1b8215, 0x4ab31cc1, 0x3f19697a,
-    0x4abf8043, 0x3f174e70, 0x4acbe35b, 0x3f1530f7,
-    0x4ad84609, 0x3f13110f, 0x4ae4a84b, 0x3f10eeb9,
-    0x4af10a22, 0x3f0ec9f5, 0x4afd6b8d, 0x3f0ca2c2,
-    0x4b09cc8c, 0x3f0a7921, 0x4b162d1d, 0x3f084d12,
-    0x4b228d42, 0x3f061e95, 0x4b2eecf8, 0x3f03eda9,
-    0x4b3b4c40, 0x3f01ba50, 0x4b47ab19, 0x3eff8489,
-    0x4b540982, 0x3efd4c54, 0x4b60677c, 0x3efb11b1,
-    0x4b6cc506, 0x3ef8d4a1, 0x4b79221f, 0x3ef69523,
-    0x4b857ec7, 0x3ef45338, 0x4b91dafc, 0x3ef20ee0,
-    0x4b9e36c0, 0x3eefc81a, 0x4baa9211, 0x3eed7ee7,
-    0x4bb6ecef, 0x3eeb3347, 0x4bc34759, 0x3ee8e53a,
-    0x4bcfa150, 0x3ee694c1, 0x4bdbfad1, 0x3ee441da,
-    0x4be853de, 0x3ee1ec87, 0x4bf4ac75, 0x3edf94c7,
-    0x4c010496, 0x3edd3a9a, 0x4c0d5c41, 0x3edade01,
-    0x4c19b374, 0x3ed87efc, 0x4c260a31, 0x3ed61d8a,
-    0x4c326075, 0x3ed3b9ad, 0x4c3eb641, 0x3ed15363,
-    0x4c4b0b94, 0x3eceeaad, 0x4c57606e, 0x3ecc7f8b,
-    0x4c63b4ce, 0x3eca11fe, 0x4c7008b3, 0x3ec7a205,
-    0x4c7c5c1e, 0x3ec52fa0, 0x4c88af0e, 0x3ec2bad0,
-    0x4c950182, 0x3ec04394, 0x4ca1537a, 0x3ebdc9ed,
-    0x4cada4f5, 0x3ebb4ddb, 0x4cb9f5f3, 0x3eb8cf5d,
-    0x4cc64673, 0x3eb64e75, 0x4cd29676, 0x3eb3cb21,
-    0x4cdee5f9, 0x3eb14563, 0x4ceb34fe, 0x3eaebd3a,
-    0x4cf78383, 0x3eac32a6, 0x4d03d189, 0x3ea9a5a8,
-    0x4d101f0e, 0x3ea7163f, 0x4d1c6c11, 0x3ea4846c,
-    0x4d28b894, 0x3ea1f02f, 0x4d350495, 0x3e9f5988,
-    0x4d415013, 0x3e9cc076, 0x4d4d9b0e, 0x3e9a24fb,
-    0x4d59e586, 0x3e978715, 0x4d662f7b, 0x3e94e6c6,
-    0x4d7278eb, 0x3e92440d, 0x4d7ec1d6, 0x3e8f9eeb,
-    0x4d8b0a3d, 0x3e8cf75f, 0x4d97521d, 0x3e8a4d6a,
-    0x4da39978, 0x3e87a10c, 0x4dafe04b, 0x3e84f245,
-    0x4dbc2698, 0x3e824114, 0x4dc86c5d, 0x3e7f8d7b,
-    0x4dd4b19a, 0x3e7cd778, 0x4de0f64f, 0x3e7a1f0d,
-    0x4ded3a7b, 0x3e77643a, 0x4df97e1d, 0x3e74a6fd,
-    0x4e05c135, 0x3e71e759, 0x4e1203c3, 0x3e6f254c,
-    0x4e1e45c6, 0x3e6c60d7, 0x4e2a873e, 0x3e6999fa,
-    0x4e36c82a, 0x3e66d0b4, 0x4e430889, 0x3e640507,
-    0x4e4f485c, 0x3e6136f3, 0x4e5b87a2, 0x3e5e6676,
-    0x4e67c65a, 0x3e5b9392, 0x4e740483, 0x3e58be47,
-    0x4e80421e, 0x3e55e694, 0x4e8c7f2a, 0x3e530c7a,
-    0x4e98bba7, 0x3e502ff9, 0x4ea4f793, 0x3e4d5110,
-    0x4eb132ef, 0x3e4a6fc1, 0x4ebd6db9, 0x3e478c0b,
-    0x4ec9a7f3, 0x3e44a5ef, 0x4ed5e19a, 0x3e41bd6c,
-    0x4ee21aaf, 0x3e3ed282, 0x4eee5331, 0x3e3be532,
-    0x4efa8b20, 0x3e38f57c, 0x4f06c27a, 0x3e360360,
-    0x4f12f941, 0x3e330ede, 0x4f1f2f73, 0x3e3017f6,
-    0x4f2b650f, 0x3e2d1ea8, 0x4f379a16, 0x3e2a22f4,
-    0x4f43ce86, 0x3e2724db, 0x4f500260, 0x3e24245d,
-    0x4f5c35a3, 0x3e212179, 0x4f68684e, 0x3e1e1c30,
-    0x4f749a61, 0x3e1b1482, 0x4f80cbdc, 0x3e180a6f,
-    0x4f8cfcbe, 0x3e14fdf7, 0x4f992d06, 0x3e11ef1b,
-    0x4fa55cb4, 0x3e0eddd9, 0x4fb18bc8, 0x3e0bca34,
-    0x4fbdba40, 0x3e08b42a, 0x4fc9e81e, 0x3e059bbb,
-    0x4fd6155f, 0x3e0280e9, 0x4fe24205, 0x3dff63b2,
-    0x4fee6e0d, 0x3dfc4418, 0x4ffa9979, 0x3df9221a,
-    0x5006c446, 0x3df5fdb8, 0x5012ee76, 0x3df2d6f3,
-    0x501f1807, 0x3defadca, 0x502b40f8, 0x3dec823e,
-    0x5037694b, 0x3de9544f, 0x504390fd, 0x3de623fd,
-    0x504fb80e, 0x3de2f148, 0x505bde7f, 0x3ddfbc30,
-    0x5068044e, 0x3ddc84b5, 0x5074297b, 0x3dd94ad8,
-    0x50804e06, 0x3dd60e99, 0x508c71ee, 0x3dd2cff7,
-    0x50989532, 0x3dcf8ef3, 0x50a4b7d3, 0x3dcc4b8d,
-    0x50b0d9d0, 0x3dc905c5, 0x50bcfb28, 0x3dc5bd9b,
-    0x50c91bda, 0x3dc2730f, 0x50d53be7, 0x3dbf2622,
-    0x50e15b4e, 0x3dbbd6d4, 0x50ed7a0e, 0x3db88524,
-    0x50f99827, 0x3db53113, 0x5105b599, 0x3db1daa2,
-    0x5111d263, 0x3dae81cf, 0x511dee84, 0x3dab269b,
-    0x512a09fc, 0x3da7c907, 0x513624cb, 0x3da46912,
-    0x51423ef0, 0x3da106bd, 0x514e586a, 0x3d9da208,
-    0x515a713a, 0x3d9a3af2, 0x5166895f, 0x3d96d17d,
-    0x5172a0d7, 0x3d9365a8, 0x517eb7a4, 0x3d8ff772,
-    0x518acdc4, 0x3d8c86de, 0x5196e337, 0x3d8913ea,
-    0x51a2f7fc, 0x3d859e96, 0x51af0c13, 0x3d8226e4,
-    0x51bb1f7c, 0x3d7eacd2, 0x51c73235, 0x3d7b3061,
-    0x51d3443f, 0x3d77b192, 0x51df5599, 0x3d743064,
-    0x51eb6643, 0x3d70acd7, 0x51f7763c, 0x3d6d26ec,
-    0x52038584, 0x3d699ea3, 0x520f941a, 0x3d6613fb,
-    0x521ba1fd, 0x3d6286f6, 0x5227af2e, 0x3d5ef793,
-    0x5233bbac, 0x3d5b65d2, 0x523fc776, 0x3d57d1b3,
-    0x524bd28c, 0x3d543b37, 0x5257dced, 0x3d50a25e,
-    0x5263e699, 0x3d4d0728, 0x526fef90, 0x3d496994,
-    0x527bf7d1, 0x3d45c9a4, 0x5287ff5b, 0x3d422757,
-    0x5294062f, 0x3d3e82ae, 0x52a00c4b, 0x3d3adba7,
-    0x52ac11af, 0x3d373245, 0x52b8165b, 0x3d338687,
-    0x52c41a4f, 0x3d2fd86c, 0x52d01d89, 0x3d2c27f6,
-    0x52dc2009, 0x3d287523, 0x52e821cf, 0x3d24bff6,
-    0x52f422db, 0x3d21086c, 0x5300232c, 0x3d1d4e88,
-    0x530c22c1, 0x3d199248, 0x5318219a, 0x3d15d3ad,
-    0x53241fb6, 0x3d1212b7, 0x53301d16, 0x3d0e4f67,
-    0x533c19b8, 0x3d0a89bc, 0x5348159d, 0x3d06c1b6,
-    0x535410c3, 0x3d02f757, 0x53600b2a, 0x3cff2a9d,
-    0x536c04d2, 0x3cfb5b89, 0x5377fdbb, 0x3cf78a1b,
-    0x5383f5e3, 0x3cf3b653, 0x538fed4b, 0x3cefe032,
-    0x539be3f2, 0x3cec07b8, 0x53a7d9d7, 0x3ce82ce4,
-    0x53b3cefa, 0x3ce44fb7, 0x53bfc35b, 0x3ce07031,
-    0x53cbb6f8, 0x3cdc8e52, 0x53d7a9d3, 0x3cd8aa1b,
-    0x53e39be9, 0x3cd4c38b, 0x53ef8d3c, 0x3cd0daa2,
-    0x53fb7dc9, 0x3cccef62, 0x54076d91, 0x3cc901c9,
-    0x54135c94, 0x3cc511d9, 0x541f4ad1, 0x3cc11f90,
-    0x542b3846, 0x3cbd2af0, 0x543724f5, 0x3cb933f9,
-    0x544310dd, 0x3cb53aaa, 0x544efbfc, 0x3cb13f04,
-    0x545ae653, 0x3cad4107, 0x5466cfe1, 0x3ca940b3,
-    0x5472b8a5, 0x3ca53e09, 0x547ea0a0, 0x3ca13908,
-    0x548a87d1, 0x3c9d31b0, 0x54966e36, 0x3c992803,
-    0x54a253d1, 0x3c951bff, 0x54ae38a0, 0x3c910da5,
-    0x54ba1ca3, 0x3c8cfcf6, 0x54c5ffd9, 0x3c88e9f1,
-    0x54d1e242, 0x3c84d496, 0x54ddc3de, 0x3c80bce7,
-    0x54e9a4ac, 0x3c7ca2e2, 0x54f584ac, 0x3c788688,
-    0x550163dc, 0x3c7467d9, 0x550d423d, 0x3c7046d6,
-    0x55191fcf, 0x3c6c237e, 0x5524fc90, 0x3c67fdd1,
-    0x5530d881, 0x3c63d5d1, 0x553cb3a0, 0x3c5fab7c,
-    0x55488dee, 0x3c5b7ed4, 0x5554676a, 0x3c574fd8,
-    0x55604013, 0x3c531e88, 0x556c17e9, 0x3c4eeae5,
-    0x5577eeec, 0x3c4ab4ef, 0x5583c51b, 0x3c467ca6,
-    0x558f9a76, 0x3c42420a, 0x559b6efb, 0x3c3e051b,
-    0x55a742ac, 0x3c39c5da, 0x55b31587, 0x3c358446,
-    0x55bee78c, 0x3c314060, 0x55cab8ba, 0x3c2cfa28,
-    0x55d68911, 0x3c28b19e, 0x55e25890, 0x3c2466c2,
-    0x55ee2738, 0x3c201994, 0x55f9f507, 0x3c1bca16,
-    0x5605c1fd, 0x3c177845, 0x56118e1a, 0x3c132424,
-    0x561d595d, 0x3c0ecdb2, 0x562923c5, 0x3c0a74f0,
-    0x5634ed53, 0x3c0619dc, 0x5640b606, 0x3c01bc78,
-    0x564c7ddd, 0x3bfd5cc4, 0x565844d8, 0x3bf8fac0,
-    0x56640af7, 0x3bf4966c, 0x566fd039, 0x3bf02fc9,
-    0x567b949d, 0x3bebc6d5, 0x56875823, 0x3be75b93,
-    0x56931acb, 0x3be2ee01, 0x569edc94, 0x3bde7e20,
-    0x56aa9d7e, 0x3bda0bf0, 0x56b65d88, 0x3bd59771,
-    0x56c21cb2, 0x3bd120a4, 0x56cddafb, 0x3bcca789,
-    0x56d99864, 0x3bc82c1f, 0x56e554ea, 0x3bc3ae67,
-    0x56f1108f, 0x3bbf2e62, 0x56fccb51, 0x3bbaac0e,
-    0x57088531, 0x3bb6276e, 0x57143e2d, 0x3bb1a080,
-    0x571ff646, 0x3bad1744, 0x572bad7a, 0x3ba88bbc,
-    0x573763c9, 0x3ba3fde7, 0x57431933, 0x3b9f6dc5,
-    0x574ecdb8, 0x3b9adb57, 0x575a8157, 0x3b96469d,
-    0x5766340f, 0x3b91af97, 0x5771e5e0, 0x3b8d1644,
-    0x577d96ca, 0x3b887aa6, 0x578946cc, 0x3b83dcbc,
-    0x5794f5e6, 0x3b7f3c87, 0x57a0a417, 0x3b7a9a07,
-    0x57ac515f, 0x3b75f53c, 0x57b7fdbd, 0x3b714e25,
-    0x57c3a931, 0x3b6ca4c4, 0x57cf53bb, 0x3b67f919,
-    0x57dafd59, 0x3b634b23, 0x57e6a60c, 0x3b5e9ae4,
-    0x57f24dd3, 0x3b59e85a, 0x57fdf4ae, 0x3b553386,
-    0x58099a9c, 0x3b507c69, 0x58153f9d, 0x3b4bc303,
-    0x5820e3b0, 0x3b470753, 0x582c86d5, 0x3b42495a,
-    0x5838290c, 0x3b3d8918, 0x5843ca53, 0x3b38c68e,
-    0x584f6aab, 0x3b3401bb, 0x585b0a13, 0x3b2f3aa0,
-    0x5866a88a, 0x3b2a713d, 0x58724611, 0x3b25a591,
-    0x587de2a7, 0x3b20d79e, 0x58897e4a, 0x3b1c0764,
-    0x589518fc, 0x3b1734e2, 0x58a0b2bb, 0x3b126019,
-    0x58ac4b87, 0x3b0d8909, 0x58b7e35f, 0x3b08afb2,
-    0x58c37a44, 0x3b03d414, 0x58cf1034, 0x3afef630,
-    0x58daa52f, 0x3afa1605, 0x58e63935, 0x3af53395,
-    0x58f1cc45, 0x3af04edf, 0x58fd5e5f, 0x3aeb67e3,
-    0x5908ef82, 0x3ae67ea1, 0x59147fae, 0x3ae1931a,
-    0x59200ee3, 0x3adca54e, 0x592b9d1f, 0x3ad7b53d,
-    0x59372a64, 0x3ad2c2e8, 0x5942b6af, 0x3acdce4d,
-    0x594e4201, 0x3ac8d76f, 0x5959cc5a, 0x3ac3de4c,
-    0x596555b8, 0x3abee2e5, 0x5970de1b, 0x3ab9e53a,
-    0x597c6584, 0x3ab4e54c, 0x5987ebf0, 0x3aafe31b,
-    0x59937161, 0x3aaadea6, 0x599ef5d6, 0x3aa5d7ee,
-    0x59aa794d, 0x3aa0cef3, 0x59b5fbc8, 0x3a9bc3b6,
-    0x59c17d44, 0x3a96b636, 0x59ccfdc2, 0x3a91a674,
-    0x59d87d42, 0x3a8c9470, 0x59e3fbc3, 0x3a87802a,
-    0x59ef7944, 0x3a8269a3, 0x59faf5c5, 0x3a7d50da,
-    0x5a067145, 0x3a7835cf, 0x5a11ebc5, 0x3a731884,
-    0x5a1d6544, 0x3a6df8f8, 0x5a28ddc0, 0x3a68d72b,
-    0x5a34553b, 0x3a63b31d, 0x5a3fcbb3, 0x3a5e8cd0,
-    0x5a4b4128, 0x3a596442, 0x5a56b599, 0x3a543974,
-    0x5a622907, 0x3a4f0c67, 0x5a6d9b70, 0x3a49dd1a,
-    0x5a790cd4, 0x3a44ab8e, 0x5a847d33, 0x3a3f77c3,
-    0x5a8fec8c, 0x3a3a41b9, 0x5a9b5adf, 0x3a350970,
-    0x5aa6c82b, 0x3a2fcee8, 0x5ab23471, 0x3a2a9223,
-    0x5abd9faf, 0x3a25531f, 0x5ac909e5, 0x3a2011de,
-    0x5ad47312, 0x3a1ace5f, 0x5adfdb37, 0x3a1588a2,
-    0x5aeb4253, 0x3a1040a8, 0x5af6a865, 0x3a0af671,
-    0x5b020d6c, 0x3a05a9fd, 0x5b0d716a, 0x3a005b4d,
-    0x5b18d45c, 0x39fb0a60, 0x5b243643, 0x39f5b737,
-    0x5b2f971e, 0x39f061d2, 0x5b3af6ec, 0x39eb0a31,
-    0x5b4655ae, 0x39e5b054, 0x5b51b363, 0x39e0543c,
-    0x5b5d100a, 0x39daf5e8, 0x5b686ba3, 0x39d5955a,
-    0x5b73c62d, 0x39d03291, 0x5b7f1fa9, 0x39cacd8d,
-    0x5b8a7815, 0x39c5664f, 0x5b95cf71, 0x39bffcd7,
-    0x5ba125bd, 0x39ba9125, 0x5bac7af9, 0x39b52339,
-    0x5bb7cf23, 0x39afb313, 0x5bc3223c, 0x39aa40b4,
-    0x5bce7442, 0x39a4cc1c, 0x5bd9c537, 0x399f554b,
-    0x5be51518, 0x3999dc42, 0x5bf063e6, 0x399460ff,
-    0x5bfbb1a0, 0x398ee385, 0x5c06fe46, 0x398963d2,
-    0x5c1249d8, 0x3983e1e8, 0x5c1d9454, 0x397e5dc6,
-    0x5c28ddbb, 0x3978d76c, 0x5c34260c, 0x39734edc,
-    0x5c3f6d47, 0x396dc414, 0x5c4ab36b, 0x39683715,
-    0x5c55f878, 0x3962a7e0, 0x5c613c6d, 0x395d1675,
-    0x5c6c7f4a, 0x395782d3, 0x5c77c10e, 0x3951ecfc,
-    0x5c8301b9, 0x394c54ee, 0x5c8e414b, 0x3946baac,
-    0x5c997fc4, 0x39411e33, 0x5ca4bd21, 0x393b7f86,
-    0x5caff965, 0x3935dea4, 0x5cbb348d, 0x39303b8e,
-    0x5cc66e99, 0x392a9642, 0x5cd1a78a, 0x3924eec3,
-    0x5cdcdf5e, 0x391f4510, 0x5ce81615, 0x39199929,
-    0x5cf34baf, 0x3913eb0e, 0x5cfe802b, 0x390e3ac0,
-    0x5d09b389, 0x3908883f, 0x5d14e5c9, 0x3902d38b,
-    0x5d2016e9, 0x38fd1ca4, 0x5d2b46ea, 0x38f7638b,
-    0x5d3675cb, 0x38f1a840, 0x5d41a38c, 0x38ebeac2,
-    0x5d4cd02c, 0x38e62b13, 0x5d57fbaa, 0x38e06932,
-    0x5d632608, 0x38daa520, 0x5d6e4f43, 0x38d4dedd,
-    0x5d79775c, 0x38cf1669, 0x5d849e51, 0x38c94bc4,
-    0x5d8fc424, 0x38c37eef, 0x5d9ae8d2, 0x38bdafea,
-    0x5da60c5d, 0x38b7deb4, 0x5db12ec3, 0x38b20b4f,
-    0x5dbc5004, 0x38ac35ba, 0x5dc7701f, 0x38a65df6,
-    0x5dd28f15, 0x38a08402, 0x5dddace4, 0x389aa7e0,
-    0x5de8c98c, 0x3894c98f, 0x5df3e50d, 0x388ee910,
-    0x5dfeff67, 0x38890663, 0x5e0a1898, 0x38832187,
-    0x5e1530a1, 0x387d3a7e, 0x5e204781, 0x38775147,
-    0x5e2b5d38, 0x387165e3, 0x5e3671c5, 0x386b7852,
-    0x5e418528, 0x38658894, 0x5e4c9760, 0x385f96a9,
-    0x5e57a86d, 0x3859a292, 0x5e62b84f, 0x3853ac4f,
-    0x5e6dc705, 0x384db3e0, 0x5e78d48e, 0x3847b946,
-    0x5e83e0eb, 0x3841bc7f, 0x5e8eec1b, 0x383bbd8e,
-    0x5e99f61d, 0x3835bc71, 0x5ea4fef0, 0x382fb92a,
-    0x5eb00696, 0x3829b3b9, 0x5ebb0d0d, 0x3823ac1d,
-    0x5ec61254, 0x381da256, 0x5ed1166b, 0x38179666,
-    0x5edc1953, 0x3811884d, 0x5ee71b0a, 0x380b780a,
-    0x5ef21b90, 0x3805659e, 0x5efd1ae4, 0x37ff5109,
-    0x5f081907, 0x37f93a4b, 0x5f1315f7, 0x37f32165,
-    0x5f1e11b5, 0x37ed0657, 0x5f290c3f, 0x37e6e921,
-    0x5f340596, 0x37e0c9c3, 0x5f3efdb9, 0x37daa83d,
-    0x5f49f4a8, 0x37d48490, 0x5f54ea62, 0x37ce5ebd,
-    0x5f5fdee6, 0x37c836c2, 0x5f6ad235, 0x37c20ca1,
-    0x5f75c44e, 0x37bbe05a, 0x5f80b531, 0x37b5b1ec,
-    0x5f8ba4dc, 0x37af8159, 0x5f969350, 0x37a94ea0,
-    0x5fa1808c, 0x37a319c2, 0x5fac6c91, 0x379ce2be,
-    0x5fb7575c, 0x3796a996, 0x5fc240ef, 0x37906e49,
-    0x5fcd2948, 0x378a30d8, 0x5fd81067, 0x3783f143,
-    0x5fe2f64c, 0x377daf89, 0x5feddaf6, 0x37776bac,
-    0x5ff8be65, 0x377125ac, 0x6003a099, 0x376add88,
-    0x600e8190, 0x37649341, 0x6019614c, 0x375e46d8,
-    0x60243fca, 0x3757f84c, 0x602f1d0b, 0x3751a79e,
-    0x6039f90f, 0x374b54ce, 0x6044d3d4, 0x3744ffdd,
-    0x604fad5b, 0x373ea8ca, 0x605a85a3, 0x37384f95,
-    0x60655cac, 0x3731f440, 0x60703275, 0x372b96ca,
-    0x607b06fe, 0x37253733, 0x6085da46, 0x371ed57c,
-    0x6090ac4d, 0x371871a5, 0x609b7d13, 0x37120bae,
-    0x60a64c97, 0x370ba398, 0x60b11ad9, 0x37053962,
-    0x60bbe7d8, 0x36fecd0e, 0x60c6b395, 0x36f85e9a,
-    0x60d17e0d, 0x36f1ee09, 0x60dc4742, 0x36eb7b58,
-    0x60e70f32, 0x36e5068a, 0x60f1d5de, 0x36de8f9e,
-    0x60fc9b44, 0x36d81695, 0x61075f65, 0x36d19b6e,
-    0x61122240, 0x36cb1e2a, 0x611ce3d5, 0x36c49ec9,
-    0x6127a423, 0x36be1d4c, 0x61326329, 0x36b799b3,
-    0x613d20e8, 0x36b113fd, 0x6147dd5f, 0x36aa8c2c,
-    0x6152988d, 0x36a4023f, 0x615d5273, 0x369d7637,
-    0x61680b0f, 0x3696e814, 0x6172c262, 0x369057d6,
-    0x617d786a, 0x3689c57d, 0x61882d28, 0x3683310b,
-    0x6192e09b, 0x367c9a7e, 0x619d92c2, 0x367601d7,
-    0x61a8439e, 0x366f6717, 0x61b2f32e, 0x3668ca3e,
-    0x61bda171, 0x36622b4c, 0x61c84e67, 0x365b8a41,
-    0x61d2fa0f, 0x3654e71d, 0x61dda46a, 0x364e41e2,
-    0x61e84d76, 0x36479a8e, 0x61f2f534, 0x3640f123,
-    0x61fd9ba3, 0x363a45a0, 0x620840c2, 0x36339806,
-    0x6212e492, 0x362ce855, 0x621d8711, 0x3626368d,
-    0x6228283f, 0x361f82af, 0x6232c81c, 0x3618ccba,
-    0x623d66a8, 0x361214b0, 0x624803e2, 0x360b5a90,
-    0x62529fca, 0x36049e5b, 0x625d3a5e, 0x35fde011,
-    0x6267d3a0, 0x35f71fb1, 0x62726b8e, 0x35f05d3d,
-    0x627d0228, 0x35e998b5, 0x6287976e, 0x35e2d219,
-    0x62922b5e, 0x35dc0968, 0x629cbdfa, 0x35d53ea5,
-    0x62a74f40, 0x35ce71ce, 0x62b1df30, 0x35c7a2e3,
-    0x62bc6dca, 0x35c0d1e7, 0x62c6fb0c, 0x35b9fed7,
-    0x62d186f8, 0x35b329b5, 0x62dc118c, 0x35ac5282,
-    0x62e69ac8, 0x35a5793c, 0x62f122ab, 0x359e9de5,
-    0x62fba936, 0x3597c07d, 0x63062e67, 0x3590e104,
-    0x6310b23e, 0x3589ff7a, 0x631b34bc, 0x35831be0,
-    0x6325b5df, 0x357c3636, 0x633035a7, 0x35754e7c,
-    0x633ab414, 0x356e64b2, 0x63453125, 0x356778d9,
-    0x634facda, 0x35608af1, 0x635a2733, 0x35599afa,
-    0x6364a02e, 0x3552a8f4, 0x636f17cc, 0x354bb4e1,
-    0x63798e0d, 0x3544bebf, 0x638402ef, 0x353dc68f,
-    0x638e7673, 0x3536cc52, 0x6398e898, 0x352fd008,
-    0x63a3595e, 0x3528d1b1, 0x63adc8c4, 0x3521d14d,
-    0x63b836ca, 0x351acedd, 0x63c2a36f, 0x3513ca60,
-    0x63cd0eb3, 0x350cc3d8, 0x63d77896, 0x3505bb44,
-    0x63e1e117, 0x34feb0a5, 0x63ec4837, 0x34f7a3fb,
-    0x63f6adf3, 0x34f09546, 0x6401124d, 0x34e98487,
-    0x640b7543, 0x34e271bd, 0x6415d6d5, 0x34db5cea,
-    0x64203704, 0x34d4460c, 0x642a95ce, 0x34cd2d26,
-    0x6434f332, 0x34c61236, 0x643f4f32, 0x34bef53d,
-    0x6449a9cc, 0x34b7d63c, 0x645402ff, 0x34b0b533,
-    0x645e5acc, 0x34a99221, 0x6468b132, 0x34a26d08,
-    0x64730631, 0x349b45e7, 0x647d59c8, 0x34941cbf,
-    0x6487abf7, 0x348cf190, 0x6491fcbe, 0x3485c45b,
-    0x649c4c1b, 0x347e951f, 0x64a69a0f, 0x347763dd,
-    0x64b0e699, 0x34703095, 0x64bb31ba, 0x3468fb47,
-    0x64c57b6f, 0x3461c3f5, 0x64cfc3ba, 0x345a8a9d,
-    0x64da0a9a, 0x34534f41, 0x64e4500e, 0x344c11e0,
-    0x64ee9415, 0x3444d27b, 0x64f8d6b0, 0x343d9112,
-    0x650317df, 0x34364da6, 0x650d57a0, 0x342f0836,
-    0x651795f3, 0x3427c0c3, 0x6521d2d8, 0x3420774d,
-    0x652c0e4f, 0x34192bd5, 0x65364857, 0x3411de5b,
-    0x654080ef, 0x340a8edf, 0x654ab818, 0x34033d61,
-    0x6554edd1, 0x33fbe9e2, 0x655f2219, 0x33f49462,
-    0x656954f1, 0x33ed3ce1, 0x65738657, 0x33e5e360,
-    0x657db64c, 0x33de87de, 0x6587e4cf, 0x33d72a5d,
-    0x659211df, 0x33cfcadc, 0x659c3d7c, 0x33c8695b,
-    0x65a667a7, 0x33c105db, 0x65b0905d, 0x33b9a05d,
-    0x65bab7a0, 0x33b238e0, 0x65c4dd6e, 0x33aacf65,
-    0x65cf01c8, 0x33a363ec, 0x65d924ac, 0x339bf675,
-    0x65e3461b, 0x33948701, 0x65ed6614, 0x338d1590,
-    0x65f78497, 0x3385a222, 0x6601a1a2, 0x337e2cb7,
-    0x660bbd37, 0x3376b551, 0x6615d754, 0x336f3bee,
-    0x661feffa, 0x3367c090, 0x662a0727, 0x33604336,
-    0x66341cdb, 0x3358c3e2, 0x663e3117, 0x33514292,
-    0x664843d9, 0x3349bf48, 0x66525521, 0x33423a04,
-    0x665c64ef, 0x333ab2c6, 0x66667342, 0x3333298f,
-    0x6670801a, 0x332b9e5e, 0x667a8b77, 0x33241134,
-    0x66849558, 0x331c8211, 0x668e9dbd, 0x3314f0f6,
-    0x6698a4a6, 0x330d5de3, 0x66a2aa11, 0x3305c8d7,
-    0x66acadff, 0x32fe31d5, 0x66b6b070, 0x32f698db,
-    0x66c0b162, 0x32eefdea, 0x66cab0d6, 0x32e76102,
-    0x66d4aecb, 0x32dfc224, 0x66deab41, 0x32d82150,
-    0x66e8a637, 0x32d07e85, 0x66f29fad, 0x32c8d9c6,
-    0x66fc97a3, 0x32c13311, 0x67068e18, 0x32b98a67,
-    0x6710830c, 0x32b1dfc9, 0x671a767e, 0x32aa3336,
-    0x6724686e, 0x32a284b0, 0x672e58dc, 0x329ad435,
-    0x673847c8, 0x329321c7, 0x67423530, 0x328b6d66,
-    0x674c2115, 0x3283b712, 0x67560b76, 0x327bfecc,
-    0x675ff452, 0x32744493, 0x6769dbaa, 0x326c8868,
-    0x6773c17d, 0x3264ca4c, 0x677da5cb, 0x325d0a3e,
-    0x67878893, 0x32554840, 0x679169d5, 0x324d8450,
-    0x679b4990, 0x3245be70, 0x67a527c4, 0x323df6a0,
-    0x67af0472, 0x32362ce0, 0x67b8df97, 0x322e6130,
-    0x67c2b934, 0x32269391, 0x67cc9149, 0x321ec403,
-    0x67d667d5, 0x3216f287, 0x67e03cd8, 0x320f1f1c,
-    0x67ea1052, 0x320749c3, 0x67f3e241, 0x31ff727c,
-    0x67fdb2a7, 0x31f79948, 0x68078181, 0x31efbe27,
-    0x68114ed0, 0x31e7e118, 0x681b1a94, 0x31e0021e,
-    0x6824e4cc, 0x31d82137, 0x682ead78, 0x31d03e64,
-    0x68387498, 0x31c859a5, 0x68423a2a, 0x31c072fb,
-    0x684bfe2f, 0x31b88a66, 0x6855c0a6, 0x31b09fe7,
-    0x685f8190, 0x31a8b37c, 0x686940ea, 0x31a0c528,
-    0x6872feb6, 0x3198d4ea, 0x687cbaf3, 0x3190e2c3,
-    0x688675a0, 0x3188eeb2, 0x68902ebd, 0x3180f8b8,
-    0x6899e64a, 0x317900d6, 0x68a39c46, 0x3171070c,
-    0x68ad50b1, 0x31690b59, 0x68b7038b, 0x31610dbf,
-    0x68c0b4d2, 0x31590e3e, 0x68ca6488, 0x31510cd5,
-    0x68d412ab, 0x31490986, 0x68ddbf3b, 0x31410450,
-    0x68e76a37, 0x3138fd35, 0x68f113a0, 0x3130f433,
-    0x68fabb75, 0x3128e94c, 0x690461b5, 0x3120dc80,
-    0x690e0661, 0x3118cdcf, 0x6917a977, 0x3110bd39,
-    0x69214af8, 0x3108aabf, 0x692aeae3, 0x31009661,
-    0x69348937, 0x30f8801f, 0x693e25f5, 0x30f067fb,
-    0x6947c11c, 0x30e84df3, 0x69515aab, 0x30e03208,
-    0x695af2a3, 0x30d8143b, 0x69648902, 0x30cff48c,
-    0x696e1dc9, 0x30c7d2fb, 0x6977b0f7, 0x30bfaf89,
-    0x6981428c, 0x30b78a36, 0x698ad287, 0x30af6302,
-    0x699460e8, 0x30a739ed, 0x699dedaf, 0x309f0ef8,
-    0x69a778db, 0x3096e223, 0x69b1026c, 0x308eb36f,
-    0x69ba8a61, 0x308682dc, 0x69c410ba, 0x307e5069,
-    0x69cd9578, 0x30761c18, 0x69d71899, 0x306de5e9,
-    0x69e09a1c, 0x3065addb, 0x69ea1a03, 0x305d73f0,
-    0x69f3984c, 0x30553828, 0x69fd14f6, 0x304cfa83,
-    0x6a069003, 0x3044bb00, 0x6a100970, 0x303c79a2,
-    0x6a19813f, 0x30343667, 0x6a22f76e, 0x302bf151,
-    0x6a2c6bfd, 0x3023aa5f, 0x6a35deeb, 0x301b6193,
-    0x6a3f503a, 0x301316eb, 0x6a48bfe7, 0x300aca69,
-    0x6a522df3, 0x30027c0c, 0x6a5b9a5d, 0x2ffa2bd6,
-    0x6a650525, 0x2ff1d9c7, 0x6a6e6e4b, 0x2fe985de,
-    0x6a77d5ce, 0x2fe1301c, 0x6a813bae, 0x2fd8d882,
-    0x6a8a9fea, 0x2fd07f0f, 0x6a940283, 0x2fc823c5,
-    0x6a9d6377, 0x2fbfc6a3, 0x6aa6c2c6, 0x2fb767aa,
-    0x6ab02071, 0x2faf06da, 0x6ab97c77, 0x2fa6a433,
-    0x6ac2d6d6, 0x2f9e3fb6, 0x6acc2f90, 0x2f95d963,
-    0x6ad586a3, 0x2f8d713a, 0x6adedc10, 0x2f85073c,
-    0x6ae82fd5, 0x2f7c9b69, 0x6af181f3, 0x2f742dc1,
-    0x6afad269, 0x2f6bbe45, 0x6b042137, 0x2f634cf5,
-    0x6b0d6e5c, 0x2f5ad9d1, 0x6b16b9d9, 0x2f5264da,
-    0x6b2003ac, 0x2f49ee0f, 0x6b294bd5, 0x2f417573,
-    0x6b329255, 0x2f38fb03, 0x6b3bd72a, 0x2f307ec2,
-    0x6b451a55, 0x2f2800af, 0x6b4e5bd4, 0x2f1f80ca,
-    0x6b579ba8, 0x2f16ff14, 0x6b60d9d0, 0x2f0e7b8e,
-    0x6b6a164d, 0x2f05f637, 0x6b73511c, 0x2efd6f10,
-    0x6b7c8a3f, 0x2ef4e619, 0x6b85c1b5, 0x2eec5b53,
-    0x6b8ef77d, 0x2ee3cebe, 0x6b982b97, 0x2edb405a,
-    0x6ba15e03, 0x2ed2b027, 0x6baa8ec0, 0x2eca1e27,
-    0x6bb3bdce, 0x2ec18a58, 0x6bbceb2d, 0x2eb8f4bc,
-    0x6bc616dd, 0x2eb05d53, 0x6bcf40dc, 0x2ea7c41e,
-    0x6bd8692b, 0x2e9f291b, 0x6be18fc9, 0x2e968c4d,
-    0x6beab4b6, 0x2e8dedb3, 0x6bf3d7f2, 0x2e854d4d,
-    0x6bfcf97c, 0x2e7cab1c, 0x6c061953, 0x2e740720,
-    0x6c0f3779, 0x2e6b615a, 0x6c1853eb, 0x2e62b9ca,
-    0x6c216eaa, 0x2e5a1070, 0x6c2a87b6, 0x2e51654c,
-    0x6c339f0e, 0x2e48b860, 0x6c3cb4b1, 0x2e4009aa,
-    0x6c45c8a0, 0x2e37592c, 0x6c4edada, 0x2e2ea6e6,
-    0x6c57eb5e, 0x2e25f2d8, 0x6c60fa2d, 0x2e1d3d03,
-    0x6c6a0746, 0x2e148566, 0x6c7312a9, 0x2e0bcc03,
-    0x6c7c1c55, 0x2e0310d9, 0x6c85244a, 0x2dfa53e9,
-    0x6c8e2a87, 0x2df19534, 0x6c972f0d, 0x2de8d4b8,
-    0x6ca031da, 0x2de01278, 0x6ca932ef, 0x2dd74e73,
-    0x6cb2324c, 0x2dce88aa, 0x6cbb2fef, 0x2dc5c11c,
-    0x6cc42bd9, 0x2dbcf7cb, 0x6ccd2609, 0x2db42cb6,
-    0x6cd61e7f, 0x2dab5fdf, 0x6cdf153a, 0x2da29144,
-    0x6ce80a3a, 0x2d99c0e7, 0x6cf0fd80, 0x2d90eec8,
-    0x6cf9ef09, 0x2d881ae8, 0x6d02ded7, 0x2d7f4545,
-    0x6d0bcce8, 0x2d766de2, 0x6d14b93d, 0x2d6d94bf,
-    0x6d1da3d5, 0x2d64b9da, 0x6d268cb0, 0x2d5bdd36,
-    0x6d2f73cd, 0x2d52fed2, 0x6d38592c, 0x2d4a1eaf,
-    0x6d413ccd, 0x2d413ccd, 0x6d4a1eaf, 0x2d38592c,
-    0x6d52fed2, 0x2d2f73cd, 0x6d5bdd36, 0x2d268cb0,
-    0x6d64b9da, 0x2d1da3d5, 0x6d6d94bf, 0x2d14b93d,
-    0x6d766de2, 0x2d0bcce8, 0x6d7f4545, 0x2d02ded7,
-    0x6d881ae8, 0x2cf9ef09, 0x6d90eec8, 0x2cf0fd80,
-    0x6d99c0e7, 0x2ce80a3a, 0x6da29144, 0x2cdf153a,
-    0x6dab5fdf, 0x2cd61e7f, 0x6db42cb6, 0x2ccd2609,
-    0x6dbcf7cb, 0x2cc42bd9, 0x6dc5c11c, 0x2cbb2fef,
-    0x6dce88aa, 0x2cb2324c, 0x6dd74e73, 0x2ca932ef,
-    0x6de01278, 0x2ca031da, 0x6de8d4b8, 0x2c972f0d,
-    0x6df19534, 0x2c8e2a87, 0x6dfa53e9, 0x2c85244a,
-    0x6e0310d9, 0x2c7c1c55, 0x6e0bcc03, 0x2c7312a9,
-    0x6e148566, 0x2c6a0746, 0x6e1d3d03, 0x2c60fa2d,
-    0x6e25f2d8, 0x2c57eb5e, 0x6e2ea6e6, 0x2c4edada,
-    0x6e37592c, 0x2c45c8a0, 0x6e4009aa, 0x2c3cb4b1,
-    0x6e48b860, 0x2c339f0e, 0x6e51654c, 0x2c2a87b6,
-    0x6e5a1070, 0x2c216eaa, 0x6e62b9ca, 0x2c1853eb,
-    0x6e6b615a, 0x2c0f3779, 0x6e740720, 0x2c061953,
-    0x6e7cab1c, 0x2bfcf97c, 0x6e854d4d, 0x2bf3d7f2,
-    0x6e8dedb3, 0x2beab4b6, 0x6e968c4d, 0x2be18fc9,
-    0x6e9f291b, 0x2bd8692b, 0x6ea7c41e, 0x2bcf40dc,
-    0x6eb05d53, 0x2bc616dd, 0x6eb8f4bc, 0x2bbceb2d,
-    0x6ec18a58, 0x2bb3bdce, 0x6eca1e27, 0x2baa8ec0,
-    0x6ed2b027, 0x2ba15e03, 0x6edb405a, 0x2b982b97,
-    0x6ee3cebe, 0x2b8ef77d, 0x6eec5b53, 0x2b85c1b5,
-    0x6ef4e619, 0x2b7c8a3f, 0x6efd6f10, 0x2b73511c,
-    0x6f05f637, 0x2b6a164d, 0x6f0e7b8e, 0x2b60d9d0,
-    0x6f16ff14, 0x2b579ba8, 0x6f1f80ca, 0x2b4e5bd4,
-    0x6f2800af, 0x2b451a55, 0x6f307ec2, 0x2b3bd72a,
-    0x6f38fb03, 0x2b329255, 0x6f417573, 0x2b294bd5,
-    0x6f49ee0f, 0x2b2003ac, 0x6f5264da, 0x2b16b9d9,
-    0x6f5ad9d1, 0x2b0d6e5c, 0x6f634cf5, 0x2b042137,
-    0x6f6bbe45, 0x2afad269, 0x6f742dc1, 0x2af181f3,
-    0x6f7c9b69, 0x2ae82fd5, 0x6f85073c, 0x2adedc10,
-    0x6f8d713a, 0x2ad586a3, 0x6f95d963, 0x2acc2f90,
-    0x6f9e3fb6, 0x2ac2d6d6, 0x6fa6a433, 0x2ab97c77,
-    0x6faf06da, 0x2ab02071, 0x6fb767aa, 0x2aa6c2c6,
-    0x6fbfc6a3, 0x2a9d6377, 0x6fc823c5, 0x2a940283,
-    0x6fd07f0f, 0x2a8a9fea, 0x6fd8d882, 0x2a813bae,
-    0x6fe1301c, 0x2a77d5ce, 0x6fe985de, 0x2a6e6e4b,
-    0x6ff1d9c7, 0x2a650525, 0x6ffa2bd6, 0x2a5b9a5d,
-    0x70027c0c, 0x2a522df3, 0x700aca69, 0x2a48bfe7,
-    0x701316eb, 0x2a3f503a, 0x701b6193, 0x2a35deeb,
-    0x7023aa5f, 0x2a2c6bfd, 0x702bf151, 0x2a22f76e,
-    0x70343667, 0x2a19813f, 0x703c79a2, 0x2a100970,
-    0x7044bb00, 0x2a069003, 0x704cfa83, 0x29fd14f6,
-    0x70553828, 0x29f3984c, 0x705d73f0, 0x29ea1a03,
-    0x7065addb, 0x29e09a1c, 0x706de5e9, 0x29d71899,
-    0x70761c18, 0x29cd9578, 0x707e5069, 0x29c410ba,
-    0x708682dc, 0x29ba8a61, 0x708eb36f, 0x29b1026c,
-    0x7096e223, 0x29a778db, 0x709f0ef8, 0x299dedaf,
-    0x70a739ed, 0x299460e8, 0x70af6302, 0x298ad287,
-    0x70b78a36, 0x2981428c, 0x70bfaf89, 0x2977b0f7,
-    0x70c7d2fb, 0x296e1dc9, 0x70cff48c, 0x29648902,
-    0x70d8143b, 0x295af2a3, 0x70e03208, 0x29515aab,
-    0x70e84df3, 0x2947c11c, 0x70f067fb, 0x293e25f5,
-    0x70f8801f, 0x29348937, 0x71009661, 0x292aeae3,
-    0x7108aabf, 0x29214af8, 0x7110bd39, 0x2917a977,
-    0x7118cdcf, 0x290e0661, 0x7120dc80, 0x290461b5,
-    0x7128e94c, 0x28fabb75, 0x7130f433, 0x28f113a0,
-    0x7138fd35, 0x28e76a37, 0x71410450, 0x28ddbf3b,
-    0x71490986, 0x28d412ab, 0x71510cd5, 0x28ca6488,
-    0x71590e3e, 0x28c0b4d2, 0x71610dbf, 0x28b7038b,
-    0x71690b59, 0x28ad50b1, 0x7171070c, 0x28a39c46,
-    0x717900d6, 0x2899e64a, 0x7180f8b8, 0x28902ebd,
-    0x7188eeb2, 0x288675a0, 0x7190e2c3, 0x287cbaf3,
-    0x7198d4ea, 0x2872feb6, 0x71a0c528, 0x286940ea,
-    0x71a8b37c, 0x285f8190, 0x71b09fe7, 0x2855c0a6,
-    0x71b88a66, 0x284bfe2f, 0x71c072fb, 0x28423a2a,
-    0x71c859a5, 0x28387498, 0x71d03e64, 0x282ead78,
-    0x71d82137, 0x2824e4cc, 0x71e0021e, 0x281b1a94,
-    0x71e7e118, 0x28114ed0, 0x71efbe27, 0x28078181,
-    0x71f79948, 0x27fdb2a7, 0x71ff727c, 0x27f3e241,
-    0x720749c3, 0x27ea1052, 0x720f1f1c, 0x27e03cd8,
-    0x7216f287, 0x27d667d5, 0x721ec403, 0x27cc9149,
-    0x72269391, 0x27c2b934, 0x722e6130, 0x27b8df97,
-    0x72362ce0, 0x27af0472, 0x723df6a0, 0x27a527c4,
-    0x7245be70, 0x279b4990, 0x724d8450, 0x279169d5,
-    0x72554840, 0x27878893, 0x725d0a3e, 0x277da5cb,
-    0x7264ca4c, 0x2773c17d, 0x726c8868, 0x2769dbaa,
-    0x72744493, 0x275ff452, 0x727bfecc, 0x27560b76,
-    0x7283b712, 0x274c2115, 0x728b6d66, 0x27423530,
-    0x729321c7, 0x273847c8, 0x729ad435, 0x272e58dc,
-    0x72a284b0, 0x2724686e, 0x72aa3336, 0x271a767e,
-    0x72b1dfc9, 0x2710830c, 0x72b98a67, 0x27068e18,
-    0x72c13311, 0x26fc97a3, 0x72c8d9c6, 0x26f29fad,
-    0x72d07e85, 0x26e8a637, 0x72d82150, 0x26deab41,
-    0x72dfc224, 0x26d4aecb, 0x72e76102, 0x26cab0d6,
-    0x72eefdea, 0x26c0b162, 0x72f698db, 0x26b6b070,
-    0x72fe31d5, 0x26acadff, 0x7305c8d7, 0x26a2aa11,
-    0x730d5de3, 0x2698a4a6, 0x7314f0f6, 0x268e9dbd,
-    0x731c8211, 0x26849558, 0x73241134, 0x267a8b77,
-    0x732b9e5e, 0x2670801a, 0x7333298f, 0x26667342,
-    0x733ab2c6, 0x265c64ef, 0x73423a04, 0x26525521,
-    0x7349bf48, 0x264843d9, 0x73514292, 0x263e3117,
-    0x7358c3e2, 0x26341cdb, 0x73604336, 0x262a0727,
-    0x7367c090, 0x261feffa, 0x736f3bee, 0x2615d754,
-    0x7376b551, 0x260bbd37, 0x737e2cb7, 0x2601a1a2,
-    0x7385a222, 0x25f78497, 0x738d1590, 0x25ed6614,
-    0x73948701, 0x25e3461b, 0x739bf675, 0x25d924ac,
-    0x73a363ec, 0x25cf01c8, 0x73aacf65, 0x25c4dd6e,
-    0x73b238e0, 0x25bab7a0, 0x73b9a05d, 0x25b0905d,
-    0x73c105db, 0x25a667a7, 0x73c8695b, 0x259c3d7c,
-    0x73cfcadc, 0x259211df, 0x73d72a5d, 0x2587e4cf,
-    0x73de87de, 0x257db64c, 0x73e5e360, 0x25738657,
-    0x73ed3ce1, 0x256954f1, 0x73f49462, 0x255f2219,
-    0x73fbe9e2, 0x2554edd1, 0x74033d61, 0x254ab818,
-    0x740a8edf, 0x254080ef, 0x7411de5b, 0x25364857,
-    0x74192bd5, 0x252c0e4f, 0x7420774d, 0x2521d2d8,
-    0x7427c0c3, 0x251795f3, 0x742f0836, 0x250d57a0,
-    0x74364da6, 0x250317df, 0x743d9112, 0x24f8d6b0,
-    0x7444d27b, 0x24ee9415, 0x744c11e0, 0x24e4500e,
-    0x74534f41, 0x24da0a9a, 0x745a8a9d, 0x24cfc3ba,
-    0x7461c3f5, 0x24c57b6f, 0x7468fb47, 0x24bb31ba,
-    0x74703095, 0x24b0e699, 0x747763dd, 0x24a69a0f,
-    0x747e951f, 0x249c4c1b, 0x7485c45b, 0x2491fcbe,
-    0x748cf190, 0x2487abf7, 0x74941cbf, 0x247d59c8,
-    0x749b45e7, 0x24730631, 0x74a26d08, 0x2468b132,
-    0x74a99221, 0x245e5acc, 0x74b0b533, 0x245402ff,
-    0x74b7d63c, 0x2449a9cc, 0x74bef53d, 0x243f4f32,
-    0x74c61236, 0x2434f332, 0x74cd2d26, 0x242a95ce,
-    0x74d4460c, 0x24203704, 0x74db5cea, 0x2415d6d5,
-    0x74e271bd, 0x240b7543, 0x74e98487, 0x2401124d,
-    0x74f09546, 0x23f6adf3, 0x74f7a3fb, 0x23ec4837,
-    0x74feb0a5, 0x23e1e117, 0x7505bb44, 0x23d77896,
-    0x750cc3d8, 0x23cd0eb3, 0x7513ca60, 0x23c2a36f,
-    0x751acedd, 0x23b836ca, 0x7521d14d, 0x23adc8c4,
-    0x7528d1b1, 0x23a3595e, 0x752fd008, 0x2398e898,
-    0x7536cc52, 0x238e7673, 0x753dc68f, 0x238402ef,
-    0x7544bebf, 0x23798e0d, 0x754bb4e1, 0x236f17cc,
-    0x7552a8f4, 0x2364a02e, 0x75599afa, 0x235a2733,
-    0x75608af1, 0x234facda, 0x756778d9, 0x23453125,
-    0x756e64b2, 0x233ab414, 0x75754e7c, 0x233035a7,
-    0x757c3636, 0x2325b5df, 0x75831be0, 0x231b34bc,
-    0x7589ff7a, 0x2310b23e, 0x7590e104, 0x23062e67,
-    0x7597c07d, 0x22fba936, 0x759e9de5, 0x22f122ab,
-    0x75a5793c, 0x22e69ac8, 0x75ac5282, 0x22dc118c,
-    0x75b329b5, 0x22d186f8, 0x75b9fed7, 0x22c6fb0c,
-    0x75c0d1e7, 0x22bc6dca, 0x75c7a2e3, 0x22b1df30,
-    0x75ce71ce, 0x22a74f40, 0x75d53ea5, 0x229cbdfa,
-    0x75dc0968, 0x22922b5e, 0x75e2d219, 0x2287976e,
-    0x75e998b5, 0x227d0228, 0x75f05d3d, 0x22726b8e,
-    0x75f71fb1, 0x2267d3a0, 0x75fde011, 0x225d3a5e,
-    0x76049e5b, 0x22529fca, 0x760b5a90, 0x224803e2,
-    0x761214b0, 0x223d66a8, 0x7618ccba, 0x2232c81c,
-    0x761f82af, 0x2228283f, 0x7626368d, 0x221d8711,
-    0x762ce855, 0x2212e492, 0x76339806, 0x220840c2,
-    0x763a45a0, 0x21fd9ba3, 0x7640f123, 0x21f2f534,
-    0x76479a8e, 0x21e84d76, 0x764e41e2, 0x21dda46a,
-    0x7654e71d, 0x21d2fa0f, 0x765b8a41, 0x21c84e67,
-    0x76622b4c, 0x21bda171, 0x7668ca3e, 0x21b2f32e,
-    0x766f6717, 0x21a8439e, 0x767601d7, 0x219d92c2,
-    0x767c9a7e, 0x2192e09b, 0x7683310b, 0x21882d28,
-    0x7689c57d, 0x217d786a, 0x769057d6, 0x2172c262,
-    0x7696e814, 0x21680b0f, 0x769d7637, 0x215d5273,
-    0x76a4023f, 0x2152988d, 0x76aa8c2c, 0x2147dd5f,
-    0x76b113fd, 0x213d20e8, 0x76b799b3, 0x21326329,
-    0x76be1d4c, 0x2127a423, 0x76c49ec9, 0x211ce3d5,
-    0x76cb1e2a, 0x21122240, 0x76d19b6e, 0x21075f65,
-    0x76d81695, 0x20fc9b44, 0x76de8f9e, 0x20f1d5de,
-    0x76e5068a, 0x20e70f32, 0x76eb7b58, 0x20dc4742,
-    0x76f1ee09, 0x20d17e0d, 0x76f85e9a, 0x20c6b395,
-    0x76fecd0e, 0x20bbe7d8, 0x77053962, 0x20b11ad9,
-    0x770ba398, 0x20a64c97, 0x77120bae, 0x209b7d13,
-    0x771871a5, 0x2090ac4d, 0x771ed57c, 0x2085da46,
-    0x77253733, 0x207b06fe, 0x772b96ca, 0x20703275,
-    0x7731f440, 0x20655cac, 0x77384f95, 0x205a85a3,
-    0x773ea8ca, 0x204fad5b, 0x7744ffdd, 0x2044d3d4,
-    0x774b54ce, 0x2039f90f, 0x7751a79e, 0x202f1d0b,
-    0x7757f84c, 0x20243fca, 0x775e46d8, 0x2019614c,
-    0x77649341, 0x200e8190, 0x776add88, 0x2003a099,
-    0x777125ac, 0x1ff8be65, 0x77776bac, 0x1feddaf6,
-    0x777daf89, 0x1fe2f64c, 0x7783f143, 0x1fd81067,
-    0x778a30d8, 0x1fcd2948, 0x77906e49, 0x1fc240ef,
-    0x7796a996, 0x1fb7575c, 0x779ce2be, 0x1fac6c91,
-    0x77a319c2, 0x1fa1808c, 0x77a94ea0, 0x1f969350,
-    0x77af8159, 0x1f8ba4dc, 0x77b5b1ec, 0x1f80b531,
-    0x77bbe05a, 0x1f75c44e, 0x77c20ca1, 0x1f6ad235,
-    0x77c836c2, 0x1f5fdee6, 0x77ce5ebd, 0x1f54ea62,
-    0x77d48490, 0x1f49f4a8, 0x77daa83d, 0x1f3efdb9,
-    0x77e0c9c3, 0x1f340596, 0x77e6e921, 0x1f290c3f,
-    0x77ed0657, 0x1f1e11b5, 0x77f32165, 0x1f1315f7,
-    0x77f93a4b, 0x1f081907, 0x77ff5109, 0x1efd1ae4,
-    0x7805659e, 0x1ef21b90, 0x780b780a, 0x1ee71b0a,
-    0x7811884d, 0x1edc1953, 0x78179666, 0x1ed1166b,
-    0x781da256, 0x1ec61254, 0x7823ac1d, 0x1ebb0d0d,
-    0x7829b3b9, 0x1eb00696, 0x782fb92a, 0x1ea4fef0,
-    0x7835bc71, 0x1e99f61d, 0x783bbd8e, 0x1e8eec1b,
-    0x7841bc7f, 0x1e83e0eb, 0x7847b946, 0x1e78d48e,
-    0x784db3e0, 0x1e6dc705, 0x7853ac4f, 0x1e62b84f,
-    0x7859a292, 0x1e57a86d, 0x785f96a9, 0x1e4c9760,
-    0x78658894, 0x1e418528, 0x786b7852, 0x1e3671c5,
-    0x787165e3, 0x1e2b5d38, 0x78775147, 0x1e204781,
-    0x787d3a7e, 0x1e1530a1, 0x78832187, 0x1e0a1898,
-    0x78890663, 0x1dfeff67, 0x788ee910, 0x1df3e50d,
-    0x7894c98f, 0x1de8c98c, 0x789aa7e0, 0x1dddace4,
-    0x78a08402, 0x1dd28f15, 0x78a65df6, 0x1dc7701f,
-    0x78ac35ba, 0x1dbc5004, 0x78b20b4f, 0x1db12ec3,
-    0x78b7deb4, 0x1da60c5d, 0x78bdafea, 0x1d9ae8d2,
-    0x78c37eef, 0x1d8fc424, 0x78c94bc4, 0x1d849e51,
-    0x78cf1669, 0x1d79775c, 0x78d4dedd, 0x1d6e4f43,
-    0x78daa520, 0x1d632608, 0x78e06932, 0x1d57fbaa,
-    0x78e62b13, 0x1d4cd02c, 0x78ebeac2, 0x1d41a38c,
-    0x78f1a840, 0x1d3675cb, 0x78f7638b, 0x1d2b46ea,
-    0x78fd1ca4, 0x1d2016e9, 0x7902d38b, 0x1d14e5c9,
-    0x7908883f, 0x1d09b389, 0x790e3ac0, 0x1cfe802b,
-    0x7913eb0e, 0x1cf34baf, 0x79199929, 0x1ce81615,
-    0x791f4510, 0x1cdcdf5e, 0x7924eec3, 0x1cd1a78a,
-    0x792a9642, 0x1cc66e99, 0x79303b8e, 0x1cbb348d,
-    0x7935dea4, 0x1caff965, 0x793b7f86, 0x1ca4bd21,
-    0x79411e33, 0x1c997fc4, 0x7946baac, 0x1c8e414b,
-    0x794c54ee, 0x1c8301b9, 0x7951ecfc, 0x1c77c10e,
-    0x795782d3, 0x1c6c7f4a, 0x795d1675, 0x1c613c6d,
-    0x7962a7e0, 0x1c55f878, 0x79683715, 0x1c4ab36b,
-    0x796dc414, 0x1c3f6d47, 0x79734edc, 0x1c34260c,
-    0x7978d76c, 0x1c28ddbb, 0x797e5dc6, 0x1c1d9454,
-    0x7983e1e8, 0x1c1249d8, 0x798963d2, 0x1c06fe46,
-    0x798ee385, 0x1bfbb1a0, 0x799460ff, 0x1bf063e6,
-    0x7999dc42, 0x1be51518, 0x799f554b, 0x1bd9c537,
-    0x79a4cc1c, 0x1bce7442, 0x79aa40b4, 0x1bc3223c,
-    0x79afb313, 0x1bb7cf23, 0x79b52339, 0x1bac7af9,
-    0x79ba9125, 0x1ba125bd, 0x79bffcd7, 0x1b95cf71,
-    0x79c5664f, 0x1b8a7815, 0x79cacd8d, 0x1b7f1fa9,
-    0x79d03291, 0x1b73c62d, 0x79d5955a, 0x1b686ba3,
-    0x79daf5e8, 0x1b5d100a, 0x79e0543c, 0x1b51b363,
-    0x79e5b054, 0x1b4655ae, 0x79eb0a31, 0x1b3af6ec,
-    0x79f061d2, 0x1b2f971e, 0x79f5b737, 0x1b243643,
-    0x79fb0a60, 0x1b18d45c, 0x7a005b4d, 0x1b0d716a,
-    0x7a05a9fd, 0x1b020d6c, 0x7a0af671, 0x1af6a865,
-    0x7a1040a8, 0x1aeb4253, 0x7a1588a2, 0x1adfdb37,
-    0x7a1ace5f, 0x1ad47312, 0x7a2011de, 0x1ac909e5,
-    0x7a25531f, 0x1abd9faf, 0x7a2a9223, 0x1ab23471,
-    0x7a2fcee8, 0x1aa6c82b, 0x7a350970, 0x1a9b5adf,
-    0x7a3a41b9, 0x1a8fec8c, 0x7a3f77c3, 0x1a847d33,
-    0x7a44ab8e, 0x1a790cd4, 0x7a49dd1a, 0x1a6d9b70,
-    0x7a4f0c67, 0x1a622907, 0x7a543974, 0x1a56b599,
-    0x7a596442, 0x1a4b4128, 0x7a5e8cd0, 0x1a3fcbb3,
-    0x7a63b31d, 0x1a34553b, 0x7a68d72b, 0x1a28ddc0,
-    0x7a6df8f8, 0x1a1d6544, 0x7a731884, 0x1a11ebc5,
-    0x7a7835cf, 0x1a067145, 0x7a7d50da, 0x19faf5c5,
-    0x7a8269a3, 0x19ef7944, 0x7a87802a, 0x19e3fbc3,
-    0x7a8c9470, 0x19d87d42, 0x7a91a674, 0x19ccfdc2,
-    0x7a96b636, 0x19c17d44, 0x7a9bc3b6, 0x19b5fbc8,
-    0x7aa0cef3, 0x19aa794d, 0x7aa5d7ee, 0x199ef5d6,
-    0x7aaadea6, 0x19937161, 0x7aafe31b, 0x1987ebf0,
-    0x7ab4e54c, 0x197c6584, 0x7ab9e53a, 0x1970de1b,
-    0x7abee2e5, 0x196555b8, 0x7ac3de4c, 0x1959cc5a,
-    0x7ac8d76f, 0x194e4201, 0x7acdce4d, 0x1942b6af,
-    0x7ad2c2e8, 0x19372a64, 0x7ad7b53d, 0x192b9d1f,
-    0x7adca54e, 0x19200ee3, 0x7ae1931a, 0x19147fae,
-    0x7ae67ea1, 0x1908ef82, 0x7aeb67e3, 0x18fd5e5f,
-    0x7af04edf, 0x18f1cc45, 0x7af53395, 0x18e63935,
-    0x7afa1605, 0x18daa52f, 0x7afef630, 0x18cf1034,
-    0x7b03d414, 0x18c37a44, 0x7b08afb2, 0x18b7e35f,
-    0x7b0d8909, 0x18ac4b87, 0x7b126019, 0x18a0b2bb,
-    0x7b1734e2, 0x189518fc, 0x7b1c0764, 0x18897e4a,
-    0x7b20d79e, 0x187de2a7, 0x7b25a591, 0x18724611,
-    0x7b2a713d, 0x1866a88a, 0x7b2f3aa0, 0x185b0a13,
-    0x7b3401bb, 0x184f6aab, 0x7b38c68e, 0x1843ca53,
-    0x7b3d8918, 0x1838290c, 0x7b42495a, 0x182c86d5,
-    0x7b470753, 0x1820e3b0, 0x7b4bc303, 0x18153f9d,
-    0x7b507c69, 0x18099a9c, 0x7b553386, 0x17fdf4ae,
-    0x7b59e85a, 0x17f24dd3, 0x7b5e9ae4, 0x17e6a60c,
-    0x7b634b23, 0x17dafd59, 0x7b67f919, 0x17cf53bb,
-    0x7b6ca4c4, 0x17c3a931, 0x7b714e25, 0x17b7fdbd,
-    0x7b75f53c, 0x17ac515f, 0x7b7a9a07, 0x17a0a417,
-    0x7b7f3c87, 0x1794f5e6, 0x7b83dcbc, 0x178946cc,
-    0x7b887aa6, 0x177d96ca, 0x7b8d1644, 0x1771e5e0,
-    0x7b91af97, 0x1766340f, 0x7b96469d, 0x175a8157,
-    0x7b9adb57, 0x174ecdb8, 0x7b9f6dc5, 0x17431933,
-    0x7ba3fde7, 0x173763c9, 0x7ba88bbc, 0x172bad7a,
-    0x7bad1744, 0x171ff646, 0x7bb1a080, 0x17143e2d,
-    0x7bb6276e, 0x17088531, 0x7bbaac0e, 0x16fccb51,
-    0x7bbf2e62, 0x16f1108f, 0x7bc3ae67, 0x16e554ea,
-    0x7bc82c1f, 0x16d99864, 0x7bcca789, 0x16cddafb,
-    0x7bd120a4, 0x16c21cb2, 0x7bd59771, 0x16b65d88,
-    0x7bda0bf0, 0x16aa9d7e, 0x7bde7e20, 0x169edc94,
-    0x7be2ee01, 0x16931acb, 0x7be75b93, 0x16875823,
-    0x7bebc6d5, 0x167b949d, 0x7bf02fc9, 0x166fd039,
-    0x7bf4966c, 0x16640af7, 0x7bf8fac0, 0x165844d8,
-    0x7bfd5cc4, 0x164c7ddd, 0x7c01bc78, 0x1640b606,
-    0x7c0619dc, 0x1634ed53, 0x7c0a74f0, 0x162923c5,
-    0x7c0ecdb2, 0x161d595d, 0x7c132424, 0x16118e1a,
-    0x7c177845, 0x1605c1fd, 0x7c1bca16, 0x15f9f507,
-    0x7c201994, 0x15ee2738, 0x7c2466c2, 0x15e25890,
-    0x7c28b19e, 0x15d68911, 0x7c2cfa28, 0x15cab8ba,
-    0x7c314060, 0x15bee78c, 0x7c358446, 0x15b31587,
-    0x7c39c5da, 0x15a742ac, 0x7c3e051b, 0x159b6efb,
-    0x7c42420a, 0x158f9a76, 0x7c467ca6, 0x1583c51b,
-    0x7c4ab4ef, 0x1577eeec, 0x7c4eeae5, 0x156c17e9,
-    0x7c531e88, 0x15604013, 0x7c574fd8, 0x1554676a,
-    0x7c5b7ed4, 0x15488dee, 0x7c5fab7c, 0x153cb3a0,
-    0x7c63d5d1, 0x1530d881, 0x7c67fdd1, 0x1524fc90,
-    0x7c6c237e, 0x15191fcf, 0x7c7046d6, 0x150d423d,
-    0x7c7467d9, 0x150163dc, 0x7c788688, 0x14f584ac,
-    0x7c7ca2e2, 0x14e9a4ac, 0x7c80bce7, 0x14ddc3de,
-    0x7c84d496, 0x14d1e242, 0x7c88e9f1, 0x14c5ffd9,
-    0x7c8cfcf6, 0x14ba1ca3, 0x7c910da5, 0x14ae38a0,
-    0x7c951bff, 0x14a253d1, 0x7c992803, 0x14966e36,
-    0x7c9d31b0, 0x148a87d1, 0x7ca13908, 0x147ea0a0,
-    0x7ca53e09, 0x1472b8a5, 0x7ca940b3, 0x1466cfe1,
-    0x7cad4107, 0x145ae653, 0x7cb13f04, 0x144efbfc,
-    0x7cb53aaa, 0x144310dd, 0x7cb933f9, 0x143724f5,
-    0x7cbd2af0, 0x142b3846, 0x7cc11f90, 0x141f4ad1,
-    0x7cc511d9, 0x14135c94, 0x7cc901c9, 0x14076d91,
-    0x7cccef62, 0x13fb7dc9, 0x7cd0daa2, 0x13ef8d3c,
-    0x7cd4c38b, 0x13e39be9, 0x7cd8aa1b, 0x13d7a9d3,
-    0x7cdc8e52, 0x13cbb6f8, 0x7ce07031, 0x13bfc35b,
-    0x7ce44fb7, 0x13b3cefa, 0x7ce82ce4, 0x13a7d9d7,
-    0x7cec07b8, 0x139be3f2, 0x7cefe032, 0x138fed4b,
-    0x7cf3b653, 0x1383f5e3, 0x7cf78a1b, 0x1377fdbb,
-    0x7cfb5b89, 0x136c04d2, 0x7cff2a9d, 0x13600b2a,
-    0x7d02f757, 0x135410c3, 0x7d06c1b6, 0x1348159d,
-    0x7d0a89bc, 0x133c19b8, 0x7d0e4f67, 0x13301d16,
-    0x7d1212b7, 0x13241fb6, 0x7d15d3ad, 0x1318219a,
-    0x7d199248, 0x130c22c1, 0x7d1d4e88, 0x1300232c,
-    0x7d21086c, 0x12f422db, 0x7d24bff6, 0x12e821cf,
-    0x7d287523, 0x12dc2009, 0x7d2c27f6, 0x12d01d89,
-    0x7d2fd86c, 0x12c41a4f, 0x7d338687, 0x12b8165b,
-    0x7d373245, 0x12ac11af, 0x7d3adba7, 0x12a00c4b,
-    0x7d3e82ae, 0x1294062f, 0x7d422757, 0x1287ff5b,
-    0x7d45c9a4, 0x127bf7d1, 0x7d496994, 0x126fef90,
-    0x7d4d0728, 0x1263e699, 0x7d50a25e, 0x1257dced,
-    0x7d543b37, 0x124bd28c, 0x7d57d1b3, 0x123fc776,
-    0x7d5b65d2, 0x1233bbac, 0x7d5ef793, 0x1227af2e,
-    0x7d6286f6, 0x121ba1fd, 0x7d6613fb, 0x120f941a,
-    0x7d699ea3, 0x12038584, 0x7d6d26ec, 0x11f7763c,
-    0x7d70acd7, 0x11eb6643, 0x7d743064, 0x11df5599,
-    0x7d77b192, 0x11d3443f, 0x7d7b3061, 0x11c73235,
-    0x7d7eacd2, 0x11bb1f7c, 0x7d8226e4, 0x11af0c13,
-    0x7d859e96, 0x11a2f7fc, 0x7d8913ea, 0x1196e337,
-    0x7d8c86de, 0x118acdc4, 0x7d8ff772, 0x117eb7a4,
-    0x7d9365a8, 0x1172a0d7, 0x7d96d17d, 0x1166895f,
-    0x7d9a3af2, 0x115a713a, 0x7d9da208, 0x114e586a,
-    0x7da106bd, 0x11423ef0, 0x7da46912, 0x113624cb,
-    0x7da7c907, 0x112a09fc, 0x7dab269b, 0x111dee84,
-    0x7dae81cf, 0x1111d263, 0x7db1daa2, 0x1105b599,
-    0x7db53113, 0x10f99827, 0x7db88524, 0x10ed7a0e,
-    0x7dbbd6d4, 0x10e15b4e, 0x7dbf2622, 0x10d53be7,
-    0x7dc2730f, 0x10c91bda, 0x7dc5bd9b, 0x10bcfb28,
-    0x7dc905c5, 0x10b0d9d0, 0x7dcc4b8d, 0x10a4b7d3,
-    0x7dcf8ef3, 0x10989532, 0x7dd2cff7, 0x108c71ee,
-    0x7dd60e99, 0x10804e06, 0x7dd94ad8, 0x1074297b,
-    0x7ddc84b5, 0x1068044e, 0x7ddfbc30, 0x105bde7f,
-    0x7de2f148, 0x104fb80e, 0x7de623fd, 0x104390fd,
-    0x7de9544f, 0x1037694b, 0x7dec823e, 0x102b40f8,
-    0x7defadca, 0x101f1807, 0x7df2d6f3, 0x1012ee76,
-    0x7df5fdb8, 0x1006c446, 0x7df9221a, 0xffa9979,
-    0x7dfc4418, 0xfee6e0d, 0x7dff63b2, 0xfe24205,
-    0x7e0280e9, 0xfd6155f, 0x7e059bbb, 0xfc9e81e,
-    0x7e08b42a, 0xfbdba40, 0x7e0bca34, 0xfb18bc8,
-    0x7e0eddd9, 0xfa55cb4, 0x7e11ef1b, 0xf992d06,
-    0x7e14fdf7, 0xf8cfcbe, 0x7e180a6f, 0xf80cbdc,
-    0x7e1b1482, 0xf749a61, 0x7e1e1c30, 0xf68684e,
-    0x7e212179, 0xf5c35a3, 0x7e24245d, 0xf500260,
-    0x7e2724db, 0xf43ce86, 0x7e2a22f4, 0xf379a16,
-    0x7e2d1ea8, 0xf2b650f, 0x7e3017f6, 0xf1f2f73,
-    0x7e330ede, 0xf12f941, 0x7e360360, 0xf06c27a,
-    0x7e38f57c, 0xefa8b20, 0x7e3be532, 0xeee5331,
-    0x7e3ed282, 0xee21aaf, 0x7e41bd6c, 0xed5e19a,
-    0x7e44a5ef, 0xec9a7f3, 0x7e478c0b, 0xebd6db9,
-    0x7e4a6fc1, 0xeb132ef, 0x7e4d5110, 0xea4f793,
-    0x7e502ff9, 0xe98bba7, 0x7e530c7a, 0xe8c7f2a,
-    0x7e55e694, 0xe80421e, 0x7e58be47, 0xe740483,
-    0x7e5b9392, 0xe67c65a, 0x7e5e6676, 0xe5b87a2,
-    0x7e6136f3, 0xe4f485c, 0x7e640507, 0xe430889,
-    0x7e66d0b4, 0xe36c82a, 0x7e6999fa, 0xe2a873e,
-    0x7e6c60d7, 0xe1e45c6, 0x7e6f254c, 0xe1203c3,
-    0x7e71e759, 0xe05c135, 0x7e74a6fd, 0xdf97e1d,
-    0x7e77643a, 0xded3a7b, 0x7e7a1f0d, 0xde0f64f,
-    0x7e7cd778, 0xdd4b19a, 0x7e7f8d7b, 0xdc86c5d,
-    0x7e824114, 0xdbc2698, 0x7e84f245, 0xdafe04b,
-    0x7e87a10c, 0xda39978, 0x7e8a4d6a, 0xd97521d,
-    0x7e8cf75f, 0xd8b0a3d, 0x7e8f9eeb, 0xd7ec1d6,
-    0x7e92440d, 0xd7278eb, 0x7e94e6c6, 0xd662f7b,
-    0x7e978715, 0xd59e586, 0x7e9a24fb, 0xd4d9b0e,
-    0x7e9cc076, 0xd415013, 0x7e9f5988, 0xd350495,
-    0x7ea1f02f, 0xd28b894, 0x7ea4846c, 0xd1c6c11,
-    0x7ea7163f, 0xd101f0e, 0x7ea9a5a8, 0xd03d189,
-    0x7eac32a6, 0xcf78383, 0x7eaebd3a, 0xceb34fe,
-    0x7eb14563, 0xcdee5f9, 0x7eb3cb21, 0xcd29676,
-    0x7eb64e75, 0xcc64673, 0x7eb8cf5d, 0xcb9f5f3,
-    0x7ebb4ddb, 0xcada4f5, 0x7ebdc9ed, 0xca1537a,
-    0x7ec04394, 0xc950182, 0x7ec2bad0, 0xc88af0e,
-    0x7ec52fa0, 0xc7c5c1e, 0x7ec7a205, 0xc7008b3,
-    0x7eca11fe, 0xc63b4ce, 0x7ecc7f8b, 0xc57606e,
-    0x7eceeaad, 0xc4b0b94, 0x7ed15363, 0xc3eb641,
-    0x7ed3b9ad, 0xc326075, 0x7ed61d8a, 0xc260a31,
-    0x7ed87efc, 0xc19b374, 0x7edade01, 0xc0d5c41,
-    0x7edd3a9a, 0xc010496, 0x7edf94c7, 0xbf4ac75,
-    0x7ee1ec87, 0xbe853de, 0x7ee441da, 0xbdbfad1,
-    0x7ee694c1, 0xbcfa150, 0x7ee8e53a, 0xbc34759,
-    0x7eeb3347, 0xbb6ecef, 0x7eed7ee7, 0xbaa9211,
-    0x7eefc81a, 0xb9e36c0, 0x7ef20ee0, 0xb91dafc,
-    0x7ef45338, 0xb857ec7, 0x7ef69523, 0xb79221f,
-    0x7ef8d4a1, 0xb6cc506, 0x7efb11b1, 0xb60677c,
-    0x7efd4c54, 0xb540982, 0x7eff8489, 0xb47ab19,
-    0x7f01ba50, 0xb3b4c40, 0x7f03eda9, 0xb2eecf8,
-    0x7f061e95, 0xb228d42, 0x7f084d12, 0xb162d1d,
-    0x7f0a7921, 0xb09cc8c, 0x7f0ca2c2, 0xafd6b8d,
-    0x7f0ec9f5, 0xaf10a22, 0x7f10eeb9, 0xae4a84b,
-    0x7f13110f, 0xad84609, 0x7f1530f7, 0xacbe35b,
-    0x7f174e70, 0xabf8043, 0x7f19697a, 0xab31cc1,
-    0x7f1b8215, 0xaa6b8d5, 0x7f1d9842, 0xa9a5480,
-    0x7f1fabff, 0xa8defc3, 0x7f21bd4e, 0xa818a9d,
-    0x7f23cc2e, 0xa752510, 0x7f25d89e, 0xa68bf1b,
-    0x7f27e29f, 0xa5c58c0, 0x7f29ea31, 0xa4ff1fe,
-    0x7f2bef53, 0xa438ad7, 0x7f2df206, 0xa37234a,
-    0x7f2ff24a, 0xa2abb59, 0x7f31f01d, 0xa1e5303,
-    0x7f33eb81, 0xa11ea49, 0x7f35e476, 0xa05812c,
-    0x7f37dafa, 0x9f917ac, 0x7f39cf0e, 0x9ecadc9,
-    0x7f3bc0b3, 0x9e04385, 0x7f3dafe7, 0x9d3d8df,
-    0x7f3f9cab, 0x9c76dd8, 0x7f4186ff, 0x9bb0271,
-    0x7f436ee3, 0x9ae96aa, 0x7f455456, 0x9a22a83,
-    0x7f473759, 0x995bdfd, 0x7f4917eb, 0x9895118,
-    0x7f4af60d, 0x97ce3d5, 0x7f4cd1be, 0x9707635,
-    0x7f4eaafe, 0x9640837, 0x7f5081cd, 0x95799dd,
-    0x7f52562c, 0x94b2b27, 0x7f54281a, 0x93ebc14,
-    0x7f55f796, 0x9324ca7, 0x7f57c4a2, 0x925dcdf,
-    0x7f598f3c, 0x9196cbc, 0x7f5b5765, 0x90cfc40,
-    0x7f5d1d1d, 0x9008b6a, 0x7f5ee063, 0x8f41a3c,
-    0x7f60a138, 0x8e7a8b5, 0x7f625f9b, 0x8db36d6,
-    0x7f641b8d, 0x8cec4a0, 0x7f65d50d, 0x8c25213,
-    0x7f678c1c, 0x8b5df30, 0x7f6940b8, 0x8a96bf6,
-    0x7f6af2e3, 0x89cf867, 0x7f6ca29c, 0x8908483,
-    0x7f6e4fe3, 0x884104b, 0x7f6ffab8, 0x8779bbe,
-    0x7f71a31b, 0x86b26de, 0x7f73490b, 0x85eb1ab,
-    0x7f74ec8a, 0x8523c25, 0x7f768d96, 0x845c64d,
-    0x7f782c30, 0x8395024, 0x7f79c857, 0x82cd9a9,
-    0x7f7b620c, 0x82062de, 0x7f7cf94e, 0x813ebc2,
-    0x7f7e8e1e, 0x8077457, 0x7f80207b, 0x7fafc9c,
-    0x7f81b065, 0x7ee8493, 0x7f833ddd, 0x7e20c3b,
-    0x7f84c8e2, 0x7d59396, 0x7f865174, 0x7c91aa3,
-    0x7f87d792, 0x7bca163, 0x7f895b3e, 0x7b027d7,
-    0x7f8adc77, 0x7a3adff, 0x7f8c5b3d, 0x79733dc,
-    0x7f8dd78f, 0x78ab96e, 0x7f8f516e, 0x77e3eb5,
-    0x7f90c8da, 0x771c3b3, 0x7f923dd2, 0x7654867,
-    0x7f93b058, 0x758ccd2, 0x7f952069, 0x74c50f4,
-    0x7f968e07, 0x73fd4cf, 0x7f97f932, 0x7335862,
-    0x7f9961e8, 0x726dbae, 0x7f9ac82c, 0x71a5eb3,
-    0x7f9c2bfb, 0x70de172, 0x7f9d8d56, 0x70163eb,
-    0x7f9eec3e, 0x6f4e620, 0x7fa048b2, 0x6e86810,
-    0x7fa1a2b2, 0x6dbe9bb, 0x7fa2fa3d, 0x6cf6b23,
-    0x7fa44f55, 0x6c2ec48, 0x7fa5a1f9, 0x6b66d29,
-    0x7fa6f228, 0x6a9edc9, 0x7fa83fe3, 0x69d6e27,
-    0x7fa98b2a, 0x690ee44, 0x7faad3fd, 0x6846e1f,
-    0x7fac1a5b, 0x677edbb, 0x7fad5e45, 0x66b6d16,
-    0x7fae9fbb, 0x65eec33, 0x7fafdebb, 0x6526b10,
-    0x7fb11b48, 0x645e9af, 0x7fb2555f, 0x6396810,
-    0x7fb38d02, 0x62ce634, 0x7fb4c231, 0x620641a,
-    0x7fb5f4ea, 0x613e1c5, 0x7fb7252f, 0x6075f33,
-    0x7fb852ff, 0x5fadc66, 0x7fb97e5a, 0x5ee595d,
-    0x7fbaa740, 0x5e1d61b, 0x7fbbcdb1, 0x5d5529e,
-    0x7fbcf1ad, 0x5c8cee7, 0x7fbe1334, 0x5bc4af8,
-    0x7fbf3246, 0x5afc6d0, 0x7fc04ee3, 0x5a3426f,
-    0x7fc1690a, 0x596bdd7, 0x7fc280bc, 0x58a3908,
-    0x7fc395f9, 0x57db403, 0x7fc4a8c1, 0x5712ec7,
-    0x7fc5b913, 0x564a955, 0x7fc6c6f0, 0x55823ae,
-    0x7fc7d258, 0x54b9dd3, 0x7fc8db4a, 0x53f17c3,
-    0x7fc9e1c6, 0x532917f, 0x7fcae5cd, 0x5260b08,
-    0x7fcbe75e, 0x519845e, 0x7fcce67a, 0x50cfd82,
-    0x7fcde320, 0x5007674, 0x7fcedd50, 0x4f3ef35,
-    0x7fcfd50b, 0x4e767c5, 0x7fd0ca4f, 0x4dae024,
-    0x7fd1bd1e, 0x4ce5854, 0x7fd2ad77, 0x4c1d054,
-    0x7fd39b5a, 0x4b54825, 0x7fd486c7, 0x4a8bfc7,
-    0x7fd56fbe, 0x49c373c, 0x7fd6563f, 0x48fae83,
-    0x7fd73a4a, 0x483259d, 0x7fd81bdf, 0x4769c8b,
-    0x7fd8fafe, 0x46a134c, 0x7fd9d7a7, 0x45d89e2,
-    0x7fdab1d9, 0x451004d, 0x7fdb8996, 0x444768d,
-    0x7fdc5edc, 0x437eca4, 0x7fdd31ac, 0x42b6290,
-    0x7fde0205, 0x41ed854, 0x7fdecfe8, 0x4124dee,
-    0x7fdf9b55, 0x405c361, 0x7fe0644b, 0x3f938ac,
-    0x7fe12acb, 0x3ecadcf, 0x7fe1eed5, 0x3e022cc,
-    0x7fe2b067, 0x3d397a3, 0x7fe36f84, 0x3c70c54,
-    0x7fe42c2a, 0x3ba80df, 0x7fe4e659, 0x3adf546,
-    0x7fe59e12, 0x3a16988, 0x7fe65354, 0x394dda7,
-    0x7fe7061f, 0x38851a2, 0x7fe7b674, 0x37bc57b,
-    0x7fe86452, 0x36f3931, 0x7fe90fb9, 0x362acc5,
-    0x7fe9b8a9, 0x3562038, 0x7fea5f23, 0x3499389,
-    0x7feb0326, 0x33d06bb, 0x7feba4b2, 0x33079cc,
-    0x7fec43c7, 0x323ecbe, 0x7fece065, 0x3175f91,
-    0x7fed7a8c, 0x30ad245, 0x7fee123d, 0x2fe44dc,
-    0x7feea776, 0x2f1b755, 0x7fef3a39, 0x2e529b0,
-    0x7fefca84, 0x2d89bf0, 0x7ff05858, 0x2cc0e13,
-    0x7ff0e3b6, 0x2bf801a, 0x7ff16c9c, 0x2b2f207,
-    0x7ff1f30b, 0x2a663d8, 0x7ff27703, 0x299d590,
-    0x7ff2f884, 0x28d472e, 0x7ff3778e, 0x280b8b3,
-    0x7ff3f420, 0x2742a1f, 0x7ff46e3c, 0x2679b73,
-    0x7ff4e5e0, 0x25b0caf, 0x7ff55b0d, 0x24e7dd4,
-    0x7ff5cdc3, 0x241eee2, 0x7ff63e01, 0x2355fd9,
-    0x7ff6abc8, 0x228d0bb, 0x7ff71718, 0x21c4188,
-    0x7ff77ff1, 0x20fb240, 0x7ff7e652, 0x20322e3,
-    0x7ff84a3c, 0x1f69373, 0x7ff8abae, 0x1ea03ef,
-    0x7ff90aaa, 0x1dd7459, 0x7ff9672d, 0x1d0e4b0,
-    0x7ff9c13a, 0x1c454f5, 0x7ffa18cf, 0x1b7c528,
-    0x7ffa6dec, 0x1ab354b, 0x7ffac092, 0x19ea55d,
-    0x7ffb10c1, 0x192155f, 0x7ffb5e78, 0x1858552,
-    0x7ffba9b8, 0x178f536, 0x7ffbf280, 0x16c650b,
-    0x7ffc38d1, 0x15fd4d2, 0x7ffc7caa, 0x153448c,
-    0x7ffcbe0c, 0x146b438, 0x7ffcfcf6, 0x13a23d8,
-    0x7ffd3969, 0x12d936c, 0x7ffd7364, 0x12102f4,
-    0x7ffdaae7, 0x1147271, 0x7ffddff3, 0x107e1e3,
-    0x7ffe1288, 0xfb514b, 0x7ffe42a4, 0xeec0aa,
-    0x7ffe704a, 0xe22fff, 0x7ffe9b77, 0xd59f4c,
-    0x7ffec42d, 0xc90e90, 0x7ffeea6c, 0xbc7dcc,
-    0x7fff0e32, 0xafed02, 0x7fff2f82, 0xa35c30,
-    0x7fff4e59, 0x96cb58, 0x7fff6ab9, 0x8a3a7b,
-    0x7fff84a1, 0x7da998, 0x7fff9c12, 0x7118b0,
-    0x7fffb10b, 0x6487c4, 0x7fffc38c, 0x57f6d4,
-    0x7fffd396, 0x4b65e1, 0x7fffe128, 0x3ed4ea,
-    0x7fffec43, 0x3243f1, 0x7ffff4e6, 0x25b2f7,
-    0x7ffffb11, 0x1921fb, 0x7ffffec4, 0xc90fe,
-    0x7fffffff, 0x0, 0x7ffffec4, 0xfff36f02,
-    0x7ffffb11, 0xffe6de05, 0x7ffff4e6, 0xffda4d09,
-    0x7fffec43, 0xffcdbc0f, 0x7fffe128, 0xffc12b16,
-    0x7fffd396, 0xffb49a1f, 0x7fffc38c, 0xffa8092c,
-    0x7fffb10b, 0xff9b783c, 0x7fff9c12, 0xff8ee750,
-    0x7fff84a1, 0xff825668, 0x7fff6ab9, 0xff75c585,
-    0x7fff4e59, 0xff6934a8, 0x7fff2f82, 0xff5ca3d0,
-    0x7fff0e32, 0xff5012fe, 0x7ffeea6c, 0xff438234,
-    0x7ffec42d, 0xff36f170, 0x7ffe9b77, 0xff2a60b4,
-    0x7ffe704a, 0xff1dd001, 0x7ffe42a4, 0xff113f56,
-    0x7ffe1288, 0xff04aeb5, 0x7ffddff3, 0xfef81e1d,
-    0x7ffdaae7, 0xfeeb8d8f, 0x7ffd7364, 0xfedefd0c,
-    0x7ffd3969, 0xfed26c94, 0x7ffcfcf6, 0xfec5dc28,
-    0x7ffcbe0c, 0xfeb94bc8, 0x7ffc7caa, 0xfeacbb74,
-    0x7ffc38d1, 0xfea02b2e, 0x7ffbf280, 0xfe939af5,
-    0x7ffba9b8, 0xfe870aca, 0x7ffb5e78, 0xfe7a7aae,
-    0x7ffb10c1, 0xfe6deaa1, 0x7ffac092, 0xfe615aa3,
-    0x7ffa6dec, 0xfe54cab5, 0x7ffa18cf, 0xfe483ad8,
-    0x7ff9c13a, 0xfe3bab0b, 0x7ff9672d, 0xfe2f1b50,
-    0x7ff90aaa, 0xfe228ba7, 0x7ff8abae, 0xfe15fc11,
-    0x7ff84a3c, 0xfe096c8d, 0x7ff7e652, 0xfdfcdd1d,
-    0x7ff77ff1, 0xfdf04dc0, 0x7ff71718, 0xfde3be78,
-    0x7ff6abc8, 0xfdd72f45, 0x7ff63e01, 0xfdcaa027,
-    0x7ff5cdc3, 0xfdbe111e, 0x7ff55b0d, 0xfdb1822c,
-    0x7ff4e5e0, 0xfda4f351, 0x7ff46e3c, 0xfd98648d,
-    0x7ff3f420, 0xfd8bd5e1, 0x7ff3778e, 0xfd7f474d,
-    0x7ff2f884, 0xfd72b8d2, 0x7ff27703, 0xfd662a70,
-    0x7ff1f30b, 0xfd599c28, 0x7ff16c9c, 0xfd4d0df9,
-    0x7ff0e3b6, 0xfd407fe6, 0x7ff05858, 0xfd33f1ed,
-    0x7fefca84, 0xfd276410, 0x7fef3a39, 0xfd1ad650,
-    0x7feea776, 0xfd0e48ab, 0x7fee123d, 0xfd01bb24,
-    0x7fed7a8c, 0xfcf52dbb, 0x7fece065, 0xfce8a06f,
-    0x7fec43c7, 0xfcdc1342, 0x7feba4b2, 0xfccf8634,
-    0x7feb0326, 0xfcc2f945, 0x7fea5f23, 0xfcb66c77,
-    0x7fe9b8a9, 0xfca9dfc8, 0x7fe90fb9, 0xfc9d533b,
-    0x7fe86452, 0xfc90c6cf, 0x7fe7b674, 0xfc843a85,
-    0x7fe7061f, 0xfc77ae5e, 0x7fe65354, 0xfc6b2259,
-    0x7fe59e12, 0xfc5e9678, 0x7fe4e659, 0xfc520aba,
-    0x7fe42c2a, 0xfc457f21, 0x7fe36f84, 0xfc38f3ac,
-    0x7fe2b067, 0xfc2c685d, 0x7fe1eed5, 0xfc1fdd34,
-    0x7fe12acb, 0xfc135231, 0x7fe0644b, 0xfc06c754,
-    0x7fdf9b55, 0xfbfa3c9f, 0x7fdecfe8, 0xfbedb212,
-    0x7fde0205, 0xfbe127ac, 0x7fdd31ac, 0xfbd49d70,
-    0x7fdc5edc, 0xfbc8135c, 0x7fdb8996, 0xfbbb8973,
-    0x7fdab1d9, 0xfbaeffb3, 0x7fd9d7a7, 0xfba2761e,
-    0x7fd8fafe, 0xfb95ecb4, 0x7fd81bdf, 0xfb896375,
-    0x7fd73a4a, 0xfb7cda63, 0x7fd6563f, 0xfb70517d,
-    0x7fd56fbe, 0xfb63c8c4, 0x7fd486c7, 0xfb574039,
-    0x7fd39b5a, 0xfb4ab7db, 0x7fd2ad77, 0xfb3e2fac,
-    0x7fd1bd1e, 0xfb31a7ac, 0x7fd0ca4f, 0xfb251fdc,
-    0x7fcfd50b, 0xfb18983b, 0x7fcedd50, 0xfb0c10cb,
-    0x7fcde320, 0xfaff898c, 0x7fcce67a, 0xfaf3027e,
-    0x7fcbe75e, 0xfae67ba2, 0x7fcae5cd, 0xfad9f4f8,
-    0x7fc9e1c6, 0xfacd6e81, 0x7fc8db4a, 0xfac0e83d,
-    0x7fc7d258, 0xfab4622d, 0x7fc6c6f0, 0xfaa7dc52,
-    0x7fc5b913, 0xfa9b56ab, 0x7fc4a8c1, 0xfa8ed139,
-    0x7fc395f9, 0xfa824bfd, 0x7fc280bc, 0xfa75c6f8,
-    0x7fc1690a, 0xfa694229, 0x7fc04ee3, 0xfa5cbd91,
-    0x7fbf3246, 0xfa503930, 0x7fbe1334, 0xfa43b508,
-    0x7fbcf1ad, 0xfa373119, 0x7fbbcdb1, 0xfa2aad62,
-    0x7fbaa740, 0xfa1e29e5, 0x7fb97e5a, 0xfa11a6a3,
-    0x7fb852ff, 0xfa05239a, 0x7fb7252f, 0xf9f8a0cd,
-    0x7fb5f4ea, 0xf9ec1e3b, 0x7fb4c231, 0xf9df9be6,
-    0x7fb38d02, 0xf9d319cc, 0x7fb2555f, 0xf9c697f0,
-    0x7fb11b48, 0xf9ba1651, 0x7fafdebb, 0xf9ad94f0,
-    0x7fae9fbb, 0xf9a113cd, 0x7fad5e45, 0xf99492ea,
-    0x7fac1a5b, 0xf9881245, 0x7faad3fd, 0xf97b91e1,
-    0x7fa98b2a, 0xf96f11bc, 0x7fa83fe3, 0xf96291d9,
-    0x7fa6f228, 0xf9561237, 0x7fa5a1f9, 0xf94992d7,
-    0x7fa44f55, 0xf93d13b8, 0x7fa2fa3d, 0xf93094dd,
-    0x7fa1a2b2, 0xf9241645, 0x7fa048b2, 0xf91797f0,
-    0x7f9eec3e, 0xf90b19e0, 0x7f9d8d56, 0xf8fe9c15,
-    0x7f9c2bfb, 0xf8f21e8e, 0x7f9ac82c, 0xf8e5a14d,
-    0x7f9961e8, 0xf8d92452, 0x7f97f932, 0xf8cca79e,
-    0x7f968e07, 0xf8c02b31, 0x7f952069, 0xf8b3af0c,
-    0x7f93b058, 0xf8a7332e, 0x7f923dd2, 0xf89ab799,
-    0x7f90c8da, 0xf88e3c4d, 0x7f8f516e, 0xf881c14b,
-    0x7f8dd78f, 0xf8754692, 0x7f8c5b3d, 0xf868cc24,
-    0x7f8adc77, 0xf85c5201, 0x7f895b3e, 0xf84fd829,
-    0x7f87d792, 0xf8435e9d, 0x7f865174, 0xf836e55d,
-    0x7f84c8e2, 0xf82a6c6a, 0x7f833ddd, 0xf81df3c5,
-    0x7f81b065, 0xf8117b6d, 0x7f80207b, 0xf8050364,
-    0x7f7e8e1e, 0xf7f88ba9, 0x7f7cf94e, 0xf7ec143e,
-    0x7f7b620c, 0xf7df9d22, 0x7f79c857, 0xf7d32657,
-    0x7f782c30, 0xf7c6afdc, 0x7f768d96, 0xf7ba39b3,
-    0x7f74ec8a, 0xf7adc3db, 0x7f73490b, 0xf7a14e55,
-    0x7f71a31b, 0xf794d922, 0x7f6ffab8, 0xf7886442,
-    0x7f6e4fe3, 0xf77befb5, 0x7f6ca29c, 0xf76f7b7d,
-    0x7f6af2e3, 0xf7630799, 0x7f6940b8, 0xf756940a,
-    0x7f678c1c, 0xf74a20d0, 0x7f65d50d, 0xf73daded,
-    0x7f641b8d, 0xf7313b60, 0x7f625f9b, 0xf724c92a,
-    0x7f60a138, 0xf718574b, 0x7f5ee063, 0xf70be5c4,
-    0x7f5d1d1d, 0xf6ff7496, 0x7f5b5765, 0xf6f303c0,
-    0x7f598f3c, 0xf6e69344, 0x7f57c4a2, 0xf6da2321,
-    0x7f55f796, 0xf6cdb359, 0x7f54281a, 0xf6c143ec,
-    0x7f52562c, 0xf6b4d4d9, 0x7f5081cd, 0xf6a86623,
-    0x7f4eaafe, 0xf69bf7c9, 0x7f4cd1be, 0xf68f89cb,
-    0x7f4af60d, 0xf6831c2b, 0x7f4917eb, 0xf676aee8,
-    0x7f473759, 0xf66a4203, 0x7f455456, 0xf65dd57d,
-    0x7f436ee3, 0xf6516956, 0x7f4186ff, 0xf644fd8f,
-    0x7f3f9cab, 0xf6389228, 0x7f3dafe7, 0xf62c2721,
-    0x7f3bc0b3, 0xf61fbc7b, 0x7f39cf0e, 0xf6135237,
-    0x7f37dafa, 0xf606e854, 0x7f35e476, 0xf5fa7ed4,
-    0x7f33eb81, 0xf5ee15b7, 0x7f31f01d, 0xf5e1acfd,
-    0x7f2ff24a, 0xf5d544a7, 0x7f2df206, 0xf5c8dcb6,
-    0x7f2bef53, 0xf5bc7529, 0x7f29ea31, 0xf5b00e02,
-    0x7f27e29f, 0xf5a3a740, 0x7f25d89e, 0xf59740e5,
-    0x7f23cc2e, 0xf58adaf0, 0x7f21bd4e, 0xf57e7563,
-    0x7f1fabff, 0xf572103d, 0x7f1d9842, 0xf565ab80,
-    0x7f1b8215, 0xf559472b, 0x7f19697a, 0xf54ce33f,
-    0x7f174e70, 0xf5407fbd, 0x7f1530f7, 0xf5341ca5,
-    0x7f13110f, 0xf527b9f7, 0x7f10eeb9, 0xf51b57b5,
-    0x7f0ec9f5, 0xf50ef5de, 0x7f0ca2c2, 0xf5029473,
-    0x7f0a7921, 0xf4f63374, 0x7f084d12, 0xf4e9d2e3,
-    0x7f061e95, 0xf4dd72be, 0x7f03eda9, 0xf4d11308,
-    0x7f01ba50, 0xf4c4b3c0, 0x7eff8489, 0xf4b854e7,
-    0x7efd4c54, 0xf4abf67e, 0x7efb11b1, 0xf49f9884,
-    0x7ef8d4a1, 0xf4933afa, 0x7ef69523, 0xf486dde1,
-    0x7ef45338, 0xf47a8139, 0x7ef20ee0, 0xf46e2504,
-    0x7eefc81a, 0xf461c940, 0x7eed7ee7, 0xf4556def,
-    0x7eeb3347, 0xf4491311, 0x7ee8e53a, 0xf43cb8a7,
-    0x7ee694c1, 0xf4305eb0, 0x7ee441da, 0xf424052f,
-    0x7ee1ec87, 0xf417ac22, 0x7edf94c7, 0xf40b538b,
-    0x7edd3a9a, 0xf3fefb6a, 0x7edade01, 0xf3f2a3bf,
-    0x7ed87efc, 0xf3e64c8c, 0x7ed61d8a, 0xf3d9f5cf,
-    0x7ed3b9ad, 0xf3cd9f8b, 0x7ed15363, 0xf3c149bf,
-    0x7eceeaad, 0xf3b4f46c, 0x7ecc7f8b, 0xf3a89f92,
-    0x7eca11fe, 0xf39c4b32, 0x7ec7a205, 0xf38ff74d,
-    0x7ec52fa0, 0xf383a3e2, 0x7ec2bad0, 0xf37750f2,
-    0x7ec04394, 0xf36afe7e, 0x7ebdc9ed, 0xf35eac86,
-    0x7ebb4ddb, 0xf3525b0b, 0x7eb8cf5d, 0xf3460a0d,
-    0x7eb64e75, 0xf339b98d, 0x7eb3cb21, 0xf32d698a,
-    0x7eb14563, 0xf3211a07, 0x7eaebd3a, 0xf314cb02,
-    0x7eac32a6, 0xf3087c7d, 0x7ea9a5a8, 0xf2fc2e77,
-    0x7ea7163f, 0xf2efe0f2, 0x7ea4846c, 0xf2e393ef,
-    0x7ea1f02f, 0xf2d7476c, 0x7e9f5988, 0xf2cafb6b,
-    0x7e9cc076, 0xf2beafed, 0x7e9a24fb, 0xf2b264f2,
-    0x7e978715, 0xf2a61a7a, 0x7e94e6c6, 0xf299d085,
-    0x7e92440d, 0xf28d8715, 0x7e8f9eeb, 0xf2813e2a,
-    0x7e8cf75f, 0xf274f5c3, 0x7e8a4d6a, 0xf268ade3,
-    0x7e87a10c, 0xf25c6688, 0x7e84f245, 0xf2501fb5,
-    0x7e824114, 0xf243d968, 0x7e7f8d7b, 0xf23793a3,
-    0x7e7cd778, 0xf22b4e66, 0x7e7a1f0d, 0xf21f09b1,
-    0x7e77643a, 0xf212c585, 0x7e74a6fd, 0xf20681e3,
-    0x7e71e759, 0xf1fa3ecb, 0x7e6f254c, 0xf1edfc3d,
-    0x7e6c60d7, 0xf1e1ba3a, 0x7e6999fa, 0xf1d578c2,
-    0x7e66d0b4, 0xf1c937d6, 0x7e640507, 0xf1bcf777,
-    0x7e6136f3, 0xf1b0b7a4, 0x7e5e6676, 0xf1a4785e,
-    0x7e5b9392, 0xf19839a6, 0x7e58be47, 0xf18bfb7d,
-    0x7e55e694, 0xf17fbde2, 0x7e530c7a, 0xf17380d6,
-    0x7e502ff9, 0xf1674459, 0x7e4d5110, 0xf15b086d,
-    0x7e4a6fc1, 0xf14ecd11, 0x7e478c0b, 0xf1429247,
-    0x7e44a5ef, 0xf136580d, 0x7e41bd6c, 0xf12a1e66,
-    0x7e3ed282, 0xf11de551, 0x7e3be532, 0xf111accf,
-    0x7e38f57c, 0xf10574e0, 0x7e360360, 0xf0f93d86,
-    0x7e330ede, 0xf0ed06bf, 0x7e3017f6, 0xf0e0d08d,
-    0x7e2d1ea8, 0xf0d49af1, 0x7e2a22f4, 0xf0c865ea,
-    0x7e2724db, 0xf0bc317a, 0x7e24245d, 0xf0affda0,
-    0x7e212179, 0xf0a3ca5d, 0x7e1e1c30, 0xf09797b2,
-    0x7e1b1482, 0xf08b659f, 0x7e180a6f, 0xf07f3424,
-    0x7e14fdf7, 0xf0730342, 0x7e11ef1b, 0xf066d2fa,
-    0x7e0eddd9, 0xf05aa34c, 0x7e0bca34, 0xf04e7438,
-    0x7e08b42a, 0xf04245c0, 0x7e059bbb, 0xf03617e2,
-    0x7e0280e9, 0xf029eaa1, 0x7dff63b2, 0xf01dbdfb,
-    0x7dfc4418, 0xf01191f3, 0x7df9221a, 0xf0056687,
-    0x7df5fdb8, 0xeff93bba, 0x7df2d6f3, 0xefed118a,
-    0x7defadca, 0xefe0e7f9, 0x7dec823e, 0xefd4bf08,
-    0x7de9544f, 0xefc896b5, 0x7de623fd, 0xefbc6f03,
-    0x7de2f148, 0xefb047f2, 0x7ddfbc30, 0xefa42181,
-    0x7ddc84b5, 0xef97fbb2, 0x7dd94ad8, 0xef8bd685,
-    0x7dd60e99, 0xef7fb1fa, 0x7dd2cff7, 0xef738e12,
-    0x7dcf8ef3, 0xef676ace, 0x7dcc4b8d, 0xef5b482d,
-    0x7dc905c5, 0xef4f2630, 0x7dc5bd9b, 0xef4304d8,
-    0x7dc2730f, 0xef36e426, 0x7dbf2622, 0xef2ac419,
-    0x7dbbd6d4, 0xef1ea4b2, 0x7db88524, 0xef1285f2,
-    0x7db53113, 0xef0667d9, 0x7db1daa2, 0xeefa4a67,
-    0x7dae81cf, 0xeeee2d9d, 0x7dab269b, 0xeee2117c,
-    0x7da7c907, 0xeed5f604, 0x7da46912, 0xeec9db35,
-    0x7da106bd, 0xeebdc110, 0x7d9da208, 0xeeb1a796,
-    0x7d9a3af2, 0xeea58ec6, 0x7d96d17d, 0xee9976a1,
-    0x7d9365a8, 0xee8d5f29, 0x7d8ff772, 0xee81485c,
-    0x7d8c86de, 0xee75323c, 0x7d8913ea, 0xee691cc9,
-    0x7d859e96, 0xee5d0804, 0x7d8226e4, 0xee50f3ed,
-    0x7d7eacd2, 0xee44e084, 0x7d7b3061, 0xee38cdcb,
-    0x7d77b192, 0xee2cbbc1, 0x7d743064, 0xee20aa67,
-    0x7d70acd7, 0xee1499bd, 0x7d6d26ec, 0xee0889c4,
-    0x7d699ea3, 0xedfc7a7c, 0x7d6613fb, 0xedf06be6,
-    0x7d6286f6, 0xede45e03, 0x7d5ef793, 0xedd850d2,
-    0x7d5b65d2, 0xedcc4454, 0x7d57d1b3, 0xedc0388a,
-    0x7d543b37, 0xedb42d74, 0x7d50a25e, 0xeda82313,
-    0x7d4d0728, 0xed9c1967, 0x7d496994, 0xed901070,
-    0x7d45c9a4, 0xed84082f, 0x7d422757, 0xed7800a5,
-    0x7d3e82ae, 0xed6bf9d1, 0x7d3adba7, 0xed5ff3b5,
-    0x7d373245, 0xed53ee51, 0x7d338687, 0xed47e9a5,
-    0x7d2fd86c, 0xed3be5b1, 0x7d2c27f6, 0xed2fe277,
-    0x7d287523, 0xed23dff7, 0x7d24bff6, 0xed17de31,
-    0x7d21086c, 0xed0bdd25, 0x7d1d4e88, 0xecffdcd4,
-    0x7d199248, 0xecf3dd3f, 0x7d15d3ad, 0xece7de66,
-    0x7d1212b7, 0xecdbe04a, 0x7d0e4f67, 0xeccfe2ea,
-    0x7d0a89bc, 0xecc3e648, 0x7d06c1b6, 0xecb7ea63,
-    0x7d02f757, 0xecabef3d, 0x7cff2a9d, 0xec9ff4d6,
-    0x7cfb5b89, 0xec93fb2e, 0x7cf78a1b, 0xec880245,
-    0x7cf3b653, 0xec7c0a1d, 0x7cefe032, 0xec7012b5,
-    0x7cec07b8, 0xec641c0e, 0x7ce82ce4, 0xec582629,
-    0x7ce44fb7, 0xec4c3106, 0x7ce07031, 0xec403ca5,
-    0x7cdc8e52, 0xec344908, 0x7cd8aa1b, 0xec28562d,
-    0x7cd4c38b, 0xec1c6417, 0x7cd0daa2, 0xec1072c4,
-    0x7cccef62, 0xec048237, 0x7cc901c9, 0xebf8926f,
-    0x7cc511d9, 0xebeca36c, 0x7cc11f90, 0xebe0b52f,
-    0x7cbd2af0, 0xebd4c7ba, 0x7cb933f9, 0xebc8db0b,
-    0x7cb53aaa, 0xebbcef23, 0x7cb13f04, 0xebb10404,
-    0x7cad4107, 0xeba519ad, 0x7ca940b3, 0xeb99301f,
-    0x7ca53e09, 0xeb8d475b, 0x7ca13908, 0xeb815f60,
-    0x7c9d31b0, 0xeb75782f, 0x7c992803, 0xeb6991ca,
-    0x7c951bff, 0xeb5dac2f, 0x7c910da5, 0xeb51c760,
-    0x7c8cfcf6, 0xeb45e35d, 0x7c88e9f1, 0xeb3a0027,
-    0x7c84d496, 0xeb2e1dbe, 0x7c80bce7, 0xeb223c22,
-    0x7c7ca2e2, 0xeb165b54, 0x7c788688, 0xeb0a7b54,
-    0x7c7467d9, 0xeafe9c24, 0x7c7046d6, 0xeaf2bdc3,
-    0x7c6c237e, 0xeae6e031, 0x7c67fdd1, 0xeadb0370,
-    0x7c63d5d1, 0xeacf277f, 0x7c5fab7c, 0xeac34c60,
-    0x7c5b7ed4, 0xeab77212, 0x7c574fd8, 0xeaab9896,
-    0x7c531e88, 0xea9fbfed, 0x7c4eeae5, 0xea93e817,
-    0x7c4ab4ef, 0xea881114, 0x7c467ca6, 0xea7c3ae5,
-    0x7c42420a, 0xea70658a, 0x7c3e051b, 0xea649105,
-    0x7c39c5da, 0xea58bd54, 0x7c358446, 0xea4cea79,
-    0x7c314060, 0xea411874, 0x7c2cfa28, 0xea354746,
-    0x7c28b19e, 0xea2976ef, 0x7c2466c2, 0xea1da770,
-    0x7c201994, 0xea11d8c8, 0x7c1bca16, 0xea060af9,
-    0x7c177845, 0xe9fa3e03, 0x7c132424, 0xe9ee71e6,
-    0x7c0ecdb2, 0xe9e2a6a3, 0x7c0a74f0, 0xe9d6dc3b,
-    0x7c0619dc, 0xe9cb12ad, 0x7c01bc78, 0xe9bf49fa,
-    0x7bfd5cc4, 0xe9b38223, 0x7bf8fac0, 0xe9a7bb28,
-    0x7bf4966c, 0xe99bf509, 0x7bf02fc9, 0xe9902fc7,
-    0x7bebc6d5, 0xe9846b63, 0x7be75b93, 0xe978a7dd,
-    0x7be2ee01, 0xe96ce535, 0x7bde7e20, 0xe961236c,
-    0x7bda0bf0, 0xe9556282, 0x7bd59771, 0xe949a278,
-    0x7bd120a4, 0xe93de34e, 0x7bcca789, 0xe9322505,
-    0x7bc82c1f, 0xe926679c, 0x7bc3ae67, 0xe91aab16,
-    0x7bbf2e62, 0xe90eef71, 0x7bbaac0e, 0xe90334af,
-    0x7bb6276e, 0xe8f77acf, 0x7bb1a080, 0xe8ebc1d3,
-    0x7bad1744, 0xe8e009ba, 0x7ba88bbc, 0xe8d45286,
-    0x7ba3fde7, 0xe8c89c37, 0x7b9f6dc5, 0xe8bce6cd,
-    0x7b9adb57, 0xe8b13248, 0x7b96469d, 0xe8a57ea9,
-    0x7b91af97, 0xe899cbf1, 0x7b8d1644, 0xe88e1a20,
-    0x7b887aa6, 0xe8826936, 0x7b83dcbc, 0xe876b934,
-    0x7b7f3c87, 0xe86b0a1a, 0x7b7a9a07, 0xe85f5be9,
-    0x7b75f53c, 0xe853aea1, 0x7b714e25, 0xe8480243,
-    0x7b6ca4c4, 0xe83c56cf, 0x7b67f919, 0xe830ac45,
-    0x7b634b23, 0xe82502a7, 0x7b5e9ae4, 0xe81959f4,
-    0x7b59e85a, 0xe80db22d, 0x7b553386, 0xe8020b52,
-    0x7b507c69, 0xe7f66564, 0x7b4bc303, 0xe7eac063,
-    0x7b470753, 0xe7df1c50, 0x7b42495a, 0xe7d3792b,
-    0x7b3d8918, 0xe7c7d6f4, 0x7b38c68e, 0xe7bc35ad,
-    0x7b3401bb, 0xe7b09555, 0x7b2f3aa0, 0xe7a4f5ed,
-    0x7b2a713d, 0xe7995776, 0x7b25a591, 0xe78db9ef,
-    0x7b20d79e, 0xe7821d59, 0x7b1c0764, 0xe77681b6,
-    0x7b1734e2, 0xe76ae704, 0x7b126019, 0xe75f4d45,
-    0x7b0d8909, 0xe753b479, 0x7b08afb2, 0xe7481ca1,
-    0x7b03d414, 0xe73c85bc, 0x7afef630, 0xe730efcc,
-    0x7afa1605, 0xe7255ad1, 0x7af53395, 0xe719c6cb,
-    0x7af04edf, 0xe70e33bb, 0x7aeb67e3, 0xe702a1a1,
-    0x7ae67ea1, 0xe6f7107e, 0x7ae1931a, 0xe6eb8052,
-    0x7adca54e, 0xe6dff11d, 0x7ad7b53d, 0xe6d462e1,
-    0x7ad2c2e8, 0xe6c8d59c, 0x7acdce4d, 0xe6bd4951,
-    0x7ac8d76f, 0xe6b1bdff, 0x7ac3de4c, 0xe6a633a6,
-    0x7abee2e5, 0xe69aaa48, 0x7ab9e53a, 0xe68f21e5,
-    0x7ab4e54c, 0xe6839a7c, 0x7aafe31b, 0xe6781410,
-    0x7aaadea6, 0xe66c8e9f, 0x7aa5d7ee, 0xe6610a2a,
-    0x7aa0cef3, 0xe65586b3, 0x7a9bc3b6, 0xe64a0438,
-    0x7a96b636, 0xe63e82bc, 0x7a91a674, 0xe633023e,
-    0x7a8c9470, 0xe62782be, 0x7a87802a, 0xe61c043d,
-    0x7a8269a3, 0xe61086bc, 0x7a7d50da, 0xe6050a3b,
-    0x7a7835cf, 0xe5f98ebb, 0x7a731884, 0xe5ee143b,
-    0x7a6df8f8, 0xe5e29abc, 0x7a68d72b, 0xe5d72240,
-    0x7a63b31d, 0xe5cbaac5, 0x7a5e8cd0, 0xe5c0344d,
-    0x7a596442, 0xe5b4bed8, 0x7a543974, 0xe5a94a67,
-    0x7a4f0c67, 0xe59dd6f9, 0x7a49dd1a, 0xe5926490,
-    0x7a44ab8e, 0xe586f32c, 0x7a3f77c3, 0xe57b82cd,
-    0x7a3a41b9, 0xe5701374, 0x7a350970, 0xe564a521,
-    0x7a2fcee8, 0xe55937d5, 0x7a2a9223, 0xe54dcb8f,
-    0x7a25531f, 0xe5426051, 0x7a2011de, 0xe536f61b,
-    0x7a1ace5f, 0xe52b8cee, 0x7a1588a2, 0xe52024c9,
-    0x7a1040a8, 0xe514bdad, 0x7a0af671, 0xe509579b,
-    0x7a05a9fd, 0xe4fdf294, 0x7a005b4d, 0xe4f28e96,
-    0x79fb0a60, 0xe4e72ba4, 0x79f5b737, 0xe4dbc9bd,
-    0x79f061d2, 0xe4d068e2, 0x79eb0a31, 0xe4c50914,
-    0x79e5b054, 0xe4b9aa52, 0x79e0543c, 0xe4ae4c9d,
-    0x79daf5e8, 0xe4a2eff6, 0x79d5955a, 0xe497945d,
-    0x79d03291, 0xe48c39d3, 0x79cacd8d, 0xe480e057,
-    0x79c5664f, 0xe47587eb, 0x79bffcd7, 0xe46a308f,
-    0x79ba9125, 0xe45eda43, 0x79b52339, 0xe4538507,
-    0x79afb313, 0xe44830dd, 0x79aa40b4, 0xe43cddc4,
-    0x79a4cc1c, 0xe4318bbe, 0x799f554b, 0xe4263ac9,
-    0x7999dc42, 0xe41aeae8, 0x799460ff, 0xe40f9c1a,
-    0x798ee385, 0xe4044e60, 0x798963d2, 0xe3f901ba,
-    0x7983e1e8, 0xe3edb628, 0x797e5dc6, 0xe3e26bac,
-    0x7978d76c, 0xe3d72245, 0x79734edc, 0xe3cbd9f4,
-    0x796dc414, 0xe3c092b9, 0x79683715, 0xe3b54c95,
-    0x7962a7e0, 0xe3aa0788, 0x795d1675, 0xe39ec393,
-    0x795782d3, 0xe39380b6, 0x7951ecfc, 0xe3883ef2,
-    0x794c54ee, 0xe37cfe47, 0x7946baac, 0xe371beb5,
-    0x79411e33, 0xe366803c, 0x793b7f86, 0xe35b42df,
-    0x7935dea4, 0xe350069b, 0x79303b8e, 0xe344cb73,
-    0x792a9642, 0xe3399167, 0x7924eec3, 0xe32e5876,
-    0x791f4510, 0xe32320a2, 0x79199929, 0xe317e9eb,
-    0x7913eb0e, 0xe30cb451, 0x790e3ac0, 0xe3017fd5,
-    0x7908883f, 0xe2f64c77, 0x7902d38b, 0xe2eb1a37,
-    0x78fd1ca4, 0xe2dfe917, 0x78f7638b, 0xe2d4b916,
-    0x78f1a840, 0xe2c98a35, 0x78ebeac2, 0xe2be5c74,
-    0x78e62b13, 0xe2b32fd4, 0x78e06932, 0xe2a80456,
-    0x78daa520, 0xe29cd9f8, 0x78d4dedd, 0xe291b0bd,
-    0x78cf1669, 0xe28688a4, 0x78c94bc4, 0xe27b61af,
-    0x78c37eef, 0xe2703bdc, 0x78bdafea, 0xe265172e,
-    0x78b7deb4, 0xe259f3a3, 0x78b20b4f, 0xe24ed13d,
-    0x78ac35ba, 0xe243affc, 0x78a65df6, 0xe2388fe1,
-    0x78a08402, 0xe22d70eb, 0x789aa7e0, 0xe222531c,
-    0x7894c98f, 0xe2173674, 0x788ee910, 0xe20c1af3,
-    0x78890663, 0xe2010099, 0x78832187, 0xe1f5e768,
-    0x787d3a7e, 0xe1eacf5f, 0x78775147, 0xe1dfb87f,
-    0x787165e3, 0xe1d4a2c8, 0x786b7852, 0xe1c98e3b,
-    0x78658894, 0xe1be7ad8, 0x785f96a9, 0xe1b368a0,
-    0x7859a292, 0xe1a85793, 0x7853ac4f, 0xe19d47b1,
-    0x784db3e0, 0xe19238fb, 0x7847b946, 0xe1872b72,
-    0x7841bc7f, 0xe17c1f15, 0x783bbd8e, 0xe17113e5,
-    0x7835bc71, 0xe16609e3, 0x782fb92a, 0xe15b0110,
-    0x7829b3b9, 0xe14ff96a, 0x7823ac1d, 0xe144f2f3,
-    0x781da256, 0xe139edac, 0x78179666, 0xe12ee995,
-    0x7811884d, 0xe123e6ad, 0x780b780a, 0xe118e4f6,
-    0x7805659e, 0xe10de470, 0x77ff5109, 0xe102e51c,
-    0x77f93a4b, 0xe0f7e6f9, 0x77f32165, 0xe0ecea09,
-    0x77ed0657, 0xe0e1ee4b, 0x77e6e921, 0xe0d6f3c1,
-    0x77e0c9c3, 0xe0cbfa6a, 0x77daa83d, 0xe0c10247,
-    0x77d48490, 0xe0b60b58, 0x77ce5ebd, 0xe0ab159e,
-    0x77c836c2, 0xe0a0211a, 0x77c20ca1, 0xe0952dcb,
-    0x77bbe05a, 0xe08a3bb2, 0x77b5b1ec, 0xe07f4acf,
-    0x77af8159, 0xe0745b24, 0x77a94ea0, 0xe0696cb0,
-    0x77a319c2, 0xe05e7f74, 0x779ce2be, 0xe053936f,
-    0x7796a996, 0xe048a8a4, 0x77906e49, 0xe03dbf11,
-    0x778a30d8, 0xe032d6b8, 0x7783f143, 0xe027ef99,
-    0x777daf89, 0xe01d09b4, 0x77776bac, 0xe012250a,
-    0x777125ac, 0xe007419b, 0x776add88, 0xdffc5f67,
-    0x77649341, 0xdff17e70, 0x775e46d8, 0xdfe69eb4,
-    0x7757f84c, 0xdfdbc036, 0x7751a79e, 0xdfd0e2f5,
-    0x774b54ce, 0xdfc606f1, 0x7744ffdd, 0xdfbb2c2c,
-    0x773ea8ca, 0xdfb052a5, 0x77384f95, 0xdfa57a5d,
-    0x7731f440, 0xdf9aa354, 0x772b96ca, 0xdf8fcd8b,
-    0x77253733, 0xdf84f902, 0x771ed57c, 0xdf7a25ba,
-    0x771871a5, 0xdf6f53b3, 0x77120bae, 0xdf6482ed,
-    0x770ba398, 0xdf59b369, 0x77053962, 0xdf4ee527,
-    0x76fecd0e, 0xdf441828, 0x76f85e9a, 0xdf394c6b,
-    0x76f1ee09, 0xdf2e81f3, 0x76eb7b58, 0xdf23b8be,
-    0x76e5068a, 0xdf18f0ce, 0x76de8f9e, 0xdf0e2a22,
-    0x76d81695, 0xdf0364bc, 0x76d19b6e, 0xdef8a09b,
-    0x76cb1e2a, 0xdeedddc0, 0x76c49ec9, 0xdee31c2b,
-    0x76be1d4c, 0xded85bdd, 0x76b799b3, 0xdecd9cd7,
-    0x76b113fd, 0xdec2df18, 0x76aa8c2c, 0xdeb822a1,
-    0x76a4023f, 0xdead6773, 0x769d7637, 0xdea2ad8d,
-    0x7696e814, 0xde97f4f1, 0x769057d6, 0xde8d3d9e,
-    0x7689c57d, 0xde828796, 0x7683310b, 0xde77d2d8,
-    0x767c9a7e, 0xde6d1f65, 0x767601d7, 0xde626d3e,
-    0x766f6717, 0xde57bc62, 0x7668ca3e, 0xde4d0cd2,
-    0x76622b4c, 0xde425e8f, 0x765b8a41, 0xde37b199,
-    0x7654e71d, 0xde2d05f1, 0x764e41e2, 0xde225b96,
-    0x76479a8e, 0xde17b28a, 0x7640f123, 0xde0d0acc,
-    0x763a45a0, 0xde02645d, 0x76339806, 0xddf7bf3e,
-    0x762ce855, 0xdded1b6e, 0x7626368d, 0xdde278ef,
-    0x761f82af, 0xddd7d7c1, 0x7618ccba, 0xddcd37e4,
-    0x761214b0, 0xddc29958, 0x760b5a90, 0xddb7fc1e,
-    0x76049e5b, 0xddad6036, 0x75fde011, 0xdda2c5a2,
-    0x75f71fb1, 0xdd982c60, 0x75f05d3d, 0xdd8d9472,
-    0x75e998b5, 0xdd82fdd8, 0x75e2d219, 0xdd786892,
-    0x75dc0968, 0xdd6dd4a2, 0x75d53ea5, 0xdd634206,
-    0x75ce71ce, 0xdd58b0c0, 0x75c7a2e3, 0xdd4e20d0,
-    0x75c0d1e7, 0xdd439236, 0x75b9fed7, 0xdd3904f4,
-    0x75b329b5, 0xdd2e7908, 0x75ac5282, 0xdd23ee74,
-    0x75a5793c, 0xdd196538, 0x759e9de5, 0xdd0edd55,
-    0x7597c07d, 0xdd0456ca, 0x7590e104, 0xdcf9d199,
-    0x7589ff7a, 0xdcef4dc2, 0x75831be0, 0xdce4cb44,
-    0x757c3636, 0xdcda4a21, 0x75754e7c, 0xdccfca59,
-    0x756e64b2, 0xdcc54bec, 0x756778d9, 0xdcbacedb,
-    0x75608af1, 0xdcb05326, 0x75599afa, 0xdca5d8cd,
-    0x7552a8f4, 0xdc9b5fd2, 0x754bb4e1, 0xdc90e834,
-    0x7544bebf, 0xdc8671f3, 0x753dc68f, 0xdc7bfd11,
-    0x7536cc52, 0xdc71898d, 0x752fd008, 0xdc671768,
-    0x7528d1b1, 0xdc5ca6a2, 0x7521d14d, 0xdc52373c,
-    0x751acedd, 0xdc47c936, 0x7513ca60, 0xdc3d5c91,
-    0x750cc3d8, 0xdc32f14d, 0x7505bb44, 0xdc28876a,
-    0x74feb0a5, 0xdc1e1ee9, 0x74f7a3fb, 0xdc13b7c9,
-    0x74f09546, 0xdc09520d, 0x74e98487, 0xdbfeedb3,
-    0x74e271bd, 0xdbf48abd, 0x74db5cea, 0xdbea292b,
-    0x74d4460c, 0xdbdfc8fc, 0x74cd2d26, 0xdbd56a32,
-    0x74c61236, 0xdbcb0cce, 0x74bef53d, 0xdbc0b0ce,
-    0x74b7d63c, 0xdbb65634, 0x74b0b533, 0xdbabfd01,
-    0x74a99221, 0xdba1a534, 0x74a26d08, 0xdb974ece,
-    0x749b45e7, 0xdb8cf9cf, 0x74941cbf, 0xdb82a638,
-    0x748cf190, 0xdb785409, 0x7485c45b, 0xdb6e0342,
-    0x747e951f, 0xdb63b3e5, 0x747763dd, 0xdb5965f1,
-    0x74703095, 0xdb4f1967, 0x7468fb47, 0xdb44ce46,
-    0x7461c3f5, 0xdb3a8491, 0x745a8a9d, 0xdb303c46,
-    0x74534f41, 0xdb25f566, 0x744c11e0, 0xdb1baff2,
-    0x7444d27b, 0xdb116beb, 0x743d9112, 0xdb072950,
-    0x74364da6, 0xdafce821, 0x742f0836, 0xdaf2a860,
-    0x7427c0c3, 0xdae86a0d, 0x7420774d, 0xdade2d28,
-    0x74192bd5, 0xdad3f1b1, 0x7411de5b, 0xdac9b7a9,
-    0x740a8edf, 0xdabf7f11, 0x74033d61, 0xdab547e8,
-    0x73fbe9e2, 0xdaab122f, 0x73f49462, 0xdaa0dde7,
-    0x73ed3ce1, 0xda96ab0f, 0x73e5e360, 0xda8c79a9,
-    0x73de87de, 0xda8249b4, 0x73d72a5d, 0xda781b31,
-    0x73cfcadc, 0xda6dee21, 0x73c8695b, 0xda63c284,
-    0x73c105db, 0xda599859, 0x73b9a05d, 0xda4f6fa3,
-    0x73b238e0, 0xda454860, 0x73aacf65, 0xda3b2292,
-    0x73a363ec, 0xda30fe38, 0x739bf675, 0xda26db54,
-    0x73948701, 0xda1cb9e5, 0x738d1590, 0xda1299ec,
-    0x7385a222, 0xda087b69, 0x737e2cb7, 0xd9fe5e5e,
-    0x7376b551, 0xd9f442c9, 0x736f3bee, 0xd9ea28ac,
-    0x7367c090, 0xd9e01006, 0x73604336, 0xd9d5f8d9,
-    0x7358c3e2, 0xd9cbe325, 0x73514292, 0xd9c1cee9,
-    0x7349bf48, 0xd9b7bc27, 0x73423a04, 0xd9adaadf,
-    0x733ab2c6, 0xd9a39b11, 0x7333298f, 0xd9998cbe,
-    0x732b9e5e, 0xd98f7fe6, 0x73241134, 0xd9857489,
-    0x731c8211, 0xd97b6aa8, 0x7314f0f6, 0xd9716243,
-    0x730d5de3, 0xd9675b5a, 0x7305c8d7, 0xd95d55ef,
-    0x72fe31d5, 0xd9535201, 0x72f698db, 0xd9494f90,
-    0x72eefdea, 0xd93f4e9e, 0x72e76102, 0xd9354f2a,
-    0x72dfc224, 0xd92b5135, 0x72d82150, 0xd92154bf,
-    0x72d07e85, 0xd91759c9, 0x72c8d9c6, 0xd90d6053,
-    0x72c13311, 0xd903685d, 0x72b98a67, 0xd8f971e8,
-    0x72b1dfc9, 0xd8ef7cf4, 0x72aa3336, 0xd8e58982,
-    0x72a284b0, 0xd8db9792, 0x729ad435, 0xd8d1a724,
-    0x729321c7, 0xd8c7b838, 0x728b6d66, 0xd8bdcad0,
-    0x7283b712, 0xd8b3deeb, 0x727bfecc, 0xd8a9f48a,
-    0x72744493, 0xd8a00bae, 0x726c8868, 0xd8962456,
-    0x7264ca4c, 0xd88c3e83, 0x725d0a3e, 0xd8825a35,
-    0x72554840, 0xd878776d, 0x724d8450, 0xd86e962b,
-    0x7245be70, 0xd864b670, 0x723df6a0, 0xd85ad83c,
-    0x72362ce0, 0xd850fb8e, 0x722e6130, 0xd8472069,
-    0x72269391, 0xd83d46cc, 0x721ec403, 0xd8336eb7,
-    0x7216f287, 0xd829982b, 0x720f1f1c, 0xd81fc328,
-    0x720749c3, 0xd815efae, 0x71ff727c, 0xd80c1dbf,
-    0x71f79948, 0xd8024d59, 0x71efbe27, 0xd7f87e7f,
-    0x71e7e118, 0xd7eeb130, 0x71e0021e, 0xd7e4e56c,
-    0x71d82137, 0xd7db1b34, 0x71d03e64, 0xd7d15288,
-    0x71c859a5, 0xd7c78b68, 0x71c072fb, 0xd7bdc5d6,
-    0x71b88a66, 0xd7b401d1, 0x71b09fe7, 0xd7aa3f5a,
-    0x71a8b37c, 0xd7a07e70, 0x71a0c528, 0xd796bf16,
-    0x7198d4ea, 0xd78d014a, 0x7190e2c3, 0xd783450d,
-    0x7188eeb2, 0xd7798a60, 0x7180f8b8, 0xd76fd143,
-    0x717900d6, 0xd76619b6, 0x7171070c, 0xd75c63ba,
-    0x71690b59, 0xd752af4f, 0x71610dbf, 0xd748fc75,
-    0x71590e3e, 0xd73f4b2e, 0x71510cd5, 0xd7359b78,
-    0x71490986, 0xd72bed55, 0x71410450, 0xd72240c5,
-    0x7138fd35, 0xd71895c9, 0x7130f433, 0xd70eec60,
-    0x7128e94c, 0xd705448b, 0x7120dc80, 0xd6fb9e4b,
-    0x7118cdcf, 0xd6f1f99f, 0x7110bd39, 0xd6e85689,
-    0x7108aabf, 0xd6deb508, 0x71009661, 0xd6d5151d,
-    0x70f8801f, 0xd6cb76c9, 0x70f067fb, 0xd6c1da0b,
-    0x70e84df3, 0xd6b83ee4, 0x70e03208, 0xd6aea555,
-    0x70d8143b, 0xd6a50d5d, 0x70cff48c, 0xd69b76fe,
-    0x70c7d2fb, 0xd691e237, 0x70bfaf89, 0xd6884f09,
-    0x70b78a36, 0xd67ebd74, 0x70af6302, 0xd6752d79,
-    0x70a739ed, 0xd66b9f18, 0x709f0ef8, 0xd6621251,
-    0x7096e223, 0xd6588725, 0x708eb36f, 0xd64efd94,
-    0x708682dc, 0xd645759f, 0x707e5069, 0xd63bef46,
-    0x70761c18, 0xd6326a88, 0x706de5e9, 0xd628e767,
-    0x7065addb, 0xd61f65e4, 0x705d73f0, 0xd615e5fd,
-    0x70553828, 0xd60c67b4, 0x704cfa83, 0xd602eb0a,
-    0x7044bb00, 0xd5f96ffd, 0x703c79a2, 0xd5eff690,
-    0x70343667, 0xd5e67ec1, 0x702bf151, 0xd5dd0892,
-    0x7023aa5f, 0xd5d39403, 0x701b6193, 0xd5ca2115,
-    0x701316eb, 0xd5c0afc6, 0x700aca69, 0xd5b74019,
-    0x70027c0c, 0xd5add20d, 0x6ffa2bd6, 0xd5a465a3,
-    0x6ff1d9c7, 0xd59afadb, 0x6fe985de, 0xd59191b5,
-    0x6fe1301c, 0xd5882a32, 0x6fd8d882, 0xd57ec452,
-    0x6fd07f0f, 0xd5756016, 0x6fc823c5, 0xd56bfd7d,
-    0x6fbfc6a3, 0xd5629c89, 0x6fb767aa, 0xd5593d3a,
-    0x6faf06da, 0xd54fdf8f, 0x6fa6a433, 0xd5468389,
-    0x6f9e3fb6, 0xd53d292a, 0x6f95d963, 0xd533d070,
-    0x6f8d713a, 0xd52a795d, 0x6f85073c, 0xd52123f0,
-    0x6f7c9b69, 0xd517d02b, 0x6f742dc1, 0xd50e7e0d,
-    0x6f6bbe45, 0xd5052d97, 0x6f634cf5, 0xd4fbdec9,
-    0x6f5ad9d1, 0xd4f291a4, 0x6f5264da, 0xd4e94627,
-    0x6f49ee0f, 0xd4dffc54, 0x6f417573, 0xd4d6b42b,
-    0x6f38fb03, 0xd4cd6dab, 0x6f307ec2, 0xd4c428d6,
-    0x6f2800af, 0xd4bae5ab, 0x6f1f80ca, 0xd4b1a42c,
-    0x6f16ff14, 0xd4a86458, 0x6f0e7b8e, 0xd49f2630,
-    0x6f05f637, 0xd495e9b3, 0x6efd6f10, 0xd48caee4,
-    0x6ef4e619, 0xd48375c1, 0x6eec5b53, 0xd47a3e4b,
-    0x6ee3cebe, 0xd4710883, 0x6edb405a, 0xd467d469,
-    0x6ed2b027, 0xd45ea1fd, 0x6eca1e27, 0xd4557140,
-    0x6ec18a58, 0xd44c4232, 0x6eb8f4bc, 0xd44314d3,
-    0x6eb05d53, 0xd439e923, 0x6ea7c41e, 0xd430bf24,
-    0x6e9f291b, 0xd42796d5, 0x6e968c4d, 0xd41e7037,
-    0x6e8dedb3, 0xd4154b4a, 0x6e854d4d, 0xd40c280e,
-    0x6e7cab1c, 0xd4030684, 0x6e740720, 0xd3f9e6ad,
-    0x6e6b615a, 0xd3f0c887, 0x6e62b9ca, 0xd3e7ac15,
-    0x6e5a1070, 0xd3de9156, 0x6e51654c, 0xd3d5784a,
-    0x6e48b860, 0xd3cc60f2, 0x6e4009aa, 0xd3c34b4f,
-    0x6e37592c, 0xd3ba3760, 0x6e2ea6e6, 0xd3b12526,
-    0x6e25f2d8, 0xd3a814a2, 0x6e1d3d03, 0xd39f05d3,
-    0x6e148566, 0xd395f8ba, 0x6e0bcc03, 0xd38ced57,
-    0x6e0310d9, 0xd383e3ab, 0x6dfa53e9, 0xd37adbb6,
-    0x6df19534, 0xd371d579, 0x6de8d4b8, 0xd368d0f3,
-    0x6de01278, 0xd35fce26, 0x6dd74e73, 0xd356cd11,
-    0x6dce88aa, 0xd34dcdb4, 0x6dc5c11c, 0xd344d011,
-    0x6dbcf7cb, 0xd33bd427, 0x6db42cb6, 0xd332d9f7,
-    0x6dab5fdf, 0xd329e181, 0x6da29144, 0xd320eac6,
-    0x6d99c0e7, 0xd317f5c6, 0x6d90eec8, 0xd30f0280,
-    0x6d881ae8, 0xd30610f7, 0x6d7f4545, 0xd2fd2129,
-    0x6d766de2, 0xd2f43318, 0x6d6d94bf, 0xd2eb46c3,
-    0x6d64b9da, 0xd2e25c2b, 0x6d5bdd36, 0xd2d97350,
-    0x6d52fed2, 0xd2d08c33, 0x6d4a1eaf, 0xd2c7a6d4,
-    0x6d413ccd, 0xd2bec333, 0x6d38592c, 0xd2b5e151,
-    0x6d2f73cd, 0xd2ad012e, 0x6d268cb0, 0xd2a422ca,
-    0x6d1da3d5, 0xd29b4626, 0x6d14b93d, 0xd2926b41,
-    0x6d0bcce8, 0xd289921e, 0x6d02ded7, 0xd280babb,
-    0x6cf9ef09, 0xd277e518, 0x6cf0fd80, 0xd26f1138,
-    0x6ce80a3a, 0xd2663f19, 0x6cdf153a, 0xd25d6ebc,
-    0x6cd61e7f, 0xd254a021, 0x6ccd2609, 0xd24bd34a,
-    0x6cc42bd9, 0xd2430835, 0x6cbb2fef, 0xd23a3ee4,
-    0x6cb2324c, 0xd2317756, 0x6ca932ef, 0xd228b18d,
-    0x6ca031da, 0xd21fed88, 0x6c972f0d, 0xd2172b48,
-    0x6c8e2a87, 0xd20e6acc, 0x6c85244a, 0xd205ac17,
-    0x6c7c1c55, 0xd1fcef27, 0x6c7312a9, 0xd1f433fd,
-    0x6c6a0746, 0xd1eb7a9a, 0x6c60fa2d, 0xd1e2c2fd,
-    0x6c57eb5e, 0xd1da0d28, 0x6c4edada, 0xd1d1591a,
-    0x6c45c8a0, 0xd1c8a6d4, 0x6c3cb4b1, 0xd1bff656,
-    0x6c339f0e, 0xd1b747a0, 0x6c2a87b6, 0xd1ae9ab4,
-    0x6c216eaa, 0xd1a5ef90, 0x6c1853eb, 0xd19d4636,
-    0x6c0f3779, 0xd1949ea6, 0x6c061953, 0xd18bf8e0,
-    0x6bfcf97c, 0xd18354e4, 0x6bf3d7f2, 0xd17ab2b3,
-    0x6beab4b6, 0xd172124d, 0x6be18fc9, 0xd16973b3,
-    0x6bd8692b, 0xd160d6e5, 0x6bcf40dc, 0xd1583be2,
-    0x6bc616dd, 0xd14fa2ad, 0x6bbceb2d, 0xd1470b44,
-    0x6bb3bdce, 0xd13e75a8, 0x6baa8ec0, 0xd135e1d9,
-    0x6ba15e03, 0xd12d4fd9, 0x6b982b97, 0xd124bfa6,
-    0x6b8ef77d, 0xd11c3142, 0x6b85c1b5, 0xd113a4ad,
-    0x6b7c8a3f, 0xd10b19e7, 0x6b73511c, 0xd10290f0,
-    0x6b6a164d, 0xd0fa09c9, 0x6b60d9d0, 0xd0f18472,
-    0x6b579ba8, 0xd0e900ec, 0x6b4e5bd4, 0xd0e07f36,
-    0x6b451a55, 0xd0d7ff51, 0x6b3bd72a, 0xd0cf813e,
-    0x6b329255, 0xd0c704fd, 0x6b294bd5, 0xd0be8a8d,
-    0x6b2003ac, 0xd0b611f1, 0x6b16b9d9, 0xd0ad9b26,
-    0x6b0d6e5c, 0xd0a5262f, 0x6b042137, 0xd09cb30b,
-    0x6afad269, 0xd09441bb, 0x6af181f3, 0xd08bd23f,
-    0x6ae82fd5, 0xd0836497, 0x6adedc10, 0xd07af8c4,
-    0x6ad586a3, 0xd0728ec6, 0x6acc2f90, 0xd06a269d,
-    0x6ac2d6d6, 0xd061c04a, 0x6ab97c77, 0xd0595bcd,
-    0x6ab02071, 0xd050f926, 0x6aa6c2c6, 0xd0489856,
-    0x6a9d6377, 0xd040395d, 0x6a940283, 0xd037dc3b,
-    0x6a8a9fea, 0xd02f80f1, 0x6a813bae, 0xd027277e,
-    0x6a77d5ce, 0xd01ecfe4, 0x6a6e6e4b, 0xd0167a22,
-    0x6a650525, 0xd00e2639, 0x6a5b9a5d, 0xd005d42a,
-    0x6a522df3, 0xcffd83f4, 0x6a48bfe7, 0xcff53597,
-    0x6a3f503a, 0xcfece915, 0x6a35deeb, 0xcfe49e6d,
-    0x6a2c6bfd, 0xcfdc55a1, 0x6a22f76e, 0xcfd40eaf,
-    0x6a19813f, 0xcfcbc999, 0x6a100970, 0xcfc3865e,
-    0x6a069003, 0xcfbb4500, 0x69fd14f6, 0xcfb3057d,
-    0x69f3984c, 0xcfaac7d8, 0x69ea1a03, 0xcfa28c10,
-    0x69e09a1c, 0xcf9a5225, 0x69d71899, 0xcf921a17,
-    0x69cd9578, 0xcf89e3e8, 0x69c410ba, 0xcf81af97,
-    0x69ba8a61, 0xcf797d24, 0x69b1026c, 0xcf714c91,
-    0x69a778db, 0xcf691ddd, 0x699dedaf, 0xcf60f108,
-    0x699460e8, 0xcf58c613, 0x698ad287, 0xcf509cfe,
-    0x6981428c, 0xcf4875ca, 0x6977b0f7, 0xcf405077,
-    0x696e1dc9, 0xcf382d05, 0x69648902, 0xcf300b74,
-    0x695af2a3, 0xcf27ebc5, 0x69515aab, 0xcf1fcdf8,
-    0x6947c11c, 0xcf17b20d, 0x693e25f5, 0xcf0f9805,
-    0x69348937, 0xcf077fe1, 0x692aeae3, 0xceff699f,
-    0x69214af8, 0xcef75541, 0x6917a977, 0xceef42c7,
-    0x690e0661, 0xcee73231, 0x690461b5, 0xcedf2380,
-    0x68fabb75, 0xced716b4, 0x68f113a0, 0xcecf0bcd,
-    0x68e76a37, 0xcec702cb, 0x68ddbf3b, 0xcebefbb0,
-    0x68d412ab, 0xceb6f67a, 0x68ca6488, 0xceaef32b,
-    0x68c0b4d2, 0xcea6f1c2, 0x68b7038b, 0xce9ef241,
-    0x68ad50b1, 0xce96f4a7, 0x68a39c46, 0xce8ef8f4,
-    0x6899e64a, 0xce86ff2a, 0x68902ebd, 0xce7f0748,
-    0x688675a0, 0xce77114e, 0x687cbaf3, 0xce6f1d3d,
-    0x6872feb6, 0xce672b16, 0x686940ea, 0xce5f3ad8,
-    0x685f8190, 0xce574c84, 0x6855c0a6, 0xce4f6019,
-    0x684bfe2f, 0xce47759a, 0x68423a2a, 0xce3f8d05,
-    0x68387498, 0xce37a65b, 0x682ead78, 0xce2fc19c,
-    0x6824e4cc, 0xce27dec9, 0x681b1a94, 0xce1ffde2,
-    0x68114ed0, 0xce181ee8, 0x68078181, 0xce1041d9,
-    0x67fdb2a7, 0xce0866b8, 0x67f3e241, 0xce008d84,
-    0x67ea1052, 0xcdf8b63d, 0x67e03cd8, 0xcdf0e0e4,
-    0x67d667d5, 0xcde90d79, 0x67cc9149, 0xcde13bfd,
-    0x67c2b934, 0xcdd96c6f, 0x67b8df97, 0xcdd19ed0,
-    0x67af0472, 0xcdc9d320, 0x67a527c4, 0xcdc20960,
-    0x679b4990, 0xcdba4190, 0x679169d5, 0xcdb27bb0,
-    0x67878893, 0xcdaab7c0, 0x677da5cb, 0xcda2f5c2,
-    0x6773c17d, 0xcd9b35b4, 0x6769dbaa, 0xcd937798,
-    0x675ff452, 0xcd8bbb6d, 0x67560b76, 0xcd840134,
-    0x674c2115, 0xcd7c48ee, 0x67423530, 0xcd74929a,
-    0x673847c8, 0xcd6cde39, 0x672e58dc, 0xcd652bcb,
-    0x6724686e, 0xcd5d7b50, 0x671a767e, 0xcd55ccca,
-    0x6710830c, 0xcd4e2037, 0x67068e18, 0xcd467599,
-    0x66fc97a3, 0xcd3eccef, 0x66f29fad, 0xcd37263a,
-    0x66e8a637, 0xcd2f817b, 0x66deab41, 0xcd27deb0,
-    0x66d4aecb, 0xcd203ddc, 0x66cab0d6, 0xcd189efe,
-    0x66c0b162, 0xcd110216, 0x66b6b070, 0xcd096725,
-    0x66acadff, 0xcd01ce2b, 0x66a2aa11, 0xccfa3729,
-    0x6698a4a6, 0xccf2a21d, 0x668e9dbd, 0xcceb0f0a,
-    0x66849558, 0xcce37def, 0x667a8b77, 0xccdbeecc,
-    0x6670801a, 0xccd461a2, 0x66667342, 0xccccd671,
-    0x665c64ef, 0xccc54d3a, 0x66525521, 0xccbdc5fc,
-    0x664843d9, 0xccb640b8, 0x663e3117, 0xccaebd6e,
-    0x66341cdb, 0xcca73c1e, 0x662a0727, 0xcc9fbcca,
-    0x661feffa, 0xcc983f70, 0x6615d754, 0xcc90c412,
-    0x660bbd37, 0xcc894aaf, 0x6601a1a2, 0xcc81d349,
-    0x65f78497, 0xcc7a5dde, 0x65ed6614, 0xcc72ea70,
-    0x65e3461b, 0xcc6b78ff, 0x65d924ac, 0xcc64098b,
-    0x65cf01c8, 0xcc5c9c14, 0x65c4dd6e, 0xcc55309b,
-    0x65bab7a0, 0xcc4dc720, 0x65b0905d, 0xcc465fa3,
-    0x65a667a7, 0xcc3efa25, 0x659c3d7c, 0xcc3796a5,
-    0x659211df, 0xcc303524, 0x6587e4cf, 0xcc28d5a3,
-    0x657db64c, 0xcc217822, 0x65738657, 0xcc1a1ca0,
-    0x656954f1, 0xcc12c31f, 0x655f2219, 0xcc0b6b9e,
-    0x6554edd1, 0xcc04161e, 0x654ab818, 0xcbfcc29f,
-    0x654080ef, 0xcbf57121, 0x65364857, 0xcbee21a5,
-    0x652c0e4f, 0xcbe6d42b, 0x6521d2d8, 0xcbdf88b3,
-    0x651795f3, 0xcbd83f3d, 0x650d57a0, 0xcbd0f7ca,
-    0x650317df, 0xcbc9b25a, 0x64f8d6b0, 0xcbc26eee,
-    0x64ee9415, 0xcbbb2d85, 0x64e4500e, 0xcbb3ee20,
-    0x64da0a9a, 0xcbacb0bf, 0x64cfc3ba, 0xcba57563,
-    0x64c57b6f, 0xcb9e3c0b, 0x64bb31ba, 0xcb9704b9,
-    0x64b0e699, 0xcb8fcf6b, 0x64a69a0f, 0xcb889c23,
-    0x649c4c1b, 0xcb816ae1, 0x6491fcbe, 0xcb7a3ba5,
-    0x6487abf7, 0xcb730e70, 0x647d59c8, 0xcb6be341,
-    0x64730631, 0xcb64ba19, 0x6468b132, 0xcb5d92f8,
-    0x645e5acc, 0xcb566ddf, 0x645402ff, 0xcb4f4acd,
-    0x6449a9cc, 0xcb4829c4, 0x643f4f32, 0xcb410ac3,
-    0x6434f332, 0xcb39edca, 0x642a95ce, 0xcb32d2da,
-    0x64203704, 0xcb2bb9f4, 0x6415d6d5, 0xcb24a316,
-    0x640b7543, 0xcb1d8e43, 0x6401124d, 0xcb167b79,
-    0x63f6adf3, 0xcb0f6aba, 0x63ec4837, 0xcb085c05,
-    0x63e1e117, 0xcb014f5b, 0x63d77896, 0xcafa44bc,
-    0x63cd0eb3, 0xcaf33c28, 0x63c2a36f, 0xcaec35a0,
-    0x63b836ca, 0xcae53123, 0x63adc8c4, 0xcade2eb3,
-    0x63a3595e, 0xcad72e4f, 0x6398e898, 0xcad02ff8,
-    0x638e7673, 0xcac933ae, 0x638402ef, 0xcac23971,
-    0x63798e0d, 0xcabb4141, 0x636f17cc, 0xcab44b1f,
-    0x6364a02e, 0xcaad570c, 0x635a2733, 0xcaa66506,
-    0x634facda, 0xca9f750f, 0x63453125, 0xca988727,
-    0x633ab414, 0xca919b4e, 0x633035a7, 0xca8ab184,
-    0x6325b5df, 0xca83c9ca, 0x631b34bc, 0xca7ce420,
-    0x6310b23e, 0xca760086, 0x63062e67, 0xca6f1efc,
-    0x62fba936, 0xca683f83, 0x62f122ab, 0xca61621b,
-    0x62e69ac8, 0xca5a86c4, 0x62dc118c, 0xca53ad7e,
-    0x62d186f8, 0xca4cd64b, 0x62c6fb0c, 0xca460129,
-    0x62bc6dca, 0xca3f2e19, 0x62b1df30, 0xca385d1d,
-    0x62a74f40, 0xca318e32, 0x629cbdfa, 0xca2ac15b,
-    0x62922b5e, 0xca23f698, 0x6287976e, 0xca1d2de7,
-    0x627d0228, 0xca16674b, 0x62726b8e, 0xca0fa2c3,
-    0x6267d3a0, 0xca08e04f, 0x625d3a5e, 0xca021fef,
-    0x62529fca, 0xc9fb61a5, 0x624803e2, 0xc9f4a570,
-    0x623d66a8, 0xc9edeb50, 0x6232c81c, 0xc9e73346,
-    0x6228283f, 0xc9e07d51, 0x621d8711, 0xc9d9c973,
-    0x6212e492, 0xc9d317ab, 0x620840c2, 0xc9cc67fa,
-    0x61fd9ba3, 0xc9c5ba60, 0x61f2f534, 0xc9bf0edd,
-    0x61e84d76, 0xc9b86572, 0x61dda46a, 0xc9b1be1e,
-    0x61d2fa0f, 0xc9ab18e3, 0x61c84e67, 0xc9a475bf,
-    0x61bda171, 0xc99dd4b4, 0x61b2f32e, 0xc99735c2,
-    0x61a8439e, 0xc99098e9, 0x619d92c2, 0xc989fe29,
-    0x6192e09b, 0xc9836582, 0x61882d28, 0xc97ccef5,
-    0x617d786a, 0xc9763a83, 0x6172c262, 0xc96fa82a,
-    0x61680b0f, 0xc96917ec, 0x615d5273, 0xc96289c9,
-    0x6152988d, 0xc95bfdc1, 0x6147dd5f, 0xc95573d4,
-    0x613d20e8, 0xc94eec03, 0x61326329, 0xc948664d,
-    0x6127a423, 0xc941e2b4, 0x611ce3d5, 0xc93b6137,
-    0x61122240, 0xc934e1d6, 0x61075f65, 0xc92e6492,
-    0x60fc9b44, 0xc927e96b, 0x60f1d5de, 0xc9217062,
-    0x60e70f32, 0xc91af976, 0x60dc4742, 0xc91484a8,
-    0x60d17e0d, 0xc90e11f7, 0x60c6b395, 0xc907a166,
-    0x60bbe7d8, 0xc90132f2, 0x60b11ad9, 0xc8fac69e,
-    0x60a64c97, 0xc8f45c68, 0x609b7d13, 0xc8edf452,
-    0x6090ac4d, 0xc8e78e5b, 0x6085da46, 0xc8e12a84,
-    0x607b06fe, 0xc8dac8cd, 0x60703275, 0xc8d46936,
-    0x60655cac, 0xc8ce0bc0, 0x605a85a3, 0xc8c7b06b,
-    0x604fad5b, 0xc8c15736, 0x6044d3d4, 0xc8bb0023,
-    0x6039f90f, 0xc8b4ab32, 0x602f1d0b, 0xc8ae5862,
-    0x60243fca, 0xc8a807b4, 0x6019614c, 0xc8a1b928,
-    0x600e8190, 0xc89b6cbf, 0x6003a099, 0xc8952278,
-    0x5ff8be65, 0xc88eda54, 0x5feddaf6, 0xc8889454,
-    0x5fe2f64c, 0xc8825077, 0x5fd81067, 0xc87c0ebd,
-    0x5fcd2948, 0xc875cf28, 0x5fc240ef, 0xc86f91b7,
-    0x5fb7575c, 0xc869566a, 0x5fac6c91, 0xc8631d42,
-    0x5fa1808c, 0xc85ce63e, 0x5f969350, 0xc856b160,
-    0x5f8ba4dc, 0xc8507ea7, 0x5f80b531, 0xc84a4e14,
-    0x5f75c44e, 0xc8441fa6, 0x5f6ad235, 0xc83df35f,
-    0x5f5fdee6, 0xc837c93e, 0x5f54ea62, 0xc831a143,
-    0x5f49f4a8, 0xc82b7b70, 0x5f3efdb9, 0xc82557c3,
-    0x5f340596, 0xc81f363d, 0x5f290c3f, 0xc81916df,
-    0x5f1e11b5, 0xc812f9a9, 0x5f1315f7, 0xc80cde9b,
-    0x5f081907, 0xc806c5b5, 0x5efd1ae4, 0xc800aef7,
-    0x5ef21b90, 0xc7fa9a62, 0x5ee71b0a, 0xc7f487f6,
-    0x5edc1953, 0xc7ee77b3, 0x5ed1166b, 0xc7e8699a,
-    0x5ec61254, 0xc7e25daa, 0x5ebb0d0d, 0xc7dc53e3,
-    0x5eb00696, 0xc7d64c47, 0x5ea4fef0, 0xc7d046d6,
-    0x5e99f61d, 0xc7ca438f, 0x5e8eec1b, 0xc7c44272,
-    0x5e83e0eb, 0xc7be4381, 0x5e78d48e, 0xc7b846ba,
-    0x5e6dc705, 0xc7b24c20, 0x5e62b84f, 0xc7ac53b1,
-    0x5e57a86d, 0xc7a65d6e, 0x5e4c9760, 0xc7a06957,
-    0x5e418528, 0xc79a776c, 0x5e3671c5, 0xc79487ae,
-    0x5e2b5d38, 0xc78e9a1d, 0x5e204781, 0xc788aeb9,
-    0x5e1530a1, 0xc782c582, 0x5e0a1898, 0xc77cde79,
-    0x5dfeff67, 0xc776f99d, 0x5df3e50d, 0xc77116f0,
-    0x5de8c98c, 0xc76b3671, 0x5dddace4, 0xc7655820,
-    0x5dd28f15, 0xc75f7bfe, 0x5dc7701f, 0xc759a20a,
-    0x5dbc5004, 0xc753ca46, 0x5db12ec3, 0xc74df4b1,
-    0x5da60c5d, 0xc748214c, 0x5d9ae8d2, 0xc7425016,
-    0x5d8fc424, 0xc73c8111, 0x5d849e51, 0xc736b43c,
-    0x5d79775c, 0xc730e997, 0x5d6e4f43, 0xc72b2123,
-    0x5d632608, 0xc7255ae0, 0x5d57fbaa, 0xc71f96ce,
-    0x5d4cd02c, 0xc719d4ed, 0x5d41a38c, 0xc714153e,
-    0x5d3675cb, 0xc70e57c0, 0x5d2b46ea, 0xc7089c75,
-    0x5d2016e9, 0xc702e35c, 0x5d14e5c9, 0xc6fd2c75,
-    0x5d09b389, 0xc6f777c1, 0x5cfe802b, 0xc6f1c540,
-    0x5cf34baf, 0xc6ec14f2, 0x5ce81615, 0xc6e666d7,
-    0x5cdcdf5e, 0xc6e0baf0, 0x5cd1a78a, 0xc6db113d,
-    0x5cc66e99, 0xc6d569be, 0x5cbb348d, 0xc6cfc472,
-    0x5caff965, 0xc6ca215c, 0x5ca4bd21, 0xc6c4807a,
-    0x5c997fc4, 0xc6bee1cd, 0x5c8e414b, 0xc6b94554,
-    0x5c8301b9, 0xc6b3ab12, 0x5c77c10e, 0xc6ae1304,
-    0x5c6c7f4a, 0xc6a87d2d, 0x5c613c6d, 0xc6a2e98b,
-    0x5c55f878, 0xc69d5820, 0x5c4ab36b, 0xc697c8eb,
-    0x5c3f6d47, 0xc6923bec, 0x5c34260c, 0xc68cb124,
-    0x5c28ddbb, 0xc6872894, 0x5c1d9454, 0xc681a23a,
-    0x5c1249d8, 0xc67c1e18, 0x5c06fe46, 0xc6769c2e,
-    0x5bfbb1a0, 0xc6711c7b, 0x5bf063e6, 0xc66b9f01,
-    0x5be51518, 0xc66623be, 0x5bd9c537, 0xc660aab5,
-    0x5bce7442, 0xc65b33e4, 0x5bc3223c, 0xc655bf4c,
-    0x5bb7cf23, 0xc6504ced, 0x5bac7af9, 0xc64adcc7,
-    0x5ba125bd, 0xc6456edb, 0x5b95cf71, 0xc6400329,
-    0x5b8a7815, 0xc63a99b1, 0x5b7f1fa9, 0xc6353273,
-    0x5b73c62d, 0xc62fcd6f, 0x5b686ba3, 0xc62a6aa6,
-    0x5b5d100a, 0xc6250a18, 0x5b51b363, 0xc61fabc4,
-    0x5b4655ae, 0xc61a4fac, 0x5b3af6ec, 0xc614f5cf,
-    0x5b2f971e, 0xc60f9e2e, 0x5b243643, 0xc60a48c9,
-    0x5b18d45c, 0xc604f5a0, 0x5b0d716a, 0xc5ffa4b3,
-    0x5b020d6c, 0xc5fa5603, 0x5af6a865, 0xc5f5098f,
-    0x5aeb4253, 0xc5efbf58, 0x5adfdb37, 0xc5ea775e,
-    0x5ad47312, 0xc5e531a1, 0x5ac909e5, 0xc5dfee22,
-    0x5abd9faf, 0xc5daace1, 0x5ab23471, 0xc5d56ddd,
-    0x5aa6c82b, 0xc5d03118, 0x5a9b5adf, 0xc5caf690,
-    0x5a8fec8c, 0xc5c5be47, 0x5a847d33, 0xc5c0883d,
-    0x5a790cd4, 0xc5bb5472, 0x5a6d9b70, 0xc5b622e6,
-    0x5a622907, 0xc5b0f399, 0x5a56b599, 0xc5abc68c,
-    0x5a4b4128, 0xc5a69bbe, 0x5a3fcbb3, 0xc5a17330,
-    0x5a34553b, 0xc59c4ce3, 0x5a28ddc0, 0xc59728d5,
-    0x5a1d6544, 0xc5920708, 0x5a11ebc5, 0xc58ce77c,
-    0x5a067145, 0xc587ca31, 0x59faf5c5, 0xc582af26,
-    0x59ef7944, 0xc57d965d, 0x59e3fbc3, 0xc5787fd6,
-    0x59d87d42, 0xc5736b90, 0x59ccfdc2, 0xc56e598c,
-    0x59c17d44, 0xc56949ca, 0x59b5fbc8, 0xc5643c4a,
-    0x59aa794d, 0xc55f310d, 0x599ef5d6, 0xc55a2812,
-    0x59937161, 0xc555215a, 0x5987ebf0, 0xc5501ce5,
-    0x597c6584, 0xc54b1ab4, 0x5970de1b, 0xc5461ac6,
-    0x596555b8, 0xc5411d1b, 0x5959cc5a, 0xc53c21b4,
-    0x594e4201, 0xc5372891, 0x5942b6af, 0xc53231b3,
-    0x59372a64, 0xc52d3d18, 0x592b9d1f, 0xc5284ac3,
-    0x59200ee3, 0xc5235ab2, 0x59147fae, 0xc51e6ce6,
-    0x5908ef82, 0xc519815f, 0x58fd5e5f, 0xc514981d,
-    0x58f1cc45, 0xc50fb121, 0x58e63935, 0xc50acc6b,
-    0x58daa52f, 0xc505e9fb, 0x58cf1034, 0xc50109d0,
-    0x58c37a44, 0xc4fc2bec, 0x58b7e35f, 0xc4f7504e,
-    0x58ac4b87, 0xc4f276f7, 0x58a0b2bb, 0xc4ed9fe7,
-    0x589518fc, 0xc4e8cb1e, 0x58897e4a, 0xc4e3f89c,
-    0x587de2a7, 0xc4df2862, 0x58724611, 0xc4da5a6f,
-    0x5866a88a, 0xc4d58ec3, 0x585b0a13, 0xc4d0c560,
-    0x584f6aab, 0xc4cbfe45, 0x5843ca53, 0xc4c73972,
-    0x5838290c, 0xc4c276e8, 0x582c86d5, 0xc4bdb6a6,
-    0x5820e3b0, 0xc4b8f8ad, 0x58153f9d, 0xc4b43cfd,
-    0x58099a9c, 0xc4af8397, 0x57fdf4ae, 0xc4aacc7a,
-    0x57f24dd3, 0xc4a617a6, 0x57e6a60c, 0xc4a1651c,
-    0x57dafd59, 0xc49cb4dd, 0x57cf53bb, 0xc49806e7,
-    0x57c3a931, 0xc4935b3c, 0x57b7fdbd, 0xc48eb1db,
-    0x57ac515f, 0xc48a0ac4, 0x57a0a417, 0xc48565f9,
-    0x5794f5e6, 0xc480c379, 0x578946cc, 0xc47c2344,
-    0x577d96ca, 0xc477855a, 0x5771e5e0, 0xc472e9bc,
-    0x5766340f, 0xc46e5069, 0x575a8157, 0xc469b963,
-    0x574ecdb8, 0xc46524a9, 0x57431933, 0xc460923b,
-    0x573763c9, 0xc45c0219, 0x572bad7a, 0xc4577444,
-    0x571ff646, 0xc452e8bc, 0x57143e2d, 0xc44e5f80,
-    0x57088531, 0xc449d892, 0x56fccb51, 0xc44553f2,
-    0x56f1108f, 0xc440d19e, 0x56e554ea, 0xc43c5199,
-    0x56d99864, 0xc437d3e1, 0x56cddafb, 0xc4335877,
-    0x56c21cb2, 0xc42edf5c, 0x56b65d88, 0xc42a688f,
-    0x56aa9d7e, 0xc425f410, 0x569edc94, 0xc42181e0,
-    0x56931acb, 0xc41d11ff, 0x56875823, 0xc418a46d,
-    0x567b949d, 0xc414392b, 0x566fd039, 0xc40fd037,
-    0x56640af7, 0xc40b6994, 0x565844d8, 0xc4070540,
-    0x564c7ddd, 0xc402a33c, 0x5640b606, 0xc3fe4388,
-    0x5634ed53, 0xc3f9e624, 0x562923c5, 0xc3f58b10,
-    0x561d595d, 0xc3f1324e, 0x56118e1a, 0xc3ecdbdc,
-    0x5605c1fd, 0xc3e887bb, 0x55f9f507, 0xc3e435ea,
-    0x55ee2738, 0xc3dfe66c, 0x55e25890, 0xc3db993e,
-    0x55d68911, 0xc3d74e62, 0x55cab8ba, 0xc3d305d8,
-    0x55bee78c, 0xc3cebfa0, 0x55b31587, 0xc3ca7bba,
-    0x55a742ac, 0xc3c63a26, 0x559b6efb, 0xc3c1fae5,
-    0x558f9a76, 0xc3bdbdf6, 0x5583c51b, 0xc3b9835a,
-    0x5577eeec, 0xc3b54b11, 0x556c17e9, 0xc3b1151b,
-    0x55604013, 0xc3ace178, 0x5554676a, 0xc3a8b028,
-    0x55488dee, 0xc3a4812c, 0x553cb3a0, 0xc3a05484,
-    0x5530d881, 0xc39c2a2f, 0x5524fc90, 0xc398022f,
-    0x55191fcf, 0xc393dc82, 0x550d423d, 0xc38fb92a,
-    0x550163dc, 0xc38b9827, 0x54f584ac, 0xc3877978,
-    0x54e9a4ac, 0xc3835d1e, 0x54ddc3de, 0xc37f4319,
-    0x54d1e242, 0xc37b2b6a, 0x54c5ffd9, 0xc377160f,
-    0x54ba1ca3, 0xc373030a, 0x54ae38a0, 0xc36ef25b,
-    0x54a253d1, 0xc36ae401, 0x54966e36, 0xc366d7fd,
-    0x548a87d1, 0xc362ce50, 0x547ea0a0, 0xc35ec6f8,
-    0x5472b8a5, 0xc35ac1f7, 0x5466cfe1, 0xc356bf4d,
-    0x545ae653, 0xc352bef9, 0x544efbfc, 0xc34ec0fc,
-    0x544310dd, 0xc34ac556, 0x543724f5, 0xc346cc07,
-    0x542b3846, 0xc342d510, 0x541f4ad1, 0xc33ee070,
-    0x54135c94, 0xc33aee27, 0x54076d91, 0xc336fe37,
-    0x53fb7dc9, 0xc333109e, 0x53ef8d3c, 0xc32f255e,
-    0x53e39be9, 0xc32b3c75, 0x53d7a9d3, 0xc32755e5,
-    0x53cbb6f8, 0xc32371ae, 0x53bfc35b, 0xc31f8fcf,
-    0x53b3cefa, 0xc31bb049, 0x53a7d9d7, 0xc317d31c,
-    0x539be3f2, 0xc313f848, 0x538fed4b, 0xc3101fce,
-    0x5383f5e3, 0xc30c49ad, 0x5377fdbb, 0xc30875e5,
-    0x536c04d2, 0xc304a477, 0x53600b2a, 0xc300d563,
-    0x535410c3, 0xc2fd08a9, 0x5348159d, 0xc2f93e4a,
-    0x533c19b8, 0xc2f57644, 0x53301d16, 0xc2f1b099,
-    0x53241fb6, 0xc2eded49, 0x5318219a, 0xc2ea2c53,
-    0x530c22c1, 0xc2e66db8, 0x5300232c, 0xc2e2b178,
-    0x52f422db, 0xc2def794, 0x52e821cf, 0xc2db400a,
-    0x52dc2009, 0xc2d78add, 0x52d01d89, 0xc2d3d80a,
-    0x52c41a4f, 0xc2d02794, 0x52b8165b, 0xc2cc7979,
-    0x52ac11af, 0xc2c8cdbb, 0x52a00c4b, 0xc2c52459,
-    0x5294062f, 0xc2c17d52, 0x5287ff5b, 0xc2bdd8a9,
-    0x527bf7d1, 0xc2ba365c, 0x526fef90, 0xc2b6966c,
-    0x5263e699, 0xc2b2f8d8, 0x5257dced, 0xc2af5da2,
-    0x524bd28c, 0xc2abc4c9, 0x523fc776, 0xc2a82e4d,
-    0x5233bbac, 0xc2a49a2e, 0x5227af2e, 0xc2a1086d,
-    0x521ba1fd, 0xc29d790a, 0x520f941a, 0xc299ec05,
-    0x52038584, 0xc296615d, 0x51f7763c, 0xc292d914,
-    0x51eb6643, 0xc28f5329, 0x51df5599, 0xc28bcf9c,
-    0x51d3443f, 0xc2884e6e, 0x51c73235, 0xc284cf9f,
-    0x51bb1f7c, 0xc281532e, 0x51af0c13, 0xc27dd91c,
-    0x51a2f7fc, 0xc27a616a, 0x5196e337, 0xc276ec16,
-    0x518acdc4, 0xc2737922, 0x517eb7a4, 0xc270088e,
-    0x5172a0d7, 0xc26c9a58, 0x5166895f, 0xc2692e83,
-    0x515a713a, 0xc265c50e, 0x514e586a, 0xc2625df8,
-    0x51423ef0, 0xc25ef943, 0x513624cb, 0xc25b96ee,
-    0x512a09fc, 0xc25836f9, 0x511dee84, 0xc254d965,
-    0x5111d263, 0xc2517e31, 0x5105b599, 0xc24e255e,
-    0x50f99827, 0xc24aceed, 0x50ed7a0e, 0xc2477adc,
-    0x50e15b4e, 0xc244292c, 0x50d53be7, 0xc240d9de,
-    0x50c91bda, 0xc23d8cf1, 0x50bcfb28, 0xc23a4265,
-    0x50b0d9d0, 0xc236fa3b, 0x50a4b7d3, 0xc233b473,
-    0x50989532, 0xc230710d, 0x508c71ee, 0xc22d3009,
-    0x50804e06, 0xc229f167, 0x5074297b, 0xc226b528,
-    0x5068044e, 0xc2237b4b, 0x505bde7f, 0xc22043d0,
-    0x504fb80e, 0xc21d0eb8, 0x504390fd, 0xc219dc03,
-    0x5037694b, 0xc216abb1, 0x502b40f8, 0xc2137dc2,
-    0x501f1807, 0xc2105236, 0x5012ee76, 0xc20d290d,
-    0x5006c446, 0xc20a0248, 0x4ffa9979, 0xc206dde6,
-    0x4fee6e0d, 0xc203bbe8, 0x4fe24205, 0xc2009c4e,
-    0x4fd6155f, 0xc1fd7f17, 0x4fc9e81e, 0xc1fa6445,
-    0x4fbdba40, 0xc1f74bd6, 0x4fb18bc8, 0xc1f435cc,
-    0x4fa55cb4, 0xc1f12227, 0x4f992d06, 0xc1ee10e5,
-    0x4f8cfcbe, 0xc1eb0209, 0x4f80cbdc, 0xc1e7f591,
-    0x4f749a61, 0xc1e4eb7e, 0x4f68684e, 0xc1e1e3d0,
-    0x4f5c35a3, 0xc1dede87, 0x4f500260, 0xc1dbdba3,
-    0x4f43ce86, 0xc1d8db25, 0x4f379a16, 0xc1d5dd0c,
-    0x4f2b650f, 0xc1d2e158, 0x4f1f2f73, 0xc1cfe80a,
-    0x4f12f941, 0xc1ccf122, 0x4f06c27a, 0xc1c9fca0,
-    0x4efa8b20, 0xc1c70a84, 0x4eee5331, 0xc1c41ace,
-    0x4ee21aaf, 0xc1c12d7e, 0x4ed5e19a, 0xc1be4294,
-    0x4ec9a7f3, 0xc1bb5a11, 0x4ebd6db9, 0xc1b873f5,
-    0x4eb132ef, 0xc1b5903f, 0x4ea4f793, 0xc1b2aef0,
-    0x4e98bba7, 0xc1afd007, 0x4e8c7f2a, 0xc1acf386,
-    0x4e80421e, 0xc1aa196c, 0x4e740483, 0xc1a741b9,
-    0x4e67c65a, 0xc1a46c6e, 0x4e5b87a2, 0xc1a1998a,
-    0x4e4f485c, 0xc19ec90d, 0x4e430889, 0xc19bfaf9,
-    0x4e36c82a, 0xc1992f4c, 0x4e2a873e, 0xc1966606,
-    0x4e1e45c6, 0xc1939f29, 0x4e1203c3, 0xc190dab4,
-    0x4e05c135, 0xc18e18a7, 0x4df97e1d, 0xc18b5903,
-    0x4ded3a7b, 0xc1889bc6, 0x4de0f64f, 0xc185e0f3,
-    0x4dd4b19a, 0xc1832888, 0x4dc86c5d, 0xc1807285,
-    0x4dbc2698, 0xc17dbeec, 0x4dafe04b, 0xc17b0dbb,
-    0x4da39978, 0xc1785ef4, 0x4d97521d, 0xc175b296,
-    0x4d8b0a3d, 0xc17308a1, 0x4d7ec1d6, 0xc1706115,
-    0x4d7278eb, 0xc16dbbf3, 0x4d662f7b, 0xc16b193a,
-    0x4d59e586, 0xc16878eb, 0x4d4d9b0e, 0xc165db05,
-    0x4d415013, 0xc1633f8a, 0x4d350495, 0xc160a678,
-    0x4d28b894, 0xc15e0fd1, 0x4d1c6c11, 0xc15b7b94,
-    0x4d101f0e, 0xc158e9c1, 0x4d03d189, 0xc1565a58,
-    0x4cf78383, 0xc153cd5a, 0x4ceb34fe, 0xc15142c6,
-    0x4cdee5f9, 0xc14eba9d, 0x4cd29676, 0xc14c34df,
-    0x4cc64673, 0xc149b18b, 0x4cb9f5f3, 0xc14730a3,
-    0x4cada4f5, 0xc144b225, 0x4ca1537a, 0xc1423613,
-    0x4c950182, 0xc13fbc6c, 0x4c88af0e, 0xc13d4530,
-    0x4c7c5c1e, 0xc13ad060, 0x4c7008b3, 0xc1385dfb,
-    0x4c63b4ce, 0xc135ee02, 0x4c57606e, 0xc1338075,
-    0x4c4b0b94, 0xc1311553, 0x4c3eb641, 0xc12eac9d,
-    0x4c326075, 0xc12c4653, 0x4c260a31, 0xc129e276,
-    0x4c19b374, 0xc1278104, 0x4c0d5c41, 0xc12521ff,
-    0x4c010496, 0xc122c566, 0x4bf4ac75, 0xc1206b39,
-    0x4be853de, 0xc11e1379, 0x4bdbfad1, 0xc11bbe26,
-    0x4bcfa150, 0xc1196b3f, 0x4bc34759, 0xc1171ac6,
-    0x4bb6ecef, 0xc114ccb9, 0x4baa9211, 0xc1128119,
-    0x4b9e36c0, 0xc11037e6, 0x4b91dafc, 0xc10df120,
-    0x4b857ec7, 0xc10bacc8, 0x4b79221f, 0xc1096add,
-    0x4b6cc506, 0xc1072b5f, 0x4b60677c, 0xc104ee4f,
-    0x4b540982, 0xc102b3ac, 0x4b47ab19, 0xc1007b77,
-    0x4b3b4c40, 0xc0fe45b0, 0x4b2eecf8, 0xc0fc1257,
-    0x4b228d42, 0xc0f9e16b, 0x4b162d1d, 0xc0f7b2ee,
-    0x4b09cc8c, 0xc0f586df, 0x4afd6b8d, 0xc0f35d3e,
-    0x4af10a22, 0xc0f1360b, 0x4ae4a84b, 0xc0ef1147,
-    0x4ad84609, 0xc0eceef1, 0x4acbe35b, 0xc0eacf09,
-    0x4abf8043, 0xc0e8b190, 0x4ab31cc1, 0xc0e69686,
-    0x4aa6b8d5, 0xc0e47deb, 0x4a9a5480, 0xc0e267be,
-    0x4a8defc3, 0xc0e05401, 0x4a818a9d, 0xc0de42b2,
-    0x4a752510, 0xc0dc33d2, 0x4a68bf1b, 0xc0da2762,
-    0x4a5c58c0, 0xc0d81d61, 0x4a4ff1fe, 0xc0d615cf,
-    0x4a438ad7, 0xc0d410ad, 0x4a37234a, 0xc0d20dfa,
-    0x4a2abb59, 0xc0d00db6, 0x4a1e5303, 0xc0ce0fe3,
-    0x4a11ea49, 0xc0cc147f, 0x4a05812c, 0xc0ca1b8a,
-    0x49f917ac, 0xc0c82506, 0x49ecadc9, 0xc0c630f2,
-    0x49e04385, 0xc0c43f4d, 0x49d3d8df, 0xc0c25019,
-    0x49c76dd8, 0xc0c06355, 0x49bb0271, 0xc0be7901,
-    0x49ae96aa, 0xc0bc911d, 0x49a22a83, 0xc0baabaa,
-    0x4995bdfd, 0xc0b8c8a7, 0x49895118, 0xc0b6e815,
-    0x497ce3d5, 0xc0b509f3, 0x49707635, 0xc0b32e42,
-    0x49640837, 0xc0b15502, 0x495799dd, 0xc0af7e33,
-    0x494b2b27, 0xc0ada9d4, 0x493ebc14, 0xc0abd7e6,
-    0x49324ca7, 0xc0aa086a, 0x4925dcdf, 0xc0a83b5e,
-    0x49196cbc, 0xc0a670c4, 0x490cfc40, 0xc0a4a89b,
-    0x49008b6a, 0xc0a2e2e3, 0x48f41a3c, 0xc0a11f9d,
-    0x48e7a8b5, 0xc09f5ec8, 0x48db36d6, 0xc09da065,
-    0x48cec4a0, 0xc09be473, 0x48c25213, 0xc09a2af3,
-    0x48b5df30, 0xc09873e4, 0x48a96bf6, 0xc096bf48,
-    0x489cf867, 0xc0950d1d, 0x48908483, 0xc0935d64,
-    0x4884104b, 0xc091b01d, 0x48779bbe, 0xc0900548,
-    0x486b26de, 0xc08e5ce5, 0x485eb1ab, 0xc08cb6f5,
-    0x48523c25, 0xc08b1376, 0x4845c64d, 0xc089726a,
-    0x48395024, 0xc087d3d0, 0x482cd9a9, 0xc08637a9,
-    0x482062de, 0xc0849df4, 0x4813ebc2, 0xc08306b2,
-    0x48077457, 0xc08171e2, 0x47fafc9c, 0xc07fdf85,
-    0x47ee8493, 0xc07e4f9b, 0x47e20c3b, 0xc07cc223,
-    0x47d59396, 0xc07b371e, 0x47c91aa3, 0xc079ae8c,
-    0x47bca163, 0xc078286e, 0x47b027d7, 0xc076a4c2,
-    0x47a3adff, 0xc0752389, 0x479733dc, 0xc073a4c3,
-    0x478ab96e, 0xc0722871, 0x477e3eb5, 0xc070ae92,
-    0x4771c3b3, 0xc06f3726, 0x47654867, 0xc06dc22e,
-    0x4758ccd2, 0xc06c4fa8, 0x474c50f4, 0xc06adf97,
-    0x473fd4cf, 0xc06971f9, 0x47335862, 0xc06806ce,
-    0x4726dbae, 0xc0669e18, 0x471a5eb3, 0xc06537d4,
-    0x470de172, 0xc063d405, 0x470163eb, 0xc06272aa,
-    0x46f4e620, 0xc06113c2, 0x46e86810, 0xc05fb74e,
-    0x46dbe9bb, 0xc05e5d4e, 0x46cf6b23, 0xc05d05c3,
-    0x46c2ec48, 0xc05bb0ab, 0x46b66d29, 0xc05a5e07,
-    0x46a9edc9, 0xc0590dd8, 0x469d6e27, 0xc057c01d,
-    0x4690ee44, 0xc05674d6, 0x46846e1f, 0xc0552c03,
-    0x4677edbb, 0xc053e5a5, 0x466b6d16, 0xc052a1bb,
-    0x465eec33, 0xc0516045, 0x46526b10, 0xc0502145,
-    0x4645e9af, 0xc04ee4b8, 0x46396810, 0xc04daaa1,
-    0x462ce634, 0xc04c72fe, 0x4620641a, 0xc04b3dcf,
-    0x4613e1c5, 0xc04a0b16, 0x46075f33, 0xc048dad1,
-    0x45fadc66, 0xc047ad01, 0x45ee595d, 0xc04681a6,
-    0x45e1d61b, 0xc04558c0, 0x45d5529e, 0xc044324f,
-    0x45c8cee7, 0xc0430e53, 0x45bc4af8, 0xc041eccc,
-    0x45afc6d0, 0xc040cdba, 0x45a3426f, 0xc03fb11d,
-    0x4596bdd7, 0xc03e96f6, 0x458a3908, 0xc03d7f44,
-    0x457db403, 0xc03c6a07, 0x45712ec7, 0xc03b573f,
-    0x4564a955, 0xc03a46ed, 0x455823ae, 0xc0393910,
-    0x454b9dd3, 0xc0382da8, 0x453f17c3, 0xc03724b6,
-    0x4532917f, 0xc0361e3a, 0x45260b08, 0xc0351a33,
-    0x4519845e, 0xc03418a2, 0x450cfd82, 0xc0331986,
-    0x45007674, 0xc0321ce0, 0x44f3ef35, 0xc03122b0,
-    0x44e767c5, 0xc0302af5, 0x44dae024, 0xc02f35b1,
-    0x44ce5854, 0xc02e42e2, 0x44c1d054, 0xc02d5289,
-    0x44b54825, 0xc02c64a6, 0x44a8bfc7, 0xc02b7939,
-    0x449c373c, 0xc02a9042, 0x448fae83, 0xc029a9c1,
-    0x4483259d, 0xc028c5b6, 0x44769c8b, 0xc027e421,
-    0x446a134c, 0xc0270502, 0x445d89e2, 0xc0262859,
-    0x4451004d, 0xc0254e27, 0x4444768d, 0xc024766a,
-    0x4437eca4, 0xc023a124, 0x442b6290, 0xc022ce54,
-    0x441ed854, 0xc021fdfb, 0x44124dee, 0xc0213018,
-    0x4405c361, 0xc02064ab, 0x43f938ac, 0xc01f9bb5,
-    0x43ecadcf, 0xc01ed535, 0x43e022cc, 0xc01e112b,
-    0x43d397a3, 0xc01d4f99, 0x43c70c54, 0xc01c907c,
-    0x43ba80df, 0xc01bd3d6, 0x43adf546, 0xc01b19a7,
-    0x43a16988, 0xc01a61ee, 0x4394dda7, 0xc019acac,
-    0x438851a2, 0xc018f9e1, 0x437bc57b, 0xc018498c,
-    0x436f3931, 0xc0179bae, 0x4362acc5, 0xc016f047,
-    0x43562038, 0xc0164757, 0x43499389, 0xc015a0dd,
-    0x433d06bb, 0xc014fcda, 0x433079cc, 0xc0145b4e,
-    0x4323ecbe, 0xc013bc39, 0x43175f91, 0xc0131f9b,
-    0x430ad245, 0xc0128574, 0x42fe44dc, 0xc011edc3,
-    0x42f1b755, 0xc011588a, 0x42e529b0, 0xc010c5c7,
-    0x42d89bf0, 0xc010357c, 0x42cc0e13, 0xc00fa7a8,
-    0x42bf801a, 0xc00f1c4a, 0x42b2f207, 0xc00e9364,
-    0x42a663d8, 0xc00e0cf5, 0x4299d590, 0xc00d88fd,
-    0x428d472e, 0xc00d077c, 0x4280b8b3, 0xc00c8872,
-    0x42742a1f, 0xc00c0be0, 0x42679b73, 0xc00b91c4,
-    0x425b0caf, 0xc00b1a20, 0x424e7dd4, 0xc00aa4f3,
-    0x4241eee2, 0xc00a323d, 0x42355fd9, 0xc009c1ff,
-    0x4228d0bb, 0xc0095438, 0x421c4188, 0xc008e8e8,
-    0x420fb240, 0xc008800f, 0x420322e3, 0xc00819ae,
-    0x41f69373, 0xc007b5c4, 0x41ea03ef, 0xc0075452,
-    0x41dd7459, 0xc006f556, 0x41d0e4b0, 0xc00698d3,
-    0x41c454f5, 0xc0063ec6, 0x41b7c528, 0xc005e731,
-    0x41ab354b, 0xc0059214, 0x419ea55d, 0xc0053f6e,
-    0x4192155f, 0xc004ef3f, 0x41858552, 0xc004a188,
-    0x4178f536, 0xc0045648, 0x416c650b, 0xc0040d80,
-    0x415fd4d2, 0xc003c72f, 0x4153448c, 0xc0038356,
-    0x4146b438, 0xc00341f4, 0x413a23d8, 0xc003030a,
-    0x412d936c, 0xc002c697, 0x412102f4, 0xc0028c9c,
-    0x41147271, 0xc0025519, 0x4107e1e3, 0xc002200d,
-    0x40fb514b, 0xc001ed78, 0x40eec0aa, 0xc001bd5c,
-    0x40e22fff, 0xc0018fb6, 0x40d59f4c, 0xc0016489,
-    0x40c90e90, 0xc0013bd3, 0x40bc7dcc, 0xc0011594,
-    0x40afed02, 0xc000f1ce, 0x40a35c30, 0xc000d07e,
-    0x4096cb58, 0xc000b1a7, 0x408a3a7b, 0xc0009547,
-    0x407da998, 0xc0007b5f, 0x407118b0, 0xc00063ee,
-    0x406487c4, 0xc0004ef5, 0x4057f6d4, 0xc0003c74,
-    0x404b65e1, 0xc0002c6a, 0x403ed4ea, 0xc0001ed8,
-    0x403243f1, 0xc00013bd, 0x4025b2f7, 0xc0000b1a,
-    0x401921fb, 0xc00004ef, 0x400c90fe, 0xc000013c,
-};
-
-/**    
-* @brief  Initialization function for the Q31 RFFT/RIFFT.   
-* @param[in, out] *S             points to an instance of the Q31 RFFT/RIFFT structure.   
-* @param[in]      fftLenReal     length of the FFT.   
-* @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.   
-* @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.   
-*    
-* \par Description:   
-* \par   
-* The parameter fftLenReal	Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.    
-* \par    
-* The parameter ifftFlagR controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.    
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par    7
-* This function also initializes Twiddle factor table.    
-*/
-
-arm_status arm_rfft_init_q31(
-    arm_rfft_instance_q31 * S,
-    uint32_t fftLenReal,
-    uint32_t ifftFlagR,
-    uint32_t bitReverseFlag)
-{
-    /*  Initialise the default arm status */
-    arm_status status = ARM_MATH_SUCCESS;
-
-    /*  Initialize the Real FFT length */
-    S->fftLenReal = (uint16_t) fftLenReal;
-
-    /*  Initialize the Twiddle coefficientA pointer */
-    S->pTwiddleAReal = (q31_t *) realCoefAQ31;
-
-    /*  Initialize the Twiddle coefficientB pointer */
-    S->pTwiddleBReal = (q31_t *) realCoefBQ31;
-
-    /*  Initialize the Flag for selection of RFFT or RIFFT */
-    S->ifftFlagR = (uint8_t) ifftFlagR;
-
-    /*  Initialize the Flag for calculation Bit reversal or not */
-    S->bitReverseFlagR = (uint8_t) bitReverseFlag;
-
-    /*  Initialization of coef modifier depending on the FFT length */
-    switch (S->fftLenReal)
-    {
-    case 8192u:
-        S->twidCoefRModifier = 1u;
-        S->pCfft = &arm_cfft_sR_q31_len4096;
-        break;
-    case 4096u:
-        S->twidCoefRModifier = 2u;
-        S->pCfft = &arm_cfft_sR_q31_len2048;
-        break;
-    case 2048u:
-        S->twidCoefRModifier = 4u;
-        S->pCfft = &arm_cfft_sR_q31_len1024;
-        break;
-    case 1024u:
-        S->twidCoefRModifier = 8u;
-        S->pCfft = &arm_cfft_sR_q31_len512;
-        break;
-    case 512u:
-        S->twidCoefRModifier = 16u;
-        S->pCfft = &arm_cfft_sR_q31_len256;
-        break;
-    case 256u:
-        S->twidCoefRModifier = 32u;
-        S->pCfft = &arm_cfft_sR_q31_len128;
-        break;
-    case 128u:
-        S->twidCoefRModifier = 64u;
-        S->pCfft = &arm_cfft_sR_q31_len64;
-        break;
-    case 64u:
-        S->twidCoefRModifier = 128u;
-        S->pCfft = &arm_cfft_sR_q31_len32;
-        break;
-    case 32u:
-        S->twidCoefRModifier = 256u;
-        S->pCfft = &arm_cfft_sR_q31_len16;
-        break;
-    default:
-        /*  Reporting argument error if rfftSize is not valid value */
-        status = ARM_MATH_ARGUMENT_ERROR;
-        break;
-    }
-
-    /* return the status of RFFT Init function */
-    return (status);
-}
-
-/**    
-* @} end of RealFFT group    
-*/
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c
deleted file mode 100755
index 6e76b9c2..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c
+++ /dev/null
@@ -1,439 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_q15.c    
-*    
-* Description:	RFFT & RIFFT Q15 process function    
-*    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/*--------------------------------------------------------------------    
-*		Internal functions prototypes    
---------------------------------------------------------------------*/
-
-void arm_split_rfft_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    q15_t * pATable,
-    q15_t * pBTable,
-    q15_t * pDst,
-    uint32_t modifier);
-
-void arm_split_rifft_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    q15_t * pATable,
-    q15_t * pBTable,
-    q15_t * pDst,
-    uint32_t modifier);
-
-/**    
-* @addtogroup RealFFT    
-* @{    
-*/
-
-/**    
-* @brief Processing function for the Q15 RFFT/RIFFT.   
-* @param[in]  *S    points to an instance of the Q15 RFFT/RIFFT structure.   
-* @param[in]  *pSrc points to the input buffer.   
-* @param[out] *pDst points to the output buffer.   
-* @return none.   
-*    
-* \par Input an output formats:   
-* \par    
-* Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.    
-* Hence the output format is different for different RFFT sizes.    
-* The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:   
-* \par    
-* \image html RFFTQ15.gif "Input and Output Formats for Q15 RFFT"    
-* \par    
-* \image html RIFFTQ15.gif "Input and Output Formats for Q15 RIFFT"    
-*/
-
-void arm_rfft_q15(
-    const arm_rfft_instance_q15 * S,
-    q15_t * pSrc,
-    q15_t * pDst)
-{
-    const arm_cfft_instance_q15 *S_CFFT = S->pCfft;
-    uint32_t i;
-    uint32_t L2 = S->fftLenReal >> 1;
-
-    /* Calculation of RIFFT of input */
-    if(S->ifftFlagR == 1u)
-    {
-        /*  Real IFFT core process */
-        arm_split_rifft_q15(pSrc, L2, S->pTwiddleAReal,
-                            S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-        
-        /* Complex IFFT process */
-        arm_cfft_q15(S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
-        
-        for(i=0;ifftLenReal;i++)
-        {
-            pDst[i] = pDst[i] << 1;
-        }
-    }
-    else
-    {
-        /* Calculation of RFFT of input */
-        
-        /* Complex FFT process */
-        arm_cfft_q15(S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
-
-        /*  Real FFT core process */
-        arm_split_rfft_q15(pSrc, L2, S->pTwiddleAReal,
-                            S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-    }
-}
-
-/**    
-* @} end of RealFFT group    
-*/
-
-/**    
-* @brief  Core Real FFT process    
-* @param  *pSrc 				points to the input buffer.   
-* @param  fftLen  				length of FFT.   
-* @param  *pATable 			points to the A twiddle Coef buffer.    
-* @param  *pBTable 			points to the B twiddle Coef buffer.   
-* @param  *pDst 				points to the output buffer.   
-* @param  modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
-* @return none.    
-* The function implements a Real FFT    
-*/
-
-void arm_split_rfft_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    q15_t * pATable,
-    q15_t * pBTable,
-    q15_t * pDst,
-    uint32_t modifier)
-{
-    uint32_t i;                                    /* Loop Counter */
-    q31_t outR, outI;                              /* Temporary variables for output */
-    q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-    q15_t *pSrc1, *pSrc2;
-#ifndef ARM_MATH_CM0_FAMILY
-    q15_t *pD1, *pD2;
-#endif
-
-    //  pSrc[2u * fftLen] = pSrc[0]; 
-    //  pSrc[(2u * fftLen) + 1u] = pSrc[1]; 
-
-    pCoefA = &pATable[modifier * 2u];
-    pCoefB = &pBTable[modifier * 2u];
-
-    pSrc1 = &pSrc[2];
-    pSrc2 = &pSrc[(2u * fftLen) - 2u];
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-    i = 1u;
-    pD1 = pDst + 2;
-    pD2 = pDst + (4u * fftLen) - 2;
-
-    for(i = fftLen - 1; i > 0; i--)
-    {
-        /*    
-        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]    
-        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +    
-        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-        */
-
-        /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +    
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
-
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        /* pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] */
-        outR = __SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA));
-
-#else
-
-        /* -(pSrc[2 * i + 1] * pATable[2 * i + 1] - pSrc[2 * i] * pATable[2 * i]) */
-        outR = -(__SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA)));
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /* pSrc[2 * n - 2 * i] * pBTable[2 * i] +    
-        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
-        outR = __SMLAD(*__SIMD32(pSrc2), *__SIMD32(pCoefB), outR) >> 16u;
-
-        /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        outI = __SMUSDX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB));
-
-#else
-
-        outI = __SMUSDX(*__SIMD32(pCoefB), *__SIMD32(pSrc2)--);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /* (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] */
-        outI = __SMLADX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), outI);
-
-        /* write output */
-        *pD1++ = (q15_t) outR;
-        *pD1++ = outI >> 16u;
-
-        /* write complex conjugate output */
-        pD2[0] = (q15_t) outR;
-        pD2[1] = -(outI >> 16u);
-        pD2 -= 2;
-
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (2u * modifier);
-        pCoefA = pCoefA + (2u * modifier);
-    }
-
-    pDst[2u * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
-    pDst[(2u * fftLen) + 1u] = 0;
-
-    pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
-    pDst[1] = 0;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-    i = 1u;
-
-    while(i < fftLen)
-    {
-        /*    
-        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]    
-        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +    
-        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-        */
-
-        outR = *pSrc1 * *pCoefA;
-        outR = outR - (*(pSrc1 + 1) * *(pCoefA + 1));
-        outR = outR + (*pSrc2 * *pCoefB);
-        outR = (outR + (*(pSrc2 + 1) * *(pCoefB + 1))) >> 16;
-
-
-        /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +    
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);   
-        */
-
-        outI = *pSrc2 * *(pCoefB + 1);
-        outI = outI - (*(pSrc2 + 1) * *pCoefB);
-        outI = outI + (*(pSrc1 + 1) * *pCoefA);
-        outI = outI + (*pSrc1 * *(pCoefA + 1));
-
-        /* update input pointers */
-        pSrc1 += 2u;
-        pSrc2 -= 2u;
-
-        /* write output */
-        pDst[2u * i] = (q15_t) outR;
-        pDst[(2u * i) + 1u] = outI >> 16u;
-
-        /* write complex conjugate output */
-        pDst[(4u * fftLen) - (2u * i)] = (q15_t) outR;
-        pDst[((4u * fftLen) - (2u * i)) + 1u] = -(outI >> 16u);
-
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (2u * modifier);
-        pCoefA = pCoefA + (2u * modifier);
-
-        i++;
-    }
-
-    pDst[2u * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
-    pDst[(2u * fftLen) + 1u] = 0;
-
-    pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
-    pDst[1] = 0;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-}
-
-
-/**    
-* @brief  Core Real IFFT process    
-* @param[in]   *pSrc 				points to the input buffer.    
-* @param[in]   fftLen  		    length of FFT.   
-* @param[in]   *pATable 			points to the twiddle Coef A buffer.   
-* @param[in]   *pBTable 			points to the twiddle Coef B buffer.    
-* @param[out]  *pDst 				points to the output buffer.   
-* @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
-* @return none.    
-* The function implements a Real IFFT    
-*/
-void arm_split_rifft_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    q15_t * pATable,
-    q15_t * pBTable,
-    q15_t * pDst,
-    uint32_t modifier)
-{
-    uint32_t i;                                    /* Loop Counter */
-    q31_t outR, outI;                              /* Temporary variables for output */
-    q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-    q15_t *pSrc1, *pSrc2;
-    q15_t *pDst1 = &pDst[0];
-
-    pCoefA = &pATable[0];
-    pCoefB = &pBTable[0];
-
-    pSrc1 = &pSrc[0];
-    pSrc2 = &pSrc[2u * fftLen];
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-    i = fftLen;
-
-    while(i > 0u)
-    {
-        /*    
-        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +    
-        pIn[2 * n - 2 * i] * pBTable[2 * i] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-
-        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -    
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);    
-        */
-
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        /* pIn[2 * n - 2 * i] * pBTable[2 * i] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
-        outR = __SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB));
-
-#else
-
-        /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] +  
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1])) */
-        outR = -(__SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB)));
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +    
-        pIn[2 * n - 2 * i] * pBTable[2 * i] */
-        outR = __SMLAD(*__SIMD32(pSrc1), *__SIMD32(pCoefA), outR) >> 16u;
-
-        /*    
-        -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] +    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-        outI = __SMUADX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB));
-
-        /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        outI = __SMLSDX(*__SIMD32(pCoefA), *__SIMD32(pSrc1)++, -outI);
-
-#else
-
-        outI = __SMLSDX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), -outI);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-        /* write output */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *__SIMD32(pDst1)++ = __PKHBT(outR, (outI >> 16u), 16);
-
-#else
-
-        *__SIMD32(pDst1)++ = __PKHBT((outI >> 16u), outR, 16);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (2u * modifier);
-        pCoefA = pCoefA + (2u * modifier);
-
-        i--;
-    }
-#else
-    /* Run the below code for Cortex-M0 */
-    i = fftLen;
-
-    while(i > 0u)
-    {
-        /*    
-        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +    
-        pIn[2 * n - 2 * i] * pBTable[2 * i] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-        */
-
-        outR = *pSrc2 * *pCoefB;
-        outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1));
-        outR = outR + (*pSrc1 * *pCoefA);
-        outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 16;
-
-        /*   
-        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -   
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -   
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);   
-        */
-
-        outI = *(pSrc1 + 1) * *pCoefA;
-        outI = outI - (*pSrc1 * *(pCoefA + 1));
-        outI = outI - (*pSrc2 * *(pCoefB + 1));
-        outI = outI - (*(pSrc2 + 1) * *(pCoefB));
-
-        /* update input pointers */
-        pSrc1 += 2u;
-        pSrc2 -= 2u;
-
-        /* write output */
-        *pDst1++ = (q15_t) outR;
-        *pDst1++ = (q15_t) (outI >> 16);
-
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (2u * modifier);
-        pCoefA = pCoefA + (2u * modifier);
-
-        i--;
-    }
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-}
diff --git a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c b/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c
deleted file mode 100755
index 71bba217..00000000
--- a/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c
+++ /dev/null
@@ -1,296 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_q31.c    
-*    
-* Description:	RFFT & RIFFT Q31 process function    
-*    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/*--------------------------------------------------------------------    
-*		Internal functions prototypes    
---------------------------------------------------------------------*/
-
-void arm_split_rfft_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pATable,
-    q31_t * pBTable,
-    q31_t * pDst,
-    uint32_t modifier);
-
-void arm_split_rifft_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pATable,
-    q31_t * pBTable,
-    q31_t * pDst,
-    uint32_t modifier);
-
-/**    
-* @addtogroup RealFFT    
-* @{    
-*/
-
-/**    
-* @brief Processing function for the Q31 RFFT/RIFFT.   
-* @param[in]  *S    points to an instance of the Q31 RFFT/RIFFT structure.   
-* @param[in]  *pSrc points to the input buffer.   
-* @param[out] *pDst points to the output buffer.   
-* @return none.   
-*    
-* \par Input an output formats:   
-* \par    
-* Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.   
-* Hence the output format is different for different RFFT sizes.    
-* The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:   
-* \par    
-* \image html RFFTQ31.gif "Input and Output Formats for Q31 RFFT"    
-*    
-* \par    
-* \image html RIFFTQ31.gif "Input and Output Formats for Q31 RIFFT"    
-*/
-void arm_rfft_q31(
-    const arm_rfft_instance_q31 * S,
-    q31_t * pSrc,
-    q31_t * pDst)
-{
-    const arm_cfft_instance_q31 *S_CFFT = S->pCfft;
-    uint32_t i;
-    uint32_t L2 = S->fftLenReal >> 1;
-
-    /* Calculation of RIFFT of input */
-    if(S->ifftFlagR == 1u)
-    {
-        /*  Real IFFT core process */
-        arm_split_rifft_q31(pSrc, L2, S->pTwiddleAReal,
-                            S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-        
-        /* Complex IFFT process */
-        arm_cfft_q31(S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
-        
-        for(i=0;ifftLenReal;i++)
-        {
-            pDst[i] = pDst[i] << 1;
-        }
-    }
-    else
-    {
-        /* Calculation of RFFT of input */
-        
-        /* Complex FFT process */
-        arm_cfft_q31(S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
-
-        /*  Real FFT core process */
-        arm_split_rfft_q31(pSrc, L2, S->pTwiddleAReal,
-                            S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-    }
-}
-
-/**    
-* @} end of RealFFT group    
-*/
-
-/**    
-* @brief  Core Real FFT process    
-* @param[in]   *pSrc 				points to the input buffer.    
-* @param[in]   fftLen  			    length of FFT.   
-* @param[in]   *pATable 			points to the twiddle Coef A buffer.    
-* @param[in]   *pBTable 			points to the twiddle Coef B buffer.    
-* @param[out]  *pDst 				points to the output buffer.    
-* @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
-* @return none.    
-*/
-void arm_split_rfft_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pATable,
-    q31_t * pBTable,
-    q31_t * pDst,
-    uint32_t modifier)
-{
-    uint32_t i;                                    /* Loop Counter */
-    q31_t outR, outI;                              /* Temporary variables for output */
-    q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-    q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
-    q31_t *pOut1 = &pDst[2], *pOut2 = &pDst[(4u * fftLen) - 1u];
-    q31_t *pIn1 = &pSrc[2], *pIn2 = &pSrc[(2u * fftLen) - 1u];
-
-    /* Init coefficient pointers */
-    pCoefA = &pATable[modifier * 2u];
-    pCoefB = &pBTable[modifier * 2u];
-
-    i = fftLen - 1u;
-
-    while(i > 0u)
-    {
-        /*    
-        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]    
-        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +    
-        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-        */
-
-        /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +    
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
-
-        CoefA1 = *pCoefA++;
-        CoefA2 = *pCoefA;
-
-        /* outR = (pSrc[2 * i] * pATable[2 * i] */    
-        mult_32x32_keep32_R(outR, *pIn1, CoefA1);
-
-        /* outI = pIn[2 * i] * pATable[2 * i + 1] */
-        mult_32x32_keep32_R(outI, *pIn1++, CoefA2);
-
-        /* - pSrc[2 * i + 1] * pATable[2 * i + 1] */
-        multSub_32x32_keep32_R(outR, *pIn1, CoefA2);
-
-        /* (pIn[2 * i + 1] * pATable[2 * i] */
-        multAcc_32x32_keep32_R(outI, *pIn1++, CoefA1);
-
-        /* pSrc[2 * n - 2 * i] * pBTable[2 * i]  */
-        multSub_32x32_keep32_R(outR, *pIn2, CoefA2);
-        CoefB1 = *pCoefB;
-
-        /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
-        multSub_32x32_keep32_R(outI, *pIn2--, CoefB1);
-
-        /* pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
-        multAcc_32x32_keep32_R(outR, *pIn2, CoefB1);
-
-        /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-        multSub_32x32_keep32_R(outI, *pIn2--, CoefA2);
-
-        /* write output */
-        *pOut1++ = outR;
-        *pOut1++ = outI;
-
-        /* write complex conjugate output */
-        *pOut2-- = -outI;
-        *pOut2-- = outR;
-
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (modifier * 2u);
-        pCoefA = pCoefA + ((modifier * 2u) - 1u);
-
-        i--;
-    }
-    pDst[2u * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
-    pDst[(2u * fftLen) + 1u] = 0;
-
-    pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
-    pDst[1] = 0;
-}
-
-/**    
-* @brief  Core Real IFFT process    
-* @param[in]   *pSrc 				points to the input buffer.   
-* @param[in]   fftLen  			    length of FFT.    
-* @param[in]   *pATable 			points to the twiddle Coef A buffer.   
-* @param[in]   *pBTable 			points to the twiddle Coef B buffer.    
-* @param[out]  *pDst 				points to the output buffer.   
-* @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
-* @return none.    
-*/
-void arm_split_rifft_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pATable,
-    q31_t * pBTable,
-    q31_t * pDst,
-    uint32_t modifier)
-{
-    q31_t outR, outI;                              /* Temporary variables for output */
-    q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-    q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
-    q31_t *pIn1 = &pSrc[0], *pIn2 = &pSrc[(2u * fftLen) + 1u];
-
-    pCoefA = &pATable[0];
-    pCoefB = &pBTable[0];
-
-    while(fftLen > 0u)
-    {
-        /*    
-        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +    
-        pIn[2 * n - 2 * i] * pBTable[2 * i] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-
-        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -    
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);   
-        */
-        CoefA1 = *pCoefA++;
-        CoefA2 = *pCoefA;
-
-        /* outR = (pIn[2 * i] * pATable[2 * i] */
-        mult_32x32_keep32_R(outR, *pIn1, CoefA1);
-
-        /* - pIn[2 * i] * pATable[2 * i + 1] */
-        mult_32x32_keep32_R(outI, *pIn1++, -CoefA2);
-        
-        /* pIn[2 * i + 1] * pATable[2 * i + 1] */
-        multAcc_32x32_keep32_R(outR, *pIn1, CoefA2);
-
-        /* pIn[2 * i + 1] * pATable[2 * i] */
-        multAcc_32x32_keep32_R(outI, *pIn1++, CoefA1);
-
-        /* pIn[2 * n - 2 * i] * pBTable[2 * i] */
-        multAcc_32x32_keep32_R(outR, *pIn2, CoefA2);
-        CoefB1 = *pCoefB;
-
-        /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
-        multSub_32x32_keep32_R(outI, *pIn2--, CoefB1);
-
-        /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
-        multAcc_32x32_keep32_R(outR, *pIn2, CoefB1);
-
-        /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-        multAcc_32x32_keep32_R(outI, *pIn2--, CoefA2);
-
-        /* write output */
-        *pDst++ = outR;
-        *pDst++ = outI;
-
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (modifier * 2u);
-        pCoefA = pCoefA + ((modifier * 2u) - 1u);
-
-        /* Decrement loop count */
-        fftLen--;
-    }
-}
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h b/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h
deleted file mode 100755
index 5d1e8a8c..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h
+++ /dev/null
@@ -1,5955 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l011xx.h
-  * @author  MCD Application Team
-  * @brief   CMSIS Cortex-M0+ Device Peripheral Access Layer Header File. 
-  *          This file contains all the peripheral register's definitions, bits 
-  *          definitions and memory mapping for stm32l011xx devices.  
-  *          
-  *          This file contains:
-  *           - Data structures and the address mapping for all peripherals
-  *           - Peripheral's registers declarations and bits definition
-  *           - Macros to access peripheral's registers hardware
-  *
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l011xx
-  * @{
-  */
-    
-#ifndef __STM32L011xx_H
-#define __STM32L011xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-  
-
-/** @addtogroup Configuration_section_for_CMSIS
-  * @{
-  */
-/**
-  * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals 
-  */
-#define __CM0PLUS_REV             0 /*!< Core Revision r0p0                            */
-#define __MPU_PRESENT             0 /*!< STM32L0xx  provides no MPU                    */
-#define __VTOR_PRESENT            1 /*!< Vector  Table  Register supported             */
-#define __NVIC_PRIO_BITS          2 /*!< STM32L0xx uses 2 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used  */
-
-/**
-  * @}
-  */
-   
-/** @addtogroup Peripheral_interrupt_number_definition
-  * @{
-  */
-   
-/**
- * @brief stm32l011xx Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
- */
-
-/*!< Interrupt Number Definition */
-typedef enum
-{
-/******  Cortex-M0 Processor Exceptions Numbers ******************************************************/
-  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
-  HardFault_IRQn              = -13,    /*!< 3 Cortex-M0+ Hard Fault Interrupt                       */
-  SVC_IRQn                    = -5,     /*!< 11 Cortex-M0+ SV Call Interrupt                         */
-  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M0+ Pend SV Interrupt                         */
-  SysTick_IRQn                = -1,     /*!< 15 Cortex-M0+ System Tick Interrupt                     */
-
-/******  STM32L-0 specific Interrupt Numbers *********************************************************/
-  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
-  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detect Interrupt                  */
-  RTC_IRQn                    = 2,      /*!< RTC through EXTI Line Interrupt                         */
-  FLASH_IRQn                  = 3,      /*!< FLASH Interrupt                                         */
-  RCC_IRQn                    = 4,      /*!< RCC Interrupt                                           */
-  EXTI0_1_IRQn                = 5,      /*!< EXTI Line 0 and 1 Interrupts                            */
-  EXTI2_3_IRQn                = 6,      /*!< EXTI Line 2 and 3 Interrupts                            */
-  EXTI4_15_IRQn               = 7,      /*!< EXTI Line 4 to 15 Interrupts                            */
-  DMA1_Channel1_IRQn          = 9,      /*!< DMA1 Channel 1 Interrupt                                */
-  DMA1_Channel2_3_IRQn        = 10,     /*!< DMA1 Channel 2 and Channel 3 Interrupts                 */
-  DMA1_Channel4_5_6_7_IRQn    = 11,     /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */
-  ADC1_COMP_IRQn              = 12,     /*!< ADC1, COMP1 and COMP2 Interrupts                        */
-  LPTIM1_IRQn                 = 13,     /*!< LPTIM1 Interrupt                                        */
-  TIM2_IRQn                   = 15,     /*!< TIM2 Interrupt                                          */
-  TIM21_IRQn                  = 20,     /*!< TIM21 Interrupt                                         */
-  I2C1_IRQn                   = 23,     /*!< I2C1 Interrupt                                          */
-  SPI1_IRQn                   = 25,     /*!< SPI1 Interrupt                                          */
-  USART2_IRQn                 = 28,     /*!< USART2 Interrupt                                        */
-  LPUART1_IRQn                = 29,     /*!< LPUART1 Interrupt                                       */
-} IRQn_Type;
-
-/**
-  * @}
-  */
-
-#include "core_cm0plus.h"
-#include "system_stm32l0xx.h"
-#include 
-
-/** @addtogroup Peripheral_registers_structures
-  * @{
-  */   
-
-/** 
-  * @brief Analog to Digital Converter  
-  */
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< ADC Interrupt and Status register,                          Address offset:0x00 */
-  __IO uint32_t IER;          /*!< ADC Interrupt Enable register,                              Address offset:0x04 */
-  __IO uint32_t CR;           /*!< ADC Control register,                                       Address offset:0x08 */
-  __IO uint32_t CFGR1;        /*!< ADC Configuration register 1,                               Address offset:0x0C */
-  __IO uint32_t CFGR2;        /*!< ADC Configuration register 2,                               Address offset:0x10 */
-  __IO uint32_t SMPR;         /*!< ADC Sampling time register,                                 Address offset:0x14 */
-  uint32_t   RESERVED1;       /*!< Reserved,                                                                  0x18 */
-  uint32_t   RESERVED2;       /*!< Reserved,                                                                  0x1C */
-  __IO uint32_t TR;           /*!< ADC watchdog threshold register,                            Address offset:0x20 */
-  uint32_t   RESERVED3;       /*!< Reserved,                                                                  0x24 */
-  __IO uint32_t CHSELR;       /*!< ADC channel selection register,                             Address offset:0x28 */
-  uint32_t   RESERVED4[5];    /*!< Reserved,                                                                  0x2C */
-  __IO uint32_t DR;           /*!< ADC data register,                                          Address offset:0x40 */
-  uint32_t   RESERVED5[28];   /*!< Reserved,                                                           0x44 - 0xB0 */
-  __IO uint32_t CALFACT;      /*!< ADC data register,                                          Address offset:0xB4 */
-} ADC_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CCR;
-} ADC_Common_TypeDef;
-
-
-/**
-  * @brief Comparator 
-  */
-
-typedef struct
-{
-  __IO uint32_t CSR;     /*!< COMP comparator control and status register, Address offset: 0x18 */
-} COMP_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CSR;         /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
-} COMP_Common_TypeDef;
-
-
-/**
-* @brief CRC calculation unit
-*/
-
-typedef struct
-{
-__IO uint32_t DR;            /*!< CRC Data register,                            Address offset: 0x00 */
-__IO uint8_t IDR;            /*!< CRC Independent data register,                Address offset: 0x04 */
-uint8_t RESERVED0;           /*!< Reserved,                                                     0x05 */
-uint16_t RESERVED1;          /*!< Reserved,                                                     0x06 */
-__IO uint32_t CR;            /*!< CRC Control register,                         Address offset: 0x08 */
-uint32_t RESERVED2;          /*!< Reserved,                                                     0x0C */
-__IO uint32_t INIT;          /*!< Initial CRC value register,                   Address offset: 0x10 */
-__IO uint32_t POL;           /*!< CRC polynomial register,                      Address offset: 0x14 */
-} CRC_TypeDef;
-
-/** 
-  * @brief Debug MCU
-  */
-
-typedef struct
-{
-  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
-  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
-  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
-  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/** 
-  * @brief DMA Controller
-  */
-
-typedef struct
-{
-  __IO uint32_t CCR;          /*!< DMA channel x configuration register */
-  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register */
-  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register */
-  __IO uint32_t CMAR;         /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
-  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
-} DMA_TypeDef;                                                                  
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t CSELR;        /*!< DMA channel selection register,              Address offset: 0xA8 */
-} DMA_Request_TypeDef;                                                          
-                                                                                
-/**                                                                             
-  * @brief External Interrupt/Event Controller                                  
-  */                                                                            
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t IMR;          /*!
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l021xx
-  * @{
-  */
-    
-#ifndef __STM32L021xx_H
-#define __STM32L021xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-  
-
-/** @addtogroup Configuration_section_for_CMSIS
-  * @{
-  */
-/**
-  * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals 
-  */
-#define __CM0PLUS_REV             0 /*!< Core Revision r0p0                            */
-#define __MPU_PRESENT             0 /*!< STM32L0xx  provides no MPU                    */
-#define __VTOR_PRESENT            1 /*!< Vector  Table  Register supported             */
-#define __NVIC_PRIO_BITS          2 /*!< STM32L0xx uses 2 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used  */
-
-/**
-  * @}
-  */
-   
-/** @addtogroup Peripheral_interrupt_number_definition
-  * @{
-  */
-   
-/**
- * @brief stm32l021xx Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
- */
-
-/*!< Interrupt Number Definition */
-typedef enum
-{
-/******  Cortex-M0 Processor Exceptions Numbers ******************************************************/
-  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
-  HardFault_IRQn              = -13,    /*!< 3 Cortex-M0+ Hard Fault Interrupt                       */
-  SVC_IRQn                    = -5,     /*!< 11 Cortex-M0+ SV Call Interrupt                         */
-  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M0+ Pend SV Interrupt                         */
-  SysTick_IRQn                = -1,     /*!< 15 Cortex-M0+ System Tick Interrupt                     */
-
-/******  STM32L-0 specific Interrupt Numbers *********************************************************/
-  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
-  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detect Interrupt                  */
-  RTC_IRQn                    = 2,      /*!< RTC through EXTI Line Interrupt                         */
-  FLASH_IRQn                  = 3,      /*!< FLASH Interrupt                                         */
-  RCC_IRQn                    = 4,      /*!< RCC Interrupt                                           */
-  EXTI0_1_IRQn                = 5,      /*!< EXTI Line 0 and 1 Interrupts                            */
-  EXTI2_3_IRQn                = 6,      /*!< EXTI Line 2 and 3 Interrupts                            */
-  EXTI4_15_IRQn               = 7,      /*!< EXTI Line 4 to 15 Interrupts                            */
-  DMA1_Channel1_IRQn          = 9,      /*!< DMA1 Channel 1 Interrupt                                */
-  DMA1_Channel2_3_IRQn        = 10,     /*!< DMA1 Channel 2 and Channel 3 Interrupts                 */
-  DMA1_Channel4_5_6_7_IRQn    = 11,     /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */
-  ADC1_COMP_IRQn              = 12,     /*!< ADC1, COMP1 and COMP2 Interrupts                        */
-  LPTIM1_IRQn                 = 13,     /*!< LPTIM1 Interrupt                                        */
-  TIM2_IRQn                   = 15,     /*!< TIM2 Interrupt                                          */
-  TIM21_IRQn                  = 20,     /*!< TIM21 Interrupt                                         */
-  I2C1_IRQn                   = 23,     /*!< I2C1 Interrupt                                          */
-  SPI1_IRQn                   = 25,     /*!< SPI1 Interrupt                                          */
-  USART2_IRQn                 = 28,     /*!< USART2 Interrupt                                        */
-  AES_LPUART1_IRQn            = 29,     /*!< AES and LPUART1 Interrupts                              */
-} IRQn_Type;
-
-/**
-  * @}
-  */
-
-#include "core_cm0plus.h"
-#include "system_stm32l0xx.h"
-#include 
-
-/** @addtogroup Peripheral_registers_structures
-  * @{
-  */   
-
-/** 
-  * @brief Analog to Digital Converter  
-  */
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< ADC Interrupt and Status register,                          Address offset:0x00 */
-  __IO uint32_t IER;          /*!< ADC Interrupt Enable register,                              Address offset:0x04 */
-  __IO uint32_t CR;           /*!< ADC Control register,                                       Address offset:0x08 */
-  __IO uint32_t CFGR1;        /*!< ADC Configuration register 1,                               Address offset:0x0C */
-  __IO uint32_t CFGR2;        /*!< ADC Configuration register 2,                               Address offset:0x10 */
-  __IO uint32_t SMPR;         /*!< ADC Sampling time register,                                 Address offset:0x14 */
-  uint32_t   RESERVED1;       /*!< Reserved,                                                                  0x18 */
-  uint32_t   RESERVED2;       /*!< Reserved,                                                                  0x1C */
-  __IO uint32_t TR;           /*!< ADC watchdog threshold register,                            Address offset:0x20 */
-  uint32_t   RESERVED3;       /*!< Reserved,                                                                  0x24 */
-  __IO uint32_t CHSELR;       /*!< ADC channel selection register,                             Address offset:0x28 */
-  uint32_t   RESERVED4[5];    /*!< Reserved,                                                                  0x2C */
-  __IO uint32_t DR;           /*!< ADC data register,                                          Address offset:0x40 */
-  uint32_t   RESERVED5[28];   /*!< Reserved,                                                           0x44 - 0xB0 */
-  __IO uint32_t CALFACT;      /*!< ADC data register,                                          Address offset:0xB4 */
-} ADC_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CCR;
-} ADC_Common_TypeDef;
-
-/** 
-  * @brief AES hardware accelerator
-  */
-
-typedef struct
-{
-  __IO uint32_t CR;      /*!< AES control register,                        Address offset: 0x00 */
-  __IO uint32_t SR;      /*!< AES status register,                         Address offset: 0x04 */
-  __IO uint32_t DINR;    /*!< AES data input register,                     Address offset: 0x08 */
-  __IO uint32_t DOUTR;   /*!< AES data output register,                    Address offset: 0x0C */
-  __IO uint32_t KEYR0;   /*!< AES key register 0,                          Address offset: 0x10 */
-  __IO uint32_t KEYR1;   /*!< AES key register 1,                          Address offset: 0x14 */
-  __IO uint32_t KEYR2;   /*!< AES key register 2,                          Address offset: 0x18 */
-  __IO uint32_t KEYR3;   /*!< AES key register 3,                          Address offset: 0x1C */
-  __IO uint32_t IVR0;    /*!< AES initialization vector register 0,        Address offset: 0x20 */
-  __IO uint32_t IVR1;    /*!< AES initialization vector register 1,        Address offset: 0x24 */
-  __IO uint32_t IVR2;    /*!< AES initialization vector register 2,        Address offset: 0x28 */
-  __IO uint32_t IVR3;    /*!< AES initialization vector register 3,        Address offset: 0x2C */
-} AES_TypeDef;
-
-/**
-  * @brief Comparator 
-  */
-
-typedef struct
-{
-  __IO uint32_t CSR;     /*!< COMP comparator control and status register, Address offset: 0x18 */
-} COMP_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CSR;         /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
-} COMP_Common_TypeDef;
-
-
-/**
-* @brief CRC calculation unit
-*/
-
-typedef struct
-{
-__IO uint32_t DR;            /*!< CRC Data register,                            Address offset: 0x00 */
-__IO uint8_t IDR;            /*!< CRC Independent data register,                Address offset: 0x04 */
-uint8_t RESERVED0;           /*!< Reserved,                                                     0x05 */
-uint16_t RESERVED1;          /*!< Reserved,                                                     0x06 */
-__IO uint32_t CR;            /*!< CRC Control register,                         Address offset: 0x08 */
-uint32_t RESERVED2;          /*!< Reserved,                                                     0x0C */
-__IO uint32_t INIT;          /*!< Initial CRC value register,                   Address offset: 0x10 */
-__IO uint32_t POL;           /*!< CRC polynomial register,                      Address offset: 0x14 */
-} CRC_TypeDef;
-
-/** 
-  * @brief Debug MCU
-  */
-
-typedef struct
-{
-  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
-  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
-  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
-  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/** 
-  * @brief DMA Controller
-  */
-
-typedef struct
-{
-  __IO uint32_t CCR;          /*!< DMA channel x configuration register */
-  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register */
-  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register */
-  __IO uint32_t CMAR;         /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
-  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
-} DMA_TypeDef;                                                                  
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t CSELR;        /*!< DMA channel selection register,              Address offset: 0xA8 */
-} DMA_Request_TypeDef;                                                          
-                                                                                
-/**                                                                             
-  * @brief External Interrupt/Event Controller                                  
-  */                                                                            
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t IMR;          /*!
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l031xx
-  * @{
-  */
-    
-#ifndef __STM32L031xx_H
-#define __STM32L031xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-  
-
-/** @addtogroup Configuration_section_for_CMSIS
-  * @{
-  */
-/**
-  * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals 
-  */
-#define __CM0PLUS_REV             0 /*!< Core Revision r0p0                            */
-#define __MPU_PRESENT             0 /*!< STM32L0xx  provides no MPU                    */
-#define __VTOR_PRESENT            1 /*!< Vector  Table  Register supported             */
-#define __NVIC_PRIO_BITS          2 /*!< STM32L0xx uses 2 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used  */
-
-/**
-  * @}
-  */
-   
-/** @addtogroup Peripheral_interrupt_number_definition
-  * @{
-  */
-   
-/**
- * @brief stm32l031xx Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
- */
-
-/*!< Interrupt Number Definition */
-typedef enum
-{
-/******  Cortex-M0 Processor Exceptions Numbers ******************************************************/
-  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
-  HardFault_IRQn              = -13,    /*!< 3 Cortex-M0+ Hard Fault Interrupt                       */
-  SVC_IRQn                    = -5,     /*!< 11 Cortex-M0+ SV Call Interrupt                         */
-  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M0+ Pend SV Interrupt                         */
-  SysTick_IRQn                = -1,     /*!< 15 Cortex-M0+ System Tick Interrupt                     */
-
-/******  STM32L-0 specific Interrupt Numbers *********************************************************/
-  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
-  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detect Interrupt                  */
-  RTC_IRQn                    = 2,      /*!< RTC through EXTI Line Interrupt                         */
-  FLASH_IRQn                  = 3,      /*!< FLASH Interrupt                                         */
-  RCC_IRQn                    = 4,      /*!< RCC Interrupt                                           */
-  EXTI0_1_IRQn                = 5,      /*!< EXTI Line 0 and 1 Interrupts                            */
-  EXTI2_3_IRQn                = 6,      /*!< EXTI Line 2 and 3 Interrupts                            */
-  EXTI4_15_IRQn               = 7,      /*!< EXTI Line 4 to 15 Interrupts                            */
-  DMA1_Channel1_IRQn          = 9,      /*!< DMA1 Channel 1 Interrupt                                */
-  DMA1_Channel2_3_IRQn        = 10,     /*!< DMA1 Channel 2 and Channel 3 Interrupts                 */
-  DMA1_Channel4_5_6_7_IRQn    = 11,     /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */
-  ADC1_COMP_IRQn              = 12,     /*!< ADC1, COMP1 and COMP2 Interrupts                        */
-  LPTIM1_IRQn                 = 13,     /*!< LPTIM1 Interrupt                                        */
-  TIM2_IRQn                   = 15,     /*!< TIM2 Interrupt                                          */
-  TIM21_IRQn                  = 20,     /*!< TIM21 Interrupt                                         */
-  TIM22_IRQn                  = 22,     /*!< TIM22 Interrupt                                         */
-  I2C1_IRQn                   = 23,     /*!< I2C1 Interrupt                                          */
-  SPI1_IRQn                   = 25,     /*!< SPI1 Interrupt                                          */
-  USART2_IRQn                 = 28,     /*!< USART2 Interrupt                                        */
-  LPUART1_IRQn                = 29,     /*!< LPUART1 Interrupt                                       */
-} IRQn_Type;
-
-/**
-  * @}
-  */
-
-#include "core_cm0plus.h"
-#include "system_stm32l0xx.h"
-#include 
-
-/** @addtogroup Peripheral_registers_structures
-  * @{
-  */   
-
-/** 
-  * @brief Analog to Digital Converter  
-  */
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< ADC Interrupt and Status register,                          Address offset:0x00 */
-  __IO uint32_t IER;          /*!< ADC Interrupt Enable register,                              Address offset:0x04 */
-  __IO uint32_t CR;           /*!< ADC Control register,                                       Address offset:0x08 */
-  __IO uint32_t CFGR1;        /*!< ADC Configuration register 1,                               Address offset:0x0C */
-  __IO uint32_t CFGR2;        /*!< ADC Configuration register 2,                               Address offset:0x10 */
-  __IO uint32_t SMPR;         /*!< ADC Sampling time register,                                 Address offset:0x14 */
-  uint32_t   RESERVED1;       /*!< Reserved,                                                                  0x18 */
-  uint32_t   RESERVED2;       /*!< Reserved,                                                                  0x1C */
-  __IO uint32_t TR;           /*!< ADC watchdog threshold register,                            Address offset:0x20 */
-  uint32_t   RESERVED3;       /*!< Reserved,                                                                  0x24 */
-  __IO uint32_t CHSELR;       /*!< ADC channel selection register,                             Address offset:0x28 */
-  uint32_t   RESERVED4[5];    /*!< Reserved,                                                                  0x2C */
-  __IO uint32_t DR;           /*!< ADC data register,                                          Address offset:0x40 */
-  uint32_t   RESERVED5[28];   /*!< Reserved,                                                           0x44 - 0xB0 */
-  __IO uint32_t CALFACT;      /*!< ADC data register,                                          Address offset:0xB4 */
-} ADC_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CCR;
-} ADC_Common_TypeDef;
-
-
-/**
-  * @brief Comparator 
-  */
-
-typedef struct
-{
-  __IO uint32_t CSR;     /*!< COMP comparator control and status register, Address offset: 0x18 */
-} COMP_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CSR;         /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
-} COMP_Common_TypeDef;
-
-
-/**
-* @brief CRC calculation unit
-*/
-
-typedef struct
-{
-__IO uint32_t DR;            /*!< CRC Data register,                            Address offset: 0x00 */
-__IO uint8_t IDR;            /*!< CRC Independent data register,                Address offset: 0x04 */
-uint8_t RESERVED0;           /*!< Reserved,                                                     0x05 */
-uint16_t RESERVED1;          /*!< Reserved,                                                     0x06 */
-__IO uint32_t CR;            /*!< CRC Control register,                         Address offset: 0x08 */
-uint32_t RESERVED2;          /*!< Reserved,                                                     0x0C */
-__IO uint32_t INIT;          /*!< Initial CRC value register,                   Address offset: 0x10 */
-__IO uint32_t POL;           /*!< CRC polynomial register,                      Address offset: 0x14 */
-} CRC_TypeDef;
-
-/** 
-  * @brief Debug MCU
-  */
-
-typedef struct
-{
-  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
-  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
-  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
-  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/** 
-  * @brief DMA Controller
-  */
-
-typedef struct
-{
-  __IO uint32_t CCR;          /*!< DMA channel x configuration register */
-  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register */
-  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register */
-  __IO uint32_t CMAR;         /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
-  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
-} DMA_TypeDef;                                                                  
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t CSELR;        /*!< DMA channel selection register,              Address offset: 0xA8 */
-} DMA_Request_TypeDef;                                                          
-                                                                                
-/**                                                                             
-  * @brief External Interrupt/Event Controller                                  
-  */                                                                            
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t IMR;          /*!
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l041xx
-  * @{
-  */
-    
-#ifndef __STM32L041xx_H
-#define __STM32L041xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-  
-
-/** @addtogroup Configuration_section_for_CMSIS
-  * @{
-  */
-/**
-  * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals 
-  */
-#define __CM0PLUS_REV             0 /*!< Core Revision r0p0                            */
-#define __MPU_PRESENT             0 /*!< STM32L0xx  provides no MPU                    */
-#define __VTOR_PRESENT            1 /*!< Vector  Table  Register supported             */
-#define __NVIC_PRIO_BITS          2 /*!< STM32L0xx uses 2 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used  */
-
-/**
-  * @}
-  */
-   
-/** @addtogroup Peripheral_interrupt_number_definition
-  * @{
-  */
-   
-/**
- * @brief stm32l041xx Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
- */
-
-/*!< Interrupt Number Definition */
-typedef enum
-{
-/******  Cortex-M0 Processor Exceptions Numbers ******************************************************/
-  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
-  HardFault_IRQn              = -13,    /*!< 3 Cortex-M0+ Hard Fault Interrupt                       */
-  SVC_IRQn                    = -5,     /*!< 11 Cortex-M0+ SV Call Interrupt                         */
-  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M0+ Pend SV Interrupt                         */
-  SysTick_IRQn                = -1,     /*!< 15 Cortex-M0+ System Tick Interrupt                     */
-
-/******  STM32L-0 specific Interrupt Numbers *********************************************************/
-  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
-  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detect Interrupt                  */
-  RTC_IRQn                    = 2,      /*!< RTC through EXTI Line Interrupt                         */
-  FLASH_IRQn                  = 3,      /*!< FLASH Interrupt                                         */
-  RCC_IRQn                    = 4,      /*!< RCC Interrupt                                           */
-  EXTI0_1_IRQn                = 5,      /*!< EXTI Line 0 and 1 Interrupts                            */
-  EXTI2_3_IRQn                = 6,      /*!< EXTI Line 2 and 3 Interrupts                            */
-  EXTI4_15_IRQn               = 7,      /*!< EXTI Line 4 to 15 Interrupts                            */
-  DMA1_Channel1_IRQn          = 9,      /*!< DMA1 Channel 1 Interrupt                                */
-  DMA1_Channel2_3_IRQn        = 10,     /*!< DMA1 Channel 2 and Channel 3 Interrupts                 */
-  DMA1_Channel4_5_6_7_IRQn    = 11,     /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */
-  ADC1_COMP_IRQn              = 12,     /*!< ADC1, COMP1 and COMP2 Interrupts                        */
-  LPTIM1_IRQn                 = 13,     /*!< LPTIM1 Interrupt                                        */
-  TIM2_IRQn                   = 15,     /*!< TIM2 Interrupt                                          */
-  TIM21_IRQn                  = 20,     /*!< TIM21 Interrupt                                         */
-  TIM22_IRQn                  = 22,     /*!< TIM22 Interrupt                                         */
-  I2C1_IRQn                   = 23,     /*!< I2C1 Interrupt                                          */
-  SPI1_IRQn                   = 25,     /*!< SPI1 Interrupt                                          */
-  USART2_IRQn                 = 28,     /*!< USART2 Interrupt                                        */
-  AES_LPUART1_IRQn            = 29,     /*!< AES and LPUART1 Interrupts                              */
-} IRQn_Type;
-
-/**
-  * @}
-  */
-
-#include "core_cm0plus.h"
-#include "system_stm32l0xx.h"
-#include 
-
-/** @addtogroup Peripheral_registers_structures
-  * @{
-  */   
-
-/** 
-  * @brief Analog to Digital Converter  
-  */
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< ADC Interrupt and Status register,                          Address offset:0x00 */
-  __IO uint32_t IER;          /*!< ADC Interrupt Enable register,                              Address offset:0x04 */
-  __IO uint32_t CR;           /*!< ADC Control register,                                       Address offset:0x08 */
-  __IO uint32_t CFGR1;        /*!< ADC Configuration register 1,                               Address offset:0x0C */
-  __IO uint32_t CFGR2;        /*!< ADC Configuration register 2,                               Address offset:0x10 */
-  __IO uint32_t SMPR;         /*!< ADC Sampling time register,                                 Address offset:0x14 */
-  uint32_t   RESERVED1;       /*!< Reserved,                                                                  0x18 */
-  uint32_t   RESERVED2;       /*!< Reserved,                                                                  0x1C */
-  __IO uint32_t TR;           /*!< ADC watchdog threshold register,                            Address offset:0x20 */
-  uint32_t   RESERVED3;       /*!< Reserved,                                                                  0x24 */
-  __IO uint32_t CHSELR;       /*!< ADC channel selection register,                             Address offset:0x28 */
-  uint32_t   RESERVED4[5];    /*!< Reserved,                                                                  0x2C */
-  __IO uint32_t DR;           /*!< ADC data register,                                          Address offset:0x40 */
-  uint32_t   RESERVED5[28];   /*!< Reserved,                                                           0x44 - 0xB0 */
-  __IO uint32_t CALFACT;      /*!< ADC data register,                                          Address offset:0xB4 */
-} ADC_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CCR;
-} ADC_Common_TypeDef;
-
-/** 
-  * @brief AES hardware accelerator
-  */
-
-typedef struct
-{
-  __IO uint32_t CR;      /*!< AES control register,                        Address offset: 0x00 */
-  __IO uint32_t SR;      /*!< AES status register,                         Address offset: 0x04 */
-  __IO uint32_t DINR;    /*!< AES data input register,                     Address offset: 0x08 */
-  __IO uint32_t DOUTR;   /*!< AES data output register,                    Address offset: 0x0C */
-  __IO uint32_t KEYR0;   /*!< AES key register 0,                          Address offset: 0x10 */
-  __IO uint32_t KEYR1;   /*!< AES key register 1,                          Address offset: 0x14 */
-  __IO uint32_t KEYR2;   /*!< AES key register 2,                          Address offset: 0x18 */
-  __IO uint32_t KEYR3;   /*!< AES key register 3,                          Address offset: 0x1C */
-  __IO uint32_t IVR0;    /*!< AES initialization vector register 0,        Address offset: 0x20 */
-  __IO uint32_t IVR1;    /*!< AES initialization vector register 1,        Address offset: 0x24 */
-  __IO uint32_t IVR2;    /*!< AES initialization vector register 2,        Address offset: 0x28 */
-  __IO uint32_t IVR3;    /*!< AES initialization vector register 3,        Address offset: 0x2C */
-} AES_TypeDef;
-
-/**
-  * @brief Comparator 
-  */
-
-typedef struct
-{
-  __IO uint32_t CSR;     /*!< COMP comparator control and status register, Address offset: 0x18 */
-} COMP_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CSR;         /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
-} COMP_Common_TypeDef;
-
-
-/**
-* @brief CRC calculation unit
-*/
-
-typedef struct
-{
-__IO uint32_t DR;            /*!< CRC Data register,                            Address offset: 0x00 */
-__IO uint8_t IDR;            /*!< CRC Independent data register,                Address offset: 0x04 */
-uint8_t RESERVED0;           /*!< Reserved,                                                     0x05 */
-uint16_t RESERVED1;          /*!< Reserved,                                                     0x06 */
-__IO uint32_t CR;            /*!< CRC Control register,                         Address offset: 0x08 */
-uint32_t RESERVED2;          /*!< Reserved,                                                     0x0C */
-__IO uint32_t INIT;          /*!< Initial CRC value register,                   Address offset: 0x10 */
-__IO uint32_t POL;           /*!< CRC polynomial register,                      Address offset: 0x14 */
-} CRC_TypeDef;
-
-/** 
-  * @brief Debug MCU
-  */
-
-typedef struct
-{
-  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
-  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
-  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
-  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/** 
-  * @brief DMA Controller
-  */
-
-typedef struct
-{
-  __IO uint32_t CCR;          /*!< DMA channel x configuration register */
-  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register */
-  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register */
-  __IO uint32_t CMAR;         /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
-  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
-} DMA_TypeDef;                                                                  
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t CSELR;        /*!< DMA channel selection register,              Address offset: 0xA8 */
-} DMA_Request_TypeDef;                                                          
-                                                                                
-/**                                                                             
-  * @brief External Interrupt/Event Controller                                  
-  */                                                                            
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t IMR;          /*!
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l051xx
-  * @{
-  */
-    
-#ifndef __STM32L051xx_H
-#define __STM32L051xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-  
-
-/** @addtogroup Configuration_section_for_CMSIS
-  * @{
-  */
-/**
-  * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals 
-  */
-#define __CM0PLUS_REV             0 /*!< Core Revision r0p0                            */
-#define __MPU_PRESENT             1 /*!< STM32L0xx  provides an MPU                    */
-#define __VTOR_PRESENT            1 /*!< Vector  Table  Register supported             */
-#define __NVIC_PRIO_BITS          2 /*!< STM32L0xx uses 2 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used  */
-
-/**
-  * @}
-  */
-   
-/** @addtogroup Peripheral_interrupt_number_definition
-  * @{
-  */
-   
-/**
- * @brief stm32l051xx Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
- */
-
-/*!< Interrupt Number Definition */
-typedef enum
-{
-/******  Cortex-M0 Processor Exceptions Numbers ******************************************************/
-  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
-  HardFault_IRQn              = -13,    /*!< 3 Cortex-M0+ Hard Fault Interrupt                       */
-  SVC_IRQn                    = -5,     /*!< 11 Cortex-M0+ SV Call Interrupt                         */
-  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M0+ Pend SV Interrupt                         */
-  SysTick_IRQn                = -1,     /*!< 15 Cortex-M0+ System Tick Interrupt                     */
-
-/******  STM32L-0 specific Interrupt Numbers *********************************************************/
-  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
-  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detect Interrupt                  */
-  RTC_IRQn                    = 2,      /*!< RTC through EXTI Line Interrupt                         */
-  FLASH_IRQn                  = 3,      /*!< FLASH Interrupt                                         */
-  RCC_IRQn                    = 4,      /*!< RCC Interrupt                                           */
-  EXTI0_1_IRQn                = 5,      /*!< EXTI Line 0 and 1 Interrupts                            */
-  EXTI2_3_IRQn                = 6,      /*!< EXTI Line 2 and 3 Interrupts                            */
-  EXTI4_15_IRQn               = 7,      /*!< EXTI Line 4 to 15 Interrupts                            */
-  DMA1_Channel1_IRQn          = 9,      /*!< DMA1 Channel 1 Interrupt                                */
-  DMA1_Channel2_3_IRQn        = 10,     /*!< DMA1 Channel 2 and Channel 3 Interrupts                 */
-  DMA1_Channel4_5_6_7_IRQn    = 11,     /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */
-  ADC1_COMP_IRQn              = 12,     /*!< ADC1, COMP1 and COMP2 Interrupts                        */
-  LPTIM1_IRQn                 = 13,     /*!< LPTIM1 Interrupt                                        */
-  TIM2_IRQn                   = 15,     /*!< TIM2 Interrupt                                          */
-  TIM6_IRQn                   = 17,     /*!< TIM6  Interrupt                                         */
-  TIM21_IRQn                  = 20,     /*!< TIM21 Interrupt                                         */
-  TIM22_IRQn                  = 22,     /*!< TIM22 Interrupt                                         */
-  I2C1_IRQn                   = 23,     /*!< I2C1 Interrupt                                          */
-  I2C2_IRQn                   = 24,     /*!< I2C2 Interrupt                                          */
-  SPI1_IRQn                   = 25,     /*!< SPI1 Interrupt                                          */
-  SPI2_IRQn                   = 26,     /*!< SPI2 Interrupt                                          */
-  USART1_IRQn                 = 27,     /*!< USART1 Interrupt                                        */
-  USART2_IRQn                 = 28,     /*!< USART2 Interrupt                                        */
-  LPUART1_IRQn                = 29,     /*!< LPUART1 Interrupt                                       */
-} IRQn_Type;
-
-/**
-  * @}
-  */
-
-#include "core_cm0plus.h"
-#include "system_stm32l0xx.h"
-#include 
-
-/** @addtogroup Peripheral_registers_structures
-  * @{
-  */   
-
-/** 
-  * @brief Analog to Digital Converter  
-  */
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< ADC Interrupt and Status register,                          Address offset:0x00 */
-  __IO uint32_t IER;          /*!< ADC Interrupt Enable register,                              Address offset:0x04 */
-  __IO uint32_t CR;           /*!< ADC Control register,                                       Address offset:0x08 */
-  __IO uint32_t CFGR1;        /*!< ADC Configuration register 1,                               Address offset:0x0C */
-  __IO uint32_t CFGR2;        /*!< ADC Configuration register 2,                               Address offset:0x10 */
-  __IO uint32_t SMPR;         /*!< ADC Sampling time register,                                 Address offset:0x14 */
-  uint32_t   RESERVED1;       /*!< Reserved,                                                                  0x18 */
-  uint32_t   RESERVED2;       /*!< Reserved,                                                                  0x1C */
-  __IO uint32_t TR;           /*!< ADC watchdog threshold register,                            Address offset:0x20 */
-  uint32_t   RESERVED3;       /*!< Reserved,                                                                  0x24 */
-  __IO uint32_t CHSELR;       /*!< ADC channel selection register,                             Address offset:0x28 */
-  uint32_t   RESERVED4[5];    /*!< Reserved,                                                                  0x2C */
-  __IO uint32_t DR;           /*!< ADC data register,                                          Address offset:0x40 */
-  uint32_t   RESERVED5[28];   /*!< Reserved,                                                           0x44 - 0xB0 */
-  __IO uint32_t CALFACT;      /*!< ADC data register,                                          Address offset:0xB4 */
-} ADC_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CCR;
-} ADC_Common_TypeDef;
-
-
-/**
-  * @brief Comparator 
-  */
-
-typedef struct
-{
-  __IO uint32_t CSR;     /*!< COMP comparator control and status register, Address offset: 0x18 */
-} COMP_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CSR;         /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
-} COMP_Common_TypeDef;
-
-
-/**
-* @brief CRC calculation unit
-*/
-
-typedef struct
-{
-__IO uint32_t DR;            /*!< CRC Data register,                            Address offset: 0x00 */
-__IO uint8_t IDR;            /*!< CRC Independent data register,                Address offset: 0x04 */
-uint8_t RESERVED0;           /*!< Reserved,                                                     0x05 */
-uint16_t RESERVED1;          /*!< Reserved,                                                     0x06 */
-__IO uint32_t CR;            /*!< CRC Control register,                         Address offset: 0x08 */
-uint32_t RESERVED2;          /*!< Reserved,                                                     0x0C */
-__IO uint32_t INIT;          /*!< Initial CRC value register,                   Address offset: 0x10 */
-__IO uint32_t POL;           /*!< CRC polynomial register,                      Address offset: 0x14 */
-} CRC_TypeDef;
-
-/** 
-  * @brief Debug MCU
-  */
-
-typedef struct
-{
-  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
-  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
-  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
-  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/** 
-  * @brief DMA Controller
-  */
-
-typedef struct
-{
-  __IO uint32_t CCR;          /*!< DMA channel x configuration register */
-  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register */
-  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register */
-  __IO uint32_t CMAR;         /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
-  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
-} DMA_TypeDef;                                                                  
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t CSELR;        /*!< DMA channel selection register,              Address offset: 0xA8 */
-} DMA_Request_TypeDef;                                                          
-                                                                                
-/**                                                                             
-  * @brief External Interrupt/Event Controller                                  
-  */                                                                            
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t IMR;          /*!
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l052xx
-  * @{
-  */
-    
-#ifndef __STM32L052xx_H
-#define __STM32L052xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-  
-
-/** @addtogroup Configuration_section_for_CMSIS
-  * @{
-  */
-/**
-  * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals 
-  */
-#define __CM0PLUS_REV             0 /*!< Core Revision r0p0                            */
-#define __MPU_PRESENT             1 /*!< STM32L0xx  provides an MPU                    */
-#define __VTOR_PRESENT            1 /*!< Vector  Table  Register supported             */
-#define __NVIC_PRIO_BITS          2 /*!< STM32L0xx uses 2 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used  */
-
-/**
-  * @}
-  */
-   
-/** @addtogroup Peripheral_interrupt_number_definition
-  * @{
-  */
-   
-/**
- * @brief stm32l052xx Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
- */
-
-/*!< Interrupt Number Definition */
-typedef enum
-{
-/******  Cortex-M0 Processor Exceptions Numbers ******************************************************/
-  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
-  HardFault_IRQn              = -13,    /*!< 3 Cortex-M0+ Hard Fault Interrupt                       */
-  SVC_IRQn                    = -5,     /*!< 11 Cortex-M0+ SV Call Interrupt                         */
-  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M0+ Pend SV Interrupt                         */
-  SysTick_IRQn                = -1,     /*!< 15 Cortex-M0+ System Tick Interrupt                     */
-
-/******  STM32L-0 specific Interrupt Numbers *********************************************************/
-  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
-  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detect Interrupt                  */
-  RTC_IRQn                    = 2,      /*!< RTC through EXTI Line Interrupt                         */
-  FLASH_IRQn                  = 3,      /*!< FLASH Interrupt                                         */
-  RCC_CRS_IRQn                = 4,      /*!< RCC and CRS Interrupts                                  */
-  EXTI0_1_IRQn                = 5,      /*!< EXTI Line 0 and 1 Interrupts                            */
-  EXTI2_3_IRQn                = 6,      /*!< EXTI Line 2 and 3 Interrupts                            */
-  EXTI4_15_IRQn               = 7,      /*!< EXTI Line 4 to 15 Interrupts                            */
-  TSC_IRQn                    = 8,      /*!< TSC Interrupt                                           */
-  DMA1_Channel1_IRQn          = 9,      /*!< DMA1 Channel 1 Interrupt                                */
-  DMA1_Channel2_3_IRQn        = 10,     /*!< DMA1 Channel 2 and Channel 3 Interrupts                 */
-  DMA1_Channel4_5_6_7_IRQn    = 11,     /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */
-  ADC1_COMP_IRQn              = 12,     /*!< ADC1, COMP1 and COMP2 Interrupts                        */
-  LPTIM1_IRQn                 = 13,     /*!< LPTIM1 Interrupt                                        */
-  TIM2_IRQn                   = 15,     /*!< TIM2 Interrupt                                          */
-  TIM6_DAC_IRQn               = 17,     /*!< TIM6 and DAC Interrupts                                 */
-  TIM21_IRQn                  = 20,     /*!< TIM21 Interrupt                                         */
-  TIM22_IRQn                  = 22,     /*!< TIM22 Interrupt                                         */
-  I2C1_IRQn                   = 23,     /*!< I2C1 Interrupt                                          */
-  I2C2_IRQn                   = 24,     /*!< I2C2 Interrupt                                          */
-  SPI1_IRQn                   = 25,     /*!< SPI1 Interrupt                                          */
-  SPI2_IRQn                   = 26,     /*!< SPI2 Interrupt                                          */
-  USART1_IRQn                 = 27,     /*!< USART1 Interrupt                                        */
-  USART2_IRQn                 = 28,     /*!< USART2 Interrupt                                        */
-  RNG_LPUART1_IRQn            = 29,     /*!< RNG and LPUART1 Interrupts                              */
-  USB_IRQn                    = 31,     /*!< USB global Interrupt                                    */
-} IRQn_Type;
-
-/**
-  * @}
-  */
-
-#include "core_cm0plus.h"
-#include "system_stm32l0xx.h"
-#include 
-
-/** @addtogroup Peripheral_registers_structures
-  * @{
-  */   
-
-/** 
-  * @brief Analog to Digital Converter  
-  */
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< ADC Interrupt and Status register,                          Address offset:0x00 */
-  __IO uint32_t IER;          /*!< ADC Interrupt Enable register,                              Address offset:0x04 */
-  __IO uint32_t CR;           /*!< ADC Control register,                                       Address offset:0x08 */
-  __IO uint32_t CFGR1;        /*!< ADC Configuration register 1,                               Address offset:0x0C */
-  __IO uint32_t CFGR2;        /*!< ADC Configuration register 2,                               Address offset:0x10 */
-  __IO uint32_t SMPR;         /*!< ADC Sampling time register,                                 Address offset:0x14 */
-  uint32_t   RESERVED1;       /*!< Reserved,                                                                  0x18 */
-  uint32_t   RESERVED2;       /*!< Reserved,                                                                  0x1C */
-  __IO uint32_t TR;           /*!< ADC watchdog threshold register,                            Address offset:0x20 */
-  uint32_t   RESERVED3;       /*!< Reserved,                                                                  0x24 */
-  __IO uint32_t CHSELR;       /*!< ADC channel selection register,                             Address offset:0x28 */
-  uint32_t   RESERVED4[5];    /*!< Reserved,                                                                  0x2C */
-  __IO uint32_t DR;           /*!< ADC data register,                                          Address offset:0x40 */
-  uint32_t   RESERVED5[28];   /*!< Reserved,                                                           0x44 - 0xB0 */
-  __IO uint32_t CALFACT;      /*!< ADC data register,                                          Address offset:0xB4 */
-} ADC_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CCR;
-} ADC_Common_TypeDef;
-
-
-/**
-  * @brief Comparator 
-  */
-
-typedef struct
-{
-  __IO uint32_t CSR;     /*!< COMP comparator control and status register, Address offset: 0x18 */
-} COMP_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CSR;         /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
-} COMP_Common_TypeDef;
-
-
-/**
-* @brief CRC calculation unit
-*/
-
-typedef struct
-{
-__IO uint32_t DR;            /*!< CRC Data register,                            Address offset: 0x00 */
-__IO uint8_t IDR;            /*!< CRC Independent data register,                Address offset: 0x04 */
-uint8_t RESERVED0;           /*!< Reserved,                                                     0x05 */
-uint16_t RESERVED1;          /*!< Reserved,                                                     0x06 */
-__IO uint32_t CR;            /*!< CRC Control register,                         Address offset: 0x08 */
-uint32_t RESERVED2;          /*!< Reserved,                                                     0x0C */
-__IO uint32_t INIT;          /*!< Initial CRC value register,                   Address offset: 0x10 */
-__IO uint32_t POL;           /*!< CRC polynomial register,                      Address offset: 0x14 */
-} CRC_TypeDef;
-
-/**
-  * @brief Clock Recovery System 
-  */
-
-typedef struct 
-{
-__IO uint32_t CR;     /*!< CRS ccontrol register,              Address offset: 0x00 */
-__IO uint32_t CFGR;   /*!< CRS configuration register,         Address offset: 0x04 */
-__IO uint32_t ISR;    /*!< CRS interrupt and status register,  Address offset: 0x08 */
-__IO uint32_t ICR;    /*!< CRS interrupt flag clear register,  Address offset: 0x0C */
-} CRS_TypeDef;
-
-/** 
-  * @brief Digital to Analog Converter
-  */
-
-typedef struct
-{
-  __IO uint32_t CR;            /*!< DAC control register,                                    Address offset: 0x00 */
-  __IO uint32_t SWTRIGR;       /*!< DAC software trigger register,                           Address offset: 0x04 */
-  __IO uint32_t DHR12R1;       /*!< DAC channel1 12-bit right-aligned data holding register, Address offset: 0x08 */
-  __IO uint32_t DHR12L1;       /*!< DAC channel1 12-bit left aligned data holding register,  Address offset: 0x0C */
-  __IO uint32_t DHR8R1;        /*!< DAC channel1 8-bit right aligned data holding register,  Address offset: 0x10 */
-  uint32_t      RESERVED0[6];  /*!<                                                                     0x14-0x28 */
-  __IO uint32_t DOR1;          /*!< DAC channel1 data output register,                       Address offset: 0x2C */
-  uint32_t      RESERVED1;     /*!<                                                                          0x30 */
-  __IO uint32_t SR;            /*!< DAC status register,                                     Address offset: 0x34 */
-} DAC_TypeDef;
-
-/** 
-  * @brief Debug MCU
-  */
-
-typedef struct
-{
-  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
-  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
-  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
-  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/** 
-  * @brief DMA Controller
-  */
-
-typedef struct
-{
-  __IO uint32_t CCR;          /*!< DMA channel x configuration register */
-  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register */
-  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register */
-  __IO uint32_t CMAR;         /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
-  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
-} DMA_TypeDef;                                                                  
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t CSELR;        /*!< DMA channel selection register,              Address offset: 0xA8 */
-} DMA_Request_TypeDef;                                                          
-                                                                                
-/**                                                                             
-  * @brief External Interrupt/Event Controller                                  
-  */                                                                            
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t IMR;          /*!
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l053xx
-  * @{
-  */
-    
-#ifndef __STM32L053xx_H
-#define __STM32L053xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-  
-
-/** @addtogroup Configuration_section_for_CMSIS
-  * @{
-  */
-/**
-  * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals 
-  */
-#define __CM0PLUS_REV             0 /*!< Core Revision r0p0                            */
-#define __MPU_PRESENT             1 /*!< STM32L0xx  provides an MPU                    */
-#define __VTOR_PRESENT            1 /*!< Vector  Table  Register supported             */
-#define __NVIC_PRIO_BITS          2 /*!< STM32L0xx uses 2 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used  */
-
-/**
-  * @}
-  */
-   
-/** @addtogroup Peripheral_interrupt_number_definition
-  * @{
-  */
-   
-/**
- * @brief stm32l053xx Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
- */
-
-/*!< Interrupt Number Definition */
-typedef enum
-{
-/******  Cortex-M0 Processor Exceptions Numbers ******************************************************/
-  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
-  HardFault_IRQn              = -13,    /*!< 3 Cortex-M0+ Hard Fault Interrupt                       */
-  SVC_IRQn                    = -5,     /*!< 11 Cortex-M0+ SV Call Interrupt                         */
-  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M0+ Pend SV Interrupt                         */
-  SysTick_IRQn                = -1,     /*!< 15 Cortex-M0+ System Tick Interrupt                     */
-
-/******  STM32L-0 specific Interrupt Numbers *********************************************************/
-  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
-  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detect Interrupt                  */
-  RTC_IRQn                    = 2,      /*!< RTC through EXTI Line Interrupt                         */
-  FLASH_IRQn                  = 3,      /*!< FLASH Interrupt                                         */
-  RCC_CRS_IRQn                = 4,      /*!< RCC and CRS Interrupts                                  */
-  EXTI0_1_IRQn                = 5,      /*!< EXTI Line 0 and 1 Interrupts                            */
-  EXTI2_3_IRQn                = 6,      /*!< EXTI Line 2 and 3 Interrupts                            */
-  EXTI4_15_IRQn               = 7,      /*!< EXTI Line 4 to 15 Interrupts                            */
-  TSC_IRQn                    = 8,      /*!< TSC Interrupt                                           */
-  DMA1_Channel1_IRQn          = 9,      /*!< DMA1 Channel 1 Interrupt                                */
-  DMA1_Channel2_3_IRQn        = 10,     /*!< DMA1 Channel 2 and Channel 3 Interrupts                 */
-  DMA1_Channel4_5_6_7_IRQn    = 11,     /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */
-  ADC1_COMP_IRQn              = 12,     /*!< ADC1, COMP1 and COMP2 Interrupts                        */
-  LPTIM1_IRQn                 = 13,     /*!< LPTIM1 Interrupt                                        */
-  TIM2_IRQn                   = 15,     /*!< TIM2 Interrupt                                          */
-  TIM6_DAC_IRQn               = 17,     /*!< TIM6 and DAC Interrupts                                 */
-  TIM21_IRQn                  = 20,     /*!< TIM21 Interrupt                                         */
-  TIM22_IRQn                  = 22,     /*!< TIM22 Interrupt                                         */
-  I2C1_IRQn                   = 23,     /*!< I2C1 Interrupt                                          */
-  I2C2_IRQn                   = 24,     /*!< I2C2 Interrupt                                          */
-  SPI1_IRQn                   = 25,     /*!< SPI1 Interrupt                                          */
-  SPI2_IRQn                   = 26,     /*!< SPI2 Interrupt                                          */
-  USART1_IRQn                 = 27,     /*!< USART1 Interrupt                                        */
-  USART2_IRQn                 = 28,     /*!< USART2 Interrupt                                        */
-  RNG_LPUART1_IRQn            = 29,     /*!< RNG and LPUART1 Interrupts                              */
-  LCD_IRQn                    = 30,     /*!< LCD Interrupt                                           */
-  USB_IRQn                    = 31,     /*!< USB global Interrupt                                    */
-} IRQn_Type;
-
-/**
-  * @}
-  */
-
-#include "core_cm0plus.h"
-#include "system_stm32l0xx.h"
-#include 
-
-/** @addtogroup Peripheral_registers_structures
-  * @{
-  */   
-
-/** 
-  * @brief Analog to Digital Converter  
-  */
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< ADC Interrupt and Status register,                          Address offset:0x00 */
-  __IO uint32_t IER;          /*!< ADC Interrupt Enable register,                              Address offset:0x04 */
-  __IO uint32_t CR;           /*!< ADC Control register,                                       Address offset:0x08 */
-  __IO uint32_t CFGR1;        /*!< ADC Configuration register 1,                               Address offset:0x0C */
-  __IO uint32_t CFGR2;        /*!< ADC Configuration register 2,                               Address offset:0x10 */
-  __IO uint32_t SMPR;         /*!< ADC Sampling time register,                                 Address offset:0x14 */
-  uint32_t   RESERVED1;       /*!< Reserved,                                                                  0x18 */
-  uint32_t   RESERVED2;       /*!< Reserved,                                                                  0x1C */
-  __IO uint32_t TR;           /*!< ADC watchdog threshold register,                            Address offset:0x20 */
-  uint32_t   RESERVED3;       /*!< Reserved,                                                                  0x24 */
-  __IO uint32_t CHSELR;       /*!< ADC channel selection register,                             Address offset:0x28 */
-  uint32_t   RESERVED4[5];    /*!< Reserved,                                                                  0x2C */
-  __IO uint32_t DR;           /*!< ADC data register,                                          Address offset:0x40 */
-  uint32_t   RESERVED5[28];   /*!< Reserved,                                                           0x44 - 0xB0 */
-  __IO uint32_t CALFACT;      /*!< ADC data register,                                          Address offset:0xB4 */
-} ADC_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CCR;
-} ADC_Common_TypeDef;
-
-
-/**
-  * @brief Comparator 
-  */
-
-typedef struct
-{
-  __IO uint32_t CSR;     /*!< COMP comparator control and status register, Address offset: 0x18 */
-} COMP_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CSR;         /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
-} COMP_Common_TypeDef;
-
-
-/**
-* @brief CRC calculation unit
-*/
-
-typedef struct
-{
-__IO uint32_t DR;            /*!< CRC Data register,                            Address offset: 0x00 */
-__IO uint8_t IDR;            /*!< CRC Independent data register,                Address offset: 0x04 */
-uint8_t RESERVED0;           /*!< Reserved,                                                     0x05 */
-uint16_t RESERVED1;          /*!< Reserved,                                                     0x06 */
-__IO uint32_t CR;            /*!< CRC Control register,                         Address offset: 0x08 */
-uint32_t RESERVED2;          /*!< Reserved,                                                     0x0C */
-__IO uint32_t INIT;          /*!< Initial CRC value register,                   Address offset: 0x10 */
-__IO uint32_t POL;           /*!< CRC polynomial register,                      Address offset: 0x14 */
-} CRC_TypeDef;
-
-/**
-  * @brief Clock Recovery System 
-  */
-
-typedef struct 
-{
-__IO uint32_t CR;     /*!< CRS ccontrol register,              Address offset: 0x00 */
-__IO uint32_t CFGR;   /*!< CRS configuration register,         Address offset: 0x04 */
-__IO uint32_t ISR;    /*!< CRS interrupt and status register,  Address offset: 0x08 */
-__IO uint32_t ICR;    /*!< CRS interrupt flag clear register,  Address offset: 0x0C */
-} CRS_TypeDef;
-
-/** 
-  * @brief Digital to Analog Converter
-  */
-
-typedef struct
-{
-  __IO uint32_t CR;            /*!< DAC control register,                                    Address offset: 0x00 */
-  __IO uint32_t SWTRIGR;       /*!< DAC software trigger register,                           Address offset: 0x04 */
-  __IO uint32_t DHR12R1;       /*!< DAC channel1 12-bit right-aligned data holding register, Address offset: 0x08 */
-  __IO uint32_t DHR12L1;       /*!< DAC channel1 12-bit left aligned data holding register,  Address offset: 0x0C */
-  __IO uint32_t DHR8R1;        /*!< DAC channel1 8-bit right aligned data holding register,  Address offset: 0x10 */
-  uint32_t      RESERVED0[6];  /*!<                                                                     0x14-0x28 */
-  __IO uint32_t DOR1;          /*!< DAC channel1 data output register,                       Address offset: 0x2C */
-  uint32_t      RESERVED1;     /*!<                                                                          0x30 */
-  __IO uint32_t SR;            /*!< DAC status register,                                     Address offset: 0x34 */
-} DAC_TypeDef;
-
-/** 
-  * @brief Debug MCU
-  */
-
-typedef struct
-{
-  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
-  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
-  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
-  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/** 
-  * @brief DMA Controller
-  */
-
-typedef struct
-{
-  __IO uint32_t CCR;          /*!< DMA channel x configuration register */
-  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register */
-  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register */
-  __IO uint32_t CMAR;         /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
-  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
-} DMA_TypeDef;                                                                  
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t CSELR;        /*!< DMA channel selection register,              Address offset: 0xA8 */
-} DMA_Request_TypeDef;                                                          
-                                                                                
-/**                                                                             
-  * @brief External Interrupt/Event Controller                                  
-  */                                                                            
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t IMR;          /*!
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l061xx
-  * @{
-  */
-    
-#ifndef __STM32L061xx_H
-#define __STM32L061xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-  
-
-/** @addtogroup Configuration_section_for_CMSIS
-  * @{
-  */
-/**
-  * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals 
-  */
-#define __CM0PLUS_REV             0 /*!< Core Revision r0p0                            */
-#define __MPU_PRESENT             1 /*!< STM32L0xx  provides an MPU                    */
-#define __VTOR_PRESENT            1 /*!< Vector  Table  Register supported             */
-#define __NVIC_PRIO_BITS          2 /*!< STM32L0xx uses 2 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used  */
-
-/**
-  * @}
-  */
-   
-/** @addtogroup Peripheral_interrupt_number_definition
-  * @{
-  */
-   
-/**
- * @brief stm32l061xx Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
- */
-
-/*!< Interrupt Number Definition */
-typedef enum
-{
-/******  Cortex-M0 Processor Exceptions Numbers ******************************************************/
-  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
-  HardFault_IRQn              = -13,    /*!< 3 Cortex-M0+ Hard Fault Interrupt                       */
-  SVC_IRQn                    = -5,     /*!< 11 Cortex-M0+ SV Call Interrupt                         */
-  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M0+ Pend SV Interrupt                         */
-  SysTick_IRQn                = -1,     /*!< 15 Cortex-M0+ System Tick Interrupt                     */
-
-/******  STM32L-0 specific Interrupt Numbers *********************************************************/
-  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
-  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detect Interrupt                  */
-  RTC_IRQn                    = 2,      /*!< RTC through EXTI Line Interrupt                         */
-  FLASH_IRQn                  = 3,      /*!< FLASH Interrupt                                         */
-  RCC_IRQn                    = 4,      /*!< RCC Interrupt                                           */
-  EXTI0_1_IRQn                = 5,      /*!< EXTI Line 0 and 1 Interrupts                            */
-  EXTI2_3_IRQn                = 6,      /*!< EXTI Line 2 and 3 Interrupts                            */
-  EXTI4_15_IRQn               = 7,      /*!< EXTI Line 4 to 15 Interrupts                            */
-  DMA1_Channel1_IRQn          = 9,      /*!< DMA1 Channel 1 Interrupt                                */
-  DMA1_Channel2_3_IRQn        = 10,     /*!< DMA1 Channel 2 and Channel 3 Interrupts                 */
-  DMA1_Channel4_5_6_7_IRQn    = 11,     /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */
-  ADC1_COMP_IRQn              = 12,     /*!< ADC1, COMP1 and COMP2 Interrupts                        */
-  LPTIM1_IRQn                 = 13,     /*!< LPTIM1 Interrupt                                        */
-  TIM2_IRQn                   = 15,     /*!< TIM2 Interrupt                                          */
-  TIM6_IRQn                   = 17,     /*!< TIM6  Interrupt                                         */
-  TIM21_IRQn                  = 20,     /*!< TIM21 Interrupt                                         */
-  TIM22_IRQn                  = 22,     /*!< TIM22 Interrupt                                         */
-  I2C1_IRQn                   = 23,     /*!< I2C1 Interrupt                                          */
-  I2C2_IRQn                   = 24,     /*!< I2C2 Interrupt                                          */
-  SPI1_IRQn                   = 25,     /*!< SPI1 Interrupt                                          */
-  SPI2_IRQn                   = 26,     /*!< SPI2 Interrupt                                          */
-  USART1_IRQn                 = 27,     /*!< USART1 Interrupt                                        */
-  USART2_IRQn                 = 28,     /*!< USART2 Interrupt                                        */
-  AES_LPUART1_IRQn            = 29,     /*!< AES and LPUART1 Interrupts                              */
-} IRQn_Type;
-
-/**
-  * @}
-  */
-
-#include "core_cm0plus.h"
-#include "system_stm32l0xx.h"
-#include 
-
-/** @addtogroup Peripheral_registers_structures
-  * @{
-  */   
-
-/** 
-  * @brief Analog to Digital Converter  
-  */
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< ADC Interrupt and Status register,                          Address offset:0x00 */
-  __IO uint32_t IER;          /*!< ADC Interrupt Enable register,                              Address offset:0x04 */
-  __IO uint32_t CR;           /*!< ADC Control register,                                       Address offset:0x08 */
-  __IO uint32_t CFGR1;        /*!< ADC Configuration register 1,                               Address offset:0x0C */
-  __IO uint32_t CFGR2;        /*!< ADC Configuration register 2,                               Address offset:0x10 */
-  __IO uint32_t SMPR;         /*!< ADC Sampling time register,                                 Address offset:0x14 */
-  uint32_t   RESERVED1;       /*!< Reserved,                                                                  0x18 */
-  uint32_t   RESERVED2;       /*!< Reserved,                                                                  0x1C */
-  __IO uint32_t TR;           /*!< ADC watchdog threshold register,                            Address offset:0x20 */
-  uint32_t   RESERVED3;       /*!< Reserved,                                                                  0x24 */
-  __IO uint32_t CHSELR;       /*!< ADC channel selection register,                             Address offset:0x28 */
-  uint32_t   RESERVED4[5];    /*!< Reserved,                                                                  0x2C */
-  __IO uint32_t DR;           /*!< ADC data register,                                          Address offset:0x40 */
-  uint32_t   RESERVED5[28];   /*!< Reserved,                                                           0x44 - 0xB0 */
-  __IO uint32_t CALFACT;      /*!< ADC data register,                                          Address offset:0xB4 */
-} ADC_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CCR;
-} ADC_Common_TypeDef;
-
-/** 
-  * @brief AES hardware accelerator
-  */
-
-typedef struct
-{
-  __IO uint32_t CR;      /*!< AES control register,                        Address offset: 0x00 */
-  __IO uint32_t SR;      /*!< AES status register,                         Address offset: 0x04 */
-  __IO uint32_t DINR;    /*!< AES data input register,                     Address offset: 0x08 */
-  __IO uint32_t DOUTR;   /*!< AES data output register,                    Address offset: 0x0C */
-  __IO uint32_t KEYR0;   /*!< AES key register 0,                          Address offset: 0x10 */
-  __IO uint32_t KEYR1;   /*!< AES key register 1,                          Address offset: 0x14 */
-  __IO uint32_t KEYR2;   /*!< AES key register 2,                          Address offset: 0x18 */
-  __IO uint32_t KEYR3;   /*!< AES key register 3,                          Address offset: 0x1C */
-  __IO uint32_t IVR0;    /*!< AES initialization vector register 0,        Address offset: 0x20 */
-  __IO uint32_t IVR1;    /*!< AES initialization vector register 1,        Address offset: 0x24 */
-  __IO uint32_t IVR2;    /*!< AES initialization vector register 2,        Address offset: 0x28 */
-  __IO uint32_t IVR3;    /*!< AES initialization vector register 3,        Address offset: 0x2C */
-} AES_TypeDef;
-
-/**
-  * @brief Comparator 
-  */
-
-typedef struct
-{
-  __IO uint32_t CSR;     /*!< COMP comparator control and status register, Address offset: 0x18 */
-} COMP_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CSR;         /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
-} COMP_Common_TypeDef;
-
-
-/**
-* @brief CRC calculation unit
-*/
-
-typedef struct
-{
-__IO uint32_t DR;            /*!< CRC Data register,                            Address offset: 0x00 */
-__IO uint8_t IDR;            /*!< CRC Independent data register,                Address offset: 0x04 */
-uint8_t RESERVED0;           /*!< Reserved,                                                     0x05 */
-uint16_t RESERVED1;          /*!< Reserved,                                                     0x06 */
-__IO uint32_t CR;            /*!< CRC Control register,                         Address offset: 0x08 */
-uint32_t RESERVED2;          /*!< Reserved,                                                     0x0C */
-__IO uint32_t INIT;          /*!< Initial CRC value register,                   Address offset: 0x10 */
-__IO uint32_t POL;           /*!< CRC polynomial register,                      Address offset: 0x14 */
-} CRC_TypeDef;
-
-/** 
-  * @brief Debug MCU
-  */
-
-typedef struct
-{
-  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
-  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
-  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
-  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/** 
-  * @brief DMA Controller
-  */
-
-typedef struct
-{
-  __IO uint32_t CCR;          /*!< DMA channel x configuration register */
-  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register */
-  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register */
-  __IO uint32_t CMAR;         /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
-  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
-} DMA_TypeDef;                                                                  
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t CSELR;        /*!< DMA channel selection register,              Address offset: 0xA8 */
-} DMA_Request_TypeDef;                                                          
-                                                                                
-/**                                                                             
-  * @brief External Interrupt/Event Controller                                  
-  */                                                                            
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t IMR;          /*!
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l062xx
-  * @{
-  */
-    
-#ifndef __STM32L062xx_H
-#define __STM32L062xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-  
-
-/** @addtogroup Configuration_section_for_CMSIS
-  * @{
-  */
-/**
-  * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals 
-  */
-#define __CM0PLUS_REV             0 /*!< Core Revision r0p0                            */
-#define __MPU_PRESENT             1 /*!< STM32L0xx  provides an MPU                    */
-#define __VTOR_PRESENT            1 /*!< Vector  Table  Register supported             */
-#define __NVIC_PRIO_BITS          2 /*!< STM32L0xx uses 2 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used  */
-
-/**
-  * @}
-  */
-   
-/** @addtogroup Peripheral_interrupt_number_definition
-  * @{
-  */
-   
-/**
- * @brief stm32l062xx Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
- */
-
-/*!< Interrupt Number Definition */
-typedef enum
-{
-/******  Cortex-M0 Processor Exceptions Numbers ******************************************************/
-  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
-  HardFault_IRQn              = -13,    /*!< 3 Cortex-M0+ Hard Fault Interrupt                       */
-  SVC_IRQn                    = -5,     /*!< 11 Cortex-M0+ SV Call Interrupt                         */
-  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M0+ Pend SV Interrupt                         */
-  SysTick_IRQn                = -1,     /*!< 15 Cortex-M0+ System Tick Interrupt                     */
-
-/******  STM32L-0 specific Interrupt Numbers *********************************************************/
-  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
-  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detect Interrupt                  */
-  RTC_IRQn                    = 2,      /*!< RTC through EXTI Line Interrupt                         */
-  FLASH_IRQn                  = 3,      /*!< FLASH Interrupt                                         */
-  RCC_CRS_IRQn                = 4,      /*!< RCC and CRS Interrupts                                  */
-  EXTI0_1_IRQn                = 5,      /*!< EXTI Line 0 and 1 Interrupts                            */
-  EXTI2_3_IRQn                = 6,      /*!< EXTI Line 2 and 3 Interrupts                            */
-  EXTI4_15_IRQn               = 7,      /*!< EXTI Line 4 to 15 Interrupts                            */
-  TSC_IRQn                    = 8,      /*!< TSC Interrupt                                           */
-  DMA1_Channel1_IRQn          = 9,      /*!< DMA1 Channel 1 Interrupt                                */
-  DMA1_Channel2_3_IRQn        = 10,     /*!< DMA1 Channel 2 and Channel 3 Interrupts                 */
-  DMA1_Channel4_5_6_7_IRQn    = 11,     /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */
-  ADC1_COMP_IRQn              = 12,     /*!< ADC1, COMP1 and COMP2 Interrupts                        */
-  LPTIM1_IRQn                 = 13,     /*!< LPTIM1 Interrupt                                        */
-  TIM2_IRQn                   = 15,     /*!< TIM2 Interrupt                                          */
-  TIM6_DAC_IRQn               = 17,     /*!< TIM6 and DAC Interrupts                                 */
-  TIM21_IRQn                  = 20,     /*!< TIM21 Interrupt                                         */
-  TIM22_IRQn                  = 22,     /*!< TIM22 Interrupt                                         */
-  I2C1_IRQn                   = 23,     /*!< I2C1 Interrupt                                          */
-  I2C2_IRQn                   = 24,     /*!< I2C2 Interrupt                                          */
-  SPI1_IRQn                   = 25,     /*!< SPI1 Interrupt                                          */
-  SPI2_IRQn                   = 26,     /*!< SPI2 Interrupt                                          */
-  USART1_IRQn                 = 27,     /*!< USART1 Interrupt                                        */
-  USART2_IRQn                 = 28,     /*!< USART2 Interrupt                                        */
-  AES_RNG_LPUART1_IRQn        = 29,     /*!< AES and RNG and LPUART1 Interrupts                      */
-  USB_IRQn                    = 31,     /*!< USB global Interrupt                                    */
-} IRQn_Type;
-
-/**
-  * @}
-  */
-
-#include "core_cm0plus.h"
-#include "system_stm32l0xx.h"
-#include 
-
-/** @addtogroup Peripheral_registers_structures
-  * @{
-  */   
-
-/** 
-  * @brief Analog to Digital Converter  
-  */
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< ADC Interrupt and Status register,                          Address offset:0x00 */
-  __IO uint32_t IER;          /*!< ADC Interrupt Enable register,                              Address offset:0x04 */
-  __IO uint32_t CR;           /*!< ADC Control register,                                       Address offset:0x08 */
-  __IO uint32_t CFGR1;        /*!< ADC Configuration register 1,                               Address offset:0x0C */
-  __IO uint32_t CFGR2;        /*!< ADC Configuration register 2,                               Address offset:0x10 */
-  __IO uint32_t SMPR;         /*!< ADC Sampling time register,                                 Address offset:0x14 */
-  uint32_t   RESERVED1;       /*!< Reserved,                                                                  0x18 */
-  uint32_t   RESERVED2;       /*!< Reserved,                                                                  0x1C */
-  __IO uint32_t TR;           /*!< ADC watchdog threshold register,                            Address offset:0x20 */
-  uint32_t   RESERVED3;       /*!< Reserved,                                                                  0x24 */
-  __IO uint32_t CHSELR;       /*!< ADC channel selection register,                             Address offset:0x28 */
-  uint32_t   RESERVED4[5];    /*!< Reserved,                                                                  0x2C */
-  __IO uint32_t DR;           /*!< ADC data register,                                          Address offset:0x40 */
-  uint32_t   RESERVED5[28];   /*!< Reserved,                                                           0x44 - 0xB0 */
-  __IO uint32_t CALFACT;      /*!< ADC data register,                                          Address offset:0xB4 */
-} ADC_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CCR;
-} ADC_Common_TypeDef;
-
-/** 
-  * @brief AES hardware accelerator
-  */
-
-typedef struct
-{
-  __IO uint32_t CR;      /*!< AES control register,                        Address offset: 0x00 */
-  __IO uint32_t SR;      /*!< AES status register,                         Address offset: 0x04 */
-  __IO uint32_t DINR;    /*!< AES data input register,                     Address offset: 0x08 */
-  __IO uint32_t DOUTR;   /*!< AES data output register,                    Address offset: 0x0C */
-  __IO uint32_t KEYR0;   /*!< AES key register 0,                          Address offset: 0x10 */
-  __IO uint32_t KEYR1;   /*!< AES key register 1,                          Address offset: 0x14 */
-  __IO uint32_t KEYR2;   /*!< AES key register 2,                          Address offset: 0x18 */
-  __IO uint32_t KEYR3;   /*!< AES key register 3,                          Address offset: 0x1C */
-  __IO uint32_t IVR0;    /*!< AES initialization vector register 0,        Address offset: 0x20 */
-  __IO uint32_t IVR1;    /*!< AES initialization vector register 1,        Address offset: 0x24 */
-  __IO uint32_t IVR2;    /*!< AES initialization vector register 2,        Address offset: 0x28 */
-  __IO uint32_t IVR3;    /*!< AES initialization vector register 3,        Address offset: 0x2C */
-} AES_TypeDef;
-
-/**
-  * @brief Comparator 
-  */
-
-typedef struct
-{
-  __IO uint32_t CSR;     /*!< COMP comparator control and status register, Address offset: 0x18 */
-} COMP_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CSR;         /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
-} COMP_Common_TypeDef;
-
-
-/**
-* @brief CRC calculation unit
-*/
-
-typedef struct
-{
-__IO uint32_t DR;            /*!< CRC Data register,                            Address offset: 0x00 */
-__IO uint8_t IDR;            /*!< CRC Independent data register,                Address offset: 0x04 */
-uint8_t RESERVED0;           /*!< Reserved,                                                     0x05 */
-uint16_t RESERVED1;          /*!< Reserved,                                                     0x06 */
-__IO uint32_t CR;            /*!< CRC Control register,                         Address offset: 0x08 */
-uint32_t RESERVED2;          /*!< Reserved,                                                     0x0C */
-__IO uint32_t INIT;          /*!< Initial CRC value register,                   Address offset: 0x10 */
-__IO uint32_t POL;           /*!< CRC polynomial register,                      Address offset: 0x14 */
-} CRC_TypeDef;
-
-/**
-  * @brief Clock Recovery System 
-  */
-
-typedef struct 
-{
-__IO uint32_t CR;     /*!< CRS ccontrol register,              Address offset: 0x00 */
-__IO uint32_t CFGR;   /*!< CRS configuration register,         Address offset: 0x04 */
-__IO uint32_t ISR;    /*!< CRS interrupt and status register,  Address offset: 0x08 */
-__IO uint32_t ICR;    /*!< CRS interrupt flag clear register,  Address offset: 0x0C */
-} CRS_TypeDef;
-
-/** 
-  * @brief Digital to Analog Converter
-  */
-
-typedef struct
-{
-  __IO uint32_t CR;            /*!< DAC control register,                                    Address offset: 0x00 */
-  __IO uint32_t SWTRIGR;       /*!< DAC software trigger register,                           Address offset: 0x04 */
-  __IO uint32_t DHR12R1;       /*!< DAC channel1 12-bit right-aligned data holding register, Address offset: 0x08 */
-  __IO uint32_t DHR12L1;       /*!< DAC channel1 12-bit left aligned data holding register,  Address offset: 0x0C */
-  __IO uint32_t DHR8R1;        /*!< DAC channel1 8-bit right aligned data holding register,  Address offset: 0x10 */
-  uint32_t      RESERVED0[6];  /*!<                                                                     0x14-0x28 */
-  __IO uint32_t DOR1;          /*!< DAC channel1 data output register,                       Address offset: 0x2C */
-  uint32_t      RESERVED1;     /*!<                                                                          0x30 */
-  __IO uint32_t SR;            /*!< DAC status register,                                     Address offset: 0x34 */
-} DAC_TypeDef;
-
-/** 
-  * @brief Debug MCU
-  */
-
-typedef struct
-{
-  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
-  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
-  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
-  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/** 
-  * @brief DMA Controller
-  */
-
-typedef struct
-{
-  __IO uint32_t CCR;          /*!< DMA channel x configuration register */
-  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register */
-  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register */
-  __IO uint32_t CMAR;         /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
-  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
-} DMA_TypeDef;                                                                  
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t CSELR;        /*!< DMA channel selection register,              Address offset: 0xA8 */
-} DMA_Request_TypeDef;                                                          
-                                                                                
-/**                                                                             
-  * @brief External Interrupt/Event Controller                                  
-  */                                                                            
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t IMR;          /*!
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l063xx
-  * @{
-  */
-    
-#ifndef __STM32L063xx_H
-#define __STM32L063xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-  
-
-/** @addtogroup Configuration_section_for_CMSIS
-  * @{
-  */
-/**
-  * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals 
-  */
-#define __CM0PLUS_REV             0 /*!< Core Revision r0p0                            */
-#define __MPU_PRESENT             1 /*!< STM32L0xx  provides an MPU                    */
-#define __VTOR_PRESENT            1 /*!< Vector  Table  Register supported             */
-#define __NVIC_PRIO_BITS          2 /*!< STM32L0xx uses 2 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used  */
-
-/**
-  * @}
-  */
-   
-/** @addtogroup Peripheral_interrupt_number_definition
-  * @{
-  */
-   
-/**
- * @brief stm32l063xx Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
- */
-
-/*!< Interrupt Number Definition */
-typedef enum
-{
-/******  Cortex-M0 Processor Exceptions Numbers ******************************************************/
-  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
-  HardFault_IRQn              = -13,    /*!< 3 Cortex-M0+ Hard Fault Interrupt                       */
-  SVC_IRQn                    = -5,     /*!< 11 Cortex-M0+ SV Call Interrupt                         */
-  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M0+ Pend SV Interrupt                         */
-  SysTick_IRQn                = -1,     /*!< 15 Cortex-M0+ System Tick Interrupt                     */
-
-/******  STM32L-0 specific Interrupt Numbers *********************************************************/
-  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
-  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detect Interrupt                  */
-  RTC_IRQn                    = 2,      /*!< RTC through EXTI Line Interrupt                         */
-  FLASH_IRQn                  = 3,      /*!< FLASH Interrupt                                         */
-  RCC_CRS_IRQn                = 4,      /*!< RCC and CRS Interrupts                                  */
-  EXTI0_1_IRQn                = 5,      /*!< EXTI Line 0 and 1 Interrupts                            */
-  EXTI2_3_IRQn                = 6,      /*!< EXTI Line 2 and 3 Interrupts                            */
-  EXTI4_15_IRQn               = 7,      /*!< EXTI Line 4 to 15 Interrupts                            */
-  TSC_IRQn                    = 8,      /*!< TSC Interrupt                                           */
-  DMA1_Channel1_IRQn          = 9,      /*!< DMA1 Channel 1 Interrupt                                */
-  DMA1_Channel2_3_IRQn        = 10,     /*!< DMA1 Channel 2 and Channel 3 Interrupts                 */
-  DMA1_Channel4_5_6_7_IRQn    = 11,     /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */
-  ADC1_COMP_IRQn              = 12,     /*!< ADC1, COMP1 and COMP2 Interrupts                        */
-  LPTIM1_IRQn                 = 13,     /*!< LPTIM1 Interrupt                                        */
-  TIM2_IRQn                   = 15,     /*!< TIM2 Interrupt                                          */
-  TIM6_DAC_IRQn               = 17,     /*!< TIM6 and DAC Interrupts                                 */
-  TIM21_IRQn                  = 20,     /*!< TIM21 Interrupt                                         */
-  TIM22_IRQn                  = 22,     /*!< TIM22 Interrupt                                         */
-  I2C1_IRQn                   = 23,     /*!< I2C1 Interrupt                                          */
-  I2C2_IRQn                   = 24,     /*!< I2C2 Interrupt                                          */
-  SPI1_IRQn                   = 25,     /*!< SPI1 Interrupt                                          */
-  SPI2_IRQn                   = 26,     /*!< SPI2 Interrupt                                          */
-  USART1_IRQn                 = 27,     /*!< USART1 Interrupt                                        */
-  USART2_IRQn                 = 28,     /*!< USART2 Interrupt                                        */
-  AES_RNG_LPUART1_IRQn        = 29,     /*!< AES and RNG and LPUART1 Interrupts                      */
-  LCD_IRQn                    = 30,     /*!< LCD Interrupt                                           */
-  USB_IRQn                    = 31,     /*!< USB global Interrupt                                    */
-} IRQn_Type;
-
-/**
-  * @}
-  */
-
-#include "core_cm0plus.h"
-#include "system_stm32l0xx.h"
-#include 
-
-/** @addtogroup Peripheral_registers_structures
-  * @{
-  */   
-
-/** 
-  * @brief Analog to Digital Converter  
-  */
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< ADC Interrupt and Status register,                          Address offset:0x00 */
-  __IO uint32_t IER;          /*!< ADC Interrupt Enable register,                              Address offset:0x04 */
-  __IO uint32_t CR;           /*!< ADC Control register,                                       Address offset:0x08 */
-  __IO uint32_t CFGR1;        /*!< ADC Configuration register 1,                               Address offset:0x0C */
-  __IO uint32_t CFGR2;        /*!< ADC Configuration register 2,                               Address offset:0x10 */
-  __IO uint32_t SMPR;         /*!< ADC Sampling time register,                                 Address offset:0x14 */
-  uint32_t   RESERVED1;       /*!< Reserved,                                                                  0x18 */
-  uint32_t   RESERVED2;       /*!< Reserved,                                                                  0x1C */
-  __IO uint32_t TR;           /*!< ADC watchdog threshold register,                            Address offset:0x20 */
-  uint32_t   RESERVED3;       /*!< Reserved,                                                                  0x24 */
-  __IO uint32_t CHSELR;       /*!< ADC channel selection register,                             Address offset:0x28 */
-  uint32_t   RESERVED4[5];    /*!< Reserved,                                                                  0x2C */
-  __IO uint32_t DR;           /*!< ADC data register,                                          Address offset:0x40 */
-  uint32_t   RESERVED5[28];   /*!< Reserved,                                                           0x44 - 0xB0 */
-  __IO uint32_t CALFACT;      /*!< ADC data register,                                          Address offset:0xB4 */
-} ADC_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CCR;
-} ADC_Common_TypeDef;
-
-/** 
-  * @brief AES hardware accelerator
-  */
-
-typedef struct
-{
-  __IO uint32_t CR;      /*!< AES control register,                        Address offset: 0x00 */
-  __IO uint32_t SR;      /*!< AES status register,                         Address offset: 0x04 */
-  __IO uint32_t DINR;    /*!< AES data input register,                     Address offset: 0x08 */
-  __IO uint32_t DOUTR;   /*!< AES data output register,                    Address offset: 0x0C */
-  __IO uint32_t KEYR0;   /*!< AES key register 0,                          Address offset: 0x10 */
-  __IO uint32_t KEYR1;   /*!< AES key register 1,                          Address offset: 0x14 */
-  __IO uint32_t KEYR2;   /*!< AES key register 2,                          Address offset: 0x18 */
-  __IO uint32_t KEYR3;   /*!< AES key register 3,                          Address offset: 0x1C */
-  __IO uint32_t IVR0;    /*!< AES initialization vector register 0,        Address offset: 0x20 */
-  __IO uint32_t IVR1;    /*!< AES initialization vector register 1,        Address offset: 0x24 */
-  __IO uint32_t IVR2;    /*!< AES initialization vector register 2,        Address offset: 0x28 */
-  __IO uint32_t IVR3;    /*!< AES initialization vector register 3,        Address offset: 0x2C */
-} AES_TypeDef;
-
-/**
-  * @brief Comparator 
-  */
-
-typedef struct
-{
-  __IO uint32_t CSR;     /*!< COMP comparator control and status register, Address offset: 0x18 */
-} COMP_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CSR;         /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
-} COMP_Common_TypeDef;
-
-
-/**
-* @brief CRC calculation unit
-*/
-
-typedef struct
-{
-__IO uint32_t DR;            /*!< CRC Data register,                            Address offset: 0x00 */
-__IO uint8_t IDR;            /*!< CRC Independent data register,                Address offset: 0x04 */
-uint8_t RESERVED0;           /*!< Reserved,                                                     0x05 */
-uint16_t RESERVED1;          /*!< Reserved,                                                     0x06 */
-__IO uint32_t CR;            /*!< CRC Control register,                         Address offset: 0x08 */
-uint32_t RESERVED2;          /*!< Reserved,                                                     0x0C */
-__IO uint32_t INIT;          /*!< Initial CRC value register,                   Address offset: 0x10 */
-__IO uint32_t POL;           /*!< CRC polynomial register,                      Address offset: 0x14 */
-} CRC_TypeDef;
-
-/**
-  * @brief Clock Recovery System 
-  */
-
-typedef struct 
-{
-__IO uint32_t CR;     /*!< CRS ccontrol register,              Address offset: 0x00 */
-__IO uint32_t CFGR;   /*!< CRS configuration register,         Address offset: 0x04 */
-__IO uint32_t ISR;    /*!< CRS interrupt and status register,  Address offset: 0x08 */
-__IO uint32_t ICR;    /*!< CRS interrupt flag clear register,  Address offset: 0x0C */
-} CRS_TypeDef;
-
-/** 
-  * @brief Digital to Analog Converter
-  */
-
-typedef struct
-{
-  __IO uint32_t CR;            /*!< DAC control register,                                    Address offset: 0x00 */
-  __IO uint32_t SWTRIGR;       /*!< DAC software trigger register,                           Address offset: 0x04 */
-  __IO uint32_t DHR12R1;       /*!< DAC channel1 12-bit right-aligned data holding register, Address offset: 0x08 */
-  __IO uint32_t DHR12L1;       /*!< DAC channel1 12-bit left aligned data holding register,  Address offset: 0x0C */
-  __IO uint32_t DHR8R1;        /*!< DAC channel1 8-bit right aligned data holding register,  Address offset: 0x10 */
-  uint32_t      RESERVED0[6];  /*!<                                                                     0x14-0x28 */
-  __IO uint32_t DOR1;          /*!< DAC channel1 data output register,                       Address offset: 0x2C */
-  uint32_t      RESERVED1;     /*!<                                                                          0x30 */
-  __IO uint32_t SR;            /*!< DAC status register,                                     Address offset: 0x34 */
-} DAC_TypeDef;
-
-/** 
-  * @brief Debug MCU
-  */
-
-typedef struct
-{
-  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
-  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
-  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
-  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/** 
-  * @brief DMA Controller
-  */
-
-typedef struct
-{
-  __IO uint32_t CCR;          /*!< DMA channel x configuration register */
-  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register */
-  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register */
-  __IO uint32_t CMAR;         /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
-  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
-} DMA_TypeDef;                                                                  
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t CSELR;        /*!< DMA channel selection register,              Address offset: 0xA8 */
-} DMA_Request_TypeDef;                                                          
-                                                                                
-/**                                                                             
-  * @brief External Interrupt/Event Controller                                  
-  */                                                                            
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t IMR;          /*!
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l071xx
-  * @{
-  */
-    
-#ifndef __STM32L071xx_H
-#define __STM32L071xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-  
-
-/** @addtogroup Configuration_section_for_CMSIS
-  * @{
-  */
-/**
-  * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals 
-  */
-#define __CM0PLUS_REV             0 /*!< Core Revision r0p0                            */
-#define __MPU_PRESENT             1 /*!< STM32L0xx  provides an MPU                    */
-#define __VTOR_PRESENT            1 /*!< Vector  Table  Register supported             */
-#define __NVIC_PRIO_BITS          2 /*!< STM32L0xx uses 2 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used  */
-
-/**
-  * @}
-  */
-   
-/** @addtogroup Peripheral_interrupt_number_definition
-  * @{
-  */
-   
-/**
- * @brief stm32l071xx Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
- */
-
-/*!< Interrupt Number Definition */
-typedef enum
-{
-/******  Cortex-M0 Processor Exceptions Numbers ******************************************************/
-  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
-  HardFault_IRQn              = -13,    /*!< 3 Cortex-M0+ Hard Fault Interrupt                       */
-  SVC_IRQn                    = -5,     /*!< 11 Cortex-M0+ SV Call Interrupt                         */
-  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M0+ Pend SV Interrupt                         */
-  SysTick_IRQn                = -1,     /*!< 15 Cortex-M0+ System Tick Interrupt                     */
-
-/******  STM32L-0 specific Interrupt Numbers *********************************************************/
-  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
-  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detect Interrupt                  */
-  RTC_IRQn                    = 2,      /*!< RTC through EXTI Line Interrupt                         */
-  FLASH_IRQn                  = 3,      /*!< FLASH Interrupt                                         */
-  RCC_IRQn                    = 4,      /*!< RCC Interrupt                                           */
-  EXTI0_1_IRQn                = 5,      /*!< EXTI Line 0 and 1 Interrupts                            */
-  EXTI2_3_IRQn                = 6,      /*!< EXTI Line 2 and 3 Interrupts                            */
-  EXTI4_15_IRQn               = 7,      /*!< EXTI Line 4 to 15 Interrupts                            */
-  DMA1_Channel1_IRQn          = 9,      /*!< DMA1 Channel 1 Interrupt                                */
-  DMA1_Channel2_3_IRQn        = 10,     /*!< DMA1 Channel 2 and Channel 3 Interrupts                 */
-  DMA1_Channel4_5_6_7_IRQn    = 11,     /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */
-  ADC1_COMP_IRQn              = 12,     /*!< ADC1, COMP1 and COMP2 Interrupts                        */
-  LPTIM1_IRQn                 = 13,     /*!< LPTIM1 Interrupt                                        */
-  USART4_5_IRQn               = 14,     /*!< USART4 and USART5 Interrupt                             */
-  TIM2_IRQn                   = 15,     /*!< TIM2 Interrupt                                          */
-  TIM3_IRQn                   = 16,     /*!< TIM3 Interrupt                                          */
-  TIM6_IRQn                   = 17,     /*!< TIM6  Interrupt                                         */
-  TIM7_IRQn                   = 18,     /*!< TIM7 Interrupt                                          */
-  TIM21_IRQn                  = 20,     /*!< TIM21 Interrupt                                         */
-  I2C3_IRQn                   = 21,     /*!< I2C3 Interrupt                                          */
-  TIM22_IRQn                  = 22,     /*!< TIM22 Interrupt                                         */
-  I2C1_IRQn                   = 23,     /*!< I2C1 Interrupt                                          */
-  I2C2_IRQn                   = 24,     /*!< I2C2 Interrupt                                          */
-  SPI1_IRQn                   = 25,     /*!< SPI1 Interrupt                                          */
-  SPI2_IRQn                   = 26,     /*!< SPI2 Interrupt                                          */
-  USART1_IRQn                 = 27,     /*!< USART1 Interrupt                                        */
-  USART2_IRQn                 = 28,     /*!< USART2 Interrupt                                        */
-  LPUART1_IRQn                = 29,     /*!< LPUART1 Interrupt                                       */
-} IRQn_Type;
-
-/**
-  * @}
-  */
-
-#include "core_cm0plus.h"
-#include "system_stm32l0xx.h"
-#include 
-
-/** @addtogroup Peripheral_registers_structures
-  * @{
-  */   
-
-/** 
-  * @brief Analog to Digital Converter  
-  */
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< ADC Interrupt and Status register,                          Address offset:0x00 */
-  __IO uint32_t IER;          /*!< ADC Interrupt Enable register,                              Address offset:0x04 */
-  __IO uint32_t CR;           /*!< ADC Control register,                                       Address offset:0x08 */
-  __IO uint32_t CFGR1;        /*!< ADC Configuration register 1,                               Address offset:0x0C */
-  __IO uint32_t CFGR2;        /*!< ADC Configuration register 2,                               Address offset:0x10 */
-  __IO uint32_t SMPR;         /*!< ADC Sampling time register,                                 Address offset:0x14 */
-  uint32_t   RESERVED1;       /*!< Reserved,                                                                  0x18 */
-  uint32_t   RESERVED2;       /*!< Reserved,                                                                  0x1C */
-  __IO uint32_t TR;           /*!< ADC watchdog threshold register,                            Address offset:0x20 */
-  uint32_t   RESERVED3;       /*!< Reserved,                                                                  0x24 */
-  __IO uint32_t CHSELR;       /*!< ADC channel selection register,                             Address offset:0x28 */
-  uint32_t   RESERVED4[5];    /*!< Reserved,                                                                  0x2C */
-  __IO uint32_t DR;           /*!< ADC data register,                                          Address offset:0x40 */
-  uint32_t   RESERVED5[28];   /*!< Reserved,                                                           0x44 - 0xB0 */
-  __IO uint32_t CALFACT;      /*!< ADC data register,                                          Address offset:0xB4 */
-} ADC_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CCR;
-} ADC_Common_TypeDef;
-
-
-/**
-  * @brief Comparator 
-  */
-
-typedef struct
-{
-  __IO uint32_t CSR;     /*!< COMP comparator control and status register, Address offset: 0x18 */
-} COMP_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CSR;         /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
-} COMP_Common_TypeDef;
-
-
-/**
-* @brief CRC calculation unit
-*/
-
-typedef struct
-{
-__IO uint32_t DR;            /*!< CRC Data register,                            Address offset: 0x00 */
-__IO uint8_t IDR;            /*!< CRC Independent data register,                Address offset: 0x04 */
-uint8_t RESERVED0;           /*!< Reserved,                                                     0x05 */
-uint16_t RESERVED1;          /*!< Reserved,                                                     0x06 */
-__IO uint32_t CR;            /*!< CRC Control register,                         Address offset: 0x08 */
-uint32_t RESERVED2;          /*!< Reserved,                                                     0x0C */
-__IO uint32_t INIT;          /*!< Initial CRC value register,                   Address offset: 0x10 */
-__IO uint32_t POL;           /*!< CRC polynomial register,                      Address offset: 0x14 */
-} CRC_TypeDef;
-
-/** 
-  * @brief Debug MCU
-  */
-
-typedef struct
-{
-  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
-  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
-  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
-  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/** 
-  * @brief DMA Controller
-  */
-
-typedef struct
-{
-  __IO uint32_t CCR;          /*!< DMA channel x configuration register */
-  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register */
-  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register */
-  __IO uint32_t CMAR;         /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
-  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
-} DMA_TypeDef;                                                                  
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t CSELR;        /*!< DMA channel selection register,              Address offset: 0xA8 */
-} DMA_Request_TypeDef;                                                          
-                                                                                
-/**                                                                             
-  * @brief External Interrupt/Event Controller                                  
-  */                                                                            
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t IMR;          /*!
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l072xx
-  * @{
-  */
-    
-#ifndef __STM32L072xx_H
-#define __STM32L072xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-  
-
-/** @addtogroup Configuration_section_for_CMSIS
-  * @{
-  */
-/**
-  * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals 
-  */
-#define __CM0PLUS_REV             0 /*!< Core Revision r0p0                            */
-#define __MPU_PRESENT             1 /*!< STM32L0xx  provides an MPU                    */
-#define __VTOR_PRESENT            1 /*!< Vector  Table  Register supported             */
-#define __NVIC_PRIO_BITS          2 /*!< STM32L0xx uses 2 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used  */
-
-/**
-  * @}
-  */
-   
-/** @addtogroup Peripheral_interrupt_number_definition
-  * @{
-  */
-   
-/**
- * @brief stm32l072xx Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
- */
-
-/*!< Interrupt Number Definition */
-typedef enum
-{
-/******  Cortex-M0 Processor Exceptions Numbers ******************************************************/
-  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
-  HardFault_IRQn              = -13,    /*!< 3 Cortex-M0+ Hard Fault Interrupt                       */
-  SVC_IRQn                    = -5,     /*!< 11 Cortex-M0+ SV Call Interrupt                         */
-  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M0+ Pend SV Interrupt                         */
-  SysTick_IRQn                = -1,     /*!< 15 Cortex-M0+ System Tick Interrupt                     */
-
-/******  STM32L-0 specific Interrupt Numbers *********************************************************/
-  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
-  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detect Interrupt                  */
-  RTC_IRQn                    = 2,      /*!< RTC through EXTI Line Interrupt                         */
-  FLASH_IRQn                  = 3,      /*!< FLASH Interrupt                                         */
-  RCC_CRS_IRQn                = 4,      /*!< RCC and CRS Interrupts                                  */
-  EXTI0_1_IRQn                = 5,      /*!< EXTI Line 0 and 1 Interrupts                            */
-  EXTI2_3_IRQn                = 6,      /*!< EXTI Line 2 and 3 Interrupts                            */
-  EXTI4_15_IRQn               = 7,      /*!< EXTI Line 4 to 15 Interrupts                            */
-  TSC_IRQn                    = 8,      /*!< TSC Interrupt                                           */
-  DMA1_Channel1_IRQn          = 9,      /*!< DMA1 Channel 1 Interrupt                                */
-  DMA1_Channel2_3_IRQn        = 10,     /*!< DMA1 Channel 2 and Channel 3 Interrupts                 */
-  DMA1_Channel4_5_6_7_IRQn    = 11,     /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */
-  ADC1_COMP_IRQn              = 12,     /*!< ADC1, COMP1 and COMP2 Interrupts                        */
-  LPTIM1_IRQn                 = 13,     /*!< LPTIM1 Interrupt                                        */
-  USART4_5_IRQn               = 14,     /*!< USART4 and USART5 Interrupt                             */
-  TIM2_IRQn                   = 15,     /*!< TIM2 Interrupt                                          */
-  TIM3_IRQn                   = 16,     /*!< TIM3 Interrupt                                          */
-  TIM6_DAC_IRQn               = 17,     /*!< TIM6 and DAC Interrupts                                 */
-  TIM7_IRQn                   = 18,     /*!< TIM7 Interrupt                                          */
-  TIM21_IRQn                  = 20,     /*!< TIM21 Interrupt                                         */
-  I2C3_IRQn                   = 21,     /*!< I2C3 Interrupt                                          */
-  TIM22_IRQn                  = 22,     /*!< TIM22 Interrupt                                         */
-  I2C1_IRQn                   = 23,     /*!< I2C1 Interrupt                                          */
-  I2C2_IRQn                   = 24,     /*!< I2C2 Interrupt                                          */
-  SPI1_IRQn                   = 25,     /*!< SPI1 Interrupt                                          */
-  SPI2_IRQn                   = 26,     /*!< SPI2 Interrupt                                          */
-  USART1_IRQn                 = 27,     /*!< USART1 Interrupt                                        */
-  USART2_IRQn                 = 28,     /*!< USART2 Interrupt                                        */
-  RNG_LPUART1_IRQn            = 29,     /*!< RNG and LPUART1 Interrupts                              */
-  USB_IRQn                    = 31,     /*!< USB global Interrupt                                    */
-} IRQn_Type;
-
-/**
-  * @}
-  */
-
-#include "core_cm0plus.h"
-#include "system_stm32l0xx.h"
-#include 
-
-/** @addtogroup Peripheral_registers_structures
-  * @{
-  */   
-
-/** 
-  * @brief Analog to Digital Converter  
-  */
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< ADC Interrupt and Status register,                          Address offset:0x00 */
-  __IO uint32_t IER;          /*!< ADC Interrupt Enable register,                              Address offset:0x04 */
-  __IO uint32_t CR;           /*!< ADC Control register,                                       Address offset:0x08 */
-  __IO uint32_t CFGR1;        /*!< ADC Configuration register 1,                               Address offset:0x0C */
-  __IO uint32_t CFGR2;        /*!< ADC Configuration register 2,                               Address offset:0x10 */
-  __IO uint32_t SMPR;         /*!< ADC Sampling time register,                                 Address offset:0x14 */
-  uint32_t   RESERVED1;       /*!< Reserved,                                                                  0x18 */
-  uint32_t   RESERVED2;       /*!< Reserved,                                                                  0x1C */
-  __IO uint32_t TR;           /*!< ADC watchdog threshold register,                            Address offset:0x20 */
-  uint32_t   RESERVED3;       /*!< Reserved,                                                                  0x24 */
-  __IO uint32_t CHSELR;       /*!< ADC channel selection register,                             Address offset:0x28 */
-  uint32_t   RESERVED4[5];    /*!< Reserved,                                                                  0x2C */
-  __IO uint32_t DR;           /*!< ADC data register,                                          Address offset:0x40 */
-  uint32_t   RESERVED5[28];   /*!< Reserved,                                                           0x44 - 0xB0 */
-  __IO uint32_t CALFACT;      /*!< ADC data register,                                          Address offset:0xB4 */
-} ADC_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CCR;
-} ADC_Common_TypeDef;
-
-
-/**
-  * @brief Comparator 
-  */
-
-typedef struct
-{
-  __IO uint32_t CSR;     /*!< COMP comparator control and status register, Address offset: 0x18 */
-} COMP_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CSR;         /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
-} COMP_Common_TypeDef;
-
-
-/**
-* @brief CRC calculation unit
-*/
-
-typedef struct
-{
-__IO uint32_t DR;            /*!< CRC Data register,                            Address offset: 0x00 */
-__IO uint8_t IDR;            /*!< CRC Independent data register,                Address offset: 0x04 */
-uint8_t RESERVED0;           /*!< Reserved,                                                     0x05 */
-uint16_t RESERVED1;          /*!< Reserved,                                                     0x06 */
-__IO uint32_t CR;            /*!< CRC Control register,                         Address offset: 0x08 */
-uint32_t RESERVED2;          /*!< Reserved,                                                     0x0C */
-__IO uint32_t INIT;          /*!< Initial CRC value register,                   Address offset: 0x10 */
-__IO uint32_t POL;           /*!< CRC polynomial register,                      Address offset: 0x14 */
-} CRC_TypeDef;
-
-/**
-  * @brief Clock Recovery System 
-  */
-
-typedef struct 
-{
-__IO uint32_t CR;     /*!< CRS ccontrol register,              Address offset: 0x00 */
-__IO uint32_t CFGR;   /*!< CRS configuration register,         Address offset: 0x04 */
-__IO uint32_t ISR;    /*!< CRS interrupt and status register,  Address offset: 0x08 */
-__IO uint32_t ICR;    /*!< CRS interrupt flag clear register,  Address offset: 0x0C */
-} CRS_TypeDef;
-
-/** 
-  * @brief Digital to Analog Converter
-  */
-
-typedef struct
-{
-  __IO uint32_t CR;            /*!< DAC control register,                                    Address offset: 0x00 */
-  __IO uint32_t SWTRIGR;       /*!< DAC software trigger register,                           Address offset: 0x04 */
-  __IO uint32_t DHR12R1;       /*!< DAC channel1 12-bit right-aligned data holding register, Address offset: 0x08 */
-  __IO uint32_t DHR12L1;       /*!< DAC channel1 12-bit left aligned data holding register,  Address offset: 0x0C */
-  __IO uint32_t DHR8R1;        /*!< DAC channel1 8-bit right aligned data holding register,  Address offset: 0x10 */
-  __IO uint32_t DHR12R2;       /*!< DAC channel2 12-bit right aligned data holding register, Address offset: 0x14 */
-  __IO uint32_t DHR12L2;       /*!< DAC channel2 12-bit left aligned data holding register,  Address offset: 0x18 */
-  __IO uint32_t DHR8R2;        /*!< DAC channel2 8-bit right-aligned data holding register,  Address offset: 0x1C */
-  __IO uint32_t DHR12RD;       /*!< Dual DAC 12-bit right-aligned data holding register,     Address offset: 0x20 */
-  __IO uint32_t DHR12LD;       /*!< DUAL DAC 12-bit left aligned data holding register,      Address offset: 0x24 */
-  __IO uint32_t DHR8RD;        /*!< DUAL DAC 8-bit right aligned data holding register,      Address offset: 0x28 */
-  __IO uint32_t DOR1;          /*!< DAC channel1 data output register,                       Address offset: 0x2C */
-  __IO uint32_t DOR2;          /*!< DAC channel2 data output register,                       Address offset: 0x30 */
-  __IO uint32_t SR;            /*!< DAC status register,                                     Address offset: 0x34 */
-} DAC_TypeDef;
-
-/** 
-  * @brief Debug MCU
-  */
-
-typedef struct
-{
-  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
-  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
-  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
-  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/** 
-  * @brief DMA Controller
-  */
-
-typedef struct
-{
-  __IO uint32_t CCR;          /*!< DMA channel x configuration register */
-  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register */
-  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register */
-  __IO uint32_t CMAR;         /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
-  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
-} DMA_TypeDef;                                                                  
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t CSELR;        /*!< DMA channel selection register,              Address offset: 0xA8 */
-} DMA_Request_TypeDef;                                                          
-                                                                                
-/**                                                                             
-  * @brief External Interrupt/Event Controller                                  
-  */                                                                            
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t IMR;          /*!
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l073xx
-  * @{
-  */
-    
-#ifndef __STM32L073xx_H
-#define __STM32L073xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-  
-
-/** @addtogroup Configuration_section_for_CMSIS
-  * @{
-  */
-/**
-  * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals 
-  */
-#define __CM0PLUS_REV             0 /*!< Core Revision r0p0                            */
-#define __MPU_PRESENT             1 /*!< STM32L0xx  provides an MPU                    */
-#define __VTOR_PRESENT            1 /*!< Vector  Table  Register supported             */
-#define __NVIC_PRIO_BITS          2 /*!< STM32L0xx uses 2 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used  */
-
-/**
-  * @}
-  */
-   
-/** @addtogroup Peripheral_interrupt_number_definition
-  * @{
-  */
-   
-/**
- * @brief stm32l073xx Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
- */
-
-/*!< Interrupt Number Definition */
-typedef enum
-{
-/******  Cortex-M0 Processor Exceptions Numbers ******************************************************/
-  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
-  HardFault_IRQn              = -13,    /*!< 3 Cortex-M0+ Hard Fault Interrupt                       */
-  SVC_IRQn                    = -5,     /*!< 11 Cortex-M0+ SV Call Interrupt                         */
-  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M0+ Pend SV Interrupt                         */
-  SysTick_IRQn                = -1,     /*!< 15 Cortex-M0+ System Tick Interrupt                     */
-
-/******  STM32L-0 specific Interrupt Numbers *********************************************************/
-  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
-  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detect Interrupt                  */
-  RTC_IRQn                    = 2,      /*!< RTC through EXTI Line Interrupt                         */
-  FLASH_IRQn                  = 3,      /*!< FLASH Interrupt                                         */
-  RCC_CRS_IRQn                = 4,      /*!< RCC and CRS Interrupts                                  */
-  EXTI0_1_IRQn                = 5,      /*!< EXTI Line 0 and 1 Interrupts                            */
-  EXTI2_3_IRQn                = 6,      /*!< EXTI Line 2 and 3 Interrupts                            */
-  EXTI4_15_IRQn               = 7,      /*!< EXTI Line 4 to 15 Interrupts                            */
-  TSC_IRQn                    = 8,      /*!< TSC Interrupt                                           */
-  DMA1_Channel1_IRQn          = 9,      /*!< DMA1 Channel 1 Interrupt                                */
-  DMA1_Channel2_3_IRQn        = 10,     /*!< DMA1 Channel 2 and Channel 3 Interrupts                 */
-  DMA1_Channel4_5_6_7_IRQn    = 11,     /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */
-  ADC1_COMP_IRQn              = 12,     /*!< ADC1, COMP1 and COMP2 Interrupts                        */
-  LPTIM1_IRQn                 = 13,     /*!< LPTIM1 Interrupt                                        */
-  USART4_5_IRQn               = 14,     /*!< USART4 and USART5 Interrupt                             */
-  TIM2_IRQn                   = 15,     /*!< TIM2 Interrupt                                          */
-  TIM3_IRQn                   = 16,     /*!< TIM3 Interrupt                                          */
-  TIM6_DAC_IRQn               = 17,     /*!< TIM6 and DAC Interrupts                                 */
-  TIM7_IRQn                   = 18,     /*!< TIM7 Interrupt                                          */
-  TIM21_IRQn                  = 20,     /*!< TIM21 Interrupt                                         */
-  I2C3_IRQn                   = 21,     /*!< I2C3 Interrupt                                          */
-  TIM22_IRQn                  = 22,     /*!< TIM22 Interrupt                                         */
-  I2C1_IRQn                   = 23,     /*!< I2C1 Interrupt                                          */
-  I2C2_IRQn                   = 24,     /*!< I2C2 Interrupt                                          */
-  SPI1_IRQn                   = 25,     /*!< SPI1 Interrupt                                          */
-  SPI2_IRQn                   = 26,     /*!< SPI2 Interrupt                                          */
-  USART1_IRQn                 = 27,     /*!< USART1 Interrupt                                        */
-  USART2_IRQn                 = 28,     /*!< USART2 Interrupt                                        */
-  RNG_LPUART1_IRQn            = 29,     /*!< RNG and LPUART1 Interrupts                              */
-  LCD_IRQn                    = 30,     /*!< LCD Interrupt                                           */
-  USB_IRQn                    = 31,     /*!< USB global Interrupt                                    */
-} IRQn_Type;
-
-/**
-  * @}
-  */
-
-#include "core_cm0plus.h"
-#include "system_stm32l0xx.h"
-#include 
-
-/** @addtogroup Peripheral_registers_structures
-  * @{
-  */   
-
-/** 
-  * @brief Analog to Digital Converter  
-  */
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< ADC Interrupt and Status register,                          Address offset:0x00 */
-  __IO uint32_t IER;          /*!< ADC Interrupt Enable register,                              Address offset:0x04 */
-  __IO uint32_t CR;           /*!< ADC Control register,                                       Address offset:0x08 */
-  __IO uint32_t CFGR1;        /*!< ADC Configuration register 1,                               Address offset:0x0C */
-  __IO uint32_t CFGR2;        /*!< ADC Configuration register 2,                               Address offset:0x10 */
-  __IO uint32_t SMPR;         /*!< ADC Sampling time register,                                 Address offset:0x14 */
-  uint32_t   RESERVED1;       /*!< Reserved,                                                                  0x18 */
-  uint32_t   RESERVED2;       /*!< Reserved,                                                                  0x1C */
-  __IO uint32_t TR;           /*!< ADC watchdog threshold register,                            Address offset:0x20 */
-  uint32_t   RESERVED3;       /*!< Reserved,                                                                  0x24 */
-  __IO uint32_t CHSELR;       /*!< ADC channel selection register,                             Address offset:0x28 */
-  uint32_t   RESERVED4[5];    /*!< Reserved,                                                                  0x2C */
-  __IO uint32_t DR;           /*!< ADC data register,                                          Address offset:0x40 */
-  uint32_t   RESERVED5[28];   /*!< Reserved,                                                           0x44 - 0xB0 */
-  __IO uint32_t CALFACT;      /*!< ADC data register,                                          Address offset:0xB4 */
-} ADC_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CCR;
-} ADC_Common_TypeDef;
-
-
-/**
-  * @brief Comparator 
-  */
-
-typedef struct
-{
-  __IO uint32_t CSR;     /*!< COMP comparator control and status register, Address offset: 0x18 */
-} COMP_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CSR;         /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
-} COMP_Common_TypeDef;
-
-
-/**
-* @brief CRC calculation unit
-*/
-
-typedef struct
-{
-__IO uint32_t DR;            /*!< CRC Data register,                            Address offset: 0x00 */
-__IO uint8_t IDR;            /*!< CRC Independent data register,                Address offset: 0x04 */
-uint8_t RESERVED0;           /*!< Reserved,                                                     0x05 */
-uint16_t RESERVED1;          /*!< Reserved,                                                     0x06 */
-__IO uint32_t CR;            /*!< CRC Control register,                         Address offset: 0x08 */
-uint32_t RESERVED2;          /*!< Reserved,                                                     0x0C */
-__IO uint32_t INIT;          /*!< Initial CRC value register,                   Address offset: 0x10 */
-__IO uint32_t POL;           /*!< CRC polynomial register,                      Address offset: 0x14 */
-} CRC_TypeDef;
-
-/**
-  * @brief Clock Recovery System 
-  */
-
-typedef struct 
-{
-__IO uint32_t CR;     /*!< CRS ccontrol register,              Address offset: 0x00 */
-__IO uint32_t CFGR;   /*!< CRS configuration register,         Address offset: 0x04 */
-__IO uint32_t ISR;    /*!< CRS interrupt and status register,  Address offset: 0x08 */
-__IO uint32_t ICR;    /*!< CRS interrupt flag clear register,  Address offset: 0x0C */
-} CRS_TypeDef;
-
-/** 
-  * @brief Digital to Analog Converter
-  */
-
-typedef struct
-{
-  __IO uint32_t CR;            /*!< DAC control register,                                    Address offset: 0x00 */
-  __IO uint32_t SWTRIGR;       /*!< DAC software trigger register,                           Address offset: 0x04 */
-  __IO uint32_t DHR12R1;       /*!< DAC channel1 12-bit right-aligned data holding register, Address offset: 0x08 */
-  __IO uint32_t DHR12L1;       /*!< DAC channel1 12-bit left aligned data holding register,  Address offset: 0x0C */
-  __IO uint32_t DHR8R1;        /*!< DAC channel1 8-bit right aligned data holding register,  Address offset: 0x10 */
-  __IO uint32_t DHR12R2;       /*!< DAC channel2 12-bit right aligned data holding register, Address offset: 0x14 */
-  __IO uint32_t DHR12L2;       /*!< DAC channel2 12-bit left aligned data holding register,  Address offset: 0x18 */
-  __IO uint32_t DHR8R2;        /*!< DAC channel2 8-bit right-aligned data holding register,  Address offset: 0x1C */
-  __IO uint32_t DHR12RD;       /*!< Dual DAC 12-bit right-aligned data holding register,     Address offset: 0x20 */
-  __IO uint32_t DHR12LD;       /*!< DUAL DAC 12-bit left aligned data holding register,      Address offset: 0x24 */
-  __IO uint32_t DHR8RD;        /*!< DUAL DAC 8-bit right aligned data holding register,      Address offset: 0x28 */
-  __IO uint32_t DOR1;          /*!< DAC channel1 data output register,                       Address offset: 0x2C */
-  __IO uint32_t DOR2;          /*!< DAC channel2 data output register,                       Address offset: 0x30 */
-  __IO uint32_t SR;            /*!< DAC status register,                                     Address offset: 0x34 */
-} DAC_TypeDef;
-
-/** 
-  * @brief Debug MCU
-  */
-
-typedef struct
-{
-  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
-  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
-  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
-  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/** 
-  * @brief DMA Controller
-  */
-
-typedef struct
-{
-  __IO uint32_t CCR;          /*!< DMA channel x configuration register */
-  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register */
-  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register */
-  __IO uint32_t CMAR;         /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
-  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
-} DMA_TypeDef;                                                                  
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t CSELR;        /*!< DMA channel selection register,              Address offset: 0xA8 */
-} DMA_Request_TypeDef;                                                          
-                                                                                
-/**                                                                             
-  * @brief External Interrupt/Event Controller                                  
-  */                                                                            
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t IMR;          /*!
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l081xx
-  * @{
-  */
-    
-#ifndef __STM32L081xx_H
-#define __STM32L081xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-  
-
-/** @addtogroup Configuration_section_for_CMSIS
-  * @{
-  */
-/**
-  * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals 
-  */
-#define __CM0PLUS_REV             0 /*!< Core Revision r0p0                            */
-#define __MPU_PRESENT             1 /*!< STM32L0xx  provides an MPU                    */
-#define __VTOR_PRESENT            1 /*!< Vector  Table  Register supported             */
-#define __NVIC_PRIO_BITS          2 /*!< STM32L0xx uses 2 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used  */
-
-/**
-  * @}
-  */
-   
-/** @addtogroup Peripheral_interrupt_number_definition
-  * @{
-  */
-   
-/**
- * @brief stm32l081xx Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
- */
-
-/*!< Interrupt Number Definition */
-typedef enum
-{
-/******  Cortex-M0 Processor Exceptions Numbers ******************************************************/
-  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
-  HardFault_IRQn              = -13,    /*!< 3 Cortex-M0+ Hard Fault Interrupt                       */
-  SVC_IRQn                    = -5,     /*!< 11 Cortex-M0+ SV Call Interrupt                         */
-  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M0+ Pend SV Interrupt                         */
-  SysTick_IRQn                = -1,     /*!< 15 Cortex-M0+ System Tick Interrupt                     */
-
-/******  STM32L-0 specific Interrupt Numbers *********************************************************/
-  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
-  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detect Interrupt                  */
-  RTC_IRQn                    = 2,      /*!< RTC through EXTI Line Interrupt                         */
-  FLASH_IRQn                  = 3,      /*!< FLASH Interrupt                                         */
-  RCC_IRQn                    = 4,      /*!< RCC Interrupt                                           */
-  EXTI0_1_IRQn                = 5,      /*!< EXTI Line 0 and 1 Interrupts                            */
-  EXTI2_3_IRQn                = 6,      /*!< EXTI Line 2 and 3 Interrupts                            */
-  EXTI4_15_IRQn               = 7,      /*!< EXTI Line 4 to 15 Interrupts                            */
-  DMA1_Channel1_IRQn          = 9,      /*!< DMA1 Channel 1 Interrupt                                */
-  DMA1_Channel2_3_IRQn        = 10,     /*!< DMA1 Channel 2 and Channel 3 Interrupts                 */
-  DMA1_Channel4_5_6_7_IRQn    = 11,     /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */
-  ADC1_COMP_IRQn              = 12,     /*!< ADC1, COMP1 and COMP2 Interrupts                        */
-  LPTIM1_IRQn                 = 13,     /*!< LPTIM1 Interrupt                                        */
-  USART4_5_IRQn               = 14,     /*!< USART4 and USART5 Interrupt                             */
-  TIM2_IRQn                   = 15,     /*!< TIM2 Interrupt                                          */
-  TIM3_IRQn                   = 16,     /*!< TIM3 Interrupt                                          */
-  TIM6_IRQn                   = 17,     /*!< TIM6  Interrupt                                         */
-  TIM7_IRQn                   = 18,     /*!< TIM7 Interrupt                                          */
-  TIM21_IRQn                  = 20,     /*!< TIM21 Interrupt                                         */
-  I2C3_IRQn                   = 21,     /*!< I2C3 Interrupt                                          */
-  TIM22_IRQn                  = 22,     /*!< TIM22 Interrupt                                         */
-  I2C1_IRQn                   = 23,     /*!< I2C1 Interrupt                                          */
-  I2C2_IRQn                   = 24,     /*!< I2C2 Interrupt                                          */
-  SPI1_IRQn                   = 25,     /*!< SPI1 Interrupt                                          */
-  SPI2_IRQn                   = 26,     /*!< SPI2 Interrupt                                          */
-  USART1_IRQn                 = 27,     /*!< USART1 Interrupt                                        */
-  USART2_IRQn                 = 28,     /*!< USART2 Interrupt                                        */
-  AES_LPUART1_IRQn            = 29,     /*!< AES and LPUART1 Interrupts                              */
-} IRQn_Type;
-
-/**
-  * @}
-  */
-
-#include "core_cm0plus.h"
-#include "system_stm32l0xx.h"
-#include 
-
-/** @addtogroup Peripheral_registers_structures
-  * @{
-  */   
-
-/** 
-  * @brief Analog to Digital Converter  
-  */
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< ADC Interrupt and Status register,                          Address offset:0x00 */
-  __IO uint32_t IER;          /*!< ADC Interrupt Enable register,                              Address offset:0x04 */
-  __IO uint32_t CR;           /*!< ADC Control register,                                       Address offset:0x08 */
-  __IO uint32_t CFGR1;        /*!< ADC Configuration register 1,                               Address offset:0x0C */
-  __IO uint32_t CFGR2;        /*!< ADC Configuration register 2,                               Address offset:0x10 */
-  __IO uint32_t SMPR;         /*!< ADC Sampling time register,                                 Address offset:0x14 */
-  uint32_t   RESERVED1;       /*!< Reserved,                                                                  0x18 */
-  uint32_t   RESERVED2;       /*!< Reserved,                                                                  0x1C */
-  __IO uint32_t TR;           /*!< ADC watchdog threshold register,                            Address offset:0x20 */
-  uint32_t   RESERVED3;       /*!< Reserved,                                                                  0x24 */
-  __IO uint32_t CHSELR;       /*!< ADC channel selection register,                             Address offset:0x28 */
-  uint32_t   RESERVED4[5];    /*!< Reserved,                                                                  0x2C */
-  __IO uint32_t DR;           /*!< ADC data register,                                          Address offset:0x40 */
-  uint32_t   RESERVED5[28];   /*!< Reserved,                                                           0x44 - 0xB0 */
-  __IO uint32_t CALFACT;      /*!< ADC data register,                                          Address offset:0xB4 */
-} ADC_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CCR;
-} ADC_Common_TypeDef;
-
-/** 
-  * @brief AES hardware accelerator
-  */
-
-typedef struct
-{
-  __IO uint32_t CR;      /*!< AES control register,                        Address offset: 0x00 */
-  __IO uint32_t SR;      /*!< AES status register,                         Address offset: 0x04 */
-  __IO uint32_t DINR;    /*!< AES data input register,                     Address offset: 0x08 */
-  __IO uint32_t DOUTR;   /*!< AES data output register,                    Address offset: 0x0C */
-  __IO uint32_t KEYR0;   /*!< AES key register 0,                          Address offset: 0x10 */
-  __IO uint32_t KEYR1;   /*!< AES key register 1,                          Address offset: 0x14 */
-  __IO uint32_t KEYR2;   /*!< AES key register 2,                          Address offset: 0x18 */
-  __IO uint32_t KEYR3;   /*!< AES key register 3,                          Address offset: 0x1C */
-  __IO uint32_t IVR0;    /*!< AES initialization vector register 0,        Address offset: 0x20 */
-  __IO uint32_t IVR1;    /*!< AES initialization vector register 1,        Address offset: 0x24 */
-  __IO uint32_t IVR2;    /*!< AES initialization vector register 2,        Address offset: 0x28 */
-  __IO uint32_t IVR3;    /*!< AES initialization vector register 3,        Address offset: 0x2C */
-} AES_TypeDef;
-
-/**
-  * @brief Comparator 
-  */
-
-typedef struct
-{
-  __IO uint32_t CSR;     /*!< COMP comparator control and status register, Address offset: 0x18 */
-} COMP_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CSR;         /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
-} COMP_Common_TypeDef;
-
-
-/**
-* @brief CRC calculation unit
-*/
-
-typedef struct
-{
-__IO uint32_t DR;            /*!< CRC Data register,                            Address offset: 0x00 */
-__IO uint8_t IDR;            /*!< CRC Independent data register,                Address offset: 0x04 */
-uint8_t RESERVED0;           /*!< Reserved,                                                     0x05 */
-uint16_t RESERVED1;          /*!< Reserved,                                                     0x06 */
-__IO uint32_t CR;            /*!< CRC Control register,                         Address offset: 0x08 */
-uint32_t RESERVED2;          /*!< Reserved,                                                     0x0C */
-__IO uint32_t INIT;          /*!< Initial CRC value register,                   Address offset: 0x10 */
-__IO uint32_t POL;           /*!< CRC polynomial register,                      Address offset: 0x14 */
-} CRC_TypeDef;
-
-/** 
-  * @brief Debug MCU
-  */
-
-typedef struct
-{
-  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
-  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
-  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
-  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/** 
-  * @brief DMA Controller
-  */
-
-typedef struct
-{
-  __IO uint32_t CCR;          /*!< DMA channel x configuration register */
-  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register */
-  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register */
-  __IO uint32_t CMAR;         /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
-  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
-} DMA_TypeDef;                                                                  
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t CSELR;        /*!< DMA channel selection register,              Address offset: 0xA8 */
-} DMA_Request_TypeDef;                                                          
-                                                                                
-/**                                                                             
-  * @brief External Interrupt/Event Controller                                  
-  */                                                                            
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t IMR;          /*!
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l082xx
-  * @{
-  */
-    
-#ifndef __STM32L082xx_H
-#define __STM32L082xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-  
-
-/** @addtogroup Configuration_section_for_CMSIS
-  * @{
-  */
-/**
-  * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals 
-  */
-#define __CM0PLUS_REV             0 /*!< Core Revision r0p0                            */
-#define __MPU_PRESENT             1 /*!< STM32L0xx  provides an MPU                    */
-#define __VTOR_PRESENT            1 /*!< Vector  Table  Register supported             */
-#define __NVIC_PRIO_BITS          2 /*!< STM32L0xx uses 2 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used  */
-
-/**
-  * @}
-  */
-   
-/** @addtogroup Peripheral_interrupt_number_definition
-  * @{
-  */
-   
-/**
- * @brief stm32l082xx Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
- */
-
-/*!< Interrupt Number Definition */
-typedef enum
-{
-/******  Cortex-M0 Processor Exceptions Numbers ******************************************************/
-  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
-  HardFault_IRQn              = -13,    /*!< 3 Cortex-M0+ Hard Fault Interrupt                       */
-  SVC_IRQn                    = -5,     /*!< 11 Cortex-M0+ SV Call Interrupt                         */
-  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M0+ Pend SV Interrupt                         */
-  SysTick_IRQn                = -1,     /*!< 15 Cortex-M0+ System Tick Interrupt                     */
-
-/******  STM32L-0 specific Interrupt Numbers *********************************************************/
-  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
-  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detect Interrupt                  */
-  RTC_IRQn                    = 2,      /*!< RTC through EXTI Line Interrupt                         */
-  FLASH_IRQn                  = 3,      /*!< FLASH Interrupt                                         */
-  RCC_CRS_IRQn                = 4,      /*!< RCC and CRS Interrupts                                  */
-  EXTI0_1_IRQn                = 5,      /*!< EXTI Line 0 and 1 Interrupts                            */
-  EXTI2_3_IRQn                = 6,      /*!< EXTI Line 2 and 3 Interrupts                            */
-  EXTI4_15_IRQn               = 7,      /*!< EXTI Line 4 to 15 Interrupts                            */
-  TSC_IRQn                    = 8,      /*!< TSC Interrupt                                           */
-  DMA1_Channel1_IRQn          = 9,      /*!< DMA1 Channel 1 Interrupt                                */
-  DMA1_Channel2_3_IRQn        = 10,     /*!< DMA1 Channel 2 and Channel 3 Interrupts                 */
-  DMA1_Channel4_5_6_7_IRQn    = 11,     /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */
-  ADC1_COMP_IRQn              = 12,     /*!< ADC1, COMP1 and COMP2 Interrupts                        */
-  LPTIM1_IRQn                 = 13,     /*!< LPTIM1 Interrupt                                        */
-  USART4_5_IRQn               = 14,     /*!< USART4 and USART5 Interrupt                             */
-  TIM2_IRQn                   = 15,     /*!< TIM2 Interrupt                                          */
-  TIM3_IRQn                   = 16,     /*!< TIM3 Interrupt                                          */
-  TIM6_DAC_IRQn               = 17,     /*!< TIM6 and DAC Interrupts                                 */
-  TIM7_IRQn                   = 18,     /*!< TIM7 Interrupt                                          */
-  TIM21_IRQn                  = 20,     /*!< TIM21 Interrupt                                         */
-  I2C3_IRQn                   = 21,     /*!< I2C3 Interrupt                                          */
-  TIM22_IRQn                  = 22,     /*!< TIM22 Interrupt                                         */
-  I2C1_IRQn                   = 23,     /*!< I2C1 Interrupt                                          */
-  I2C2_IRQn                   = 24,     /*!< I2C2 Interrupt                                          */
-  SPI1_IRQn                   = 25,     /*!< SPI1 Interrupt                                          */
-  SPI2_IRQn                   = 26,     /*!< SPI2 Interrupt                                          */
-  USART1_IRQn                 = 27,     /*!< USART1 Interrupt                                        */
-  USART2_IRQn                 = 28,     /*!< USART2 Interrupt                                        */
-  AES_RNG_LPUART1_IRQn        = 29,     /*!< AES and RNG and LPUART1 Interrupts                      */
-  USB_IRQn                    = 31,     /*!< USB global Interrupt                                    */
-} IRQn_Type;
-
-/**
-  * @}
-  */
-
-#include "core_cm0plus.h"
-#include "system_stm32l0xx.h"
-#include 
-
-/** @addtogroup Peripheral_registers_structures
-  * @{
-  */   
-
-/** 
-  * @brief Analog to Digital Converter  
-  */
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< ADC Interrupt and Status register,                          Address offset:0x00 */
-  __IO uint32_t IER;          /*!< ADC Interrupt Enable register,                              Address offset:0x04 */
-  __IO uint32_t CR;           /*!< ADC Control register,                                       Address offset:0x08 */
-  __IO uint32_t CFGR1;        /*!< ADC Configuration register 1,                               Address offset:0x0C */
-  __IO uint32_t CFGR2;        /*!< ADC Configuration register 2,                               Address offset:0x10 */
-  __IO uint32_t SMPR;         /*!< ADC Sampling time register,                                 Address offset:0x14 */
-  uint32_t   RESERVED1;       /*!< Reserved,                                                                  0x18 */
-  uint32_t   RESERVED2;       /*!< Reserved,                                                                  0x1C */
-  __IO uint32_t TR;           /*!< ADC watchdog threshold register,                            Address offset:0x20 */
-  uint32_t   RESERVED3;       /*!< Reserved,                                                                  0x24 */
-  __IO uint32_t CHSELR;       /*!< ADC channel selection register,                             Address offset:0x28 */
-  uint32_t   RESERVED4[5];    /*!< Reserved,                                                                  0x2C */
-  __IO uint32_t DR;           /*!< ADC data register,                                          Address offset:0x40 */
-  uint32_t   RESERVED5[28];   /*!< Reserved,                                                           0x44 - 0xB0 */
-  __IO uint32_t CALFACT;      /*!< ADC data register,                                          Address offset:0xB4 */
-} ADC_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CCR;
-} ADC_Common_TypeDef;
-
-/** 
-  * @brief AES hardware accelerator
-  */
-
-typedef struct
-{
-  __IO uint32_t CR;      /*!< AES control register,                        Address offset: 0x00 */
-  __IO uint32_t SR;      /*!< AES status register,                         Address offset: 0x04 */
-  __IO uint32_t DINR;    /*!< AES data input register,                     Address offset: 0x08 */
-  __IO uint32_t DOUTR;   /*!< AES data output register,                    Address offset: 0x0C */
-  __IO uint32_t KEYR0;   /*!< AES key register 0,                          Address offset: 0x10 */
-  __IO uint32_t KEYR1;   /*!< AES key register 1,                          Address offset: 0x14 */
-  __IO uint32_t KEYR2;   /*!< AES key register 2,                          Address offset: 0x18 */
-  __IO uint32_t KEYR3;   /*!< AES key register 3,                          Address offset: 0x1C */
-  __IO uint32_t IVR0;    /*!< AES initialization vector register 0,        Address offset: 0x20 */
-  __IO uint32_t IVR1;    /*!< AES initialization vector register 1,        Address offset: 0x24 */
-  __IO uint32_t IVR2;    /*!< AES initialization vector register 2,        Address offset: 0x28 */
-  __IO uint32_t IVR3;    /*!< AES initialization vector register 3,        Address offset: 0x2C */
-} AES_TypeDef;
-
-/**
-  * @brief Comparator 
-  */
-
-typedef struct
-{
-  __IO uint32_t CSR;     /*!< COMP comparator control and status register, Address offset: 0x18 */
-} COMP_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CSR;         /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
-} COMP_Common_TypeDef;
-
-
-/**
-* @brief CRC calculation unit
-*/
-
-typedef struct
-{
-__IO uint32_t DR;            /*!< CRC Data register,                            Address offset: 0x00 */
-__IO uint8_t IDR;            /*!< CRC Independent data register,                Address offset: 0x04 */
-uint8_t RESERVED0;           /*!< Reserved,                                                     0x05 */
-uint16_t RESERVED1;          /*!< Reserved,                                                     0x06 */
-__IO uint32_t CR;            /*!< CRC Control register,                         Address offset: 0x08 */
-uint32_t RESERVED2;          /*!< Reserved,                                                     0x0C */
-__IO uint32_t INIT;          /*!< Initial CRC value register,                   Address offset: 0x10 */
-__IO uint32_t POL;           /*!< CRC polynomial register,                      Address offset: 0x14 */
-} CRC_TypeDef;
-
-/**
-  * @brief Clock Recovery System 
-  */
-
-typedef struct 
-{
-__IO uint32_t CR;     /*!< CRS ccontrol register,              Address offset: 0x00 */
-__IO uint32_t CFGR;   /*!< CRS configuration register,         Address offset: 0x04 */
-__IO uint32_t ISR;    /*!< CRS interrupt and status register,  Address offset: 0x08 */
-__IO uint32_t ICR;    /*!< CRS interrupt flag clear register,  Address offset: 0x0C */
-} CRS_TypeDef;
-
-/** 
-  * @brief Digital to Analog Converter
-  */
-
-typedef struct
-{
-  __IO uint32_t CR;            /*!< DAC control register,                                    Address offset: 0x00 */
-  __IO uint32_t SWTRIGR;       /*!< DAC software trigger register,                           Address offset: 0x04 */
-  __IO uint32_t DHR12R1;       /*!< DAC channel1 12-bit right-aligned data holding register, Address offset: 0x08 */
-  __IO uint32_t DHR12L1;       /*!< DAC channel1 12-bit left aligned data holding register,  Address offset: 0x0C */
-  __IO uint32_t DHR8R1;        /*!< DAC channel1 8-bit right aligned data holding register,  Address offset: 0x10 */
-  __IO uint32_t DHR12R2;       /*!< DAC channel2 12-bit right aligned data holding register, Address offset: 0x14 */
-  __IO uint32_t DHR12L2;       /*!< DAC channel2 12-bit left aligned data holding register,  Address offset: 0x18 */
-  __IO uint32_t DHR8R2;        /*!< DAC channel2 8-bit right-aligned data holding register,  Address offset: 0x1C */
-  __IO uint32_t DHR12RD;       /*!< Dual DAC 12-bit right-aligned data holding register,     Address offset: 0x20 */
-  __IO uint32_t DHR12LD;       /*!< DUAL DAC 12-bit left aligned data holding register,      Address offset: 0x24 */
-  __IO uint32_t DHR8RD;        /*!< DUAL DAC 8-bit right aligned data holding register,      Address offset: 0x28 */
-  __IO uint32_t DOR1;          /*!< DAC channel1 data output register,                       Address offset: 0x2C */
-  __IO uint32_t DOR2;          /*!< DAC channel2 data output register,                       Address offset: 0x30 */
-  __IO uint32_t SR;            /*!< DAC status register,                                     Address offset: 0x34 */
-} DAC_TypeDef;
-
-/** 
-  * @brief Debug MCU
-  */
-
-typedef struct
-{
-  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
-  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
-  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
-  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/** 
-  * @brief DMA Controller
-  */
-
-typedef struct
-{
-  __IO uint32_t CCR;          /*!< DMA channel x configuration register */
-  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register */
-  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register */
-  __IO uint32_t CMAR;         /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
-  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
-} DMA_TypeDef;                                                                  
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t CSELR;        /*!< DMA channel selection register,              Address offset: 0xA8 */
-} DMA_Request_TypeDef;                                                          
-                                                                                
-/**                                                                             
-  * @brief External Interrupt/Event Controller                                  
-  */                                                                            
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t IMR;          /*!
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l083xx
-  * @{
-  */
-    
-#ifndef __STM32L083xx_H
-#define __STM32L083xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-  
-
-/** @addtogroup Configuration_section_for_CMSIS
-  * @{
-  */
-/**
-  * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals 
-  */
-#define __CM0PLUS_REV             0 /*!< Core Revision r0p0                            */
-#define __MPU_PRESENT             1 /*!< STM32L0xx  provides an MPU                    */
-#define __VTOR_PRESENT            1 /*!< Vector  Table  Register supported             */
-#define __NVIC_PRIO_BITS          2 /*!< STM32L0xx uses 2 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used  */
-
-/**
-  * @}
-  */
-   
-/** @addtogroup Peripheral_interrupt_number_definition
-  * @{
-  */
-   
-/**
- * @brief stm32l083xx Interrupt Number Definition, according to the selected device 
- *        in @ref Library_configuration_section 
- */
-
-/*!< Interrupt Number Definition */
-typedef enum
-{
-/******  Cortex-M0 Processor Exceptions Numbers ******************************************************/
-  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
-  HardFault_IRQn              = -13,    /*!< 3 Cortex-M0+ Hard Fault Interrupt                       */
-  SVC_IRQn                    = -5,     /*!< 11 Cortex-M0+ SV Call Interrupt                         */
-  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M0+ Pend SV Interrupt                         */
-  SysTick_IRQn                = -1,     /*!< 15 Cortex-M0+ System Tick Interrupt                     */
-
-/******  STM32L-0 specific Interrupt Numbers *********************************************************/
-  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
-  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detect Interrupt                  */
-  RTC_IRQn                    = 2,      /*!< RTC through EXTI Line Interrupt                         */
-  FLASH_IRQn                  = 3,      /*!< FLASH Interrupt                                         */
-  RCC_CRS_IRQn                = 4,      /*!< RCC and CRS Interrupts                                  */
-  EXTI0_1_IRQn                = 5,      /*!< EXTI Line 0 and 1 Interrupts                            */
-  EXTI2_3_IRQn                = 6,      /*!< EXTI Line 2 and 3 Interrupts                            */
-  EXTI4_15_IRQn               = 7,      /*!< EXTI Line 4 to 15 Interrupts                            */
-  TSC_IRQn                    = 8,      /*!< TSC Interrupt                                           */
-  DMA1_Channel1_IRQn          = 9,      /*!< DMA1 Channel 1 Interrupt                                */
-  DMA1_Channel2_3_IRQn        = 10,     /*!< DMA1 Channel 2 and Channel 3 Interrupts                 */
-  DMA1_Channel4_5_6_7_IRQn    = 11,     /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */
-  ADC1_COMP_IRQn              = 12,     /*!< ADC1, COMP1 and COMP2 Interrupts                        */
-  LPTIM1_IRQn                 = 13,     /*!< LPTIM1 Interrupt                                        */
-  USART4_5_IRQn               = 14,     /*!< USART4 and USART5 Interrupt                             */
-  TIM2_IRQn                   = 15,     /*!< TIM2 Interrupt                                          */
-  TIM3_IRQn                   = 16,     /*!< TIM3 Interrupt                                          */
-  TIM6_DAC_IRQn               = 17,     /*!< TIM6 and DAC Interrupts                                 */
-  TIM7_IRQn                   = 18,     /*!< TIM7 Interrupt                                          */
-  TIM21_IRQn                  = 20,     /*!< TIM21 Interrupt                                         */
-  I2C3_IRQn                   = 21,     /*!< I2C3 Interrupt                                          */
-  TIM22_IRQn                  = 22,     /*!< TIM22 Interrupt                                         */
-  I2C1_IRQn                   = 23,     /*!< I2C1 Interrupt                                          */
-  I2C2_IRQn                   = 24,     /*!< I2C2 Interrupt                                          */
-  SPI1_IRQn                   = 25,     /*!< SPI1 Interrupt                                          */
-  SPI2_IRQn                   = 26,     /*!< SPI2 Interrupt                                          */
-  USART1_IRQn                 = 27,     /*!< USART1 Interrupt                                        */
-  USART2_IRQn                 = 28,     /*!< USART2 Interrupt                                        */
-  AES_RNG_LPUART1_IRQn        = 29,     /*!< AES and RNG and LPUART1 Interrupts                      */
-  LCD_IRQn                    = 30,     /*!< LCD Interrupt                                           */
-  USB_IRQn                    = 31,     /*!< USB global Interrupt                                    */
-} IRQn_Type;
-
-/**
-  * @}
-  */
-
-#include "core_cm0plus.h"
-#include "system_stm32l0xx.h"
-#include 
-
-/** @addtogroup Peripheral_registers_structures
-  * @{
-  */   
-
-/** 
-  * @brief Analog to Digital Converter  
-  */
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< ADC Interrupt and Status register,                          Address offset:0x00 */
-  __IO uint32_t IER;          /*!< ADC Interrupt Enable register,                              Address offset:0x04 */
-  __IO uint32_t CR;           /*!< ADC Control register,                                       Address offset:0x08 */
-  __IO uint32_t CFGR1;        /*!< ADC Configuration register 1,                               Address offset:0x0C */
-  __IO uint32_t CFGR2;        /*!< ADC Configuration register 2,                               Address offset:0x10 */
-  __IO uint32_t SMPR;         /*!< ADC Sampling time register,                                 Address offset:0x14 */
-  uint32_t   RESERVED1;       /*!< Reserved,                                                                  0x18 */
-  uint32_t   RESERVED2;       /*!< Reserved,                                                                  0x1C */
-  __IO uint32_t TR;           /*!< ADC watchdog threshold register,                            Address offset:0x20 */
-  uint32_t   RESERVED3;       /*!< Reserved,                                                                  0x24 */
-  __IO uint32_t CHSELR;       /*!< ADC channel selection register,                             Address offset:0x28 */
-  uint32_t   RESERVED4[5];    /*!< Reserved,                                                                  0x2C */
-  __IO uint32_t DR;           /*!< ADC data register,                                          Address offset:0x40 */
-  uint32_t   RESERVED5[28];   /*!< Reserved,                                                           0x44 - 0xB0 */
-  __IO uint32_t CALFACT;      /*!< ADC data register,                                          Address offset:0xB4 */
-} ADC_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CCR;
-} ADC_Common_TypeDef;
-
-/** 
-  * @brief AES hardware accelerator
-  */
-
-typedef struct
-{
-  __IO uint32_t CR;      /*!< AES control register,                        Address offset: 0x00 */
-  __IO uint32_t SR;      /*!< AES status register,                         Address offset: 0x04 */
-  __IO uint32_t DINR;    /*!< AES data input register,                     Address offset: 0x08 */
-  __IO uint32_t DOUTR;   /*!< AES data output register,                    Address offset: 0x0C */
-  __IO uint32_t KEYR0;   /*!< AES key register 0,                          Address offset: 0x10 */
-  __IO uint32_t KEYR1;   /*!< AES key register 1,                          Address offset: 0x14 */
-  __IO uint32_t KEYR2;   /*!< AES key register 2,                          Address offset: 0x18 */
-  __IO uint32_t KEYR3;   /*!< AES key register 3,                          Address offset: 0x1C */
-  __IO uint32_t IVR0;    /*!< AES initialization vector register 0,        Address offset: 0x20 */
-  __IO uint32_t IVR1;    /*!< AES initialization vector register 1,        Address offset: 0x24 */
-  __IO uint32_t IVR2;    /*!< AES initialization vector register 2,        Address offset: 0x28 */
-  __IO uint32_t IVR3;    /*!< AES initialization vector register 3,        Address offset: 0x2C */
-} AES_TypeDef;
-
-/**
-  * @brief Comparator 
-  */
-
-typedef struct
-{
-  __IO uint32_t CSR;     /*!< COMP comparator control and status register, Address offset: 0x18 */
-} COMP_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t CSR;         /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
-} COMP_Common_TypeDef;
-
-
-/**
-* @brief CRC calculation unit
-*/
-
-typedef struct
-{
-__IO uint32_t DR;            /*!< CRC Data register,                            Address offset: 0x00 */
-__IO uint8_t IDR;            /*!< CRC Independent data register,                Address offset: 0x04 */
-uint8_t RESERVED0;           /*!< Reserved,                                                     0x05 */
-uint16_t RESERVED1;          /*!< Reserved,                                                     0x06 */
-__IO uint32_t CR;            /*!< CRC Control register,                         Address offset: 0x08 */
-uint32_t RESERVED2;          /*!< Reserved,                                                     0x0C */
-__IO uint32_t INIT;          /*!< Initial CRC value register,                   Address offset: 0x10 */
-__IO uint32_t POL;           /*!< CRC polynomial register,                      Address offset: 0x14 */
-} CRC_TypeDef;
-
-/**
-  * @brief Clock Recovery System 
-  */
-
-typedef struct 
-{
-__IO uint32_t CR;     /*!< CRS ccontrol register,              Address offset: 0x00 */
-__IO uint32_t CFGR;   /*!< CRS configuration register,         Address offset: 0x04 */
-__IO uint32_t ISR;    /*!< CRS interrupt and status register,  Address offset: 0x08 */
-__IO uint32_t ICR;    /*!< CRS interrupt flag clear register,  Address offset: 0x0C */
-} CRS_TypeDef;
-
-/** 
-  * @brief Digital to Analog Converter
-  */
-
-typedef struct
-{
-  __IO uint32_t CR;            /*!< DAC control register,                                    Address offset: 0x00 */
-  __IO uint32_t SWTRIGR;       /*!< DAC software trigger register,                           Address offset: 0x04 */
-  __IO uint32_t DHR12R1;       /*!< DAC channel1 12-bit right-aligned data holding register, Address offset: 0x08 */
-  __IO uint32_t DHR12L1;       /*!< DAC channel1 12-bit left aligned data holding register,  Address offset: 0x0C */
-  __IO uint32_t DHR8R1;        /*!< DAC channel1 8-bit right aligned data holding register,  Address offset: 0x10 */
-  __IO uint32_t DHR12R2;       /*!< DAC channel2 12-bit right aligned data holding register, Address offset: 0x14 */
-  __IO uint32_t DHR12L2;       /*!< DAC channel2 12-bit left aligned data holding register,  Address offset: 0x18 */
-  __IO uint32_t DHR8R2;        /*!< DAC channel2 8-bit right-aligned data holding register,  Address offset: 0x1C */
-  __IO uint32_t DHR12RD;       /*!< Dual DAC 12-bit right-aligned data holding register,     Address offset: 0x20 */
-  __IO uint32_t DHR12LD;       /*!< DUAL DAC 12-bit left aligned data holding register,      Address offset: 0x24 */
-  __IO uint32_t DHR8RD;        /*!< DUAL DAC 8-bit right aligned data holding register,      Address offset: 0x28 */
-  __IO uint32_t DOR1;          /*!< DAC channel1 data output register,                       Address offset: 0x2C */
-  __IO uint32_t DOR2;          /*!< DAC channel2 data output register,                       Address offset: 0x30 */
-  __IO uint32_t SR;            /*!< DAC status register,                                     Address offset: 0x34 */
-} DAC_TypeDef;
-
-/** 
-  * @brief Debug MCU
-  */
-
-typedef struct
-{
-  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
-  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
-  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
-  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-/** 
-  * @brief DMA Controller
-  */
-
-typedef struct
-{
-  __IO uint32_t CCR;          /*!< DMA channel x configuration register */
-  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register */
-  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register */
-  __IO uint32_t CMAR;         /*!< DMA channel x memory address register */
-} DMA_Channel_TypeDef;
-
-typedef struct
-{
-  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
-  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
-} DMA_TypeDef;                                                                  
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t CSELR;        /*!< DMA channel selection register,              Address offset: 0xA8 */
-} DMA_Request_TypeDef;                                                          
-                                                                                
-/**                                                                             
-  * @brief External Interrupt/Event Controller                                  
-  */                                                                            
-                                                                                
-typedef struct                                                                  
-{                                                                               
-  __IO uint32_t IMR;          /*!
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */ 
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l0xx
-  * @{
-  */
-    
-#ifndef __STM32L0xx_H
-#define __STM32L0xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif /* __cplusplus */
-   
-/** @addtogroup Library_configuration_section
-  * @{
-  */
-
-/**
-  * @brief STM32 Family
-  */
-#if !defined (STM32L0)
-#define STM32L0
-#endif /* STM32L0 */
-
-/* Uncomment the line below according to the target STM32 device used in your
-   application 
-  */
-
-#if !defined (STM32L011xx) && !defined (STM32L021xx) && \
-    !defined (STM32L031xx) && !defined (STM32L041xx) && \
-    !defined (STM32L051xx) && !defined (STM32L052xx) && !defined (STM32L053xx) && \
-    !defined (STM32L061xx) && !defined (STM32L062xx) && !defined (STM32L063xx) && \
-    !defined (STM32L071xx) && !defined (STM32L072xx) && !defined (STM32L073xx) && \
-    !defined (STM32L081xx) && !defined (STM32L082xx) && !defined (STM32L083xx) \
-  /* #define STM32L011xx */
-  /* #define STM32L021xx */
-  /* #define STM32L031xx */   /*!< STM32L031C6, STM32L031E6, STM32L031F6, STM32L031G6, STM32L031K6 Devices */
-  /* #define STM32L041xx */   /*!< STM32L041C6, STM32L041E6, STM32L041F6, STM32L041G6, STM32L041K6 Devices */
-  /* #define STM32L051xx */   /*!< STM32L051K8, STM32L051C6, STM32L051C8, STM32L051R6, STM32L051R8 Devices */
-  /* #define STM32L052xx */   /*!< STM32L052K6, STM32L052K8, STM32L052C6, STM32L052C8, STM32L052R6, STM32L052R8 Devices */
-  /* #define STM32L053xx */   /*!< STM32L053C6, STM32L053C8, STM32L053R6, STM32L053R8 Devices */
-  /* #define STM32L061xx */   /*!< */
-  /* #define STM32L062xx */   /*!< STM32L062K8 */
-  /* #define STM32L063xx */   /*!< STM32L063C8, STM32L063R8 */ 
-  /* #define STM32L071xx */   /*!< */
-  /* #define STM32L072xx */   /*!< */
-  /* #define STM32L073xx */   /*!< STM32L073V8, STM32L073VB, STM32L073RB, STM32L073VZ, STM32L073RZ Devices */
-  /* #define STM32L081xx */   /*!< */
-  /* #define STM32L082xx */   /*!< */
-  /* #define STM32L083xx */   /*!< */ 
-#endif
-   
-/*  Tip: To avoid modifying this file each time you need to switch between these
-        devices, you can define the device in your toolchain compiler preprocessor.
-  */
-#if !defined  (USE_HAL_DRIVER)
-/**
- * @brief Comment the line below if you will not use the peripherals drivers.
-   In this case, these drivers will not be included and the application code will 
-   be based on direct access to peripherals registers 
-   */
-  /*#define USE_HAL_DRIVER */
-#endif /* USE_HAL_DRIVER */
-
-/**
-  * @brief CMSIS Device version number V1.7.1
-  */
-#define __STM32L0xx_CMSIS_VERSION_MAIN   (0x01) /*!< [31:24] main version */
-#define __STM32L0xx_CMSIS_VERSION_SUB1   (0x07) /*!< [23:16] sub1 version */
-#define __STM32L0xx_CMSIS_VERSION_SUB2   (0x02) /*!< [15:8]  sub2 version */
-#define __STM32L0xx_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */
-#define __STM32L0xx_CMSIS_VERSION        ((__STM32L0xx_CMSIS_VERSION_MAIN     << 24)\
-                                         |(__STM32L0xx_CMSIS_VERSION_SUB1 << 16)\
-                                         |(__STM32L0xx_CMSIS_VERSION_SUB2 << 8 )\
-                                         |(__STM32L0xx_CMSIS_VERSION_RC))
-                                             
-/**
-  * @}
-  */
-
-/** @addtogroup Device_Included
-  * @{
-  */
-#if defined(STM32L011xx)
-  #include "stm32l011xx.h"
-#elif defined(STM32L021xx)
-  #include "stm32l021xx.h"
-#elif defined(STM32L031xx)
-  #include "stm32l031xx.h"
-#elif defined(STM32L041xx)
-  #include "stm32l041xx.h"
-#elif defined(STM32L051xx)
-  #include "stm32l051xx.h"
-#elif defined(STM32L052xx)
-  #include "stm32l052xx.h"
-#elif defined(STM32L053xx)
-  #include "stm32l053xx.h"
-#elif defined(STM32L062xx)
-  #include "stm32l062xx.h"
-#elif defined(STM32L063xx)
-  #include "stm32l063xx.h"
-#elif defined(STM32L061xx)
-  #include "stm32l061xx.h"
-#elif defined(STM32L071xx)
-  #include "stm32l071xx.h"
-#elif defined(STM32L072xx)
-  #include "stm32l072xx.h"
-#elif defined(STM32L073xx)
-  #include "stm32l073xx.h"
-#elif defined(STM32L082xx)
-  #include "stm32l082xx.h"
-#elif defined(STM32L083xx)
-  #include "stm32l083xx.h"
-#elif defined(STM32L081xx)
-  #include "stm32l081xx.h"
-#else
- #error "Please select first the target STM32L0xx device used in your application (in stm32l0xx.h file)"
-#endif
-
-/**
-  * @}
-  */
-
-/** @addtogroup Exported_types
-  * @{
-  */ 
-typedef enum 
-{
-  RESET = 0, 
-  SET = !RESET
-} FlagStatus, ITStatus;
-
-typedef enum 
-{
-  DISABLE = 0, 
-  ENABLE = !DISABLE
-} FunctionalState;
-#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
-
-typedef enum 
-{
-  ERROR = 0, 
-  SUCCESS = !ERROR
-} ErrorStatus;
-
-/**
-  * @}
-  */
-
-
-/** @addtogroup Exported_macro
-  * @{
-  */
-#define SET_BIT(REG, BIT)     ((REG) |= (BIT))
-
-#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
-
-#define READ_BIT(REG, BIT)    ((REG) & (BIT))
-
-#define CLEAR_REG(REG)        ((REG) = (0x0))
-
-#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
-
-#define READ_REG(REG)         ((REG))
-
-#define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
-
-/**
-  * @}
-  */
-
-#if defined (USE_HAL_DRIVER)
- #include "stm32l0xx_hal.h"
-#endif /* USE_HAL_DRIVER */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* __STM32L0xx_H */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h b/Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h
deleted file mode 100755
index b72e508e..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    system_stm32l0xx.h
-  * @author  MCD Application Team
-  * @brief   CMSIS Cortex-M0+ Device Peripheral Access Layer System Header File.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l0xx_system
-  * @{
-  */  
-  
-/**
-  * @brief Define to prevent recursive inclusion
-  */
-#ifndef __SYSTEM_STM32L0XX_H
-#define __SYSTEM_STM32L0XX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-
-/** @addtogroup STM32L0xx_System_Includes
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-
-/** @addtogroup STM32L0xx_System_Exported_types
-  * @{
-  */
-  /* This variable is updated in three ways:
-      1) by calling CMSIS function SystemCoreClockUpdate()
-      2) by calling HAL API function HAL_RCC_GetSysClockFreq()
-      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 
-         Note: If you use this function to configure the system clock; then there
-               is no need to call the 2 first functions listed above, since SystemCoreClock
-               variable is updated automatically.
-  */
-extern uint32_t SystemCoreClock;          /*!< System Clock Frequency (Core Clock) */
-/*
-*/
-extern const uint8_t AHBPrescTable[16];   /*!< AHB prescalers table values */
-extern const uint8_t APBPrescTable[8];    /*!< APB prescalers table values */
-extern const uint8_t PLLMulTable[9];      /*!< PLL multipiers table values */
-
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L0xx_System_Exported_Constants
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L0xx_System_Exported_Macros
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L0xx_System_Exported_Functions
-  * @{
-  */
-  
-extern void SystemInit(void);
-extern void SystemCoreClockUpdate(void);
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__SYSTEM_STM32L0XX_H */
-
-/**
-  * @}
-  */
-  
-/**
-  * @}
-  */  
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l011xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l011xx.s
deleted file mode 100755
index c44e0ff5..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l011xx.s
+++ /dev/null
@@ -1,270 +0,0 @@
-;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l011xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32l011xx Devices vector table for MDK-ARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-;  Stack Configuration
-;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Stack_Size      EQU     0x400;
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-;  Heap Configuration
-;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Heap_Size      EQU     0x200;
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_IRQHandler                 ; RCC
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     0                              ; Reserved
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     0                              ; Reserved
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     LPUART1_IRQHandler             ; LPUART1
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-   
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler                 [WEAK]
-        IMPORT  __main
-        IMPORT  SystemInit
-
-        LDR     R0, =__initial_sp          ; set stack pointer
-        MSR     MSP, R0
-
-;;Check if boot space corresponds to system memory
-
-        LDR R0,=0x00000004
-        LDR R1, [R0]
-        LSRS R1, R1, #24
-        LDR R2,=0x1F
-        CMP R1, R2
-
-        BNE ApplicationStart
-
-;; SYSCFG clock enable
-
-        LDR R0,=0x40021034
-        LDR R1,=0x00000001
-        STR R1, [R0]
-
-;; Set CFGR1 register with flash memory remap at address 0
-
-        LDR R0,=0x40010000
-        LDR R1,=0x00000000
-        STR R1, [R0]
-
-ApplicationStart
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                    [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler              [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                    [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                 [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                [WEAK]
-                EXPORT  PVD_IRQHandler                 [WEAK]
-                EXPORT  RTC_IRQHandler                 [WEAK]
-                EXPORT  FLASH_IRQHandler               [WEAK]
-                EXPORT  RCC_IRQHandler                 [WEAK]
-                EXPORT  EXTI0_1_IRQHandler             [WEAK]
-                EXPORT  EXTI2_3_IRQHandler             [WEAK]
-                EXPORT  EXTI4_15_IRQHandler            [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
-                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
-                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
-                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
-                EXPORT  LPTIM1_IRQHandler              [WEAK]
-                EXPORT  TIM2_IRQHandler                [WEAK]
-                EXPORT  TIM21_IRQHandler               [WEAK]
-                EXPORT  I2C1_IRQHandler                [WEAK]
-                EXPORT  SPI1_IRQHandler                [WEAK]
-                EXPORT  USART2_IRQHandler              [WEAK]
-                EXPORT  LPUART1_IRQHandler             [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_1_IRQHandler
-EXTI2_3_IRQHandler
-EXTI4_15_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_3_IRQHandler
-DMA1_Channel4_5_6_7_IRQHandler
-ADC1_COMP_IRQHandler 
-LPTIM1_IRQHandler
-TIM2_IRQHandler
-TIM21_IRQHandler
-I2C1_IRQHandler
-SPI1_IRQHandler
-USART2_IRQHandler
-LPUART1_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l021xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l021xx.s
deleted file mode 100755
index 937c3cf5..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l021xx.s
+++ /dev/null
@@ -1,270 +0,0 @@
-;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l021xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32l021xx Devices vector table for MDK-ARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-;  Stack Configuration
-;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Stack_Size      EQU     0x400;
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-;  Heap Configuration
-;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Heap_Size       EQU     0x200;
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_IRQHandler                 ; RCC
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     0                              ; Reserved
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     0                              ; Reserved
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     AES_LPUART1_IRQHandler         ; LPUART1
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-   
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler                 [WEAK]
-        IMPORT  __main
-        IMPORT  SystemInit
-
-        LDR     R0, =__initial_sp          ; set stack pointer
-        MSR     MSP, R0
-
-;;Check if boot space corresponds to system memory
-
-        LDR R0,=0x00000004
-        LDR R1, [R0]
-        LSRS R1, R1, #24
-        LDR R2,=0x1F
-        CMP R1, R2
-
-        BNE ApplicationStart
-
-;; SYSCFG clock enable
-
-        LDR R0,=0x40021034
-        LDR R1,=0x00000001
-        STR R1, [R0]
-
-;; Set CFGR1 register with flash memory remap at address 0
-
-        LDR R0,=0x40010000
-        LDR R1,=0x00000000
-        STR R1, [R0]
-
-ApplicationStart
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                    [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler              [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                    [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                 [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                [WEAK]
-                EXPORT  PVD_IRQHandler                 [WEAK]
-                EXPORT  RTC_IRQHandler                 [WEAK]
-                EXPORT  FLASH_IRQHandler               [WEAK]
-                EXPORT  RCC_IRQHandler                 [WEAK]
-                EXPORT  EXTI0_1_IRQHandler             [WEAK]
-                EXPORT  EXTI2_3_IRQHandler             [WEAK]
-                EXPORT  EXTI4_15_IRQHandler            [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
-                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
-                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
-                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
-                EXPORT  LPTIM1_IRQHandler              [WEAK]
-                EXPORT  TIM2_IRQHandler                [WEAK]
-                EXPORT  TIM21_IRQHandler               [WEAK]
-                EXPORT  I2C1_IRQHandler                [WEAK]
-                EXPORT  SPI1_IRQHandler                [WEAK]
-                EXPORT  USART2_IRQHandler              [WEAK]
-                EXPORT  AES_LPUART1_IRQHandler         [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_1_IRQHandler
-EXTI2_3_IRQHandler
-EXTI4_15_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_3_IRQHandler
-DMA1_Channel4_5_6_7_IRQHandler
-ADC1_COMP_IRQHandler 
-LPTIM1_IRQHandler
-TIM2_IRQHandler
-TIM21_IRQHandler
-I2C1_IRQHandler
-SPI1_IRQHandler
-USART2_IRQHandler
-AES_LPUART1_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l031xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l031xx.s
deleted file mode 100755
index f83316ef..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l031xx.s
+++ /dev/null
@@ -1,245 +0,0 @@
-;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l031xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32l031xx Devices vector table for MDK-ARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-;  Stack Configuration
-;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Stack_Size      EQU     0x400;
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-;  Heap Configuration
-;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Heap_Size      EQU     0x200;
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_IRQHandler                 ; RCC
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     0                              ; Reserved
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     0                              ; Reserved
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     0                              ; Reserved
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     LPUART1_IRQHandler             ; LPUART1
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-   
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler                 [WEAK]
-        IMPORT  __main
-        IMPORT  SystemInit  
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                    [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler              [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                    [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                 [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                [WEAK]
-                EXPORT  PVD_IRQHandler                 [WEAK]
-                EXPORT  RTC_IRQHandler                 [WEAK]
-                EXPORT  FLASH_IRQHandler               [WEAK]
-                EXPORT  RCC_IRQHandler                 [WEAK]
-                EXPORT  EXTI0_1_IRQHandler             [WEAK]
-                EXPORT  EXTI2_3_IRQHandler             [WEAK]
-                EXPORT  EXTI4_15_IRQHandler            [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
-                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
-                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
-                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
-                EXPORT  LPTIM1_IRQHandler              [WEAK]
-                EXPORT  TIM2_IRQHandler                [WEAK]
-                EXPORT  TIM21_IRQHandler               [WEAK]
-                EXPORT  TIM22_IRQHandler               [WEAK]
-                EXPORT  I2C1_IRQHandler                [WEAK]
-                EXPORT  SPI1_IRQHandler                [WEAK]
-                EXPORT  USART2_IRQHandler              [WEAK]
-                EXPORT  LPUART1_IRQHandler             [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_1_IRQHandler
-EXTI2_3_IRQHandler
-EXTI4_15_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_3_IRQHandler
-DMA1_Channel4_5_6_7_IRQHandler
-ADC1_COMP_IRQHandler 
-LPTIM1_IRQHandler
-TIM2_IRQHandler
-TIM21_IRQHandler
-TIM22_IRQHandler
-I2C1_IRQHandler
-SPI1_IRQHandler
-USART2_IRQHandler
-LPUART1_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l041xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l041xx.s
deleted file mode 100755
index 9a51dcd7..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l041xx.s
+++ /dev/null
@@ -1,245 +0,0 @@
-;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l041xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32l041xx Devices vector table for MDK-ARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-;  Stack Configuration
-;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Stack_Size      EQU     0x400;
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-;  Heap Configuration
-;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Heap_Size       EQU     0x200;
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_IRQHandler                 ; RCC
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     0                              ; Reserved
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     0                              ; Reserved
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     0                              ; Reserved
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     AES_LPUART1_IRQHandler         ; LPUART1
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-   
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler                 [WEAK]
-        IMPORT  __main
-        IMPORT  SystemInit  
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                    [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler              [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                    [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                 [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                [WEAK]
-                EXPORT  PVD_IRQHandler                 [WEAK]
-                EXPORT  RTC_IRQHandler                 [WEAK]
-                EXPORT  FLASH_IRQHandler               [WEAK]
-                EXPORT  RCC_IRQHandler                 [WEAK]
-                EXPORT  EXTI0_1_IRQHandler             [WEAK]
-                EXPORT  EXTI2_3_IRQHandler             [WEAK]
-                EXPORT  EXTI4_15_IRQHandler            [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
-                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
-                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
-                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
-                EXPORT  LPTIM1_IRQHandler              [WEAK]
-                EXPORT  TIM2_IRQHandler                [WEAK]
-                EXPORT  TIM21_IRQHandler               [WEAK]
-                EXPORT  TIM22_IRQHandler               [WEAK]
-                EXPORT  I2C1_IRQHandler                [WEAK]
-                EXPORT  SPI1_IRQHandler                [WEAK]
-                EXPORT  USART2_IRQHandler              [WEAK]
-                EXPORT  AES_LPUART1_IRQHandler         [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_1_IRQHandler
-EXTI2_3_IRQHandler
-EXTI4_15_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_3_IRQHandler
-DMA1_Channel4_5_6_7_IRQHandler
-ADC1_COMP_IRQHandler 
-LPTIM1_IRQHandler
-TIM2_IRQHandler
-TIM21_IRQHandler
-TIM22_IRQHandler
-I2C1_IRQHandler
-SPI1_IRQHandler
-USART2_IRQHandler
-AES_LPUART1_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l051xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l051xx.s
deleted file mode 100755
index c6690bb5..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l051xx.s
+++ /dev/null
@@ -1,255 +0,0 @@
-;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l051xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32l051xx Devices vector table for MDK-ARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-;  Stack Configuration
-;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-;  Heap Configuration
-;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_IRQHandler                 ; RCC
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     0                              ; Reserved
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     TIM6_IRQHandler                ; TIM6
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     0                              ; Reserved
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     LPUART1_IRQHandler             ; LPUART1
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler                 [WEAK]
-        IMPORT  __main
-        IMPORT  SystemInit  
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                    [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler              [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                    [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                 [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                [WEAK]
-                EXPORT  PVD_IRQHandler                 [WEAK]
-                EXPORT  RTC_IRQHandler                 [WEAK]
-                EXPORT  FLASH_IRQHandler               [WEAK]
-                EXPORT  RCC_IRQHandler             [WEAK]
-                EXPORT  EXTI0_1_IRQHandler             [WEAK]
-                EXPORT  EXTI2_3_IRQHandler             [WEAK]
-                EXPORT  EXTI4_15_IRQHandler            [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
-                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
-                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
-                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
-                EXPORT  LPTIM1_IRQHandler              [WEAK]
-                EXPORT  TIM2_IRQHandler                [WEAK]
-                EXPORT  TIM6_IRQHandler                [WEAK]
-                EXPORT  TIM21_IRQHandler               [WEAK]
-                EXPORT  TIM22_IRQHandler               [WEAK]
-                EXPORT  I2C1_IRQHandler                [WEAK]
-                EXPORT  I2C2_IRQHandler                [WEAK]
-                EXPORT  SPI1_IRQHandler                [WEAK]
-                EXPORT  SPI2_IRQHandler                [WEAK]
-                EXPORT  USART1_IRQHandler              [WEAK]
-                EXPORT  USART2_IRQHandler              [WEAK]
-                EXPORT  LPUART1_IRQHandler             [WEAK]
-
-
-
-WWDG_IRQHandler
-PVD_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_1_IRQHandler
-EXTI2_3_IRQHandler
-EXTI4_15_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_3_IRQHandler
-DMA1_Channel4_5_6_7_IRQHandler
-ADC1_COMP_IRQHandler 
-LPTIM1_IRQHandler
-TIM2_IRQHandler
-TIM6_IRQHandler
-TIM21_IRQHandler
-TIM22_IRQHandler
-I2C1_IRQHandler
-I2C2_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-LPUART1_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l052xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l052xx.s
deleted file mode 100755
index 80d8e7ac..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l052xx.s
+++ /dev/null
@@ -1,258 +0,0 @@
-;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l052xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32l052xx Devices vector table for MDK-ARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-;  Stack Configuration
-;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-;  Heap Configuration
-;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_CRS_IRQHandler             ; RCC and CRS
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     TSC_IRQHandler                 ; TSC
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     0                              ; Reserved
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     RNG_LPUART1_IRQHandler         ; RNG and LPUART1
-                DCD     0                              ; Reserved
-                DCD     USB_IRQHandler                 ; USB
-                
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler                 [WEAK]
-        IMPORT  __main
-        IMPORT  SystemInit  
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                    [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler              [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                    [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                 [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                [WEAK]
-                EXPORT  PVD_IRQHandler                 [WEAK]
-                EXPORT  RTC_IRQHandler                 [WEAK]
-                EXPORT  FLASH_IRQHandler               [WEAK]
-                EXPORT  RCC_CRS_IRQHandler             [WEAK]
-                EXPORT  EXTI0_1_IRQHandler             [WEAK]
-                EXPORT  EXTI2_3_IRQHandler             [WEAK]
-                EXPORT  EXTI4_15_IRQHandler            [WEAK]
-                EXPORT  TSC_IRQHandler                  [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
-                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
-                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
-                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
-                EXPORT  LPTIM1_IRQHandler              [WEAK]
-                EXPORT  TIM2_IRQHandler                [WEAK]
-                EXPORT  TIM6_DAC_IRQHandler            [WEAK]
-                EXPORT  TIM21_IRQHandler               [WEAK]
-                EXPORT  TIM22_IRQHandler               [WEAK]
-                EXPORT  I2C1_IRQHandler                [WEAK]
-                EXPORT  I2C2_IRQHandler                [WEAK]
-                EXPORT  SPI1_IRQHandler                [WEAK]
-                EXPORT  SPI2_IRQHandler                [WEAK]
-                EXPORT  USART1_IRQHandler              [WEAK]
-                EXPORT  USART2_IRQHandler              [WEAK]
-                EXPORT  RNG_LPUART1_IRQHandler         [WEAK]
-                EXPORT  USB_IRQHandler                 [WEAK]
-
-
-WWDG_IRQHandler
-PVD_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_CRS_IRQHandler
-EXTI0_1_IRQHandler
-EXTI2_3_IRQHandler
-EXTI4_15_IRQHandler
-TSC_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_3_IRQHandler
-DMA1_Channel4_5_6_7_IRQHandler
-ADC1_COMP_IRQHandler 
-LPTIM1_IRQHandler
-TIM2_IRQHandler
-TIM6_DAC_IRQHandler
-TIM21_IRQHandler
-TIM22_IRQHandler
-I2C1_IRQHandler
-I2C2_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-RNG_LPUART1_IRQHandler
-USB_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l053xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l053xx.s
deleted file mode 100755
index 218cbc25..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l053xx.s
+++ /dev/null
@@ -1,260 +0,0 @@
-;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l053xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32l053xx Devices vector table for MDK-ARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-;  Stack Configuration
-;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-;  Heap Configuration
-;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_CRS_IRQHandler             ; RCC and CRS
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     TSC_IRQHandler                 ; TSC
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     0                              ; Reserved
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     RNG_LPUART1_IRQHandler         ; RNG and LPUART1
-                DCD     LCD_IRQHandler                 ; LCD
-                DCD     USB_IRQHandler                 ; USB
-                
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler                 [WEAK]
-        IMPORT  __main
-        IMPORT  SystemInit  
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                    [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler              [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                    [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                 [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                [WEAK]
-                EXPORT  PVD_IRQHandler                 [WEAK]
-                EXPORT  RTC_IRQHandler                 [WEAK]
-                EXPORT  FLASH_IRQHandler               [WEAK]
-                EXPORT  RCC_CRS_IRQHandler             [WEAK]
-                EXPORT  EXTI0_1_IRQHandler             [WEAK]
-                EXPORT  EXTI2_3_IRQHandler             [WEAK]
-                EXPORT  EXTI4_15_IRQHandler            [WEAK]
-                EXPORT  TSC_IRQHandler                  [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
-                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
-                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
-                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
-                EXPORT  LPTIM1_IRQHandler              [WEAK]
-                EXPORT  TIM2_IRQHandler                [WEAK]
-                EXPORT  TIM6_DAC_IRQHandler            [WEAK]
-                EXPORT  TIM21_IRQHandler               [WEAK]
-                EXPORT  TIM22_IRQHandler               [WEAK]
-                EXPORT  I2C1_IRQHandler                [WEAK]
-                EXPORT  I2C2_IRQHandler                [WEAK]
-                EXPORT  SPI1_IRQHandler                [WEAK]
-                EXPORT  SPI2_IRQHandler                [WEAK]
-                EXPORT  USART1_IRQHandler              [WEAK]
-                EXPORT  USART2_IRQHandler              [WEAK]
-                EXPORT  RNG_LPUART1_IRQHandler         [WEAK]
-                EXPORT  LCD_IRQHandler                 [WEAK]
-                EXPORT  USB_IRQHandler                 [WEAK]
-
-
-WWDG_IRQHandler
-PVD_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_CRS_IRQHandler
-EXTI0_1_IRQHandler
-EXTI2_3_IRQHandler
-EXTI4_15_IRQHandler
-TSC_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_3_IRQHandler
-DMA1_Channel4_5_6_7_IRQHandler
-ADC1_COMP_IRQHandler 
-LPTIM1_IRQHandler
-TIM2_IRQHandler
-TIM6_DAC_IRQHandler
-TIM21_IRQHandler
-TIM22_IRQHandler
-I2C1_IRQHandler
-I2C2_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-RNG_LPUART1_IRQHandler
-LCD_IRQHandler
-USB_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l061xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l061xx.s
deleted file mode 100755
index 06f239a9..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l061xx.s
+++ /dev/null
@@ -1,255 +0,0 @@
-;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l061xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32l061xx Devices vector table for MDK-ARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-;  Stack Configuration
-;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-;  Heap Configuration
-;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_IRQHandler                 ; RCC
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     0                              ; Reserved
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     TIM6_IRQHandler                ; TIM6
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     0                              ; Reserved
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     AES_LPUART1_IRQHandler         ; AES and LPUART1
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler                 [WEAK]
-        IMPORT  __main
-        IMPORT  SystemInit  
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                    [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler              [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                    [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                 [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                [WEAK]
-                EXPORT  PVD_IRQHandler                 [WEAK]
-                EXPORT  RTC_IRQHandler                 [WEAK]
-                EXPORT  FLASH_IRQHandler               [WEAK]
-                EXPORT  RCC_IRQHandler             [WEAK]
-                EXPORT  EXTI0_1_IRQHandler             [WEAK]
-                EXPORT  EXTI2_3_IRQHandler             [WEAK]
-                EXPORT  EXTI4_15_IRQHandler            [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
-                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
-                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
-                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
-                EXPORT  LPTIM1_IRQHandler              [WEAK]
-                EXPORT  TIM2_IRQHandler                [WEAK]
-                EXPORT  TIM6_IRQHandler                [WEAK]
-                EXPORT  TIM21_IRQHandler               [WEAK]
-                EXPORT  TIM22_IRQHandler               [WEAK]
-                EXPORT  I2C1_IRQHandler                [WEAK]
-                EXPORT  I2C2_IRQHandler                [WEAK]
-                EXPORT  SPI1_IRQHandler                [WEAK]
-                EXPORT  SPI2_IRQHandler                [WEAK]
-                EXPORT  USART1_IRQHandler              [WEAK]
-                EXPORT  USART2_IRQHandler              [WEAK]
-                EXPORT  AES_LPUART1_IRQHandler         [WEAK]
-
-
-
-WWDG_IRQHandler
-PVD_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_1_IRQHandler
-EXTI2_3_IRQHandler
-EXTI4_15_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_3_IRQHandler
-DMA1_Channel4_5_6_7_IRQHandler
-ADC1_COMP_IRQHandler 
-LPTIM1_IRQHandler
-TIM2_IRQHandler
-TIM6_IRQHandler
-TIM21_IRQHandler
-TIM22_IRQHandler
-I2C1_IRQHandler
-I2C2_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-AES_LPUART1_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l062xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l062xx.s
deleted file mode 100755
index bea2bbf4..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l062xx.s
+++ /dev/null
@@ -1,258 +0,0 @@
-;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l062xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32l062xx Devices vector table for MDK-ARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-;  Stack Configuration
-;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-;  Heap Configuration
-;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_CRS_IRQHandler             ; RCC and CRS
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     TSC_IRQHandler                 ; TSC
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler                ; TIM21
-                DCD     0                              ; Reserved
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     AES_RNG_LPUART1_IRQHandler     ; AES, RNG and LPUART1
-                DCD     0                              ; Reserved
-                DCD     USB_IRQHandler                 ; USB
-                
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler                 [WEAK]
-        IMPORT  __main
-        IMPORT  SystemInit  
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                    [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler              [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                    [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                 [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                [WEAK]
-                EXPORT  PVD_IRQHandler                 [WEAK]
-                EXPORT  RTC_IRQHandler                 [WEAK]
-                EXPORT  FLASH_IRQHandler               [WEAK]
-                EXPORT  RCC_CRS_IRQHandler             [WEAK]
-                EXPORT  EXTI0_1_IRQHandler             [WEAK]
-                EXPORT  EXTI2_3_IRQHandler             [WEAK]
-                EXPORT  EXTI4_15_IRQHandler            [WEAK]
-                EXPORT  TSC_IRQHandler                  [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
-                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
-                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
-                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
-                EXPORT  LPTIM1_IRQHandler              [WEAK]
-                EXPORT  TIM2_IRQHandler                [WEAK]
-                EXPORT  TIM6_DAC_IRQHandler            [WEAK]
-                EXPORT  TIM21_IRQHandler                [WEAK]
-                EXPORT  TIM22_IRQHandler               [WEAK]
-                EXPORT  I2C1_IRQHandler                [WEAK]
-                EXPORT  I2C2_IRQHandler                [WEAK]
-                EXPORT  SPI1_IRQHandler                [WEAK]
-                EXPORT  SPI2_IRQHandler                [WEAK]
-                EXPORT  USART1_IRQHandler              [WEAK]
-                EXPORT  USART2_IRQHandler              [WEAK]
-                EXPORT  AES_RNG_LPUART1_IRQHandler     [WEAK]
-                EXPORT  USB_IRQHandler                 [WEAK]
-
-
-WWDG_IRQHandler
-PVD_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_CRS_IRQHandler
-EXTI0_1_IRQHandler
-EXTI2_3_IRQHandler
-EXTI4_15_IRQHandler
-TSC_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_3_IRQHandler
-DMA1_Channel4_5_6_7_IRQHandler
-ADC1_COMP_IRQHandler 
-LPTIM1_IRQHandler
-TIM2_IRQHandler
-TIM6_DAC_IRQHandler
-TIM21_IRQHandler
-TIM22_IRQHandler
-I2C1_IRQHandler
-I2C2_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-AES_RNG_LPUART1_IRQHandler
-USB_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l063xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l063xx.s
deleted file mode 100755
index ec11ec39..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l063xx.s
+++ /dev/null
@@ -1,260 +0,0 @@
-;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l063xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32l063xx Devices vector table for MDK-ARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-;  Stack Configuration
-;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-;  Heap Configuration
-;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_CRS_IRQHandler             ; RCC and CRS
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     TSC_IRQHandler                 ; TSC
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     0                              ; Reserved
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     AES_RNG_LPUART1_IRQHandler     ; AES, RNG and LPUART1
-                DCD     LCD_IRQHandler                 ; LCD
-                DCD     USB_IRQHandler                 ; USB
-                
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler                 [WEAK]
-        IMPORT  __main
-        IMPORT  SystemInit  
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                    [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler              [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                    [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                 [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                [WEAK]
-                EXPORT  PVD_IRQHandler                 [WEAK]
-                EXPORT  RTC_IRQHandler                 [WEAK]
-                EXPORT  FLASH_IRQHandler               [WEAK]
-                EXPORT  RCC_CRS_IRQHandler             [WEAK]
-                EXPORT  EXTI0_1_IRQHandler             [WEAK]
-                EXPORT  EXTI2_3_IRQHandler             [WEAK]
-                EXPORT  EXTI4_15_IRQHandler            [WEAK]
-                EXPORT  TSC_IRQHandler                 [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
-                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
-                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
-                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
-                EXPORT  LPTIM1_IRQHandler [WEAK]
-                EXPORT  TIM2_IRQHandler                [WEAK]
-                EXPORT  TIM6_DAC_IRQHandler            [WEAK]
-                EXPORT  TIM21_IRQHandler               [WEAK]
-                EXPORT  TIM22_IRQHandler               [WEAK]
-                EXPORT  I2C1_IRQHandler                [WEAK]
-                EXPORT  I2C2_IRQHandler                [WEAK]
-                EXPORT  SPI1_IRQHandler                [WEAK]
-                EXPORT  SPI2_IRQHandler                [WEAK]
-                EXPORT  USART1_IRQHandler              [WEAK]
-                EXPORT  USART2_IRQHandler              [WEAK]
-                EXPORT  AES_RNG_LPUART1_IRQHandler     [WEAK]
-                EXPORT  LCD_IRQHandler                 [WEAK]
-                EXPORT  USB_IRQHandler                 [WEAK]
-
-
-WWDG_IRQHandler
-PVD_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_CRS_IRQHandler
-EXTI0_1_IRQHandler
-EXTI2_3_IRQHandler
-EXTI4_15_IRQHandler
-TSC_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_3_IRQHandler
-DMA1_Channel4_5_6_7_IRQHandler
-ADC1_COMP_IRQHandler 
-LPTIM1_IRQHandler
-TIM2_IRQHandler
-TIM6_DAC_IRQHandler
-TIM21_IRQHandler
-TIM22_IRQHandler
-I2C1_IRQHandler
-I2C2_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-AES_RNG_LPUART1_IRQHandler
-LCD_IRQHandler
-USB_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l071xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l071xx.s
deleted file mode 100755
index 5551493e..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l071xx.s
+++ /dev/null
@@ -1,261 +0,0 @@
-;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l071xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32l071xx Devices vector table for MDK-ARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-;  Stack Configuration
-;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-;  Heap Configuration
-;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_IRQHandler                 ; RCC
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     0                              ; Reserved
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     USART4_5_IRQHandler            ; USART4 and USART5
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     TIM3_IRQHandler                ; TIM3
-                DCD     TIM6_IRQHandler                ; TIM6
-                DCD     TIM7_IRQHandler                ; TIM7
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     I2C3_IRQHandler                ; I2C3
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     LPUART1_IRQHandler             ; LPUART1
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-   
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler                 [WEAK]
-        IMPORT  __main
-        IMPORT  SystemInit  
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                    [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler              [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                    [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                 [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                [WEAK]
-                EXPORT  PVD_IRQHandler                 [WEAK]
-                EXPORT  RTC_IRQHandler                 [WEAK]
-                EXPORT  FLASH_IRQHandler               [WEAK]
-                EXPORT  RCC_IRQHandler                 [WEAK]
-                EXPORT  EXTI0_1_IRQHandler             [WEAK]
-                EXPORT  EXTI2_3_IRQHandler             [WEAK]
-                EXPORT  EXTI4_15_IRQHandler            [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
-                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
-                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
-                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
-                EXPORT  LPTIM1_IRQHandler              [WEAK]
-                EXPORT  USART4_5_IRQHandler            [WEAK]
-                EXPORT  TIM2_IRQHandler                [WEAK]
-                EXPORT  TIM3_IRQHandler                [WEAK]
-                EXPORT  TIM6_IRQHandler                [WEAK]
-                EXPORT  TIM7_IRQHandler                [WEAK]
-                EXPORT  TIM21_IRQHandler               [WEAK]
-                EXPORT  TIM22_IRQHandler               [WEAK]
-                EXPORT  I2C1_IRQHandler                [WEAK]
-                EXPORT  I2C2_IRQHandler                [WEAK]
-                EXPORT  I2C3_IRQHandler                [WEAK]
-                EXPORT  SPI1_IRQHandler                [WEAK]
-                EXPORT  SPI2_IRQHandler                [WEAK]
-                EXPORT  USART1_IRQHandler              [WEAK]
-                EXPORT  USART2_IRQHandler              [WEAK]
-                EXPORT  LPUART1_IRQHandler             [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_1_IRQHandler
-EXTI2_3_IRQHandler
-EXTI4_15_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_3_IRQHandler
-DMA1_Channel4_5_6_7_IRQHandler
-ADC1_COMP_IRQHandler 
-LPTIM1_IRQHandler
-USART4_5_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM6_IRQHandler
-TIM7_IRQHandler
-TIM21_IRQHandler
-TIM22_IRQHandler
-I2C1_IRQHandler
-I2C2_IRQHandler
-I2C3_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-LPUART1_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l072xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l072xx.s
deleted file mode 100755
index f60eccf8..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l072xx.s
+++ /dev/null
@@ -1,266 +0,0 @@
-;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l072xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32l072xx Devices vector table for MDK-ARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C lbrary (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-;  Stack Configuration
-;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-;  Heap Configuration
-;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_CRS_IRQHandler             ; RCC and CRS
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     TSC_IRQHandler                 ; TSC
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     USART4_5_IRQHandler            ; USART4 and USART5
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     TIM3_IRQHandler                ; TIM3
-                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
-                DCD     TIM7_IRQHandler                ; TIM7
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     I2C3_IRQHandler                ; I2C3
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     RNG_LPUART1_IRQHandler         ; RNG and LPUART1
-                DCD     0                              ; Reserved
-                DCD     USB_IRQHandler                 ; USB
-                
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler                 [WEAK]
-        IMPORT  __main
-        IMPORT  SystemInit  
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                    [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler              [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                    [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                 [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                [WEAK]
-                EXPORT  PVD_IRQHandler                 [WEAK]
-                EXPORT  RTC_IRQHandler                 [WEAK]
-                EXPORT  FLASH_IRQHandler               [WEAK]
-                EXPORT  RCC_CRS_IRQHandler             [WEAK]
-                EXPORT  EXTI0_1_IRQHandler             [WEAK]
-                EXPORT  EXTI2_3_IRQHandler             [WEAK]
-                EXPORT  EXTI4_15_IRQHandler            [WEAK]
-                EXPORT  TSC_IRQHandler                  [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
-                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
-                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
-                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
-                EXPORT  LPTIM1_IRQHandler              [WEAK]
-                EXPORT  USART4_5_IRQHandler            [WEAK]
-                EXPORT  TIM2_IRQHandler                [WEAK]
-                EXPORT  TIM3_IRQHandler                [WEAK]
-                EXPORT  TIM6_DAC_IRQHandler            [WEAK]
-                EXPORT  TIM7_IRQHandler                [WEAK]
-                EXPORT  TIM21_IRQHandler               [WEAK]
-                EXPORT  TIM22_IRQHandler               [WEAK]
-                EXPORT  I2C1_IRQHandler                [WEAK]
-                EXPORT  I2C2_IRQHandler                [WEAK]
-                EXPORT  I2C3_IRQHandler                [WEAK]
-                EXPORT  SPI1_IRQHandler                [WEAK]
-                EXPORT  SPI2_IRQHandler                [WEAK]
-                EXPORT  USART1_IRQHandler              [WEAK]
-                EXPORT  USART2_IRQHandler              [WEAK]
-                EXPORT  RNG_LPUART1_IRQHandler         [WEAK]
-                EXPORT  USB_IRQHandler                 [WEAK]
-
-
-WWDG_IRQHandler
-PVD_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_CRS_IRQHandler
-EXTI0_1_IRQHandler
-EXTI2_3_IRQHandler
-EXTI4_15_IRQHandler
-TSC_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_3_IRQHandler
-DMA1_Channel4_5_6_7_IRQHandler
-ADC1_COMP_IRQHandler 
-LPTIM1_IRQHandler
-USART4_5_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM6_DAC_IRQHandler
-TIM7_IRQHandler
-TIM21_IRQHandler
-TIM22_IRQHandler
-I2C1_IRQHandler
-I2C2_IRQHandler
-I2C3_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-RNG_LPUART1_IRQHandler
-USB_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l073xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l073xx.s
deleted file mode 100755
index 3e08494b..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l073xx.s
+++ /dev/null
@@ -1,268 +0,0 @@
-;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l073xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32l073xx Devices vector table for MDK-ARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-;  Stack Configuration
-;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-;  Heap Configuration
-;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_CRS_IRQHandler             ; RCC and CRS
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     TSC_IRQHandler                 ; TSC
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     USART4_5_IRQHandler            ; USART4 and USART5
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     TIM3_IRQHandler                ; TIM3
-                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
-                DCD     TIM7_IRQHandler                ; TIM7
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     I2C3_IRQHandler                ; I2C3
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     RNG_LPUART1_IRQHandler         ; RNG and LPUART1
-                DCD     LCD_IRQHandler                 ; LCD
-                DCD     USB_IRQHandler                 ; USB
-                
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler                 [WEAK]
-        IMPORT  __main
-        IMPORT  SystemInit  
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                    [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler              [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                    [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                 [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                [WEAK]
-                EXPORT  PVD_IRQHandler                 [WEAK]
-                EXPORT  RTC_IRQHandler                 [WEAK]
-                EXPORT  FLASH_IRQHandler               [WEAK]
-                EXPORT  RCC_CRS_IRQHandler             [WEAK]
-                EXPORT  EXTI0_1_IRQHandler             [WEAK]
-                EXPORT  EXTI2_3_IRQHandler             [WEAK]
-                EXPORT  EXTI4_15_IRQHandler            [WEAK]
-                EXPORT  TSC_IRQHandler                  [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
-                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
-                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
-                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
-                EXPORT  LPTIM1_IRQHandler              [WEAK]
-                EXPORT  USART4_5_IRQHandler            [WEAK]
-                EXPORT  TIM2_IRQHandler                [WEAK]
-                EXPORT  TIM3_IRQHandler                [WEAK]
-                EXPORT  TIM6_DAC_IRQHandler            [WEAK]
-                EXPORT  TIM7_IRQHandler                [WEAK]
-                EXPORT  TIM21_IRQHandler               [WEAK]
-                EXPORT  TIM22_IRQHandler               [WEAK]
-                EXPORT  I2C1_IRQHandler                [WEAK]
-                EXPORT  I2C2_IRQHandler                [WEAK]
-                EXPORT  I2C3_IRQHandler                [WEAK]
-                EXPORT  SPI1_IRQHandler                [WEAK]
-                EXPORT  SPI2_IRQHandler                [WEAK]
-                EXPORT  USART1_IRQHandler              [WEAK]
-                EXPORT  USART2_IRQHandler              [WEAK]
-                EXPORT  RNG_LPUART1_IRQHandler         [WEAK]
-                EXPORT  LCD_IRQHandler                 [WEAK]
-                EXPORT  USB_IRQHandler                 [WEAK]
-
-
-WWDG_IRQHandler
-PVD_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_CRS_IRQHandler
-EXTI0_1_IRQHandler
-EXTI2_3_IRQHandler
-EXTI4_15_IRQHandler
-TSC_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_3_IRQHandler
-DMA1_Channel4_5_6_7_IRQHandler
-ADC1_COMP_IRQHandler 
-LPTIM1_IRQHandler
-USART4_5_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM6_DAC_IRQHandler
-TIM7_IRQHandler
-TIM21_IRQHandler
-TIM22_IRQHandler
-I2C1_IRQHandler
-I2C2_IRQHandler
-I2C3_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-RNG_LPUART1_IRQHandler
-LCD_IRQHandler
-USB_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l081xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l081xx.s
deleted file mode 100755
index c5a2335f..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l081xx.s
+++ /dev/null
@@ -1,261 +0,0 @@
-;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l081xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32l081xx Devices vector table for MDK-ARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-;  Stack Configuration
-;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-;  Heap Configuration
-;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_IRQHandler                 ; RCC
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     0                              ; Reserved
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     USART4_5_IRQHandler            ; USART4 and USART5
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     TIM3_IRQHandler                ; TIM3
-                DCD     TIM6_IRQHandler                ; TIM6
-                DCD     TIM7_IRQHandler                ; TIM7
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     I2C3_IRQHandler                ; I2C3
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     AES_LPUART1_IRQHandler         ; LPUART1
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-   
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler                 [WEAK]
-        IMPORT  __main
-        IMPORT  SystemInit  
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                    [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler              [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                    [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                 [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                [WEAK]
-                EXPORT  PVD_IRQHandler                 [WEAK]
-                EXPORT  RTC_IRQHandler                 [WEAK]
-                EXPORT  FLASH_IRQHandler               [WEAK]
-                EXPORT  RCC_IRQHandler                 [WEAK]
-                EXPORT  EXTI0_1_IRQHandler             [WEAK]
-                EXPORT  EXTI2_3_IRQHandler             [WEAK]
-                EXPORT  EXTI4_15_IRQHandler            [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
-                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
-                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
-                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
-                EXPORT  LPTIM1_IRQHandler              [WEAK]
-                EXPORT  USART4_5_IRQHandler            [WEAK]
-                EXPORT  TIM2_IRQHandler                [WEAK]
-                EXPORT  TIM3_IRQHandler                [WEAK]
-                EXPORT  TIM6_IRQHandler                [WEAK]
-                EXPORT  TIM7_IRQHandler                [WEAK]
-                EXPORT  TIM21_IRQHandler               [WEAK]
-                EXPORT  TIM22_IRQHandler               [WEAK]
-                EXPORT  I2C1_IRQHandler                [WEAK]
-                EXPORT  I2C2_IRQHandler                [WEAK]
-                EXPORT  I2C3_IRQHandler                [WEAK]
-                EXPORT  SPI1_IRQHandler                [WEAK]
-                EXPORT  SPI2_IRQHandler                [WEAK]
-                EXPORT  USART1_IRQHandler              [WEAK]
-                EXPORT  USART2_IRQHandler              [WEAK]
-                EXPORT  AES_LPUART1_IRQHandler         [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_1_IRQHandler
-EXTI2_3_IRQHandler
-EXTI4_15_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_3_IRQHandler
-DMA1_Channel4_5_6_7_IRQHandler
-ADC1_COMP_IRQHandler 
-LPTIM1_IRQHandler
-USART4_5_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM6_IRQHandler
-TIM7_IRQHandler
-TIM21_IRQHandler
-TIM22_IRQHandler
-I2C1_IRQHandler
-I2C2_IRQHandler
-I2C3_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-AES_LPUART1_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l082xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l082xx.s
deleted file mode 100755
index ae26d622..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l082xx.s
+++ /dev/null
@@ -1,266 +0,0 @@
-;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l082xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32l082xx Devices vector table for MDK-ARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-;  Stack Configuration
-;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-;  Heap Configuration
-;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_CRS_IRQHandler             ; RCC and CRS
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     TSC_IRQHandler                 ; TSC
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     USART4_5_IRQHandler            ; USART4 and USART5
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     TIM3_IRQHandler                ; TIM3
-                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
-                DCD     TIM7_IRQHandler                ; TIM7
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     I2C3_IRQHandler                ; I2C3
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     AES_RNG_LPUART1_IRQHandler     ; RNG and LPUART1
-                DCD     0                              ; Reserved
-                DCD     USB_IRQHandler                 ; USB
-                
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler                 [WEAK]
-        IMPORT  __main
-        IMPORT  SystemInit  
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                    [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler              [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                    [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                 [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                [WEAK]
-                EXPORT  PVD_IRQHandler                 [WEAK]
-                EXPORT  RTC_IRQHandler                 [WEAK]
-                EXPORT  FLASH_IRQHandler               [WEAK]
-                EXPORT  RCC_CRS_IRQHandler             [WEAK]
-                EXPORT  EXTI0_1_IRQHandler             [WEAK]
-                EXPORT  EXTI2_3_IRQHandler             [WEAK]
-                EXPORT  EXTI4_15_IRQHandler            [WEAK]
-                EXPORT  TSC_IRQHandler                  [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
-                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
-                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
-                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
-                EXPORT  LPTIM1_IRQHandler              [WEAK]
-                EXPORT  USART4_5_IRQHandler            [WEAK]
-                EXPORT  TIM2_IRQHandler                [WEAK]
-                EXPORT  TIM3_IRQHandler                [WEAK]
-                EXPORT  TIM6_DAC_IRQHandler            [WEAK]
-                EXPORT  TIM7_IRQHandler                [WEAK]
-                EXPORT  TIM21_IRQHandler               [WEAK]
-                EXPORT  TIM22_IRQHandler               [WEAK]
-                EXPORT  I2C1_IRQHandler                [WEAK]
-                EXPORT  I2C2_IRQHandler                [WEAK]
-                EXPORT  I2C3_IRQHandler                [WEAK]
-                EXPORT  SPI1_IRQHandler                [WEAK]
-                EXPORT  SPI2_IRQHandler                [WEAK]
-                EXPORT  USART1_IRQHandler              [WEAK]
-                EXPORT  USART2_IRQHandler              [WEAK]
-                EXPORT  AES_RNG_LPUART1_IRQHandler     [WEAK]
-                EXPORT  USB_IRQHandler                 [WEAK]
-
-
-WWDG_IRQHandler
-PVD_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_CRS_IRQHandler
-EXTI0_1_IRQHandler
-EXTI2_3_IRQHandler
-EXTI4_15_IRQHandler
-TSC_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_3_IRQHandler
-DMA1_Channel4_5_6_7_IRQHandler
-ADC1_COMP_IRQHandler 
-LPTIM1_IRQHandler
-USART4_5_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM6_DAC_IRQHandler
-TIM7_IRQHandler
-TIM21_IRQHandler
-TIM22_IRQHandler
-I2C1_IRQHandler
-I2C2_IRQHandler
-I2C3_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-AES_RNG_LPUART1_IRQHandler
-USB_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l083xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l083xx.s
deleted file mode 100755
index 797d95d9..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l083xx.s
+++ /dev/null
@@ -1,268 +0,0 @@
-;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l083xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32l083xx Devices vector table for MDK-ARM toolchain.
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-;  Stack Configuration
-;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-;  Heap Configuration
-;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; 
-
-Heap_Size       EQU     0x00000200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp              ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_CRS_IRQHandler             ; RCC and CRS
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     TSC_IRQHandler                 ; TSC
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     USART4_5_IRQHandler            ; USART4 and USART5
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     TIM3_IRQHandler                ; TIM3
-                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
-                DCD     TIM7_IRQHandler                ; TIM7
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     I2C3_IRQHandler                ; I2C3
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     AES_RNG_LPUART1_IRQHandler     ; RNG and LPUART1
-                DCD     LCD_IRQHandler                 ; LCD
-                DCD     USB_IRQHandler                 ; USB
-                
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler routine
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler                 [WEAK]
-        IMPORT  __main
-        IMPORT  SystemInit  
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                    [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler              [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                    [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler                 [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler                [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                [WEAK]
-                EXPORT  PVD_IRQHandler                 [WEAK]
-                EXPORT  RTC_IRQHandler                 [WEAK]
-                EXPORT  FLASH_IRQHandler               [WEAK]
-                EXPORT  RCC_CRS_IRQHandler             [WEAK]
-                EXPORT  EXTI0_1_IRQHandler             [WEAK]
-                EXPORT  EXTI2_3_IRQHandler             [WEAK]
-                EXPORT  EXTI4_15_IRQHandler            [WEAK]
-                EXPORT  TSC_IRQHandler                  [WEAK]
-                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
-                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
-                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
-                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
-                EXPORT  LPTIM1_IRQHandler              [WEAK]
-                EXPORT  USART4_5_IRQHandler            [WEAK]
-                EXPORT  TIM2_IRQHandler                [WEAK]
-                EXPORT  TIM3_IRQHandler                [WEAK]
-                EXPORT  TIM6_DAC_IRQHandler            [WEAK]
-                EXPORT  TIM7_IRQHandler                [WEAK]
-                EXPORT  TIM21_IRQHandler               [WEAK]
-                EXPORT  TIM22_IRQHandler               [WEAK]
-                EXPORT  I2C1_IRQHandler                [WEAK]
-                EXPORT  I2C2_IRQHandler                [WEAK]
-                EXPORT  I2C3_IRQHandler                [WEAK]
-                EXPORT  SPI1_IRQHandler                [WEAK]
-                EXPORT  SPI2_IRQHandler                [WEAK]
-                EXPORT  USART1_IRQHandler              [WEAK]
-                EXPORT  USART2_IRQHandler              [WEAK]
-                EXPORT  AES_RNG_LPUART1_IRQHandler     [WEAK]
-                EXPORT  LCD_IRQHandler                 [WEAK]
-                EXPORT  USB_IRQHandler                 [WEAK]
-
-
-WWDG_IRQHandler
-PVD_IRQHandler
-RTC_IRQHandler
-FLASH_IRQHandler
-RCC_CRS_IRQHandler
-EXTI0_1_IRQHandler
-EXTI2_3_IRQHandler
-EXTI4_15_IRQHandler
-TSC_IRQHandler
-DMA1_Channel1_IRQHandler
-DMA1_Channel2_3_IRQHandler
-DMA1_Channel4_5_6_7_IRQHandler
-ADC1_COMP_IRQHandler 
-LPTIM1_IRQHandler
-USART4_5_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM6_DAC_IRQHandler
-TIM7_IRQHandler
-TIM21_IRQHandler
-TIM22_IRQHandler
-I2C1_IRQHandler
-I2C2_IRQHandler
-I2C3_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-AES_RNG_LPUART1_IRQHandler
-LCD_IRQHandler
-USB_IRQHandler
-
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l011xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l011xx.s
deleted file mode 100755
index fe87bfb8..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l011xx.s
+++ /dev/null
@@ -1,290 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l011xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L011xx Devices vector table for gcc.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * 
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0plus
-  .fpu softvfp
-  .thumb
-
-.global  g_pfnVectors
-.global  Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */
-.word  _sdata
-/* end address for the .data section. defined in linker script */
-.word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-   ldr   r0, =_estack
-   mov   sp, r0          /* set stack pointer */
-
-/*Check if boot space corresponds to system memory*/
-
-    LDR R0,=0x00000004
-    LDR R1, [R0]
-    LSRS R1, R1, #24
-    LDR R2,=0x1F
-    CMP R1, R2
-    BNE ApplicationStart
-
- /*SYSCFG clock enable*/
-    LDR R0,=0x40021034
-    LDR R1,=0x00000001
-    STR R1, [R0]
-
-/*Set CFGR1 register with flash memory remap at address 0*/
-    LDR R0,=0x40010000
-    LDR R1,=0x00000000
-    STR R1, [R0]
-
-ApplicationStart:
-/* Copy the data segment initializers from flash to SRAM */
-  movs  r1, #0
-  b  LoopCopyDataInit
-
-CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-
-LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl  main
-
-LoopForever:
-    b LoopForever
-
-
-.size  Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word     WWDG_IRQHandler                   /* Window WatchDog              */
-  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
-  .word     RTC_IRQHandler                    /* RTC through the EXTI line     */
-  .word     FLASH_IRQHandler                  /* FLASH                        */
-  .word     RCC_IRQHandler                    /* RCC                          */
-  .word     EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word     EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word     EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word     0                                 /* Reserved                     */
-  .word     DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word     DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word     DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
-  .word     ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
-  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
-  .word     0                                 /* Reserved                     */
-  .word     TIM2_IRQHandler                   /* TIM2                         */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     TIM21_IRQHandler                  /* TIM21                        */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     I2C1_IRQHandler                   /* I2C1                         */
-  .word     0                                 /* Reserved                     */
-  .word     SPI1_IRQHandler                   /* SPI1                         */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     USART2_IRQHandler                 /* USART2                       */
-  .word     LPUART1_IRQHandler                /* LPUART1                      */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-   .weak      NMI_Handler
-   .thumb_set NMI_Handler,Default_Handler
-
-   .weak      HardFault_Handler
-   .thumb_set HardFault_Handler,Default_Handler
-
-   .weak      SVC_Handler
-   .thumb_set SVC_Handler,Default_Handler
-
-   .weak      PendSV_Handler
-   .thumb_set PendSV_Handler,Default_Handler
-
-   .weak      SysTick_Handler
-   .thumb_set SysTick_Handler,Default_Handler
-
-   .weak      WWDG_IRQHandler
-   .thumb_set WWDG_IRQHandler,Default_Handler
-
-   .weak      PVD_IRQHandler
-   .thumb_set PVD_IRQHandler,Default_Handler
-
-   .weak      RTC_IRQHandler
-   .thumb_set RTC_IRQHandler,Default_Handler
-
-   .weak      FLASH_IRQHandler
-   .thumb_set FLASH_IRQHandler,Default_Handler
-
-   .weak      RCC_IRQHandler
-   .thumb_set RCC_IRQHandler,Default_Handler
-
-   .weak      EXTI0_1_IRQHandler
-   .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-   .weak      EXTI2_3_IRQHandler
-   .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-   .weak      EXTI4_15_IRQHandler
-   .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel1_IRQHandler
-   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel2_3_IRQHandler
-   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel4_5_6_7_IRQHandler
-   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
-
-   .weak      ADC1_COMP_IRQHandler
-   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-   .weak      LPTIM1_IRQHandler
-   .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-   .weak      TIM2_IRQHandler
-   .thumb_set TIM2_IRQHandler,Default_Handler
-
-   .weak      TIM21_IRQHandler
-   .thumb_set TIM21_IRQHandler,Default_Handler
-
-   .weak      I2C1_IRQHandler
-   .thumb_set I2C1_IRQHandler,Default_Handler
-
-   .weak      SPI1_IRQHandler
-   .thumb_set SPI1_IRQHandler,Default_Handler
-
-   .weak      USART2_IRQHandler
-   .thumb_set USART2_IRQHandler,Default_Handler
-
-   .weak      LPUART1_IRQHandler
-   .thumb_set LPUART1_IRQHandler,Default_Handler
-
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l021xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l021xx.s
deleted file mode 100755
index 4386e447..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l021xx.s
+++ /dev/null
@@ -1,290 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l021xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L021xx Devices vector table for gcc.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * 
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0plus
-  .fpu softvfp
-  .thumb
-
-.global  g_pfnVectors
-.global  Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */
-.word  _sdata
-/* end address for the .data section. defined in linker script */
-.word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-   ldr   r0, =_estack
-   mov   sp, r0          /* set stack pointer */
-
-/*Check if boot space corresponds to system memory*/
-
-    LDR R0,=0x00000004
-    LDR R1, [R0]
-    LSRS R1, R1, #24
-    LDR R2,=0x1F
-    CMP R1, R2
-    BNE ApplicationStart
-
- /*SYSCFG clock enable*/
-    LDR R0,=0x40021034
-    LDR R1,=0x00000001
-    STR R1, [R0]
-
-/*Set CFGR1 register with flash memory remap at address 0*/
-    LDR R0,=0x40010000
-    LDR R1,=0x00000000
-    STR R1, [R0]
-
-ApplicationStart:
-/* Copy the data segment initializers from flash to SRAM */
-  movs  r1, #0
-  b  LoopCopyDataInit
-
-CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-
-LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl  main
-
-LoopForever:
-    b LoopForever
-
-
-.size  Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word     WWDG_IRQHandler                   /* Window WatchDog              */
-  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
-  .word     RTC_IRQHandler                    /* RTC through the EXTI line     */
-  .word     FLASH_IRQHandler                  /* FLASH                        */
-  .word     RCC_IRQHandler                    /* RCC                          */
-  .word     EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word     EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word     EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word     0                                 /* Reserved                     */
-  .word     DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word     DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word     DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
-  .word     ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
-  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
-  .word     0                                 /* Reserved                     */
-  .word     TIM2_IRQHandler                   /* TIM2                         */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     TIM21_IRQHandler                  /* TIM21                        */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     I2C1_IRQHandler                   /* I2C1                         */
-  .word     0                                 /* Reserved                     */
-  .word     SPI1_IRQHandler                   /* SPI1                         */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     USART2_IRQHandler                 /* USART2                       */
-  .word     AES_LPUART1_IRQHandler            /* AES and LPUART1              */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-   .weak      NMI_Handler
-   .thumb_set NMI_Handler,Default_Handler
-
-   .weak      HardFault_Handler
-   .thumb_set HardFault_Handler,Default_Handler
-
-   .weak      SVC_Handler
-   .thumb_set SVC_Handler,Default_Handler
-
-   .weak      PendSV_Handler
-   .thumb_set PendSV_Handler,Default_Handler
-
-   .weak      SysTick_Handler
-   .thumb_set SysTick_Handler,Default_Handler
-
-   .weak      WWDG_IRQHandler
-   .thumb_set WWDG_IRQHandler,Default_Handler
-
-   .weak      PVD_IRQHandler
-   .thumb_set PVD_IRQHandler,Default_Handler
-
-   .weak      RTC_IRQHandler
-   .thumb_set RTC_IRQHandler,Default_Handler
-
-   .weak      FLASH_IRQHandler
-   .thumb_set FLASH_IRQHandler,Default_Handler
-
-   .weak      RCC_IRQHandler
-   .thumb_set RCC_IRQHandler,Default_Handler
-
-   .weak      EXTI0_1_IRQHandler
-   .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-   .weak      EXTI2_3_IRQHandler
-   .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-   .weak      EXTI4_15_IRQHandler
-   .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel1_IRQHandler
-   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel2_3_IRQHandler
-   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel4_5_6_7_IRQHandler
-   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
-
-   .weak      ADC1_COMP_IRQHandler
-   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-   .weak      LPTIM1_IRQHandler
-   .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-   .weak      TIM2_IRQHandler
-   .thumb_set TIM2_IRQHandler,Default_Handler
-
-   .weak      TIM21_IRQHandler
-   .thumb_set TIM21_IRQHandler,Default_Handler
-
-   .weak      I2C1_IRQHandler
-   .thumb_set I2C1_IRQHandler,Default_Handler
-
-   .weak      SPI1_IRQHandler
-   .thumb_set SPI1_IRQHandler,Default_Handler
-
-   .weak      USART2_IRQHandler
-   .thumb_set USART2_IRQHandler,Default_Handler
-
-   .weak      AES_LPUART1_IRQHandler
-   .thumb_set AES_LPUART1_IRQHandler,Default_Handler
-
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l031xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l031xx.s
deleted file mode 100755
index 67ffac64..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l031xx.s
+++ /dev/null
@@ -1,273 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l031xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L031xx Devices vector table for gcc.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * 
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0plus
-  .fpu softvfp
-  .thumb
-
-.global  g_pfnVectors
-.global  Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */
-.word  _sdata
-/* end address for the .data section. defined in linker script */
-.word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-   ldr   r0, =_estack
-   mov   sp, r0          /* set stack pointer */
-
-/* Copy the data segment initializers from flash to SRAM */
-  movs  r1, #0
-  b  LoopCopyDataInit
-
-CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-
-LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl  main
-
-LoopForever:
-    b LoopForever
-
-
-.size  Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word     WWDG_IRQHandler                   /* Window WatchDog              */
-  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
-  .word     RTC_IRQHandler                    /* RTC through the EXTI line     */
-  .word     FLASH_IRQHandler                  /* FLASH                        */
-  .word     RCC_IRQHandler                    /* RCC                          */
-  .word     EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word     EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word     EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word     0                                 /* Reserved                     */
-  .word     DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word     DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word     DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
-  .word     ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
-  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
-  .word     0                                 /* Reserved                     */
-  .word     TIM2_IRQHandler                   /* TIM2                         */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     TIM21_IRQHandler                  /* TIM21                        */
-  .word     0                                 /* Reserved                     */
-  .word     TIM22_IRQHandler                  /* TIM22                        */
-  .word     I2C1_IRQHandler                   /* I2C1                         */
-  .word     0                                 /* Reserved                     */
-  .word     SPI1_IRQHandler                   /* SPI1                         */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     USART2_IRQHandler                 /* USART2                       */
-  .word     LPUART1_IRQHandler                /* LPUART1                      */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-   .weak      NMI_Handler
-   .thumb_set NMI_Handler,Default_Handler
-
-   .weak      HardFault_Handler
-   .thumb_set HardFault_Handler,Default_Handler
-
-   .weak      SVC_Handler
-   .thumb_set SVC_Handler,Default_Handler
-
-   .weak      PendSV_Handler
-   .thumb_set PendSV_Handler,Default_Handler
-
-   .weak      SysTick_Handler
-   .thumb_set SysTick_Handler,Default_Handler
-
-   .weak      WWDG_IRQHandler
-   .thumb_set WWDG_IRQHandler,Default_Handler
-
-   .weak      PVD_IRQHandler
-   .thumb_set PVD_IRQHandler,Default_Handler
-
-   .weak      RTC_IRQHandler
-   .thumb_set RTC_IRQHandler,Default_Handler
-
-   .weak      FLASH_IRQHandler
-   .thumb_set FLASH_IRQHandler,Default_Handler
-
-   .weak      RCC_IRQHandler
-   .thumb_set RCC_IRQHandler,Default_Handler
-
-   .weak      EXTI0_1_IRQHandler
-   .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-   .weak      EXTI2_3_IRQHandler
-   .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-   .weak      EXTI4_15_IRQHandler
-   .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel1_IRQHandler
-   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel2_3_IRQHandler
-   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel4_5_6_7_IRQHandler
-   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
-
-   .weak      ADC1_COMP_IRQHandler
-   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-   .weak      LPTIM1_IRQHandler
-   .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-   .weak      TIM2_IRQHandler
-   .thumb_set TIM2_IRQHandler,Default_Handler
-
-   .weak      TIM21_IRQHandler
-   .thumb_set TIM21_IRQHandler,Default_Handler
-
-   .weak      TIM22_IRQHandler
-   .thumb_set TIM22_IRQHandler,Default_Handler
-
-   .weak      I2C1_IRQHandler
-   .thumb_set I2C1_IRQHandler,Default_Handler
-
-   .weak      SPI1_IRQHandler
-   .thumb_set SPI1_IRQHandler,Default_Handler
-
-   .weak      USART2_IRQHandler
-   .thumb_set USART2_IRQHandler,Default_Handler
-
-   .weak      LPUART1_IRQHandler
-   .thumb_set LPUART1_IRQHandler,Default_Handler
-
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l041xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l041xx.s
deleted file mode 100755
index 4966fc8e..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l041xx.s
+++ /dev/null
@@ -1,273 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l041xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L041xx Devices vector table for gcc.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * 
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0plus
-  .fpu softvfp
-  .thumb
-
-.global  g_pfnVectors
-.global  Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */
-.word  _sdata
-/* end address for the .data section. defined in linker script */
-.word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-   ldr   r0, =_estack
-   mov   sp, r0          /* set stack pointer */
-
-/* Copy the data segment initializers from flash to SRAM */
-  movs  r1, #0
-  b  LoopCopyDataInit
-
-CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-
-LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl  main
-
-LoopForever:
-    b LoopForever
-
-
-.size  Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word     WWDG_IRQHandler                   /* Window WatchDog              */
-  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
-  .word     RTC_IRQHandler                    /* RTC through the EXTI line     */
-  .word     FLASH_IRQHandler                  /* FLASH                        */
-  .word     RCC_IRQHandler                    /* RCC                          */
-  .word     EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word     EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word     EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word     0                                 /* Reserved                     */
-  .word     DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word     DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word     DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
-  .word     ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
-  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
-  .word     0                                 /* Reserved                     */
-  .word     TIM2_IRQHandler                   /* TIM2                         */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     TIM21_IRQHandler                  /* TIM21                        */
-  .word     0                                 /* Reserved                     */
-  .word     TIM22_IRQHandler                  /* TIM22                        */
-  .word     I2C1_IRQHandler                   /* I2C1                         */
-  .word     0                                 /* Reserved                     */
-  .word     SPI1_IRQHandler                   /* SPI1                         */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-  .word     USART2_IRQHandler                 /* USART2                       */
-  .word     AES_LPUART1_IRQHandler            /* AES and LPUART1              */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-   .weak      NMI_Handler
-   .thumb_set NMI_Handler,Default_Handler
-
-   .weak      HardFault_Handler
-   .thumb_set HardFault_Handler,Default_Handler
-
-   .weak      SVC_Handler
-   .thumb_set SVC_Handler,Default_Handler
-
-   .weak      PendSV_Handler
-   .thumb_set PendSV_Handler,Default_Handler
-
-   .weak      SysTick_Handler
-   .thumb_set SysTick_Handler,Default_Handler
-
-   .weak      WWDG_IRQHandler
-   .thumb_set WWDG_IRQHandler,Default_Handler
-
-   .weak      PVD_IRQHandler
-   .thumb_set PVD_IRQHandler,Default_Handler
-
-   .weak      RTC_IRQHandler
-   .thumb_set RTC_IRQHandler,Default_Handler
-
-   .weak      FLASH_IRQHandler
-   .thumb_set FLASH_IRQHandler,Default_Handler
-
-   .weak      RCC_IRQHandler
-   .thumb_set RCC_IRQHandler,Default_Handler
-
-   .weak      EXTI0_1_IRQHandler
-   .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-   .weak      EXTI2_3_IRQHandler
-   .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-   .weak      EXTI4_15_IRQHandler
-   .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel1_IRQHandler
-   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel2_3_IRQHandler
-   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel4_5_6_7_IRQHandler
-   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
-
-   .weak      ADC1_COMP_IRQHandler
-   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-   .weak      LPTIM1_IRQHandler
-   .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-   .weak      TIM2_IRQHandler
-   .thumb_set TIM2_IRQHandler,Default_Handler
-
-   .weak      TIM21_IRQHandler
-   .thumb_set TIM21_IRQHandler,Default_Handler
-
-   .weak      TIM22_IRQHandler
-   .thumb_set TIM22_IRQHandler,Default_Handler
-
-   .weak      I2C1_IRQHandler
-   .thumb_set I2C1_IRQHandler,Default_Handler
-
-   .weak      SPI1_IRQHandler
-   .thumb_set SPI1_IRQHandler,Default_Handler
-
-   .weak      USART2_IRQHandler
-   .thumb_set USART2_IRQHandler,Default_Handler
-
-   .weak      AES_LPUART1_IRQHandler
-   .thumb_set AES_LPUART1_IRQHandler,Default_Handler
-
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l051xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l051xx.s
deleted file mode 100755
index 4a0c10be..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l051xx.s
+++ /dev/null
@@ -1,284 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l051xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L051xx Devices vector table for Atollic TrueSTUDIO toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * 
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0plus
-  .fpu softvfp
-  .thumb
-
-.global  g_pfnVectors
-.global  Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */
-.word  _sdata
-/* end address for the .data section. defined in linker script */
-.word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-   ldr   r0, =_estack
-   mov   sp, r0          /* set stack pointer */
-
-/* Copy the data segment initializers from flash to SRAM */
-  movs  r1, #0
-  b  LoopCopyDataInit
-
-CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-
-LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl  main
-
-LoopForever:
-    b LoopForever
-
-
-.size  Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0         
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word  WWDG_IRQHandler                   /* Window WatchDog              */
-  .word  PVD_IRQHandler                    /* PVD through EXTI Line detection */
-  .word  RTC_IRQHandler                    /* RTC through the EXTI line     */
-  .word  FLASH_IRQHandler                  /* FLASH                        */
-  .word  RCC_IRQHandler                    /* RCC                          */
-  .word  EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word  EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word  EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word  0                                 /* Reserved                     */
-  .word  DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word  DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word  DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
-  .word  ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
-  .word  LPTIM1_IRQHandler                 /* LPTIM1                       */
-  .word  0                                 /* Reserved                     */
-  .word  TIM2_IRQHandler                   /* TIM2                         */
-  .word  0                                 /* Reserved                     */
-  .word  TIM6_IRQHandler                   /* TIM6                         */
-  .word  0               				           /* Reserved                     */
-  .word  0              					          /* Reserved                     */
-  .word  TIM21_IRQHandler                  /* TIM21                        */
-  .word  0                                 /* Reserved                     */
-  .word  TIM22_IRQHandler                  /* TIM22                        */
-  .word  I2C1_IRQHandler                   /* I2C1                         */
-  .word  I2C2_IRQHandler                   /* I2C2                         */
-  .word  SPI1_IRQHandler                   /* SPI1                         */
-  .word  SPI2_IRQHandler                   /* SPI2                         */
-  .word  USART1_IRQHandler                 /* USART1                       */
-  .word  USART2_IRQHandler                 /* USART2                       */
-  .word  LPUART1_IRQHandler                /* LPUART1                      */
-  .word  0                                 /* Reserved                     */
-  .word  0                                 /* Reserved                     */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-   .weak      NMI_Handler
-   .thumb_set NMI_Handler,Default_Handler
-
-   .weak      HardFault_Handler
-   .thumb_set HardFault_Handler,Default_Handler
-
-   .weak      SVC_Handler
-   .thumb_set SVC_Handler,Default_Handler
-
-   .weak      PendSV_Handler
-   .thumb_set PendSV_Handler,Default_Handler
-
-   .weak      SysTick_Handler
-   .thumb_set SysTick_Handler,Default_Handler
-
-   .weak      WWDG_IRQHandler
-   .thumb_set WWDG_IRQHandler,Default_Handler
-
-   .weak      PVD_IRQHandler
-   .thumb_set PVD_IRQHandler,Default_Handler
-
-   .weak      RTC_IRQHandler
-   .thumb_set RTC_IRQHandler,Default_Handler
-
-   .weak      FLASH_IRQHandler
-   .thumb_set FLASH_IRQHandler,Default_Handler
-
-   .weak      RCC_IRQHandler
-   .thumb_set RCC_IRQHandler,Default_Handler
-
-   .weak      EXTI0_1_IRQHandler
-   .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-   .weak      EXTI2_3_IRQHandler
-   .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-   .weak      EXTI4_15_IRQHandler
-   .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel1_IRQHandler
-   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel2_3_IRQHandler
-   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel4_5_6_7_IRQHandler
-   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
-
-   .weak      ADC1_COMP_IRQHandler
-   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-   .weak      LPTIM1_IRQHandler
-   .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-   .weak      TIM2_IRQHandler
-   .thumb_set TIM2_IRQHandler,Default_Handler
-
-   .weak      TIM6_IRQHandler
-   .thumb_set TIM6_IRQHandler,Default_Handler
-
-   .weak      TIM21_IRQHandler
-   .thumb_set TIM21_IRQHandler,Default_Handler
-
-   .weak      TIM22_IRQHandler
-   .thumb_set TIM22_IRQHandler,Default_Handler
-
-   .weak      I2C1_IRQHandler
-   .thumb_set I2C1_IRQHandler,Default_Handler
-
-   .weak      I2C2_IRQHandler
-   .thumb_set I2C2_IRQHandler,Default_Handler
-
-   .weak      SPI1_IRQHandler
-   .thumb_set SPI1_IRQHandler,Default_Handler
-
-   .weak      SPI2_IRQHandler
-   .thumb_set SPI2_IRQHandler,Default_Handler
-
-   .weak      USART1_IRQHandler
-   .thumb_set USART1_IRQHandler,Default_Handler
-
-   .weak      USART2_IRQHandler
-   .thumb_set USART2_IRQHandler,Default_Handler
-
-   .weak      LPUART1_IRQHandler
-   .thumb_set LPUART1_IRQHandler,Default_Handler
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l052xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l052xx.s
deleted file mode 100755
index d40ff1d2..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l052xx.s
+++ /dev/null
@@ -1,290 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l052xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L052xx Devices vector table for Atollic TrueSTUDIO toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * 
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0plus
-  .fpu softvfp
-  .thumb
-
-.global  g_pfnVectors
-.global  Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */
-.word  _sdata
-/* end address for the .data section. defined in linker script */
-.word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-   ldr   r0, =_estack
-   mov   sp, r0          /* set stack pointer */
-
-/* Copy the data segment initializers from flash to SRAM */
-  movs  r1, #0
-  b  LoopCopyDataInit
-
-CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-
-LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl  main
-
-LoopForever:
-    b LoopForever
-
-
-.size  Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word  WWDG_IRQHandler                   /* Window WatchDog              */
-  .word  PVD_IRQHandler                    /* PVD through EXTI Line detection */
-  .word  RTC_IRQHandler                    /* RTC through the EXTI line     */
-  .word  FLASH_IRQHandler                  /* FLASH                        */
-  .word  RCC_CRS_IRQHandler                /* RCC and CRS                  */
-  .word  EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word  EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word  EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word  TSC_IRQHandler                     /* TSC                           */
-  .word  DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word  DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word  DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
-  .word  ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
-  .word  LPTIM1_IRQHandler                 /* LPTIM1                       */
-  .word  0                                 /* Reserved                     */
-  .word  TIM2_IRQHandler                   /* TIM2                         */
-  .word  0                                 /* Reserved                     */
-  .word  TIM6_DAC_IRQHandler               /* TIM6 and DAC                 */
-  .word  0               				          /* Reserved                     */
-  .word  0              					          /* Reserved                     */
-  .word  TIM21_IRQHandler                  /* TIM21                        */
-  .word  0                                 /* Reserved                     */
-  .word  TIM22_IRQHandler                  /* TIM22                        */
-  .word  I2C1_IRQHandler                   /* I2C1                         */
-  .word  I2C2_IRQHandler                   /* I2C2                         */
-  .word  SPI1_IRQHandler                   /* SPI1                         */
-  .word  SPI2_IRQHandler                   /* SPI2                         */
-  .word  USART1_IRQHandler                 /* USART1                       */
-  .word  USART2_IRQHandler                 /* USART2                       */
-  .word  RNG_LPUART1_IRQHandler            /* RNG and LPUART1              */
-  .word  0                                 /* Reserved                     */
-  .word  USB_IRQHandler                    /* USB                          */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-   .weak      NMI_Handler
-   .thumb_set NMI_Handler,Default_Handler
-
-   .weak      HardFault_Handler
-   .thumb_set HardFault_Handler,Default_Handler
-
-   .weak      SVC_Handler
-   .thumb_set SVC_Handler,Default_Handler
-
-   .weak      PendSV_Handler
-   .thumb_set PendSV_Handler,Default_Handler
-
-   .weak      SysTick_Handler
-   .thumb_set SysTick_Handler,Default_Handler
-
-   .weak      WWDG_IRQHandler
-   .thumb_set WWDG_IRQHandler,Default_Handler
-
-   .weak      PVD_IRQHandler
-   .thumb_set PVD_IRQHandler,Default_Handler
-
-   .weak      RTC_IRQHandler
-   .thumb_set RTC_IRQHandler,Default_Handler
-
-   .weak      FLASH_IRQHandler
-   .thumb_set FLASH_IRQHandler,Default_Handler
-
-   .weak      RCC_CRS_IRQHandler
-   .thumb_set RCC_CRS_IRQHandler,Default_Handler
-
-   .weak      EXTI0_1_IRQHandler
-   .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-   .weak      EXTI2_3_IRQHandler
-   .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-   .weak      EXTI4_15_IRQHandler
-   .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-   .weak      TSC_IRQHandler
-   .thumb_set TSC_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel1_IRQHandler
-   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel2_3_IRQHandler
-   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel4_5_6_7_IRQHandler
-   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
-
-   .weak      ADC1_COMP_IRQHandler
-   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-   .weak      LPTIM1_IRQHandler
-   .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-   .weak      TIM2_IRQHandler
-   .thumb_set TIM2_IRQHandler,Default_Handler
-
-   .weak      TIM6_DAC_IRQHandler
-   .thumb_set TIM6_DAC_IRQHandler,Default_Handler
-
-   .weak      TIM21_IRQHandler
-   .thumb_set TIM21_IRQHandler,Default_Handler
-
-   .weak      TIM22_IRQHandler
-   .thumb_set TIM22_IRQHandler,Default_Handler
-
-   .weak      I2C1_IRQHandler
-   .thumb_set I2C1_IRQHandler,Default_Handler
-
-   .weak      I2C2_IRQHandler
-   .thumb_set I2C2_IRQHandler,Default_Handler
-
-   .weak      SPI1_IRQHandler
-   .thumb_set SPI1_IRQHandler,Default_Handler
-
-   .weak      SPI2_IRQHandler
-   .thumb_set SPI2_IRQHandler,Default_Handler
-
-   .weak      USART1_IRQHandler
-   .thumb_set USART1_IRQHandler,Default_Handler
-
-   .weak      USART2_IRQHandler
-   .thumb_set USART2_IRQHandler,Default_Handler
-
-   .weak      RNG_LPUART1_IRQHandler
-   .thumb_set RNG_LPUART1_IRQHandler,Default_Handler
-
-   .weak      USB_IRQHandler
-   .thumb_set USB_IRQHandler,Default_Handler
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l053xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l053xx.s
deleted file mode 100755
index 272e87c0..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l053xx.s
+++ /dev/null
@@ -1,293 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l053xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L053xx Devices vector table for Atollic TrueSTUDIO toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * 
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0plus
-  .fpu softvfp
-  .thumb
-
-.global  g_pfnVectors
-.global  Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */
-.word  _sdata
-/* end address for the .data section. defined in linker script */
-.word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-  ldr   r0, =_estack
-  mov   sp, r0          /* set stack pointer */
-
-/* Copy the data segment initializers from flash to SRAM */
-  movs  r1, #0
-  b  LoopCopyDataInit
-
-CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-
-LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl  main
-
-LoopForever:
-    b LoopForever
-
-
-.size  Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word     WWDG_IRQHandler                   /* Window WatchDog              */
-  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
-  .word     RTC_IRQHandler                    /* RTC through the EXTI line     */
-  .word     FLASH_IRQHandler                  /* FLASH                        */
-  .word     RCC_CRS_IRQHandler                /* RCC and CRS                  */
-  .word     EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word     EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word     EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word     TSC_IRQHandler                     /* TSC                           */
-  .word     DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word     DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word     DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
-  .word     ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
-  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
-  .word     0                                 /* Reserved                     */
-  .word     TIM2_IRQHandler                   /* TIM2                         */
-  .word     0                                 /* Reserved                     */
-  .word     TIM6_DAC_IRQHandler               /* TIM6 and DAC                 */
-  .word     0               				          /* Reserved                     */
-  .word     0              					          /* Reserved                     */
-  .word     TIM21_IRQHandler                  /* TIM21                        */
-  .word     0                                 /* Reserved                     */
-  .word     TIM22_IRQHandler                  /* TIM22                        */
-  .word     I2C1_IRQHandler                   /* I2C1                         */
-  .word     I2C2_IRQHandler                   /* I2C2                         */
-  .word     SPI1_IRQHandler                   /* SPI1                         */
-  .word     SPI2_IRQHandler                   /* SPI2                         */
-  .word     USART1_IRQHandler                 /* USART1                       */
-  .word     USART2_IRQHandler                 /* USART2                       */
-  .word     RNG_LPUART1_IRQHandler            /* RNG and LPUART1              */
-  .word     LCD_IRQHandler                    /* LCD                          */
-  .word     USB_IRQHandler                    /* USB                          */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-   .weak      NMI_Handler
-   .thumb_set NMI_Handler,Default_Handler
-
-   .weak      HardFault_Handler
-   .thumb_set HardFault_Handler,Default_Handler
-
-   .weak      SVC_Handler
-   .thumb_set SVC_Handler,Default_Handler
-
-   .weak      PendSV_Handler
-   .thumb_set PendSV_Handler,Default_Handler
-
-   .weak      SysTick_Handler
-   .thumb_set SysTick_Handler,Default_Handler
-
-   .weak      WWDG_IRQHandler
-   .thumb_set WWDG_IRQHandler,Default_Handler
-
-   .weak      PVD_IRQHandler
-   .thumb_set PVD_IRQHandler,Default_Handler
-
-   .weak      RTC_IRQHandler
-   .thumb_set RTC_IRQHandler,Default_Handler
-
-   .weak      FLASH_IRQHandler
-   .thumb_set FLASH_IRQHandler,Default_Handler
-
-   .weak      RCC_CRS_IRQHandler
-   .thumb_set RCC_CRS_IRQHandler,Default_Handler
-
-   .weak      EXTI0_1_IRQHandler
-   .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-   .weak      EXTI2_3_IRQHandler
-   .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-   .weak      EXTI4_15_IRQHandler
-   .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-   .weak      TSC_IRQHandler
-   .thumb_set TSC_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel1_IRQHandler
-   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel2_3_IRQHandler
-   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel4_5_6_7_IRQHandler
-   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
-
-   .weak      ADC1_COMP_IRQHandler
-   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-   .weak      LPTIM1_IRQHandler
-   .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-   .weak      TIM2_IRQHandler
-   .thumb_set TIM2_IRQHandler,Default_Handler
-
-   .weak      TIM6_DAC_IRQHandler
-   .thumb_set TIM6_DAC_IRQHandler,Default_Handler
-
-   .weak      TIM21_IRQHandler
-   .thumb_set TIM21_IRQHandler,Default_Handler
-
-   .weak      TIM22_IRQHandler
-   .thumb_set TIM22_IRQHandler,Default_Handler
-
-   .weak      I2C1_IRQHandler
-   .thumb_set I2C1_IRQHandler,Default_Handler
-
-   .weak      I2C2_IRQHandler
-   .thumb_set I2C2_IRQHandler,Default_Handler
-
-   .weak      SPI1_IRQHandler
-   .thumb_set SPI1_IRQHandler,Default_Handler
-
-   .weak      SPI2_IRQHandler
-   .thumb_set SPI2_IRQHandler,Default_Handler
-
-   .weak      USART1_IRQHandler
-   .thumb_set USART1_IRQHandler,Default_Handler
-
-   .weak      USART2_IRQHandler
-   .thumb_set USART2_IRQHandler,Default_Handler
-
-   .weak      RNG_LPUART1_IRQHandler
-   .thumb_set RNG_LPUART1_IRQHandler,Default_Handler
-
-   .weak      LCD_IRQHandler
-   .thumb_set LCD_IRQHandler,Default_Handler
-
-   .weak      USB_IRQHandler
-   .thumb_set USB_IRQHandler,Default_Handler
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l061xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l061xx.s
deleted file mode 100755
index 260519dd..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l061xx.s
+++ /dev/null
@@ -1,284 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l061xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L061xx Devices vector table for Atollic TrueSTUDIO toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * 
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0plus
-  .fpu softvfp
-  .thumb
-
-.global  g_pfnVectors
-.global  Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */
-.word  _sdata
-/* end address for the .data section. defined in linker script */
-.word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-  ldr   r0, =_estack
-  mov   sp, r0          /* set stack pointer */
-
-/* Copy the data segment initializers from flash to SRAM */
-  movs  r1, #0
-  b  LoopCopyDataInit
-
-CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-
-LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl  main
-
-LoopForever:
-    b LoopForever
-
-
-.size  Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word     WWDG_IRQHandler                   /* Window WatchDog              */
-  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
-  .word     RTC_IRQHandler                    /* RTC through the EXTI line     */
-  .word     FLASH_IRQHandler                  /* FLASH                        */
-  .word     RCC_IRQHandler                    /* RCC                          */
-  .word     EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word     EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word     EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word     0                                 /* Reserved                     */
-  .word     DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word     DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word     DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
-  .word     ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
-  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
-  .word     0                                 /* Reserved                     */
-  .word     TIM2_IRQHandler                   /* TIM2                         */
-  .word     0                                 /* Reserved                     */
-  .word     TIM6_IRQHandler                   /* TIM6                         */
-  .word     0               				          /* Reserved                     */
-  .word     0              					          /* Reserved                     */
-  .word     TIM21_IRQHandler                  /* TIM21                        */
-  .word     0                                 /* Reserved                     */
-  .word     TIM22_IRQHandler                  /* TIM22                        */
-  .word     I2C1_IRQHandler                   /* I2C1                         */
-  .word     I2C2_IRQHandler                   /* I2C2                         */
-  .word     SPI1_IRQHandler                   /* SPI1                         */
-  .word     SPI2_IRQHandler                   /* SPI2                         */
-  .word     USART1_IRQHandler                 /* USART1                       */
-  .word     USART2_IRQHandler                 /* USART2                       */
-  .word     AES_LPUART1_IRQHandler            /* AES and LPUART1              */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-   .weak      NMI_Handler
-   .thumb_set NMI_Handler,Default_Handler
-
-   .weak      HardFault_Handler
-   .thumb_set HardFault_Handler,Default_Handler
-
-   .weak      SVC_Handler
-   .thumb_set SVC_Handler,Default_Handler
-
-   .weak      PendSV_Handler
-   .thumb_set PendSV_Handler,Default_Handler
-
-   .weak      SysTick_Handler
-   .thumb_set SysTick_Handler,Default_Handler
-
-   .weak      WWDG_IRQHandler
-   .thumb_set WWDG_IRQHandler,Default_Handler
-
-   .weak      PVD_IRQHandler
-   .thumb_set PVD_IRQHandler,Default_Handler
-
-   .weak      RTC_IRQHandler
-   .thumb_set RTC_IRQHandler,Default_Handler
-
-   .weak      FLASH_IRQHandler
-   .thumb_set FLASH_IRQHandler,Default_Handler
-
-   .weak      RCC_IRQHandler
-   .thumb_set RCC_IRQHandler,Default_Handler
-
-   .weak      EXTI0_1_IRQHandler
-   .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-   .weak      EXTI2_3_IRQHandler
-   .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-   .weak      EXTI4_15_IRQHandler
-   .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel1_IRQHandler
-   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel2_3_IRQHandler
-   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel4_5_6_7_IRQHandler
-   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
-
-   .weak      ADC1_COMP_IRQHandler
-   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-   .weak      LPTIM1_IRQHandler
-   .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-   .weak      TIM2_IRQHandler
-   .thumb_set TIM2_IRQHandler,Default_Handler
-
-   .weak      TIM6_IRQHandler
-   .thumb_set TIM6_IRQHandler,Default_Handler
-
-   .weak      TIM21_IRQHandler
-   .thumb_set TIM21_IRQHandler,Default_Handler
-
-   .weak      TIM22_IRQHandler
-   .thumb_set TIM22_IRQHandler,Default_Handler
-
-   .weak      I2C1_IRQHandler
-   .thumb_set I2C1_IRQHandler,Default_Handler
-
-   .weak      I2C2_IRQHandler
-   .thumb_set I2C2_IRQHandler,Default_Handler
-
-   .weak      SPI1_IRQHandler
-   .thumb_set SPI1_IRQHandler,Default_Handler
-
-   .weak      SPI2_IRQHandler
-   .thumb_set SPI2_IRQHandler,Default_Handler
-
-   .weak      USART1_IRQHandler
-   .thumb_set USART1_IRQHandler,Default_Handler
-
-   .weak      USART2_IRQHandler
-   .thumb_set USART2_IRQHandler,Default_Handler
-
-   .weak      AES_LPUART1_IRQHandler
-   .thumb_set AES_LPUART1_IRQHandler,Default_Handler
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l062xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l062xx.s
deleted file mode 100755
index 4fce717a..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l062xx.s
+++ /dev/null
@@ -1,290 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l062xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L062xx Devices vector table for Atollic TrueSTUDIO toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * 
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0plus
-  .fpu softvfp
-  .thumb
-
-.global  g_pfnVectors
-.global  Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */
-.word  _sdata
-/* end address for the .data section. defined in linker script */
-.word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-   ldr   r0, =_estack
-   mov   sp, r0          /* set stack pointer */
-
-/* Copy the data segment initializers from flash to SRAM */
-  movs  r1, #0
-  b  LoopCopyDataInit
-
-CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-
-LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl  main
-
-LoopForever:
-    b LoopForever
-
-
-.size  Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word     WWDG_IRQHandler                   /* Window WatchDog              */
-  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
-  .word     RTC_IRQHandler                    /* RTC through the EXTI line     */
-  .word     FLASH_IRQHandler                  /* FLASH                        */
-  .word     RCC_CRS_IRQHandler                /* RCC and CRS                  */
-  .word     EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word     EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word     EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word     TSC_IRQHandler                     /* TSC                           */
-  .word     DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word     DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word     DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
-  .word     ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
-  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
-  .word     0                                 /* Reserved                     */
-  .word     TIM2_IRQHandler                   /* TIM2                         */
-  .word     0                                 /* Reserved                     */
-  .word     TIM6_DAC_IRQHandler               /* TIM6 and DAC                 */
-  .word     0               				          /* Reserved                     */
-  .word     0              					          /* Reserved                     */
-  .word     TIM21_IRQHandler                  /* TIM21                        */
-  .word     0                                 /* Reserved                     */
-  .word     TIM22_IRQHandler                  /* TIM22                        */
-  .word     I2C1_IRQHandler                   /* I2C1                         */
-  .word     I2C2_IRQHandler                   /* I2C2                         */
-  .word     SPI1_IRQHandler                   /* SPI1                         */
-  .word     SPI2_IRQHandler                   /* SPI2                         */
-  .word     USART1_IRQHandler                 /* USART1                       */
-  .word     USART2_IRQHandler                 /* USART2                       */
-  .word     AES_RNG_LPUART1_IRQHandler        /* AES, RNG and LPUART1         */
-  .word     0                                 /* Reserved                     */
-  .word     USB_IRQHandler                    /* USB                          */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-   .weak      NMI_Handler
-   .thumb_set NMI_Handler,Default_Handler
-
-   .weak      HardFault_Handler
-   .thumb_set HardFault_Handler,Default_Handler
-
-   .weak      SVC_Handler
-   .thumb_set SVC_Handler,Default_Handler
-
-   .weak      PendSV_Handler
-   .thumb_set PendSV_Handler,Default_Handler
-
-   .weak      SysTick_Handler
-   .thumb_set SysTick_Handler,Default_Handler
-
-   .weak      WWDG_IRQHandler
-   .thumb_set WWDG_IRQHandler,Default_Handler
-
-   .weak      PVD_IRQHandler
-   .thumb_set PVD_IRQHandler,Default_Handler
-
-   .weak      RTC_IRQHandler
-   .thumb_set RTC_IRQHandler,Default_Handler
-
-   .weak      FLASH_IRQHandler
-   .thumb_set FLASH_IRQHandler,Default_Handler
-
-   .weak      RCC_CRS_IRQHandler
-   .thumb_set RCC_CRS_IRQHandler,Default_Handler
-
-   .weak      EXTI0_1_IRQHandler
-   .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-   .weak      EXTI2_3_IRQHandler
-   .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-   .weak      EXTI4_15_IRQHandler
-   .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-   .weak      TSC_IRQHandler
-   .thumb_set TSC_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel1_IRQHandler
-   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel2_3_IRQHandler
-   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel4_5_6_7_IRQHandler
-   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
-
-   .weak      ADC1_COMP_IRQHandler
-   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-   .weak      LPTIM1_IRQHandler
-   .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-   .weak      TIM2_IRQHandler
-   .thumb_set TIM2_IRQHandler,Default_Handler
-
-   .weak      TIM6_DAC_IRQHandler
-   .thumb_set TIM6_DAC_IRQHandler,Default_Handler
-
-   .weak      TIM21_IRQHandler
-   .thumb_set TIM21_IRQHandler,Default_Handler
-
-   .weak      TIM22_IRQHandler
-   .thumb_set TIM22_IRQHandler,Default_Handler
-
-   .weak      I2C1_IRQHandler
-   .thumb_set I2C1_IRQHandler,Default_Handler
-
-   .weak      I2C2_IRQHandler
-   .thumb_set I2C2_IRQHandler,Default_Handler
-
-   .weak      SPI1_IRQHandler
-   .thumb_set SPI1_IRQHandler,Default_Handler
-
-   .weak      SPI2_IRQHandler
-   .thumb_set SPI2_IRQHandler,Default_Handler
-
-   .weak      USART1_IRQHandler
-   .thumb_set USART1_IRQHandler,Default_Handler
-
-   .weak      USART2_IRQHandler
-   .thumb_set USART2_IRQHandler,Default_Handler
-
-   .weak      AES_RNG_LPUART1_IRQHandler
-   .thumb_set AES_RNG_LPUART1_IRQHandler,Default_Handler
-
-   .weak      USB_IRQHandler
-   .thumb_set USB_IRQHandler,Default_Handler
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l063xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l063xx.s
deleted file mode 100755
index 384a85ca..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l063xx.s
+++ /dev/null
@@ -1,293 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l063xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L063xx Devices vector table for Atollic TrueSTUDIO toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * 
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0plus
-  .fpu softvfp
-  .thumb
-
-.global  g_pfnVectors
-.global  Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */
-.word  _sdata
-/* end address for the .data section. defined in linker script */
-.word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-   ldr   r0, =_estack
-   mov   sp, r0          /* set stack pointer */
-
-/* Copy the data segment initializers from flash to SRAM */
-  movs  r1, #0
-  b  LoopCopyDataInit
-
-CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-
-LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl  main
-
-LoopForever:
-    b LoopForever
-
-
-.size  Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word     WWDG_IRQHandler                   /* Window WatchDog              */
-  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
-  .word     RTC_IRQHandler                    /* RTC through the EXTI line     */
-  .word     FLASH_IRQHandler                  /* FLASH                        */
-  .word     RCC_CRS_IRQHandler                /* RCC and CRS                  */
-  .word     EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word     EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word     EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word     TSC_IRQHandler                     /* TSC                           */
-  .word     DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word     DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word     DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
-  .word     ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
-  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
-  .word     0                                 /* Reserved                     */
-  .word     TIM2_IRQHandler                   /* TIM2                         */
-  .word     0                                 /* Reserved                     */
-  .word     TIM6_DAC_IRQHandler               /* TIM6 and DAC                 */
-  .word     0               				          /* Reserved                     */
-  .word     0              					          /* Reserved                     */
-  .word     TIM21_IRQHandler                  /* TIM21                        */
-  .word     0                                 /* Reserved                     */
-  .word     TIM22_IRQHandler                  /* TIM22                        */
-  .word     I2C1_IRQHandler                   /* I2C1                         */
-  .word     I2C2_IRQHandler                   /* I2C2                         */
-  .word     SPI1_IRQHandler                   /* SPI1                         */
-  .word     SPI2_IRQHandler                   /* SPI2                         */
-  .word     USART1_IRQHandler                 /* USART1                       */
-  .word     USART2_IRQHandler                 /* USART2                       */
-  .word     AES_RNG_LPUART1_IRQHandler        /* AES, RNG and LPUART1         */
-  .word     LCD_IRQHandler                    /* LCD                          */
-  .word     USB_IRQHandler                    /* USB                          */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-   .weak      NMI_Handler
-   .thumb_set NMI_Handler,Default_Handler
-
-   .weak      HardFault_Handler
-   .thumb_set HardFault_Handler,Default_Handler
-
-   .weak      SVC_Handler
-   .thumb_set SVC_Handler,Default_Handler
-
-   .weak      PendSV_Handler
-   .thumb_set PendSV_Handler,Default_Handler
-
-   .weak      SysTick_Handler
-   .thumb_set SysTick_Handler,Default_Handler
-
-   .weak      WWDG_IRQHandler
-   .thumb_set WWDG_IRQHandler,Default_Handler
-
-   .weak      PVD_IRQHandler
-   .thumb_set PVD_IRQHandler,Default_Handler
-
-   .weak      RTC_IRQHandler
-   .thumb_set RTC_IRQHandler,Default_Handler
-
-   .weak      FLASH_IRQHandler
-   .thumb_set FLASH_IRQHandler,Default_Handler
-
-   .weak      RCC_CRS_IRQHandler
-   .thumb_set RCC_CRS_IRQHandler,Default_Handler
-
-   .weak      EXTI0_1_IRQHandler
-   .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-   .weak      EXTI2_3_IRQHandler
-   .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-   .weak      EXTI4_15_IRQHandler
-   .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-   .weak      TSC_IRQHandler
-   .thumb_set TSC_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel1_IRQHandler
-   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel2_3_IRQHandler
-   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel4_5_6_7_IRQHandler
-   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
-
-   .weak      ADC1_COMP_IRQHandler
-   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-   .weak      LPTIM1_IRQHandler
-   .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-   .weak      TIM2_IRQHandler
-   .thumb_set TIM2_IRQHandler,Default_Handler
-
-   .weak      TIM6_DAC_IRQHandler
-   .thumb_set TIM6_DAC_IRQHandler,Default_Handler
-
-   .weak      TIM21_IRQHandler
-   .thumb_set TIM21_IRQHandler,Default_Handler
-
-   .weak      TIM22_IRQHandler
-   .thumb_set TIM22_IRQHandler,Default_Handler
-
-   .weak      I2C1_IRQHandler
-   .thumb_set I2C1_IRQHandler,Default_Handler
-
-   .weak      I2C2_IRQHandler
-   .thumb_set I2C2_IRQHandler,Default_Handler
-
-   .weak      SPI1_IRQHandler
-   .thumb_set SPI1_IRQHandler,Default_Handler
-
-   .weak      SPI2_IRQHandler
-   .thumb_set SPI2_IRQHandler,Default_Handler
-
-   .weak      USART1_IRQHandler
-   .thumb_set USART1_IRQHandler,Default_Handler
-
-   .weak      USART2_IRQHandler
-   .thumb_set USART2_IRQHandler,Default_Handler
-
-   .weak      AES_RNG_LPUART1_IRQHandler
-   .thumb_set AES_RNG_LPUART1_IRQHandler,Default_Handler
-
-   .weak      LCD_IRQHandler
-   .thumb_set LCD_IRQHandler,Default_Handler
-
-   .weak      USB_IRQHandler
-   .thumb_set USB_IRQHandler,Default_Handler
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l071xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l071xx.s
deleted file mode 100755
index 72716ca9..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l071xx.s
+++ /dev/null
@@ -1,296 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l071xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L071xx Devices vector table for Atollic TrueSTUDIO toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * 
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0plus
-  .fpu softvfp
-  .thumb
-
-.global  g_pfnVectors
-.global  Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */
-.word  _sdata
-/* end address for the .data section. defined in linker script */
-.word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-   ldr   r0, =_estack
-   mov   sp, r0          /* set stack pointer */
-
-/* Copy the data segment initializers from flash to SRAM */
-  movs  r1, #0
-  b  LoopCopyDataInit
-
-CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-
-LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl  main
-
-LoopForever:
-    b LoopForever
-
-
-.size  Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word     WWDG_IRQHandler                   /* Window WatchDog              */
-  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
-  .word     RTC_IRQHandler                    /* RTC through the EXTI line     */
-  .word     FLASH_IRQHandler                  /* FLASH                        */
-  .word     RCC_IRQHandler                    /* RCC                          */
-  .word     EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word     EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word     EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word     0                                 /* Reserved                     */
-  .word     DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word     DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word     DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
-  .word     ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
-  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
-  .word     USART4_5_IRQHandler               /* USART4 and USART 5           */
-  .word     TIM2_IRQHandler                   /* TIM2                         */
-  .word     TIM3_IRQHandler                   /* TIM3                         */
-  .word     TIM6_IRQHandler                   /* TIM6 and DAC                 */
-  .word     TIM7_IRQHandler 				          /* TIM7                         */
-  .word     0              					          /* Reserved                     */
-  .word     TIM21_IRQHandler                  /* TIM21                        */
-  .word     I2C3_IRQHandler                   /* I2C3                         */
-  .word     TIM22_IRQHandler                  /* TIM22                        */
-  .word     I2C1_IRQHandler                   /* I2C1                         */
-  .word     I2C2_IRQHandler                   /* I2C2                         */
-  .word     SPI1_IRQHandler                   /* SPI1                         */
-  .word     SPI2_IRQHandler                   /* SPI2                         */
-  .word     USART1_IRQHandler                 /* USART1                       */
-  .word     USART2_IRQHandler                 /* USART2                       */
-  .word     LPUART1_IRQHandler                /* LPUART1                      */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-   .weak      NMI_Handler
-   .thumb_set NMI_Handler,Default_Handler
-
-   .weak      HardFault_Handler
-   .thumb_set HardFault_Handler,Default_Handler
-
-   .weak      SVC_Handler
-   .thumb_set SVC_Handler,Default_Handler
-
-   .weak      PendSV_Handler
-   .thumb_set PendSV_Handler,Default_Handler
-
-   .weak      SysTick_Handler
-   .thumb_set SysTick_Handler,Default_Handler
-
-   .weak      WWDG_IRQHandler
-   .thumb_set WWDG_IRQHandler,Default_Handler
-
-   .weak      PVD_IRQHandler
-   .thumb_set PVD_IRQHandler,Default_Handler
-
-   .weak      RTC_IRQHandler
-   .thumb_set RTC_IRQHandler,Default_Handler
-
-   .weak      FLASH_IRQHandler
-   .thumb_set FLASH_IRQHandler,Default_Handler
-
-   .weak      RCC_IRQHandler
-   .thumb_set RCC_IRQHandler,Default_Handler
-
-   .weak      EXTI0_1_IRQHandler
-   .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-   .weak      EXTI2_3_IRQHandler
-   .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-   .weak      EXTI4_15_IRQHandler
-   .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel1_IRQHandler
-   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel2_3_IRQHandler
-   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel4_5_6_7_IRQHandler
-   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
-
-   .weak      ADC1_COMP_IRQHandler
-   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-   .weak      LPTIM1_IRQHandler
-   .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-   .weak      USART4_5_IRQHandler
-   .thumb_set USART4_5_IRQHandler,Default_Handler
-
-   .weak      TIM2_IRQHandler
-   .thumb_set TIM2_IRQHandler,Default_Handler
-
-   .weak      TIM3_IRQHandler
-   .thumb_set TIM3_IRQHandler,Default_Handler
-
-   .weak      TIM6_IRQHandler
-   .thumb_set TIM6_IRQHandler,Default_Handler
-
-   .weak      TIM7_IRQHandler
-   .thumb_set TIM7_IRQHandler,Default_Handler
-
-   .weak      TIM21_IRQHandler
-   .thumb_set TIM21_IRQHandler,Default_Handler
-
-   .weak      I2C3_IRQHandler
-   .thumb_set I2C3_IRQHandler,Default_Handler
-
-   .weak      TIM22_IRQHandler
-   .thumb_set TIM22_IRQHandler,Default_Handler
-
-   .weak      I2C1_IRQHandler
-   .thumb_set I2C1_IRQHandler,Default_Handler
-
-   .weak      I2C2_IRQHandler
-   .thumb_set I2C2_IRQHandler,Default_Handler
-
-   .weak      SPI1_IRQHandler
-   .thumb_set SPI1_IRQHandler,Default_Handler
-
-   .weak      SPI2_IRQHandler
-   .thumb_set SPI2_IRQHandler,Default_Handler
-
-   .weak      USART1_IRQHandler
-   .thumb_set USART1_IRQHandler,Default_Handler
-
-   .weak      USART2_IRQHandler
-   .thumb_set USART2_IRQHandler,Default_Handler
-
-   .weak      LPUART1_IRQHandler
-   .thumb_set LPUART1_IRQHandler,Default_Handler
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l072xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l072xx.s
deleted file mode 100755
index 8174b1be..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l072xx.s
+++ /dev/null
@@ -1,302 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l072xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L072xx Devices vector table for Atollic TrueSTUDIO toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * 
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0plus
-  .fpu softvfp
-  .thumb
-
-.global  g_pfnVectors
-.global  Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */
-.word  _sdata
-/* end address for the .data section. defined in linker script */
-.word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-   ldr   r0, =_estack
-   mov   sp, r0          /* set stack pointer */
-
-/* Copy the data segment initializers from flash to SRAM */
-  movs  r1, #0
-  b  LoopCopyDataInit
-
-CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-
-LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl  main
-
-LoopForever:
-    b LoopForever
-
-
-.size  Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word     WWDG_IRQHandler                   /* Window WatchDog              */
-  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
-  .word     RTC_IRQHandler                    /* RTC through the EXTI line     */
-  .word     FLASH_IRQHandler                  /* FLASH                        */
-  .word     RCC_CRS_IRQHandler                /* RCC and CRS                  */
-  .word     EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word     EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word     EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word     TSC_IRQHandler                     /* TSC                           */
-  .word     DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word     DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word     DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
-  .word     ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
-  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
-  .word     USART4_5_IRQHandler               /* USART4 and USART 5           */
-  .word     TIM2_IRQHandler                   /* TIM2                         */
-  .word     TIM3_IRQHandler                   /* TIM3                         */
-  .word     TIM6_DAC_IRQHandler               /* TIM6 and DAC                 */
-  .word     TIM7_IRQHandler 				          /* TIM7                         */
-  .word     0              					          /* Reserved                     */
-  .word     TIM21_IRQHandler                  /* TIM21                        */
-  .word     I2C3_IRQHandler                   /* I2C3                         */
-  .word     TIM22_IRQHandler                  /* TIM22                        */
-  .word     I2C1_IRQHandler                   /* I2C1                         */
-  .word     I2C2_IRQHandler                   /* I2C2                         */
-  .word     SPI1_IRQHandler                   /* SPI1                         */
-  .word     SPI2_IRQHandler                   /* SPI2                         */
-  .word     USART1_IRQHandler                 /* USART1                       */
-  .word     USART2_IRQHandler                 /* USART2                       */
-  .word     RNG_LPUART1_IRQHandler            /* RNG and LPUART1              */
-  .word     0                                 /* Reserved                     */
-  .word     USB_IRQHandler                    /* USB                          */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-   .weak      NMI_Handler
-   .thumb_set NMI_Handler,Default_Handler
-
-   .weak      HardFault_Handler
-   .thumb_set HardFault_Handler,Default_Handler
-
-   .weak      SVC_Handler
-   .thumb_set SVC_Handler,Default_Handler
-
-   .weak      PendSV_Handler
-   .thumb_set PendSV_Handler,Default_Handler
-
-   .weak      SysTick_Handler
-   .thumb_set SysTick_Handler,Default_Handler
-
-   .weak      WWDG_IRQHandler
-   .thumb_set WWDG_IRQHandler,Default_Handler
-
-   .weak      PVD_IRQHandler
-   .thumb_set PVD_IRQHandler,Default_Handler
-
-   .weak      RTC_IRQHandler
-   .thumb_set RTC_IRQHandler,Default_Handler
-
-   .weak      FLASH_IRQHandler
-   .thumb_set FLASH_IRQHandler,Default_Handler
-
-   .weak      RCC_CRS_IRQHandler
-   .thumb_set RCC_CRS_IRQHandler,Default_Handler
-
-   .weak      EXTI0_1_IRQHandler
-   .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-   .weak      EXTI2_3_IRQHandler
-   .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-   .weak      EXTI4_15_IRQHandler
-   .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-   .weak      TSC_IRQHandler
-   .thumb_set TSC_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel1_IRQHandler
-   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel2_3_IRQHandler
-   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel4_5_6_7_IRQHandler
-   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
-
-   .weak      ADC1_COMP_IRQHandler
-   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-   .weak      LPTIM1_IRQHandler
-   .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-   .weak      USART4_5_IRQHandler
-   .thumb_set USART4_5_IRQHandler,Default_Handler
-
-   .weak      TIM2_IRQHandler
-   .thumb_set TIM2_IRQHandler,Default_Handler
-
-   .weak      TIM3_IRQHandler
-   .thumb_set TIM3_IRQHandler,Default_Handler
-
-   .weak      TIM6_DAC_IRQHandler
-   .thumb_set TIM6_DAC_IRQHandler,Default_Handler
-
-   .weak      TIM7_IRQHandler
-   .thumb_set TIM7_IRQHandler,Default_Handler
-
-   .weak      TIM21_IRQHandler
-   .thumb_set TIM21_IRQHandler,Default_Handler
-
-   .weak      I2C3_IRQHandler
-   .thumb_set I2C3_IRQHandler,Default_Handler
-
-   .weak      TIM22_IRQHandler
-   .thumb_set TIM22_IRQHandler,Default_Handler
-
-   .weak      I2C1_IRQHandler
-   .thumb_set I2C1_IRQHandler,Default_Handler
-
-   .weak      I2C2_IRQHandler
-   .thumb_set I2C2_IRQHandler,Default_Handler
-
-   .weak      SPI1_IRQHandler
-   .thumb_set SPI1_IRQHandler,Default_Handler
-
-   .weak      SPI2_IRQHandler
-   .thumb_set SPI2_IRQHandler,Default_Handler
-
-   .weak      USART1_IRQHandler
-   .thumb_set USART1_IRQHandler,Default_Handler
-
-   .weak      USART2_IRQHandler
-   .thumb_set USART2_IRQHandler,Default_Handler
-
-   .weak      RNG_LPUART1_IRQHandler
-   .thumb_set RNG_LPUART1_IRQHandler,Default_Handler
-
-   .weak      USB_IRQHandler
-   .thumb_set USB_IRQHandler,Default_Handler
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l073xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l073xx.s
deleted file mode 100755
index a2e76f44..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l073xx.s
+++ /dev/null
@@ -1,305 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l073xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L073xx Devices vector table for Atollic TrueSTUDIO toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * 
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0plus
-  .fpu softvfp
-  .thumb
-
-.global  g_pfnVectors
-.global  Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */
-.word  _sdata
-/* end address for the .data section. defined in linker script */
-.word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-   ldr   r0, =_estack
-   mov   sp, r0          /* set stack pointer */
-
-/* Copy the data segment initializers from flash to SRAM */
-  movs  r1, #0
-  b  LoopCopyDataInit
-
-CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-
-LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl  main
-
-LoopForever:
-    b LoopForever
-
-
-.size  Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word     WWDG_IRQHandler                   /* Window WatchDog              */
-  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
-  .word     RTC_IRQHandler                    /* RTC through the EXTI line     */
-  .word     FLASH_IRQHandler                  /* FLASH                        */
-  .word     RCC_CRS_IRQHandler                /* RCC and CRS                  */
-  .word     EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word     EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word     EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word     TSC_IRQHandler                     /* TSC                           */
-  .word     DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word     DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word     DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
-  .word     ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
-  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
-  .word     USART4_5_IRQHandler               /* USART4 and USART 5           */
-  .word     TIM2_IRQHandler                   /* TIM2                         */
-  .word     TIM3_IRQHandler                   /* TIM3                         */
-  .word     TIM6_DAC_IRQHandler               /* TIM6 and DAC                 */
-  .word     TIM7_IRQHandler 				          /* TIM7                         */
-  .word     0              					          /* Reserved                     */
-  .word     TIM21_IRQHandler                  /* TIM21                        */
-  .word     I2C3_IRQHandler                   /* I2C3                         */
-  .word     TIM22_IRQHandler                  /* TIM22                        */
-  .word     I2C1_IRQHandler                   /* I2C1                         */
-  .word     I2C2_IRQHandler                   /* I2C2                         */
-  .word     SPI1_IRQHandler                   /* SPI1                         */
-  .word     SPI2_IRQHandler                   /* SPI2                         */
-  .word     USART1_IRQHandler                 /* USART1                       */
-  .word     USART2_IRQHandler                 /* USART2                       */
-  .word     RNG_LPUART1_IRQHandler            /* RNG and LPUART1              */
-  .word     LCD_IRQHandler                    /* LCD                          */
-  .word     USB_IRQHandler                    /* USB                          */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-   .weak      NMI_Handler
-   .thumb_set NMI_Handler,Default_Handler
-
-   .weak      HardFault_Handler
-   .thumb_set HardFault_Handler,Default_Handler
-
-   .weak      SVC_Handler
-   .thumb_set SVC_Handler,Default_Handler
-
-   .weak      PendSV_Handler
-   .thumb_set PendSV_Handler,Default_Handler
-
-   .weak      SysTick_Handler
-   .thumb_set SysTick_Handler,Default_Handler
-
-   .weak      WWDG_IRQHandler
-   .thumb_set WWDG_IRQHandler,Default_Handler
-
-   .weak      PVD_IRQHandler
-   .thumb_set PVD_IRQHandler,Default_Handler
-
-   .weak      RTC_IRQHandler
-   .thumb_set RTC_IRQHandler,Default_Handler
-
-   .weak      FLASH_IRQHandler
-   .thumb_set FLASH_IRQHandler,Default_Handler
-
-   .weak      RCC_CRS_IRQHandler
-   .thumb_set RCC_CRS_IRQHandler,Default_Handler
-
-   .weak      EXTI0_1_IRQHandler
-   .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-   .weak      EXTI2_3_IRQHandler
-   .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-   .weak      EXTI4_15_IRQHandler
-   .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-   .weak      TSC_IRQHandler
-   .thumb_set TSC_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel1_IRQHandler
-   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel2_3_IRQHandler
-   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel4_5_6_7_IRQHandler
-   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
-
-   .weak      ADC1_COMP_IRQHandler
-   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-   .weak      LPTIM1_IRQHandler
-   .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-   .weak      USART4_5_IRQHandler
-   .thumb_set USART4_5_IRQHandler,Default_Handler
-
-   .weak      TIM2_IRQHandler
-   .thumb_set TIM2_IRQHandler,Default_Handler
-
-   .weak      TIM3_IRQHandler
-   .thumb_set TIM3_IRQHandler,Default_Handler
-
-   .weak      TIM6_DAC_IRQHandler
-   .thumb_set TIM6_DAC_IRQHandler,Default_Handler
-
-   .weak      TIM7_IRQHandler
-   .thumb_set TIM7_IRQHandler,Default_Handler
-
-   .weak      TIM21_IRQHandler
-   .thumb_set TIM21_IRQHandler,Default_Handler
-
-   .weak      I2C3_IRQHandler
-   .thumb_set I2C3_IRQHandler,Default_Handler
-
-   .weak      TIM22_IRQHandler
-   .thumb_set TIM22_IRQHandler,Default_Handler
-
-   .weak      I2C1_IRQHandler
-   .thumb_set I2C1_IRQHandler,Default_Handler
-
-   .weak      I2C2_IRQHandler
-   .thumb_set I2C2_IRQHandler,Default_Handler
-
-   .weak      SPI1_IRQHandler
-   .thumb_set SPI1_IRQHandler,Default_Handler
-
-   .weak      SPI2_IRQHandler
-   .thumb_set SPI2_IRQHandler,Default_Handler
-
-   .weak      USART1_IRQHandler
-   .thumb_set USART1_IRQHandler,Default_Handler
-
-   .weak      USART2_IRQHandler
-   .thumb_set USART2_IRQHandler,Default_Handler
-
-   .weak      RNG_LPUART1_IRQHandler
-   .thumb_set RNG_LPUART1_IRQHandler,Default_Handler
-
-   .weak      LCD_IRQHandler
-   .thumb_set LCD_IRQHandler,Default_Handler
-
-   .weak      USB_IRQHandler
-   .thumb_set USB_IRQHandler,Default_Handler
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l081xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l081xx.s
deleted file mode 100755
index d96e45e7..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l081xx.s
+++ /dev/null
@@ -1,297 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l081xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L081xx Devices vector table for Atollic TrueSTUDIO toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * 
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0plus
-  .fpu softvfp
-  .thumb
-
-.global  g_pfnVectors
-.global  Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */
-.word  _sdata
-/* end address for the .data section. defined in linker script */
-.word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-   ldr   r0, =_estack
-   mov   sp, r0          /* set stack pointer */
-
-/* Copy the data segment initializers from flash to SRAM */
-  movs  r1, #0
-  b  LoopCopyDataInit
-
-CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-
-LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl  main
-
-LoopForever:
-    b LoopForever
-
-
-.size  Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word     WWDG_IRQHandler                   /* Window WatchDog              */
-  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
-  .word     RTC_IRQHandler                    /* RTC through the EXTI line     */
-  .word     FLASH_IRQHandler                  /* FLASH                        */
-  .word     RCC_IRQHandler                    /* RCC                          */
-  .word     EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word     EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word     EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word     0                                 /* Reserved                     */
-  .word     DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word     DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word     DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
-  .word     ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
-  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
-  .word     USART4_5_IRQHandler               /* USART4 and USART 5           */
-  .word     TIM2_IRQHandler                   /* TIM2                         */
-  .word     TIM3_IRQHandler                   /* TIM3                         */
-  .word     TIM6_IRQHandler                   /* TIM6                         */
-  .word     TIM7_IRQHandler 				          /* TIM7                         */
-  .word     0              					          /* Reserved                     */
-  .word     TIM21_IRQHandler                  /* TIM21                        */
-  .word     I2C3_IRQHandler                   /* I2C3                         */
-  .word     TIM22_IRQHandler                  /* TIM22                        */
-  .word     I2C1_IRQHandler                   /* I2C1                         */
-  .word     I2C2_IRQHandler                   /* I2C2                         */
-  .word     SPI1_IRQHandler                   /* SPI1                         */
-  .word     SPI2_IRQHandler                   /* SPI2                         */
-  .word     USART1_IRQHandler                 /* USART1                       */
-  .word     USART2_IRQHandler                 /* USART2                       */
-  .word     AES_LPUART1_IRQHandler            /* AES and LPUART1              */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-   .weak      NMI_Handler
-   .thumb_set NMI_Handler,Default_Handler
-
-   .weak      HardFault_Handler
-   .thumb_set HardFault_Handler,Default_Handler
-
-   .weak      SVC_Handler
-   .thumb_set SVC_Handler,Default_Handler
-
-   .weak      PendSV_Handler
-   .thumb_set PendSV_Handler,Default_Handler
-
-   .weak      SysTick_Handler
-   .thumb_set SysTick_Handler,Default_Handler
-
-   .weak      WWDG_IRQHandler
-   .thumb_set WWDG_IRQHandler,Default_Handler
-
-   .weak      PVD_IRQHandler
-   .thumb_set PVD_IRQHandler,Default_Handler
-
-   .weak      RTC_IRQHandler
-   .thumb_set RTC_IRQHandler,Default_Handler
-
-   .weak      FLASH_IRQHandler
-   .thumb_set FLASH_IRQHandler,Default_Handler
-
-   .weak      RCC_IRQHandler
-   .thumb_set RCC_IRQHandler,Default_Handler
-
-   .weak      EXTI0_1_IRQHandler
-   .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-   .weak      EXTI2_3_IRQHandler
-   .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-   .weak      EXTI4_15_IRQHandler
-   .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel1_IRQHandler
-   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel2_3_IRQHandler
-   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel4_5_6_7_IRQHandler
-   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
-
-   .weak      ADC1_COMP_IRQHandler
-   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-   .weak      LPTIM1_IRQHandler
-   .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-   .weak      USART4_5_IRQHandler
-   .thumb_set USART4_5_IRQHandler,Default_Handler
-
-   .weak      TIM2_IRQHandler
-   .thumb_set TIM2_IRQHandler,Default_Handler
-
-   .weak      TIM3_IRQHandler
-   .thumb_set TIM3_IRQHandler,Default_Handler
-
-   .weak      TIM6_IRQHandler
-   .thumb_set TIM6_IRQHandler,Default_Handler
-
-   .weak      TIM7_IRQHandler
-   .thumb_set TIM7_IRQHandler,Default_Handler
-
-   .weak      TIM21_IRQHandler
-   .thumb_set TIM21_IRQHandler,Default_Handler
-
-   .weak      I2C3_IRQHandler
-   .thumb_set I2C3_IRQHandler,Default_Handler
-
-   .weak      TIM22_IRQHandler
-   .thumb_set TIM22_IRQHandler,Default_Handler
-
-   .weak      I2C1_IRQHandler
-   .thumb_set I2C1_IRQHandler,Default_Handler
-
-   .weak      I2C2_IRQHandler
-   .thumb_set I2C2_IRQHandler,Default_Handler
-
-   .weak      SPI1_IRQHandler
-   .thumb_set SPI1_IRQHandler,Default_Handler
-
-   .weak      SPI2_IRQHandler
-   .thumb_set SPI2_IRQHandler,Default_Handler
-
-   .weak      USART1_IRQHandler
-   .thumb_set USART1_IRQHandler,Default_Handler
-
-   .weak      USART2_IRQHandler
-   .thumb_set USART2_IRQHandler,Default_Handler
-
-   .weak      AES_LPUART1_IRQHandler
-   .thumb_set AES_LPUART1_IRQHandler,Default_Handler
-
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l082xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l082xx.s
deleted file mode 100755
index 27f600a4..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l082xx.s
+++ /dev/null
@@ -1,302 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l082xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L082xx Devices vector table for Atollic TrueSTUDIO toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * 
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0plus
-  .fpu softvfp
-  .thumb
-
-.global  g_pfnVectors
-.global  Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */
-.word  _sdata
-/* end address for the .data section. defined in linker script */
-.word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-   ldr   r0, =_estack
-   mov   sp, r0          /* set stack pointer */
-
-/* Copy the data segment initializers from flash to SRAM */
-  movs  r1, #0
-  b  LoopCopyDataInit
-
-CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-
-LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl  main
-
-LoopForever:
-    b LoopForever
-
-
-.size  Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word     WWDG_IRQHandler                   /* Window WatchDog              */
-  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
-  .word     RTC_IRQHandler                    /* RTC through the EXTI line     */
-  .word     FLASH_IRQHandler                  /* FLASH                        */
-  .word     RCC_CRS_IRQHandler                /* RCC and CRS                  */
-  .word     EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word     EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word     EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word     TSC_IRQHandler                     /* TSC                           */
-  .word     DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word     DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word     DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
-  .word     ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
-  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
-  .word     USART4_5_IRQHandler               /* USART4 and USART 5           */
-  .word     TIM2_IRQHandler                   /* TIM2                         */
-  .word     TIM3_IRQHandler                   /* TIM3                         */
-  .word     TIM6_DAC_IRQHandler               /* TIM6 and DAC                 */
-  .word     TIM7_IRQHandler 				          /* TIM7                         */
-  .word     0              					          /* Reserved                     */
-  .word     TIM21_IRQHandler                  /* TIM21                        */
-  .word     I2C3_IRQHandler                   /* I2C3                         */
-  .word     TIM22_IRQHandler                  /* TIM22                        */
-  .word     I2C1_IRQHandler                   /* I2C1                         */
-  .word     I2C2_IRQHandler                   /* I2C2                         */
-  .word     SPI1_IRQHandler                   /* SPI1                         */
-  .word     SPI2_IRQHandler                   /* SPI2                         */
-  .word     USART1_IRQHandler                 /* USART1                       */
-  .word     USART2_IRQHandler                 /* USART2                       */
-  .word     AES_RNG_LPUART1_IRQHandler        /* AES, RNG and LPUART1         */
-  .word     0                                 /* Reserved                     */
-  .word     USB_IRQHandler                    /* USB                          */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-   .weak      NMI_Handler
-   .thumb_set NMI_Handler,Default_Handler
-
-   .weak      HardFault_Handler
-   .thumb_set HardFault_Handler,Default_Handler
-
-   .weak      SVC_Handler
-   .thumb_set SVC_Handler,Default_Handler
-
-   .weak      PendSV_Handler
-   .thumb_set PendSV_Handler,Default_Handler
-
-   .weak      SysTick_Handler
-   .thumb_set SysTick_Handler,Default_Handler
-
-   .weak      WWDG_IRQHandler
-   .thumb_set WWDG_IRQHandler,Default_Handler
-
-   .weak      PVD_IRQHandler
-   .thumb_set PVD_IRQHandler,Default_Handler
-
-   .weak      RTC_IRQHandler
-   .thumb_set RTC_IRQHandler,Default_Handler
-
-   .weak      FLASH_IRQHandler
-   .thumb_set FLASH_IRQHandler,Default_Handler
-
-   .weak      RCC_CRS_IRQHandler
-   .thumb_set RCC_CRS_IRQHandler,Default_Handler
-
-   .weak      EXTI0_1_IRQHandler
-   .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-   .weak      EXTI2_3_IRQHandler
-   .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-   .weak      EXTI4_15_IRQHandler
-   .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-   .weak      TSC_IRQHandler
-   .thumb_set TSC_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel1_IRQHandler
-   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel2_3_IRQHandler
-   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel4_5_6_7_IRQHandler
-   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
-
-   .weak      ADC1_COMP_IRQHandler
-   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-   .weak      LPTIM1_IRQHandler
-   .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-   .weak      USART4_5_IRQHandler
-   .thumb_set USART4_5_IRQHandler,Default_Handler
-
-   .weak      TIM2_IRQHandler
-   .thumb_set TIM2_IRQHandler,Default_Handler
-
-   .weak      TIM3_IRQHandler
-   .thumb_set TIM3_IRQHandler,Default_Handler
-
-   .weak      TIM6_DAC_IRQHandler
-   .thumb_set TIM6_DAC_IRQHandler,Default_Handler
-
-   .weak      TIM7_IRQHandler
-   .thumb_set TIM7_IRQHandler,Default_Handler
-
-   .weak      TIM21_IRQHandler
-   .thumb_set TIM21_IRQHandler,Default_Handler
-
-   .weak      I2C3_IRQHandler
-   .thumb_set I2C3_IRQHandler,Default_Handler
-
-   .weak      TIM22_IRQHandler
-   .thumb_set TIM22_IRQHandler,Default_Handler
-
-   .weak      I2C1_IRQHandler
-   .thumb_set I2C1_IRQHandler,Default_Handler
-
-   .weak      I2C2_IRQHandler
-   .thumb_set I2C2_IRQHandler,Default_Handler
-
-   .weak      SPI1_IRQHandler
-   .thumb_set SPI1_IRQHandler,Default_Handler
-
-   .weak      SPI2_IRQHandler
-   .thumb_set SPI2_IRQHandler,Default_Handler
-
-   .weak      USART1_IRQHandler
-   .thumb_set USART1_IRQHandler,Default_Handler
-
-   .weak      USART2_IRQHandler
-   .thumb_set USART2_IRQHandler,Default_Handler
-
-   .weak      AES_RNG_LPUART1_IRQHandler
-   .thumb_set AES_RNG_LPUART1_IRQHandler,Default_Handler
-
-   .weak      USB_IRQHandler
-   .thumb_set USB_IRQHandler,Default_Handler
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l083xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l083xx.s
deleted file mode 100755
index b7b3d8a2..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l083xx.s
+++ /dev/null
@@ -1,305 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32l083xx.s
-  * @author    MCD Application Team
-  * @brief     STM32L083xx Devices vector table for Atollic TrueSTUDIO toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * 
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0plus
-  .fpu softvfp
-  .thumb
-
-.global  g_pfnVectors
-.global  Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word  _sidata
-/* start address for the .data section. defined in linker script */
-.word  _sdata
-/* end address for the .data section. defined in linker script */
-.word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-   ldr   r0, =_estack
-   mov   sp, r0          /* set stack pointer */
-
-/* Copy the data segment initializers from flash to SRAM */
-  movs  r1, #0
-  b  LoopCopyDataInit
-
-CopyDataInit:
-  ldr  r3, =_sidata
-  ldr  r3, [r3, r1]
-  str  r3, [r0, r1]
-  adds  r1, r1, #4
-
-LoopCopyDataInit:
-  ldr  r0, =_sdata
-  ldr  r3, =_edata
-  adds  r2, r0, r1
-  cmp  r2, r3
-  bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-/* Call static constructors */
-    bl __libc_init_array
-/* Call the application's entry point.*/
-  bl  main
-
-LoopForever:
-    b LoopForever
-
-
-.size  Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
-  .size  Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section  .isr_vector,"a",%progbits
-  .type  g_pfnVectors, %object
-  .size  g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word     WWDG_IRQHandler                   /* Window WatchDog              */
-  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
-  .word     RTC_IRQHandler                    /* RTC through the EXTI line     */
-  .word     FLASH_IRQHandler                  /* FLASH                        */
-  .word     RCC_CRS_IRQHandler                /* RCC and CRS                  */
-  .word     EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word     EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word     EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word     TSC_IRQHandler                     /* TSC                           */
-  .word     DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word     DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word     DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
-  .word     ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
-  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
-  .word     USART4_5_IRQHandler               /* USART4 and USART 5           */
-  .word     TIM2_IRQHandler                   /* TIM2                         */
-  .word     TIM3_IRQHandler                   /* TIM3                         */
-  .word     TIM6_DAC_IRQHandler               /* TIM6 and DAC                 */
-  .word     TIM7_IRQHandler 				          /* TIM7                         */
-  .word     0              					          /* Reserved                     */
-  .word     TIM21_IRQHandler                  /* TIM21                        */
-  .word     I2C3_IRQHandler                   /* I2C3                         */
-  .word     TIM22_IRQHandler                  /* TIM22                        */
-  .word     I2C1_IRQHandler                   /* I2C1                         */
-  .word     I2C2_IRQHandler                   /* I2C2                         */
-  .word     SPI1_IRQHandler                   /* SPI1                         */
-  .word     SPI2_IRQHandler                   /* SPI2                         */
-  .word     USART1_IRQHandler                 /* USART1                       */
-  .word     USART2_IRQHandler                 /* USART2                       */
-  .word     AES_RNG_LPUART1_IRQHandler        /* AES, RNG and LPUART1         */
-  .word     LCD_IRQHandler                    /* LCD                          */
-  .word     USB_IRQHandler                    /* USB                          */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-   .weak      NMI_Handler
-   .thumb_set NMI_Handler,Default_Handler
-
-   .weak      HardFault_Handler
-   .thumb_set HardFault_Handler,Default_Handler
-
-   .weak      SVC_Handler
-   .thumb_set SVC_Handler,Default_Handler
-
-   .weak      PendSV_Handler
-   .thumb_set PendSV_Handler,Default_Handler
-
-   .weak      SysTick_Handler
-   .thumb_set SysTick_Handler,Default_Handler
-
-   .weak      WWDG_IRQHandler
-   .thumb_set WWDG_IRQHandler,Default_Handler
-
-   .weak      PVD_IRQHandler
-   .thumb_set PVD_IRQHandler,Default_Handler
-
-   .weak      RTC_IRQHandler
-   .thumb_set RTC_IRQHandler,Default_Handler
-
-   .weak      FLASH_IRQHandler
-   .thumb_set FLASH_IRQHandler,Default_Handler
-
-   .weak      RCC_CRS_IRQHandler
-   .thumb_set RCC_CRS_IRQHandler,Default_Handler
-
-   .weak      EXTI0_1_IRQHandler
-   .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-   .weak      EXTI2_3_IRQHandler
-   .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-   .weak      EXTI4_15_IRQHandler
-   .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-   .weak      TSC_IRQHandler
-   .thumb_set TSC_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel1_IRQHandler
-   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel2_3_IRQHandler
-   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-   .weak      DMA1_Channel4_5_6_7_IRQHandler
-   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
-
-   .weak      ADC1_COMP_IRQHandler
-   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-   .weak      LPTIM1_IRQHandler
-   .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-   .weak      USART4_5_IRQHandler
-   .thumb_set USART4_5_IRQHandler,Default_Handler
-
-   .weak      TIM2_IRQHandler
-   .thumb_set TIM2_IRQHandler,Default_Handler
-
-   .weak      TIM3_IRQHandler
-   .thumb_set TIM3_IRQHandler,Default_Handler
-
-   .weak      TIM6_DAC_IRQHandler
-   .thumb_set TIM6_DAC_IRQHandler,Default_Handler
-
-   .weak      TIM7_IRQHandler
-   .thumb_set TIM7_IRQHandler,Default_Handler
-
-   .weak      TIM21_IRQHandler
-   .thumb_set TIM21_IRQHandler,Default_Handler
-
-   .weak      I2C3_IRQHandler
-   .thumb_set I2C3_IRQHandler,Default_Handler
-
-   .weak      TIM22_IRQHandler
-   .thumb_set TIM22_IRQHandler,Default_Handler
-
-   .weak      I2C1_IRQHandler
-   .thumb_set I2C1_IRQHandler,Default_Handler
-
-   .weak      I2C2_IRQHandler
-   .thumb_set I2C2_IRQHandler,Default_Handler
-
-   .weak      SPI1_IRQHandler
-   .thumb_set SPI1_IRQHandler,Default_Handler
-
-   .weak      SPI2_IRQHandler
-   .thumb_set SPI2_IRQHandler,Default_Handler
-
-   .weak      USART1_IRQHandler
-   .thumb_set USART1_IRQHandler,Default_Handler
-
-   .weak      USART2_IRQHandler
-   .thumb_set USART2_IRQHandler,Default_Handler
-
-   .weak      AES_RNG_LPUART1_IRQHandler
-   .thumb_set AES_RNG_LPUART1_IRQHandler,Default_Handler
-
-   .weak      LCD_IRQHandler
-   .thumb_set LCD_IRQHandler,Default_Handler
-
-   .weak      USB_IRQHandler
-   .thumb_set USB_IRQHandler,Default_Handler
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l011xx_flash.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l011xx_flash.icf
deleted file mode 100755
index 98e86214..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l011xx_flash.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x08003FFF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__   = 0x200007FF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l011xx_sram.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l011xx_sram.icf
deleted file mode 100755
index da50afe1..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l011xx_sram.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200004FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20000500;
-define symbol __ICFEDIT_region_RAM_end__   = 0x200007FF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l021xx_flash.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l021xx_flash.icf
deleted file mode 100755
index 98e86214..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l021xx_flash.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x08003FFF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__   = 0x200007FF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l021xx_sram.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l021xx_sram.icf
deleted file mode 100755
index da50afe1..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l021xx_sram.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200004FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20000500;
-define symbol __ICFEDIT_region_RAM_end__   = 0x200007FF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l031xx_flash.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l031xx_flash.icf
deleted file mode 100755
index d33707aa..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l031xx_flash.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x08007FFF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20001FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l031xx_sram.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l031xx_sram.icf
deleted file mode 100755
index fbae6600..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l031xx_sram.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200009FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20000A00;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20001FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l041xx_flash.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l041xx_flash.icf
deleted file mode 100755
index d33707aa..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l041xx_flash.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x08007FFF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20001FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l041xx_sram.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l041xx_sram.icf
deleted file mode 100755
index fbae6600..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l041xx_sram.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200009FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20000A00;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20001FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l051xx_flash.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l051xx_flash.icf
deleted file mode 100755
index 990f3dc6..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l051xx_flash.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x0800FFFF;
-define symbol __ICFEDIT_region_RAM_start__  = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__    = 0x20001FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l051xx_sram.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l051xx_sram.icf
deleted file mode 100755
index 4e0a0f33..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l051xx_sram.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20001FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l052xx_flash.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l052xx_flash.icf
deleted file mode 100755
index 990f3dc6..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l052xx_flash.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x0800FFFF;
-define symbol __ICFEDIT_region_RAM_start__  = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__    = 0x20001FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l052xx_sram.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l052xx_sram.icf
deleted file mode 100755
index 4e0a0f33..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l052xx_sram.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20001FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l053xx_flash.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l053xx_flash.icf
deleted file mode 100755
index 990f3dc6..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l053xx_flash.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x0800FFFF;
-define symbol __ICFEDIT_region_RAM_start__  = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__    = 0x20001FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l053xx_sram.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l053xx_sram.icf
deleted file mode 100755
index 4e0a0f33..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l053xx_sram.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20001FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l061xx_flash.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l061xx_flash.icf
deleted file mode 100755
index 990f3dc6..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l061xx_flash.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x0800FFFF;
-define symbol __ICFEDIT_region_RAM_start__  = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__    = 0x20001FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l061xx_sram.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l061xx_sram.icf
deleted file mode 100755
index 4e0a0f33..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l061xx_sram.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20001FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l062xx_flash.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l062xx_flash.icf
deleted file mode 100755
index 990f3dc6..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l062xx_flash.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x0800FFFF;
-define symbol __ICFEDIT_region_RAM_start__  = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__    = 0x20001FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l062xx_sram.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l062xx_sram.icf
deleted file mode 100755
index 4e0a0f33..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l062xx_sram.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20001FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l063xx_flash.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l063xx_flash.icf
deleted file mode 100755
index 990f3dc6..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l063xx_flash.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x0800FFFF;
-define symbol __ICFEDIT_region_RAM_start__  = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__    = 0x20001FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l063xx_sram.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l063xx_sram.icf
deleted file mode 100755
index 4e0a0f33..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l063xx_sram.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20001FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l071xx_flash.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l071xx_flash.icf
deleted file mode 100755
index 4b13211b..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l071xx_flash.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x0802FFFF;
-define symbol __ICFEDIT_region_RAM_start__  = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__    = 0x20004FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l071xx_sram.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l071xx_sram.icf
deleted file mode 100755
index be865fc2..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l071xx_sram.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x20002FFF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20003000;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20004FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l072xx_flash.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l072xx_flash.icf
deleted file mode 100755
index 4b13211b..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l072xx_flash.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x0802FFFF;
-define symbol __ICFEDIT_region_RAM_start__  = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__    = 0x20004FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l072xx_sram.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l072xx_sram.icf
deleted file mode 100755
index be865fc2..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l072xx_sram.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x20002FFF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20003000;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20004FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l073xx_flash.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l073xx_flash.icf
deleted file mode 100755
index 4b13211b..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l073xx_flash.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x0802FFFF;
-define symbol __ICFEDIT_region_RAM_start__  = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__    = 0x20004FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l073xx_sram.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l073xx_sram.icf
deleted file mode 100755
index be865fc2..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l073xx_sram.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x20002FFF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20003000;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20004FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l081xx_flash.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l081xx_flash.icf
deleted file mode 100755
index 4b13211b..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l081xx_flash.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x0802FFFF;
-define symbol __ICFEDIT_region_RAM_start__  = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__    = 0x20004FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l081xx_sram.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l081xx_sram.icf
deleted file mode 100755
index be865fc2..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l081xx_sram.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x20002FFF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20003000;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20004FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l082xx_flash.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l082xx_flash.icf
deleted file mode 100755
index 4b13211b..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l082xx_flash.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x0802FFFF;
-define symbol __ICFEDIT_region_RAM_start__  = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__    = 0x20004FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l082xx_sram.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l082xx_sram.icf
deleted file mode 100755
index be865fc2..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l082xx_sram.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x20002FFF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20003000;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20004FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l083xx_flash.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l083xx_flash.icf
deleted file mode 100755
index 4b13211b..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l083xx_flash.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
-define symbol __ICFEDIT_region_ROM_end__   = 0x0802FFFF;
-define symbol __ICFEDIT_region_RAM_start__  = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__    = 0x20004FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l083xx_sram.icf b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l083xx_sram.icf
deleted file mode 100755
index be865fc2..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/linker/stm32l083xx_sram.icf
+++ /dev/null
@@ -1,33 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x20002FFF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20003000;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20004FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
\ No newline at end of file
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l011xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l011xx.s
deleted file mode 100755
index 5c44ea83..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l011xx.s
+++ /dev/null
@@ -1,300 +0,0 @@
-;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l011xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32L011xx Ultra Low Power Devices vector 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == _iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_IRQHandler                 ; RCC
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     0                              ; Reserved
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     0                              ; Reserved    
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     0                              ; Reserved    
-                DCD     0                              ; Reserved  
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     LPUART1_IRQHandler             ; LPUART1
-                DCD     0                              ; Reserved    
-                DCD     0                              ; Reserved  
-                
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-        LDR     R0, =sfe(CSTACK)          ; set stack pointer
-        MSR     MSP, R0 
-;;Check if boot space corresponds to system memory 
-        LDR R0,=0x00000004
-        LDR R1, [R0]
-        LSRS R1, R1, #24
-        LDR R2,=0x1F
-        CMP R1, R2
-        BNE ApplicationStart       
-;; SYSCFG clock enable         
-        LDR R0,=0x40021034 
-        LDR R1,=0x00000001
-        STR R1, [R0]
-;; Set CFGR1 register with flash memory remap at address 0
-        LDR R0,=0x40010000 
-        LDR R1,=0x00000000
-        STR R1, [R0]
-
-ApplicationStart
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
-        B NMI_Handler
-        
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
-        B HardFault_Handler
-       
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
-        B SVC_Handler
-        
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler  
-        B PendSV_Handler
-        
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-                
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-                
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-                
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-                
-        PUBWEAK RCC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_IRQHandler
-        B RCC_IRQHandler
-        
-                
-        PUBWEAK EXTI0_1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_1_IRQHandler
-        B EXTI0_1_IRQHandler
-        
-                
-        PUBWEAK EXTI2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_3_IRQHandler
-        B EXTI2_3_IRQHandler
-        
-                
-        PUBWEAK EXTI4_15_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_15_IRQHandler
-        B EXTI4_15_IRQHandler
-        
-            
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_3_IRQHandler
-        B DMA1_Channel2_3_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_5_6_7_IRQHandler
-        B DMA1_Channel4_5_6_7_IRQHandler
-        
-                
-        PUBWEAK ADC1_COMP_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_COMP_IRQHandler
-        B ADC1_COMP_IRQHandler
-        
-                 
-        PUBWEAK LPTIM1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPTIM1_IRQHandler
-        B LPTIM1_IRQHandler
-        
-                
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-                
-        PUBWEAK TIM21_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM21_IRQHandler
-        B TIM21_IRQHandler
-        
-
-        PUBWEAK I2C1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_IRQHandler
-        B I2C1_IRQHandler
-        
-                
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-        
-                
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-        
-                
-        PUBWEAK LPUART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPUART1_IRQHandler
-        B LPUART1_IRQHandler
-        
-        END
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l021xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l021xx.s
deleted file mode 100755
index dcaf3c6b..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l021xx.s
+++ /dev/null
@@ -1,299 +0,0 @@
-;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l021xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32L021xx Ultra Low Power Devices vector 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == _iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_IRQHandler                 ; RCC
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     0                              ; Reserved
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     0                              ; Reserved     
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     0                              ; Reserved    
-                DCD     0                              ; Reserved  
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     AES_LPUART1_IRQHandler         ; AES and LPUART1
-                DCD     0                              ; Reserved    
-                DCD     0                              ; Reserved  
-                
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-        LDR     R0, =sfe(CSTACK)          ; set stack pointer
-        MSR     MSP, R0 
-;;Check if boot space corresponds to system memory 
-        LDR R0,=0x00000004
-        LDR R1, [R0]
-        LSRS R1, R1, #24
-        LDR R2,=0x1F
-        CMP R1, R2
-        BNE ApplicationStart       
-;; SYSCFG clock enable         
-        LDR R0,=0x40021034 
-        LDR R1,=0x00000001
-        STR R1, [R0]
-;; Set CFGR1 register with flash memory remap at address 0
-        LDR R0,=0x40010000 
-        LDR R1,=0x00000000
-        STR R1, [R0]
-
-ApplicationStart
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
-        B NMI_Handler
-        
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
-        B HardFault_Handler
-       
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
-        B SVC_Handler
-        
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler  
-        B PendSV_Handler
-        
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-                
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-                
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-                
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-                
-        PUBWEAK RCC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_IRQHandler
-        B RCC_IRQHandler
-        
-                
-        PUBWEAK EXTI0_1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_1_IRQHandler
-        B EXTI0_1_IRQHandler
-        
-                
-        PUBWEAK EXTI2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_3_IRQHandler
-        B EXTI2_3_IRQHandler
-        
-                
-        PUBWEAK EXTI4_15_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_15_IRQHandler
-        B EXTI4_15_IRQHandler
-        
-            
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_3_IRQHandler
-        B DMA1_Channel2_3_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_5_6_7_IRQHandler
-        B DMA1_Channel4_5_6_7_IRQHandler
-        
-                
-        PUBWEAK ADC1_COMP_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_COMP_IRQHandler
-        B ADC1_COMP_IRQHandler
-        
-                 
-        PUBWEAK LPTIM1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPTIM1_IRQHandler
-        B LPTIM1_IRQHandler
-        
-                
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-        
-        PUBWEAK TIM21_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM21_IRQHandler
-        B TIM21_IRQHandler
-
-        PUBWEAK I2C1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_IRQHandler
-        B I2C1_IRQHandler
-        
-                
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-        
-                
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-        
-                
-        PUBWEAK AES_LPUART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-AES_LPUART1_IRQHandler
-        B AES_LPUART1_IRQHandler
-        
-        END
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l031xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l031xx.s
deleted file mode 100755
index 6b63abb0..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l031xx.s
+++ /dev/null
@@ -1,286 +0,0 @@
-;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l031xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32L031xx Ultra Low Power Devices vector 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == _iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_IRQHandler                 ; RCC
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     0                              ; Reserved
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     0                              ; Reserved
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     0                              ; Reserved    
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     0                              ; Reserved    
-                DCD     0                              ; Reserved  
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     LPUART1_IRQHandler             ; LPUART1
-                DCD     0                              ; Reserved    
-                DCD     0                              ; Reserved  
-                
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
-        B NMI_Handler
-        
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
-        B HardFault_Handler
-       
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
-        B SVC_Handler
-        
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler  
-        B PendSV_Handler
-        
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-                
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-                
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-                
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-                
-        PUBWEAK RCC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_IRQHandler
-        B RCC_IRQHandler
-        
-                
-        PUBWEAK EXTI0_1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_1_IRQHandler
-        B EXTI0_1_IRQHandler
-        
-                
-        PUBWEAK EXTI2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_3_IRQHandler
-        B EXTI2_3_IRQHandler
-        
-                
-        PUBWEAK EXTI4_15_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_15_IRQHandler
-        B EXTI4_15_IRQHandler
-        
-            
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_3_IRQHandler
-        B DMA1_Channel2_3_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_5_6_7_IRQHandler
-        B DMA1_Channel4_5_6_7_IRQHandler
-        
-                
-        PUBWEAK ADC1_COMP_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_COMP_IRQHandler
-        B ADC1_COMP_IRQHandler
-        
-                 
-        PUBWEAK LPTIM1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPTIM1_IRQHandler
-        B LPTIM1_IRQHandler
-        
-                
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-                
-        PUBWEAK TIM21_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM21_IRQHandler
-        B TIM21_IRQHandler
-
-        PUBWEAK TIM22_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM22_IRQHandler
-        B TIM22_IRQHandler
-        
-
-        PUBWEAK I2C1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_IRQHandler
-        B I2C1_IRQHandler
-        
-                
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-        
-                
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-        
-                
-        PUBWEAK LPUART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPUART1_IRQHandler
-        B LPUART1_IRQHandler
-        
-        END
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l041xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l041xx.s
deleted file mode 100755
index cb58b0f3..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l041xx.s
+++ /dev/null
@@ -1,287 +0,0 @@
-;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l041xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32L041xx Ultra Low Power Devices vector 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == _iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_IRQHandler                 ; RCC
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     0                              ; Reserved
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     0                              ; Reserved
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     0                              ; Reserved     
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     0                              ; Reserved    
-                DCD     0                              ; Reserved  
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     AES_LPUART1_IRQHandler         ; AES and LPUART1
-                DCD     0                              ; Reserved    
-                DCD     0                              ; Reserved  
-                
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
-        B NMI_Handler
-        
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
-        B HardFault_Handler
-       
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
-        B SVC_Handler
-        
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler  
-        B PendSV_Handler
-        
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-                
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-                
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-                
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-                
-        PUBWEAK RCC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_IRQHandler
-        B RCC_IRQHandler
-        
-                
-        PUBWEAK EXTI0_1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_1_IRQHandler
-        B EXTI0_1_IRQHandler
-        
-                
-        PUBWEAK EXTI2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_3_IRQHandler
-        B EXTI2_3_IRQHandler
-        
-                
-        PUBWEAK EXTI4_15_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_15_IRQHandler
-        B EXTI4_15_IRQHandler
-        
-            
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_3_IRQHandler
-        B DMA1_Channel2_3_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_5_6_7_IRQHandler
-        B DMA1_Channel4_5_6_7_IRQHandler
-        
-                
-        PUBWEAK ADC1_COMP_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_COMP_IRQHandler
-        B ADC1_COMP_IRQHandler
-        
-                 
-        PUBWEAK LPTIM1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPTIM1_IRQHandler
-        B LPTIM1_IRQHandler
-        
-                
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-                
-        
-        PUBWEAK TIM21_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM21_IRQHandler
-        B TIM21_IRQHandler
-
-        PUBWEAK TIM22_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM22_IRQHandler
-        B TIM22_IRQHandler
-        
-
-        PUBWEAK I2C1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_IRQHandler
-        B I2C1_IRQHandler
-        
-                
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-        
-                
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-        
-                
-        PUBWEAK AES_LPUART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-AES_LPUART1_IRQHandler
-        B AES_LPUART1_IRQHandler
-        
-        END
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l051xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l051xx.s
deleted file mode 100755
index 22df0ef6..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l051xx.s
+++ /dev/null
@@ -1,309 +0,0 @@
-;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l051xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32L051xx Ultra Low Power Devices vector 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == _iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_IRQHandler                 ; RCC
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     0                              ; Reserved
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     TIM6_IRQHandler                ; TIM6
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     0                              ; Reserved
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     LPUART1_IRQHandler             ; LPUART1
-                DCD     0                              ; Reserved    
-                DCD     0                              ; Reserved  
-                
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
-        B NMI_Handler
-        
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
-        B HardFault_Handler
-       
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
-        B SVC_Handler
-        
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler  
-        B PendSV_Handler
-        
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-                
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-                
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-                
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-                
-        PUBWEAK RCC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_IRQHandler
-        B RCC_IRQHandler
-        
-                
-        PUBWEAK EXTI0_1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_1_IRQHandler
-        B EXTI0_1_IRQHandler
-        
-                
-        PUBWEAK EXTI2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_3_IRQHandler
-        B EXTI2_3_IRQHandler
-        
-                
-        PUBWEAK EXTI4_15_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_15_IRQHandler
-        B EXTI4_15_IRQHandler
-        
-            
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_3_IRQHandler
-        B DMA1_Channel2_3_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_5_6_7_IRQHandler
-        B DMA1_Channel4_5_6_7_IRQHandler
-        
-                
-        PUBWEAK ADC1_COMP_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_COMP_IRQHandler
-        B ADC1_COMP_IRQHandler
-        
-                 
-        PUBWEAK LPTIM1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPTIM1_IRQHandler
-        B LPTIM1_IRQHandler
-        
-                
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-                
-        PUBWEAK TIM6_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM6_IRQHandler
-        B TIM6_IRQHandler
-        
-        PUBWEAK TIM21_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM21_IRQHandler
-        B TIM21_IRQHandler
-
-        PUBWEAK TIM22_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM22_IRQHandler
-        B TIM22_IRQHandler
-        
-
-        PUBWEAK I2C1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_IRQHandler
-        B I2C1_IRQHandler
-        
-                
-        PUBWEAK I2C2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C2_IRQHandler
-        B I2C2_IRQHandler
-        
-                
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-        
-                
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-        
-                
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-        
-                
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-        
-
-        PUBWEAK LPUART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPUART1_IRQHandler
-        B LPUART1_IRQHandler
-        
-        END
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l052xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l052xx.s
deleted file mode 100755
index 6b6030e8..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l052xx.s
+++ /dev/null
@@ -1,321 +0,0 @@
-;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l052xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32L052xx Ultra Low Power Devices vector 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == _iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_CRS_IRQHandler             ; RCC_CRS
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     TSC_IRQHandler                 ; TSC
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     0                              ; Reserved
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     RNG_LPUART1_IRQHandler         ; RNG and LPUART1
-                DCD     0                              ; Reserved    
-                DCD     USB_IRQHandler                 ; USB
-                
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
-        B NMI_Handler
-        
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
-        B HardFault_Handler
-       
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
-        B SVC_Handler
-        
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler  
-        B PendSV_Handler
-        
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-                
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-                
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-                
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-                
-        PUBWEAK RCC_CRS_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_CRS_IRQHandler
-        B RCC_CRS_IRQHandler
-        
-                
-        PUBWEAK EXTI0_1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_1_IRQHandler
-        B EXTI0_1_IRQHandler
-        
-                
-        PUBWEAK EXTI2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_3_IRQHandler
-        B EXTI2_3_IRQHandler
-        
-                
-        PUBWEAK EXTI4_15_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_15_IRQHandler
-        B EXTI4_15_IRQHandler
-        
-                
-        PUBWEAK TSC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TSC_IRQHandler
-        B TSC_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_3_IRQHandler
-        B DMA1_Channel2_3_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_5_6_7_IRQHandler
-        B DMA1_Channel4_5_6_7_IRQHandler
-        
-                
-        PUBWEAK ADC1_COMP_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_COMP_IRQHandler
-        B ADC1_COMP_IRQHandler
-        
-                 
-        PUBWEAK LPTIM1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPTIM1_IRQHandler
-        B LPTIM1_IRQHandler
-        
-                
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-                
-        PUBWEAK TIM6_DAC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM6_DAC_IRQHandler
-        B TIM6_DAC_IRQHandler
-        
-        PUBWEAK TIM21_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM21_IRQHandler
-        B TIM21_IRQHandler
-
-        PUBWEAK TIM22_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM22_IRQHandler
-        B TIM22_IRQHandler
-        
-
-        PUBWEAK I2C1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_IRQHandler
-        B I2C1_IRQHandler
-        
-                
-        PUBWEAK I2C2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C2_IRQHandler
-        B I2C2_IRQHandler
-        
-                
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-        
-                
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-        
-                
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-        
-                
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-        
-
-        PUBWEAK RNG_LPUART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RNG_LPUART1_IRQHandler
-        B RNG_LPUART1_IRQHandler
-        
-
-        PUBWEAK USB_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USB_IRQHandler
-        B USB_IRQHandler
-        
-        END
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l053xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l053xx.s
deleted file mode 100755
index d61a3e02..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l053xx.s
+++ /dev/null
@@ -1,326 +0,0 @@
-;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l053xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32L053xx Ultra Low Power Devices vector 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == _iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_CRS_IRQHandler             ; RCC_CRS
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     TSC_IRQHandler                 ; TSC
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler                ; TIM21
-                DCD     0                              ; Reserved
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     RNG_LPUART1_IRQHandler         ; RNG and LPUART1
-                DCD     LCD_IRQHandler                 ; LCD
-                DCD     USB_IRQHandler                 ; USB
-                
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
-        B NMI_Handler
-        
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
-        B HardFault_Handler
-       
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
-        B SVC_Handler
-        
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler  
-        B PendSV_Handler
-        
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-                
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-                
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-                
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-                
-        PUBWEAK RCC_CRS_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_CRS_IRQHandler
-        B RCC_CRS_IRQHandler
-        
-                
-        PUBWEAK EXTI0_1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_1_IRQHandler
-        B EXTI0_1_IRQHandler
-        
-                
-        PUBWEAK EXTI2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_3_IRQHandler
-        B EXTI2_3_IRQHandler
-        
-                
-        PUBWEAK EXTI4_15_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_15_IRQHandler
-        B EXTI4_15_IRQHandler
-        
-                
-        PUBWEAK TSC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TSC_IRQHandler
-        B TSC_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_3_IRQHandler
-        B DMA1_Channel2_3_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_5_6_7_IRQHandler
-        B DMA1_Channel4_5_6_7_IRQHandler
-        
-                
-        PUBWEAK ADC1_COMP_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_COMP_IRQHandler
-        B ADC1_COMP_IRQHandler
-        
-                 
-        PUBWEAK LPTIM1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPTIM1_IRQHandler
-        B LPTIM1_IRQHandler
-        
-                
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-                
-        PUBWEAK TIM6_DAC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM6_DAC_IRQHandler
-        B TIM6_DAC_IRQHandler
-        
-        PUBWEAK TIM21_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM21_IRQHandler
-        B TIM21_IRQHandler
-
-        PUBWEAK TIM22_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM22_IRQHandler
-        B TIM22_IRQHandler
-        
-
-        PUBWEAK I2C1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_IRQHandler
-        B I2C1_IRQHandler
-        
-                
-        PUBWEAK I2C2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C2_IRQHandler
-        B I2C2_IRQHandler
-        
-                
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-        
-                
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-        
-                
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-        
-                
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-        
-
-        PUBWEAK RNG_LPUART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RNG_LPUART1_IRQHandler
-        B RNG_LPUART1_IRQHandler
-        
-        
-        PUBWEAK LCD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LCD_IRQHandler
-        B LCD_IRQHandler
-
-        PUBWEAK USB_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USB_IRQHandler
-        B USB_IRQHandler
-        
-        END
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l061xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l061xx.s
deleted file mode 100755
index 83085899..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l061xx.s
+++ /dev/null
@@ -1,309 +0,0 @@
-;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l061xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32L061xx Ultra Low Power Devices vector 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == _iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_IRQHandler             ; RCC
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     0                              ; Reserved
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     TIM6_IRQHandler                ; TIM6
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     0                              ; Reserved
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     AES_LPUART1_IRQHandler         ; AES and LPUART1
-                DCD     0                              ; Reserved    
-                DCD     0                              ; Reserved  
-                
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
-        B NMI_Handler
-        
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
-        B HardFault_Handler
-       
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
-        B SVC_Handler
-        
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler  
-        B PendSV_Handler
-        
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-                
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-                
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-                
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-                
-        PUBWEAK RCC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_IRQHandler
-        B RCC_IRQHandler
-        
-                
-        PUBWEAK EXTI0_1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_1_IRQHandler
-        B EXTI0_1_IRQHandler
-        
-                
-        PUBWEAK EXTI2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_3_IRQHandler
-        B EXTI2_3_IRQHandler
-        
-                
-        PUBWEAK EXTI4_15_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_15_IRQHandler
-        B EXTI4_15_IRQHandler
-        
-            
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_3_IRQHandler
-        B DMA1_Channel2_3_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_5_6_7_IRQHandler
-        B DMA1_Channel4_5_6_7_IRQHandler
-        
-                
-        PUBWEAK ADC1_COMP_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_COMP_IRQHandler
-        B ADC1_COMP_IRQHandler
-        
-                 
-        PUBWEAK LPTIM1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPTIM1_IRQHandler
-        B LPTIM1_IRQHandler
-        
-                
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-                
-        PUBWEAK TIM6_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM6_IRQHandler
-        B TIM6_IRQHandler
-        
-        PUBWEAK TIM21_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM21_IRQHandler
-        B TIM21_IRQHandler
-
-        PUBWEAK TIM22_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM22_IRQHandler
-        B TIM22_IRQHandler
-        
-
-        PUBWEAK I2C1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_IRQHandler
-        B I2C1_IRQHandler
-        
-                
-        PUBWEAK I2C2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C2_IRQHandler
-        B I2C2_IRQHandler
-        
-                
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-        
-                
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-        
-                
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-        
-                
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-        
-
-        PUBWEAK AES_LPUART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-AES_LPUART1_IRQHandler
-        B AES_LPUART1_IRQHandler
-        
-        END
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l062xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l062xx.s
deleted file mode 100755
index ef96c02a..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l062xx.s
+++ /dev/null
@@ -1,321 +0,0 @@
-;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l062xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32L062xx Ultra Low Power Devices vector 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == _iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_CRS_IRQHandler             ; RCC_CRS
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     TSC_IRQHandler                  ; TSC
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler                ; TIM21
-                DCD     0                              ; Reserved
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     AES_RNG_LPUART1_IRQHandler     ; AES, RNG and LPUART1
-                DCD     0                              ; Reserved    
-                DCD     USB_IRQHandler                 ; USB
-                
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
-        B NMI_Handler
-        
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
-        B HardFault_Handler
-       
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
-        B SVC_Handler
-        
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler  
-        B PendSV_Handler
-        
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-                
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-                
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-                
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-                
-        PUBWEAK RCC_CRS_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_CRS_IRQHandler
-        B RCC_CRS_IRQHandler
-        
-                
-        PUBWEAK EXTI0_1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_1_IRQHandler
-        B EXTI0_1_IRQHandler
-        
-                
-        PUBWEAK EXTI2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_3_IRQHandler
-        B EXTI2_3_IRQHandler
-        
-                
-        PUBWEAK EXTI4_15_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_15_IRQHandler
-        B EXTI4_15_IRQHandler
-        
-                
-        PUBWEAK TSC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TSC_IRQHandler
-        B TSC_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_3_IRQHandler
-        B DMA1_Channel2_3_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_5_6_7_IRQHandler
-        B DMA1_Channel4_5_6_7_IRQHandler
-        
-                
-        PUBWEAK ADC1_COMP_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_COMP_IRQHandler
-        B ADC1_COMP_IRQHandler
-        
-                 
-        PUBWEAK LPTIM1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPTIM1_IRQHandler
-        B LPTIM1_IRQHandler
-        
-                
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-                
-        PUBWEAK TIM6_DAC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM6_DAC_IRQHandler
-        B TIM6_DAC_IRQHandler
-        
-        PUBWEAK TIM21_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM21_IRQHandler
-        B TIM21_IRQHandler
-
-        PUBWEAK TIM22_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM22_IRQHandler
-        B TIM22_IRQHandler
-        
-
-        PUBWEAK I2C1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_IRQHandler
-        B I2C1_IRQHandler
-        
-                
-        PUBWEAK I2C2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C2_IRQHandler
-        B I2C2_IRQHandler
-        
-                
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-        
-                
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-        
-                
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-        
-                
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-        
-
-        PUBWEAK AES_RNG_LPUART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-AES_RNG_LPUART1_IRQHandler
-        B AES_RNG_LPUART1_IRQHandler
-        
-
-        PUBWEAK USB_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USB_IRQHandler
-        B USB_IRQHandler
-        
-        END
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l063xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l063xx.s
deleted file mode 100755
index 1d52efbc..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l063xx.s
+++ /dev/null
@@ -1,326 +0,0 @@
-;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l063xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32L063xx Ultra Low Power Devices vector 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == _iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_CRS_IRQHandler             ; RCC_CRS
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     TSC_IRQHandler                  ; TSC
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     0                              ; Reserved
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     0                              ; Reserved
-                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler                ; TIM21
-                DCD     0                              ; Reserved
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     AES_RNG_LPUART1_IRQHandler     ; AES, RNG and LPUART1
-                DCD     LCD_IRQHandler                 ; LCD
-                DCD     USB_IRQHandler                 ; USB
-                
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
-        B NMI_Handler
-        
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
-        B HardFault_Handler
-       
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
-        B SVC_Handler
-        
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler  
-        B PendSV_Handler
-        
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-                
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-                
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-                
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-                
-        PUBWEAK RCC_CRS_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_CRS_IRQHandler
-        B RCC_CRS_IRQHandler
-        
-                
-        PUBWEAK EXTI0_1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_1_IRQHandler
-        B EXTI0_1_IRQHandler
-        
-                
-        PUBWEAK EXTI2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_3_IRQHandler
-        B EXTI2_3_IRQHandler
-        
-                
-        PUBWEAK EXTI4_15_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_15_IRQHandler
-        B EXTI4_15_IRQHandler
-        
-                
-        PUBWEAK TSC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TSC_IRQHandler
-        B TSC_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_3_IRQHandler
-        B DMA1_Channel2_3_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_5_6_7_IRQHandler
-        B DMA1_Channel4_5_6_7_IRQHandler
-        
-                
-        PUBWEAK ADC1_COMP_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_COMP_IRQHandler
-        B ADC1_COMP_IRQHandler
-        
-                 
-        PUBWEAK LPTIM1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPTIM1_IRQHandler
-        B LPTIM1_IRQHandler
-        
-                
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-                
-        PUBWEAK TIM6_DAC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM6_DAC_IRQHandler
-        B TIM6_DAC_IRQHandler
-        
-        PUBWEAK TIM21_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM21_IRQHandler
-        B TIM21_IRQHandler
-
-        PUBWEAK TIM22_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM22_IRQHandler
-        B TIM22_IRQHandler
-        
-
-        PUBWEAK I2C1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_IRQHandler
-        B I2C1_IRQHandler
-        
-                
-        PUBWEAK I2C2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C2_IRQHandler
-        B I2C2_IRQHandler
-        
-                
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-        
-                
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-        
-                
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-        
-                
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-        
-
-        PUBWEAK AES_RNG_LPUART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-AES_RNG_LPUART1_IRQHandler
-        B AES_RNG_LPUART1_IRQHandler
-        
-        
-        PUBWEAK LCD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LCD_IRQHandler
-        B LCD_IRQHandler
-
-        PUBWEAK USB_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USB_IRQHandler
-        B USB_IRQHandler
-        
-        END
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l071xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l071xx.s
deleted file mode 100755
index bc718f7b..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l071xx.s
+++ /dev/null
@@ -1,331 +0,0 @@
-;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l071xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32L071xx Ultra Low Power Devices vector 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == _iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_IRQHandler                 ; RCC
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     0                              ; Reserved
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     USART4_5_IRQHandler            ; USART4 and USART5
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     TIM3_IRQHandler                ; TIM3
-                DCD     TIM6_IRQHandler                ; TIM6
-                DCD     TIM7_IRQHandler                ; TIM7
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     I2C3_IRQHandler                ; I2C3
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     LPUART1_IRQHandler             ; LPUART1
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
-        B NMI_Handler
-        
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
-        B HardFault_Handler
-       
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
-        B SVC_Handler
-        
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler  
-        B PendSV_Handler
-        
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-                
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-                
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-                
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-                
-        PUBWEAK RCC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_IRQHandler
-        B RCC_IRQHandler
-        
-                
-        PUBWEAK EXTI0_1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_1_IRQHandler
-        B EXTI0_1_IRQHandler
-        
-                
-        PUBWEAK EXTI2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_3_IRQHandler
-        B EXTI2_3_IRQHandler
-        
-                
-        PUBWEAK EXTI4_15_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_15_IRQHandler
-        B EXTI4_15_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_3_IRQHandler
-        B DMA1_Channel2_3_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_5_6_7_IRQHandler
-        B DMA1_Channel4_5_6_7_IRQHandler
-        
-                
-        PUBWEAK ADC1_COMP_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_COMP_IRQHandler
-        B ADC1_COMP_IRQHandler
-        
-                 
-        PUBWEAK LPTIM1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPTIM1_IRQHandler
-        B LPTIM1_IRQHandler
-        
-                 
-        PUBWEAK USART4_5_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART4_5_IRQHandler
-        B USART4_5_IRQHandler
-        
-                
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-                
-        PUBWEAK TIM3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM3_IRQHandler
-        B TIM3_IRQHandler
-        
-                
-        PUBWEAK TIM6_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM6_IRQHandler
-        B TIM6_IRQHandler
-                
-        PUBWEAK TIM7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM7_IRQHandler
-        B TIM7_IRQHandler
-        
-        PUBWEAK TIM21_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM21_IRQHandler
-        B TIM21_IRQHandler
-
-        PUBWEAK I2C3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C3_IRQHandler
-        B I2C3_IRQHandler
-
-        PUBWEAK TIM22_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM22_IRQHandler
-        B TIM22_IRQHandler
-        
-
-        PUBWEAK I2C1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_IRQHandler
-        B I2C1_IRQHandler
-        
-                
-        PUBWEAK I2C2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C2_IRQHandler
-        B I2C2_IRQHandler
-        
-                
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-        
-                
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-        
-                
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-        
-                
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-        
-
-        PUBWEAK LPUART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPUART1_IRQHandler
-        B LPUART1_IRQHandler
-        
-        END
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l072xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l072xx.s
deleted file mode 100755
index fe015529..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l072xx.s
+++ /dev/null
@@ -1,343 +0,0 @@
-;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l072xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32L072xx Ultra Low Power Devices vector 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == _iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_CRS_IRQHandler             ; RCC_CRS
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     TSC_IRQHandler                 ; TSC
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     USART4_5_IRQHandler            ; USART4 and USART5
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     TIM3_IRQHandler                ; TIM3
-                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
-                DCD     TIM7_IRQHandler                ; TIM7
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     I2C3_IRQHandler                ; I2C3
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     RNG_LPUART1_IRQHandler         ; RNG and LPUART1
-                DCD     0                              ; Reserved
-                DCD     USB_IRQHandler                 ; USB
-                
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
-        B NMI_Handler
-        
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
-        B HardFault_Handler
-       
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
-        B SVC_Handler
-        
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler  
-        B PendSV_Handler
-        
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-                
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-                
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-                
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-                
-        PUBWEAK RCC_CRS_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_CRS_IRQHandler
-        B RCC_CRS_IRQHandler
-        
-                
-        PUBWEAK EXTI0_1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_1_IRQHandler
-        B EXTI0_1_IRQHandler
-        
-                
-        PUBWEAK EXTI2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_3_IRQHandler
-        B EXTI2_3_IRQHandler
-        
-                
-        PUBWEAK EXTI4_15_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_15_IRQHandler
-        B EXTI4_15_IRQHandler
-        
-                
-        PUBWEAK TSC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TSC_IRQHandler
-        B TSC_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_3_IRQHandler
-        B DMA1_Channel2_3_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_5_6_7_IRQHandler
-        B DMA1_Channel4_5_6_7_IRQHandler
-        
-                
-        PUBWEAK ADC1_COMP_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_COMP_IRQHandler
-        B ADC1_COMP_IRQHandler
-        
-                 
-        PUBWEAK LPTIM1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPTIM1_IRQHandler
-        B LPTIM1_IRQHandler
-        
-                 
-        PUBWEAK USART4_5_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART4_5_IRQHandler
-        B USART4_5_IRQHandler
-        
-                
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-                
-        PUBWEAK TIM3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM3_IRQHandler
-        B TIM3_IRQHandler
-        
-                
-        PUBWEAK TIM6_DAC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM6_DAC_IRQHandler
-        B TIM6_DAC_IRQHandler
-                
-        PUBWEAK TIM7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM7_IRQHandler
-        B TIM7_IRQHandler
-        
-        PUBWEAK TIM21_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM21_IRQHandler
-        B TIM21_IRQHandler
-
-        PUBWEAK I2C3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C3_IRQHandler
-        B I2C3_IRQHandler
-
-        PUBWEAK TIM22_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM22_IRQHandler
-        B TIM22_IRQHandler
-        
-
-        PUBWEAK I2C1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_IRQHandler
-        B I2C1_IRQHandler
-        
-                
-        PUBWEAK I2C2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C2_IRQHandler
-        B I2C2_IRQHandler
-        
-                
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-        
-                
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-        
-                
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-        
-                
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-        
-
-        PUBWEAK RNG_LPUART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RNG_LPUART1_IRQHandler
-        B RNG_LPUART1_IRQHandler
-        
-
-        PUBWEAK USB_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USB_IRQHandler
-        B USB_IRQHandler
-        
-        END
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l073xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l073xx.s
deleted file mode 100755
index a7206505..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l073xx.s
+++ /dev/null
@@ -1,348 +0,0 @@
-;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l073xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32L073xx Ultra Low Power Devices vector 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == _iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_CRS_IRQHandler             ; RCC_CRS
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     TSC_IRQHandler                 ; TSC
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     USART4_5_IRQHandler            ; USART4 and USART5
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     TIM3_IRQHandler                ; TIM3
-                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
-                DCD     TIM7_IRQHandler                ; TIM7
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     I2C3_IRQHandler                ; I2C3
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     RNG_LPUART1_IRQHandler         ; RNG and LPUART1
-                DCD     LCD_IRQHandler                 ; LCD
-                DCD     USB_IRQHandler                 ; USB
-                
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
-        B NMI_Handler
-        
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
-        B HardFault_Handler
-       
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
-        B SVC_Handler
-        
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler  
-        B PendSV_Handler
-        
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-                
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-                
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-                
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-                
-        PUBWEAK RCC_CRS_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_CRS_IRQHandler
-        B RCC_CRS_IRQHandler
-        
-                
-        PUBWEAK EXTI0_1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_1_IRQHandler
-        B EXTI0_1_IRQHandler
-        
-                
-        PUBWEAK EXTI2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_3_IRQHandler
-        B EXTI2_3_IRQHandler
-        
-                
-        PUBWEAK EXTI4_15_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_15_IRQHandler
-        B EXTI4_15_IRQHandler
-        
-                
-        PUBWEAK TSC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TSC_IRQHandler
-        B TSC_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_3_IRQHandler
-        B DMA1_Channel2_3_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_5_6_7_IRQHandler
-        B DMA1_Channel4_5_6_7_IRQHandler
-        
-                
-        PUBWEAK ADC1_COMP_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_COMP_IRQHandler
-        B ADC1_COMP_IRQHandler
-        
-                 
-        PUBWEAK LPTIM1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPTIM1_IRQHandler
-        B LPTIM1_IRQHandler
-        
-                 
-        PUBWEAK USART4_5_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART4_5_IRQHandler
-        B USART4_5_IRQHandler
-        
-                
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-                
-        PUBWEAK TIM3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM3_IRQHandler
-        B TIM3_IRQHandler
-        
-                
-        PUBWEAK TIM6_DAC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM6_DAC_IRQHandler
-        B TIM6_DAC_IRQHandler
-                
-        PUBWEAK TIM7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM7_IRQHandler
-        B TIM7_IRQHandler
-        
-        PUBWEAK TIM21_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM21_IRQHandler
-        B TIM21_IRQHandler
-
-        PUBWEAK I2C3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C3_IRQHandler
-        B I2C3_IRQHandler
-
-        PUBWEAK TIM22_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM22_IRQHandler
-        B TIM22_IRQHandler
-        
-
-        PUBWEAK I2C1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_IRQHandler
-        B I2C1_IRQHandler
-        
-                
-        PUBWEAK I2C2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C2_IRQHandler
-        B I2C2_IRQHandler
-        
-                
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-        
-                
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-        
-                
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-        
-                
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-        
-
-        PUBWEAK RNG_LPUART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RNG_LPUART1_IRQHandler
-        B RNG_LPUART1_IRQHandler
-        
-        
-        PUBWEAK LCD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LCD_IRQHandler
-        B LCD_IRQHandler
-
-        PUBWEAK USB_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USB_IRQHandler
-        B USB_IRQHandler
-        
-        END
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l081xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l081xx.s
deleted file mode 100755
index ed5225bb..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l081xx.s
+++ /dev/null
@@ -1,331 +0,0 @@
-;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l081xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32L081xx Ultra Low Power Devices vector 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == _iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_IRQHandler                 ; RCC
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     0                              ; Reserved
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     USART4_5_IRQHandler            ; USART4 and USART5
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     TIM3_IRQHandler                ; TIM3
-                DCD     TIM6_IRQHandler                ; TIM6
-                DCD     TIM7_IRQHandler                ; TIM7
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     I2C3_IRQHandler                ; I2C3
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     AES_LPUART1_IRQHandler         ; AES and LPUART1
-                DCD     0                              ; Reserved
-                DCD     0                              ; Reserved
-                
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
-        B NMI_Handler
-        
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
-        B HardFault_Handler
-       
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
-        B SVC_Handler
-        
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler  
-        B PendSV_Handler
-        
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-                
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-                
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-                
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-                
-        PUBWEAK RCC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_IRQHandler
-        B RCC_IRQHandler
-        
-                
-        PUBWEAK EXTI0_1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_1_IRQHandler
-        B EXTI0_1_IRQHandler
-        
-                
-        PUBWEAK EXTI2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_3_IRQHandler
-        B EXTI2_3_IRQHandler
-        
-                
-        PUBWEAK EXTI4_15_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_15_IRQHandler
-        B EXTI4_15_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_3_IRQHandler
-        B DMA1_Channel2_3_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_5_6_7_IRQHandler
-        B DMA1_Channel4_5_6_7_IRQHandler
-        
-                
-        PUBWEAK ADC1_COMP_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_COMP_IRQHandler
-        B ADC1_COMP_IRQHandler
-        
-                 
-        PUBWEAK LPTIM1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPTIM1_IRQHandler
-        B LPTIM1_IRQHandler
-        
-                 
-        PUBWEAK USART4_5_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART4_5_IRQHandler
-        B USART4_5_IRQHandler
-        
-                
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-                
-        PUBWEAK TIM3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM3_IRQHandler
-        B TIM3_IRQHandler
-        
-                
-        PUBWEAK TIM6_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM6_IRQHandler
-        B TIM6_IRQHandler
-                
-        PUBWEAK TIM7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM7_IRQHandler
-        B TIM7_IRQHandler
-        
-        PUBWEAK TIM21_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM21_IRQHandler
-        B TIM21_IRQHandler
-
-        PUBWEAK I2C3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C3_IRQHandler
-        B I2C3_IRQHandler
-
-        PUBWEAK TIM22_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM22_IRQHandler
-        B TIM22_IRQHandler
-        
-
-        PUBWEAK I2C1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_IRQHandler
-        B I2C1_IRQHandler
-        
-                
-        PUBWEAK I2C2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C2_IRQHandler
-        B I2C2_IRQHandler
-        
-                
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-        
-                
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-        
-                
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-        
-                
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-        
-
-        PUBWEAK AES_LPUART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-AES_LPUART1_IRQHandler
-        B AES_LPUART1_IRQHandler
-        
-        END
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l082xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l082xx.s
deleted file mode 100755
index 91a109a7..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l082xx.s
+++ /dev/null
@@ -1,343 +0,0 @@
-;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l082xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32L082xx Ultra Low Power Devices vector 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == _iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_CRS_IRQHandler             ; RCC_CRS
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     TSC_IRQHandler                 ; TSC
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     USART4_5_IRQHandler            ; USART4 and USART5
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     TIM3_IRQHandler                ; TIM3
-                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
-                DCD     TIM7_IRQHandler                ; TIM7
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     I2C3_IRQHandler                ; I2C3
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     AES_RNG_LPUART1_IRQHandler     ; AES, RNG and LPUART1
-                DCD     0                              ; Reserved
-                DCD     USB_IRQHandler                 ; USB
-                
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
-        B NMI_Handler
-        
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
-        B HardFault_Handler
-       
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
-        B SVC_Handler
-        
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler  
-        B PendSV_Handler
-        
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-                
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-                
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-                
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-                
-        PUBWEAK RCC_CRS_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_CRS_IRQHandler
-        B RCC_CRS_IRQHandler
-        
-                
-        PUBWEAK EXTI0_1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_1_IRQHandler
-        B EXTI0_1_IRQHandler
-        
-                
-        PUBWEAK EXTI2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_3_IRQHandler
-        B EXTI2_3_IRQHandler
-        
-                
-        PUBWEAK EXTI4_15_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_15_IRQHandler
-        B EXTI4_15_IRQHandler
-        
-                
-        PUBWEAK TSC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TSC_IRQHandler
-        B TSC_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_3_IRQHandler
-        B DMA1_Channel2_3_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_5_6_7_IRQHandler
-        B DMA1_Channel4_5_6_7_IRQHandler
-        
-                
-        PUBWEAK ADC1_COMP_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_COMP_IRQHandler
-        B ADC1_COMP_IRQHandler
-        
-                 
-        PUBWEAK LPTIM1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPTIM1_IRQHandler
-        B LPTIM1_IRQHandler
-        
-                 
-        PUBWEAK USART4_5_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART4_5_IRQHandler
-        B USART4_5_IRQHandler
-        
-                
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-                
-        PUBWEAK TIM3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM3_IRQHandler
-        B TIM3_IRQHandler
-        
-                
-        PUBWEAK TIM6_DAC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM6_DAC_IRQHandler
-        B TIM6_DAC_IRQHandler
-                
-        PUBWEAK TIM7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM7_IRQHandler
-        B TIM7_IRQHandler
-        
-        PUBWEAK TIM21_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM21_IRQHandler
-        B TIM21_IRQHandler
-
-        PUBWEAK I2C3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C3_IRQHandler
-        B I2C3_IRQHandler
-
-        PUBWEAK TIM22_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM22_IRQHandler
-        B TIM22_IRQHandler
-        
-
-        PUBWEAK I2C1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_IRQHandler
-        B I2C1_IRQHandler
-        
-                
-        PUBWEAK I2C2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C2_IRQHandler
-        B I2C2_IRQHandler
-        
-                
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-        
-                
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-        
-                
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-        
-                
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-        
-
-        PUBWEAK AES_RNG_LPUART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-AES_RNG_LPUART1_IRQHandler
-        B AES_RNG_LPUART1_IRQHandler
-        
-
-        PUBWEAK USB_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USB_IRQHandler
-        B USB_IRQHandler
-        
-        END
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l083xx.s b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l083xx.s
deleted file mode 100755
index d6f1a1d5..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l083xx.s
+++ /dev/null
@@ -1,348 +0,0 @@
-;/******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
-;* File Name          : startup_stm32l083xx.s
-;* Author             : MCD Application Team
-;* Version            : V1.7.1
-;* Date               : 25-November-2016
-;* Description        : STM32L083xx Ultra Low Power Devices vector 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == _iar_program_start,
-;*                      - Set the vector table entries with the exceptions ISR 
-;*                        address.
-;*                      - Configure the system clock
-;*                      - Branches to main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the Cortex-M0+ processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;*
-;*******************************************************************************/
-;
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
-
-        MODULE  ?cstartup
-
-        ;; Forward declaration of sections.
-        SECTION CSTACK:DATA:NOROOT(3)
-
-        SECTION .intvec:CODE:NOROOT(2)
-
-        EXTERN  __iar_program_start
-        EXTERN  SystemInit        
-        PUBLIC  __vector_table
-
-        DATA
-__vector_table
-        DCD     sfe(CSTACK)
-        DCD     Reset_Handler             ; Reset Handler
-
-        DCD     NMI_Handler               ; NMI Handler
-        DCD     HardFault_Handler         ; Hard Fault Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     SVC_Handler               ; SVCall Handler
-        DCD     0                         ; Reserved
-        DCD     0                         ; Reserved
-        DCD     PendSV_Handler            ; PendSV Handler
-        DCD     SysTick_Handler           ; SysTick Handler
-
-         ; External Interrupts
-                DCD     WWDG_IRQHandler                ; Window Watchdog
-                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
-                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
-                DCD     FLASH_IRQHandler               ; FLASH
-                DCD     RCC_CRS_IRQHandler             ; RCC_CRS
-                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
-                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
-                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
-                DCD     TSC_IRQHandler                 ; TSC
-                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
-                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
-                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
-                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2 
-                DCD     LPTIM1_IRQHandler              ; LPTIM1
-                DCD     USART4_5_IRQHandler            ; USART4 and USART5
-                DCD     TIM2_IRQHandler                ; TIM2
-                DCD     TIM3_IRQHandler                ; TIM3
-                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
-                DCD     TIM7_IRQHandler                ; TIM7
-                DCD     0                              ; Reserved
-                DCD     TIM21_IRQHandler               ; TIM21
-                DCD     I2C3_IRQHandler                ; I2C3
-                DCD     TIM22_IRQHandler               ; TIM22
-                DCD     I2C1_IRQHandler                ; I2C1
-                DCD     I2C2_IRQHandler                ; I2C2
-                DCD     SPI1_IRQHandler                ; SPI1
-                DCD     SPI2_IRQHandler                ; SPI2
-                DCD     USART1_IRQHandler              ; USART1
-                DCD     USART2_IRQHandler              ; USART2
-                DCD     AES_RNG_LPUART1_IRQHandler     ; AES, RNG and LPUART1
-                DCD     LCD_IRQHandler                 ; LCD
-                DCD     USB_IRQHandler                 ; USB
-                
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
-        THUMB
-        PUBWEAK Reset_Handler
-        SECTION .text:CODE:NOROOT:REORDER(2)
-Reset_Handler
-        LDR     R0, =SystemInit
-        BLX     R0
-        LDR     R0, =__iar_program_start
-        BX      R0
-        
-        PUBWEAK NMI_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-NMI_Handler
-        B NMI_Handler
-        
-        
-        PUBWEAK HardFault_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-HardFault_Handler
-        B HardFault_Handler
-       
-        
-        PUBWEAK SVC_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SVC_Handler
-        B SVC_Handler
-        
-        
-        PUBWEAK PendSV_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PendSV_Handler  
-        B PendSV_Handler
-        
-        
-        PUBWEAK SysTick_Handler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SysTick_Handler
-        B SysTick_Handler
-        
-        
-        PUBWEAK WWDG_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-WWDG_IRQHandler
-        B WWDG_IRQHandler
-        
-                
-        PUBWEAK PVD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-PVD_IRQHandler
-        B PVD_IRQHandler
-        
-                
-        PUBWEAK RTC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RTC_IRQHandler
-        B RTC_IRQHandler
-        
-                
-        PUBWEAK FLASH_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-FLASH_IRQHandler
-        B FLASH_IRQHandler
-        
-                
-        PUBWEAK RCC_CRS_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-RCC_CRS_IRQHandler
-        B RCC_CRS_IRQHandler
-        
-                
-        PUBWEAK EXTI0_1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI0_1_IRQHandler
-        B EXTI0_1_IRQHandler
-        
-                
-        PUBWEAK EXTI2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI2_3_IRQHandler
-        B EXTI2_3_IRQHandler
-        
-                
-        PUBWEAK EXTI4_15_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-EXTI4_15_IRQHandler
-        B EXTI4_15_IRQHandler
-        
-                
-        PUBWEAK TSC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TSC_IRQHandler
-        B TSC_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel1_IRQHandler
-        B DMA1_Channel1_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel2_3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel2_3_IRQHandler
-        B DMA1_Channel2_3_IRQHandler
-        
-                
-        PUBWEAK DMA1_Channel4_5_6_7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-DMA1_Channel4_5_6_7_IRQHandler
-        B DMA1_Channel4_5_6_7_IRQHandler
-        
-                
-        PUBWEAK ADC1_COMP_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-ADC1_COMP_IRQHandler
-        B ADC1_COMP_IRQHandler
-        
-                 
-        PUBWEAK LPTIM1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LPTIM1_IRQHandler
-        B LPTIM1_IRQHandler
-        
-                 
-        PUBWEAK USART4_5_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART4_5_IRQHandler
-        B USART4_5_IRQHandler
-        
-                
-        PUBWEAK TIM2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM2_IRQHandler
-        B TIM2_IRQHandler
-        
-                
-        PUBWEAK TIM3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM3_IRQHandler
-        B TIM3_IRQHandler
-        
-                
-        PUBWEAK TIM6_DAC_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM6_DAC_IRQHandler
-        B TIM6_DAC_IRQHandler
-                
-        PUBWEAK TIM7_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM7_IRQHandler
-        B TIM7_IRQHandler
-        
-        PUBWEAK TIM21_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM21_IRQHandler
-        B TIM21_IRQHandler
-
-        PUBWEAK I2C3_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C3_IRQHandler
-        B I2C3_IRQHandler
-
-        PUBWEAK TIM22_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-TIM22_IRQHandler
-        B TIM22_IRQHandler
-        
-
-        PUBWEAK I2C1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C1_IRQHandler
-        B I2C1_IRQHandler
-        
-                
-        PUBWEAK I2C2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-I2C2_IRQHandler
-        B I2C2_IRQHandler
-        
-                
-        PUBWEAK SPI1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI1_IRQHandler
-        B SPI1_IRQHandler
-        
-                
-        PUBWEAK SPI2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-SPI2_IRQHandler
-        B SPI2_IRQHandler
-        
-                
-        PUBWEAK USART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART1_IRQHandler
-        B USART1_IRQHandler
-        
-                
-        PUBWEAK USART2_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USART2_IRQHandler
-        B USART2_IRQHandler
-        
-
-        PUBWEAK AES_RNG_LPUART1_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-AES_RNG_LPUART1_IRQHandler
-        B AES_RNG_LPUART1_IRQHandler
-        
-        
-        PUBWEAK LCD_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-LCD_IRQHandler
-        B LCD_IRQHandler
-
-        PUBWEAK USB_IRQHandler
-        SECTION .text:CODE:NOROOT:REORDER(1)
-USB_IRQHandler
-        B USB_IRQHandler
-        
-        END
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c b/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c
deleted file mode 100755
index 9ec790eb..00000000
--- a/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c
+++ /dev/null
@@ -1,285 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    system_stm32l0xx.c
-  * @author  MCD Application Team
-  * @brief   CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File.
-  *
-  *   This file provides two functions and one global variable to be called from 
-  *   user application:
-  *      - SystemInit(): This function is called at startup just after reset and 
-  *                      before branch to main program. This call is made inside
-  *                      the "startup_stm32l0xx.s" file.
-  *
-  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
-  *                                  by the user application to setup the SysTick 
-  *                                  timer or configure other parameters.
-  *                                     
-  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
-  *                                 be called whenever the core clock is changed
-  *                                 during program execution.
-  *
-  *
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l0xx_system
-  * @{
-  */  
-  
-/** @addtogroup STM32L0xx_System_Private_Includes
-  * @{
-  */
-
-#include "stm32l0xx.h"
-
-#if !defined  (HSE_VALUE) 
-  #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (MSI_VALUE)
-  #define MSI_VALUE    ((uint32_t)2000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* MSI_VALUE */
-   
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L0xx_System_Private_TypesDefinitions
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L0xx_System_Private_Defines
-  * @{
-  */
-/************************* Miscellaneous Configuration ************************/
-
-/*!< Uncomment the following line if you need to relocate your vector Table in
-     Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET  0x00U /*!< Vector Table base offset field. 
-                                   This value must be a multiple of 0x200. */
-/******************************************************************************/
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L0xx_System_Private_Macros
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L0xx_System_Private_Variables
-  * @{
-  */
-  /* This variable is updated in three ways:
-      1) by calling CMSIS function SystemCoreClockUpdate()
-      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
-      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 
-         Note: If you use this function to configure the system clock; then there
-               is no need to call the 2 first functions listed above, since SystemCoreClock
-               variable is updated automatically.
-  */
-  uint32_t SystemCoreClock = 2000000U;
-  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
-  const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
-  const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U};
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L0xx_System_Private_FunctionPrototypes
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L0xx_System_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  Setup the microcontroller system.
-  * @param  None
-  * @retval None
-  */
-void SystemInit (void)
-{    
-/*!< Set MSION bit */
-  RCC->CR |= (uint32_t)0x00000100U;
-
-  /*!< Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0], MCOSEL[2:0] and MCOPRE[2:0] bits */
-  RCC->CFGR &= (uint32_t) 0x88FF400CU;
- 
-  /*!< Reset HSION, HSIDIVEN, HSEON, CSSON and PLLON bits */
-  RCC->CR &= (uint32_t)0xFEF6FFF6U;
-  
-  /*!< Reset HSI48ON  bit */
-  RCC->CRRCR &= (uint32_t)0xFFFFFFFEU;
-  
-  /*!< Reset HSEBYP bit */
-  RCC->CR &= (uint32_t)0xFFFBFFFFU;
-
-  /*!< Reset PLLSRC, PLLMUL[3:0] and PLLDIV[1:0] bits */
-  RCC->CFGR &= (uint32_t)0xFF02FFFFU;
-
-  /*!< Disable all interrupts */
-  RCC->CIER = 0x00000000U;
-  
-  /* Configure the Vector Table location add offset address ------------------*/
-#ifdef VECT_TAB_SRAM
-  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
-#else
-  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
-#endif
-}
-
-/**
-  * @brief  Update SystemCoreClock according to Clock Register Values
-  *         The SystemCoreClock variable contains the core clock (HCLK), it can
-  *         be used by the user application to setup the SysTick timer or configure
-  *         other parameters.
-  *           
-  * @note   Each time the core clock (HCLK) changes, this function must be called
-  *         to update SystemCoreClock variable value. Otherwise, any configuration
-  *         based on this variable will be incorrect.         
-  *     
-  * @note   - The system frequency computed by this function is not the real 
-  *           frequency in the chip. It is calculated based on the predefined 
-  *           constant and the selected clock source:
-  *             
-  *           - If SYSCLK source is MSI, SystemCoreClock will contain the MSI 
-  *             value as defined by the MSI range.
-  *                                   
-  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
-  *                                              
-  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
-  *                          
-  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
-  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
-  *         
-  *         (*) HSI_VALUE is a constant defined in stm32l0xx_hal.h file (default value
-  *             16 MHz) but the real value may vary depending on the variations
-  *             in voltage and temperature.   
-  *    
-  *         (**) HSE_VALUE is a constant defined in stm32l0xx_hal.h file (default value
-  *              8 MHz), user has to ensure that HSE_VALUE is same as the real
-  *              frequency of the crystal used. Otherwise, this function may
-  *              have wrong result.
-  *                
-  *         - The result of this function could be not correct when using fractional
-  *           value for HSE crystal.
-  * @param  None
-  * @retval None
-  */
-void SystemCoreClockUpdate (void)
-{
-  uint32_t tmp = 0U, pllmul = 0U, plldiv = 0U, pllsource = 0U, msirange = 0U;
-
-  /* Get SYSCLK source -------------------------------------------------------*/
-  tmp = RCC->CFGR & RCC_CFGR_SWS;
-  
-  switch (tmp)
-  {
-    case 0x00U:  /* MSI used as system clock */
-      msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13U;
-      SystemCoreClock = (32768U * (1U << (msirange + 1U)));
-      break;
-    case 0x04U:  /* HSI used as system clock */
-      SystemCoreClock = HSI_VALUE;
-      break;
-    case 0x08U:  /* HSE used as system clock */
-      SystemCoreClock = HSE_VALUE;
-      break;
-    case 0x0CU:  /* PLL used as system clock */
-      /* Get PLL clock source and multiplication factor ----------------------*/
-      pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
-      plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
-      pllmul = PLLMulTable[(pllmul >> 18U)];
-      plldiv = (plldiv >> 22U) + 1U;
-      
-      pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
-
-      if (pllsource == 0x00U)
-      {
-        /* HSI oscillator clock selected as PLL clock entry */
-        SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv);
-      }
-      else
-      {
-        /* HSE selected as PLL clock entry */
-        SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv);
-      }
-      break;
-    default: /* MSI used as system clock */
-      msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13U;
-      SystemCoreClock = (32768U * (1U << (msirange + 1U)));
-      break;
-  }
-  /* Compute HCLK clock frequency --------------------------------------------*/
-  /* Get HCLK prescaler */
-  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
-  /* HCLK clock frequency */
-  SystemCoreClock >>= tmp;
-}
-
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/CMSIS/Include/arm_common_tables.h b/Drivers/CMSIS/Include/arm_common_tables.h
deleted file mode 100755
index 8742a569..00000000
--- a/Drivers/CMSIS/Include/arm_common_tables.h
+++ /dev/null
@@ -1,136 +0,0 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date:        19. October 2015
-* $Revision: 	V.1.4.5 a
-*
-* Project: 	    CMSIS DSP Library
-* Title:	    arm_common_tables.h
-*
-* Description:	This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
-*
-* Target Processor: Cortex-M4/Cortex-M3
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#ifndef _ARM_COMMON_TABLES_H
-#define _ARM_COMMON_TABLES_H
-
-#include "arm_math.h"
-
-extern const uint16_t armBitRevTable[1024];
-extern const q15_t armRecipTableQ15[64];
-extern const q31_t armRecipTableQ31[64];
-/* extern const q31_t realCoefAQ31[1024]; */
-/* extern const q31_t realCoefBQ31[1024]; */
-extern const float32_t twiddleCoef_16[32];
-extern const float32_t twiddleCoef_32[64];
-extern const float32_t twiddleCoef_64[128];
-extern const float32_t twiddleCoef_128[256];
-extern const float32_t twiddleCoef_256[512];
-extern const float32_t twiddleCoef_512[1024];
-extern const float32_t twiddleCoef_1024[2048];
-extern const float32_t twiddleCoef_2048[4096];
-extern const float32_t twiddleCoef_4096[8192];
-#define twiddleCoef twiddleCoef_4096
-extern const q31_t twiddleCoef_16_q31[24];
-extern const q31_t twiddleCoef_32_q31[48];
-extern const q31_t twiddleCoef_64_q31[96];
-extern const q31_t twiddleCoef_128_q31[192];
-extern const q31_t twiddleCoef_256_q31[384];
-extern const q31_t twiddleCoef_512_q31[768];
-extern const q31_t twiddleCoef_1024_q31[1536];
-extern const q31_t twiddleCoef_2048_q31[3072];
-extern const q31_t twiddleCoef_4096_q31[6144];
-extern const q15_t twiddleCoef_16_q15[24];
-extern const q15_t twiddleCoef_32_q15[48];
-extern const q15_t twiddleCoef_64_q15[96];
-extern const q15_t twiddleCoef_128_q15[192];
-extern const q15_t twiddleCoef_256_q15[384];
-extern const q15_t twiddleCoef_512_q15[768];
-extern const q15_t twiddleCoef_1024_q15[1536];
-extern const q15_t twiddleCoef_2048_q15[3072];
-extern const q15_t twiddleCoef_4096_q15[6144];
-extern const float32_t twiddleCoef_rfft_32[32];
-extern const float32_t twiddleCoef_rfft_64[64];
-extern const float32_t twiddleCoef_rfft_128[128];
-extern const float32_t twiddleCoef_rfft_256[256];
-extern const float32_t twiddleCoef_rfft_512[512];
-extern const float32_t twiddleCoef_rfft_1024[1024];
-extern const float32_t twiddleCoef_rfft_2048[2048];
-extern const float32_t twiddleCoef_rfft_4096[4096];
-
-
-/* floating-point bit reversal tables */
-#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20  )
-#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48  )
-#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56  )
-#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
-#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
-#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
-#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
-#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
-#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
-
-extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
-
-/* fixed-point bit reversal tables */
-#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12  )
-#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24  )
-#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56  )
-#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 )
-#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 )
-#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 )
-#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 )
-#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
-#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
-
-extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
-
-/* Tables for Fast Math Sine and Cosine */
-extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
-extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
-extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
-
-#endif /*  ARM_COMMON_TABLES_H */
diff --git a/Drivers/CMSIS/Include/arm_const_structs.h b/Drivers/CMSIS/Include/arm_const_structs.h
deleted file mode 100755
index 726d06eb..00000000
--- a/Drivers/CMSIS/Include/arm_const_structs.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*
-* Project: 	    CMSIS DSP Library
-* Title:	    arm_const_structs.h
-*
-* Description:	This file has constant structs that are initialized for
-*              user convenience.  For example, some can be given as
-*              arguments to the arm_cfft_f32() function.
-*
-* Target Processor: Cortex-M4/Cortex-M3
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#ifndef _ARM_CONST_STRUCTS_H
-#define _ARM_CONST_STRUCTS_H
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
-
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
-
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
-
-#endif
diff --git a/Drivers/CMSIS/Include/arm_math.h b/Drivers/CMSIS/Include/arm_math.h
deleted file mode 100755
index d33f8a9b..00000000
--- a/Drivers/CMSIS/Include/arm_math.h
+++ /dev/null
@@ -1,7154 +0,0 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2015 ARM Limited. All rights reserved.
-*
-* $Date:        20. October 2015
-* $Revision:    V1.4.5 b
-*
-* Project:      CMSIS DSP Library
-* Title:        arm_math.h
-*
-* Description:  Public header file for CMSIS DSP Library
-*
-* Target Processor: Cortex-M7/Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
- * -------------------------------------------------------------------- */
-
-/**
-   \mainpage CMSIS DSP Software Library
-   *
-   * Introduction
-   * ------------
-   *
-   * This user manual describes the CMSIS DSP software library,
-   * a suite of common signal processing functions for use on Cortex-M processor based devices.
-   *
-   * The library is divided into a number of functions each covering a specific category:
-   * - Basic math functions
-   * - Fast math functions
-   * - Complex math functions
-   * - Filters
-   * - Matrix functions
-   * - Transforms
-   * - Motor control functions
-   * - Statistical functions
-   * - Support functions
-   * - Interpolation functions
-   *
-   * The library has separate functions for operating on 8-bit integers, 16-bit integers,
-   * 32-bit integer and 32-bit floating-point values.
-   *
-   * Using the Library
-   * ------------
-   *
-   * The library installer contains prebuilt versions of the libraries in the Lib folder.
-   * - arm_cortexM7lfdp_math.lib (Little endian and Double Precision Floating Point Unit on Cortex-M7)
-   * - arm_cortexM7bfdp_math.lib (Big endian and Double Precision Floating Point Unit on Cortex-M7)
-   * - arm_cortexM7lfsp_math.lib (Little endian and Single Precision Floating Point Unit on Cortex-M7)
-   * - arm_cortexM7bfsp_math.lib (Big endian and Single Precision Floating Point Unit on Cortex-M7)
-   * - arm_cortexM7l_math.lib (Little endian on Cortex-M7)
-   * - arm_cortexM7b_math.lib (Big endian on Cortex-M7)
-   * - arm_cortexM4lf_math.lib (Little endian and Floating Point Unit on Cortex-M4)
-   * - arm_cortexM4bf_math.lib (Big endian and Floating Point Unit on Cortex-M4)
-   * - arm_cortexM4l_math.lib (Little endian on Cortex-M4)
-   * - arm_cortexM4b_math.lib (Big endian on Cortex-M4)
-   * - arm_cortexM3l_math.lib (Little endian on Cortex-M3)
-   * - arm_cortexM3b_math.lib (Big endian on Cortex-M3)
-   * - arm_cortexM0l_math.lib (Little endian on Cortex-M0 / CortexM0+)
-   * - arm_cortexM0b_math.lib (Big endian on Cortex-M0 / CortexM0+)
-   *
-   * The library functions are declared in the public file arm_math.h which is placed in the Include folder.
-   * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single
-   * public header file  arm_math.h for Cortex-M7/M4/M3/M0/M0+ with little endian and big endian. Same header file will be used for floating point unit(FPU) variants.
-   * Define the appropriate pre processor MACRO ARM_MATH_CM7 or ARM_MATH_CM4 or  ARM_MATH_CM3 or
-   * ARM_MATH_CM0 or ARM_MATH_CM0PLUS depending on the target processor in the application.
-   *
-   * Examples
-   * --------
-   *
-   * The library ships with a number of examples which demonstrate how to use the library functions.
-   *
-   * Toolchain Support
-   * ------------
-   *
-   * The library has been developed and tested with MDK-ARM version 5.14.0.0
-   * The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly.
-   *
-   * Building the Library
-   * ------------
-   *
-   * The library installer contains a project file to re build libraries on MDK-ARM Tool chain in the CMSIS\\DSP_Lib\\Source\\ARM folder.
-   * - arm_cortexM_math.uvprojx
-   *
-   *
-   * The libraries can be built by opening the arm_cortexM_math.uvprojx project in MDK-ARM, selecting a specific target, and defining the optional pre processor MACROs detailed above.
-   *
-   * Pre-processor Macros
-   * ------------
-   *
-   * Each library project have differant pre-processor macros.
-   *
-   * - UNALIGNED_SUPPORT_DISABLE:
-   *
-   * Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access
-   *
-   * - ARM_MATH_BIG_ENDIAN:
-   *
-   * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
-   *
-   * - ARM_MATH_MATRIX_CHECK:
-   *
-   * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices
-   *
-   * - ARM_MATH_ROUNDING:
-   *
-   * Define macro ARM_MATH_ROUNDING for rounding on support functions
-   *
-   * - ARM_MATH_CMx:
-   *
-   * Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target
-   * and ARM_MATH_CM0 for building library on Cortex-M0 target, ARM_MATH_CM0PLUS for building library on Cortex-M0+ target, and
-   * ARM_MATH_CM7 for building the library on cortex-M7.
-   *
-   * - __FPU_PRESENT:
-   *
-   * Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries
-   *
-   * 

-   * CMSIS-DSP in ARM::CMSIS Pack
-   * -----------------------------
-   *
-   * The following files relevant to CMSIS-DSP are present in the ARM::CMSIS Pack directories:
-   * |File/Folder                   |Content                                                                 |
-   * |------------------------------|------------------------------------------------------------------------|
-   * |\b CMSIS\\Documentation\\DSP  | This documentation                                                     |
-   * |\b CMSIS\\DSP_Lib             | Software license agreement (license.txt)                               |
-   * |\b CMSIS\\DSP_Lib\\Examples   | Example projects demonstrating the usage of the library functions      |
-   * |\b CMSIS\\DSP_Lib\\Source     | Source files for rebuilding the library                                |
-   *
-   * 

-   * Revision History of CMSIS-DSP
-   * ------------
-   * Please refer to \ref ChangeLog_pg.
-   *
-   * Copyright Notice
-   * ------------
-   *
-   * Copyright (C) 2010-2015 ARM Limited. All rights reserved.
-   */
-
-
-/**
- * @defgroup groupMath Basic Math Functions
- */
-
-/**
- * @defgroup groupFastMath Fast Math Functions
- * This set of functions provides a fast approximation to sine, cosine, and square root.
- * As compared to most of the other functions in the CMSIS math library, the fast math functions
- * operate on individual values and not arrays.
- * There are separate functions for Q15, Q31, and floating-point data.
- *
- */
-
-/**
- * @defgroup groupCmplxMath Complex Math Functions
- * This set of functions operates on complex data vectors.
- * The data in the complex arrays is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * In the API functions, the number of samples in a complex array refers
- * to the number of complex values; the array contains twice this number of
- * real values.
- */
-
-/**
- * @defgroup groupFilters Filtering Functions
- */
-
-/**
- * @defgroup groupMatrix Matrix Functions
- *
- * This set of functions provides basic matrix math operations.
- * The functions operate on matrix data structures.  For example,
- * the type
- * definition for the floating-point matrix structure is shown
- * below:
- * 
- *     typedef struct
- *     {
- *       uint16_t numRows;     // number of rows of the matrix.
- *       uint16_t numCols;     // number of columns of the matrix.
- *       float32_t *pData;     // points to the data of the matrix.
- *     } arm_matrix_instance_f32;
- * 

- * There are similar definitions for Q15 and Q31 data types.
- *
- * The structure specifies the size of the matrix and then points to
- * an array of data.  The array is of size numRows X numCols
- * and the values are arranged in row order.  That is, the
- * matrix element (i, j) is stored at:
- * 
- *     pData[i*numCols + j]
- * 

- *
- * \par Init Functions
- * There is an associated initialization function for each type of matrix
- * data structure.
- * The initialization function sets the values of the internal structure fields.
- * Refer to the function arm_mat_init_f32(), arm_mat_init_q31()
- * and arm_mat_init_q15() for floating-point, Q31 and Q15 types,  respectively.
- *
- * \par
- * Use of the initialization function is optional. However, if initialization function is used
- * then the instance structure cannot be placed into a const data section.
- * To place the instance structure in a const data
- * section, manually initialize the data structure.  For example:
- * 
- * arm_matrix_instance_f32 S = {nRows, nColumns, pData};
- * arm_matrix_instance_q31 S = {nRows, nColumns, pData};
- * arm_matrix_instance_q15 S = {nRows, nColumns, pData};
- * 

- * where nRows specifies the number of rows, nColumns
- * specifies the number of columns, and pData points to the
- * data array.
- *
- * \par Size Checking
- * By default all of the matrix functions perform size checking on the input and
- * output matrices.  For example, the matrix addition function verifies that the
- * two input matrices and the output matrix all have the same number of rows and
- * columns.  If the size check fails the functions return:
- * 
- *     ARM_MATH_SIZE_MISMATCH
- * 

- * Otherwise the functions return
- * 
- *     ARM_MATH_SUCCESS
- * 

- * There is some overhead associated with this matrix size checking.
- * The matrix size checking is enabled via the \#define
- * 
- *     ARM_MATH_MATRIX_CHECK
- * 

- * within the library project settings.  By default this macro is defined
- * and size checking is enabled.  By changing the project settings and
- * undefining this macro size checking is eliminated and the functions
- * run a bit faster.  With size checking disabled the functions always
- * return ARM_MATH_SUCCESS.
- */
-
-/**
- * @defgroup groupTransforms Transform Functions
- */
-
-/**
- * @defgroup groupController Controller Functions
- */
-
-/**
- * @defgroup groupStats Statistics Functions
- */
-/**
- * @defgroup groupSupport Support Functions
- */
-
-/**
- * @defgroup groupInterpolation Interpolation Functions
- * These functions perform 1- and 2-dimensional interpolation of data.
- * Linear interpolation is used for 1-dimensional data and
- * bilinear interpolation is used for 2-dimensional data.
- */
-
-/**
- * @defgroup groupExamples Examples
- */
-#ifndef _ARM_MATH_H
-#define _ARM_MATH_H
-
-/* ignore some GCC warnings */
-#if defined ( __GNUC__ )
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wsign-conversion"
-#pragma GCC diagnostic ignored "-Wconversion"
-#pragma GCC diagnostic ignored "-Wunused-parameter"
-#endif
-
-#define __CMSIS_GENERIC         /* disable NVIC and Systick functions */
-
-#if defined(ARM_MATH_CM7)
-  #include "core_cm7.h"
-#elif defined (ARM_MATH_CM4)
-  #include "core_cm4.h"
-#elif defined (ARM_MATH_CM3)
-  #include "core_cm3.h"
-#elif defined (ARM_MATH_CM0)
-  #include "core_cm0.h"
-  #define ARM_MATH_CM0_FAMILY
-#elif defined (ARM_MATH_CM0PLUS)
-  #include "core_cm0plus.h"
-  #define ARM_MATH_CM0_FAMILY
-#else
-  #error "Define according the used Cortex core ARM_MATH_CM7, ARM_MATH_CM4, ARM_MATH_CM3, ARM_MATH_CM0PLUS or ARM_MATH_CM0"
-#endif
-
-#undef  __CMSIS_GENERIC         /* enable NVIC and Systick functions */
-#include "string.h"
-#include "math.h"
-#ifdef   __cplusplus
-extern "C"
-{
-#endif
-
-
-  /**
-   * @brief Macros required for reciprocal calculation in Normalized LMS
-   */
-
-#define DELTA_Q31          (0x100)
-#define DELTA_Q15          0x5
-#define INDEX_MASK         0x0000003F
-#ifndef PI
-#define PI                 3.14159265358979f
-#endif
-
-  /**
-   * @brief Macros required for SINE and COSINE Fast math approximations
-   */
-
-#define FAST_MATH_TABLE_SIZE  512
-#define FAST_MATH_Q31_SHIFT   (32 - 10)
-#define FAST_MATH_Q15_SHIFT   (16 - 10)
-#define CONTROLLER_Q31_SHIFT  (32 - 9)
-#define TABLE_SIZE  256
-#define TABLE_SPACING_Q31     0x400000
-#define TABLE_SPACING_Q15     0x80
-
-  /**
-   * @brief Macros required for SINE and COSINE Controller functions
-   */
-  /* 1.31(q31) Fixed value of 2/360 */
-  /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
-#define INPUT_SPACING         0xB60B61
-
-  /**
-   * @brief Macro for Unaligned Support
-   */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-    #define ALIGN4
-#else
-  #if defined  (__GNUC__)
-    #define ALIGN4 __attribute__((aligned(4)))
-  #else
-    #define ALIGN4 __align(4)
-  #endif
-#endif   /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-  /**
-   * @brief Error status returned by some functions in the library.
-   */
-
-  typedef enum
-  {
-    ARM_MATH_SUCCESS = 0,                /**< No error */
-    ARM_MATH_ARGUMENT_ERROR = -1,        /**< One or more arguments are incorrect */
-    ARM_MATH_LENGTH_ERROR = -2,          /**< Length of data buffer is incorrect */
-    ARM_MATH_SIZE_MISMATCH = -3,         /**< Size of matrices is not compatible with the operation. */
-    ARM_MATH_NANINF = -4,                /**< Not-a-number (NaN) or infinity is generated */
-    ARM_MATH_SINGULAR = -5,              /**< Generated by matrix inversion if the input matrix is singular and cannot be inverted. */
-    ARM_MATH_TEST_FAILURE = -6           /**< Test Failed  */
-  } arm_status;
-
-  /**
-   * @brief 8-bit fractional data type in 1.7 format.
-   */
-  typedef int8_t q7_t;
-
-  /**
-   * @brief 16-bit fractional data type in 1.15 format.
-   */
-  typedef int16_t q15_t;
-
-  /**
-   * @brief 32-bit fractional data type in 1.31 format.
-   */
-  typedef int32_t q31_t;
-
-  /**
-   * @brief 64-bit fractional data type in 1.63 format.
-   */
-  typedef int64_t q63_t;
-
-  /**
-   * @brief 32-bit floating-point type definition.
-   */
-  typedef float float32_t;
-
-  /**
-   * @brief 64-bit floating-point type definition.
-   */
-  typedef double float64_t;
-
-  /**
-   * @brief definition to read/write two 16 bit values.
-   */
-#if defined __CC_ARM
-  #define __SIMD32_TYPE int32_t __packed
-  #define CMSIS_UNUSED __attribute__((unused))
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #define __SIMD32_TYPE int32_t
-  #define CMSIS_UNUSED __attribute__((unused))
-
-#elif defined __GNUC__
-  #define __SIMD32_TYPE int32_t
-  #define CMSIS_UNUSED __attribute__((unused))
-
-#elif defined __ICCARM__
-  #define __SIMD32_TYPE int32_t __packed
-  #define CMSIS_UNUSED
-
-#elif defined __CSMC__
-  #define __SIMD32_TYPE int32_t
-  #define CMSIS_UNUSED
-
-#elif defined __TASKING__
-  #define __SIMD32_TYPE __unaligned int32_t
-  #define CMSIS_UNUSED
-
-#else
-  #error Unknown compiler
-#endif
-
-#define __SIMD32(addr)        (*(__SIMD32_TYPE **) & (addr))
-#define __SIMD32_CONST(addr)  ((__SIMD32_TYPE *)(addr))
-#define _SIMD32_OFFSET(addr)  (*(__SIMD32_TYPE *)  (addr))
-#define __SIMD64(addr)        (*(int64_t **) & (addr))
-
-#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY)
-  /**
-   * @brief definition to pack two 16 bit values.
-   */
-#define __PKHBT(ARG1, ARG2, ARG3)      ( (((int32_t)(ARG1) <<  0) & (int32_t)0x0000FFFF) | \
-                                         (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000)  )
-#define __PKHTB(ARG1, ARG2, ARG3)      ( (((int32_t)(ARG1) <<  0) & (int32_t)0xFFFF0000) | \
-                                         (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF)  )
-
-#endif
-
-
-   /**
-   * @brief definition to pack four 8 bit values.
-   */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) | \
-                                (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) | \
-                                (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
-                                (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
-#else
-
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) | \
-                                (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) | \
-                                (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
-                                (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
-
-#endif
-
-
-  /**
-   * @brief Clips Q63 to Q31 values.
-   */
-  static __INLINE q31_t clip_q63_to_q31(
-  q63_t x)
-  {
-    return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
-      ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
-  }
-
-  /**
-   * @brief Clips Q63 to Q15 values.
-   */
-  static __INLINE q15_t clip_q63_to_q15(
-  q63_t x)
-  {
-    return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
-      ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);
-  }
-
-  /**
-   * @brief Clips Q31 to Q7 values.
-   */
-  static __INLINE q7_t clip_q31_to_q7(
-  q31_t x)
-  {
-    return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
-      ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;
-  }
-
-  /**
-   * @brief Clips Q31 to Q15 values.
-   */
-  static __INLINE q15_t clip_q31_to_q15(
-  q31_t x)
-  {
-    return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
-      ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;
-  }
-
-  /**
-   * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
-   */
-
-  static __INLINE q63_t mult32x64(
-  q63_t x,
-  q31_t y)
-  {
-    return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
-            (((q63_t) (x >> 32) * y)));
-  }
-
-/*
-  #if defined (ARM_MATH_CM0_FAMILY) && defined ( __CC_ARM   )
-  #define __CLZ __clz
-  #endif
- */
-/* note: function can be removed when all toolchain support __CLZ for Cortex-M0 */
-#if defined (ARM_MATH_CM0_FAMILY) && ((defined (__ICCARM__))  )
-  static __INLINE uint32_t __CLZ(
-  q31_t data);
-
-  static __INLINE uint32_t __CLZ(
-  q31_t data)
-  {
-    uint32_t count = 0;
-    uint32_t mask = 0x80000000;
-
-    while((data & mask) == 0)
-    {
-      count += 1u;
-      mask = mask >> 1u;
-    }
-
-    return (count);
-  }
-#endif
-
-  /**
-   * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.
-   */
-
-  static __INLINE uint32_t arm_recip_q31(
-  q31_t in,
-  q31_t * dst,
-  q31_t * pRecipTable)
-  {
-    q31_t out;
-    uint32_t tempVal;
-    uint32_t index, i;
-    uint32_t signBits;
-
-    if(in > 0)
-    {
-      signBits = ((uint32_t) (__CLZ( in) - 1));
-    }
-    else
-    {
-      signBits = ((uint32_t) (__CLZ(-in) - 1));
-    }
-
-    /* Convert input sample to 1.31 format */
-    in = (in << signBits);
-
-    /* calculation of index for initial approximated Val */
-    index = (uint32_t)(in >> 24);
-    index = (index & INDEX_MASK);
-
-    /* 1.31 with exp 1 */
-    out = pRecipTable[index];
-
-    /* calculation of reciprocal value */
-    /* running approximation for two iterations */
-    for (i = 0u; i < 2u; i++)
-    {
-      tempVal = (uint32_t) (((q63_t) in * out) >> 31);
-      tempVal = 0x7FFFFFFFu - tempVal;
-      /*      1.31 with exp 1 */
-      /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */
-      out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30);
-    }
-
-    /* write output */
-    *dst = out;
-
-    /* return num of signbits of out = 1/in value */
-    return (signBits + 1u);
-  }
-
-
-  /**
-   * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.
-   */
-  static __INLINE uint32_t arm_recip_q15(
-  q15_t in,
-  q15_t * dst,
-  q15_t * pRecipTable)
-  {
-    q15_t out = 0;
-    uint32_t tempVal = 0;
-    uint32_t index = 0, i = 0;
-    uint32_t signBits = 0;
-
-    if(in > 0)
-    {
-      signBits = ((uint32_t)(__CLZ( in) - 17));
-    }
-    else
-    {
-      signBits = ((uint32_t)(__CLZ(-in) - 17));
-    }
-
-    /* Convert input sample to 1.15 format */
-    in = (in << signBits);
-
-    /* calculation of index for initial approximated Val */
-    index = (uint32_t)(in >>  8);
-    index = (index & INDEX_MASK);
-
-    /*      1.15 with exp 1  */
-    out = pRecipTable[index];
-
-    /* calculation of reciprocal value */
-    /* running approximation for two iterations */
-    for (i = 0u; i < 2u; i++)
-    {
-      tempVal = (uint32_t) (((q31_t) in * out) >> 15);
-      tempVal = 0x7FFFu - tempVal;
-      /*      1.15 with exp 1 */
-      out = (q15_t) (((q31_t) out * tempVal) >> 14);
-      /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */
-    }
-
-    /* write output */
-    *dst = out;
-
-    /* return num of signbits of out = 1/in value */
-    return (signBits + 1);
-  }
-
-
-  /*
-   * @brief C custom defined intrinisic function for only M0 processors
-   */
-#if defined(ARM_MATH_CM0_FAMILY)
-  static __INLINE q31_t __SSAT(
-  q31_t x,
-  uint32_t y)
-  {
-    int32_t posMax, negMin;
-    uint32_t i;
-
-    posMax = 1;
-    for (i = 0; i < (y - 1); i++)
-    {
-      posMax = posMax * 2;
-    }
-
-    if(x > 0)
-    {
-      posMax = (posMax - 1);
-
-      if(x > posMax)
-      {
-        x = posMax;
-      }
-    }
-    else
-    {
-      negMin = -posMax;
-
-      if(x < negMin)
-      {
-        x = negMin;
-      }
-    }
-    return (x);
-  }
-#endif /* end of ARM_MATH_CM0_FAMILY */
-
-
-  /*
-   * @brief C custom defined intrinsic function for M3 and M0 processors
-   */
-#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY)
-
-  /*
-   * @brief C custom defined QADD8 for M3 and M0 processors
-   */
-  static __INLINE uint32_t __QADD8(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s, t, u;
-
-    r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
-    s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
-    t = __SSAT(((((q31_t)x <<  8) >> 24) + (((q31_t)y <<  8) >> 24)), 8) & (int32_t)0x000000FF;
-    u = __SSAT(((((q31_t)x      ) >> 24) + (((q31_t)y      ) >> 24)), 8) & (int32_t)0x000000FF;
-
-    return ((uint32_t)((u << 24) | (t << 16) | (s <<  8) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined QSUB8 for M3 and M0 processors
-   */
-  static __INLINE uint32_t __QSUB8(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s, t, u;
-
-    r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
-    s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
-    t = __SSAT(((((q31_t)x <<  8) >> 24) - (((q31_t)y <<  8) >> 24)), 8) & (int32_t)0x000000FF;
-    u = __SSAT(((((q31_t)x      ) >> 24) - (((q31_t)y      ) >> 24)), 8) & (int32_t)0x000000FF;
-
-    return ((uint32_t)((u << 24) | (t << 16) | (s <<  8) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined QADD16 for M3 and M0 processors
-   */
-  static __INLINE uint32_t __QADD16(
-  uint32_t x,
-  uint32_t y)
-  {
-/*  q31_t r,     s;  without initialisation 'arm_offset_q15 test' fails  but 'intrinsic' tests pass! for armCC */
-    q31_t r = 0, s = 0;
-
-    r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
-    s = __SSAT(((((q31_t)x      ) >> 16) + (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
-
-    return ((uint32_t)((s << 16) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined SHADD16 for M3 and M0 processors
-   */
-  static __INLINE uint32_t __SHADD16(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
-
-    r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-    s = (((((q31_t)x      ) >> 16) + (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-
-    return ((uint32_t)((s << 16) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined QSUB16 for M3 and M0 processors
-   */
-  static __INLINE uint32_t __QSUB16(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
-
-    r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
-    s = __SSAT(((((q31_t)x      ) >> 16) - (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
-
-    return ((uint32_t)((s << 16) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined SHSUB16 for M3 and M0 processors
-   */
-  static __INLINE uint32_t __SHSUB16(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
-
-    r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-    s = (((((q31_t)x      ) >> 16) - (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-
-    return ((uint32_t)((s << 16) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined QASX for M3 and M0 processors
-   */
-  static __INLINE uint32_t __QASX(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
-
-    r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
-    s = __SSAT(((((q31_t)x      ) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
-
-    return ((uint32_t)((s << 16) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined SHASX for M3 and M0 processors
-   */
-  static __INLINE uint32_t __SHASX(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
-
-    r = (((((q31_t)x << 16) >> 16) - (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-    s = (((((q31_t)x      ) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-
-    return ((uint32_t)((s << 16) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined QSAX for M3 and M0 processors
-   */
-  static __INLINE uint32_t __QSAX(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
-
-    r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
-    s = __SSAT(((((q31_t)x      ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
-
-    return ((uint32_t)((s << 16) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined SHSAX for M3 and M0 processors
-   */
-  static __INLINE uint32_t __SHSAX(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
-
-    r = (((((q31_t)x << 16) >> 16) + (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-    s = (((((q31_t)x      ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-
-    return ((uint32_t)((s << 16) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined SMUSDX for M3 and M0 processors
-   */
-  static __INLINE uint32_t __SMUSDX(
-  uint32_t x,
-  uint32_t y)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) -
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16))   ));
-  }
-
-  /*
-   * @brief C custom defined SMUADX for M3 and M0 processors
-   */
-  static __INLINE uint32_t __SMUADX(
-  uint32_t x,
-  uint32_t y)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16))   ));
-  }
-
-
-  /*
-   * @brief C custom defined QADD for M3 and M0 processors
-   */
-  static __INLINE int32_t __QADD(
-  int32_t x,
-  int32_t y)
-  {
-    return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y)));
-  }
-
-
-  /*
-   * @brief C custom defined QSUB for M3 and M0 processors
-   */
-  static __INLINE int32_t __QSUB(
-  int32_t x,
-  int32_t y)
-  {
-    return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y)));
-  }
-
-
-  /*
-   * @brief C custom defined SMLAD for M3 and M0 processors
-   */
-  static __INLINE uint32_t __SMLAD(
-  uint32_t x,
-  uint32_t y,
-  uint32_t sum)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16)) +
-                       ( ((q31_t)sum    )                                  )   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMLADX for M3 and M0 processors
-   */
-  static __INLINE uint32_t __SMLADX(
-  uint32_t x,
-  uint32_t y,
-  uint32_t sum)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ( ((q31_t)sum    )                                  )   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMLSDX for M3 and M0 processors
-   */
-  static __INLINE uint32_t __SMLSDX(
-  uint32_t x,
-  uint32_t y,
-  uint32_t sum)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) -
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ( ((q31_t)sum    )                                  )   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMLALD for M3 and M0 processors
-   */
-  static __INLINE uint64_t __SMLALD(
-  uint32_t x,
-  uint32_t y,
-  uint64_t sum)
-  {
-/*  return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */
-    return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16)) +
-                       ( ((q63_t)sum    )                                  )   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMLALDX for M3 and M0 processors
-   */
-  static __INLINE uint64_t __SMLALDX(
-  uint32_t x,
-  uint32_t y,
-  uint64_t sum)
-  {
-/*  return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */
-    return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ( ((q63_t)sum    )                                  )   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMUAD for M3 and M0 processors
-   */
-  static __INLINE uint32_t __SMUAD(
-  uint32_t x,
-  uint32_t y)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16))   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMUSD for M3 and M0 processors
-   */
-  static __INLINE uint32_t __SMUSD(
-  uint32_t x,
-  uint32_t y)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) -
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16))   ));
-  }
-
-
-  /*
-   * @brief C custom defined SXTB16 for M3 and M0 processors
-   */
-  static __INLINE uint32_t __SXTB16(
-  uint32_t x)
-  {
-    return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) |
-                       ((((q31_t)x <<  8) >>  8) & (q31_t)0xFFFF0000)  ));
-  }
-
-#endif /* defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */
-
-
-  /**
-   * @brief Instance structure for the Q7 FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;        /**< number of filter coefficients in the filter. */
-    q7_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q7_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
-  } arm_fir_instance_q7;
-
-  /**
-   * @brief Instance structure for the Q15 FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;         /**< number of filter coefficients in the filter. */
-    q15_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q15_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
-  } arm_fir_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;         /**< number of filter coefficients in the filter. */
-    q31_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q31_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps. */
-  } arm_fir_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;     /**< number of filter coefficients in the filter. */
-    float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
-  } arm_fir_instance_f32;
-
-
-  /**
-   * @brief Processing function for the Q7 FIR filter.
-   * @param[in]  S          points to an instance of the Q7 FIR filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_q7(
-  const arm_fir_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q7 FIR filter.
-   * @param[in,out] S          points to an instance of the Q7 FIR structure.
-   * @param[in]     numTaps    Number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of samples that are processed.
-   */
-  void arm_fir_init_q7(
-  arm_fir_instance_q7 * S,
-  uint16_t numTaps,
-  q7_t * pCoeffs,
-  q7_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q15 FIR filter.
-   * @param[in]  S          points to an instance of the Q15 FIR structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q15 FIR filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_fast_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q15 FIR filter.
-   * @param[in,out] S          points to an instance of the Q15 FIR filter structure.
-   * @param[in]     numTaps    Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of samples that are processed at a time.
-   * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_ARGUMENT_ERROR if
-   * numTaps is not a supported value.
-   */
-  arm_status arm_fir_init_q15(
-  arm_fir_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 FIR filter.
-   * @param[in]  S          points to an instance of the Q31 FIR filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_q31(
-  const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q31 FIR structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_fast_q31(
-  const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q31 FIR filter.
-   * @param[in,out] S          points to an instance of the Q31 FIR structure.
-   * @param[in]     numTaps    Number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of samples that are processed at a time.
-   */
-  void arm_fir_init_q31(
-  arm_fir_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the floating-point FIR filter.
-   * @param[in]  S          points to an instance of the floating-point FIR structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_f32(
-  const arm_fir_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the floating-point FIR filter.
-   * @param[in,out] S          points to an instance of the floating-point FIR filter structure.
-   * @param[in]     numTaps    Number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of samples that are processed at a time.
-   */
-  void arm_fir_init_f32(
-  arm_fir_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q15 Biquad cascade filter.
-   */
-  typedef struct
-  {
-    int8_t numStages;        /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    q15_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
-    q15_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */
-    int8_t postShift;        /**< Additional shift, in bits, applied to each output sample. */
-  } arm_biquad_casd_df1_inst_q15;
-
-  /**
-   * @brief Instance structure for the Q31 Biquad cascade filter.
-   */
-  typedef struct
-  {
-    uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    q31_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
-    q31_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */
-    uint8_t postShift;       /**< Additional shift, in bits, applied to each output sample. */
-  } arm_biquad_casd_df1_inst_q31;
-
-  /**
-   * @brief Instance structure for the floating-point Biquad cascade filter.
-   */
-  typedef struct
-  {
-    uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    float32_t *pState;       /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
-    float32_t *pCoeffs;      /**< Points to the array of coefficients.  The array is of length 5*numStages. */
-  } arm_biquad_casd_df1_inst_f32;
-
-
-  /**
-   * @brief Processing function for the Q15 Biquad cascade filter.
-   * @param[in]  S          points to an instance of the Q15 Biquad cascade structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df1_q15(
-  const arm_biquad_casd_df1_inst_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q15 Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the Q15 Biquad cascade structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     postShift  Shift to be applied to the output. Varies according to the coefficients format
-   */
-  void arm_biquad_cascade_df1_init_q15(
-  arm_biquad_casd_df1_inst_q15 * S,
-  uint8_t numStages,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  int8_t postShift);
-
-
-  /**
-   * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q15 Biquad cascade structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df1_fast_q15(
-  const arm_biquad_casd_df1_inst_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 Biquad cascade filter
-   * @param[in]  S          points to an instance of the Q31 Biquad cascade structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df1_q31(
-  const arm_biquad_casd_df1_inst_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q31 Biquad cascade structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df1_fast_q31(
-  const arm_biquad_casd_df1_inst_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q31 Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the Q31 Biquad cascade structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     postShift  Shift to be applied to the output. Varies according to the coefficients format
-   */
-  void arm_biquad_cascade_df1_init_q31(
-  arm_biquad_casd_df1_inst_q31 * S,
-  uint8_t numStages,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  int8_t postShift);
-
-
-  /**
-   * @brief Processing function for the floating-point Biquad cascade filter.
-   * @param[in]  S          points to an instance of the floating-point Biquad cascade structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df1_f32(
-  const arm_biquad_casd_df1_inst_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the floating-point Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the floating-point Biquad cascade structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   */
-  void arm_biquad_cascade_df1_init_f32(
-  arm_biquad_casd_df1_inst_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState);
-
-
-  /**
-   * @brief Instance structure for the floating-point matrix structure.
-   */
-  typedef struct
-  {
-    uint16_t numRows;     /**< number of rows of the matrix.     */
-    uint16_t numCols;     /**< number of columns of the matrix.  */
-    float32_t *pData;     /**< points to the data of the matrix. */
-  } arm_matrix_instance_f32;
-
-
-  /**
-   * @brief Instance structure for the floating-point matrix structure.
-   */
-  typedef struct
-  {
-    uint16_t numRows;     /**< number of rows of the matrix.     */
-    uint16_t numCols;     /**< number of columns of the matrix.  */
-    float64_t *pData;     /**< points to the data of the matrix. */
-  } arm_matrix_instance_f64;
-
-  /**
-   * @brief Instance structure for the Q15 matrix structure.
-   */
-  typedef struct
-  {
-    uint16_t numRows;     /**< number of rows of the matrix.     */
-    uint16_t numCols;     /**< number of columns of the matrix.  */
-    q15_t *pData;         /**< points to the data of the matrix. */
-  } arm_matrix_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 matrix structure.
-   */
-  typedef struct
-  {
-    uint16_t numRows;     /**< number of rows of the matrix.     */
-    uint16_t numCols;     /**< number of columns of the matrix.  */
-    q31_t *pData;         /**< points to the data of the matrix. */
-  } arm_matrix_instance_q31;
-
-
-  /**
-   * @brief Floating-point matrix addition.
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_add_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst);
-
-
-  /**
-   * @brief Q15 matrix addition.
-   * @param[in]   pSrcA  points to the first input matrix structure
-   * @param[in]   pSrcB  points to the second input matrix structure
-   * @param[out]  pDst   points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_add_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst);
-
-
-  /**
-   * @brief Q31 matrix addition.
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_add_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief Floating-point, complex, matrix multiplication.
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_cmplx_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst);
-
-
-  /**
-   * @brief Q15, complex,  matrix multiplication.
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_cmplx_mult_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pScratch);
-
-
-  /**
-   * @brief Q31, complex, matrix multiplication.
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_cmplx_mult_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief Floating-point matrix transpose.
-   * @param[in]  pSrc  points to the input matrix
-   * @param[out] pDst  points to the output matrix
-   * @return    The function returns either  ARM_MATH_SIZE_MISMATCH
-   * or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_trans_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  arm_matrix_instance_f32 * pDst);
-
-
-  /**
-   * @brief Q15 matrix transpose.
-   * @param[in]  pSrc  points to the input matrix
-   * @param[out] pDst  points to the output matrix
-   * @return    The function returns either  ARM_MATH_SIZE_MISMATCH
-   * or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_trans_q15(
-  const arm_matrix_instance_q15 * pSrc,
-  arm_matrix_instance_q15 * pDst);
-
-
-  /**
-   * @brief Q31 matrix transpose.
-   * @param[in]  pSrc  points to the input matrix
-   * @param[out] pDst  points to the output matrix
-   * @return    The function returns either  ARM_MATH_SIZE_MISMATCH
-   * or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_trans_q31(
-  const arm_matrix_instance_q31 * pSrc,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief Floating-point matrix multiplication
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst);
-
-
-  /**
-   * @brief Q15 matrix multiplication
-   * @param[in]  pSrcA   points to the first input matrix structure
-   * @param[in]  pSrcB   points to the second input matrix structure
-   * @param[out] pDst    points to output matrix structure
-   * @param[in]  pState  points to the array for storing intermediate results
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_mult_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pState);
-
-
-  /**
-   * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA   points to the first input matrix structure
-   * @param[in]  pSrcB   points to the second input matrix structure
-   * @param[out] pDst    points to output matrix structure
-   * @param[in]  pState  points to the array for storing intermediate results
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_mult_fast_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pState);
-
-
-  /**
-   * @brief Q31 matrix multiplication
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_mult_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_mult_fast_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief Floating-point matrix subtraction
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_sub_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst);
-
-
-  /**
-   * @brief Q15 matrix subtraction
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_sub_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst);
-
-
-  /**
-   * @brief Q31 matrix subtraction
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_sub_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief Floating-point matrix scaling.
-   * @param[in]  pSrc   points to the input matrix
-   * @param[in]  scale  scale factor
-   * @param[out] pDst   points to the output matrix
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_scale_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  float32_t scale,
-  arm_matrix_instance_f32 * pDst);
-
-
-  /**
-   * @brief Q15 matrix scaling.
-   * @param[in]  pSrc        points to input matrix
-   * @param[in]  scaleFract  fractional portion of the scale factor
-   * @param[in]  shift       number of bits to shift the result by
-   * @param[out] pDst        points to output matrix
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_scale_q15(
-  const arm_matrix_instance_q15 * pSrc,
-  q15_t scaleFract,
-  int32_t shift,
-  arm_matrix_instance_q15 * pDst);
-
-
-  /**
-   * @brief Q31 matrix scaling.
-   * @param[in]  pSrc        points to input matrix
-   * @param[in]  scaleFract  fractional portion of the scale factor
-   * @param[in]  shift       number of bits to shift the result by
-   * @param[out] pDst        points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-  arm_status arm_mat_scale_q31(
-  const arm_matrix_instance_q31 * pSrc,
-  q31_t scaleFract,
-  int32_t shift,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief  Q31 matrix initialization.
-   * @param[in,out] S         points to an instance of the floating-point matrix structure.
-   * @param[in]     nRows     number of rows in the matrix.
-   * @param[in]     nColumns  number of columns in the matrix.
-   * @param[in]     pData     points to the matrix data array.
-   */
-  void arm_mat_init_q31(
-  arm_matrix_instance_q31 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  q31_t * pData);
-
-
-  /**
-   * @brief  Q15 matrix initialization.
-   * @param[in,out] S         points to an instance of the floating-point matrix structure.
-   * @param[in]     nRows     number of rows in the matrix.
-   * @param[in]     nColumns  number of columns in the matrix.
-   * @param[in]     pData     points to the matrix data array.
-   */
-  void arm_mat_init_q15(
-  arm_matrix_instance_q15 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  q15_t * pData);
-
-
-  /**
-   * @brief  Floating-point matrix initialization.
-   * @param[in,out] S         points to an instance of the floating-point matrix structure.
-   * @param[in]     nRows     number of rows in the matrix.
-   * @param[in]     nColumns  number of columns in the matrix.
-   * @param[in]     pData     points to the matrix data array.
-   */
-  void arm_mat_init_f32(
-  arm_matrix_instance_f32 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  float32_t * pData);
-
-
-
-  /**
-   * @brief Instance structure for the Q15 PID Control.
-   */
-  typedef struct
-  {
-    q15_t A0;           /**< The derived gain, A0 = Kp + Ki + Kd . */
-#ifdef ARM_MATH_CM0_FAMILY
-    q15_t A1;
-    q15_t A2;
-#else
-    q31_t A1;           /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
-#endif
-    q15_t state[3];     /**< The state array of length 3. */
-    q15_t Kp;           /**< The proportional gain. */
-    q15_t Ki;           /**< The integral gain. */
-    q15_t Kd;           /**< The derivative gain. */
-  } arm_pid_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 PID Control.
-   */
-  typedef struct
-  {
-    q31_t A0;            /**< The derived gain, A0 = Kp + Ki + Kd . */
-    q31_t A1;            /**< The derived gain, A1 = -Kp - 2Kd. */
-    q31_t A2;            /**< The derived gain, A2 = Kd . */
-    q31_t state[3];      /**< The state array of length 3. */
-    q31_t Kp;            /**< The proportional gain. */
-    q31_t Ki;            /**< The integral gain. */
-    q31_t Kd;            /**< The derivative gain. */
-  } arm_pid_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point PID Control.
-   */
-  typedef struct
-  {
-    float32_t A0;          /**< The derived gain, A0 = Kp + Ki + Kd . */
-    float32_t A1;          /**< The derived gain, A1 = -Kp - 2Kd. */
-    float32_t A2;          /**< The derived gain, A2 = Kd . */
-    float32_t state[3];    /**< The state array of length 3. */
-    float32_t Kp;          /**< The proportional gain. */
-    float32_t Ki;          /**< The integral gain. */
-    float32_t Kd;          /**< The derivative gain. */
-  } arm_pid_instance_f32;
-
-
-
-  /**
-   * @brief  Initialization function for the floating-point PID Control.
-   * @param[in,out] S               points to an instance of the PID structure.
-   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
-   */
-  void arm_pid_init_f32(
-  arm_pid_instance_f32 * S,
-  int32_t resetStateFlag);
-
-
-  /**
-   * @brief  Reset function for the floating-point PID Control.
-   * @param[in,out] S  is an instance of the floating-point PID Control structure
-   */
-  void arm_pid_reset_f32(
-  arm_pid_instance_f32 * S);
-
-
-  /**
-   * @brief  Initialization function for the Q31 PID Control.
-   * @param[in,out] S               points to an instance of the Q15 PID structure.
-   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
-   */
-  void arm_pid_init_q31(
-  arm_pid_instance_q31 * S,
-  int32_t resetStateFlag);
-
-
-  /**
-   * @brief  Reset function for the Q31 PID Control.
-   * @param[in,out] S   points to an instance of the Q31 PID Control structure
-   */
-
-  void arm_pid_reset_q31(
-  arm_pid_instance_q31 * S);
-
-
-  /**
-   * @brief  Initialization function for the Q15 PID Control.
-   * @param[in,out] S               points to an instance of the Q15 PID structure.
-   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
-   */
-  void arm_pid_init_q15(
-  arm_pid_instance_q15 * S,
-  int32_t resetStateFlag);
-
-
-  /**
-   * @brief  Reset function for the Q15 PID Control.
-   * @param[in,out] S  points to an instance of the q15 PID Control structure
-   */
-  void arm_pid_reset_q15(
-  arm_pid_instance_q15 * S);
-
-
-  /**
-   * @brief Instance structure for the floating-point Linear Interpolate function.
-   */
-  typedef struct
-  {
-    uint32_t nValues;           /**< nValues */
-    float32_t x1;               /**< x1 */
-    float32_t xSpacing;         /**< xSpacing */
-    float32_t *pYData;          /**< pointer to the table of Y values */
-  } arm_linear_interp_instance_f32;
-
-  /**
-   * @brief Instance structure for the floating-point bilinear interpolation function.
-   */
-  typedef struct
-  {
-    uint16_t numRows;   /**< number of rows in the data table. */
-    uint16_t numCols;   /**< number of columns in the data table. */
-    float32_t *pData;   /**< points to the data table. */
-  } arm_bilinear_interp_instance_f32;
-
-   /**
-   * @brief Instance structure for the Q31 bilinear interpolation function.
-   */
-  typedef struct
-  {
-    uint16_t numRows;   /**< number of rows in the data table. */
-    uint16_t numCols;   /**< number of columns in the data table. */
-    q31_t *pData;       /**< points to the data table. */
-  } arm_bilinear_interp_instance_q31;
-
-   /**
-   * @brief Instance structure for the Q15 bilinear interpolation function.
-   */
-  typedef struct
-  {
-    uint16_t numRows;   /**< number of rows in the data table. */
-    uint16_t numCols;   /**< number of columns in the data table. */
-    q15_t *pData;       /**< points to the data table. */
-  } arm_bilinear_interp_instance_q15;
-
-   /**
-   * @brief Instance structure for the Q15 bilinear interpolation function.
-   */
-  typedef struct
-  {
-    uint16_t numRows;   /**< number of rows in the data table. */
-    uint16_t numCols;   /**< number of columns in the data table. */
-    q7_t *pData;        /**< points to the data table. */
-  } arm_bilinear_interp_instance_q7;
-
-
-  /**
-   * @brief Q7 vector multiplication.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_mult_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q15 vector multiplication.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_mult_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q31 vector multiplication.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_mult_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Floating-point vector multiplication.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_mult_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q15 CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q15_t *pTwiddle;                 /**< points to the Sin twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix2_instance_q15;
-
-/* Deprecated */
-  arm_status arm_cfft_radix2_init_q15(
-  arm_cfft_radix2_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix2_q15(
-  const arm_cfft_radix2_instance_q15 * S,
-  q15_t * pSrc);
-
-
-  /**
-   * @brief Instance structure for the Q15 CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q15_t *pTwiddle;                 /**< points to the twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix4_instance_q15;
-
-/* Deprecated */
-  arm_status arm_cfft_radix4_init_q15(
-  arm_cfft_radix4_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix4_q15(
-  const arm_cfft_radix4_instance_q15 * S,
-  q15_t * pSrc);
-
-  /**
-   * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q31_t *pTwiddle;                 /**< points to the Twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix2_instance_q31;
-
-/* Deprecated */
-  arm_status arm_cfft_radix2_init_q31(
-  arm_cfft_radix2_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix2_q31(
-  const arm_cfft_radix2_instance_q31 * S,
-  q31_t * pSrc);
-
-  /**
-   * @brief Instance structure for the Q31 CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q31_t *pTwiddle;                 /**< points to the twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix4_instance_q31;
-
-/* Deprecated */
-  void arm_cfft_radix4_q31(
-  const arm_cfft_radix4_instance_q31 * S,
-  q31_t * pSrc);
-
-/* Deprecated */
-  arm_status arm_cfft_radix4_init_q31(
-  arm_cfft_radix4_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-  /**
-   * @brief Instance structure for the floating-point CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
-    uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-    float32_t onebyfftLen;             /**< value of 1/fftLen. */
-  } arm_cfft_radix2_instance_f32;
-
-/* Deprecated */
-  arm_status arm_cfft_radix2_init_f32(
-  arm_cfft_radix2_instance_f32 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix2_f32(
-  const arm_cfft_radix2_instance_f32 * S,
-  float32_t * pSrc);
-
-  /**
-   * @brief Instance structure for the floating-point CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
-    uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-    float32_t onebyfftLen;             /**< value of 1/fftLen. */
-  } arm_cfft_radix4_instance_f32;
-
-/* Deprecated */
-  arm_status arm_cfft_radix4_init_f32(
-  arm_cfft_radix4_instance_f32 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix4_f32(
-  const arm_cfft_radix4_instance_f32 * S,
-  float32_t * pSrc);
-
-  /**
-   * @brief Instance structure for the fixed-point CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    const q15_t *pTwiddle;             /**< points to the Twiddle factor table. */
-    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
-    uint16_t bitRevLength;             /**< bit reversal table length. */
-  } arm_cfft_instance_q15;
-
-void arm_cfft_q15(
-    const arm_cfft_instance_q15 * S,
-    q15_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag);
-
-  /**
-   * @brief Instance structure for the fixed-point CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    const q31_t *pTwiddle;             /**< points to the Twiddle factor table. */
-    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
-    uint16_t bitRevLength;             /**< bit reversal table length. */
-  } arm_cfft_instance_q31;
-
-void arm_cfft_q31(
-    const arm_cfft_instance_q31 * S,
-    q31_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag);
-
-  /**
-   * @brief Instance structure for the floating-point CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    const float32_t *pTwiddle;         /**< points to the Twiddle factor table. */
-    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
-    uint16_t bitRevLength;             /**< bit reversal table length. */
-  } arm_cfft_instance_f32;
-
-  void arm_cfft_f32(
-  const arm_cfft_instance_f32 * S,
-  float32_t * p1,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-  /**
-   * @brief Instance structure for the Q15 RFFT/RIFFT function.
-   */
-  typedef struct
-  {
-    uint32_t fftLenReal;                      /**< length of the real FFT. */
-    uint8_t ifftFlagR;                        /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
-    uint8_t bitReverseFlagR;                  /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
-    uint32_t twidCoefRModifier;               /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    q15_t *pTwiddleAReal;                     /**< points to the real twiddle factor table. */
-    q15_t *pTwiddleBReal;                     /**< points to the imag twiddle factor table. */
-    const arm_cfft_instance_q15 *pCfft;       /**< points to the complex FFT instance. */
-  } arm_rfft_instance_q15;
-
-  arm_status arm_rfft_init_q15(
-  arm_rfft_instance_q15 * S,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag);
-
-  void arm_rfft_q15(
-  const arm_rfft_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst);
-
-  /**
-   * @brief Instance structure for the Q31 RFFT/RIFFT function.
-   */
-  typedef struct
-  {
-    uint32_t fftLenReal;                        /**< length of the real FFT. */
-    uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
-    uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
-    uint32_t twidCoefRModifier;                 /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    q31_t *pTwiddleAReal;                       /**< points to the real twiddle factor table. */
-    q31_t *pTwiddleBReal;                       /**< points to the imag twiddle factor table. */
-    const arm_cfft_instance_q31 *pCfft;         /**< points to the complex FFT instance. */
-  } arm_rfft_instance_q31;
-
-  arm_status arm_rfft_init_q31(
-  arm_rfft_instance_q31 * S,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag);
-
-  void arm_rfft_q31(
-  const arm_rfft_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst);
-
-  /**
-   * @brief Instance structure for the floating-point RFFT/RIFFT function.
-   */
-  typedef struct
-  {
-    uint32_t fftLenReal;                        /**< length of the real FFT. */
-    uint16_t fftLenBy2;                         /**< length of the complex FFT. */
-    uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
-    uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
-    uint32_t twidCoefRModifier;                     /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    float32_t *pTwiddleAReal;                   /**< points to the real twiddle factor table. */
-    float32_t *pTwiddleBReal;                   /**< points to the imag twiddle factor table. */
-    arm_cfft_radix4_instance_f32 *pCfft;        /**< points to the complex FFT instance. */
-  } arm_rfft_instance_f32;
-
-  arm_status arm_rfft_init_f32(
-  arm_rfft_instance_f32 * S,
-  arm_cfft_radix4_instance_f32 * S_CFFT,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag);
-
-  void arm_rfft_f32(
-  const arm_rfft_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst);
-
-  /**
-   * @brief Instance structure for the floating-point RFFT/RIFFT function.
-   */
-typedef struct
-  {
-    arm_cfft_instance_f32 Sint;      /**< Internal CFFT structure. */
-    uint16_t fftLenRFFT;             /**< length of the real sequence */
-    float32_t * pTwiddleRFFT;        /**< Twiddle factors real stage  */
-  } arm_rfft_fast_instance_f32 ;
-
-arm_status arm_rfft_fast_init_f32 (
-   arm_rfft_fast_instance_f32 * S,
-   uint16_t fftLen);
-
-void arm_rfft_fast_f32(
-  arm_rfft_fast_instance_f32 * S,
-  float32_t * p, float32_t * pOut,
-  uint8_t ifftFlag);
-
-  /**
-   * @brief Instance structure for the floating-point DCT4/IDCT4 function.
-   */
-  typedef struct
-  {
-    uint16_t N;                          /**< length of the DCT4. */
-    uint16_t Nby2;                       /**< half of the length of the DCT4. */
-    float32_t normalize;                 /**< normalizing factor. */
-    float32_t *pTwiddle;                 /**< points to the twiddle factor table. */
-    float32_t *pCosFactor;               /**< points to the cosFactor table. */
-    arm_rfft_instance_f32 *pRfft;        /**< points to the real FFT instance. */
-    arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
-  } arm_dct4_instance_f32;
-
-
-  /**
-   * @brief  Initialization function for the floating-point DCT4/IDCT4.
-   * @param[in,out] S          points to an instance of floating-point DCT4/IDCT4 structure.
-   * @param[in]     S_RFFT     points to an instance of floating-point RFFT/RIFFT structure.
-   * @param[in]     S_CFFT     points to an instance of floating-point CFFT/CIFFT structure.
-   * @param[in]     N          length of the DCT4.
-   * @param[in]     Nby2       half of the length of the DCT4.
-   * @param[in]     normalize  normalizing factor.
-   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length.
-   */
-  arm_status arm_dct4_init_f32(
-  arm_dct4_instance_f32 * S,
-  arm_rfft_instance_f32 * S_RFFT,
-  arm_cfft_radix4_instance_f32 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  float32_t normalize);
-
-
-  /**
-   * @brief Processing function for the floating-point DCT4/IDCT4.
-   * @param[in]     S              points to an instance of the floating-point DCT4/IDCT4 structure.
-   * @param[in]     pState         points to state buffer.
-   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
-   */
-  void arm_dct4_f32(
-  const arm_dct4_instance_f32 * S,
-  float32_t * pState,
-  float32_t * pInlineBuffer);
-
-
-  /**
-   * @brief Instance structure for the Q31 DCT4/IDCT4 function.
-   */
-  typedef struct
-  {
-    uint16_t N;                          /**< length of the DCT4. */
-    uint16_t Nby2;                       /**< half of the length of the DCT4. */
-    q31_t normalize;                     /**< normalizing factor. */
-    q31_t *pTwiddle;                     /**< points to the twiddle factor table. */
-    q31_t *pCosFactor;                   /**< points to the cosFactor table. */
-    arm_rfft_instance_q31 *pRfft;        /**< points to the real FFT instance. */
-    arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
-  } arm_dct4_instance_q31;
-
-
-  /**
-   * @brief  Initialization function for the Q31 DCT4/IDCT4.
-   * @param[in,out] S          points to an instance of Q31 DCT4/IDCT4 structure.
-   * @param[in]     S_RFFT     points to an instance of Q31 RFFT/RIFFT structure
-   * @param[in]     S_CFFT     points to an instance of Q31 CFFT/CIFFT structure
-   * @param[in]     N          length of the DCT4.
-   * @param[in]     Nby2       half of the length of the DCT4.
-   * @param[in]     normalize  normalizing factor.
-   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.
-   */
-  arm_status arm_dct4_init_q31(
-  arm_dct4_instance_q31 * S,
-  arm_rfft_instance_q31 * S_RFFT,
-  arm_cfft_radix4_instance_q31 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  q31_t normalize);
-
-
-  /**
-   * @brief Processing function for the Q31 DCT4/IDCT4.
-   * @param[in]     S              points to an instance of the Q31 DCT4 structure.
-   * @param[in]     pState         points to state buffer.
-   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
-   */
-  void arm_dct4_q31(
-  const arm_dct4_instance_q31 * S,
-  q31_t * pState,
-  q31_t * pInlineBuffer);
-
-
-  /**
-   * @brief Instance structure for the Q15 DCT4/IDCT4 function.
-   */
-  typedef struct
-  {
-    uint16_t N;                          /**< length of the DCT4. */
-    uint16_t Nby2;                       /**< half of the length of the DCT4. */
-    q15_t normalize;                     /**< normalizing factor. */
-    q15_t *pTwiddle;                     /**< points to the twiddle factor table. */
-    q15_t *pCosFactor;                   /**< points to the cosFactor table. */
-    arm_rfft_instance_q15 *pRfft;        /**< points to the real FFT instance. */
-    arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
-  } arm_dct4_instance_q15;
-
-
-  /**
-   * @brief  Initialization function for the Q15 DCT4/IDCT4.
-   * @param[in,out] S          points to an instance of Q15 DCT4/IDCT4 structure.
-   * @param[in]     S_RFFT     points to an instance of Q15 RFFT/RIFFT structure.
-   * @param[in]     S_CFFT     points to an instance of Q15 CFFT/CIFFT structure.
-   * @param[in]     N          length of the DCT4.
-   * @param[in]     Nby2       half of the length of the DCT4.
-   * @param[in]     normalize  normalizing factor.
-   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.
-   */
-  arm_status arm_dct4_init_q15(
-  arm_dct4_instance_q15 * S,
-  arm_rfft_instance_q15 * S_RFFT,
-  arm_cfft_radix4_instance_q15 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  q15_t normalize);
-
-
-  /**
-   * @brief Processing function for the Q15 DCT4/IDCT4.
-   * @param[in]     S              points to an instance of the Q15 DCT4 structure.
-   * @param[in]     pState         points to state buffer.
-   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
-   */
-  void arm_dct4_q15(
-  const arm_dct4_instance_q15 * S,
-  q15_t * pState,
-  q15_t * pInlineBuffer);
-
-
-  /**
-   * @brief Floating-point vector addition.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_add_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q7 vector addition.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_add_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q15 vector addition.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_add_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q31 vector addition.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_add_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Floating-point vector subtraction.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_sub_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q7 vector subtraction.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_sub_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q15 vector subtraction.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_sub_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q31 vector subtraction.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_sub_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Multiplies a floating-point vector by a scalar.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  scale      scale factor to be applied
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_scale_f32(
-  float32_t * pSrc,
-  float32_t scale,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Multiplies a Q7 vector by a scalar.
-   * @param[in]  pSrc        points to the input vector
-   * @param[in]  scaleFract  fractional portion of the scale value
-   * @param[in]  shift       number of bits to shift the result by
-   * @param[out] pDst        points to the output vector
-   * @param[in]  blockSize   number of samples in the vector
-   */
-  void arm_scale_q7(
-  q7_t * pSrc,
-  q7_t scaleFract,
-  int8_t shift,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Multiplies a Q15 vector by a scalar.
-   * @param[in]  pSrc        points to the input vector
-   * @param[in]  scaleFract  fractional portion of the scale value
-   * @param[in]  shift       number of bits to shift the result by
-   * @param[out] pDst        points to the output vector
-   * @param[in]  blockSize   number of samples in the vector
-   */
-  void arm_scale_q15(
-  q15_t * pSrc,
-  q15_t scaleFract,
-  int8_t shift,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Multiplies a Q31 vector by a scalar.
-   * @param[in]  pSrc        points to the input vector
-   * @param[in]  scaleFract  fractional portion of the scale value
-   * @param[in]  shift       number of bits to shift the result by
-   * @param[out] pDst        points to the output vector
-   * @param[in]  blockSize   number of samples in the vector
-   */
-  void arm_scale_q31(
-  q31_t * pSrc,
-  q31_t scaleFract,
-  int8_t shift,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q7 vector absolute value.
-   * @param[in]  pSrc       points to the input buffer
-   * @param[out] pDst       points to the output buffer
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_abs_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Floating-point vector absolute value.
-   * @param[in]  pSrc       points to the input buffer
-   * @param[out] pDst       points to the output buffer
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_abs_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q15 vector absolute value.
-   * @param[in]  pSrc       points to the input buffer
-   * @param[out] pDst       points to the output buffer
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_abs_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Q31 vector absolute value.
-   * @param[in]  pSrc       points to the input buffer
-   * @param[out] pDst       points to the output buffer
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_abs_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Dot product of floating-point vectors.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[in]  blockSize  number of samples in each vector
-   * @param[out] result     output result returned here
-   */
-  void arm_dot_prod_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  uint32_t blockSize,
-  float32_t * result);
-
-
-  /**
-   * @brief Dot product of Q7 vectors.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[in]  blockSize  number of samples in each vector
-   * @param[out] result     output result returned here
-   */
-  void arm_dot_prod_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  uint32_t blockSize,
-  q31_t * result);
-
-
-  /**
-   * @brief Dot product of Q15 vectors.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[in]  blockSize  number of samples in each vector
-   * @param[out] result     output result returned here
-   */
-  void arm_dot_prod_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  uint32_t blockSize,
-  q63_t * result);
-
-
-  /**
-   * @brief Dot product of Q31 vectors.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[in]  blockSize  number of samples in each vector
-   * @param[out] result     output result returned here
-   */
-  void arm_dot_prod_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  uint32_t blockSize,
-  q63_t * result);
-
-
-  /**
-   * @brief  Shifts the elements of a Q7 vector a specified number of bits.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_shift_q7(
-  q7_t * pSrc,
-  int8_t shiftBits,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Shifts the elements of a Q15 vector a specified number of bits.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_shift_q15(
-  q15_t * pSrc,
-  int8_t shiftBits,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Shifts the elements of a Q31 vector a specified number of bits.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_shift_q31(
-  q31_t * pSrc,
-  int8_t shiftBits,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Adds a constant offset to a floating-point vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  offset     is the offset to be added
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_offset_f32(
-  float32_t * pSrc,
-  float32_t offset,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Adds a constant offset to a Q7 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  offset     is the offset to be added
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_offset_q7(
-  q7_t * pSrc,
-  q7_t offset,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Adds a constant offset to a Q15 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  offset     is the offset to be added
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_offset_q15(
-  q15_t * pSrc,
-  q15_t offset,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Adds a constant offset to a Q31 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  offset     is the offset to be added
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_offset_q31(
-  q31_t * pSrc,
-  q31_t offset,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Negates the elements of a floating-point vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_negate_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Negates the elements of a Q7 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_negate_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Negates the elements of a Q15 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_negate_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Negates the elements of a Q31 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_negate_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Copies the elements of a floating-point vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_copy_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Copies the elements of a Q7 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_copy_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Copies the elements of a Q15 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_copy_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Copies the elements of a Q31 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_copy_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Fills a constant value into a floating-point vector.
-   * @param[in]  value      input value to be filled
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_fill_f32(
-  float32_t value,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Fills a constant value into a Q7 vector.
-   * @param[in]  value      input value to be filled
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_fill_q7(
-  q7_t value,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Fills a constant value into a Q15 vector.
-   * @param[in]  value      input value to be filled
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_fill_q15(
-  q15_t value,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Fills a constant value into a Q31 vector.
-   * @param[in]  value      input value to be filled
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_fill_q31(
-  q31_t value,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-/**
- * @brief Convolution of floating-point sequences.
- * @param[in]  pSrcA    points to the first input sequence.
- * @param[in]  srcALen  length of the first input sequence.
- * @param[in]  pSrcB    points to the second input sequence.
- * @param[in]  srcBLen  length of the second input sequence.
- * @param[out] pDst     points to the location where the output result is written.  Length srcALen+srcBLen-1.
- */
-  void arm_conv_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst);
-
-
-  /**
-   * @brief Convolution of Q15 sequences.
-   * @param[in]  pSrcA      points to the first input sequence.
-   * @param[in]  srcALen    length of the first input sequence.
-   * @param[in]  pSrcB      points to the second input sequence.
-   * @param[in]  srcBLen    length of the second input sequence.
-   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
-   * @param[in]  pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
-   */
-  void arm_conv_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-/**
- * @brief Convolution of Q15 sequences.
- * @param[in]  pSrcA    points to the first input sequence.
- * @param[in]  srcALen  length of the first input sequence.
- * @param[in]  pSrcB    points to the second input sequence.
- * @param[in]  srcBLen  length of the second input sequence.
- * @param[out] pDst     points to the location where the output result is written.  Length srcALen+srcBLen-1.
- */
-  void arm_conv_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst);
-
-
-  /**
-   * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
-   */
-  void arm_conv_fast_q15(
-          q15_t * pSrcA,
-          uint32_t srcALen,
-          q15_t * pSrcB,
-          uint32_t srcBLen,
-          q15_t * pDst);
-
-
-  /**
-   * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA      points to the first input sequence.
-   * @param[in]  srcALen    length of the first input sequence.
-   * @param[in]  pSrcB      points to the second input sequence.
-   * @param[in]  srcBLen    length of the second input sequence.
-   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
-   * @param[in]  pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
-   */
-  void arm_conv_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-  /**
-   * @brief Convolution of Q31 sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
-   */
-  void arm_conv_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst);
-
-
-  /**
-   * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
-   */
-  void arm_conv_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst);
-
-
-    /**
-   * @brief Convolution of Q7 sequences.
-   * @param[in]  pSrcA      points to the first input sequence.
-   * @param[in]  srcALen    length of the first input sequence.
-   * @param[in]  pSrcB      points to the second input sequence.
-   * @param[in]  srcBLen    length of the second input sequence.
-   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
-   * @param[in]  pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
-   */
-  void arm_conv_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-  /**
-   * @brief Convolution of Q7 sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
-   */
-  void arm_conv_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst);
-
-
-  /**
-   * @brief Partial convolution of floating-point sequences.
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q15 sequences.
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @param[in]  pScratch1   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2   points to scratch buffer of size min(srcALen, srcBLen).
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-  /**
-   * @brief Partial convolution of Q15 sequences.
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @param[in]  pScratch1   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2   points to scratch buffer of size min(srcALen, srcBLen).
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-  /**
-   * @brief Partial convolution of Q31 sequences.
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q7 sequences
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @param[in]  pScratch1   points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2   points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-/**
-   * @brief Partial convolution of Q7 sequences.
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-
-  /**
-   * @brief Instance structure for the Q15 FIR decimator.
-   */
-  typedef struct
-  {
-    uint8_t M;                  /**< decimation factor. */
-    uint16_t numTaps;           /**< number of coefficients in the filter. */
-    q15_t *pCoeffs;             /**< points to the coefficient array. The array is of length numTaps.*/
-    q15_t *pState;              /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-  } arm_fir_decimate_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 FIR decimator.
-   */
-  typedef struct
-  {
-    uint8_t M;                  /**< decimation factor. */
-    uint16_t numTaps;           /**< number of coefficients in the filter. */
-    q31_t *pCoeffs;             /**< points to the coefficient array. The array is of length numTaps.*/
-    q31_t *pState;              /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-  } arm_fir_decimate_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point FIR decimator.
-   */
-  typedef struct
-  {
-    uint8_t M;                  /**< decimation factor. */
-    uint16_t numTaps;           /**< number of coefficients in the filter. */
-    float32_t *pCoeffs;         /**< points to the coefficient array. The array is of length numTaps.*/
-    float32_t *pState;          /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-  } arm_fir_decimate_instance_f32;
-
-
-  /**
-   * @brief Processing function for the floating-point FIR decimator.
-   * @param[in]  S          points to an instance of the floating-point FIR decimator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_decimate_f32(
-  const arm_fir_decimate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the floating-point FIR decimator.
-   * @param[in,out] S          points to an instance of the floating-point FIR decimator structure.
-   * @param[in]     numTaps    number of coefficients in the filter.
-   * @param[in]     M          decimation factor.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * blockSize is not a multiple of M.
-   */
-  arm_status arm_fir_decimate_init_f32(
-  arm_fir_decimate_instance_f32 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q15 FIR decimator.
-   * @param[in]  S          points to an instance of the Q15 FIR decimator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_decimate_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q15 FIR decimator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_decimate_fast_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q15 FIR decimator.
-   * @param[in,out] S          points to an instance of the Q15 FIR decimator structure.
-   * @param[in]     numTaps    number of coefficients in the filter.
-   * @param[in]     M          decimation factor.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * blockSize is not a multiple of M.
-   */
-  arm_status arm_fir_decimate_init_q15(
-  arm_fir_decimate_instance_q15 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 FIR decimator.
-   * @param[in]  S     points to an instance of the Q31 FIR decimator structure.
-   * @param[in]  pSrc  points to the block of input data.
-   * @param[out] pDst  points to the block of output data
-   * @param[in] blockSize number of input samples to process per call.
-   */
-  void arm_fir_decimate_q31(
-  const arm_fir_decimate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q31 FIR decimator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_decimate_fast_q31(
-  arm_fir_decimate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q31 FIR decimator.
-   * @param[in,out] S          points to an instance of the Q31 FIR decimator structure.
-   * @param[in]     numTaps    number of coefficients in the filter.
-   * @param[in]     M          decimation factor.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * blockSize is not a multiple of M.
-   */
-  arm_status arm_fir_decimate_init_q31(
-  arm_fir_decimate_instance_q31 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q15 FIR interpolator.
-   */
-  typedef struct
-  {
-    uint8_t L;                      /**< upsample factor. */
-    uint16_t phaseLength;           /**< length of each polyphase filter component. */
-    q15_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */
-    q15_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
-  } arm_fir_interpolate_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 FIR interpolator.
-   */
-  typedef struct
-  {
-    uint8_t L;                      /**< upsample factor. */
-    uint16_t phaseLength;           /**< length of each polyphase filter component. */
-    q31_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */
-    q31_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
-  } arm_fir_interpolate_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point FIR interpolator.
-   */
-  typedef struct
-  {
-    uint8_t L;                     /**< upsample factor. */
-    uint16_t phaseLength;          /**< length of each polyphase filter component. */
-    float32_t *pCoeffs;            /**< points to the coefficient array. The array is of length L*phaseLength. */
-    float32_t *pState;             /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */
-  } arm_fir_interpolate_instance_f32;
-
-
-  /**
-   * @brief Processing function for the Q15 FIR interpolator.
-   * @param[in]  S          points to an instance of the Q15 FIR interpolator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_interpolate_q15(
-  const arm_fir_interpolate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q15 FIR interpolator.
-   * @param[in,out] S          points to an instance of the Q15 FIR interpolator structure.
-   * @param[in]     L          upsample factor.
-   * @param[in]     numTaps    number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficient buffer.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * the filter length numTaps is not a multiple of the interpolation factor L.
-   */
-  arm_status arm_fir_interpolate_init_q15(
-  arm_fir_interpolate_instance_q15 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 FIR interpolator.
-   * @param[in]  S          points to an instance of the Q15 FIR interpolator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_interpolate_q31(
-  const arm_fir_interpolate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q31 FIR interpolator.
-   * @param[in,out] S          points to an instance of the Q31 FIR interpolator structure.
-   * @param[in]     L          upsample factor.
-   * @param[in]     numTaps    number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficient buffer.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * the filter length numTaps is not a multiple of the interpolation factor L.
-   */
-  arm_status arm_fir_interpolate_init_q31(
-  arm_fir_interpolate_instance_q31 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the floating-point FIR interpolator.
-   * @param[in]  S          points to an instance of the floating-point FIR interpolator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_interpolate_f32(
-  const arm_fir_interpolate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the floating-point FIR interpolator.
-   * @param[in,out] S          points to an instance of the floating-point FIR interpolator structure.
-   * @param[in]     L          upsample factor.
-   * @param[in]     numTaps    number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficient buffer.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * the filter length numTaps is not a multiple of the interpolation factor L.
-   */
-  arm_status arm_fir_interpolate_init_f32(
-  arm_fir_interpolate_instance_f32 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the high precision Q31 Biquad cascade filter.
-   */
-  typedef struct
-  {
-    uint8_t numStages;       /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    q63_t *pState;           /**< points to the array of state coefficients.  The array is of length 4*numStages. */
-    q31_t *pCoeffs;          /**< points to the array of coefficients.  The array is of length 5*numStages. */
-    uint8_t postShift;       /**< additional shift, in bits, applied to each output sample. */
-  } arm_biquad_cas_df1_32x64_ins_q31;
-
-
-  /**
-   * @param[in]  S          points to an instance of the high precision Q31 Biquad cascade filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cas_df1_32x64_q31(
-  const arm_biquad_cas_df1_32x64_ins_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @param[in,out] S          points to an instance of the high precision Q31 Biquad cascade filter structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     postShift  shift to be applied to the output. Varies according to the coefficients format
-   */
-  void arm_biquad_cas_df1_32x64_init_q31(
-  arm_biquad_cas_df1_32x64_ins_q31 * S,
-  uint8_t numStages,
-  q31_t * pCoeffs,
-  q63_t * pState,
-  uint8_t postShift);
-
-
-  /**
-   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
-   */
-  typedef struct
-  {
-    uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
-    float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
-  } arm_biquad_cascade_df2T_instance_f32;
-
-  /**
-   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
-   */
-  typedef struct
-  {
-    uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 4*numStages. */
-    float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
-  } arm_biquad_cascade_stereo_df2T_instance_f32;
-
-  /**
-   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
-   */
-  typedef struct
-  {
-    uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    float64_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
-    float64_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
-  } arm_biquad_cascade_df2T_instance_f64;
-
-
-  /**
-   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in]  S          points to an instance of the filter data structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df2T_f32(
-  const arm_biquad_cascade_df2T_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels
-   * @param[in]  S          points to an instance of the filter data structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_stereo_df2T_f32(
-  const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in]  S          points to an instance of the filter data structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df2T_f64(
-  const arm_biquad_cascade_df2T_instance_f64 * S,
-  float64_t * pSrc,
-  float64_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the filter data structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   */
-  void arm_biquad_cascade_df2T_init_f32(
-  arm_biquad_cascade_df2T_instance_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState);
-
-
-  /**
-   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the filter data structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   */
-  void arm_biquad_cascade_stereo_df2T_init_f32(
-  arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState);
-
-
-  /**
-   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the filter data structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   */
-  void arm_biquad_cascade_df2T_init_f64(
-  arm_biquad_cascade_df2T_instance_f64 * S,
-  uint8_t numStages,
-  float64_t * pCoeffs,
-  float64_t * pState);
-
-
-  /**
-   * @brief Instance structure for the Q15 FIR lattice filter.
-   */
-  typedef struct
-  {
-    uint16_t numStages;                  /**< number of filter stages. */
-    q15_t *pState;                       /**< points to the state variable array. The array is of length numStages. */
-    q15_t *pCoeffs;                      /**< points to the coefficient array. The array is of length numStages. */
-  } arm_fir_lattice_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 FIR lattice filter.
-   */
-  typedef struct
-  {
-    uint16_t numStages;                  /**< number of filter stages. */
-    q31_t *pState;                       /**< points to the state variable array. The array is of length numStages. */
-    q31_t *pCoeffs;                      /**< points to the coefficient array. The array is of length numStages. */
-  } arm_fir_lattice_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point FIR lattice filter.
-   */
-  typedef struct
-  {
-    uint16_t numStages;                  /**< number of filter stages. */
-    float32_t *pState;                   /**< points to the state variable array. The array is of length numStages. */
-    float32_t *pCoeffs;                  /**< points to the coefficient array. The array is of length numStages. */
-  } arm_fir_lattice_instance_f32;
-
-
-  /**
-   * @brief Initialization function for the Q15 FIR lattice filter.
-   * @param[in] S          points to an instance of the Q15 FIR lattice structure.
-   * @param[in] numStages  number of filter stages.
-   * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
-   * @param[in] pState     points to the state buffer.  The array is of length numStages.
-   */
-  void arm_fir_lattice_init_q15(
-  arm_fir_lattice_instance_q15 * S,
-  uint16_t numStages,
-  q15_t * pCoeffs,
-  q15_t * pState);
-
-
-  /**
-   * @brief Processing function for the Q15 FIR lattice filter.
-   * @param[in]  S          points to an instance of the Q15 FIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_lattice_q15(
-  const arm_fir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for the Q31 FIR lattice filter.
-   * @param[in] S          points to an instance of the Q31 FIR lattice structure.
-   * @param[in] numStages  number of filter stages.
-   * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
-   * @param[in] pState     points to the state buffer.   The array is of length numStages.
-   */
-  void arm_fir_lattice_init_q31(
-  arm_fir_lattice_instance_q31 * S,
-  uint16_t numStages,
-  q31_t * pCoeffs,
-  q31_t * pState);
-
-
-  /**
-   * @brief Processing function for the Q31 FIR lattice filter.
-   * @param[in]  S          points to an instance of the Q31 FIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_lattice_q31(
-  const arm_fir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-/**
- * @brief Initialization function for the floating-point FIR lattice filter.
- * @param[in] S          points to an instance of the floating-point FIR lattice structure.
- * @param[in] numStages  number of filter stages.
- * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
- * @param[in] pState     points to the state buffer.  The array is of length numStages.
- */
-  void arm_fir_lattice_init_f32(
-  arm_fir_lattice_instance_f32 * S,
-  uint16_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState);
-
-
-  /**
-   * @brief Processing function for the floating-point FIR lattice filter.
-   * @param[in]  S          points to an instance of the floating-point FIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_lattice_f32(
-  const arm_fir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q15 IIR lattice filter.
-   */
-  typedef struct
-  {
-    uint16_t numStages;                  /**< number of stages in the filter. */
-    q15_t *pState;                       /**< points to the state variable array. The array is of length numStages+blockSize. */
-    q15_t *pkCoeffs;                     /**< points to the reflection coefficient array. The array is of length numStages. */
-    q15_t *pvCoeffs;                     /**< points to the ladder coefficient array. The array is of length numStages+1. */
-  } arm_iir_lattice_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 IIR lattice filter.
-   */
-  typedef struct
-  {
-    uint16_t numStages;                  /**< number of stages in the filter. */
-    q31_t *pState;                       /**< points to the state variable array. The array is of length numStages+blockSize. */
-    q31_t *pkCoeffs;                     /**< points to the reflection coefficient array. The array is of length numStages. */
-    q31_t *pvCoeffs;                     /**< points to the ladder coefficient array. The array is of length numStages+1. */
-  } arm_iir_lattice_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point IIR lattice filter.
-   */
-  typedef struct
-  {
-    uint16_t numStages;                  /**< number of stages in the filter. */
-    float32_t *pState;                   /**< points to the state variable array. The array is of length numStages+blockSize. */
-    float32_t *pkCoeffs;                 /**< points to the reflection coefficient array. The array is of length numStages. */
-    float32_t *pvCoeffs;                 /**< points to the ladder coefficient array. The array is of length numStages+1. */
-  } arm_iir_lattice_instance_f32;
-
-
-  /**
-   * @brief Processing function for the floating-point IIR lattice filter.
-   * @param[in]  S          points to an instance of the floating-point IIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_iir_lattice_f32(
-  const arm_iir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for the floating-point IIR lattice filter.
-   * @param[in] S          points to an instance of the floating-point IIR lattice structure.
-   * @param[in] numStages  number of stages in the filter.
-   * @param[in] pkCoeffs   points to the reflection coefficient buffer.  The array is of length numStages.
-   * @param[in] pvCoeffs   points to the ladder coefficient buffer.  The array is of length numStages+1.
-   * @param[in] pState     points to the state buffer.  The array is of length numStages+blockSize-1.
-   * @param[in] blockSize  number of samples to process.
-   */
-  void arm_iir_lattice_init_f32(
-  arm_iir_lattice_instance_f32 * S,
-  uint16_t numStages,
-  float32_t * pkCoeffs,
-  float32_t * pvCoeffs,
-  float32_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 IIR lattice filter.
-   * @param[in]  S          points to an instance of the Q31 IIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_iir_lattice_q31(
-  const arm_iir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for the Q31 IIR lattice filter.
-   * @param[in] S          points to an instance of the Q31 IIR lattice structure.
-   * @param[in] numStages  number of stages in the filter.
-   * @param[in] pkCoeffs   points to the reflection coefficient buffer.  The array is of length numStages.
-   * @param[in] pvCoeffs   points to the ladder coefficient buffer.  The array is of length numStages+1.
-   * @param[in] pState     points to the state buffer.  The array is of length numStages+blockSize.
-   * @param[in] blockSize  number of samples to process.
-   */
-  void arm_iir_lattice_init_q31(
-  arm_iir_lattice_instance_q31 * S,
-  uint16_t numStages,
-  q31_t * pkCoeffs,
-  q31_t * pvCoeffs,
-  q31_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q15 IIR lattice filter.
-   * @param[in]  S          points to an instance of the Q15 IIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_iir_lattice_q15(
-  const arm_iir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-/**
- * @brief Initialization function for the Q15 IIR lattice filter.
- * @param[in] S          points to an instance of the fixed-point Q15 IIR lattice structure.
- * @param[in] numStages  number of stages in the filter.
- * @param[in] pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages.
- * @param[in] pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1.
- * @param[in] pState     points to state buffer.  The array is of length numStages+blockSize.
- * @param[in] blockSize  number of samples to process per call.
- */
-  void arm_iir_lattice_init_q15(
-  arm_iir_lattice_instance_q15 * S,
-  uint16_t numStages,
-  q15_t * pkCoeffs,
-  q15_t * pvCoeffs,
-  q15_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the floating-point LMS filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;    /**< number of coefficients in the filter. */
-    float32_t *pState;   /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    float32_t *pCoeffs;  /**< points to the coefficient array. The array is of length numTaps. */
-    float32_t mu;        /**< step size that controls filter coefficient updates. */
-  } arm_lms_instance_f32;
-
-
-  /**
-   * @brief Processing function for floating-point LMS filter.
-   * @param[in]  S          points to an instance of the floating-point LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_f32(
-  const arm_lms_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pRef,
-  float32_t * pOut,
-  float32_t * pErr,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for floating-point LMS filter.
-   * @param[in] S          points to an instance of the floating-point LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to the coefficient buffer.
-   * @param[in] pState     points to state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   */
-  void arm_lms_init_f32(
-  arm_lms_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  float32_t mu,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q15 LMS filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;    /**< number of coefficients in the filter. */
-    q15_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q15_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
-    q15_t mu;            /**< step size that controls filter coefficient updates. */
-    uint32_t postShift;  /**< bit shift applied to coefficients. */
-  } arm_lms_instance_q15;
-
-
-  /**
-   * @brief Initialization function for the Q15 LMS filter.
-   * @param[in] S          points to an instance of the Q15 LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to the coefficient buffer.
-   * @param[in] pState     points to the state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   * @param[in] postShift  bit shift applied to coefficients.
-   */
-  void arm_lms_init_q15(
-  arm_lms_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  q15_t mu,
-  uint32_t blockSize,
-  uint32_t postShift);
-
-
-  /**
-   * @brief Processing function for Q15 LMS filter.
-   * @param[in]  S          points to an instance of the Q15 LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_q15(
-  const arm_lms_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pRef,
-  q15_t * pOut,
-  q15_t * pErr,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q31 LMS filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;    /**< number of coefficients in the filter. */
-    q31_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q31_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
-    q31_t mu;            /**< step size that controls filter coefficient updates. */
-    uint32_t postShift;  /**< bit shift applied to coefficients. */
-  } arm_lms_instance_q31;
-
-
-  /**
-   * @brief Processing function for Q31 LMS filter.
-   * @param[in]  S          points to an instance of the Q15 LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_q31(
-  const arm_lms_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pRef,
-  q31_t * pOut,
-  q31_t * pErr,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for Q31 LMS filter.
-   * @param[in] S          points to an instance of the Q31 LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to coefficient buffer.
-   * @param[in] pState     points to state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   * @param[in] postShift  bit shift applied to coefficients.
-   */
-  void arm_lms_init_q31(
-  arm_lms_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  q31_t mu,
-  uint32_t blockSize,
-  uint32_t postShift);
-
-
-  /**
-   * @brief Instance structure for the floating-point normalized LMS filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;     /**< number of coefficients in the filter. */
-    float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
-    float32_t mu;         /**< step size that control filter coefficient updates. */
-    float32_t energy;     /**< saves previous frame energy. */
-    float32_t x0;         /**< saves previous input sample. */
-  } arm_lms_norm_instance_f32;
-
-
-  /**
-   * @brief Processing function for floating-point normalized LMS filter.
-   * @param[in]  S          points to an instance of the floating-point normalized LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_norm_f32(
-  arm_lms_norm_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pRef,
-  float32_t * pOut,
-  float32_t * pErr,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for floating-point normalized LMS filter.
-   * @param[in] S          points to an instance of the floating-point LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to coefficient buffer.
-   * @param[in] pState     points to state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   */
-  void arm_lms_norm_init_f32(
-  arm_lms_norm_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  float32_t mu,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q31 normalized LMS filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;     /**< number of coefficients in the filter. */
-    q31_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q31_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
-    q31_t mu;             /**< step size that controls filter coefficient updates. */
-    uint8_t postShift;    /**< bit shift applied to coefficients. */
-    q31_t *recipTable;    /**< points to the reciprocal initial value table. */
-    q31_t energy;         /**< saves previous frame energy. */
-    q31_t x0;             /**< saves previous input sample. */
-  } arm_lms_norm_instance_q31;
-
-
-  /**
-   * @brief Processing function for Q31 normalized LMS filter.
-   * @param[in]  S          points to an instance of the Q31 normalized LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_norm_q31(
-  arm_lms_norm_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pRef,
-  q31_t * pOut,
-  q31_t * pErr,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for Q31 normalized LMS filter.
-   * @param[in] S          points to an instance of the Q31 normalized LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to coefficient buffer.
-   * @param[in] pState     points to state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   * @param[in] postShift  bit shift applied to coefficients.
-   */
-  void arm_lms_norm_init_q31(
-  arm_lms_norm_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  q31_t mu,
-  uint32_t blockSize,
-  uint8_t postShift);
-
-
-  /**
-   * @brief Instance structure for the Q15 normalized LMS filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;     /**< Number of coefficients in the filter. */
-    q15_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q15_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
-    q15_t mu;             /**< step size that controls filter coefficient updates. */
-    uint8_t postShift;    /**< bit shift applied to coefficients. */
-    q15_t *recipTable;    /**< Points to the reciprocal initial value table. */
-    q15_t energy;         /**< saves previous frame energy. */
-    q15_t x0;             /**< saves previous input sample. */
-  } arm_lms_norm_instance_q15;
-
-
-  /**
-   * @brief Processing function for Q15 normalized LMS filter.
-   * @param[in]  S          points to an instance of the Q15 normalized LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_norm_q15(
-  arm_lms_norm_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pRef,
-  q15_t * pOut,
-  q15_t * pErr,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for Q15 normalized LMS filter.
-   * @param[in] S          points to an instance of the Q15 normalized LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to coefficient buffer.
-   * @param[in] pState     points to state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   * @param[in] postShift  bit shift applied to coefficients.
-   */
-  void arm_lms_norm_init_q15(
-  arm_lms_norm_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  q15_t mu,
-  uint32_t blockSize,
-  uint8_t postShift);
-
-
-  /**
-   * @brief Correlation of floating-point sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-  void arm_correlate_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst);
-
-
-   /**
-   * @brief Correlation of Q15 sequences
-   * @param[in]  pSrcA     points to the first input sequence.
-   * @param[in]  srcALen   length of the first input sequence.
-   * @param[in]  pSrcB     points to the second input sequence.
-   * @param[in]  srcBLen   length of the second input sequence.
-   * @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   */
-  void arm_correlate_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch);
-
-
-  /**
-   * @brief Correlation of Q15 sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-
-  void arm_correlate_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst);
-
-
-  /**
-   * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-
-  void arm_correlate_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst);
-
-
-  /**
-   * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
-   * @param[in]  pSrcA     points to the first input sequence.
-   * @param[in]  srcALen   length of the first input sequence.
-   * @param[in]  pSrcB     points to the second input sequence.
-   * @param[in]  srcBLen   length of the second input sequence.
-   * @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   */
-  void arm_correlate_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch);
-
-
-  /**
-   * @brief Correlation of Q31 sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-  void arm_correlate_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst);
-
-
-  /**
-   * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-  void arm_correlate_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst);
-
-
- /**
-   * @brief Correlation of Q7 sequences.
-   * @param[in]  pSrcA      points to the first input sequence.
-   * @param[in]  srcALen    length of the first input sequence.
-   * @param[in]  pSrcB      points to the second input sequence.
-   * @param[in]  srcBLen    length of the second input sequence.
-   * @param[out] pDst       points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @param[in]  pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
-   */
-  void arm_correlate_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-  /**
-   * @brief Correlation of Q7 sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-  void arm_correlate_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst);
-
-
-  /**
-   * @brief Instance structure for the floating-point sparse FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;             /**< number of coefficients in the filter. */
-    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-    float32_t *pState;            /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    float32_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
-    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
-  } arm_fir_sparse_instance_f32;
-
-  /**
-   * @brief Instance structure for the Q31 sparse FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;             /**< number of coefficients in the filter. */
-    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-    q31_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    q31_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
-    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
-  } arm_fir_sparse_instance_q31;
-
-  /**
-   * @brief Instance structure for the Q15 sparse FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;             /**< number of coefficients in the filter. */
-    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-    q15_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    q15_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
-    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
-  } arm_fir_sparse_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q7 sparse FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;             /**< number of coefficients in the filter. */
-    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-    q7_t *pState;                 /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    q7_t *pCoeffs;                /**< points to the coefficient array. The array is of length numTaps.*/
-    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
-  } arm_fir_sparse_instance_q7;
-
-
-  /**
-   * @brief Processing function for the floating-point sparse FIR filter.
-   * @param[in]  S           points to an instance of the floating-point sparse FIR structure.
-   * @param[in]  pSrc        points to the block of input data.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  pScratchIn  points to a temporary buffer of size blockSize.
-   * @param[in]  blockSize   number of input samples to process per call.
-   */
-  void arm_fir_sparse_f32(
-  arm_fir_sparse_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  float32_t * pScratchIn,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the floating-point sparse FIR filter.
-   * @param[in,out] S          points to an instance of the floating-point sparse FIR structure.
-   * @param[in]     numTaps    number of nonzero coefficients in the filter.
-   * @param[in]     pCoeffs    points to the array of filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     pTapDelay  points to the array of offset times.
-   * @param[in]     maxDelay   maximum offset time supported.
-   * @param[in]     blockSize  number of samples that will be processed per block.
-   */
-  void arm_fir_sparse_init_f32(
-  arm_fir_sparse_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 sparse FIR filter.
-   * @param[in]  S           points to an instance of the Q31 sparse FIR structure.
-   * @param[in]  pSrc        points to the block of input data.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  pScratchIn  points to a temporary buffer of size blockSize.
-   * @param[in]  blockSize   number of input samples to process per call.
-   */
-  void arm_fir_sparse_q31(
-  arm_fir_sparse_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  q31_t * pScratchIn,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q31 sparse FIR filter.
-   * @param[in,out] S          points to an instance of the Q31 sparse FIR structure.
-   * @param[in]     numTaps    number of nonzero coefficients in the filter.
-   * @param[in]     pCoeffs    points to the array of filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     pTapDelay  points to the array of offset times.
-   * @param[in]     maxDelay   maximum offset time supported.
-   * @param[in]     blockSize  number of samples that will be processed per block.
-   */
-  void arm_fir_sparse_init_q31(
-  arm_fir_sparse_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q15 sparse FIR filter.
-   * @param[in]  S            points to an instance of the Q15 sparse FIR structure.
-   * @param[in]  pSrc         points to the block of input data.
-   * @param[out] pDst         points to the block of output data
-   * @param[in]  pScratchIn   points to a temporary buffer of size blockSize.
-   * @param[in]  pScratchOut  points to a temporary buffer of size blockSize.
-   * @param[in]  blockSize    number of input samples to process per call.
-   */
-  void arm_fir_sparse_q15(
-  arm_fir_sparse_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  q15_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q15 sparse FIR filter.
-   * @param[in,out] S          points to an instance of the Q15 sparse FIR structure.
-   * @param[in]     numTaps    number of nonzero coefficients in the filter.
-   * @param[in]     pCoeffs    points to the array of filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     pTapDelay  points to the array of offset times.
-   * @param[in]     maxDelay   maximum offset time supported.
-   * @param[in]     blockSize  number of samples that will be processed per block.
-   */
-  void arm_fir_sparse_init_q15(
-  arm_fir_sparse_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q7 sparse FIR filter.
-   * @param[in]  S            points to an instance of the Q7 sparse FIR structure.
-   * @param[in]  pSrc         points to the block of input data.
-   * @param[out] pDst         points to the block of output data
-   * @param[in]  pScratchIn   points to a temporary buffer of size blockSize.
-   * @param[in]  pScratchOut  points to a temporary buffer of size blockSize.
-   * @param[in]  blockSize    number of input samples to process per call.
-   */
-  void arm_fir_sparse_q7(
-  arm_fir_sparse_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  q7_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q7 sparse FIR filter.
-   * @param[in,out] S          points to an instance of the Q7 sparse FIR structure.
-   * @param[in]     numTaps    number of nonzero coefficients in the filter.
-   * @param[in]     pCoeffs    points to the array of filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     pTapDelay  points to the array of offset times.
-   * @param[in]     maxDelay   maximum offset time supported.
-   * @param[in]     blockSize  number of samples that will be processed per block.
-   */
-  void arm_fir_sparse_init_q7(
-  arm_fir_sparse_instance_q7 * S,
-  uint16_t numTaps,
-  q7_t * pCoeffs,
-  q7_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Floating-point sin_cos function.
-   * @param[in]  theta   input value in degrees
-   * @param[out] pSinVal  points to the processed sine output.
-   * @param[out] pCosVal  points to the processed cos output.
-   */
-  void arm_sin_cos_f32(
-  float32_t theta,
-  float32_t * pSinVal,
-  float32_t * pCosVal);
-
-
-  /**
-   * @brief  Q31 sin_cos function.
-   * @param[in]  theta    scaled input value in degrees
-   * @param[out] pSinVal  points to the processed sine output.
-   * @param[out] pCosVal  points to the processed cosine output.
-   */
-  void arm_sin_cos_q31(
-  q31_t theta,
-  q31_t * pSinVal,
-  q31_t * pCosVal);
-
-
-  /**
-   * @brief  Floating-point complex conjugate.
-   * @param[in]  pSrc        points to the input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_conj_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples);
-
-  /**
-   * @brief  Q31 complex conjugate.
-   * @param[in]  pSrc        points to the input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_conj_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Q15 complex conjugate.
-   * @param[in]  pSrc        points to the input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_conj_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Floating-point complex magnitude squared
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_squared_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Q31 complex magnitude squared
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_squared_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Q15 complex magnitude squared
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_squared_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples);
-
-
- /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup PID PID Motor Control
-   *
-   * A Proportional Integral Derivative (PID) controller is a generic feedback control
-   * loop mechanism widely used in industrial control systems.
-   * A PID controller is the most commonly used type of feedback controller.
-   *
-   * This set of functions implements (PID) controllers
-   * for Q15, Q31, and floating-point data types.  The functions operate on a single sample
-   * of data and each call to the function returns a single processed value.
-   * S points to an instance of the PID control data structure.  in
-   * is the input sample value. The functions return the output value.
-   *
-   * \par Algorithm:
-   * 
-   *    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
-   *    A0 = Kp + Ki + Kd
-   *    A1 = (-Kp ) - (2 * Kd )
-   *    A2 = Kd  

-   *
-   * \par
-   * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
-   *
-   * \par
-   * \image html PID.gif "Proportional Integral Derivative Controller"
-   *
-   * \par
-   * The PID controller calculates an "error" value as the difference between
-   * the measured output and the reference input.
-   * The controller attempts to minimize the error by adjusting the process control inputs.
-   * The proportional value determines the reaction to the current error,
-   * the integral value determines the reaction based on the sum of recent errors,
-   * and the derivative value determines the reaction based on the rate at which the error has been changing.
-   *
-   * \par Instance Structure
-   * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.
-   * A separate instance structure must be defined for each PID Controller.
-   * There are separate instance structure declarations for each of the 3 supported data types.
-   *
-   * \par Reset Functions
-   * There is also an associated reset function for each data type which clears the state array.
-   *
-   * \par Initialization Functions
-   * There is also an associated initialization function for each data type.
-   * The initialization function performs the following operations:
-   * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
-   * - Zeros out the values in the state buffer.
-   *
-   * \par
-   * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
-   *
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the fixed-point versions of the PID Controller functions.
-   * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup PID
-   * @{
-   */
-
-  /**
-   * @brief  Process function for the floating-point PID Control.
-   * @param[in,out] S   is an instance of the floating-point PID Control structure
-   * @param[in]     in  input sample to process
-   * @return out processed output sample.
-   */
-  static __INLINE float32_t arm_pid_f32(
-  arm_pid_instance_f32 * S,
-  float32_t in)
-  {
-    float32_t out;
-
-    /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]  */
-    out = (S->A0 * in) +
-      (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]);
-
-    /* Update state */
-    S->state[1] = S->state[0];
-    S->state[0] = in;
-    S->state[2] = out;
-
-    /* return to application */
-    return (out);
-
-  }
-
-  /**
-   * @brief  Process function for the Q31 PID Control.
-   * @param[in,out] S  points to an instance of the Q31 PID Control structure
-   * @param[in]     in  input sample to process
-   * @return out processed output sample.
-   *
-   * Scaling and Overflow Behavior:
-   * \par
-   * The function is implemented using an internal 64-bit accumulator.
-   * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-   * Thus, if the accumulator result overflows it wraps around rather than clip.
-   * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
-   * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
-   */
-  static __INLINE q31_t arm_pid_q31(
-  arm_pid_instance_q31 * S,
-  q31_t in)
-  {
-    q63_t acc;
-    q31_t out;
-
-    /* acc = A0 * x[n]  */
-    acc = (q63_t) S->A0 * in;
-
-    /* acc += A1 * x[n-1] */
-    acc += (q63_t) S->A1 * S->state[0];
-
-    /* acc += A2 * x[n-2]  */
-    acc += (q63_t) S->A2 * S->state[1];
-
-    /* convert output to 1.31 format to add y[n-1] */
-    out = (q31_t) (acc >> 31u);
-
-    /* out += y[n-1] */
-    out += S->state[2];
-
-    /* Update state */
-    S->state[1] = S->state[0];
-    S->state[0] = in;
-    S->state[2] = out;
-
-    /* return to application */
-    return (out);
-  }
-
-
-  /**
-   * @brief  Process function for the Q15 PID Control.
-   * @param[in,out] S   points to an instance of the Q15 PID Control structure
-   * @param[in]     in  input sample to process
-   * @return out processed output sample.
-   *
-   * Scaling and Overflow Behavior:
-   * \par
-   * The function is implemented using a 64-bit internal accumulator.
-   * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
-   * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-   * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
-   * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
-   * Lastly, the accumulator is saturated to yield a result in 1.15 format.
-   */
-  static __INLINE q15_t arm_pid_q15(
-  arm_pid_instance_q15 * S,
-  q15_t in)
-  {
-    q63_t acc;
-    q15_t out;
-
-#ifndef ARM_MATH_CM0_FAMILY
-    __SIMD32_TYPE *vstate;
-
-    /* Implementation of PID controller */
-
-    /* acc = A0 * x[n]  */
-    acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in);
-
-    /* acc += A1 * x[n-1] + A2 * x[n-2]  */
-    vstate = __SIMD32_CONST(S->state);
-    acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)*vstate, (uint64_t)acc);
-#else
-    /* acc = A0 * x[n]  */
-    acc = ((q31_t) S->A0) * in;
-
-    /* acc += A1 * x[n-1] + A2 * x[n-2]  */
-    acc += (q31_t) S->A1 * S->state[0];
-    acc += (q31_t) S->A2 * S->state[1];
-#endif
-
-    /* acc += y[n-1] */
-    acc += (q31_t) S->state[2] << 15;
-
-    /* saturate the output */
-    out = (q15_t) (__SSAT((acc >> 15), 16));
-
-    /* Update state */
-    S->state[1] = S->state[0];
-    S->state[0] = in;
-    S->state[2] = out;
-
-    /* return to application */
-    return (out);
-  }
-
-  /**
-   * @} end of PID group
-   */
-
-
-  /**
-   * @brief Floating-point matrix inverse.
-   * @param[in]  src   points to the instance of the input floating-point matrix structure.
-   * @param[out] dst   points to the instance of the output floating-point matrix structure.
-   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
-   * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
-   */
-  arm_status arm_mat_inverse_f32(
-  const arm_matrix_instance_f32 * src,
-  arm_matrix_instance_f32 * dst);
-
-
-  /**
-   * @brief Floating-point matrix inverse.
-   * @param[in]  src   points to the instance of the input floating-point matrix structure.
-   * @param[out] dst   points to the instance of the output floating-point matrix structure.
-   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
-   * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
-   */
-  arm_status arm_mat_inverse_f64(
-  const arm_matrix_instance_f64 * src,
-  arm_matrix_instance_f64 * dst);
-
-
-
-  /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup clarke Vector Clarke Transform
-   * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector.
-   * Generally the Clarke transform uses three-phase currents Ia, Ib and Ic to calculate currents
-   * in the two-phase orthogonal stator axis Ialpha and Ibeta.
-   * When Ialpha is superposed with Ia as shown in the figure below
-   * \image html clarke.gif Stator current space vector and its components in (a,b).
-   * and Ia + Ib + Ic = 0, in this condition Ialpha and Ibeta
-   * can be calculated using only Ia and Ib.
-   *
-   * The function operates on a single sample of data and each call to the function returns the processed output.
-   * The library provides separate functions for Q31 and floating-point data types.
-   * \par Algorithm
-   * \image html clarkeFormula.gif
-   * where Ia and Ib are the instantaneous stator phases and
-   * pIalpha and pIbeta are the two coordinates of time invariant vector.
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the Q31 version of the Clarke transform.
-   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup clarke
-   * @{
-   */
-
-  /**
-   *
-   * @brief  Floating-point Clarke transform
-   * @param[in]  Ia       input three-phase coordinate a
-   * @param[in]  Ib       input three-phase coordinate b
-   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
-   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
-   */
-  static __INLINE void arm_clarke_f32(
-  float32_t Ia,
-  float32_t Ib,
-  float32_t * pIalpha,
-  float32_t * pIbeta)
-  {
-    /* Calculate pIalpha using the equation, pIalpha = Ia */
-    *pIalpha = Ia;
-
-    /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */
-    *pIbeta = ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib);
-  }
-
-
-  /**
-   * @brief  Clarke transform for Q31 version
-   * @param[in]  Ia       input three-phase coordinate a
-   * @param[in]  Ib       input three-phase coordinate b
-   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
-   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
-   *
-   * Scaling and Overflow Behavior:
-   * \par
-   * The function is implemented using an internal 32-bit accumulator.
-   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-   * There is saturation on the addition, hence there is no risk of overflow.
-   */
-  static __INLINE void arm_clarke_q31(
-  q31_t Ia,
-  q31_t Ib,
-  q31_t * pIalpha,
-  q31_t * pIbeta)
-  {
-    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
-
-    /* Calculating pIalpha from Ia by equation pIalpha = Ia */
-    *pIalpha = Ia;
-
-    /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */
-    product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30);
-
-    /* Intermediate product is calculated by (2/sqrt(3) * Ib) */
-    product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30);
-
-    /* pIbeta is calculated by adding the intermediate products */
-    *pIbeta = __QADD(product1, product2);
-  }
-
-  /**
-   * @} end of clarke group
-   */
-
-  /**
-   * @brief  Converts the elements of the Q7 vector to Q31 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_q7_to_q31(
-  q7_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-
-  /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup inv_clarke Vector Inverse Clarke Transform
-   * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.
-   *
-   * The function operates on a single sample of data and each call to the function returns the processed output.
-   * The library provides separate functions for Q31 and floating-point data types.
-   * \par Algorithm
-   * \image html clarkeInvFormula.gif
-   * where pIa and pIb are the instantaneous stator phases and
-   * Ialpha and Ibeta are the two coordinates of time invariant vector.
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the Q31 version of the Clarke transform.
-   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup inv_clarke
-   * @{
-   */
-
-   /**
-   * @brief  Floating-point Inverse Clarke transform
-   * @param[in]  Ialpha  input two-phase orthogonal vector axis alpha
-   * @param[in]  Ibeta   input two-phase orthogonal vector axis beta
-   * @param[out] pIa     points to output three-phase coordinate a
-   * @param[out] pIb     points to output three-phase coordinate b
-   */
-  static __INLINE void arm_inv_clarke_f32(
-  float32_t Ialpha,
-  float32_t Ibeta,
-  float32_t * pIa,
-  float32_t * pIb)
-  {
-    /* Calculating pIa from Ialpha by equation pIa = Ialpha */
-    *pIa = Ialpha;
-
-    /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */
-    *pIb = -0.5f * Ialpha + 0.8660254039f * Ibeta;
-  }
-
-
-  /**
-   * @brief  Inverse Clarke transform for Q31 version
-   * @param[in]  Ialpha  input two-phase orthogonal vector axis alpha
-   * @param[in]  Ibeta   input two-phase orthogonal vector axis beta
-   * @param[out] pIa     points to output three-phase coordinate a
-   * @param[out] pIb     points to output three-phase coordinate b
-   *
-   * Scaling and Overflow Behavior:
-   * \par
-   * The function is implemented using an internal 32-bit accumulator.
-   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-   * There is saturation on the subtraction, hence there is no risk of overflow.
-   */
-  static __INLINE void arm_inv_clarke_q31(
-  q31_t Ialpha,
-  q31_t Ibeta,
-  q31_t * pIa,
-  q31_t * pIb)
-  {
-    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
-
-    /* Calculating pIa from Ialpha by equation pIa = Ialpha */
-    *pIa = Ialpha;
-
-    /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */
-    product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31);
-
-    /* Intermediate product is calculated by (1/sqrt(3) * pIb) */
-    product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31);
-
-    /* pIb is calculated by subtracting the products */
-    *pIb = __QSUB(product2, product1);
-  }
-
-  /**
-   * @} end of inv_clarke group
-   */
-
-  /**
-   * @brief  Converts the elements of the Q7 vector to Q15 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_q7_to_q15(
-  q7_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-
-  /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup park Vector Park Transform
-   *
-   * Forward Park transform converts the input two-coordinate vector to flux and torque components.
-   * The Park transform can be used to realize the transformation of the Ialpha and the Ibeta currents
-   * from the stationary to the moving reference frame and control the spatial relationship between
-   * the stator vector current and rotor flux vector.
-   * If we consider the d axis aligned with the rotor flux, the diagram below shows the
-   * current vector and the relationship from the two reference frames:
-   * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame"
-   *
-   * The function operates on a single sample of data and each call to the function returns the processed output.
-   * The library provides separate functions for Q31 and floating-point data types.
-   * \par Algorithm
-   * \image html parkFormula.gif
-   * where Ialpha and Ibeta are the stator vector components,
-   * pId and pIq are rotor vector components and cosVal and sinVal are the
-   * cosine and sine values of theta (rotor flux position).
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the Q31 version of the Park transform.
-   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup park
-   * @{
-   */
-
-  /**
-   * @brief Floating-point Park transform
-   * @param[in]  Ialpha  input two-phase vector coordinate alpha
-   * @param[in]  Ibeta   input two-phase vector coordinate beta
-   * @param[out] pId     points to output   rotor reference frame d
-   * @param[out] pIq     points to output   rotor reference frame q
-   * @param[in]  sinVal  sine value of rotation angle theta
-   * @param[in]  cosVal  cosine value of rotation angle theta
-   *
-   * The function implements the forward Park transform.
-   *
-   */
-  static __INLINE void arm_park_f32(
-  float32_t Ialpha,
-  float32_t Ibeta,
-  float32_t * pId,
-  float32_t * pIq,
-  float32_t sinVal,
-  float32_t cosVal)
-  {
-    /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */
-    *pId = Ialpha * cosVal + Ibeta * sinVal;
-
-    /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */
-    *pIq = -Ialpha * sinVal + Ibeta * cosVal;
-  }
-
-
-  /**
-   * @brief  Park transform for Q31 version
-   * @param[in]  Ialpha  input two-phase vector coordinate alpha
-   * @param[in]  Ibeta   input two-phase vector coordinate beta
-   * @param[out] pId     points to output rotor reference frame d
-   * @param[out] pIq     points to output rotor reference frame q
-   * @param[in]  sinVal  sine value of rotation angle theta
-   * @param[in]  cosVal  cosine value of rotation angle theta
-   *
-   * Scaling and Overflow Behavior:
-   * \par
-   * The function is implemented using an internal 32-bit accumulator.
-   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-   * There is saturation on the addition and subtraction, hence there is no risk of overflow.
-   */
-  static __INLINE void arm_park_q31(
-  q31_t Ialpha,
-  q31_t Ibeta,
-  q31_t * pId,
-  q31_t * pIq,
-  q31_t sinVal,
-  q31_t cosVal)
-  {
-    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
-    q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
-
-    /* Intermediate product is calculated by (Ialpha * cosVal) */
-    product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31);
-
-    /* Intermediate product is calculated by (Ibeta * sinVal) */
-    product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31);
-
-
-    /* Intermediate product is calculated by (Ialpha * sinVal) */
-    product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31);
-
-    /* Intermediate product is calculated by (Ibeta * cosVal) */
-    product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31);
-
-    /* Calculate pId by adding the two intermediate products 1 and 2 */
-    *pId = __QADD(product1, product2);
-
-    /* Calculate pIq by subtracting the two intermediate products 3 from 4 */
-    *pIq = __QSUB(product4, product3);
-  }
-
-  /**
-   * @} end of park group
-   */
-
-  /**
-   * @brief  Converts the elements of the Q7 vector to floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q7_to_float(
-  q7_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup inv_park Vector Inverse Park transform
-   * Inverse Park transform converts the input flux and torque components to two-coordinate vector.
-   *
-   * The function operates on a single sample of data and each call to the function returns the processed output.
-   * The library provides separate functions for Q31 and floating-point data types.
-   * \par Algorithm
-   * \image html parkInvFormula.gif
-   * where pIalpha and pIbeta are the stator vector components,
-   * Id and Iq are rotor vector components and cosVal and sinVal are the
-   * cosine and sine values of theta (rotor flux position).
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the Q31 version of the Park transform.
-   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup inv_park
-   * @{
-   */
-
-   /**
-   * @brief  Floating-point Inverse Park transform
-   * @param[in]  Id       input coordinate of rotor reference frame d
-   * @param[in]  Iq       input coordinate of rotor reference frame q
-   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
-   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
-   * @param[in]  sinVal   sine value of rotation angle theta
-   * @param[in]  cosVal   cosine value of rotation angle theta
-   */
-  static __INLINE void arm_inv_park_f32(
-  float32_t Id,
-  float32_t Iq,
-  float32_t * pIalpha,
-  float32_t * pIbeta,
-  float32_t sinVal,
-  float32_t cosVal)
-  {
-    /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */
-    *pIalpha = Id * cosVal - Iq * sinVal;
-
-    /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */
-    *pIbeta = Id * sinVal + Iq * cosVal;
-  }
-
-
-  /**
-   * @brief  Inverse Park transform for   Q31 version
-   * @param[in]  Id       input coordinate of rotor reference frame d
-   * @param[in]  Iq       input coordinate of rotor reference frame q
-   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
-   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
-   * @param[in]  sinVal   sine value of rotation angle theta
-   * @param[in]  cosVal   cosine value of rotation angle theta
-   *
-   * Scaling and Overflow Behavior:
-   * \par
-   * The function is implemented using an internal 32-bit accumulator.
-   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-   * There is saturation on the addition, hence there is no risk of overflow.
-   */
-  static __INLINE void arm_inv_park_q31(
-  q31_t Id,
-  q31_t Iq,
-  q31_t * pIalpha,
-  q31_t * pIbeta,
-  q31_t sinVal,
-  q31_t cosVal)
-  {
-    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
-    q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
-
-    /* Intermediate product is calculated by (Id * cosVal) */
-    product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31);
-
-    /* Intermediate product is calculated by (Iq * sinVal) */
-    product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31);
-
-
-    /* Intermediate product is calculated by (Id * sinVal) */
-    product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31);
-
-    /* Intermediate product is calculated by (Iq * cosVal) */
-    product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31);
-
-    /* Calculate pIalpha by using the two intermediate products 1 and 2 */
-    *pIalpha = __QSUB(product1, product2);
-
-    /* Calculate pIbeta by using the two intermediate products 3 and 4 */
-    *pIbeta = __QADD(product4, product3);
-  }
-
-  /**
-   * @} end of Inverse park group
-   */
-
-
-  /**
-   * @brief  Converts the elements of the Q31 vector to floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q31_to_float(
-  q31_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @ingroup groupInterpolation
-   */
-
-  /**
-   * @defgroup LinearInterpolate Linear Interpolation
-   *
-   * Linear interpolation is a method of curve fitting using linear polynomials.
-   * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line
-   *
-   * \par
-   * \image html LinearInterp.gif "Linear interpolation"
-   *
-   * \par
-   * A  Linear Interpolate function calculates an output value(y), for the input(x)
-   * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values)
-   *
-   * \par Algorithm:
-   * 
-   *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
-   *       where x0, x1 are nearest values of input x
-   *             y0, y1 are nearest values to output y
-   * 

-   *
-   * \par
-   * This set of functions implements Linear interpolation process
-   * for Q7, Q15, Q31, and floating-point data types.  The functions operate on a single
-   * sample of data and each call to the function returns a single processed value.
-   * S points to an instance of the Linear Interpolate function data structure.
-   * x is the input sample value. The functions returns the output value.
-   *
-   * \par
-   * if x is outside of the table boundary, Linear interpolation returns first value of the table
-   * if x is below input range and returns last value of table if x is above range.
-   */
-
-  /**
-   * @addtogroup LinearInterpolate
-   * @{
-   */
-
-  /**
-   * @brief  Process function for the floating-point Linear Interpolation Function.
-   * @param[in,out] S  is an instance of the floating-point Linear Interpolation structure
-   * @param[in]     x  input sample to process
-   * @return y processed output sample.
-   *
-   */
-  static __INLINE float32_t arm_linear_interp_f32(
-  arm_linear_interp_instance_f32 * S,
-  float32_t x)
-  {
-    float32_t y;
-    float32_t x0, x1;                            /* Nearest input values */
-    float32_t y0, y1;                            /* Nearest output values */
-    float32_t xSpacing = S->xSpacing;            /* spacing between input values */
-    int32_t i;                                   /* Index variable */
-    float32_t *pYData = S->pYData;               /* pointer to output table */
-
-    /* Calculation of index */
-    i = (int32_t) ((x - S->x1) / xSpacing);
-
-    if(i < 0)
-    {
-      /* Iniatilize output for below specified range as least output value of table */
-      y = pYData[0];
-    }
-    else if((uint32_t)i >= S->nValues)
-    {
-      /* Iniatilize output for above specified range as last output value of table */
-      y = pYData[S->nValues - 1];
-    }
-    else
-    {
-      /* Calculation of nearest input values */
-      x0 = S->x1 +  i      * xSpacing;
-      x1 = S->x1 + (i + 1) * xSpacing;
-
-      /* Read of nearest output values */
-      y0 = pYData[i];
-      y1 = pYData[i + 1];
-
-      /* Calculation of output */
-      y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0));
-
-    }
-
-    /* returns output value */
-    return (y);
-  }
-
-
-   /**
-   *
-   * @brief  Process function for the Q31 Linear Interpolation Function.
-   * @param[in] pYData   pointer to Q31 Linear Interpolation table
-   * @param[in] x        input sample to process
-   * @param[in] nValues  number of table values
-   * @return y processed output sample.
-   *
-   * \par
-   * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
-   * This function can support maximum of table size 2^12.
-   *
-   */
-  static __INLINE q31_t arm_linear_interp_q31(
-  q31_t * pYData,
-  q31_t x,
-  uint32_t nValues)
-  {
-    q31_t y;                                     /* output */
-    q31_t y0, y1;                                /* Nearest output values */
-    q31_t fract;                                 /* fractional part */
-    int32_t index;                               /* Index to read nearest output values */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    index = ((x & (q31_t)0xFFF00000) >> 20);
-
-    if(index >= (int32_t)(nValues - 1))
-    {
-      return (pYData[nValues - 1]);
-    }
-    else if(index < 0)
-    {
-      return (pYData[0]);
-    }
-    else
-    {
-      /* 20 bits for the fractional part */
-      /* shift left by 11 to keep fract in 1.31 format */
-      fract = (x & 0x000FFFFF) << 11;
-
-      /* Read two nearest output values from the index in 1.31(q31) format */
-      y0 = pYData[index];
-      y1 = pYData[index + 1];
-
-      /* Calculation of y0 * (1-fract) and y is in 2.30 format */
-      y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32));
-
-      /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */
-      y += ((q31_t) (((q63_t) y1 * fract) >> 32));
-
-      /* Convert y to 1.31 format */
-      return (y << 1u);
-    }
-  }
-
-
-  /**
-   *
-   * @brief  Process function for the Q15 Linear Interpolation Function.
-   * @param[in] pYData   pointer to Q15 Linear Interpolation table
-   * @param[in] x        input sample to process
-   * @param[in] nValues  number of table values
-   * @return y processed output sample.
-   *
-   * \par
-   * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
-   * This function can support maximum of table size 2^12.
-   *
-   */
-  static __INLINE q15_t arm_linear_interp_q15(
-  q15_t * pYData,
-  q31_t x,
-  uint32_t nValues)
-  {
-    q63_t y;                                     /* output */
-    q15_t y0, y1;                                /* Nearest output values */
-    q31_t fract;                                 /* fractional part */
-    int32_t index;                               /* Index to read nearest output values */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    index = ((x & (int32_t)0xFFF00000) >> 20);
-
-    if(index >= (int32_t)(nValues - 1))
-    {
-      return (pYData[nValues - 1]);
-    }
-    else if(index < 0)
-    {
-      return (pYData[0]);
-    }
-    else
-    {
-      /* 20 bits for the fractional part */
-      /* fract is in 12.20 format */
-      fract = (x & 0x000FFFFF);
-
-      /* Read two nearest output values from the index */
-      y0 = pYData[index];
-      y1 = pYData[index + 1];
-
-      /* Calculation of y0 * (1-fract) and y is in 13.35 format */
-      y = ((q63_t) y0 * (0xFFFFF - fract));
-
-      /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */
-      y += ((q63_t) y1 * (fract));
-
-      /* convert y to 1.15 format */
-      return (q15_t) (y >> 20);
-    }
-  }
-
-
-  /**
-   *
-   * @brief  Process function for the Q7 Linear Interpolation Function.
-   * @param[in] pYData   pointer to Q7 Linear Interpolation table
-   * @param[in] x        input sample to process
-   * @param[in] nValues  number of table values
-   * @return y processed output sample.
-   *
-   * \par
-   * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
-   * This function can support maximum of table size 2^12.
-   */
-  static __INLINE q7_t arm_linear_interp_q7(
-  q7_t * pYData,
-  q31_t x,
-  uint32_t nValues)
-  {
-    q31_t y;                                     /* output */
-    q7_t y0, y1;                                 /* Nearest output values */
-    q31_t fract;                                 /* fractional part */
-    uint32_t index;                              /* Index to read nearest output values */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    if (x < 0)
-    {
-      return (pYData[0]);
-    }
-    index = (x >> 20) & 0xfff;
-
-    if(index >= (nValues - 1))
-    {
-      return (pYData[nValues - 1]);
-    }
-    else
-    {
-      /* 20 bits for the fractional part */
-      /* fract is in 12.20 format */
-      fract = (x & 0x000FFFFF);
-
-      /* Read two nearest output values from the index and are in 1.7(q7) format */
-      y0 = pYData[index];
-      y1 = pYData[index + 1];
-
-      /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */
-      y = ((y0 * (0xFFFFF - fract)));
-
-      /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */
-      y += (y1 * fract);
-
-      /* convert y to 1.7(q7) format */
-      return (q7_t) (y >> 20);
-     }
-  }
-
-  /**
-   * @} end of LinearInterpolate group
-   */
-
-  /**
-   * @brief  Fast approximation to the trigonometric sine function for floating-point data.
-   * @param[in] x  input value in radians.
-   * @return  sin(x).
-   */
-  float32_t arm_sin_f32(
-  float32_t x);
-
-
-  /**
-   * @brief  Fast approximation to the trigonometric sine function for Q31 data.
-   * @param[in] x  Scaled input value in radians.
-   * @return  sin(x).
-   */
-  q31_t arm_sin_q31(
-  q31_t x);
-
-
-  /**
-   * @brief  Fast approximation to the trigonometric sine function for Q15 data.
-   * @param[in] x  Scaled input value in radians.
-   * @return  sin(x).
-   */
-  q15_t arm_sin_q15(
-  q15_t x);
-
-
-  /**
-   * @brief  Fast approximation to the trigonometric cosine function for floating-point data.
-   * @param[in] x  input value in radians.
-   * @return  cos(x).
-   */
-  float32_t arm_cos_f32(
-  float32_t x);
-
-
-  /**
-   * @brief Fast approximation to the trigonometric cosine function for Q31 data.
-   * @param[in] x  Scaled input value in radians.
-   * @return  cos(x).
-   */
-  q31_t arm_cos_q31(
-  q31_t x);
-
-
-  /**
-   * @brief  Fast approximation to the trigonometric cosine function for Q15 data.
-   * @param[in] x  Scaled input value in radians.
-   * @return  cos(x).
-   */
-  q15_t arm_cos_q15(
-  q15_t x);
-
-
-  /**
-   * @ingroup groupFastMath
-   */
-
-
-  /**
-   * @defgroup SQRT Square Root
-   *
-   * Computes the square root of a number.
-   * There are separate functions for Q15, Q31, and floating-point data types.
-   * The square root function is computed using the Newton-Raphson algorithm.
-   * This is an iterative algorithm of the form:
-   * 
-   *      x1 = x0 - f(x0)/f'(x0)
-   * 

-   * where x1 is the current estimate,
-   * x0 is the previous estimate, and
-   * f'(x0) is the derivative of f() evaluated at x0.
-   * For the square root function, the algorithm reduces to:
-   * 
-   *     x0 = in/2                         [initial guess]
-   *     x1 = 1/2 * ( x0 + in / x0)        [each iteration]
-   * 

-   */
-
-
-  /**
-   * @addtogroup SQRT
-   * @{
-   */
-
-  /**
-   * @brief  Floating-point square root function.
-   * @param[in]  in    input value.
-   * @param[out] pOut  square root of input value.
-   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
-   * in is negative value and returns zero output for negative values.
-   */
-  static __INLINE arm_status arm_sqrt_f32(
-  float32_t in,
-  float32_t * pOut)
-  {
-    if(in >= 0.0f)
-    {
-
-#if   (__FPU_USED == 1) && defined ( __CC_ARM   )
-      *pOut = __sqrtf(in);
-#elif (__FPU_USED == 1) && (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
-      *pOut = __builtin_sqrtf(in);
-#elif (__FPU_USED == 1) && defined(__GNUC__)
-      *pOut = __builtin_sqrtf(in);
-#elif (__FPU_USED == 1) && defined ( __ICCARM__ ) && (__VER__ >= 6040000)
-      __ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in));
-#else
-      *pOut = sqrtf(in);
-#endif
-
-      return (ARM_MATH_SUCCESS);
-    }
-    else
-    {
-      *pOut = 0.0f;
-      return (ARM_MATH_ARGUMENT_ERROR);
-    }
-  }
-
-
-  /**
-   * @brief Q31 square root function.
-   * @param[in]  in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
-   * @param[out] pOut  square root of input value.
-   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
-   * in is negative value and returns zero output for negative values.
-   */
-  arm_status arm_sqrt_q31(
-  q31_t in,
-  q31_t * pOut);
-
-
-  /**
-   * @brief  Q15 square root function.
-   * @param[in]  in    input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
-   * @param[out] pOut  square root of input value.
-   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
-   * in is negative value and returns zero output for negative values.
-   */
-  arm_status arm_sqrt_q15(
-  q15_t in,
-  q15_t * pOut);
-
-  /**
-   * @} end of SQRT group
-   */
-
-
-  /**
-   * @brief floating-point Circular write function.
-   */
-  static __INLINE void arm_circularWrite_f32(
-  int32_t * circBuffer,
-  int32_t L,
-  uint16_t * writeOffset,
-  int32_t bufferInc,
-  const int32_t * src,
-  int32_t srcInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0u;
-    int32_t wOffset;
-
-    /* Copy the value of Index pointer that points
-     * to the current location where the input samples to be copied */
-    wOffset = *writeOffset;
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while(i > 0u)
-    {
-      /* copy the input sample to the circular buffer */
-      circBuffer[wOffset] = *src;
-
-      /* Update the input pointer */
-      src += srcInc;
-
-      /* Circularly update wOffset.  Watch out for positive and negative value */
-      wOffset += bufferInc;
-      if(wOffset >= L)
-        wOffset -= L;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *writeOffset = (uint16_t)wOffset;
-  }
-
-
-
-  /**
-   * @brief floating-point Circular Read function.
-   */
-  static __INLINE void arm_circularRead_f32(
-  int32_t * circBuffer,
-  int32_t L,
-  int32_t * readOffset,
-  int32_t bufferInc,
-  int32_t * dst,
-  int32_t * dst_base,
-  int32_t dst_length,
-  int32_t dstInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0u;
-    int32_t rOffset, dst_end;
-
-    /* Copy the value of Index pointer that points
-     * to the current location from where the input samples to be read */
-    rOffset = *readOffset;
-    dst_end = (int32_t) (dst_base + dst_length);
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while(i > 0u)
-    {
-      /* copy the sample from the circular buffer to the destination buffer */
-      *dst = circBuffer[rOffset];
-
-      /* Update the input pointer */
-      dst += dstInc;
-
-      if(dst == (int32_t *) dst_end)
-      {
-        dst = dst_base;
-      }
-
-      /* Circularly update rOffset.  Watch out for positive and negative value  */
-      rOffset += bufferInc;
-
-      if(rOffset >= L)
-      {
-        rOffset -= L;
-      }
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *readOffset = rOffset;
-  }
-
-
-  /**
-   * @brief Q15 Circular write function.
-   */
-  static __INLINE void arm_circularWrite_q15(
-  q15_t * circBuffer,
-  int32_t L,
-  uint16_t * writeOffset,
-  int32_t bufferInc,
-  const q15_t * src,
-  int32_t srcInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0u;
-    int32_t wOffset;
-
-    /* Copy the value of Index pointer that points
-     * to the current location where the input samples to be copied */
-    wOffset = *writeOffset;
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while(i > 0u)
-    {
-      /* copy the input sample to the circular buffer */
-      circBuffer[wOffset] = *src;
-
-      /* Update the input pointer */
-      src += srcInc;
-
-      /* Circularly update wOffset.  Watch out for positive and negative value */
-      wOffset += bufferInc;
-      if(wOffset >= L)
-        wOffset -= L;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *writeOffset = (uint16_t)wOffset;
-  }
-
-
-  /**
-   * @brief Q15 Circular Read function.
-   */
-  static __INLINE void arm_circularRead_q15(
-  q15_t * circBuffer,
-  int32_t L,
-  int32_t * readOffset,
-  int32_t bufferInc,
-  q15_t * dst,
-  q15_t * dst_base,
-  int32_t dst_length,
-  int32_t dstInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0;
-    int32_t rOffset, dst_end;
-
-    /* Copy the value of Index pointer that points
-     * to the current location from where the input samples to be read */
-    rOffset = *readOffset;
-
-    dst_end = (int32_t) (dst_base + dst_length);
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while(i > 0u)
-    {
-      /* copy the sample from the circular buffer to the destination buffer */
-      *dst = circBuffer[rOffset];
-
-      /* Update the input pointer */
-      dst += dstInc;
-
-      if(dst == (q15_t *) dst_end)
-      {
-        dst = dst_base;
-      }
-
-      /* Circularly update wOffset.  Watch out for positive and negative value */
-      rOffset += bufferInc;
-
-      if(rOffset >= L)
-      {
-        rOffset -= L;
-      }
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *readOffset = rOffset;
-  }
-
-
-  /**
-   * @brief Q7 Circular write function.
-   */
-  static __INLINE void arm_circularWrite_q7(
-  q7_t * circBuffer,
-  int32_t L,
-  uint16_t * writeOffset,
-  int32_t bufferInc,
-  const q7_t * src,
-  int32_t srcInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0u;
-    int32_t wOffset;
-
-    /* Copy the value of Index pointer that points
-     * to the current location where the input samples to be copied */
-    wOffset = *writeOffset;
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while(i > 0u)
-    {
-      /* copy the input sample to the circular buffer */
-      circBuffer[wOffset] = *src;
-
-      /* Update the input pointer */
-      src += srcInc;
-
-      /* Circularly update wOffset.  Watch out for positive and negative value */
-      wOffset += bufferInc;
-      if(wOffset >= L)
-        wOffset -= L;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *writeOffset = (uint16_t)wOffset;
-  }
-
-
-  /**
-   * @brief Q7 Circular Read function.
-   */
-  static __INLINE void arm_circularRead_q7(
-  q7_t * circBuffer,
-  int32_t L,
-  int32_t * readOffset,
-  int32_t bufferInc,
-  q7_t * dst,
-  q7_t * dst_base,
-  int32_t dst_length,
-  int32_t dstInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0;
-    int32_t rOffset, dst_end;
-
-    /* Copy the value of Index pointer that points
-     * to the current location from where the input samples to be read */
-    rOffset = *readOffset;
-
-    dst_end = (int32_t) (dst_base + dst_length);
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while(i > 0u)
-    {
-      /* copy the sample from the circular buffer to the destination buffer */
-      *dst = circBuffer[rOffset];
-
-      /* Update the input pointer */
-      dst += dstInc;
-
-      if(dst == (q7_t *) dst_end)
-      {
-        dst = dst_base;
-      }
-
-      /* Circularly update rOffset.  Watch out for positive and negative value */
-      rOffset += bufferInc;
-
-      if(rOffset >= L)
-      {
-        rOffset -= L;
-      }
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *readOffset = rOffset;
-  }
-
-
-  /**
-   * @brief  Sum of the squares of the elements of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_power_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult);
-
-
-  /**
-   * @brief  Sum of the squares of the elements of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_power_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
-
-
-  /**
-   * @brief  Sum of the squares of the elements of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_power_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult);
-
-
-  /**
-   * @brief  Sum of the squares of the elements of a Q7 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_power_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
-
-
-  /**
-   * @brief  Mean value of a Q7 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_mean_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult);
-
-
-  /**
-   * @brief  Mean value of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_mean_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult);
-
-
-  /**
-   * @brief  Mean value of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_mean_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
-
-
-  /**
-   * @brief  Mean value of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_mean_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
-
-
-  /**
-   * @brief  Variance of the elements of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_var_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
-
-
-  /**
-   * @brief  Variance of the elements of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_var_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
-
-
-  /**
-   * @brief  Variance of the elements of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_var_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult);
-
-
-  /**
-   * @brief  Root Mean Square of the elements of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_rms_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
-
-
-  /**
-   * @brief  Root Mean Square of the elements of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_rms_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
-
-
-  /**
-   * @brief  Root Mean Square of the elements of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_rms_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult);
-
-
-  /**
-   * @brief  Standard deviation of the elements of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_std_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
-
-
-  /**
-   * @brief  Standard deviation of the elements of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_std_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
-
-
-  /**
-   * @brief  Standard deviation of the elements of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_std_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult);
-
-
-  /**
-   * @brief  Floating-point complex magnitude
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Q31 complex magnitude
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Q15 complex magnitude
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Q15 complex dot product
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   * @param[out] realResult  real part of the result returned here
-   * @param[out] imagResult  imaginary part of the result returned here
-   */
-  void arm_cmplx_dot_prod_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  uint32_t numSamples,
-  q31_t * realResult,
-  q31_t * imagResult);
-
-
-  /**
-   * @brief  Q31 complex dot product
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   * @param[out] realResult  real part of the result returned here
-   * @param[out] imagResult  imaginary part of the result returned here
-   */
-  void arm_cmplx_dot_prod_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  uint32_t numSamples,
-  q63_t * realResult,
-  q63_t * imagResult);
-
-
-  /**
-   * @brief  Floating-point complex dot product
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   * @param[out] realResult  real part of the result returned here
-   * @param[out] imagResult  imaginary part of the result returned here
-   */
-  void arm_cmplx_dot_prod_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  uint32_t numSamples,
-  float32_t * realResult,
-  float32_t * imagResult);
-
-
-  /**
-   * @brief  Q15 complex-by-real multiplication
-   * @param[in]  pSrcCmplx   points to the complex input vector
-   * @param[in]  pSrcReal    points to the real input vector
-   * @param[out] pCmplxDst   points to the complex output vector
-   * @param[in]  numSamples  number of samples in each vector
-   */
-  void arm_cmplx_mult_real_q15(
-  q15_t * pSrcCmplx,
-  q15_t * pSrcReal,
-  q15_t * pCmplxDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Q31 complex-by-real multiplication
-   * @param[in]  pSrcCmplx   points to the complex input vector
-   * @param[in]  pSrcReal    points to the real input vector
-   * @param[out] pCmplxDst   points to the complex output vector
-   * @param[in]  numSamples  number of samples in each vector
-   */
-  void arm_cmplx_mult_real_q31(
-  q31_t * pSrcCmplx,
-  q31_t * pSrcReal,
-  q31_t * pCmplxDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Floating-point complex-by-real multiplication
-   * @param[in]  pSrcCmplx   points to the complex input vector
-   * @param[in]  pSrcReal    points to the real input vector
-   * @param[out] pCmplxDst   points to the complex output vector
-   * @param[in]  numSamples  number of samples in each vector
-   */
-  void arm_cmplx_mult_real_f32(
-  float32_t * pSrcCmplx,
-  float32_t * pSrcReal,
-  float32_t * pCmplxDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Minimum value of a Q7 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] result     is output pointer
-   * @param[in]  index      is the array index of the minimum value in the input buffer.
-   */
-  void arm_min_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * result,
-  uint32_t * index);
-
-
-  /**
-   * @brief  Minimum value of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output pointer
-   * @param[in]  pIndex     is the array index of the minimum value in the input buffer.
-   */
-  void arm_min_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult,
-  uint32_t * pIndex);
-
-
-  /**
-   * @brief  Minimum value of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output pointer
-   * @param[out] pIndex     is the array index of the minimum value in the input buffer.
-   */
-  void arm_min_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult,
-  uint32_t * pIndex);
-
-
-  /**
-   * @brief  Minimum value of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output pointer
-   * @param[out] pIndex     is the array index of the minimum value in the input buffer.
-   */
-  void arm_min_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult,
-  uint32_t * pIndex);
-
-
-/**
- * @brief Maximum value of a Q7 vector.
- * @param[in]  pSrc       points to the input buffer
- * @param[in]  blockSize  length of the input vector
- * @param[out] pResult    maximum value returned here
- * @param[out] pIndex     index of maximum value returned here
- */
-  void arm_max_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult,
-  uint32_t * pIndex);
-
-
-/**
- * @brief Maximum value of a Q15 vector.
- * @param[in]  pSrc       points to the input buffer
- * @param[in]  blockSize  length of the input vector
- * @param[out] pResult    maximum value returned here
- * @param[out] pIndex     index of maximum value returned here
- */
-  void arm_max_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult,
-  uint32_t * pIndex);
-
-
-/**
- * @brief Maximum value of a Q31 vector.
- * @param[in]  pSrc       points to the input buffer
- * @param[in]  blockSize  length of the input vector
- * @param[out] pResult    maximum value returned here
- * @param[out] pIndex     index of maximum value returned here
- */
-  void arm_max_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult,
-  uint32_t * pIndex);
-
-
-/**
- * @brief Maximum value of a floating-point vector.
- * @param[in]  pSrc       points to the input buffer
- * @param[in]  blockSize  length of the input vector
- * @param[out] pResult    maximum value returned here
- * @param[out] pIndex     index of maximum value returned here
- */
-  void arm_max_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult,
-  uint32_t * pIndex);
-
-
-  /**
-   * @brief  Q15 complex-by-complex multiplication
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_mult_cmplx_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Q31 complex-by-complex multiplication
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_mult_cmplx_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief  Floating-point complex-by-complex multiplication
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_mult_cmplx_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t numSamples);
-
-
-  /**
-   * @brief Converts the elements of the floating-point vector to Q31 vector.
-   * @param[in]  pSrc       points to the floating-point input vector
-   * @param[out] pDst       points to the Q31 output vector
-   * @param[in]  blockSize  length of the input vector
-   */
-  void arm_float_to_q31(
-  float32_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Converts the elements of the floating-point vector to Q15 vector.
-   * @param[in]  pSrc       points to the floating-point input vector
-   * @param[out] pDst       points to the Q15 output vector
-   * @param[in]  blockSize  length of the input vector
-   */
-  void arm_float_to_q15(
-  float32_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Converts the elements of the floating-point vector to Q7 vector.
-   * @param[in]  pSrc       points to the floating-point input vector
-   * @param[out] pDst       points to the Q7 output vector
-   * @param[in]  blockSize  length of the input vector
-   */
-  void arm_float_to_q7(
-  float32_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q31 vector to Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q31_to_q15(
-  q31_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q31 vector to Q7 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q31_to_q7(
-  q31_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q15 vector to floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q15_to_float(
-  q15_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q15 vector to Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q15_to_q31(
-  q15_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q15 vector to Q7 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q15_to_q7(
-  q15_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @ingroup groupInterpolation
-   */
-
-  /**
-   * @defgroup BilinearInterpolate Bilinear Interpolation
-   *
-   * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid.
-   * The underlying function f(x, y) is sampled on a regular grid and the interpolation process
-   * determines values between the grid points.
-   * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension.
-   * Bilinear interpolation is often used in image processing to rescale images.
-   * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.
-   *
-   * Algorithm
-   * \par
-   * The instance structure used by the bilinear interpolation functions describes a two dimensional data table.
-   * For floating-point, the instance structure is defined as:
-   * 
-   *   typedef struct
-   *   {
-   *     uint16_t numRows;
-   *     uint16_t numCols;
-   *     float32_t *pData;
-   * } arm_bilinear_interp_instance_f32;
-   * 

-   *
-   * \par
-   * where numRows specifies the number of rows in the table;
-   * numCols specifies the number of columns in the table;
-   * and pData points to an array of size numRows*numCols values.
-   * The data table pTable is organized in row order and the supplied data values fall on integer indexes.
-   * That is, table element (x,y) is located at pTable[x + y*numCols] where x and y are integers.
-   *
-   * \par
-   * Let (x, y) specify the desired interpolation point.  Then define:
-   * 
-   *     XF = floor(x)
-   *     YF = floor(y)
-   * 

-   * \par
-   * The interpolated output point is computed as:
-   * 
-   *  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
-   *           + f(XF+1, YF) * (x-XF)*(1-(y-YF))
-   *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
-   *           + f(XF+1, YF+1) * (x-XF)*(y-YF)
-   * 

-   * Note that the coordinates (x, y) contain integer and fractional components.
-   * The integer components specify which portion of the table to use while the
-   * fractional components control the interpolation processor.
-   *
-   * \par
-   * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
-   */
-
-  /**
-   * @addtogroup BilinearInterpolate
-   * @{
-   */
-
-
-  /**
-  *
-  * @brief  Floating-point bilinear interpolation.
-  * @param[in,out] S  points to an instance of the interpolation structure.
-  * @param[in]     X  interpolation coordinate.
-  * @param[in]     Y  interpolation coordinate.
-  * @return out interpolated value.
-  */
-  static __INLINE float32_t arm_bilinear_interp_f32(
-  const arm_bilinear_interp_instance_f32 * S,
-  float32_t X,
-  float32_t Y)
-  {
-    float32_t out;
-    float32_t f00, f01, f10, f11;
-    float32_t *pData = S->pData;
-    int32_t xIndex, yIndex, index;
-    float32_t xdiff, ydiff;
-    float32_t b1, b2, b3, b4;
-
-    xIndex = (int32_t) X;
-    yIndex = (int32_t) Y;
-
-    /* Care taken for table outside boundary */
-    /* Returns zero output when values are outside table boundary */
-    if(xIndex < 0 || xIndex > (S->numRows - 1) || yIndex < 0 || yIndex > (S->numCols - 1))
-    {
-      return (0);
-    }
-
-    /* Calculation of index for two nearest points in X-direction */
-    index = (xIndex - 1) + (yIndex - 1) * S->numCols;
-
-
-    /* Read two nearest points in X-direction */
-    f00 = pData[index];
-    f01 = pData[index + 1];
-
-    /* Calculation of index for two nearest points in Y-direction */
-    index = (xIndex - 1) + (yIndex) * S->numCols;
-
-
-    /* Read two nearest points in Y-direction */
-    f10 = pData[index];
-    f11 = pData[index + 1];
-
-    /* Calculation of intermediate values */
-    b1 = f00;
-    b2 = f01 - f00;
-    b3 = f10 - f00;
-    b4 = f00 - f01 - f10 + f11;
-
-    /* Calculation of fractional part in X */
-    xdiff = X - xIndex;
-
-    /* Calculation of fractional part in Y */
-    ydiff = Y - yIndex;
-
-    /* Calculation of bi-linear interpolated output */
-    out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff;
-
-    /* return to application */
-    return (out);
-  }
-
-
-  /**
-  *
-  * @brief  Q31 bilinear interpolation.
-  * @param[in,out] S  points to an instance of the interpolation structure.
-  * @param[in]     X  interpolation coordinate in 12.20 format.
-  * @param[in]     Y  interpolation coordinate in 12.20 format.
-  * @return out interpolated value.
-  */
-  static __INLINE q31_t arm_bilinear_interp_q31(
-  arm_bilinear_interp_instance_q31 * S,
-  q31_t X,
-  q31_t Y)
-  {
-    q31_t out;                                   /* Temporary output */
-    q31_t acc = 0;                               /* output */
-    q31_t xfract, yfract;                        /* X, Y fractional parts */
-    q31_t x1, x2, y1, y2;                        /* Nearest output values */
-    int32_t rI, cI;                              /* Row and column indices */
-    q31_t *pYData = S->pData;                    /* pointer to output table values */
-    uint32_t nCols = S->numCols;                 /* num of rows */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    rI = ((X & (q31_t)0xFFF00000) >> 20);
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    cI = ((Y & (q31_t)0xFFF00000) >> 20);
-
-    /* Care taken for table outside boundary */
-    /* Returns zero output when values are outside table boundary */
-    if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
-    {
-      return (0);
-    }
-
-    /* 20 bits for the fractional part */
-    /* shift left xfract by 11 to keep 1.31 format */
-    xfract = (X & 0x000FFFFF) << 11u;
-
-    /* Read two nearest output values from the index */
-    x1 = pYData[(rI) + (int32_t)nCols * (cI)    ];
-    x2 = pYData[(rI) + (int32_t)nCols * (cI) + 1];
-
-    /* 20 bits for the fractional part */
-    /* shift left yfract by 11 to keep 1.31 format */
-    yfract = (Y & 0x000FFFFF) << 11u;
-
-    /* Read two nearest output values from the index */
-    y1 = pYData[(rI) + (int32_t)nCols * (cI + 1)    ];
-    y2 = pYData[(rI) + (int32_t)nCols * (cI + 1) + 1];
-
-    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */
-    out = ((q31_t) (((q63_t) x1  * (0x7FFFFFFF - xfract)) >> 32));
-    acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32));
-
-    /* x2 * (xfract) * (1-yfract)  in 3.29(q29) and adding to acc */
-    out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32));
-    acc += ((q31_t) ((q63_t) out * (xfract) >> 32));
-
-    /* y1 * (1 - xfract) * (yfract)  in 3.29(q29) and adding to acc */
-    out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32));
-    acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
-
-    /* y2 * (xfract) * (yfract)  in 3.29(q29) and adding to acc */
-    out = ((q31_t) ((q63_t) y2 * (xfract) >> 32));
-    acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
-
-    /* Convert acc to 1.31(q31) format */
-    return ((q31_t)(acc << 2));
-  }
-
-
-  /**
-  * @brief  Q15 bilinear interpolation.
-  * @param[in,out] S  points to an instance of the interpolation structure.
-  * @param[in]     X  interpolation coordinate in 12.20 format.
-  * @param[in]     Y  interpolation coordinate in 12.20 format.
-  * @return out interpolated value.
-  */
-  static __INLINE q15_t arm_bilinear_interp_q15(
-  arm_bilinear_interp_instance_q15 * S,
-  q31_t X,
-  q31_t Y)
-  {
-    q63_t acc = 0;                               /* output */
-    q31_t out;                                   /* Temporary output */
-    q15_t x1, x2, y1, y2;                        /* Nearest output values */
-    q31_t xfract, yfract;                        /* X, Y fractional parts */
-    int32_t rI, cI;                              /* Row and column indices */
-    q15_t *pYData = S->pData;                    /* pointer to output table values */
-    uint32_t nCols = S->numCols;                 /* num of rows */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    rI = ((X & (q31_t)0xFFF00000) >> 20);
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    cI = ((Y & (q31_t)0xFFF00000) >> 20);
-
-    /* Care taken for table outside boundary */
-    /* Returns zero output when values are outside table boundary */
-    if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
-    {
-      return (0);
-    }
-
-    /* 20 bits for the fractional part */
-    /* xfract should be in 12.20 format */
-    xfract = (X & 0x000FFFFF);
-
-    /* Read two nearest output values from the index */
-    x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI)    ];
-    x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];
-
-    /* 20 bits for the fractional part */
-    /* yfract should be in 12.20 format */
-    yfract = (Y & 0x000FFFFF);
-
-    /* Read two nearest output values from the index */
-    y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1)    ];
-    y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];
-
-    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */
-
-    /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */
-    /* convert 13.35 to 13.31 by right shifting  and out is in 1.31 */
-    out = (q31_t) (((q63_t) x1 * (0xFFFFF - xfract)) >> 4u);
-    acc = ((q63_t) out * (0xFFFFF - yfract));
-
-    /* x2 * (xfract) * (1-yfract)  in 1.51 and adding to acc */
-    out = (q31_t) (((q63_t) x2 * (0xFFFFF - yfract)) >> 4u);
-    acc += ((q63_t) out * (xfract));
-
-    /* y1 * (1 - xfract) * (yfract)  in 1.51 and adding to acc */
-    out = (q31_t) (((q63_t) y1 * (0xFFFFF - xfract)) >> 4u);
-    acc += ((q63_t) out * (yfract));
-
-    /* y2 * (xfract) * (yfract)  in 1.51 and adding to acc */
-    out = (q31_t) (((q63_t) y2 * (xfract)) >> 4u);
-    acc += ((q63_t) out * (yfract));
-
-    /* acc is in 13.51 format and down shift acc by 36 times */
-    /* Convert out to 1.15 format */
-    return ((q15_t)(acc >> 36));
-  }
-
-
-  /**
-  * @brief  Q7 bilinear interpolation.
-  * @param[in,out] S  points to an instance of the interpolation structure.
-  * @param[in]     X  interpolation coordinate in 12.20 format.
-  * @param[in]     Y  interpolation coordinate in 12.20 format.
-  * @return out interpolated value.
-  */
-  static __INLINE q7_t arm_bilinear_interp_q7(
-  arm_bilinear_interp_instance_q7 * S,
-  q31_t X,
-  q31_t Y)
-  {
-    q63_t acc = 0;                               /* output */
-    q31_t out;                                   /* Temporary output */
-    q31_t xfract, yfract;                        /* X, Y fractional parts */
-    q7_t x1, x2, y1, y2;                         /* Nearest output values */
-    int32_t rI, cI;                              /* Row and column indices */
-    q7_t *pYData = S->pData;                     /* pointer to output table values */
-    uint32_t nCols = S->numCols;                 /* num of rows */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    rI = ((X & (q31_t)0xFFF00000) >> 20);
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    cI = ((Y & (q31_t)0xFFF00000) >> 20);
-
-    /* Care taken for table outside boundary */
-    /* Returns zero output when values are outside table boundary */
-    if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
-    {
-      return (0);
-    }
-
-    /* 20 bits for the fractional part */
-    /* xfract should be in 12.20 format */
-    xfract = (X & (q31_t)0x000FFFFF);
-
-    /* Read two nearest output values from the index */
-    x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI)    ];
-    x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];
-
-    /* 20 bits for the fractional part */
-    /* yfract should be in 12.20 format */
-    yfract = (Y & (q31_t)0x000FFFFF);
-
-    /* Read two nearest output values from the index */
-    y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1)    ];
-    y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];
-
-    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */
-    out = ((x1 * (0xFFFFF - xfract)));
-    acc = (((q63_t) out * (0xFFFFF - yfract)));
-
-    /* x2 * (xfract) * (1-yfract)  in 2.22 and adding to acc */
-    out = ((x2 * (0xFFFFF - yfract)));
-    acc += (((q63_t) out * (xfract)));
-
-    /* y1 * (1 - xfract) * (yfract)  in 2.22 and adding to acc */
-    out = ((y1 * (0xFFFFF - xfract)));
-    acc += (((q63_t) out * (yfract)));
-
-    /* y2 * (xfract) * (yfract)  in 2.22 and adding to acc */
-    out = ((y2 * (yfract)));
-    acc += (((q63_t) out * (xfract)));
-
-    /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */
-    return ((q7_t)(acc >> 40));
-  }
-
-  /**
-   * @} end of BilinearInterpolate group
-   */
-
-
-/* SMMLAR */
-#define multAcc_32x32_keep32_R(a, x, y) \
-    a = (q31_t) (((((q63_t) a) << 32) + ((q63_t) x * y) + 0x80000000LL ) >> 32)
-
-/* SMMLSR */
-#define multSub_32x32_keep32_R(a, x, y) \
-    a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32)
-
-/* SMMULR */
-#define mult_32x32_keep32_R(a, x, y) \
-    a = (q31_t) (((q63_t) x * y + 0x80000000LL ) >> 32)
-
-/* SMMLA */
-#define multAcc_32x32_keep32(a, x, y) \
-    a += (q31_t) (((q63_t) x * y) >> 32)
-
-/* SMMLS */
-#define multSub_32x32_keep32(a, x, y) \
-    a -= (q31_t) (((q63_t) x * y) >> 32)
-
-/* SMMUL */
-#define mult_32x32_keep32(a, x, y) \
-    a = (q31_t) (((q63_t) x * y ) >> 32)
-
-
-#if defined ( __CC_ARM )
-  /* Enter low optimization region - place directly above function definition */
-  #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7)
-    #define LOW_OPTIMIZATION_ENTER \
-       _Pragma ("push")         \
-       _Pragma ("O1")
-  #else
-    #define LOW_OPTIMIZATION_ENTER
-  #endif
-
-  /* Exit low optimization region - place directly after end of function definition */
-  #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7)
-    #define LOW_OPTIMIZATION_EXIT \
-       _Pragma ("pop")
-  #else
-    #define LOW_OPTIMIZATION_EXIT
-  #endif
-
-  /* Enter low optimization region - place directly above function definition */
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-
-  /* Exit low optimization region - place directly after end of function definition */
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #define LOW_OPTIMIZATION_ENTER
-  #define LOW_OPTIMIZATION_EXIT
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined(__GNUC__)
-  #define LOW_OPTIMIZATION_ENTER __attribute__(( optimize("-O1") ))
-  #define LOW_OPTIMIZATION_EXIT
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined(__ICCARM__)
-  /* Enter low optimization region - place directly above function definition */
-  #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7)
-    #define LOW_OPTIMIZATION_ENTER \
-       _Pragma ("optimize=low")
-  #else
-    #define LOW_OPTIMIZATION_ENTER
-  #endif
-
-  /* Exit low optimization region - place directly after end of function definition */
-  #define LOW_OPTIMIZATION_EXIT
-
-  /* Enter low optimization region - place directly above function definition */
-  #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7)
-    #define IAR_ONLY_LOW_OPTIMIZATION_ENTER \
-       _Pragma ("optimize=low")
-  #else
-    #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #endif
-
-  /* Exit low optimization region - place directly after end of function definition */
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined(__CSMC__)
-  #define LOW_OPTIMIZATION_ENTER
-  #define LOW_OPTIMIZATION_EXIT
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined(__TASKING__)
-  #define LOW_OPTIMIZATION_ENTER
-  #define LOW_OPTIMIZATION_EXIT
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#endif
-
-
-#ifdef   __cplusplus
-}
-#endif
-
-
-#if defined ( __GNUC__ )
-#pragma GCC diagnostic pop
-#endif
-
-#endif /* _ARM_MATH_H */
-
-/**
- *
- * End of file.
- */
diff --git a/Drivers/CMSIS/Include/cmsis_armcc.h b/Drivers/CMSIS/Include/cmsis_armcc.h
deleted file mode 100755
index 74c49c67..00000000
--- a/Drivers/CMSIS/Include/cmsis_armcc.h
+++ /dev/null
@@ -1,734 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_armcc.h
- * @brief    CMSIS Cortex-M Core Function/Instruction Header File
- * @version  V4.30
- * @date     20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#ifndef __CMSIS_ARMCC_H
-#define __CMSIS_ARMCC_H
-
-
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
-  #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
-#endif
-
-/* ###########################  Core Function Access  ########################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
-  @{
- */
-
-/* intrinsic void __enable_irq();     */
-/* intrinsic void __disable_irq();    */
-
-/**
-  \brief   Get Control Register
-  \details Returns the content of the Control Register.
-  \return               Control Register value
- */
-__STATIC_INLINE uint32_t __get_CONTROL(void)
-{
-  register uint32_t __regControl         __ASM("control");
-  return(__regControl);
-}
-
-
-/**
-  \brief   Set Control Register
-  \details Writes the given value to the Control Register.
-  \param [in]    control  Control Register value to set
- */
-__STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
-  register uint32_t __regControl         __ASM("control");
-  __regControl = control;
-}
-
-
-/**
-  \brief   Get IPSR Register
-  \details Returns the content of the IPSR Register.
-  \return               IPSR Register value
- */
-__STATIC_INLINE uint32_t __get_IPSR(void)
-{
-  register uint32_t __regIPSR          __ASM("ipsr");
-  return(__regIPSR);
-}
-
-
-/**
-  \brief   Get APSR Register
-  \details Returns the content of the APSR Register.
-  \return               APSR Register value
- */
-__STATIC_INLINE uint32_t __get_APSR(void)
-{
-  register uint32_t __regAPSR          __ASM("apsr");
-  return(__regAPSR);
-}
-
-
-/**
-  \brief   Get xPSR Register
-  \details Returns the content of the xPSR Register.
-  \return               xPSR Register value
- */
-__STATIC_INLINE uint32_t __get_xPSR(void)
-{
-  register uint32_t __regXPSR          __ASM("xpsr");
-  return(__regXPSR);
-}
-
-
-/**
-  \brief   Get Process Stack Pointer
-  \details Returns the current value of the Process Stack Pointer (PSP).
-  \return               PSP Register value
- */
-__STATIC_INLINE uint32_t __get_PSP(void)
-{
-  register uint32_t __regProcessStackPointer  __ASM("psp");
-  return(__regProcessStackPointer);
-}
-
-
-/**
-  \brief   Set Process Stack Pointer
-  \details Assigns the given value to the Process Stack Pointer (PSP).
-  \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
-  register uint32_t __regProcessStackPointer  __ASM("psp");
-  __regProcessStackPointer = topOfProcStack;
-}
-
-
-/**
-  \brief   Get Main Stack Pointer
-  \details Returns the current value of the Main Stack Pointer (MSP).
-  \return               MSP Register value
- */
-__STATIC_INLINE uint32_t __get_MSP(void)
-{
-  register uint32_t __regMainStackPointer     __ASM("msp");
-  return(__regMainStackPointer);
-}
-
-
-/**
-  \brief   Set Main Stack Pointer
-  \details Assigns the given value to the Main Stack Pointer (MSP).
-  \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
-  register uint32_t __regMainStackPointer     __ASM("msp");
-  __regMainStackPointer = topOfMainStack;
-}
-
-
-/**
-  \brief   Get Priority Mask
-  \details Returns the current state of the priority mask bit from the Priority Mask Register.
-  \return               Priority Mask value
- */
-__STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
-  register uint32_t __regPriMask         __ASM("primask");
-  return(__regPriMask);
-}
-
-
-/**
-  \brief   Set Priority Mask
-  \details Assigns the given value to the Priority Mask Register.
-  \param [in]    priMask  Priority Mask
- */
-__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
-  register uint32_t __regPriMask         __ASM("primask");
-  __regPriMask = (priMask);
-}
-
-
-#if       (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
-
-/**
-  \brief   Enable FIQ
-  \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-#define __enable_fault_irq                __enable_fiq
-
-
-/**
-  \brief   Disable FIQ
-  \details Disables FIQ interrupts by setting the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-#define __disable_fault_irq               __disable_fiq
-
-
-/**
-  \brief   Get Base Priority
-  \details Returns the current value of the Base Priority register.
-  \return               Base Priority register value
- */
-__STATIC_INLINE uint32_t  __get_BASEPRI(void)
-{
-  register uint32_t __regBasePri         __ASM("basepri");
-  return(__regBasePri);
-}
-
-
-/**
-  \brief   Set Base Priority
-  \details Assigns the given value to the Base Priority register.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
-{
-  register uint32_t __regBasePri         __ASM("basepri");
-  __regBasePri = (basePri & 0xFFU);
-}
-
-
-/**
-  \brief   Set Base Priority with condition
-  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
-           or the new value increases the BASEPRI priority level.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
-{
-  register uint32_t __regBasePriMax      __ASM("basepri_max");
-  __regBasePriMax = (basePri & 0xFFU);
-}
-
-
-/**
-  \brief   Get Fault Mask
-  \details Returns the current value of the Fault Mask register.
-  \return               Fault Mask register value
- */
-__STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
-  register uint32_t __regFaultMask       __ASM("faultmask");
-  return(__regFaultMask);
-}
-
-
-/**
-  \brief   Set Fault Mask
-  \details Assigns the given value to the Fault Mask register.
-  \param [in]    faultMask  Fault Mask value to set
- */
-__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
-  register uint32_t __regFaultMask       __ASM("faultmask");
-  __regFaultMask = (faultMask & (uint32_t)1);
-}
-
-#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */
-
-
-#if       (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U)
-
-/**
-  \brief   Get FPSCR
-  \details Returns the current value of the Floating Point Status/Control register.
-  \return               Floating Point Status/Control register value
- */
-__STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
-  register uint32_t __regfpscr         __ASM("fpscr");
-  return(__regfpscr);
-#else
-   return(0U);
-#endif
-}
-
-
-/**
-  \brief   Set FPSCR
-  \details Assigns the given value to the Floating Point Status/Control register.
-  \param [in]    fpscr  Floating Point Status/Control value to set
- */
-__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
-  register uint32_t __regfpscr         __ASM("fpscr");
-  __regfpscr = (fpscr);
-#endif
-}
-
-#endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */
-
-
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-/* ##########################  Core Instruction Access  ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
-  Access to dedicated instructions
-  @{
-*/
-
-/**
-  \brief   No Operation
-  \details No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-#define __NOP                             __nop
-
-
-/**
-  \brief   Wait For Interrupt
-  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
- */
-#define __WFI                             __wfi
-
-
-/**
-  \brief   Wait For Event
-  \details Wait For Event is a hint instruction that permits the processor to enter
-           a low-power state until one of a number of events occurs.
- */
-#define __WFE                             __wfe
-
-
-/**
-  \brief   Send Event
-  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-#define __SEV                             __sev
-
-
-/**
-  \brief   Instruction Synchronization Barrier
-  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
-           so that all instructions following the ISB are fetched from cache or memory,
-           after the instruction has been completed.
- */
-#define __ISB() do {\
-                   __schedule_barrier();\
-                   __isb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-/**
-  \brief   Data Synchronization Barrier
-  \details Acts as a special kind of Data Memory Barrier.
-           It completes when all explicit memory accesses before this instruction complete.
- */
-#define __DSB() do {\
-                   __schedule_barrier();\
-                   __dsb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-/**
-  \brief   Data Memory Barrier
-  \details Ensures the apparent order of the explicit memory operations before
-           and after the instruction, without ensuring their completion.
- */
-#define __DMB() do {\
-                   __schedule_barrier();\
-                   __dmb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-/**
-  \brief   Reverse byte order (32 bit)
-  \details Reverses the byte order in integer value.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __REV                             __rev
-
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order in two unsigned short values.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
-{
-  rev16 r0, r0
-  bx lr
-}
-#endif
-
-/**
-  \brief   Reverse byte order in signed short value
-  \details Reverses the byte order in a signed short value with sign extension to integer.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
-{
-  revsh r0, r0
-  bx lr
-}
-#endif
-
-
-/**
-  \brief   Rotate Right in unsigned value (32 bit)
-  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-  \param [in]    value  Value to rotate
-  \param [in]    value  Number of Bits to rotate
-  \return               Rotated value
- */
-#define __ROR                             __ror
-
-
-/**
-  \brief   Breakpoint
-  \details Causes the processor to enter Debug state.
-           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
-  \param [in]    value  is ignored by the processor.
-                 If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value)                       __breakpoint(value)
-
-
-/**
-  \brief   Reverse bit order of value
-  \details Reverses the bit order of the given value.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#if       (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
-  #define __RBIT                          __rbit
-#else
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
-{
-  uint32_t result;
-  int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */
-
-  result = value;                      /* r will be reversed bits of v; first get LSB of v */
-  for (value >>= 1U; value; value >>= 1U)
-  {
-    result <<= 1U;
-    result |= value & 1U;
-    s--;
-  }
-  result <<= s;                        /* shift when v's highest bits are zero */
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Count leading zeros
-  \details Counts the number of leading zeros of a data value.
-  \param [in]  value  Value to count the leading zeros
-  \return             number of leading zeros in value
- */
-#define __CLZ                             __clz
-
-
-#if       (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
-
-/**
-  \brief   LDR Exclusive (8 bit)
-  \details Executes a exclusive LDR instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXB(ptr)                                                        ((uint8_t ) __ldrex(ptr))
-#else
-  #define __LDREXB(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr))  _Pragma("pop")
-#endif
-
-
-/**
-  \brief   LDR Exclusive (16 bit)
-  \details Executes a exclusive LDR instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXH(ptr)                                                        ((uint16_t) __ldrex(ptr))
-#else
-  #define __LDREXH(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr))  _Pragma("pop")
-#endif
-
-
-/**
-  \brief   LDR Exclusive (32 bit)
-  \details Executes a exclusive LDR instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXW(ptr)                                                        ((uint32_t ) __ldrex(ptr))
-#else
-  #define __LDREXW(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr))  _Pragma("pop")
-#endif
-
-
-/**
-  \brief   STR Exclusive (8 bit)
-  \details Executes a exclusive STR instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXB(value, ptr)                                                 __strex(value, ptr)
-#else
-  #define __STREXB(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
-#endif
-
-
-/**
-  \brief   STR Exclusive (16 bit)
-  \details Executes a exclusive STR instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXH(value, ptr)                                                 __strex(value, ptr)
-#else
-  #define __STREXH(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
-#endif
-
-
-/**
-  \brief   STR Exclusive (32 bit)
-  \details Executes a exclusive STR instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXW(value, ptr)                                                 __strex(value, ptr)
-#else
-  #define __STREXW(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
-#endif
-
-
-/**
-  \brief   Remove the exclusive lock
-  \details Removes the exclusive lock which is created by LDREX.
- */
-#define __CLREX                           __clrex
-
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-#define __SSAT                            __ssat
-
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-#define __USAT                            __usat
-
-
-/**
-  \brief   Rotate Right with Extend (32 bit)
-  \details Moves each bit of a bitstring right by one bit.
-           The carry input is shifted in at the left end of the bitstring.
-  \param [in]    value  Value to rotate
-  \return               Rotated value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
-{
-  rrx r0, r0
-  bx lr
-}
-#endif
-
-
-/**
-  \brief   LDRT Unprivileged (8 bit)
-  \details Executes a Unprivileged LDRT instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-#define __LDRBT(ptr)                      ((uint8_t )  __ldrt(ptr))
-
-
-/**
-  \brief   LDRT Unprivileged (16 bit)
-  \details Executes a Unprivileged LDRT instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-#define __LDRHT(ptr)                      ((uint16_t)  __ldrt(ptr))
-
-
-/**
-  \brief   LDRT Unprivileged (32 bit)
-  \details Executes a Unprivileged LDRT instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-#define __LDRT(ptr)                       ((uint32_t ) __ldrt(ptr))
-
-
-/**
-  \brief   STRT Unprivileged (8 bit)
-  \details Executes a Unprivileged STRT instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-#define __STRBT(value, ptr)               __strt(value, ptr)
-
-
-/**
-  \brief   STRT Unprivileged (16 bit)
-  \details Executes a Unprivileged STRT instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-#define __STRHT(value, ptr)               __strt(value, ptr)
-
-
-/**
-  \brief   STRT Unprivileged (32 bit)
-  \details Executes a Unprivileged STRT instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-#define __STRT(value, ptr)                __strt(value, ptr)
-
-#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-
-/* ###################  Compiler specific Intrinsics  ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
-  Access to dedicated SIMD instructions
-  @{
-*/
-
-#if (__CORTEX_M >= 0x04U)  /* only for Cortex-M4 and above */
-
-#define __SADD8                           __sadd8
-#define __QADD8                           __qadd8
-#define __SHADD8                          __shadd8
-#define __UADD8                           __uadd8
-#define __UQADD8                          __uqadd8
-#define __UHADD8                          __uhadd8
-#define __SSUB8                           __ssub8
-#define __QSUB8                           __qsub8
-#define __SHSUB8                          __shsub8
-#define __USUB8                           __usub8
-#define __UQSUB8                          __uqsub8
-#define __UHSUB8                          __uhsub8
-#define __SADD16                          __sadd16
-#define __QADD16                          __qadd16
-#define __SHADD16                         __shadd16
-#define __UADD16                          __uadd16
-#define __UQADD16                         __uqadd16
-#define __UHADD16                         __uhadd16
-#define __SSUB16                          __ssub16
-#define __QSUB16                          __qsub16
-#define __SHSUB16                         __shsub16
-#define __USUB16                          __usub16
-#define __UQSUB16                         __uqsub16
-#define __UHSUB16                         __uhsub16
-#define __SASX                            __sasx
-#define __QASX                            __qasx
-#define __SHASX                           __shasx
-#define __UASX                            __uasx
-#define __UQASX                           __uqasx
-#define __UHASX                           __uhasx
-#define __SSAX                            __ssax
-#define __QSAX                            __qsax
-#define __SHSAX                           __shsax
-#define __USAX                            __usax
-#define __UQSAX                           __uqsax
-#define __UHSAX                           __uhsax
-#define __USAD8                           __usad8
-#define __USADA8                          __usada8
-#define __SSAT16                          __ssat16
-#define __USAT16                          __usat16
-#define __UXTB16                          __uxtb16
-#define __UXTAB16                         __uxtab16
-#define __SXTB16                          __sxtb16
-#define __SXTAB16                         __sxtab16
-#define __SMUAD                           __smuad
-#define __SMUADX                          __smuadx
-#define __SMLAD                           __smlad
-#define __SMLADX                          __smladx
-#define __SMLALD                          __smlald
-#define __SMLALDX                         __smlaldx
-#define __SMUSD                           __smusd
-#define __SMUSDX                          __smusdx
-#define __SMLSD                           __smlsd
-#define __SMLSDX                          __smlsdx
-#define __SMLSLD                          __smlsld
-#define __SMLSLDX                         __smlsldx
-#define __SEL                             __sel
-#define __QADD                            __qadd
-#define __QSUB                            __qsub
-
-#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
-                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
-
-#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
-                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
-
-#define __SMMLA(ARG1,ARG2,ARG3)          ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
-                                                      ((int64_t)(ARG3) << 32U)     ) >> 32U))
-
-#endif /* (__CORTEX_M >= 0x04) */
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#endif /* __CMSIS_ARMCC_H */
diff --git a/Drivers/CMSIS/Include/cmsis_armcc_V6.h b/Drivers/CMSIS/Include/cmsis_armcc_V6.h
deleted file mode 100755
index cd13240c..00000000
--- a/Drivers/CMSIS/Include/cmsis_armcc_V6.h
+++ /dev/null
@@ -1,1800 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_armcc_V6.h
- * @brief    CMSIS Cortex-M Core Function/Instruction Header File
- * @version  V4.30
- * @date     20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#ifndef __CMSIS_ARMCC_V6_H
-#define __CMSIS_ARMCC_V6_H
-
-
-/* ###########################  Core Function Access  ########################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
-  @{
- */
-
-/**
-  \brief   Enable IRQ Interrupts
-  \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __enable_irq(void)
-{
-  __ASM volatile ("cpsie i" : : : "memory");
-}
-
-
-/**
-  \brief   Disable IRQ Interrupts
-  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __disable_irq(void)
-{
-  __ASM volatile ("cpsid i" : : : "memory");
-}
-
-
-/**
-  \brief   Get Control Register
-  \details Returns the content of the Control Register.
-  \return               Control Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, control" : "=r" (result) );
-  return(result);
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get Control Register (non-secure)
-  \details Returns the content of the non-secure Control Register when in secure mode.
-  \return               non-secure Control Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Control Register
-  \details Writes the given value to the Control Register.
-  \param [in]    control  Control Register value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
-  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Set Control Register (non-secure)
-  \details Writes the given value to the non-secure Control Register when in secure state.
-  \param [in]    control  Control Register value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control)
-{
-  __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
-}
-#endif
-
-
-/**
-  \brief   Get IPSR Register
-  \details Returns the content of the IPSR Register.
-  \return               IPSR Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
-  return(result);
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get IPSR Register (non-secure)
-  \details Returns the content of the non-secure IPSR Register when in secure state.
-  \return               IPSR Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_IPSR_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, ipsr_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Get APSR Register
-  \details Returns the content of the APSR Register.
-  \return               APSR Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
-  return(result);
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get APSR Register (non-secure)
-  \details Returns the content of the non-secure APSR Register when in secure state.
-  \return               APSR Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_APSR_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, apsr_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Get xPSR Register
-  \details Returns the content of the xPSR Register.
-  \return               xPSR Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
-  return(result);
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get xPSR Register (non-secure)
-  \details Returns the content of the non-secure xPSR Register when in secure state.
-  \return               xPSR Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_xPSR_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, xpsr_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Get Process Stack Pointer
-  \details Returns the current value of the Process Stack Pointer (PSP).
-  \return               PSP Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void)
-{
-  register uint32_t result;
-
-  __ASM volatile ("MRS %0, psp"  : "=r" (result) );
-  return(result);
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get Process Stack Pointer (non-secure)
-  \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
-  \return               PSP Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void)
-{
-  register uint32_t result;
-
-  __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Process Stack Pointer
-  \details Assigns the given value to the Process Stack Pointer (PSP).
-  \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
-  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : "sp");
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Set Process Stack Pointer (non-secure)
-  \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
-  \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
-{
-  __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : "sp");
-}
-#endif
-
-
-/**
-  \brief   Get Main Stack Pointer
-  \details Returns the current value of the Main Stack Pointer (MSP).
-  \return               MSP Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void)
-{
-  register uint32_t result;
-
-  __ASM volatile ("MRS %0, msp" : "=r" (result) );
-  return(result);
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get Main Stack Pointer (non-secure)
-  \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
-  \return               MSP Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void)
-{
-  register uint32_t result;
-
-  __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Main Stack Pointer
-  \details Assigns the given value to the Main Stack Pointer (MSP).
-  \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
-  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : "sp");
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Set Main Stack Pointer (non-secure)
-  \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
-  \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
-{
-  __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : "sp");
-}
-#endif
-
-
-/**
-  \brief   Get Priority Mask
-  \details Returns the current state of the priority mask bit from the Priority Mask Register.
-  \return               Priority Mask value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, primask" : "=r" (result) );
-  return(result);
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get Priority Mask (non-secure)
-  \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
-  \return               Priority Mask value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Priority Mask
-  \details Assigns the given value to the Priority Mask Register.
-  \param [in]    priMask  Priority Mask
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Set Priority Mask (non-secure)
-  \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
-  \param [in]    priMask  Priority Mask
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
-{
-  __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
-}
-#endif
-
-
-#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U))  /* ToDo:  ARMCC_V6: check if this is ok for cortex >=3 */
-
-/**
-  \brief   Enable FIQ
-  \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __enable_fault_irq(void)
-{
-  __ASM volatile ("cpsie f" : : : "memory");
-}
-
-
-/**
-  \brief   Disable FIQ
-  \details Disables FIQ interrupts by setting the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __disable_fault_irq(void)
-{
-  __ASM volatile ("cpsid f" : : : "memory");
-}
-
-
-/**
-  \brief   Get Base Priority
-  \details Returns the current value of the Base Priority register.
-  \return               Base Priority register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, basepri" : "=r" (result) );
-  return(result);
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get Base Priority (non-secure)
-  \details Returns the current value of the non-secure Base Priority register when in secure state.
-  \return               Base Priority register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Base Priority
-  \details Assigns the given value to the Base Priority register.
-  \param [in]    basePri  Base Priority value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
-{
-  __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Set Base Priority (non-secure)
-  \details Assigns the given value to the non-secure Base Priority register when in secure state.
-  \param [in]    basePri  Base Priority value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t value)
-{
-  __ASM volatile ("MSR basepri_ns, %0" : : "r" (value) : "memory");
-}
-#endif
-
-
-/**
-  \brief   Set Base Priority with condition
-  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
-           or the new value increases the BASEPRI priority level.
-  \param [in]    basePri  Base Priority value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
-{
-  __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Set Base Priority with condition (non_secure)
-  \details Assigns the given value to the non-secure Base Priority register when in secure state only if BASEPRI masking is disabled,
-	       or the new value increases the BASEPRI priority level.
-  \param [in]    basePri  Base Priority value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_MAX_NS(uint32_t value)
-{
-  __ASM volatile ("MSR basepri_max_ns, %0" : : "r" (value) : "memory");
-}
-#endif
-
-
-/**
-  \brief   Get Fault Mask
-  \details Returns the current value of the Fault Mask register.
-  \return               Fault Mask register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
-  return(result);
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get Fault Mask (non-secure)
-  \details Returns the current value of the non-secure Fault Mask register when in secure state.
-  \return               Fault Mask register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Fault Mask
-  \details Assigns the given value to the Fault Mask register.
-  \param [in]    faultMask  Fault Mask value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
-  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Set Fault Mask (non-secure)
-  \details Assigns the given value to the non-secure Fault Mask register when in secure state.
-  \param [in]    faultMask  Fault Mask value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
-{
-  __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
-}
-#endif
-
-
-#endif /* ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */
-
-
-#if (__ARM_ARCH_8M__ == 1U)
-
-/**
-  \brief   Get Process Stack Pointer Limit
-  \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
-  \return               PSPLIM Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void)
-{
-  register uint32_t result;
-
-  __ASM volatile ("MRS %0, psplim"  : "=r" (result) );
-  return(result);
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M')     /* ToDo:  ARMCC_V6: check predefined macro for mainline */
-/**
-  \brief   Get Process Stack Pointer Limit (non-secure)
-  \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
-  \return               PSPLIM Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void)
-{
-  register uint32_t result;
-
-  __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Process Stack Pointer Limit
-  \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
-  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
-{
-  __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M')     /* ToDo:  ARMCC_V6: check predefined macro for mainline */
-/**
-  \brief   Set Process Stack Pointer (non-secure)
-  \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
-  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
-{
-  __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
-}
-#endif
-
-
-/**
-  \brief   Get Main Stack Pointer Limit
-  \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
-  \return               MSPLIM Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void)
-{
-  register uint32_t result;
-
-  __ASM volatile ("MRS %0, msplim" : "=r" (result) );
-
-  return(result);
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M')     /* ToDo:  ARMCC_V6: check predefined macro for mainline */
-/**
-  \brief   Get Main Stack Pointer Limit (non-secure)
-  \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
-  \return               MSPLIM Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void)
-{
-  register uint32_t result;
-
-  __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Main Stack Pointer Limit
-  \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
-  \param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
-{
-  __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
-}
-
-
-#if  (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M')     /* ToDo:  ARMCC_V6: check predefined macro for mainline */
-/**
-  \brief   Set Main Stack Pointer Limit (non-secure)
-  \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
-  \param [in]    MainStackPtrLimit  Main Stack Pointer value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
-{
-  __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
-}
-#endif
-
-#endif /* (__ARM_ARCH_8M__ == 1U) */
-
-
-#if ((__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U))  /* ToDo:  ARMCC_V6: check if this is ok for cortex >=4 */
-
-/**
-  \brief   Get FPSCR
-  \details eturns the current value of the Floating Point Status/Control register.
-  \return               Floating Point Status/Control register value
- */
-#define __get_FPSCR      __builtin_arm_get_fpscr
-#if 0
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
-  uint32_t result;
-
-  __ASM volatile ("");                                 /* Empty asm statement works as a scheduling barrier */
-  __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
-  __ASM volatile ("");
-  return(result);
-#else
-   return(0);
-#endif
-}
-#endif
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get FPSCR (non-secure)
-  \details Returns the current value of the non-secure Floating Point Status/Control register when in secure state.
-  \return               Floating Point Status/Control register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FPSCR_NS(void)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
-  uint32_t result;
-
-  __ASM volatile ("");                                 /* Empty asm statement works as a scheduling barrier */
-  __ASM volatile ("VMRS %0, fpscr_ns" : "=r" (result) );
-  __ASM volatile ("");
-  return(result);
-#else
-   return(0);
-#endif
-}
-#endif
-
-
-/**
-  \brief   Set FPSCR
-  \details Assigns the given value to the Floating Point Status/Control register.
-  \param [in]    fpscr  Floating Point Status/Control value to set
- */
-#define __set_FPSCR      __builtin_arm_set_fpscr
-#if 0
-__attribute__((always_inline)) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
-  __ASM volatile ("");                                 /* Empty asm statement works as a scheduling barrier */
-  __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
-  __ASM volatile ("");
-#endif
-}
-#endif
-
-#if  (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Set FPSCR (non-secure)
-  \details Assigns the given value to the non-secure Floating Point Status/Control register when in secure state.
-  \param [in]    fpscr  Floating Point Status/Control value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FPSCR_NS(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
-  __ASM volatile ("");                                 /* Empty asm statement works as a scheduling barrier */
-  __ASM volatile ("VMSR fpscr_ns, %0" : : "r" (fpscr) : "vfpcc");
-  __ASM volatile ("");
-#endif
-}
-#endif
-
-#endif /* ((__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */
-
-
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-/* ##########################  Core Instruction Access  ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
-  Access to dedicated instructions
-  @{
-*/
-
-/* Define macros for porting to both thumb1 and thumb2.
- * For thumb1, use low register (r0-r7), specified by constraint "l"
- * Otherwise, use general registers, specified by constraint "r" */
-#if defined (__thumb__) && !defined (__thumb2__)
-#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
-#define __CMSIS_GCC_USE_REG(r) "l" (r)
-#else
-#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
-#define __CMSIS_GCC_USE_REG(r) "r" (r)
-#endif
-
-/**
-  \brief   No Operation
-  \details No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-#define __NOP          __builtin_arm_nop
-
-/**
-  \brief   Wait For Interrupt
-  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
- */
-#define __WFI          __builtin_arm_wfi
-
-
-/**
-  \brief   Wait For Event
-  \details Wait For Event is a hint instruction that permits the processor to enter
-           a low-power state until one of a number of events occurs.
- */
-#define __WFE          __builtin_arm_wfe
-
-
-/**
-  \brief   Send Event
-  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-#define __SEV          __builtin_arm_sev
-
-
-/**
-  \brief   Instruction Synchronization Barrier
-  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
-           so that all instructions following the ISB are fetched from cache or memory,
-           after the instruction has been completed.
- */
-#define __ISB()        __builtin_arm_isb(0xF);
-
-/**
-  \brief   Data Synchronization Barrier
-  \details Acts as a special kind of Data Memory Barrier.
-           It completes when all explicit memory accesses before this instruction complete.
- */
-#define __DSB()        __builtin_arm_dsb(0xF);
-
-
-/**
-  \brief   Data Memory Barrier
-  \details Ensures the apparent order of the explicit memory operations before
-           and after the instruction, without ensuring their completion.
- */
-#define __DMB()        __builtin_arm_dmb(0xF);
-
-
-/**
-  \brief   Reverse byte order (32 bit)
-  \details Reverses the byte order in integer value.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __REV          __builtin_bswap32
-
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order in two unsigned short values.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __REV16          __builtin_bswap16                           /* ToDo:  ARMCC_V6: check if __builtin_bswap16 could be used */
-#if 0
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
-{
-  uint32_t result;
-
-  __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Reverse byte order in signed short value
-  \details Reverses the byte order in a signed short value with sign extension to integer.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-                                                          /* ToDo:  ARMCC_V6: check if __builtin_bswap16 could be used */
-__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
-{
-  int32_t result;
-
-  __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return(result);
-}
-
-
-/**
-  \brief   Rotate Right in unsigned value (32 bit)
-  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-  \param [in]    op1  Value to rotate
-  \param [in]    op2  Number of Bits to rotate
-  \return               Rotated value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
-{
-  return (op1 >> op2) | (op1 << (32U - op2));
-}
-
-
-/**
-  \brief   Breakpoint
-  \details Causes the processor to enter Debug state.
-            Debug tools can use this to investigate system state when the instruction at a particular address is reached.
-    \param [in]    value  is ignored by the processor.
-                   If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value)                       __ASM volatile ("bkpt "#value)
-
-
-/**
-  \brief   Reverse bit order of value
-  \details Reverses the bit order of the given value.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-                                                          /* ToDo:  ARMCC_V6: check if __builtin_arm_rbit is supported */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
-{
-  uint32_t result;
-
-#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U))  /* ToDo:  ARMCC_V6: check if this is ok for cortex >=3 */
-   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
-#else
-  int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */
-
-  result = value;                      /* r will be reversed bits of v; first get LSB of v */
-  for (value >>= 1U; value; value >>= 1U)
-  {
-    result <<= 1U;
-    result |= value & 1U;
-    s--;
-  }
-  result <<= s;                        /* shift when v's highest bits are zero */
-#endif
-  return(result);
-}
-
-
-/**
-  \brief   Count leading zeros
-  \details Counts the number of leading zeros of a data value.
-  \param [in]  value  Value to count the leading zeros
-  \return             number of leading zeros in value
- */
-#define __CLZ             __builtin_clz
-
-
-#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U))  /* ToDo:  ARMCC_V6: check if this is ok for cortex >=3 */
-
-/**
-  \brief   LDR Exclusive (8 bit)
-  \details Executes a exclusive LDR instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-#define __LDREXB        (uint8_t)__builtin_arm_ldrex
-
-
-/**
-  \brief   LDR Exclusive (16 bit)
-  \details Executes a exclusive LDR instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-#define __LDREXH        (uint16_t)__builtin_arm_ldrex
-
-
-/**
-  \brief   LDR Exclusive (32 bit)
-  \details Executes a exclusive LDR instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-#define __LDREXW        (uint32_t)__builtin_arm_ldrex
-
-
-/**
-  \brief   STR Exclusive (8 bit)
-  \details Executes a exclusive STR instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define __STREXB        (uint32_t)__builtin_arm_strex
-
-
-/**
-  \brief   STR Exclusive (16 bit)
-  \details Executes a exclusive STR instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define __STREXH        (uint32_t)__builtin_arm_strex
-
-
-/**
-  \brief   STR Exclusive (32 bit)
-  \details Executes a exclusive STR instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define __STREXW        (uint32_t)__builtin_arm_strex
-
-
-/**
-  \brief   Remove the exclusive lock
-  \details Removes the exclusive lock which is created by LDREX.
- */
-#define __CLREX             __builtin_arm_clrex
-
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-/*#define __SSAT             __builtin_arm_ssat*/
-#define __SSAT(ARG1,ARG2) \
-({                          \
-  int32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-#define __USAT             __builtin_arm_usat
-#if 0
-#define __USAT(ARG1,ARG2) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-#endif
-
-
-/**
-  \brief   Rotate Right with Extend (32 bit)
-  \details Moves each bit of a bitstring right by one bit.
-           The carry input is shifted in at the left end of the bitstring.
-  \param [in]    value  Value to rotate
-  \return               Rotated value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
-{
-  uint32_t result;
-
-  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return(result);
-}
-
-
-/**
-  \brief   LDRT Unprivileged (8 bit)
-  \details Executes a Unprivileged LDRT instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return ((uint8_t) result);    /* Add explicit type cast here */
-}
-
-
-/**
-  \brief   LDRT Unprivileged (16 bit)
-  \details Executes a Unprivileged LDRT instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return ((uint16_t) result);    /* Add explicit type cast here */
-}
-
-
-/**
-  \brief   LDRT Unprivileged (32 bit)
-  \details Executes a Unprivileged LDRT instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return(result);
-}
-
-
-/**
-  \brief   STRT Unprivileged (8 bit)
-  \details Executes a Unprivileged STRT instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
-{
-   __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   STRT Unprivileged (16 bit)
-  \details Executes a Unprivileged STRT instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
-{
-   __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   STRT Unprivileged (32 bit)
-  \details Executes a Unprivileged STRT instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
-{
-   __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
-}
-
-#endif /* ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */
-
-
-#if (__ARM_ARCH_8M__ == 1U)
-
-/**
-  \brief   Load-Acquire (8 bit)
-  \details Executes a LDAB instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return ((uint8_t) result);
-}
-
-
-/**
-  \brief   Load-Acquire (16 bit)
-  \details Executes a LDAH instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return ((uint16_t) result);
-}
-
-
-/**
-  \brief   Load-Acquire (32 bit)
-  \details Executes a LDA instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr)
-{
-    uint32_t result;
-
-   __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return(result);
-}
-
-
-/**
-  \brief   Store-Release (8 bit)
-  \details Executes a STLB instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
-{
-   __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   Store-Release (16 bit)
-  \details Executes a STLH instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
-{
-   __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   Store-Release (32 bit)
-  \details Executes a STL instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr)
-{
-   __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   Load-Acquire Exclusive (8 bit)
-  \details Executes a LDAB exclusive instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-#define     __LDAEXB                 (uint8_t)__builtin_arm_ldaex
-
-
-/**
-  \brief   Load-Acquire Exclusive (16 bit)
-  \details Executes a LDAH exclusive instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-#define     __LDAEXH                 (uint16_t)__builtin_arm_ldaex
-
-
-/**
-  \brief   Load-Acquire Exclusive (32 bit)
-  \details Executes a LDA exclusive instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-#define     __LDAEX                  (uint32_t)__builtin_arm_ldaex
-
-
-/**
-  \brief   Store-Release Exclusive (8 bit)
-  \details Executes a STLB exclusive instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define     __STLEXB                 (uint32_t)__builtin_arm_stlex
-
-
-/**
-  \brief   Store-Release Exclusive (16 bit)
-  \details Executes a STLH exclusive instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define     __STLEXH                 (uint32_t)__builtin_arm_stlex
-
-
-/**
-  \brief   Store-Release Exclusive (32 bit)
-  \details Executes a STL exclusive instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define     __STLEX                  (uint32_t)__builtin_arm_stlex
-
-#endif /* (__ARM_ARCH_8M__ == 1U) */
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-
-/* ###################  Compiler specific Intrinsics  ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
-  Access to dedicated SIMD instructions
-  @{
-*/
-
-#if (__ARM_FEATURE_DSP == 1U)        /* ToDo:  ARMCC_V6: This should be ARCH >= ARMv7-M + SIMD */
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-#define __SSAT16(ARG1,ARG2) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-#define __USAT16(ARG1,ARG2) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("usat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
-{
-  uint32_t result;
-
-  __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
-{
-  uint32_t result;
-
-  __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE  int32_t __QADD( int32_t op1,  int32_t op2)
-{
-  int32_t result;
-
-  __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE  int32_t __QSUB( int32_t op1,  int32_t op2)
-{
-  int32_t result;
-
-  __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-#define __PKHBT(ARG1,ARG2,ARG3) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
-  __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
-  __RES; \
- })
-
-#define __PKHTB(ARG1,ARG2,ARG3) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
-  if (ARG3 == 0) \
-    __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2)  ); \
-  else \
-    __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
-  __RES; \
- })
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
-{
- int32_t result;
-
- __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#endif /* (__ARM_FEATURE_DSP == 1U) */
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#endif /* __CMSIS_ARMCC_V6_H */
diff --git a/Drivers/CMSIS/Include/cmsis_gcc.h b/Drivers/CMSIS/Include/cmsis_gcc.h
deleted file mode 100755
index bb89fbba..00000000
--- a/Drivers/CMSIS/Include/cmsis_gcc.h
+++ /dev/null
@@ -1,1373 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_gcc.h
- * @brief    CMSIS Cortex-M Core Function/Instruction Header File
- * @version  V4.30
- * @date     20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#ifndef __CMSIS_GCC_H
-#define __CMSIS_GCC_H
-
-/* ignore some GCC warnings */
-#if defined ( __GNUC__ )
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wsign-conversion"
-#pragma GCC diagnostic ignored "-Wconversion"
-#pragma GCC diagnostic ignored "-Wunused-parameter"
-#endif
-
-
-/* ###########################  Core Function Access  ########################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
-  @{
- */
-
-/**
-  \brief   Enable IRQ Interrupts
-  \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
-{
-  __ASM volatile ("cpsie i" : : : "memory");
-}
-
-
-/**
-  \brief   Disable IRQ Interrupts
-  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
-  Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
-{
-  __ASM volatile ("cpsid i" : : : "memory");
-}
-
-
-/**
-  \brief   Get Control Register
-  \details Returns the content of the Control Register.
-  \return               Control Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, control" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Set Control Register
-  \details Writes the given value to the Control Register.
-  \param [in]    control  Control Register value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
-  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
-}
-
-
-/**
-  \brief   Get IPSR Register
-  \details Returns the content of the IPSR Register.
-  \return               IPSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Get APSR Register
-  \details Returns the content of the APSR Register.
-  \return               APSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Get xPSR Register
-  \details Returns the content of the xPSR Register.
-
-    \return               xPSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Get Process Stack Pointer
-  \details Returns the current value of the Process Stack Pointer (PSP).
-  \return               PSP Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
-{
-  register uint32_t result;
-
-  __ASM volatile ("MRS %0, psp\n"  : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Set Process Stack Pointer
-  \details Assigns the given value to the Process Stack Pointer (PSP).
-  \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
-  __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
-}
-
-
-/**
-  \brief   Get Main Stack Pointer
-  \details Returns the current value of the Main Stack Pointer (MSP).
-  \return               MSP Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
-{
-  register uint32_t result;
-
-  __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Set Main Stack Pointer
-  \details Assigns the given value to the Main Stack Pointer (MSP).
-
-    \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
-  __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
-}
-
-
-/**
-  \brief   Get Priority Mask
-  \details Returns the current state of the priority mask bit from the Priority Mask Register.
-  \return               Priority Mask value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, primask" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Set Priority Mask
-  \details Assigns the given value to the Priority Mask Register.
-  \param [in]    priMask  Priority Mask
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
-}
-
-
-#if       (__CORTEX_M >= 0x03U)
-
-/**
-  \brief   Enable FIQ
-  \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
-{
-  __ASM volatile ("cpsie f" : : : "memory");
-}
-
-
-/**
-  \brief   Disable FIQ
-  \details Disables FIQ interrupts by setting the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
-{
-  __ASM volatile ("cpsid f" : : : "memory");
-}
-
-
-/**
-  \brief   Get Base Priority
-  \details Returns the current value of the Base Priority register.
-  \return               Base Priority register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, basepri" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Set Base Priority
-  \details Assigns the given value to the Base Priority register.
-  \param [in]    basePri  Base Priority value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
-{
-  __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
-}
-
-
-/**
-  \brief   Set Base Priority with condition
-  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
-           or the new value increases the BASEPRI priority level.
-  \param [in]    basePri  Base Priority value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
-{
-  __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
-}
-
-
-/**
-  \brief   Get Fault Mask
-  \details Returns the current value of the Fault Mask register.
-  \return               Fault Mask register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Set Fault Mask
-  \details Assigns the given value to the Fault Mask register.
-  \param [in]    faultMask  Fault Mask value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
-  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
-}
-
-#endif /* (__CORTEX_M >= 0x03U) */
-
-
-#if       (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U)
-
-/**
-  \brief   Get FPSCR
-  \details Returns the current value of the Floating Point Status/Control register.
-  \return               Floating Point Status/Control register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
-  uint32_t result;
-
-  /* Empty asm statement works as a scheduling barrier */
-  __ASM volatile ("");
-  __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
-  __ASM volatile ("");
-  return(result);
-#else
-   return(0);
-#endif
-}
-
-
-/**
-  \brief   Set FPSCR
-  \details Assigns the given value to the Floating Point Status/Control register.
-  \param [in]    fpscr  Floating Point Status/Control value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
-  /* Empty asm statement works as a scheduling barrier */
-  __ASM volatile ("");
-  __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
-  __ASM volatile ("");
-#endif
-}
-
-#endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */
-
-
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-/* ##########################  Core Instruction Access  ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
-  Access to dedicated instructions
-  @{
-*/
-
-/* Define macros for porting to both thumb1 and thumb2.
- * For thumb1, use low register (r0-r7), specified by constraint "l"
- * Otherwise, use general registers, specified by constraint "r" */
-#if defined (__thumb__) && !defined (__thumb2__)
-#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
-#define __CMSIS_GCC_USE_REG(r) "l" (r)
-#else
-#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
-#define __CMSIS_GCC_USE_REG(r) "r" (r)
-#endif
-
-/**
-  \brief   No Operation
-  \details No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
-{
-  __ASM volatile ("nop");
-}
-
-
-/**
-  \brief   Wait For Interrupt
-  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
-{
-  __ASM volatile ("wfi");
-}
-
-
-/**
-  \brief   Wait For Event
-  \details Wait For Event is a hint instruction that permits the processor to enter
-    a low-power state until one of a number of events occurs.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
-{
-  __ASM volatile ("wfe");
-}
-
-
-/**
-  \brief   Send Event
-  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
-{
-  __ASM volatile ("sev");
-}
-
-
-/**
-  \brief   Instruction Synchronization Barrier
-  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
-           so that all instructions following the ISB are fetched from cache or memory,
-           after the instruction has been completed.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
-{
-  __ASM volatile ("isb 0xF":::"memory");
-}
-
-
-/**
-  \brief   Data Synchronization Barrier
-  \details Acts as a special kind of Data Memory Barrier.
-           It completes when all explicit memory accesses before this instruction complete.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
-{
-  __ASM volatile ("dsb 0xF":::"memory");
-}
-
-
-/**
-  \brief   Data Memory Barrier
-  \details Ensures the apparent order of the explicit memory operations before
-           and after the instruction, without ensuring their completion.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
-{
-  __ASM volatile ("dmb 0xF":::"memory");
-}
-
-
-/**
-  \brief   Reverse byte order (32 bit)
-  \details Reverses the byte order in integer value.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
-{
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
-  return __builtin_bswap32(value);
-#else
-  uint32_t result;
-
-  __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return(result);
-#endif
-}
-
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order in two unsigned short values.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
-{
-  uint32_t result;
-
-  __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return(result);
-}
-
-
-/**
-  \brief   Reverse byte order in signed short value
-  \details Reverses the byte order in a signed short value with sign extension to integer.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
-{
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-  return (short)__builtin_bswap16(value);
-#else
-  int32_t result;
-
-  __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return(result);
-#endif
-}
-
-
-/**
-  \brief   Rotate Right in unsigned value (32 bit)
-  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-  \param [in]    value  Value to rotate
-  \param [in]    value  Number of Bits to rotate
-  \return               Rotated value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
-{
-  return (op1 >> op2) | (op1 << (32U - op2));
-}
-
-
-/**
-  \brief   Breakpoint
-  \details Causes the processor to enter Debug state.
-           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
-  \param [in]    value  is ignored by the processor.
-                 If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value)                       __ASM volatile ("bkpt "#value)
-
-
-/**
-  \brief   Reverse bit order of value
-  \details Reverses the bit order of the given value.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
-{
-  uint32_t result;
-
-#if       (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
-   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
-#else
-  int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */
-
-  result = value;                      /* r will be reversed bits of v; first get LSB of v */
-  for (value >>= 1U; value; value >>= 1U)
-  {
-    result <<= 1U;
-    result |= value & 1U;
-    s--;
-  }
-  result <<= s;                        /* shift when v's highest bits are zero */
-#endif
-  return(result);
-}
-
-
-/**
-  \brief   Count leading zeros
-  \details Counts the number of leading zeros of a data value.
-  \param [in]  value  Value to count the leading zeros
-  \return             number of leading zeros in value
- */
-#define __CLZ             __builtin_clz
-
-
-#if       (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
-
-/**
-  \brief   LDR Exclusive (8 bit)
-  \details Executes a exclusive LDR instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
-{
-    uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
-    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
-       accepted by assembler. So has to use following less efficient pattern.
-    */
-   __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
-   return ((uint8_t) result);    /* Add explicit type cast here */
-}
-
-
-/**
-  \brief   LDR Exclusive (16 bit)
-  \details Executes a exclusive LDR instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
-{
-    uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
-    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
-       accepted by assembler. So has to use following less efficient pattern.
-    */
-   __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
-   return ((uint16_t) result);    /* Add explicit type cast here */
-}
-
-
-/**
-  \brief   LDR Exclusive (32 bit)
-  \details Executes a exclusive LDR instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
-   return(result);
-}
-
-
-/**
-  \brief   STR Exclusive (8 bit)
-  \details Executes a exclusive STR instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
-{
-   uint32_t result;
-
-   __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
-   return(result);
-}
-
-
-/**
-  \brief   STR Exclusive (16 bit)
-  \details Executes a exclusive STR instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
-{
-   uint32_t result;
-
-   __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
-   return(result);
-}
-
-
-/**
-  \brief   STR Exclusive (32 bit)
-  \details Executes a exclusive STR instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
-{
-   uint32_t result;
-
-   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
-   return(result);
-}
-
-
-/**
-  \brief   Remove the exclusive lock
-  \details Removes the exclusive lock which is created by LDREX.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
-{
-  __ASM volatile ("clrex" ::: "memory");
-}
-
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-#define __SSAT(ARG1,ARG2) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-#define __USAT(ARG1,ARG2) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-
-/**
-  \brief   Rotate Right with Extend (32 bit)
-  \details Moves each bit of a bitstring right by one bit.
-           The carry input is shifted in at the left end of the bitstring.
-  \param [in]    value  Value to rotate
-  \return               Rotated value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
-{
-  uint32_t result;
-
-  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return(result);
-}
-
-
-/**
-  \brief   LDRT Unprivileged (8 bit)
-  \details Executes a Unprivileged LDRT instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
-{
-    uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
-    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
-       accepted by assembler. So has to use following less efficient pattern.
-    */
-   __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
-   return ((uint8_t) result);    /* Add explicit type cast here */
-}
-
-
-/**
-  \brief   LDRT Unprivileged (16 bit)
-  \details Executes a Unprivileged LDRT instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
-{
-    uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
-    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
-       accepted by assembler. So has to use following less efficient pattern.
-    */
-   __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
-   return ((uint16_t) result);    /* Add explicit type cast here */
-}
-
-
-/**
-  \brief   LDRT Unprivileged (32 bit)
-  \details Executes a Unprivileged LDRT instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
-   return(result);
-}
-
-
-/**
-  \brief   STRT Unprivileged (8 bit)
-  \details Executes a Unprivileged STRT instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
-{
-   __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   STRT Unprivileged (16 bit)
-  \details Executes a Unprivileged STRT instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
-{
-   __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   STRT Unprivileged (32 bit)
-  \details Executes a Unprivileged STRT instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
-{
-   __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
-}
-
-#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-
-/* ###################  Compiler specific Intrinsics  ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
-  Access to dedicated SIMD instructions
-  @{
-*/
-
-#if (__CORTEX_M >= 0x04U)  /* only for Cortex-M4 and above */
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-#define __SSAT16(ARG1,ARG2) \
-({                          \
-  int32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-#define __USAT16(ARG1,ARG2) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("usat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
-{
-  uint32_t result;
-
-  __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
-{
-  uint32_t result;
-
-  __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE  int32_t __QADD( int32_t op1,  int32_t op2)
-{
-  int32_t result;
-
-  __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE  int32_t __QSUB( int32_t op1,  int32_t op2)
-{
-  int32_t result;
-
-  __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-#define __PKHBT(ARG1,ARG2,ARG3) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
-  __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
-  __RES; \
- })
-
-#define __PKHTB(ARG1,ARG2,ARG3) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
-  if (ARG3 == 0) \
-    __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2)  ); \
-  else \
-    __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
-  __RES; \
- })
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
-{
- int32_t result;
-
- __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#endif /* (__CORTEX_M >= 0x04) */
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#if defined ( __GNUC__ )
-#pragma GCC diagnostic pop
-#endif
-
-#endif /* __CMSIS_GCC_H */
diff --git a/Drivers/CMSIS/Include/core_cm0.h b/Drivers/CMSIS/Include/core_cm0.h
deleted file mode 100755
index 711dad55..00000000
--- a/Drivers/CMSIS/Include/core_cm0.h
+++ /dev/null
@@ -1,798 +0,0 @@
-/**************************************************************************//**
- * @file     core_cm0.h
- * @brief    CMSIS Cortex-M0 Core Peripheral Access Layer Header File
- * @version  V4.30
- * @date     20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if   defined ( __ICCARM__ )
- #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM0_H_GENERIC
-#define __CORE_CM0_H_GENERIC
-
-#include 
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.

-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.

-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.

-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M0
-  @{
- */
-
-/*  CMSIS CM0 definitions */
-#define __CM0_CMSIS_VERSION_MAIN  (0x04U)                                      /*!< [31:16] CMSIS HAL main version */
-#define __CM0_CMSIS_VERSION_SUB   (0x1EU)                                      /*!< [15:0]  CMSIS HAL sub version */
-#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN << 16U) | \
-                                    __CM0_CMSIS_VERSION_SUB           )        /*!< CMSIS HAL version number */
-
-#define __CORTEX_M                (0x00U)                                      /*!< Cortex-M Core */
-
-
-#if   defined ( __CC_ARM )
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined ( __GNUC__ )
-  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __ICCARM__ )
-  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TMS470__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TASKING__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __CSMC__ )
-  #define __packed
-  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler */
-  #define __INLINE         inline                                    /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */
-  #define __STATIC_INLINE  static inline
-
-#else
-  #error Unknown compiler
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TMS470__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "core_cmInstr.h"                /* Core Instruction Access */
-#include "core_cmFunc.h"                 /* Core Function Access */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM0_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM0_H_DEPENDANT
-#define __CORE_CM0_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM0_REV
-    #define __CM0_REV               0x0000U
-    #warning "__CM0_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    IO Type Qualifiers are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M0 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[31U];
-  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[31U];
-  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[31U];
-  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[31U];
-        uint32_t RESERVED4[64U];
-  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
-}  NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-        uint32_t RESERVED0;
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-        uint32_t RESERVED1;
-  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
-            Therefore they are not covered by the Cortex-M0 header file.
-  @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    ((value << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    ((value & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Cortex-M0 Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-/* Interrupt Priorities are WORD accessible only under ARMv6M                   */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
-#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
-#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
-
-
-/**
-  \brief   Enable External Interrupt
-  \details Enables a device-specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Disable External Interrupt
-  \details Disables a device-specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt.
-  \param [in]      IRQn  Interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of an external interrupt.
-  \param [in]      IRQn  Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of an external interrupt.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of an interrupt.
-  \note    The priority cannot be set for every core interrupt.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) < 0)
-  {
-    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of an interrupt.
-           The interrupt number can be positive to specify an external (device specific) interrupt,
-           or negative to specify an internal (core) interrupt.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) < 0)
-  {
-    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                 SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
-           function SysTick_Config is not included. In this case, the file device.h
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM0_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Drivers/CMSIS/Include/core_cm0plus.h b/Drivers/CMSIS/Include/core_cm0plus.h
deleted file mode 100755
index b04aa390..00000000
--- a/Drivers/CMSIS/Include/core_cm0plus.h
+++ /dev/null
@@ -1,914 +0,0 @@
-/**************************************************************************//**
- * @file     core_cm0plus.h
- * @brief    CMSIS Cortex-M0+ Core Peripheral Access Layer Header File
- * @version  V4.30
- * @date     20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if   defined ( __ICCARM__ )
- #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM0PLUS_H_GENERIC
-#define __CORE_CM0PLUS_H_GENERIC
-
-#include 
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.

-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.

-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.

-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex-M0+
-  @{
- */
-
-/*  CMSIS CM0+ definitions */
-#define __CM0PLUS_CMSIS_VERSION_MAIN (0x04U)                                   /*!< [31:16] CMSIS HAL main version */
-#define __CM0PLUS_CMSIS_VERSION_SUB  (0x1EU)                                   /*!< [15:0]  CMSIS HAL sub version */
-#define __CM0PLUS_CMSIS_VERSION      ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \
-                                       __CM0PLUS_CMSIS_VERSION_SUB           ) /*!< CMSIS HAL version number */
-
-#define __CORTEX_M                (0x00U)                                      /*!< Cortex-M Core */
-
-
-#if   defined ( __CC_ARM )
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined ( __GNUC__ )
-  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __ICCARM__ )
-  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TMS470__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TASKING__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __CSMC__ )
-  #define __packed
-  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler */
-  #define __INLINE         inline                                    /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */
-  #define __STATIC_INLINE  static inline
-
-#else
-  #error Unknown compiler
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TMS470__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "core_cmInstr.h"                /* Core Instruction Access */
-#include "core_cmFunc.h"                 /* Core Function Access */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM0PLUS_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM0PLUS_H_DEPENDANT
-#define __CORE_CM0PLUS_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM0PLUS_REV
-    #define __CM0PLUS_REV             0x0000U
-    #warning "__CM0PLUS_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __VTOR_PRESENT
-    #define __VTOR_PRESENT            0U
-    #warning "__VTOR_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    IO Type Qualifiers are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex-M0+ */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core MPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[31U];
-  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[31U];
-  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[31U];
-  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[31U];
-        uint32_t RESERVED4[64U];
-  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
-}  NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-#if (__VTOR_PRESENT == 1U)
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-#else
-        uint32_t RESERVED0;
-#endif
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-        uint32_t RESERVED1;
-  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-#if (__VTOR_PRESENT == 1U)
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 8U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */
-#endif
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-#if (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos                   8U                                            /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk                  (0xFFFFFFUL << MPU_RBAR_ADDR_Pos)              /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
-            Therefore they are not covered by the Cortex-M0+ header file.
-  @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    ((value << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    ((value & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Cortex-M0+ Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-
-#if (__MPU_PRESENT == 1U)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-/* Interrupt Priorities are WORD accessible only under ARMv6M                   */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
-#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
-#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
-
-
-/**
-  \brief   Enable External Interrupt
-  \details Enables a device-specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Disable External Interrupt
-  \details Disables a device-specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt.
-  \param [in]      IRQn  Interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of an external interrupt.
-  \param [in]      IRQn  Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of an external interrupt.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of an interrupt.
-  \note    The priority cannot be set for every core interrupt.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) < 0)
-  {
-    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of an interrupt.
-           The interrupt number can be positive to specify an external (device specific) interrupt,
-           or negative to specify an internal (core) interrupt.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) < 0)
-  {
-    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                 SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
-           function SysTick_Config is not included. In this case, the file device.h
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM0PLUS_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Drivers/CMSIS/Include/core_cm3.h b/Drivers/CMSIS/Include/core_cm3.h
deleted file mode 100755
index b4ac4c7b..00000000
--- a/Drivers/CMSIS/Include/core_cm3.h
+++ /dev/null
@@ -1,1763 +0,0 @@
-/**************************************************************************//**
- * @file     core_cm3.h
- * @brief    CMSIS Cortex-M3 Core Peripheral Access Layer Header File
- * @version  V4.30
- * @date     20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if   defined ( __ICCARM__ )
- #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM3_H_GENERIC
-#define __CORE_CM3_H_GENERIC
-
-#include 
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.

-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.

-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.

-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M3
-  @{
- */
-
-/*  CMSIS CM3 definitions */
-#define __CM3_CMSIS_VERSION_MAIN  (0x04U)                                      /*!< [31:16] CMSIS HAL main version */
-#define __CM3_CMSIS_VERSION_SUB   (0x1EU)                                      /*!< [15:0]  CMSIS HAL sub version */
-#define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN << 16U) | \
-                                    __CM3_CMSIS_VERSION_SUB           )        /*!< CMSIS HAL version number */
-
-#define __CORTEX_M                (0x03U)                                      /*!< Cortex-M Core */
-
-
-#if   defined ( __CC_ARM )
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined ( __GNUC__ )
-  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __ICCARM__ )
-  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TMS470__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TASKING__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __CSMC__ )
-  #define __packed
-  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler */
-  #define __INLINE         inline                                    /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */
-  #define __STATIC_INLINE  static inline
-
-#else
-  #error Unknown compiler
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TMS470__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "core_cmInstr.h"                /* Core Instruction Access */
-#include "core_cmFunc.h"                 /* Core Function Access */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM3_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM3_H_DEPENDANT
-#define __CORE_CM3_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM3_REV
-    #define __CM3_REV               0x0200U
-    #warning "__CM3_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          4U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    IO Type Qualifiers are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M3 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
-#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
-#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
-
-#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
-#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[24U];
-  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[24U];
-  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[24U];
-  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[24U];
-  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
-        uint32_t RESERVED4[56U];
-  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
-        uint32_t RESERVED5[644U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
-}  NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-  __IOM uint8_t  SHP[12U];               /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
-  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
-  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
-  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
-  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
-  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
-  __IM  uint32_t PFR[2U];                /*!< Offset: 0x040 (R/ )  Processor Feature Register */
-  __IM  uint32_t DFR;                    /*!< Offset: 0x048 (R/ )  Debug Feature Register */
-  __IM  uint32_t ADR;                    /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
-  __IM  uint32_t MMFR[4U];               /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
-  __IM  uint32_t ISAR[5U];               /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
-        uint32_t RESERVED0[5U];
-  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#if (__CM3_REV < 0x0201U)                   /* core r2p1 */
-#define SCB_VTOR_TBLBASE_Pos               29U                                            /*!< SCB VTOR: TBLBASE Position */
-#define SCB_VTOR_TBLBASE_Msk               (1UL << SCB_VTOR_TBLBASE_Pos)                  /*!< SCB VTOR: TBLBASE Mask */
-
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */
-#else
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
-#endif
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
-#if ((defined __CM3_REV) && (__CM3_REV >= 0x200U))
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-#else
-        uint32_t RESERVED1[1U];
-#endif
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
-
-/* Auxiliary Control Register Definitions */
-
-#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
-
-#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1U                                         /*!< ACTLR: DISDEFWBUF Position */
-#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */
-
-#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
-  __OM  union
-  {
-    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
-    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
-    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
-  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
-        uint32_t RESERVED0[864U];
-  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
-        uint32_t RESERVED1[15U];
-  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
-        uint32_t RESERVED2[15U];
-  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
-        uint32_t RESERVED4[43U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
-        uint32_t RESERVED5[6U];
-  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
-  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
-  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
-  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
-  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
-  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
-  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
-  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
-  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
-        uint32_t RESERVED1[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
-  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
-        uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
-  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IOM uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-        uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-        uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
-        uint32_t RESERVED3[759U];
-  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER */
-  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
-  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
-        uint32_t RESERVED4[1U];
-  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
-  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
-        uint32_t RESERVED5[39U];
-  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
-        uint32_t RESERVED7[8U];
-  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/)    /*!< TPI ITATBCTR2: ATREADY Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/)    /*!< TPI ITATBCTR0: ATREADY Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_MajorType_Pos           4U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-#define TPI_DEVTYPE_SubType_Pos             0U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
-  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
-  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
-  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    ((value << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    ((value & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Cortex-M3 Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
-#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
-#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
-#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
-#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
-#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
-#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
-
-#if (__MPU_PRESENT == 1U)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Debug Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-/**
-  \brief   Set Priority Grouping
-  \details Sets the priority grouping field using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
-
-  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
-  SCB->AIRCR =  reg_value;
-}
-
-
-/**
-  \brief   Get Priority Grouping
-  \details Reads the priority grouping field from the NVIC Interrupt Controller.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
-{
-  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
-  \brief   Enable External Interrupt
-  \details Enables a device-specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Disable External Interrupt
-  \details Disables a device-specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt.
-  \param [in]      IRQn  Interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of an external interrupt.
-  \param [in]      IRQn  Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of an external interrupt.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in NVIC and returns the active bit.
-  \param [in]      IRQn  Interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
- */
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
-{
-  return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of an interrupt.
-  \note    The priority cannot be set for every core interrupt.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) < 0)
-  {
-    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of an interrupt.
-           The interrupt number can be positive to specify an external (device specific) interrupt,
-           or negative to specify an internal (core) interrupt.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) < 0)
-  {
-    return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
-                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
-                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
-           function SysTick_Config is not included. In this case, the file device.h
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_core_DebugFunctions ITM Functions
-  \brief    Functions that access the ITM debug interface.
-  @{
- */
-
-extern volatile int32_t ITM_RxBuffer;                    /*!< External variable to receive characters. */
-#define                 ITM_RXBUFFER_EMPTY   0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
-  \brief   ITM Send Character
-  \details Transmits a character via the ITM channel 0, and
-           \li Just returns when no debugger is connected that has booked the output.
-           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-  \param [in]     ch  Character to transmit.
-  \returns            Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
-  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
-      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
-  {
-    while (ITM->PORT[0U].u32 == 0UL)
-    {
-      __NOP();
-    }
-    ITM->PORT[0U].u8 = (uint8_t)ch;
-  }
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Receive Character
-  \details Inputs a character via the external variable \ref ITM_RxBuffer.
-  \return             Received character.
-  \return         -1  No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
-  int32_t ch = -1;                           /* no character available */
-
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
-  {
-    ch = ITM_RxBuffer;
-    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
-  }
-
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Check Character
-  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-  \return          0  No character available.
-  \return          1  Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
-  {
-    return (0);                              /* no character available */
-  }
-  else
-  {
-    return (1);                              /*    character available */
-  }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM3_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Drivers/CMSIS/Include/core_cm4.h b/Drivers/CMSIS/Include/core_cm4.h
deleted file mode 100755
index dc840ebf..00000000
--- a/Drivers/CMSIS/Include/core_cm4.h
+++ /dev/null
@@ -1,1937 +0,0 @@
-/**************************************************************************//**
- * @file     core_cm4.h
- * @brief    CMSIS Cortex-M4 Core Peripheral Access Layer Header File
- * @version  V4.30
- * @date     20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if   defined ( __ICCARM__ )
- #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM4_H_GENERIC
-#define __CORE_CM4_H_GENERIC
-
-#include 
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.

-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.

-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.

-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M4
-  @{
- */
-
-/*  CMSIS CM4 definitions */
-#define __CM4_CMSIS_VERSION_MAIN  (0x04U)                                      /*!< [31:16] CMSIS HAL main version */
-#define __CM4_CMSIS_VERSION_SUB   (0x1EU)                                      /*!< [15:0]  CMSIS HAL sub version */
-#define __CM4_CMSIS_VERSION       ((__CM4_CMSIS_VERSION_MAIN << 16U) | \
-                                    __CM4_CMSIS_VERSION_SUB           )        /*!< CMSIS HAL version number */
-
-#define __CORTEX_M                (0x04U)                                      /*!< Cortex-M Core */
-
-
-#if   defined ( __CC_ARM )
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined ( __GNUC__ )
-  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __ICCARM__ )
-  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TMS470__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TASKING__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __CSMC__ )
-  #define __packed
-  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler */
-  #define __INLINE         inline                                    /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */
-  #define __STATIC_INLINE  static inline
-
-#else
-  #error Unknown compiler
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #if (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1U
-    #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #if (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #if (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __TMS470__ )
-  #if defined __TI_VFP_SUPPORT__
-    #if (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #if (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #if (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#endif
-
-#include "core_cmInstr.h"                /* Core Instruction Access */
-#include "core_cmFunc.h"                 /* Core Function Access */
-#include "core_cmSimd.h"                 /* Compiler specific SIMD Intrinsics */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM4_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM4_H_DEPENDANT
-#define __CORE_CM4_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM4_REV
-    #define __CM4_REV               0x0000U
-    #warning "__CM4_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __FPU_PRESENT
-    #define __FPU_PRESENT             0U
-    #warning "__FPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          4U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    IO Type Qualifiers are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M4 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
-  - Core FPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
-#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
-
-#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
-#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
-#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
-
-#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
-#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
-#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag */
-    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
-#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
-
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[24U];
-  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[24U];
-  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[24U];
-  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[24U];
-  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
-        uint32_t RESERVED4[56U];
-  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
-        uint32_t RESERVED5[644U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
-}  NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-  __IOM uint8_t  SHP[12U];               /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
-  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
-  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
-  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
-  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
-  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
-  __IM  uint32_t PFR[2U];                /*!< Offset: 0x040 (R/ )  Processor Feature Register */
-  __IM  uint32_t DFR;                    /*!< Offset: 0x048 (R/ )  Debug Feature Register */
-  __IM  uint32_t ADR;                    /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
-  __IM  uint32_t MMFR[4U];               /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
-  __IM  uint32_t ISAR[5U];               /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
-        uint32_t RESERVED0[5U];
-  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISOOFP_Pos            9U                                         /*!< ACTLR: DISOOFP Position */
-#define SCnSCB_ACTLR_DISOOFP_Msk           (1UL << SCnSCB_ACTLR_DISOOFP_Pos)           /*!< ACTLR: DISOOFP Mask */
-
-#define SCnSCB_ACTLR_DISFPCA_Pos            8U                                         /*!< ACTLR: DISFPCA Position */
-#define SCnSCB_ACTLR_DISFPCA_Msk           (1UL << SCnSCB_ACTLR_DISFPCA_Pos)           /*!< ACTLR: DISFPCA Mask */
-
-#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
-
-#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1U                                         /*!< ACTLR: DISDEFWBUF Position */
-#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */
-
-#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
-  __OM  union
-  {
-    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
-    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
-    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
-  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
-        uint32_t RESERVED0[864U];
-  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
-        uint32_t RESERVED1[15U];
-  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
-        uint32_t RESERVED2[15U];
-  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
-        uint32_t RESERVED4[43U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
-        uint32_t RESERVED5[6U];
-  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
-  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
-  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
-  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
-  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
-  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
-  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
-  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
-  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
-        uint32_t RESERVED1[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
-  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
-        uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
-  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IOM uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-        uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-        uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
-        uint32_t RESERVED3[759U];
-  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER */
-  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
-  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
-        uint32_t RESERVED4[1U];
-  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
-  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
-        uint32_t RESERVED5[39U];
-  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
-        uint32_t RESERVED7[8U];
-  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/)    /*!< TPI ITATBCTR2: ATREADY Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/)    /*!< TPI ITATBCTR0: ATREADY Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_MajorType_Pos           4U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-#define TPI_DEVTYPE_SubType_Pos             0U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
-  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
-  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
-  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-#if (__FPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
-  \brief    Type definitions for the Floating Point Unit (FPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
-  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
-  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
-} FPU_Type;
-
-/* Floating-Point Context Control Register Definitions */
-#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
-
-#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
-
-#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
-
-#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
-
-#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
-
-#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
-
-#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
-
-#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
-
-#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
-
-/* Floating-Point Context Address Register Definitions */
-#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
-
-/* Floating-Point Default Status Control Register Definitions */
-#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
-
-#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
-
-#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
-
-#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
-
-/* Media and FP Feature Register 0 Definitions */
-#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
-
-#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
-
-#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
-
-#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
-
-#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
-
-#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
-
-#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
-
-#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
-
-/* Media and FP Feature Register 1 Definitions */
-#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
-
-#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
-
-#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
-
-#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
-
-/*@} end of group CMSIS_FPU */
-#endif
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    ((value << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    ((value & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Cortex-M4 Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
-#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
-#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
-#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
-#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
-#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
-#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
-
-#if (__MPU_PRESENT == 1U)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
-#endif
-
-#if (__FPU_PRESENT == 1U)
-  #define FPU_BASE          (SCS_BASE +  0x0F30UL)                    /*!< Floating Point Unit */
-  #define FPU               ((FPU_Type       *)     FPU_BASE      )   /*!< Floating Point Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Debug Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-/**
-  \brief   Set Priority Grouping
-  \details Sets the priority grouping field using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
-
-  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
-  SCB->AIRCR =  reg_value;
-}
-
-
-/**
-  \brief   Get Priority Grouping
-  \details Reads the priority grouping field from the NVIC Interrupt Controller.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
-{
-  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
-  \brief   Enable External Interrupt
-  \details Enables a device-specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Disable External Interrupt
-  \details Disables a device-specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt.
-  \param [in]      IRQn  Interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of an external interrupt.
-  \param [in]      IRQn  Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of an external interrupt.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in NVIC and returns the active bit.
-  \param [in]      IRQn  Interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
- */
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
-{
-  return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of an interrupt.
-  \note    The priority cannot be set for every core interrupt.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) < 0)
-  {
-    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of an interrupt.
-           The interrupt number can be positive to specify an external (device specific) interrupt,
-           or negative to specify an internal (core) interrupt.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) < 0)
-  {
-    return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
-                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
-                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
-           function SysTick_Config is not included. In this case, the file device.h
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_core_DebugFunctions ITM Functions
-  \brief    Functions that access the ITM debug interface.
-  @{
- */
-
-extern volatile int32_t ITM_RxBuffer;                    /*!< External variable to receive characters. */
-#define                 ITM_RXBUFFER_EMPTY   0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
-  \brief   ITM Send Character
-  \details Transmits a character via the ITM channel 0, and
-           \li Just returns when no debugger is connected that has booked the output.
-           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-  \param [in]     ch  Character to transmit.
-  \returns            Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
-  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
-      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
-  {
-    while (ITM->PORT[0U].u32 == 0UL)
-    {
-      __NOP();
-    }
-    ITM->PORT[0U].u8 = (uint8_t)ch;
-  }
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Receive Character
-  \details Inputs a character via the external variable \ref ITM_RxBuffer.
-  \return             Received character.
-  \return         -1  No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
-  int32_t ch = -1;                           /* no character available */
-
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
-  {
-    ch = ITM_RxBuffer;
-    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
-  }
-
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Check Character
-  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-  \return          0  No character available.
-  \return          1  Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
-  {
-    return (0);                              /* no character available */
-  }
-  else
-  {
-    return (1);                              /*    character available */
-  }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM4_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Drivers/CMSIS/Include/core_cm7.h b/Drivers/CMSIS/Include/core_cm7.h
deleted file mode 100755
index 3b7530ad..00000000
--- a/Drivers/CMSIS/Include/core_cm7.h
+++ /dev/null
@@ -1,2512 +0,0 @@
-/**************************************************************************//**
- * @file     core_cm7.h
- * @brief    CMSIS Cortex-M7 Core Peripheral Access Layer Header File
- * @version  V4.30
- * @date     20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if   defined ( __ICCARM__ )
- #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM7_H_GENERIC
-#define __CORE_CM7_H_GENERIC
-
-#include 
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.

-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.

-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.

-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M7
-  @{
- */
-
-/*  CMSIS CM7 definitions */
-#define __CM7_CMSIS_VERSION_MAIN  (0x04U)                                      /*!< [31:16] CMSIS HAL main version */
-#define __CM7_CMSIS_VERSION_SUB   (0x1EU)                                      /*!< [15:0]  CMSIS HAL sub version */
-#define __CM7_CMSIS_VERSION       ((__CM7_CMSIS_VERSION_MAIN << 16U) | \
-                                    __CM7_CMSIS_VERSION_SUB           )        /*!< CMSIS HAL version number */
-
-#define __CORTEX_M                (0x07U)                                      /*!< Cortex-M Core */
-
-
-#if   defined ( __CC_ARM )
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined ( __GNUC__ )
-  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __ICCARM__ )
-  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TMS470__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TASKING__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __CSMC__ )
-  #define __packed
-  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler */
-  #define __INLINE         inline                                    /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */
-  #define __STATIC_INLINE  static inline
-
-#else
-  #error Unknown compiler
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #if (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1U
-    #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #if (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #if (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __TMS470__ )
-  #if defined __TI_VFP_SUPPORT__
-    #if (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #if (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #if (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#endif
-
-#include "core_cmInstr.h"                /* Core Instruction Access */
-#include "core_cmFunc.h"                 /* Core Function Access */
-#include "core_cmSimd.h"                 /* Compiler specific SIMD Intrinsics */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM7_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM7_H_DEPENDANT
-#define __CORE_CM7_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM7_REV
-    #define __CM7_REV               0x0000U
-    #warning "__CM7_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __FPU_PRESENT
-    #define __FPU_PRESENT             0U
-    #warning "__FPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __ICACHE_PRESENT
-    #define __ICACHE_PRESENT          0U
-    #warning "__ICACHE_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __DCACHE_PRESENT
-    #define __DCACHE_PRESENT          0U
-    #warning "__DCACHE_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __DTCM_PRESENT
-    #define __DTCM_PRESENT            0U
-    #warning "__DTCM_PRESENT        not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          3U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    IO Type Qualifiers are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M7 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
-  - Core FPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
-#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
-
-#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
-#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
-#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
-
-#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
-#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
-#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag */
-    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
-#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
-
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[24U];
-  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[24U];
-  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[24U];
-  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[24U];
-  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
-        uint32_t RESERVED4[56U];
-  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
-        uint32_t RESERVED5[644U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
-}  NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
-  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
-  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
-  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
-  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
-  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
-  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
-  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
-  __IM  uint32_t ID_AFR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
-  __IM  uint32_t ID_MFR[4U];             /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
-  __IM  uint32_t ID_ISAR[5U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
-        uint32_t RESERVED0[1U];
-  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
-  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
-  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
-  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
-  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
-        uint32_t RESERVED3[93U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
-        uint32_t RESERVED4[15U];
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
-  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 1 */
-        uint32_t RESERVED5[1U];
-  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
-        uint32_t RESERVED6[1U];
-  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
-  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
-  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
-  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
-  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
-  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
-  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
-  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
-        uint32_t RESERVED7[6U];
-  __IOM uint32_t ITCMCR;                 /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */
-  __IOM uint32_t DTCMCR;                 /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */
-  __IOM uint32_t AHBPCR;                 /*!< Offset: 0x298 (R/W)  AHBP Control Register */
-  __IOM uint32_t CACR;                   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */
-  __IOM uint32_t AHBSCR;                 /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */
-        uint32_t RESERVED8[1U];
-  __IOM uint32_t ABFSR;                  /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos                      18U                                           /*!< SCB CCR: Branch prediction enable bit Position */
-#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: Branch prediction enable bit Mask */
-
-#define SCB_CCR_IC_Pos                      17U                                           /*!< SCB CCR: Instruction cache enable bit Position */
-#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: Instruction cache enable bit Mask */
-
-#define SCB_CCR_DC_Pos                      16U                                           /*!< SCB CCR: Cache enable bit Position */
-#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: Cache enable bit Mask */
-
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
-
-/* SCB Cache Level ID Register Definitions */
-#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
-#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
-
-#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
-#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
-
-/* SCB Cache Type Register Definitions */
-#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
-#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
-
-#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
-#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
-
-#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
-#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
-
-#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
-#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
-
-#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
-#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
-
-/* SCB Cache Size ID Register Definitions */
-#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
-#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
-
-#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
-#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
-
-#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
-#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
-
-#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
-#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
-
-#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
-#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
-
-#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
-#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
-
-#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
-#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
-
-/* SCB Cache Size Selection Register Definitions */
-#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
-#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
-
-#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
-#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
-
-/* SCB Software Triggered Interrupt Register Definitions */
-#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
-#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
-
-/* SCB D-Cache Invalidate by Set-way Register Definitions */
-#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
-#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
-
-#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
-#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
-
-/* SCB D-Cache Clean by Set-way Register Definitions */
-#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
-#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
-
-#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
-#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
-
-/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
-#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
-#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
-
-#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
-#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
-
-/* Instruction Tightly-Coupled Memory Control Register Definitions */
-#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */
-#define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */
-
-#define SCB_ITCMCR_RETEN_Pos                2U                                            /*!< SCB ITCMCR: RETEN Position */
-#define SCB_ITCMCR_RETEN_Msk               (1UL << SCB_ITCMCR_RETEN_Pos)                  /*!< SCB ITCMCR: RETEN Mask */
-
-#define SCB_ITCMCR_RMW_Pos                  1U                                            /*!< SCB ITCMCR: RMW Position */
-#define SCB_ITCMCR_RMW_Msk                 (1UL << SCB_ITCMCR_RMW_Pos)                    /*!< SCB ITCMCR: RMW Mask */
-
-#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */
-#define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */
-
-/* Data Tightly-Coupled Memory Control Register Definitions */
-#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */
-#define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */
-
-#define SCB_DTCMCR_RETEN_Pos                2U                                            /*!< SCB DTCMCR: RETEN Position */
-#define SCB_DTCMCR_RETEN_Msk               (1UL << SCB_DTCMCR_RETEN_Pos)                   /*!< SCB DTCMCR: RETEN Mask */
-
-#define SCB_DTCMCR_RMW_Pos                  1U                                            /*!< SCB DTCMCR: RMW Position */
-#define SCB_DTCMCR_RMW_Msk                 (1UL << SCB_DTCMCR_RMW_Pos)                    /*!< SCB DTCMCR: RMW Mask */
-
-#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */
-#define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */
-
-/* AHBP Control Register Definitions */
-#define SCB_AHBPCR_SZ_Pos                   1U                                            /*!< SCB AHBPCR: SZ Position */
-#define SCB_AHBPCR_SZ_Msk                  (7UL << SCB_AHBPCR_SZ_Pos)                     /*!< SCB AHBPCR: SZ Mask */
-
-#define SCB_AHBPCR_EN_Pos                   0U                                            /*!< SCB AHBPCR: EN Position */
-#define SCB_AHBPCR_EN_Msk                  (1UL /*<< SCB_AHBPCR_EN_Pos*/)                 /*!< SCB AHBPCR: EN Mask */
-
-/* L1 Cache Control Register Definitions */
-#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */
-#define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */
-
-#define SCB_CACR_ECCEN_Pos                  1U                                            /*!< SCB CACR: ECCEN Position */
-#define SCB_CACR_ECCEN_Msk                 (1UL << SCB_CACR_ECCEN_Pos)                    /*!< SCB CACR: ECCEN Mask */
-
-#define SCB_CACR_SIWT_Pos                   0U                                            /*!< SCB CACR: SIWT Position */
-#define SCB_CACR_SIWT_Msk                  (1UL /*<< SCB_CACR_SIWT_Pos*/)                 /*!< SCB CACR: SIWT Mask */
-
-/* AHBS Control Register Definitions */
-#define SCB_AHBSCR_INITCOUNT_Pos           11U                                            /*!< SCB AHBSCR: INITCOUNT Position */
-#define SCB_AHBSCR_INITCOUNT_Msk           (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos)           /*!< SCB AHBSCR: INITCOUNT Mask */
-
-#define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB AHBSCR: TPRI Position */
-#define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBPCR_TPRI_Pos)               /*!< SCB AHBSCR: TPRI Mask */
-
-#define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB AHBSCR: CTL Position*/
-#define SCB_AHBSCR_CTL_Msk                 (3UL /*<< SCB_AHBPCR_CTL_Pos*/)                /*!< SCB AHBSCR: CTL Mask */
-
-/* Auxiliary Bus Fault Status Register Definitions */
-#define SCB_ABFSR_AXIMTYPE_Pos              8U                                            /*!< SCB ABFSR: AXIMTYPE Position*/
-#define SCB_ABFSR_AXIMTYPE_Msk             (3UL << SCB_ABFSR_AXIMTYPE_Pos)                /*!< SCB ABFSR: AXIMTYPE Mask */
-
-#define SCB_ABFSR_EPPB_Pos                  4U                                            /*!< SCB ABFSR: EPPB Position*/
-#define SCB_ABFSR_EPPB_Msk                 (1UL << SCB_ABFSR_EPPB_Pos)                    /*!< SCB ABFSR: EPPB Mask */
-
-#define SCB_ABFSR_AXIM_Pos                  3U                                            /*!< SCB ABFSR: AXIM Position*/
-#define SCB_ABFSR_AXIM_Msk                 (1UL << SCB_ABFSR_AXIM_Pos)                    /*!< SCB ABFSR: AXIM Mask */
-
-#define SCB_ABFSR_AHBP_Pos                  2U                                            /*!< SCB ABFSR: AHBP Position*/
-#define SCB_ABFSR_AHBP_Msk                 (1UL << SCB_ABFSR_AHBP_Pos)                    /*!< SCB ABFSR: AHBP Mask */
-
-#define SCB_ABFSR_DTCM_Pos                  1U                                            /*!< SCB ABFSR: DTCM Position*/
-#define SCB_ABFSR_DTCM_Msk                 (1UL << SCB_ABFSR_DTCM_Pos)                    /*!< SCB ABFSR: DTCM Mask */
-
-#define SCB_ABFSR_ITCM_Pos                  0U                                            /*!< SCB ABFSR: ITCM Position*/
-#define SCB_ABFSR_ITCM_Msk                 (1UL /*<< SCB_ABFSR_ITCM_Pos*/)                /*!< SCB ABFSR: ITCM Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos    12U                                         /*!< ACTLR: DISITMATBFLUSH Position */
-#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk    (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos)    /*!< ACTLR: DISITMATBFLUSH Mask */
-
-#define SCnSCB_ACTLR_DISRAMODE_Pos         11U                                         /*!< ACTLR: DISRAMODE Position */
-#define SCnSCB_ACTLR_DISRAMODE_Msk         (1UL << SCnSCB_ACTLR_DISRAMODE_Pos)         /*!< ACTLR: DISRAMODE Mask */
-
-#define SCnSCB_ACTLR_FPEXCODIS_Pos         10U                                         /*!< ACTLR: FPEXCODIS Position */
-#define SCnSCB_ACTLR_FPEXCODIS_Msk         (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos)         /*!< ACTLR: FPEXCODIS Mask */
-
-#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
-
-#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
-  __OM  union
-  {
-    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
-    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
-    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
-  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
-        uint32_t RESERVED0[864U];
-  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
-        uint32_t RESERVED1[15U];
-  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
-        uint32_t RESERVED2[15U];
-  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
-        uint32_t RESERVED4[43U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
-        uint32_t RESERVED5[6U];
-  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
-  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
-  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
-  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
-  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
-  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
-  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
-  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
-  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
-        uint32_t RESERVED1[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
-  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
-        uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
-  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
-        uint32_t RESERVED3[981U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 (  W)  Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IOM uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-        uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-        uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
-        uint32_t RESERVED3[759U];
-  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER */
-  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
-  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
-        uint32_t RESERVED4[1U];
-  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
-  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
-        uint32_t RESERVED5[39U];
-  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
-        uint32_t RESERVED7[8U];
-  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/)    /*!< TPI ITATBCTR2: ATREADY Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/)    /*!< TPI ITATBCTR0: ATREADY Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_MajorType_Pos           4U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-#define TPI_DEVTYPE_SubType_Pos             0U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
-  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
-  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
-  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-#if (__FPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
-  \brief    Type definitions for the Floating Point Unit (FPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
-  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
-  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
-  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and FP Feature Register 2 */
-} FPU_Type;
-
-/* Floating-Point Context Control Register Definitions */
-#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
-
-#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
-
-#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
-
-#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
-
-#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
-
-#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
-
-#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
-
-#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
-
-#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
-
-/* Floating-Point Context Address Register Definitions */
-#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
-
-/* Floating-Point Default Status Control Register Definitions */
-#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
-
-#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
-
-#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
-
-#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
-
-/* Media and FP Feature Register 0 Definitions */
-#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
-
-#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
-
-#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
-
-#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
-
-#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
-
-#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
-
-#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
-
-#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
-
-/* Media and FP Feature Register 1 Definitions */
-#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
-
-#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
-
-#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
-
-#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
-
-/* Media and FP Feature Register 2 Definitions */
-
-/*@} end of group CMSIS_FPU */
-#endif
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    ((value << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    ((value & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Cortex-M4 Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
-#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
-#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
-#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
-#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
-#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
-#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
-
-#if (__MPU_PRESENT == 1U)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
-#endif
-
-#if (__FPU_PRESENT == 1U)
-  #define FPU_BASE          (SCS_BASE +  0x0F30UL)                    /*!< Floating Point Unit */
-  #define FPU               ((FPU_Type       *)     FPU_BASE      )   /*!< Floating Point Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Debug Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-/**
-  \brief   Set Priority Grouping
-  \details Sets the priority grouping field using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
-
-  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
-  SCB->AIRCR =  reg_value;
-}
-
-
-/**
-  \brief   Get Priority Grouping
-  \details Reads the priority grouping field from the NVIC Interrupt Controller.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
-{
-  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
-  \brief   Enable External Interrupt
-  \details Enables a device-specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Disable External Interrupt
-  \details Disables a device-specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt.
-  \param [in]      IRQn  Interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of an external interrupt.
-  \param [in]      IRQn  Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of an external interrupt.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in NVIC and returns the active bit.
-  \param [in]      IRQn  Interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
- */
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
-{
-  return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of an interrupt.
-  \note    The priority cannot be set for every core interrupt.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) < 0)
-  {
-    SCB->SHPR[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    NVIC->IP[((uint32_t)(int32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of an interrupt.
-           The interrupt number can be positive to specify an external (device specific) interrupt,
-           or negative to specify an internal (core) interrupt.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) < 0)
-  {
-    return(((uint32_t)SCB->SHPR[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)]                >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
-                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
-                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-  uint32_t mvfr0;
-
-  mvfr0 = SCB->MVFR0;
-  if        ((mvfr0 & 0x00000FF0UL) == 0x220UL)
-  {
-    return 2UL;           /* Double + Single precision FPU */
-  }
-  else if ((mvfr0 & 0x00000FF0UL) == 0x020UL)
-  {
-    return 1UL;           /* Single precision FPU */
-  }
-  else
-  {
-    return 0UL;           /* No FPU */
-  }
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##########################  Cache functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_CacheFunctions Cache Functions
-  \brief    Functions that configure Instruction and Data cache.
-  @{
- */
-
-/* Cache Size ID Register Macros */
-#define CCSIDR_WAYS(x)         (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
-#define CCSIDR_SETS(x)         (((x) & SCB_CCSIDR_NUMSETS_Msk      ) >> SCB_CCSIDR_NUMSETS_Pos      )
-
-
-/**
-  \brief   Enable I-Cache
-  \details Turns on I-Cache
-  */
-__STATIC_INLINE void SCB_EnableICache (void)
-{
-  #if (__ICACHE_PRESENT == 1U)
-    __DSB();
-    __ISB();
-    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
-    SCB->CCR |=  (uint32_t)SCB_CCR_IC_Msk;  /* enable I-Cache */
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Disable I-Cache
-  \details Turns off I-Cache
-  */
-__STATIC_INLINE void SCB_DisableICache (void)
-{
-  #if (__ICACHE_PRESENT == 1U)
-    __DSB();
-    __ISB();
-    SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk;  /* disable I-Cache */
-    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Invalidate I-Cache
-  \details Invalidates I-Cache
-  */
-__STATIC_INLINE void SCB_InvalidateICache (void)
-{
-  #if (__ICACHE_PRESENT == 1U)
-    __DSB();
-    __ISB();
-    SCB->ICIALLU = 0UL;
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Enable D-Cache
-  \details Turns on D-Cache
-  */
-__STATIC_INLINE void SCB_EnableDCache (void)
-{
-  #if (__DCACHE_PRESENT == 1U)
-    uint32_t ccsidr;
-    uint32_t sets;
-    uint32_t ways;
-
-    SCB->CSSELR = (0U << 1U) | 0U;          /* Level 1 data cache */
-    __DSB();
-
-    ccsidr = SCB->CCSIDR;
-
-                                            /* invalidate D-Cache */
-    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
-    do {
-      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
-      do {
-        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
-                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
-        #if defined ( __CC_ARM )
-          __schedule_barrier();
-        #endif
-      } while (ways--);
-    } while(sets--);
-    __DSB();
-
-    SCB->CCR |=  (uint32_t)SCB_CCR_DC_Msk;  /* enable D-Cache */
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Disable D-Cache
-  \details Turns off D-Cache
-  */
-__STATIC_INLINE void SCB_DisableDCache (void)
-{
-  #if (__DCACHE_PRESENT == 1U)
-    uint32_t ccsidr;
-    uint32_t sets;
-    uint32_t ways;
-
-    SCB->CSSELR = (0U << 1U) | 0U;          /* Level 1 data cache */
-    __DSB();
-
-    ccsidr = SCB->CCSIDR;
-
-    SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk;  /* disable D-Cache */
-
-                                            /* clean & invalidate D-Cache */
-    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
-    do {
-      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
-      do {
-        SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
-                       ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk)  );
-        #if defined ( __CC_ARM )
-          __schedule_barrier();
-        #endif
-      } while (ways--);
-    } while(sets--);
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Invalidate D-Cache
-  \details Invalidates D-Cache
-  */
-__STATIC_INLINE void SCB_InvalidateDCache (void)
-{
-  #if (__DCACHE_PRESENT == 1U)
-    uint32_t ccsidr;
-    uint32_t sets;
-    uint32_t ways;
-
-    SCB->CSSELR = (0U << 1U) | 0U;          /* Level 1 data cache */
-    __DSB();
-
-    ccsidr = SCB->CCSIDR;
-
-                                            /* invalidate D-Cache */
-    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
-    do {
-      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
-      do {
-        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
-                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
-        #if defined ( __CC_ARM )
-          __schedule_barrier();
-        #endif
-      } while (ways--);
-    } while(sets--);
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Clean D-Cache
-  \details Cleans D-Cache
-  */
-__STATIC_INLINE void SCB_CleanDCache (void)
-{
-  #if (__DCACHE_PRESENT == 1U)
-    uint32_t ccsidr;
-    uint32_t sets;
-    uint32_t ways;
-
-    SCB->CSSELR = (0U << 1U) | 0U;          /* Level 1 data cache */
-    __DSB();
-
-    ccsidr = SCB->CCSIDR;
-
-                                            /* clean D-Cache */
-    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
-    do {
-      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
-      do {
-        SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) |
-                      ((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk)  );
-        #if defined ( __CC_ARM )
-          __schedule_barrier();
-        #endif
-      } while (ways--);
-    } while(sets--);
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Clean & Invalidate D-Cache
-  \details Cleans and Invalidates D-Cache
-  */
-__STATIC_INLINE void SCB_CleanInvalidateDCache (void)
-{
-  #if (__DCACHE_PRESENT == 1U)
-    uint32_t ccsidr;
-    uint32_t sets;
-    uint32_t ways;
-
-    SCB->CSSELR = (0U << 1U) | 0U;          /* Level 1 data cache */
-    __DSB();
-
-    ccsidr = SCB->CCSIDR;
-
-                                            /* clean & invalidate D-Cache */
-    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
-    do {
-      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
-      do {
-        SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
-                       ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk)  );
-        #if defined ( __CC_ARM )
-          __schedule_barrier();
-        #endif
-      } while (ways--);
-    } while(sets--);
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   D-Cache Invalidate by address
-  \details Invalidates D-Cache for the given address
-  \param[in]   addr    address (aligned to 32-byte boundary)
-  \param[in]   dsize   size of memory block (in number of bytes)
-*/
-__STATIC_INLINE void SCB_InvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
-{
-  #if (__DCACHE_PRESENT == 1U)
-     int32_t op_size = dsize;
-    uint32_t op_addr = (uint32_t)addr;
-     int32_t linesize = 32U;                /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
-
-    __DSB();
-
-    while (op_size > 0) {
-      SCB->DCIMVAC = op_addr;
-      op_addr += linesize;
-      op_size -= linesize;
-    }
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   D-Cache Clean by address
-  \details Cleans D-Cache for the given address
-  \param[in]   addr    address (aligned to 32-byte boundary)
-  \param[in]   dsize   size of memory block (in number of bytes)
-*/
-__STATIC_INLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)
-{
-  #if (__DCACHE_PRESENT == 1)
-     int32_t op_size = dsize;
-    uint32_t op_addr = (uint32_t) addr;
-     int32_t linesize = 32U;                /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
-
-    __DSB();
-
-    while (op_size > 0) {
-      SCB->DCCMVAC = op_addr;
-      op_addr += linesize;
-      op_size -= linesize;
-    }
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   D-Cache Clean and Invalidate by address
-  \details Cleans and invalidates D_Cache for the given address
-  \param[in]   addr    address (aligned to 32-byte boundary)
-  \param[in]   dsize   size of memory block (in number of bytes)
-*/
-__STATIC_INLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
-{
-  #if (__DCACHE_PRESENT == 1U)
-     int32_t op_size = dsize;
-    uint32_t op_addr = (uint32_t) addr;
-     int32_t linesize = 32U;                /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
-
-    __DSB();
-
-    while (op_size > 0) {
-      SCB->DCCIMVAC = op_addr;
-      op_addr += linesize;
-      op_size -= linesize;
-    }
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/*@} end of CMSIS_Core_CacheFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
-           function SysTick_Config is not included. In this case, the file device.h
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_core_DebugFunctions ITM Functions
-  \brief    Functions that access the ITM debug interface.
-  @{
- */
-
-extern volatile int32_t ITM_RxBuffer;                    /*!< External variable to receive characters. */
-#define                 ITM_RXBUFFER_EMPTY   0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
-  \brief   ITM Send Character
-  \details Transmits a character via the ITM channel 0, and
-           \li Just returns when no debugger is connected that has booked the output.
-           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-  \param [in]     ch  Character to transmit.
-  \returns            Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
-  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
-      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
-  {
-    while (ITM->PORT[0U].u32 == 0UL)
-    {
-      __NOP();
-    }
-    ITM->PORT[0U].u8 = (uint8_t)ch;
-  }
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Receive Character
-  \details Inputs a character via the external variable \ref ITM_RxBuffer.
-  \return             Received character.
-  \return         -1  No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
-  int32_t ch = -1;                           /* no character available */
-
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
-  {
-    ch = ITM_RxBuffer;
-    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
-  }
-
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Check Character
-  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-  \return          0  No character available.
-  \return          1  Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
-  {
-    return (0);                              /* no character available */
-  }
-  else
-  {
-    return (1);                              /*    character available */
-  }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM7_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Drivers/CMSIS/Include/core_cmFunc.h b/Drivers/CMSIS/Include/core_cmFunc.h
deleted file mode 100755
index 652a48af..00000000
--- a/Drivers/CMSIS/Include/core_cmFunc.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/**************************************************************************//**
- * @file     core_cmFunc.h
- * @brief    CMSIS Cortex-M Core Function Access Header File
- * @version  V4.30
- * @date     20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if   defined ( __ICCARM__ )
- #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CMFUNC_H
-#define __CORE_CMFUNC_H
-
-
-/* ###########################  Core Function Access  ########################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
-  @{
-*/
-
-/*------------------ RealView Compiler -----------------*/
-#if   defined ( __CC_ARM )
-  #include "cmsis_armcc.h"
-
-/*------------------ ARM Compiler V6 -------------------*/
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #include "cmsis_armcc_V6.h"
-
-/*------------------ GNU Compiler ----------------------*/
-#elif defined ( __GNUC__ )
-  #include "cmsis_gcc.h"
-
-/*------------------ ICC Compiler ----------------------*/
-#elif defined ( __ICCARM__ )
-  #include 
-
-/*------------------ TI CCS Compiler -------------------*/
-#elif defined ( __TMS470__ )
-  #include 
-
-/*------------------ TASKING Compiler ------------------*/
-#elif defined ( __TASKING__ )
-  /*
-   * The CMSIS functions have been implemented as intrinsics in the compiler.
-   * Please use "carm -?i" to get an up to date list of all intrinsics,
-   * Including the CMSIS ones.
-   */
-
-/*------------------ COSMIC Compiler -------------------*/
-#elif defined ( __CSMC__ )
-  #include 
-
-#endif
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-#endif /* __CORE_CMFUNC_H */
diff --git a/Drivers/CMSIS/Include/core_cmInstr.h b/Drivers/CMSIS/Include/core_cmInstr.h
deleted file mode 100755
index f474b0e6..00000000
--- a/Drivers/CMSIS/Include/core_cmInstr.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/**************************************************************************//**
- * @file     core_cmInstr.h
- * @brief    CMSIS Cortex-M Core Instruction Access Header File
- * @version  V4.30
- * @date     20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if   defined ( __ICCARM__ )
- #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CMINSTR_H
-#define __CORE_CMINSTR_H
-
-
-/* ##########################  Core Instruction Access  ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
-  Access to dedicated instructions
-  @{
-*/
-
-/*------------------ RealView Compiler -----------------*/
-#if   defined ( __CC_ARM )
-  #include "cmsis_armcc.h"
-
-/*------------------ ARM Compiler V6 -------------------*/
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #include "cmsis_armcc_V6.h"
-
-/*------------------ GNU Compiler ----------------------*/
-#elif defined ( __GNUC__ )
-  #include "cmsis_gcc.h"
-
-/*------------------ ICC Compiler ----------------------*/
-#elif defined ( __ICCARM__ )
-  #include 
-
-/*------------------ TI CCS Compiler -------------------*/
-#elif defined ( __TMS470__ )
-  #include 
-
-/*------------------ TASKING Compiler ------------------*/
-#elif defined ( __TASKING__ )
-  /*
-   * The CMSIS functions have been implemented as intrinsics in the compiler.
-   * Please use "carm -?i" to get an up to date list of all intrinsics,
-   * Including the CMSIS ones.
-   */
-
-/*------------------ COSMIC Compiler -------------------*/
-#elif defined ( __CSMC__ )
-  #include 
-
-#endif
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-#endif /* __CORE_CMINSTR_H */
diff --git a/Drivers/CMSIS/Include/core_cmSimd.h b/Drivers/CMSIS/Include/core_cmSimd.h
deleted file mode 100755
index 66bf5c2a..00000000
--- a/Drivers/CMSIS/Include/core_cmSimd.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/**************************************************************************//**
- * @file     core_cmSimd.h
- * @brief    CMSIS Cortex-M SIMD Header File
- * @version  V4.30
- * @date     20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if   defined ( __ICCARM__ )
- #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CMSIMD_H
-#define __CORE_CMSIMD_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-
-/* ###################  Compiler specific Intrinsics  ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
-  Access to dedicated SIMD instructions
-  @{
-*/
-
-/*------------------ RealView Compiler -----------------*/
-#if   defined ( __CC_ARM )
-  #include "cmsis_armcc.h"
-
-/*------------------ ARM Compiler V6 -------------------*/
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #include "cmsis_armcc_V6.h"
-
-/*------------------ GNU Compiler ----------------------*/
-#elif defined ( __GNUC__ )
-  #include "cmsis_gcc.h"
-
-/*------------------ ICC Compiler ----------------------*/
-#elif defined ( __ICCARM__ )
-  #include 
-
-/*------------------ TI CCS Compiler -------------------*/
-#elif defined ( __TMS470__ )
-  #include 
-
-/*------------------ TASKING Compiler ------------------*/
-#elif defined ( __TASKING__ )
-  /*
-   * The CMSIS functions have been implemented as intrinsics in the compiler.
-   * Please use "carm -?i" to get an up to date list of all intrinsics,
-   * Including the CMSIS ones.
-   */
-
-/*------------------ COSMIC Compiler -------------------*/
-#elif defined ( __CSMC__ )
-  #include 
-
-#endif
-
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CMSIMD_H */
diff --git a/Drivers/CMSIS/Include/core_sc000.h b/Drivers/CMSIS/Include/core_sc000.h
deleted file mode 100755
index 514dbd81..00000000
--- a/Drivers/CMSIS/Include/core_sc000.h
+++ /dev/null
@@ -1,926 +0,0 @@
-/**************************************************************************//**
- * @file     core_sc000.h
- * @brief    CMSIS SC000 Core Peripheral Access Layer Header File
- * @version  V4.30
- * @date     20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if   defined ( __ICCARM__ )
- #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_SC000_H_GENERIC
-#define __CORE_SC000_H_GENERIC
-
-#include 
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.

-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.

-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.

-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup SC000
-  @{
- */
-
-/*  CMSIS SC000 definitions */
-#define __SC000_CMSIS_VERSION_MAIN  (0x04U)                                    /*!< [31:16] CMSIS HAL main version */
-#define __SC000_CMSIS_VERSION_SUB   (0x1EU)                                    /*!< [15:0]  CMSIS HAL sub version */
-#define __SC000_CMSIS_VERSION       ((__SC000_CMSIS_VERSION_MAIN << 16U) | \
-                                      __SC000_CMSIS_VERSION_SUB           )    /*!< CMSIS HAL version number */
-
-#define __CORTEX_SC                 (000U)                                     /*!< Cortex secure core */
-
-
-#if   defined ( __CC_ARM )
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined ( __GNUC__ )
-  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __ICCARM__ )
-  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TMS470__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TASKING__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __CSMC__ )
-  #define __packed
-  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler */
-  #define __INLINE         inline                                    /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */
-  #define __STATIC_INLINE  static inline
-
-#else
-  #error Unknown compiler
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TMS470__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "core_cmInstr.h"                /* Core Instruction Access */
-#include "core_cmFunc.h"                 /* Core Function Access */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_SC000_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_SC000_H_DEPENDANT
-#define __CORE_SC000_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __SC000_REV
-    #define __SC000_REV             0x0000U
-    #warning "__SC000_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    IO Type Qualifiers are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group SC000 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core MPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[31U];
-  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[31U];
-  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[31U];
-  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[31U];
-        uint32_t RESERVED4[64U];
-  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
-}  NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-        uint32_t RESERVED1[154U];
-  __IOM uint32_t SFCR;                   /*!< Offset: 0x290 (R/W)  Security Features Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-#if (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos                   8U                                            /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk                  (0xFFFFFFUL << MPU_RBAR_ADDR_Pos)              /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
-            Therefore they are not covered by the SC000 header file.
-  @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    ((value << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    ((value & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of SC000 Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-
-#if (__MPU_PRESENT == 1U)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-/* Interrupt Priorities are WORD accessible only under ARMv6M                   */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
-#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
-#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
-
-
-/**
-  \brief   Enable External Interrupt
-  \details Enables a device-specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Disable External Interrupt
-  \details Disables a device-specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt.
-  \param [in]      IRQn  Interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of an external interrupt.
-  \param [in]      IRQn  Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of an external interrupt.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of an interrupt.
-  \note    The priority cannot be set for every core interrupt.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) < 0)
-  {
-    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of an interrupt.
-           The interrupt number can be positive to specify an external (device specific) interrupt,
-           or negative to specify an internal (core) interrupt.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) < 0)
-  {
-    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                 SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
-           function SysTick_Config is not included. In this case, the file device.h
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_SC000_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Drivers/CMSIS/Include/core_sc300.h b/Drivers/CMSIS/Include/core_sc300.h
deleted file mode 100755
index 8bd18aa3..00000000
--- a/Drivers/CMSIS/Include/core_sc300.h
+++ /dev/null
@@ -1,1745 +0,0 @@
-/**************************************************************************//**
- * @file     core_sc300.h
- * @brief    CMSIS SC300 Core Peripheral Access Layer Header File
- * @version  V4.30
- * @date     20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if   defined ( __ICCARM__ )
- #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_SC300_H_GENERIC
-#define __CORE_SC300_H_GENERIC
-
-#include 
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.

-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.

-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.

-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup SC3000
-  @{
- */
-
-/*  CMSIS SC300 definitions */
-#define __SC300_CMSIS_VERSION_MAIN  (0x04U)                                    /*!< [31:16] CMSIS HAL main version */
-#define __SC300_CMSIS_VERSION_SUB   (0x1EU)                                    /*!< [15:0]  CMSIS HAL sub version */
-#define __SC300_CMSIS_VERSION       ((__SC300_CMSIS_VERSION_MAIN << 16U) | \
-                                      __SC300_CMSIS_VERSION_SUB           )    /*!< CMSIS HAL version number */
-
-#define __CORTEX_SC                 (300U)                                     /*!< Cortex secure core */
-
-
-#if   defined ( __CC_ARM )
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined ( __GNUC__ )
-  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __ICCARM__ )
-  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TMS470__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TASKING__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler */
-  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __CSMC__ )
-  #define __packed
-  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler */
-  #define __INLINE         inline                                    /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */
-  #define __STATIC_INLINE  static inline
-
-#else
-  #error Unknown compiler
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TMS470__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "core_cmInstr.h"                /* Core Instruction Access */
-#include "core_cmFunc.h"                 /* Core Function Access */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_SC300_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_SC300_H_DEPENDANT
-#define __CORE_SC300_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __SC300_REV
-    #define __SC300_REV               0x0000U
-    #warning "__SC300_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          4U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    IO Type Qualifiers are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group SC300 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
-#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
-#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
-
-#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
-#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[24U];
-  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[24U];
-  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[24U];
-  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[24U];
-  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
-        uint32_t RESERVED4[56U];
-  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
-        uint32_t RESERVED5[644U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
-}  NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-  __IOM uint8_t  SHP[12U];               /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
-  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
-  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
-  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
-  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
-  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
-  __IM  uint32_t PFR[2U];                /*!< Offset: 0x040 (R/ )  Processor Feature Register */
-  __IM  uint32_t DFR;                    /*!< Offset: 0x048 (R/ )  Debug Feature Register */
-  __IM  uint32_t ADR;                    /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
-  __IM  uint32_t MMFR[4U];               /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
-  __IM  uint32_t ISAR[5U];               /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
-        uint32_t RESERVED0[5U];
-  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
-        uint32_t RESERVED1[129U];
-  __IOM uint32_t SFCR;                   /*!< Offset: 0x290 (R/W)  Security Features Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLBASE_Pos               29U                                            /*!< SCB VTOR: TBLBASE Position */
-#define SCB_VTOR_TBLBASE_Msk               (1UL << SCB_VTOR_TBLBASE_Pos)                  /*!< SCB VTOR: TBLBASE Mask */
-
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
-        uint32_t RESERVED1[1U];
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
-  __OM  union
-  {
-    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
-    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
-    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
-  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
-        uint32_t RESERVED0[864U];
-  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
-        uint32_t RESERVED1[15U];
-  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
-        uint32_t RESERVED2[15U];
-  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
-        uint32_t RESERVED4[43U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
-        uint32_t RESERVED5[6U];
-  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
-  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
-  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
-  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
-  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
-  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
-  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
-  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
-  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
-        uint32_t RESERVED1[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
-  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
-        uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
-  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IOM uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-        uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-        uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
-        uint32_t RESERVED3[759U];
-  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER */
-  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
-  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
-        uint32_t RESERVED4[1U];
-  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
-  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
-        uint32_t RESERVED5[39U];
-  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
-        uint32_t RESERVED7[8U];
-  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/)    /*!< TPI ITATBCTR2: ATREADY Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/)    /*!< TPI ITATBCTR0: ATREADY Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_MajorType_Pos           4U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-#define TPI_DEVTYPE_SubType_Pos             0U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
-  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
-  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
-  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    ((value << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    ((value & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Cortex-M3 Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
-#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
-#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
-#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
-#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
-#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
-#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
-
-#if (__MPU_PRESENT == 1U)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Debug Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-/**
-  \brief   Set Priority Grouping
-  \details Sets the priority grouping field using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
-
-  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
-  SCB->AIRCR =  reg_value;
-}
-
-
-/**
-  \brief   Get Priority Grouping
-  \details Reads the priority grouping field from the NVIC Interrupt Controller.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
-{
-  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
-  \brief   Enable External Interrupt
-  \details Enables a device-specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Disable External Interrupt
-  \details Disables a device-specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt.
-  \param [in]      IRQn  Interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of an external interrupt.
-  \param [in]      IRQn  Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of an external interrupt.
-  \param [in]      IRQn  External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in NVIC and returns the active bit.
-  \param [in]      IRQn  Interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
- */
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
-{
-  return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of an interrupt.
-  \note    The priority cannot be set for every core interrupt.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) < 0)
-  {
-    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of an interrupt.
-           The interrupt number can be positive to specify an external (device specific) interrupt,
-           or negative to specify an internal (core) interrupt.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) < 0)
-  {
-    return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
-                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
-                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
-           function SysTick_Config is not included. In this case, the file device.h
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_core_DebugFunctions ITM Functions
-  \brief    Functions that access the ITM debug interface.
-  @{
- */
-
-extern volatile int32_t ITM_RxBuffer;                    /*!< External variable to receive characters. */
-#define                 ITM_RXBUFFER_EMPTY   0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
-  \brief   ITM Send Character
-  \details Transmits a character via the ITM channel 0, and
-           \li Just returns when no debugger is connected that has booked the output.
-           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-  \param [in]     ch  Character to transmit.
-  \returns            Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
-  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
-      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
-  {
-    while (ITM->PORT[0U].u32 == 0UL)
-    {
-      __NOP();
-    }
-    ITM->PORT[0U].u8 = (uint8_t)ch;
-  }
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Receive Character
-  \details Inputs a character via the external variable \ref ITM_RxBuffer.
-  \return             Received character.
-  \return         -1  No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
-  int32_t ch = -1;                           /* no character available */
-
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
-  {
-    ch = ITM_RxBuffer;
-    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
-  }
-
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Check Character
-  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-  \return          0  No character available.
-  \return          1  Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
-  {
-    return (0);                              /* no character available */
-  }
-  else
-  {
-    return (1);                              /*    character available */
-  }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_SC300_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Drivers/CMSIS/RTOS/Template/cmsis_os.h b/Drivers/CMSIS/RTOS/Template/cmsis_os.h
deleted file mode 100755
index 5fcfad2c..00000000
--- a/Drivers/CMSIS/RTOS/Template/cmsis_os.h
+++ /dev/null
@@ -1,707 +0,0 @@
-/* ----------------------------------------------------------------------
- * $Date:        5. February 2013
- * $Revision:    V1.02
- *
- * Project:      CMSIS-RTOS API
- * Title:        cmsis_os.h template header file
- *
- * Version 0.02
- *    Initial Proposal Phase
- * Version 0.03
- *    osKernelStart added, optional feature: main started as thread
- *    osSemaphores have standard behavior
- *    osTimerCreate does not start the timer, added osTimerStart
- *    osThreadPass is renamed to osThreadYield
- * Version 1.01
- *    Support for C++ interface
- *     - const attribute removed from the osXxxxDef_t typedef's
- *     - const attribute added to the osXxxxDef macros
- *    Added: osTimerDelete, osMutexDelete, osSemaphoreDelete
- *    Added: osKernelInitialize
- * Version 1.02
- *    Control functions for short timeouts in microsecond resolution:
- *    Added: osKernelSysTick, osKernelSysTickFrequency, osKernelSysTickMicroSec
- *    Removed: osSignalGet 
- *----------------------------------------------------------------------------
- *
- * Copyright (c) 2013 ARM LIMITED
- * All rights reserved.
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *  - Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  - Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *  - Neither the name of ARM  nor the names of its contributors may be used
- *    to endorse or promote products derived from this software without
- *    specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *---------------------------------------------------------------------------*/
- 
- 
-#ifndef _CMSIS_OS_H
-#define _CMSIS_OS_H
- 
-/// \note MUST REMAIN UNCHANGED: \b osCMSIS identifies the CMSIS-RTOS API version.
-#define osCMSIS           0x10002      ///< API version (main [31:16] .sub [15:0])
- 
-/// \note CAN BE CHANGED: \b osCMSIS_KERNEL identifies the underlying RTOS kernel and version number.
-#define osCMSIS_KERNEL    0x10000	   ///< RTOS identification and version (main [31:16] .sub [15:0])
- 
-/// \note MUST REMAIN UNCHANGED: \b osKernelSystemId shall be consistent in every CMSIS-RTOS.
-#define osKernelSystemId "KERNEL V1.00"   ///< RTOS identification string
- 
-/// \note MUST REMAIN UNCHANGED: \b osFeature_xxx shall be consistent in every CMSIS-RTOS.
-#define osFeature_MainThread   1       ///< main thread      1=main can be thread, 0=not available
-#define osFeature_Pool         1       ///< Memory Pools:    1=available, 0=not available
-#define osFeature_MailQ        1       ///< Mail Queues:     1=available, 0=not available
-#define osFeature_MessageQ     1       ///< Message Queues:  1=available, 0=not available
-#define osFeature_Signals      8       ///< maximum number of Signal Flags available per thread
-#define osFeature_Semaphore    30      ///< maximum count for \ref osSemaphoreCreate function
-#define osFeature_Wait         1       ///< osWait function: 1=available, 0=not available
-#define osFeature_SysTick      1       ///< osKernelSysTick functions: 1=available, 0=not available
- 
-#include 
-#include 
- 
-#ifdef  __cplusplus
-extern "C"
-{
-#endif
- 
- 
-// ==== Enumeration, structures, defines ====
- 
-/// Priority used for thread control.
-/// \note MUST REMAIN UNCHANGED: \b osPriority shall be consistent in every CMSIS-RTOS.
-typedef enum  {
-  osPriorityIdle          = -3,          ///< priority: idle (lowest)
-  osPriorityLow           = -2,          ///< priority: low
-  osPriorityBelowNormal   = -1,          ///< priority: below normal
-  osPriorityNormal        =  0,          ///< priority: normal (default)
-  osPriorityAboveNormal   = +1,          ///< priority: above normal
-  osPriorityHigh          = +2,          ///< priority: high
-  osPriorityRealtime      = +3,          ///< priority: realtime (highest)
-  osPriorityError         =  0x84        ///< system cannot determine priority or thread has illegal priority
-} osPriority;
- 
-/// Timeout value.
-/// \note MUST REMAIN UNCHANGED: \b osWaitForever shall be consistent in every CMSIS-RTOS.
-#define osWaitForever     0xFFFFFFFF     ///< wait forever timeout value
- 
-/// Status code values returned by CMSIS-RTOS functions.
-/// \note MUST REMAIN UNCHANGED: \b osStatus shall be consistent in every CMSIS-RTOS.
-typedef enum  {
-  osOK                    =     0,       ///< function completed; no error or event occurred.
-  osEventSignal           =  0x08,       ///< function completed; signal event occurred.
-  osEventMessage          =  0x10,       ///< function completed; message event occurred.
-  osEventMail             =  0x20,       ///< function completed; mail event occurred.
-  osEventTimeout          =  0x40,       ///< function completed; timeout occurred.
-  osErrorParameter        =  0x80,       ///< parameter error: a mandatory parameter was missing or specified an incorrect object.
-  osErrorResource         =  0x81,       ///< resource not available: a specified resource was not available.
-  osErrorTimeoutResource  =  0xC1,       ///< resource not available within given time: a specified resource was not available within the timeout period.
-  osErrorISR              =  0x82,       ///< not allowed in ISR context: the function cannot be called from interrupt service routines.
-  osErrorISRRecursive     =  0x83,       ///< function called multiple times from ISR with same object.
-  osErrorPriority         =  0x84,       ///< system cannot determine priority or thread has illegal priority.
-  osErrorNoMemory         =  0x85,       ///< system is out of memory: it was impossible to allocate or reserve memory for the operation.
-  osErrorValue            =  0x86,       ///< value of a parameter is out of range.
-  osErrorOS               =  0xFF,       ///< unspecified RTOS error: run-time error but no other error message fits.
-  os_status_reserved      =  0x7FFFFFFF  ///< prevent from enum down-size compiler optimization.
-} osStatus;
- 
- 
-/// Timer type value for the timer definition.
-/// \note MUST REMAIN UNCHANGED: \b os_timer_type shall be consistent in every CMSIS-RTOS.
-typedef enum  {
-  osTimerOnce             =     0,       ///< one-shot timer
-  osTimerPeriodic         =     1        ///< repeating timer
-} os_timer_type;
- 
-/// Entry point of a thread.
-/// \note MUST REMAIN UNCHANGED: \b os_pthread shall be consistent in every CMSIS-RTOS.
-typedef void (*os_pthread) (void const *argument);
- 
-/// Entry point of a timer call back function.
-/// \note MUST REMAIN UNCHANGED: \b os_ptimer shall be consistent in every CMSIS-RTOS.
-typedef void (*os_ptimer) (void const *argument);
- 
-// >>> the following data type definitions may shall adapted towards a specific RTOS
- 
-/// Thread ID identifies the thread (pointer to a thread control block).
-/// \note CAN BE CHANGED: \b os_thread_cb is implementation specific in every CMSIS-RTOS.
-typedef struct os_thread_cb *osThreadId;
- 
-/// Timer ID identifies the timer (pointer to a timer control block).
-/// \note CAN BE CHANGED: \b os_timer_cb is implementation specific in every CMSIS-RTOS.
-typedef struct os_timer_cb *osTimerId;
- 
-/// Mutex ID identifies the mutex (pointer to a mutex control block).
-/// \note CAN BE CHANGED: \b os_mutex_cb is implementation specific in every CMSIS-RTOS.
-typedef struct os_mutex_cb *osMutexId;
- 
-/// Semaphore ID identifies the semaphore (pointer to a semaphore control block).
-/// \note CAN BE CHANGED: \b os_semaphore_cb is implementation specific in every CMSIS-RTOS.
-typedef struct os_semaphore_cb *osSemaphoreId;
- 
-/// Pool ID identifies the memory pool (pointer to a memory pool control block).
-/// \note CAN BE CHANGED: \b os_pool_cb is implementation specific in every CMSIS-RTOS.
-typedef struct os_pool_cb *osPoolId;
- 
-/// Message ID identifies the message queue (pointer to a message queue control block).
-/// \note CAN BE CHANGED: \b os_messageQ_cb is implementation specific in every CMSIS-RTOS.
-typedef struct os_messageQ_cb *osMessageQId;
- 
-/// Mail ID identifies the mail queue (pointer to a mail queue control block).
-/// \note CAN BE CHANGED: \b os_mailQ_cb is implementation specific in every CMSIS-RTOS.
-typedef struct os_mailQ_cb *osMailQId;
- 
- 
-/// Thread Definition structure contains startup information of a thread.
-/// \note CAN BE CHANGED: \b os_thread_def is implementation specific in every CMSIS-RTOS.
-typedef struct os_thread_def  {
-  os_pthread               pthread;    ///< start address of thread function
-  osPriority             tpriority;    ///< initial thread priority
-  uint32_t               instances;    ///< maximum number of instances of that thread function
-  uint32_t               stacksize;    ///< stack size requirements in bytes; 0 is default stack size
-} osThreadDef_t;
- 
-/// Timer Definition structure contains timer parameters.
-/// \note CAN BE CHANGED: \b os_timer_def is implementation specific in every CMSIS-RTOS.
-typedef struct os_timer_def  {
-  os_ptimer                 ptimer;    ///< start address of a timer function
-} osTimerDef_t;
- 
-/// Mutex Definition structure contains setup information for a mutex.
-/// \note CAN BE CHANGED: \b os_mutex_def is implementation specific in every CMSIS-RTOS.
-typedef struct os_mutex_def  {
-  uint32_t                   dummy;    ///< dummy value.
-} osMutexDef_t;
- 
-/// Semaphore Definition structure contains setup information for a semaphore.
-/// \note CAN BE CHANGED: \b os_semaphore_def is implementation specific in every CMSIS-RTOS.
-typedef struct os_semaphore_def  {
-  uint32_t                   dummy;    ///< dummy value.
-} osSemaphoreDef_t;
- 
-/// Definition structure for memory block allocation.
-/// \note CAN BE CHANGED: \b os_pool_def is implementation specific in every CMSIS-RTOS.
-typedef struct os_pool_def  {
-  uint32_t                 pool_sz;    ///< number of items (elements) in the pool
-  uint32_t                 item_sz;    ///< size of an item
-  void                       *pool;    ///< pointer to memory for pool
-} osPoolDef_t;
- 
-/// Definition structure for message queue.
-/// \note CAN BE CHANGED: \b os_messageQ_def is implementation specific in every CMSIS-RTOS.
-typedef struct os_messageQ_def  {
-  uint32_t                queue_sz;    ///< number of elements in the queue
-  uint32_t                 item_sz;    ///< size of an item
-  void                       *pool;    ///< memory array for messages
-} osMessageQDef_t;
- 
-/// Definition structure for mail queue.
-/// \note CAN BE CHANGED: \b os_mailQ_def is implementation specific in every CMSIS-RTOS.
-typedef struct os_mailQ_def  {
-  uint32_t                queue_sz;    ///< number of elements in the queue
-  uint32_t                 item_sz;    ///< size of an item
-  void                       *pool;    ///< memory array for mail
-} osMailQDef_t;
- 
-/// Event structure contains detailed information about an event.
-/// \note MUST REMAIN UNCHANGED: \b os_event shall be consistent in every CMSIS-RTOS.
-///       However the struct may be extended at the end.
-typedef struct  {
-  osStatus                 status;     ///< status code: event or error information
-  union  {
-    uint32_t                    v;     ///< message as 32-bit value
-    void                       *p;     ///< message or mail as void pointer
-    int32_t               signals;     ///< signal flags
-  } value;                             ///< event value
-  union  {
-    osMailQId             mail_id;     ///< mail id obtained by \ref osMailCreate
-    osMessageQId       message_id;     ///< message id obtained by \ref osMessageCreate
-  } def;                               ///< event definition
-} osEvent;
- 
- 
-//  ==== Kernel Control Functions ====
- 
-/// Initialize the RTOS Kernel for creating objects.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osKernelInitialize shall be consistent in every CMSIS-RTOS.
-osStatus osKernelInitialize (void);
- 
-/// Start the RTOS Kernel.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osKernelStart shall be consistent in every CMSIS-RTOS.
-osStatus osKernelStart (void);
- 
-/// Check if the RTOS kernel is already started.
-/// \note MUST REMAIN UNCHANGED: \b osKernelRunning shall be consistent in every CMSIS-RTOS.
-/// \return 0 RTOS is not started, 1 RTOS is started.
-int32_t osKernelRunning(void);
- 
-#if (defined (osFeature_SysTick)  &&  (osFeature_SysTick != 0))     // System Timer available
- 
-/// Get the RTOS kernel system timer counter 
-/// \note MUST REMAIN UNCHANGED: \b osKernelSysTick shall be consistent in every CMSIS-RTOS.
-/// \return RTOS kernel system timer as 32-bit value 
-uint32_t osKernelSysTick (void);
- 
-/// The RTOS kernel system timer frequency in Hz
-/// \note Reflects the system timer setting and is typically defined in a configuration file.
-#define osKernelSysTickFrequency 100000000
- 
-/// Convert a microseconds value to a RTOS kernel system timer value.
-/// \param         microsec     time value in microseconds.
-/// \return time value normalized to the \ref osKernelSysTickFrequency
-#define osKernelSysTickMicroSec(microsec) (((uint64_t)microsec * (osKernelSysTickFrequency)) / 1000000)
- 
-#endif    // System Timer available
- 
-//  ==== Thread Management ====
- 
-/// Create a Thread Definition with function, priority, and stack requirements.
-/// \param         name         name of the thread function.
-/// \param         priority     initial priority of the thread function.
-/// \param         instances    number of possible thread instances.
-/// \param         stacksz      stack size (in bytes) requirements for the thread function.
-/// \note CAN BE CHANGED: The parameters to \b osThreadDef shall be consistent but the
-///       macro body is implementation specific in every CMSIS-RTOS.
-#if defined (osObjectsExternal)  // object is external
-#define osThreadDef(name, priority, instances, stacksz)  \
-extern const osThreadDef_t os_thread_def_##name
-#else                            // define the object
-#define osThreadDef(name, priority, instances, stacksz)  \
-const osThreadDef_t os_thread_def_##name = \
-{ (name), (priority), (instances), (stacksz)  }
-#endif
- 
-/// Access a Thread definition.
-/// \param         name          name of the thread definition object.
-/// \note CAN BE CHANGED: The parameter to \b osThread shall be consistent but the
-///       macro body is implementation specific in every CMSIS-RTOS.
-#define osThread(name)  \
-&os_thread_def_##name
- 
-/// Create a thread and add it to Active Threads and set it to state READY.
-/// \param[in]     thread_def    thread definition referenced with \ref osThread.
-/// \param[in]     argument      pointer that is passed to the thread function as start argument.
-/// \return thread ID for reference by other functions or NULL in case of error.
-/// \note MUST REMAIN UNCHANGED: \b osThreadCreate shall be consistent in every CMSIS-RTOS.
-osThreadId osThreadCreate (const osThreadDef_t *thread_def, void *argument);
- 
-/// Return the thread ID of the current running thread.
-/// \return thread ID for reference by other functions or NULL in case of error.
-/// \note MUST REMAIN UNCHANGED: \b osThreadGetId shall be consistent in every CMSIS-RTOS.
-osThreadId osThreadGetId (void);
- 
-/// Terminate execution of a thread and remove it from Active Threads.
-/// \param[in]     thread_id   thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osThreadTerminate shall be consistent in every CMSIS-RTOS.
-osStatus osThreadTerminate (osThreadId thread_id);
- 
-/// Pass control to next thread that is in state \b READY.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osThreadYield shall be consistent in every CMSIS-RTOS.
-osStatus osThreadYield (void);
- 
-/// Change priority of an active thread.
-/// \param[in]     thread_id     thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
-/// \param[in]     priority      new priority value for the thread function.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osThreadSetPriority shall be consistent in every CMSIS-RTOS.
-osStatus osThreadSetPriority (osThreadId thread_id, osPriority priority);
- 
-/// Get current priority of an active thread.
-/// \param[in]     thread_id     thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
-/// \return current priority value of the thread function.
-/// \note MUST REMAIN UNCHANGED: \b osThreadGetPriority shall be consistent in every CMSIS-RTOS.
-osPriority osThreadGetPriority (osThreadId thread_id);
- 
- 
-//  ==== Generic Wait Functions ====
- 
-/// Wait for Timeout (Time Delay).
-/// \param[in]     millisec      \ref CMSIS_RTOS_TimeOutValue "time delay" value
-/// \return status code that indicates the execution status of the function.
-osStatus osDelay (uint32_t millisec);
- 
-#if (defined (osFeature_Wait)  &&  (osFeature_Wait != 0))     // Generic Wait available
- 
-/// Wait for Signal, Message, Mail, or Timeout.
-/// \param[in] millisec          \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out
-/// \return event that contains signal, message, or mail information or error code.
-/// \note MUST REMAIN UNCHANGED: \b osWait shall be consistent in every CMSIS-RTOS.
-osEvent osWait (uint32_t millisec);
- 
-#endif  // Generic Wait available
- 
- 
-//  ==== Timer Management Functions ====
-/// Define a Timer object.
-/// \param         name          name of the timer object.
-/// \param         function      name of the timer call back function.
-/// \note CAN BE CHANGED: The parameter to \b osTimerDef shall be consistent but the
-///       macro body is implementation specific in every CMSIS-RTOS.
-#if defined (osObjectsExternal)  // object is external
-#define osTimerDef(name, function)  \
-extern const osTimerDef_t os_timer_def_##name
-#else                            // define the object
-#define osTimerDef(name, function)  \
-const osTimerDef_t os_timer_def_##name = \
-{ (function) }
-#endif
- 
-/// Access a Timer definition.
-/// \param         name          name of the timer object.
-/// \note CAN BE CHANGED: The parameter to \b osTimer shall be consistent but the
-///       macro body is implementation specific in every CMSIS-RTOS.
-#define osTimer(name) \
-&os_timer_def_##name
- 
-/// Create a timer.
-/// \param[in]     timer_def     timer object referenced with \ref osTimer.
-/// \param[in]     type          osTimerOnce for one-shot or osTimerPeriodic for periodic behavior.
-/// \param[in]     argument      argument to the timer call back function.
-/// \return timer ID for reference by other functions or NULL in case of error.
-/// \note MUST REMAIN UNCHANGED: \b osTimerCreate shall be consistent in every CMSIS-RTOS.
-osTimerId osTimerCreate (const osTimerDef_t *timer_def, os_timer_type type, void *argument);
- 
-/// Start or restart a timer.
-/// \param[in]     timer_id      timer ID obtained by \ref osTimerCreate.
-/// \param[in]     millisec      \ref CMSIS_RTOS_TimeOutValue "time delay" value of the timer.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osTimerStart shall be consistent in every CMSIS-RTOS.
-osStatus osTimerStart (osTimerId timer_id, uint32_t millisec);
- 
-/// Stop the timer.
-/// \param[in]     timer_id      timer ID obtained by \ref osTimerCreate.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osTimerStop shall be consistent in every CMSIS-RTOS.
-osStatus osTimerStop (osTimerId timer_id);
- 
-/// Delete a timer that was created by \ref osTimerCreate.
-/// \param[in]     timer_id      timer ID obtained by \ref osTimerCreate.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osTimerDelete shall be consistent in every CMSIS-RTOS.
-osStatus osTimerDelete (osTimerId timer_id);
- 
- 
-//  ==== Signal Management ====
- 
-/// Set the specified Signal Flags of an active thread.
-/// \param[in]     thread_id     thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
-/// \param[in]     signals       specifies the signal flags of the thread that should be set.
-/// \return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.
-/// \note MUST REMAIN UNCHANGED: \b osSignalSet shall be consistent in every CMSIS-RTOS.
-int32_t osSignalSet (osThreadId thread_id, int32_t signals);
- 
-/// Clear the specified Signal Flags of an active thread.
-/// \param[in]     thread_id     thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
-/// \param[in]     signals       specifies the signal flags of the thread that shall be cleared.
-/// \return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters or call from ISR.
-/// \note MUST REMAIN UNCHANGED: \b osSignalClear shall be consistent in every CMSIS-RTOS.
-int32_t osSignalClear (osThreadId thread_id, int32_t signals);
- 
-/// Wait for one or more Signal Flags to become signaled for the current \b RUNNING thread.
-/// \param[in]     signals       wait until all specified signal flags set or 0 for any single signal flag.
-/// \param[in]     millisec      \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.
-/// \return event flag information or error code.
-/// \note MUST REMAIN UNCHANGED: \b osSignalWait shall be consistent in every CMSIS-RTOS.
-osEvent osSignalWait (int32_t signals, uint32_t millisec);
- 
- 
-//  ==== Mutex Management ====
- 
-/// Define a Mutex.
-/// \param         name          name of the mutex object.
-/// \note CAN BE CHANGED: The parameter to \b osMutexDef shall be consistent but the
-///       macro body is implementation specific in every CMSIS-RTOS.
-#if defined (osObjectsExternal)  // object is external
-#define osMutexDef(name)  \
-extern const osMutexDef_t os_mutex_def_##name
-#else                            // define the object
-#define osMutexDef(name)  \
-const osMutexDef_t os_mutex_def_##name = { 0 }
-#endif
- 
-/// Access a Mutex definition.
-/// \param         name          name of the mutex object.
-/// \note CAN BE CHANGED: The parameter to \b osMutex shall be consistent but the
-///       macro body is implementation specific in every CMSIS-RTOS.
-#define osMutex(name)  \
-&os_mutex_def_##name
- 
-/// Create and Initialize a Mutex object.
-/// \param[in]     mutex_def     mutex definition referenced with \ref osMutex.
-/// \return mutex ID for reference by other functions or NULL in case of error.
-/// \note MUST REMAIN UNCHANGED: \b osMutexCreate shall be consistent in every CMSIS-RTOS.
-osMutexId osMutexCreate (const osMutexDef_t *mutex_def);
- 
-/// Wait until a Mutex becomes available.
-/// \param[in]     mutex_id      mutex ID obtained by \ref osMutexCreate.
-/// \param[in]     millisec      \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osMutexWait shall be consistent in every CMSIS-RTOS.
-osStatus osMutexWait (osMutexId mutex_id, uint32_t millisec);
- 
-/// Release a Mutex that was obtained by \ref osMutexWait.
-/// \param[in]     mutex_id      mutex ID obtained by \ref osMutexCreate.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osMutexRelease shall be consistent in every CMSIS-RTOS.
-osStatus osMutexRelease (osMutexId mutex_id);
- 
-/// Delete a Mutex that was created by \ref osMutexCreate.
-/// \param[in]     mutex_id      mutex ID obtained by \ref osMutexCreate.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osMutexDelete shall be consistent in every CMSIS-RTOS.
-osStatus osMutexDelete (osMutexId mutex_id);
- 
- 
-//  ==== Semaphore Management Functions ====
- 
-#if (defined (osFeature_Semaphore)  &&  (osFeature_Semaphore != 0))     // Semaphore available
- 
-/// Define a Semaphore object.
-/// \param         name          name of the semaphore object.
-/// \note CAN BE CHANGED: The parameter to \b osSemaphoreDef shall be consistent but the
-///       macro body is implementation specific in every CMSIS-RTOS.
-#if defined (osObjectsExternal)  // object is external
-#define osSemaphoreDef(name)  \
-extern const osSemaphoreDef_t os_semaphore_def_##name
-#else                            // define the object
-#define osSemaphoreDef(name)  \
-const osSemaphoreDef_t os_semaphore_def_##name = { 0 }
-#endif
- 
-/// Access a Semaphore definition.
-/// \param         name          name of the semaphore object.
-/// \note CAN BE CHANGED: The parameter to \b osSemaphore shall be consistent but the
-///       macro body is implementation specific in every CMSIS-RTOS.
-#define osSemaphore(name)  \
-&os_semaphore_def_##name
- 
-/// Create and Initialize a Semaphore object used for managing resources.
-/// \param[in]     semaphore_def semaphore definition referenced with \ref osSemaphore.
-/// \param[in]     count         number of available resources.
-/// \return semaphore ID for reference by other functions or NULL in case of error.
-/// \note MUST REMAIN UNCHANGED: \b osSemaphoreCreate shall be consistent in every CMSIS-RTOS.
-osSemaphoreId osSemaphoreCreate (const osSemaphoreDef_t *semaphore_def, int32_t count);
- 
-/// Wait until a Semaphore token becomes available.
-/// \param[in]     semaphore_id  semaphore object referenced with \ref osSemaphoreCreate.
-/// \param[in]     millisec      \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.
-/// \return number of available tokens, or -1 in case of incorrect parameters.
-/// \note MUST REMAIN UNCHANGED: \b osSemaphoreWait shall be consistent in every CMSIS-RTOS.
-int32_t osSemaphoreWait (osSemaphoreId semaphore_id, uint32_t millisec);
- 
-/// Release a Semaphore token.
-/// \param[in]     semaphore_id  semaphore object referenced with \ref osSemaphoreCreate.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osSemaphoreRelease shall be consistent in every CMSIS-RTOS.
-osStatus osSemaphoreRelease (osSemaphoreId semaphore_id);
- 
-/// Delete a Semaphore that was created by \ref osSemaphoreCreate.
-/// \param[in]     semaphore_id  semaphore object referenced with \ref osSemaphoreCreate.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osSemaphoreDelete shall be consistent in every CMSIS-RTOS.
-osStatus osSemaphoreDelete (osSemaphoreId semaphore_id);
- 
-#endif     // Semaphore available
- 
- 
-//  ==== Memory Pool Management Functions ====
- 
-#if (defined (osFeature_Pool)  &&  (osFeature_Pool != 0))  // Memory Pool Management available
- 
-/// \brief Define a Memory Pool.
-/// \param         name          name of the memory pool.
-/// \param         no            maximum number of blocks (objects) in the memory pool.
-/// \param         type          data type of a single block (object).
-/// \note CAN BE CHANGED: The parameter to \b osPoolDef shall be consistent but the
-///       macro body is implementation specific in every CMSIS-RTOS.
-#if defined (osObjectsExternal)  // object is external
-#define osPoolDef(name, no, type)   \
-extern const osPoolDef_t os_pool_def_##name
-#else                            // define the object
-#define osPoolDef(name, no, type)   \
-const osPoolDef_t os_pool_def_##name = \
-{ (no), sizeof(type), NULL }
-#endif
- 
-/// \brief Access a Memory Pool definition.
-/// \param         name          name of the memory pool
-/// \note CAN BE CHANGED: The parameter to \b osPool shall be consistent but the
-///       macro body is implementation specific in every CMSIS-RTOS.
-#define osPool(name) \
-&os_pool_def_##name
- 
-/// Create and Initialize a memory pool.
-/// \param[in]     pool_def      memory pool definition referenced with \ref osPool.
-/// \return memory pool ID for reference by other functions or NULL in case of error.
-/// \note MUST REMAIN UNCHANGED: \b osPoolCreate shall be consistent in every CMSIS-RTOS.
-osPoolId osPoolCreate (const osPoolDef_t *pool_def);
- 
-/// Allocate a memory block from a memory pool.
-/// \param[in]     pool_id       memory pool ID obtain referenced with \ref osPoolCreate.
-/// \return address of the allocated memory block or NULL in case of no memory available.
-/// \note MUST REMAIN UNCHANGED: \b osPoolAlloc shall be consistent in every CMSIS-RTOS.
-void *osPoolAlloc (osPoolId pool_id);
- 
-/// Allocate a memory block from a memory pool and set memory block to zero.
-/// \param[in]     pool_id       memory pool ID obtain referenced with \ref osPoolCreate.
-/// \return address of the allocated memory block or NULL in case of no memory available.
-/// \note MUST REMAIN UNCHANGED: \b osPoolCAlloc shall be consistent in every CMSIS-RTOS.
-void *osPoolCAlloc (osPoolId pool_id);
- 
-/// Return an allocated memory block back to a specific memory pool.
-/// \param[in]     pool_id       memory pool ID obtain referenced with \ref osPoolCreate.
-/// \param[in]     block         address of the allocated memory block that is returned to the memory pool.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osPoolFree shall be consistent in every CMSIS-RTOS.
-osStatus osPoolFree (osPoolId pool_id, void *block);
- 
-#endif   // Memory Pool Management available
- 
- 
-//  ==== Message Queue Management Functions ====
- 
-#if (defined (osFeature_MessageQ)  &&  (osFeature_MessageQ != 0))     // Message Queues available
- 
-/// \brief Create a Message Queue Definition.
-/// \param         name          name of the queue.
-/// \param         queue_sz      maximum number of messages in the queue.
-/// \param         type          data type of a single message element (for debugger).
-/// \note CAN BE CHANGED: The parameter to \b osMessageQDef shall be consistent but the
-///       macro body is implementation specific in every CMSIS-RTOS.
-#if defined (osObjectsExternal)  // object is external
-#define osMessageQDef(name, queue_sz, type)   \
-extern const osMessageQDef_t os_messageQ_def_##name
-#else                            // define the object
-#define osMessageQDef(name, queue_sz, type)   \
-const osMessageQDef_t os_messageQ_def_##name = \
-{ (queue_sz), sizeof (type)  }
-#endif
- 
-/// \brief Access a Message Queue Definition.
-/// \param         name          name of the queue
-/// \note CAN BE CHANGED: The parameter to \b osMessageQ shall be consistent but the
-///       macro body is implementation specific in every CMSIS-RTOS.
-#define osMessageQ(name) \
-&os_messageQ_def_##name
- 
-/// Create and Initialize a Message Queue.
-/// \param[in]     queue_def     queue definition referenced with \ref osMessageQ.
-/// \param[in]     thread_id     thread ID (obtained by \ref osThreadCreate or \ref osThreadGetId) or NULL.
-/// \return message queue ID for reference by other functions or NULL in case of error.
-/// \note MUST REMAIN UNCHANGED: \b osMessageCreate shall be consistent in every CMSIS-RTOS.
-osMessageQId osMessageCreate (const osMessageQDef_t *queue_def, osThreadId thread_id);
- 
-/// Put a Message to a Queue.
-/// \param[in]     queue_id      message queue ID obtained with \ref osMessageCreate.
-/// \param[in]     info          message information.
-/// \param[in]     millisec      \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osMessagePut shall be consistent in every CMSIS-RTOS.
-osStatus osMessagePut (osMessageQId queue_id, uint32_t info, uint32_t millisec);
- 
-/// Get a Message or Wait for a Message from a Queue.
-/// \param[in]     queue_id      message queue ID obtained with \ref osMessageCreate.
-/// \param[in]     millisec      \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.
-/// \return event information that includes status code.
-/// \note MUST REMAIN UNCHANGED: \b osMessageGet shall be consistent in every CMSIS-RTOS.
-osEvent osMessageGet (osMessageQId queue_id, uint32_t millisec);
- 
-#endif     // Message Queues available
- 
- 
-//  ==== Mail Queue Management Functions ====
- 
-#if (defined (osFeature_MailQ)  &&  (osFeature_MailQ != 0))     // Mail Queues available
- 
-/// \brief Create a Mail Queue Definition.
-/// \param         name          name of the queue
-/// \param         queue_sz      maximum number of messages in queue
-/// \param         type          data type of a single message element
-/// \note CAN BE CHANGED: The parameter to \b osMailQDef shall be consistent but the
-///       macro body is implementation specific in every CMSIS-RTOS.
-#if defined (osObjectsExternal)  // object is external
-#define osMailQDef(name, queue_sz, type) \
-extern const osMailQDef_t os_mailQ_def_##name
-#else                            // define the object
-#define osMailQDef(name, queue_sz, type) \
-const osMailQDef_t os_mailQ_def_##name =  \
-{ (queue_sz), sizeof (type) }
-#endif
- 
-/// \brief Access a Mail Queue Definition.
-/// \param         name          name of the queue
-/// \note CAN BE CHANGED: The parameter to \b osMailQ shall be consistent but the
-///       macro body is implementation specific in every CMSIS-RTOS.
-#define osMailQ(name)  \
-&os_mailQ_def_##name
- 
-/// Create and Initialize mail queue.
-/// \param[in]     queue_def     reference to the mail queue definition obtain with \ref osMailQ
-/// \param[in]     thread_id     thread ID (obtained by \ref osThreadCreate or \ref osThreadGetId) or NULL.
-/// \return mail queue ID for reference by other functions or NULL in case of error.
-/// \note MUST REMAIN UNCHANGED: \b osMailCreate shall be consistent in every CMSIS-RTOS.
-osMailQId osMailCreate (const osMailQDef_t *queue_def, osThreadId thread_id);
- 
-/// Allocate a memory block from a mail.
-/// \param[in]     queue_id      mail queue ID obtained with \ref osMailCreate.
-/// \param[in]     millisec      \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out
-/// \return pointer to memory block that can be filled with mail or NULL in case of error.
-/// \note MUST REMAIN UNCHANGED: \b osMailAlloc shall be consistent in every CMSIS-RTOS.
-void *osMailAlloc (osMailQId queue_id, uint32_t millisec);
- 
-/// Allocate a memory block from a mail and set memory block to zero.
-/// \param[in]     queue_id      mail queue ID obtained with \ref osMailCreate.
-/// \param[in]     millisec      \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out
-/// \return pointer to memory block that can be filled with mail or NULL in case of error.
-/// \note MUST REMAIN UNCHANGED: \b osMailCAlloc shall be consistent in every CMSIS-RTOS.
-void *osMailCAlloc (osMailQId queue_id, uint32_t millisec);
- 
-/// Put a mail to a queue.
-/// \param[in]     queue_id      mail queue ID obtained with \ref osMailCreate.
-/// \param[in]     mail          memory block previously allocated with \ref osMailAlloc or \ref osMailCAlloc.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osMailPut shall be consistent in every CMSIS-RTOS.
-osStatus osMailPut (osMailQId queue_id, void *mail);
- 
-/// Get a mail from a queue.
-/// \param[in]     queue_id      mail queue ID obtained with \ref osMailCreate.
-/// \param[in]     millisec      \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out
-/// \return event that contains mail information or error code.
-/// \note MUST REMAIN UNCHANGED: \b osMailGet shall be consistent in every CMSIS-RTOS.
-osEvent osMailGet (osMailQId queue_id, uint32_t millisec);
- 
-/// Free a memory block from a mail.
-/// \param[in]     queue_id      mail queue ID obtained with \ref osMailCreate.
-/// \param[in]     mail          pointer to the memory block that was obtained with \ref osMailGet.
-/// \return status code that indicates the execution status of the function.
-/// \note MUST REMAIN UNCHANGED: \b osMailFree shall be consistent in every CMSIS-RTOS.
-osStatus osMailFree (osMailQId queue_id, void *mail);
- 
-#endif  // Mail Queues available
- 
- 
-#ifdef  __cplusplus
-}
-#endif
- 
-#endif  // _CMSIS_OS_H
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
deleted file mode 100755
index 77647df2..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
+++ /dev/null
@@ -1,3215 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32_hal_legacy.h
-  * @author  MCD Application Team
-  * @brief   This file contains aliases definition for the STM32Cube HAL constants 
-  *          macros and functions maintained for legacy purpose.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32_HAL_LEGACY
-#define __STM32_HAL_LEGACY
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define AES_FLAG_RDERR                  CRYP_FLAG_RDERR
-#define AES_FLAG_WRERR                  CRYP_FLAG_WRERR
-#define AES_CLEARFLAG_CCF               CRYP_CLEARFLAG_CCF
-#define AES_CLEARFLAG_RDERR             CRYP_CLEARFLAG_RDERR
-#define AES_CLEARFLAG_WRERR             CRYP_CLEARFLAG_WRERR
-
-/**
-  * @}
-  */
-  
-/** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define ADC_RESOLUTION12b               ADC_RESOLUTION_12B
-#define ADC_RESOLUTION10b               ADC_RESOLUTION_10B
-#define ADC_RESOLUTION8b                ADC_RESOLUTION_8B
-#define ADC_RESOLUTION6b                ADC_RESOLUTION_6B
-#define OVR_DATA_OVERWRITTEN            ADC_OVR_DATA_OVERWRITTEN
-#define OVR_DATA_PRESERVED              ADC_OVR_DATA_PRESERVED
-#define EOC_SINGLE_CONV                 ADC_EOC_SINGLE_CONV
-#define EOC_SEQ_CONV                    ADC_EOC_SEQ_CONV
-#define EOC_SINGLE_SEQ_CONV             ADC_EOC_SINGLE_SEQ_CONV
-#define REGULAR_GROUP                   ADC_REGULAR_GROUP
-#define INJECTED_GROUP                  ADC_INJECTED_GROUP
-#define REGULAR_INJECTED_GROUP          ADC_REGULAR_INJECTED_GROUP
-#define AWD_EVENT                       ADC_AWD_EVENT
-#define AWD1_EVENT                      ADC_AWD1_EVENT
-#define AWD2_EVENT                      ADC_AWD2_EVENT
-#define AWD3_EVENT                      ADC_AWD3_EVENT
-#define OVR_EVENT                       ADC_OVR_EVENT
-#define JQOVF_EVENT                     ADC_JQOVF_EVENT
-#define ALL_CHANNELS                    ADC_ALL_CHANNELS
-#define REGULAR_CHANNELS                ADC_REGULAR_CHANNELS
-#define INJECTED_CHANNELS               ADC_INJECTED_CHANNELS
-#define SYSCFG_FLAG_SENSOR_ADC          ADC_FLAG_SENSOR
-#define SYSCFG_FLAG_VREF_ADC            ADC_FLAG_VREFINT
-#define ADC_CLOCKPRESCALER_PCLK_DIV1    ADC_CLOCK_SYNC_PCLK_DIV1
-#define ADC_CLOCKPRESCALER_PCLK_DIV2    ADC_CLOCK_SYNC_PCLK_DIV2
-#define ADC_CLOCKPRESCALER_PCLK_DIV4    ADC_CLOCK_SYNC_PCLK_DIV4
-#define ADC_CLOCKPRESCALER_PCLK_DIV6    ADC_CLOCK_SYNC_PCLK_DIV6
-#define ADC_CLOCKPRESCALER_PCLK_DIV8    ADC_CLOCK_SYNC_PCLK_DIV8
-#define ADC_EXTERNALTRIG0_T6_TRGO       ADC_EXTERNALTRIGCONV_T6_TRGO 
-#define ADC_EXTERNALTRIG1_T21_CC2       ADC_EXTERNALTRIGCONV_T21_CC2 
-#define ADC_EXTERNALTRIG2_T2_TRGO       ADC_EXTERNALTRIGCONV_T2_TRGO 
-#define ADC_EXTERNALTRIG3_T2_CC4        ADC_EXTERNALTRIGCONV_T2_CC4  
-#define ADC_EXTERNALTRIG4_T22_TRGO      ADC_EXTERNALTRIGCONV_T22_TRGO
-#define ADC_EXTERNALTRIG7_EXT_IT11      ADC_EXTERNALTRIGCONV_EXT_IT11
-#define ADC_CLOCK_ASYNC                 ADC_CLOCK_ASYNC_DIV1
-#define ADC_EXTERNALTRIG_EDGE_NONE      ADC_EXTERNALTRIGCONVEDGE_NONE
-#define ADC_EXTERNALTRIG_EDGE_RISING    ADC_EXTERNALTRIGCONVEDGE_RISING
-#define ADC_EXTERNALTRIG_EDGE_FALLING   ADC_EXTERNALTRIGCONVEDGE_FALLING
-#define ADC_EXTERNALTRIG_EDGE_RISINGFALLING ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING
-#define ADC_SAMPLETIME_2CYCLE_5         ADC_SAMPLETIME_2CYCLES_5
-
-#define HAL_ADC_STATE_BUSY_REG          HAL_ADC_STATE_REG_BUSY
-#define HAL_ADC_STATE_BUSY_INJ          HAL_ADC_STATE_INJ_BUSY
-#define HAL_ADC_STATE_EOC_REG           HAL_ADC_STATE_REG_EOC
-#define HAL_ADC_STATE_EOC_INJ           HAL_ADC_STATE_INJ_EOC
-#define HAL_ADC_STATE_ERROR             HAL_ADC_STATE_ERROR_INTERNAL
-#define HAL_ADC_STATE_BUSY              HAL_ADC_STATE_BUSY_INTERNAL
-#define HAL_ADC_STATE_AWD               HAL_ADC_STATE_AWD1 
-/**
-  * @}
-  */
-  
-/** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose
-  * @{
-  */ 
-  
-#define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG 
-
-/**
-  * @}
-  */   
-   
-/** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define COMP_WINDOWMODE_DISABLED       COMP_WINDOWMODE_DISABLE
-#define COMP_WINDOWMODE_ENABLED        COMP_WINDOWMODE_ENABLE
-#define COMP_EXTI_LINE_COMP1_EVENT     COMP_EXTI_LINE_COMP1
-#define COMP_EXTI_LINE_COMP2_EVENT     COMP_EXTI_LINE_COMP2
-#define COMP_EXTI_LINE_COMP3_EVENT     COMP_EXTI_LINE_COMP3
-#define COMP_EXTI_LINE_COMP4_EVENT     COMP_EXTI_LINE_COMP4
-#define COMP_EXTI_LINE_COMP5_EVENT     COMP_EXTI_LINE_COMP5
-#define COMP_EXTI_LINE_COMP6_EVENT     COMP_EXTI_LINE_COMP6
-#define COMP_EXTI_LINE_COMP7_EVENT     COMP_EXTI_LINE_COMP7
-#if defined(STM32L0)
-#define COMP_LPTIMCONNECTION_ENABLED   ((uint32_t)0x00000003U)    /*!< COMPX output generic naming: connected to LPTIM input 1 for COMP1, LPTIM input 2 for COMP2 */
-#endif
-#define COMP_OUTPUT_COMP6TIM2OCREFCLR  COMP_OUTPUT_COMP6_TIM2OCREFCLR
-#if defined(STM32F373xC) || defined(STM32F378xx)
-#define COMP_OUTPUT_TIM3IC1            COMP_OUTPUT_COMP1_TIM3IC1
-#define COMP_OUTPUT_TIM3OCREFCLR       COMP_OUTPUT_COMP1_TIM3OCREFCLR
-#endif /* STM32F373xC || STM32F378xx */
-
-#if defined(STM32L0) || defined(STM32L4)
-#define COMP_WINDOWMODE_ENABLE         COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON
-
-#define COMP_NONINVERTINGINPUT_IO1      COMP_INPUT_PLUS_IO1
-#define COMP_NONINVERTINGINPUT_IO2      COMP_INPUT_PLUS_IO2
-#define COMP_NONINVERTINGINPUT_IO3      COMP_INPUT_PLUS_IO3
-#define COMP_NONINVERTINGINPUT_IO4      COMP_INPUT_PLUS_IO4
-#define COMP_NONINVERTINGINPUT_IO5      COMP_INPUT_PLUS_IO5
-#define COMP_NONINVERTINGINPUT_IO6      COMP_INPUT_PLUS_IO6
- 
-#define COMP_INVERTINGINPUT_1_4VREFINT  COMP_INPUT_MINUS_1_4VREFINT
-#define COMP_INVERTINGINPUT_1_2VREFINT  COMP_INPUT_MINUS_1_2VREFINT
-#define COMP_INVERTINGINPUT_3_4VREFINT  COMP_INPUT_MINUS_3_4VREFINT
-#define COMP_INVERTINGINPUT_VREFINT     COMP_INPUT_MINUS_VREFINT
-#define COMP_INVERTINGINPUT_DAC1_CH1    COMP_INPUT_MINUS_DAC1_CH1
-#define COMP_INVERTINGINPUT_DAC1_CH2    COMP_INPUT_MINUS_DAC1_CH2
-#define COMP_INVERTINGINPUT_DAC1        COMP_INPUT_MINUS_DAC1_CH1
-#define COMP_INVERTINGINPUT_DAC2        COMP_INPUT_MINUS_DAC1_CH2
-#define COMP_INVERTINGINPUT_IO1         COMP_INPUT_MINUS_IO1
-#if defined(STM32L0)
-/* Issue fixed on STM32L0 COMP driver: only 2 dedicated IO (IO1 and IO2),     */
-/* IO2 was wrongly assigned to IO shared with DAC and IO3 was corresponding   */
-/* to the second dedicated IO (only for COMP2).                               */
-#define COMP_INVERTINGINPUT_IO2         COMP_INPUT_MINUS_DAC1_CH2
-#define COMP_INVERTINGINPUT_IO3         COMP_INPUT_MINUS_IO2
-#else
-#define COMP_INVERTINGINPUT_IO2         COMP_INPUT_MINUS_IO2
-#define COMP_INVERTINGINPUT_IO3         COMP_INPUT_MINUS_IO3
-#endif
-#define COMP_INVERTINGINPUT_IO4         COMP_INPUT_MINUS_IO4
-#define COMP_INVERTINGINPUT_IO5         COMP_INPUT_MINUS_IO5
-
-#define COMP_OUTPUTLEVEL_LOW            COMP_OUTPUT_LEVEL_LOW
-#define COMP_OUTPUTLEVEL_HIGH           COMP_OUTPUT_LEVEL_HIGH
-
-/* Note: Literal "COMP_FLAG_LOCK" kept for legacy purpose.                    */
-/*       To check COMP lock state, use macro "__HAL_COMP_IS_LOCKED()".        */
-#if defined(COMP_CSR_LOCK)
-#define COMP_FLAG_LOCK                 COMP_CSR_LOCK
-#elif defined(COMP_CSR_COMP1LOCK)
-#define COMP_FLAG_LOCK                 COMP_CSR_COMP1LOCK
-#elif defined(COMP_CSR_COMPxLOCK)
-#define COMP_FLAG_LOCK                 COMP_CSR_COMPxLOCK
-#endif
-
-#if defined(STM32L4)
-#define COMP_BLANKINGSRCE_TIM1OC5        COMP_BLANKINGSRC_TIM1_OC5_COMP1
-#define COMP_BLANKINGSRCE_TIM2OC3        COMP_BLANKINGSRC_TIM2_OC3_COMP1
-#define COMP_BLANKINGSRCE_TIM3OC3        COMP_BLANKINGSRC_TIM3_OC3_COMP1
-#define COMP_BLANKINGSRCE_TIM3OC4        COMP_BLANKINGSRC_TIM3_OC4_COMP2
-#define COMP_BLANKINGSRCE_TIM8OC5        COMP_BLANKINGSRC_TIM8_OC5_COMP2
-#define COMP_BLANKINGSRCE_TIM15OC1       COMP_BLANKINGSRC_TIM15_OC1_COMP2
-#define COMP_BLANKINGSRCE_NONE           COMP_BLANKINGSRC_NONE
-#endif
-
-#if defined(STM32L0)
-#define COMP_MODE_HIGHSPEED              COMP_POWERMODE_MEDIUMSPEED
-#define COMP_MODE_LOWSPEED               COMP_POWERMODE_ULTRALOWPOWER
-#else
-#define COMP_MODE_HIGHSPEED              COMP_POWERMODE_HIGHSPEED
-#define COMP_MODE_MEDIUMSPEED            COMP_POWERMODE_MEDIUMSPEED
-#define COMP_MODE_LOWPOWER               COMP_POWERMODE_LOWPOWER
-#define COMP_MODE_ULTRALOWPOWER          COMP_POWERMODE_ULTRALOWPOWER
-#endif
-
-#endif
-/**
-  * @}
-  */
-
-/** @defgroup HAL_CORTEX_Aliased_Defines HAL CORTEX Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define __HAL_CORTEX_SYSTICKCLK_CONFIG HAL_SYSTICK_CLKSourceConfig
-/**
-  * @}
-  */
-
-/** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose
-  * @{
-  */
-  
-#define CRC_OUTPUTDATA_INVERSION_DISABLED    CRC_OUTPUTDATA_INVERSION_DISABLE
-#define CRC_OUTPUTDATA_INVERSION_ENABLED     CRC_OUTPUTDATA_INVERSION_ENABLE
-
-/**
-  * @}
-  */
-
-/** @defgroup HAL_DAC_Aliased_Defines HAL DAC Aliased Defines maintained for legacy purpose
-  * @{
-  */
-
-#define DAC1_CHANNEL_1                                  DAC_CHANNEL_1
-#define DAC1_CHANNEL_2                                  DAC_CHANNEL_2
-#define DAC2_CHANNEL_1                                  DAC_CHANNEL_1
-#define DAC_WAVE_NONE                                   ((uint32_t)0x00000000U)
-#define DAC_WAVE_NOISE                                  ((uint32_t)DAC_CR_WAVE1_0)
-#define DAC_WAVE_TRIANGLE                               ((uint32_t)DAC_CR_WAVE1_1)                           
-#define DAC_WAVEGENERATION_NONE                         DAC_WAVE_NONE
-#define DAC_WAVEGENERATION_NOISE                        DAC_WAVE_NOISE
-#define DAC_WAVEGENERATION_TRIANGLE                     DAC_WAVE_TRIANGLE
-
-/**
-  * @}
-  */
-
-/** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define HAL_REMAPDMA_ADC_DMA_CH2                DMA_REMAP_ADC_DMA_CH2       
-#define HAL_REMAPDMA_USART1_TX_DMA_CH4          DMA_REMAP_USART1_TX_DMA_CH4 
-#define HAL_REMAPDMA_USART1_RX_DMA_CH5          DMA_REMAP_USART1_RX_DMA_CH5   
-#define HAL_REMAPDMA_TIM16_DMA_CH4              DMA_REMAP_TIM16_DMA_CH4       
-#define HAL_REMAPDMA_TIM17_DMA_CH2              DMA_REMAP_TIM17_DMA_CH2       
-#define HAL_REMAPDMA_USART3_DMA_CH32            DMA_REMAP_USART3_DMA_CH32
-#define HAL_REMAPDMA_TIM16_DMA_CH6              DMA_REMAP_TIM16_DMA_CH6
-#define HAL_REMAPDMA_TIM17_DMA_CH7              DMA_REMAP_TIM17_DMA_CH7      
-#define HAL_REMAPDMA_SPI2_DMA_CH67              DMA_REMAP_SPI2_DMA_CH67  
-#define HAL_REMAPDMA_USART2_DMA_CH67            DMA_REMAP_USART2_DMA_CH67 
-#define HAL_REMAPDMA_I2C1_DMA_CH76              DMA_REMAP_I2C1_DMA_CH76   
-#define HAL_REMAPDMA_TIM1_DMA_CH6               DMA_REMAP_TIM1_DMA_CH6     
-#define HAL_REMAPDMA_TIM2_DMA_CH7               DMA_REMAP_TIM2_DMA_CH7      
-#define HAL_REMAPDMA_TIM3_DMA_CH6               DMA_REMAP_TIM3_DMA_CH6    
-  
-#define IS_HAL_REMAPDMA                          IS_DMA_REMAP  
-#define __HAL_REMAPDMA_CHANNEL_ENABLE            __HAL_DMA_REMAP_CHANNEL_ENABLE
-#define __HAL_REMAPDMA_CHANNEL_DISABLE           __HAL_DMA_REMAP_CHANNEL_DISABLE
-  
-  
-  
-/**
-  * @}
-  */
-
-/** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose
-  * @{
-  */
-  
-#define TYPEPROGRAM_BYTE              FLASH_TYPEPROGRAM_BYTE
-#define TYPEPROGRAM_HALFWORD          FLASH_TYPEPROGRAM_HALFWORD
-#define TYPEPROGRAM_WORD              FLASH_TYPEPROGRAM_WORD
-#define TYPEPROGRAM_DOUBLEWORD        FLASH_TYPEPROGRAM_DOUBLEWORD
-#define TYPEERASE_SECTORS             FLASH_TYPEERASE_SECTORS
-#define TYPEERASE_PAGES               FLASH_TYPEERASE_PAGES
-#define TYPEERASE_PAGEERASE           FLASH_TYPEERASE_PAGES
-#define TYPEERASE_MASSERASE           FLASH_TYPEERASE_MASSERASE
-#define WRPSTATE_DISABLE              OB_WRPSTATE_DISABLE
-#define WRPSTATE_ENABLE               OB_WRPSTATE_ENABLE
-#define HAL_FLASH_TIMEOUT_VALUE       FLASH_TIMEOUT_VALUE
-#define OBEX_PCROP                    OPTIONBYTE_PCROP
-#define OBEX_BOOTCONFIG               OPTIONBYTE_BOOTCONFIG
-#define PCROPSTATE_DISABLE            OB_PCROP_STATE_DISABLE
-#define PCROPSTATE_ENABLE             OB_PCROP_STATE_ENABLE
-#define TYPEERASEDATA_BYTE            FLASH_TYPEERASEDATA_BYTE
-#define TYPEERASEDATA_HALFWORD        FLASH_TYPEERASEDATA_HALFWORD
-#define TYPEERASEDATA_WORD            FLASH_TYPEERASEDATA_WORD
-#define TYPEPROGRAMDATA_BYTE          FLASH_TYPEPROGRAMDATA_BYTE
-#define TYPEPROGRAMDATA_HALFWORD      FLASH_TYPEPROGRAMDATA_HALFWORD
-#define TYPEPROGRAMDATA_WORD          FLASH_TYPEPROGRAMDATA_WORD
-#define TYPEPROGRAMDATA_FASTBYTE      FLASH_TYPEPROGRAMDATA_FASTBYTE
-#define TYPEPROGRAMDATA_FASTHALFWORD  FLASH_TYPEPROGRAMDATA_FASTHALFWORD
-#define TYPEPROGRAMDATA_FASTWORD      FLASH_TYPEPROGRAMDATA_FASTWORD
-#define PAGESIZE                      FLASH_PAGE_SIZE
-#define TYPEPROGRAM_FASTBYTE          FLASH_TYPEPROGRAM_BYTE
-#define TYPEPROGRAM_FASTHALFWORD      FLASH_TYPEPROGRAM_HALFWORD
-#define TYPEPROGRAM_FASTWORD          FLASH_TYPEPROGRAM_WORD
-#define VOLTAGE_RANGE_1               FLASH_VOLTAGE_RANGE_1
-#define VOLTAGE_RANGE_2               FLASH_VOLTAGE_RANGE_2
-#define VOLTAGE_RANGE_3               FLASH_VOLTAGE_RANGE_3
-#define VOLTAGE_RANGE_4               FLASH_VOLTAGE_RANGE_4
-#define TYPEPROGRAM_FAST              FLASH_TYPEPROGRAM_FAST
-#define TYPEPROGRAM_FAST_AND_LAST     FLASH_TYPEPROGRAM_FAST_AND_LAST
-#define WRPAREA_BANK1_AREAA           OB_WRPAREA_BANK1_AREAA
-#define WRPAREA_BANK1_AREAB           OB_WRPAREA_BANK1_AREAB
-#define WRPAREA_BANK2_AREAA           OB_WRPAREA_BANK2_AREAA
-#define WRPAREA_BANK2_AREAB           OB_WRPAREA_BANK2_AREAB
-#define IWDG_STDBY_FREEZE             OB_IWDG_STDBY_FREEZE
-#define IWDG_STDBY_ACTIVE             OB_IWDG_STDBY_RUN
-#define IWDG_STOP_FREEZE              OB_IWDG_STOP_FREEZE
-#define IWDG_STOP_ACTIVE              OB_IWDG_STOP_RUN
-#define FLASH_ERROR_NONE              HAL_FLASH_ERROR_NONE
-#define FLASH_ERROR_RD                HAL_FLASH_ERROR_RD
-#define FLASH_ERROR_PG                HAL_FLASH_ERROR_PROG
-#define FLASH_ERROR_PGP               HAL_FLASH_ERROR_PGS
-#define FLASH_ERROR_WRP               HAL_FLASH_ERROR_WRP
-#define FLASH_ERROR_OPTV              HAL_FLASH_ERROR_OPTV
-#define FLASH_ERROR_OPTVUSR           HAL_FLASH_ERROR_OPTVUSR
-#define FLASH_ERROR_PROG              HAL_FLASH_ERROR_PROG
-#define FLASH_ERROR_OP                HAL_FLASH_ERROR_OPERATION
-#define FLASH_ERROR_PGA               HAL_FLASH_ERROR_PGA
-#define FLASH_ERROR_SIZE              HAL_FLASH_ERROR_SIZE
-#define FLASH_ERROR_SIZ               HAL_FLASH_ERROR_SIZE
-#define FLASH_ERROR_PGS               HAL_FLASH_ERROR_PGS
-#define FLASH_ERROR_MIS               HAL_FLASH_ERROR_MIS
-#define FLASH_ERROR_FAST              HAL_FLASH_ERROR_FAST
-#define FLASH_ERROR_FWWERR            HAL_FLASH_ERROR_FWWERR
-#define FLASH_ERROR_NOTZERO           HAL_FLASH_ERROR_NOTZERO
-#define FLASH_ERROR_OPERATION         HAL_FLASH_ERROR_OPERATION
-#define FLASH_ERROR_ERS               HAL_FLASH_ERROR_ERS
-#define OB_WDG_SW                     OB_IWDG_SW
-#define OB_WDG_HW                     OB_IWDG_HW
-#define OB_SDADC12_VDD_MONITOR_SET    OB_SDACD_VDD_MONITOR_SET
-#define OB_SDADC12_VDD_MONITOR_RESET  OB_SDACD_VDD_MONITOR_RESET
-#define OB_RAM_PARITY_CHECK_SET       OB_SRAM_PARITY_SET
-#define OB_RAM_PARITY_CHECK_RESET     OB_SRAM_PARITY_RESET
-#define IS_OB_SDADC12_VDD_MONITOR     IS_OB_SDACD_VDD_MONITOR
-#define OB_RDP_LEVEL0                 OB_RDP_LEVEL_0
-#define OB_RDP_LEVEL1                 OB_RDP_LEVEL_1
-#define OB_RDP_LEVEL2                 OB_RDP_LEVEL_2
-
-/**
-  * @}
-  */
-  
-/** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose
-  * @{
-  */
-  
-#define HAL_SYSCFG_FASTMODEPLUS_I2C_PA9    I2C_FASTMODEPLUS_PA9
-#define HAL_SYSCFG_FASTMODEPLUS_I2C_PA10   I2C_FASTMODEPLUS_PA10
-#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB6    I2C_FASTMODEPLUS_PB6
-#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB7    I2C_FASTMODEPLUS_PB7
-#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB8    I2C_FASTMODEPLUS_PB8
-#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB9    I2C_FASTMODEPLUS_PB9
-#define HAL_SYSCFG_FASTMODEPLUS_I2C1       I2C_FASTMODEPLUS_I2C1
-#define HAL_SYSCFG_FASTMODEPLUS_I2C2       I2C_FASTMODEPLUS_I2C2
-#define HAL_SYSCFG_FASTMODEPLUS_I2C3       I2C_FASTMODEPLUS_I2C3
-/**
-  * @}
-  */
-  
-
-/** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose
-  * @{
-  */
-#if defined(STM32L4) || defined(STM32F7)
-#define FMC_NAND_PCC_WAIT_FEATURE_DISABLE       FMC_NAND_WAIT_FEATURE_DISABLE
-#define FMC_NAND_PCC_WAIT_FEATURE_ENABLE        FMC_NAND_WAIT_FEATURE_ENABLE
-#define FMC_NAND_PCC_MEM_BUS_WIDTH_8            FMC_NAND_MEM_BUS_WIDTH_8
-#define FMC_NAND_PCC_MEM_BUS_WIDTH_16           FMC_NAND_MEM_BUS_WIDTH_16
-#else
-#define FMC_NAND_WAIT_FEATURE_DISABLE           FMC_NAND_PCC_WAIT_FEATURE_DISABLE
-#define FMC_NAND_WAIT_FEATURE_ENABLE            FMC_NAND_PCC_WAIT_FEATURE_ENABLE
-#define FMC_NAND_MEM_BUS_WIDTH_8                FMC_NAND_PCC_MEM_BUS_WIDTH_8
-#define FMC_NAND_MEM_BUS_WIDTH_16               FMC_NAND_PCC_MEM_BUS_WIDTH_16
-#endif
-/**
-  * @}
-  */
-
-/** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose
-  * @{
-  */
-  
-#define FSMC_NORSRAM_TYPEDEF                      FSMC_NORSRAM_TypeDef
-#define FSMC_NORSRAM_EXTENDED_TYPEDEF             FSMC_NORSRAM_EXTENDED_TypeDef
-/**
-  * @}
-  */
-
-/** @defgroup HAL_GPIO_Aliased_Macros HAL GPIO Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#define GET_GPIO_SOURCE                           GPIO_GET_INDEX
-#define GET_GPIO_INDEX                            GPIO_GET_INDEX
-
-#if defined(STM32F4)
-#define GPIO_AF12_SDMMC                           GPIO_AF12_SDIO
-#define GPIO_AF12_SDMMC1                          GPIO_AF12_SDIO
-#endif
-
-#if defined(STM32F7)
-#define GPIO_AF12_SDIO                            GPIO_AF12_SDMMC1
-#define GPIO_AF12_SDMMC                           GPIO_AF12_SDMMC1
-#endif
-
-#if defined(STM32L4)
-#define GPIO_AF12_SDIO                            GPIO_AF12_SDMMC1
-#define GPIO_AF12_SDMMC                           GPIO_AF12_SDMMC1
-#endif
-
-#define GPIO_AF0_LPTIM                            GPIO_AF0_LPTIM1
-#define GPIO_AF1_LPTIM                            GPIO_AF1_LPTIM1
-#define GPIO_AF2_LPTIM                            GPIO_AF2_LPTIM1
-
-#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7)
-#define  GPIO_SPEED_LOW                           GPIO_SPEED_FREQ_LOW     
-#define  GPIO_SPEED_MEDIUM                        GPIO_SPEED_FREQ_MEDIUM     
-#define  GPIO_SPEED_FAST                          GPIO_SPEED_FREQ_HIGH     
-#define  GPIO_SPEED_HIGH                          GPIO_SPEED_FREQ_VERY_HIGH       
-#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 */
-
-#if defined(STM32L1) 
- #define  GPIO_SPEED_VERY_LOW    GPIO_SPEED_FREQ_LOW     
- #define  GPIO_SPEED_LOW         GPIO_SPEED_FREQ_MEDIUM     
- #define  GPIO_SPEED_MEDIUM      GPIO_SPEED_FREQ_HIGH     
- #define  GPIO_SPEED_HIGH        GPIO_SPEED_FREQ_VERY_HIGH     
-#endif /* STM32L1 */
-
-#if defined(STM32F0) || defined(STM32F3) || defined(STM32F1)
- #define  GPIO_SPEED_LOW    GPIO_SPEED_FREQ_LOW
- #define  GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
- #define  GPIO_SPEED_HIGH   GPIO_SPEED_FREQ_HIGH
-#endif /* STM32F0 || STM32F3 || STM32F1 */
-
-#define GPIO_AF6_DFSDM                            GPIO_AF6_DFSDM1
-/**
-  * @}
-  */
-
-/** @defgroup HAL_JPEG_Aliased_Macros HAL JPEG Aliased Macros maintained for legacy purpose
-  * @{
-  */
-  
-#if defined(STM32H7)
- #define __HAL_RCC_JPEG_CLK_ENABLE               __HAL_RCC_JPGDECEN_CLK_ENABLE
- #define __HAL_RCC_JPEG_CLK_DISABLE              __HAL_RCC_JPGDECEN_CLK_DISABLE
- #define __HAL_RCC_JPEG_FORCE_RESET              __HAL_RCC_JPGDECRST_FORCE_RESET
- #define __HAL_RCC_JPEG_RELEASE_RESET            __HAL_RCC_JPGDECRST_RELEASE_RESET
- #define __HAL_RCC_JPEG_CLK_SLEEP_ENABLE         __HAL_RCC_JPGDEC_CLK_SLEEP_ENABLE
- #define __HAL_RCC_JPEG_CLK_SLEEP_DISABLE        __HAL_RCC_JPGDEC_CLK_SLEEP_DISABLE
-
-  #define DMA_REQUEST_DAC1 DMA_REQUEST_DAC1_CH1 
-  #define DMA_REQUEST_DAC2 DMA_REQUEST_DAC1_CH2 
-
- #define BDMA_REQUEST_LP_UART1_RX BDMA_REQUEST_LPUART1_RX
- #define BDMA_REQUEST_LP_UART1_TX BDMA_REQUEST_LPUART1_TX
-
- #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT    HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT
- #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT    HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT
- #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT    HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT
- #define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT         HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT
- #define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT         HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT
- #define HAL_DMAMUX1_REQUEST_GEN_LPTIM3_OUT         HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT
- #define HAL_DMAMUX1_REQUEST_GEN_EXTI0              HAL_DMAMUX1_REQ_GEN_EXTI0
- #define HAL_DMAMUX1_REQUEST_GEN_TIM12_TRGO         HAL_DMAMUX1_REQ_GEN_TIM12_TRGO
-
- #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH0_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT
- #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH1_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT
- #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH2_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT
- #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH3_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT
- #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH4_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT
- #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH5_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT
- #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH6_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT
- #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_WKUP    HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_WKUP    HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_WKUP        HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_OUT         HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT
- #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_WKUP        HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_OUT         HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT
- #define HAL_DMAMUX2_REQUEST_GEN_LPTIM4_WKUP        HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_LPTIM5_WKUP        HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_I2C4_WKUP          HAL_DMAMUX2_REQ_GEN_I2C4_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_SPI6_WKUP          HAL_DMAMUX2_REQ_GEN_SPI6_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_COMP1_OUT          HAL_DMAMUX2_REQ_GEN_COMP1_OUT
- #define HAL_DMAMUX2_REQUEST_GEN_COMP2_OUT          HAL_DMAMUX2_REQ_GEN_COMP2_OUT
- #define HAL_DMAMUX2_REQUEST_GEN_RTC_WKUP           HAL_DMAMUX2_REQ_GEN_RTC_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_EXTI0              HAL_DMAMUX2_REQ_GEN_EXTI0
- #define HAL_DMAMUX2_REQUEST_GEN_EXTI2              HAL_DMAMUX2_REQ_GEN_EXTI2
- #define HAL_DMAMUX2_REQUEST_GEN_I2C4_IT_EVT        HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT
- #define HAL_DMAMUX2_REQUEST_GEN_SPI6_IT            HAL_DMAMUX2_REQ_GEN_SPI6_IT
- #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_IT      HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT
- #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_IT      HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT
- #define HAL_DMAMUX2_REQUEST_GEN_ADC3_IT            HAL_DMAMUX2_REQ_GEN_ADC3_IT
- #define HAL_DMAMUX2_REQUEST_GEN_ADC3_AWD1_OUT      HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT
- #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH0_IT        HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT
- #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH1_IT        HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT
-
- #define HAL_DMAMUX_REQUEST_GEN_NO_EVENT            HAL_DMAMUX_REQ_GEN_NO_EVENT
- #define HAL_DMAMUX_REQUEST_GEN_RISING              HAL_DMAMUX_REQ_GEN_RISING
- #define HAL_DMAMUX_REQUEST_GEN_FALLING             HAL_DMAMUX_REQ_GEN_FALLING
- #define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING      HAL_DMAMUX_REQ_GEN_RISING_FALLING
-
-
-#endif /* STM32H7  */
-  
-  
-/**
-  * @}
-  */ 
-  
-  
-/** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#define HRTIM_TIMDELAYEDPROTECTION_DISABLED           HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED
-#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68  HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6
-#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68  HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_EEV6
-#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68  HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV6
-#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68     HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6
-#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7
-#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7
-#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79  HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7
-#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79     HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7
-   
-#define __HAL_HRTIM_SetCounter        __HAL_HRTIM_SETCOUNTER
-#define __HAL_HRTIM_GetCounter        __HAL_HRTIM_GETCOUNTER
-#define __HAL_HRTIM_SetPeriod         __HAL_HRTIM_SETPERIOD
-#define __HAL_HRTIM_GetPeriod         __HAL_HRTIM_GETPERIOD
-#define __HAL_HRTIM_SetClockPrescaler __HAL_HRTIM_SETCLOCKPRESCALER
-#define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER
-#define __HAL_HRTIM_SetCompare        __HAL_HRTIM_SETCOMPARE
-#define __HAL_HRTIM_GetCompare        __HAL_HRTIM_GETCOMPARE
-/**
-  * @}
-  */
-
-/** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define I2C_DUALADDRESS_DISABLED                I2C_DUALADDRESS_DISABLE
-#define I2C_DUALADDRESS_ENABLED                 I2C_DUALADDRESS_ENABLE
-#define I2C_GENERALCALL_DISABLED                I2C_GENERALCALL_DISABLE
-#define I2C_GENERALCALL_ENABLED                 I2C_GENERALCALL_ENABLE
-#define I2C_NOSTRETCH_DISABLED                  I2C_NOSTRETCH_DISABLE
-#define I2C_NOSTRETCH_ENABLED                   I2C_NOSTRETCH_ENABLE
-#define I2C_ANALOGFILTER_ENABLED                I2C_ANALOGFILTER_ENABLE
-#define I2C_ANALOGFILTER_DISABLED               I2C_ANALOGFILTER_DISABLE
-#if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32G0) || defined(STM32L4) || defined(STM32L1) || defined(STM32F7)
-#define HAL_I2C_STATE_MEM_BUSY_TX               HAL_I2C_STATE_BUSY_TX
-#define HAL_I2C_STATE_MEM_BUSY_RX               HAL_I2C_STATE_BUSY_RX
-#define HAL_I2C_STATE_MASTER_BUSY_TX            HAL_I2C_STATE_BUSY_TX
-#define HAL_I2C_STATE_MASTER_BUSY_RX            HAL_I2C_STATE_BUSY_RX
-#define HAL_I2C_STATE_SLAVE_BUSY_TX             HAL_I2C_STATE_BUSY_TX
-#define HAL_I2C_STATE_SLAVE_BUSY_RX             HAL_I2C_STATE_BUSY_RX
-#endif
-/**
-  * @}
-  */
-
-/** @defgroup HAL_IRDA_Aliased_Defines HAL IRDA Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define IRDA_ONE_BIT_SAMPLE_DISABLED            IRDA_ONE_BIT_SAMPLE_DISABLE
-#define IRDA_ONE_BIT_SAMPLE_ENABLED             IRDA_ONE_BIT_SAMPLE_ENABLE
-
-/**
-  * @}
-  */
-
-/** @defgroup HAL_IWDG_Aliased_Defines HAL IWDG Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define KR_KEY_RELOAD                   IWDG_KEY_RELOAD
-#define KR_KEY_ENABLE                   IWDG_KEY_ENABLE
-#define KR_KEY_EWA                      IWDG_KEY_WRITE_ACCESS_ENABLE
-#define KR_KEY_DWA                      IWDG_KEY_WRITE_ACCESS_DISABLE
-/**
-  * @}
-  */
-
-/** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose
-  * @{
-  */
-
-#define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION
-#define LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS     LPTIM_CLOCKSAMPLETIME_2TRANSITIONS
-#define LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS     LPTIM_CLOCKSAMPLETIME_4TRANSITIONS
-#define LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS     LPTIM_CLOCKSAMPLETIME_8TRANSITIONS
-
-#define LPTIM_CLOCKPOLARITY_RISINGEDGE          LPTIM_CLOCKPOLARITY_RISING
-#define LPTIM_CLOCKPOLARITY_FALLINGEDGE         LPTIM_CLOCKPOLARITY_FALLING
-#define LPTIM_CLOCKPOLARITY_BOTHEDGES           LPTIM_CLOCKPOLARITY_RISING_FALLING
-
-#define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION  LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION
-#define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS      LPTIM_TRIGSAMPLETIME_2TRANSITIONS
-#define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS      LPTIM_TRIGSAMPLETIME_4TRANSITIONS
-#define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS      LPTIM_TRIGSAMPLETIME_8TRANSITIONS        
-
-/* The following 3 definition have also been present in a temporary version of lptim.h */
-/* They need to be renamed also to the right name, just in case */
-#define LPTIM_TRIGSAMPLETIME_2TRANSITION        LPTIM_TRIGSAMPLETIME_2TRANSITIONS
-#define LPTIM_TRIGSAMPLETIME_4TRANSITION        LPTIM_TRIGSAMPLETIME_4TRANSITIONS
-#define LPTIM_TRIGSAMPLETIME_8TRANSITION        LPTIM_TRIGSAMPLETIME_8TRANSITIONS
-
-/**
-  * @}
-  */
-
-/** @defgroup HAL_NAND_Aliased_Defines HAL NAND Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define HAL_NAND_Read_Page              HAL_NAND_Read_Page_8b
-#define HAL_NAND_Write_Page             HAL_NAND_Write_Page_8b
-#define HAL_NAND_Read_SpareArea         HAL_NAND_Read_SpareArea_8b
-#define HAL_NAND_Write_SpareArea        HAL_NAND_Write_SpareArea_8b
-
-#define NAND_AddressTypedef             NAND_AddressTypeDef
-
-#define __ARRAY_ADDRESS                 ARRAY_ADDRESS
-#define __ADDR_1st_CYCLE                ADDR_1ST_CYCLE
-#define __ADDR_2nd_CYCLE                ADDR_2ND_CYCLE
-#define __ADDR_3rd_CYCLE                ADDR_3RD_CYCLE
-#define __ADDR_4th_CYCLE                ADDR_4TH_CYCLE
-/**
-  * @}
-  */
-   
-/** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define NOR_StatusTypedef              HAL_NOR_StatusTypeDef
-#define NOR_SUCCESS                    HAL_NOR_STATUS_SUCCESS
-#define NOR_ONGOING                    HAL_NOR_STATUS_ONGOING
-#define NOR_ERROR                      HAL_NOR_STATUS_ERROR
-#define NOR_TIMEOUT                    HAL_NOR_STATUS_TIMEOUT
-
-#define __NOR_WRITE                    NOR_WRITE
-#define __NOR_ADDR_SHIFT               NOR_ADDR_SHIFT
-/**
-  * @}
-  */
-
-/** @defgroup HAL_OPAMP_Aliased_Defines HAL OPAMP Aliased Defines maintained for legacy purpose
-  * @{
-  */
-
-#define OPAMP_NONINVERTINGINPUT_VP0           OPAMP_NONINVERTINGINPUT_IO0
-#define OPAMP_NONINVERTINGINPUT_VP1           OPAMP_NONINVERTINGINPUT_IO1
-#define OPAMP_NONINVERTINGINPUT_VP2           OPAMP_NONINVERTINGINPUT_IO2
-#define OPAMP_NONINVERTINGINPUT_VP3           OPAMP_NONINVERTINGINPUT_IO3
-                                              
-#define OPAMP_SEC_NONINVERTINGINPUT_VP0       OPAMP_SEC_NONINVERTINGINPUT_IO0
-#define OPAMP_SEC_NONINVERTINGINPUT_VP1       OPAMP_SEC_NONINVERTINGINPUT_IO1
-#define OPAMP_SEC_NONINVERTINGINPUT_VP2       OPAMP_SEC_NONINVERTINGINPUT_IO2
-#define OPAMP_SEC_NONINVERTINGINPUT_VP3       OPAMP_SEC_NONINVERTINGINPUT_IO3   
-
-#define OPAMP_INVERTINGINPUT_VM0              OPAMP_INVERTINGINPUT_IO0
-#define OPAMP_INVERTINGINPUT_VM1              OPAMP_INVERTINGINPUT_IO1
-
-#define IOPAMP_INVERTINGINPUT_VM0             OPAMP_INVERTINGINPUT_IO0
-#define IOPAMP_INVERTINGINPUT_VM1             OPAMP_INVERTINGINPUT_IO1
-
-#define OPAMP_SEC_INVERTINGINPUT_VM0          OPAMP_SEC_INVERTINGINPUT_IO0
-#define OPAMP_SEC_INVERTINGINPUT_VM1          OPAMP_SEC_INVERTINGINPUT_IO1    
-
-#define OPAMP_INVERTINGINPUT_VINM             OPAMP_SEC_INVERTINGINPUT_IO1
-                                                                      
-#define OPAMP_PGACONNECT_NO                   OPAMP_PGA_CONNECT_INVERTINGINPUT_NO             
-#define OPAMP_PGACONNECT_VM0                  OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0            
-#define OPAMP_PGACONNECT_VM1                  OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1          
-                                                        
-/**
-  * @}
-  */
-
-/** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define I2S_STANDARD_PHILLIPS      I2S_STANDARD_PHILIPS
-#if defined(STM32F7) 
-  #define I2S_CLOCK_SYSCLK           I2S_CLOCK_PLL
-#endif
-/**
-  * @}
-  */
-
-/** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose
-  * @{
-  */
-
-/* Compact Flash-ATA registers description */
-#define CF_DATA                       ATA_DATA                
-#define CF_SECTOR_COUNT               ATA_SECTOR_COUNT        
-#define CF_SECTOR_NUMBER              ATA_SECTOR_NUMBER       
-#define CF_CYLINDER_LOW               ATA_CYLINDER_LOW        
-#define CF_CYLINDER_HIGH              ATA_CYLINDER_HIGH       
-#define CF_CARD_HEAD                  ATA_CARD_HEAD           
-#define CF_STATUS_CMD                 ATA_STATUS_CMD          
-#define CF_STATUS_CMD_ALTERNATE       ATA_STATUS_CMD_ALTERNATE
-#define CF_COMMON_DATA_AREA           ATA_COMMON_DATA_AREA    
-
-/* Compact Flash-ATA commands */
-#define CF_READ_SECTOR_CMD            ATA_READ_SECTOR_CMD 
-#define CF_WRITE_SECTOR_CMD           ATA_WRITE_SECTOR_CMD
-#define CF_ERASE_SECTOR_CMD           ATA_ERASE_SECTOR_CMD
-#define CF_IDENTIFY_CMD               ATA_IDENTIFY_CMD
-
-#define PCCARD_StatusTypedef          HAL_PCCARD_StatusTypeDef
-#define PCCARD_SUCCESS                HAL_PCCARD_STATUS_SUCCESS
-#define PCCARD_ONGOING                HAL_PCCARD_STATUS_ONGOING
-#define PCCARD_ERROR                  HAL_PCCARD_STATUS_ERROR
-#define PCCARD_TIMEOUT                HAL_PCCARD_STATUS_TIMEOUT
-/**
-  * @}
-  */
-  
-/** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose
-  * @{
-  */
-  
-#define FORMAT_BIN                  RTC_FORMAT_BIN
-#define FORMAT_BCD                  RTC_FORMAT_BCD
-
-#define RTC_ALARMSUBSECONDMASK_None     RTC_ALARMSUBSECONDMASK_NONE
-#define RTC_TAMPERERASEBACKUP_DISABLED  RTC_TAMPER_ERASE_BACKUP_DISABLE
-#define RTC_TAMPERMASK_FLAG_DISABLED    RTC_TAMPERMASK_FLAG_DISABLE
-#define RTC_TAMPERMASK_FLAG_ENABLED     RTC_TAMPERMASK_FLAG_ENABLE
-
-#define RTC_MASKTAMPERFLAG_DISABLED     RTC_TAMPERMASK_FLAG_DISABLE 
-#define RTC_MASKTAMPERFLAG_ENABLED      RTC_TAMPERMASK_FLAG_ENABLE 
-#define RTC_TAMPERERASEBACKUP_ENABLED   RTC_TAMPER_ERASE_BACKUP_ENABLE
-#define RTC_TAMPER1_2_INTERRUPT         RTC_ALL_TAMPER_INTERRUPT 
-#define RTC_TAMPER1_2_3_INTERRUPT       RTC_ALL_TAMPER_INTERRUPT 
-
-#define RTC_TIMESTAMPPIN_PC13  RTC_TIMESTAMPPIN_DEFAULT
-#define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1 
-#define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1
-#define RTC_TIMESTAMPPIN_PC1   RTC_TIMESTAMPPIN_POS2
-
-#define RTC_OUTPUT_REMAP_PC13  RTC_OUTPUT_REMAP_NONE
-#define RTC_OUTPUT_REMAP_PB14  RTC_OUTPUT_REMAP_POS1
-#define RTC_OUTPUT_REMAP_PB2   RTC_OUTPUT_REMAP_POS1
-
-#define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT 
-#define RTC_TAMPERPIN_PA0  RTC_TAMPERPIN_POS1 
-#define RTC_TAMPERPIN_PI8  RTC_TAMPERPIN_POS1
-
-/**
-  * @}
-  */
-
-  
-/** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define SMARTCARD_NACK_ENABLED                  SMARTCARD_NACK_ENABLE
-#define SMARTCARD_NACK_DISABLED                 SMARTCARD_NACK_DISABLE
-
-#define SMARTCARD_ONEBIT_SAMPLING_DISABLED      SMARTCARD_ONE_BIT_SAMPLE_DISABLE
-#define SMARTCARD_ONEBIT_SAMPLING_ENABLED       SMARTCARD_ONE_BIT_SAMPLE_ENABLE
-#define SMARTCARD_ONEBIT_SAMPLING_DISABLE       SMARTCARD_ONE_BIT_SAMPLE_DISABLE
-#define SMARTCARD_ONEBIT_SAMPLING_ENABLE        SMARTCARD_ONE_BIT_SAMPLE_ENABLE
-
-#define SMARTCARD_TIMEOUT_DISABLED              SMARTCARD_TIMEOUT_DISABLE
-#define SMARTCARD_TIMEOUT_ENABLED               SMARTCARD_TIMEOUT_ENABLE
-
-#define SMARTCARD_LASTBIT_DISABLED              SMARTCARD_LASTBIT_DISABLE
-#define SMARTCARD_LASTBIT_ENABLED               SMARTCARD_LASTBIT_ENABLE
-/**
-  * @}
-  */
-
-  
-/** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define SMBUS_DUALADDRESS_DISABLED      SMBUS_DUALADDRESS_DISABLE
-#define SMBUS_DUALADDRESS_ENABLED       SMBUS_DUALADDRESS_ENABLE
-#define SMBUS_GENERALCALL_DISABLED      SMBUS_GENERALCALL_DISABLE
-#define SMBUS_GENERALCALL_ENABLED       SMBUS_GENERALCALL_ENABLE
-#define SMBUS_NOSTRETCH_DISABLED        SMBUS_NOSTRETCH_DISABLE
-#define SMBUS_NOSTRETCH_ENABLED         SMBUS_NOSTRETCH_ENABLE
-#define SMBUS_ANALOGFILTER_ENABLED      SMBUS_ANALOGFILTER_ENABLE
-#define SMBUS_ANALOGFILTER_DISABLED     SMBUS_ANALOGFILTER_DISABLE
-#define SMBUS_PEC_DISABLED              SMBUS_PEC_DISABLE
-#define SMBUS_PEC_ENABLED               SMBUS_PEC_ENABLE
-#define HAL_SMBUS_STATE_SLAVE_LISTEN    HAL_SMBUS_STATE_LISTEN
-/**
-  * @}
-  */
-  
-/** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define SPI_TIMODE_DISABLED             SPI_TIMODE_DISABLE
-#define SPI_TIMODE_ENABLED              SPI_TIMODE_ENABLE
-
-#define SPI_CRCCALCULATION_DISABLED     SPI_CRCCALCULATION_DISABLE
-#define SPI_CRCCALCULATION_ENABLED      SPI_CRCCALCULATION_ENABLE
-
-#define SPI_NSS_PULSE_DISABLED          SPI_NSS_PULSE_DISABLE
-#define SPI_NSS_PULSE_ENABLED           SPI_NSS_PULSE_ENABLE
-
-/**
-  * @}
-  */
-  
-/** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define CCER_CCxE_MASK                   TIM_CCER_CCxE_MASK
-#define CCER_CCxNE_MASK                  TIM_CCER_CCxNE_MASK
-  
-#define TIM_DMABase_CR1                  TIM_DMABASE_CR1
-#define TIM_DMABase_CR2                  TIM_DMABASE_CR2
-#define TIM_DMABase_SMCR                 TIM_DMABASE_SMCR
-#define TIM_DMABase_DIER                 TIM_DMABASE_DIER
-#define TIM_DMABase_SR                   TIM_DMABASE_SR
-#define TIM_DMABase_EGR                  TIM_DMABASE_EGR
-#define TIM_DMABase_CCMR1                TIM_DMABASE_CCMR1
-#define TIM_DMABase_CCMR2                TIM_DMABASE_CCMR2
-#define TIM_DMABase_CCER                 TIM_DMABASE_CCER
-#define TIM_DMABase_CNT                  TIM_DMABASE_CNT
-#define TIM_DMABase_PSC                  TIM_DMABASE_PSC
-#define TIM_DMABase_ARR                  TIM_DMABASE_ARR
-#define TIM_DMABase_RCR                  TIM_DMABASE_RCR
-#define TIM_DMABase_CCR1                 TIM_DMABASE_CCR1
-#define TIM_DMABase_CCR2                 TIM_DMABASE_CCR2
-#define TIM_DMABase_CCR3                 TIM_DMABASE_CCR3
-#define TIM_DMABase_CCR4                 TIM_DMABASE_CCR4
-#define TIM_DMABase_BDTR                 TIM_DMABASE_BDTR
-#define TIM_DMABase_DCR                  TIM_DMABASE_DCR
-#define TIM_DMABase_DMAR                 TIM_DMABASE_DMAR
-#define TIM_DMABase_OR1                  TIM_DMABASE_OR1
-#define TIM_DMABase_CCMR3                TIM_DMABASE_CCMR3
-#define TIM_DMABase_CCR5                 TIM_DMABASE_CCR5
-#define TIM_DMABase_CCR6                 TIM_DMABASE_CCR6
-#define TIM_DMABase_OR2                  TIM_DMABASE_OR2
-#define TIM_DMABase_OR3                  TIM_DMABASE_OR3
-#define TIM_DMABase_OR                   TIM_DMABASE_OR
-
-#define TIM_EventSource_Update           TIM_EVENTSOURCE_UPDATE
-#define TIM_EventSource_CC1              TIM_EVENTSOURCE_CC1
-#define TIM_EventSource_CC2              TIM_EVENTSOURCE_CC2
-#define TIM_EventSource_CC3              TIM_EVENTSOURCE_CC3
-#define TIM_EventSource_CC4              TIM_EVENTSOURCE_CC4
-#define TIM_EventSource_COM              TIM_EVENTSOURCE_COM
-#define TIM_EventSource_Trigger          TIM_EVENTSOURCE_TRIGGER
-#define TIM_EventSource_Break            TIM_EVENTSOURCE_BREAK
-#define TIM_EventSource_Break2           TIM_EVENTSOURCE_BREAK2
-
-#define TIM_DMABurstLength_1Transfer     TIM_DMABURSTLENGTH_1TRANSFER
-#define TIM_DMABurstLength_2Transfers    TIM_DMABURSTLENGTH_2TRANSFERS
-#define TIM_DMABurstLength_3Transfers    TIM_DMABURSTLENGTH_3TRANSFERS
-#define TIM_DMABurstLength_4Transfers    TIM_DMABURSTLENGTH_4TRANSFERS
-#define TIM_DMABurstLength_5Transfers    TIM_DMABURSTLENGTH_5TRANSFERS
-#define TIM_DMABurstLength_6Transfers    TIM_DMABURSTLENGTH_6TRANSFERS
-#define TIM_DMABurstLength_7Transfers    TIM_DMABURSTLENGTH_7TRANSFERS
-#define TIM_DMABurstLength_8Transfers    TIM_DMABURSTLENGTH_8TRANSFERS
-#define TIM_DMABurstLength_9Transfers    TIM_DMABURSTLENGTH_9TRANSFERS
-#define TIM_DMABurstLength_10Transfers   TIM_DMABURSTLENGTH_10TRANSFERS
-#define TIM_DMABurstLength_11Transfers   TIM_DMABURSTLENGTH_11TRANSFERS
-#define TIM_DMABurstLength_12Transfers   TIM_DMABURSTLENGTH_12TRANSFERS
-#define TIM_DMABurstLength_13Transfers   TIM_DMABURSTLENGTH_13TRANSFERS
-#define TIM_DMABurstLength_14Transfers   TIM_DMABURSTLENGTH_14TRANSFERS
-#define TIM_DMABurstLength_15Transfers   TIM_DMABURSTLENGTH_15TRANSFERS
-#define TIM_DMABurstLength_16Transfers   TIM_DMABURSTLENGTH_16TRANSFERS
-#define TIM_DMABurstLength_17Transfers   TIM_DMABURSTLENGTH_17TRANSFERS
-#define TIM_DMABurstLength_18Transfers   TIM_DMABURSTLENGTH_18TRANSFERS
-
-/**
-  * @}
-  */
-
-/** @defgroup HAL_TSC_Aliased_Defines HAL TSC Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define TSC_SYNC_POL_FALL        TSC_SYNC_POLARITY_FALLING
-#define TSC_SYNC_POL_RISE_HIGH   TSC_SYNC_POLARITY_RISING
-/**
-  * @}
-  */
-
-/** @defgroup HAL_UART_Aliased_Defines HAL UART Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define UART_ONEBIT_SAMPLING_DISABLED   UART_ONE_BIT_SAMPLE_DISABLE
-#define UART_ONEBIT_SAMPLING_ENABLED    UART_ONE_BIT_SAMPLE_ENABLE
-#define UART_ONE_BIT_SAMPLE_DISABLED    UART_ONE_BIT_SAMPLE_DISABLE
-#define UART_ONE_BIT_SAMPLE_ENABLED     UART_ONE_BIT_SAMPLE_ENABLE
-
-#define __HAL_UART_ONEBIT_ENABLE        __HAL_UART_ONE_BIT_SAMPLE_ENABLE
-#define __HAL_UART_ONEBIT_DISABLE       __HAL_UART_ONE_BIT_SAMPLE_DISABLE
-
-#define __DIV_SAMPLING16                UART_DIV_SAMPLING16
-#define __DIVMANT_SAMPLING16            UART_DIVMANT_SAMPLING16
-#define __DIVFRAQ_SAMPLING16            UART_DIVFRAQ_SAMPLING16
-#define __UART_BRR_SAMPLING16           UART_BRR_SAMPLING16
-
-#define __DIV_SAMPLING8                 UART_DIV_SAMPLING8
-#define __DIVMANT_SAMPLING8             UART_DIVMANT_SAMPLING8
-#define __DIVFRAQ_SAMPLING8             UART_DIVFRAQ_SAMPLING8
-#define __UART_BRR_SAMPLING8            UART_BRR_SAMPLING8
-
-#define __DIV_LPUART                    UART_DIV_LPUART
-
-#define UART_WAKEUPMETHODE_IDLELINE     UART_WAKEUPMETHOD_IDLELINE
-#define UART_WAKEUPMETHODE_ADDRESSMARK  UART_WAKEUPMETHOD_ADDRESSMARK
-
-/**
-  * @}
-  */
-
-  
-/** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose
-  * @{
-  */
-
-#define USART_CLOCK_DISABLED            USART_CLOCK_DISABLE
-#define USART_CLOCK_ENABLED             USART_CLOCK_ENABLE
-
-#define USARTNACK_ENABLED               USART_NACK_ENABLE
-#define USARTNACK_DISABLED              USART_NACK_DISABLE
-/**
-  * @}
-  */
-
-/** @defgroup HAL_WWDG_Aliased_Defines HAL WWDG Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define CFR_BASE                    WWDG_CFR_BASE
-
-/**
-  * @}
-  */
-
-/** @defgroup HAL_CAN_Aliased_Defines HAL CAN Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define CAN_FilterFIFO0             CAN_FILTER_FIFO0
-#define CAN_FilterFIFO1             CAN_FILTER_FIFO1
-#define CAN_IT_RQCP0                CAN_IT_TME
-#define CAN_IT_RQCP1                CAN_IT_TME
-#define CAN_IT_RQCP2                CAN_IT_TME
-#define INAK_TIMEOUT                CAN_TIMEOUT_VALUE
-#define SLAK_TIMEOUT                CAN_TIMEOUT_VALUE
-#define CAN_TXSTATUS_FAILED         ((uint8_t)0x00U)
-#define CAN_TXSTATUS_OK             ((uint8_t)0x01U)
-#define CAN_TXSTATUS_PENDING        ((uint8_t)0x02U)
-
-/**
-  * @}
-  */
-  
-/** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose
-  * @{
-  */
-
-#define VLAN_TAG                ETH_VLAN_TAG
-#define MIN_ETH_PAYLOAD         ETH_MIN_ETH_PAYLOAD
-#define MAX_ETH_PAYLOAD         ETH_MAX_ETH_PAYLOAD
-#define JUMBO_FRAME_PAYLOAD     ETH_JUMBO_FRAME_PAYLOAD
-#define MACMIIAR_CR_MASK        ETH_MACMIIAR_CR_MASK
-#define MACCR_CLEAR_MASK        ETH_MACCR_CLEAR_MASK
-#define MACFCR_CLEAR_MASK       ETH_MACFCR_CLEAR_MASK
-#define DMAOMR_CLEAR_MASK       ETH_DMAOMR_CLEAR_MASK
-
-#define ETH_MMCCR              ((uint32_t)0x00000100U)  
-#define ETH_MMCRIR             ((uint32_t)0x00000104U)  
-#define ETH_MMCTIR             ((uint32_t)0x00000108U)  
-#define ETH_MMCRIMR            ((uint32_t)0x0000010CU)  
-#define ETH_MMCTIMR            ((uint32_t)0x00000110U)  
-#define ETH_MMCTGFSCCR         ((uint32_t)0x0000014CU)  
-#define ETH_MMCTGFMSCCR        ((uint32_t)0x00000150U)  
-#define ETH_MMCTGFCR           ((uint32_t)0x00000168U)  
-#define ETH_MMCRFCECR          ((uint32_t)0x00000194U)  
-#define ETH_MMCRFAECR          ((uint32_t)0x00000198U)  
-#define ETH_MMCRGUFCR          ((uint32_t)0x000001C4U)
- 
-#define ETH_MAC_TXFIFO_FULL          ((uint32_t)0x02000000)  /* Tx FIFO full */
-#define ETH_MAC_TXFIFONOT_EMPTY      ((uint32_t)0x01000000)  /* Tx FIFO not empty */
-#define ETH_MAC_TXFIFO_WRITE_ACTIVE  ((uint32_t)0x00400000)  /* Tx FIFO write active */
-#define ETH_MAC_TXFIFO_IDLE     ((uint32_t)0x00000000)  /* Tx FIFO read status: Idle */
-#define ETH_MAC_TXFIFO_READ     ((uint32_t)0x00100000)  /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */
-#define ETH_MAC_TXFIFO_WAITING  ((uint32_t)0x00200000)  /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */
-#define ETH_MAC_TXFIFO_WRITING  ((uint32_t)0x00300000)  /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */
-#define ETH_MAC_TRANSMISSION_PAUSE     ((uint32_t)0x00080000)  /* MAC transmitter in pause */
-#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE            ((uint32_t)0x00000000)  /* MAC transmit frame controller: Idle */
-#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING         ((uint32_t)0x00020000)  /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */
-#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF   ((uint32_t)0x00040000)  /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */
-#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING    ((uint32_t)0x00060000)  /* MAC transmit frame controller: Transferring input frame for transmission */
-#define ETH_MAC_MII_TRANSMIT_ACTIVE      ((uint32_t)0x00010000)  /* MAC MII transmit engine active */
-#define ETH_MAC_RXFIFO_EMPTY             ((uint32_t)0x00000000)  /* Rx FIFO fill level: empty */
-#define ETH_MAC_RXFIFO_BELOW_THRESHOLD   ((uint32_t)0x00000100)  /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
-#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD   ((uint32_t)0x00000200)  /* Rx FIFO fill level: fill-level above flow-control activate threshold */
-#define ETH_MAC_RXFIFO_FULL              ((uint32_t)0x00000300)  /* Rx FIFO fill level: full */
-#if defined(STM32F1)
-#else
-#define ETH_MAC_READCONTROLLER_IDLE               ((uint32_t)0x00000000)  /* Rx FIFO read controller IDLE state */
-#define ETH_MAC_READCONTROLLER_READING_DATA       ((uint32_t)0x00000020)  /* Rx FIFO read controller Reading frame data */
-#define ETH_MAC_READCONTROLLER_READING_STATUS     ((uint32_t)0x00000040)  /* Rx FIFO read controller Reading frame status (or time-stamp) */
-#endif
-#define ETH_MAC_READCONTROLLER_FLUSHING           ((uint32_t)0x00000060)  /* Rx FIFO read controller Flushing the frame data and status */
-#define ETH_MAC_RXFIFO_WRITE_ACTIVE     ((uint32_t)0x00000010)  /* Rx FIFO write controller active */
-#define ETH_MAC_SMALL_FIFO_NOTACTIVE    ((uint32_t)0x00000000)  /* MAC small FIFO read / write controllers not active */
-#define ETH_MAC_SMALL_FIFO_READ_ACTIVE  ((uint32_t)0x00000002)  /* MAC small FIFO read controller active */
-#define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE ((uint32_t)0x00000004)  /* MAC small FIFO write controller active */
-#define ETH_MAC_SMALL_FIFO_RW_ACTIVE    ((uint32_t)0x00000006)  /* MAC small FIFO read / write controllers active */
-#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE   ((uint32_t)0x00000001)  /* MAC MII receive protocol engine active */
-
-/**
-  * @}
-  */
-  
-/** @defgroup HAL_DCMI_Aliased_Defines HAL DCMI Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define HAL_DCMI_ERROR_OVF      HAL_DCMI_ERROR_OVR
-#define DCMI_IT_OVF             DCMI_IT_OVR
-#define DCMI_FLAG_OVFRI         DCMI_FLAG_OVRRI
-#define DCMI_FLAG_OVFMI         DCMI_FLAG_OVRMI
-
-#define HAL_DCMI_ConfigCROP     HAL_DCMI_ConfigCrop
-#define HAL_DCMI_EnableCROP     HAL_DCMI_EnableCrop
-#define HAL_DCMI_DisableCROP    HAL_DCMI_DisableCrop
-
-/**
-  * @}
-  */  
-  
-#if defined(STM32L4xx) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) ||\
-    defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-/** @defgroup HAL_DMA2D_Aliased_Defines HAL DMA2D Aliased Defines maintained for legacy purpose
-  * @{
-  */
-#define DMA2D_ARGB8888          DMA2D_OUTPUT_ARGB8888
-#define DMA2D_RGB888            DMA2D_OUTPUT_RGB888  
-#define DMA2D_RGB565            DMA2D_OUTPUT_RGB565  
-#define DMA2D_ARGB1555          DMA2D_OUTPUT_ARGB1555
-#define DMA2D_ARGB4444          DMA2D_OUTPUT_ARGB4444
-
-#define CM_ARGB8888             DMA2D_INPUT_ARGB8888
-#define CM_RGB888               DMA2D_INPUT_RGB888  
-#define CM_RGB565               DMA2D_INPUT_RGB565  
-#define CM_ARGB1555             DMA2D_INPUT_ARGB1555
-#define CM_ARGB4444             DMA2D_INPUT_ARGB4444
-#define CM_L8                   DMA2D_INPUT_L8      
-#define CM_AL44                 DMA2D_INPUT_AL44    
-#define CM_AL88                 DMA2D_INPUT_AL88    
-#define CM_L4                   DMA2D_INPUT_L4      
-#define CM_A8                   DMA2D_INPUT_A8      
-#define CM_A4                   DMA2D_INPUT_A4      
-/**
-  * @}
-  */    
-#endif  /* STM32L4xx ||  STM32F7*/
-
-/** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
-  * @{
-  */
-  
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup HAL_CRYP_Aliased_Functions HAL CRYP Aliased Functions maintained for legacy purpose
-  * @{
-  */
-#define HAL_CRYP_ComputationCpltCallback     HAL_CRYPEx_ComputationCpltCallback
-/**
-  * @}
-  */  
-
-/** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose
-  * @{
-  */ 
-#define HAL_HASH_STATETypeDef        HAL_HASH_StateTypeDef
-#define HAL_HASHPhaseTypeDef         HAL_HASH_PhaseTypeDef
-#define HAL_HMAC_MD5_Finish          HAL_HASH_MD5_Finish
-#define HAL_HMAC_SHA1_Finish         HAL_HASH_SHA1_Finish
-#define HAL_HMAC_SHA224_Finish       HAL_HASH_SHA224_Finish
-#define HAL_HMAC_SHA256_Finish       HAL_HASH_SHA256_Finish
-
-/*HASH Algorithm Selection*/
-
-#define HASH_AlgoSelection_SHA1      HASH_ALGOSELECTION_SHA1 
-#define HASH_AlgoSelection_SHA224    HASH_ALGOSELECTION_SHA224
-#define HASH_AlgoSelection_SHA256    HASH_ALGOSELECTION_SHA256
-#define HASH_AlgoSelection_MD5       HASH_ALGOSELECTION_MD5
-
-#define HASH_AlgoMode_HASH         HASH_ALGOMODE_HASH 
-#define HASH_AlgoMode_HMAC         HASH_ALGOMODE_HMAC
-
-#define HASH_HMACKeyType_ShortKey  HASH_HMAC_KEYTYPE_SHORTKEY
-#define HASH_HMACKeyType_LongKey   HASH_HMAC_KEYTYPE_LONGKEY
-/**
-  * @}
-  */
-  
-/** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose
-  * @{
-  */
-#define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode
-#define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode
-#define HAL_EnableDBGStopMode HAL_DBGMCU_EnableDBGStopMode
-#define HAL_DisableDBGStopMode HAL_DBGMCU_DisableDBGStopMode
-#define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode
-#define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode
-#define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd)==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
-#define HAL_VREFINT_OutputSelect  HAL_SYSCFG_VREFINT_OutputSelect
-#define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT())
-#if defined(STM32L0)
-#else
-#define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT())
-#endif
-#define HAL_ADC_EnableBuffer_Cmd(cmd)  (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
-#define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ?  HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
-/**
-  * @}
-  */
-
-/** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose
-  * @{
-  */
-#define FLASH_HalfPageProgram      HAL_FLASHEx_HalfPageProgram
-#define FLASH_EnableRunPowerDown   HAL_FLASHEx_EnableRunPowerDown
-#define FLASH_DisableRunPowerDown  HAL_FLASHEx_DisableRunPowerDown
-#define HAL_DATA_EEPROMEx_Unlock   HAL_FLASHEx_DATAEEPROM_Unlock
-#define HAL_DATA_EEPROMEx_Lock     HAL_FLASHEx_DATAEEPROM_Lock
-#define HAL_DATA_EEPROMEx_Erase    HAL_FLASHEx_DATAEEPROM_Erase
-#define HAL_DATA_EEPROMEx_Program  HAL_FLASHEx_DATAEEPROM_Program
-
- /**
-  * @}
-  */
-
-/** @defgroup HAL_I2C_Aliased_Functions HAL I2C Aliased Functions maintained for legacy purpose
-  * @{
-  */
-#define HAL_I2CEx_AnalogFilter_Config         HAL_I2CEx_ConfigAnalogFilter
-#define HAL_I2CEx_DigitalFilter_Config        HAL_I2CEx_ConfigDigitalFilter
-#define HAL_FMPI2CEx_AnalogFilter_Config      HAL_FMPI2CEx_ConfigAnalogFilter
-#define HAL_FMPI2CEx_DigitalFilter_Config     HAL_FMPI2CEx_ConfigDigitalFilter
-
-#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
- /**
-  * @}
-  */
-
-/** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose
-  * @{
-  */
-#define HAL_PWR_PVDConfig                             HAL_PWR_ConfigPVD
-#define HAL_PWR_DisableBkUpReg                        HAL_PWREx_DisableBkUpReg
-#define HAL_PWR_DisableFlashPowerDown                 HAL_PWREx_DisableFlashPowerDown
-#define HAL_PWR_DisableVddio2Monitor                  HAL_PWREx_DisableVddio2Monitor
-#define HAL_PWR_EnableBkUpReg                         HAL_PWREx_EnableBkUpReg
-#define HAL_PWR_EnableFlashPowerDown                  HAL_PWREx_EnableFlashPowerDown
-#define HAL_PWR_EnableVddio2Monitor                   HAL_PWREx_EnableVddio2Monitor
-#define HAL_PWR_PVD_PVM_IRQHandler                    HAL_PWREx_PVD_PVM_IRQHandler
-#define HAL_PWR_PVDLevelConfig                        HAL_PWR_ConfigPVD
-#define HAL_PWR_Vddio2Monitor_IRQHandler              HAL_PWREx_Vddio2Monitor_IRQHandler
-#define HAL_PWR_Vddio2MonitorCallback                 HAL_PWREx_Vddio2MonitorCallback
-#define HAL_PWREx_ActivateOverDrive                   HAL_PWREx_EnableOverDrive
-#define HAL_PWREx_DeactivateOverDrive                 HAL_PWREx_DisableOverDrive
-#define HAL_PWREx_DisableSDADCAnalog                  HAL_PWREx_DisableSDADC
-#define HAL_PWREx_EnableSDADCAnalog                   HAL_PWREx_EnableSDADC
-#define HAL_PWREx_PVMConfig                           HAL_PWREx_ConfigPVM
-
-#define PWR_MODE_NORMAL                               PWR_PVD_MODE_NORMAL
-#define PWR_MODE_IT_RISING                            PWR_PVD_MODE_IT_RISING
-#define PWR_MODE_IT_FALLING                           PWR_PVD_MODE_IT_FALLING
-#define PWR_MODE_IT_RISING_FALLING                    PWR_PVD_MODE_IT_RISING_FALLING
-#define PWR_MODE_EVENT_RISING                         PWR_PVD_MODE_EVENT_RISING
-#define PWR_MODE_EVENT_FALLING                        PWR_PVD_MODE_EVENT_FALLING
-#define PWR_MODE_EVENT_RISING_FALLING                 PWR_PVD_MODE_EVENT_RISING_FALLING
-
-#define CR_OFFSET_BB                                  PWR_CR_OFFSET_BB
-#define CSR_OFFSET_BB                                 PWR_CSR_OFFSET_BB
-
-#define DBP_BitNumber                                 DBP_BIT_NUMBER
-#define PVDE_BitNumber                                PVDE_BIT_NUMBER
-#define PMODE_BitNumber                               PMODE_BIT_NUMBER
-#define EWUP_BitNumber                                EWUP_BIT_NUMBER
-#define FPDS_BitNumber                                FPDS_BIT_NUMBER
-#define ODEN_BitNumber                                ODEN_BIT_NUMBER
-#define ODSWEN_BitNumber                              ODSWEN_BIT_NUMBER
-#define MRLVDS_BitNumber                              MRLVDS_BIT_NUMBER
-#define LPLVDS_BitNumber                              LPLVDS_BIT_NUMBER
-#define BRE_BitNumber                                 BRE_BIT_NUMBER
-
-#define PWR_MODE_EVT                                  PWR_PVD_MODE_NORMAL
- 
- /**
-  * @}
-  */  
-  
-/** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose
-  * @{
-  */
-#define HAL_SMBUS_Slave_Listen_IT          HAL_SMBUS_EnableListen_IT
-#define HAL_SMBUS_SlaveAddrCallback        HAL_SMBUS_AddrCallback         
-#define HAL_SMBUS_SlaveListenCpltCallback  HAL_SMBUS_ListenCpltCallback   
-/**
-  * @}
-  */
-
-/** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose
-  * @{
-  */
-#define HAL_SPI_FlushRxFifo                HAL_SPIEx_FlushRxFifo
-/**
-  * @}
-  */  
-
-/** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose
-  * @{
-  */
-#define HAL_TIM_DMADelayPulseCplt                       TIM_DMADelayPulseCplt
-#define HAL_TIM_DMAError                                TIM_DMAError
-#define HAL_TIM_DMACaptureCplt                          TIM_DMACaptureCplt
-#define HAL_TIMEx_DMACommutationCplt                    TIMEx_DMACommutationCplt
-/**
-  * @}
-  */
-   
-/** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose
-  * @{
-  */ 
-#define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback
-/**
-  * @}
-  */
-  
-/** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose
-  * @{
-  */ 
-#define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback
-/**
-  * @}
-  */  
-   
-  
-/** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose
-  * @{
-  */
-  
-/**
-  * @}
-  */
-
-/* Exported macros ------------------------------------------------------------*/
-
-/** @defgroup HAL_AES_Aliased_Macros HAL CRYP Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#define AES_IT_CC                      CRYP_IT_CC
-#define AES_IT_ERR                     CRYP_IT_ERR
-#define AES_FLAG_CCF                   CRYP_FLAG_CCF
-/**
-  * @}
-  */  
-  
-/** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#define __HAL_GET_BOOT_MODE                   __HAL_SYSCFG_GET_BOOT_MODE
-#define __HAL_REMAPMEMORY_FLASH               __HAL_SYSCFG_REMAPMEMORY_FLASH
-#define __HAL_REMAPMEMORY_SYSTEMFLASH         __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH
-#define __HAL_REMAPMEMORY_SRAM                __HAL_SYSCFG_REMAPMEMORY_SRAM
-#define __HAL_REMAPMEMORY_FMC                 __HAL_SYSCFG_REMAPMEMORY_FMC
-#define __HAL_REMAPMEMORY_FMC_SDRAM           __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM 
-#define __HAL_REMAPMEMORY_FSMC                __HAL_SYSCFG_REMAPMEMORY_FSMC
-#define __HAL_REMAPMEMORY_QUADSPI             __HAL_SYSCFG_REMAPMEMORY_QUADSPI
-#define __HAL_FMC_BANK                        __HAL_SYSCFG_FMC_BANK
-#define __HAL_GET_FLAG                        __HAL_SYSCFG_GET_FLAG
-#define __HAL_CLEAR_FLAG                      __HAL_SYSCFG_CLEAR_FLAG
-#define __HAL_VREFINT_OUT_ENABLE              __HAL_SYSCFG_VREFINT_OUT_ENABLE
-#define __HAL_VREFINT_OUT_DISABLE             __HAL_SYSCFG_VREFINT_OUT_DISABLE
-
-#define SYSCFG_FLAG_VREF_READY                SYSCFG_FLAG_VREFINT_READY
-#define SYSCFG_FLAG_RC48                      RCC_FLAG_HSI48
-#define IS_SYSCFG_FASTMODEPLUS_CONFIG         IS_I2C_FASTMODEPLUS
-#define UFB_MODE_BitNumber                    UFB_MODE_BIT_NUMBER
-#define CMP_PD_BitNumber                      CMP_PD_BIT_NUMBER
-
-/**
-  * @}
-  */
-
-   
-/** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#define __ADC_ENABLE                                     __HAL_ADC_ENABLE
-#define __ADC_DISABLE                                    __HAL_ADC_DISABLE
-#define __HAL_ADC_ENABLING_CONDITIONS                    ADC_ENABLING_CONDITIONS
-#define __HAL_ADC_DISABLING_CONDITIONS                   ADC_DISABLING_CONDITIONS
-#define __HAL_ADC_IS_ENABLED                             ADC_IS_ENABLE
-#define __ADC_IS_ENABLED                                 ADC_IS_ENABLE
-#define __HAL_ADC_IS_SOFTWARE_START_REGULAR              ADC_IS_SOFTWARE_START_REGULAR
-#define __HAL_ADC_IS_SOFTWARE_START_INJECTED             ADC_IS_SOFTWARE_START_INJECTED
-#define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED
-#define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR          ADC_IS_CONVERSION_ONGOING_REGULAR
-#define __HAL_ADC_IS_CONVERSION_ONGOING_INJECTED         ADC_IS_CONVERSION_ONGOING_INJECTED
-#define __HAL_ADC_IS_CONVERSION_ONGOING                  ADC_IS_CONVERSION_ONGOING
-#define __HAL_ADC_CLEAR_ERRORCODE                        ADC_CLEAR_ERRORCODE
-
-#define __HAL_ADC_GET_RESOLUTION                         ADC_GET_RESOLUTION
-#define __HAL_ADC_JSQR_RK                                ADC_JSQR_RK
-#define __HAL_ADC_CFGR_AWD1CH                            ADC_CFGR_AWD1CH_SHIFT
-#define __HAL_ADC_CFGR_AWD23CR                           ADC_CFGR_AWD23CR
-#define __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION            ADC_CFGR_INJECT_AUTO_CONVERSION
-#define __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE              ADC_CFGR_INJECT_CONTEXT_QUEUE
-#define __HAL_ADC_CFGR_INJECT_DISCCONTINUOUS             ADC_CFGR_INJECT_DISCCONTINUOUS
-#define __HAL_ADC_CFGR_REG_DISCCONTINUOUS                ADC_CFGR_REG_DISCCONTINUOUS
-#define __HAL_ADC_CFGR_DISCONTINUOUS_NUM                 ADC_CFGR_DISCONTINUOUS_NUM
-#define __HAL_ADC_CFGR_AUTOWAIT                          ADC_CFGR_AUTOWAIT
-#define __HAL_ADC_CFGR_CONTINUOUS                        ADC_CFGR_CONTINUOUS
-#define __HAL_ADC_CFGR_OVERRUN                           ADC_CFGR_OVERRUN
-#define __HAL_ADC_CFGR_DMACONTREQ                        ADC_CFGR_DMACONTREQ
-#define __HAL_ADC_CFGR_EXTSEL                            ADC_CFGR_EXTSEL_SET
-#define __HAL_ADC_JSQR_JEXTSEL                           ADC_JSQR_JEXTSEL_SET
-#define __HAL_ADC_OFR_CHANNEL                            ADC_OFR_CHANNEL
-#define __HAL_ADC_DIFSEL_CHANNEL                         ADC_DIFSEL_CHANNEL
-#define __HAL_ADC_CALFACT_DIFF_SET                       ADC_CALFACT_DIFF_SET
-#define __HAL_ADC_CALFACT_DIFF_GET                       ADC_CALFACT_DIFF_GET
-#define __HAL_ADC_TRX_HIGHTHRESHOLD                      ADC_TRX_HIGHTHRESHOLD
-
-#define __HAL_ADC_OFFSET_SHIFT_RESOLUTION                ADC_OFFSET_SHIFT_RESOLUTION
-#define __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION         ADC_AWD1THRESHOLD_SHIFT_RESOLUTION
-#define __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION        ADC_AWD23THRESHOLD_SHIFT_RESOLUTION
-#define __HAL_ADC_COMMON_REGISTER                        ADC_COMMON_REGISTER
-#define __HAL_ADC_COMMON_CCR_MULTI                       ADC_COMMON_CCR_MULTI
-#define __HAL_ADC_MULTIMODE_IS_ENABLED                   ADC_MULTIMODE_IS_ENABLE
-#define __ADC_MULTIMODE_IS_ENABLED                       ADC_MULTIMODE_IS_ENABLE
-#define __HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER        ADC_NONMULTIMODE_OR_MULTIMODEMASTER
-#define __HAL_ADC_COMMON_ADC_OTHER                       ADC_COMMON_ADC_OTHER
-#define __HAL_ADC_MULTI_SLAVE                            ADC_MULTI_SLAVE
-
-#define __HAL_ADC_SQR1_L                                 ADC_SQR1_L_SHIFT
-#define __HAL_ADC_JSQR_JL                                ADC_JSQR_JL_SHIFT
-#define __HAL_ADC_JSQR_RK_JL                             ADC_JSQR_RK_JL
-#define __HAL_ADC_CR1_DISCONTINUOUS_NUM                  ADC_CR1_DISCONTINUOUS_NUM
-#define __HAL_ADC_CR1_SCAN                               ADC_CR1_SCAN_SET
-#define __HAL_ADC_CONVCYCLES_MAX_RANGE                   ADC_CONVCYCLES_MAX_RANGE
-#define __HAL_ADC_CLOCK_PRESCALER_RANGE                  ADC_CLOCK_PRESCALER_RANGE
-#define __HAL_ADC_GET_CLOCK_PRESCALER                    ADC_GET_CLOCK_PRESCALER
-
-#define __HAL_ADC_SQR1                                   ADC_SQR1
-#define __HAL_ADC_SMPR1                                  ADC_SMPR1
-#define __HAL_ADC_SMPR2                                  ADC_SMPR2
-#define __HAL_ADC_SQR3_RK                                ADC_SQR3_RK
-#define __HAL_ADC_SQR2_RK                                ADC_SQR2_RK
-#define __HAL_ADC_SQR1_RK                                ADC_SQR1_RK
-#define __HAL_ADC_CR2_CONTINUOUS                         ADC_CR2_CONTINUOUS
-#define __HAL_ADC_CR1_DISCONTINUOUS                      ADC_CR1_DISCONTINUOUS
-#define __HAL_ADC_CR1_SCANCONV                           ADC_CR1_SCANCONV
-#define __HAL_ADC_CR2_EOCSelection                       ADC_CR2_EOCSelection
-#define __HAL_ADC_CR2_DMAContReq                         ADC_CR2_DMAContReq
-#define __HAL_ADC_JSQR                                   ADC_JSQR
-
-#define __HAL_ADC_CHSELR_CHANNEL                         ADC_CHSELR_CHANNEL
-#define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS               ADC_CFGR1_REG_DISCCONTINUOUS
-#define __HAL_ADC_CFGR1_AUTOOFF                          ADC_CFGR1_AUTOOFF
-#define __HAL_ADC_CFGR1_AUTOWAIT                         ADC_CFGR1_AUTOWAIT
-#define __HAL_ADC_CFGR1_CONTINUOUS                       ADC_CFGR1_CONTINUOUS
-#define __HAL_ADC_CFGR1_OVERRUN                          ADC_CFGR1_OVERRUN
-#define __HAL_ADC_CFGR1_SCANDIR                          ADC_CFGR1_SCANDIR
-#define __HAL_ADC_CFGR1_DMACONTREQ                       ADC_CFGR1_DMACONTREQ
-
-/**
-  * @}
-  */
-
-/** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#define __HAL_DHR12R1_ALIGNEMENT                        DAC_DHR12R1_ALIGNMENT
-#define __HAL_DHR12R2_ALIGNEMENT                        DAC_DHR12R2_ALIGNMENT
-#define __HAL_DHR12RD_ALIGNEMENT                        DAC_DHR12RD_ALIGNMENT
-#define IS_DAC_GENERATE_WAVE                            IS_DAC_WAVE
-
-/**
-  * @}
-  */
-   
-/** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1
-#define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1
-#define __HAL_FREEZE_TIM2_DBGMCU __HAL_DBGMCU_FREEZE_TIM2
-#define __HAL_UNFREEZE_TIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM2
-#define __HAL_FREEZE_TIM3_DBGMCU __HAL_DBGMCU_FREEZE_TIM3
-#define __HAL_UNFREEZE_TIM3_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM3
-#define __HAL_FREEZE_TIM4_DBGMCU __HAL_DBGMCU_FREEZE_TIM4
-#define __HAL_UNFREEZE_TIM4_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM4
-#define __HAL_FREEZE_TIM5_DBGMCU __HAL_DBGMCU_FREEZE_TIM5
-#define __HAL_UNFREEZE_TIM5_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM5
-#define __HAL_FREEZE_TIM6_DBGMCU __HAL_DBGMCU_FREEZE_TIM6
-#define __HAL_UNFREEZE_TIM6_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM6
-#define __HAL_FREEZE_TIM7_DBGMCU __HAL_DBGMCU_FREEZE_TIM7
-#define __HAL_UNFREEZE_TIM7_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM7
-#define __HAL_FREEZE_TIM8_DBGMCU __HAL_DBGMCU_FREEZE_TIM8
-#define __HAL_UNFREEZE_TIM8_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM8
-
-#define __HAL_FREEZE_TIM9_DBGMCU __HAL_DBGMCU_FREEZE_TIM9
-#define __HAL_UNFREEZE_TIM9_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM9
-#define __HAL_FREEZE_TIM10_DBGMCU __HAL_DBGMCU_FREEZE_TIM10
-#define __HAL_UNFREEZE_TIM10_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM10
-#define __HAL_FREEZE_TIM11_DBGMCU __HAL_DBGMCU_FREEZE_TIM11
-#define __HAL_UNFREEZE_TIM11_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM11
-#define __HAL_FREEZE_TIM12_DBGMCU __HAL_DBGMCU_FREEZE_TIM12
-#define __HAL_UNFREEZE_TIM12_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM12
-#define __HAL_FREEZE_TIM13_DBGMCU __HAL_DBGMCU_FREEZE_TIM13
-#define __HAL_UNFREEZE_TIM13_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM13
-#define __HAL_FREEZE_TIM14_DBGMCU __HAL_DBGMCU_FREEZE_TIM14
-#define __HAL_UNFREEZE_TIM14_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM14
-#define __HAL_FREEZE_CAN2_DBGMCU __HAL_DBGMCU_FREEZE_CAN2
-#define __HAL_UNFREEZE_CAN2_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN2
-
-
-#define __HAL_FREEZE_TIM15_DBGMCU __HAL_DBGMCU_FREEZE_TIM15
-#define __HAL_UNFREEZE_TIM15_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM15
-#define __HAL_FREEZE_TIM16_DBGMCU __HAL_DBGMCU_FREEZE_TIM16
-#define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16
-#define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17
-#define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17
-#define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC
-#define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC
-#define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG
-#define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG
-#define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG
-#define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG
-#define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT
-#define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT
-#define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT
-#define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT
-#define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT
-#define __HAL_UNFREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT
-#define __HAL_FREEZE_CAN1_DBGMCU __HAL_DBGMCU_FREEZE_CAN1
-#define __HAL_UNFREEZE_CAN1_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN1
-#define __HAL_FREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM1
-#define __HAL_UNFREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM1
-#define __HAL_FREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM2
-#define __HAL_UNFREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM2
-
-/**
-  * @}
-  */
-
-/** @defgroup HAL_COMP_Aliased_Macros HAL COMP Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#if defined(STM32F3)
-#define COMP_START                                       __HAL_COMP_ENABLE
-#define COMP_STOP                                        __HAL_COMP_DISABLE
-#define COMP_LOCK                                        __HAL_COMP_LOCK
-   
-#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
-#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__)   (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
-                                                          __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
-                                                          __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
-                                                          __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
-                                                          __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__)          (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
-                                                          __HAL_COMP_COMP6_EXTI_ENABLE_IT())
-#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__)         (((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
-                                                          __HAL_COMP_COMP6_EXTI_DISABLE_IT())
-#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__)               (((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
-                                                          ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
-                                                          __HAL_COMP_COMP6_EXTI_GET_FLAG())
-#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__)             (((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
-                                                          ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
-                                                          __HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
-# endif
-# if defined(STM32F302xE) || defined(STM32F302xC)
-#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__)   (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
-                                                          __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
-                                                          __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
-                                                          __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
-                                                          __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__)          (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
-                                                          __HAL_COMP_COMP6_EXTI_ENABLE_IT())
-#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__)         (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
-                                                          __HAL_COMP_COMP6_EXTI_DISABLE_IT())
-#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__)               (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
-                                                          ((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
-                                                          ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
-                                                          __HAL_COMP_COMP6_EXTI_GET_FLAG())
-#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__)             (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
-                                                          ((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
-                                                          ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
-                                                          __HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
-# endif
-# if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx)
-#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__)   (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() : \
-                                                          __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() : \
-                                                          __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() : \
-                                                          __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() : \
-                                                          __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__)          (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() : \
-                                                          __HAL_COMP_COMP7_EXTI_ENABLE_IT())
-#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__)         (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() : \
-                                                          ((__EXTILINE__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() : \
-                                                          __HAL_COMP_COMP7_EXTI_DISABLE_IT())
-#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__)               (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
-                                                          ((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
-                                                          ((__FLAG__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_GET_FLAG() : \
-                                                          ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
-                                                          ((__FLAG__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() : \
-                                                          ((__FLAG__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() : \
-                                                          __HAL_COMP_COMP7_EXTI_GET_FLAG())
-#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__)             (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
-                                                          ((__FLAG__)  == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
-                                                          ((__FLAG__)  == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() : \
-                                                          ((__FLAG__)  == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
-                                                          ((__FLAG__)  == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \
-                                                          ((__FLAG__)  == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \
-                                                          __HAL_COMP_COMP7_EXTI_CLEAR_FLAG())
-# endif
-# if defined(STM32F373xC) ||defined(STM32F378xx)
-#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__)   (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
-                                                          __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
-                                                          __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
-                                                          __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
-                                                          __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__)          (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
-                                                          __HAL_COMP_COMP2_EXTI_ENABLE_IT())
-#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__)         (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
-                                                          __HAL_COMP_COMP2_EXTI_DISABLE_IT())
-#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__)               (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
-                                                          __HAL_COMP_COMP2_EXTI_GET_FLAG())
-#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__)             (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
-                                                          __HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
-# endif
-#else
-#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__)   (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
-                                                          __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
-                                                          __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__)  (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
-                                                          __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
-                                                          __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__)          (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
-                                                          __HAL_COMP_COMP2_EXTI_ENABLE_IT())
-#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__)         (((__EXTILINE__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
-                                                          __HAL_COMP_COMP2_EXTI_DISABLE_IT())
-#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__)               (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
-                                                          __HAL_COMP_COMP2_EXTI_GET_FLAG())
-#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__)             (((__FLAG__)  == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
-                                                          __HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
-#endif
-
-#define __HAL_COMP_GET_EXTI_LINE  COMP_GET_EXTI_LINE
-
-#if defined(STM32L0) || defined(STM32L4)
-/* Note: On these STM32 families, the only argument of this macro             */
-/*       is COMP_FLAG_LOCK.                                                   */
-/*       This macro is replaced by __HAL_COMP_IS_LOCKED with only HAL handle  */
-/*       argument.                                                            */
-#define __HAL_COMP_GET_FLAG(__HANDLE__, __FLAG__)  (__HAL_COMP_IS_LOCKED(__HANDLE__))
-#endif
-/**
-  * @}
-  */
-
-#if defined(STM32L0) || defined(STM32L4)
-/** @defgroup HAL_COMP_Aliased_Functions HAL COMP Aliased Functions maintained for legacy purpose
-  * @{
-  */
-#define HAL_COMP_Start_IT       HAL_COMP_Start /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */
-#define HAL_COMP_Stop_IT        HAL_COMP_Stop  /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */
-/**
-  * @}
-  */
-#endif
-
-/** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
-  * @{
-  */
-
-#define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) || \
-                          ((WAVE) == DAC_WAVE_NOISE)|| \
-                          ((WAVE) == DAC_WAVE_TRIANGLE))
-  
-/**
-  * @}
-  */
-
-/** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose
-  * @{
-  */
-
-#define IS_WRPAREA          IS_OB_WRPAREA
-#define IS_TYPEPROGRAM      IS_FLASH_TYPEPROGRAM
-#define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM
-#define IS_TYPEERASE        IS_FLASH_TYPEERASE
-#define IS_NBSECTORS        IS_FLASH_NBSECTORS
-#define IS_OB_WDG_SOURCE    IS_OB_IWDG_SOURCE
-
-/**
-  * @}
-  */
-  
-/** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose
-  * @{
-  */
-  
-#define __HAL_I2C_RESET_CR2             I2C_RESET_CR2
-#define __HAL_I2C_GENERATE_START        I2C_GENERATE_START
-#define __HAL_I2C_FREQ_RANGE            I2C_FREQ_RANGE
-#define __HAL_I2C_RISE_TIME             I2C_RISE_TIME
-#define __HAL_I2C_SPEED_STANDARD        I2C_SPEED_STANDARD
-#define __HAL_I2C_SPEED_FAST            I2C_SPEED_FAST
-#define __HAL_I2C_SPEED                 I2C_SPEED
-#define __HAL_I2C_7BIT_ADD_WRITE        I2C_7BIT_ADD_WRITE
-#define __HAL_I2C_7BIT_ADD_READ         I2C_7BIT_ADD_READ
-#define __HAL_I2C_10BIT_ADDRESS         I2C_10BIT_ADDRESS
-#define __HAL_I2C_10BIT_HEADER_WRITE    I2C_10BIT_HEADER_WRITE
-#define __HAL_I2C_10BIT_HEADER_READ     I2C_10BIT_HEADER_READ
-#define __HAL_I2C_MEM_ADD_MSB           I2C_MEM_ADD_MSB
-#define __HAL_I2C_MEM_ADD_LSB           I2C_MEM_ADD_LSB
-#define __HAL_I2C_FREQRANGE             I2C_FREQRANGE
-/**
-  * @}
-  */
-  
-/** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose
-  * @{
-  */
-  
-#define IS_I2S_INSTANCE                 IS_I2S_ALL_INSTANCE
-#define IS_I2S_INSTANCE_EXT             IS_I2S_ALL_INSTANCE_EXT
-
-/**
-  * @}
-  */
-
-/** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose
-  * @{
-  */
-  
-#define __IRDA_DISABLE                  __HAL_IRDA_DISABLE
-#define __IRDA_ENABLE                   __HAL_IRDA_ENABLE
-
-#define __HAL_IRDA_GETCLOCKSOURCE       IRDA_GETCLOCKSOURCE
-#define __HAL_IRDA_MASK_COMPUTATION     IRDA_MASK_COMPUTATION
-#define __IRDA_GETCLOCKSOURCE           IRDA_GETCLOCKSOURCE
-#define __IRDA_MASK_COMPUTATION         IRDA_MASK_COMPUTATION
-
-#define IS_IRDA_ONEBIT_SAMPLE           IS_IRDA_ONE_BIT_SAMPLE                  
-
-
-/**
-  * @}
-  */
-
-
-/** @defgroup HAL_IWDG_Aliased_Macros HAL IWDG Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#define __HAL_IWDG_ENABLE_WRITE_ACCESS  IWDG_ENABLE_WRITE_ACCESS
-#define __HAL_IWDG_DISABLE_WRITE_ACCESS IWDG_DISABLE_WRITE_ACCESS
-/**
-  * @}
-  */
-
-
-/** @defgroup HAL_LPTIM_Aliased_Macros HAL LPTIM Aliased Macros maintained for legacy purpose
-  * @{
-  */
-
-#define __HAL_LPTIM_ENABLE_INTERRUPT    __HAL_LPTIM_ENABLE_IT
-#define __HAL_LPTIM_DISABLE_INTERRUPT   __HAL_LPTIM_DISABLE_IT
-#define __HAL_LPTIM_GET_ITSTATUS        __HAL_LPTIM_GET_IT_SOURCE
-
-/**
-  * @}
-  */
-  
-  
-/** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#define __OPAMP_CSR_OPAXPD                OPAMP_CSR_OPAXPD
-#define __OPAMP_CSR_S3SELX                OPAMP_CSR_S3SELX
-#define __OPAMP_CSR_S4SELX                OPAMP_CSR_S4SELX
-#define __OPAMP_CSR_S5SELX                OPAMP_CSR_S5SELX
-#define __OPAMP_CSR_S6SELX                OPAMP_CSR_S6SELX
-#define __OPAMP_CSR_OPAXCAL_L             OPAMP_CSR_OPAXCAL_L
-#define __OPAMP_CSR_OPAXCAL_H             OPAMP_CSR_OPAXCAL_H
-#define __OPAMP_CSR_OPAXLPM               OPAMP_CSR_OPAXLPM
-#define __OPAMP_CSR_ALL_SWITCHES          OPAMP_CSR_ALL_SWITCHES
-#define __OPAMP_CSR_ANAWSELX              OPAMP_CSR_ANAWSELX
-#define __OPAMP_CSR_OPAXCALOUT            OPAMP_CSR_OPAXCALOUT
-#define __OPAMP_OFFSET_TRIM_BITSPOSITION  OPAMP_OFFSET_TRIM_BITSPOSITION
-#define __OPAMP_OFFSET_TRIM_SET           OPAMP_OFFSET_TRIM_SET
-
-/**
-  * @}
-  */
-
-
-/** @defgroup HAL_PWR_Aliased_Macros HAL PWR Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#define __HAL_PVD_EVENT_DISABLE                                  __HAL_PWR_PVD_EXTI_DISABLE_EVENT
-#define __HAL_PVD_EVENT_ENABLE                                   __HAL_PWR_PVD_EXTI_ENABLE_EVENT
-#define __HAL_PVD_EXTI_FALLINGTRIGGER_DISABLE                    __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
-#define __HAL_PVD_EXTI_FALLINGTRIGGER_ENABLE                     __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
-#define __HAL_PVD_EXTI_RISINGTRIGGER_DISABLE                     __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
-#define __HAL_PVD_EXTI_RISINGTRIGGER_ENABLE                      __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
-#define __HAL_PVM_EVENT_DISABLE                                  __HAL_PWR_PVM_EVENT_DISABLE
-#define __HAL_PVM_EVENT_ENABLE                                   __HAL_PWR_PVM_EVENT_ENABLE
-#define __HAL_PVM_EXTI_FALLINGTRIGGER_DISABLE                    __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_DISABLE
-#define __HAL_PVM_EXTI_FALLINGTRIGGER_ENABLE                     __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_ENABLE
-#define __HAL_PVM_EXTI_RISINGTRIGGER_DISABLE                     __HAL_PWR_PVM_EXTI_RISINGTRIGGER_DISABLE
-#define __HAL_PVM_EXTI_RISINGTRIGGER_ENABLE                      __HAL_PWR_PVM_EXTI_RISINGTRIGGER_ENABLE
-#define __HAL_PWR_INTERNALWAKEUP_DISABLE                         HAL_PWREx_DisableInternalWakeUpLine
-#define __HAL_PWR_INTERNALWAKEUP_ENABLE                          HAL_PWREx_EnableInternalWakeUpLine
-#define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE                    HAL_PWREx_DisablePullUpPullDownConfig
-#define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE                     HAL_PWREx_EnablePullUpPullDownConfig
-#define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER()                  do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); } while(0)
-#define __HAL_PWR_PVD_EXTI_EVENT_DISABLE                         __HAL_PWR_PVD_EXTI_DISABLE_EVENT
-#define __HAL_PWR_PVD_EXTI_EVENT_ENABLE                          __HAL_PWR_PVD_EXTI_ENABLE_EVENT
-#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE                __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
-#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_ENABLE                 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
-#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_DISABLE                 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
-#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE                  __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
-#define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER              __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
-#define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER               __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
-#define __HAL_PWR_PVM_DISABLE()                                  do { HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4(); } while(0)
-#define __HAL_PWR_PVM_ENABLE()                                   do { HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4(); } while(0)
-#define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE                  HAL_PWREx_DisableSRAM2ContentRetention
-#define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE                   HAL_PWREx_EnableSRAM2ContentRetention
-#define __HAL_PWR_VDDIO2_DISABLE                                 HAL_PWREx_DisableVddIO2
-#define __HAL_PWR_VDDIO2_ENABLE                                  HAL_PWREx_EnableVddIO2
-#define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER                 __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE
-#define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER           __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE
-#define __HAL_PWR_VDDUSB_DISABLE                                 HAL_PWREx_DisableVddUSB
-#define __HAL_PWR_VDDUSB_ENABLE                                  HAL_PWREx_EnableVddUSB
-
-#if defined (STM32F4)
-#define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD)         __HAL_PWR_PVD_EXTI_ENABLE_IT()
-#define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD)        __HAL_PWR_PVD_EXTI_DISABLE_IT()
-#define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD)          __HAL_PWR_PVD_EXTI_GET_FLAG()   
-#define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD)        __HAL_PWR_PVD_EXTI_CLEAR_FLAG()
-#define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD)     __HAL_PWR_PVD_EXTI_GENERATE_SWIT()
-#else
-#define __HAL_PVD_EXTI_CLEAR_FLAG                                __HAL_PWR_PVD_EXTI_CLEAR_FLAG
-#define __HAL_PVD_EXTI_DISABLE_IT                                __HAL_PWR_PVD_EXTI_DISABLE_IT
-#define __HAL_PVD_EXTI_ENABLE_IT                                 __HAL_PWR_PVD_EXTI_ENABLE_IT
-#define __HAL_PVD_EXTI_GENERATE_SWIT                             __HAL_PWR_PVD_EXTI_GENERATE_SWIT
-#define __HAL_PVD_EXTI_GET_FLAG                                  __HAL_PWR_PVD_EXTI_GET_FLAG 
-#endif /* STM32F4 */
-/**   
-  * @}
-  */  
-  
-  
-/** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose
-  * @{
-  */
-  
-#define RCC_StopWakeUpClock_MSI     RCC_STOP_WAKEUPCLOCK_MSI
-#define RCC_StopWakeUpClock_HSI     RCC_STOP_WAKEUPCLOCK_HSI
-
-#define HAL_RCC_CCSCallback HAL_RCC_CSSCallback
-#define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
-
-#define __ADC_CLK_DISABLE          __HAL_RCC_ADC_CLK_DISABLE
-#define __ADC_CLK_ENABLE           __HAL_RCC_ADC_CLK_ENABLE
-#define __ADC_CLK_SLEEP_DISABLE    __HAL_RCC_ADC_CLK_SLEEP_DISABLE
-#define __ADC_CLK_SLEEP_ENABLE     __HAL_RCC_ADC_CLK_SLEEP_ENABLE
-#define __ADC_FORCE_RESET          __HAL_RCC_ADC_FORCE_RESET
-#define __ADC_RELEASE_RESET        __HAL_RCC_ADC_RELEASE_RESET
-#define __ADC1_CLK_DISABLE         __HAL_RCC_ADC1_CLK_DISABLE
-#define __ADC1_CLK_ENABLE          __HAL_RCC_ADC1_CLK_ENABLE
-#define __ADC1_FORCE_RESET         __HAL_RCC_ADC1_FORCE_RESET
-#define __ADC1_RELEASE_RESET       __HAL_RCC_ADC1_RELEASE_RESET
-#define __ADC1_CLK_SLEEP_ENABLE    __HAL_RCC_ADC1_CLK_SLEEP_ENABLE  
-#define __ADC1_CLK_SLEEP_DISABLE   __HAL_RCC_ADC1_CLK_SLEEP_DISABLE  
-#define __ADC2_CLK_DISABLE         __HAL_RCC_ADC2_CLK_DISABLE
-#define __ADC2_CLK_ENABLE          __HAL_RCC_ADC2_CLK_ENABLE
-#define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET
-#define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET
-#define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE
-#define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE
-#define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET
-#define __ADC3_RELEASE_RESET __HAL_RCC_ADC3_RELEASE_RESET
-#define __AES_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE
-#define __AES_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
-#define __AES_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE
-#define __AES_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE
-#define __AES_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
-#define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
-#define __CRYP_CLK_SLEEP_ENABLE      __HAL_RCC_CRYP_CLK_SLEEP_ENABLE
-#define __CRYP_CLK_SLEEP_DISABLE  __HAL_RCC_CRYP_CLK_SLEEP_DISABLE
-#define __CRYP_CLK_ENABLE  __HAL_RCC_CRYP_CLK_ENABLE
-#define __CRYP_CLK_DISABLE  __HAL_RCC_CRYP_CLK_DISABLE
-#define __CRYP_FORCE_RESET       __HAL_RCC_CRYP_FORCE_RESET
-#define __CRYP_RELEASE_RESET  __HAL_RCC_CRYP_RELEASE_RESET
-#define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE
-#define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE
-#define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET
-#define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET
-#define __AHB_FORCE_RESET __HAL_RCC_AHB_FORCE_RESET
-#define __AHB_RELEASE_RESET __HAL_RCC_AHB_RELEASE_RESET
-#define __AHB1_FORCE_RESET __HAL_RCC_AHB1_FORCE_RESET
-#define __AHB1_RELEASE_RESET __HAL_RCC_AHB1_RELEASE_RESET
-#define __AHB2_FORCE_RESET __HAL_RCC_AHB2_FORCE_RESET
-#define __AHB2_RELEASE_RESET __HAL_RCC_AHB2_RELEASE_RESET
-#define __AHB3_FORCE_RESET __HAL_RCC_AHB3_FORCE_RESET
-#define __AHB3_RELEASE_RESET __HAL_RCC_AHB3_RELEASE_RESET
-#define __APB1_FORCE_RESET __HAL_RCC_APB1_FORCE_RESET
-#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
-#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
-#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
-#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
-#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
-#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
-#define __BKP_RELEASE_RESET __HAL_RCC_BKP_RELEASE_RESET
-#define __CAN1_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
-#define __CAN1_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
-#define __CAN1_CLK_SLEEP_DISABLE __HAL_RCC_CAN1_CLK_SLEEP_DISABLE
-#define __CAN1_CLK_SLEEP_ENABLE __HAL_RCC_CAN1_CLK_SLEEP_ENABLE
-#define __CAN1_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
-#define __CAN1_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
-#define __CAN_CLK_DISABLE         __HAL_RCC_CAN1_CLK_DISABLE
-#define __CAN_CLK_ENABLE          __HAL_RCC_CAN1_CLK_ENABLE
-#define __CAN_FORCE_RESET         __HAL_RCC_CAN1_FORCE_RESET
-#define __CAN_RELEASE_RESET       __HAL_RCC_CAN1_RELEASE_RESET
-#define __CAN2_CLK_DISABLE __HAL_RCC_CAN2_CLK_DISABLE
-#define __CAN2_CLK_ENABLE __HAL_RCC_CAN2_CLK_ENABLE
-#define __CAN2_FORCE_RESET __HAL_RCC_CAN2_FORCE_RESET
-#define __CAN2_RELEASE_RESET __HAL_RCC_CAN2_RELEASE_RESET
-#define __CEC_CLK_DISABLE __HAL_RCC_CEC_CLK_DISABLE
-#define __CEC_CLK_ENABLE __HAL_RCC_CEC_CLK_ENABLE
-#define __COMP_CLK_DISABLE        __HAL_RCC_COMP_CLK_DISABLE
-#define __COMP_CLK_ENABLE         __HAL_RCC_COMP_CLK_ENABLE
-#define __COMP_FORCE_RESET        __HAL_RCC_COMP_FORCE_RESET
-#define __COMP_RELEASE_RESET      __HAL_RCC_COMP_RELEASE_RESET
-#define __COMP_CLK_SLEEP_ENABLE   __HAL_RCC_COMP_CLK_SLEEP_ENABLE
-#define __COMP_CLK_SLEEP_DISABLE  __HAL_RCC_COMP_CLK_SLEEP_DISABLE
-#define __CEC_FORCE_RESET __HAL_RCC_CEC_FORCE_RESET
-#define __CEC_RELEASE_RESET __HAL_RCC_CEC_RELEASE_RESET
-#define __CRC_CLK_DISABLE __HAL_RCC_CRC_CLK_DISABLE
-#define __CRC_CLK_ENABLE __HAL_RCC_CRC_CLK_ENABLE
-#define __CRC_CLK_SLEEP_DISABLE __HAL_RCC_CRC_CLK_SLEEP_DISABLE
-#define __CRC_CLK_SLEEP_ENABLE __HAL_RCC_CRC_CLK_SLEEP_ENABLE
-#define __CRC_FORCE_RESET __HAL_RCC_CRC_FORCE_RESET
-#define __CRC_RELEASE_RESET __HAL_RCC_CRC_RELEASE_RESET
-#define __DAC_CLK_DISABLE __HAL_RCC_DAC_CLK_DISABLE
-#define __DAC_CLK_ENABLE __HAL_RCC_DAC_CLK_ENABLE
-#define __DAC_FORCE_RESET __HAL_RCC_DAC_FORCE_RESET
-#define __DAC_RELEASE_RESET __HAL_RCC_DAC_RELEASE_RESET
-#define __DAC1_CLK_DISABLE __HAL_RCC_DAC1_CLK_DISABLE
-#define __DAC1_CLK_ENABLE __HAL_RCC_DAC1_CLK_ENABLE
-#define __DAC1_CLK_SLEEP_DISABLE __HAL_RCC_DAC1_CLK_SLEEP_DISABLE
-#define __DAC1_CLK_SLEEP_ENABLE __HAL_RCC_DAC1_CLK_SLEEP_ENABLE
-#define __DAC1_FORCE_RESET __HAL_RCC_DAC1_FORCE_RESET
-#define __DAC1_RELEASE_RESET __HAL_RCC_DAC1_RELEASE_RESET
-#define __DBGMCU_CLK_ENABLE     __HAL_RCC_DBGMCU_CLK_ENABLE
-#define __DBGMCU_CLK_DISABLE     __HAL_RCC_DBGMCU_CLK_DISABLE
-#define __DBGMCU_FORCE_RESET    __HAL_RCC_DBGMCU_FORCE_RESET
-#define __DBGMCU_RELEASE_RESET  __HAL_RCC_DBGMCU_RELEASE_RESET
-#define __DFSDM_CLK_DISABLE __HAL_RCC_DFSDM_CLK_DISABLE
-#define __DFSDM_CLK_ENABLE __HAL_RCC_DFSDM_CLK_ENABLE
-#define __DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE
-#define __DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE
-#define __DFSDM_FORCE_RESET __HAL_RCC_DFSDM_FORCE_RESET
-#define __DFSDM_RELEASE_RESET __HAL_RCC_DFSDM_RELEASE_RESET
-#define __DMA1_CLK_DISABLE __HAL_RCC_DMA1_CLK_DISABLE
-#define __DMA1_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE
-#define __DMA1_CLK_SLEEP_DISABLE __HAL_RCC_DMA1_CLK_SLEEP_DISABLE
-#define __DMA1_CLK_SLEEP_ENABLE __HAL_RCC_DMA1_CLK_SLEEP_ENABLE
-#define __DMA1_FORCE_RESET __HAL_RCC_DMA1_FORCE_RESET
-#define __DMA1_RELEASE_RESET __HAL_RCC_DMA1_RELEASE_RESET
-#define __DMA2_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
-#define __DMA2_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
-#define __DMA2_CLK_SLEEP_DISABLE __HAL_RCC_DMA2_CLK_SLEEP_DISABLE
-#define __DMA2_CLK_SLEEP_ENABLE __HAL_RCC_DMA2_CLK_SLEEP_ENABLE
-#define __DMA2_FORCE_RESET __HAL_RCC_DMA2_FORCE_RESET
-#define __DMA2_RELEASE_RESET __HAL_RCC_DMA2_RELEASE_RESET
-#define __ETHMAC_CLK_DISABLE __HAL_RCC_ETHMAC_CLK_DISABLE
-#define __ETHMAC_CLK_ENABLE __HAL_RCC_ETHMAC_CLK_ENABLE
-#define __ETHMAC_FORCE_RESET __HAL_RCC_ETHMAC_FORCE_RESET
-#define __ETHMAC_RELEASE_RESET __HAL_RCC_ETHMAC_RELEASE_RESET
-#define __ETHMACRX_CLK_DISABLE __HAL_RCC_ETHMACRX_CLK_DISABLE
-#define __ETHMACRX_CLK_ENABLE __HAL_RCC_ETHMACRX_CLK_ENABLE
-#define __ETHMACTX_CLK_DISABLE __HAL_RCC_ETHMACTX_CLK_DISABLE
-#define __ETHMACTX_CLK_ENABLE __HAL_RCC_ETHMACTX_CLK_ENABLE
-#define __FIREWALL_CLK_DISABLE __HAL_RCC_FIREWALL_CLK_DISABLE
-#define __FIREWALL_CLK_ENABLE __HAL_RCC_FIREWALL_CLK_ENABLE
-#define __FLASH_CLK_DISABLE __HAL_RCC_FLASH_CLK_DISABLE
-#define __FLASH_CLK_ENABLE __HAL_RCC_FLASH_CLK_ENABLE
-#define __FLASH_CLK_SLEEP_DISABLE __HAL_RCC_FLASH_CLK_SLEEP_DISABLE
-#define __FLASH_CLK_SLEEP_ENABLE __HAL_RCC_FLASH_CLK_SLEEP_ENABLE
-#define __FLASH_FORCE_RESET __HAL_RCC_FLASH_FORCE_RESET
-#define __FLASH_RELEASE_RESET __HAL_RCC_FLASH_RELEASE_RESET
-#define __FLITF_CLK_DISABLE       __HAL_RCC_FLITF_CLK_DISABLE
-#define __FLITF_CLK_ENABLE        __HAL_RCC_FLITF_CLK_ENABLE
-#define __FLITF_FORCE_RESET       __HAL_RCC_FLITF_FORCE_RESET
-#define __FLITF_RELEASE_RESET     __HAL_RCC_FLITF_RELEASE_RESET
-#define __FLITF_CLK_SLEEP_ENABLE  __HAL_RCC_FLITF_CLK_SLEEP_ENABLE
-#define __FLITF_CLK_SLEEP_DISABLE __HAL_RCC_FLITF_CLK_SLEEP_DISABLE
-#define __FMC_CLK_DISABLE __HAL_RCC_FMC_CLK_DISABLE
-#define __FMC_CLK_ENABLE __HAL_RCC_FMC_CLK_ENABLE
-#define __FMC_CLK_SLEEP_DISABLE __HAL_RCC_FMC_CLK_SLEEP_DISABLE
-#define __FMC_CLK_SLEEP_ENABLE __HAL_RCC_FMC_CLK_SLEEP_ENABLE
-#define __FMC_FORCE_RESET __HAL_RCC_FMC_FORCE_RESET
-#define __FMC_RELEASE_RESET __HAL_RCC_FMC_RELEASE_RESET
-#define __FSMC_CLK_DISABLE __HAL_RCC_FSMC_CLK_DISABLE
-#define __FSMC_CLK_ENABLE __HAL_RCC_FSMC_CLK_ENABLE
-#define __GPIOA_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE
-#define __GPIOA_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE
-#define __GPIOA_CLK_SLEEP_DISABLE __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE
-#define __GPIOA_CLK_SLEEP_ENABLE __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE
-#define __GPIOA_FORCE_RESET __HAL_RCC_GPIOA_FORCE_RESET
-#define __GPIOA_RELEASE_RESET __HAL_RCC_GPIOA_RELEASE_RESET
-#define __GPIOB_CLK_DISABLE __HAL_RCC_GPIOB_CLK_DISABLE
-#define __GPIOB_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE
-#define __GPIOB_CLK_SLEEP_DISABLE __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE
-#define __GPIOB_CLK_SLEEP_ENABLE __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE
-#define __GPIOB_FORCE_RESET __HAL_RCC_GPIOB_FORCE_RESET
-#define __GPIOB_RELEASE_RESET __HAL_RCC_GPIOB_RELEASE_RESET
-#define __GPIOC_CLK_DISABLE __HAL_RCC_GPIOC_CLK_DISABLE
-#define __GPIOC_CLK_ENABLE __HAL_RCC_GPIOC_CLK_ENABLE
-#define __GPIOC_CLK_SLEEP_DISABLE __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE
-#define __GPIOC_CLK_SLEEP_ENABLE __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE
-#define __GPIOC_FORCE_RESET __HAL_RCC_GPIOC_FORCE_RESET
-#define __GPIOC_RELEASE_RESET __HAL_RCC_GPIOC_RELEASE_RESET
-#define __GPIOD_CLK_DISABLE __HAL_RCC_GPIOD_CLK_DISABLE
-#define __GPIOD_CLK_ENABLE __HAL_RCC_GPIOD_CLK_ENABLE
-#define __GPIOD_CLK_SLEEP_DISABLE __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE
-#define __GPIOD_CLK_SLEEP_ENABLE __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE
-#define __GPIOD_FORCE_RESET __HAL_RCC_GPIOD_FORCE_RESET
-#define __GPIOD_RELEASE_RESET __HAL_RCC_GPIOD_RELEASE_RESET
-#define __GPIOE_CLK_DISABLE __HAL_RCC_GPIOE_CLK_DISABLE
-#define __GPIOE_CLK_ENABLE __HAL_RCC_GPIOE_CLK_ENABLE
-#define __GPIOE_CLK_SLEEP_DISABLE __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE
-#define __GPIOE_CLK_SLEEP_ENABLE __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE
-#define __GPIOE_FORCE_RESET __HAL_RCC_GPIOE_FORCE_RESET
-#define __GPIOE_RELEASE_RESET __HAL_RCC_GPIOE_RELEASE_RESET
-#define __GPIOF_CLK_DISABLE __HAL_RCC_GPIOF_CLK_DISABLE
-#define __GPIOF_CLK_ENABLE __HAL_RCC_GPIOF_CLK_ENABLE
-#define __GPIOF_CLK_SLEEP_DISABLE __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE
-#define __GPIOF_CLK_SLEEP_ENABLE __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE
-#define __GPIOF_FORCE_RESET __HAL_RCC_GPIOF_FORCE_RESET
-#define __GPIOF_RELEASE_RESET __HAL_RCC_GPIOF_RELEASE_RESET
-#define __GPIOG_CLK_DISABLE __HAL_RCC_GPIOG_CLK_DISABLE
-#define __GPIOG_CLK_ENABLE __HAL_RCC_GPIOG_CLK_ENABLE
-#define __GPIOG_CLK_SLEEP_DISABLE __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE
-#define __GPIOG_CLK_SLEEP_ENABLE __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE
-#define __GPIOG_FORCE_RESET __HAL_RCC_GPIOG_FORCE_RESET
-#define __GPIOG_RELEASE_RESET __HAL_RCC_GPIOG_RELEASE_RESET
-#define __GPIOH_CLK_DISABLE __HAL_RCC_GPIOH_CLK_DISABLE
-#define __GPIOH_CLK_ENABLE __HAL_RCC_GPIOH_CLK_ENABLE
-#define __GPIOH_CLK_SLEEP_DISABLE __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE
-#define __GPIOH_CLK_SLEEP_ENABLE __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE
-#define __GPIOH_FORCE_RESET __HAL_RCC_GPIOH_FORCE_RESET
-#define __GPIOH_RELEASE_RESET __HAL_RCC_GPIOH_RELEASE_RESET
-#define __I2C1_CLK_DISABLE __HAL_RCC_I2C1_CLK_DISABLE
-#define __I2C1_CLK_ENABLE __HAL_RCC_I2C1_CLK_ENABLE
-#define __I2C1_CLK_SLEEP_DISABLE __HAL_RCC_I2C1_CLK_SLEEP_DISABLE
-#define __I2C1_CLK_SLEEP_ENABLE __HAL_RCC_I2C1_CLK_SLEEP_ENABLE
-#define __I2C1_FORCE_RESET __HAL_RCC_I2C1_FORCE_RESET
-#define __I2C1_RELEASE_RESET __HAL_RCC_I2C1_RELEASE_RESET
-#define __I2C2_CLK_DISABLE __HAL_RCC_I2C2_CLK_DISABLE
-#define __I2C2_CLK_ENABLE __HAL_RCC_I2C2_CLK_ENABLE
-#define __I2C2_CLK_SLEEP_DISABLE __HAL_RCC_I2C2_CLK_SLEEP_DISABLE
-#define __I2C2_CLK_SLEEP_ENABLE __HAL_RCC_I2C2_CLK_SLEEP_ENABLE
-#define __I2C2_FORCE_RESET __HAL_RCC_I2C2_FORCE_RESET
-#define __I2C2_RELEASE_RESET __HAL_RCC_I2C2_RELEASE_RESET
-#define __I2C3_CLK_DISABLE __HAL_RCC_I2C3_CLK_DISABLE
-#define __I2C3_CLK_ENABLE __HAL_RCC_I2C3_CLK_ENABLE
-#define __I2C3_CLK_SLEEP_DISABLE __HAL_RCC_I2C3_CLK_SLEEP_DISABLE
-#define __I2C3_CLK_SLEEP_ENABLE __HAL_RCC_I2C3_CLK_SLEEP_ENABLE
-#define __I2C3_FORCE_RESET __HAL_RCC_I2C3_FORCE_RESET
-#define __I2C3_RELEASE_RESET __HAL_RCC_I2C3_RELEASE_RESET
-#define __LCD_CLK_DISABLE __HAL_RCC_LCD_CLK_DISABLE
-#define __LCD_CLK_ENABLE __HAL_RCC_LCD_CLK_ENABLE
-#define __LCD_CLK_SLEEP_DISABLE __HAL_RCC_LCD_CLK_SLEEP_DISABLE
-#define __LCD_CLK_SLEEP_ENABLE __HAL_RCC_LCD_CLK_SLEEP_ENABLE
-#define __LCD_FORCE_RESET __HAL_RCC_LCD_FORCE_RESET
-#define __LCD_RELEASE_RESET __HAL_RCC_LCD_RELEASE_RESET
-#define __LPTIM1_CLK_DISABLE __HAL_RCC_LPTIM1_CLK_DISABLE
-#define __LPTIM1_CLK_ENABLE __HAL_RCC_LPTIM1_CLK_ENABLE
-#define __LPTIM1_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE
-#define __LPTIM1_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE
-#define __LPTIM1_FORCE_RESET __HAL_RCC_LPTIM1_FORCE_RESET
-#define __LPTIM1_RELEASE_RESET __HAL_RCC_LPTIM1_RELEASE_RESET
-#define __LPTIM2_CLK_DISABLE __HAL_RCC_LPTIM2_CLK_DISABLE
-#define __LPTIM2_CLK_ENABLE __HAL_RCC_LPTIM2_CLK_ENABLE
-#define __LPTIM2_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE
-#define __LPTIM2_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE
-#define __LPTIM2_FORCE_RESET __HAL_RCC_LPTIM2_FORCE_RESET
-#define __LPTIM2_RELEASE_RESET __HAL_RCC_LPTIM2_RELEASE_RESET
-#define __LPUART1_CLK_DISABLE __HAL_RCC_LPUART1_CLK_DISABLE
-#define __LPUART1_CLK_ENABLE __HAL_RCC_LPUART1_CLK_ENABLE
-#define __LPUART1_CLK_SLEEP_DISABLE __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE
-#define __LPUART1_CLK_SLEEP_ENABLE __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE
-#define __LPUART1_FORCE_RESET __HAL_RCC_LPUART1_FORCE_RESET
-#define __LPUART1_RELEASE_RESET __HAL_RCC_LPUART1_RELEASE_RESET
-#define __OPAMP_CLK_DISABLE __HAL_RCC_OPAMP_CLK_DISABLE
-#define __OPAMP_CLK_ENABLE __HAL_RCC_OPAMP_CLK_ENABLE
-#define __OPAMP_CLK_SLEEP_DISABLE __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE
-#define __OPAMP_CLK_SLEEP_ENABLE __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE
-#define __OPAMP_FORCE_RESET __HAL_RCC_OPAMP_FORCE_RESET
-#define __OPAMP_RELEASE_RESET __HAL_RCC_OPAMP_RELEASE_RESET
-#define __OTGFS_CLK_DISABLE __HAL_RCC_OTGFS_CLK_DISABLE
-#define __OTGFS_CLK_ENABLE __HAL_RCC_OTGFS_CLK_ENABLE
-#define __OTGFS_CLK_SLEEP_DISABLE __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE
-#define __OTGFS_CLK_SLEEP_ENABLE __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE
-#define __OTGFS_FORCE_RESET __HAL_RCC_OTGFS_FORCE_RESET
-#define __OTGFS_RELEASE_RESET __HAL_RCC_OTGFS_RELEASE_RESET
-#define __PWR_CLK_DISABLE __HAL_RCC_PWR_CLK_DISABLE
-#define __PWR_CLK_ENABLE __HAL_RCC_PWR_CLK_ENABLE
-#define __PWR_CLK_SLEEP_DISABLE __HAL_RCC_PWR_CLK_SLEEP_DISABLE
-#define __PWR_CLK_SLEEP_ENABLE __HAL_RCC_PWR_CLK_SLEEP_ENABLE
-#define __PWR_FORCE_RESET __HAL_RCC_PWR_FORCE_RESET
-#define __PWR_RELEASE_RESET __HAL_RCC_PWR_RELEASE_RESET
-#define __QSPI_CLK_DISABLE __HAL_RCC_QSPI_CLK_DISABLE
-#define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE
-#define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE
-#define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE
-#define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET
-#define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET
-#define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE
-#define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE
-#define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE
-#define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE
-#define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET
-#define __RNG_RELEASE_RESET __HAL_RCC_RNG_RELEASE_RESET
-#define __SAI1_CLK_DISABLE __HAL_RCC_SAI1_CLK_DISABLE
-#define __SAI1_CLK_ENABLE __HAL_RCC_SAI1_CLK_ENABLE
-#define __SAI1_CLK_SLEEP_DISABLE __HAL_RCC_SAI1_CLK_SLEEP_DISABLE
-#define __SAI1_CLK_SLEEP_ENABLE __HAL_RCC_SAI1_CLK_SLEEP_ENABLE
-#define __SAI1_FORCE_RESET __HAL_RCC_SAI1_FORCE_RESET
-#define __SAI1_RELEASE_RESET __HAL_RCC_SAI1_RELEASE_RESET
-#define __SAI2_CLK_DISABLE __HAL_RCC_SAI2_CLK_DISABLE
-#define __SAI2_CLK_ENABLE __HAL_RCC_SAI2_CLK_ENABLE
-#define __SAI2_CLK_SLEEP_DISABLE __HAL_RCC_SAI2_CLK_SLEEP_DISABLE
-#define __SAI2_CLK_SLEEP_ENABLE __HAL_RCC_SAI2_CLK_SLEEP_ENABLE
-#define __SAI2_FORCE_RESET __HAL_RCC_SAI2_FORCE_RESET
-#define __SAI2_RELEASE_RESET __HAL_RCC_SAI2_RELEASE_RESET
-#define __SDIO_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
-#define __SDIO_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
-#define __SDMMC_CLK_DISABLE __HAL_RCC_SDMMC_CLK_DISABLE
-#define __SDMMC_CLK_ENABLE __HAL_RCC_SDMMC_CLK_ENABLE
-#define __SDMMC_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE
-#define __SDMMC_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE
-#define __SDMMC_FORCE_RESET __HAL_RCC_SDMMC_FORCE_RESET
-#define __SDMMC_RELEASE_RESET __HAL_RCC_SDMMC_RELEASE_RESET
-#define __SPI1_CLK_DISABLE __HAL_RCC_SPI1_CLK_DISABLE
-#define __SPI1_CLK_ENABLE __HAL_RCC_SPI1_CLK_ENABLE
-#define __SPI1_CLK_SLEEP_DISABLE __HAL_RCC_SPI1_CLK_SLEEP_DISABLE
-#define __SPI1_CLK_SLEEP_ENABLE __HAL_RCC_SPI1_CLK_SLEEP_ENABLE
-#define __SPI1_FORCE_RESET __HAL_RCC_SPI1_FORCE_RESET
-#define __SPI1_RELEASE_RESET __HAL_RCC_SPI1_RELEASE_RESET
-#define __SPI2_CLK_DISABLE __HAL_RCC_SPI2_CLK_DISABLE
-#define __SPI2_CLK_ENABLE __HAL_RCC_SPI2_CLK_ENABLE
-#define __SPI2_CLK_SLEEP_DISABLE __HAL_RCC_SPI2_CLK_SLEEP_DISABLE
-#define __SPI2_CLK_SLEEP_ENABLE __HAL_RCC_SPI2_CLK_SLEEP_ENABLE
-#define __SPI2_FORCE_RESET __HAL_RCC_SPI2_FORCE_RESET
-#define __SPI2_RELEASE_RESET __HAL_RCC_SPI2_RELEASE_RESET
-#define __SPI3_CLK_DISABLE __HAL_RCC_SPI3_CLK_DISABLE
-#define __SPI3_CLK_ENABLE __HAL_RCC_SPI3_CLK_ENABLE
-#define __SPI3_CLK_SLEEP_DISABLE __HAL_RCC_SPI3_CLK_SLEEP_DISABLE
-#define __SPI3_CLK_SLEEP_ENABLE __HAL_RCC_SPI3_CLK_SLEEP_ENABLE
-#define __SPI3_FORCE_RESET __HAL_RCC_SPI3_FORCE_RESET
-#define __SPI3_RELEASE_RESET __HAL_RCC_SPI3_RELEASE_RESET
-#define __SRAM_CLK_DISABLE __HAL_RCC_SRAM_CLK_DISABLE
-#define __SRAM_CLK_ENABLE __HAL_RCC_SRAM_CLK_ENABLE
-#define __SRAM1_CLK_SLEEP_DISABLE __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE
-#define __SRAM1_CLK_SLEEP_ENABLE __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE
-#define __SRAM2_CLK_SLEEP_DISABLE __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE
-#define __SRAM2_CLK_SLEEP_ENABLE __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE
-#define __SWPMI1_CLK_DISABLE __HAL_RCC_SWPMI1_CLK_DISABLE
-#define __SWPMI1_CLK_ENABLE __HAL_RCC_SWPMI1_CLK_ENABLE
-#define __SWPMI1_CLK_SLEEP_DISABLE __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE
-#define __SWPMI1_CLK_SLEEP_ENABLE __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE
-#define __SWPMI1_FORCE_RESET __HAL_RCC_SWPMI1_FORCE_RESET
-#define __SWPMI1_RELEASE_RESET __HAL_RCC_SWPMI1_RELEASE_RESET
-#define __SYSCFG_CLK_DISABLE __HAL_RCC_SYSCFG_CLK_DISABLE
-#define __SYSCFG_CLK_ENABLE __HAL_RCC_SYSCFG_CLK_ENABLE
-#define __SYSCFG_CLK_SLEEP_DISABLE __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE
-#define __SYSCFG_CLK_SLEEP_ENABLE __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE
-#define __SYSCFG_FORCE_RESET __HAL_RCC_SYSCFG_FORCE_RESET
-#define __SYSCFG_RELEASE_RESET __HAL_RCC_SYSCFG_RELEASE_RESET
-#define __TIM1_CLK_DISABLE __HAL_RCC_TIM1_CLK_DISABLE
-#define __TIM1_CLK_ENABLE __HAL_RCC_TIM1_CLK_ENABLE
-#define __TIM1_CLK_SLEEP_DISABLE __HAL_RCC_TIM1_CLK_SLEEP_DISABLE
-#define __TIM1_CLK_SLEEP_ENABLE __HAL_RCC_TIM1_CLK_SLEEP_ENABLE
-#define __TIM1_FORCE_RESET __HAL_RCC_TIM1_FORCE_RESET
-#define __TIM1_RELEASE_RESET __HAL_RCC_TIM1_RELEASE_RESET
-#define __TIM10_CLK_DISABLE __HAL_RCC_TIM10_CLK_DISABLE
-#define __TIM10_CLK_ENABLE __HAL_RCC_TIM10_CLK_ENABLE
-#define __TIM10_FORCE_RESET __HAL_RCC_TIM10_FORCE_RESET
-#define __TIM10_RELEASE_RESET __HAL_RCC_TIM10_RELEASE_RESET
-#define __TIM11_CLK_DISABLE __HAL_RCC_TIM11_CLK_DISABLE
-#define __TIM11_CLK_ENABLE __HAL_RCC_TIM11_CLK_ENABLE
-#define __TIM11_FORCE_RESET __HAL_RCC_TIM11_FORCE_RESET
-#define __TIM11_RELEASE_RESET __HAL_RCC_TIM11_RELEASE_RESET
-#define __TIM12_CLK_DISABLE __HAL_RCC_TIM12_CLK_DISABLE
-#define __TIM12_CLK_ENABLE __HAL_RCC_TIM12_CLK_ENABLE
-#define __TIM12_FORCE_RESET __HAL_RCC_TIM12_FORCE_RESET
-#define __TIM12_RELEASE_RESET __HAL_RCC_TIM12_RELEASE_RESET
-#define __TIM13_CLK_DISABLE __HAL_RCC_TIM13_CLK_DISABLE
-#define __TIM13_CLK_ENABLE __HAL_RCC_TIM13_CLK_ENABLE
-#define __TIM13_FORCE_RESET __HAL_RCC_TIM13_FORCE_RESET
-#define __TIM13_RELEASE_RESET __HAL_RCC_TIM13_RELEASE_RESET
-#define __TIM14_CLK_DISABLE __HAL_RCC_TIM14_CLK_DISABLE
-#define __TIM14_CLK_ENABLE __HAL_RCC_TIM14_CLK_ENABLE
-#define __TIM14_FORCE_RESET __HAL_RCC_TIM14_FORCE_RESET
-#define __TIM14_RELEASE_RESET __HAL_RCC_TIM14_RELEASE_RESET
-#define __TIM15_CLK_DISABLE __HAL_RCC_TIM15_CLK_DISABLE
-#define __TIM15_CLK_ENABLE __HAL_RCC_TIM15_CLK_ENABLE
-#define __TIM15_CLK_SLEEP_DISABLE __HAL_RCC_TIM15_CLK_SLEEP_DISABLE
-#define __TIM15_CLK_SLEEP_ENABLE __HAL_RCC_TIM15_CLK_SLEEP_ENABLE
-#define __TIM15_FORCE_RESET __HAL_RCC_TIM15_FORCE_RESET
-#define __TIM15_RELEASE_RESET __HAL_RCC_TIM15_RELEASE_RESET
-#define __TIM16_CLK_DISABLE __HAL_RCC_TIM16_CLK_DISABLE
-#define __TIM16_CLK_ENABLE __HAL_RCC_TIM16_CLK_ENABLE
-#define __TIM16_CLK_SLEEP_DISABLE __HAL_RCC_TIM16_CLK_SLEEP_DISABLE
-#define __TIM16_CLK_SLEEP_ENABLE __HAL_RCC_TIM16_CLK_SLEEP_ENABLE
-#define __TIM16_FORCE_RESET __HAL_RCC_TIM16_FORCE_RESET
-#define __TIM16_RELEASE_RESET __HAL_RCC_TIM16_RELEASE_RESET
-#define __TIM17_CLK_DISABLE __HAL_RCC_TIM17_CLK_DISABLE
-#define __TIM17_CLK_ENABLE __HAL_RCC_TIM17_CLK_ENABLE
-#define __TIM17_CLK_SLEEP_DISABLE __HAL_RCC_TIM17_CLK_SLEEP_DISABLE
-#define __TIM17_CLK_SLEEP_ENABLE __HAL_RCC_TIM17_CLK_SLEEP_ENABLE
-#define __TIM17_FORCE_RESET __HAL_RCC_TIM17_FORCE_RESET
-#define __TIM17_RELEASE_RESET __HAL_RCC_TIM17_RELEASE_RESET
-#define __TIM2_CLK_DISABLE __HAL_RCC_TIM2_CLK_DISABLE
-#define __TIM2_CLK_ENABLE __HAL_RCC_TIM2_CLK_ENABLE
-#define __TIM2_CLK_SLEEP_DISABLE __HAL_RCC_TIM2_CLK_SLEEP_DISABLE
-#define __TIM2_CLK_SLEEP_ENABLE __HAL_RCC_TIM2_CLK_SLEEP_ENABLE
-#define __TIM2_FORCE_RESET __HAL_RCC_TIM2_FORCE_RESET
-#define __TIM2_RELEASE_RESET __HAL_RCC_TIM2_RELEASE_RESET
-#define __TIM3_CLK_DISABLE __HAL_RCC_TIM3_CLK_DISABLE
-#define __TIM3_CLK_ENABLE __HAL_RCC_TIM3_CLK_ENABLE
-#define __TIM3_CLK_SLEEP_DISABLE __HAL_RCC_TIM3_CLK_SLEEP_DISABLE
-#define __TIM3_CLK_SLEEP_ENABLE __HAL_RCC_TIM3_CLK_SLEEP_ENABLE
-#define __TIM3_FORCE_RESET __HAL_RCC_TIM3_FORCE_RESET
-#define __TIM3_RELEASE_RESET __HAL_RCC_TIM3_RELEASE_RESET
-#define __TIM4_CLK_DISABLE __HAL_RCC_TIM4_CLK_DISABLE
-#define __TIM4_CLK_ENABLE __HAL_RCC_TIM4_CLK_ENABLE
-#define __TIM4_CLK_SLEEP_DISABLE __HAL_RCC_TIM4_CLK_SLEEP_DISABLE
-#define __TIM4_CLK_SLEEP_ENABLE __HAL_RCC_TIM4_CLK_SLEEP_ENABLE
-#define __TIM4_FORCE_RESET __HAL_RCC_TIM4_FORCE_RESET
-#define __TIM4_RELEASE_RESET __HAL_RCC_TIM4_RELEASE_RESET
-#define __TIM5_CLK_DISABLE __HAL_RCC_TIM5_CLK_DISABLE
-#define __TIM5_CLK_ENABLE __HAL_RCC_TIM5_CLK_ENABLE
-#define __TIM5_CLK_SLEEP_DISABLE __HAL_RCC_TIM5_CLK_SLEEP_DISABLE
-#define __TIM5_CLK_SLEEP_ENABLE __HAL_RCC_TIM5_CLK_SLEEP_ENABLE
-#define __TIM5_FORCE_RESET __HAL_RCC_TIM5_FORCE_RESET
-#define __TIM5_RELEASE_RESET __HAL_RCC_TIM5_RELEASE_RESET
-#define __TIM6_CLK_DISABLE __HAL_RCC_TIM6_CLK_DISABLE
-#define __TIM6_CLK_ENABLE __HAL_RCC_TIM6_CLK_ENABLE
-#define __TIM6_CLK_SLEEP_DISABLE __HAL_RCC_TIM6_CLK_SLEEP_DISABLE
-#define __TIM6_CLK_SLEEP_ENABLE __HAL_RCC_TIM6_CLK_SLEEP_ENABLE
-#define __TIM6_FORCE_RESET __HAL_RCC_TIM6_FORCE_RESET
-#define __TIM6_RELEASE_RESET __HAL_RCC_TIM6_RELEASE_RESET
-#define __TIM7_CLK_DISABLE __HAL_RCC_TIM7_CLK_DISABLE
-#define __TIM7_CLK_ENABLE __HAL_RCC_TIM7_CLK_ENABLE
-#define __TIM7_CLK_SLEEP_DISABLE __HAL_RCC_TIM7_CLK_SLEEP_DISABLE
-#define __TIM7_CLK_SLEEP_ENABLE __HAL_RCC_TIM7_CLK_SLEEP_ENABLE
-#define __TIM7_FORCE_RESET __HAL_RCC_TIM7_FORCE_RESET
-#define __TIM7_RELEASE_RESET __HAL_RCC_TIM7_RELEASE_RESET
-#define __TIM8_CLK_DISABLE __HAL_RCC_TIM8_CLK_DISABLE
-#define __TIM8_CLK_ENABLE __HAL_RCC_TIM8_CLK_ENABLE
-#define __TIM8_CLK_SLEEP_DISABLE __HAL_RCC_TIM8_CLK_SLEEP_DISABLE
-#define __TIM8_CLK_SLEEP_ENABLE __HAL_RCC_TIM8_CLK_SLEEP_ENABLE
-#define __TIM8_FORCE_RESET __HAL_RCC_TIM8_FORCE_RESET
-#define __TIM8_RELEASE_RESET __HAL_RCC_TIM8_RELEASE_RESET
-#define __TIM9_CLK_DISABLE __HAL_RCC_TIM9_CLK_DISABLE
-#define __TIM9_CLK_ENABLE __HAL_RCC_TIM9_CLK_ENABLE
-#define __TIM9_FORCE_RESET __HAL_RCC_TIM9_FORCE_RESET
-#define __TIM9_RELEASE_RESET __HAL_RCC_TIM9_RELEASE_RESET
-#define __TSC_CLK_DISABLE __HAL_RCC_TSC_CLK_DISABLE
-#define __TSC_CLK_ENABLE __HAL_RCC_TSC_CLK_ENABLE
-#define __TSC_CLK_SLEEP_DISABLE __HAL_RCC_TSC_CLK_SLEEP_DISABLE
-#define __TSC_CLK_SLEEP_ENABLE __HAL_RCC_TSC_CLK_SLEEP_ENABLE
-#define __TSC_FORCE_RESET __HAL_RCC_TSC_FORCE_RESET
-#define __TSC_RELEASE_RESET __HAL_RCC_TSC_RELEASE_RESET
-#define __UART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE
-#define __UART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE
-#define __UART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE
-#define __UART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE
-#define __UART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET
-#define __UART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET
-#define __UART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE
-#define __UART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE
-#define __UART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE
-#define __UART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE
-#define __UART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET
-#define __UART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET
-#define __USART1_CLK_DISABLE __HAL_RCC_USART1_CLK_DISABLE
-#define __USART1_CLK_ENABLE __HAL_RCC_USART1_CLK_ENABLE
-#define __USART1_CLK_SLEEP_DISABLE __HAL_RCC_USART1_CLK_SLEEP_DISABLE
-#define __USART1_CLK_SLEEP_ENABLE __HAL_RCC_USART1_CLK_SLEEP_ENABLE
-#define __USART1_FORCE_RESET __HAL_RCC_USART1_FORCE_RESET
-#define __USART1_RELEASE_RESET __HAL_RCC_USART1_RELEASE_RESET
-#define __USART2_CLK_DISABLE __HAL_RCC_USART2_CLK_DISABLE
-#define __USART2_CLK_ENABLE __HAL_RCC_USART2_CLK_ENABLE
-#define __USART2_CLK_SLEEP_DISABLE __HAL_RCC_USART2_CLK_SLEEP_DISABLE
-#define __USART2_CLK_SLEEP_ENABLE __HAL_RCC_USART2_CLK_SLEEP_ENABLE
-#define __USART2_FORCE_RESET __HAL_RCC_USART2_FORCE_RESET
-#define __USART2_RELEASE_RESET __HAL_RCC_USART2_RELEASE_RESET
-#define __USART3_CLK_DISABLE __HAL_RCC_USART3_CLK_DISABLE
-#define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE
-#define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE
-#define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE
-#define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET
-#define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET
-#define __USART4_CLK_DISABLE        __HAL_RCC_UART4_CLK_DISABLE
-#define __USART4_CLK_ENABLE         __HAL_RCC_UART4_CLK_ENABLE
-#define __USART4_CLK_SLEEP_ENABLE   __HAL_RCC_UART4_CLK_SLEEP_ENABLE
-#define __USART4_CLK_SLEEP_DISABLE  __HAL_RCC_UART4_CLK_SLEEP_DISABLE 
-#define __USART4_FORCE_RESET        __HAL_RCC_UART4_FORCE_RESET
-#define __USART4_RELEASE_RESET      __HAL_RCC_UART4_RELEASE_RESET
-#define __USART5_CLK_DISABLE        __HAL_RCC_UART5_CLK_DISABLE
-#define __USART5_CLK_ENABLE         __HAL_RCC_UART5_CLK_ENABLE
-#define __USART5_CLK_SLEEP_ENABLE   __HAL_RCC_UART5_CLK_SLEEP_ENABLE
-#define __USART5_CLK_SLEEP_DISABLE  __HAL_RCC_UART5_CLK_SLEEP_DISABLE 
-#define __USART5_FORCE_RESET        __HAL_RCC_UART5_FORCE_RESET
-#define __USART5_RELEASE_RESET      __HAL_RCC_UART5_RELEASE_RESET
-#define __USART7_CLK_DISABLE        __HAL_RCC_UART7_CLK_DISABLE
-#define __USART7_CLK_ENABLE         __HAL_RCC_UART7_CLK_ENABLE
-#define __USART7_FORCE_RESET        __HAL_RCC_UART7_FORCE_RESET
-#define __USART7_RELEASE_RESET      __HAL_RCC_UART7_RELEASE_RESET
-#define __USART8_CLK_DISABLE        __HAL_RCC_UART8_CLK_DISABLE
-#define __USART8_CLK_ENABLE         __HAL_RCC_UART8_CLK_ENABLE
-#define __USART8_FORCE_RESET        __HAL_RCC_UART8_FORCE_RESET
-#define __USART8_RELEASE_RESET      __HAL_RCC_UART8_RELEASE_RESET
-#define __USB_CLK_DISABLE         __HAL_RCC_USB_CLK_DISABLE
-#define __USB_CLK_ENABLE          __HAL_RCC_USB_CLK_ENABLE
-#define __USB_FORCE_RESET         __HAL_RCC_USB_FORCE_RESET
-#define __USB_CLK_SLEEP_ENABLE    __HAL_RCC_USB_CLK_SLEEP_ENABLE
-#define __USB_CLK_SLEEP_DISABLE   __HAL_RCC_USB_CLK_SLEEP_DISABLE
-#define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE
-#define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE
-#define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET
-#define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
-#define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE
-#define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE
-#define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE
-#define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET
-#define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET
-#define __TIM21_CLK_ENABLE   __HAL_RCC_TIM21_CLK_ENABLE
-#define __TIM21_CLK_DISABLE   __HAL_RCC_TIM21_CLK_DISABLE
-#define __TIM21_FORCE_RESET   __HAL_RCC_TIM21_FORCE_RESET
-#define __TIM21_RELEASE_RESET  __HAL_RCC_TIM21_RELEASE_RESET
-#define __TIM21_CLK_SLEEP_ENABLE   __HAL_RCC_TIM21_CLK_SLEEP_ENABLE
-#define __TIM21_CLK_SLEEP_DISABLE   __HAL_RCC_TIM21_CLK_SLEEP_DISABLE
-#define __TIM22_CLK_ENABLE   __HAL_RCC_TIM22_CLK_ENABLE
-#define __TIM22_CLK_DISABLE   __HAL_RCC_TIM22_CLK_DISABLE
-#define __TIM22_FORCE_RESET   __HAL_RCC_TIM22_FORCE_RESET
-#define __TIM22_RELEASE_RESET  __HAL_RCC_TIM22_RELEASE_RESET
-#define __TIM22_CLK_SLEEP_ENABLE   __HAL_RCC_TIM22_CLK_SLEEP_ENABLE
-#define __TIM22_CLK_SLEEP_DISABLE   __HAL_RCC_TIM22_CLK_SLEEP_DISABLE
-#define __CRS_CLK_DISABLE __HAL_RCC_CRS_CLK_DISABLE
-#define __CRS_CLK_ENABLE __HAL_RCC_CRS_CLK_ENABLE
-#define __CRS_CLK_SLEEP_DISABLE __HAL_RCC_CRS_CLK_SLEEP_DISABLE
-#define __CRS_CLK_SLEEP_ENABLE __HAL_RCC_CRS_CLK_SLEEP_ENABLE
-#define __CRS_FORCE_RESET __HAL_RCC_CRS_FORCE_RESET
-#define __CRS_RELEASE_RESET __HAL_RCC_CRS_RELEASE_RESET
-#define __RCC_BACKUPRESET_FORCE __HAL_RCC_BACKUPRESET_FORCE
-#define __RCC_BACKUPRESET_RELEASE __HAL_RCC_BACKUPRESET_RELEASE
-
-#define __USB_OTG_FS_FORCE_RESET  __HAL_RCC_USB_OTG_FS_FORCE_RESET
-#define __USB_OTG_FS_RELEASE_RESET  __HAL_RCC_USB_OTG_FS_RELEASE_RESET
-#define __USB_OTG_FS_CLK_SLEEP_ENABLE  __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE
-#define __USB_OTG_FS_CLK_SLEEP_DISABLE  __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE
-#define __USB_OTG_HS_CLK_DISABLE  __HAL_RCC_USB_OTG_HS_CLK_DISABLE
-#define __USB_OTG_HS_CLK_ENABLE          __HAL_RCC_USB_OTG_HS_CLK_ENABLE
-#define __USB_OTG_HS_ULPI_CLK_ENABLE  __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE
-#define __USB_OTG_HS_ULPI_CLK_DISABLE  __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE  
-#define __TIM9_CLK_SLEEP_ENABLE          __HAL_RCC_TIM9_CLK_SLEEP_ENABLE
-#define __TIM9_CLK_SLEEP_DISABLE  __HAL_RCC_TIM9_CLK_SLEEP_DISABLE  
-#define __TIM10_CLK_SLEEP_ENABLE  __HAL_RCC_TIM10_CLK_SLEEP_ENABLE
-#define __TIM10_CLK_SLEEP_DISABLE  __HAL_RCC_TIM10_CLK_SLEEP_DISABLE  
-#define __TIM11_CLK_SLEEP_ENABLE  __HAL_RCC_TIM11_CLK_SLEEP_ENABLE
-#define __TIM11_CLK_SLEEP_DISABLE  __HAL_RCC_TIM11_CLK_SLEEP_DISABLE  
-#define __ETHMACPTP_CLK_SLEEP_ENABLE  __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE
-#define __ETHMACPTP_CLK_SLEEP_DISABLE  __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE
-#define __ETHMACPTP_CLK_ENABLE          __HAL_RCC_ETHMACPTP_CLK_ENABLE
-#define __ETHMACPTP_CLK_DISABLE          __HAL_RCC_ETHMACPTP_CLK_DISABLE  
-#define __HASH_CLK_ENABLE          __HAL_RCC_HASH_CLK_ENABLE
-#define __HASH_FORCE_RESET          __HAL_RCC_HASH_FORCE_RESET
-#define __HASH_RELEASE_RESET          __HAL_RCC_HASH_RELEASE_RESET
-#define __HASH_CLK_SLEEP_ENABLE          __HAL_RCC_HASH_CLK_SLEEP_ENABLE
-#define __HASH_CLK_SLEEP_DISABLE  __HAL_RCC_HASH_CLK_SLEEP_DISABLE
-#define __HASH_CLK_DISABLE            __HAL_RCC_HASH_CLK_DISABLE  
-#define __SPI5_CLK_ENABLE          __HAL_RCC_SPI5_CLK_ENABLE
-#define __SPI5_CLK_DISABLE              __HAL_RCC_SPI5_CLK_DISABLE
-#define __SPI5_FORCE_RESET          __HAL_RCC_SPI5_FORCE_RESET
-#define __SPI5_RELEASE_RESET          __HAL_RCC_SPI5_RELEASE_RESET
-#define __SPI5_CLK_SLEEP_ENABLE          __HAL_RCC_SPI5_CLK_SLEEP_ENABLE
-#define __SPI5_CLK_SLEEP_DISABLE  __HAL_RCC_SPI5_CLK_SLEEP_DISABLE  
-#define __SPI6_CLK_ENABLE          __HAL_RCC_SPI6_CLK_ENABLE
-#define __SPI6_CLK_DISABLE          __HAL_RCC_SPI6_CLK_DISABLE
-#define __SPI6_FORCE_RESET          __HAL_RCC_SPI6_FORCE_RESET
-#define __SPI6_RELEASE_RESET         __HAL_RCC_SPI6_RELEASE_RESET
-#define __SPI6_CLK_SLEEP_ENABLE          __HAL_RCC_SPI6_CLK_SLEEP_ENABLE
-#define __SPI6_CLK_SLEEP_DISABLE  __HAL_RCC_SPI6_CLK_SLEEP_DISABLE  
-#define __LTDC_CLK_ENABLE          __HAL_RCC_LTDC_CLK_ENABLE
-#define __LTDC_CLK_DISABLE          __HAL_RCC_LTDC_CLK_DISABLE
-#define __LTDC_FORCE_RESET          __HAL_RCC_LTDC_FORCE_RESET
-#define __LTDC_RELEASE_RESET          __HAL_RCC_LTDC_RELEASE_RESET
-#define __LTDC_CLK_SLEEP_ENABLE          __HAL_RCC_LTDC_CLK_SLEEP_ENABLE  
-#define __ETHMAC_CLK_SLEEP_ENABLE  __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE
-#define __ETHMAC_CLK_SLEEP_DISABLE  __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE  
-#define __ETHMACTX_CLK_SLEEP_ENABLE  __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE
-#define __ETHMACTX_CLK_SLEEP_DISABLE  __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE  
-#define __ETHMACRX_CLK_SLEEP_ENABLE  __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE
-#define __ETHMACRX_CLK_SLEEP_DISABLE  __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE  
-#define __TIM12_CLK_SLEEP_ENABLE  __HAL_RCC_TIM12_CLK_SLEEP_ENABLE
-#define __TIM12_CLK_SLEEP_DISABLE  __HAL_RCC_TIM12_CLK_SLEEP_DISABLE  
-#define __TIM13_CLK_SLEEP_ENABLE  __HAL_RCC_TIM13_CLK_SLEEP_ENABLE
-#define __TIM13_CLK_SLEEP_DISABLE  __HAL_RCC_TIM13_CLK_SLEEP_DISABLE  
-#define __TIM14_CLK_SLEEP_ENABLE  __HAL_RCC_TIM14_CLK_SLEEP_ENABLE
-#define __TIM14_CLK_SLEEP_DISABLE  __HAL_RCC_TIM14_CLK_SLEEP_DISABLE  
-#define __BKPSRAM_CLK_ENABLE          __HAL_RCC_BKPSRAM_CLK_ENABLE
-#define __BKPSRAM_CLK_DISABLE          __HAL_RCC_BKPSRAM_CLK_DISABLE
-#define __BKPSRAM_CLK_SLEEP_ENABLE  __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE
-#define __BKPSRAM_CLK_SLEEP_DISABLE  __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE  
-#define __CCMDATARAMEN_CLK_ENABLE  __HAL_RCC_CCMDATARAMEN_CLK_ENABLE
-#define __CCMDATARAMEN_CLK_DISABLE  __HAL_RCC_CCMDATARAMEN_CLK_DISABLE  
-#define __USART6_CLK_ENABLE          __HAL_RCC_USART6_CLK_ENABLE
-#define __USART6_CLK_DISABLE          __HAL_RCC_USART6_CLK_DISABLE
-#define __USART6_FORCE_RESET        __HAL_RCC_USART6_FORCE_RESET
-#define __USART6_RELEASE_RESET        __HAL_RCC_USART6_RELEASE_RESET
-#define __USART6_CLK_SLEEP_ENABLE  __HAL_RCC_USART6_CLK_SLEEP_ENABLE
-#define __USART6_CLK_SLEEP_DISABLE  __HAL_RCC_USART6_CLK_SLEEP_DISABLE  
-#define __SPI4_CLK_ENABLE          __HAL_RCC_SPI4_CLK_ENABLE
-#define __SPI4_CLK_DISABLE          __HAL_RCC_SPI4_CLK_DISABLE
-#define __SPI4_FORCE_RESET          __HAL_RCC_SPI4_FORCE_RESET
-#define __SPI4_RELEASE_RESET        __HAL_RCC_SPI4_RELEASE_RESET
-#define __SPI4_CLK_SLEEP_ENABLE   __HAL_RCC_SPI4_CLK_SLEEP_ENABLE
-#define __SPI4_CLK_SLEEP_DISABLE  __HAL_RCC_SPI4_CLK_SLEEP_DISABLE  
-#define __GPIOI_CLK_ENABLE          __HAL_RCC_GPIOI_CLK_ENABLE
-#define __GPIOI_CLK_DISABLE          __HAL_RCC_GPIOI_CLK_DISABLE
-#define __GPIOI_FORCE_RESET          __HAL_RCC_GPIOI_FORCE_RESET
-#define __GPIOI_RELEASE_RESET          __HAL_RCC_GPIOI_RELEASE_RESET
-#define __GPIOI_CLK_SLEEP_ENABLE  __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE
-#define __GPIOI_CLK_SLEEP_DISABLE  __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE  
-#define __GPIOJ_CLK_ENABLE          __HAL_RCC_GPIOJ_CLK_ENABLE
-#define __GPIOJ_CLK_DISABLE          __HAL_RCC_GPIOJ_CLK_DISABLE
-#define __GPIOJ_FORCE_RESET         __HAL_RCC_GPIOJ_FORCE_RESET
-#define __GPIOJ_RELEASE_RESET          __HAL_RCC_GPIOJ_RELEASE_RESET
-#define __GPIOJ_CLK_SLEEP_ENABLE  __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE
-#define __GPIOJ_CLK_SLEEP_DISABLE  __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE  
-#define __GPIOK_CLK_ENABLE          __HAL_RCC_GPIOK_CLK_ENABLE
-#define __GPIOK_CLK_DISABLE          __HAL_RCC_GPIOK_CLK_DISABLE
-#define __GPIOK_RELEASE_RESET          __HAL_RCC_GPIOK_RELEASE_RESET
-#define __GPIOK_CLK_SLEEP_ENABLE  __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE
-#define __GPIOK_CLK_SLEEP_DISABLE  __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE  
-#define __ETH_CLK_ENABLE          __HAL_RCC_ETH_CLK_ENABLE
-#define __ETH_CLK_DISABLE          __HAL_RCC_ETH_CLK_DISABLE  
-#define __DCMI_CLK_ENABLE          __HAL_RCC_DCMI_CLK_ENABLE
-#define __DCMI_CLK_DISABLE          __HAL_RCC_DCMI_CLK_DISABLE
-#define __DCMI_FORCE_RESET          __HAL_RCC_DCMI_FORCE_RESET
-#define __DCMI_RELEASE_RESET          __HAL_RCC_DCMI_RELEASE_RESET
-#define __DCMI_CLK_SLEEP_ENABLE   __HAL_RCC_DCMI_CLK_SLEEP_ENABLE
-#define __DCMI_CLK_SLEEP_DISABLE  __HAL_RCC_DCMI_CLK_SLEEP_DISABLE  
-#define __UART7_CLK_ENABLE          __HAL_RCC_UART7_CLK_ENABLE
-#define __UART7_CLK_DISABLE          __HAL_RCC_UART7_CLK_DISABLE
-#define __UART7_RELEASE_RESET       __HAL_RCC_UART7_RELEASE_RESET
-#define __UART7_FORCE_RESET       __HAL_RCC_UART7_FORCE_RESET
-#define __UART7_CLK_SLEEP_ENABLE  __HAL_RCC_UART7_CLK_SLEEP_ENABLE
-#define __UART7_CLK_SLEEP_DISABLE  __HAL_RCC_UART7_CLK_SLEEP_DISABLE  
-#define __UART8_CLK_ENABLE          __HAL_RCC_UART8_CLK_ENABLE
-#define __UART8_CLK_DISABLE          __HAL_RCC_UART8_CLK_DISABLE
-#define __UART8_FORCE_RESET          __HAL_RCC_UART8_FORCE_RESET
-#define __UART8_RELEASE_RESET          __HAL_RCC_UART8_RELEASE_RESET
-#define __UART8_CLK_SLEEP_ENABLE  __HAL_RCC_UART8_CLK_SLEEP_ENABLE
-#define __UART8_CLK_SLEEP_DISABLE  __HAL_RCC_UART8_CLK_SLEEP_DISABLE  
-#define __OTGHS_CLK_SLEEP_ENABLE  __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
-#define __OTGHS_CLK_SLEEP_DISABLE  __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
-#define __OTGHS_FORCE_RESET          __HAL_RCC_USB_OTG_HS_FORCE_RESET
-#define __OTGHS_RELEASE_RESET          __HAL_RCC_USB_OTG_HS_RELEASE_RESET  
-#define __OTGHSULPI_CLK_SLEEP_ENABLE  __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
-#define __OTGHSULPI_CLK_SLEEP_DISABLE  __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
-#define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE  __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
-#define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE  __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
-#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED
-#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED
-#define __HAL_RCC_OTGHS_FORCE_RESET          __HAL_RCC_USB_OTG_HS_FORCE_RESET
-#define __HAL_RCC_OTGHS_RELEASE_RESET          __HAL_RCC_USB_OTG_HS_RELEASE_RESET  
-#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE      __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
-#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE     __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE 
-#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED  __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED
-#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED   
-#define __SRAM3_CLK_SLEEP_ENABLE       __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE  
-#define __CAN2_CLK_SLEEP_ENABLE        __HAL_RCC_CAN2_CLK_SLEEP_ENABLE
-#define __CAN2_CLK_SLEEP_DISABLE       __HAL_RCC_CAN2_CLK_SLEEP_DISABLE  
-#define __DAC_CLK_SLEEP_ENABLE         __HAL_RCC_DAC_CLK_SLEEP_ENABLE
-#define __DAC_CLK_SLEEP_DISABLE        __HAL_RCC_DAC_CLK_SLEEP_DISABLE  
-#define __ADC2_CLK_SLEEP_ENABLE        __HAL_RCC_ADC2_CLK_SLEEP_ENABLE
-#define __ADC2_CLK_SLEEP_DISABLE       __HAL_RCC_ADC2_CLK_SLEEP_DISABLE  
-#define __ADC3_CLK_SLEEP_ENABLE        __HAL_RCC_ADC3_CLK_SLEEP_ENABLE
-#define __ADC3_CLK_SLEEP_DISABLE       __HAL_RCC_ADC3_CLK_SLEEP_DISABLE  
-#define __FSMC_FORCE_RESET             __HAL_RCC_FSMC_FORCE_RESET
-#define __FSMC_RELEASE_RESET           __HAL_RCC_FSMC_RELEASE_RESET
-#define __FSMC_CLK_SLEEP_ENABLE        __HAL_RCC_FSMC_CLK_SLEEP_ENABLE
-#define __FSMC_CLK_SLEEP_DISABLE       __HAL_RCC_FSMC_CLK_SLEEP_DISABLE  
-#define __SDIO_FORCE_RESET             __HAL_RCC_SDIO_FORCE_RESET
-#define __SDIO_RELEASE_RESET           __HAL_RCC_SDIO_RELEASE_RESET
-#define __SDIO_CLK_SLEEP_DISABLE       __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
-#define __SDIO_CLK_SLEEP_ENABLE        __HAL_RCC_SDIO_CLK_SLEEP_ENABLE  
-#define __DMA2D_CLK_ENABLE             __HAL_RCC_DMA2D_CLK_ENABLE
-#define __DMA2D_CLK_DISABLE            __HAL_RCC_DMA2D_CLK_DISABLE
-#define __DMA2D_FORCE_RESET            __HAL_RCC_DMA2D_FORCE_RESET
-#define __DMA2D_RELEASE_RESET          __HAL_RCC_DMA2D_RELEASE_RESET
-#define __DMA2D_CLK_SLEEP_ENABLE       __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE
-#define __DMA2D_CLK_SLEEP_DISABLE      __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE
-
-/* alias define maintained for legacy */
-#define __HAL_RCC_OTGFS_FORCE_RESET    __HAL_RCC_USB_OTG_FS_FORCE_RESET
-#define __HAL_RCC_OTGFS_RELEASE_RESET  __HAL_RCC_USB_OTG_FS_RELEASE_RESET
-
-#define __ADC12_CLK_ENABLE          __HAL_RCC_ADC12_CLK_ENABLE
-#define __ADC12_CLK_DISABLE         __HAL_RCC_ADC12_CLK_DISABLE
-#define __ADC34_CLK_ENABLE          __HAL_RCC_ADC34_CLK_ENABLE
-#define __ADC34_CLK_DISABLE         __HAL_RCC_ADC34_CLK_DISABLE
-#define __DAC2_CLK_ENABLE           __HAL_RCC_DAC2_CLK_ENABLE
-#define __DAC2_CLK_DISABLE          __HAL_RCC_DAC2_CLK_DISABLE
-#define __TIM18_CLK_ENABLE          __HAL_RCC_TIM18_CLK_ENABLE
-#define __TIM18_CLK_DISABLE         __HAL_RCC_TIM18_CLK_DISABLE
-#define __TIM19_CLK_ENABLE          __HAL_RCC_TIM19_CLK_ENABLE
-#define __TIM19_CLK_DISABLE         __HAL_RCC_TIM19_CLK_DISABLE
-#define __TIM20_CLK_ENABLE          __HAL_RCC_TIM20_CLK_ENABLE
-#define __TIM20_CLK_DISABLE         __HAL_RCC_TIM20_CLK_DISABLE
-#define __HRTIM1_CLK_ENABLE         __HAL_RCC_HRTIM1_CLK_ENABLE
-#define __HRTIM1_CLK_DISABLE        __HAL_RCC_HRTIM1_CLK_DISABLE
-#define __SDADC1_CLK_ENABLE         __HAL_RCC_SDADC1_CLK_ENABLE
-#define __SDADC2_CLK_ENABLE         __HAL_RCC_SDADC2_CLK_ENABLE
-#define __SDADC3_CLK_ENABLE         __HAL_RCC_SDADC3_CLK_ENABLE
-#define __SDADC1_CLK_DISABLE        __HAL_RCC_SDADC1_CLK_DISABLE
-#define __SDADC2_CLK_DISABLE        __HAL_RCC_SDADC2_CLK_DISABLE
-#define __SDADC3_CLK_DISABLE        __HAL_RCC_SDADC3_CLK_DISABLE
-
-#define __ADC12_FORCE_RESET         __HAL_RCC_ADC12_FORCE_RESET
-#define __ADC12_RELEASE_RESET       __HAL_RCC_ADC12_RELEASE_RESET
-#define __ADC34_FORCE_RESET         __HAL_RCC_ADC34_FORCE_RESET
-#define __ADC34_RELEASE_RESET       __HAL_RCC_ADC34_RELEASE_RESET
-#define __DAC2_FORCE_RESET          __HAL_RCC_DAC2_FORCE_RESET
-#define __DAC2_RELEASE_RESET        __HAL_RCC_DAC2_RELEASE_RESET
-#define __TIM18_FORCE_RESET         __HAL_RCC_TIM18_FORCE_RESET
-#define __TIM18_RELEASE_RESET       __HAL_RCC_TIM18_RELEASE_RESET
-#define __TIM19_FORCE_RESET         __HAL_RCC_TIM19_FORCE_RESET
-#define __TIM19_RELEASE_RESET       __HAL_RCC_TIM19_RELEASE_RESET
-#define __TIM20_FORCE_RESET         __HAL_RCC_TIM20_FORCE_RESET
-#define __TIM20_RELEASE_RESET       __HAL_RCC_TIM20_RELEASE_RESET
-#define __HRTIM1_FORCE_RESET        __HAL_RCC_HRTIM1_FORCE_RESET
-#define __HRTIM1_RELEASE_RESET      __HAL_RCC_HRTIM1_RELEASE_RESET
-#define __SDADC1_FORCE_RESET        __HAL_RCC_SDADC1_FORCE_RESET
-#define __SDADC2_FORCE_RESET        __HAL_RCC_SDADC2_FORCE_RESET
-#define __SDADC3_FORCE_RESET        __HAL_RCC_SDADC3_FORCE_RESET
-#define __SDADC1_RELEASE_RESET      __HAL_RCC_SDADC1_RELEASE_RESET
-#define __SDADC2_RELEASE_RESET      __HAL_RCC_SDADC2_RELEASE_RESET
-#define __SDADC3_RELEASE_RESET      __HAL_RCC_SDADC3_RELEASE_RESET
-
-#define __ADC1_IS_CLK_ENABLED       __HAL_RCC_ADC1_IS_CLK_ENABLED
-#define __ADC1_IS_CLK_DISABLED      __HAL_RCC_ADC1_IS_CLK_DISABLED
-#define __ADC12_IS_CLK_ENABLED      __HAL_RCC_ADC12_IS_CLK_ENABLED
-#define __ADC12_IS_CLK_DISABLED     __HAL_RCC_ADC12_IS_CLK_DISABLED
-#define __ADC34_IS_CLK_ENABLED      __HAL_RCC_ADC34_IS_CLK_ENABLED
-#define __ADC34_IS_CLK_DISABLED     __HAL_RCC_ADC34_IS_CLK_DISABLED
-#define __CEC_IS_CLK_ENABLED        __HAL_RCC_CEC_IS_CLK_ENABLED
-#define __CEC_IS_CLK_DISABLED       __HAL_RCC_CEC_IS_CLK_DISABLED
-#define __CRC_IS_CLK_ENABLED        __HAL_RCC_CRC_IS_CLK_ENABLED
-#define __CRC_IS_CLK_DISABLED       __HAL_RCC_CRC_IS_CLK_DISABLED
-#define __DAC1_IS_CLK_ENABLED       __HAL_RCC_DAC1_IS_CLK_ENABLED
-#define __DAC1_IS_CLK_DISABLED      __HAL_RCC_DAC1_IS_CLK_DISABLED
-#define __DAC2_IS_CLK_ENABLED       __HAL_RCC_DAC2_IS_CLK_ENABLED
-#define __DAC2_IS_CLK_DISABLED      __HAL_RCC_DAC2_IS_CLK_DISABLED
-#define __DMA1_IS_CLK_ENABLED       __HAL_RCC_DMA1_IS_CLK_ENABLED
-#define __DMA1_IS_CLK_DISABLED      __HAL_RCC_DMA1_IS_CLK_DISABLED
-#define __DMA2_IS_CLK_ENABLED       __HAL_RCC_DMA2_IS_CLK_ENABLED
-#define __DMA2_IS_CLK_DISABLED      __HAL_RCC_DMA2_IS_CLK_DISABLED
-#define __FLITF_IS_CLK_ENABLED      __HAL_RCC_FLITF_IS_CLK_ENABLED
-#define __FLITF_IS_CLK_DISABLED     __HAL_RCC_FLITF_IS_CLK_DISABLED
-#define __FMC_IS_CLK_ENABLED        __HAL_RCC_FMC_IS_CLK_ENABLED
-#define __FMC_IS_CLK_DISABLED       __HAL_RCC_FMC_IS_CLK_DISABLED
-#define __GPIOA_IS_CLK_ENABLED      __HAL_RCC_GPIOA_IS_CLK_ENABLED
-#define __GPIOA_IS_CLK_DISABLED     __HAL_RCC_GPIOA_IS_CLK_DISABLED
-#define __GPIOB_IS_CLK_ENABLED      __HAL_RCC_GPIOB_IS_CLK_ENABLED
-#define __GPIOB_IS_CLK_DISABLED     __HAL_RCC_GPIOB_IS_CLK_DISABLED
-#define __GPIOC_IS_CLK_ENABLED      __HAL_RCC_GPIOC_IS_CLK_ENABLED
-#define __GPIOC_IS_CLK_DISABLED     __HAL_RCC_GPIOC_IS_CLK_DISABLED
-#define __GPIOD_IS_CLK_ENABLED      __HAL_RCC_GPIOD_IS_CLK_ENABLED
-#define __GPIOD_IS_CLK_DISABLED     __HAL_RCC_GPIOD_IS_CLK_DISABLED
-#define __GPIOE_IS_CLK_ENABLED      __HAL_RCC_GPIOE_IS_CLK_ENABLED
-#define __GPIOE_IS_CLK_DISABLED     __HAL_RCC_GPIOE_IS_CLK_DISABLED
-#define __GPIOF_IS_CLK_ENABLED      __HAL_RCC_GPIOF_IS_CLK_ENABLED
-#define __GPIOF_IS_CLK_DISABLED     __HAL_RCC_GPIOF_IS_CLK_DISABLED
-#define __GPIOG_IS_CLK_ENABLED      __HAL_RCC_GPIOG_IS_CLK_ENABLED
-#define __GPIOG_IS_CLK_DISABLED     __HAL_RCC_GPIOG_IS_CLK_DISABLED
-#define __GPIOH_IS_CLK_ENABLED      __HAL_RCC_GPIOH_IS_CLK_ENABLED
-#define __GPIOH_IS_CLK_DISABLED     __HAL_RCC_GPIOH_IS_CLK_DISABLED
-#define __HRTIM1_IS_CLK_ENABLED     __HAL_RCC_HRTIM1_IS_CLK_ENABLED
-#define __HRTIM1_IS_CLK_DISABLED    __HAL_RCC_HRTIM1_IS_CLK_DISABLED
-#define __I2C1_IS_CLK_ENABLED       __HAL_RCC_I2C1_IS_CLK_ENABLED
-#define __I2C1_IS_CLK_DISABLED      __HAL_RCC_I2C1_IS_CLK_DISABLED
-#define __I2C2_IS_CLK_ENABLED       __HAL_RCC_I2C2_IS_CLK_ENABLED
-#define __I2C2_IS_CLK_DISABLED      __HAL_RCC_I2C2_IS_CLK_DISABLED
-#define __I2C3_IS_CLK_ENABLED       __HAL_RCC_I2C3_IS_CLK_ENABLED
-#define __I2C3_IS_CLK_DISABLED      __HAL_RCC_I2C3_IS_CLK_DISABLED
-#define __PWR_IS_CLK_ENABLED        __HAL_RCC_PWR_IS_CLK_ENABLED
-#define __PWR_IS_CLK_DISABLED       __HAL_RCC_PWR_IS_CLK_DISABLED
-#define __SYSCFG_IS_CLK_ENABLED     __HAL_RCC_SYSCFG_IS_CLK_ENABLED
-#define __SYSCFG_IS_CLK_DISABLED    __HAL_RCC_SYSCFG_IS_CLK_DISABLED
-#define __SPI1_IS_CLK_ENABLED       __HAL_RCC_SPI1_IS_CLK_ENABLED
-#define __SPI1_IS_CLK_DISABLED      __HAL_RCC_SPI1_IS_CLK_DISABLED
-#define __SPI2_IS_CLK_ENABLED       __HAL_RCC_SPI2_IS_CLK_ENABLED
-#define __SPI2_IS_CLK_DISABLED      __HAL_RCC_SPI2_IS_CLK_DISABLED
-#define __SPI3_IS_CLK_ENABLED       __HAL_RCC_SPI3_IS_CLK_ENABLED
-#define __SPI3_IS_CLK_DISABLED      __HAL_RCC_SPI3_IS_CLK_DISABLED
-#define __SPI4_IS_CLK_ENABLED       __HAL_RCC_SPI4_IS_CLK_ENABLED
-#define __SPI4_IS_CLK_DISABLED      __HAL_RCC_SPI4_IS_CLK_DISABLED
-#define __SDADC1_IS_CLK_ENABLED     __HAL_RCC_SDADC1_IS_CLK_ENABLED
-#define __SDADC1_IS_CLK_DISABLED    __HAL_RCC_SDADC1_IS_CLK_DISABLED
-#define __SDADC2_IS_CLK_ENABLED     __HAL_RCC_SDADC2_IS_CLK_ENABLED
-#define __SDADC2_IS_CLK_DISABLED    __HAL_RCC_SDADC2_IS_CLK_DISABLED
-#define __SDADC3_IS_CLK_ENABLED     __HAL_RCC_SDADC3_IS_CLK_ENABLED
-#define __SDADC3_IS_CLK_DISABLED    __HAL_RCC_SDADC3_IS_CLK_DISABLED
-#define __SRAM_IS_CLK_ENABLED       __HAL_RCC_SRAM_IS_CLK_ENABLED
-#define __SRAM_IS_CLK_DISABLED      __HAL_RCC_SRAM_IS_CLK_DISABLED
-#define __TIM1_IS_CLK_ENABLED       __HAL_RCC_TIM1_IS_CLK_ENABLED
-#define __TIM1_IS_CLK_DISABLED      __HAL_RCC_TIM1_IS_CLK_DISABLED
-#define __TIM2_IS_CLK_ENABLED       __HAL_RCC_TIM2_IS_CLK_ENABLED
-#define __TIM2_IS_CLK_DISABLED      __HAL_RCC_TIM2_IS_CLK_DISABLED
-#define __TIM3_IS_CLK_ENABLED       __HAL_RCC_TIM3_IS_CLK_ENABLED
-#define __TIM3_IS_CLK_DISABLED      __HAL_RCC_TIM3_IS_CLK_DISABLED
-#define __TIM4_IS_CLK_ENABLED       __HAL_RCC_TIM4_IS_CLK_ENABLED
-#define __TIM4_IS_CLK_DISABLED      __HAL_RCC_TIM4_IS_CLK_DISABLED
-#define __TIM5_IS_CLK_ENABLED       __HAL_RCC_TIM5_IS_CLK_ENABLED
-#define __TIM5_IS_CLK_DISABLED      __HAL_RCC_TIM5_IS_CLK_DISABLED
-#define __TIM6_IS_CLK_ENABLED       __HAL_RCC_TIM6_IS_CLK_ENABLED
-#define __TIM6_IS_CLK_DISABLED      __HAL_RCC_TIM6_IS_CLK_DISABLED
-#define __TIM7_IS_CLK_ENABLED       __HAL_RCC_TIM7_IS_CLK_ENABLED
-#define __TIM7_IS_CLK_DISABLED      __HAL_RCC_TIM7_IS_CLK_DISABLED
-#define __TIM8_IS_CLK_ENABLED       __HAL_RCC_TIM8_IS_CLK_ENABLED
-#define __TIM8_IS_CLK_DISABLED      __HAL_RCC_TIM8_IS_CLK_DISABLED
-#define __TIM12_IS_CLK_ENABLED      __HAL_RCC_TIM12_IS_CLK_ENABLED
-#define __TIM12_IS_CLK_DISABLED     __HAL_RCC_TIM12_IS_CLK_DISABLED
-#define __TIM13_IS_CLK_ENABLED      __HAL_RCC_TIM13_IS_CLK_ENABLED
-#define __TIM13_IS_CLK_DISABLED     __HAL_RCC_TIM13_IS_CLK_DISABLED
-#define __TIM14_IS_CLK_ENABLED      __HAL_RCC_TIM14_IS_CLK_ENABLED
-#define __TIM14_IS_CLK_DISABLED     __HAL_RCC_TIM14_IS_CLK_DISABLED
-#define __TIM15_IS_CLK_ENABLED      __HAL_RCC_TIM15_IS_CLK_ENABLED
-#define __TIM15_IS_CLK_DISABLED     __HAL_RCC_TIM15_IS_CLK_DISABLED
-#define __TIM16_IS_CLK_ENABLED      __HAL_RCC_TIM16_IS_CLK_ENABLED
-#define __TIM16_IS_CLK_DISABLED     __HAL_RCC_TIM16_IS_CLK_DISABLED
-#define __TIM17_IS_CLK_ENABLED      __HAL_RCC_TIM17_IS_CLK_ENABLED
-#define __TIM17_IS_CLK_DISABLED     __HAL_RCC_TIM17_IS_CLK_DISABLED
-#define __TIM18_IS_CLK_ENABLED      __HAL_RCC_TIM18_IS_CLK_ENABLED
-#define __TIM18_IS_CLK_DISABLED     __HAL_RCC_TIM18_IS_CLK_DISABLED
-#define __TIM19_IS_CLK_ENABLED      __HAL_RCC_TIM19_IS_CLK_ENABLED
-#define __TIM19_IS_CLK_DISABLED     __HAL_RCC_TIM19_IS_CLK_DISABLED
-#define __TIM20_IS_CLK_ENABLED      __HAL_RCC_TIM20_IS_CLK_ENABLED
-#define __TIM20_IS_CLK_DISABLED     __HAL_RCC_TIM20_IS_CLK_DISABLED
-#define __TSC_IS_CLK_ENABLED        __HAL_RCC_TSC_IS_CLK_ENABLED
-#define __TSC_IS_CLK_DISABLED       __HAL_RCC_TSC_IS_CLK_DISABLED
-#define __UART4_IS_CLK_ENABLED      __HAL_RCC_UART4_IS_CLK_ENABLED
-#define __UART4_IS_CLK_DISABLED     __HAL_RCC_UART4_IS_CLK_DISABLED
-#define __UART5_IS_CLK_ENABLED      __HAL_RCC_UART5_IS_CLK_ENABLED
-#define __UART5_IS_CLK_DISABLED     __HAL_RCC_UART5_IS_CLK_DISABLED
-#define __USART1_IS_CLK_ENABLED     __HAL_RCC_USART1_IS_CLK_ENABLED
-#define __USART1_IS_CLK_DISABLED    __HAL_RCC_USART1_IS_CLK_DISABLED
-#define __USART2_IS_CLK_ENABLED     __HAL_RCC_USART2_IS_CLK_ENABLED
-#define __USART2_IS_CLK_DISABLED    __HAL_RCC_USART2_IS_CLK_DISABLED
-#define __USART3_IS_CLK_ENABLED     __HAL_RCC_USART3_IS_CLK_ENABLED
-#define __USART3_IS_CLK_DISABLED    __HAL_RCC_USART3_IS_CLK_DISABLED
-#define __USB_IS_CLK_ENABLED        __HAL_RCC_USB_IS_CLK_ENABLED
-#define __USB_IS_CLK_DISABLED       __HAL_RCC_USB_IS_CLK_DISABLED
-#define __WWDG_IS_CLK_ENABLED       __HAL_RCC_WWDG_IS_CLK_ENABLED
-#define __WWDG_IS_CLK_DISABLED      __HAL_RCC_WWDG_IS_CLK_DISABLED
-
-#if defined(STM32F4)
-#define __HAL_RCC_SDMMC1_FORCE_RESET       __HAL_RCC_SDIO_FORCE_RESET
-#define __HAL_RCC_SDMMC1_RELEASE_RESET     __HAL_RCC_SDIO_RELEASE_RESET
-#define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE  __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
-#define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
-#define __HAL_RCC_SDMMC1_CLK_ENABLE        __HAL_RCC_SDIO_CLK_ENABLE
-#define __HAL_RCC_SDMMC1_CLK_DISABLE       __HAL_RCC_SDIO_CLK_DISABLE
-#define __HAL_RCC_SDMMC1_IS_CLK_ENABLED    __HAL_RCC_SDIO_IS_CLK_ENABLED
-#define __HAL_RCC_SDMMC1_IS_CLK_DISABLED   __HAL_RCC_SDIO_IS_CLK_DISABLED
-#define Sdmmc1ClockSelection               SdioClockSelection
-#define RCC_PERIPHCLK_SDMMC1               RCC_PERIPHCLK_SDIO
-#define RCC_SDMMC1CLKSOURCE_CLK48          RCC_SDIOCLKSOURCE_CK48
-#define RCC_SDMMC1CLKSOURCE_SYSCLK         RCC_SDIOCLKSOURCE_SYSCLK
-#define __HAL_RCC_SDMMC1_CONFIG            __HAL_RCC_SDIO_CONFIG
-#define __HAL_RCC_GET_SDMMC1_SOURCE        __HAL_RCC_GET_SDIO_SOURCE
-#endif
-
-#if defined(STM32F7) || defined(STM32L4)
-#define __HAL_RCC_SDIO_FORCE_RESET         __HAL_RCC_SDMMC1_FORCE_RESET
-#define __HAL_RCC_SDIO_RELEASE_RESET       __HAL_RCC_SDMMC1_RELEASE_RESET
-#define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE    __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE
-#define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE   __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE
-#define __HAL_RCC_SDIO_CLK_ENABLE          __HAL_RCC_SDMMC1_CLK_ENABLE
-#define __HAL_RCC_SDIO_CLK_DISABLE         __HAL_RCC_SDMMC1_CLK_DISABLE
-#define __HAL_RCC_SDIO_IS_CLK_ENABLED      __HAL_RCC_SDMMC1_IS_CLK_ENABLED
-#define __HAL_RCC_SDIO_IS_CLK_DISABLED     __HAL_RCC_SDMMC1_IS_CLK_DISABLED
-#define SdioClockSelection                 Sdmmc1ClockSelection
-#define RCC_PERIPHCLK_SDIO                 RCC_PERIPHCLK_SDMMC1
-#define __HAL_RCC_SDIO_CONFIG              __HAL_RCC_SDMMC1_CONFIG
-#define __HAL_RCC_GET_SDIO_SOURCE          __HAL_RCC_GET_SDMMC1_SOURCE	
-#endif
-
-#if defined(STM32F7)
-#define RCC_SDIOCLKSOURCE_CLK48             RCC_SDMMC1CLKSOURCE_CLK48
-#define RCC_SDIOCLKSOURCE_SYSCLK           RCC_SDMMC1CLKSOURCE_SYSCLK
-#endif
-
-#define __HAL_RCC_I2SCLK            __HAL_RCC_I2S_CONFIG
-#define __HAL_RCC_I2SCLK_CONFIG     __HAL_RCC_I2S_CONFIG
-
-#define __RCC_PLLSRC                RCC_GET_PLL_OSCSOURCE
-
-#define IS_RCC_MSIRANGE             IS_RCC_MSI_CLOCK_RANGE
-#define IS_RCC_RTCCLK_SOURCE        IS_RCC_RTCCLKSOURCE
-#define IS_RCC_SYSCLK_DIV           IS_RCC_HCLK
-#define IS_RCC_HCLK_DIV             IS_RCC_PCLK
-#define IS_RCC_PERIPHCLK            IS_RCC_PERIPHCLOCK
-
-#define RCC_IT_HSI14                RCC_IT_HSI14RDY
-
-#define RCC_IT_CSSLSE               RCC_IT_LSECSS
-#define RCC_IT_CSSHSE               RCC_IT_CSS
-
-#define RCC_PLLMUL_3                RCC_PLL_MUL3
-#define RCC_PLLMUL_4                RCC_PLL_MUL4
-#define RCC_PLLMUL_6                RCC_PLL_MUL6
-#define RCC_PLLMUL_8                RCC_PLL_MUL8
-#define RCC_PLLMUL_12               RCC_PLL_MUL12
-#define RCC_PLLMUL_16               RCC_PLL_MUL16
-#define RCC_PLLMUL_24               RCC_PLL_MUL24
-#define RCC_PLLMUL_32               RCC_PLL_MUL32
-#define RCC_PLLMUL_48               RCC_PLL_MUL48
-
-#define RCC_PLLDIV_2                RCC_PLL_DIV2
-#define RCC_PLLDIV_3                RCC_PLL_DIV3
-#define RCC_PLLDIV_4                RCC_PLL_DIV4
-
-#define IS_RCC_MCOSOURCE            IS_RCC_MCO1SOURCE
-#define __HAL_RCC_MCO_CONFIG        __HAL_RCC_MCO1_CONFIG
-#define RCC_MCO_NODIV               RCC_MCODIV_1
-#define RCC_MCO_DIV1                RCC_MCODIV_1
-#define RCC_MCO_DIV2                RCC_MCODIV_2
-#define RCC_MCO_DIV4                RCC_MCODIV_4
-#define RCC_MCO_DIV8                RCC_MCODIV_8
-#define RCC_MCO_DIV16               RCC_MCODIV_16
-#define RCC_MCO_DIV32               RCC_MCODIV_32
-#define RCC_MCO_DIV64               RCC_MCODIV_64
-#define RCC_MCO_DIV128              RCC_MCODIV_128
-#define RCC_MCOSOURCE_NONE          RCC_MCO1SOURCE_NOCLOCK
-#define RCC_MCOSOURCE_LSI           RCC_MCO1SOURCE_LSI
-#define RCC_MCOSOURCE_LSE           RCC_MCO1SOURCE_LSE
-#define RCC_MCOSOURCE_SYSCLK        RCC_MCO1SOURCE_SYSCLK
-#define RCC_MCOSOURCE_HSI           RCC_MCO1SOURCE_HSI
-#define RCC_MCOSOURCE_HSI14         RCC_MCO1SOURCE_HSI14
-#define RCC_MCOSOURCE_HSI48         RCC_MCO1SOURCE_HSI48
-#define RCC_MCOSOURCE_HSE           RCC_MCO1SOURCE_HSE
-#define RCC_MCOSOURCE_PLLCLK_DIV1   RCC_MCO1SOURCE_PLLCLK
-#define RCC_MCOSOURCE_PLLCLK_NODIV  RCC_MCO1SOURCE_PLLCLK
-#define RCC_MCOSOURCE_PLLCLK_DIV2   RCC_MCO1SOURCE_PLLCLK_DIV2
-
-#if defined(STM32WB) || defined(STM32G0)
-#else
-#define RCC_RTCCLKSOURCE_NONE       RCC_RTCCLKSOURCE_NO_CLK
-#endif
-
-#define RCC_USBCLK_PLLSAI1          RCC_USBCLKSOURCE_PLLSAI1
-#define RCC_USBCLK_PLL              RCC_USBCLKSOURCE_PLL
-#define RCC_USBCLK_MSI              RCC_USBCLKSOURCE_MSI
-#define RCC_USBCLKSOURCE_PLLCLK     RCC_USBCLKSOURCE_PLL
-#define RCC_USBPLLCLK_DIV1          RCC_USBCLKSOURCE_PLL
-#define RCC_USBPLLCLK_DIV1_5        RCC_USBCLKSOURCE_PLL_DIV1_5
-#define RCC_USBPLLCLK_DIV2          RCC_USBCLKSOURCE_PLL_DIV2
-#define RCC_USBPLLCLK_DIV3          RCC_USBCLKSOURCE_PLL_DIV3
-
-#define HSION_BitNumber        RCC_HSION_BIT_NUMBER
-#define HSION_BITNUMBER        RCC_HSION_BIT_NUMBER
-#define HSEON_BitNumber        RCC_HSEON_BIT_NUMBER
-#define HSEON_BITNUMBER        RCC_HSEON_BIT_NUMBER
-#define MSION_BITNUMBER        RCC_MSION_BIT_NUMBER
-#define CSSON_BitNumber        RCC_CSSON_BIT_NUMBER
-#define CSSON_BITNUMBER        RCC_CSSON_BIT_NUMBER
-#define PLLON_BitNumber        RCC_PLLON_BIT_NUMBER
-#define PLLON_BITNUMBER        RCC_PLLON_BIT_NUMBER
-#define PLLI2SON_BitNumber     RCC_PLLI2SON_BIT_NUMBER
-#define I2SSRC_BitNumber       RCC_I2SSRC_BIT_NUMBER
-#define RTCEN_BitNumber        RCC_RTCEN_BIT_NUMBER
-#define RTCEN_BITNUMBER        RCC_RTCEN_BIT_NUMBER
-#define BDRST_BitNumber        RCC_BDRST_BIT_NUMBER
-#define BDRST_BITNUMBER        RCC_BDRST_BIT_NUMBER
-#define RTCRST_BITNUMBER       RCC_RTCRST_BIT_NUMBER
-#define LSION_BitNumber        RCC_LSION_BIT_NUMBER
-#define LSION_BITNUMBER        RCC_LSION_BIT_NUMBER
-#define LSEON_BitNumber        RCC_LSEON_BIT_NUMBER
-#define LSEON_BITNUMBER        RCC_LSEON_BIT_NUMBER
-#define LSEBYP_BITNUMBER       RCC_LSEBYP_BIT_NUMBER
-#define PLLSAION_BitNumber     RCC_PLLSAION_BIT_NUMBER
-#define TIMPRE_BitNumber       RCC_TIMPRE_BIT_NUMBER
-#define RMVF_BitNumber         RCC_RMVF_BIT_NUMBER
-#define RMVF_BITNUMBER         RCC_RMVF_BIT_NUMBER
-#define RCC_CR2_HSI14TRIM_BitNumber RCC_HSI14TRIM_BIT_NUMBER
-#define CR_BYTE2_ADDRESS       RCC_CR_BYTE2_ADDRESS
-#define CIR_BYTE1_ADDRESS      RCC_CIR_BYTE1_ADDRESS
-#define CIR_BYTE2_ADDRESS      RCC_CIR_BYTE2_ADDRESS
-#define BDCR_BYTE0_ADDRESS     RCC_BDCR_BYTE0_ADDRESS
-#define DBP_TIMEOUT_VALUE      RCC_DBP_TIMEOUT_VALUE
-#define LSE_TIMEOUT_VALUE      RCC_LSE_TIMEOUT_VALUE
-
-#define CR_HSION_BB            RCC_CR_HSION_BB
-#define CR_CSSON_BB            RCC_CR_CSSON_BB
-#define CR_PLLON_BB            RCC_CR_PLLON_BB
-#define CR_PLLI2SON_BB         RCC_CR_PLLI2SON_BB
-#define CR_MSION_BB            RCC_CR_MSION_BB
-#define CSR_LSION_BB           RCC_CSR_LSION_BB
-#define CSR_LSEON_BB           RCC_CSR_LSEON_BB
-#define CSR_LSEBYP_BB          RCC_CSR_LSEBYP_BB
-#define CSR_RTCEN_BB           RCC_CSR_RTCEN_BB
-#define CSR_RTCRST_BB          RCC_CSR_RTCRST_BB
-#define CFGR_I2SSRC_BB         RCC_CFGR_I2SSRC_BB
-#define BDCR_RTCEN_BB          RCC_BDCR_RTCEN_BB
-#define BDCR_BDRST_BB          RCC_BDCR_BDRST_BB
-#define CR_HSEON_BB            RCC_CR_HSEON_BB
-#define CSR_RMVF_BB            RCC_CSR_RMVF_BB
-#define CR_PLLSAION_BB         RCC_CR_PLLSAION_BB
-#define DCKCFGR_TIMPRE_BB      RCC_DCKCFGR_TIMPRE_BB
-
-#define __HAL_RCC_CRS_ENABLE_FREQ_ERROR_COUNTER     __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE
-#define __HAL_RCC_CRS_DISABLE_FREQ_ERROR_COUNTER    __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE
-#define __HAL_RCC_CRS_ENABLE_AUTOMATIC_CALIB        __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE
-#define __HAL_RCC_CRS_DISABLE_AUTOMATIC_CALIB       __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE
-#define __HAL_RCC_CRS_CALCULATE_RELOADVALUE         __HAL_RCC_CRS_RELOADVALUE_CALCULATE
-
-#define __HAL_RCC_GET_IT_SOURCE                     __HAL_RCC_GET_IT
-
-#define RCC_CRS_SYNCWARM       RCC_CRS_SYNCWARN
-#define RCC_CRS_TRIMOV         RCC_CRS_TRIMOVF
-
-#define RCC_PERIPHCLK_CK48               RCC_PERIPHCLK_CLK48
-#define RCC_CK48CLKSOURCE_PLLQ           RCC_CLK48CLKSOURCE_PLLQ
-#define RCC_CK48CLKSOURCE_PLLSAIP        RCC_CLK48CLKSOURCE_PLLSAIP
-#define RCC_CK48CLKSOURCE_PLLI2SQ        RCC_CLK48CLKSOURCE_PLLI2SQ
-#define IS_RCC_CK48CLKSOURCE             IS_RCC_CLK48CLKSOURCE
-#define RCC_SDIOCLKSOURCE_CK48           RCC_SDIOCLKSOURCE_CLK48
-
-#define __HAL_RCC_DFSDM_CLK_ENABLE             __HAL_RCC_DFSDM1_CLK_ENABLE
-#define __HAL_RCC_DFSDM_CLK_DISABLE            __HAL_RCC_DFSDM1_CLK_DISABLE
-#define __HAL_RCC_DFSDM_IS_CLK_ENABLED         __HAL_RCC_DFSDM1_IS_CLK_ENABLED
-#define __HAL_RCC_DFSDM_IS_CLK_DISABLED        __HAL_RCC_DFSDM1_IS_CLK_DISABLED
-#define __HAL_RCC_DFSDM_FORCE_RESET            __HAL_RCC_DFSDM1_FORCE_RESET
-#define __HAL_RCC_DFSDM_RELEASE_RESET          __HAL_RCC_DFSDM1_RELEASE_RESET
-#define __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE       __HAL_RCC_DFSDM1_CLK_SLEEP_ENABLE
-#define __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE      __HAL_RCC_DFSDM1_CLK_SLEEP_DISABLE
-#define __HAL_RCC_DFSDM_IS_CLK_SLEEP_ENABLED   __HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED
-#define __HAL_RCC_DFSDM_IS_CLK_SLEEP_DISABLED  __HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED
-#define DfsdmClockSelection         Dfsdm1ClockSelection
-#define RCC_PERIPHCLK_DFSDM         RCC_PERIPHCLK_DFSDM1
-#define RCC_DFSDMCLKSOURCE_PCLK     RCC_DFSDM1CLKSOURCE_PCLK
-#define RCC_DFSDMCLKSOURCE_SYSCLK   RCC_DFSDM1CLKSOURCE_SYSCLK
-#define __HAL_RCC_DFSDM_CONFIG      __HAL_RCC_DFSDM1_CONFIG
-#define __HAL_RCC_GET_DFSDM_SOURCE  __HAL_RCC_GET_DFSDM1_SOURCE
-/**
-  * @}
-  */
-
-/** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#define  HAL_RNG_ReadyCallback(__HANDLE__)  HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit)                                       
-
-/**
-  * @}
-  */
-  
-/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#if defined (STM32G0)
-#else
-#define __HAL_RTC_CLEAR_FLAG                      __HAL_RTC_EXTI_CLEAR_FLAG
-#endif
-#define __HAL_RTC_DISABLE_IT                      __HAL_RTC_EXTI_DISABLE_IT
-#define __HAL_RTC_ENABLE_IT                       __HAL_RTC_EXTI_ENABLE_IT
-
-#if defined (STM32F1)
-#define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT)  __HAL_RTC_ALARM_EXTI_CLEAR_FLAG()
-
-#define __HAL_RTC_EXTI_ENABLE_IT(RTC_EXTI_LINE_ALARM_EVENT)   __HAL_RTC_ALARM_EXTI_ENABLE_IT()
-
-#define __HAL_RTC_EXTI_DISABLE_IT(RTC_EXTI_LINE_ALARM_EVENT)  __HAL_RTC_ALARM_EXTI_DISABLE_IT()
-
-#define __HAL_RTC_EXTI_GET_FLAG(RTC_EXTI_LINE_ALARM_EVENT)    __HAL_RTC_ALARM_EXTI_GET_FLAG()
-
-#define __HAL_RTC_EXTI_GENERATE_SWIT(RTC_EXTI_LINE_ALARM_EVENT)   __HAL_RTC_ALARM_EXTI_GENERATE_SWIT()
-#else
-#define __HAL_RTC_EXTI_CLEAR_FLAG(__EXTI_LINE__)  (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() : \
-                                                   (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() : \
-                                                      __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG()))
-#define __HAL_RTC_EXTI_ENABLE_IT(__EXTI_LINE__)   (((__EXTI_LINE__)  == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_ENABLE_IT() : \
-                                                  (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() : \
-                                                      __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT()))
-#define __HAL_RTC_EXTI_DISABLE_IT(__EXTI_LINE__)  (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_DISABLE_IT() : \
-                                                  (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() : \
-                                                      __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT()))
-#define __HAL_RTC_EXTI_GET_FLAG(__EXTI_LINE__)    (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GET_FLAG() : \
-                                                  (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() : \
-                                                      __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG()))
-#define __HAL_RTC_EXTI_GENERATE_SWIT(__EXTI_LINE__)   (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() : \
-                                                      (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() :  \
-                                                          __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
-#endif   /* STM32F1 */
-
-#define IS_ALARM                                  IS_RTC_ALARM
-#define IS_ALARM_MASK                             IS_RTC_ALARM_MASK
-#define IS_TAMPER                                 IS_RTC_TAMPER
-#define IS_TAMPER_ERASE_MODE                      IS_RTC_TAMPER_ERASE_MODE
-#define IS_TAMPER_FILTER                          IS_RTC_TAMPER_FILTER 
-#define IS_TAMPER_INTERRUPT                       IS_RTC_TAMPER_INTERRUPT
-#define IS_TAMPER_MASKFLAG_STATE                  IS_RTC_TAMPER_MASKFLAG_STATE
-#define IS_TAMPER_PRECHARGE_DURATION              IS_RTC_TAMPER_PRECHARGE_DURATION
-#define IS_TAMPER_PULLUP_STATE                    IS_RTC_TAMPER_PULLUP_STATE
-#define IS_TAMPER_SAMPLING_FREQ                   IS_RTC_TAMPER_SAMPLING_FREQ
-#define IS_TAMPER_TIMESTAMPONTAMPER_DETECTION     IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION
-#define IS_TAMPER_TRIGGER                         IS_RTC_TAMPER_TRIGGER
-#define IS_WAKEUP_CLOCK                           IS_RTC_WAKEUP_CLOCK
-#define IS_WAKEUP_COUNTER                         IS_RTC_WAKEUP_COUNTER
-
-#define __RTC_WRITEPROTECTION_ENABLE  __HAL_RTC_WRITEPROTECTION_ENABLE
-#define __RTC_WRITEPROTECTION_DISABLE  __HAL_RTC_WRITEPROTECTION_DISABLE
-
-/**
-  * @}
-  */
-
-/** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose
-  * @{
-  */
-
-#define SD_OCR_CID_CSD_OVERWRIETE   SD_OCR_CID_CSD_OVERWRITE
-#define SD_CMD_SD_APP_STAUS         SD_CMD_SD_APP_STATUS
-
-#if defined(STM32F4)
-#define  SD_SDMMC_DISABLED          SD_SDIO_DISABLED
-#define  SD_SDMMC_FUNCTION_BUSY     SD_SDIO_FUNCTION_BUSY     
-#define  SD_SDMMC_FUNCTION_FAILED   SD_SDIO_FUNCTION_FAILED   
-#define  SD_SDMMC_UNKNOWN_FUNCTION  SD_SDIO_UNKNOWN_FUNCTION  
-#define  SD_CMD_SDMMC_SEN_OP_COND   SD_CMD_SDIO_SEN_OP_COND   
-#define  SD_CMD_SDMMC_RW_DIRECT     SD_CMD_SDIO_RW_DIRECT     
-#define  SD_CMD_SDMMC_RW_EXTENDED   SD_CMD_SDIO_RW_EXTENDED   
-#define  __HAL_SD_SDMMC_ENABLE      __HAL_SD_SDIO_ENABLE      
-#define  __HAL_SD_SDMMC_DISABLE     __HAL_SD_SDIO_DISABLE     
-#define  __HAL_SD_SDMMC_DMA_ENABLE  __HAL_SD_SDIO_DMA_ENABLE  
-#define  __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL  
-#define  __HAL_SD_SDMMC_ENABLE_IT   __HAL_SD_SDIO_ENABLE_IT   
-#define  __HAL_SD_SDMMC_DISABLE_IT  __HAL_SD_SDIO_DISABLE_IT  
-#define  __HAL_SD_SDMMC_GET_FLAG    __HAL_SD_SDIO_GET_FLAG    
-#define  __HAL_SD_SDMMC_CLEAR_FLAG  __HAL_SD_SDIO_CLEAR_FLAG  
-#define  __HAL_SD_SDMMC_GET_IT      __HAL_SD_SDIO_GET_IT      
-#define  __HAL_SD_SDMMC_CLEAR_IT    __HAL_SD_SDIO_CLEAR_IT    
-#define  SDMMC_STATIC_FLAGS         SDIO_STATIC_FLAGS	       
-#define  SDMMC_CMD0TIMEOUT          SDIO_CMD0TIMEOUT	       
-#define  SD_SDMMC_SEND_IF_COND      SD_SDIO_SEND_IF_COND
-/* alias CMSIS */
-#define  SDMMC1_IRQn                SDIO_IRQn
-#define  SDMMC1_IRQHandler          SDIO_IRQHandler
-#endif
-
-#if defined(STM32F7) || defined(STM32L4)
-#define  SD_SDIO_DISABLED           SD_SDMMC_DISABLED
-#define  SD_SDIO_FUNCTION_BUSY      SD_SDMMC_FUNCTION_BUSY    
-#define  SD_SDIO_FUNCTION_FAILED    SD_SDMMC_FUNCTION_FAILED  
-#define  SD_SDIO_UNKNOWN_FUNCTION   SD_SDMMC_UNKNOWN_FUNCTION
-#define  SD_CMD_SDIO_SEN_OP_COND    SD_CMD_SDMMC_SEN_OP_COND
-#define  SD_CMD_SDIO_RW_DIRECT      SD_CMD_SDMMC_RW_DIRECT
-#define  SD_CMD_SDIO_RW_EXTENDED    SD_CMD_SDMMC_RW_EXTENDED
-#define  __HAL_SD_SDIO_ENABLE       __HAL_SD_SDMMC_ENABLE
-#define  __HAL_SD_SDIO_DISABLE      __HAL_SD_SDMMC_DISABLE
-#define  __HAL_SD_SDIO_DMA_ENABLE   __HAL_SD_SDMMC_DMA_ENABLE
-#define  __HAL_SD_SDIO_DMA_DISABL   __HAL_SD_SDMMC_DMA_DISABLE
-#define  __HAL_SD_SDIO_ENABLE_IT    __HAL_SD_SDMMC_ENABLE_IT
-#define  __HAL_SD_SDIO_DISABLE_IT   __HAL_SD_SDMMC_DISABLE_IT
-#define  __HAL_SD_SDIO_GET_FLAG     __HAL_SD_SDMMC_GET_FLAG
-#define  __HAL_SD_SDIO_CLEAR_FLAG   __HAL_SD_SDMMC_CLEAR_FLAG
-#define  __HAL_SD_SDIO_GET_IT       __HAL_SD_SDMMC_GET_IT
-#define  __HAL_SD_SDIO_CLEAR_IT     __HAL_SD_SDMMC_CLEAR_IT
-#define  SDIO_STATIC_FLAGS	        SDMMC_STATIC_FLAGS
-#define  SDIO_CMD0TIMEOUT	          SDMMC_CMD0TIMEOUT
-#define  SD_SDIO_SEND_IF_COND	      SD_SDMMC_SEND_IF_COND
-/* alias CMSIS for compatibilities */
-#define  SDIO_IRQn                  SDMMC1_IRQn
-#define  SDIO_IRQHandler            SDMMC1_IRQHandler
-#endif
-/**
-  * @}
-  */
-
-/** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose
-  * @{
-  */
-
-#define __SMARTCARD_ENABLE_IT           __HAL_SMARTCARD_ENABLE_IT
-#define __SMARTCARD_DISABLE_IT          __HAL_SMARTCARD_DISABLE_IT
-#define __SMARTCARD_ENABLE              __HAL_SMARTCARD_ENABLE
-#define __SMARTCARD_DISABLE             __HAL_SMARTCARD_DISABLE
-#define __SMARTCARD_DMA_REQUEST_ENABLE  __HAL_SMARTCARD_DMA_REQUEST_ENABLE
-#define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE
-
-#define __HAL_SMARTCARD_GETCLOCKSOURCE  SMARTCARD_GETCLOCKSOURCE
-#define __SMARTCARD_GETCLOCKSOURCE      SMARTCARD_GETCLOCKSOURCE
-
-#define IS_SMARTCARD_ONEBIT_SAMPLING    IS_SMARTCARD_ONE_BIT_SAMPLE                  
-
-/**
-  * @}
-  */
-
-/** @defgroup HAL_SMBUS_Aliased_Macros HAL SMBUS Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#define __HAL_SMBUS_RESET_CR1           SMBUS_RESET_CR1
-#define __HAL_SMBUS_RESET_CR2           SMBUS_RESET_CR2
-#define __HAL_SMBUS_GENERATE_START      SMBUS_GENERATE_START
-#define __HAL_SMBUS_GET_ADDR_MATCH      SMBUS_GET_ADDR_MATCH
-#define __HAL_SMBUS_GET_DIR             SMBUS_GET_DIR
-#define __HAL_SMBUS_GET_STOP_MODE       SMBUS_GET_STOP_MODE
-#define __HAL_SMBUS_GET_PEC_MODE        SMBUS_GET_PEC_MODE
-#define __HAL_SMBUS_GET_ALERT_ENABLED   SMBUS_GET_ALERT_ENABLED
-/**
-  * @}
-  */
-
-/** @defgroup HAL_SPI_Aliased_Macros HAL SPI Aliased Macros maintained for legacy purpose
-  * @{
-  */
-
-#define __HAL_SPI_1LINE_TX              SPI_1LINE_TX
-#define __HAL_SPI_1LINE_RX              SPI_1LINE_RX
-#define __HAL_SPI_RESET_CRC             SPI_RESET_CRC
-
-/**
-  * @}
-  */
-  
-/** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose
-  * @{
-  */
-
-#define __HAL_UART_GETCLOCKSOURCE       UART_GETCLOCKSOURCE
-#define __HAL_UART_MASK_COMPUTATION     UART_MASK_COMPUTATION
-#define __UART_GETCLOCKSOURCE           UART_GETCLOCKSOURCE
-#define __UART_MASK_COMPUTATION         UART_MASK_COMPUTATION
-
-#define IS_UART_WAKEUPMETHODE           IS_UART_WAKEUPMETHOD
-
-#define IS_UART_ONEBIT_SAMPLE           IS_UART_ONE_BIT_SAMPLE                  
-#define IS_UART_ONEBIT_SAMPLING         IS_UART_ONE_BIT_SAMPLE                  
-
-/**
-  * @}
-  */
-
-
-/** @defgroup HAL_USART_Aliased_Macros HAL USART Aliased Macros maintained for legacy purpose
-  * @{
-  */
-
-#define __USART_ENABLE_IT               __HAL_USART_ENABLE_IT
-#define __USART_DISABLE_IT              __HAL_USART_DISABLE_IT
-#define __USART_ENABLE                  __HAL_USART_ENABLE
-#define __USART_DISABLE                 __HAL_USART_DISABLE
-
-#define __HAL_USART_GETCLOCKSOURCE      USART_GETCLOCKSOURCE
-#define __USART_GETCLOCKSOURCE          USART_GETCLOCKSOURCE
-
-/**
-  * @}
-  */
-
-/** @defgroup HAL_USB_Aliased_Macros HAL USB Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#define USB_EXTI_LINE_WAKEUP                               USB_WAKEUP_EXTI_LINE
-
-#define USB_FS_EXTI_TRIGGER_RISING_EDGE                    USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE
-#define USB_FS_EXTI_TRIGGER_FALLING_EDGE                   USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE
-#define USB_FS_EXTI_TRIGGER_BOTH_EDGE                      USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE
-#define USB_FS_EXTI_LINE_WAKEUP                            USB_OTG_FS_WAKEUP_EXTI_LINE
-
-#define USB_HS_EXTI_TRIGGER_RISING_EDGE                    USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE
-#define USB_HS_EXTI_TRIGGER_FALLING_EDGE                   USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE
-#define USB_HS_EXTI_TRIGGER_BOTH_EDGE                      USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE
-#define USB_HS_EXTI_LINE_WAKEUP                            USB_OTG_HS_WAKEUP_EXTI_LINE
-
-#define __HAL_USB_EXTI_ENABLE_IT                           __HAL_USB_WAKEUP_EXTI_ENABLE_IT
-#define __HAL_USB_EXTI_DISABLE_IT                          __HAL_USB_WAKEUP_EXTI_DISABLE_IT
-#define __HAL_USB_EXTI_GET_FLAG                            __HAL_USB_WAKEUP_EXTI_GET_FLAG
-#define __HAL_USB_EXTI_CLEAR_FLAG                          __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG
-#define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER             __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE
-#define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER            __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE
-#define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER           __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
-
-#define __HAL_USB_FS_EXTI_ENABLE_IT                        __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT
-#define __HAL_USB_FS_EXTI_DISABLE_IT                       __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT
-#define __HAL_USB_FS_EXTI_GET_FLAG                         __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG
-#define __HAL_USB_FS_EXTI_CLEAR_FLAG                       __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG
-#define __HAL_USB_FS_EXTI_SET_RISING_EGDE_TRIGGER          __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE
-#define __HAL_USB_FS_EXTI_SET_FALLING_EGDE_TRIGGER         __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
-#define __HAL_USB_FS_EXTI_SET_FALLINGRISING_TRIGGER        __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
-#define __HAL_USB_FS_EXTI_GENERATE_SWIT                    __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT
-
-#define __HAL_USB_HS_EXTI_ENABLE_IT                        __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT
-#define __HAL_USB_HS_EXTI_DISABLE_IT                       __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT
-#define __HAL_USB_HS_EXTI_GET_FLAG                         __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG
-#define __HAL_USB_HS_EXTI_CLEAR_FLAG                       __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG
-#define __HAL_USB_HS_EXTI_SET_RISING_EGDE_TRIGGER          __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE
-#define __HAL_USB_HS_EXTI_SET_FALLING_EGDE_TRIGGER         __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
-#define __HAL_USB_HS_EXTI_SET_FALLINGRISING_TRIGGER        __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
-#define __HAL_USB_HS_EXTI_GENERATE_SWIT                    __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT
-
-#define HAL_PCD_ActiveRemoteWakeup                         HAL_PCD_ActivateRemoteWakeup
-#define HAL_PCD_DeActiveRemoteWakeup                       HAL_PCD_DeActivateRemoteWakeup
-
-#define HAL_PCD_SetTxFiFo                                  HAL_PCDEx_SetTxFiFo
-#define HAL_PCD_SetRxFiFo                                  HAL_PCDEx_SetRxFiFo
-/**
-  * @}
-  */
-
-/** @defgroup HAL_TIM_Aliased_Macros HAL TIM Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#define __HAL_TIM_SetICPrescalerValue   TIM_SET_ICPRESCALERVALUE
-#define __HAL_TIM_ResetICPrescalerValue TIM_RESET_ICPRESCALERVALUE
-
-#define TIM_GET_ITSTATUS                __HAL_TIM_GET_IT_SOURCE
-#define TIM_GET_CLEAR_IT                __HAL_TIM_CLEAR_IT
-
-#define __HAL_TIM_GET_ITSTATUS          __HAL_TIM_GET_IT_SOURCE
-
-#define __HAL_TIM_DIRECTION_STATUS      __HAL_TIM_IS_TIM_COUNTING_DOWN
-#define __HAL_TIM_PRESCALER             __HAL_TIM_SET_PRESCALER
-#define __HAL_TIM_SetCounter            __HAL_TIM_SET_COUNTER
-#define __HAL_TIM_GetCounter            __HAL_TIM_GET_COUNTER
-#define __HAL_TIM_SetAutoreload         __HAL_TIM_SET_AUTORELOAD
-#define __HAL_TIM_GetAutoreload         __HAL_TIM_GET_AUTORELOAD
-#define __HAL_TIM_SetClockDivision      __HAL_TIM_SET_CLOCKDIVISION
-#define __HAL_TIM_GetClockDivision      __HAL_TIM_GET_CLOCKDIVISION
-#define __HAL_TIM_SetICPrescaler        __HAL_TIM_SET_ICPRESCALER
-#define __HAL_TIM_GetICPrescaler        __HAL_TIM_GET_ICPRESCALER
-#define __HAL_TIM_SetCompare            __HAL_TIM_SET_COMPARE
-#define __HAL_TIM_GetCompare            __HAL_TIM_GET_COMPARE
-
-#define TIM_BREAKINPUTSOURCE_DFSDM  TIM_BREAKINPUTSOURCE_DFSDM1
-/**
-  * @}
-  */
-
-/** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose
-  * @{
-  */
-  
-#define __HAL_ETH_EXTI_ENABLE_IT                   __HAL_ETH_WAKEUP_EXTI_ENABLE_IT
-#define __HAL_ETH_EXTI_DISABLE_IT                  __HAL_ETH_WAKEUP_EXTI_DISABLE_IT
-#define __HAL_ETH_EXTI_GET_FLAG                    __HAL_ETH_WAKEUP_EXTI_GET_FLAG
-#define __HAL_ETH_EXTI_CLEAR_FLAG                  __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG
-#define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER     __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER
-#define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER    __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER
-#define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER   __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER
-
-#define ETH_PROMISCIOUSMODE_ENABLE   ETH_PROMISCUOUS_MODE_ENABLE 
-#define ETH_PROMISCIOUSMODE_DISABLE  ETH_PROMISCUOUS_MODE_DISABLE
-#define IS_ETH_PROMISCIOUS_MODE      IS_ETH_PROMISCUOUS_MODE
-/**
-  * @}
-  */
-
-/** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#define __HAL_LTDC_LAYER LTDC_LAYER
-/**
-  * @}
-  */
-
-/** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose
-  * @{
-  */
-#define SAI_OUTPUTDRIVE_DISABLED          SAI_OUTPUTDRIVE_DISABLE
-#define SAI_OUTPUTDRIVE_ENABLED           SAI_OUTPUTDRIVE_ENABLE
-#define SAI_MASTERDIVIDER_ENABLED         SAI_MASTERDIVIDER_ENABLE
-#define SAI_MASTERDIVIDER_DISABLED        SAI_MASTERDIVIDER_DISABLE
-#define SAI_STREOMODE                     SAI_STEREOMODE
-#define SAI_FIFOStatus_Empty              SAI_FIFOSTATUS_EMPTY
-#define SAI_FIFOStatus_Less1QuarterFull   SAI_FIFOSTATUS_LESS1QUARTERFULL
-#define SAI_FIFOStatus_1QuarterFull       SAI_FIFOSTATUS_1QUARTERFULL
-#define SAI_FIFOStatus_HalfFull           SAI_FIFOSTATUS_HALFFULL
-#define SAI_FIFOStatus_3QuartersFull      SAI_FIFOSTATUS_3QUARTERFULL
-#define SAI_FIFOStatus_Full               SAI_FIFOSTATUS_FULL
-#define IS_SAI_BLOCK_MONO_STREO_MODE      IS_SAI_BLOCK_MONO_STEREO_MODE
-#define SAI_SYNCHRONOUS_EXT               SAI_SYNCHRONOUS_EXT_SAI1
-#define SAI_SYNCEXT_IN_ENABLE             SAI_SYNCEXT_OUTBLOCKA_ENABLE
-/**
-  * @}
-  */
-
-
-/** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
-  * @{
-  */
-  
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* ___STM32_HAL_LEGACY */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32_assert_template.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32_assert_template.h
deleted file mode 100755
index 4ae7e25d..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32_assert_template.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32_assert.h
-  * @author  MCD Application Team
-  * @brief   STM32 assert template file.
-  *          This file should be copied to the application folder and renamed
-  *          to stm32_assert.h.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32_ASSERT_H
-#define __STM32_ASSERT_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/* Includes ------------------------------------------------------------------*/
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32_ASSERT_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h
deleted file mode 100755
index f3c7367d..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h
+++ /dev/null
@@ -1,440 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal.h
-  * @author  MCD Application Team
-  * @brief   This file contains all the functions prototypes for the HAL 
-  *          module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_H
-#define __STM32L0xx_HAL_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_conf.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup HAL HAL
-  * @{
-  */ 
-/** @defgroup HAL_Exported_Constants HAL Exported Constants
-  * @{
-  */ 
-
-/** @defgroup SYSCFG_BootMode Boot Mode
-  * @{
-  */
-#define SYSCFG_BOOT_MAINFLASH          ((uint32_t)0x00000000U)
-#define SYSCFG_BOOT_SYSTEMFLASH        ((uint32_t)SYSCFG_CFGR1_BOOT_MODE_0)
-#define SYSCFG_BOOT_SRAM               ((uint32_t)SYSCFG_CFGR1_BOOT_MODE)     
-
-/**
-  * @}
-  */ 
-
-/** @defgroup DBGMCU_Low_Power_Config DBGMCU Low Power Configuration
-  * @{
-  */
-#define DBGMCU_SLEEP                 DBGMCU_CR_DBG_SLEEP
-#define DBGMCU_STOP                  DBGMCU_CR_DBG_STOP
-#define DBGMCU_STANDBY               DBGMCU_CR_DBG_STANDBY
-#define IS_DBGMCU_PERIPH(__PERIPH__) ((((__PERIPH__) & (~(DBGMCU_CR_DBG))) == 0x00U) && ((__PERIPH__) != 0x00U))
-
-
-/**
-  * @}
-  */
-  
-#if defined (LCD_BASE) /* STM32L0x3xx only */
-/** @defgroup SYSCFG_LCD_EXT_CAPA SYSCFG LCD External Capacitors
-  * @{
-  */
-#define SYSCFG_LCD_EXT_CAPA             SYSCFG_CFGR2_CAPA /*!< Connection of internal Vlcd rail to external capacitors */
-#define SYSCFG_VLCD_PB2_EXT_CAPA_ON     SYSCFG_CFGR2_CAPA_0  /*!< Connection on PB2   */
-#define SYSCFG_VLCD_PB12_EXT_CAPA_ON    SYSCFG_CFGR2_CAPA_1  /*!< Connection on PB12  */
-#define SYSCFG_VLCD_PB0_EXT_CAPA_ON     SYSCFG_CFGR2_CAPA_2  /*!< Connection on PB0   */
-#if defined (SYSCFG_CFGR2_CAPA_3)
-#define SYSCFG_VLCD_PE11_EXT_CAPA_ON    SYSCFG_CFGR2_CAPA_3  /*!< Connection on PE11  */
-#endif
-#if defined (SYSCFG_CFGR2_CAPA_4)
-#define SYSCFG_VLCD_PE12_EXT_CAPA_ON    SYSCFG_CFGR2_CAPA_4  /*!< Connection on PE12  */
-#endif                        
-
-/**
-  * @}
-  */
-#endif
-
-/** @defgroup SYSCFG_VREFINT_OUT_SELECT SYSCFG VREFINT Out Selection
-  * @{
-  */ 
-#define SYSCFG_VREFINT_OUT_NONE          ((uint32_t)0x00000000U) /* no pad connected */  
-#define SYSCFG_VREFINT_OUT_PB0           SYSCFG_CFGR3_VREF_OUT_0 /* Selects PBO as output for the Vrefint */
-#define SYSCFG_VREFINT_OUT_PB1           SYSCFG_CFGR3_VREF_OUT_1 /* Selects PB1 as output for the Vrefint */
-#define SYSCFG_VREFINT_OUT_PB0_PB1       SYSCFG_CFGR3_VREF_OUT   /* Selects PBO and PB1 as output for the Vrefint */
-
-#define IS_SYSCFG_VREFINT_OUT_SELECT(OUTPUT)   (((OUTPUT) == SYSCFG_VREFINT_OUT_NONE)  || \
-                                                ((OUTPUT) == SYSCFG_VREFINT_OUT_PB0)  || \
-                                                ((OUTPUT) == SYSCFG_VREFINT_OUT_PB1)  || \
-                                                ((OUTPUT) == SYSCFG_VREFINT_OUT_PB0_PB1))
-/**
-  * @}
-  */ 
-
-/** @defgroup SYSCFG_flags_definition SYSCFG Flags Definition
-  * @{
-  */
-#define SYSCFG_FLAG_VREFINT_READY      SYSCFG_CFGR3_VREFINT_RDYF
-
-#define IS_SYSCFG_FLAG(FLAG)           ((FLAG) == SYSCFG_FLAG_VREFINT_READY))
-
-/**
-  * @}
-  */
-  
-/** @defgroup SYSCFG_FastModePlus_GPIO Fast Mode Plus on GPIO 
-  * @{
-  */ 
-/** @brief  Fast mode Plus driving capability on a specific GPIO  
-  */  
-#if defined (SYSCFG_CFGR2_I2C_PB6_FMP)
-#define SYSCFG_FASTMODEPLUS_PB6       SYSCFG_CFGR2_I2C_PB6_FMP  /* Enable Fast Mode Plus on PB6 */
-#endif
-#if defined (SYSCFG_CFGR2_I2C_PB7_FMP)
-#define SYSCFG_FASTMODEPLUS_PB7       SYSCFG_CFGR2_I2C_PB7_FMP  /* Enable Fast Mode Plus on PB7 */
-#endif
-#if defined (SYSCFG_CFGR2_I2C_PB8_FMP)
-#define SYSCFG_FASTMODEPLUS_PB8       SYSCFG_CFGR2_I2C_PB8_FMP  /* Enable Fast Mode Plus on PB8 */
-#endif
-#if defined (SYSCFG_CFGR2_I2C_PB9_FMP)
-#define SYSCFG_FASTMODEPLUS_PB9       SYSCFG_CFGR2_I2C_PB9_FMP  /* Enable Fast Mode Plus on PB9 */
-#endif
-
-#define IS_SYSCFG_FASTMODEPLUS(PIN) ((((PIN) & (SYSCFG_FASTMODEPLUS_PB6)) == SYSCFG_FASTMODEPLUS_PB6)  || \
-                                     (((PIN) & (SYSCFG_FASTMODEPLUS_PB7)) == SYSCFG_FASTMODEPLUS_PB7)  || \
-                                     (((PIN) & (SYSCFG_FASTMODEPLUS_PB8)) == SYSCFG_FASTMODEPLUS_PB8)  || \
-                                     (((PIN) & (SYSCFG_FASTMODEPLUS_PB9)) == SYSCFG_FASTMODEPLUS_PB9)  )
-/**
- * @}
- */
- /**
-  * @}
-  */ 
-  
- /** @defgroup HAL_Exported_Macros HAL Exported Macros
-  * @{
-  */  
-
-/** @brief  Freeze/Unfreeze Peripherals in Debug mode 
-  */
-#if defined (DBGMCU_APB1_FZ_DBG_TIM2_STOP)
-/**
-  * @brief  TIM2 Peripherals Debug mode 
-  */ 
-#define __HAL_DBGMCU_FREEZE_TIM2()     SET_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM2_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM2()   CLEAR_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM2_STOP)
-#endif
-
-#if defined (DBGMCU_APB1_FZ_DBG_TIM3_STOP)
-/**
-  * @brief  TIM3 Peripherals Debug mode 
-  */ 
-#define __HAL_DBGMCU_FREEZE_TIM3()     SET_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM3_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM3()   CLEAR_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM3_STOP)
-#endif
-
-#if defined (DBGMCU_APB1_FZ_DBG_TIM6_STOP)
-/**
-  * @brief  TIM6 Peripherals Debug mode 
-  */
-#define __HAL_DBGMCU_FREEZE_TIM6()     SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM6()   CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP)
-#endif
-
-#if defined (DBGMCU_APB1_FZ_DBG_TIM7_STOP)
-/**
-  * @brief  TIM7 Peripherals Debug mode 
-  */
-#define __HAL_DBGMCU_FREEZE_TIM7()     SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM7()   CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP)
-#endif
-
-#if defined (DBGMCU_APB1_FZ_DBG_RTC_STOP)
-/**
-  * @brief  RTC Peripherals Debug mode 
-  */
-#define __HAL_DBGMCU_FREEZE_RTC()      SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP)
-#define __HAL_DBGMCU_UNFREEZE_RTC()    CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP)
-#endif
-
-#if defined (DBGMCU_APB1_FZ_DBG_WWDG_STOP)
-/**
-  * @brief  WWDG Peripherals Debug mode 
-  */
-#define __HAL_DBGMCU_FREEZE_WWDG()     SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP)
-#define __HAL_DBGMCU_UNFREEZE_WWDG()   CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP)
-#endif
-
-#if defined (DBGMCU_APB1_FZ_DBG_IWDG_STOP)
-/**
-  * @brief  IWDG Peripherals Debug mode 
-  */
-#define __HAL_DBGMCU_FREEZE_IWDG()     SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP)
-#define __HAL_DBGMCU_UNFREEZE_IWDG()   CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP)
-#endif
-
-#if defined (DBGMCU_APB1_FZ_DBG_I2C1_STOP)
-/**
-  * @brief  I2C1 Peripherals Debug mode 
-  */
-#define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT()   SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_STOP)
-#define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_STOP)
-#endif
-
-#if defined (DBGMCU_APB1_FZ_DBG_I2C2_STOP)
-/**
-  * @brief  I2C2 Peripherals Debug mode 
-  */
-#define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT_DBGMCU()   SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_STOP)
-#define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_STOP)
-#endif
-
-#if defined (DBGMCU_APB1_FZ_DBG_I2C3_STOP)
-/**
-  * @brief  I2C3 Peripherals Debug mode 
-  */
-#define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT()   SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C3_STOP)
-#define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C3_STOP)
-#endif
-
-#if defined (DBGMCU_APB1_FZ_DBG_LPTIMER_STOP)
-/**
-  * @brief  LPTIMER Peripherals Debug mode 
-  */
-#define __HAL_DBGMCU_FREEZE_LPTIMER()        SET_BIT(DBGMCU->APB1FZ ,DBGMCU_APB1_FZ_DBG_LPTIMER_STOP)
-#define __HAL_DBGMCU_UNFREEZE_LPTIMER()      CLEAR_BIT(DBGMCU->APB1FZ ,DBGMCU_APB1_FZ_DBG_LPTIMER_STOP)
-#endif
-
-#if defined (DBGMCU_APB2_FZ_DBG_TIM22_STOP)
-/**
-  * @brief  TIM22 Peripherals Debug mode 
-  */
-#define __HAL_DBGMCU_FREEZE_TIM22()          SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM22_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM22()        CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM22_STOP)
-#endif
-
-#if defined (DBGMCU_APB2_FZ_DBG_TIM21_STOP)
-/**
-  * @brief  TIM21 Peripherals Debug mode 
-  */
-#define __HAL_DBGMCU_FREEZE_TIM21()          SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM21_STOP)
-#define __HAL_DBGMCU_UNFREEZE_TIM21()        CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM21_STOP)
-#endif
-
-/** @brief  Main Flash memory mapped at 0x00000000
-  */
-#define __HAL_SYSCFG_REMAPMEMORY_FLASH()     CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)
-
-/** @brief  System Flash memory mapped at 0x00000000
-  */
-#define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH()      MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, SYSCFG_CFGR1_MEM_MODE_0)
-
-
-/** @brief  Embedded SRAM mapped at 0x00000000
-  */                                      
-#define __HAL_SYSCFG_REMAPMEMORY_SRAM()             MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, SYSCFG_CFGR1_MEM_MODE_0 | SYSCFG_CFGR1_MEM_MODE_1)
-
-/** @brief  Configuration of the DBG Low Power mode.
-  * @param  __DBGLPMODE__: bit field to indicate in wich Low Power mode DBG is still active.
-  *         This parameter can be a value of
-  *         - DBGMCU_SLEEP
-  *         - DBGMCU_STOP
-  *         - DBGMCU_STANDBY
-  */
-#define __HAL_SYSCFG_DBG_LP_CONFIG(__DBGLPMODE__)    do {assert_param(IS_DBGMCU_PERIPH(__DBGLPMODE__)); \
-                                                       MODIFY_REG(DBGMCU->CR, DBGMCU_CR_DBG, (__DBGLPMODE__)); \
-                                                     } while (0) 
-
-#if defined (LCD_BASE) /* STM32L0x3xx only */  
-                                                       
-/** @brief  Macro to configure the VLCD Decoupling capacitance connection.
-  *
-  * @param  __SYSCFG_VLCD_CAPA__: specifies the decoupling of LCD capacitance for rails connection on GPIO.
-  *          This parameter can be a combination of following values (when available):
-  *            @arg SYSCFG_VLCD_PB2_EXT_CAPA_ON:  Connection on PB2   
-  *            @arg SYSCFG_VLCD_PB12_EXT_CAPA_ON: Connection on PB12
-  *            @arg SYSCFG_VLCD_PB0_EXT_CAPA_ON:  Connection on PB0
-  *            @arg SYSCFG_VLCD_PE11_EXT_CAPA_ON: Connection on PE11
-  *            @arg SYSCFG_VLCD_PE12_EXT_CAPA_ON: Connection on PE12   
-  * @retval None
-  */
-#define __HAL_SYSCFG_VLCD_CAPA_CONFIG(__SYSCFG_VLCD_CAPA__) \
-                  MODIFY_REG(SYSCFG->CFGR2, SYSCFG_LCD_EXT_CAPA, (uint32_t)(__SYSCFG_VLCD_CAPA__))
-
-/**
-  * @brief  Returns the decoupling of LCD capacitance configured by user.
-  * @retval The LCD capacitance connection as configured by user. The returned can be a combination of :
-  *            SYSCFG_VLCD_PB2_EXT_CAPA_ON:  Connection on PB2   
-  *            SYSCFG_VLCD_PB12_EXT_CAPA_ON: Connection on PB12
-  *            SYSCFG_VLCD_PB0_EXT_CAPA_ON:  Connection on PB0
-  *            SYSCFG_VLCD_PE11_EXT_CAPA_ON: Connection on PE11
-  *            SYSCFG_VLCD_PE12_EXT_CAPA_ON: Connection on PE12 
-  */
-#define __HAL_SYSCFG_GET_VLCD_CAPA_CONFIG()          READ_BIT(SYSCFG->CFGR2, SYSCFG_LCD_EXT_CAPA)
-              
-#endif
-                                                        
-/**
-  * @brief  Returns the boot mode as configured by user.
-  * @retval The boot mode as configured by user. The returned can be a value of :
-  *     - SYSCFG_BOOT_MAINFLASH
-  *     - SYSCFG_BOOT_SYSTEMFLASH
-  *     - SYSCFG_BOOT_SRAM
-  */
-#define __HAL_SYSCFG_GET_BOOT_MODE()          READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOT_MODE)
-
-
-/** @brief  Check whether the specified SYSCFG flag is set or not.
-  * @param  __FLAG__: specifies the flag to check.
-  *         The only parameter supported is SYSCFG_FLAG_VREFINT_READY
-  * @retval The new state of __FLAG__ (TRUE or FALSE).
-  */
-#define __HAL_SYSCFG_GET_FLAG(__FLAG__) (((SYSCFG->CFGR3) & (__FLAG__)) == (__FLAG__))
-
-/** @brief  Fast mode Plus driving capability enable macro
-  * @param __FASTMODEPLUS__: This parameter can be a value of : 
-  *     @arg SYSCFG_FASTMODEPLUS_PB6
-  *     @arg SYSCFG_FASTMODEPLUS_PB7
-  *     @arg SYSCFG_FASTMODEPLUS_PB8
-  *     @arg SYSCFG_FASTMODEPLUS_PB9
-  */
-#define __HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__)  do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__))); \
-                                                                SET_BIT(SYSCFG->CFGR2, (__FASTMODEPLUS__));                 \
-                                                               }while(0)
-/** @brief  Fast mode Plus driving capability disable macro
-  * @param __FASTMODEPLUS__: This parameter can be a value of : 
-  *     @arg SYSCFG_FASTMODEPLUS_PB6
-  *     @arg SYSCFG_FASTMODEPLUS_PB7
-  *     @arg SYSCFG_FASTMODEPLUS_PB8
-  *     @arg SYSCFG_FASTMODEPLUS_PB9
-  */
-#define __HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__))); \
-                                                                CLEAR_BIT(SYSCFG->CFGR2, (__FASTMODEPLUS__));               \
-                                                               }while(0)
-
-
-/**                  
-  * @}
-  */
-
-/** @defgroup HAL_Exported_Functions HAL Exported Functions
-  * @{
-  */
-/** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization functions
- *  @brief    Initialization and de-initialization functions
- * @{
-  */
-HAL_StatusTypeDef HAL_Init(void);
-HAL_StatusTypeDef HAL_DeInit(void);
-void HAL_MspInit(void);
-void HAL_MspDeInit(void);
-HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
-
-/**                  
-  * @}
-  */
-  
- /** @defgroup HAL_Exported_Functions_Group2 Peripheral Control functions 
-  *  @brief    Peripheral Control functions
-  * @{
-  */
-void HAL_IncTick(void);
-void HAL_Delay(__IO uint32_t Delay);
-uint32_t HAL_GetTick(void);
-void HAL_SuspendTick(void);
-void HAL_ResumeTick(void);
-uint32_t HAL_GetHalVersion(void);
-uint32_t HAL_GetREVID(void);
-uint32_t HAL_GetDEVID(void);
-void HAL_DBGMCU_EnableDBGSleepMode(void);
-void HAL_DBGMCU_DisableDBGSleepMode(void);
-void HAL_DBGMCU_EnableDBGStopMode(void);
-void HAL_DBGMCU_DisableDBGStopMode(void);
-void HAL_DBGMCU_EnableDBGStandbyMode(void);
-void HAL_DBGMCU_DisableDBGStandbyMode(void);
-void HAL_DBGMCU_DBG_EnableLowPowerConfig(uint32_t Periph);
-void HAL_DBGMCU_DBG_DisableLowPowerConfig(uint32_t Periph);
-uint32_t  HAL_SYSCFG_GetBootMode(void);
-void HAL_SYSCFG_Enable_Lock_VREFINT(void);
-void HAL_SYSCFG_Disable_Lock_VREFINT(void);
-void HAL_SYSCFG_VREFINT_OutputSelect(uint32_t SYSCFG_Vrefint_OUTPUT);
-
-/**                  
-  * @}
-  */
-/**                  
-  * @}
-  */
-
-/* Define the private group ***********************************/
-/**************************************************************/
-/** @defgroup HAL_Private HAL Private
-  * @{
-  */
-/**
-  * @}
-  */
-/**************************************************************/
-
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-  
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h
deleted file mode 100755
index b68e202e..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h
+++ /dev/null
@@ -1,1137 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_adc.h
-  * @author  MCD Application Team
-  * @brief   Header file of ADC HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_ADC_H
-#define __STM32L0xx_HAL_ADC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup ADC
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup ADC_Exported_Types ADC Exported Types
-  * @{
-  */
-
-/** 
-  * @brief  ADC group regular oversampling structure definition
-  */
-typedef struct
-{
-  uint32_t Ratio;                         /*!< Configures the oversampling ratio.
-                                               This parameter can be a value of @ref ADC_Oversampling_Ratio */
-
-  uint32_t RightBitShift;                 /*!< Configures the division coefficient for the Oversampler.
-                                               This parameter can be a value of @ref ADC_Right_Bit_Shift */
-
-  uint32_t TriggeredMode;                 /*!< Selects the regular triggered oversampling mode.
-                                               This parameter can be a value of @ref ADC_Triggered_Oversampling_Mode */
-}ADC_OversamplingTypeDef;
-
-/**
-  * @brief  Structure definition of ADC instance and ADC group regular.
-  * @note   Parameters of this structure are shared within 2 scopes:
-  *          - Scope entire ADC (differentiation done for compatibility with some other STM32 series featuring ADC groups regular and injected): ClockPrescaler, Resolution, DataAlign,
-  *            ScanConvMode, EOCSelection, LowPowerAutoWait.
-  *          - Scope ADC group regular: ContinuousConvMode, NbrOfConversion, DiscontinuousConvMode,
-  *            ExternalTrigConv, ExternalTrigConvEdge, DMAContinuousRequests, Overrun, OversamplingMode, Oversampling.
-  * @note   The setting of these parameters by function HAL_ADC_Init() is conditioned to ADC state.
-  *         ADC state can be either:
-  *          - For all parameters: ADC disabled
-  *          - For all parameters except 'ClockPrescaler' and 'Resolution': ADC enabled without conversion on going on group regular.
-  *         If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
-  *         without error reporting (as it can be the expected behavior in case of intended action to update another parameter 
-  *         (which fulfills the ADC state condition) on the fly).
-  */
-typedef struct
-{
-  uint32_t ClockPrescaler;        /*!< Select ADC clock source (synchronous clock derived from APB clock or asynchronous clock derived from ADC dedicated HSI RC oscillator) and clock prescaler.
-                                       This parameter can be a value of @ref ADC_ClockPrescaler.
-                                       Note: In case of synchronous clock mode based on HCLK/1, the configuration must be enabled only
-                                             if the system clock has a 50% duty clock cycle (APB prescaler configured inside RCC 
-                                             must be bypassed and PCLK clock must have 50% duty cycle). Refer to reference manual for details.
-                                       Note: In case of usage of the ADC dedicated HSI RC oscillator, it must be preliminarily enabled at RCC top level.
-                                       Note: This parameter can be modified only if the ADC is disabled. */
-
-  uint32_t Resolution;            /*!< Configure the ADC resolution. 
-                                       This parameter can be a value of @ref ADC_Resolution */
-
-  uint32_t DataAlign;             /*!< Specify ADC data alignment in conversion data register (right or left).
-                                       Refer to reference manual for alignments formats versus resolutions.
-                                       This parameter can be a value of @ref ADC_Data_align */
-
-  uint32_t ScanConvMode;          /*!< Configure the sequencer of regular group.
-                                       This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts.
-                                       Sequencer is automatically enabled if several channels are set (sequencer cannot be disabled, as it can be the case on other STM32 devices):
-                                       If only 1 channel is set: Conversion is performed in single mode.
-                                       If several channels are set:  Conversions are performed in sequence mode (ranks defined by each channel number: channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
-                                                                     Scan direction can be set to forward (from channel 0 to channel 18) or backward (from channel 18 to channel 0).
-                                       This parameter can be a value of @ref ADC_Scan_mode */
-
-  uint32_t EOCSelection;          /*!< Specify which EOC (End Of Conversion) flag is used for conversion by polling and interruption: end of unitary conversion or end of sequence conversions.
-                                       This parameter can be a value of @ref ADC_EOCSelection. */
-
-  uint32_t LowPowerAutoWait;      /*!< Select the dynamic low power Auto Delay: new conversion start only when the previous
-                                       conversion (for ADC group regular) has been retrieved by user software,
-                                       using function HAL_ADC_GetValue().
-                                       This feature automatically adapts the frequency of ADC conversions triggers to the speed of the system that reads the data. Moreover, this avoids risk of overrun
-                                       for low frequency applications. 
-                                       This parameter can be set to ENABLE or DISABLE.
-                                       Note: Do not use with interruption or DMA (HAL_ADC_Start_IT(), HAL_ADC_Start_DMA()) since they clear immediately the EOC flag
-                                             to free the IRQ vector sequencer.
-                                             Do use with polling: 1. Start conversion with HAL_ADC_Start(), 2. Later on, when ADC conversion data is needed:
-                                             use HAL_ADC_PollForConversion() to ensure that conversion is completed and HAL_ADC_GetValue() to retrieve conversion result and trig another conversion start. */
-
-  uint32_t LowPowerAutoPowerOff;  /*!< Select the auto-off mode: the ADC automatically powers-off after a conversion and automatically wakes-up when a new conversion is triggered (with startup time between trigger and start of sampling).
-                                       This feature can be combined with automatic wait mode (parameter 'LowPowerAutoWait').
-                                       This parameter can be set to ENABLE or DISABLE.
-                                       Note: If enabled, this feature also turns off the ADC dedicated 14 MHz RC oscillator (HSI14) */
-
-  uint32_t ContinuousConvMode;    /*!< Specify whether the conversion is performed in single mode (one conversion) or continuous mode for ADC group regular,
-                                       after the first ADC conversion start trigger occurred (software start or external trigger).
-                                       This parameter can be set to ENABLE or DISABLE. */
-
-  uint32_t DiscontinuousConvMode; /*!< Specify whether the conversions sequence of ADC group regular is performed in Complete-sequence/Discontinuous-sequence
-                                       (main sequence subdivided in successive parts).
-                                       Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
-                                       Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
-                                       This parameter can be set to ENABLE or DISABLE.
-                                       Note: On this STM32 serie, ADC group regular number of discontinuous ranks increment is fixed to one-by-one. */
-
-  uint32_t ExternalTrigConv;      /*!< Select the external event source used to trigger ADC group regular conversion start.
-                                       If set to ADC_SOFTWARE_START, external triggers are disabled and software trigger is used instead.
-                                       This parameter can be a value of @ref ADC_regular_external_trigger_source.
-                                       Caution: external trigger source is common to all ADC instances. */
-                                                                                                        
-  uint32_t ExternalTrigConvEdge;  /*!< Select the external event edge used to trigger ADC group regular conversion start.
-                                       If trigger source is set to ADC_SOFTWARE_START, this parameter is discarded.
-                                       This parameter can be a value of @ref ADC_regular_external_trigger_edge */
-
-  uint32_t DMAContinuousRequests; /*!< Specify whether the DMA requests are performed in one shot mode (DMA transfer stops when number of conversions is reached)
-                                       or in continuous mode (DMA transfer unlimited, whatever number of conversions).
-                                       This parameter can be set to ENABLE or DISABLE.
-                                       Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached. */
-
-  uint32_t Overrun;               /*!< Select the behavior in case of overrun: data overwritten or preserved (default).
-                                       This parameter can be a value of @ref ADC_Overrun.
-                                       Note: In case of overrun set to data preserved and usage with programming model with interruption (HAL_Start_IT()): ADC IRQ handler has to clear 
-                                       end of conversion flags, this induces the release of the preserved data. If needed, this data can be saved in function 
-                                       HAL_ADC_ConvCpltCallback(), placed in user program code (called before end of conversion flags clear).
-                                       Note: Error reporting with respect to the conversion mode:
-                                             - Usage with ADC conversion by polling for event or interruption: Error is reported only if overrun is set to data preserved. If overrun is set to data 
-                                               overwritten, user can willingly not read all the converted data, this is not considered as an erroneous case.
-                                             - Usage with ADC conversion by DMA: Error is reported whatever overrun setting (DMA is expected to process all data from data register). */
-
-  uint32_t LowPowerFrequencyMode; /*!< When selecting an analog ADC clock frequency lower than 2.8MHz,
-                                       it is mandatory to first enable the Low Frequency Mode.
-                                       This parameter can be set to ENABLE or DISABLE.
-                                       Note: This parameter can be modified only if there is no conversion is ongoing. */
-
-
-  uint32_t SamplingTime;                 /*!< The sample time common to all channels.
-                                              Unit: ADC clock cycles
-                                              This parameter can be a value of @ref ADC_sampling_times
-                                              Note: This parameter can be modified only if there is no conversion ongoing. */
-
-  uint32_t OversamplingMode;              /*!< Specify whether the oversampling feature is enabled or disabled.
-                                               This parameter can be set to ENABLE or DISABLE.
-                                               Note: This parameter can be modified only if there is no conversion is ongoing on ADC group regular. */
-
-
-  ADC_OversamplingTypeDef  Oversample;   /*!< Specify the Oversampling parameters
-                                              Caution: this setting overwrites the previous oversampling configuration if oversampling is already enabled. */
-}ADC_InitTypeDef;
-
-/**
-  * @brief  Structure definition of ADC channel for regular group
-  * @note   The setting of these parameters by function HAL_ADC_ConfigChannel() is conditioned to ADC state.
-  *         ADC state can be either:
-  *          - For all parameters: ADC disabled or enabled without conversion on going on regular group.
-  *         If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
-  *         without error reporting (as it can be the expected behavior in case of intended action to update another parameter (which fulfills the ADC state condition) on the fly).
-  */
-typedef struct
-{
-  uint32_t Channel;                /*!< Specify the channel to configure into ADC regular group.
-                                        This parameter can be a value of @ref ADC_channels
-                                        Note: Depending on devices, some channels may not be available on device package pins. Refer to device datasheet for channels availability. */
-
-  uint32_t Rank;                   /*!< Add or remove the channel from ADC regular group sequencer. 
-                                        On STM32L0 devices,  number of ranks in the sequence is defined by number of channels enabled, rank of each channel is defined by channel number 
-                                        (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
-                                        Despite the channel rank is fixed, this parameter allow an additional possibility: to remove the selected rank (selected channel) from sequencer.
-                                        This parameter can be a value of @ref ADC_rank */
-}ADC_ChannelConfTypeDef;
-
-/**
-  * @brief  Structure definition of ADC analog watchdog
-  * @note   The setting of these parameters by function HAL_ADC_AnalogWDGConfig() is conditioned to ADC state.
-  *         ADC state can be either:
-  *          - For all parameters: ADC disabled or ADC enabled without conversion on going on ADC group regular
-  *          - For parameters 'HighThreshold' and 'LowThreshold': ADC enabled with conversion on going on regular group (AWD thresholds can be modify on the fly while ADC conversion is on going)
-  */
-typedef struct
-{
-  uint32_t WatchdogMode;      /*!< Configure the ADC analog watchdog mode: single/all channels.
-                                   This parameter can be a value of @ref ADC_analog_watchdog_mode */
-
-  uint32_t Channel;           /*!< Select which ADC channel to monitor by analog watchdog.
-                                   This parameter has an effect only if watchdog mode is configured on single channel (parameter WatchdogMode)
-                                   This parameter can be a value of @ref ADC_channels */
-
-  uint32_t ITMode;            /*!< Specify whether the analog watchdog is configured in interrupt or polling mode.
-                                   This parameter can be set to ENABLE or DISABLE */
-  uint32_t HighThreshold;     /*!< Configures the ADC analog watchdog High threshold value.
-                                   Depending of ADC resolution selected (12, 10, 8 or 6 bits),
-                                   this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
-
-  uint32_t LowThreshold;      /*!< Configures the ADC analog watchdog High threshold value.
-                                   Depending of ADC resolution selected (12, 10, 8 or 6 bits),
-                                   this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
-}ADC_AnalogWDGConfTypeDef;
-
-/**
-  * @brief  HAL ADC state machine: ADC states definition (bitfields)
-  * @note   ADC state machine is managed by bitfields, state must be compared
-  *         with bit by bit.
-  *         For example:                                                         
-  *           " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_REG_BUSY)) "
-  *           " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_AWD1)    ) "
-  */
-/* States of ADC global scope */
-#define HAL_ADC_STATE_RESET             ((uint32_t)0x00000000)    /*!< ADC not yet initialized or disabled */
-#define HAL_ADC_STATE_READY             ((uint32_t)0x00000001)    /*!< ADC peripheral ready for use */
-#define HAL_ADC_STATE_BUSY_INTERNAL     ((uint32_t)0x00000002)    /*!< ADC is busy due to an internal process (initialization, calibration) */
-#define HAL_ADC_STATE_TIMEOUT           ((uint32_t)0x00000004)    /*!< TimeOut occurrence */
-
-/* States of ADC errors */
-#define HAL_ADC_STATE_ERROR_INTERNAL    ((uint32_t)0x00000010)    /*!< Internal error occurrence */
-#define HAL_ADC_STATE_ERROR_CONFIG      ((uint32_t)0x00000020)    /*!< Configuration error occurrence */
-#define HAL_ADC_STATE_ERROR_DMA         ((uint32_t)0x00000040)    /*!< DMA error occurrence */
-
-/* States of ADC group regular */
-#define HAL_ADC_STATE_REG_BUSY          ((uint32_t)0x00000100)    /*!< A conversion on ADC group regular is ongoing or can occur (either by continuous mode,
-                                                                       external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available)) */
-#define HAL_ADC_STATE_REG_EOC           ((uint32_t)0x00000200)    /*!< Conversion data available on group regular */
-#define HAL_ADC_STATE_REG_OVR           ((uint32_t)0x00000400)    /*!< Overrun occurrence */
-#define HAL_ADC_STATE_REG_EOSMP         ((uint32_t)0x00000800)    /*!< Not available on this STM32 serie: End Of Sampling flag raised  */
-
-/* States of ADC group injected */
-#define HAL_ADC_STATE_INJ_BUSY          ((uint32_t)0x00001000)    /*!< Not available on this STM32 serie: A conversion on group injected is ongoing or can occur (either by auto-injection mode,
-                                                                       external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available)) */
-#define HAL_ADC_STATE_INJ_EOC           ((uint32_t)0x00002000)    /*!< Not available on this STM32 serie: Conversion data available on group injected */
-#define HAL_ADC_STATE_INJ_JQOVF         ((uint32_t)0x00004000)    /*!< Not available on this STM32 serie: Injected queue overflow occurrence */
-
-/* States of ADC analog watchdogs */
-#define HAL_ADC_STATE_AWD1              ((uint32_t)0x00010000)    /*!< Out-of-window occurrence of ADC analog watchdog 1 */
-#define HAL_ADC_STATE_AWD2              ((uint32_t)0x00020000)    /*!< Not available on this STM32 serie: Out-of-window occurrence of ADC analog watchdog 2 */
-#define HAL_ADC_STATE_AWD3              ((uint32_t)0x00040000)    /*!< Not available on this STM32 serie: Out-of-window occurrence of ADC analog watchdog 3 */
-
-/* States of ADC multi-mode */
-#define HAL_ADC_STATE_MULTIMODE_SLAVE   ((uint32_t)0x00100000)    /*!< Not available on this STM32 serie: ADC in multimode slave state, controlled by another ADC master (when feature available) */
-
-
-
-/** 
-  * @brief  ADC handle Structure definition
-  */
-typedef struct
-{
-  ADC_TypeDef                   *Instance;              /*!< Register base address */
-
-  ADC_InitTypeDef               Init;                   /*!< ADC required parameters */
-
-  DMA_HandleTypeDef             *DMA_Handle;            /*!< Pointer DMA Handler */
-
-  HAL_LockTypeDef               Lock;                   /*!< ADC locking object */
-
-  __IO uint32_t                 State;                  /*!< ADC communication state (bitmap of ADC states) */
-
-  __IO uint32_t                 ErrorCode;              /*!< ADC Error code */
-}ADC_HandleTypeDef;
-/**
-  * @}
-  */
-
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup ADC_Exported_Constants ADC Exported Constants
-  * @{
-  */
-
-/** @defgroup ADC_Error_Code ADC Error Code
-  * @{
-  */
-#define HAL_ADC_ERROR_NONE        ((uint32_t)0x00U)   /*!< No error                                    */
-#define HAL_ADC_ERROR_INTERNAL    ((uint32_t)0x01U)   /*!< ADC IP internal error (problem of clocking,
-                                                          enable/disable, erroneous state, ...)        */
-#define HAL_ADC_ERROR_OVR         ((uint32_t)0x02U)   /*!< Overrun error                               */
-#define HAL_ADC_ERROR_DMA         ((uint32_t)0x04U)   /*!< DMA transfer error                          */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_TimeOut_Values ADC TimeOut Values
-  * @{
-  */
-
-  /* Fixed timeout values for ADC calibration, enable settling time, disable  */
-  /* settling time.                                                           */
-  /* Values defined to be higher than worst cases: low clocks freq,           */
-  /* maximum prescalers.                                                      */
-  /* Unit: ms                                                                 */      
-#define ADC_ENABLE_TIMEOUT            10U
-#define ADC_DISABLE_TIMEOUT           10U
-#define ADC_STOP_CONVERSION_TIMEOUT   10U
-
-  /* Delay of 10us fixed to worst case: maximum CPU frequency 180MHz to have  */
-  /* the minimum number of CPU cycles to fulfill this delay                   */
-  #define ADC_DELAY_10US_MIN_CPU_CYCLES         1800U 
-/**
-  * @}
-  */
-
-/** @defgroup ADC_ClockPrescaler ADC Clock Prescaler
-  * @{
-  */     
-#define ADC_CLOCK_ASYNC_DIV1              ((uint32_t)0x00000000U)                               /*!< ADC Asynchronous clock mode divided by 1 */
-#define ADC_CLOCK_ASYNC_DIV2              (ADC_CCR_PRESC_0)                                     /*!< ADC Asynchronous clock mode divided by 2 */
-#define ADC_CLOCK_ASYNC_DIV4              (ADC_CCR_PRESC_1)                                     /*!< ADC Asynchronous clock mode divided by 2 */
-#define ADC_CLOCK_ASYNC_DIV6              (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0)                   /*!< ADC Asynchronous clock mode divided by 2 */
-#define ADC_CLOCK_ASYNC_DIV8              (ADC_CCR_PRESC_2)                                     /*!< ADC Asynchronous clock mode divided by 2 */
-#define ADC_CLOCK_ASYNC_DIV10             (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0)                   /*!< ADC Asynchronous clock mode divided by 2 */
-#define ADC_CLOCK_ASYNC_DIV12             (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1)                   /*!< ADC Asynchronous clock mode divided by 2 */
-#define ADC_CLOCK_ASYNC_DIV16             (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
-#define ADC_CLOCK_ASYNC_DIV32             (ADC_CCR_PRESC_3)                                     /*!< ADC Asynchronous clock mode divided by 2 */
-#define ADC_CLOCK_ASYNC_DIV64             (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0)                   /*!< ADC Asynchronous clock mode divided by 2 */
-#define ADC_CLOCK_ASYNC_DIV128            (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1)                   /*!< ADC Asynchronous clock mode divided by 2 */
-#define ADC_CLOCK_ASYNC_DIV256            (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
-
-#define ADC_CLOCK_SYNC_PCLK_DIV1         ((uint32_t)ADC_CFGR2_CKMODE)    /*!< Synchronous clock mode divided by 1 
-                                                                               This configuration must be enabled only if PCLK has a 50%
-                                                                               duty clock cycle (APB prescaler configured inside the RCC must be bypassed and the system clock
-                                                                               must by 50% duty cycle)*/
-#define ADC_CLOCK_SYNC_PCLK_DIV2         ((uint32_t)ADC_CFGR2_CKMODE_0)  /*!< Synchronous clock mode divided by 2 */
-#define ADC_CLOCK_SYNC_PCLK_DIV4         ((uint32_t)ADC_CFGR2_CKMODE_1)  /*!< Synchronous clock mode divided by 4 */
-
-/**                                                       
-  * @}
-  */ 
-
-/** @defgroup ADC_Resolution ADC Resolution
-  * @{
-  */
-#define ADC_RESOLUTION_12B      ((uint32_t)0x00000000U)          /*!< ADC 12-bit resolution */
-#define ADC_RESOLUTION_10B      ((uint32_t)ADC_CFGR1_RES_0)      /*!< ADC 10-bit resolution */
-#define ADC_RESOLUTION_8B       ((uint32_t)ADC_CFGR1_RES_1)      /*!< ADC 8-bit resolution */
-#define ADC_RESOLUTION_6B       ((uint32_t)ADC_CFGR1_RES)        /*!< ADC 6-bit resolution */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_Data_align ADC conversion data alignment
-  * @{
-  */
-#define ADC_DATAALIGN_RIGHT      ((uint32_t)0x00000000U)
-#define ADC_DATAALIGN_LEFT       ((uint32_t)ADC_CFGR1_ALIGN)
-/**
-  * @}
-  */
-
-/** @defgroup ADC_regular_external_trigger_edge ADC External Trigger Source Edge for Regular Group
-  * @{
-  */
-#define ADC_EXTERNALTRIGCONVEDGE_NONE           ((uint32_t)0x00000000U)
-#define ADC_EXTERNALTRIGCONVEDGE_RISING         ((uint32_t)ADC_CFGR1_EXTEN_0)         
-#define ADC_EXTERNALTRIGCONVEDGE_FALLING        ((uint32_t)ADC_CFGR1_EXTEN_1)
-#define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING  ((uint32_t)ADC_CFGR1_EXTEN)
-/**
-  * @}
-  */ 
-
-/** @defgroup ADC_EOCSelection ADC EOC Selection
-  * @{
-  */ 
-#define ADC_EOC_SINGLE_CONV         ((uint32_t) ADC_ISR_EOC)
-#define ADC_EOC_SEQ_CONV            ((uint32_t) ADC_ISR_EOS)
-#define ADC_EOC_SINGLE_SEQ_CONV     ((uint32_t)(ADC_ISR_EOC | ADC_ISR_EOS))  /*!< reserved for future use */
-/**
-  * @}
-  */ 
-
-/** @defgroup ADC_Overrun ADC Overrun
-  * @{
-  */ 
-#define ADC_OVR_DATA_PRESERVED              ((uint32_t)0x00000000U)
-#define ADC_OVR_DATA_OVERWRITTEN            ((uint32_t)ADC_CFGR1_OVRMOD)
-/**
-  * @}
-  */
-
-
-/** @defgroup ADC_rank ADC rank
-  * @{
-  */
-#define ADC_RANK_CHANNEL_NUMBER                 ((uint32_t)0x00001000U)  /*!< Enable the rank of the selected channels. Number of ranks in the sequence is defined by number of channels enabled, rank of each channel is defined by channel number (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...) */
-#define ADC_RANK_NONE                           ((uint32_t)0x00001001U)  /*!< Disable the selected rank (selected channel) from sequencer */
-/**
-  * @}
-  */
-
-
-/** @defgroup ADC_channels ADC_Channels
-  * @{
-  */
-#define ADC_CHANNEL_0           ((uint32_t)(ADC_CHSELR_CHSEL0))
-#define ADC_CHANNEL_1           ((uint32_t)(ADC_CHSELR_CHSEL1) | ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_2           ((uint32_t)(ADC_CHSELR_CHSEL2) | ADC_CFGR1_AWDCH_1)
-#define ADC_CHANNEL_3           ((uint32_t)(ADC_CHSELR_CHSEL3)| ADC_CFGR1_AWDCH_1 | ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_4           ((uint32_t)(ADC_CHSELR_CHSEL4)| ADC_CFGR1_AWDCH_2)
-#define ADC_CHANNEL_5           ((uint32_t)(ADC_CHSELR_CHSEL5)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_6           ((uint32_t)(ADC_CHSELR_CHSEL6)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1)
-#define ADC_CHANNEL_7           ((uint32_t)(ADC_CHSELR_CHSEL7)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1 | ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_8           ((uint32_t)(ADC_CHSELR_CHSEL8)| ADC_CFGR1_AWDCH_3)
-#define ADC_CHANNEL_9           ((uint32_t)(ADC_CHSELR_CHSEL9)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_10          ((uint32_t)(ADC_CHSELR_CHSEL10)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_1)
-#define ADC_CHANNEL_11          ((uint32_t)(ADC_CHSELR_CHSEL11)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_1| ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_12          ((uint32_t)(ADC_CHSELR_CHSEL12)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2)
-#define ADC_CHANNEL_13          ((uint32_t)(ADC_CHSELR_CHSEL13)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_14          ((uint32_t)(ADC_CHSELR_CHSEL14)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1)
-#define ADC_CHANNEL_15          ((uint32_t)(ADC_CHSELR_CHSEL15)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1| ADC_CFGR1_AWDCH_0)
-#if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx)
-#define ADC_CHANNEL_16          ((uint32_t)(ADC_CHSELR_CHSEL16)| ADC_CFGR1_AWDCH_4)
-#endif
-#define ADC_CHANNEL_17          ((uint32_t)(ADC_CHSELR_CHSEL17)| ADC_CFGR1_AWDCH_4| ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_18          ((uint32_t)(ADC_CHSELR_CHSEL18)| ADC_CFGR1_AWDCH_4| ADC_CFGR1_AWDCH_1)
-
-/* Internal channels */
-#if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx)
-#define ADC_CHANNEL_VLCD         ADC_CHANNEL_16    
-#endif
-#define ADC_CHANNEL_VREFINT      ADC_CHANNEL_17
-#define ADC_CHANNEL_TEMPSENSOR   ADC_CHANNEL_18    
-/**
-  * @}
-  */
-
-/** @defgroup ADC_Channel_AWD_Masks ADC Channel Masks
-  * @{
-  */
-#define ADC_CHANNEL_MASK        ((uint32_t)0x0007FFFFU)
-#define ADC_CHANNEL_AWD_MASK    ((uint32_t)0x7C000000U)
-/**
-  * @}
-  */
-
-/** @defgroup ADC_sampling_times ADC Sampling Cycles
-  * @{
-  */
-#define ADC_SAMPLETIME_1CYCLE_5       ((uint32_t)0x00000000U)                         /*!<  ADC sampling time 1.5 cycle */
-#define ADC_SAMPLETIME_3CYCLES_5      ((uint32_t)ADC_SMPR_SMPR_0)                     /*!<  ADC sampling time 3.5 CYCLES */
-#define ADC_SAMPLETIME_7CYCLES_5      ((uint32_t)ADC_SMPR_SMPR_1)                     /*!<  ADC sampling time 7.5 CYCLES */
-#define ADC_SAMPLETIME_12CYCLES_5     ((uint32_t)(ADC_SMPR_SMPR_1 | ADC_SMPR_SMPR_0)) /*!<  ADC sampling time 12.5 CYCLES */
-#define ADC_SAMPLETIME_19CYCLES_5     ((uint32_t)ADC_SMPR_SMPR_2)                     /*!<  ADC sampling time 19.5 CYCLES */
-#define ADC_SAMPLETIME_39CYCLES_5     ((uint32_t)(ADC_SMPR_SMPR_2 | ADC_SMPR_SMPR_0)) /*!<  ADC sampling time 39.5 CYCLES */
-#define ADC_SAMPLETIME_79CYCLES_5     ((uint32_t)(ADC_SMPR_SMPR_2 | ADC_SMPR_SMPR_1)) /*!<  ADC sampling time 79.5 CYCLES */
-#define ADC_SAMPLETIME_160CYCLES_5    ((uint32_t)ADC_SMPR_SMPR)                       /*!<  ADC sampling time 160.5 CYCLES */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_Scan_mode ADC Scan mode
-  * @{
-  */
-/* Note: Scan mode values must be compatible with other STM32 devices having  */
-/*       a configurable sequencer.                                            */
-/*       Scan direction setting values are defined by taking in account       */
-/*       already defined values for other STM32 devices:                      */
-/*         ADC_SCAN_DISABLE         ((uint32_t)0x00000000)                    */
-/*         ADC_SCAN_ENABLE          ((uint32_t)0x00000001)                    */
-/*       Scan direction forward is considered as default setting equivalent   */
-/*       to scan enable.                                                      */
-/*       Scan direction backward is considered as additional setting.         */
-/*       In case of migration from another STM32 device, the user will be     */
-/*       warned of change of setting choices with assert check.               */
-#define ADC_SCAN_DIRECTION_FORWARD        ((uint32_t)0x00000001U)        /*!< Scan direction forward: from channel 0 to channel 18 */
-#define ADC_SCAN_DIRECTION_BACKWARD       ((uint32_t)0x00000002U)        /*!< Scan direction backward: from channel 18 to channel 0 */
-
-#define ADC_SCAN_ENABLE         ADC_SCAN_DIRECTION_FORWARD             /* For compatibility with other STM32 devices */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_Oversampling_Ratio ADC Oversampling Ratio
-  * @{
-  */
-
-#define ADC_OVERSAMPLING_RATIO_2                    ((uint32_t)0x00000000U)  /*!<  ADC Oversampling ratio 2x */
-#define ADC_OVERSAMPLING_RATIO_4                    ((uint32_t)0x00000004U)  /*!<  ADC Oversampling ratio 4x */
-#define ADC_OVERSAMPLING_RATIO_8                    ((uint32_t)0x00000008U)  /*!<  ADC Oversampling ratio 8x */
-#define ADC_OVERSAMPLING_RATIO_16                   ((uint32_t)0x0000000CU)  /*!<  ADC Oversampling ratio 16x */
-#define ADC_OVERSAMPLING_RATIO_32                   ((uint32_t)0x00000010U)  /*!<  ADC Oversampling ratio 32x */
-#define ADC_OVERSAMPLING_RATIO_64                   ((uint32_t)0x00000014U)  /*!<  ADC Oversampling ratio 64x */
-#define ADC_OVERSAMPLING_RATIO_128                  ((uint32_t)0x00000018U)  /*!<  ADC Oversampling ratio 128x */
-#define ADC_OVERSAMPLING_RATIO_256                  ((uint32_t)0x0000001CU)  /*!<  ADC Oversampling ratio 256x */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_Right_Bit_Shift ADC Right Bit Shift
-  * @{
-  */
-#define ADC_RIGHTBITSHIFT_NONE                       ((uint32_t)0x00000000U)  /*!<  ADC No bit shift for oversampling */
-#define ADC_RIGHTBITSHIFT_1                          ((uint32_t)0x00000020U)  /*!<  ADC 1 bit shift for oversampling */
-#define ADC_RIGHTBITSHIFT_2                          ((uint32_t)0x00000040U)  /*!<  ADC 2 bits shift for oversampling */
-#define ADC_RIGHTBITSHIFT_3                          ((uint32_t)0x00000060U)  /*!<  ADC 3 bits shift for oversampling */
-#define ADC_RIGHTBITSHIFT_4                          ((uint32_t)0x00000080U)  /*!<  ADC 4 bits shift for oversampling */
-#define ADC_RIGHTBITSHIFT_5                          ((uint32_t)0x000000A0U)  /*!<  ADC 5 bits shift for oversampling */
-#define ADC_RIGHTBITSHIFT_6                          ((uint32_t)0x000000C0U)  /*!<  ADC 6 bits shift for oversampling */
-#define ADC_RIGHTBITSHIFT_7                          ((uint32_t)0x000000E0U)  /*!<  ADC 7 bits shift for oversampling */
-#define ADC_RIGHTBITSHIFT_8                          ((uint32_t)0x00000100U)  /*!<  ADC 8 bits shift for oversampling */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_Triggered_Oversampling_Mode ADC Triggered Oversampling Mode
-  * @{
-  */
-#define ADC_TRIGGEREDMODE_SINGLE_TRIGGER            ((uint32_t)0x00000000U)  /*!<  ADC No bit shift for oversampling */
-#define ADC_TRIGGEREDMODE_MULTI_TRIGGER             ((uint32_t)0x00000200U)  /*!<  ADC No bit shift for oversampling */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_analog_watchdog_mode ADC Analog Watchdog Mode
-  * @{
-  */ 
-#define ADC_ANALOGWATCHDOG_NONE                     ((uint32_t) 0x00000000U)
-#define ADC_ANALOGWATCHDOG_SINGLE_REG               ((uint32_t)(ADC_CFGR1_AWDSGL | ADC_CFGR1_AWDEN))
-#define ADC_ANALOGWATCHDOG_ALL_REG                  ((uint32_t) ADC_CFGR1_AWDEN)
-/**
-  * @}
-  */
-
-/** @defgroup ADC_conversion_type ADC Conversion Group
-  * @{
-  */ 
-#define ADC_REGULAR_GROUP                         ((uint32_t)(ADC_FLAG_EOC | ADC_FLAG_EOS))                                              
-/**
-  * @}
-  */
-
-/** @defgroup ADC_Event_type ADC Event
-  * @{
-  */
-#define ADC_AWD_EVENT              ((uint32_t)ADC_FLAG_AWD)
-#define ADC_OVR_EVENT              ((uint32_t)ADC_FLAG_OVR)
-/**
-  * @}
-  */
-  
-/** @defgroup ADC_interrupts_definition ADC Interrupts Definition
-  * @{
-  */
-#define ADC_IT_RDY           ADC_IER_ADRDYIE     /*!< ADC Ready (ADRDY) interrupt source */
-#define ADC_IT_EOSMP         ADC_IER_EOSMPIE     /*!< ADC End of Sampling interrupt source */
-#define ADC_IT_EOC           ADC_IER_EOCIE       /*!< ADC End of Regular Conversion interrupt source */
-#define ADC_IT_EOS           ADC_IER_EOSEQIE     /*!< ADC End of Regular sequence of Conversions interrupt source */
-#define ADC_IT_OVR           ADC_IER_OVRIE       /*!< ADC overrun interrupt source */
-#define ADC_IT_AWD           ADC_IER_AWDIE       /*!< ADC Analog watchdog 1 interrupt source */
-#define ADC_IT_EOCAL         ADC_IER_EOCALIE     /*!< ADC End of Calibration interrupt source */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_flags_definition ADC flags definition
-  * @{
-  */
-#define ADC_FLAG_RDY           ADC_ISR_ADRDY    /*!< ADC Ready flag */
-#define ADC_FLAG_EOSMP         ADC_ISR_EOSMP    /*!< ADC End of Sampling flag */
-#define ADC_FLAG_EOC           ADC_ISR_EOC      /*!< ADC End of Regular Conversion flag */
-#define ADC_FLAG_EOS           ADC_ISR_EOSEQ    /*!< ADC End of Regular sequence of Conversions flag */
-#define ADC_FLAG_OVR           ADC_ISR_OVR      /*!< ADC overrun flag */
-#define ADC_FLAG_AWD           ADC_ISR_AWD      /*!< ADC Analog watchdog flag */
-#define ADC_FLAG_EOCAL         ADC_ISR_EOCAL    /*!< ADC Enf Of Calibration flag */
-
-
-#define ADC_FLAG_ALL    (ADC_FLAG_RDY | ADC_FLAG_EOSMP | ADC_FLAG_EOC | ADC_FLAG_EOS |  \
-                         ADC_FLAG_OVR | ADC_FLAG_AWD   | ADC_FLAG_EOCAL)
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-/* Exported macro ------------------------------------------------------------*/
-
-/** @defgroup ADC_Exported_Macros ADC Exported Macros
-  * @{
-  */
-/** @brief Reset ADC handle state
-  * @param  __HANDLE__: ADC handle
-  * @retval None
-  */
-#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
-
-/**
-  * @brief Enable the ADC peripheral
-  * @param __HANDLE__: ADC handle
-  * @retval None
-  */
-#define __HAL_ADC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= ADC_CR_ADEN)
-
-/**
-  * @brief Verification of hardware constraints before ADC can be enabled
-  * @param __HANDLE__: ADC handle
-  * @retval SET (ADC can be enabled) or RESET (ADC cannot be enabled)
-  */
-#define ADC_ENABLING_CONDITIONS(__HANDLE__)           \
-       (( ( ((__HANDLE__)->Instance->CR) &                  \
-            (ADC_CR_ADCAL | ADC_CR_ADSTP | ADC_CR_ADSTART | \
-             ADC_CR_ADDIS | ADC_CR_ADEN )                   \
-           ) == RESET                                       \
-        ) ? SET : RESET)
-
-/**
-  * @brief Disable the ADC peripheral
-  * @param __HANDLE__: ADC handle
-  * @retval None
-  */
-#define __HAL_ADC_DISABLE(__HANDLE__)                                          \
-  do{                                                                          \
-         (__HANDLE__)->Instance->CR |= ADC_CR_ADDIS;                           \
-          __HAL_ADC_CLEAR_FLAG((__HANDLE__), (ADC_FLAG_EOSMP | ADC_FLAG_RDY)); \
-  } while(0)
-    
-/**
-  * @brief Verification of hardware constraints before ADC can be disabled
-  * @param __HANDLE__: ADC handle
-  * @retval SET (ADC can be disabled) or RESET (ADC cannot be disabled)
-  */
-#define ADC_DISABLING_CONDITIONS(__HANDLE__)                             \
-       (( ( ((__HANDLE__)->Instance->CR) &                                     \
-            (ADC_CR_ADSTART | ADC_CR_ADEN)) == ADC_CR_ADEN   \
-        ) ? SET : RESET)
-         
-/**
-  * @brief Verification of ADC state: enabled or disabled
-  * @param __HANDLE__: ADC handle
-  * @retval SET (ADC enabled) or RESET (ADC disabled)
-  */
-#define ADC_IS_ENABLE(__HANDLE__)                                                    \
-       (( ((((__HANDLE__)->Instance->CR) & (ADC_CR_ADEN | ADC_CR_ADDIS)) == ADC_CR_ADEN) && \
-          ((((__HANDLE__)->Instance->ISR) & ADC_FLAG_RDY) == ADC_FLAG_RDY)                  \
-        ) ? SET : RESET)
-         
-/**
-  * @brief Returns resolution bits in CFGR register: RES[1:0]. Return value among parameter to @ref ADC_Resolution.
-  * @param __HANDLE__: ADC handle
-  * @retval None
-  */
-#define ADC_GET_RESOLUTION(__HANDLE__) (((__HANDLE__)->Instance->CFGR1) & ADC_CFGR1_RES)
-/**
-  * @brief Test if conversion trigger of regular group is software start
-  *        or external trigger.
-  * @param __HANDLE__: ADC handle
-  * @retval SET (software start) or RESET (external trigger)
-  */
-#define ADC_IS_SOFTWARE_START_REGULAR(__HANDLE__)                              \
-  (((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_EXTEN) == RESET)
-
-
-
-/**
-  * @brief Check if no conversion on going on regular group
-  * @param __HANDLE__: ADC handle
-  * @retval SET (conversion is on going) or RESET (no conversion is on going)
-  */
-#define ADC_IS_CONVERSION_ONGOING_REGULAR(__HANDLE__)                          \
-  (( (((__HANDLE__)->Instance->CR) & ADC_CR_ADSTART) == RESET                  \
-  ) ? RESET : SET)
-
-/**
-  * @brief Enable ADC continuous conversion mode.
-  * @param _CONTINUOUS_MODE_: Continuous mode.
-  * @retval None
-  */
-#define ADC_CONTINUOUS(_CONTINUOUS_MODE_) ((_CONTINUOUS_MODE_) << 13U)
-
-/**
-  * @brief Enable ADC scan mode to convert multiple ranks with sequencer.
-  * @param _SCAN_MODE_: Scan conversion mode.
-  * @retval None
-  */
-#define ADC_SCANDIR(_SCAN_MODE_)                                   \
-  ( ( (_SCAN_MODE_) == (ADC_SCAN_DIRECTION_BACKWARD)                           \
-    )? (ADC_CFGR1_SCANDIR) : (0x00000000U)                                      \
-  )
-
-/**
-  * @brief Configures the number of discontinuous conversions for the regular group channels.
-  * @param _NBR_DISCONTINUOUS_CONV_: Number of discontinuous conversions.
-  * @retval None
-  */
-#define __HAL_ADC_CFGR1_DISCONTINUOUS_NUM(_NBR_DISCONTINUOUS_CONV_) (((_NBR_DISCONTINUOUS_CONV_) - 1U) << 17U)
-
-/**
-  * @brief Enable the ADC DMA continuous request.
-  * @param _DMAContReq_MODE_: DMA continuous request mode.
-  * @retval None
-  */
-#define ADC_DMACONTREQ(_DMAContReq_MODE_) ((_DMAContReq_MODE_) << 1U)
-
-/**
-  * @brief Enable the ADC Auto Delay.
-  * @param _AutoDelay_: Auto delay bit enable or disable.
-  * @retval None
-  */
-#define __HAL_ADC_CFGR1_AutoDelay(_AutoDelay_) ((_AutoDelay_) << 14U)
-
-/**
-  * @brief Enable the ADC LowPowerAutoPowerOff.
-  * @param _AUTOFF_: AutoOff bit enable or disable.
-  * @retval None
-  */
-#define __HAL_ADC_CFGR1_AUTOFF(_AUTOFF_) ((_AUTOFF_) << 15U)
-
-/**
-  * @brief Configure the analog watchdog high threshold into registers TR1, TR2 or TR3.
-  * @param _Threshold_: Threshold value
-  * @retval None
-  */
-#define ADC_TRX_HIGHTHRESHOLD(_Threshold_) ((_Threshold_) << 16U)
-
-/**
-  * @brief Enable the ADC Low Frequency mode.
-  * @param _LOW_FREQUENCY_MODE_: Low Frequency mode.
-  * @retval None
-  */
-#define __HAL_ADC_CCR_LOWFREQUENCY(_LOW_FREQUENCY_MODE_) ((_LOW_FREQUENCY_MODE_) << 25U)
-
-/**
-  * @brief Shift the offset in function of the selected ADC resolution. 
-  *        Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0
-  *        If resolution 12 bits, no shift.
-  *        If resolution 10 bits, shift of 2 ranks on the right.
-  *        If resolution 8 bits, shift of 4 ranks on the right.
-  *        If resolution 6 bits, shift of 6 ranks on the right.
-  *        therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2))
-  * @param __HANDLE__: ADC handle.
-  * @param _Offset_: Value to be shifted
-  * @retval None
-  */
-#define ADC_OFFSET_SHIFT_RESOLUTION(__HANDLE__, _Offset_) \
-        ((_Offset_) << ((((__HANDLE__)->Instance->CFGR & ADC_CFGR1_RES) >> 3U)*2U))
-
-/**
-  * @brief Shift the AWD1 threshold in function of the selected ADC resolution.
-  *        Thresholds have to be left-aligned on bit 11, the LSB (right bits) are set to 0
-  *        If resolution 12 bits, no shift.
-  *        If resolution 10 bits, shift of 2 ranks on the right.
-  *        If resolution 8 bits, shift of 4 ranks on the right.
-  *        If resolution 6 bits, shift of 6 ranks on the right.
-  *        therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2))
-  * @param __HANDLE__: ADC handle.
-  * @param _Threshold_: Value to be shifted
-  * @retval None
-  */
-#define ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(__HANDLE__, _Threshold_) \
-        ((_Threshold_) << ((((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_RES) >> 3U)*2U))
-
-/**
-  * @brief Shift the value on the left, less significant are set to 0. 
-  * @param _Value_: Value to be shifted
-  * @param _Shift_: Number of shift to be done
-  * @retval None
-  */
-#define __HAL_ADC_Value_Shift_left(_Value_, _Shift_) ((_Value_) << (_Shift_))
-
-
-/**
-  * @brief Enable the ADC end of conversion interrupt.
-  * @param __HANDLE__: ADC handle.
-  * @param __INTERRUPT__: ADC Interrupt.
-  * @retval None
-  */
-#define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__)  \
-  (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
-
-/**
-  * @brief Disable the ADC end of conversion interrupt.
-  * @param __HANDLE__: ADC handle.
-  * @param __INTERRUPT__: ADC interrupt.
-  * @retval None
-  */
-#define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) \
-  (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
-
-/** @brief  Checks if the specified ADC interrupt source is enabled or disabled.
-  * @param __HANDLE__: ADC handle
-  * @param __INTERRUPT__: ADC interrupt source to check
-  *            @arg ...
-  *            @arg ...
-  * @retval State of interruption (TRUE or FALSE)
-  */
-#define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)                     \
-  (((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__))
-
-/**
-  * @brief Clear the ADC's pending flags
-  * @param __HANDLE__: ADC handle.
-  * @param __FLAG__: ADC flag.
-  * @retval None
-  */
-/* Note: bit cleared bit by writing 1 */
-#define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) \
-  (((__HANDLE__)->Instance->ISR) = (__FLAG__))
-
-/**
-  * @brief Get the selected ADC's flag status.
-  * @param __HANDLE__: ADC handle.
-  * @param __FLAG__: ADC flag.
-  * @retval None
-  */
-#define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) \
-  ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__))
-
-
-/**
-  * @brief Simultaneously clears and sets specific bits of the handle State
-  * @note: ADC_STATE_CLR_SET() macro is merely aliased to generic macro MODIFY_REG(),
-  *        the first parameter is the ADC handle State, the second parameter is the
-  *        bit field to clear, the third and last parameter is the bit field to set.
-  * @retval None
-  */
-#define ADC_STATE_CLR_SET MODIFY_REG
-
-/**
-  * @brief Clear ADC error code (set it to error code: "no error")
-  * @param __HANDLE__: ADC handle
-  * @retval None
-  */
-#define ADC_CLEAR_ERRORCODE(__HANDLE__)                                        \
-  ((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE)
-
-
-/**
-  * @brief Configuration of ADC clock & prescaler: clock source PCLK or Asynchronous with selectable prescaler
-  * @param __HANDLE__: ADC handle
-  * @retval None
-  */
-
-#define __HAL_ADC_CLOCK_PRESCALER(__HANDLE__)                                       \
-  do{                                                                               \
-      if ((((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCK_SYNC_PCLK_DIV1) ||  \
-          (((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCK_SYNC_PCLK_DIV2) ||  \
-          (((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCK_SYNC_PCLK_DIV4))    \
-      {                                                                             \
-        (__HANDLE__)->Instance->CFGR2 &= ~(ADC_CFGR2_CKMODE);                       \
-        (__HANDLE__)->Instance->CFGR2 |=  (__HANDLE__)->Init.ClockPrescaler;        \
-      }                                                                             \
-      else                                                                          \
-      {                                                                             \
-        /* CKMOD bits must be reset */                                              \
-        (__HANDLE__)->Instance->CFGR2 &= ~(ADC_CFGR2_CKMODE);                       \
-        ADC->CCR &= ~(ADC_CCR_PRESC);                                               \
-        ADC->CCR |=  (__HANDLE__)->Init.ClockPrescaler;                             \
-      }                                                                             \
-  } while(0)
-
-
-#define IS_ADC_CLOCKPRESCALER(ADC_CLOCK) (((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1) ||\
-                                          ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV1) ||\
-                                          ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV2) ||\
-                                          ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV4) ||\
-                                          ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1  ) ||\
-                                          ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV2  ) ||\
-                                          ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV4  ) ||\
-                                          ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV6  ) ||\
-                                          ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV8  ) ||\
-                                          ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV10 ) ||\
-                                          ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV12 ) ||\
-                                          ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV16 ) ||\
-                                          ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV32 ) ||\
-                                          ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV64 ) ||\
-                                          ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV128 ) ||\
-                                          ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV256))
-
-#define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION_12B) || \
-                                       ((RESOLUTION) == ADC_RESOLUTION_10B) || \
-                                       ((RESOLUTION) == ADC_RESOLUTION_8B) || \
-                                       ((RESOLUTION) == ADC_RESOLUTION_6B))
-
-#define IS_ADC_RESOLUTION_8_6_BITS(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION_8B) || \
-                                                ((RESOLUTION) == ADC_RESOLUTION_6B))
-
-#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DATAALIGN_RIGHT) || \
-                                  ((ALIGN) == ADC_DATAALIGN_LEFT))
-
-#define IS_ADC_EXTTRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGCONVEDGE_NONE) || \
-                                   ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISING) || \
-                                   ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_FALLING) || \
-                                   ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING))
-
-#define IS_ADC_EOC_SELECTION(EOC_SELECTION) (((EOC_SELECTION) == ADC_EOC_SINGLE_CONV)   || \
-                                             ((EOC_SELECTION) == ADC_EOC_SEQ_CONV)      || \
-                                             ((EOC_SELECTION) == ADC_EOC_SINGLE_SEQ_CONV))
-
-#define IS_ADC_OVERRUN(OVR) (((OVR) == ADC_OVR_DATA_PRESERVED) || \
-                             ((OVR) == ADC_OVR_DATA_OVERWRITTEN))
-
-#define IS_ADC_RANK(WATCHDOG) (((WATCHDOG) == ADC_RANK_CHANNEL_NUMBER) || \
-                               ((WATCHDOG) == ADC_RANK_NONE))
-
-#if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx)
-#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_CHANNEL_0)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_1)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_2)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_3)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_4)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_5)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_6)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_7)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_8)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_9)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_10)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_11)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_12)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_13)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_14)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_15)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR)  || \
-                                 ((CHANNEL) == ADC_CHANNEL_VREFINT)     || \
-                                 ((CHANNEL) == ADC_CHANNEL_VLCD))
-#else
-#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_CHANNEL_0)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_1)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_2)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_3)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_4)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_5)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_6)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_7)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_8)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_9)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_10)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_11)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_12)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_13)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_14)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_15)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR)  || \
-                                 ((CHANNEL) == ADC_CHANNEL_VREFINT))
-#endif
-
-#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SAMPLETIME_1CYCLE_5   ) || \
-                                  ((TIME) == ADC_SAMPLETIME_3CYCLES_5  ) || \
-                                  ((TIME) == ADC_SAMPLETIME_7CYCLES_5  ) || \
-                                  ((TIME) == ADC_SAMPLETIME_12CYCLES_5 ) || \
-                                  ((TIME) == ADC_SAMPLETIME_19CYCLES_5 ) || \
-                                  ((TIME) == ADC_SAMPLETIME_39CYCLES_5 ) || \
-                                  ((TIME) == ADC_SAMPLETIME_79CYCLES_5 ) || \
-                                  ((TIME) == ADC_SAMPLETIME_160CYCLES_5))
-
-#define IS_ADC_SCAN_MODE(SCAN_MODE) (((SCAN_MODE) == ADC_SCAN_DIRECTION_FORWARD) || \
-                                     ((SCAN_MODE) == ADC_SCAN_DIRECTION_BACKWARD))
-
-#define IS_ADC_OVERSAMPLING_RATIO(RATIO)          (((RATIO) == ADC_OVERSAMPLING_RATIO_2   ) || \
-                                                   ((RATIO) == ADC_OVERSAMPLING_RATIO_4   ) || \
-                                                   ((RATIO) == ADC_OVERSAMPLING_RATIO_8   ) || \
-                                                   ((RATIO) == ADC_OVERSAMPLING_RATIO_16  ) || \
-                                                   ((RATIO) == ADC_OVERSAMPLING_RATIO_32  ) || \
-                                                   ((RATIO) == ADC_OVERSAMPLING_RATIO_64  ) || \
-                                                   ((RATIO) == ADC_OVERSAMPLING_RATIO_128 ) || \
-                                                   ((RATIO) == ADC_OVERSAMPLING_RATIO_256 ))
-
-#define IS_ADC_RIGHT_BIT_SHIFT(SHIFT)               (((SHIFT) == ADC_RIGHTBITSHIFT_NONE) || \
-                                                     ((SHIFT) == ADC_RIGHTBITSHIFT_1   ) || \
-                                                     ((SHIFT) == ADC_RIGHTBITSHIFT_2   ) || \
-                                                     ((SHIFT) == ADC_RIGHTBITSHIFT_3   ) || \
-                                                     ((SHIFT) == ADC_RIGHTBITSHIFT_4   ) || \
-                                                     ((SHIFT) == ADC_RIGHTBITSHIFT_5   ) || \
-                                                     ((SHIFT) == ADC_RIGHTBITSHIFT_6   ) || \
-                                                     ((SHIFT) == ADC_RIGHTBITSHIFT_7   ) || \
-                                                     ((SHIFT) == ADC_RIGHTBITSHIFT_8   ))
-
-#define IS_ADC_TRIGGERED_OVERSAMPLING_MODE(MODE)     (((MODE) == ADC_TRIGGEREDMODE_SINGLE_TRIGGER) || \
-                                                      ((MODE) == ADC_TRIGGEREDMODE_MULTI_TRIGGER) )
-
-#define IS_ADC_ANALOG_WATCHDOG_MODE(WATCHDOG)     (((WATCHDOG) == ADC_ANALOGWATCHDOG_NONE      )   || \
-                                                   ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REG)   || \
-                                                   ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REG   ))
-
-#define IS_ADC_CONVERSION_GROUP(CONVERSION)   ((CONVERSION) == ADC_REGULAR_GROUP)
-
-#define IS_ADC_EVENT_TYPE(EVENT) (((EVENT) == ADC_AWD_EVENT) || \
-                                  ((EVENT) == ADC_OVR_EVENT))
-
-
-/** @defgroup ADC_range_verification ADC Range Verification
-  * in function of ADC resolution selected (12, 10, 8 or 6 bits)
-  * @{
-  */
-#define IS_ADC_RANGE(RESOLUTION, ADC_VALUE)                                     \
-   ((((RESOLUTION) == ADC_RESOLUTION_12B) && ((ADC_VALUE) <= ((uint32_t)0x0FFFU))) || \
-    (((RESOLUTION) == ADC_RESOLUTION_10B) && ((ADC_VALUE) <= ((uint32_t)0x03FFU))) || \
-    (((RESOLUTION) == ADC_RESOLUTION_8B)  && ((ADC_VALUE) <= ((uint32_t)0x00FFU))) || \
-    (((RESOLUTION) == ADC_RESOLUTION_6B)  && ((ADC_VALUE) <= ((uint32_t)0x003FU))))
-/**
-  * @}
-  */
-
-/** @defgroup ADC_regular_nb_conv_verification ADC Regular Nb Conversion Verification
-  * @{
-  */
-#define IS_ADC_REGULAR_NB_CONV(LENGTH) (((LENGTH) >= ((uint32_t)1U)) && ((LENGTH) <= ((uint32_t)16U)))
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Include ADC HAL Extended module */
-#include "stm32l0xx_hal_adc_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup ADC_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup ADC_Exported_Functions_Group1
-  * @brief    Initialization and Configuration functions
-  * @{
-  */
-/* Initialization and de-initialization functions  ****************************/
-HAL_StatusTypeDef    HAL_ADC_Init(ADC_HandleTypeDef* hadc);
-HAL_StatusTypeDef    HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
-void                 HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
-void                 HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
-/**
-  * @}
-  */
-
-/** @addtogroup ADC_Exported_Functions_Group2
-  * @brief    IO operation functions
-  * @{
-  */
-/* IO operation functions  *****************************************************/
-
-/* Blocking mode: Polling */
-HAL_StatusTypeDef    HAL_ADC_Start(ADC_HandleTypeDef* hadc);
-HAL_StatusTypeDef    HAL_ADC_Stop(ADC_HandleTypeDef* hadc);
-HAL_StatusTypeDef    HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
-HAL_StatusTypeDef    HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout);
-
-/* Non-blocking mode: Interruption */
-HAL_StatusTypeDef    HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc);
-HAL_StatusTypeDef    HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc);
-
-/* Non-blocking mode: DMA */
-HAL_StatusTypeDef    HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
-HAL_StatusTypeDef    HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc);
-
-/* ADC retrieve conversion value intended to be used with polling or interruption */
-uint32_t             HAL_ADC_GetValue(ADC_HandleTypeDef* hadc);
-
-/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption and DMA) */
-void                 HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc);
-void                 HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc);
-void                 HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc);
-void                 HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc);
-void                 HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
-/**
-  * @}
-  */
-
-/** @addtogroup ADC_Exported_Functions_Group3 Peripheral Control functions
- *  @brief    Peripheral Control functions 
- * @{
- */
-/* Peripheral Control functions ***********************************************/
-HAL_StatusTypeDef    HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig);
-HAL_StatusTypeDef    HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig);
-/**
-  * @}
-  */
-
-/* Peripheral State functions *************************************************/
-/** @addtogroup ADC_Exported_Functions_Group4
-  * @{
-  */
-uint32_t             HAL_ADC_GetState(ADC_HandleTypeDef* hadc);
-uint32_t             HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif /*__STM32L0xx_HAL_ADC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h
deleted file mode 100755
index c88aeb83..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h
+++ /dev/null
@@ -1,229 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_adc_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of ADC HAL extended module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_ADC_EX_H
-#define __STM32L0xx_HAL_ADC_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup ADCEx
-  * @{
-  */ 
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup ADCEx_Exported_Constants ADC Extended Exported Constants
-  * @{
-  */
-
-/** @defgroup ADCEx_Channel_Mode ADC Single Ended
-  * @{
-  */
-#define ADC_SINGLE_ENDED                        (uint32_t)0x00000000U   /* dummy value */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_regular_external_trigger_source ADC External Trigger Source
-  * @{
-  */
-#define ADC_EXTERNALTRIGCONV_T6_TRGO            ((uint32_t)0x00000000U)
-#define ADC_EXTERNALTRIGCONV_T21_CC2            (ADC_CFGR1_EXTSEL_0)
-#define ADC_EXTERNALTRIGCONV_T2_TRGO            (ADC_CFGR1_EXTSEL_1)
-#define ADC_EXTERNALTRIGCONV_T2_CC4             (ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0)
-#define ADC_EXTERNALTRIGCONV_T22_TRGO           (ADC_CFGR1_EXTSEL_2)
-#define ADC_EXTERNALTRIGCONV_T3_TRGO            (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_1)
-#define ADC_EXTERNALTRIGCONV_EXT_IT11           (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0)
-#define ADC_SOFTWARE_START                      (ADC_CFGR1_EXTSEL + (uint32_t)1)
-
-/* ADC group regular external trigger TIM21_TRGO available only on            */
-/* STM32L0 devices categories: Cat.2, Cat.3, Cat.5                            */
-#if defined (STM32L031xx) || defined (STM32L041xx) || \
-    defined (STM32L051xx) || defined (STM32L052xx) || defined (STM32L053xx) || \
-    defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) || \
-    defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || \
-    defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
-#define ADC_EXTERNALTRIGCONV_T21_TRGO           (ADC_EXTERNALTRIGCONV_T22_TRGO)
-#endif
-
-/* ADC group regular external trigger TIM2_CC3 available only on              */
-/* STM32L0 devices categories: Cat.1, Cat.2, Cat.5                            */
-#if defined (STM32L011xx) || defined (STM32L021xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx) || \
-    defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || \
-    defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
-#define ADC_EXTERNALTRIGCONV_T2_CC3             (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_0)
-#endif
-
-/**
-  * @}
-  */
-
-/** @defgroup ADC_SYSCFG_internal_paths_flags_definition ADC SYSCFG internal paths Flags Definition
-  * @{
-  */
-#define ADC_FLAG_SENSOR         SYSCFG_CFGR3_VREFINT_RDYF
-#define ADC_FLAG_VREFINT        SYSCFG_VREFINT_ADC_RDYF
-/**
-  * @}
-  */
-   
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-
-/** @defgroup ADCEx_Private_Macros ADCEx Private Macros
-  * @{
-  */
-
-#define IS_ADC_SINGLE_DIFFERENTIAL(SING_DIFF)   ((SING_DIFF) == ADC_SINGLE_ENDED)
-
-/** @defgroup ADCEx_calibration_factor_length_verification ADC Calibration Factor Length Verification
-  * @{
-  */ 
-/**
-  * @brief Calibration factor length verification (7 bits maximum)
-  * @param _Calibration_Factor_: Calibration factor value
-  * @retval None
-  */
-#define IS_ADC_CALFACT(_Calibration_Factor_) ((_Calibration_Factor_) <= ((uint32_t)0x7FU))
-/**
-  * @}
-  */ 
-
-/** @defgroup ADC_External_trigger_Source ADC External Trigger Source
-  * @{
-  */
-#if defined (STM32L031xx) || defined (STM32L041xx) || \
-    defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || \
-    defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
-#define IS_ADC_EXTTRIG(CONV) (((CONV) == ADC_EXTERNALTRIGCONV_T6_TRGO  ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T21_CC2  ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T2_TRGO  ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T2_CC4   ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T22_TRGO ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T21_TRGO ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T2_CC3   ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T3_TRGO  ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_EXT_IT11 ) || \
-                              ((CONV) == ADC_SOFTWARE_START))
-#elif defined (STM32L011xx) || defined (STM32L021xx)
-#define IS_ADC_EXTTRIG(CONV) (((CONV) == ADC_EXTERNALTRIGCONV_T6_TRGO  ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T21_CC2  ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T2_TRGO  ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T2_CC4   ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T22_TRGO ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T2_CC3   ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T3_TRGO  ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_EXT_IT11 ) || \
-                              ((CONV) == ADC_SOFTWARE_START))
-#elif defined (STM32L051xx) || defined (STM32L052xx) || defined (STM32L053xx) || \
-    defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx)
-#define IS_ADC_EXTTRIG(CONV) (((CONV) == ADC_EXTERNALTRIGCONV_T6_TRGO  ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T21_CC2  ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T2_TRGO  ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T2_CC4   ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T22_TRGO ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T21_TRGO ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_T3_TRGO  ) || \
-                              ((CONV) == ADC_EXTERNALTRIGCONV_EXT_IT11 ) || \
-                              ((CONV) == ADC_SOFTWARE_START))
-#endif
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup ADCEx_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup ADCEx_Exported_Functions_Group1
-  * @{
-  */
-/* IO operation functions *****************************************************/
-
-/* ADC calibration */
-HAL_StatusTypeDef   HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff);
-uint32_t            HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff);
-HAL_StatusTypeDef   HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff, uint32_t CalibrationFactor);
-
-/* ADC VrefInt and Temperature sensor functions specific to this STM32 serie */
-HAL_StatusTypeDef   HAL_ADCEx_EnableVREFINT(void);
-void                HAL_ADCEx_DisableVREFINT(void);
-HAL_StatusTypeDef   HAL_ADCEx_EnableVREFINTTempSensor(void);
-void                HAL_ADCEx_DisableVREFINTTempSensor(void);
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__STM32L0xx_HAL_ADC_EX_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_comp.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_comp.h
deleted file mode 100755
index 8e90a409..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_comp.h
+++ /dev/null
@@ -1,683 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_comp.h
-  * @author  MCD Application Team
-  * @brief   Header file of COMP HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_COMP_H
-#define __STM32L0xx_HAL_COMP_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup COMP
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/ 
-/** @defgroup COMP_Exported_Types COMP Exported Types
-  * @{
-  */
-
-/** 
-  * @brief  COMP Init structure definition  
-  */
-typedef struct
-{
-
-  uint32_t WindowMode;         /*!< Set window mode of a pair of comparators instances
-                                    (2 consecutive instances odd and even COMP and COMP).
-                                    Note: HAL COMP driver allows to set window mode from any COMP instance of the pair of COMP instances composing window mode.
-                                    This parameter can be a value of @ref COMP_WindowMode */
-
-  uint32_t Mode;               /*!< Set comparator operating mode to adjust power and speed.
-                                    Note: For the characteritics of comparator power modes
-                                          (propagation delay and power consumption), refer to device datasheet.
-                                    This parameter can be a value of @ref COMP_PowerMode */
-
-  uint32_t NonInvertingInput;  /*!< Set comparator input plus (non-inverting input).
-                                    This parameter can be a value of @ref COMP_InputPlus */
-
-  uint32_t InvertingInput;     /*!< Set comparator input minus (inverting input).
-                                    This parameter can be a value of @ref COMP_InputMinus */
-
-  uint32_t OutputPol;          /*!< Set comparator output polarity.
-                                    This parameter can be a value of @ref COMP_OutputPolarity */
-
-  uint32_t LPTIMConnection;    /*!< Set comparator output connection to LPTIM peripheral.
-                                    This parameter can be a value of @ref COMP_LPTIMConnection */
-
-  uint32_t TriggerMode;        /*!< Set the comparator output triggering External Interrupt Line (EXTI).
-                                    This parameter can be a value of @ref COMP_EXTI_TriggerMode */
-
-}COMP_InitTypeDef;
-
-/**
-  * @brief  HAL COMP state machine: HAL COMP states definition
-  */
-#define COMP_STATE_BITFIELD_LOCK  ((uint32_t)0x10)
-typedef enum
-{
-  HAL_COMP_STATE_RESET             = 0x00U,                                             /*!< COMP not yet initialized                             */
-  HAL_COMP_STATE_RESET_LOCKED      = (HAL_COMP_STATE_RESET | COMP_STATE_BITFIELD_LOCK), /*!< COMP not yet initialized and configuration is locked */
-  HAL_COMP_STATE_READY             = 0x01U,                                             /*!< COMP initialized and ready for use                   */
-  HAL_COMP_STATE_READY_LOCKED      = (HAL_COMP_STATE_READY | COMP_STATE_BITFIELD_LOCK), /*!< COMP initialized but configuration is locked         */
-  HAL_COMP_STATE_BUSY              = 0x02U,                                             /*!< COMP is running                                      */
-  HAL_COMP_STATE_BUSY_LOCKED       = (HAL_COMP_STATE_BUSY | COMP_STATE_BITFIELD_LOCK)   /*!< COMP is running and configuration is locked          */
-}HAL_COMP_StateTypeDef;
-
-/** 
-  * @brief  COMP Handle Structure definition
-  */
-typedef struct
-{
-  COMP_TypeDef       *Instance;       /*!< Register base address    */
-  COMP_InitTypeDef   Init;            /*!< COMP required parameters */
-  HAL_LockTypeDef    Lock;            /*!< Locking object           */
-  __IO HAL_COMP_StateTypeDef  State;  /*!< COMP communication state */
-} COMP_HandleTypeDef;
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup COMP_Exported_Constants COMP Exported Constants
-  * @{
-  */
-
-/** @defgroup COMP_WindowMode COMP Window Mode
-  * @{
-  */
-#define COMP_WINDOWMODE_DISABLE                 ((uint32_t)0x00000000U) /*!< Window mode disable: Comparators instances pair COMP1 and COMP2 are independent */
-#define COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON (COMP_CSR_COMP1WM)     /*!< Window mode enable: Comparators instances pair COMP1 and COMP2 have their input plus connected together. The common input is COMP1 input plus (COMP2 input plus is no more accessible). */
-/**
-  * @}
-  */
-
-/** @defgroup COMP_PowerMode COMP power mode
-  * @{
-  */
-/* Note: For the characteritics of comparator power modes                     */
-/*       (propagation delay and power consumption),                           */
-/*       refer to device datasheet.                                           */
-#define COMP_POWERMODE_MEDIUMSPEED     (COMP_CSR_COMP2SPEED)       /*!< COMP power mode to low power (indicated as "high speed" in reference manual) (only for COMP instance: COMP2) */
-#define COMP_POWERMODE_ULTRALOWPOWER   ((uint32_t)0x00000000U)     /*!< COMP power mode to ultra low power (indicated as "low speed" in reference manual) (only for COMP instance: COMP2) */
-/**
-  * @}
-  */
-
-/** @defgroup COMP_InputPlus COMP input plus (non-inverting input)
-  * @{
-  */
-#define COMP_INPUT_PLUS_IO1            ((uint32_t)0x00000000U)                            /*!< Comparator input plus connected to IO1 (pin PA1 for COMP1, pin PA3 for COMP2) */
-#define COMP_INPUT_PLUS_IO2            (COMP_CSR_COMP2INPSEL_0)                           /*!< Comparator input plus connected to IO2 (pin PB4 for COMP2) (only for COMP instance: COMP2) */
-#define COMP_INPUT_PLUS_IO3            (COMP_CSR_COMP2INPSEL_1)                           /*!< Comparator input plus connected to IO3 (pin PA5 for COMP2) (only for COMP instance: COMP2) */
-#define COMP_INPUT_PLUS_IO4            (COMP_CSR_COMP2INPSEL_0 | COMP_CSR_COMP2INPSEL_1)  /*!< Comparator input plus connected to IO4 (pin PB6 for COMP2) (only for COMP instance: COMP2) */
-#define COMP_INPUT_PLUS_IO5            (COMP_CSR_COMP2INPSEL_2)                           /*!< Comparator input plus connected to IO5 (pin PB7 for COMP2) (only for COMP instance: COMP2) */
-#if defined (STM32L011xx) || defined (STM32L021xx)
-#define COMP_INPUT_PLUS_IO6            (COMP_CSR_COMP2INPSEL_2 | COMP_CSR_COMP2INPSEL_0)  /*!< Comparator input plus connected to IO6 (pin PA7 for COMP2) (only for COMP instance: COMP2) (Available only on devices STM32L0 category 1) */
-#endif
-/**
-  * @}
-  */
-
-/** @defgroup COMP_InputMinus COMP input minus (inverting input)
-  * @{
-  */
-#define COMP_INPUT_MINUS_1_4VREFINT    (COMP_CSR_COMP2INNSEL_2                                                  ) /*!< Comparator input minus connected to 1/4 VREFINT (only for COMP instance: COMP2) */
-#define COMP_INPUT_MINUS_1_2VREFINT    (COMP_CSR_COMP2INNSEL_2 |                          COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to 1/2 VREFINT (only for COMP instance: COMP2) */
-#define COMP_INPUT_MINUS_3_4VREFINT    (COMP_CSR_COMP2INNSEL_2 | COMP_CSR_COMP2INNSEL_1                         ) /*!< Comparator input minus connected to 3/4 VREFINT (only for COMP instance: COMP2) */
-#define COMP_INPUT_MINUS_VREFINT       ((uint32_t)0x00000000U)                                                    /*!< Comparator input minus connected to VrefInt */
-#define COMP_INPUT_MINUS_DAC1_CH1      (                         COMP_CSR_COMP2INNSEL_1                         ) /*!< Comparator input minus connected to DAC1 channel 1 (DAC_OUT1) */
-#define COMP_INPUT_MINUS_DAC1_CH2      (                         COMP_CSR_COMP2INNSEL_1 | COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to DAC1 channel 2 (DAC_OUT2) */
-#define COMP_INPUT_MINUS_IO1           (                                                  COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to IO1 (pin PA0 for COMP1, pin PA2 for COMP2) */
-#define COMP_INPUT_MINUS_IO2           (COMP_CSR_COMP2INNSEL_2 | COMP_CSR_COMP2INNSEL_1 | COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to IO2 (pin PB3 for COMP2) (only for COMP instance: COMP2) */
-/**
-  * @}
-  */
-
-
-/** @defgroup COMP_LPTIMConnection COMP Low power timer connection definition
-  * @{
-  */
-
-#define COMP_LPTIMCONNECTION_DISABLED               ((uint32_t)0x00000000U)    /*!< COMPx signal is gated */
-#define COMP_LPTIMCONNECTION_IN1_ENABLED            ((uint32_t)0x00000001U)    /*!< COMPx signal is connected to LPTIM input 1 */
-#define COMP_LPTIMCONNECTION_IN2_ENABLED            ((uint32_t)0x00000002U)    /*!< COMPx signal is connected to LPTIM input 2 */
-/**
-  * @}
-  */
-
-/** @defgroup COMP_OutputPolarity COMP output Polarity
-  * @{
-  */
-#define COMP_OUTPUTPOL_NONINVERTED             ((uint32_t)0x00000000U)  /*!< COMP output on GPIO isn't inverted */
-#define COMP_OUTPUTPOL_INVERTED                COMP_CSR_COMPxPOLARITY       /*!< COMP output on GPIO is inverted */
-/**
-  * @}
-  */
-
-/** @defgroup COMP_OutputLevel COMP Output Level
-  * @{
-  */
-/* Note: Comparator output level values are fixed to "0" and "1",             */
-/* corresponding COMP register bit is managed by HAL function to match        */
-/* with these values (independently of bit position in register).             */
-
-/* When output polarity is not inverted, comparator output is low when
-   the input plus is at a lower voltage than the input minus */
-#define COMP_OUTPUT_LEVEL_LOW              ((uint32_t)0x00000000U)
-/* When output polarity is not inverted, comparator output is high when
-   the input plus is at a higher voltage than the input minus */
-#define COMP_OUTPUT_LEVEL_HIGH             ((uint32_t)0x00000001U)
-/**
-  * @}
-  */
-
-/** @defgroup COMP_EXTI_TriggerMode COMP output to EXTI
-  * @{
-  */
-#define COMP_TRIGGERMODE_NONE                 ((uint32_t)0x00000000U)                                    /*!< Comparator output triggering no External Interrupt Line */
-#define COMP_TRIGGERMODE_IT_RISING            (COMP_EXTI_IT | COMP_EXTI_RISING)                         /*!< Comparator output triggering External Interrupt Line event with interruption, on rising edge */
-#define COMP_TRIGGERMODE_IT_FALLING           (COMP_EXTI_IT | COMP_EXTI_FALLING)                        /*!< Comparator output triggering External Interrupt Line event with interruption, on falling edge */
-#define COMP_TRIGGERMODE_IT_RISING_FALLING    (COMP_EXTI_IT | COMP_EXTI_RISING | COMP_EXTI_FALLING)     /*!< Comparator output triggering External Interrupt Line event with interruption, on both rising and falling edges */
-#define COMP_TRIGGERMODE_EVENT_RISING         (COMP_EXTI_EVENT | COMP_EXTI_RISING)                      /*!< Comparator output triggering External Interrupt Line event only (without interruption), on rising edge */
-#define COMP_TRIGGERMODE_EVENT_FALLING        (COMP_EXTI_EVENT | COMP_EXTI_FALLING)                     /*!< Comparator output triggering External Interrupt Line event only (without interruption), on falling edge */
-#define COMP_TRIGGERMODE_EVENT_RISING_FALLING (COMP_EXTI_EVENT | COMP_EXTI_RISING | COMP_EXTI_FALLING)  /*!< Comparator output triggering External Interrupt Line event only (without interruption), on both rising and falling edges */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup COMP_Exported_Macros COMP Exported Macros
-  * @{
-  */
-
-/** @defgroup COMP_Handle_Management  COMP Handle Management
-  * @{
-  */
-
-/** @brief  Reset COMP handle state.
-  * @param  __HANDLE__  COMP handle
-  * @retval None
-  */
-#define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_COMP_STATE_RESET)
-
-/**
-  * @brief  Enable the specified comparator.
-  * @param  __HANDLE__  COMP handle
-  * @retval None
-  */
-#define __HAL_COMP_ENABLE(__HANDLE__)              SET_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_COMPxEN)
-
-/**
-  * @brief  Disable the specified comparator.
-  * @param  __HANDLE__  COMP handle
-  * @retval None
-  */
-#define __HAL_COMP_DISABLE(__HANDLE__)             CLEAR_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_COMPxEN)
-
-/**
-  * @brief  Lock the specified comparator configuration.
-  * @note   Using this macro induce HAL COMP handle state machine being no
-  *         more in line with COMP instance state.
-  *         To keep HAL COMP handle state machine updated, it is recommended
-  *         to use function "HAL_COMP_Lock')".
-  * @param  __HANDLE__  COMP handle
-  * @retval None
-  */
-#define __HAL_COMP_LOCK(__HANDLE__)                SET_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_COMPxLOCK)
-
-/**
-  * @brief  Check whether the specified comparator is locked.
-  * @param  __HANDLE__  COMP handle
-  * @retval Value 0 if COMP instance is not locked, value 1 if COMP instance is locked
-  */
-#define __HAL_COMP_IS_LOCKED(__HANDLE__)           (READ_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_COMPxLOCK) == COMP_CSR_COMPxLOCK)
-
-/**
-  * @}
-  */
-
-/** @defgroup COMP_Exti_Management  COMP external interrupt line management
-  * @{
-  */
-
-/**
-  * @brief  Enable the COMP1 EXTI line rising edge trigger.
-  * @retval None
-  */
-#define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE()    SET_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP1)
-
-/**
-  * @brief  Disable the COMP1 EXTI line rising edge trigger.
-  * @retval None
-  */
-#define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE()   CLEAR_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP1)
-
-/**
-  * @brief  Enable the COMP1 EXTI line falling edge trigger.
-  * @retval None
-  */
-#define __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE()   SET_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP1)
-
-/**
-  * @brief  Disable the COMP1 EXTI line falling edge trigger.
-  * @retval None
-  */
-#define __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE()  CLEAR_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP1)
-
-/**
-  * @brief  Enable the COMP1 EXTI line rising & falling edge trigger.
-  * @retval None
-  */
-#define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_FALLING_EDGE()   do { \
-                                                               __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE(); \
-                                                               __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE(); \
-                                                             } while(0)
-
-/**
-  * @brief  Disable the COMP1 EXTI line rising & falling edge trigger.
-  * @retval None
-  */                                         
-#define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_FALLING_EDGE()  do { \
-                                                               __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE(); \
-                                                               __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE(); \
-                                                             } while(0)
-
-/**
-  * @brief  Enable the COMP1 EXTI line in interrupt mode.
-  * @retval None
-  */
-#define __HAL_COMP_COMP1_EXTI_ENABLE_IT()             SET_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP1)
-
-/**
-  * @brief  Disable the COMP1 EXTI line in interrupt mode.
-  * @retval None
-  */
-#define __HAL_COMP_COMP1_EXTI_DISABLE_IT()            CLEAR_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP1)
-
-/**
-  * @brief  Generate a software interrupt on the COMP1 EXTI line.
-  * @retval None
-  */
-#define __HAL_COMP_COMP1_EXTI_GENERATE_SWIT()         SET_BIT(EXTI->SWIER, COMP_EXTI_LINE_COMP1)
-
-/**
-  * @brief  Enable the COMP1 EXTI line in event mode.
-  * @retval None
-  */
-#define __HAL_COMP_COMP1_EXTI_ENABLE_EVENT()           SET_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP1)
-
-/**
-  * @brief  Disable the COMP1 EXTI line in event mode.
-  * @retval None
-  */
-#define __HAL_COMP_COMP1_EXTI_DISABLE_EVENT()          CLEAR_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP1)
-
-/**
-  * @brief  Check whether the COMP1 EXTI line flag is set.
-  * @retval RESET or SET
-  */
-#define __HAL_COMP_COMP1_EXTI_GET_FLAG()              READ_BIT(EXTI->PR, COMP_EXTI_LINE_COMP1)
-
-/**
-  * @brief  Clear the COMP1 EXTI flag.
-  * @retval None
-  */
-#define __HAL_COMP_COMP1_EXTI_CLEAR_FLAG()            WRITE_REG(EXTI->PR, COMP_EXTI_LINE_COMP1)
-
-/**
-  * @brief  Enable the COMP2 EXTI line rising edge trigger.
-  * @retval None
-  */                                         
-#define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()    SET_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP2)
-
-/**
-  * @brief  Disable the COMP2 EXTI line rising edge trigger.
-  * @retval None
-  */                                         
-#define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE()   CLEAR_BIT(EXTI->RTSR, COMP_EXTI_LINE_COMP2)
-
-/**
-  * @brief  Enable the COMP2 EXTI line falling edge trigger.
-  * @retval None
-  */                                         
-#define __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE()   SET_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP2)
-
-/**
-  * @brief  Disable the COMP2 EXTI line falling edge trigger.
-  * @retval None
-  */                                         
-#define __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE()  CLEAR_BIT(EXTI->FTSR, COMP_EXTI_LINE_COMP2)
-
-/**
-  * @brief  Enable the COMP2 EXTI line rising & falling edge trigger.
-  * @retval None
-  */                                         
-#define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_FALLING_EDGE()   do { \
-                                                               __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE(); \
-                                                               __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE(); \
-                                                             } while(0)
-
-/**
-  * @brief  Disable the COMP2 EXTI line rising & falling edge trigger.
-  * @retval None
-  */                                         
-#define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_FALLING_EDGE()   do { \
-                                                               __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE(); \
-                                                               __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE(); \
-                                                             } while(0)
-
-/**
-  * @brief  Enable the COMP2 EXTI line in interrupt mode.
-  * @retval None
-  */
-#define __HAL_COMP_COMP2_EXTI_ENABLE_IT()             SET_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP2)
-
-/**
-  * @brief  Disable the COMP2 EXTI line in interrupt mode.
-  * @retval None
-  */
-#define __HAL_COMP_COMP2_EXTI_DISABLE_IT()            CLEAR_BIT(EXTI->IMR, COMP_EXTI_LINE_COMP2)
-
-/**
-  * @brief  Generate a software interrupt on the COMP2 EXTI line.
-  * @retval None
-  */
-#define __HAL_COMP_COMP2_EXTI_GENERATE_SWIT()         SET_BIT(EXTI->SWIER, COMP_EXTI_LINE_COMP2)
-
-/**
-  * @brief  Enable the COMP2 EXTI line in event mode.
-  * @retval None
-  */
-#define __HAL_COMP_COMP2_EXTI_ENABLE_EVENT()           SET_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP2)
-
-/**
-  * @brief  Disable the COMP2 EXTI line in event mode.
-  * @retval None
-  */
-#define __HAL_COMP_COMP2_EXTI_DISABLE_EVENT()          CLEAR_BIT(EXTI->EMR, COMP_EXTI_LINE_COMP2)
-
-/**
-  * @brief  Check whether the COMP2 EXTI line flag is set.
-  * @retval RESET or SET
-  */
-#define __HAL_COMP_COMP2_EXTI_GET_FLAG()              READ_BIT(EXTI->PR, COMP_EXTI_LINE_COMP2)
-
-/**
-  * @brief  Clear the COMP2 EXTI flag.
-  * @retval None
-  */
-#define __HAL_COMP_COMP2_EXTI_CLEAR_FLAG()            WRITE_REG(EXTI->PR, COMP_EXTI_LINE_COMP2)
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-/* Private types -------------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup COMP_Private_Constants COMP Private Constants
-  * @{
-  */
-/** @defgroup COMP_ExtiLine COMP EXTI Lines
-  * @{
-  */
-#define COMP_EXTI_LINE_COMP1           (EXTI_IMR_IM21)  /*!< EXTI line 21 connected to COMP1 output */
-#define COMP_EXTI_LINE_COMP2           (EXTI_IMR_IM22)  /*!< EXTI line 22 connected to COMP2 output */
-/**
-  * @}
-  */
-
-/** @defgroup COMP_ExtiLine COMP EXTI Lines
-  * @{
-  */
-#define COMP_EXTI_IT                        ((uint32_t) 0x01U)  /*!< EXTI line event with interruption */
-#define COMP_EXTI_EVENT                     ((uint32_t) 0x02U)  /*!< EXTI line event only (without interruption) */
-#define COMP_EXTI_RISING                    ((uint32_t) 0x10U)  /*!< EXTI line event on rising edge */
-#define COMP_EXTI_FALLING                   ((uint32_t) 0x20U)  /*!< EXTI line event on falling edge */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup COMP_Private_Macros COMP Private Macros
-  * @{
-  */
-
-/** @defgroup COMP_GET_EXTI_LINE COMP private macros to get EXTI line associated with comparators 
-  * @{
-  */
-/**
-  * @brief  Get the specified EXTI line for a comparator instance.
-  * @param  __INSTANCE__  specifies the COMP instance.
-  * @retval value of @ref COMP_ExtiLine
-  */
-#define COMP_GET_EXTI_LINE(__INSTANCE__)    (((__INSTANCE__) == COMP1) ?                 \
-                                             COMP_EXTI_LINE_COMP1 : COMP_EXTI_LINE_COMP2)
-/**
-  * @}
-  */
-
-/** @defgroup COMP_IS_COMP_Definitions COMP private macros to check input parameters
-  * @{
-  */
-#define IS_COMP_WINDOWMODE(__WINDOWMODE__)  (((__WINDOWMODE__) == COMP_WINDOWMODE_DISABLE)                || \
-                                             ((__WINDOWMODE__) == COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON)  )
-
-#define IS_COMP_POWERMODE(__POWERMODE__)    (((__POWERMODE__) == COMP_POWERMODE_MEDIUMSPEED)  || \
-                                             ((__POWERMODE__) == COMP_POWERMODE_ULTRALOWPOWER)  )
-
-#define IS_COMP_WINDOWMODE_INSTANCE(INSTANCE) ((INSTANCE) == COMP1)
-
-#if defined (STM32L011xx) || defined (STM32L021xx)
-#define IS_COMP_INPUT_PLUS(__COMP_INSTANCE__, __INPUT_PLUS__)                  \
-  (((__COMP_INSTANCE__) == COMP1)                                              \
-    ? (                                                                        \
-       (__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1                                 \
-      )                                                                        \
-      :                                                                        \
-      (                                                                        \
-          ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1)                            \
-       || ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO2)                            \
-       || ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO3)                            \
-       || ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO4)                            \
-       || ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO5)                            \
-       || ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO6)                            \
-      )                                                                        \
-  )
-#else
-#define IS_COMP_INPUT_PLUS(__COMP_INSTANCE__, __INPUT_PLUS__)                  \
-  (((__COMP_INSTANCE__) == COMP1)                                              \
-    ? (                                                                        \
-       (__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1                                 \
-      )                                                                        \
-      :                                                                        \
-      (                                                                        \
-          ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1)                            \
-       || ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO2)                            \
-       || ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO3)                            \
-       || ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO4)                            \
-       || ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO5)                            \
-      )                                                                        \
-  )
-#endif
-
-#define IS_COMP_INPUT_MINUS(__COMP_INSTANCE__, __INPUT_MINUS__)                \
-  (((__COMP_INSTANCE__) == COMP1)                                              \
-    ? (                                                                        \
-          ((__INPUT_MINUS__) == COMP_INPUT_MINUS_VREFINT)                      \
-       || ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH1)                     \
-       || ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH2)                     \
-       || ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO1)                          \
-      )                                                                        \
-      :                                                                        \
-      (                                                                        \
-          ((__INPUT_MINUS__) == COMP_INPUT_MINUS_1_4VREFINT)                   \
-       || ((__INPUT_MINUS__) == COMP_INPUT_MINUS_1_2VREFINT)                   \
-       || ((__INPUT_MINUS__) == COMP_INPUT_MINUS_3_4VREFINT)                   \
-       || ((__INPUT_MINUS__) == COMP_INPUT_MINUS_VREFINT)                      \
-       || ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH1)                     \
-       || ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH2)                     \
-       || ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO1)                          \
-       || ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO2)                          \
-      )                                                                        \
-  )
-
-#define IS_COMP1_LPTIMCONNECTION(LPTIMCONNECTION)   (((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_DISABLED) || \
-                                                     ((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_IN1_ENABLED))
-
-#define IS_COMP2_LPTIMCONNECTION(LPTIMCONNECTION)   (((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_DISABLED) || \
-                                                     ((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_IN1_ENABLED) || \
-                                                     ((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_IN2_ENABLED))
-
-#define IS_COMP2_LPTIMCONNECTION_RESTRICTED(LPTIMCONNECTION)   (((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_DISABLED) || \
-                                                                ((LPTIMCONNECTION) == COMP_LPTIMCONNECTION_IN1_ENABLED))
-
-#define IS_COMP_OUTPUTPOL(POL)  (((POL) == COMP_OUTPUTPOL_NONINVERTED)  || \
-                                 ((POL) == COMP_OUTPUTPOL_INVERTED))
-
-#define IS_COMP_TRIGGERMODE(__TRIGGERMODE__) (((__TRIGGERMODE__) == COMP_TRIGGERMODE_NONE)                 || \
-                                              ((__TRIGGERMODE__) == COMP_TRIGGERMODE_IT_RISING)            || \
-                                              ((__TRIGGERMODE__) == COMP_TRIGGERMODE_IT_FALLING)           || \
-                                              ((__TRIGGERMODE__) == COMP_TRIGGERMODE_IT_RISING_FALLING)    || \
-                                              ((__TRIGGERMODE__) == COMP_TRIGGERMODE_EVENT_RISING)         || \
-                                              ((__TRIGGERMODE__) == COMP_TRIGGERMODE_EVENT_FALLING)        || \
-                                              ((__TRIGGERMODE__) == COMP_TRIGGERMODE_EVENT_RISING_FALLING)   )
-
-
-#define IS_COMP_OUTPUT_LEVEL(__OUTPUT_LEVEL__) (((__OUTPUT_LEVEL__) == COMP_OUTPUT_LEVEL_LOW)     || \
-                                                ((__OUTPUT_LEVEL__) == COMP_OUTPUT_LEVEL_HIGH))
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Include COMP HAL Extended module */
-#include "stm32l0xx_hal_comp_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup COMP_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup COMP_Exported_Functions_Group1
-  * @{
-  */
-
-/* Initialization and de-initialization functions  **********************************/
-HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp);
-HAL_StatusTypeDef HAL_COMP_DeInit (COMP_HandleTypeDef *hcomp);
-void              HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp);
-void              HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp);
-/**
-  * @}
-  */
-
-/* IO operation functions  *****************************************************/
-/** @addtogroup COMP_Exported_Functions_Group2
-  * @{
-  */
-HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp);
-HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp);
-void              HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp);
-/**
-  * @}
-  */
-
-/* Peripheral Control functions  ************************************************/
-/** @addtogroup COMP_Exported_Functions_Group3
-  * @{
-  */
-HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp);
-uint32_t          HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp);
-/* Callback in interrupt mode */
-void              HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp);
-/**
-  * @}
-  */
-
-/* Peripheral State functions  **************************************************/
-/** @addtogroup COMP_Exported_Functions_Group4
-  * @{
-  */
-HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp);
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_COMP_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_comp_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_comp_ex.h
deleted file mode 100755
index 4b4fa0a9..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_comp_ex.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_comp_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of COMP HAL Extended module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_COMP_EX_H
-#define __STM32L0xx_HAL_COMP_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup COMPEx COMPEx
-  * @{
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup COMPEx_Exported_Functions COMPEx Exported Functions
-  * @{
-  */
-
-/** @defgroup COMPEx_Exported_Functions_Group1 Extended COMP VREFINT setup functions
- * @{
- */
-/* COMP specific functions to manage VREFINT *************************************/
-void HAL_COMPEx_EnableVREFINT(void);
-void HAL_COMPEx_DisableVREFINT(void);
-   
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_COMP_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_conf_template.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_conf_template.h
deleted file mode 100755
index 9e283074..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_conf_template.h
+++ /dev/null
@@ -1,314 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_conf.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration template file. 
-  *          This file should be copied to the application folder and renamed
-  *          to stm32l0xx_hal_conf.h.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_CONF_H
-#define __STM32L0xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver 
-  */
-#define HAL_MODULE_ENABLED  
-#define HAL_ADC_MODULE_ENABLED   
-#define HAL_COMP_MODULE_ENABLED 
-#define HAL_CRC_MODULE_ENABLED  
-#define HAL_CRYP_MODULE_ENABLED  
-#define HAL_DAC_MODULE_ENABLED   
-#define HAL_DMA_MODULE_ENABLED
-#define HAL_FIREWALL_MODULE_ENABLED
-#define HAL_FLASH_MODULE_ENABLED
-#define HAL_GPIO_MODULE_ENABLED
-#define HAL_I2C_MODULE_ENABLED
-#define HAL_I2S_MODULE_ENABLED   
-#define HAL_IWDG_MODULE_ENABLED
-#define HAL_LCD_MODULE_ENABLED 
-#define HAL_LPTIM_MODULE_ENABLED
-#define HAL_PWR_MODULE_ENABLED  
-#define HAL_RCC_MODULE_ENABLED 
-#define HAL_RNG_MODULE_ENABLED   
-#define HAL_RTC_MODULE_ENABLED
-#define HAL_SPI_MODULE_ENABLED   
-#define HAL_TIM_MODULE_ENABLED
-#define HAL_TSC_MODULE_ENABLED   
-#define HAL_UART_MODULE_ENABLED 
-#define HAL_USART_MODULE_ENABLED 
-#define HAL_IRDA_MODULE_ENABLED 
-#define HAL_SMARTCARD_MODULE_ENABLED 
-#define HAL_SMBUS_MODULE_ENABLED 
-#define HAL_WWDG_MODULE_ENABLED  
-#define HAL_CORTEX_MODULE_ENABLED
-#define HAL_PCD_MODULE_ENABLED 
-
-/* ########################## Oscillator Values adaptation ####################*/
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
-  */
-#if !defined  (HSE_VALUE) 
-  #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal Multiple Speed oscillator (MSI) default value.
-  *        This value is the default MSI range value after Reset.
-  */
-#if !defined  (MSI_VALUE)
-  #define MSI_VALUE    ((uint32_t)2000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* MSI_VALUE */
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal High Speed oscillator for USB (HSI48) value.
-  */
-#if !defined  (HSI48_VALUE) 
-#define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB in Hz.
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-#endif /* HSI48_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE) 
- #define LSI_VALUE  ((uint32_t)37000U)       /*!< LSI Typical Value in Hz*/
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.*/
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  *        This value is used by the UART, RTC HAL module to compute the system frequency
-  */
-#if !defined  (LSE_VALUE)
-  #define LSE_VALUE    ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/
-#endif /* LSE_VALUE */
-
-/**
-  * @brief Time out for LSE start up value in ms.
-  */
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-   
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */     
-#define  VDD_VALUE                    ((uint32_t)3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (((uint32_t)1U<<__NVIC_PRIO_BITS) - 1U)    /*!< tick interrupt priority */            
-#define  USE_RTOS                     0U     
-#define  PREFETCH_ENABLE              1U              
-#define  PREREAD_ENABLE               0U
-#define  BUFFER_CACHE_DISABLE         0U
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1 */
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file 
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32l0xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-  
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32l0xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32l0xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32l0xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32l0xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_COMP_MODULE_ENABLED
-  #include "stm32l0xx_hal_comp.h"
-#endif /* HAL_COMP_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32l0xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32l0xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32l0xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_FIREWALL_MODULE_ENABLED
-  #include "stm32l0xx_hal_firewall.h"
-#endif /* HAL_FIREWALL_MODULE_ENABLED */
- 
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32l0xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
- 
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32l0xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32l0xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32l0xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LCD_MODULE_ENABLED
- #include "stm32l0xx_hal_lcd.h"
-#endif /* HAL_LCD_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
-#include "stm32l0xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-   
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32l0xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32l0xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32l0xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32l0xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32l0xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_TSC_MODULE_ENABLED
- #include "stm32l0xx_hal_tsc.h"
-#endif /* HAL_TSC_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32l0xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32l0xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32l0xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32l0xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
- #include "stm32l0xx_hal_smbus.h"
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32l0xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32l0xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_CONF_H */
- 
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h
deleted file mode 100755
index effe21fc..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h
+++ /dev/null
@@ -1,416 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_cortex.h
-  * @author  MCD Application Team
-  * @brief   Header file of CORTEX HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_CORTEX_H
-#define __STM32L0xx_HAL_CORTEX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup CORTEX CORTEX
-  * @{
-  */ 
-/* Exported types ------------------------------------------------------------*/
-
-/** @defgroup CORTEX_Exported_Types CORTEX Exported Types
-  * @{
-  */
-
-#if (__MPU_PRESENT == 1)
-/** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition
-  * @{
-  */
-typedef struct
-{
-  uint32_t               BaseAddress;           /*!< Specifies the base address of the region to protect.                           */
-
-  uint8_t                Enable;                /*!< Specifies the status of the region.
-                                                     This parameter can be a value of @ref CORTEX_MPU_Region_Enable                 */
-  uint8_t                Number;                /*!< Specifies the number of the region to protect.
-                                                     This parameter can be a value of @ref CORTEX_MPU_Region_Number                 */
-
-  uint8_t                Size;                  /*!< Specifies the size of the region to protect.
-                                                     This parameter can be a value of @ref CORTEX_MPU_Region_Size                   */
-  uint8_t                SubRegionDisable;      /*!< Specifies the number of the subregion protection to disable.
-                                                     This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF    */
-  uint8_t                TypeExtField;          /*!< This parameter is NOT used but is kept to keep API unified through all families*/
-
-  uint8_t                AccessPermission;      /*!< Specifies the region access permission type.
-                                                     This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes  */
-  uint8_t                DisableExec;           /*!< Specifies the instruction access status.
-                                                     This parameter can be a value of @ref CORTEX_MPU_Instruction_Access            */
-  uint8_t                IsShareable;           /*!< Specifies the shareability status of the protected region.
-                                                     This parameter can be a value of @ref CORTEX_MPU_Access_Shareable              */
-  uint8_t                IsCacheable;           /*!< Specifies the cacheable status of the region protected.
-                                                     This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable              */
-  uint8_t                IsBufferable;          /*!< Specifies the bufferable status of the protected region.
-                                                     This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable             */
-}MPU_Region_InitTypeDef;
-/**
-  * @}
-  */
-#endif /* __MPU_PRESENT */
-
-/**
-  * @}
-  */
-
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup CORTEX_Exported_Constants CORTEx Exported Constants
-  * @{
-  */
-
-
-#define IS_NVIC_PREEMPTION_PRIORITY(__PRIORITY__)  ((__PRIORITY__) < 0x4U)
-
-#define IS_NVIC_DEVICE_IRQ(IRQ)                ((IRQ) >= 0x0)
-
-/** @defgroup CORTEX_SysTick_clock_source CORTEX SysTick Clock Source
-  * @{
-  */
-#define SYSTICK_CLKSOURCE_HCLK_DIV8    ((uint32_t)0x00000000U)
-#define SYSTICK_CLKSOURCE_HCLK         ((uint32_t)0x00000004U)
-#define IS_SYSTICK_CLK_SOURCE(__SOURCE__) (((__SOURCE__) == SYSTICK_CLKSOURCE_HCLK) || \
-                                       ((__SOURCE__) == SYSTICK_CLKSOURCE_HCLK_DIV8))
-/**
-  * @}
-  */
-
-#if (__MPU_PRESENT == 1)
-/** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control CORTEX MPU HFNMI and PRIVILEGED Access control
-  * @{
-  */
-#define  MPU_HFNMI_PRIVDEF_NONE      ((uint32_t)0x00000000U)
-#define  MPU_HARDFAULT_NMI           ((uint32_t)0x00000002U)
-#define  MPU_PRIVILEGED_DEFAULT      ((uint32_t)0x00000004U)
-#define  MPU_HFNMI_PRIVDEF           ((uint32_t)0x00000006U)
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable
-  * @{
-  */
-#define  MPU_REGION_ENABLE           ((uint8_t)0x01U)
-#define  MPU_REGION_DISABLE          ((uint8_t)0x00U)
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access
-  * @{
-  */
-#define  MPU_INSTRUCTION_ACCESS_ENABLE      ((uint8_t)0x00U)
-#define  MPU_INSTRUCTION_ACCESS_DISABLE     ((uint8_t)0x01U)
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable
-  * @{
-  */
-#define  MPU_ACCESS_SHAREABLE        ((uint8_t)0x01U)
-#define  MPU_ACCESS_NOT_SHAREABLE    ((uint8_t)0x00U)
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable
-  * @{
-  */
-#define  MPU_ACCESS_CACHEABLE        ((uint8_t)0x01U)
-#define  MPU_ACCESS_NOT_CACHEABLE    ((uint8_t)0x00U)
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable
-  * @{
-  */
-#define  MPU_ACCESS_BUFFERABLE       ((uint8_t)0x01U)
-#define  MPU_ACCESS_NOT_BUFFERABLE   ((uint8_t)0x00U)
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size
-  * @{
-  */
-#define   MPU_REGION_SIZE_32B        ((uint8_t)0x04U)
-#define   MPU_REGION_SIZE_64B        ((uint8_t)0x05U)
-#define   MPU_REGION_SIZE_128B       ((uint8_t)0x06U)
-#define   MPU_REGION_SIZE_256B       ((uint8_t)0x07U)
-#define   MPU_REGION_SIZE_512B       ((uint8_t)0x08U)
-#define   MPU_REGION_SIZE_1KB        ((uint8_t)0x09U)
-#define   MPU_REGION_SIZE_2KB        ((uint8_t)0x0AU)
-#define   MPU_REGION_SIZE_4KB        ((uint8_t)0x0BU)
-#define   MPU_REGION_SIZE_8KB        ((uint8_t)0x0CU)
-#define   MPU_REGION_SIZE_16KB       ((uint8_t)0x0DU)
-#define   MPU_REGION_SIZE_32KB       ((uint8_t)0x0EU)
-#define   MPU_REGION_SIZE_64KB       ((uint8_t)0x0FU)
-#define   MPU_REGION_SIZE_128KB      ((uint8_t)0x10U)
-#define   MPU_REGION_SIZE_256KB      ((uint8_t)0x11U)
-#define   MPU_REGION_SIZE_512KB      ((uint8_t)0x12U)
-#define   MPU_REGION_SIZE_1MB        ((uint8_t)0x13U)
-#define   MPU_REGION_SIZE_2MB        ((uint8_t)0x14U)
-#define   MPU_REGION_SIZE_4MB        ((uint8_t)0x15U)
-#define   MPU_REGION_SIZE_8MB        ((uint8_t)0x16U)
-#define   MPU_REGION_SIZE_16MB       ((uint8_t)0x17U)
-#define   MPU_REGION_SIZE_32MB       ((uint8_t)0x18U)
-#define   MPU_REGION_SIZE_64MB       ((uint8_t)0x19U)
-#define   MPU_REGION_SIZE_128MB      ((uint8_t)0x1AU)
-#define   MPU_REGION_SIZE_256MB      ((uint8_t)0x1BU)
-#define   MPU_REGION_SIZE_512MB      ((uint8_t)0x1CU)
-#define   MPU_REGION_SIZE_1GB        ((uint8_t)0x1DU)
-#define   MPU_REGION_SIZE_2GB        ((uint8_t)0x1EU)
-#define   MPU_REGION_SIZE_4GB        ((uint8_t)0x1FU)
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes
-  * @{
-  */
-#define  MPU_REGION_NO_ACCESS        ((uint8_t)0x00U)
-#define  MPU_REGION_PRIV_RW          ((uint8_t)0x01U)
-#define  MPU_REGION_PRIV_RW_URO      ((uint8_t)0x02U)
-#define  MPU_REGION_FULL_ACCESS      ((uint8_t)0x03U)
-#define  MPU_REGION_PRIV_RO          ((uint8_t)0x05U)
-#define  MPU_REGION_PRIV_RO_URO      ((uint8_t)0x06U)
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number
-  * @{
-  */
-#define  MPU_REGION_NUMBER0          ((uint8_t)0x00U)
-#define  MPU_REGION_NUMBER1          ((uint8_t)0x01U)
-#define  MPU_REGION_NUMBER2          ((uint8_t)0x02U)
-#define  MPU_REGION_NUMBER3          ((uint8_t)0x03U)
-#define  MPU_REGION_NUMBER4          ((uint8_t)0x04U)
-#define  MPU_REGION_NUMBER5          ((uint8_t)0x05U)
-#define  MPU_REGION_NUMBER6          ((uint8_t)0x06U)
-#define  MPU_REGION_NUMBER7          ((uint8_t)0x07U)
-/**
-  * @}
-  */
-#endif /* __MPU_PRESENT */
-
-
-/**
-  * @}
-  */  
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions
-  * @{
-  */
-  
-/** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions 
- *  @brief    Initialization and Configuration functions
- * @{
-  */
-void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
-void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
-void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
-void HAL_NVIC_SystemReset(void);
-uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
-#if (__MPU_PRESENT == 1)
-/**
-  * @brief  Disable the MPU.
-  * @retval None
-  */
-__STATIC_INLINE void HAL_MPU_Disable(void)
-{
-
-  /*Data Memory Barrier setup */
-  __DMB();
-  /* Disable the MPU */
-  MPU->CTRL = 0;
-}
-
-/**
-  * @brief  Enable the MPU.
-  * @param  MPU_Control: Specifies the control mode of the MPU during hard fault,
-  *          NMI, FAULTMASK and privileged access to the default memory
-  *          This parameter can be one of the following values:
-  *            @arg MPU_HFNMI_PRIVDEF_NONE
-  *            @arg MPU_HARDFAULT_NMI
-  *            @arg MPU_PRIVILEGED_DEFAULT
-  *            @arg MPU_HFNMI_PRIVDEF
-  * @retval None
-  */
-
-__STATIC_INLINE void HAL_MPU_Enable(uint32_t MPU_Control)
-{
-  /* Enable the MPU */
-   MPU->CTRL   = MPU_Control | MPU_CTRL_ENABLE_Msk;
-  /* Data Synchronization Barrier setup */
-  __DSB();
-  /* Instruction Synchronization Barrier setup */
-  __ISB();
-
-}
-#endif /* __MPU_PRESENT */
-/**
-  * @}
-  */
-  
-/** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
- *  @brief   Cortex control functions
- * @{
- */
- 
-uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn);
-uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
-void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
-void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
-void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
-void HAL_SYSTICK_IRQHandler(void);
-void HAL_SYSTICK_Callback(void);
-#if (__MPU_PRESENT == 1)
-void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
-#endif /* __MPU_PRESENT */
-/**
-  * @}
-  */
-  
-  /**
-  * @}
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup CORTEX_Private_Macros CORTEX Private Macros
-  * @{
-  */
-
-#if (__MPU_PRESENT == 1)
-#define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \
-                                     ((STATE) == MPU_REGION_DISABLE))
-
-#define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
-                                          ((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE))
-
-#define IS_MPU_ACCESS_SHAREABLE(STATE)   (((STATE) == MPU_ACCESS_SHAREABLE) || \
-                                          ((STATE) == MPU_ACCESS_NOT_SHAREABLE))
-
-#define IS_MPU_ACCESS_CACHEABLE(STATE)   (((STATE) == MPU_ACCESS_CACHEABLE) || \
-                                          ((STATE) == MPU_ACCESS_NOT_CACHEABLE))
-
-#define IS_MPU_ACCESS_BUFFERABLE(STATE)   (((STATE) == MPU_ACCESS_BUFFERABLE) || \
-                                          ((STATE) == MPU_ACCESS_NOT_BUFFERABLE))
-
-#define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS)   || \
-                                                  ((TYPE) == MPU_REGION_PRIV_RW)     || \
-                                                  ((TYPE) == MPU_REGION_PRIV_RW_URO) || \
-                                                  ((TYPE) == MPU_REGION_FULL_ACCESS) || \
-                                                  ((TYPE) == MPU_REGION_PRIV_RO)     || \
-                                                  ((TYPE) == MPU_REGION_PRIV_RO_URO))
-
-#define IS_MPU_REGION_NUMBER(NUMBER)    (((NUMBER) == MPU_REGION_NUMBER0) || \
-                                         ((NUMBER) == MPU_REGION_NUMBER1) || \
-                                         ((NUMBER) == MPU_REGION_NUMBER2) || \
-                                         ((NUMBER) == MPU_REGION_NUMBER3) || \
-                                         ((NUMBER) == MPU_REGION_NUMBER4) || \
-                                         ((NUMBER) == MPU_REGION_NUMBER5) || \
-                                         ((NUMBER) == MPU_REGION_NUMBER6) || \
-                                         ((NUMBER) == MPU_REGION_NUMBER7))
-
-#define IS_MPU_REGION_SIZE(SIZE)    (((SIZE) == MPU_REGION_SIZE_256B)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_512B)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_1KB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_2KB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_4KB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_8KB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_16KB)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_32KB)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_64KB)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_128KB) || \
-                                     ((SIZE) == MPU_REGION_SIZE_256KB) || \
-                                     ((SIZE) == MPU_REGION_SIZE_512KB) || \
-                                     ((SIZE) == MPU_REGION_SIZE_1MB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_2MB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_4MB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_8MB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_16MB)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_32MB)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_64MB)  || \
-                                     ((SIZE) == MPU_REGION_SIZE_128MB) || \
-                                     ((SIZE) == MPU_REGION_SIZE_256MB) || \
-                                     ((SIZE) == MPU_REGION_SIZE_512MB) || \
-                                     ((SIZE) == MPU_REGION_SIZE_1GB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_2GB)   || \
-                                     ((SIZE) == MPU_REGION_SIZE_4GB))
-
-#define IS_MPU_SUB_REGION_DISABLE(SUBREGION)  ((SUBREGION) < (uint16_t)0x00FFU)
-#endif /* __MPU_PRESENT */
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */
-  
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_CORTEX_H */
- 
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_crc.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_crc.h
deleted file mode 100755
index fffdac0a..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_crc.h
+++ /dev/null
@@ -1,382 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_crc.h
-  * @author  MCD Application Team
-  * @brief   Header file of CRC HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_CRC_H
-#define __STM32L0xx_HAL_CRC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup CRC CRC
-  * @{
-  */ 
-
-   /** @defgroup CRC_Exported_Types CRC Exported Types
-  * @{
-  */
-/* Exported types ------------------------------------------------------------*/ 
-
-/** 
-  * @brief  CRC HAL State Structure definition  
-  */ 
-typedef enum
-{                                            
-  HAL_CRC_STATE_RESET     = 0x00U,  /*!< CRC not yet initialized or disabled */
-  HAL_CRC_STATE_READY     = 0x01U,  /*!< CRC initialized and ready for use   */
-  HAL_CRC_STATE_BUSY      = 0x02U,  /*!< CRC internal process is ongoing     */
-  HAL_CRC_STATE_TIMEOUT   = 0x03U,  /*!< CRC timeout state                   */
-  HAL_CRC_STATE_ERROR     = 0x04U   /*!< CRC error state                     */
-}HAL_CRC_StateTypeDef;
-
-
-/** 
-  * @brief CRC Init Structure definition  
-  */ 
-typedef struct
-{
-  uint8_t DefaultPolynomialUse;       /*!< This parameter is a value of @ref CRC_Default_Polynomial and indicates if default polynomial is used.  
-                                            If set to DEFAULT_POLYNOMIAL_ENABLE, resort to default 
-                                            X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1. 
-                                            In that case, there is no need to set GeneratingPolynomial field.
-                                            If otherwise set to DEFAULT_POLYNOMIAL_DISABLE, GeneratingPolynomial and CRCLength fields must be set */
-
-  uint8_t DefaultInitValueUse;        /*!< This parameter is a value of @ref CRC_Default_InitValue_Use and indicates if default init value is used. 
-                                           If set to DEFAULT_INIT_VALUE_ENABLE, resort to default
-                                           0xFFFFFFFF value. In that case, there is no need to set InitValue field.   
-                                           If otherwise set to DEFAULT_INIT_VALUE_DISABLE,  InitValue field must be set */
-
-  uint32_t GeneratingPolynomial;      /*!< Set CRC generating polynomial. 7, 8, 16 or 32-bit long value for a polynomial degree
-                                           respectively equal to 7, 8, 16 or 32. This field is written in normal representation, 
-                                           e.g., for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65.
-                                           No need to specify it if DefaultPolynomialUse is set to DEFAULT_POLYNOMIAL_ENABLE   */                                                
-
-  uint32_t CRCLength;                 /*!< This parameter is a value of @ref CRC_Polynomial_Sizes and indicates CRC length.
-                                           Value can be either one of
-                                           CRC_POLYLENGTH_32B                  (32-bit CRC)
-                                           CRC_POLYLENGTH_16B                  (16-bit CRC)
-                                           CRC_POLYLENGTH_8B                   (8-bit CRC)
-                                           CRC_POLYLENGTH_7B                   (7-bit CRC) */
-                                              
-  uint32_t InitValue;                 /*!< Init value to initiate CRC computation. No need to specify it if DefaultInitValueUse 
-                                           is set to DEFAULT_INIT_VALUE_ENABLE   */                                                
-  
-  uint32_t InputDataInversionMode;    /*!< This parameter is a value of @ref CRCEx_Input_Data_Inversion and specifies input data inversion mode. 
-                                           Can be either one of the following values 
-                                           CRC_INPUTDATA_INVERSION_NONE      no input data inversion
-                                           CRC_INPUTDATA_INVERSION_BYTE      byte-wise inversion, 0x1A2B3C4D becomes 0x58D43CB2
-                                           CRC_INPUTDATA_INVERSION_HALFWORD  halfword-wise inversion, 0x1A2B3C4D becomes 0xD458B23C
-                                           CRC_INPUTDATA_INVERSION_WORD      word-wise inversion, 0x1A2B3C4D becomes 0xB23CD458 */  
-                                              
-  uint32_t OutputDataInversionMode;   /*!< This parameter is a value of @ref CRCEx_Output_Data_Inversion and specifies output data (i.e. CRC) inversion mode.
-                                            Can be either 
-                                            CRC_OUTPUTDATA_INVERSION_DISABLE   no CRC inversion, or
-                                            CRC_OUTPUTDATA_INVERSION_ENABLE    CRC 0x11223344 is converted into 0x22CC4488 */
-}CRC_InitTypeDef;
-
-
-/** 
-  * @brief  CRC Handle Structure definition  
-  */ 
-typedef struct
-{
-  CRC_TypeDef                 *Instance;   /*!< Register base address        */ 
-  
-  CRC_InitTypeDef             Init;        /*!< CRC configuration parameters */
-  
-  HAL_LockTypeDef             Lock;        /*!< CRC Locking object           */
-    
-  __IO HAL_CRC_StateTypeDef   State;       /*!< CRC communication state      */
-  
-  uint32_t InputDataFormat;                /*!< This parameter is a value of @ref CRC_Input_Buffer_Format and specifies input data format. 
-                                            Can be either 
-                                            CRC_INPUTDATA_FORMAT_BYTES       input data is a stream of bytes (8-bit data)
-                                            CRC_INPUTDATA_FORMAT_HALFWORDS   input data is a stream of half-words (16-bit data)
-                                            CRC_INPUTDATA_FORMAT_WORDS       input data is a stream of words (32-bits data)                                                                                        
-                                           Note that constant CRC_INPUT_FORMAT_UNDEFINED is defined but an initialization error
-                                           must occur if InputBufferFormat is not one of the three values listed above  */ 
-}CRC_HandleTypeDef;
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup CRC_Exported_Constants   CRC Exported Constants
-  * @{
-  */
-  
-/** @defgroup CRC_Default_Polynomial_Value    Default CRC generating polynomial
-  * @{
-  */
-#define DEFAULT_CRC32_POLY      0x04C11DB7U
-
-/**
-  * @}
-  */
-
-/** @defgroup CRC_Default_InitValue    Default CRC computation initialization value
-  * @{
-  */
-#define DEFAULT_CRC_INITVALUE   0xFFFFFFFFU
-
-/**
-  * @}
-  */
-
-/** @defgroup CRC_Default_Polynomial    Indicates whether or not default polynomial is used
-  * @{
-  */
-#define DEFAULT_POLYNOMIAL_ENABLE       ((uint8_t)0x00U)
-#define DEFAULT_POLYNOMIAL_DISABLE      ((uint8_t)0x01U)
-
-/**
-  * @}
-  */
- 
-/** @defgroup CRC_Default_InitValue_Use    Indicates whether or not default init value is used
-  * @{
-  */                                      
-#define DEFAULT_INIT_VALUE_ENABLE      ((uint8_t)0x00U)
-#define DEFAULT_INIT_VALUE_DISABLE     ((uint8_t)0x01U)
-
-
-/**
-  * @}
-  */
-
-/** @defgroup CRC_Polynomial_Sizes Polynomial sizes to configure the IP
-  * @{
-  */
-#define CRC_POLYLENGTH_32B                  ((uint32_t)0x00000000U)
-#define CRC_POLYLENGTH_16B                  ((uint32_t)CRC_CR_POLYSIZE_0)
-#define CRC_POLYLENGTH_8B                   ((uint32_t)CRC_CR_POLYSIZE_1)
-#define CRC_POLYLENGTH_7B                   ((uint32_t)CRC_CR_POLYSIZE)
-/**
-  * @}
-  */
-
-/** @defgroup CRC_Polynomial_Size_Definitions CRC polynomial possible sizes actual definitions
-  * @{
-  */
-#define HAL_CRC_LENGTH_32B     32U
-#define HAL_CRC_LENGTH_16B     16U
-#define HAL_CRC_LENGTH_8B       8U
-#define HAL_CRC_LENGTH_7B       7U
-
-/**
-  * @}
-  */  
-
-/** @defgroup CRC_Input_Buffer_Format CRC input buffer format
-  * @{
-  */
-/* WARNING: CRC_INPUT_FORMAT_UNDEFINED is created for reference purposes but
- * an error is triggered in HAL_CRC_Init() if InputDataFormat field is set 
- * to CRC_INPUT_FORMAT_UNDEFINED: the format MUST be defined by the user for 
- * the CRC APIs to provide a correct result */   
-#define CRC_INPUTDATA_FORMAT_UNDEFINED             ((uint32_t)0x00000000U)
-#define CRC_INPUTDATA_FORMAT_BYTES                 ((uint32_t)0x00000001U)
-#define CRC_INPUTDATA_FORMAT_HALFWORDS             ((uint32_t)0x00000002U)
-#define CRC_INPUTDATA_FORMAT_WORDS                 ((uint32_t)0x00000003U)
-
-/** 
-  * @}
-  */   
-
-/** 
-  * @}
-  */ 
-/* Exported macros -----------------------------------------------------------*/
-
-/** @defgroup CRC_Exported_Macros CRC Exported Macros
-  * @{
-  */
-
-/** @brief Reset CRC handle state
-  * @param  __HANDLE__: CRC handle.
-  * @retval None
-  */
-#define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET)
-
-/**
-  * @brief  Reset CRC Data Register.
-  * @param  __HANDLE__: CRC handle
-  * @retval None.
-  */
-#define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET)
-
-/**
-  * @brief  Set CRC INIT non-default value
-  * @param  __HANDLE__    : CRC handle
-  * @param  __INIT__      : 32-bit initial value  
-  * @retval None.
-  */
-#define __HAL_CRC_INITIALCRCVALUE_CONFIG(__HANDLE__, __INIT__) ((__HANDLE__)->Instance->INIT = (__INIT__))    
-
-/**
-  * @brief Stores a 8-bit data in the Independent Data(ID) register.
-  * @param __HANDLE__: CRC handle
-  * @param __VALUE__: 8-bit value to be stored in the ID register
-  * @retval None
-  */
-#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__)))
-
-/**
-  * @brief Returns the 8-bit data stored in the Independent Data(ID) register.
-  * @param __HANDLE__: CRC handle
-  * @retval 8-bit value of the ID register 
-  */
-#define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR)
-/**
-  * @}
-  */
-
-/* Private macros --------------------------------------------------------*/
-/** @defgroup  CRC_Private_Macros   CRC Private Macros
-  * @{
-  */
-
-#define IS_DEFAULT_POLYNOMIAL(__DEFAULT__) (((__DEFAULT__) == DEFAULT_POLYNOMIAL_ENABLE) || \
-                                            ((__DEFAULT__) == DEFAULT_POLYNOMIAL_DISABLE))
-                                   
-
-#define IS_DEFAULT_INIT_VALUE(__VALUE__)  (((__VALUE__) == DEFAULT_INIT_VALUE_ENABLE) || \
-                                           ((__VALUE__) == DEFAULT_INIT_VALUE_DISABLE))
-                                      
-#define IS_CRC_POL_LENGTH(__LENGTH__)     (((__LENGTH__) == CRC_POLYLENGTH_32B) || \
-                                           ((__LENGTH__) == CRC_POLYLENGTH_16B) || \
-                                           ((__LENGTH__) == CRC_POLYLENGTH_8B)  || \
-                                           ((__LENGTH__) == CRC_POLYLENGTH_7B))
- 
-
-#define IS_CRC_INPUTDATA_FORMAT(__FORMAT__)       (((__FORMAT__) == CRC_INPUTDATA_FORMAT_BYTES) || \
-                                                   ((__FORMAT__) == CRC_INPUTDATA_FORMAT_HALFWORDS) || \
-                                                   ((__FORMAT__) == CRC_INPUTDATA_FORMAT_WORDS))
-
-/**
-  * @}
-  */
-  
-/* Include CRC HAL Extension module */
-#include "stm32l0xx_hal_crc_ex.h"  
-
-/** @defgroup CRC_Exported_Constants   CRC Exported Constants
-  * @{
-  */
-
-/* Aliases for inter STM32 series compatibility */
-#define HAL_CRC_Input_Data_Reverse   HAL_CRCEx_Input_Data_Reverse
-#define HAL_CRC_Output_Data_Reverse  HAL_CRCEx_Output_Data_Reverse
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup CRC_Exported_Functions CRC Exported Functions
-  * @{
-  */
-
-/** @defgroup CRC_Exported_Functions_Group1 Initialization/de-initialization functions
-  * @{
-  */
-/* Initialization and de-initialization functions  ****************************/
-HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc);
-HAL_StatusTypeDef HAL_CRC_DeInit (CRC_HandleTypeDef *hcrc);
-void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc);
-void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
-/**
-  * @}
-  */
-
-/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
-  * @{
-  */
-/* Peripheral Control functions ***********************************************/
-uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
-uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
-/**
-  * @}
-  */
-
-/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
-  * @{
-  */
-/* Peripheral State and Error functions ***************************************/
-HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Define the private group ***********************************/
-/**************************************************************/
-/** @defgroup CRC_Private CRC Private
-  * @{
-  */
-/**
-  * @}
-  */
-/**************************************************************/
-
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */
-  
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_CRC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_crc_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_crc_ex.h
deleted file mode 100755
index 7cef231b..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_crc_ex.h
+++ /dev/null
@@ -1,174 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_crc_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of CRC HAL extension module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_CRC_EX_H
-#define __STM32L0xx_HAL_CRC_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup CRCEx CRCEx
-  * @{
-  */ 
-
-/* Exported types ------------------------------------------------------------*/ 
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup CRCEx_Exported_Constants CRCEx Exported constants
- * @{
- */
-
-/** @defgroup CRCEx_Input_Data_Inversion CRC Extended input data inversion modes
-  * @{
-  */
-#define CRC_INPUTDATA_INVERSION_NONE              ((uint32_t)0x00000000U)
-#define CRC_INPUTDATA_INVERSION_BYTE              ((uint32_t)CRC_CR_REV_IN_0)
-#define CRC_INPUTDATA_INVERSION_HALFWORD          ((uint32_t)CRC_CR_REV_IN_1)
-#define CRC_INPUTDATA_INVERSION_WORD              ((uint32_t)CRC_CR_REV_IN)
-
-/**
-  * @}
-  */
-
-/** @defgroup CRCEx_Output_Data_Inversion CRC Extended output data inversion modes
-  * @{
-  */
-#define CRC_OUTPUTDATA_INVERSION_DISABLE         ((uint32_t)0x00000000U)
-#define CRC_OUTPUTDATA_INVERSION_ENABLE          ((uint32_t)CRC_CR_REV_OUT)
-/**                                               
-  * @}
-  */
-
-
-/**
- * @}
- */
-/* Exported macro ------------------------------------------------------------*/
-
-/** @defgroup CRCEx_Exported_Macros CRCEx Exported Macros
-  * @{
-  */
-    
-/**
-  * @brief  Set CRC output reversal
-  * @param  __HANDLE__    : CRC handle
-  * @retval None.
-  */
-#define  __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT)   
-
-/**
-  * @brief  Unset CRC output reversal
-  * @param  __HANDLE__    : CRC handle
-  * @retval None.
-  */
-#define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT))   
-
-/**
-  * @brief  Set CRC non-default polynomial
-  * @param  __HANDLE__    : CRC handle
-  * @param  __POLYNOMIAL__: 7, 8, 16 or 32-bit polynomial  
-  * @retval None.
-  */
-#define __HAL_CRC_POLYNOMIAL_CONFIG(__HANDLE__, __POLYNOMIAL__) ((__HANDLE__)->Instance->POL = (__POLYNOMIAL__))
-
-/**
-  * @}
-  */
-
-/** @defgroup  CRCEx_Private_Macros   CRCEx Private Macros
-  * @{
-  */
-  
-#define IS_CRC_INPUTDATA_INVERSION_MODE(__MODE__)     (((__MODE__) == CRC_INPUTDATA_INVERSION_NONE) || \
-                                                       ((__MODE__) == CRC_INPUTDATA_INVERSION_BYTE) || \
-                                                       ((__MODE__) == CRC_INPUTDATA_INVERSION_HALFWORD) || \
-                                                       ((__MODE__) == CRC_INPUTDATA_INVERSION_WORD))
-                                                 
-
-#define IS_CRC_OUTPUTDATA_INVERSION_MODE(__MODE__)    (((__MODE__) == CRC_OUTPUTDATA_INVERSION_DISABLE) || \
-                                                       ((__MODE__) == CRC_OUTPUTDATA_INVERSION_ENABLE))
-
-/**
-  * @}
-  */
-/** @defgroup CRCEx_Exported_Functions CRCEx Exported Functions
-  * @{
-  */
-
-/** @defgroup CRCEx_Exported_Functions_Group1 Extended CRC features functions
-  * @{
-  */
-/* Exported functions --------------------------------------------------------*/
-/* Initialization and de-initialization functions  ****************************/
-HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength);
-HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode);
-HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode);
-
-/* Peripheral Control functions ***********************************************/
-/* Peripheral State and Error functions ***************************************/
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */
-  
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_CRC_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cryp.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cryp.h
deleted file mode 100755
index f20a7c1d..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cryp.h
+++ /dev/null
@@ -1,427 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_cryp.h
-  * @author  MCD Application Team
-  * @brief   Header file of CRYP HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_CRYP_H
-#define __STM32L0xx_HAL_CRYP_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-   
-#if defined (STM32L021xx) || defined (STM32L041xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup CRYP CRYP
-  * @{
-  */ 
-
-/* Exported types ------------------------------------------------------------*/ 
-
-/** @defgroup CRYP_Exported_Types CRYP Exported Types
-  * @{
-  */
-
-/** 
-  * @brief  CRYP Configuration Structure definition  
-  */
-typedef struct
-{  
-  uint32_t DataType;    /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string.
-                             This parameter can be a value of @ref CRYP_Data_Type */
-  
-  uint8_t* pKey;        /*!< The key used for encryption/decryption */
-  
-  uint8_t* pInitVect;   /*!< The initialization vector used also as initialization
-                             counter in CTR mode */
-  
-}CRYP_InitTypeDef;
-
-/** 
-  * @brief HAL CRYP State structures definition  
-  */ 
-typedef enum
-{
-  HAL_CRYP_STATE_RESET             = 0x00U,  /*!< CRYP not yet initialized or disabled  */
-  HAL_CRYP_STATE_READY             = 0x01U,  /*!< CRYP initialized and ready for use    */
-  HAL_CRYP_STATE_BUSY              = 0x02U,  /*!< CRYP internal processing is ongoing   */
-  HAL_CRYP_STATE_TIMEOUT           = 0x03U,  /*!< CRYP timeout state                    */
-  HAL_CRYP_STATE_ERROR             = 0x04U   /*!< CRYP error state                      */ 
-    
-}HAL_CRYP_STATETypeDef;
-
-/** 
-  * @brief HAL CRYP phase structures definition  
-  */ 
-typedef enum
-{
-  HAL_CRYP_PHASE_READY             = 0x01U,    /*!< CRYP peripheral is ready for initialization. */
-  HAL_CRYP_PHASE_PROCESS           = 0x02U,    /*!< CRYP peripheral is in processing phase */
-}HAL_PhaseTypeDef;
-
-/** 
-  * @brief  CRYP handle Structure definition  
-  */ 
-typedef struct
-{
-  AES_TypeDef                 *Instance;        /*!< Register base address        */
-
-  CRYP_InitTypeDef            Init;             /*!< CRYP required parameters */
-
-  uint8_t                     *pCrypInBuffPtr;  /*!< Pointer to CRYP processing (encryption, decryption,...) buffer */
-
-  uint8_t                     *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) buffer */
-
-  __IO uint16_t               CrypInCount;      /*!< Counter of inputed data */
-
-  __IO uint16_t               CrypOutCount;     /*!< Counter of outputed data */
-
-  HAL_StatusTypeDef           Status;           /*!< CRYP peripheral status */
-
-  HAL_PhaseTypeDef            Phase;            /*!< CRYP peripheral phase */
-
-  DMA_HandleTypeDef           *hdmain;          /*!< CRYP In DMA handle parameters */
-
-  DMA_HandleTypeDef           *hdmaout;         /*!< CRYP Out DMA handle parameters */
-
-  HAL_LockTypeDef             Lock;             /*!< CRYP locking object */
-
-  __IO  HAL_CRYP_STATETypeDef State;            /*!< CRYP peripheral state */
-
-}CRYP_HandleTypeDef;
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup CRYP_Exported_Constants CRYP Exported Constants
-  * @{
-  */
-
-/** @defgroup CRYP_Data_Type CRYP Data Type
-  * @{
-  */
-#define CRYP_DATATYPE_32B         ((uint32_t)0x00000000U)
-#define CRYP_DATATYPE_16B         AES_CR_DATATYPE_0
-#define CRYP_DATATYPE_8B          AES_CR_DATATYPE_1
-#define CRYP_DATATYPE_1B          AES_CR_DATATYPE
-
-#define IS_CRYP_DATATYPE(DATATYPE) (((DATATYPE) == CRYP_DATATYPE_32B) || \
-                                    ((DATATYPE) == CRYP_DATATYPE_16B) || \
-                                    ((DATATYPE) == CRYP_DATATYPE_8B)  || \
-                                    ((DATATYPE) == CRYP_DATATYPE_1B))  
-/**
-  * @}
-  */
-
-/** @defgroup CRYP_AlgoModeDirection CRYP Algo Mode Direction
-  * @{
-  */ 
-#define CRYP_CR_ALGOMODE_DIRECTION              (uint32_t)(AES_CR_MODE|AES_CR_CHMOD)
-
-#define CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT        ((uint32_t)0x00000000U)
-#define CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT  (AES_CR_MODE)
-#define CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT        (AES_CR_CHMOD_0)
-#define CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT  ((uint32_t)(AES_CR_CHMOD_0|AES_CR_MODE))
-#define CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT        (AES_CR_CHMOD_1)
-#define CRYP_CR_ALGOMODE_AES_CTR_DECRYPT        ((uint32_t)(AES_CR_CHMOD_1 | AES_CR_MODE_1))
-/**
-  * @}
-  */
-  
-/** @defgroup CRYP_AES_Interrupts AES Interrupts
-  * @{
-  */ 
-#define CRYP_IT_CC                          AES_CR_CCIE  /*!< Computation Complete interrupt */
-#define CRYP_IT_ERR                         AES_CR_ERRIE /*!< Error interrupt                */
-
-/**
-  * @}
-  */
-
-
-/** @defgroup CRYP_AES_Flags AES Flags
-  * @{
-  */ 
-#define CRYP_FLAG_CCF                       AES_SR_CCF    /*!< Computation Complete Flag */
-#define CRYP_FLAG_RDERR                     AES_SR_RDERR  /*!< Read Error Flag           */
-#define CRYP_FLAG_WRERR                     AES_SR_WRERR  /*!< Write Error Flag          */
-
-/**
-  * @}
-  */ 
-
-/** @defgroup CRYP_AES_Clear_Flags AES Clear Flags
-  * @{
-  */ 
-#define CRYP_CLEARFLAG_CCF                       AES_CR_CCFC   /*!< Computation Complete Flag Clear */
-#define CRYP_CLEARFLAG_RDERR                     AES_CR_ERRC   /*!< Read Error Clear           */
-#define CRYP_CLEARFLAG_WRERR                     AES_CR_ERRC   /*!< Write Error Clear          */
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-
-/** @defgroup CRYP_Exported_Macros CRYP Exported Macros
-  * @{
-  */
-
-/** @brief Reset CRYP handle state
-  * @param  __HANDLE__: specifies the CRYP handle.
-  * @retval None
-  */
-#define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET)
-
-/**
-  * @brief  Enable/Disable the CRYP peripheral.
-  * @param  __HANDLE__: specifies the CRYP handle.
-  * @retval None
-  */
-#define __HAL_CRYP_ENABLE(__HANDLE__)                   SET_BIT((__HANDLE__)->Instance->CR, AES_CR_EN)
-#define __HAL_CRYP_DISABLE(__HANDLE__)                  CLEAR_BIT((__HANDLE__)->Instance->CR, AES_CR_EN)
-
-/**
-  * @brief  Set the algorithm mode: AES-ECB, AES-CBC, AES-CTR, DES-ECB, DES-CBC,...
-  * @param  __HANDLE__: specifies the CRYP handle.
-  * @param  __MODE__: The algorithm mode.
-  * @retval None
-  */
-#define __HAL_CRYP_SET_MODE(__HANDLE__,__MODE__)             SET_BIT((__HANDLE__)->Instance->CR, (__MODE__))
-
-
-/** @brief  Check whether the specified CRYP flag is set or not.
-  * @param  __HANDLE__: specifies the CRYP handle.
-  * @param  __FLAG__: specifies the flag to check.
-  *         This parameter can be one of the following values:
-  *            @arg CRYP_FLAG_CCF   : Computation Complete Flag
-  *            @arg CRYP_FLAG_RDERR : Read Error Flag
-  *            @arg CRYP_FLAG_WRERR : Write Error Flag
-  * @retval The new state of __FLAG__ (TRUE or FALSE).
-  */
-#define __HAL_CRYP_GET_FLAG(__HANDLE__,__FLAG__)         (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
-
-/** @brief  Clear the CRYP pending flag.
-  * @param  __HANDLE__: specifies the CRYP handle.
-  * @param  __FLAG__: specifies the flag to clear.
-  *         This parameter can be one of the following values:
-  *            @arg CRYP_CLEARFLAG_CCF   : Computation Complete Clear Flag
-  *            @arg CRYP_CLEARFLAG_RDERR : Read Error Clear
-  *            @arg CRYP_CLEARFLAG_WRERR : Write Error Clear
-  * @retval None
-  */
-#define __HAL_CRYP_CLEAR_FLAG(__HANDLE__, __FLAG__)   SET_BIT((__HANDLE__)->Instance->CR, (__FLAG__))
-
-/**
-  * @brief  Enable the CRYP interrupt.
-  * @param  __HANDLE__: specifies the CRYP handle.
-  * @param  __INTERRUPT__: CRYP Interrupt.
-  * @retval None
-  */
-#define __HAL_CRYP_ENABLE_IT(__HANDLE__,__INTERRUPT__)   SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__))
-
-/**
-  * @brief  Disable the CRYP interrupt.
-  * @param  __HANDLE__: specifies the CRYP handle.
-  * @param  __INTERRUPT__: CRYP interrupt.
-  * @retval None
-  */
-#define __HAL_CRYP_DISABLE_IT(__HANDLE__,__INTERRUPT__)  CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__))
-
-/** @brief  Checks if the specified CRYP interrupt source is enabled or disabled.
-  * @param  __HANDLE__: specifies the CRYP handle.
-  * @param __INTERRUPT__: CRYP interrupt source to check
-  *         This parameter can be one of the following values:
-  *            @arg CRYP_IT_CC   : Computation Complete interrupt
-  *            @arg CRYP_IT_ERR : Error interrupt (used for RDERR and WRERR)
-  * @retval State of interruption (SET or RESET)
-  */
-#define __HAL_CRYP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \
-    (( ((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)       \
-     )? SET : RESET                                         \
-    )
-         
-/** @brief  Clear the CRYP pending IT.
-  * @param  __HANDLE__: specifies the CRYP handle.
-  * @param  __IT__: specifies the IT to clear.
-  *         This parameter can be one of the following values:
-  *            @arg CRYP_CLEARFLAG_CCF   : Computation Complete Clear Flag
-  *            @arg CRYP_CLEARFLAG_RDERR : Read Error Clear
-  *            @arg CRYP_CLEARFLAG_WRERR : Write Error Clear
-  * @retval None
-  */
-#define __HAL_CRYP_CLEAR_IT(__HANDLE__, __IT__) SET_BIT((__HANDLE__)->Instance->CR, (__IT__))
-
-/**
-  * @}
-  */
-
-/* Include CRYP HAL Extension module */
-#include "stm32l0xx_hal_cryp_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup CRYP_Exported_Functions CRYP Exported Functions
-  * @{
-  */
-
-/** @defgroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions
-  * @{
-  */
-
-/* Initialization/de-initialization functions *********************************/
-HAL_StatusTypeDef     HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp);
-HAL_StatusTypeDef     HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp);
-
-/* MSP functions  *************************************************************/
-void                  HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp);
-void                  HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp);
-
-/**
-  * @}
-  */ 
-
-/** @defgroup CRYP_Exported_Functions_Group2  AES processing functions
-  * @{
-  */
-
-/* AES encryption/decryption using polling  ***********************************/
-HAL_StatusTypeDef     HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
-HAL_StatusTypeDef     HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
-HAL_StatusTypeDef     HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
-HAL_StatusTypeDef     HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
-HAL_StatusTypeDef     HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
-HAL_StatusTypeDef     HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
-
-/* AES encryption/decryption using interrupt  *********************************/
-HAL_StatusTypeDef     HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
-HAL_StatusTypeDef     HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
-HAL_StatusTypeDef     HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
-HAL_StatusTypeDef     HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
-HAL_StatusTypeDef     HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
-HAL_StatusTypeDef     HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
-
-/* AES encryption/decryption using DMA  ***************************************/
-HAL_StatusTypeDef     HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
-HAL_StatusTypeDef     HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
-HAL_StatusTypeDef     HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
-HAL_StatusTypeDef     HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
-HAL_StatusTypeDef     HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
-HAL_StatusTypeDef     HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
-
-/**
-  * @}
-  */ 
-
-/** @addtogroup CRYP_Exported_Functions_Group3 DMA callback functions
-  * @{
-  */
-
-/* CallBack functions  ********************************************************/
-void                  HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp);
-void                  HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp);
-void                  HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp);
-
-/**
-  * @}
-  */ 
-
-/** @defgroup CRYP_Exported_Functions_Group4 CRYP IRQ handler
-  * @{
-  */
-
-/* Processing functions  ********************************************************/
-void                  HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp);
-
-/**
-  * @}
-  */ 
-
-/** @defgroup CRYP_Exported_Functions_Group5 Peripheral State functions
-  * @{
-  */
-
-/* Peripheral State functions  **************************************************/
-HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp);
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-
-/* Define the private group ***********************************/
-/**************************************************************/
-/** @defgroup CRYP_Private CRYP Private
-  * @{
-  */
-/**
-  * @}
-  */
-/**************************************************************/
-
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-  
-#endif /* STM32L021xx || STM32L041xx || STM32L061xx || STM32L062xx || STM32L063xx || STM32L081xx || STM32L082xx || STM32L083xx */
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_CRYP_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cryp_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cryp_ex.h
deleted file mode 100755
index 4678d47a..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cryp_ex.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_cryp_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of CRYPEx HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_CRYP_EX_H
-#define __STM32L0xx_HAL_CRYP_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-   
-#if defined (STM32L021xx) || defined (STM32L041xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) || (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup CRYPEx CRYPEx
-  * @{
-  */ 
-
-/* Exported types ------------------------------------------------------------*/ 
-/* Exported constants --------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup CRYPEx_Exported_Functions CRYPEx Exported Functions
-  * @{
-  */
-
-/** @defgroup CRYPEx_Exported_Functions_Group1 Extended features functions
-  * @{
-  */
-
-/* CallBack functions  ********************************************************/
-void HAL_CRYPEx_ComputationCpltCallback(CRYP_HandleTypeDef *hcryp);
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-  
-#endif /* STM32L021xx || STM32L041xx || STM32L061xx || STM32L062xx || STM32L063xx || STM32L081xx || STM32L082xx || STM32L083xx */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_CRYP_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dac.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dac.h
deleted file mode 100755
index 535ca574..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dac.h
+++ /dev/null
@@ -1,441 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_dac.h
-  * @author  MCD Application Team
-  * @brief   Header file of DAC HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_DAC_H
-#define __STM32L0xx_HAL_DAC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-   
-#if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx)
-   
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup DAC DAC
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-
-/** @defgroup DAC_Exported_Types DAC Exported Types
-  * @{
-  */
-
-/** 
-  * @brief  HAL State structures definition  
-  */ 
-typedef enum
-{
-  HAL_DAC_STATE_RESET             = 0x00U,  /*!< DAC not yet initialized or disabled  */
-  HAL_DAC_STATE_READY             = 0x01U,  /*!< DAC initialized and ready for use    */
-  HAL_DAC_STATE_BUSY              = 0x02U,  /*!< DAC internal processing is ongoing   */
-  HAL_DAC_STATE_TIMEOUT           = 0x03U,  /*!< DAC timeout state                    */
-  HAL_DAC_STATE_ERROR             = 0x04U   /*!< DAC error state                      */
- 
-}HAL_DAC_StateTypeDef;
- 
-/** 
-  * @brief  DAC handle Structure definition  
-  */ 
-typedef struct
-{
-  DAC_TypeDef                 *Instance;     /*!< Register base address             */
-
-  __IO HAL_DAC_StateTypeDef   State;         /*!< DAC communication state           */
-
-  HAL_LockTypeDef             Lock;          /*!< DAC locking object                */
-
-  DMA_HandleTypeDef           *DMA_Handle1;  /*!< Pointer DMA handler for channel 1 */
-
-#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
-  DMA_HandleTypeDef           *DMA_Handle2;  /*!< Pointer DMA handler for channel 2 */ 
-#endif
-
-  __IO uint32_t               ErrorCode;     /*!< DAC Error code                   */
-
-}DAC_HandleTypeDef;
-
-/** 
-  * @brief   DAC Configuration regular Channel structure definition
-  */
-typedef struct
-{
-  uint32_t DAC_Trigger;       /*!< Specifies the external trigger for the selected DAC channel.
-                                   This parameter can be a value of @ref DAC_trigger_selection */
-
-  uint32_t DAC_OutputBuffer;  /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
-                                   This parameter can be a value of @ref DAC_output_buffer */
-
-}DAC_ChannelConfTypeDef;
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup DAC_Exported_Constants DAC Exported Constants
-  * @{
-  */  
-
-/** @defgroup DAC_Error_Code DAC Error Code
-  * @{
-  */
-#define  HAL_DAC_ERROR_NONE              0x00U    /*!< No error                          */
-#define  HAL_DAC_ERROR_DMAUNDERRUNCH1    0x01U    /*!< DAC channel1 DAM underrun error   */
-#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
-#define  HAL_DAC_ERROR_DMAUNDERRUNCH2    0x02U    /*!< DAC channel2 DAM underrun error   */
-#endif
-#define  HAL_DAC_ERROR_DMA               0x04U    /*!< DMA error                         */
-/**
-  * @}
-  */
-
-/** @defgroup DAC_trigger_selection DAC trigger selection
-  * @{
-  */
-#define DAC_TRIGGER_NONE       ((uint32_t)0x00000000U) /*!< Conversion is automatic once the DAC1_DHRxxxx register has been loaded, and not by external trigger */
-#define DAC_TRIGGER_T6_TRGO    ((uint32_t)                                                    DAC_CR_TEN1)  /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
-#define DAC_TRIGGER_T21_TRGO   ((uint32_t)(                 DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM21 TRGO selected as external conversion trigger for DAC channel */
-#define DAC_TRIGGER_T2_TRGO    ((uint32_t)(DAC_CR_TSEL1_2 |                                   DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
-#define DAC_TRIGGER_EXT_IT9    ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 |                  DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
-#define DAC_TRIGGER_SOFTWARE   ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
-
-#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
-#define DAC_TRIGGER_T3_TRGO    ((uint32_t)(                                  DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM3  TRGO selected as external conversion trigger for DAC channel */
-#define DAC_TRIGGER_T3_CH3     ((uint32_t)(                 DAC_CR_TSEL1_1 |                  DAC_CR_TEN1)) /*!< TIM3  CH3  selected as external conversion trigger for DAC channel */
-#define DAC_TRIGGER_T7_TRGO    ((uint32_t)(DAC_CR_TSEL1_2 |                  DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM7  TRGO selected as external conversion trigger for DAC channel */
-#endif
-
-#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
-#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE)       || \
-                                 ((TRIGGER) == DAC_TRIGGER_T6_TRGO)    || \
-                                 ((TRIGGER) == DAC_TRIGGER_T3_TRGO)    || \
-                                 ((TRIGGER) == DAC_TRIGGER_T3_CH3)     || \
-                                 ((TRIGGER) == DAC_TRIGGER_T7_TRGO)    || \
-                                 ((TRIGGER) == DAC_TRIGGER_T21_TRGO)   || \
-                                 ((TRIGGER) == DAC_TRIGGER_T2_TRGO)    || \
-                                 ((TRIGGER) == DAC_TRIGGER_EXT_IT9)    || \
-                                 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
-#else /* STM32L072xx || STM32L073xx || STM32L082xx || STM32L083xx */
-#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE)       || \
-                                 ((TRIGGER) == DAC_TRIGGER_T6_TRGO)    || \
-                                 ((TRIGGER) == DAC_TRIGGER_T21_TRGO)   || \
-                                 ((TRIGGER) == DAC_TRIGGER_T2_TRGO)    || \
-                                 ((TRIGGER) == DAC_TRIGGER_EXT_IT9)    || \
-                                 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
-#endif /* STM32L072xx || STM32L073xx || STM32L082xx || STM32L083xx */
-/**
-  * @}
-  */
-
-/** @defgroup DAC_output_buffer DAC output buffer
-  * @{
-  */
-#define DAC_OUTPUTBUFFER_ENABLE            ((uint32_t)0x00000000U)
-#define DAC_OUTPUTBUFFER_DISABLE           ((uint32_t)DAC_CR_BOFF1)
-
-#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
-                                           ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
-/**
-  * @}
-  */
-
-/** @defgroup DAC_Channel_selection DAC Channel selection
-  * @{
-  */
-#define DAC_CHANNEL_1                      ((uint32_t)0x00000000U)
-#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
-#define DAC_CHANNEL_2                      ((uint32_t)0x00000010U)
-#endif
-
-#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
-#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
-                                 ((CHANNEL) == DAC_CHANNEL_2))
-#else
-#define IS_DAC_CHANNEL(CHANNEL) ((CHANNEL) == DAC_CHANNEL_1)
-#endif
-/**
-  * @}
-  */
-
-/** @defgroup DAC_data_alignement DAC data alignement
-  * @{
-  */
-#define DAC_ALIGN_12B_R                    ((uint32_t)0x00000000U)
-#define DAC_ALIGN_12B_L                    ((uint32_t)0x00000004U)
-#define DAC_ALIGN_8B_R                     ((uint32_t)0x00000008U)
-
-#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
-                             ((ALIGN) == DAC_ALIGN_12B_L) || \
-                             ((ALIGN) == DAC_ALIGN_8B_R))
-/**
-  * @}
-  */
-
-/** @defgroup DAC_data DAC data
-  * @{
-  */
-#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U)
-/**
-  * @}
-  */
-
-/** @defgroup DAC_flags_definition DAC flags definition
-  * @{
-  */ 
-#define DAC_FLAG_DMAUDR1                   ((uint32_t)DAC_SR_DMAUDR1)
-#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
-#define DAC_FLAG_DMAUDR2                   ((uint32_t)DAC_SR_DMAUDR2)   
-#endif
-
-/**
-  * @}
-  */
-
-/** @defgroup DAC_IT_definition DAC IT definition
-  * @{
-  */ 
-#define DAC_IT_DMAUDR1                   ((uint32_t)DAC_SR_DMAUDR1)
-#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
-#define DAC_IT_DMAUDR2                   ((uint32_t)DAC_SR_DMAUDR2)   
-#endif
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-
-/** @defgroup DAC_Exported_Macros DAC Exported Macros
-  * @{
-  */
-
-/** @brief Reset DAC handle state
-  * @param  __HANDLE__: specifies the DAC handle.
-  * @retval None
-  */
-#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
-
-/** @brief Enable the DAC channel
-  * @param  __HANDLE__: specifies the DAC handle.
-  * @param  __DAC_CHANNEL__: specifies the DAC channel
-  * @retval None
-  */
-#define __HAL_DAC_ENABLE(__HANDLE__, __DAC_CHANNEL__) \
-SET_BIT((__HANDLE__)->Instance->CR, (DAC_CR_EN1 << (__DAC_CHANNEL__)))
-
-/** @brief Disable the DAC channel
-  * @param  __HANDLE__: specifies the DAC handle
-  * @param  __DAC_CHANNEL__: specifies the DAC channel.
-  * @retval None
-  */
-#define __HAL_DAC_DISABLE(__HANDLE__, __DAC_CHANNEL__) \
-CLEAR_BIT((__HANDLE__)->Instance->CR, (DAC_CR_EN1 << (__DAC_CHANNEL__)))
-
-  
-#define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) \
-SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__))
-
-
-/** @brief Disable the DAC interrupt
-  * @param  __HANDLE__: specifies the DAC handle
-  * @param  __INTERRUPT__: specifies the DAC interrupt.
-  * @retval None
-  */
-#define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) \
-CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__))
-
-/** @brief  Check whether the specified DAC interrupt source is enabled or not.
-  * @param __HANDLE__: DAC handle
-  * @param __INTERRUPT__: DAC interrupt source to check
-  *          This parameter can be any combination of the following values:
-  *            @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
-  *            @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt (STM32L072xx STM32L073xx STM32L082xx STM32L083xx only)
-  * @retval State of interruption (SET or RESET)
-  */
-#define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \
-(((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
-
-/** @brief  Get the selected DAC's flag status.
-  * @param  __HANDLE__: specifies the DAC handle.
-  * @param  __FLAG__: specifies the FLAG.
-  * @retval None
-  */
-#define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__)  \
-((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
-
-/** @brief  Clear the DAC's flag.
-  * @param  __HANDLE__: specifies the DAC handle.
-  * @param  __FLAG__: specifies the FLAG.
-  * @retval None
-  */
-#define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) \
-(((__HANDLE__)->Instance->SR) = (__FLAG__))
-
-/**
-  * @}
-  */ 
-
-/* Private macro ------------------------------------------------------------*/
-
-/** @defgroup DAC_Private_Macros DAC Private Macros
-  * @{
-  */
-
-/** @brief Set DHR12R1 alignment
-  * @param  __ALIGNEMENT__: specifies the DAC alignement
-  * @retval None
-  */
-#define DAC_DHR12R1_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000008U) + (__ALIGNEMENT__))
-
-/** @brief  Set DHR12R2 alignment
-  * @param  __ALIGNEMENT__: specifies the DAC alignement
-  * @retval None
-  */
-#define DAC_DHR12R2_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000014U) + (__ALIGNEMENT__))
-
-/** @brief  Set DHR12RD alignment
-  * @param  __ALIGNEMENT__: specifies the DAC alignement
-  * @retval None
-  */
-#define DAC_DHR12RD_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000020U) + (__ALIGNEMENT__))
-
-/** @brief Enable the DAC interrupt
-  * @param  __HANDLE__: specifies the DAC handle
-  * @param  __INTERRUPT__: specifies the DAC interrupt.
-  * @retval None
-  */
-  
-/**
-  * @}
-  */ 
-
-
-/* Include DAC HAL Extension module */
-#include "stm32l0xx_hal_dac_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup DAC_Exported_Functions DAC Exported Functions
-  * @{
-  */
-
-/** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
-  * @{
-  */ 
-/* Initialization and de-initialization functions *****************************/
-HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
-HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
-void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
-void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
-
-/**
-  * @}
-  */
-
-/** @defgroup DAC_Exported_Functions_Group2 IO operation functions
-  * @{
-  */
-/* IO operation functions *****************************************************/
-HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel);
-HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel);
-HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
-HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel);
-HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
-uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
-void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac);
-void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
-void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
-void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
-void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
-
-/**
-  * @}
-  */
-
-/** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
-  * @{
-  */
-/* Peripheral Control functions ***********************************************/
-HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
-
-/**
-  * @}
-  */
-
-/** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
-  * @{
-  */
-/* Peripheral State functions ***************************************************/
-HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
-uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* STM32L011xx && STM32L021xx && STM32L031xx && STM32L041xx && STM32L061xx && STM32L071xx && STM32L081xx*/
-  
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__STM32L0xx_HAL_DAC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dac_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dac_ex.h
deleted file mode 100755
index 3b65bfde..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dac_ex.h
+++ /dev/null
@@ -1,183 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_dac_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of DAC HAL Extension module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_DAC_EX_H
-#define __STM32L0xx_HAL_DAC_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx)
-   
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup DACEx DACEx
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-   
-/* Exported constants --------------------------------------------------------*/
-  
-/** @defgroup DACEx_Exported_Constants DACEx Exported Constants
-  * @{
-  */ 
-   
-/** @defgroup DACEx_lfsrunmask_triangleamplitude DACEx lfsrunmask triangleamplitude
-  * @{
-  */
-#define DAC_LFSRUNMASK_BIT0                ((uint32_t)0x00000000U) /*!< Unmask DAC channel LFSR bit0 for noise wave generation */
-#define DAC_LFSRUNMASK_BITS1_0             ((uint32_t)DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */
-#define DAC_LFSRUNMASK_BITS2_0             ((uint32_t)DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */
-#define DAC_LFSRUNMASK_BITS3_0             ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0)/*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */
-#define DAC_LFSRUNMASK_BITS4_0             ((uint32_t)DAC_CR_MAMP1_2) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */
-#define DAC_LFSRUNMASK_BITS5_0             ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */
-#define DAC_LFSRUNMASK_BITS6_0             ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */
-#define DAC_LFSRUNMASK_BITS7_0             ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */
-#define DAC_LFSRUNMASK_BITS8_0             ((uint32_t)DAC_CR_MAMP1_3) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */
-#define DAC_LFSRUNMASK_BITS9_0             ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */
-#define DAC_LFSRUNMASK_BITS10_0            ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */
-#define DAC_LFSRUNMASK_BITS11_0            ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */
-#define DAC_TRIANGLEAMPLITUDE_1            ((uint32_t)0x00000000U) /*!< Select max triangle amplitude of 1 */
-#define DAC_TRIANGLEAMPLITUDE_3            ((uint32_t)DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 3 */
-#define DAC_TRIANGLEAMPLITUDE_7            ((uint32_t)DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 7 */
-#define DAC_TRIANGLEAMPLITUDE_15           ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 15 */
-#define DAC_TRIANGLEAMPLITUDE_31           ((uint32_t)DAC_CR_MAMP1_2) /*!< Select max triangle amplitude of 31 */
-#define DAC_TRIANGLEAMPLITUDE_63           ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 63 */
-#define DAC_TRIANGLEAMPLITUDE_127          ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 127 */
-#define DAC_TRIANGLEAMPLITUDE_255          ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 255 */
-#define DAC_TRIANGLEAMPLITUDE_511          ((uint32_t)DAC_CR_MAMP1_3) /*!< Select max triangle amplitude of 511 */
-#define DAC_TRIANGLEAMPLITUDE_1023         ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 1023 */
-#define DAC_TRIANGLEAMPLITUDE_2047         ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 2047 */
-#define DAC_TRIANGLEAMPLITUDE_4095         ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 4095 */
-
-#define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUNMASK_BIT0) || \
-                                                      ((VALUE) == DAC_LFSRUNMASK_BITS1_0) || \
-                                                      ((VALUE) == DAC_LFSRUNMASK_BITS2_0) || \
-                                                      ((VALUE) == DAC_LFSRUNMASK_BITS3_0) || \
-                                                      ((VALUE) == DAC_LFSRUNMASK_BITS4_0) || \
-                                                      ((VALUE) == DAC_LFSRUNMASK_BITS5_0) || \
-                                                      ((VALUE) == DAC_LFSRUNMASK_BITS6_0) || \
-                                                      ((VALUE) == DAC_LFSRUNMASK_BITS7_0) || \
-                                                      ((VALUE) == DAC_LFSRUNMASK_BITS8_0) || \
-                                                      ((VALUE) == DAC_LFSRUNMASK_BITS9_0) || \
-                                                      ((VALUE) == DAC_LFSRUNMASK_BITS10_0) || \
-                                                      ((VALUE) == DAC_LFSRUNMASK_BITS11_0) || \
-                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_1) || \
-                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_3) || \
-                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_7) || \
-                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_15) || \
-                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_31) || \
-                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_63) || \
-                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_127) || \
-                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_255) || \
-                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_511) || \
-                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_1023) || \
-                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_2047) || \
-                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_4095))
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/  
-
-/* Exported functions --------------------------------------------------------*/  
-
-/** @defgroup DACEx_Exported_Functions DACEx Exported Functions
-  * @{
-  */
-
-/** @defgroup DACEx_Exported_Functions_Group1  Extended features functions
-  * @{
-  */
-/* Extension features functions ***********************************************/
-HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude);
-HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude);
-
-#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
-uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac);
-HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2);
-void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac);
-void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac);
-void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef* hdac);
-void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef* hdac);
-#endif
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-/* Define the private group ***********************************/
-/**************************************************************/
-/** @defgroup DACEx_Private DACEx Private
-  * @{
-  */
-/**
-  * @}
-  */
-/**************************************************************/
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* !STM32L011xx && !STM32L021xx && !STM32L031xx && !STM32L041xx && !STM32L051xx && !STM32L061xx && !STM32L071xx && !STM32L081xx*/
-  
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__STM32L0xx_HAL_DAC_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h
deleted file mode 100755
index 678990bb..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h
+++ /dev/null
@@ -1,206 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_def.h
-  * @author  MCD Application Team
-  * @brief   This file contains HAL common defines, enumeration, macros and 
-  *          structures definitions. 
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_DEF
-#define __STM32L0xx_HAL_DEF
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-#include "Legacy/stm32_hal_legacy.h"
-#include 
-
-/* Exported types ------------------------------------------------------------*/
-
-/** 
-  * @brief  HAL Status structures definition  
-  */  
-typedef enum 
-{
-  HAL_OK       = 0x00U,
-  HAL_ERROR    = 0x01U,
-  HAL_BUSY     = 0x02U,
-  HAL_TIMEOUT  = 0x03U
-} HAL_StatusTypeDef;
-
-/** 
-  * @brief  HAL Lock structures definition  
-  */
-typedef enum 
-{
-  HAL_UNLOCKED = 0x00U,
-  HAL_LOCKED   = 0x01U  
-} HAL_LockTypeDef;
-
-/* Exported macro ------------------------------------------------------------*/
-
-#define UNUSED(x) ((void)(x))
-
-#define HAL_MAX_DELAY      0xFFFFFFFFU
-
-#define HAL_IS_BIT_SET(REG, BIT)         (((REG) & (BIT)) != RESET)
-#define HAL_IS_BIT_CLR(REG, BIT)         (((REG) & (BIT)) == RESET)
-
-#define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__)             \
-                        do{                                                    \
-                            (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \
-                            (__DMA_HANDLE__).Parent = (__HANDLE__);             \
-                          } while(0)
-
-/** @brief Reset the Handle's State field.
-  * @param __HANDLE__: specifies the Peripheral Handle.
-  * @note  This macro can be used for the following purpose: 
-  *          - When the Handle is declared as local variable; before passing it as parameter
-  *            to HAL_PPP_Init() for the first time, it is mandatory to use this macro 
-  *            to set to 0 the Handle's "State" field.
-  *            Otherwise, "State" field may have any random value and the first time the function 
-  *            HAL_PPP_Init() is called, the low level hardware initialization will be missed
-  *            (i.e. HAL_PPP_MspInit() will not be executed).
-  *          - When there is a need to reconfigure the low level hardware: instead of calling
-  *            HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
-  *            In this later function, when the Handle's "State" field is set to 0, it will execute the function
-  *            HAL_PPP_MspInit() which will reconfigure the low level hardware.
-  * @retval None
-  */
-#define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U)
-
-#if (USE_RTOS == 1)
-                            
-  /* Reserved for future use */
-  #error "USE_RTOS should be 0 in the current HAL release"
-                            
-#else
-  #define __HAL_LOCK(__HANDLE__)                                               \
-                                do{                                            \
-                                    if((__HANDLE__)->Lock == HAL_LOCKED)       \
-                                    {                                          \
-                                       return HAL_BUSY;                        \
-                                    }                                          \
-                                    else                                       \
-                                    {                                          \
-                                       (__HANDLE__)->Lock = HAL_LOCKED;        \
-                                    }                                          \
-                                  }while (0)
-
-  #define __HAL_UNLOCK(__HANDLE__)                                             \
-                                  do{                                          \
-                                      (__HANDLE__)->Lock = HAL_UNLOCKED;       \
-                                    }while (0)
-#endif /* USE_RTOS */
-
-#if  defined ( __GNUC__ )
-  #ifndef __weak
-    #define __weak   __attribute__((weak))
-  #endif /* __weak */
-  #ifndef __packed
-    #define __packed __attribute__((__packed__))
-  #endif /* __packed */
-  
-  #define __NOINLINE __attribute__ ( (noinline) ) 
-
-#endif /* __GNUC__ */
-
-
-/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
-#if defined   (__GNUC__)        /* GNU Compiler */
-  #ifndef __ALIGN_END
-    #define __ALIGN_END    __attribute__ ((aligned (4)))
-  #endif /* __ALIGN_END */
-  #ifndef __ALIGN_BEGIN  
-    #define __ALIGN_BEGIN
-  #endif /* __ALIGN_BEGIN */
-#else
-  #ifndef __ALIGN_END
-    #define __ALIGN_END
-  #endif /* __ALIGN_END */
-  #ifndef __ALIGN_BEGIN      
-    #if defined   (__CC_ARM)      /* ARM Compiler */
-      #define __ALIGN_BEGIN    __align(4)  
-    #elif defined (__ICCARM__)    /* IAR Compiler */
-      #define __ALIGN_BEGIN 
-    #endif /* __CC_ARM */
-  #endif /* __ALIGN_BEGIN */
-#endif /* __GNUC__ */
-
-/** 
-  * @brief  __RAM_FUNC definition
-  */ 
-#if defined ( __CC_ARM   )
-/* ARM Compiler
-   ------------
-   RAM functions are defined using the toolchain options. 
-   Functions that are executed in RAM should reside in a separate source module.
-   Using the 'Options for File' dialog you can simply change the 'Code / Const' 
-   area of a module to a memory space in physical RAM.
-   Available memory areas are declared in the 'Target' tab of the 'Options for Target'
-   dialog. 
-*/
-#define __RAM_FUNC HAL_StatusTypeDef 
-
-#define __NOINLINE __attribute__ ( (noinline) ) 
-
-
-#elif defined ( __ICCARM__ )
-/* ICCARM Compiler
-   ---------------
-   RAM functions are defined using a specific toolchain keyword "__ramfunc". 
-*/
-#define __RAM_FUNC __ramfunc HAL_StatusTypeDef
-
-#define __NOINLINE _Pragma("optimize = no_inline")
-
-#elif defined   (  __GNUC__  )
-/* GNU Compiler
-   ------------
-  RAM functions are defined using a specific toolchain attribute 
-   "__attribute__((section(".RamFunc")))".
-*/
-#define __RAM_FUNC HAL_StatusTypeDef  __attribute__((section(".RamFunc")))
-
-#endif
-                                      
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* ___STM32L0xx_HAL_DEF */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h
deleted file mode 100755
index db45676c..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h
+++ /dev/null
@@ -1,694 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_dma.h
-  * @author  MCD Application Team
-  * @brief   Header file of DMA HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_DMA_H
-#define __STM32L0xx_HAL_DMA_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup DMA DMA
-  * @{
-  */ 
-
-   /** @defgroup DMA_Exported_Types DMA Exported Types
-  * @{
-  */
-/* Exported types ------------------------------------------------------------*/ 
-
-/** 
-  * @brief  DMA Configuration Structure definition  
-  */
-typedef struct
-{
-  uint32_t Request;                   /*!< Specifies the request selected for the specified channel. 
-                                           This parameter can be a value of @ref DMA_request */
-    
-  uint32_t Direction;                 /*!< Specifies if the data will be transferred from memory to peripheral, 
-                                           from memory to memory or from peripheral to memory.
-                                           This parameter can be a value of @ref DMA_Data_transfer_direction */
-
-  uint32_t PeriphInc;                 /*!< Specifies whether the Peripheral address register should be incremented or not.
-                                           When Memory to Memory transfer is used, this is the Source Increment mode
-                                           This parameter can be a value of @ref DMA_Peripheral_incremented_mode */  
-
-  uint32_t MemInc;                    /*!< Specifies whether the memory address register should be incremented or not.
-                                           When Memory to Memory transfer is used, this is the Destination Increment mode
-                                           This parameter can be a value of @ref DMA_Memory_incremented_mode */
-  
-  uint32_t PeriphDataAlignment;       /*!< Specifies the Peripheral data width.
-                                           When Memory to Memory transfer is used, this is the Source Alignment format
-                                           This parameter can be a value of @ref DMA_Peripheral_data_size */   
-
-  uint32_t MemDataAlignment;          /*!< Specifies the Memory data width.
-                                           When Memory to Memory transfer is used, this is the Destination Alignment format
-                                           This parameter can be a value of @ref DMA_Memory_data_size */
-
-  uint32_t Mode;                      /*!< Specifies the operation mode of the DMAy Channelx (Normal or Circular).
-                                           This parameter can be a value of @ref DMA_mode
-                                           @note The circular buffer mode cannot be used if the memory-to-memory
-                                                 data transfer is configured on the selected Channel */ 
-
-  uint32_t Priority;                   /*!< Specifies the software priority for the DMAy Channelx.
-                                            This parameter can be a value of @ref DMA_Priority_level */
-} DMA_InitTypeDef;
-
-/** 
-  * @brief DMA Configuration enumeration values definition 
-  */  
-typedef enum 
-{
-  DMA_MODE            = 0U,      /*!< Control related DMA mode Parameter in DMA_InitTypeDef        */
-  DMA_PRIORITY        = 1U,      /*!< Control related priority level Parameter in DMA_InitTypeDef  */
-  
-} DMA_ControlTypeDef;
-
-/** 
-  * @brief  HAL DMA State structures definition  
-  */ 
-typedef enum
-{
-  HAL_DMA_STATE_RESET             = 0x00U,  /*!< DMA not yet initialized or disabled */  
-  HAL_DMA_STATE_READY             = 0x01U,  /*!< DMA process success and ready for use   */
-  HAL_DMA_STATE_BUSY              = 0x02U,  /*!< DMA process is ongoing              */     
-  HAL_DMA_STATE_TIMEOUT           = 0x03U,  /*!< DMA timeout state                   */  
-  HAL_DMA_STATE_ERROR             = 0x04U,  /*!< DMA error state                     */
-  HAL_DMA_STATE_READY_HALF        = 0x05U,  /*!< DMA Half process success            */
-}HAL_DMA_StateTypeDef;
-
-/** 
-  * @brief  HAL DMA Error Code structure definition  
-  */ 
-typedef enum
-{
-  HAL_DMA_FULL_TRANSFER      = 0x00U,    /*!< Full transfer     */
-  HAL_DMA_HALF_TRANSFER      = 0x01U,    /*!< Half Transfer     */
-
-}HAL_DMA_LevelCompleteTypeDef;
-
-
-/** 
-  * @brief  DMA handle Structure definition  
-  */ 
-typedef struct __DMA_HandleTypeDef
-{  
-  DMA_Channel_TypeDef    *Instance;                                                   /*!< Register base address                  */
-  
-  DMA_InitTypeDef       Init;                                                         /*!< DMA communication parameters           */ 
-  
-  HAL_LockTypeDef       Lock;                                                         /*!< DMA locking object                     */
-  
-  __IO HAL_DMA_StateTypeDef  State;                                                   /*!< DMA transfer state                     */
-  
-  void                  *Parent;                                                      /*!< Parent object state                    */
-  
-  void                  (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma);     /*!< DMA transfer complete callback         */
-  
-  void                  (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback    */
-
-  void                  (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma);    /*!< DMA transfer error callback            */
-
-  void                  (* XferAbortCallback)( struct __DMA_HandleTypeDef * hdma);    /*!< DMA transfer abort callback          */  
-
-__IO uint32_t          ErrorCode;                                                     /*!< DMA Error code                         */
-  
-} DMA_HandleTypeDef;    
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup DMA_Exported_Constants DMA Exported Constants
-  * @{
-  */
-
-/** @defgroup DMA_Error_Code DMA Error Codes
-  * @{
-  */ 
-#define HAL_DMA_ERROR_NONE      ((uint32_t)0x00000000U)    /*!< No error             */
-#define HAL_DMA_ERROR_TE        ((uint32_t)0x00000001U)    /*!< Transfer error       */
-#define HAL_DMA_ERROR_NO_XFER   ((uint32_t)0x00000004U)    /*!< no ongoing transfer  */
-#define HAL_DMA_ERROR_TIMEOUT   ((uint32_t)0x00000020U)    /*!< Timeout error        */
-
-#if defined (STM32L011xx) || defined (STM32L021xx)
-#define IS_DMA_ALL_INSTANCE(INSTANCE) (((INSTANCE) == DMA1_Channel1) || \
-                                       ((INSTANCE) == DMA1_Channel2) || \
-                                       ((INSTANCE) == DMA1_Channel3) || \
-                                       ((INSTANCE) == DMA1_Channel4) || \
-                                       ((INSTANCE) == DMA1_Channel5))
-#else
-#define IS_DMA_ALL_INSTANCE(INSTANCE) (((INSTANCE) == DMA1_Channel1) || \
-                                       ((INSTANCE) == DMA1_Channel2) || \
-                                       ((INSTANCE) == DMA1_Channel3) || \
-                                       ((INSTANCE) == DMA1_Channel4) || \
-                                       ((INSTANCE) == DMA1_Channel5) || \
-                                       ((INSTANCE) == DMA1_Channel6) || \
-                                       ((INSTANCE) == DMA1_Channel7))   
-
-#endif
-#define IS_DMA_ALL_CONTROLLER(CONTROLLER) (((CONTROLLER) == DMA1))
-
-/**
-  * @}
-  */
-
-/** @defgroup DMA_request DMA request defintiions
-  * @{
-  */ 
-
-#if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
-
-#define DMA_REQUEST_0                     ((uint32_t)0x00000000U)
-#define DMA_REQUEST_1                     ((uint32_t)0x00000001U)
-#define DMA_REQUEST_2                     ((uint32_t)0x00000002U)
-#define DMA_REQUEST_3                     ((uint32_t)0x00000003U)
-#define DMA_REQUEST_4                     ((uint32_t)0x00000004U)
-#define DMA_REQUEST_5                     ((uint32_t)0x00000005U)
-#define DMA_REQUEST_6                     ((uint32_t)0x00000006U)
-#define DMA_REQUEST_7                     ((uint32_t)0x00000007U)
-#define DMA_REQUEST_8                     ((uint32_t)0x00000008U)
-#define DMA_REQUEST_9                     ((uint32_t)0x00000009U)
-#define DMA_REQUEST_10                    ((uint32_t)0x0000000AU)
-#define DMA_REQUEST_11                    ((uint32_t)0x0000000BU)
-#define DMA_REQUEST_12                    ((uint32_t)0x0000000CU)
-#define DMA_REQUEST_13                    ((uint32_t)0x0000000DU)
-#define DMA_REQUEST_14                    ((uint32_t)0x0000000EU)
-#define DMA_REQUEST_15                    ((uint32_t)0x0000000FU)
-
-#define IS_DMA_ALL_REQUEST(REQUEST) (((REQUEST) == DMA_REQUEST_0) || \
-                                     ((REQUEST) == DMA_REQUEST_1) || \
-                                     ((REQUEST) == DMA_REQUEST_2) || \
-                                     ((REQUEST) == DMA_REQUEST_3) || \
-                                     ((REQUEST) == DMA_REQUEST_4) || \
-                                     ((REQUEST) == DMA_REQUEST_5) || \
-                                     ((REQUEST) == DMA_REQUEST_6) || \
-                                     ((REQUEST) == DMA_REQUEST_7) || \
-                                     ((REQUEST) == DMA_REQUEST_8) || \
-                                     ((REQUEST) == DMA_REQUEST_9) || \
-                                     ((REQUEST) == DMA_REQUEST_10) || \
-                                     ((REQUEST) == DMA_REQUEST_11) || \
-                                     ((REQUEST) == DMA_REQUEST_12) || \
-                                     ((REQUEST) == DMA_REQUEST_13) || \
-                                     ((REQUEST) == DMA_REQUEST_14) || \
-                                     ((REQUEST) == DMA_REQUEST_15))
-
-#else /* #if STM32L071xx || STM32L072xx || STM32L073xx || STM32L081xx || STM32L082xx || STM32L083xx */
-                                       
-#define DMA_REQUEST_0                     ((uint32_t)0x00000000U)
-#define DMA_REQUEST_1                     ((uint32_t)0x00000001U)
-#define DMA_REQUEST_2                     ((uint32_t)0x00000002U)
-#define DMA_REQUEST_3                     ((uint32_t)0x00000003U)
-#define DMA_REQUEST_4                     ((uint32_t)0x00000004U)
-#define DMA_REQUEST_5                     ((uint32_t)0x00000005U)
-#define DMA_REQUEST_6                     ((uint32_t)0x00000006U)
-#define DMA_REQUEST_7                     ((uint32_t)0x00000007U)
-#define DMA_REQUEST_8                     ((uint32_t)0x00000008U)
-#define DMA_REQUEST_9                     ((uint32_t)0x00000009U)
-#define DMA_REQUEST_11                    ((uint32_t)0x0000000BU)
-
-#define IS_DMA_ALL_REQUEST(REQUEST) (((REQUEST) == DMA_REQUEST_0) || \
-                                     ((REQUEST) == DMA_REQUEST_1) || \
-                                     ((REQUEST) == DMA_REQUEST_2) || \
-                                     ((REQUEST) == DMA_REQUEST_3) || \
-                                     ((REQUEST) == DMA_REQUEST_4) || \
-                                     ((REQUEST) == DMA_REQUEST_5) || \
-                                     ((REQUEST) == DMA_REQUEST_6) || \
-                                     ((REQUEST) == DMA_REQUEST_7) || \
-                                     ((REQUEST) == DMA_REQUEST_8) || \
-                                     ((REQUEST) == DMA_REQUEST_9) || \
-                                     ((REQUEST) == DMA_REQUEST_11))
-#endif /* #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) */
-
-/**
-  * @}
-  */
-
-/** @defgroup DMA_Data_transfer_direction DMA Data Transfer directions
-  * @{
-  */ 
-#define DMA_PERIPH_TO_MEMORY         ((uint32_t)0x00000000U)        /*!< Peripheral to memory direction */
-#define DMA_MEMORY_TO_PERIPH         ((uint32_t)DMA_CCR_DIR)       /*!< Memory to peripheral direction */
-#define DMA_MEMORY_TO_MEMORY         ((uint32_t)(DMA_CCR_MEM2MEM)) /*!< Memory to memory direction     */
-
-#define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
-                                     ((DIRECTION) == DMA_MEMORY_TO_PERIPH)  || \
-                                     ((DIRECTION) == DMA_MEMORY_TO_MEMORY)) 
-/**
-  * @}
-  */
-
-/** @defgroup DMA_Data_buffer_size DMA Data Buffer Size Check
-  * @{
-  */ 
-#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
-/**
-  * @}
-  */     
-    
-/** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral Incremented Mode
-  * @{
-  */ 
-#define DMA_PINC_ENABLE        ((uint32_t)DMA_CCR_PINC)  /*!< Peripheral increment mode Enable */
-#define DMA_PINC_DISABLE       ((uint32_t)0x00000000U)    /*!< Peripheral increment mode Disable */
-
-#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
-                                            ((STATE) == DMA_PINC_DISABLE))
-/**
-  * @}
-  */ 
-
-/** @defgroup DMA_Memory_incremented_mode DMA Memory Incremented Mode
-  * @{
-  */ 
-#define DMA_MINC_ENABLE         ((uint32_t)DMA_CCR_MINC)  /*!< Memory increment mode Enable  */
-#define DMA_MINC_DISABLE        ((uint32_t)0x00000000U)    /*!< Memory increment mode Disable */
-
-#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE)  || \
-                                        ((STATE) == DMA_MINC_DISABLE))
-/**
-  * @}
-  */
-
-/** @defgroup DMA_Peripheral_data_size DMA Peripheral Data Size Alignment
-  * @{
-  */ 
-#define DMA_PDATAALIGN_BYTE          ((uint32_t)0x00000000U)       /*!< Peripheral data alignment : Byte     */
-#define DMA_PDATAALIGN_HALFWORD      ((uint32_t)DMA_CCR_PSIZE_0)  /*!< Peripheral data alignment : HalfWord */
-#define DMA_PDATAALIGN_WORD          ((uint32_t)DMA_CCR_PSIZE_1)  /*!< Peripheral data alignment : Word     */
-
-#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE)     || \
-                                           ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
-                                           ((SIZE) == DMA_PDATAALIGN_WORD))
-/**
-  * @}
-  */ 
-
-
-/** @defgroup DMA_Memory_data_size DMA Memory Data Size Alignment
-  * @{ 
-  */
-#define DMA_MDATAALIGN_BYTE          ((uint32_t)0x00000000U)       /*!< Memory data alignment : Byte     */
-#define DMA_MDATAALIGN_HALFWORD      ((uint32_t)DMA_CCR_MSIZE_0)  /*!< Memory data alignment : HalfWord */
-#define DMA_MDATAALIGN_WORD          ((uint32_t)DMA_CCR_MSIZE_1)  /*!< Memory data alignment : Word     */
-
-#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE)     || \
-                                       ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
-                                       ((SIZE) == DMA_MDATAALIGN_WORD ))
-/**
-  * @}
-  */
-
-/** @defgroup DMA_mode DMA Mode
-  * @{
-  */ 
-#define DMA_NORMAL         ((uint32_t)0x00000000U)       /*!< Normal Mode                  */
-#define DMA_CIRCULAR       ((uint32_t)DMA_CCR_CIRC)    /*!< Circular Mode                */
-
-#define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL )  || \
-                           ((MODE) == DMA_CIRCULAR)) 
-/**
-  * @}
-  */
-
-/** @defgroup DMA_Priority_level DMA Priority Level
-  * @{
-  */
-#define DMA_PRIORITY_LOW             ((uint32_t)0x00000000U)    /*!< Priority level : Low       */
-#define DMA_PRIORITY_MEDIUM          ((uint32_t)DMA_CCR_PL_0)  /*!< Priority level : Medium    */
-#define DMA_PRIORITY_HIGH            ((uint32_t)DMA_CCR_PL_1)  /*!< Priority level : High      */
-#define DMA_PRIORITY_VERY_HIGH       ((uint32_t)DMA_CCR_PL)    /*!< Priority level : Very_High */
-
-#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW )   || \
-                                   ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
-                                   ((PRIORITY) == DMA_PRIORITY_HIGH)   || \
-                                   ((PRIORITY) == DMA_PRIORITY_VERY_HIGH)) 
-/**
-  * @}
-  */ 
-
-
-/** @defgroup DMA_interrupt_enable_definitions DMA Interrupt Definitions
-  * @{
-  */
-
-#define DMA_IT_TC                         ((uint32_t)DMA_CCR_TCIE)
-#define DMA_IT_HT                         ((uint32_t)DMA_CCR_HTIE)
-#define DMA_IT_TE                         ((uint32_t)DMA_CCR_TEIE)
-
-/**
-  * @}
-  */
-
-/** @defgroup DMA_flag_definitions DMA Flag Definitions
-  * @{
-  */ 
-
-#define DMA_FLAG_GL1                      ((uint32_t)0x00000001U)
-#define DMA_FLAG_TC1                      ((uint32_t)0x00000002U)
-#define DMA_FLAG_HT1                      ((uint32_t)0x00000004U)
-#define DMA_FLAG_TE1                      ((uint32_t)0x00000008U)
-#define DMA_FLAG_GL2                      ((uint32_t)0x00000010U)
-#define DMA_FLAG_TC2                      ((uint32_t)0x00000020U)
-#define DMA_FLAG_HT2                      ((uint32_t)0x00000040U)
-#define DMA_FLAG_TE2                      ((uint32_t)0x00000080U)
-#define DMA_FLAG_GL3                      ((uint32_t)0x00000100U)
-#define DMA_FLAG_TC3                      ((uint32_t)0x00000200U)
-#define DMA_FLAG_HT3                      ((uint32_t)0x00000400U)
-#define DMA_FLAG_TE3                      ((uint32_t)0x00000800U)
-#define DMA_FLAG_GL4                      ((uint32_t)0x00001000U)
-#define DMA_FLAG_TC4                      ((uint32_t)0x00002000U)
-#define DMA_FLAG_HT4                      ((uint32_t)0x00004000U)
-#define DMA_FLAG_TE4                      ((uint32_t)0x00008000U)
-#define DMA_FLAG_GL5                      ((uint32_t)0x00010000U)
-#define DMA_FLAG_TC5                      ((uint32_t)0x00020000U)
-#define DMA_FLAG_HT5                      ((uint32_t)0x00040000U)
-#define DMA_FLAG_TE5                      ((uint32_t)0x00080000U)
-#define DMA_FLAG_GL6                      ((uint32_t)0x00100000U)
-#define DMA_FLAG_TC6                      ((uint32_t)0x00200000U)
-#define DMA_FLAG_HT6                      ((uint32_t)0x00400000U)
-#define DMA_FLAG_TE6                      ((uint32_t)0x00800000U)
-#define DMA_FLAG_GL7                      ((uint32_t)0x01000000U)
-#define DMA_FLAG_TC7                      ((uint32_t)0x02000000U)
-#define DMA_FLAG_HT7                      ((uint32_t)0x04000000U)
-#define DMA_FLAG_TE7                      ((uint32_t)0x08000000U)
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */  
-   
-/* Exported macro ------------------------------------------------------------*/
-
-/** @defgroup DMA_Exported_Macros DMA Exported Macros
- * @{
- */  
-
-/** @brief Reset DMA handle state
-  * @param  __HANDLE__: DMA handle
-  * @retval None
-  */
-#define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
-
-/**
-  * @brief  Enable the specified DMA Channel.
-  * @param  __HANDLE__: DMA handle
-  * @retval None.
-  */
-#define __HAL_DMA_ENABLE(__HANDLE__)        ((__HANDLE__)->Instance->CCR |=  DMA_CCR_EN)
-
-/**
-  * @brief  Disable the specified DMA Channel.
-  * @param  __HANDLE__: DMA handle
-  * @retval None.
-  */
-#define __HAL_DMA_DISABLE(__HANDLE__)       ((__HANDLE__)->Instance->CCR &=  ~DMA_CCR_EN)
-
-
-/* Interrupt & Flag management */
-
-/**
-  * @brief  Returns the current DMA Channel transfer complete flag.
-  * @param  __HANDLE__: DMA handle
-  * @retval The specified transfer complete flag index.
-  */
-
-#if defined (STM32L011xx) || defined (STM32L021xx)
-#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
- DMA_FLAG_TC5)
-#else
-#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
-   DMA_FLAG_TC7)    
-#endif
-/**
-  * @brief  Returns the current DMA Channel half transfer complete flag.
-  * @param  __HANDLE__: DMA handle
-  * @retval The specified half transfer complete flag index.
-  */
-#if defined (STM32L011xx) || defined (STM32L021xx)
-#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
- DMA_FLAG_HT5)
-#else 
-#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
-   DMA_FLAG_HT7)
-#endif
-/**
-  * @brief  Returns the current DMA Channel transfer error flag.
-  * @param  __HANDLE__: DMA handle
-  * @retval The specified transfer error flag index.
-  */
-#if defined (STM32L011xx) || defined (STM32L021xx)
-#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
- DMA_FLAG_TE5)
-#else   
-#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
-   DMA_FLAG_TE7)
-#endif
-/**
-  * @brief  Returns the current DMA Channel Global interrupt flag.
-  * @param  __HANDLE__: DMA handle
-  * @retval The specified transfer error flag index.
-  */
-#if defined (STM32L011xx) || defined (STM32L021xx)
-#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_ISR_GIF1 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_ISR_GIF2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_ISR_GIF3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_ISR_GIF4 :\
-   DMA_ISR_GIF5)
-#else   
-#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_ISR_GIF1 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_ISR_GIF2 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_ISR_GIF3 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_ISR_GIF4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_ISR_GIF5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_ISR_GIF6 :\
-   DMA_ISR_GIF7)
-#endif
-/**
-  * @brief  Get the DMA Channel pending flags.
-  * @param  __HANDLE__: DMA handle
-  * @param  __FLAG__: Get the specified flag.
-  *          This parameter can be any combination of the following values:
-  *            @arg DMA_FLAG_TCIFx:  Transfer complete flag
-  *            @arg DMA_FLAG_HTIFx:  Half transfer complete flag
-  *            @arg DMA_FLAG_TEIFx:  Transfer error flag
-  *            @arg DMA_ISR_GIFx: Global interrupt flag
-  *         Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Channel flag.   
-  * @retval The state of FLAG (SET or RESET).
-  */
-#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
-
-/**
-  * @brief  Clears the DMA Channel pending flags.
-  * @param  __HANDLE__: DMA handle
-  * @param  __FLAG__: specifies the flag to clear.
-  *          This parameter can be any combination of the following values:
-  *            @arg DMA_FLAG_TCIFx:  Transfer complete flag
-  *            @arg DMA_FLAG_HTIFx:  Half transfer complete flag
-  *            @arg DMA_FLAG_TEIFx:  Transfer error flag
-  *            @arg DMA_ISR_GIFx: Global interrupt flag
-  *         Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Channel flag.   
-  * @retval None
-  */
-#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
-
-/**
-  * @brief  Enables the specified DMA Channel interrupts.
-  * @param  __HANDLE__: DMA handle
-  * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled. 
-  *          This parameter can be any combination of the following values:
-  *            @arg DMA_IT_TC:  Transfer complete interrupt mask
-  *            @arg DMA_IT_HT:  Half transfer complete interrupt mask
-  *            @arg DMA_IT_TE:  Transfer error interrupt mask
-  * @retval None
-  */
-#define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__))
-
-/**
-  * @brief  Disables the specified DMA Channel interrupts.
-  * @param  __HANDLE__: DMA handle
-  * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled. 
-  *          This parameter can be any combination of the following values:
-  *            @arg DMA_IT_TC:  Transfer complete interrupt mask
-  *            @arg DMA_IT_HT:  Half transfer complete interrupt mask
-  *            @arg DMA_IT_TE:  Transfer error interrupt mask
-  * @retval None
-  */
-#define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__)  ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__))
-
-/**
-  * @brief  Checks whether the specified DMA Channel interrupt is enabled or not.
-  * @param  __HANDLE__: DMA handle
-  * @param  __INTERRUPT__: specifies the DMA interrupt source to check.
-  *          This parameter can be one of the following values:
-  *            @arg DMA_IT_TC:  Transfer complete interrupt mask
-  *            @arg DMA_IT_HT:  Half transfer complete interrupt mask
-  *            @arg DMA_IT_TE:  Transfer error interrupt mask
-  * @retval The state of DMA_IT (SET or RESET).
-  */
-#define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)  (((__HANDLE__)->Instance->CCR & (__INTERRUPT__)))
-
-/**
-  * @brief  Returns the number of remaining data units in the current DMAy Channelx transfer.
-  * @param  __HANDLE__: DMA handle
-  *
-  * @retval The number of remaining data units in the current DMA Channel transfer.
-  */
-#define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNDTR)
-
-/**
-  * @}
-  */  
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup DMA_Exported_Functions DMA Exported Functions
-  * @{
-  */
-
-/** @defgroup DMA_Exported_Functions_Group1 Initialization/de-initialization functions
-  * @{
-  */
-
-/* Initialization and de-initialization functions *****************************/
-HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma); 
-HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
-
-/**
-  * @}
-  */
-
-/** @defgroup DMA_Exported_Functions_Group2 I/O operation functions
-  * @{
-  */
-
-/* IO operation functions *****************************************************/
-HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
-HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
-HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
-HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma);
-HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
-void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
-/**
-  * @}
-  */
-
-/** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions
-  * @{
-  */
-
-/* Peripheral State and Error functions ***************************************/
-HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
-uint32_t             HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */
-/* Define the private group ***********************************/
-/**************************************************************/
-/** @defgroup DMA_Private DMA Private
-  * @{
-  */
-/**
-  * @}
-  */
-/**************************************************************/
-  
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_DMA_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_firewall.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_firewall.h
deleted file mode 100755
index c528970c..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_firewall.h
+++ /dev/null
@@ -1,384 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_firewall.h
-  * @author  MCD Application Team
-  * @brief   Header file of FIREWALL HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_FIREWALL_H
-#define __STM32L0xx_HAL_FIREWALL_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup FIREWALL  FIREWALL
-  * @{
-  */ 
-
-/* Exported types ------------------------------------------------------------*/ 
-/** @defgroup FIREWALL_Exported_Types FIREWALL Exported Types
-  * @{
-  */ 
-
-/** 
-  * @brief FIREWALL Initialization Structure definition  
-  */ 
-typedef struct
-{
-  uint32_t CodeSegmentStartAddress;        /*!< Protected code segment start address. This value is 24-bit long, the 8 LSB bits are
-                                                reserved and forced to 0 in order to allow a 256-byte granularity. */
-
-  uint32_t CodeSegmentLength;              /*!< Protected code segment length in bytes. This value is 22-bit long, the 8 LSB bits are 
-                                                reserved and forced to 0 for the length to be a multiple of 256 bytes. */
-
-  uint32_t NonVDataSegmentStartAddress;    /*!< Protected non-volatile data segment start address. This value is 24-bit long, the 8 LSB
-                                                bits are reserved and forced to 0 in order to allow a 256-byte granularity. */
-
-  uint32_t NonVDataSegmentLength;          /*!< Protected non-volatile data segment length in bytes. This value is 22-bit long, the 8 LSB
-                                                bits are reserved and forced to 0 for the length to be a multiple of 256 bytes. */
- 
-  uint32_t VDataSegmentStartAddress;       /*!< Protected volatile data segment start address. This value is 17-bit long, the 6 LSB bits
-                                                are reserved and forced to 0 in order to allow a 64-byte granularity. */
-
-  uint32_t VDataSegmentLength;             /*!< Protected volatile data segment length in bytes. This value is 17-bit long, the 6 LSB
-                                                bits are reserved and forced to 0 for the length to be a multiple of 64 bytes. */
-  
-  uint32_t VolatileDataExecution;          /*!< Set VDE bit specifying whether or not the volatile data segment can be executed.
-                                                 When VDS = 1 (set by parameter VolatileDataShared), VDE bit has no meaning.
-                                                This parameter can be a value of @ref FIREWALL_VolatileData_Executable */  
-                                           
-  uint32_t VolatileDataShared;             /*!< Set VDS bit in specifying whether or not the volatile data segment can be shared with a 
-                                                non-protected application code.
-                                                This parameter can be a value of @ref FIREWALL_VolatileData_Shared */  
-                                                                                                                                     
-}FIREWALL_InitTypeDef;
-
-
-/**
-  * @}
-  */
-
-  
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup FIREWALL_Exported_Constants FIREWALL Exported Constants
-  * @{
-  */
-
-/** @defgroup FIREWALL_VolatileData_Executable   FIREWALL volatile data segment execution status
-  * @{
-  */
-#define FIREWALL_VOLATILEDATA_NOT_EXECUTABLE                 ((uint32_t)0x0000U)
-#define FIREWALL_VOLATILEDATA_EXECUTABLE                     ((uint32_t)FW_CR_VDE)
-/**
-  * @}
-  */ 
-
-/** @defgroup FIREWALL_VolatileData_Shared  FIREWALL volatile data segment share status
-  * @{
-  */ 
-#define FIREWALL_VOLATILEDATA_NOT_SHARED                ((uint32_t)0x0000U)
-#define FIREWALL_VOLATILEDATA_SHARED                    ((uint32_t)FW_CR_VDS) 
-/**
-  * @}
-  */ 
-
-/** @defgroup FIREWALL_Pre_Arm FIREWALL pre arm status
-  * @{
-  */ 
-#define FIREWALL_PRE_ARM_RESET                 ((uint32_t)0x0000U)
-#define FIREWALL_PRE_ARM_SET                   ((uint32_t)FW_CR_FPA)
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-/* Private macros --------------------------------------------------------*/
-/** @addtogroup FIREWALL_Private
-  * @{
-  */
-#define IS_FIREWALL_CODE_SEGMENT_ADDRESS(ADDRESS)        (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) < (FLASH_BASE + FLASH_SIZE)))                                                   
-#define IS_FIREWALL_CODE_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (FLASH_BASE + FLASH_SIZE))
-
-#define IS_FIREWALL_NONVOLATILEDATA_SEGMENT_ADDRESS(ADDRESS)        (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) < (FLASH_BASE + FLASH_SIZE)))                                                   
-#define IS_FIREWALL_NONVOLATILEDATA_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (FLASH_BASE + FLASH_SIZE)) 
-
-#define IS_FIREWALL_VOLATILEDATA_SEGMENT_ADDRESS(ADDRESS)        (((ADDRESS) >= SRAM_BASE) && ((ADDRESS) < (SRAM_BASE + SRAM_SIZE_MAX)))
-#define IS_FIREWALL_VOLATILEDATA_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (SRAM_BASE + SRAM_SIZE_MAX))                                                        
-    
-  
-#define IS_FIREWALL_VOLATILEDATA_SHARE(SHARE) (((SHARE) == FIREWALL_VOLATILEDATA_NOT_SHARED) || \
-                                               ((SHARE) == FIREWALL_VOLATILEDATA_SHARED))
-                                               
-#define IS_FIREWALL_VOLATILEDATA_EXECUTE(EXECUTE) (((EXECUTE) == FIREWALL_VOLATILEDATA_NOT_EXECUTABLE) || \
-                                                   ((EXECUTE) == FIREWALL_VOLATILEDATA_EXECUTABLE))                                                                                    
-/**
-  * @}
-  */  
-
-
-/* Exported macros -----------------------------------------------------------*/
-/** @defgroup FIREWALL_Exported_Macros FIREWALL Exported Macros
-  * @{
-  */
-
-/** @brief  Check whether the FIREWALL is enabled or not.
-  * @retval FIREWALL enabling status (TRUE or FALSE).
-  */            
-#define  __HAL_FIREWALL_IS_ENABLED()  HAL_IS_BIT_CLR(SYSCFG->CFGR2, SYSCFG_CFGR2_FWDISEN)  
-
-
-/** @brief Enable FIREWALL pre arm. 
-  * @note When FPA bit is set, any code executed outside the protected segment 
-  *       closes the Firewall, otherwise it generates a system reset.
-  * @note This macro provides the same service as HAL_FIREWALL_EnablePreArmFlag() API
-  *       but can be executed inside a code area protected by the Firewall. 
-  * @note This macro can be executed whatever the Firewall state (opened or closed) when
-  *       NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
-  *       0, that is, when the non volatile data segment is defined), the macro can be
-  *       executed only when the Firewall is opened.    
-  */ 
-#define __HAL_FIREWALL_PREARM_ENABLE()                                         \
-             do {                                                              \
-                  __IO uint32_t tmpreg;                                        \
-                  SET_BIT(FIREWALL->CR, FW_CR_FPA) ;                           \
-                  /* Read bit back to ensure it is taken into account by IP */ \
-                  /* (introduce proper delay inside macro execution) */        \
-                  tmpreg = READ_BIT(FIREWALL->CR, FW_CR_FPA) ;                 \
-                  UNUSED(tmpreg);                                              \
-                } while(0)
-
-
-                    
-/** @brief Disable FIREWALL pre arm. 
-  * @note When FPA bit is set, any code executed outside the protected segment 
-  *       closes the Firewall, otherwise, it generates a system reset.
-  * @note This macro provides the same service as HAL_FIREWALL_DisablePreArmFlag() API
-  *       but can be executed inside a code area protected by the Firewall.
-  * @note This macro can be executed whatever the Firewall state (opened or closed) when
-  *       NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
-  *       0, that is, when the non volatile data segment is defined), the macro can be
-  *       executed only when the Firewall is opened.      
-  */ 
-#define __HAL_FIREWALL_PREARM_DISABLE()                                        \
-             do {                                                              \
-                  __IO uint32_t tmpreg;                                        \
-                  CLEAR_BIT(FIREWALL->CR, FW_CR_FPA) ;                         \
-                  /* Read bit back to ensure it is taken into account by IP */ \
-                  /* (introduce proper delay inside macro execution) */        \
-                  tmpreg = READ_BIT(FIREWALL->CR, FW_CR_FPA) ;                 \
-                  UNUSED(tmpreg);                                              \
-                } while(0)
-
-/** @brief Enable volatile data sharing in setting VDS bit. 
-  * @note When VDS bit is set, the volatile data segment is shared with non-protected
-  *       application code. It can be accessed whatever the Firewall state (opened or closed). 
-  * @note This macro can be executed inside a code area protected by the Firewall.
-  * @note This macro can be executed whatever the Firewall state (opened or closed) when
-  *       NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
-  *       0, that is, when the non volatile data segment is defined), the macro can be
-  *       executed only when the Firewall is opened.      
-  */ 
-#define __HAL_FIREWALL_VOLATILEDATA_SHARED_ENABLE()                            \
-             do {                                                              \
-                  __IO uint32_t tmpreg;                                        \
-                  SET_BIT(FIREWALL->CR, FW_CR_VDS) ;                           \
-                  /* Read bit back to ensure it is taken into account by IP */ \
-                  /* (introduce proper delay inside macro execution) */        \
-                  tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDS) ;                 \
-                  UNUSED(tmpreg);                                              \
-                } while(0)
-
-/** @brief Disable volatile data sharing in resetting VDS bit. 
-  * @note When VDS bit is reset, the volatile data segment is not shared and cannot be 
-  *       hit by a non protected executable code when the Firewall is closed. If it is 
-  *       accessed in such a condition, a system reset is generated by the Firewall.
-  * @note This macro can be executed inside a code area protected by the Firewall. 
-  * @note This macro can be executed whatever the Firewall state (opened or closed) when
-  *       NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
-  *       0, that is, when the non volatile data segment is defined), the macro can be
-  *       executed only when the Firewall is opened.     
-  */ 
-#define __HAL_FIREWALL_VOLATILEDATA_SHARED_DISABLE()                           \
-             do {                                                              \
-                  __IO uint32_t tmpreg;                                        \
-                  CLEAR_BIT(FIREWALL->CR, FW_CR_VDS) ;                         \
-                  /* Read bit back to ensure it is taken into account by IP */ \
-                  /* (introduce proper delay inside macro execution) */        \
-                  tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDS) ;                 \
-                  UNUSED(tmpreg);                                              \
-                } while(0)
-
-/** @brief Enable volatile data execution in setting VDE bit.
-  * @note VDE bit is ignored when VDS is set. IF VDS = 1, the Volatile data segment can be 
-  *       executed whatever the VDE bit value.  
-  * @note When VDE bit is set (with VDS = 0), the volatile data segment is executable. When
-  *       the Firewall call is closed, a "call gate" entry procedure is required to open 
-  *       first the Firewall.
-  * @note This macro can be executed inside a code area protected by the Firewall.
-  * @note This macro can be executed whatever the Firewall state (opened or closed) when
-  *       NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
-  *       0, that is, when the non volatile data segment is defined), the macro can be
-  *       executed only when the Firewall is opened.         
-  */ 
-#define __HAL_FIREWALL_VOLATILEDATA_EXECUTION_ENABLE()                         \
-             do {                                                              \
-                  __IO uint32_t tmpreg;                                        \
-                  SET_BIT(FIREWALL->CR, FW_CR_VDE) ;                           \
-                  /* Read bit back to ensure it is taken into account by IP */ \
-                  /* (introduce proper delay inside macro execution) */        \
-                  tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDE) ;                 \
-                  UNUSED(tmpreg);                                              \
-                } while(0)
-
-/** @brief Disable volatile data execution in resetting VDE bit.
-  * @note VDE bit is ignored when VDS is set. IF VDS = 1, the Volatile data segment can be 
-  *       executed whatever the VDE bit value.  
-  * @note When VDE bit is reset (with VDS = 0), the volatile data segment cannot  be executed.
-  * @note This macro can be executed inside a code area protected by the Firewall. 
-  * @note This macro can be executed whatever the Firewall state (opened or closed) when
-  *       NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
-  *       0, that is, when the non volatile data segment is defined), the macro can be
-  *       executed only when the Firewall is opened.        
-  */
-#define __HAL_FIREWALL_VOLATILEDATA_EXECUTION_DISABLE()                           \
-             do {                                                              \
-                  __IO uint32_t tmpreg;                                        \
-                  CLEAR_BIT(FIREWALL->CR, FW_CR_VDE) ;                         \
-                  /* Read bit back to ensure it is taken into account by IP */ \
-                  /* (introduce proper delay inside macro execution) */        \
-                  tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDE) ;                 \
-                  UNUSED(tmpreg);                                              \
-                } while(0)   
-
-
-/** @brief Check whether or not the volatile data segment is shared.
-  * @note This macro can be executed inside a code area protected by the Firewall.
-  * @note This macro can be executed whatever the Firewall state (opened or closed) when
-  *       NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
-  *       0, that is, when the non volatile data segment is defined), the macro can be
-  *       executed only when the Firewall is opened.      
-  * @retval VDS bit setting status (TRUE or FALSE).
-  */
-#define __HAL_FIREWALL_GET_VOLATILEDATA_SHARED() ((FIREWALL->CR & FW_CR_VDS) == FW_CR_VDS)
-
-/** @brief Check whether or not the volatile data segment is declared executable.
-  * @note This macro can be executed inside a code area protected by the Firewall.
-  * @note This macro can be executed whatever the Firewall state (opened or closed) when
-  *       NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
-  *       0, that is, when the non volatile data segment is defined), the macro can be
-  *       executed only when the Firewall is opened.      
-  * @retval VDE bit setting status (TRUE or FALSE).
-  */
-#define __HAL_FIREWALL_GET_VOLATILEDATA_EXECUTION() ((FIREWALL->CR & FW_CR_VDE) == FW_CR_VDE)
-
-/** @brief Check whether or not the Firewall pre arm bit is set.
-  * @note This macro can be executed inside a code area protected by the Firewall.
-  * @note This macro can be executed whatever the Firewall state (opened or closed) when
-  *       NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
-  *       0, that is, when the non volatile data segment is defined), the macro can be
-  *       executed only when the Firewall is opened.      
-  * @retval FPA bit setting status (TRUE or FALSE).
-  */
-#define __HAL_FIREWALL_GET_PREARM() ((FIREWALL->CR & FW_CR_FPA) == FW_CR_FPA)
-
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup FIREWALL_Exported_Functions FIREWALL Exported Functions
-  * @{
-  */
-  
-/** @defgroup FIREWALL_Exported_Functions_Group1 Initialization Functions
-  * @brief    Initialization and Configuration Functions  
-  * @{
-  */  
-  
-/* Initialization functions  ********************************/
-HAL_StatusTypeDef HAL_FIREWALL_Config(FIREWALL_InitTypeDef * fw_init);
-void HAL_FIREWALL_GetConfig(FIREWALL_InitTypeDef * fw_config);
-void HAL_FIREWALL_EnableFirewall(void);
-void HAL_FIREWALL_EnablePreArmFlag(void);
-void HAL_FIREWALL_DisablePreArmFlag(void);
-
-/**
-  * @}
-  */
-  
-/**
-  * @}
-  */   
-/* Define the private group ***********************************/
-/**************************************************************/
-/** @defgroup FIREWALL_Private FIREWALL Private
-  * @{
-  */
-/**
-  * @}
-  */
-/**************************************************************/
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-  
-
-#endif /* #if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_FIREWALL_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h
deleted file mode 100755
index e9712cf8..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h
+++ /dev/null
@@ -1,386 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_flash.h
-  * @author  MCD Application Team
-  * @brief   Header file of Flash HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_FLASH_H
-#define __STM32L0xx_HAL_FLASH_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-   
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup FLASH
-  * @{
-  */
-  
-/** @addtogroup FLASH_Private_Constants
-  * @{
-  */
-#define FLASH_TIMEOUT_VALUE      (50000U) /* 50 s */
-#define FLASH_SIZE_DATA_REGISTER FLASHSIZE_BASE
-/**
-  * @}
-  */
-
-/** @addtogroup FLASH_Private_Macros
-  * @{
-  */
-
-#define IS_FLASH_TYPEPROGRAM(_VALUE_)   ((_VALUE_) == FLASH_TYPEPROGRAM_WORD)
-
-#define IS_FLASH_LATENCY(__LATENCY__) (((__LATENCY__) == FLASH_LATENCY_0) || \
-                                       ((__LATENCY__) == FLASH_LATENCY_1))
-
-/**
-  * @}
-  */  
-
-/* Exported types ------------------------------------------------------------*/ 
-/** @defgroup FLASH_Exported_Types FLASH Exported Types
-  * @{
-  */  
-
-/**
-  * @brief  FLASH Procedure structure definition
-  */
-typedef enum 
-{
-  FLASH_PROC_NONE              = 0, 
-  FLASH_PROC_PAGEERASE         = 1,
-  FLASH_PROC_PROGRAM           = 2,
-} FLASH_ProcedureTypeDef;
-
-/** 
-  * @brief  FLASH handle Structure definition  
-  */
-typedef struct
-{
-  __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /*!< Internal variable to indicate which procedure is ongoing or not in IT context */
-  
-  __IO uint32_t               NbPagesToErase;   /*!< Internal variable to save the remaining sectors to erase in IT context*/
-
-  __IO uint32_t               Address;          /*!< Internal variable to save address selected for program or erase */
-
-  __IO uint32_t               Page;             /*!< Internal variable to define the current page which is erasing */
-
-  HAL_LockTypeDef             Lock;             /*!< FLASH locking object                */
-
-  __IO uint32_t               ErrorCode;        /*!< FLASH error code                    
-                                                     This parameter can be a value of @ref FLASH_Error_Codes  */
-} FLASH_ProcessTypeDef;
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup FLASH_Exported_Constants FLASH Exported Constants
-  * @{
-  */  
-
-/** @defgroup FLASH_Error_Codes FLASH Error Codes
-  * @{
-  */
-
-#define HAL_FLASH_ERROR_NONE      0x00U  /*!< No error */
-#define HAL_FLASH_ERROR_PGA       0x01U  /*!< Programming alignment error */
-#define HAL_FLASH_ERROR_WRP       0x02U  /*!< Write protection error */
-#define HAL_FLASH_ERROR_OPTV      0x04U  /*!< Option validity error */
-#define HAL_FLASH_ERROR_SIZE      0x08U  /*!<  */
-#define HAL_FLASH_ERROR_RD        0x10U  /*!< Read protected error */
-#define HAL_FLASH_ERROR_FWWERR    0x20U  /*!< FLASH Write or Erase operation aborted */
-#define HAL_FLASH_ERROR_NOTZERO   0x40U  /*!< FLASH Write operation is done in a not-erased region */
-
-/**
-  * @}
-  */
-
-/** @defgroup FLASH_Page_Size FLASH size information
-  * @{
-  */ 
-
-#define FLASH_SIZE                (uint32_t)((*((uint32_t *)FLASHSIZE_BASE)&0xFFFF) * 1024U)
-#define FLASH_PAGE_SIZE           ((uint32_t)128U)  /*!< FLASH Page Size in bytes */
-
-/**
-  * @}
-  */
-
-/** @defgroup FLASH_Type_Program FLASH Type Program
-  * @{
-  */ 
-#define FLASH_TYPEPROGRAM_WORD       ((uint32_t)0x02U)  /*!PECR), (__INTERRUPT__))
-
-/**
-  * @brief  Disable the specified FLASH interrupt.
-  * @param  __INTERRUPT__  FLASH interrupt 
-  *         This parameter can be any combination of the following values:
-  *     @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt
-  *     @arg @ref FLASH_IT_ERR Error Interrupt    
-  * @retval none
-  */  
-#define __HAL_FLASH_DISABLE_IT(__INTERRUPT__)  CLEAR_BIT((FLASH->PECR), (uint32_t)(__INTERRUPT__))
-
-/**
-  * @brief  Get the specified FLASH flag status. 
-  * @param  __FLAG__ specifies the FLASH flag to check.
-  *          This parameter can be one of the following values:
-  *            @arg @ref FLASH_FLAG_BSY         FLASH Busy flag
-  *            @arg @ref FLASH_FLAG_EOP         FLASH End of Operation flag 
-  *            @arg @ref FLASH_FLAG_ENDHV       FLASH End of High Voltage flag
-  *            @arg @ref FLASH_FLAG_READY       FLASH Ready flag after low power mode
-  *            @arg @ref FLASH_FLAG_PGAERR      FLASH Programming Alignment error flag
-  *            @arg @ref FLASH_FLAG_SIZERR      FLASH Size error flag
-  *            @arg @ref FLASH_FLAG_OPTVERR     FLASH Option validity error flag (not valid with STM32L031xx/STM32L041xx)
-  *            @arg @ref FLASH_FLAG_RDERR       FLASH Read protected error flag
-  *            @arg @ref FLASH_FLAG_WRPERR      FLASH Write protected error flag 
-  *            @arg @ref FLASH_FLAG_FWWERR      FLASH Fetch While Write Error flag
-  *            @arg @ref FLASH_FLAG_NOTZEROERR  Not Zero area error flag  
-  * @retval The new state of __FLAG__ (SET or RESET).
-  */
-#define __HAL_FLASH_GET_FLAG(__FLAG__)   (((FLASH->SR) & (__FLAG__)) == (__FLAG__))
-
-/**
-  * @brief  Clear the specified FLASH flag.
-  * @param  __FLAG__ specifies the FLASH flags to clear.
-  *          This parameter can be any combination of the following values:
-  *            @arg @ref FLASH_FLAG_EOP         FLASH End of Operation flag 
-  *            @arg @ref FLASH_FLAG_PGAERR      FLASH Programming Alignment error flag
-  *            @arg @ref FLASH_FLAG_SIZERR      FLASH Size error flag
-  *            @arg @ref FLASH_FLAG_OPTVERR     FLASH Option validity error flag (not valid with STM32L031xx/STM32L041xx)
-  *            @arg @ref FLASH_FLAG_RDERR       FLASH Read protected error flag
-  *            @arg @ref FLASH_FLAG_WRPERR      FLASH Write protected error flag 
-  *            @arg @ref FLASH_FLAG_FWWERR      FLASH Fetch While Write Error flag
-  *            @arg @ref FLASH_FLAG_NOTZEROERR  Not Zero area error flag  
-  * @retval none
-  */
-#define __HAL_FLASH_CLEAR_FLAG(__FLAG__)   ((FLASH->SR) = (__FLAG__))
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-
-/* Include FLASH HAL Extended module */
-#include "stm32l0xx_hal_flash_ex.h"  
-#include "stm32l0xx_hal_flash_ramfunc.h"  
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup FLASH_Exported_Functions
-  * @{
-  */
-  
-/** @addtogroup FLASH_Exported_Functions_Group1
-  * @{
-  */
-/* IO operation functions *****************************************************/
-HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data);
-HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint32_t Data);
-
-/* FLASH IRQ handler function */
-void       HAL_FLASH_IRQHandler(void);
-/* Callbacks in non blocking modes */ 
-void       HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue);
-void       HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue);
-
-/**
-  * @}
-  */
-
-/** @addtogroup FLASH_Exported_Functions_Group2
-  * @{
-  */
-/* Peripheral Control functions ***********************************************/
-HAL_StatusTypeDef HAL_FLASH_Unlock(void);
-HAL_StatusTypeDef HAL_FLASH_Lock(void);
-HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void);
-HAL_StatusTypeDef HAL_FLASH_OB_Lock(void);
-HAL_StatusTypeDef HAL_FLASH_OB_Launch(void);
-
-/**
-  * @}
-  */
-
-/** @addtogroup FLASH_Exported_Functions_Group3
-  * @{
-  */
-/* Peripheral State and Error functions ***************************************/
-uint32_t HAL_FLASH_GetError(void);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Private function -------------------------------------------------*/
-/** @addtogroup FLASH_Private_Functions
- * @{
- */
-HAL_StatusTypeDef       FLASH_WaitForLastOperation(uint32_t Timeout);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_FLASH_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h
deleted file mode 100755
index 69008ee1..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h
+++ /dev/null
@@ -1,827 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_flash_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of Flash HAL Extended module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_FLASH_EX_H
-#define __STM32L0xx_HAL_FLASH_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup FLASHEx
-  * @{
-  */ 
-
-/** @addtogroup FLASHEx_Private_Constants
-  * @{
-  */
-#define FLASH_SIZE_DATA_REGISTER   FLASHSIZE_BASE
-
-#define FLASH_NBPAGES_MAX (FLASH_SIZE / FLASH_PAGE_SIZE)
-
-#define WRP_MASK_LOW                 (0x0000FFFFU)
-#define WRP_MASK_HIGH                (0xFFFF0000U)
-
-/**
-  * @}
-  */  
-
-/** @addtogroup FLASHEx_Private_Macros
-  * @{
-  */
-
-#define IS_FLASH_TYPEERASE(__VALUE__)   (((__VALUE__) == FLASH_TYPEERASE_PAGES))
-
-#define IS_OPTIONBYTE(__VALUE__) (((__VALUE__) <= (OPTIONBYTE_WRP  | OPTIONBYTE_RDP | \
-                                                  OPTIONBYTE_USER | OPTIONBYTE_BOR | OPTIONBYTE_BOOT_BIT1)))
-
-#define IS_WRPSTATE(__VALUE__)          (((__VALUE__) == OB_WRPSTATE_DISABLE) || \
-                                         ((__VALUE__) == OB_WRPSTATE_ENABLE))
-                                         
-#define IS_OB_WRP(__PAGE__)             (((__PAGE__) != 0x0000000U))
-
-#define IS_OB_RDP(__LEVEL__)            (((__LEVEL__) == OB_RDP_LEVEL_0) ||\
-                                         ((__LEVEL__) == OB_RDP_LEVEL_1) ||\
-                                         ((__LEVEL__) == OB_RDP_LEVEL_2))
-                                         
-#define IS_OB_BOR_LEVEL(__LEVEL__)      (((__LEVEL__) == OB_BOR_OFF)     || \
-                                         ((__LEVEL__) == OB_BOR_LEVEL1)  || \
-                                         ((__LEVEL__) == OB_BOR_LEVEL2)  || \
-                                         ((__LEVEL__) == OB_BOR_LEVEL3)  || \
-                                         ((__LEVEL__) == OB_BOR_LEVEL4)  || \
-                                         ((__LEVEL__) == OB_BOR_LEVEL5))
-
-#define IS_OB_IWDG_SOURCE(__SOURCE__)   (((__SOURCE__) == OB_IWDG_SW) || ((__SOURCE__) == OB_IWDG_HW))
-
-#define IS_OB_STOP_SOURCE(__SOURCE__)   (((__SOURCE__) == OB_STOP_NORST) || ((__SOURCE__) == OB_STOP_RST))
-
-#define IS_OB_STDBY_SOURCE(__SOURCE__)  (((__SOURCE__) == OB_STDBY_NORST) || ((__SOURCE__) == OB_STDBY_RST))
-
-#if defined(FLASH_OPTR_WPRMOD) && defined(FLASH_OPTR_BFB2)
-    
-#define IS_OBEX(__VALUE__)              (((__VALUE__) == OPTIONBYTE_PCROP) || ((__VALUE__) == OPTIONBYTE_BOOTCONFIG))
-
-#elif defined(FLASH_OPTR_WPRMOD) && !defined(FLASH_OPTR_BFB2)
-
-#define IS_OBEX(__VALUE__)              ((__VALUE__) == OPTIONBYTE_PCROP)
-
-#elif !defined(FLASH_OPTR_WPRMOD) && defined(FLASH_OPTR_BFB2)
-
-#define IS_OBEX(__VALUE__)              ((__VALUE__) == OPTIONBYTE_BOOTCONFIG)
-
-#endif /* FLASH_OPTR_WPRMOD && FLASH_OPTR_BFB2 */
-
-#if defined(FLASH_OPTR_WPRMOD)
-
-#define IS_PCROPSTATE(__VALUE__)        (((__VALUE__) == OB_PCROP_STATE_DISABLE) || \
-                                         ((__VALUE__) == OB_PCROP_STATE_ENABLE))  
-
-#define IS_OB_PCROP(__PAGE__)           (((__PAGE__) != 0x0000000U))
-#endif /* FLASH_OPTR_WPRMOD */
-
-#if defined(FLASH_OPTR_BFB2)
-    
-#define IS_OB_BOOT_BANK(__BANK__)     (((__BANK__) == OB_BOOT_BANK2) || ((__BANK__) == OB_BOOT_BANK1))
-
-#endif /* FLASH_OPTR_BFB2 */
-
-#define IS_OB_BOOT1(__BOOT_BIT1__)  (((__BOOT_BIT1__) == OB_BOOT_BIT1_RESET) || ((__BOOT_BIT1__) == OB_BOOT_BIT1_SET))
-#define IS_TYPEPROGRAMDATA(__VALUE__)   (((__VALUE__) == FLASH_TYPEPROGRAMDATA_BYTE)     || \
-                                         ((__VALUE__) == FLASH_TYPEPROGRAMDATA_HALFWORD) || \
-                                         ((__VALUE__) == FLASH_TYPEPROGRAMDATA_WORD))
-
-
-/** @defgroup FLASHEx_Address FLASHEx Address
-  * @{
-  */
-
-#if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
- 
-#define IS_FLASH_DATA_ADDRESS(__ADDRESS__)          (((__ADDRESS__) >= DATA_EEPROM_BASE) && ((__ADDRESS__) <= DATA_EEPROM_BANK2_END))
-#define IS_FLASH_DATA_BANK1_ADDRESS(__ADDRESS__)    (((__ADDRESS__) >= DATA_EEPROM_BASE) && ((__ADDRESS__) <= DATA_EEPROM_BANK1_END))
-#define IS_FLASH_DATA_BANK2_ADDRESS(__ADDRESS__)    (((__ADDRESS__) >= DATA_EEPROM_BANK2_BASE) && ((__ADDRESS__) <= DATA_EEPROM_BANK2_END))
-#define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__)       (((__ADDRESS__) >= FLASH_BASE)       && ((__ADDRESS__) <  (FLASH_BASE + FLASH_SIZE)))
-#define IS_FLASH_PROGRAM_BANK1_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE)       && ((__ADDRESS__) <  (FLASH_BASE + (FLASH_SIZE >> 1))))
-#define IS_FLASH_PROGRAM_BANK2_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BANK2_BASE) && ((__ADDRESS__) <  (FLASH_BASE + FLASH_SIZE)))
-#else
-#define IS_FLASH_DATA_ADDRESS(__ADDRESS__)          (((__ADDRESS__) >= DATA_EEPROM_BASE) && ((__ADDRESS__) <= DATA_EEPROM_END))
-#define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__)       (((__ADDRESS__) >= FLASH_BASE)       && ((__ADDRESS__) <  (FLASH_BASE + FLASH_SIZE)))
-#endif
-
-#define IS_NBPAGES(__PAGES__) (((__PAGES__) >= 1) && ((__PAGES__) <= FLASH_NBPAGES_MAX)) 
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */  
-/* Exported types ------------------------------------------------------------*/ 
-
-/** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types
-  * @{
-  */  
-
-/**
-  * @brief  FLASH Erase structure definition
-  */
-typedef struct
-{
-  uint32_t TypeErase;   /*!< TypeErase: Page Erase only.
-                             This parameter can be a value of @ref FLASHEx_Type_Erase */
-
-  uint32_t PageAddress; /*!< PageAddress: Initial FLASH address to be erased
-                             This parameter must be a value belonging to FLASH Programm address (depending on the devices)  */
-  
-  uint32_t NbPages;     /*!< NbPages: Number of pages to be erased.
-                             This parameter must be a value between 1 and (max number of pages - value of Initial page)*/
-  
-} FLASH_EraseInitTypeDef;
-
-/**
-  * @brief  FLASH Option Bytes PROGRAM structure definition
-  */
-typedef struct
-{
-  uint32_t  OptionType;       /*!< OptionType: Option byte to be configured.
-                                   This parameter can be a value of @ref FLASHEx_Option_Type */
-
-  uint32_t  WRPState;         /*!< WRPState: Write protection activation or deactivation.
-                                   This parameter can be a value of @ref FLASHEx_WRP_State */
-
-  uint32_t WRPSector;         /*!< WRPSector: This bitfield specifies the sector (s) which are write protected.
-                                   This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection */
-
-#if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || defined(STM32L082xx) || defined(STM32L083xx)  
-  uint32_t WRPSector2;        /*!< WRPSector2 : This bitfield specifies the sector(s) upper Sector31 which are write protected.
-                                   This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection2 */
-#endif
-
-  uint8_t   RDPLevel;         /*!< RDPLevel: Set the read protection level.
-                                   This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */
-
-  uint8_t   BORLevel;         /*!< BORLevel: Set the BOR Level.
-                                   This parameter can be a value of @ref FLASHEx_Option_Bytes_BOR_Level */
-                                
-  uint8_t   USERConfig;       /*!< USERConfig: Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
-                                   This parameter can be a combination of @ref FLASHEx_Option_Bytes_IWatchdog, 
-                                   @ref FLASHEx_Option_Bytes_nRST_STOP and @ref FLASHEx_Option_Bytes_nRST_STDBY*/
-
-  uint8_t BOOTBit1Config;     /*!< BOOT1Config: Together with input pad Boot0, this bit selects the boot source, flash, ram or system memory
-                                   This parameter can be a value of @ref FLASHEx_Option_Bytes_BOOTBit1 */
-} FLASH_OBProgramInitTypeDef;
-
-#if defined(FLASH_OPTR_WPRMOD) || defined(FLASH_OPTR_BFB2)
-/**
-  * @brief  FLASH Advanced Option Bytes Program structure definition
-  */
-typedef struct
-{
-  uint32_t OptionType;          /*!< OptionType: Option byte to be configured for extension .
-                                     This parameter can be a value of @ref FLASHEx_OptionAdv_Type */
-
-#if defined(FLASH_OPTR_WPRMOD)
-  uint32_t PCROPState;          /*!< PCROPState: PCROP activation or deactivation.
-                                     This parameter can be a value of @ref FLASHEx_PCROP_State */
-
-  uint32_t PCROPSector;        /*!< PCROPSector : This bitfield specifies the sector(s) which are read/write protected.
-                                    This parameter can be a combination of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
-
-#if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
-  uint32_t PCROPSector2;       /*!< PCROPSector : This bitfield specifies the sector(s) upper Sector31 which are read/write protected.
-                                    This parameter can be a combination of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 */
-#endif /* STM32L071xx || STM32L072xx || STM32L073xx || STM32L081xx || STM32L082xx || STM32L083xx */
-#endif /* FLASH_OPTR_WPRMOD */
- 
-#if defined(FLASH_OPTR_BFB2)
-  uint16_t BootConfig;          /*!< BootConfig: specifies Option bytes for boot config
-                                     This parameter can be a value of @ref FLASHEx_Option_Bytes_BOOT */
-#endif /* FLASH_OPTR_BFB2*/
-} FLASH_AdvOBProgramInitTypeDef;
-
-/**
-  * @}
-  */
-#endif /* FLASH_OPTR_WPRMOD || FLASH_OPTR_BFB2 */
-
-/* Exported constants --------------------------------------------------------*/
-
-
-/** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants
-  * @{
-  */  
-
-/** @defgroup FLASHEx_Type_Erase FLASHEx_Type_Erase
-  * @{
-  */
-#define FLASH_TYPEERASE_PAGES           ((uint32_t)0x00U)  /*!> 16)) /*!< At startup, if boot pin 0 and BOOT1 bit are set in boot from user Flash position
-                                                            and this parameter is selected the device will boot from Bank 2 */
-
-/**
-  * @}
-  */
-#endif /* FLASH_OPTR_BFB2 */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-
-/** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros
- *  @{
- */
- 
-/**
-  * @brief  Set the FLASH Latency.
-  * @param  __LATENCY__ FLASH Latency
-  *          This parameter can be one of the following values:
-  *            @arg @ref FLASH_LATENCY_0  FLASH Zero Latency cycle
-  *            @arg @ref FLASH_LATENCY_1  FLASH One Latency cycle
-  * @retval none
-  */ 
-#define __HAL_FLASH_SET_LATENCY(__LATENCY__) \
-                  MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(__LATENCY__))
-
-/**
-  * @brief  Get the FLASH Latency.
-  * @retval FLASH Latency                   
-  *          This parameter can be one of the following values:
-  *            @arg @ref FLASH_LATENCY_0  FLASH Zero Latency cycle
-  *            @arg @ref FLASH_LATENCY_1  FLASH One Latency cycle
-  */ 
-#define __HAL_FLASH_GET_LATENCY()     (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))
-
-/**
-  * @brief  Enable the FLASH prefetch buffer.
-  * @retval none
-  */ 
-#define __HAL_FLASH_PREFETCH_BUFFER_ENABLE()      SET_BIT((FLASH->ACR), FLASH_ACR_PRFTEN)
-
-/**
-  * @brief  Disable the FLASH prefetch buffer.
-  * @retval none
-  */ 
-#define __HAL_FLASH_PREFETCH_BUFFER_DISABLE()     CLEAR_BIT((FLASH->ACR), FLASH_ACR_PRFTEN)
-
-/**
-  * @brief  Enable the FLASH Buffer cache.
-  * @retval none
-  */ 
-#define __HAL_FLASH_BUFFER_CACHE_ENABLE()         SET_BIT((FLASH->ACR), FLASH_ACR_DISAB_BUF)
-
-/**
-  * @brief  Disable the FLASH Buffer cache.
-  * @retval none
-  */ 
-#define __HAL_FLASH_BUFFER_CACHE_DISABLE()        CLEAR_BIT((FLASH->ACR), FLASH_ACR_DISAB_BUF)
-
-/**
-  * @brief  Enable the FLASH preread buffer.
-  * @retval none
-  */ 
-#define __HAL_FLASH_PREREAD_BUFFER_ENABLE()       SET_BIT((FLASH->ACR), FLASH_ACR_PRE_READ)
-
-/**
-  * @brief  Disable the FLASH preread buffer.
-  * @retval none
-  */ 
-#define __HAL_FLASH_PREREAD_BUFFER_DISABLE()      CLEAR_BIT((FLASH->ACR), FLASH_ACR_PRE_READ)
-
-/**
-  * @brief  Enable the FLASH power down during Sleep mode
-  * @retval none
-  */ 
-#define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE()      SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD)
-
-/**
-  * @brief  Disable the FLASH power down during Sleep mode
-  * @retval none
-  */ 
-#define __HAL_FLASH_SLEEP_POWERDOWN_DISABLE()     CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD)
-
-/**
-  * @brief  Enable the Flash Run power down mode.
-  * @note   Writing this bit  to 0 this bit, automatically the keys are
-  *         loss and a new unlock sequence is necessary to re-write it to 1.
-  */
-#define __HAL_FLASH_POWER_DOWN_ENABLE() do { FLASH->PDKEYR = FLASH_PDKEY1;    \
-                                             FLASH->PDKEYR = FLASH_PDKEY2;    \
-                                             SET_BIT((FLASH->ACR), FLASH_ACR_RUN_PD);  \
-                                           } while (0)
-
-/**
-  * @brief  Disable the Flash Run power down mode.
-  * @note   Writing this bit to 0 this bit, automatically the keys are
-  *         loss and a new unlock sequence is necessary to re-write it to 1.
-  */
-#define __HAL_FLASH_POWER_DOWN_DISABLE() do { FLASH->PDKEYR = FLASH_PDKEY1;    \
-                                              FLASH->PDKEYR = FLASH_PDKEY2;    \
-                                             CLEAR_BIT((FLASH->ACR), FLASH_ACR_RUN_PD);  \
-                                            } while (0)
-                                            
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @addtogroup FLASHEx_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup FLASHEx_Exported_Functions_Group1
-  * @{
-  */
-
-HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError);
-HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
-
-/**
-  * @}
-  */
-
-/** @addtogroup FLASHEx_Exported_Functions_Group2
-  * @{
-  */
-
-HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
-void              HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
-
-#if defined(FLASH_OPTR_WPRMOD) || defined(FLASH_OPTR_BFB2)
-    
-HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
-void              HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
-
-#endif /* FLASH_OPTR_WPRMOD || FLASH_OPTR_BFB2 */
-
-#if defined(FLASH_OPTR_WPRMOD)
-
-HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void);
-HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void);
-
-#endif /* FLASH_OPTR_WPRMOD */
-
-/**
-  * @}
-  */
-
-/** @addtogroup FLASHEx_Exported_Functions_Group3
-  * @{
-  */
-
-HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Unlock(void);
-HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Lock(void);
-
-HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Erase(uint32_t Address);
-HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data);
-void              HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram(void);
-void              HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram(void);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_FLASH_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h
deleted file mode 100755
index bc5668f9..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_flash_ramfunc.h
-  * @author  MCD Application Team
-  * @brief   Header file of FLASH RAMFUNC driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_FLASH_RAMFUNC_H
-#define __STM32L0xx_FLASH_RAMFUNC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup FLASH_RAMFUNC
-  * @{
-  */ 
-
-/* Exported types ------------------------------------------------------------*/ 
-
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @addtogroup FLASH_RAMFUNC_Exported_Functions
-  * @{
-  */
-
-/*
-  * @brief  FLASH memory functions that should be executed from internal SRAM.
-  *         These functions are defined inside the "stm32l0xx_hal_flash_ramfunc.c"
-  *         file.
-  */
-  
-/** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group1
-  * @{
-  */
-
-__RAM_FUNC HAL_FLASHEx_EnableRunPowerDown(void);
-__RAM_FUNC HAL_FLASHEx_DisableRunPowerDown(void);
-
-/**
-  * @}
-  */ 
-
-/** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group2
-  * @{
-  */
-
-#if defined(FLASH_PECR_PARALLBANK)
-
-__RAM_FUNC HAL_FLASHEx_EraseParallelPage(uint32_t Page_Address1, uint32_t Page_Address2);
-__RAM_FUNC HAL_FLASHEx_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuffer1, uint32_t Address2, uint32_t* pBuffer2);
-
-#endif /* FLASH_PECR_PARALLBANK */
-
-__RAM_FUNC HAL_FLASHEx_HalfPageProgram(uint32_t Address, uint32_t* pBuffer);
-
-/**
-  * @}
-  */ 
-
-/** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group3
-  * @{
-  */
-__RAM_FUNC  HAL_FLASHEx_GetError(uint32_t *Error);
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_FLASH_RAMFUNC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h
deleted file mode 100755
index aac51fea..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h
+++ /dev/null
@@ -1,342 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_gpio.h
-  * @author  MCD Application Team
-  * @brief   Header file of GPIO HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_GPIO_H
-#define __STM32L0xx_HAL_GPIO_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup GPIO GPIO
-  * @{
-  */ 
-/******************************************************************************/
-/* Exported types ------------------------------------------------------------*/
-/******************************************************************************/
-
-/** @defgroup GPIO_Exported_Types GPIO Exported Types
-  * @{
-  */
-
-/** @defgroup GPIO_Init_Configuration GPIO init configuration structure
-  * @{
-  */
-/** 
-  * @brief   GPIO Init structure definition  
-  */ 
-typedef struct
-{
-  uint32_t Pin;       /*!< Specifies the GPIO pins to be configured.
-                           This parameter can be a combination of @ref GPIO_pins_define */
-
-  uint32_t Mode;      /*!< Specifies the operating mode for the selected pins.
-                           This parameter can be a value of @ref GPIO_mode_define */
-
-  uint32_t Pull;      /*!< Specifies the Pull-up or Pull-Down activation for the selected pins.
-                           This parameter can be a value of @ref GPIO_pull_define */
-
-  uint32_t Speed;     /*!< Specifies the speed for the selected pins.
-                           This parameter can be a value of @ref GPIO_speed_define */
-
-  uint32_t Alternate;  /*!< Peripheral to be connected to the selected pins 
-                            This parameter can be a value of @ref GPIOEx_Alternate_function_selection */
-}GPIO_InitTypeDef;
-/**
-  * @}
-  */
-
-/** @defgroup GPIO_SetReset_Definition  GPIO set reset definition
-  * @{
-  */
-/** 
-  * @brief  GPIO Bit SET and Bit RESET enumeration 
-  */
-typedef enum
-{
-  GPIO_PIN_RESET = 0U,
-  GPIO_PIN_SET
-}GPIO_PinState;
-/**
-  * @}
-  */
-
-
-#define IS_GPIO_PIN_ACTION(__ACTION__) (((__ACTION__) == GPIO_PIN_RESET) || ((__ACTION__) == GPIO_PIN_SET))
-
-/**
-  * @}
-  */
-/******************************************************************************/
-/* Exported constants --------------------------------------------------------*/
-/******************************************************************************/
-
-/** @defgroup GPIO_Exported_Constants GPIO Exported Constants
-  * @{
-  */
-
-/** @defgroup GPIO_pins_define Pin definition
-  * @{
-  */
-#define GPIO_PIN_0                 ((uint16_t)0x0001U)  /* Pin 0 selected    */
-#define GPIO_PIN_1                 ((uint16_t)0x0002U)  /* Pin 1 selected    */
-#define GPIO_PIN_2                 ((uint16_t)0x0004U)  /* Pin 2 selected    */
-#define GPIO_PIN_3                 ((uint16_t)0x0008U)  /* Pin 3 selected    */
-#define GPIO_PIN_4                 ((uint16_t)0x0010U)  /* Pin 4 selected    */
-#define GPIO_PIN_5                 ((uint16_t)0x0020U)  /* Pin 5 selected    */
-#define GPIO_PIN_6                 ((uint16_t)0x0040U)  /* Pin 6 selected    */
-#define GPIO_PIN_7                 ((uint16_t)0x0080U)  /* Pin 7 selected    */
-#define GPIO_PIN_8                 ((uint16_t)0x0100U)  /* Pin 8 selected    */
-#define GPIO_PIN_9                 ((uint16_t)0x0200U)  /* Pin 9 selected    */
-#define GPIO_PIN_10                ((uint16_t)0x0400U)  /* Pin 10 selected   */
-#define GPIO_PIN_11                ((uint16_t)0x0800U)  /* Pin 11 selected   */
-#define GPIO_PIN_12                ((uint16_t)0x1000U)  /* Pin 12 selected   */
-#define GPIO_PIN_13                ((uint16_t)0x2000U)  /* Pin 13 selected   */
-#define GPIO_PIN_14                ((uint16_t)0x4000U)  /* Pin 14 selected   */
-#define GPIO_PIN_15                ((uint16_t)0x8000U)  /* Pin 15 selected   */
-#define GPIO_PIN_All               ((uint16_t)0xFFFFU)  /* All pins selected */
-/**
-  * @}
-  */
-
-#define GPIO_PIN_MASK              ((uint32_t)0x0000FFFFU) /* PIN mask for assert test */
-#define IS_GPIO_PIN(__PIN__)        ((((__PIN__) & GPIO_PIN_MASK) != (uint32_t)0x00) &&\
-                                     (((__PIN__) & ~GPIO_PIN_MASK) == (uint32_t)0x00))
-
-/** @defgroup GPIO_mode_define Mode definition
-  * @brief GPIO Configuration Mode 
-  *        Elements values convention: 0xX0yz00YZ
-  *           - X  : GPIO mode or EXTI Mode
-  *           - y  : External IT or Event trigger detection 
-  *           - z  : IO configuration on External IT or Event
-  *           - Y  : Output type (Push Pull or Open Drain)
-  *           - Z  : IO Direction mode (Input, Output, Alternate or Analog)
-  * @{
-  */ 
-#define  GPIO_MODE_INPUT                        ((uint32_t)0x00000000U)   /*!< Input Floating Mode                   */
-#define  GPIO_MODE_OUTPUT_PP                    ((uint32_t)0x00000001U)   /*!< Output Push Pull Mode                 */
-#define  GPIO_MODE_OUTPUT_OD                    ((uint32_t)0x00000011U)   /*!< Output Open Drain Mode                */
-#define  GPIO_MODE_AF_PP                        ((uint32_t)0x00000002U)   /*!< Alternate Function Push Pull Mode     */
-#define  GPIO_MODE_AF_OD                        ((uint32_t)0x00000012U)   /*!< Alternate Function Open Drain Mode    */
-
-#define  GPIO_MODE_ANALOG                       ((uint32_t)0x00000003U)   /*!< Analog Mode  */
-    
-#define  GPIO_MODE_IT_RISING                    ((uint32_t)0x10110000U)   /*!< External Interrupt Mode with Rising edge trigger detection          */
-#define  GPIO_MODE_IT_FALLING                   ((uint32_t)0x10210000U)   /*!< External Interrupt Mode with Falling edge trigger detection         */
-#define  GPIO_MODE_IT_RISING_FALLING            ((uint32_t)0x10310000U)   /*!< External Interrupt Mode with Rising/Falling edge trigger detection  */
- 
-#define  GPIO_MODE_EVT_RISING                   ((uint32_t)0x10120000U)   /*!< External Event Mode with Rising edge trigger detection               */
-#define  GPIO_MODE_EVT_FALLING                  ((uint32_t)0x10220000U)   /*!< External Event Mode with Falling edge trigger detection              */
-#define  GPIO_MODE_EVT_RISING_FALLING           ((uint32_t)0x10320000U)   /*!< External Event Mode with Rising/Falling edge trigger detection       */
-
-/**
-  * @}
-  */
-
-#define IS_GPIO_MODE(__MODE__) (((__MODE__) == GPIO_MODE_INPUT)              ||\
-                                ((__MODE__) == GPIO_MODE_OUTPUT_PP)          ||\
-                                ((__MODE__) == GPIO_MODE_OUTPUT_OD)          ||\
-                                ((__MODE__) == GPIO_MODE_AF_PP)              ||\
-                                ((__MODE__) == GPIO_MODE_AF_OD)              ||\
-                                ((__MODE__) == GPIO_MODE_IT_RISING)          ||\
-                                ((__MODE__) == GPIO_MODE_IT_FALLING)         ||\
-                                ((__MODE__) == GPIO_MODE_IT_RISING_FALLING)  ||\
-                                ((__MODE__) == GPIO_MODE_EVT_RISING)         ||\
-                                ((__MODE__) == GPIO_MODE_EVT_FALLING)        ||\
-                                ((__MODE__) == GPIO_MODE_EVT_RISING_FALLING) ||\
-                                ((__MODE__) == GPIO_MODE_ANALOG))
-
-
-/** @defgroup GPIO_speed_define Speed definition
-  * @brief GPIO Output Maximum frequency
-  * @{
-  */  
-#define  GPIO_SPEED_FREQ_LOW              ((uint32_t)0x00000000U)  /*!< range up to 0.4 MHz, please refer to the product datasheet */
-#define  GPIO_SPEED_FREQ_MEDIUM           ((uint32_t)0x00000001U)  /*!< range 0.4 MHz to 2 MHz, please refer to the product datasheet */
-#define  GPIO_SPEED_FREQ_HIGH             ((uint32_t)0x00000002U)  /*!< range   2 MHz to 10 MHz, please refer to the product datasheet */
-#define  GPIO_SPEED_FREQ_VERY_HIGH        ((uint32_t)0x00000003U)  /*!< range  10 MHz to 35 MHz, please refer to the product datasheet */
-
-/**
-  * @}
-  */
-
-#define IS_GPIO_SPEED(__SPEED__) (((__SPEED__) == GPIO_SPEED_FREQ_LOW     )  || ((__SPEED__) == GPIO_SPEED_FREQ_MEDIUM     ) || \
-                                  ((__SPEED__) == GPIO_SPEED_FREQ_HIGH  ) || ((__SPEED__) == GPIO_SPEED_FREQ_VERY_HIGH))
-
-
- /** @defgroup GPIO_pull_define Pull definition
-   * @brief GPIO Pull-Up or Pull-Down Activation
-   * @{
-   */  
-#define  GPIO_NOPULL        ((uint32_t)0x00000000U)   /*!< No Pull-up or Pull-down activation  */
-#define  GPIO_PULLUP        ((uint32_t)0x00000001U)   /*!< Pull-up activation                  */
-#define  GPIO_PULLDOWN      ((uint32_t)0x00000002U)   /*!< Pull-down activation                */
-
-/**
-  * @}
-  */
-
-#define IS_GPIO_PULL(__PULL__) (((__PULL__) == GPIO_NOPULL) || ((__PULL__) == GPIO_PULLUP) || \
-                                ((__PULL__) == GPIO_PULLDOWN))
-
-  
-/**
-  * @}
-  */
-/******************************************************************************/
-/* Exported macro ------------------------------------------------------------*/
-/******************************************************************************/
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup GPIO_Exported_Macro GPIO Exported Macros
-  * @{
-  */
-/**
-  * @brief  Checks whether the specified EXTI line flag is set or not.
-  * @param  __EXTI_LINE__: specifies the EXTI line flag to check.
-  *         This parameter can be GPIO_PIN_x where x can be(0..15)
-  * @retval The new state of __EXTI_LINE__ (SET or RESET).
-  */
-#define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
-
-/**
-  * @brief  Clears the EXTI's line pending flags.
-  * @param  __EXTI_LINE__: specifies the EXTI lines flags to clear.
-  *         This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
-  * @retval None
-  */
-#define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
-
-/**
-  * @brief  Checks whether the specified EXTI line is asserted or not.
-  * @param  __EXTI_LINE__: specifies the EXTI line to check.
-  *          This parameter can be GPIO_PIN_x where x can be(0..15)
-  * @retval The new state of __EXTI_LINE__ (SET or RESET).
-  */
-#define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
-
-/**
-  * @brief  Clears the EXTI's line pending bits.
-  * @param  __EXTI_LINE__: specifies the EXTI lines to clear.
-  *          This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
-  * @retval None
-  */
-#define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
-
-/**
-  * @brief  Generates a Software interrupt on selected EXTI line.
-  * @param  __EXTI_LINE__: specifies the EXTI line to check.
-  *          This parameter can be GPIO_PIN_x where x can be(0..15)
-  * @retval None
-  */
-#define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER |= (__EXTI_LINE__))
-
-/**
-  * @}
-  */
-/* Include GPIO HAL Extension module */
-#include "stm32l0xx_hal_gpio_ex.h"
-
-/******************************************************************************/
-/* Exported functions --------------------------------------------------------*/
-/******************************************************************************/
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup GPIO_Exported_Functions GPIO Exported Functions
-  * @{
-  */
-
-/* Initialization and de-initialization functions *******************************/
-/** @defgroup GPIO_Exported_Functions_Group1 Initialization and de-initialization functions
- *  @{
- */
-void  HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init);
-void  HAL_GPIO_DeInit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin);
-/**
-  * @}
-  */
-
-/* IO operation functions *******************************************************/
-/** @defgroup GPIO_Exported_Functions_Group2 IO operation functions
- *  @{
- */
-GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
-void          HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
-void          HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
-HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
-void          HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin);
-void          HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Define the private group ***********************************/
-/**************************************************************/
-/** @defgroup GPIO_Private GPIO Private
-  * @{
-  */
-/**
-  * @}
-  */
-/**************************************************************/
-
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_GPIO_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h
deleted file mode 100755
index e727fa61..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h
+++ /dev/null
@@ -1,2282 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_gpio_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of GPIO HAL Extension module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_GPIO_EX_H
-#define __STM32L0xx_HAL_GPIO_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup GPIOEx GPIOEx
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup GPIOEx_Exported_Constants GPIOEx Exported Constants
-  * @{
-  */ 
-  
-
-/*----------------------------------------------------------------------------*/
-/*------------------------- STM32L083xx/STM32L073xx---------------------------*/
-/*----------------------------------------------------------------------------*/
-
-#if defined (STM32L083xx) || defined (STM32L073xx)
-
-/* The table below gives an overview of the different alternate functions per port.
- * For more details refer yourself to the product data sheet.
- *
- */
-
-/*     |   AF0  |   AF1  |   AF2  |   AF3  |   AF4  |   AF5  |   AF6  |   AF7  |
- *______________________________________________________________________________
- * PA0 |        |        |TIM2_C1 |TSC     |USART2  |TIM2_TR |USART4  |COMP1   |
- * PA1 |EVENTOUT|LCD     |TIM2_C2 |TSC     |USART2  |TIM21_TR|USART4  |        |
- * PA2 |TIM21_C1|LCD     |TIM2_C3 |TSC     |USART2  |        |LPUART1 |COMP2   |
- * PA3 |TIM21_C2|LCD     |TIM2_C4 |TSC     |USART2  |        |LPUART1 |        |
- * PA4 |SPI1    |        |        |TSC     |USART2  |TIM22_TR|        |        |
- * PA5 |SPI1    |        |TIM2_TR |TSC     |        |TIM2_C1 |        |        |
- * PA6 |SPI1    |LCD     |TIM3_C1 |TSC     |LPUART1 |TIM22_C1|EVENTOUT|COMP1   |
- * PA7 |SPI1    |LCD     |TIM3_C2 |TSC     |        |TIM22_C2|EVENTOUT|COMP2   |
- * PA8 |MCO     |LCD     |USB     |EVENTOUT|USART1  |        |        |I2C3    |
- * PA9 |MCO     |LCD     |        |TSC     |USART1  |        |I2C1    |I2C3    |
- * PA10|        |LCD     |        |TSC     |USART1  |        |I2C1    |        |
- * PA11|SPI1    |        |EVENTOUT|TSC     |USART1  |        |I2C2    |COMP1   |
- * PA12|SPI1    |        |EVENTOUT|TSC     |USART1  |        |I2C2    |COMP2   |
- * PA13|SWDIO   |        |USB     |        |        |        |LPUART1 |        |
- * PA14|SWCLK   |        |        |        |USART2  |        |LPUART1 |        |
- * PA15|SPI1    |LCD     |TIM2_TR |EVENTOUT|USART2  |TIM2_C1 |USART4  |        |
- *______________________________________________________________________________
- * PB0 |EVENTOUT|LCD     |TIM3_C3 |TSC     |        |        |        |        |
- * PB1 |        |LCD     |TIM3_C4 |TSC     |LPUART1 |        |        |        |
- * PB2 |        |        |LPTIM1_O|TSC     |        |        |        |I2C3    |
- * PB3 |SPI1    |LCD     |TIM2_C2 |TSC     |EVENTOUT|USART1  |USART5  |        |
- * PB4 |SPI1    |LCD     |TIM3_C1 |TSC     |TIM22_C1|USART1  |USART5  |I2C3    |
- * PB5 |SPI1    |LCD     |LPTIM1_I|I2C1    |TIM3_C2 |USART1  |USART5  |        |
- *     |        |        |        |        |TIM22_C2|        |        |        |
- * PB6 |USART1  |I2C1    |LPTIM1_T|TSC     |        |        |        |        |
- * PB7 |USART1  |I2C1    |LPTIM1_I|TSC     |        |        |USART4  |        |
- * PB8 |        |LCD     |        |TSC     |I2C1    |        |        |        |
- * PB9 |        |LCD     |EVENTOUT|        |I2C1    |SPI2    |        |        |
- * PB10|        |LCD     |TIM2_C3 |TSC     |LPUART1 |SPI2    |I2C2    |LPUART1 |
- * PB11|EVENTOUT|LCD     |TIM2_C4 |TSC     |LPUART1 |        |I2C2    |LPUART1 |
- * PB12|SPI2    |LCD     |LPUART1 |TSC     |        |I2C2    |EVENTOUT|        |
- * PB13|SPI2    |LCD     |MCO     |TSC     |LPUART1 |I2C2    |TIM21_C1|        |
- * PB14|SPI2    |LCD     |RTC     |TSC     |LPUART1 |I2C2    |TIM21_C2|        |
- * PB15|SPI2    |LCD     |RTC     |        |        |        |        |        |
- *______________________________________________________________________________
- * PC0 |LPTIM1_I|LCD     |EVENTOUT|TSC     |        |        |LPUART1 |I2C3    |
- * PC1 |LPTIM1_O|LCD     |EVENTOUT|TSC     |        |        |LPUART1 |I2C3    |
- * PC2 |LPTIM1_I|LCD     |SPI2    |TSC     |        |        |        |        |
- * PC3 |LPTIM1_T|LCD     |SPI2    |TSC     |        |        |        |        |
- * PC4 |EVENTOUT|LCD     |LPUART1 |        |        |        |        |        |
- * PC5 |        |LCD     |LPUART1 |TSC     |        |        |        |        |
- * PC6 |TIM22_C1|LCD     |TIM3_C1 |TSC     |        |        |        |        |
- * PC7 |TIM22_C2|LCD     |TIM3_C2 |TSC     |        |        |        |        |
- * PC8 |TIM22_TR|LCD     |TIM3_C3 |TSC     |        |        |        |        |
- * PC9 |TIM21_TR|LCD     |USB     |TSC     |        |        |        |I2C3    |
- *     |        |        |TIM3_C4 |        |        |        |        |        |
- * PC10|LPUART1 |LCD     |        |        |        |        |USART4  |        |
- * PC11|LPUART1 |LCD     |        |        |        |        |USART4  |        |
- * PC12|        |LCD     |USART5  |        |        |        |USART4  |        |
- * PC13|        |        |        |        |        |        |        |        |
- * PC14|        |        |        |        |        |        |        |        |
- * PC15|        |        |        |        |        |        |        |        |
- *______________________________________________________________________________
- * PD0 |TIM21_C1|SPI2    |        |        |        |        |        |        |
- * PD1 |        |SPI2    |        |        |        |        |        |        |
- * PD2 |LPUART1 |LCD     |TIM3_TR |        |        |        |USART5  |        |
- * PD3 |USART2  |LCD     |SPI2    |        |        |        |        |        |
- * PD4 |USART2  |SPI2    |        |        |        |        |        |        |
- * PD5 |USART2  |        |        |        |        |        |        |        |
- * PD6 |USART2  |        |        |        |        |        |        |        |
- * PD7 |USART2  |TIM21_C2|        |        |        |        |        |        |
- * PD8 |LPUART1 |LCD     |        |        |        |        |        |        |
- * PD9 |LPUART1 |LCD     |        |        |        |        |        |        |
- * PD10|        |LCD     |        |        |        |        |        |        |
- * PD11|LPUART1 |LCD     |        |        |        |        |        |        |
- * PD12|LPUART1 |LCD     |        |        |        |        |        |        |
- * PD13|        |LCD     |        |        |        |        |        |        |
- * PD14|        |LCD     |        |        |        |        |        |        |
- * PD15|USB     |LCD     |        |        |        |        |        |        |
- *______________________________________________________________________________
- * PE0 |        |LCD     |EVENTOUT|        |        |        |        |        |
- * PE1 |        |LCD     |EVENTOUT|        |        |        |        |        |
- * PE2 |        |LCD     |TIM3_TR |        |        |        |        |        |
- * PE3 |TIM22_C1|LCD     |TIM3_C1 |        |        |        |        |        |
- * PE4 |TIM22_C2|        |TIM3_C2 |        |        |        |        |        |
- * PE5 |TIM21_C1|        |TIM3_C3 |        |        |        |        |        |
- * PE6 |TIM21_C2|        |TIM3_C4 |        |        |        |        |        |
- * PE7 |        |LCD     |        |        |        |        |USART5  |        |
- * PE8 |        |LCD     |        |        |        |        |USART4  |        |
- * PE9 |TIM2_C1 |LCD     |TIM2_TR |        |        |        |USART4  |        |
- * PE10|TIM2_C2 |LCD     |        |        |        |        |USART5  |        |
- * PE11|TIM2_C3 |        |        |        |        |        |USART5  |        |
- * PE12|TIM2_C4 |        |SPI1    |        |        |        |        |        |
- * PE13|        |LCD     |SPI1    |        |        |        |        |        |
- * PE14|        |LCD     |SPI1    |        |        |        |        |        |
- * PE15|        |LCD     |SPI1    |        |        |        |        |        |
- *______________________________________________________________________________
- * PH0 |USB     |        |        |        |        |        |        |        |
- * PH1 |        |        |        |        |        |        |        |        |
- * PH9 |        |        |        |        |        |        |        |        |
- * PH10|        |        |        |        |        |        |        |        |
- *
- */
-
-/** @defgroup GPIOEx_Alternate_function_selection Alternate function selection
- * @{
- */
-
-/*
- * Alternate function AF0
- */
-#define GPIO_AF0_EVENTOUT      ((uint8_t)0x00U)  /* EVENTOUT Alternate Function mapping */
-#define GPIO_AF0_TIM21         ((uint8_t)0x00U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF0_SPI1          ((uint8_t)0x00U)  /* SPI1 Alternate Function mapping     */
-#define GPIO_AF0_MCO           ((uint8_t)0x00U)  /* MCO Alternate Function mapping      */
-#define GPIO_AF0_SWDIO         ((uint8_t)0x00U)  /* SWDIO Alternate Function mapping    */
-#define GPIO_AF0_SWCLK         ((uint8_t)0x00U)  /* SWCLK Alternate Function mapping    */
-#define GPIO_AF0_USART1        ((uint8_t)0x00U)  /* USART1 Alternate Function mapping   */
-#define GPIO_AF0_SPI2          ((uint8_t)0x00U)  /* SPI2 Alternate Function mapping     */
-#define GPIO_AF0_LPTIM1        ((uint8_t)0x00U)  /* LPTIM1 Alternate Function mapping   */
-#define GPIO_AF0_TIM22         ((uint8_t)0x00U)  /* TIM22 Alternate Function mapping    */
-#define GPIO_AF0_LPUART1       ((uint8_t)0x00U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF0_USART2        ((uint8_t)0x00U)  /* USART2 Alternate Function mapping   */
-#define GPIO_AF0_TIM2          ((uint8_t)0x00U)  /* TIM2 Alternate Function mapping     */
-#define GPIO_AF0_USB           ((uint8_t)0x00U)  /* USB Alternate Function mapping      */
-/**
- *
- */
-
-/*
- * Alternate function AF1
- */
-#define GPIO_AF1_I2C1          ((uint8_t)0x01U)  /* I2C1 Alternate Function mapping     */
-#define GPIO_AF1_SPI2          ((uint8_t)0x01U)  /* SPI2 Alternate Function mapping     */
-#define GPIO_AF1_TIM21         ((uint8_t)0x01U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF1_LCD           ((uint8_t)0x01U)  /* LCD Alternate Function mapping      */
-/**
- *
- */
-
-/*
- * Alternate function AF2
- */
-#define GPIO_AF2_TIM2          ((uint8_t)0x02U)  /* TIM2 Alternate Function mapping     */
-#define GPIO_AF2_TIM3          ((uint8_t)0x02U)  /* TIM3 Alternate Function mapping     */
-#define GPIO_AF2_EVENTOUT      ((uint8_t)0x02U)  /* EVENTOUT Alternate Function mapping */
-#define GPIO_AF2_LPTIM1        ((uint8_t)0x02U)  /* LPTIM1 Alternate Function mapping   */
-#define GPIO_AF2_LPUART1       ((uint8_t)0x02U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF2_MCO           ((uint8_t)0x02U)  /* MCO Alternate Function mapping      */
-#define GPIO_AF2_RTC           ((uint8_t)0x02U)  /* RTC Alternate Function mapping      */
-#define GPIO_AF2_SPI2          ((uint8_t)0x02U)  /* SPI2 Alternate Function mapping     */
-#define GPIO_AF2_USART5        ((uint8_t)0x02U)  /* USART5 Alternate Function mapping   */
-#define GPIO_AF2_SPI1          ((uint8_t)0x02U)  /* SPI1 Alternate Function mapping     */
-#define GPIO_AF2_USB           ((uint8_t)0x00U)  /* USB Alternate Function mapping      */
-/**
- *
- */
-
-/*
- * Alternate function AF3
- */
-#define GPIO_AF3_EVENTOUT      ((uint8_t)0x03U)  /* EVENTOUT Alternate Function mapping */
-#define GPIO_AF3_I2C1          ((uint8_t)0x03U)  /* I2C1 Alternate Function mapping     */
-#define GPIO_AF3_TSC           ((uint8_t)0x03U)  /* TSC  Alternate Function mapping     */
-/**
- *
- */
-
-/*
- * Alternate function AF4
- */
-#define GPIO_AF4_USART2          ((uint8_t)0x04U)  /* USART2 Alternate Function mapping  */
-#define GPIO_AF4_LPUART1         ((uint8_t)0x04U)  /* LPUART1 Alternate Function mapping */
-#define GPIO_AF4_USART1          ((uint8_t)0x04U)  /* USART1 Alternate Function mapping  */
-#define GPIO_AF4_EVENTOUT        ((uint8_t)0x04U)  /* EVENTOUT Alternate Function mapping*/
-#define GPIO_AF4_TIM22           ((uint8_t)0x04U)  /* TIM22 Alternate Function mapping   */
-#define GPIO_AF4_TIM3            ((uint8_t)0x04U)  /* TIM3 Alternate Function mapping    */
-#define GPIO_AF4_I2C1            ((uint8_t)0x04U)  /* I2C1 Alternate Function mapping    */
-/**
- *
- */
-
-/*
- * Alternate function AF5
- */
-#define GPIO_AF5_TIM2          ((uint8_t)0x05U)  /* TIM2 Alternate Function mapping     */
-#define GPIO_AF5_TIM21         ((uint8_t)0x05U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF5_TIM22         ((uint8_t)0x05U)  /* TIM22 Alternate Function mapping    */
-#define GPIO_AF5_USART1        ((uint8_t)0x05U)  /* USART1 Alternate Function mapping   */
-#define GPIO_AF5_SPI2          ((uint8_t)0x05U)  /* SPI2 Alternate Function mapping     */
-#define GPIO_AF5_I2C2          ((uint8_t)0x05U)  /* I2C2 Alternate Function mapping     */
-/**
- *
- */
-
-/*
- * Alternate function AF6
- */
-
-#define GPIO_AF6_USART4        ((uint8_t)0x06U)  /* USART4 Alternate Function mapping   */
-#define GPIO_AF6_LPUART1       ((uint8_t)0x06U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF6_EVENTOUT      ((uint8_t)0x06U)  /* EVENTOUT Alternate Function mapping */
-#define GPIO_AF6_I2C1          ((uint8_t)0x06U)  /* I2C1 Alternate Function mapping     */
-#define GPIO_AF6_I2C2          ((uint8_t)0x06U)  /* I2C2 Alternate Function mapping     */
-#define GPIO_AF6_USART5        ((uint8_t)0x06U)  /* USART5 Alternate Function mapping   */
-#define GPIO_AF6_TIM21         ((uint8_t)0x06U)  /* TIM21 Alternate Function mapping    */
-/**
- *
- */
-
-/*
- * Alternate function AF7
- */
-#define GPIO_AF7_COMP1        ((uint8_t)0x07U)  /* COMP1 Alternate Function mapping     */
-#define GPIO_AF7_COMP2        ((uint8_t)0x07U)  /* COMP2 Alternate Function mapping     */
-#define GPIO_AF7_I2C3         ((uint8_t)0x07U)  /* I2C3 Alternate Function mapping      */
-#define GPIO_AF7_LPUART1      ((uint8_t)0x07U)  /* LPUART1 Alternate Function mapping   */
-/**
-  *
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup GPIOEx_Private  GPIOEx Private
- * @{
- */
-/**
- *  IS_GPIO_AF macro definition
- */
-#define IS_GPIO_AF(__AF__) (((__AF__) == GPIO_AF0_EVENTOUT) || ((__AF__) == GPIO_AF1_LCD)      || \
-                            ((__AF__) == GPIO_AF0_SPI1)     || ((__AF__) == GPIO_AF1_I2C1)     || \
-                            ((__AF__) == GPIO_AF0_TIM21)    || ((__AF__) == GPIO_AF1_SPI2)     || \
-                            ((__AF__) == GPIO_AF0_MCO)      || ((__AF__) == GPIO_AF1_TIM21)    || \
-                            ((__AF__) == GPIO_AF0_SWDIO)    || ((__AF__) == GPIO_AF2_TIM2)     || \
-                            ((__AF__) == GPIO_AF0_SWCLK)    || ((__AF__) == GPIO_AF2_TIM3)     || \
-                            ((__AF__) == GPIO_AF0_USART1)   || ((__AF__) == GPIO_AF2_USB)      || \
-                            ((__AF__) == GPIO_AF0_SPI2)     || ((__AF__) == GPIO_AF2_EVENTOUT) || \
-                            ((__AF__) == GPIO_AF0_LPTIM1)   || ((__AF__) == GPIO_AF2_LPTIM1)   || \
-                            ((__AF__) == GPIO_AF0_TIM2)     || ((__AF__) == GPIO_AF2_LPUART1)  || \
-                            ((__AF__) == GPIO_AF0_LPUART1)  || ((__AF__) == GPIO_AF2_MCO)      || \
-                            ((__AF__) == GPIO_AF0_USART2)   || ((__AF__) == GPIO_AF2_RTC)      || \
-                            ((__AF__) == GPIO_AF0_USB)      || ((__AF__) == GPIO_AF2_SPI2)     || \
-                            ((__AF__) == GPIO_AF0_TIM2)     || ((__AF__) == GPIO_AF2_USART5)   || \
-                            ((__AF__) == GPIO_AF3_TSC)      || ((__AF__) == GPIO_AF2_SPI1)     || \
-                            ((__AF__) == GPIO_AF3_EVENTOUT) || ((__AF__) == GPIO_AF4_USART2)   || \
-                            ((__AF__) == GPIO_AF3_I2C1)     || ((__AF__) == GPIO_AF4_LPUART1)  || \
-                            ((__AF__) == GPIO_AF5_TIM21)    || ((__AF__) == GPIO_AF4_EVENTOUT) || \
-                            ((__AF__) == GPIO_AF5_TIM2)     || ((__AF__) == GPIO_AF4_USART1)   || \
-                            ((__AF__) == GPIO_AF5_USART1)   || ((__AF__) == GPIO_AF4_TIM22)    || \
-                            ((__AF__) == GPIO_AF5_TIM22)    || ((__AF__) == GPIO_AF4_TIM3)     || \
-                            ((__AF__) == GPIO_AF5_SPI2)     || ((__AF__) == GPIO_AF4_I2C1)     || \
-                            ((__AF__) == GPIO_AF5_I2C2)     || ((__AF__) == GPIO_AF6_USART4)   || \
-                            ((__AF__) == GPIO_AF7_COMP2)    || ((__AF__) == GPIO_AF6_LPUART1)  || \
-                            ((__AF__) == GPIO_AF7_COMP1)    || ((__AF__) == GPIO_AF6_I2C1)     || \
-                            ((__AF__) == GPIO_AF7_I2C3)     || ((__AF__) == GPIO_AF6_EVENTOUT) || \
-                            ((__AF__) == GPIO_AF7_LPUART1)  || ((__AF__) == GPIO_AF6_I2C2)     || \
-                            ((__AF__) == GPIO_AF6_USART5)   || ((__AF__) == GPIO_AF6_TIM21))
-
-
-#define IS_GPIO_AF_AVAILABLE(__INSTANCE__,__AF__)  \
-        ((((__INSTANCE__) == GPIOA) && (((__AF__) ==  GPIO_AF0_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF1_LCD)       ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM2)      ||   \
-                                        ((__AF__) ==  GPIO_AF3_TSC)       ||   \
-                                        ((__AF__) ==  GPIO_AF4_USART2)    ||   \
-                                        ((__AF__) ==  GPIO_AF5_TIM22)     ||   \
-                                        ((__AF__) ==  GPIO_AF6_USART4)    ||   \
-                                        ((__AF__) ==  GPIO_AF7_I2C3)))    ||   \
-         (((__INSTANCE__) == GPIOB) && (((__AF__) ==  GPIO_AF0_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF1_LCD)       ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM2)      ||   \
-                                        ((__AF__) ==  GPIO_AF3_TSC)       ||   \
-                                        ((__AF__) ==  GPIO_AF4_TIM3)      ||   \
-                                        ((__AF__) ==  GPIO_AF5_I2C2)      ||   \
-                                        ((__AF__) ==  GPIO_AF6_USART4)    ||   \
-                                        ((__AF__) ==  GPIO_AF7_LPUART1))) ||   \
-         (((__INSTANCE__) == GPIOC) && (((__AF__) ==  GPIO_AF0_LPTIM1)    ||   \
-                                        ((__AF__) ==  GPIO_AF1_LCD)       ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM3)      ||   \
-                                        ((__AF__) ==  GPIO_AF3_TSC)       ||   \
-                                        ((__AF__) ==  GPIO_AF6_USART4)    ||   \
-                                        ((__AF__) ==  GPIO_AF7_I2C3)))    ||   \
-         (((__INSTANCE__) == GPIOD) && (((__AF__) ==  GPIO_AF0_LPUART1)   ||   \
-                                        ((__AF__) ==  GPIO_AF1_LCD)       ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM3)      ||   \
-                                        ((__AF__) ==  GPIO_AF6_USART5)))  ||   \
-         (((__INSTANCE__) == GPIOE) && (((__AF__) ==  GPIO_AF0_TIM22)     ||   \
-                                        ((__AF__) ==  GPIO_AF1_LCD)       ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM3)      ||   \
-                                        ((__AF__) ==  GPIO_AF6_USART4)))  ||   \
-         (((__INSTANCE__) == GPIOH) && (((__AF__) ==  GPIO_AF0_USB))))
-
- /**
-  * @}
-  */
-#endif /* (STM32L083xx) || (STM32L073xx) */
-
-/*----------------------------------------------------------------------------*/
-/*------------------------- STM32L082xx and STM32L072xx-----------------------*/
-/*----------------------------------------------------------------------------*/
-#if defined (STM32L082xx) || defined (STM32L072xx)
-
-/* The table below gives an overview of the different alternate functions per port.
- * For more details refer yourself to the product data sheet.
- */
-
-
-/*     |   AF0  |   AF1  |   AF2  |   AF3  |   AF4  |   AF5  |   AF6  |   AF7  |
- *______________________________________________________________________________
- * PA0 |        |        |TIM2_C1 |TSC     |USART2  |TIM2_TR |USART4  |COMP1   |
- * PA1 |EVENTOUT|        |TIM2_C2 |TSC     |USART2  |TIM21_TR|USART4  |        |
- * PA2 |TIM21_C1|        |TIM2_C3 |TSC     |USART2  |        |LPUART1 |COMP2   |
- * PA3 |TIM21_C2|        |TIM2_C4 |TSC     |USART2  |        |LPUART1 |        |
- * PA4 |SPI1    |        |        |TSC     |USART2  |TIM22_TR|        |        |
- * PA5 |SPI1    |        |TIM2_TR |TSC     |        |TIM2_C1 |        |        |
- * PA6 |SPI1    |        |TIM3_C1 |TSC     |LPUART1 |TIM22_C1|EVENTOUT|COMP1   |
- * PA7 |SPI1    |        |TIM3_C2 |TSC     |        |TIM22_C2|EVENTOUT|COMP2   |
- * PA8 |MCO     |        |USB     |EVENTOUT|USART1  |        |        |I2C3    |
- * PA9 |MCO     |        |        |TSC     |USART1  |        |I2C1    |I2C3    |
- * PA10|        |        |        |TSC     |USART1  |        |I2C1    |        |
- * PA11|SPI1    |        |EVENTOUT|TSC     |USART1  |        |I2C2    |COMP1   |
- * PA12|SPI1    |        |EVENTOUT|TSC     |USART1  |        |I2C2    |COMP2   |
- * PA13|SWDIO   |        |USB     |        |        |        |LPUART1 |        |
- * PA14|SWCLK   |        |        |        |USART2  |        |LPUART1 |        |
- * PA15|SPI1    |        |TIM2_TR |EVENTOUT|USART2  |TIM2_C1 |USART4  |        |
- *______________________________________________________________________________
- * PB0 |EVENTOUT|        |TIM3_C3 |TSC     |        |        |        |        |
- * PB1 |        |        |TIM3_C4 |TSC     |LPUART1 |        |        |        |
- * PB2 |        |        |LPTIM1_O|TSC     |        |        |        |I2C3    |
- * PB3 |SPI1    |        |TIM2_C2 |TSC     |EVENTOUT|USART1  |USART5  |        |
- * PB4 |SPI1    |        |TIM3_C1 |TSC     |TIM22_C1|USART1  |USART5  |I2C3    |
- * PB5 |SPI1    |        |LPTIM1_I|I2C1    |TIM3_C2 |USART1  |USART5  |        |
- *     |        |        |        |        |TIM22_C2|        |        |        |
- * PB6 |USART1  |I2C1    |LPTIM1_T|TSC     |        |        |        |        |
- * PB7 |USART1  |I2C1    |LPTIM1_I|TSC     |        |        |USART4  |        |
- * PB8 |        |        |        |TSC     |I2C1    |        |        |        |
- * PB9 |        |        |EVENTOUT|        |I2C1    |SPI2    |        |        |
- * PB10|        |        |TIM2_C3 |TSC     |LPUART1 |SPI2    |I2C2    |LPUART1 |
- * PB11|EVENTOUT|        |TIM2_C4 |TSC     |LPUART1 |        |I2C2    |LPUART1 |
- * PB12|SPI2    |        |LPUART1 |TSC     |        |I2C2    |EVENTOUT|        |
- * PB13|SPI2    |        |MCO     |TSC     |LPUART1 |I2C2    |TIM21_C1|        |
- * PB14|SPI2    |        |RTC     |TSC     |LPUART1 |I2C2    |TIM21_C2|        |
- * PB15|SPI2    |        |RTC     |        |        |        |        |        |
- *______________________________________________________________________________
- * PC0 |LPTIM1_I|        |EVENTOUT|TSC     |        |        |LPUART1 |I2C3    |
- * PC1 |LPTIM1_O|        |EVENTOUT|TSC     |        |        |LPUART1 |I2C3    |
- * PC2 |LPTIM1_I|        |SPI2    |TSC     |        |        |        |        |
- * PC3 |LPTIM1_T|        |SPI2    |TSC     |        |        |        |        |
- * PC4 |EVENTOUT|        |LPUART1 |        |        |        |        |        |
- * PC5 |        |        |LPUART1 |TSC     |        |        |        |        |
- * PC6 |TIM22_C1|        |TIM3_C1 |TSC     |        |        |        |        |
- * PC7 |TIM22_C2|        |TIM3_C2 |TSC     |        |        |        |        |
- * PC8 |TIM22_TR|        |TIM3_C3 |TSC     |        |        |        |        |
- * PC9 |TIM21_TR|        |USB     |TSC     |        |        |        |I2C3    |
- *     |        |        |TIM3_C4 |        |        |        |        |        |
- * PC10|LPUART1 |        |        |        |        |        |USART4  |        |
- * PC11|LPUART1 |        |        |        |        |        |USART4  |        |
- * PC12|        |        |USART5  |        |        |        |USART4  |        |
- * PC13|        |        |        |        |        |        |        |        |
- * PC14|        |        |        |        |        |        |        |        |
- * PC15|        |        |        |        |        |        |        |        |
- *______________________________________________________________________________
- * PD0 |TIM21_C1|SPI2    |        |        |        |        |        |        |
- * PD1 |        |SPI2    |        |        |        |        |        |        |
- * PD2 |LPUART1 |        |TIM3_TR |        |        |        |USART5  |        |
- * PD3 |USART2  |        |SPI2    |        |        |        |        |        |
- * PD4 |USART2  |SPI2    |        |        |        |        |        |        |
- * PD5 |USART2  |        |        |        |        |        |        |        |
- * PD6 |USART2  |        |        |        |        |        |        |        |
- * PD7 |USART2  |TIM21_C2|        |        |        |        |        |        |
- * PD8 |LPUART1 |        |        |        |        |        |        |        |
- * PD9 |LPUART1 |        |        |        |        |        |        |        |
- * PD10|        |        |        |        |        |        |        |        |
- * PD11|LPUART1 |        |        |        |        |        |        |        |
- * PD12|LPUART1 |        |        |        |        |        |        |        |
- * PD13|        |        |        |        |        |        |        |        |
- * PD14|        |        |        |        |        |        |        |        |
- * PD15|USB     |        |        |        |        |        |        |        |
- *______________________________________________________________________________
- * PE0 |        |        |EVENTOUT|        |        |        |        |        |
- * PE1 |        |        |EVENTOUT|        |        |        |        |        |
- * PE2 |        |        |TIM3_TR |        |        |        |        |        |
- * PE3 |TIM22_C1|        |TIM3_C1 |        |        |        |        |        |
- * PE4 |TIM22_C2|        |TIM3_C2 |        |        |        |        |        |
- * PE5 |TIM21_C1|        |TIM3_C3 |        |        |        |        |        |
- * PE6 |TIM21_C2|        |TIM3_C4 |        |        |        |        |        |
- * PE7 |        |        |        |        |        |        |USART5  |        |
- * PE8 |        |        |        |        |        |        |USART4  |        |
- * PE9 |TIM2_C1 |        |TIM2_TR |        |        |        |USART4  |        |
- * PE10|TIM2_C2 |        |        |        |        |        |USART5  |        |
- * PE11|TIM2_C3 |        |        |        |        |        |USART5  |        |
- * PE12|TIM2_C4 |        |SPI1    |        |        |        |        |        |
- * PE13|        |        |SPI1    |        |        |        |        |        |
- * PE14|        |        |SPI1    |        |        |        |        |        |
- * PE15|        |        |SPI1    |        |        |        |        |        |
- *______________________________________________________________________________
- * PH0 |USB     |        |        |        |        |        |        |        |
- * PH1 |        |        |        |        |        |        |        |        |
- * PH9 |        |        |        |        |        |        |        |        |
- * PH10|        |        |        |        |        |        |        |        |
- *
- */
-
-/** @defgroup GPIOEx_Alternate_function_selection Alternate function selection
- * @{
- */
-
-/*
- * Alternate function AF0
- */
-#define GPIO_AF0_EVENTOUT      ((uint8_t)0x00U)  /* EVENTOUT Alternate Function mapping */
-#define GPIO_AF0_TIM21         ((uint8_t)0x00U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF0_SPI1          ((uint8_t)0x00U)  /* SPI1 Alternate Function mapping     */
-#define GPIO_AF0_MCO           ((uint8_t)0x00U)  /* MCO Alternate Function mapping      */
-#define GPIO_AF0_SWDIO         ((uint8_t)0x00U)  /* SWDIO Alternate Function mapping    */
-#define GPIO_AF0_SWCLK         ((uint8_t)0x00U)  /* SWCLK Alternate Function mapping    */
-#define GPIO_AF0_USART1        ((uint8_t)0x00U)  /* USART1 Alternate Function mapping   */
-#define GPIO_AF0_SPI2          ((uint8_t)0x00U)  /* SPI2 Alternate Function mapping     */
-#define GPIO_AF0_LPTIM1        ((uint8_t)0x00U)  /* LPTIM1 Alternate Function mapping   */
-#define GPIO_AF0_TIM22         ((uint8_t)0x00U)  /* TIM22 Alternate Function mapping    */
-#define GPIO_AF0_LPUART1       ((uint8_t)0x00U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF0_USART2        ((uint8_t)0x00U)  /* USART2 Alternate Function mapping   */
-#define GPIO_AF0_TIM2          ((uint8_t)0x00U)  /* TIM2 Alternate Function mapping     */
-#define GPIO_AF0_USB           ((uint8_t)0x00U)  /* USB Alternate Function mapping      */
-/**
-  *
-  */
-
-/*
- * Alternate function AF1
- */
-#define GPIO_AF1_I2C1          ((uint8_t)0x01U)  /* I2C1 Alternate Function mapping  */
-#define GPIO_AF1_SPI2          ((uint8_t)0x01U)  /* SPI2 Alternate Function mapping  */
-#define GPIO_AF1_TIM21         ((uint8_t)0x01U)  /* TIM21 Alternate Function mapping */
-/**
-  *
-  */
-
-/*
- * Alternate function AF2
- */
-#define GPIO_AF2_TIM2          ((uint8_t)0x02U)  /* TIM2 Alternate Function mapping       */
-#define GPIO_AF2_TIM3          ((uint8_t)0x02U)  /* TIM3 Alternate Function mapping       */
-#define GPIO_AF2_EVENTOUT      ((uint8_t)0x02U)  /* EVENTOUT Alternate Function mapping   */
-#define GPIO_AF2_LPTIM1        ((uint8_t)0x02U)  /* LPTIM1 Alternate Function mapping     */
-#define GPIO_AF2_LPUART1       ((uint8_t)0x02U)  /* LPUART1 Alternate Function mapping    */
-#define GPIO_AF2_MCO           ((uint8_t)0x02U)  /* MCO Alternate Function mapping        */
-#define GPIO_AF2_RTC           ((uint8_t)0x02U)  /* RTC Alternate Function mapping        */
-#define GPIO_AF2_SPI2          ((uint8_t)0x02U)  /* SPI2 Alternate Function mapping       */
-#define GPIO_AF2_USART5        ((uint8_t)0x02U)  /* USART5 Alternate Function mapping     */
-#define GPIO_AF2_SPI1          ((uint8_t)0x02U)  /* SPI1 Alternate Function mapping       */
-#define GPIO_AF2_USB           ((uint8_t)0x00U)  /* USB Alternate Function mapping        */
-/**
-  *
-  */
-
-/*
- * Alternate function AF3
- */
-#define GPIO_AF3_EVENTOUT      ((uint8_t)0x03U)  /* EVENTOUT Alternate Function mapping   */
-#define GPIO_AF3_I2C1          ((uint8_t)0x03U)  /* I2C1 Alternate Function mapping       */
-#define GPIO_AF3_TSC           ((uint8_t)0x03U)  /* TSC  Alternate Function mapping       */
-/**
-  *
-  */
-
-/*
- * Alternate function AF4
- */
-#define GPIO_AF4_USART2          ((uint8_t)0x04U)  /* USART2 Alternate Function mapping   */
-#define GPIO_AF4_LPUART1         ((uint8_t)0x04U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF4_USART1          ((uint8_t)0x04U)  /* USART1 Alternate Function mapping   */
-#define GPIO_AF4_EVENTOUT        ((uint8_t)0x04U)  /* EVENTOUT Alternate Function mapping */
-#define GPIO_AF4_TIM22           ((uint8_t)0x04U)  /* TIM22 Alternate Function mapping    */
-#define GPIO_AF4_TIM3            ((uint8_t)0x04U)  /* TIM3 Alternate Function mapping     */
-#define GPIO_AF4_I2C1            ((uint8_t)0x04U)  /* I2C1 Alternate Function mapping     */
-/**
-  *
-  */
-
-/*
- * Alternate function AF5
- */
-#define GPIO_AF5_TIM2          ((uint8_t)0x05U)  /* TIM2 Alternate Function mapping     */
-#define GPIO_AF5_TIM21         ((uint8_t)0x05U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF5_TIM22         ((uint8_t)0x05U)  /* TIM22 Alternate Function mapping    */
-#define GPIO_AF5_USART1        ((uint8_t)0x05U)  /* USART1 Alternate Function mapping   */
-#define GPIO_AF5_SPI2          ((uint8_t)0x05U)  /* SPI2 Alternate Function mapping      */
-#define GPIO_AF5_I2C2          ((uint8_t)0x05U)  /* I2C2 Alternate Function mapping      */
-/**
-  *
-  */
-
-/*
-  * Alternate function AF6
- */
-#define GPIO_AF6_USART4        ((uint8_t)0x06U)  /* USART4 Alternate Function mapping    */
-#define GPIO_AF6_LPUART1       ((uint8_t)0x06U)  /* LPUART1 Alternate Function mapping   */
-#define GPIO_AF6_EVENTOUT      ((uint8_t)0x06U)  /* EVENTOUT Alternate Function mapping  */
-#define GPIO_AF6_I2C1          ((uint8_t)0x06U)  /* I2C1 Alternate Function mapping      */
-#define GPIO_AF6_I2C2          ((uint8_t)0x06U)  /* I2C2 Alternate Function mapping      */
-#define GPIO_AF6_USART5        ((uint8_t)0x06U)  /* USART5 Alternate Function mapping    */
-#define GPIO_AF6_TIM21         ((uint8_t)0x06U)  /* TIM21 Alternate Function mapping     */
-/**
-  *
-  */
-
- /*
-  * Alternate function AF7
- */
-#define GPIO_AF7_COMP1        ((uint8_t)0x07U)  /* COMP1 Alternate Function mapping     */
-#define GPIO_AF7_COMP2        ((uint8_t)0x07U)  /* COMP2 Alternate Function mapping     */
-#define GPIO_AF7_I2C3         ((uint8_t)0x07U)  /* I2C3 Alternate Function mapping      */
-#define GPIO_AF7_LPUART1      ((uint8_t)0x07U)  /* LPUART1 Alternate Function mapping   */
-/**
-  *
-  */
-
- /**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup GPIOEx_Private  GPIOEx Private
- * @{
- */
-/**
- * @brief IS_GPIO_AF macro definition
- */
-#define IS_GPIO_AF(__AF__) (((__AF__) == GPIO_AF0_EVENTOUT)  || ((__AF__) == GPIO_AF6_TIM21)    || \
-                            ((__AF__) == GPIO_AF0_SPI1)      || ((__AF__) == GPIO_AF1_I2C1)     || \
-                            ((__AF__) == GPIO_AF0_TIM21)     || ((__AF__) == GPIO_AF1_SPI2)     || \
-                            ((__AF__) == GPIO_AF0_MCO)       || ((__AF__) == GPIO_AF1_TIM21)    || \
-                            ((__AF__) == GPIO_AF0_SWDIO)     || ((__AF__) == GPIO_AF2_TIM2)     || \
-                            ((__AF__) == GPIO_AF0_SWCLK)     || ((__AF__) == GPIO_AF2_TIM3)     || \
-                            ((__AF__) == GPIO_AF0_USART1)    || ((__AF__) == GPIO_AF2_USB)      || \
-                            ((__AF__) == GPIO_AF0_SPI2)      || ((__AF__) == GPIO_AF2_EVENTOUT) || \
-                            ((__AF__) == GPIO_AF0_LPTIM1)    || ((__AF__) == GPIO_AF2_LPTIM1)   || \
-                            ((__AF__) == GPIO_AF0_TIM2)      || ((__AF__) == GPIO_AF2_LPUART1)  || \
-                            ((__AF__) == GPIO_AF0_LPUART1)   || ((__AF__) == GPIO_AF2_MCO)      || \
-                            ((__AF__) == GPIO_AF0_USART2)    || ((__AF__) == GPIO_AF2_RTC)      || \
-                            ((__AF__) == GPIO_AF0_USB)       || ((__AF__) == GPIO_AF2_SPI2)     || \
-                            ((__AF__) == GPIO_AF0_TIM2)      || ((__AF__) == GPIO_AF2_USART5)   || \
-                            ((__AF__) == GPIO_AF3_TSC)       || ((__AF__) == GPIO_AF2_SPI1)     || \
-                            ((__AF__) == GPIO_AF3_EVENTOUT)  || ((__AF__) == GPIO_AF4_USART2)   || \
-                            ((__AF__) == GPIO_AF3_I2C1)      || ((__AF__) == GPIO_AF4_LPUART1)  || \
-                            ((__AF__) == GPIO_AF5_TIM21)     || ((__AF__) == GPIO_AF4_EVENTOUT) || \
-                            ((__AF__) == GPIO_AF5_TIM2)      || ((__AF__) == GPIO_AF4_USART1)   || \
-                            ((__AF__) == GPIO_AF5_USART1)    || ((__AF__) == GPIO_AF4_TIM22)    || \
-                            ((__AF__) == GPIO_AF5_TIM22)     || ((__AF__) == GPIO_AF4_TIM3)     || \
-                            ((__AF__) == GPIO_AF5_SPI2)      || ((__AF__) == GPIO_AF4_I2C1)     || \
-                            ((__AF__) == GPIO_AF5_I2C2)      || ((__AF__) == GPIO_AF6_USART4)   || \
-                            ((__AF__) == GPIO_AF7_COMP2)     || ((__AF__) == GPIO_AF6_LPUART1)  || \
-                            ((__AF__) == GPIO_AF7_COMP1)     || ((__AF__) == GPIO_AF6_I2C1)     || \
-                            ((__AF__) == GPIO_AF7_I2C3)      || ((__AF__) == GPIO_AF6_EVENTOUT) || \
-                            ((__AF__) == GPIO_AF7_LPUART1)   || ((__AF__) == GPIO_AF6_I2C2)     || \
-                            ((__AF__) == GPIO_AF6_USART5))
-
-#define IS_GPIO_AF_AVAILABLE(__INSTANCE__,__AF__)  \
-        ((((__INSTANCE__) == GPIOA) && (((__AF__) ==  GPIO_AF0_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM2)      ||   \
-                                        ((__AF__) ==  GPIO_AF3_TSC)       ||   \
-                                        ((__AF__) ==  GPIO_AF4_USART2)    ||   \
-                                        ((__AF__) ==  GPIO_AF5_TIM22)     ||   \
-                                        ((__AF__) ==  GPIO_AF6_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF7_COMP1)))   ||   \
-         (((__INSTANCE__) == GPIOB) && (((__AF__) ==  GPIO_AF0_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF1_I2C1)      ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM2)      ||   \
-                                        ((__AF__) ==  GPIO_AF3_TSC)       ||   \
-                                        ((__AF__) ==  GPIO_AF4_TIM22)     ||   \
-                                        ((__AF__) ==  GPIO_AF5_I2C2)      ||   \
-                                        ((__AF__) ==  GPIO_AF6_USART4)    ||   \
-                                        ((__AF__) ==  GPIO_AF7_LPUART1))) ||   \
-         (((__INSTANCE__) == GPIOC) && (((__AF__) ==  GPIO_AF0_TIM22)     ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM3)      ||   \
-                                        ((__AF__) ==  GPIO_AF3_TSC)       ||   \
-                                        ((__AF__) ==  GPIO_AF6_USART4)    ||   \
-                                        ((__AF__) ==  GPIO_AF7_I2C3)))    ||   \
-         (((__INSTANCE__) == GPIOD) && (((__AF__) ==  GPIO_AF0_TIM21)     ||   \
-                                        ((__AF__) ==  GPIO_AF1_TIM21)     ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM3)      ||   \
-                                        ((__AF__) ==  GPIO_AF6_USART5)))  ||   \
-         (((__INSTANCE__) == GPIOE) && (((__AF__) ==  GPIO_AF0_TIM22)     ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM3)      ||   \
-                                        ((__AF__) ==  GPIO_AF6_USART4)))  ||   \
-         (((__INSTANCE__) == GPIOH) && (((__AF__) ==  GPIO_AF0_USB))))
-
- /**
-  * @}
-  */
-#endif /* (STM32L082xx) || (STM32L072xx) */
-
-
-/*----------------------------------------------------------------------------*/
-/*------------------------- STM32L081xx and STM32L071xx-----------------------*/
-/*----------------------------------------------------------------------------*/
-#if defined (STM32L081xx) || defined (STM32L071xx)
-
-/* The table below gives an overview of the different alternate functions per port.
- * For more details refer yourself to the product data sheet.
- *
- */
-
-
-/*     |   AF0  |   AF1  |   AF2  |   AF3  |   AF4  |   AF5  |   AF6  |   AF7  |
- *______________________________________________________________________________
- * PA0 |        |        |TIM2_C1 |        |USART2  |TIM2_TR |USART4  |COMP1   |
- * PA1 |EVENTOUT|        |TIM2_C2 |        |USART2  |TIM21_TR|USART4  |        |
- * PA2 |TIM21_C1|        |TIM2_C3 |        |USART2  |        |LPUART1 |COMP2   |
- * PA3 |TIM21_C2|        |TIM2_C4 |        |USART2  |        |LPUART1 |        |
- * PA4 |SPI1    |        |        |        |USART2  |TIM22_TR|        |        |
- * PA5 |SPI1    |        |TIM2_TR |        |        |TIM2_C1 |        |        |
- * PA6 |SPI1    |        |TIM3_C1 |        |LPUART1 |TIM22_C1|EVENTOUT|COMP1   |
- * PA7 |SPI1    |        |TIM3_C2 |        |        |TIM22_C2|EVENTOUT|COMP2   |
- * PA8 |MCO     |        |        |EVENTOUT|USART1  |        |        |I2C3    |
- * PA9 |MCO     |        |        |        |USART1  |        |I2C1    |I2C3    |
- * PA10|        |        |        |        |USART1  |        |I2C1    |        |
- * PA11|SPI1    |        |EVENTOUT|        |USART1  |        |I2C2    |COMP1   |
- * PA12|SPI1    |        |EVENTOUT|        |USART1  |        |I2C2    |COMP2   |
- * PA13|SWDIO   |        |        |        |        |        |LPUART1 |        |
- * PA14|SWCLK   |        |        |        |USART2  |        |LPUART1 |        |
- * PA15|SPI1    |        |TIM2_TR |EVENTOUT|USART2  |TIM2_C1 |USART4  |        |
- *______________________________________________________________________________
- * PB0 |EVENTOUT|        |TIM3_C3 |        |        |        |        |        |
- * PB1 |        |        |TIM3_C4 |        |LPUART1 |        |        |        |
- * PB2 |        |        |LPTIM1_O|        |        |        |        |I2C3    |
- * PB3 |SPI1    |        |TIM2_C2 |        |EVENTOUT|USART1  |USART5  |        |
- * PB4 |SPI1    |        |TIM3_C1 |        |TIM22_C1|USART1  |USART5  |I2C3    |
- * PB5 |SPI1    |        |LPTIM1_I|I2C1    |TIM3_C2 |USART1  |USART5  |        |
- *     |        |        |        |        |TIM22_C2|        |        |        |
- * PB6 |USART1  |I2C1    |LPTIM1_T|        |        |        |        |        |
- * PB7 |USART1  |I2C1    |LPTIM1_I|        |        |        |USART4  |        |
- * PB8 |        |        |        |        |I2C1    |        |        |        |
- * PB9 |        |        |EVENTOUT|        |I2C1    |SPI2    |        |        |
- * PB10|        |        |TIM2_C3 |        |LPUART1 |SPI2    |I2C2    |LPUART1 |
- * PB11|EVENTOUT|        |TIM2_C4 |        |LPUART1 |        |I2C2    |LPUART1 |
- * PB12|SPI2    |        |LPUART1 |        |        |I2C2    |EVENTOUT|        |
- * PB13|SPI2    |        |MCO     |        |LPUART1 |I2C2    |TIM21_C1|        |
- * PB14|SPI2    |        |RTC     |        |LPUART1 |I2C2    |TIM21_C2|        |
- * PB15|SPI2    |        |RTC     |        |        |        |        |        |
- *______________________________________________________________________________
- * PC0 |LPTIM1_I|        |EVENTOUT|        |        |        |LPUART1 |I2C3    |
- * PC1 |LPTIM1_O|        |EVENTOUT|        |        |        |LPUART1 |I2C3    |
- * PC2 |LPTIM1_I|        |SPI2    |        |        |        |        |        |
- * PC3 |LPTIM1_T|        |SPI2    |        |        |        |        |        |
- * PC4 |EVENTOUT|        |LPUART1 |        |        |        |        |        |
- * PC5 |        |        |LPUART1 |        |        |        |        |        |
- * PC6 |TIM22_C1|        |TIM3_C1 |        |        |        |        |        |
- * PC7 |TIM22_C2|        |TIM3_C2 |        |        |        |        |        |
- * PC8 |TIM22_TR|        |TIM3_C3 |        |        |        |        |        |
- * PC9 |TIM21_TR|        |        |        |        |        |        |I2C3    |
- *     |        |        |TIM3_C4 |        |        |        |        |        |
- * PC10|LPUART1 |        |        |        |        |        |USART4  |        |
- * PC11|LPUART1 |        |        |        |        |        |USART4  |        |
- * PC12|        |        |USART5  |        |        |        |USART4  |        |
- * PC13|        |        |        |        |        |        |        |        |
- * PC14|        |        |        |        |        |        |        |        |
- * PC15|        |        |        |        |        |        |        |        |
- *______________________________________________________________________________
- * PD0 |TIM21_C1|SPI2    |        |        |        |        |        |        |
- * PD1 |        |SPI2    |        |        |        |        |        |        |
- * PD2 |LPUART1 |        |TIM3_TR |        |        |        |USART5  |        |
- * PD3 |USART2  |        |SPI2    |        |        |        |        |        |
- * PD4 |USART2  |SPI2    |        |        |        |        |        |        |
- * PD5 |USART2  |        |        |        |        |        |        |        |
- * PD6 |USART2  |        |        |        |        |        |        |        |
- * PD7 |USART2  |TIM21_C2|        |        |        |        |        |        |
- * PD8 |LPUART1 |        |        |        |        |        |        |        |
- * PD9 |LPUART1 |        |        |        |        |        |        |        |
- * PD10|        |        |        |        |        |        |        |        |
- * PD11|LPUART1 |        |        |        |        |        |        |        |
- * PD12|LPUART1 |        |        |        |        |        |        |        |
- * PD13|        |        |        |        |        |        |        |        |
- * PD14|        |        |        |        |        |        |        |        |
- * PD15|        |        |        |        |        |        |        |        |
- *______________________________________________________________________________
- * PE0 |        |        |EVENTOUT|        |        |        |        |        |
- * PE1 |        |        |EVENTOUT|        |        |        |        |        |
- * PE2 |        |        |TIM3_TR |        |        |        |        |        |
- * PE3 |TIM22_C1|        |TIM3_C1 |        |        |        |        |        |
- * PE4 |TIM22_C2|        |TIM3_C2 |        |        |        |        |        |
- * PE5 |TIM21_C1|        |TIM3_C3 |        |        |        |        |        |
- * PE6 |TIM21_C2|        |TIM3_C4 |        |        |        |        |        |
- * PE7 |        |        |        |        |        |        |USART5  |        |
- * PE8 |        |        |        |        |        |        |USART4  |        |
- * PE9 |TIM2_C1 |        |TIM2_TR |        |        |        |USART4  |        |
- * PE10|TIM2_C2 |        |        |        |        |        |USART5  |        |
- * PE11|TIM2_C3 |        |        |        |        |        |USART5  |        |
- * PE12|TIM2_C4 |        |SPI1    |        |        |        |        |        |
- * PE13|        |        |SPI1    |        |        |        |        |        |
- * PE14|        |        |SPI1    |        |        |        |        |        |
- * PE15|        |        |SPI1    |        |        |        |        |        |
- *______________________________________________________________________________
- * PH0 |        |        |        |        |        |        |        |        |
- * PH1 |        |        |        |        |        |        |        |        |
- * PH9 |        |        |        |        |        |        |        |        |
- * PH10|        |        |        |        |        |        |        |        |
- *
- */
-
-/** @defgroup GPIOEx_Alternate_function_selection Alternate function selection
- * @{
- */
-
-/*
- * Alternate function AF0
- *
- */
-#define GPIO_AF0_EVENTOUT      ((uint8_t)0x00U)  /* EVENTOUT Alternate Function mapping */
-#define GPIO_AF0_TIM21         ((uint8_t)0x00U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF0_SPI1          ((uint8_t)0x00U)  /* SPI1 Alternate Function mapping     */
-#define GPIO_AF0_MCO           ((uint8_t)0x00U)  /* MCO Alternate Function mapping      */
-#define GPIO_AF0_SWDIO         ((uint8_t)0x00U)  /* SWDIO Alternate Function mapping    */
-#define GPIO_AF0_SWCLK         ((uint8_t)0x00U)  /* SWCLK Alternate Function mapping    */
-#define GPIO_AF0_USART1        ((uint8_t)0x00U)  /* USART1 Alternate Function mapping   */
-#define GPIO_AF0_SPI2          ((uint8_t)0x00U)  /* SPI2 Alternate Function mapping     */
-#define GPIO_AF0_LPTIM1        ((uint8_t)0x00U)  /* LPTIM1 Alternate Function mapping   */
-#define GPIO_AF0_TIM22         ((uint8_t)0x00U)  /* TIM22 Alternate Function mapping    */
-#define GPIO_AF0_LPUART1       ((uint8_t)0x00U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF0_USART2        ((uint8_t)0x00U)  /* USART2 Alternate Function mapping   */
-#define GPIO_AF0_TIM2          ((uint8_t)0x00U)  /* TIM2 Alternate Function mapping     */
-/**
-  *
-  */
-
-/*
- * Alternate function AF1
- *
- */
-#define GPIO_AF1_I2C1          ((uint8_t)0x01U)  /* I2C1 Alternate Function mapping  */
-#define GPIO_AF1_SPI2          ((uint8_t)0x01U)  /* SPI2 Alternate Function mapping  */
-#define GPIO_AF1_TIM21         ((uint8_t)0x01U)  /* TIM21 Alternate Function mapping */
-/**
-  *
-  */
-
-/*
- * Alternate function AF2
- *
- */
-#define GPIO_AF2_TIM2          ((uint8_t)0x02U)  /* TIM2 Alternate Function mapping     */
-#define GPIO_AF2_TIM3          ((uint8_t)0x02U)  /* TIM3 Alternate Function mapping     */
-#define GPIO_AF2_EVENTOUT      ((uint8_t)0x02U)  /* EVENTOUT Alternate Function mapping */
-#define GPIO_AF2_LPTIM1        ((uint8_t)0x02U)  /* LPTIM1 Alternate Function mapping   */
-#define GPIO_AF2_LPUART1       ((uint8_t)0x02U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF2_MCO           ((uint8_t)0x02U)  /* MCO Alternate Function mapping      */
-#define GPIO_AF2_RTC           ((uint8_t)0x02U)  /* RTC Alternate Function mapping      */
-#define GPIO_AF2_SPI2          ((uint8_t)0x02U)  /* SPI2 Alternate Function mapping     */
-#define GPIO_AF2_USART5        ((uint8_t)0x02U)  /* USART5 Alternate Function mapping   */
-#define GPIO_AF2_SPI1          ((uint8_t)0x02U)  /* SPI1 Alternate Function mapping     */
-/**
-  *
-  */
-
-/*
- * Alternate function AF3
- * @{
- */
-#define GPIO_AF3_EVENTOUT      ((uint8_t)0x03U)  /* EVENTOUT Alternate Function mapping */
-#define GPIO_AF3_I2C1          ((uint8_t)0x03U)  /* I2C1 Alternate Function mapping     */
-/**
-  *
-  */
-
-/*
- * Alternate function AF4
- *
- */
-#define GPIO_AF4_USART2          ((uint8_t)0x04U)  /* USART2 Alternate Function mapping   */
-#define GPIO_AF4_LPUART1         ((uint8_t)0x04U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF4_USART1          ((uint8_t)0x04U)  /* USART1 Alternate Function mapping   */
-#define GPIO_AF4_EVENTOUT        ((uint8_t)0x04U)  /* EVENTOUT Alternate Function mapping */
-#define GPIO_AF4_TIM22           ((uint8_t)0x04U)  /* TIM22 Alternate Function mapping    */
-#define GPIO_AF4_TIM3            ((uint8_t)0x04U)  /* TIM3 Alternate Function mapping    */
-#define GPIO_AF4_I2C1            ((uint8_t)0x04U)  /* I2C1 Alternate Function mapping    */
-/**
-  *
-  */
-
-/*
- * Alternate function AF5
- *
- */
-#define GPIO_AF5_TIM2          ((uint8_t)0x05U)  /* TIM2 Alternate Function mapping     */
-#define GPIO_AF5_TIM21         ((uint8_t)0x05U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF5_TIM22         ((uint8_t)0x05U)  /* TIM22 Alternate Function mapping    */
-#define GPIO_AF5_USART1        ((uint8_t)0x05U)  /* USART1 Alternate Function mapping   */
-#define GPIO_AF5_SPI2          ((uint8_t)0x05U)  /* SPI2 Alternate Function mapping       */
-#define GPIO_AF5_I2C2          ((uint8_t)0x05U)  /* I2C2 Alternate Function mapping       */
-/**
-  *
-  */
-
-/*
- * Alternate function AF6
- *
- */
-#define GPIO_AF6_USART4        ((uint8_t)0x06U)  /* USART4 Alternate Function mapping   */
-#define GPIO_AF6_LPUART1       ((uint8_t)0x06U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF6_EVENTOUT      ((uint8_t)0x06U)  /* EVENTOUT Alternate Function mapping  */
-#define GPIO_AF6_I2C1          ((uint8_t)0x06U)  /* I2C1 Alternate Function mapping  */
-#define GPIO_AF6_I2C2          ((uint8_t)0x06U)  /* I2C2 Alternate Function mapping  */
-#define GPIO_AF6_USART5        ((uint8_t)0x06U)  /* USART5 Alternate Function mapping   */
-#define GPIO_AF6_TIM21         ((uint8_t)0x06U)  /* TIM21 Alternate Function mapping    */
-/**
-  *
-  */
-
-/*
- * Alternate function AF7
- *
- */
-#define GPIO_AF7_COMP1        ((uint8_t)0x07U)  /* COMP1 Alternate Function mapping     */
-#define GPIO_AF7_COMP2        ((uint8_t)0x07U)  /* COMP2 Alternate Function mapping     */
-#define GPIO_AF7_I2C3         ((uint8_t)0x07U)  /* I2C3 Alternate Function mapping     */
-#define GPIO_AF7_LPUART1      ((uint8_t)0x07U)  /* LPUART1 Alternate Function mapping     */
-/**
-  *
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup GPIOEx_Private  GPIOEx Private
- * @{
- */
-
- /**
- * IS_GPIO_AF macro definition
- */
-#define IS_GPIO_AF(__AF__) (((__AF__) == GPIO_AF0_EVENTOUT) || ((__AF__) == GPIO_AF7_LPUART1)  || \
-                            ((__AF__) == GPIO_AF0_SPI1)     || ((__AF__) == GPIO_AF1_I2C1)     || \
-                            ((__AF__) == GPIO_AF0_TIM21)    || ((__AF__) == GPIO_AF1_SPI2)     || \
-                            ((__AF__) == GPIO_AF0_MCO)      || ((__AF__) == GPIO_AF1_TIM21)    || \
-                            ((__AF__) == GPIO_AF0_SWDIO)    || ((__AF__) == GPIO_AF2_TIM2)     || \
-                            ((__AF__) == GPIO_AF0_SWCLK)    || ((__AF__) == GPIO_AF2_TIM3)     || \
-                            ((__AF__) == GPIO_AF0_USART1)   || ((__AF__) == GPIO_AF6_TIM21)    || \
-                            ((__AF__) == GPIO_AF0_SPI2)     || ((__AF__) == GPIO_AF2_EVENTOUT) || \
-                            ((__AF__) == GPIO_AF0_LPTIM1)   || ((__AF__) == GPIO_AF2_LPTIM1)   || \
-                            ((__AF__) == GPIO_AF0_TIM2)     || ((__AF__) == GPIO_AF2_LPUART1)  || \
-                            ((__AF__) == GPIO_AF0_LPUART1)  || ((__AF__) == GPIO_AF2_MCO)      || \
-                            ((__AF__) == GPIO_AF0_USART2)   || ((__AF__) == GPIO_AF2_RTC)      || \
-                            ((__AF__) == GPIO_AF2_SPI2)     || ((__AF__) == GPIO_AF6_USART5)   || \
-                            ((__AF__) == GPIO_AF0_TIM2)     || ((__AF__) == GPIO_AF2_USART5)   || \
-                            ((__AF__) == GPIO_AF2_SPI1)     || ((__AF__) == GPIO_AF6_I2C2)     || \
-                            ((__AF__) == GPIO_AF3_EVENTOUT) || ((__AF__) == GPIO_AF4_USART2)   || \
-                            ((__AF__) == GPIO_AF3_I2C1)     || ((__AF__) == GPIO_AF4_LPUART1)  || \
-                            ((__AF__) == GPIO_AF5_TIM21)    || ((__AF__) == GPIO_AF4_EVENTOUT) || \
-                            ((__AF__) == GPIO_AF5_TIM2)     || ((__AF__) == GPIO_AF4_USART1)   || \
-                            ((__AF__) == GPIO_AF5_USART1)   || ((__AF__) == GPIO_AF4_TIM22)    || \
-                            ((__AF__) == GPIO_AF5_TIM22)    || ((__AF__) == GPIO_AF4_TIM3)     || \
-                            ((__AF__) == GPIO_AF5_SPI2)     || ((__AF__) == GPIO_AF4_I2C1)     || \
-                            ((__AF__) == GPIO_AF5_I2C2)     || ((__AF__) == GPIO_AF6_USART4)   || \
-                            ((__AF__) == GPIO_AF7_COMP2)    || ((__AF__) == GPIO_AF6_LPUART1)  || \
-                            ((__AF__) == GPIO_AF7_COMP1)    || ((__AF__) == GPIO_AF6_I2C1)     || \
-                            ((__AF__) == GPIO_AF7_I2C3)     || ((__AF__) == GPIO_AF6_EVENTOUT))
-
-
-#define IS_GPIO_AF_AVAILABLE(__INSTANCE__,__AF__)  \
-        ((((__INSTANCE__) == GPIOA) && (((__AF__) ==  GPIO_AF0_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM2)      ||   \
-                                        ((__AF__) ==  GPIO_AF3_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF4_USART2)    ||   \
-                                        ((__AF__) ==  GPIO_AF5_TIM22)     ||   \
-                                        ((__AF__) ==  GPIO_AF6_USART4)    ||   \
-                                        ((__AF__) ==  GPIO_AF7_COMP1)))   ||   \
-         (((__INSTANCE__) == GPIOB) && (((__AF__) ==  GPIO_AF0_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF1_I2C1)      ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM2)      ||   \
-                                        ((__AF__) ==  GPIO_AF3_I2C1)      ||   \
-                                        ((__AF__) ==  GPIO_AF4_I2C1)      ||   \
-                                        ((__AF__) ==  GPIO_AF5_I2C2)      ||   \
-                                        ((__AF__) ==  GPIO_AF6_USART4)    ||   \
-                                        ((__AF__) ==  GPIO_AF7_LPUART1))) ||   \
-         (((__INSTANCE__) == GPIOC) && (((__AF__) ==  GPIO_AF0_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM3)      ||   \
-                                        ((__AF__) ==  GPIO_AF6_LPUART1)   ||   \
-                                        ((__AF__) ==  GPIO_AF7_I2C3)))    ||   \
-         (((__INSTANCE__) == GPIOD) && (((__AF__) ==  GPIO_AF0_LPUART1)   ||   \
-                                        ((__AF__) ==  GPIO_AF1_SPI2)      ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM3)      ||   \
-                                        ((__AF__) ==  GPIO_AF6_USART5)))  ||   \
-         (((__INSTANCE__) == GPIOE) && (((__AF__) ==  GPIO_AF0_TIM22)     ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM3)      ||   \
-                                        ((__AF__) ==  GPIO_AF6_USART4))))
-
- /**
-  * @}
-  */
-#endif /* (STM32L081xx) || (STM32L071xx) */
-
-/*----------------------------------------------------------------------------*/
-/*------------------------- STM32L053xx/STM32L063xx---------------------------*/
-/*----------------------------------------------------------------------------*/
-#if defined (STM32L053xx) || defined (STM32L063xx)
-
-/* The table below gives an overview of the different alternate functions per port.
- * For more details refer yourself to the product data sheet.
- *
- */
-/*     |   AF0  |   AF1  |   AF2  |   AF3  |   AF4  |   AF5  |   AF6  |   AF7  |
- *______________________________________________________________________________
- * PA0 |        |        |TIM2_C1 |TSC     |USART2  |TIM2_TR |        |COMP1   |
- * PA1 |EVENTOUT|LCD     |TIM2_C2 |TSC     |USART2  |TIM21_TR|        |        |
- * PA2 |TIM21_C1|LCD     |TIM2_C3 |TSC     |USART2  |        |        |COMP2   |
- * PA3 |TIM21_C2|LCD     |TIM2_C4 |TSC     |USART2  |        |        |        |
- * PA4 |SPI1    |        |        |TSC     |USART2  |TIM22_TR|        |        |
- * PA5 |SPI1    |        |TIM2_TR |TSC     |        |TIM2_C1 |        |        |
- * PA6 |SPI1    |LCD     |        |TSC     |LPUART  |TIM22_C1|EVENTOUT|COMP1   |
- * PA7 |SPI1    |LCD     |        |TSC     |        |TIM22_C2|EVENTOUT|COMP2   |
- * PA8 |MCO     |LCD     |USB     |EVENTOUT|USART1  |        |        |        |
- * PA9 |MCO     |LCD     |        |TSC     |USART1  |        |        |        |
- * PA10|        |LCD     |        |TSC     |USART1  |        |        |        |
- * PA11|SPI1    |        |EVENTOUT|TSC     |USART1  |        |        |COMP1   |
- * PA12|SPI1    |        |EVENTOUT|TSC     |USART1  |        |        |COMP2   |
- * PA13|SWDIO   |        |USB     |        |        |        |        |        |
- * PA14|SWCLK   |        |        |        |USART2  |        |        |        |
- * PA15|SPI1    |LCD     |TIM2_TR |EVENTOUT|USART2  |TIM2_C1 |        |        |
- *______________________________________________________________________________
- * PB0 |EVENTOUT|LCD     |        |TSC     |        |        |        |        |
- * PB1 |        |LCD     |        |TSC     |LPUART1 |        |        |        |
- * PB2 |        |        |LPTIM1_O|TSC     |        |        |        |        |
- * PB3 |SPI1    |LCD     |TIM2_C2 |TSC     |EVENTOUT|        |        |        |
- * PB4 |SPI1    |LCD     |EVENTOUT|TSC     |TIM22_C1|        |        |        |
- * PB5 |SPI1    |LCD     |LPTIM1_I|I2C1    |TIM22_C2|        |        |        |
- * PB6 |USART1  |I2C1    |LPTIM1_T|TSC     |        |        |        |        |
- * PB7 |USART1  |I2C1    |LPTIM1_I|TSC     |        |        |        |        |
- * PB8 |        |LCD     |        |TSC     |I2C1    |        |        |        |
- * PB9 |        |LCD     |EVENTOUT|        |I2C1    |SPI2    |        |        |
- * PB10|        |LCD     |TIM2_C3 |TSC     |LPUART1 |SPI2    |I2C2    |        |
- * PB11|EVENTOUT|LCD     |TIM2_C4 |TSC     |LPUART1 |        |I2C2    |        |
- * PB12|SPI2    |LCD     |LPUART1 |TSC     |        |I2C2    |EVENTOUT|        |
- * PB13|SPI2    |LCD     |        |TSC     |LPUART1 |I2C2    |TIM21_C1|        |
- * PB14|SPI2    |LCD     |RTC     |TSC     |LPUART1 |I2C2    |TIM21_C2|        |
- * PB15|SPI2    |LCD     |RTC     |        |        |        |        |        |
- *______________________________________________________________________________
- * PC0 |LPTIM1_I|LCD     |EVENTOUT|TSC     |        |        |        |        |
- * PC1 |LPTIM1_O|LCD     |EVENTOUT|TSC     |        |        |        |        |
- * PC2 |LPTIM1_I|LCD     |SPI2    |TSC     |        |        |        |        |
- * PC3 |LPTIM1_T|LCD     |SPI2    |TSC     |        |        |        |        |
- * PC4 |EVENTOUT|LCD     |LPUART  |        |        |        |        |        |
- * PC5 |        |LCD     |LPUART  |TSC     |        |        |        |        |
- * PC6 |TIM22_C1|LCD     |        |TSC     |        |        |        |        |
- * PC7 |TIM22_C2|LCD     |        |TSC     |        |        |        |        |
- * PC8 |TIM22_TR|LCD     |        |TSC     |        |        |        |        |
- * PC9 |TIM21_TR|LCD     |USB     |TSC     |        |        |        |        |
- * PC10|LPUART  |LCD     |        |        |        |        |        |        |
- * PC11|LPUART  |LCD     |        |        |        |        |        |        |
- * PC12|        |LCD     |        |        |        |        |        |        |
- * PC13|        |        |        |        |        |        |        |        |
- * PC14|        |        |        |        |        |        |        |        |
- * PC15|        |        |        |        |        |        |        |        |
- *______________________________________________________________________________
- * PD2 |LPUART  |LCD     |        |        |        |        |        |        |
- *______________________________________________________________________________
- * PH0 |USB     |        |        |        |        |        |        |        |
- * PH1 |        |        |        |        |        |        |        |        |
- *  *
- */
-
-/** @defgroup GPIOEx_Alternate_function_selection Alternate function selection
- * @{
- */
-
-/*
- * Alternate function AF0
- */
-#define GPIO_AF0_SPI1          ((uint8_t)0x00U)  /* SPI1 Alternate Function mapping     */
-#define GPIO_AF0_SPI2          ((uint8_t)0x00U)  /* SPI2 Alternate Function mapping     */
-#define GPIO_AF0_USART1        ((uint8_t)0x00U)  /* USART1 Alternate Function mapping   */
-#define GPIO_AF0_USART2        ((uint8_t)0x00U)  /* USART2 Alternate Function mapping   */
-#define GPIO_AF0_LPUART1       ((uint8_t)0x00U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF0_USB           ((uint8_t)0x00U)  /* USB Alternate Function mapping      */
-#define GPIO_AF0_LPTIM1        ((uint8_t)0x00U)  /* LPTIM1 Alternate Function mapping   */
-#define GPIO_AF0_TSC           ((uint8_t)0x00U)  /* TSC Alternate Function mapping      */
-#define GPIO_AF0_TIM2          ((uint8_t)0x00U)  /* TIM2 Alternate Function mapping     */
-#define GPIO_AF0_TIM21         ((uint8_t)0x00U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF0_TIM22         ((uint8_t)0x00U)  /* TIM22 Alternate Function mapping    */
-#define GPIO_AF0_EVENTOUT      ((uint8_t)0x00U)  /* EVENTOUT Alternate Function mapping */
-#define GPIO_AF0_MCO           ((uint8_t)0x00U)  /* MCO Alternate Function mapping      */
-#define GPIO_AF0_SWDIO         ((uint8_t)0x00U)  /* SWDIO Alternate Function mapping    */
-#define GPIO_AF0_SWCLK         ((uint8_t)0x00U)  /* SWCLK Alternate Function mapping    */
-/**
-  *
-  */
-
- /*
-  * Alternate function AF1
- */
-#define GPIO_AF1_SPI1          ((uint8_t)0x01U)  /* SPI1 Alternate Function mapping  */
-#define GPIO_AF1_SPI2          ((uint8_t)0x01U)  /* SPI2 Alternate Function mapping  */
-#define GPIO_AF1_I2C1          ((uint8_t)0x01U)  /* I2C1 Alternate Function mapping  */
-#define GPIO_AF1_LCD           ((uint8_t)0x01U)  /* LCD Alternate Function mapping   */
-/**
-  *
-  */
-
-/*
- * Alternate function AF2
- */
-#define GPIO_AF2_SPI2          ((uint8_t)0x02U)  /* SPI2 Alternate Function mapping       */
-#define GPIO_AF2_LPUART1       ((uint8_t)0x02U)  /* LPUART1 Alternate Function mapping    */
-#define GPIO_AF2_USB           ((uint8_t)0x02U)  /* USB Alternate Function mapping        */
-#define GPIO_AF2_LPTIM1        ((uint8_t)0x02U)  /* LPTIM1 Alternate Function mapping     */
-#define GPIO_AF2_TIM2          ((uint8_t)0x02U)  /* TIM2 Alternate Function mapping       */
-#define GPIO_AF2_EVENTOUT      ((uint8_t)0x02U)  /* EVENTOUT Alternate Function mapping   */
-#define GPIO_AF2_RTC           ((uint8_t)0x02U)  /* RTC Alternate Function mapping        */
-/**
-  *
-  */
-
-/*
- * Alternate function AF3
- */
-#define GPIO_AF3_I2C1          ((uint8_t)0x03U)  /* I2C1 Alternate Function mapping     */
-#define GPIO_AF3_TSC           ((uint8_t)0x03U)  /* TSC  Alternate Function mapping     */
-#define GPIO_AF3_EVENTOUT      ((uint8_t)0x03U)  /* EVENTOUT Alternate Function mapping */
-/**
-  *
-  */
-
-/*
- * Alternate function AF4
- */
-#define GPIO_AF4_I2C1            ((uint8_t)0x04U)  /* I2C1 Alternate Function mapping     */
-#define GPIO_AF4_USART1          ((uint8_t)0x04U)  /* USART1 Alternate Function mapping   */
-#define GPIO_AF4_USART2          ((uint8_t)0x04U)  /* USART2 Alternate Function mapping   */
-#define GPIO_AF4_LPUART1         ((uint8_t)0x04U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF4_TIM22           ((uint8_t)0x04U)  /* TIM22 Alternate Function mapping    */
-#define GPIO_AF4_EVENTOUT        ((uint8_t)0x04U)  /* EVENTOUT Alternate Function mapping */
-/**
-  *
-  */
-
- /*
- * Alternate function AF5
- */
-#define GPIO_AF5_SPI2          ((uint8_t)0x05U)  /* SPI2 Alternate Function mapping     */
-#define GPIO_AF5_I2C2          ((uint8_t)0x05U)  /* I2C2 Alternate Function mapping     */
-#define GPIO_AF5_TIM2          ((uint8_t)0x05U)  /* TIM2 Alternate Function mapping     */
-#define GPIO_AF5_TIM21         ((uint8_t)0x05U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF5_TIM22         ((uint8_t)0x05U)  /* TIM22 Alternate Function mapping    */
-/**
-  *
-  */
-
-/*
- * Alternate function AF6
- */
-#define GPIO_AF6_I2C2          ((uint8_t)0x06U)  /* I2C2 Alternate Function mapping      */
-#define GPIO_AF6_TIM21         ((uint8_t)0x06U)  /* TIM21 Alternate Function mapping     */
-#define GPIO_AF6_EVENTOUT      ((uint8_t)0x06U)  /* EVENTOUT Alternate Function mapping  */
-/**
-  *
-  */
-
-/*
- * Alternate function AF7
- */
-#define GPIO_AF7_COMP1        ((uint8_t)0x07U)  /* COMP1 Alternate Function mapping     */
-#define GPIO_AF7_COMP2        ((uint8_t)0x07U)  /* COMP2 Alternate Function mapping     */
-/**
-  *
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup GPIOEx_Private  GPIOEx Private
- * @{
- */
-/**
- * @brief  IS_GPIO_AF macro definition
- */
-
-#define IS_GPIO_AF(__AF__) (((__AF__) == GPIO_AF0_SPI1)     || ((__AF__) == GPIO_AF2_SPI2)     || \
-                            ((__AF__) == GPIO_AF0_SPI2)     || ((__AF__) == GPIO_AF2_LPUART1)  || \
-                            ((__AF__) == GPIO_AF0_USART1)   || ((__AF__) == GPIO_AF2_USB)      || \
-                            ((__AF__) == GPIO_AF0_USART2)   || ((__AF__) == GPIO_AF2_LPTIM1)   || \
-                            ((__AF__) == GPIO_AF0_LPUART1)  || ((__AF__) == GPIO_AF2_TIM2)     || \
-                            ((__AF__) == GPIO_AF0_USB)      || ((__AF__) == GPIO_AF3_TSC)      || \
-                            ((__AF__) == GPIO_AF0_LPTIM1)   || ((__AF__) == GPIO_AF2_EVENTOUT) || \
-                            ((__AF__) == GPIO_AF0_TSC)      || ((__AF__) == GPIO_AF2_RTC) || \
-                            ((__AF__) == GPIO_AF3_I2C1)     || ((__AF__) == GPIO_AF7_COMP2)    || \
-                            ((__AF__) == GPIO_AF0_TIM22)    || ((__AF__) == GPIO_AF3_EVENTOUT) || \
-                            ((__AF__) == GPIO_AF0_EVENTOUT) || ((__AF__) == GPIO_AF4_I2C1)     || \
-                            ((__AF__) == GPIO_AF0_MCO)      || ((__AF__) == GPIO_AF4_USART1)   || \
-                            ((__AF__) == GPIO_AF0_SWDIO)    || ((__AF__) == GPIO_AF0_SWCLK)    || \
-                            ((__AF__) == GPIO_AF1_SPI1)     || ((__AF__) == GPIO_AF4_USART2)   || \
-                            ((__AF__) == GPIO_AF1_SPI2)     || ((__AF__) == GPIO_AF4_LPUART1)  || \
-                            ((__AF__) == GPIO_AF7_COMP2)    || ((__AF__) == GPIO_AF4_TIM22)    || \
-                            ((__AF__) == GPIO_AF1_I2C1)     || ((__AF__) == GPIO_AF4_EVENTOUT) || \
-                            ((__AF__) == GPIO_AF1_LCD)      || ((__AF__) == GPIO_AF5_SPI2)     || \
-                            ((__AF__) == GPIO_AF5_I2C2)     || ((__AF__) == GPIO_AF5_TIM2)     || \
-                            ((__AF__) == GPIO_AF5_TIM21)    || ((__AF__) == GPIO_AF5_TIM22)    || \
-                            ((__AF__) == GPIO_AF6_I2C2)     || ((__AF__) == GPIO_AF6_TIM21)    || \
-                            ((__AF__) == GPIO_AF6_EVENTOUT) || ((__AF__) == GPIO_AF7_COMP1))
-
-
-
-#define IS_GPIO_AF_AVAILABLE(__INSTANCE__,__AF__)  \
-        ((((__INSTANCE__) == GPIOA) && (((__AF__) ==  GPIO_AF0_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF1_LCD)       ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM2)      ||   \
-                                        ((__AF__) ==  GPIO_AF3_TSC)       ||   \
-                                        ((__AF__) ==  GPIO_AF4_USART2)    ||   \
-                                        ((__AF__) ==  GPIO_AF5_TIM22)     ||   \
-                                        ((__AF__) ==  GPIO_AF6_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF7_COMP1)))   ||   \
-         (((__INSTANCE__) == GPIOB) && (((__AF__) ==  GPIO_AF0_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF1_LCD)       ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM2)      ||   \
-                                        ((__AF__) ==  GPIO_AF3_TSC)       ||   \
-                                        ((__AF__) ==  GPIO_AF4_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF5_I2C2)      ||   \
-                                        ((__AF__) ==  GPIO_AF6_TIM21)))   ||   \
-         (((__INSTANCE__) == GPIOC) && (((__AF__) ==  GPIO_AF0_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF1_LCD)       ||   \
-                                        ((__AF__) ==  GPIO_AF2_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF3_TSC)))     ||   \
-         (((__INSTANCE__) == GPIOD) && (((__AF__) ==  GPIO_AF0_LPUART1)   ||   \
-                                        ((__AF__) ==  GPIO_AF1_LCD)))     ||   \
-         (((__INSTANCE__) == GPIOH) && (((__AF__) ==  GPIO_AF0_USB))))
-
-/**
-  * @}
-  */
-
-#endif /* STM32L053xx || STM32L063xx */
-/*------------------------------------------------------------------------------------------*/
-
-/*----------------------------------------------------------------------------*/
-/*------------------------- STM32L052xx/STM32L062xx---------------------------*/
-/*----------------------------------------------------------------------------*/
-#if defined (STM32L052xx) || defined (STM32L062xx)
-
-/* The table below gives an overview of the different alternate functions per port.
- * For more details refer yourself to the product data sheet.
- *
- */
-/*     |   AF0  |   AF1  |   AF2  |   AF3  |   AF4  |   AF5  |   AF6  |   AF7  |
- *______________________________________________________________________________
- * PA0 |        |        |TIM2_C1 |TSC     |USART2  |TIM2_TR |        |COMP1   |
- * PA1 |EVENTOUT|        |TIM2_C2 |TSC     |USART2  |TIM21_TR|        |        |
- * PA2 |TIM21_C1|        |TIM2_C3 |TSC     |USART2  |        |        |COMP2   |
- * PA3 |TIM21_C2|        |TIM2_C4 |TSC     |USART2  |        |        |        |
- * PA4 |SPI1    |        |        |TSC     |USART2  |TIM22_TR|        |        |
- * PA5 |SPI1    |        |TIM2_TR |TSC     |        |TIM2_C1 |        |        |
- * PA6 |SPI1    |        |        |TSC     |LPUART  |TIM22_C1|EVENTOUT|COMP1   |
- * PA7 |SPI1    |        |        |TSC     |        |TIM22_C2|EVENTOUT|COMP2   |
- * PA8 |MCO     |        |USB     |EVENTOUT|USART1  |        |        |        |
- * PA9 |MCO     |        |        |TSC     |USART1  |        |        |        |
- * PA10|        |        |        |TSC     |USART1  |        |        |        |
- * PA11|SPI1    |        |EVENTOUT|TSC     |USART1  |        |        |COMP1   |
- * PA12|SPI1    |        |EVENTOUT|TSC     |USART1  |        |        |COMP2   |
- * PA13|SWDIO   |        |USB     |        |        |        |        |        |
- * PA14|SWCLK   |        |        |        |USART2  |        |        |        |
- * PA15|SPI1    |        |TIM2_TR |EVENTOUT|USART2  |TIM2_C1 |        |        |
- *______________________________________________________________________________
- * PB0 |EVENTOUT|        |        |TSC     |        |        |        |        |
- * PB1 |        |        |        |TSC     |LPUART1 |        |        |        |
- * PB2 |        |        |LPTIM1_O|TSC     |        |        |        |        |
- * PB3 |SPI1    |        |TIM2_C2 |TSC     |EVENTOUT|        |        |        |
- * PB4 |SPI1    |        |EVENTOUT|TSC     |TIM22_C1|        |        |        |
- * PB5 |SPI1    |        |LPTIM1_I|I2C1    |TIM22_C2|        |        |        |
- * PB6 |USART1  |I2C1    |LPTIM1_T|TSC     |        |        |        |        |
- * PB7 |USART1  |I2C1    |LPTIM1_I|TSC     |        |        |        |        |
- * PB8 |        |        |        |TSC     |I2C1    |        |        |        |
- * PB9 |        |        |EVENTOUT|        |I2C1    |SPI2    |        |        |
- * PB10|        |        |TIM2_C3 |TSC     |LPUART1 |SPI2    |I2C2    |        |
- * PB11|EVENTOUT|        |TIM2_C4 |TSC     |LPUART1 |        |I2C2    |        |
- * PB12|SPI2    |        |LPUART1 |TSC     |        |I2C2    |EVENTOUT|        |
- * PB13|SPI2    |        |        |TSC     |LPUART1 |I2C2    |TIM21_C1|        |
- * PB14|SPI2    |        |RTC     |TSC     |LPUART1 |I2C2    |TIM21_C2|        |
- * PB15|SPI2    |        |RTC     |        |        |        |        |        |
- *______________________________________________________________________________
- * PC0 |LPTIM1_I|        |EVENTOUT|TSC     |        |        |        |        |
- * PC1 |LPTIM1_O|        |EVENTOUT|TSC     |        |        |        |        |
- * PC2 |LPTIM1_I|        |SPI2    |TSC     |        |        |        |        |
- * PC3 |LPTIM1_T|        |SPI2    |TSC     |        |        |        |        |
- * PC4 |EVENTOUT|        |LPUART  |        |        |        |        |        |
- * PC5 |        |        |LPUART  |TSC     |        |        |        |        |
- * PC6 |TIM22_C1|        |        |TSC     |        |        |        |        |
- * PC7 |TIM22_C2|        |        |TSC     |        |        |        |        |
- * PC8 |TIM22_TR|        |        |TSC     |        |        |        |        |
- * PC9 |TIM21_TR|        |USB     |TSC     |        |        |        |        |
- * PC10|LPUART  |        |        |        |        |        |        |        |
- * PC11|LPUART  |        |        |        |        |        |        |        |
- * PC12|        |        |        |        |        |        |        |        |
- * PC13|        |        |        |        |        |        |        |        |
- * PC14|        |        |        |        |        |        |        |        |
- * PC15|        |        |        |        |        |        |        |        |
- *______________________________________________________________________________
- * PD2 |LPUART  |        |        |        |        |        |        |        |
- *______________________________________________________________________________
- * PH0 |USB     |        |        |        |        |        |        |        |
- * PH1 |        |        |        |        |        |        |        |        |
- *  *
- */
-
-/** @defgroup GPIOEx_Alternate_function_selection Alternate function selection
- * @{
- */
-
-/*
- * Alternate function AF0
- */
-#define GPIO_AF0_SPI1          ((uint8_t)0x00U)  /* SPI1 Alternate Function mapping     */
-#define GPIO_AF0_SPI2          ((uint8_t)0x00U)  /* SPI2 Alternate Function mapping     */
-#define GPIO_AF0_USART1        ((uint8_t)0x00U)  /* USART1 Alternate Function mapping   */
-#define GPIO_AF0_USART2        ((uint8_t)0x00U)  /* USART2 Alternate Function mapping   */
-#define GPIO_AF0_LPUART1       ((uint8_t)0x00U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF0_USB           ((uint8_t)0x00U)  /* USB Alternate Function mapping      */
-#define GPIO_AF0_LPTIM1        ((uint8_t)0x00U)  /* LPTIM1 Alternate Function mapping   */
-#define GPIO_AF0_TSC           ((uint8_t)0x00U)  /* TSC Alternate Function mapping      */
-#define GPIO_AF0_TIM2          ((uint8_t)0x00U)  /* TIM2 Alternate Function mapping     */
-#define GPIO_AF0_TIM21         ((uint8_t)0x00U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF0_TIM22         ((uint8_t)0x00U)  /* TIM22 Alternate Function mapping    */
-#define GPIO_AF0_EVENTOUT      ((uint8_t)0x00U)  /* EVENTOUT Alternate Function mapping */
-#define GPIO_AF0_MCO           ((uint8_t)0x00U)  /* MCO Alternate Function mapping      */
-#define GPIO_AF0_SWDIO         ((uint8_t)0x00U)  /* SWDIO Alternate Function mapping    */
-#define GPIO_AF0_SWCLK         ((uint8_t)0x00U)  /* SWCLK Alternate Function mapping    */
-/**
-  *
-  */
-
-/*
- * Alternate function AF1
- */
-#define GPIO_AF1_SPI1          ((uint8_t)0x01U)  /* SPI1 Alternate Function mapping  */
-#define GPIO_AF1_SPI2          ((uint8_t)0x01U)  /* SPI2 Alternate Function mapping  */
-#define GPIO_AF1_I2C1          ((uint8_t)0x01U)  /* I2C1 Alternate Function mapping  */
-/**
-  *
-  */
-
-/**
- * Alternate function AF2
- */
-#define GPIO_AF2_SPI2          ((uint8_t)0x02U)  /* SPI2 Alternate Function mapping       */
-#define GPIO_AF2_LPUART1       ((uint8_t)0x02U)  /* LPUART1 Alternate Function mapping    */
-#define GPIO_AF2_USB           ((uint8_t)0x02U)  /* USB Alternate Function mapping        */
-#define GPIO_AF2_LPTIM1        ((uint8_t)0x02U)  /* LPTIM1 Alternate Function mapping     */
-#define GPIO_AF2_TIM2          ((uint8_t)0x02U)  /* TIM2 Alternate Function mapping       */
-#define GPIO_AF2_EVENTOUT      ((uint8_t)0x02U)  /* EVENTOUT Alternate Function mapping   */
-#define GPIO_AF2_RTC           ((uint8_t)0x02U)  /* RTC Alternate Function mapping        */
-/**
-  *
-  */
-
-/*
- * Alternate function AF3
- */
-#define GPIO_AF3_I2C1          ((uint8_t)0x03U)  /* I2C1 Alternate Function mapping     */
-#define GPIO_AF3_TSC           ((uint8_t)0x03U)  /* TSC  Alternate Function mapping     */
-#define GPIO_AF3_EVENTOUT      ((uint8_t)0x03U)  /* EVENTOUT Alternate Function mapping */
-/**
-  *
-  */
-
-/*
- * Alternate function AF4
- */
-#define GPIO_AF4_I2C1            ((uint8_t)0x04U)  /* I2C1 Alternate Function mapping     */
-#define GPIO_AF4_USART1          ((uint8_t)0x04U)  /* USART1 Alternate Function mapping   */
-#define GPIO_AF4_USART2          ((uint8_t)0x04U)  /* USART2 Alternate Function mapping   */
-#define GPIO_AF4_LPUART1         ((uint8_t)0x04U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF4_TIM22           ((uint8_t)0x04U)  /* TIM22 Alternate Function mapping    */
-#define GPIO_AF4_EVENTOUT        ((uint8_t)0x04U)  /* EVENTOUT Alternate Function mapping */
-/**
-  *
-  */
-
-/*
- * Alternate function AF5
- */
-#define GPIO_AF5_SPI2          ((uint8_t)0x05U)  /* SPI2 Alternate Function mapping     */
-#define GPIO_AF5_I2C2          ((uint8_t)0x05U)  /* I2C2 Alternate Function mapping     */
-#define GPIO_AF5_TIM2          ((uint8_t)0x05U)  /* TIM2 Alternate Function mapping     */
-#define GPIO_AF5_TIM21         ((uint8_t)0x05U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF5_TIM22         ((uint8_t)0x05U)  /* TIM22 Alternate Function mapping    */
-/**
-  *
-  */
-
-/*
- * Alternate function AF6
- */
-#define GPIO_AF6_I2C2          ((uint8_t)0x06U)  /* I2C2 Alternate Function mapping      */
-#define GPIO_AF6_TIM21         ((uint8_t)0x06U)  /* TIM21 Alternate Function mapping     */
-#define GPIO_AF6_EVENTOUT      ((uint8_t)0x06U)  /* EVENTOUT Alternate Function mapping  */
-/**
-  *
-  */
-
-/*
- * Alternate function AF7
- */
-#define GPIO_AF7_COMP1        ((uint8_t)0x07U)  /* COMP1 Alternate Function mapping     */
-#define GPIO_AF7_COMP2        ((uint8_t)0x07U)  /* COMP2 Alternate Function mapping     */
-/**
-  *
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup GPIOEx_Private  GPIOEx Private
- * @{
- */
-/**
- * @brief  IS_GPIO_AF macro definition
- */
-
-#define IS_GPIO_AF(__AF__) (((__AF__) == GPIO_AF0_SPI1)     || ((__AF__) == GPIO_AF2_SPI2)        || \
-                            ((__AF__) == GPIO_AF0_SPI2)     || ((__AF__) == GPIO_AF2_LPUART1)     || \
-                            ((__AF__) == GPIO_AF0_USART1)   || ((__AF__) == GPIO_AF2_USB)         || \
-                            ((__AF__) == GPIO_AF0_USART2)   || ((__AF__) == GPIO_AF2_LPTIM1)      || \
-                            ((__AF__) == GPIO_AF0_LPUART1)  || ((__AF__) == GPIO_AF2_TIM2)        || \
-                            ((__AF__) == GPIO_AF0_USB)      || ((__AF__) == GPIO_AF4_TIM22)       || \
-                            ((__AF__) == GPIO_AF0_LPTIM1)   || ((__AF__) == GPIO_AF2_EVENTOUT)    || \
-                            ((__AF__) == GPIO_AF0_TSC)      || ((__AF__) == GPIO_AF2_RTC)    || \
-                            ((__AF__) == GPIO_AF0_TIM2)     || ((__AF__) == GPIO_AF3_I2C1)        || \
-                            ((__AF__) == GPIO_AF0_TIM21)    || ((__AF__) == GPIO_AF3_TSC)         || \
-                            ((__AF__) == GPIO_AF0_TIM22)    || ((__AF__) == GPIO_AF3_EVENTOUT)    || \
-                            ((__AF__) == GPIO_AF0_EVENTOUT) || ((__AF__) == GPIO_AF4_I2C1)        || \
-                            ((__AF__) == GPIO_AF0_MCO)      || ((__AF__) == GPIO_AF4_USART1)      || \
-                            ((__AF__) == GPIO_AF0_SWDIO)    || ((__AF__) == GPIO_AF0_SWCLK)       || \
-                            ((__AF__) == GPIO_AF1_SPI1)     || ((__AF__) == GPIO_AF4_USART2)      || \
-                            ((__AF__) == GPIO_AF1_SPI2)     || ((__AF__) == GPIO_AF4_LPUART1)     || \
-                            ((__AF__) == GPIO_AF1_I2C1)     || ((__AF__) == GPIO_AF4_EVENTOUT)    || \
-                            ((__AF__) == GPIO_AF6_EVENTOUT) || ((__AF__) == GPIO_AF5_SPI2)        || \
-                            ((__AF__) == GPIO_AF5_I2C2)     || ((__AF__) == GPIO_AF5_TIM2)        || \
-                            ((__AF__) == GPIO_AF5_TIM21)    || ((__AF__) == GPIO_AF5_TIM22)       || \
-                            ((__AF__) == GPIO_AF6_I2C2)     || ((__AF__) == GPIO_AF6_TIM21)       || \
-                            ((__AF__) == GPIO_AF7_COMP2)    || ((__AF__) == GPIO_AF7_COMP1))
-
-
-#define IS_GPIO_AF_AVAILABLE(__INSTANCE__,__AF__)  \
-        ((((__INSTANCE__) == GPIOA) && (((__AF__) ==  GPIO_AF0_EVENTOUT)   ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM2)       ||   \
-                                        ((__AF__) ==  GPIO_AF3_TSC)        ||   \
-                                        ((__AF__) ==  GPIO_AF4_USART2)     ||   \
-                                        ((__AF__) ==  GPIO_AF5_TIM22)      ||   \
-                                        ((__AF__) ==  GPIO_AF6_EVENTOUT)   ||   \
-                                        ((__AF__) ==  GPIO_AF7_COMP1)))    ||   \
-         (((__INSTANCE__) == GPIOB) && (((__AF__) ==  GPIO_AF0_EVENTOUT)   ||   \
-                                        ((__AF__) ==  GPIO_AF1_I2C1)       ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM2)       ||   \
-                                        ((__AF__) ==  GPIO_AF3_TSC)        ||   \
-                                        ((__AF__) ==  GPIO_AF4_LPUART1)    ||   \
-                                        ((__AF__) ==  GPIO_AF5_I2C2)       ||   \
-                                        ((__AF__) ==  GPIO_AF6_EVENTOUT))) ||   \
-         (((__INSTANCE__) == GPIOC) && (((__AF__) ==  GPIO_AF0_EVENTOUT)   ||   \
-                                        ((__AF__) ==  GPIO_AF2_EVENTOUT)   ||   \
-                                        ((__AF__) ==  GPIO_AF3_TSC)))      ||   \
-         (((__INSTANCE__) == GPIOD) && (((__AF__) ==  GPIO_AF0_LPUART1)))  ||   \
-         (((__INSTANCE__) == GPIOH) && (((__AF__) ==  GPIO_AF0_USB))))
-
- /**
-  * @}
-  */
-#endif /* STM32L052xx || STM32L062xx */
-/*------------------------------------------------------------------------------------------*/
-
-/*----------------------------------------------------------------------------*/
-/*------------------------- STM32L051xx/STM32L061xx---------------------------*/
-/*----------------------------------------------------------------------------*/
-#if defined (STM32L051xx)|| defined (STM32L061xx)
-/* The table below gives an overview of the different alternate functions per port.
- * For more details refer yourself to the product data sheet.
- *
- */
-/*     |   AF0  |   AF1  |   AF2  |   AF3  |   AF4  |   AF5  |   AF6  |   AF7  |
- *______________________________________________________________________________
- * PA0 |        |        |TIM2_C1 |        |USART2  |TIM2_TR |        |COMP1   |
- * PA1 |EVENTOUT|        |TIM2_C2 |        |USART2  |TIM21_TR|        |        |
- * PA2 |TIM21_C1|        |TIM2_C3 |        |USART2  |        |        |COMP2   |
- * PA3 |TIM21_C2|        |TIM2_C4 |        |USART2  |        |        |        |
- * PA4 |SPI1    |        |        |        |USART2  |TIM22_TR|        |        |
- * PA5 |SPI1    |        |TIM2_TR |        |        |TIM2_C1 |        |        |
- * PA6 |SPI1    |        |        |        |LPUART  |TIM22_C1|EVENTOUT|COMP1   |
- * PA7 |SPI1    |        |        |        |        |TIM22_C2|EVENTOUT|COMP2   |
- * PA8 |MCO     |        |        |EVENTOUT|USART1  |        |        |        |
- * PA9 |MCO     |        |        |        |USART1  |        |        |        |
- * PA10|        |        |        |        |USART1  |        |        |        |
- * PA11|SPI1    |        |EVENTOUT|        |USART1  |        |        |COMP1   |
- * PA12|SPI1    |        |EVENTOUT|        |USART1  |        |        |COMP2   |
- * PA13|SWDIO   |        |        |        |        |        |        |        |
- * PA14|SWCLK   |        |        |        |USART2  |        |        |        |
- * PA15|SPI1    |        |TIM2_TR |EVENTOUT|USART2  |TIM2_C1 |        |        |
- *______________________________________________________________________________
- * PB0 |EVENTOUT|        |        |        |        |        |        |        |
- * PB1 |        |        |        |        |LPUART1 |        |        |        |
- * PB2 |        |        |LPTIM1_O|        |        |        |        |        |
- * PB3 |SPI1    |        |TIM2_C2 |        |EVENTOUT|        |        |        |
- * PB4 |SPI1    |        |EVENTOUT|        |TIM22_C1|        |        |        |
- * PB5 |SPI1    |        |LPTIM1_I|I2C1    |TIM22_C2|        |        |        |
- * PB6 |USART1  |I2C1    |LPTIM1_T|        |        |        |        |        |
- * PB7 |USART1  |I2C1    |LPTIM1_I|        |        |        |        |        |
- * PB8 |        |        |        |        |I2C1    |        |        |        |
- * PB9 |        |        |EVENTOUT|        |I2C1    |SPI2    |        |        |
- * PB10|        |        |TIM2_C3 |        |LPUART1 |SPI2    |I2C2    |        |
- * PB11|EVENTOUT|        |TIM2_C4 |        |LPUART1 |        |I2C2    |        |
- * PB12|SPI2    |        |LPUART1 |        |        |I2C2    |EVENTOUT|        |
- * PB13|SPI2    |        |        |        |LPUART1 |I2C2    |TIM21_C1|        |
- * PB14|SPI2    |        |RTC     |        |LPUART1 |I2C2    |TIM21_C2|        |
- * PB15|SPI2    |        |RTC     |        |        |        |        |        |
- *______________________________________________________________________________
- * PC0 |LPTIM1_I|        |EVENTOUT|        |        |        |        |        |
- * PC1 |LPTIM1_O|        |EVENTOUT|        |        |        |        |        |
- * PC2 |LPTIM1_I|        |SPI2    |        |        |        |        |        |
- * PC3 |LPTIM1_T|        |SPI2    |        |        |        |        |        |
- * PC4 |EVENTOUT|        |LPUART  |        |        |        |        |        |
- * PC5 |        |        |LPUART  |        |        |        |        |        |
- * PC6 |TIM22_C1|        |        |        |        |        |        |        |
- * PC7 |TIM22_C2|        |        |        |        |        |        |        |
- * PC8 |TIM22_TR|        |        |        |        |        |        |        |
- * PC9 |TIM21_TR|        |        |        |        |        |        |        |
- * PC10|LPUART  |        |        |        |        |        |        |        |
- * PC11|LPUART  |        |        |        |        |        |        |        |
- * PC12|        |        |        |        |        |        |        |        |
- * PC13|        |        |        |        |        |        |        |        |
- * PC14|        |        |        |        |        |        |        |        |
- * PC15|        |        |        |        |        |        |        |        |
- *______________________________________________________________________________
- * PD2 |LPUART  |        |        |        |        |        |        |        |
- *______________________________________________________________________________
- * PH0 |        |        |        |        |        |        |        |        |
- * PH1 |        |        |        |        |        |        |        |        |
- *  *
- */
-
-/** @defgroup GPIOEx_Alternate_function_selection Alternate function selection
- * @{
- */
-
-/*
- * Alternate function AF0
- */
-#define GPIO_AF0_SPI1          ((uint8_t)0x00U)  /* SPI1 Alternate Function mapping     */
-#define GPIO_AF0_SPI2          ((uint8_t)0x00U)  /* SPI2 Alternate Function mapping     */
-#define GPIO_AF0_USART1        ((uint8_t)0x00U)  /* USART1 Alternate Function mapping   */
-#define GPIO_AF0_USART2        ((uint8_t)0x00U)  /* USART2 Alternate Function mapping   */
-#define GPIO_AF0_LPUART1       ((uint8_t)0x00U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF0_LPTIM1        ((uint8_t)0x00U)  /* LPTIM1 Alternate Function mapping   */
-#define GPIO_AF0_TIM2          ((uint8_t)0x00U)  /* TIM2 Alternate Function mapping     */
-#define GPIO_AF0_TIM21         ((uint8_t)0x00U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF0_TIM22         ((uint8_t)0x00U)  /* TIM22 Alternate Function mapping    */
-#define GPIO_AF0_EVENTOUT      ((uint8_t)0x00U)  /* EVENTOUT Alternate Function mapping */
-#define GPIO_AF0_MCO           ((uint8_t)0x00U)  /* MCO Alternate Function mapping      */
-#define GPIO_AF0_SWDIO         ((uint8_t)0x00U)  /* SWDIO Alternate Function mapping    */
-#define GPIO_AF0_SWCLK         ((uint8_t)0x00U)  /* SWCLK Alternate Function mapping    */
-/**
-  *
-  */
-
-/*
- * Alternate function AF1
- */
-#define GPIO_AF1_SPI1          ((uint8_t)0x01U)  /* SPI1 Alternate Function mapping  */
-#define GPIO_AF1_SPI2          ((uint8_t)0x01U)  /* SPI2 Alternate Function mapping  */
-#define GPIO_AF1_I2C1          ((uint8_t)0x01U)  /* I2C1 Alternate Function mapping  */
-/**
-  *
-  */
-
- /*
-  * Alternate function AF2
- */
-#define GPIO_AF2_SPI2          ((uint8_t)0x02U)  /* SPI2 Alternate Function mapping       */
-#define GPIO_AF2_LPUART1       ((uint8_t)0x02U)  /* LPUART1 Alternate Function mapping    */
-#define GPIO_AF2_USB           ((uint8_t)0x02U)  /* USB Alternate Function mapping        */
-#define GPIO_AF2_LPTIM1        ((uint8_t)0x02U)  /* LPTIM1 Alternate Function mapping     */
-#define GPIO_AF2_TIM2          ((uint8_t)0x02U)  /* TIM2 Alternate Function mapping       */
-#define GPIO_AF2_EVENTOUT      ((uint8_t)0x02U)  /* EVENTOUT Alternate Function mapping   */
-#define GPIO_AF2_RTC           ((uint8_t)0x02U)  /* RTC Alternate Function mapping        */
-/**
-  *
-  */
-
-/*
- * Alternate function AF3
- */
-#define GPIO_AF3_I2C1          ((uint8_t)0x03U)  /* I2C1 Alternate Function mapping     */
-#define GPIO_AF3_EVENTOUT      ((uint8_t)0x03U)  /* EVENTOUT Alternate Function mapping */
-/**
-  *
-  */
-
-/*
- * Alternate function AF4
- */
-#define GPIO_AF4_I2C1            ((uint8_t)0x04U)  /* I2C1 Alternate Function mapping     */
-#define GPIO_AF4_USART1          ((uint8_t)0x04U)  /* USART1 Alternate Function mapping   */
-#define GPIO_AF4_USART2          ((uint8_t)0x04U)  /* USART2 Alternate Function mapping   */
-#define GPIO_AF4_LPUART1         ((uint8_t)0x04U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF4_TIM22           ((uint8_t)0x04U)  /* TIM22 Alternate Function mapping    */
-#define GPIO_AF4_EVENTOUT        ((uint8_t)0x04U)  /* EVENTOUT Alternate Function mapping */
-/**
-  *
-  */
-
-/*
- * Alternate function AF5
- */
-#define GPIO_AF5_SPI2          ((uint8_t)0x05U)  /* SPI2 Alternate Function mapping     */
-#define GPIO_AF5_I2C2          ((uint8_t)0x05U)  /* I2C2 Alternate Function mapping     */
-#define GPIO_AF5_TIM2          ((uint8_t)0x05U)  /* TIM2 Alternate Function mapping     */
-#define GPIO_AF5_TIM21         ((uint8_t)0x05U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF5_TIM22         ((uint8_t)0x05U)  /* TIM22 Alternate Function mapping    */
-/**
-  *
-  */
-
-/*
- * Alternate function AF6
- */
-#define GPIO_AF6_I2C2          ((uint8_t)0x06U)  /* I2C2 Alternate Function mapping      */
-#define GPIO_AF6_TIM21         ((uint8_t)0x06U)  /* TIM21 Alternate Function mapping     */
-#define GPIO_AF6_EVENTOUT      ((uint8_t)0x06U)  /* EVENTOUT Alternate Function mapping  */
-/**
-  *
-  */
-
-/*
- * Alternate function AF7
- */
-#define GPIO_AF7_COMP1        ((uint8_t)0x07U)  /* COMP1 Alternate Function mapping     */
-#define GPIO_AF7_COMP2        ((uint8_t)0x07U)  /* COMP2 Alternate Function mapping     */
-/**
-  *
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup GPIOEx_Private  GPIOEx Private
- * @{
- */
-
-/**
- * @brief  IS_GPIO_AF macro definition
- */
-#define IS_GPIO_AF(__AF__) (((__AF__) == GPIO_AF0_SPI1)     || ((__AF__) == GPIO_AF2_SPI2)     || \
-                            ((__AF__) == GPIO_AF0_SPI2)     || ((__AF__) == GPIO_AF2_LPUART1)  || \
-                            ((__AF__) == GPIO_AF0_USART1)   || ((__AF__) == GPIO_AF7_COMP1)    || \
-                            ((__AF__) == GPIO_AF0_USART2)   || ((__AF__) == GPIO_AF2_LPTIM1)   || \
-                            ((__AF__) == GPIO_AF0_LPUART1)  || ((__AF__) == GPIO_AF2_TIM2)     || \
-                            ((__AF__) == GPIO_AF0_LPTIM1)   || ((__AF__) == GPIO_AF2_EVENTOUT) || \
-                            ((__AF__) == GPIO_AF2_RTC) || ((__AF__) == GPIO_AF4_TIM22)    || \
-                            ((__AF__) == GPIO_AF0_TIM2)     || ((__AF__) == GPIO_AF3_I2C1)     || \
-                            ((__AF__) == GPIO_AF0_TIM21)    || ((__AF__) == GPIO_AF7_COMP2)    || \
-                            ((__AF__) == GPIO_AF0_TIM22)    || ((__AF__) == GPIO_AF3_EVENTOUT) || \
-                            ((__AF__) == GPIO_AF0_EVENTOUT) || ((__AF__) == GPIO_AF4_I2C1)     || \
-                            ((__AF__) == GPIO_AF0_MCO)      || ((__AF__) == GPIO_AF4_USART1)   || \
-                            ((__AF__) == GPIO_AF0_SWDIO)    || ((__AF__) == GPIO_AF0_SWCLK)    || \
-                            ((__AF__) == GPIO_AF1_SPI1)     || ((__AF__) == GPIO_AF4_USART2)   || \
-                            ((__AF__) == GPIO_AF1_SPI2)     || ((__AF__) == GPIO_AF4_LPUART1)  || \
-                            ((__AF__) == GPIO_AF1_I2C1)     || ((__AF__) == GPIO_AF4_EVENTOUT) || \
-                            ((__AF__) == GPIO_AF6_EVENTOUT) || ((__AF__) == GPIO_AF5_SPI2)     || \
-                            ((__AF__) == GPIO_AF5_I2C2)     || ((__AF__) == GPIO_AF5_TIM2)     || \
-                            ((__AF__) == GPIO_AF5_TIM21)    || ((__AF__) == GPIO_AF5_TIM22)    || \
-                            ((__AF__) == GPIO_AF6_I2C2)     || ((__AF__) == GPIO_AF6_TIM21))
-
-                         
-
-   #define IS_GPIO_AF_AVAILABLE(__INSTANCE__,__AF__)  \
-        ((((__INSTANCE__) == GPIOA) && (((__AF__) ==  GPIO_AF0_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM2)      ||   \
-                                        ((__AF__) ==  GPIO_AF3_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF4_USART2)    ||   \
-                                        ((__AF__) ==  GPIO_AF5_TIM22)     ||   \
-                                        ((__AF__) ==  GPIO_AF6_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF7_COMP2)))   ||   \
-         (((__INSTANCE__) == GPIOB) && (((__AF__) ==  GPIO_AF0_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF1_I2C1)      ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM2)      ||   \
-                                        ((__AF__) ==  GPIO_AF3_I2C1)      ||   \
-                                        ((__AF__) ==  GPIO_AF4_LPUART1)   ||   \
-                                        ((__AF__) ==  GPIO_AF5_I2C2)      ||   \
-                                        ((__AF__) ==  GPIO_AF6_TIM21)))   ||   \
-         (((__INSTANCE__) == GPIOC) && (((__AF__) ==  GPIO_AF0_EVENTOUT)  ||   \
-                                        ((__AF__) ==  GPIO_AF2_LPUART1))) ||   \
-         (((__INSTANCE__) == GPIOD) && (((__AF__) ==  GPIO_AF0_LPUART1))))
-
- /**
-  * @}
-  */
-#endif /* STM32L051xx/STM32L061xx*/
-/*------------------------------------------------------------------------------------------*/
-
-/*----------------------------------------------------------------------------*/
-/*------------------------- STM32L031xx/STM32L041xx---------------------------*/
-/*----------------------------------------------------------------------------*/
-#if defined (STM32L031xx)|| defined (STM32L041xx)
-/* The table below gives an overview of the different alternate functions per port.
- * For more details refer yourself to the product data sheet.
- *
- */
-/*     |   AF0  |   AF1  |   AF2  |   AF3  |   AF4  |   AF5  |   AF6  |   AF7  |
- *______________________________________________________________________________
- * PA0 |        |LPTIM1  |TIM2_C1 |        |USART2  |TIM2_TR |        |COMP1   |
- * PA1 |EVENTOUT|LPTIM1  |TIM2_C2 |I2C1    |USART2  |TIM21_TR|        |        |
- * PA2 |TIM21_C1|        |TIM2_C3 |        |USART2  |        |LPUART1 |COMP2   |
- * PA3 |TIM21_C2|        |TIM2_C4 |        |USART2  |        |LPUART1 |        |
- * PA4 |SPI1    |LPTIM1  |        |        |USART2  |TIM22_TR|        |        |
- * PA5 |SPI1    |LPTIM1  |TIM2_TR |        |        |TIM2_C1 |        |        |
- * PA6 |SPI1    |LPTIM1  |        |        |LPUART  |TIM22_C1|EVENTOUT|COMP1   |
- * PA7 |SPI1    |LPTIM1  |        |        |USART2  |TIM22_C2|EVENTOUT|COMP2   |
- * PA8 |MCO     |        |LPTIM1  |EVENTOUT|USART2  |TIM2_C1 |        |        |
- * PA9 |MCO     |I2C1    |        |        |USART2  |TIM22_C1|        |        |
- * PA10|        |I2C1    |        |        |USART2  |TIM22_C2|        |        |
- * PA11|SPI1    |        |EVENTOUT|        |USART2  |TIM21_C2|        |COMP1   |
- * PA12|SPI1    |        |EVENTOUT|        |USART2  |        |        |COMP2   |
- * PA13|SWDIO   |LPTIM1  |        |        |        |        |LPUART1 |        |
- * PA14|SWCLK   |LPTIM1  |        |I2C1    |USART2  |        |LPUART1 |        |
- * PA15|SPI1    |        |TIM2_TR |EVENTOUT|USART2  |TIM2_C1 |        |        |
- *_____________________________________________________________________________|
- * PB0 |EVENTOUT|SPI1    |        |        |USART2  |TIM2_C3 |        |        |
- * PB1 |USART2  |SPI1    |        |        |LPUART1 |TIM2_C4 |        |        |
- * PB2 |        |        |LPTIM1_O|        |        |        |        |        |
- * PB3 |SPI1    |        |TIM2_C2 |        |EVENTOUT|        |        |        |
- * PB4 |SPI1    |        |EVENTOUT|        |TIM22_C1|        |        |        |
- * PB5 |SPI1    |        |LPTIM1_I|I2C1    |TIM22_C2|        |        |        |
- * PB6 |USART2  |I2C1    |LPTIM1_T|        |        |TIM21_C1|        |        |
- * PB7 |USART2  |I2C1    |LPTIM1_I|        |        |        |        |        |
- * PB8 |        |        |        |        |I2C1    |        |        |        |
- * PB9 |        |        |EVENTOUT|        |I2C1    |        |        |        |
- * PB10|        |        |TIM2_C3 |        |        |        |LPUART1 |        |
- * PB11|EVENTOUT|        |TIM2_C4 |        |        |        |LPUART1 |        |
- * PB12|SPI2    |        |        |        |        |        |EVENTOUT|        |
- * PB13|SPI2    |        |MCO     |        |        |TIM21_C1|LPUART1 |        |
- * PB14|SPI2    |        |RTC     |        |        |TIM21_C2|LPUART1 |        |
- * PB15|SPI2    |        |RTC     |        |        |        |        |        |
- *_____________________________________________________________________________|
- * PC0 |LPTIM1_I|        |EVENTOUT|        |        |        |LPUART1 |        |
- * PC13|        |        |        |        |        |        |        |        |
- * PC14|        |        |        |        |        |        |        |        |
- * PC15|        |        |        |        |        |        |        |        |
- *_____________________________________________________________________________|
- * PH0 |        |        |        |        |        |        |        |        |
- * PH1 |        |        |        |        |        |        |        |        |
- *_____________________________________________________________________________|
- */
-
-/** @defgroup GPIOEx_Alternate_function_selection Alternate function selection
- * @{
- */
-
-/*
- * Alternate function AF0
- */
-#define GPIO_AF0_EVENTOUT      ((uint8_t)0x00U)  /* EVENTOUT Alternate Function mapping */
-#define GPIO_AF0_TIM21         ((uint8_t)0x00U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF0_SPI1          ((uint8_t)0x00U)  /* SPI1 Alternate Function mapping     */
-#define GPIO_AF0_USART2        ((uint8_t)0x00U)  /* USART2 Alternate Function mapping   */
-#define GPIO_AF0_LPTIM1        ((uint8_t)0x00U)  /* LPTIM1 Alternate Function mapping   */
-#define GPIO_AF0_MCO           ((uint8_t)0x00U)  /* MCO Alternate Function mapping      */
-#define GPIO_AF0_SWDIO         ((uint8_t)0x00U)  /* SWDIO Alternate Function mapping    */
-#define GPIO_AF0_SWCLK         ((uint8_t)0x00U)  /* SWCLK Alternate Function mapping    */
-/**
-  *
-  */
-
-/*
- * Alternate function AF1
- */
-#define GPIO_AF1_SPI1          ((uint8_t)0x01U)  /* SPI1 Alternate Function mapping   */
-#define GPIO_AF1_I2C1          ((uint8_t)0x01U)  /* I2C1 Alternate Function mapping   */
-#define GPIO_AF1_LPTIM1        ((uint8_t)0x01U)  /* LPTIM1 Alternate Function mapping */
-/**
-  *
-  */
-
-/*
- * Alternate function AF2
- */
-#define GPIO_AF2_LPTIM1        ((uint8_t)0x02U)  /* LPTIM1 Alternate Function mapping     */
-#define GPIO_AF2_TIM2          ((uint8_t)0x02U)  /* TIM2 Alternate Function mapping       */
-#define GPIO_AF2_MCO           ((uint8_t)0x02U)  /* MCO Alternate Function mapping        */
-#define GPIO_AF2_EVENTOUT      ((uint8_t)0x02U)  /* EVENTOUT Alternate Function mapping   */
-#define GPIO_AF2_RTC           ((uint8_t)0x02U)  /* RTC Alternate Function mapping        */
-/**
-  *
-  */
-
-/*
- * Alternate function AF3
- */
-#define GPIO_AF3_I2C1          ((uint8_t)0x03U)  /* I2C1 Alternate Function mapping     */
-#define GPIO_AF3_EVENTOUT      ((uint8_t)0x03U)  /* EVENTOUT Alternate Function mapping  */
-/**
-  *
-  */
-
-/*
- * Alternate function AF4
- */
-#define GPIO_AF4_I2C1          ((uint8_t)0x04U)  /* I2C1 Alternate Function mapping     */
-#define GPIO_AF4_USART2        ((uint8_t)0x04U)  /* USART2 Alternate Function mapping   */
-#define GPIO_AF4_LPUART1       ((uint8_t)0x04U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF4_TIM22         ((uint8_t)0x04U)  /* TIM22 Alternate Function mapping    */
-#define GPIO_AF4_EVENTOUT      ((uint8_t)0x04U)  /* EVENTOUT Alternate Function mapping  */
-/**
-  *
-  */
-
-/*
- * Alternate function AF5
- */
-#define GPIO_AF5_TIM2          ((uint8_t)0x05U)  /* TIM2 Alternate Function mapping     */
-#define GPIO_AF5_TIM21         ((uint8_t)0x05U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF5_TIM22         ((uint8_t)0x05U)  /* TIM22 Alternate Function mapping    */
-/**
-  *
-  */
-
-/*
- * Alternate function AF6
- */
-#define GPIO_AF6_LPUART1       ((uint8_t)0x06U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF6_EVENTOUT      ((uint8_t)0x06U)  /* EVENTOUT Alternate Function mapping  */
-/**
-  *
-  */
-
-/*
- * Alternate function AF7
- */
-#define GPIO_AF7_COMP1         ((uint8_t)0x07U)  /* COMP1 Alternate Function mapping     */
-#define GPIO_AF7_COMP2         ((uint8_t)0x07U)  /* COMP2 Alternate Function mapping     */
-/**
-  *
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup GPIOEx_Private  GPIOEx Private
- * @{
- */
-/**
- * @brief  IS_GPIO_AF macro definition
- */
-
-#define IS_GPIO_AF(__AF__)   (((__AF__) == GPIO_AF0_EVENTOUT  ) || \
-                              ((__AF__) == GPIO_AF0_TIM21     ) || \
-                              ((__AF__) == GPIO_AF0_SPI1      ) || \
-                              ((__AF__) == GPIO_AF0_USART2    ) || \
-                              ((__AF__) == GPIO_AF0_LPTIM1    ) || \
-                              ((__AF__) == GPIO_AF0_MCO       ) || \
-                              ((__AF__) == GPIO_AF0_SWDIO     ) || \
-                              ((__AF__) == GPIO_AF0_SWCLK     ) || \
-                              ((__AF__) == GPIO_AF1_SPI1      ) || \
-                              ((__AF__) == GPIO_AF1_I2C1      ) || \
-                              ((__AF__) == GPIO_AF1_LPTIM1    ) || \
-                              ((__AF__) == GPIO_AF2_LPTIM1    ) || \
-                              ((__AF__) == GPIO_AF2_TIM2      ) || \
-                              ((__AF__) == GPIO_AF2_MCO       ) || \
-                              ((__AF__) == GPIO_AF2_EVENTOUT  ) || \
-                              ((__AF__) == GPIO_AF2_RTC       ) || \
-                              ((__AF__) == GPIO_AF3_I2C1      ) || \
-                              ((__AF__) == GPIO_AF3_EVENTOUT  ) || \
-                              ((__AF__) == GPIO_AF4_I2C1      ) || \
-                              ((__AF__) == GPIO_AF4_USART2    ) || \
-                              ((__AF__) == GPIO_AF4_LPUART1   ) || \
-                              ((__AF__) == GPIO_AF4_TIM22     ) || \
-                              ((__AF__) == GPIO_AF4_EVENTOUT  ) || \
-                              ((__AF__) == GPIO_AF5_TIM2      ) || \
-                              ((__AF__) == GPIO_AF5_TIM21     ) || \
-                              ((__AF__) == GPIO_AF5_TIM22     ) || \
-                              ((__AF__) == GPIO_AF6_LPUART1   ) || \
-                              ((__AF__) == GPIO_AF6_EVENTOUT  ) || \
-                              ((__AF__) == GPIO_AF7_COMP1     ) || \
-                              ((__AF__) == GPIO_AF7_COMP2     ))
-                                      
-
- #define IS_GPIO_AF_AVAILABLE(__INSTANCE__,__AF__)  \
-        ((((__INSTANCE__) == GPIOA) && (((__AF__) ==  GPIO_AF0_EVENTOUT)   ||   \
-                                        ((__AF__) ==  GPIO_AF1_LPTIM1)     ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM2)       ||   \
-                                        ((__AF__) ==  GPIO_AF3_I2C1)       ||   \
-                                        ((__AF__) ==  GPIO_AF4_USART2)     ||   \
-                                        ((__AF__) ==  GPIO_AF5_TIM22)      ||   \
-                                        ((__AF__) ==  GPIO_AF6_LPUART1)    ||   \
-                                        ((__AF__) ==  GPIO_AF7_COMP2)))    ||   \
-         (((__INSTANCE__) == GPIOB) && (((__AF__) ==  GPIO_AF0_EVENTOUT)   ||   \
-                                        ((__AF__) ==  GPIO_AF1_SPI1)       ||   \
-                                        ((__AF__) ==  GPIO_AF2_LPTIM1)     ||   \
-                                        ((__AF__) ==  GPIO_AF3_I2C1)       ||   \
-                                        ((__AF__) ==  GPIO_AF4_LPUART1)    ||   \
-                                        ((__AF__) ==  GPIO_AF5_TIM2)       ||   \
-                                        ((__AF__) ==  GPIO_AF6_EVENTOUT))) ||   \
-         (((__INSTANCE__) == GPIOC) && (((__AF__) ==  GPIO_AF0_LPTIM1)     ||   \
-                                        ((__AF__) ==  GPIO_AF2_EVENTOUT)   ||   \
-                                        ((__AF__) ==  GPIO_AF6_LPUART1))))
-
-/**
-  * @}
-  */
-
-#endif /* STM32L031xx/STM32L041xx*/
-/*------------------------------------------------------------------------------------------*/
-
-/*----------------------------------------------------------------------------*/
-/*------------------------- STM32L011xx/STM32L021xx---------------------------*/
-/*----------------------------------------------------------------------------*/
-#if defined (STM32L011xx)|| defined (STM32L021xx)
-/* The table below gives an overview of the different alternate functions per port.
- * For more details refer yourself to the product data sheet.
- *
- */
-/*     |   AF0   |   AF1    |   AF2  |   AF3   |   AF4    |   AF5  |   AF6     |   AF7   |
- *______________________________________________________________________________________
- * PA0 |USART2_RX|LPTIM1_IN1|TIM2_C1  |        |USART2_CTS|TIM2_ETR|LPUART1_RX |COMP1_OUT|
- * PA1 |EVENTOUT |LPTIM1_IN2|TIM2_C2  |I2C1    |USART2_RTS|TIM21_TR|LPUART1_TX |         |
- * PA2 |TIM21_C1 |          |TIM2_C3  |        |USART2_TX |        |LPUART1_TX |COMP2_OUT|
- * PA3 |TIM21_C2 |          |TIM2_C4  |        |USART2_RX |        |LPUART1_RX |         |
- * PA4 |SPI1     |LPTIM1_IN1|LPTIM1_TR|I2C1_SCL|USART2_CK |TIM2_TR |LPUART1_TX |COMP2_OUT|
- * PA5 |SPI1     |LPTIM1_IN2|TIM2_TR  |        |          |TIM2_C1 |           |         |
- * PA6 |SPI1     |LPTIM1_ETR|         |        |LPUART1_CT|        |EVENTOUT   |COMP1_OUT|
- * PA7 |SPI1     |LPTIM1_OUT|         |        |USART2_CTS|TIM21_T |EVENTOUT   |COMP2_OUT|
- * PA8 |MCO      |          |LPTIM1_I1|EVENTOUT|USART2_CK |TIM2_C1 |           |         |
- * PA9 |MCO      |I2C1_SCL  |LPTIM1_O |        |USART2_TX |TIM21_C2|           |COMP1_OUT|
- * PA10|TIM21_C1 |I2C1_SDA  |RTC_REFIN|        |USART2_RX |TIM2_C3 |           |COMP1_OUT|
- * PA11|SPI1     |LPTIM1_OUT|EVENTOUT |        |USART2_CTS|TIM21_C2|           |COMP1_OUT|
- * PA12|SPI1     |          |EVENTOUT |        |USART2_RTS|        |           |COMP2_OUT|
- * PA13|SWDIO    |LPTIM1_T  |         |I2C1_SDA|          |SPI1    |LPUART1_RX |COMP1_OUT|
- * PA14|SWCLK    |LPTIM1_O  |         |I2C1_SMB|USART2_TX |SPI1    |LPUART1_TX |COMP2_OUT|
- * PA15|SPI1     |          |TIM2_TR  |EVENTOUT|USART2_RX |TIM2_C1 |           |         |
- *______________________________________________________________________________________ |
- * PB0 |EVENTOUT |SPI1      |TIM2_C2  |        |USART2_RTS|TIM2_C3 |           |         |
- * PB1 |USART2_CK|SPI1      |LPTIM1_I1|        |LPUART1_RT|TIM2_C4 |           |         |
- * PB2 |         |          |LPTIM1_O |        |          |        |           |         |
- * PB3 |SPI1     |          |TIM2_C2  |        |EVENTOUT  |        |           |         |
- * PB4 |SPI1     |          |EVENTOUT |        |          |        |           |         |
- * PB5 |SPI1     |          |LPTIM1_I1|I2C1    |          |TIM21_C1|           |         |
- * PB6 |USART2_TX|I2C1_SCL  |LPTIM1_T |        |          |TIM2_C3 |LPUART1_TX |         |
- * PB7 |USART2_RX|I2C1      |LPTIM1_I2|        |          |TIM2_C4 |LPUART1_RX |         |
- * PB8 |USART2_TX|          |EVENTOUT |        |I2C1      |SPI1    |           |         |
- * PB9 |         |          |         |        |          |        |           |         |
- *______________________________________________________________________________________ |
- * PC14|         |          |         |        |          |        |           |         |
- * PC15|         |          |         |        |          |        |           |         |
- *______________________________________________________________________________________ |
- */
-
-/** @defgroup GPIOEx_Alternate_function_selection Alternate function selection
- * @{
- */
-
-/*
- * Alternate function AF0
- */
-#define GPIO_AF0_EVENTOUT      ((uint8_t)0x00U)  /* EVENTOUT Alternate Function mapping */
-#define GPIO_AF0_TIM21         ((uint8_t)0x00U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF0_SPI1          ((uint8_t)0x00U)  /* SPI1 Alternate Function mapping     */
-#define GPIO_AF0_USART2        ((uint8_t)0x00U)  /* USART2 Alternate Function mapping   */
-#define GPIO_AF0_MCO           ((uint8_t)0x00U)  /* MCO Alternate Function mapping      */
-#define GPIO_AF0_SWDIO         ((uint8_t)0x00U)  /* SWDIO Alternate Function mapping    */
-#define GPIO_AF0_SWCLK         ((uint8_t)0x00U)  /* SWCLK Alternate Function mapping    */
-/**
-  *
-  */
-
-/*
- *  Alternate function AF1
- */
-#define GPIO_AF1_SPI1          ((uint8_t)0x01U)  /* SPI1 Alternate Function mapping   */
-#define GPIO_AF1_I2C1          ((uint8_t)0x01U)  /* I2C1 Alternate Function mapping   */
-#define GPIO_AF1_LPTIM1        ((uint8_t)0x01U)  /* LPTIM1 Alternate Function mapping */
-/**
-  *
-  */
-
-/*  Alternate function AF2
- *
- */
-#define GPIO_AF2_LPTIM1        ((uint8_t)0x02U)  /* LPTIM1 Alternate Function mapping     */
-#define GPIO_AF2_TIM2          ((uint8_t)0x02U)  /* TIM2 Alternate Function mapping       */
-#define GPIO_AF2_RTC           ((uint8_t)0x02U)  /* RTC Alternate Function mapping        */
-#define GPIO_AF2_EVENTOUT      ((uint8_t)0x02U)  /* EVENTOUT Alternate Function mapping   */
-/**
-  *
-  */
-
-/*
- * Alternate function AF3
- */
-#define GPIO_AF3_I2C1          ((uint8_t)0x03U)  /* I2C1 Alternate Function mapping     */
-#define GPIO_AF3_EVENTOUT      ((uint8_t)0x03U)  /* EVENTOUT Alternate Function mapping  */
-/**
-  *
-  */
-
-/*
- * Alternate function AF4
- */
-#define GPIO_AF4_I2C1          ((uint8_t)0x04U)  /* I2C1 Alternate Function mapping     */
-#define GPIO_AF4_USART2        ((uint8_t)0x04U)  /* USART2 Alternate Function mapping   */
-#define GPIO_AF4_LPUART1       ((uint8_t)0x04U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF4_EVENTOUT      ((uint8_t)0x04U)  /* EVENTOUT Alternate Function mapping  */
-/**
-  *
-  */
-
-/*
- * Alternate function AF5
- */
-#define GPIO_AF5_TIM2          ((uint8_t)0x05U)  /* TIM2 Alternate Function mapping     */
-#define GPIO_AF5_TIM21         ((uint8_t)0x05U)  /* TIM21 Alternate Function mapping    */
-#define GPIO_AF5_SPI1          ((uint8_t)0x05U)  /* SPI1 Alternate Function mapping    */
-/**
-  *
-  */
-
-/*
- * Alternate function AF6
- */
-#define GPIO_AF6_LPUART1       ((uint8_t)0x06U)  /* LPUART1 Alternate Function mapping  */
-#define GPIO_AF6_EVENTOUT      ((uint8_t)0x06U)  /* EVENTOUT Alternate Function mapping  */
-/**
-  *
-  */
-
-/*
- * Alternate function AF7
- */
-#define GPIO_AF7_COMP1         ((uint8_t)0x07U)  /* COMP1 Alternate Function mapping     */
-#define GPIO_AF7_COMP2         ((uint8_t)0x07U)  /* COMP2 Alternate Function mapping     */
-/**
-  *
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup GPIOEx_Private  GPIOEx Private
- * @{
- */
-/**
- *  IS_GPIO_AF macro definition
- */
-
-#define IS_GPIO_AF(__AF__)   (((__AF__) == GPIO_AF0_EVENTOUT  ) || \
-                              ((__AF__) == GPIO_AF0_TIM21     ) || \
-                              ((__AF__) == GPIO_AF0_SPI1      ) || \
-                              ((__AF__) == GPIO_AF0_USART2    ) || \
-                              ((__AF__) == GPIO_AF0_MCO       ) || \
-                              ((__AF__) == GPIO_AF0_SWDIO     ) || \
-                              ((__AF__) == GPIO_AF0_SWCLK     ) || \
-                              ((__AF__) == GPIO_AF1_SPI1      ) || \
-                              ((__AF__) == GPIO_AF1_I2C1      ) || \
-                              ((__AF__) == GPIO_AF1_LPTIM1    ) || \
-                              ((__AF__) == GPIO_AF2_LPTIM1    ) || \
-                              ((__AF__) == GPIO_AF2_TIM2      ) || \
-                              ((__AF__) == GPIO_AF2_EVENTOUT  ) || \
-                              ((__AF__) == GPIO_AF2_RTC       ) || \
-                              ((__AF__) == GPIO_AF3_I2C1      ) || \
-                              ((__AF__) == GPIO_AF3_EVENTOUT  ) || \
-                              ((__AF__) == GPIO_AF4_I2C1      ) || \
-                              ((__AF__) == GPIO_AF4_USART2    ) || \
-                              ((__AF__) == GPIO_AF4_LPUART1   ) || \
-                              ((__AF__) == GPIO_AF4_EVENTOUT  ) || \
-                              ((__AF__) == GPIO_AF5_TIM2      ) || \
-                              ((__AF__) == GPIO_AF5_TIM21     ) || \
-                              ((__AF__) == GPIO_AF5_SPI1      ) || \
-                              ((__AF__) == GPIO_AF6_LPUART1   ) || \
-                              ((__AF__) == GPIO_AF6_EVENTOUT  ) || \
-                              ((__AF__) == GPIO_AF7_COMP1     ) || \
-                              ((__AF__) == GPIO_AF7_COMP2     ))
-                                      
-
- #define IS_GPIO_AF_AVAILABLE(__INSTANCE__,__AF__)  \
-        ((((__INSTANCE__) == GPIOA) && (((__AF__) ==  GPIO_AF0_EVENTOUT)   ||   \
-                                        ((__AF__) ==  GPIO_AF1_LPTIM1)     ||   \
-                                        ((__AF__) ==  GPIO_AF2_TIM2)       ||   \
-                                        ((__AF__) ==  GPIO_AF3_I2C1)       ||   \
-                                        ((__AF__) ==  GPIO_AF4_USART2)     ||   \
-                                        ((__AF__) ==  GPIO_AF5_TIM2)       ||   \
-                                        ((__AF__) ==  GPIO_AF6_LPUART1)    ||   \
-                                        ((__AF__) ==  GPIO_AF7_COMP2)))    ||   \
-         (((__INSTANCE__) == GPIOB) && (((__AF__) ==  GPIO_AF0_EVENTOUT)   ||   \
-                                        ((__AF__) ==  GPIO_AF1_SPI1)       ||   \
-                                        ((__AF__) ==  GPIO_AF2_LPTIM1)     ||   \
-                                        ((__AF__) ==  GPIO_AF3_I2C1)       ||   \
-                                        ((__AF__) ==  GPIO_AF4_LPUART1)    ||   \
-                                        ((__AF__) ==  GPIO_AF5_TIM2)       ||   \
-                                        ((__AF__) ==  GPIO_AF6_EVENTOUT))))
-
- /**
-  * @}
-  */
-
-#endif /* STM32L011xx/STM32L021xx*/
-/*------------------------------------------------------------------------------------------*/
-
-
-
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx)
-
- /** @addtogroup GPIOEx_Exported_Constants
- * @{
- */
- /** @defgroup GPIOEx_Pin_Available Pin available
- * @{
- */
-#define GPIOA_PIN_AVAILABLE  GPIO_PIN_All
-#define GPIOB_PIN_AVAILABLE  GPIO_PIN_All
-#define GPIOC_PIN_AVAILABLE  GPIO_PIN_All
-#define GPIOD_PIN_AVAILABLE  GPIO_PIN_All
-#define GPIOE_PIN_AVAILABLE  GPIO_PIN_All
-#define GPIOH_PIN_AVAILABLE  (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_9 | GPIO_PIN_10)
-/**
-  * @}
-  */
-/**
-  * @}
-  */
-
- /** @addtogroup GPIOEx_Private
- * @{
- */
-#define GPIO_GET_INDEX(__GPIOx__)    (((__GPIOx__) == (GPIOA))? 0U :\
-                                      ((__GPIOx__) == (GPIOB))? 1U :\
-                                      ((__GPIOx__) == (GPIOC))? 2U :\
-                                      ((__GPIOx__) == (GPIOD))? 3U :\
-                                      ((__GPIOx__) == (GPIOE))? 4U :\
-                                      ((__GPIOx__) == (GPIOH))? 5U : 6U)
-
-#define IS_GPIO_PIN_AVAILABLE(__INSTANCE__,__PIN__)  \
-           ((((__INSTANCE__) == GPIOA) && (((__PIN__) & (GPIOA_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOA_PIN_AVAILABLE)) == (GPIOA_PIN_AVAILABLE))) || \
-            (((__INSTANCE__) == GPIOB) && (((__PIN__) & (GPIOB_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOB_PIN_AVAILABLE)) == (GPIOB_PIN_AVAILABLE))) || \
-            (((__INSTANCE__) == GPIOC) && (((__PIN__) & (GPIOC_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOC_PIN_AVAILABLE)) == (GPIOC_PIN_AVAILABLE))) || \
-            (((__INSTANCE__) == GPIOD) && (((__PIN__) & (GPIOD_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOD_PIN_AVAILABLE)) == (GPIOD_PIN_AVAILABLE))) || \
-            (((__INSTANCE__) == GPIOE) && (((__PIN__) & (GPIOE_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOE_PIN_AVAILABLE)) == (GPIOE_PIN_AVAILABLE))) || \
-            (((__INSTANCE__) == GPIOH) && (((__PIN__) & (GPIOH_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOH_PIN_AVAILABLE)) == (GPIOH_PIN_AVAILABLE))))
-/**
-  * @}
-  */
-#elif defined (STM32L031xx) || defined (STM32L041xx)
-
-/** @addtogroup GPIOEx_Exported_Constants
- * @{
- */
-/** @defgroup GPIOEx_Pin_Available Pin available
- * @{
- */
-
-#define GPIOA_PIN_AVAILABLE  GPIO_PIN_All
-#define GPIOB_PIN_AVAILABLE  GPIO_PIN_All
-#define GPIOC_PIN_AVAILABLE  (GPIO_PIN_0 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15)
-#define GPIOH_PIN_AVAILABLE  (GPIO_PIN_0 | GPIO_PIN_1)
-/**
-  * @}
-  */
-/**
-  * @}
-  */
-
-/** @addtogroup GPIOEx_Private
- * @{
- */
-#define GPIO_GET_INDEX(__GPIOx__)    (((__GPIOx__) == (GPIOA))? 0U :\
-                                      ((__GPIOx__) == (GPIOB))? 1U :\
-                                      ((__GPIOx__) == (GPIOC))? 2U :\
-                                      ((__GPIOx__) == (GPIOH))? 5U : 6U)
-
-
-#define IS_GPIO_PIN_AVAILABLE(__INSTANCE__,__PIN__)  \
-           ((((__INSTANCE__) == GPIOA) && (((__PIN__) & (GPIOA_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOA_PIN_AVAILABLE)) == (GPIOA_PIN_AVAILABLE))) || \
-            (((__INSTANCE__) == GPIOB) && (((__PIN__) & (GPIOB_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOB_PIN_AVAILABLE)) == (GPIOB_PIN_AVAILABLE))) || \
-            (((__INSTANCE__) == GPIOC) && (((__PIN__) & (GPIOC_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOC_PIN_AVAILABLE)) == (GPIOC_PIN_AVAILABLE))) || \
-            (((__INSTANCE__) == GPIOH) && (((__PIN__) & (GPIOH_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOH_PIN_AVAILABLE)) == (GPIOH_PIN_AVAILABLE))))
-
-/**
-  * @}
-  */
-
-#elif defined (STM32L011xx) || defined (STM32L021xx)
-
-/** @addtogroup GPIOEx_Exported_Constants
- * @{
- */
-/** @defgroup GPIOEx_Pin_Available Pin available
- * @{
- */
-
-#define GPIOA_PIN_AVAILABLE  GPIO_PIN_All
-#define GPIOB_PIN_AVAILABLE  (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | \
-                              GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 )
-#define GPIOC_PIN_AVAILABLE  (GPIO_PIN_14 | GPIO_PIN_15)
-
-/**
-  * @}
-  */
-/**
-  * @}
-  */
-
-/** @addtogroup GPIOEx_Private
- * @{
- */
-#define GPIO_GET_INDEX(__GPIOx__)    (((__GPIOx__) == (GPIOA))? 0U :\
-                                      ((__GPIOx__) == (GPIOB))? 1U :\
-                                      ((__GPIOx__) == (GPIOC))? 2U : 6U)
-
-
-#define IS_GPIO_PIN_AVAILABLE(__INSTANCE__,__PIN__)  \
-           ((((__INSTANCE__) == GPIOA) && (((__PIN__) & (GPIOA_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOA_PIN_AVAILABLE)) == (GPIOA_PIN_AVAILABLE))) || \
-            (((__INSTANCE__) == GPIOB) && (((__PIN__) & (GPIOB_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOB_PIN_AVAILABLE)) == (GPIOB_PIN_AVAILABLE))) || \
-            (((__INSTANCE__) == GPIOC) && (((__PIN__) & (GPIOC_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOC_PIN_AVAILABLE)) == (GPIOC_PIN_AVAILABLE))))
-/**
-  * @}
-  */
-
-#elif defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-      defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx)
-
-/** @addtogroup GPIOEx_Exported_Constants
- * @{
- */
-/** @defgroup GPIOEx_Pin_Available Pin available
- * @{
- */
-#define GPIOA_PIN_AVAILABLE  GPIO_PIN_All
-#define GPIOB_PIN_AVAILABLE  GPIO_PIN_All
-#define GPIOC_PIN_AVAILABLE  GPIO_PIN_All
-#define GPIOD_PIN_AVAILABLE  GPIO_PIN_2
-#define GPIOH_PIN_AVAILABLE  GPIO_PIN_0 | GPIO_PIN_1
-/**
-  * @}
-  */
-/**
-  * @}
-  */
-
-/** @addtogroup GPIOEx_Private
- * @{
- */
-#define GPIO_GET_INDEX(__GPIOx__)    (((__GPIOx__) == (GPIOA))? 0U :\
-                                      ((__GPIOx__) == (GPIOB))? 1U :\
-                                      ((__GPIOx__) == (GPIOC))? 2U :\
-                                      ((__GPIOx__) == (GPIOD))? 3U :\
-                                      ((__GPIOx__) == (GPIOH))? 5U : 6U)
-
-#define IS_GPIO_PIN_AVAILABLE(__INSTANCE__,__PIN__)  \
-                ((((__INSTANCE__) == GPIOA) && (((__PIN__) & (GPIOA_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOA_PIN_AVAILABLE)) == (GPIOA_PIN_AVAILABLE))) || \
-                 (((__INSTANCE__) == GPIOB) && (((__PIN__) & (GPIOB_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOB_PIN_AVAILABLE)) == (GPIOB_PIN_AVAILABLE))) || \
-                 (((__INSTANCE__) == GPIOC) && (((__PIN__) & (GPIOC_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOC_PIN_AVAILABLE)) == (GPIOC_PIN_AVAILABLE))) || \
-                 (((__INSTANCE__) == GPIOD) && (((__PIN__) & (GPIOD_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOD_PIN_AVAILABLE)) == (GPIOD_PIN_AVAILABLE))) || \
-                 (((__INSTANCE__) == GPIOH) && (((__PIN__) & (GPIOH_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOH_PIN_AVAILABLE)) == (GPIOH_PIN_AVAILABLE))))
-/**
-  * @}
-  */
-
-#endif /* STM32L083xx || STM32L082xx || STM32L081xx || STM32L073xx || STM32L072xx || STM32L071xx*/
-
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_GPIO_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h
deleted file mode 100755
index 8f226f9a..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h
+++ /dev/null
@@ -1,708 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_i2c.h
-  * @author  MCD Application Team
-  * @brief   Header file of I2C HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_I2C_H
-#define __STM32L0xx_HAL_I2C_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup I2C
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup I2C_Exported_Types I2C Exported Types
-  * @{
-  */
-
-/** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
-  * @brief  I2C Configuration Structure definition
-  * @{
-  */
-typedef struct
-{
-  uint32_t Timing;              /*!< Specifies the I2C_TIMINGR_register value.
-                                  This parameter calculated by referring to I2C initialization
-                                         section in Reference manual */
-
-  uint32_t OwnAddress1;         /*!< Specifies the first device own address.
-                                  This parameter can be a 7-bit or 10-bit address. */
-
-  uint32_t AddressingMode;      /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
-                                  This parameter can be a value of @ref I2C_ADDRESSING_MODE */
-
-  uint32_t DualAddressMode;     /*!< Specifies if dual addressing mode is selected.
-                                  This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */
-
-  uint32_t OwnAddress2;         /*!< Specifies the second device own address if dual addressing mode is selected
-                                  This parameter can be a 7-bit address. */
-
-  uint32_t OwnAddress2Masks;    /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected
-                                  This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */
-
-  uint32_t GeneralCallMode;     /*!< Specifies if general call mode is selected.
-                                  This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */
-
-  uint32_t NoStretchMode;       /*!< Specifies if nostretch mode is selected.
-                                  This parameter can be a value of @ref I2C_NOSTRETCH_MODE */
-
-} I2C_InitTypeDef;
-
-/**
-  * @}
-  */
-
-/** @defgroup HAL_state_structure_definition HAL state structure definition
-  * @brief  HAL State structure definition
-  * @note  HAL I2C State value coding follow below described bitmap :\n
-  *          b7-b6  Error information\n
-  *             00 : No Error\n
-  *             01 : Abort (Abort user request on going)\n
-  *             10 : Timeout\n
-  *             11 : Error\n
-  *          b5     IP initilisation status\n
-  *             0  : Reset (IP not initialized)\n
-  *             1  : Init done (IP initialized and ready to use. HAL I2C Init function called)\n
-  *          b4     (not used)\n
-  *             x  : Should be set to 0\n
-  *          b3\n
-  *             0  : Ready or Busy (No Listen mode ongoing)\n
-  *             1  : Listen (IP in Address Listen Mode)\n
-  *          b2     Intrinsic process state\n
-  *             0  : Ready\n
-  *             1  : Busy (IP busy with some configuration or internal operations)\n
-  *          b1     Rx state\n
-  *             0  : Ready (no Rx operation ongoing)\n
-  *             1  : Busy (Rx operation ongoing)\n
-  *          b0     Tx state\n
-  *             0  : Ready (no Tx operation ongoing)\n
-  *             1  : Busy (Tx operation ongoing)
-  * @{
-  */
-typedef enum
-{
-  HAL_I2C_STATE_RESET             = 0x00U,   /*!< Peripheral is not yet Initialized         */
-  HAL_I2C_STATE_READY             = 0x20U,   /*!< Peripheral Initialized and ready for use  */
-  HAL_I2C_STATE_BUSY              = 0x24U,   /*!< An internal process is ongoing            */
-  HAL_I2C_STATE_BUSY_TX           = 0x21U,   /*!< Data Transmission process is ongoing      */
-  HAL_I2C_STATE_BUSY_RX           = 0x22U,   /*!< Data Reception process is ongoing         */
-  HAL_I2C_STATE_LISTEN            = 0x28U,   /*!< Address Listen Mode is ongoing            */
-  HAL_I2C_STATE_BUSY_TX_LISTEN    = 0x29U,   /*!< Address Listen Mode and Data Transmission
-                                                 process is ongoing                         */
-  HAL_I2C_STATE_BUSY_RX_LISTEN    = 0x2AU,   /*!< Address Listen Mode and Data Reception
-                                                 process is ongoing                         */
-  HAL_I2C_STATE_ABORT             = 0x60U,   /*!< Abort user request ongoing                */
-  HAL_I2C_STATE_TIMEOUT           = 0xA0U,   /*!< Timeout state                             */
-  HAL_I2C_STATE_ERROR             = 0xE0U    /*!< Error                                     */
-
-} HAL_I2C_StateTypeDef;
-
-/**
-  * @}
-  */
-
-/** @defgroup HAL_mode_structure_definition HAL mode structure definition
-  * @brief  HAL Mode structure definition
-  * @note  HAL I2C Mode value coding follow below described bitmap :\n
-  *          b7     (not used)\n
-  *             x  : Should be set to 0\n
-  *          b6\n
-  *             0  : None\n
-  *             1  : Memory (HAL I2C communication is in Memory Mode)\n
-  *          b5\n
-  *             0  : None\n
-  *             1  : Slave (HAL I2C communication is in Slave Mode)\n
-  *          b4\n
-  *             0  : None\n
-  *             1  : Master (HAL I2C communication is in Master Mode)\n
-  *          b3-b2-b1-b0  (not used)\n
-  *             xxxx : Should be set to 0000
-  * @{
-  */
-typedef enum
-{
-  HAL_I2C_MODE_NONE               = 0x00U,   /*!< No I2C communication on going             */
-  HAL_I2C_MODE_MASTER             = 0x10U,   /*!< I2C communication is in Master Mode       */
-  HAL_I2C_MODE_SLAVE              = 0x20U,   /*!< I2C communication is in Slave Mode        */
-  HAL_I2C_MODE_MEM                = 0x40U    /*!< I2C communication is in Memory Mode       */
-
-} HAL_I2C_ModeTypeDef;
-
-/**
-  * @}
-  */
-
-/** @defgroup I2C_Error_Code_definition I2C Error Code definition
-  * @brief  I2C Error Code definition
-  * @{
-  */
-#define HAL_I2C_ERROR_NONE      (0x00000000U)    /*!< No error              */
-#define HAL_I2C_ERROR_BERR      (0x00000001U)    /*!< BERR error            */
-#define HAL_I2C_ERROR_ARLO      (0x00000002U)    /*!< ARLO error            */
-#define HAL_I2C_ERROR_AF        (0x00000004U)    /*!< ACKF error            */
-#define HAL_I2C_ERROR_OVR       (0x00000008U)    /*!< OVR error             */
-#define HAL_I2C_ERROR_DMA       (0x00000010U)    /*!< DMA transfer error    */
-#define HAL_I2C_ERROR_TIMEOUT   (0x00000020U)    /*!< Timeout error         */
-#define HAL_I2C_ERROR_SIZE      (0x00000040U)    /*!< Size Management error */
-/**
-  * @}
-  */
-
-/** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
-  * @brief  I2C handle Structure definition
-  * @{
-  */
-typedef struct __I2C_HandleTypeDef
-{
-  I2C_TypeDef                *Instance;      /*!< I2C registers base address                */
-
-  I2C_InitTypeDef            Init;           /*!< I2C communication parameters              */
-
-  uint8_t                    *pBuffPtr;      /*!< Pointer to I2C transfer buffer            */
-
-  uint16_t                   XferSize;       /*!< I2C transfer size                         */
-
-  __IO uint16_t              XferCount;      /*!< I2C transfer counter                      */
-
-  __IO uint32_t              XferOptions;    /*!< I2C sequantial transfer options, this parameter can
-                                                  be a value of @ref I2C_XFEROPTIONS */
-
-  __IO uint32_t              PreviousState;  /*!< I2C communication Previous state          */
-
-  HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);  /*!< I2C transfer IRQ handler function pointer */
-
-  DMA_HandleTypeDef          *hdmatx;        /*!< I2C Tx DMA handle parameters              */
-
-  DMA_HandleTypeDef          *hdmarx;        /*!< I2C Rx DMA handle parameters              */
-
-  HAL_LockTypeDef            Lock;           /*!< I2C locking object                        */
-
-  __IO HAL_I2C_StateTypeDef  State;          /*!< I2C communication state                   */
-
-  __IO HAL_I2C_ModeTypeDef   Mode;           /*!< I2C communication mode                    */
-
-  __IO uint32_t              ErrorCode;      /*!< I2C Error code                            */
-
-  __IO uint32_t              AddrEventCount; /*!< I2C Address Event counter                 */
-} I2C_HandleTypeDef;
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup I2C_Exported_Constants I2C Exported Constants
-  * @{
-  */
-
-/** @defgroup I2C_XFEROPTIONS  I2C Sequential Transfer Options
-  * @{
-  */
-#define I2C_FIRST_FRAME                 ((uint32_t)I2C_SOFTEND_MODE)
-#define I2C_FIRST_AND_NEXT_FRAME        ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
-#define I2C_NEXT_FRAME                  ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
-#define I2C_FIRST_AND_LAST_FRAME        ((uint32_t)I2C_AUTOEND_MODE)
-#define I2C_LAST_FRAME                  ((uint32_t)I2C_AUTOEND_MODE)
-/**
-  * @}
-  */
-
-/** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode
-  * @{
-  */
-#define I2C_ADDRESSINGMODE_7BIT         (0x00000001U)
-#define I2C_ADDRESSINGMODE_10BIT        (0x00000002U)
-/**
-  * @}
-  */
-
-/** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode
-  * @{
-  */
-#define I2C_DUALADDRESS_DISABLE         (0x00000000U)
-#define I2C_DUALADDRESS_ENABLE          I2C_OAR2_OA2EN
-/**
-  * @}
-  */
-
-/** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks
-  * @{
-  */
-#define I2C_OA2_NOMASK                  ((uint8_t)0x00U)
-#define I2C_OA2_MASK01                  ((uint8_t)0x01U)
-#define I2C_OA2_MASK02                  ((uint8_t)0x02U)
-#define I2C_OA2_MASK03                  ((uint8_t)0x03U)
-#define I2C_OA2_MASK04                  ((uint8_t)0x04U)
-#define I2C_OA2_MASK05                  ((uint8_t)0x05U)
-#define I2C_OA2_MASK06                  ((uint8_t)0x06U)
-#define I2C_OA2_MASK07                  ((uint8_t)0x07U)
-/**
-  * @}
-  */
-
-/** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode
-  * @{
-  */
-#define I2C_GENERALCALL_DISABLE         (0x00000000U)
-#define I2C_GENERALCALL_ENABLE          I2C_CR1_GCEN
-/**
-  * @}
-  */
-
-/** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode
-  * @{
-  */
-#define I2C_NOSTRETCH_DISABLE           (0x00000000U)
-#define I2C_NOSTRETCH_ENABLE            I2C_CR1_NOSTRETCH
-/**
-  * @}
-  */
-
-/** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size
-  * @{
-  */
-#define I2C_MEMADD_SIZE_8BIT            (0x00000001U)
-#define I2C_MEMADD_SIZE_16BIT           (0x00000002U)
-/**
-  * @}
-  */
-
-/** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View
-  * @{
-  */
-#define I2C_DIRECTION_TRANSMIT          (0x00000000U)
-#define I2C_DIRECTION_RECEIVE           (0x00000001U)
-/**
-  * @}
-  */
-
-/** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode
-  * @{
-  */
-#define  I2C_RELOAD_MODE                I2C_CR2_RELOAD
-#define  I2C_AUTOEND_MODE               I2C_CR2_AUTOEND
-#define  I2C_SOFTEND_MODE               (0x00000000U)
-/**
-  * @}
-  */
-
-/** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode
-  * @{
-  */
-#define  I2C_NO_STARTSTOP               (0x00000000U)
-#define  I2C_GENERATE_STOP              (uint32_t)(0x80000000U | I2C_CR2_STOP)
-#define  I2C_GENERATE_START_READ        (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
-#define  I2C_GENERATE_START_WRITE       (uint32_t)(0x80000000U | I2C_CR2_START)
-/**
-  * @}
-  */
-
-/** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
-  * @brief I2C Interrupt definition
-  *        Elements values convention: 0xXXXXXXXX
-  *           - XXXXXXXX  : Interrupt control mask
-  * @{
-  */
-#define I2C_IT_ERRI                     I2C_CR1_ERRIE
-#define I2C_IT_TCI                      I2C_CR1_TCIE
-#define I2C_IT_STOPI                    I2C_CR1_STOPIE
-#define I2C_IT_NACKI                    I2C_CR1_NACKIE
-#define I2C_IT_ADDRI                    I2C_CR1_ADDRIE
-#define I2C_IT_RXI                      I2C_CR1_RXIE
-#define I2C_IT_TXI                      I2C_CR1_TXIE
-/**
-  * @}
-  */
-
-/** @defgroup I2C_Flag_definition I2C Flag definition
-  * @{
-  */
-#define I2C_FLAG_TXE                    I2C_ISR_TXE
-#define I2C_FLAG_TXIS                   I2C_ISR_TXIS
-#define I2C_FLAG_RXNE                   I2C_ISR_RXNE
-#define I2C_FLAG_ADDR                   I2C_ISR_ADDR
-#define I2C_FLAG_AF                     I2C_ISR_NACKF
-#define I2C_FLAG_STOPF                  I2C_ISR_STOPF
-#define I2C_FLAG_TC                     I2C_ISR_TC
-#define I2C_FLAG_TCR                    I2C_ISR_TCR
-#define I2C_FLAG_BERR                   I2C_ISR_BERR
-#define I2C_FLAG_ARLO                   I2C_ISR_ARLO
-#define I2C_FLAG_OVR                    I2C_ISR_OVR
-#define I2C_FLAG_PECERR                 I2C_ISR_PECERR
-#define I2C_FLAG_TIMEOUT                I2C_ISR_TIMEOUT
-#define I2C_FLAG_ALERT                  I2C_ISR_ALERT
-#define I2C_FLAG_BUSY                   I2C_ISR_BUSY
-#define I2C_FLAG_DIR                    I2C_ISR_DIR
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macros -----------------------------------------------------------*/
-
-/** @defgroup I2C_Exported_Macros I2C Exported Macros
-  * @{
-  */
-
-/** @brief Reset I2C handle state.
-  * @param  __HANDLE__ specifies the I2C Handle.
-  * @retval None
-  */
-#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__)                ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
-
-/** @brief  Enable the specified I2C interrupt.
-  * @param  __HANDLE__ specifies the I2C Handle.
-  * @param  __INTERRUPT__ specifies the interrupt source to enable.
-  *        This parameter can be one of the following values:
-  *            @arg @ref I2C_IT_ERRI  Errors interrupt enable
-  *            @arg @ref I2C_IT_TCI   Transfer complete interrupt enable
-  *            @arg @ref I2C_IT_STOPI STOP detection interrupt enable
-  *            @arg @ref I2C_IT_NACKI NACK received interrupt enable
-  *            @arg @ref I2C_IT_ADDRI Address match interrupt enable
-  *            @arg @ref I2C_IT_RXI   RX interrupt enable
-  *            @arg @ref I2C_IT_TXI   TX interrupt enable
-  *
-  * @retval None
-  */
-#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__)          ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
-
-/** @brief  Disable the specified I2C interrupt.
-  * @param  __HANDLE__ specifies the I2C Handle.
-  * @param  __INTERRUPT__ specifies the interrupt source to disable.
-  *        This parameter can be one of the following values:
-  *            @arg @ref I2C_IT_ERRI  Errors interrupt enable
-  *            @arg @ref I2C_IT_TCI   Transfer complete interrupt enable
-  *            @arg @ref I2C_IT_STOPI STOP detection interrupt enable
-  *            @arg @ref I2C_IT_NACKI NACK received interrupt enable
-  *            @arg @ref I2C_IT_ADDRI Address match interrupt enable
-  *            @arg @ref I2C_IT_RXI   RX interrupt enable
-  *            @arg @ref I2C_IT_TXI   TX interrupt enable
-  *
-  * @retval None
-  */
-#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__)         ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
-
-/** @brief  Check whether the specified I2C interrupt source is enabled or not.
-  * @param  __HANDLE__ specifies the I2C Handle.
-  * @param  __INTERRUPT__ specifies the I2C interrupt source to check.
-  *          This parameter can be one of the following values:
-  *            @arg @ref I2C_IT_ERRI  Errors interrupt enable
-  *            @arg @ref I2C_IT_TCI   Transfer complete interrupt enable
-  *            @arg @ref I2C_IT_STOPI STOP detection interrupt enable
-  *            @arg @ref I2C_IT_NACKI NACK received interrupt enable
-  *            @arg @ref I2C_IT_ADDRI Address match interrupt enable
-  *            @arg @ref I2C_IT_RXI   RX interrupt enable
-  *            @arg @ref I2C_IT_TXI   TX interrupt enable
-  *
-  * @retval The new state of __INTERRUPT__ (SET or RESET).
-  */
-#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)      ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
-
-/** @brief  Check whether the specified I2C flag is set or not.
-  * @param  __HANDLE__ specifies the I2C Handle.
-  * @param  __FLAG__ specifies the flag to check.
-  *        This parameter can be one of the following values:
-  *            @arg @ref I2C_FLAG_TXE     Transmit data register empty
-  *            @arg @ref I2C_FLAG_TXIS    Transmit interrupt status
-  *            @arg @ref I2C_FLAG_RXNE    Receive data register not empty
-  *            @arg @ref I2C_FLAG_ADDR    Address matched (slave mode)
-  *            @arg @ref I2C_FLAG_AF      Acknowledge failure received flag
-  *            @arg @ref I2C_FLAG_STOPF   STOP detection flag
-  *            @arg @ref I2C_FLAG_TC      Transfer complete (master mode)
-  *            @arg @ref I2C_FLAG_TCR     Transfer complete reload
-  *            @arg @ref I2C_FLAG_BERR    Bus error
-  *            @arg @ref I2C_FLAG_ARLO    Arbitration lost
-  *            @arg @ref I2C_FLAG_OVR     Overrun/Underrun
-  *            @arg @ref I2C_FLAG_PECERR  PEC error in reception
-  *            @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
-  *            @arg @ref I2C_FLAG_ALERT   SMBus alert
-  *            @arg @ref I2C_FLAG_BUSY    Bus busy
-  *            @arg @ref I2C_FLAG_DIR     Transfer direction (slave mode)
-  *
-  * @retval The new state of __FLAG__ (SET or RESET).
-  */
-#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
-
-/** @brief  Clear the I2C pending flags which are cleared by writing 1 in a specific bit.
-  * @param  __HANDLE__ specifies the I2C Handle.
-  * @param  __FLAG__ specifies the flag to clear.
-  *          This parameter can be any combination of the following values:
-  *            @arg @ref I2C_FLAG_TXE     Transmit data register empty
-  *            @arg @ref I2C_FLAG_ADDR    Address matched (slave mode)
-  *            @arg @ref I2C_FLAG_AF      Acknowledge failure received flag
-  *            @arg @ref I2C_FLAG_STOPF   STOP detection flag
-  *            @arg @ref I2C_FLAG_BERR    Bus error
-  *            @arg @ref I2C_FLAG_ARLO    Arbitration lost
-  *            @arg @ref I2C_FLAG_OVR     Overrun/Underrun
-  *            @arg @ref I2C_FLAG_PECERR  PEC error in reception
-  *            @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
-  *            @arg @ref I2C_FLAG_ALERT   SMBus alert
-  *
-  * @retval None
-  */
-#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \
-                                                                                 : ((__HANDLE__)->Instance->ICR = (__FLAG__)))
-
-/** @brief  Enable the specified I2C peripheral.
-  * @param  __HANDLE__ specifies the I2C Handle.
-  * @retval None
-  */
-#define __HAL_I2C_ENABLE(__HANDLE__)                            (SET_BIT((__HANDLE__)->Instance->CR1,  I2C_CR1_PE))
-
-/** @brief  Disable the specified I2C peripheral.
-  * @param  __HANDLE__ specifies the I2C Handle.
-  * @retval None
-  */
-#define __HAL_I2C_DISABLE(__HANDLE__)                           (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
-
-/** @brief  Generate a Non-Acknowledge I2C peripheral in Slave mode.
-  * @param  __HANDLE__ specifies the I2C Handle.
-  * @retval None
-  */
-#define __HAL_I2C_GENERATE_NACK(__HANDLE__)                     (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
-/**
-  * @}
-  */
-
-/* Include I2C HAL Extended module */
-#include "stm32l0xx_hal_i2c_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup I2C_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
-  * @{
-  */
-/* Initialization and de-initialization functions******************************/
-HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
-HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
-/**
-  * @}
-  */
-
-/** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
-  * @{
-  */
-/* IO operation functions  ****************************************************/
-/******* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
-
-/******* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
-
-HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
-HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
-HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
-
-/******* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
-/**
-  * @}
-  */
-
-/** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
- * @{
- */
-/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
-void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
-void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
-/**
-  * @}
-  */
-
-/** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
-  * @{
-  */
-/* Peripheral State, Mode and Error functions  *********************************/
-HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
-HAL_I2C_ModeTypeDef  HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
-uint32_t             HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup I2C_Private_Constants I2C Private Constants
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup I2C_Private_Macro I2C Private Macros
-  * @{
-  */
-
-#define IS_I2C_ADDRESSING_MODE(MODE)    (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
-                                         ((MODE) == I2C_ADDRESSINGMODE_10BIT))
-
-#define IS_I2C_DUAL_ADDRESS(ADDRESS)    (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
-                                         ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
-
-#define IS_I2C_OWN_ADDRESS2_MASK(MASK)  (((MASK) == I2C_OA2_NOMASK)  || \
-                                         ((MASK) == I2C_OA2_MASK01) || \
-                                         ((MASK) == I2C_OA2_MASK02) || \
-                                         ((MASK) == I2C_OA2_MASK03) || \
-                                         ((MASK) == I2C_OA2_MASK04) || \
-                                         ((MASK) == I2C_OA2_MASK05) || \
-                                         ((MASK) == I2C_OA2_MASK06) || \
-                                         ((MASK) == I2C_OA2_MASK07))
-
-#define IS_I2C_GENERAL_CALL(CALL)       (((CALL) == I2C_GENERALCALL_DISABLE) || \
-                                         ((CALL) == I2C_GENERALCALL_ENABLE))
-
-#define IS_I2C_NO_STRETCH(STRETCH)      (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
-                                         ((STRETCH) == I2C_NOSTRETCH_ENABLE))
-
-#define IS_I2C_MEMADD_SIZE(SIZE)        (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
-                                         ((SIZE) == I2C_MEMADD_SIZE_16BIT))
-
-#define IS_TRANSFER_MODE(MODE)          (((MODE) == I2C_RELOAD_MODE)   || \
-                                         ((MODE) == I2C_AUTOEND_MODE) || \
-                                         ((MODE) == I2C_SOFTEND_MODE))
-
-#define IS_TRANSFER_REQUEST(REQUEST)    (((REQUEST) == I2C_GENERATE_STOP)        || \
-                                         ((REQUEST) == I2C_GENERATE_START_READ)  || \
-                                         ((REQUEST) == I2C_GENERATE_START_WRITE) || \
-                                         ((REQUEST) == I2C_NO_STARTSTOP))
-
-#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST)  (((REQUEST) == I2C_FIRST_FRAME)          || \
-                                                   ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
-                                                   ((REQUEST) == I2C_NEXT_FRAME)           || \
-                                                   ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
-                                                   ((REQUEST) == I2C_LAST_FRAME))
-
-#define I2C_RESET_CR2(__HANDLE__)                 ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
-
-#define I2C_GET_ADDR_MATCH(__HANDLE__)            (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U)
-#define I2C_GET_DIR(__HANDLE__)                   (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)
-#define I2C_GET_STOP_MODE(__HANDLE__)             ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
-#define I2C_GET_OWN_ADDRESS1(__HANDLE__)          ((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)
-#define I2C_GET_OWN_ADDRESS2(__HANDLE__)          ((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)
-
-#define IS_I2C_OWN_ADDRESS1(ADDRESS1)             ((ADDRESS1) <= 0x000003FFU)
-#define IS_I2C_OWN_ADDRESS2(ADDRESS2)             ((ADDRESS2) <= (uint16_t)0x00FFU)
-
-#define I2C_MEM_ADD_MSB(__ADDRESS__)              ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U)))
-#define I2C_MEM_ADD_LSB(__ADDRESS__)              ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
-
-#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
-                                                          (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
-/**
-  * @}
-  */
-
-/* Private Functions ---------------------------------------------------------*/
-/** @defgroup I2C_Private_Functions I2C Private Functions
-  * @{
-  */
-/* Private functions are defined in stm32l0xx_hal_i2c.c file */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif /* __STM32L0xx_HAL_I2C_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h
deleted file mode 100755
index 4d1b4b3f..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h
+++ /dev/null
@@ -1,179 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_i2c_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of I2C HAL Extended module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_I2C_EX_H
-#define __STM32L0xx_HAL_I2C_EX_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup I2CEx
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants
-  * @{
-  */
-
-/** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter
-  * @{
-  */
-#define I2C_ANALOGFILTER_ENABLE         0x00000000U
-#define I2C_ANALOGFILTER_DISABLE        I2C_CR1_ANFOFF
-/**
-  * @}
-  */
-
-/** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus
-  * @{
-  */
-#define I2C_FMP_NOT_SUPPORTED           0xAAAA0000U                                     /*!< Fast Mode Plus not supported       */
-#define I2C_FASTMODEPLUS_PB6            SYSCFG_CFGR2_I2C_PB6_FMP                        /*!< Enable Fast Mode Plus on PB6       */
-#define I2C_FASTMODEPLUS_PB7            SYSCFG_CFGR2_I2C_PB7_FMP                        /*!< Enable Fast Mode Plus on PB7       */
-#define I2C_FASTMODEPLUS_PB8            SYSCFG_CFGR2_I2C_PB8_FMP                        /*!< Enable Fast Mode Plus on PB8       */
-#define I2C_FASTMODEPLUS_PB9            SYSCFG_CFGR2_I2C_PB9_FMP                        /*!< Enable Fast Mode Plus on PB9       */
-#define I2C_FASTMODEPLUS_I2C1           SYSCFG_CFGR2_I2C1_FMP                           /*!< Enable Fast Mode Plus on I2C1 pins */
-#if defined(SYSCFG_CFGR2_I2C2_FMP)
-#define I2C_FASTMODEPLUS_I2C2           SYSCFG_CFGR2_I2C2_FMP                           /*!< Enable Fast Mode Plus on I2C2 pins */
-#else
-#define I2C_FASTMODEPLUS_I2C2           (uint32_t)(0x00000200U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C2 not supported  */
-#endif
-#if defined(SYSCFG_CFGR2_I2C3_FMP)
-#define I2C_FASTMODEPLUS_I2C3           SYSCFG_CFGR2_I2C3_FMP                           /*!< Enable Fast Mode Plus on I2C3 pins */
-#else
-#define I2C_FASTMODEPLUS_I2C3           (uint32_t)(0x00000400U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C3 not supported  */
-#endif
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions
-  * @{
-  */
-
-/** @addtogroup I2CEx_Exported_Functions_Group1 Extended features functions
-  * @brief    Extended features functions
-  * @{
-  */
-
-/* Peripheral Control functions  ************************************************/
-HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter);
-HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter);
-HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c);
-HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c);
-void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus);
-void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup I2CEx_Private_Constants I2C Extended Private Constants
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup I2CEx_Private_Macro I2C Extended Private Macros
-  * @{
-  */
-#define IS_I2C_ANALOG_FILTER(FILTER)    (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \
-                                          ((FILTER) == I2C_ANALOGFILTER_DISABLE))
-
-#define IS_I2C_DIGITAL_FILTER(FILTER)   ((FILTER) <= 0x0000000FU)
-
-#define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FMP_NOT_SUPPORTED) != I2C_FMP_NOT_SUPPORTED) && \
-                                         ((((__CONFIG__) & (I2C_FASTMODEPLUS_PB6))  == I2C_FASTMODEPLUS_PB6)     || \
-                                          (((__CONFIG__) & (I2C_FASTMODEPLUS_PB7))  == I2C_FASTMODEPLUS_PB7)     || \
-                                          (((__CONFIG__) & (I2C_FASTMODEPLUS_PB8))  == I2C_FASTMODEPLUS_PB8)     || \
-                                          (((__CONFIG__) & (I2C_FASTMODEPLUS_PB9))  == I2C_FASTMODEPLUS_PB9)     || \
-                                          (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1)    || \
-                                          (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2)    || \
-                                          (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3)))
-/**
-  * @}
-  */
-
-/* Private Functions ---------------------------------------------------------*/
-/** @defgroup I2CEx_Private_Functions I2C Extended Private Functions
-  * @{
-  */
-/* Private functions are defined in stm32l0xx_hal_i2c_ex.c file */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_I2C_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2s.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2s.h
deleted file mode 100755
index 1f50039f..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2s.h
+++ /dev/null
@@ -1,479 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_i2s.h
-  * @author  MCD Application Team
-  * @brief   Header file of I2S HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_I2S_H
-#define __STM32L0xx_HAL_I2S_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#if !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L011xx) && !defined (STM32L021xx)
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"  
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup I2S I2S
-  * @{
-  */ 
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup I2S_Exported_Types I2S Exported Types
-  * @{
-  */
-
-/** 
-  * @brief I2S Init structure definition  
-  */
-typedef struct
-{
-  uint32_t Mode;         /*!< Specifies the I2S operating mode.
-                              This parameter can be a value of @ref I2S_Mode */
-
-  uint32_t Standard;     /*!< Specifies the standard used for the I2S communication.
-                              This parameter can be a value of @ref I2S_Standard */
-
-  uint32_t DataFormat;   /*!< Specifies the data format for the I2S communication.
-                              This parameter can be a value of @ref I2S_Data_Format */
-
-  uint32_t MCLKOutput;   /*!< Specifies whether the I2S MCLK output is enabled or not.
-                              This parameter can be a value of @ref I2S_MCLK_Output */
-
-  uint32_t AudioFreq;    /*!< Specifies the frequency selected for the I2S communication.
-                              This parameter can be a value of @ref I2S_Audio_Frequency */
-
-  uint32_t CPOL;         /*!< Specifies the idle state of the I2S clock.
-                              This parameter can be a value of @ref I2S_Clock_Polarity */
-
-}I2S_InitTypeDef;
-
-/** 
-  * @brief  HAL State structures definition
-  */ 
-typedef enum
-{
-  HAL_I2S_STATE_RESET      = 0x00U,  /*!< I2S not yet initialized or disabled                */
-  HAL_I2S_STATE_READY      = 0x01U,  /*!< I2S initialized and ready for use                  */
-  HAL_I2S_STATE_BUSY       = 0x02U,  /*!< I2S internal process is ongoing                    */   
-  HAL_I2S_STATE_BUSY_TX    = 0x12U,  /*!< Data Transmission process is ongoing               */ 
-  HAL_I2S_STATE_BUSY_RX    = 0x22U,  /*!< Data Reception process is ongoing                  */
-  HAL_I2S_STATE_TIMEOUT    = 0x03U,  /*!< I2S timeout state                                  */ 
-  HAL_I2S_STATE_ERROR      = 0x04U   /*!< I2S error state                                    */      
-}HAL_I2S_StateTypeDef;
-
-/** 
-  * @brief I2S handle Structure definition  
-  */
-typedef struct
-{
-  SPI_TypeDef                *Instance;    /* I2S registers base address        */
-
-  I2S_InitTypeDef            Init;         /* I2S communication parameters      */
-  
-  uint16_t                   *pTxBuffPtr;  /* Pointer to I2S Tx transfer buffer */
-  
-  __IO uint16_t              TxXferSize;   /* I2S Tx transfer size              */
-  
-  __IO uint16_t              TxXferCount;  /* I2S Tx transfer Counter           */
-  
-  uint16_t                   *pRxBuffPtr;  /* Pointer to I2S Rx transfer buffer */
-  
-  __IO uint16_t              RxXferSize;   /* I2S Rx transfer size              */
-  
-  __IO uint16_t              RxXferCount;  /* I2S Rx transfer counter 
-                                              (This field is initialized at the 
-                                               same value as transfer size at the 
-                                               beginning of the transfer and 
-                                               decremented when a sample is received. 
-                                               NbSamplesReceived = RxBufferSize-RxBufferCount) */
-
-  DMA_HandleTypeDef          *hdmatx;      /* I2S Tx DMA handle parameters      */
-
-  DMA_HandleTypeDef          *hdmarx;      /* I2S Rx DMA handle parameters      */
-  
-  __IO HAL_LockTypeDef       Lock;         /* I2S locking object                */
-  
-  __IO HAL_I2S_StateTypeDef  State;        /* I2S communication state           */
-
-  __IO  uint32_t             ErrorCode;    /* I2S Error code                    */
-
-}I2S_HandleTypeDef;
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup I2S_Exported_Constants I2S Exported Constants
-  * @{
-  */
-
-/**
-  * @defgroup  I2S_ErrorCode I2S Error Code
-  * @{
-  */
-#define HAL_I2S_ERROR_NONE      ((uint32_t)0x00U)    /*!< No error                    */
-#define HAL_I2S_ERROR_UDR       ((uint32_t)0x01U)    /*!< I2S Underrun error          */
-#define HAL_I2S_ERROR_OVR       ((uint32_t)0x02U)    /*!< I2S Overrun error           */
-#define HAL_I2S_ERROR_FRE       ((uint32_t)0x04U)    /*!< I2S Frame format error      */
-#define HAL_I2S_ERROR_DMA       ((uint32_t)0x08U)    /*!< DMA transfer error          */
-  /**
-    * @}
-    */
-
-/** @defgroup I2S_Mode I2S Mode
-  * @{
-  */
-#define I2S_MODE_SLAVE_TX                ((uint32_t) 0x00000000U)
-#define I2S_MODE_SLAVE_RX                ((uint32_t) SPI_I2SCFGR_I2SCFG_0)
-#define I2S_MODE_MASTER_TX               ((uint32_t) SPI_I2SCFGR_I2SCFG_1)
-#define I2S_MODE_MASTER_RX               ((uint32_t)(SPI_I2SCFGR_I2SCFG_0 |\
-                                                     SPI_I2SCFGR_I2SCFG_1))
-/**
-  * @}
-  */
-  
-/** @defgroup I2S_Standard I2S Standard
-  * @{
-  */
-#define I2S_STANDARD_PHILIPS             ((uint32_t) 0x00000000U)
-#define I2S_STANDARD_MSB                 ((uint32_t) SPI_I2SCFGR_I2SSTD_0)
-#define I2S_STANDARD_LSB                 ((uint32_t) SPI_I2SCFGR_I2SSTD_1)
-#define I2S_STANDARD_PCM_SHORT           ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\
-                                                     SPI_I2SCFGR_I2SSTD_1))
-#define I2S_STANDARD_PCM_LONG            ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\
-                                                     SPI_I2SCFGR_I2SSTD_1 |\
-                                                     SPI_I2SCFGR_PCMSYNC))
-/** @defgroup I2S_Legacy I2S Legacy
-  * @{
-  */
-#define I2S_STANDARD_PHILLIPS      I2S_STANDARD_PHILIPS
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-/** @defgroup I2S_Data_Format I2S Data Format
-  * @{
-  */
-#define I2S_DATAFORMAT_16B               ((uint32_t) 0x00000000U)
-#define I2S_DATAFORMAT_16B_EXTENDED      ((uint32_t) SPI_I2SCFGR_CHLEN)
-#define I2S_DATAFORMAT_24B               ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0))
-#define I2S_DATAFORMAT_32B               ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1))
-/**
-  * @}
-  */
-
-/** @defgroup I2S_MCLK_Output I2S MCLK Output
-  * @{
-  */
-#define I2S_MCLKOUTPUT_ENABLE           ((uint32_t)SPI_I2SPR_MCKOE)
-#define I2S_MCLKOUTPUT_DISABLE          ((uint32_t)0x00000000U)
-/**
-  * @}
-  */
-
-/** @defgroup I2S_Audio_Frequency I2S Audio Frequency
-  * @{
-  */
-#define I2S_AUDIOFREQ_192K               ((uint32_t)192000U)
-#define I2S_AUDIOFREQ_96K                ((uint32_t)96000U)
-#define I2S_AUDIOFREQ_48K                ((uint32_t)48000U)
-#define I2S_AUDIOFREQ_44K                ((uint32_t)44100U)
-#define I2S_AUDIOFREQ_32K                ((uint32_t)32000U)
-#define I2S_AUDIOFREQ_22K                ((uint32_t)22050U)
-#define I2S_AUDIOFREQ_16K                ((uint32_t)16000U)
-#define I2S_AUDIOFREQ_11K                ((uint32_t)11025U)
-#define I2S_AUDIOFREQ_8K                 ((uint32_t)8000U)
-#define I2S_AUDIOFREQ_DEFAULT            ((uint32_t)2U)
-/**
-  * @}
-  */
-
-/** @defgroup I2S_Clock_Polarity I2S Clock Polarity
-  * @{
-  */
-#define I2S_CPOL_LOW                    ((uint32_t)0x00000000U)
-#define I2S_CPOL_HIGH                   ((uint32_t)SPI_I2SCFGR_CKPOL)
-/**
-  * @}
-  */
-
-/** @defgroup I2S_Interrupt_configuration_definition I2S Interrupt configuration definition
-  * @{
-  */
-#define I2S_IT_TXE                      SPI_CR2_TXEIE
-#define I2S_IT_RXNE                     SPI_CR2_RXNEIE
-#define I2S_IT_ERR                      SPI_CR2_ERRIE
-/**
-  * @}
-  */
-
-/** @defgroup I2S_Flag_definition I2S Flag definition
-  * @{
-  */
-#define I2S_FLAG_TXE                    SPI_SR_TXE
-#define I2S_FLAG_RXNE                   SPI_SR_RXNE
-
-#define I2S_FLAG_UDR                    SPI_SR_UDR
-#define I2S_FLAG_OVR                    SPI_SR_OVR
-#define I2S_FLAG_FRE                    SPI_SR_FRE
-
-#define I2S_FLAG_CHSIDE                 SPI_SR_CHSIDE
-#define I2S_FLAG_BSY                    SPI_SR_BSY
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */ 
-  
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup I2S_Exported_Macros I2S Exported Macros
-  * @{
-  */
-
-/** @brief  Reset I2S handle state
-  * @param  __HANDLE__: specifies the I2S Handle.
-  * @retval None
-  */
-#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
-
-/** @brief  Enable the specified SPI peripheral (in I2S mode).
-  * @param  __HANDLE__: specifies the I2S Handle. 
-  * @retval None
-  */
-#define __HAL_I2S_ENABLE(__HANDLE__)    (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
-
-/** @brief  Disable the specified SPI peripheral (in I2S mode).
-  * @param  __HANDLE__: specifies the I2S Handle. 
-  * @retval None
-  */
-#define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
-
-/** @brief  Enable the specified I2S interrupts.
-  * @param  __HANDLE__: specifies the I2S Handle.
-  * @param  __INTERRUPT__: specifies the interrupt source to enable or disable.
-  *         This parameter can be one of the following values:
-  *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
-  *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
-  *            @arg I2S_IT_ERR: Error interrupt enable
-  * @retval None
-  */  
-#define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__)    (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
-
-/** @brief  Disable the specified I2S interrupts.
-  * @param  __HANDLE__: specifies the I2S Handle.
-  * @param  __INTERRUPT__: specifies the interrupt source to enable or disable.
-  *         This parameter can be one of the following values:
-  *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
-  *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
-  *            @arg I2S_IT_ERR: Error interrupt enable
-  * @retval None
-  */ 
-#define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
- 
-/** @brief  Checks if the specified I2S interrupt source is enabled or disabled.
-  * @param  __HANDLE__: specifies the I2S Handle.
-  *         This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
-  * @param  __INTERRUPT__: specifies the I2S interrupt source to check.
-  *          This parameter can be one of the following values:
-  *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
-  *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
-  *            @arg I2S_IT_ERR: Error interrupt enable
-  * @retval The new state of __IT__ (TRUE or FALSE).
-  */
-#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
-
-/** @brief  Checks whether the specified I2S flag is set or not.
-  * @param  __HANDLE__: specifies the I2S Handle.
-  * @param  __FLAG__: specifies the flag to check.
-  *         This parameter can be one of the following values:
-  *            @arg I2S_FLAG_RXNE: Receive buffer not empty flag
-  *            @arg I2S_FLAG_TXE: Transmit buffer empty flag
-  *            @arg I2S_FLAG_UDR: Underrun flag
-  *            @arg I2S_FLAG_OVR: Overrun flag
-  *            @arg I2S_FLAG_CHSIDE: Channel Side flag
-  *            @arg I2S_FLAG_BSY: Busy flag
-  * @retval The new state of __FLAG__ (TRUE or FALSE).
-  */
-#define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
-
-/** @brief Clears the I2S OVR pending flag.
-  * @param  __HANDLE__: specifies the I2S Handle.
-  * @retval None
-  */                                                                                                   
-#define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{__IO uint32_t tmpreg = (__HANDLE__)->Instance->DR;\
-                                                             tmpreg = (__HANDLE__)->Instance->SR;\
-                                                             UNUSED(tmpreg);\
-                                              }while(0)
-/** @brief Clears the I2S UDR pending flag.
-  * @param  __HANDLE__: specifies the I2S Handle.
-  * @retval None
-  */
-#define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__)((__HANDLE__)->Instance->SR)
-/**
-  * @}
-  */ 
-                                                
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup I2S_Exported_Functions I2S Exported Functions
-  * @{
-  */
-                                                
-/** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions
-  * @{
-  */
-/* Initialization/de-initialization functions  ********************************/
-HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
-HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
-void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
-void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
-/**
-  * @}
-  */
-
-/** @defgroup I2S_Exported_Functions_Group2 IO operation functions
-  * @{
-  */
-/* I/O operation functions  ***************************************************/
- /* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
-
- /* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
-void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
-
-/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
-
-HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
-HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
-HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
-
-/* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
-void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
-void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
-void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
-void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
-void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
-/**
-  * @}
-  */
-
-/** @defgroup I2S_Exported_Functions_Group3 Peripheral Control and State functions
-  * @{
-  */
-/* Peripheral Control and State functions  ************************************/
-HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
-uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup I2S_Private I2S Private
-  * @{
-  */
-#define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX)  || \
-                           ((MODE) == I2S_MODE_SLAVE_RX)  || \
-                           ((MODE) == I2S_MODE_MASTER_TX) || \
-                           ((MODE) == I2S_MODE_MASTER_RX))
-
-#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS)   || \
-                                   ((STANDARD) == I2S_STANDARD_MSB)       || \
-                                   ((STANDARD) == I2S_STANDARD_LSB)       || \
-                                   ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
-                                   ((STANDARD) == I2S_STANDARD_PCM_LONG))
-
-#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B)          || \
-                                    ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
-                                    ((FORMAT) == I2S_DATAFORMAT_24B)          || \
-                                    ((FORMAT) == I2S_DATAFORMAT_32B))
-
-#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
-                                    ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
-
-#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K)    && \
-                                  ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
-                                  ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
-
-#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
-                           ((CPOL) == I2S_CPOL_HIGH))
-/**
-  * @}
-  */
-
-/* Define the private group ***********************************/
-/**************************************************************/
-/** @defgroup I2S_Private I2S Private
-  * @{
-  */
-/**
-  * @}
-  */
-/**************************************************************/
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* !STM32L031xx && !STM32L041xx && !STM32L011xx && !STM32L021xx */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_I2S_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_irda.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_irda.h
deleted file mode 100755
index 2887d937..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_irda.h
+++ /dev/null
@@ -1,843 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_irda.h
-  * @author  MCD Application Team
-  * @brief   Header file of IRDA HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_IRDA_H
-#define __STM32L0xx_HAL_IRDA_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup IRDA
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup IRDA_Exported_Types IRDA Exported Types
-  * @{
-  */
-
-/**
-  * @brief IRDA Init Structure definition
-  */
-typedef struct
-{
-  uint32_t BaudRate;                  /*!< This member configures the IRDA communication baud rate.
-                                           The baud rate register is computed using the following formula:
-                                              Baud Rate Register = ((PCLKx) / ((hirda->Init.BaudRate))) */
-
-  uint32_t WordLength;                /*!< Specifies the number of data bits transmitted or received in a frame.
-                                           This parameter can be a value of @ref IRDA_Word_Length */
-
-  uint32_t Parity;                    /*!< Specifies the parity mode.
-                                           This parameter can be a value of @ref IRDA_Parity
-                                           @note When parity is enabled, the computed parity is inserted
-                                                 at the MSB position of the transmitted data (9th bit when
-                                                 the word length is set to 9 data bits; 8th bit when the
-                                                 word length is set to 8 data bits). */
-
-  uint32_t Mode;                      /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
-                                           This parameter can be a value of @ref IRDA_Transfer_Mode */
-
-  uint8_t  Prescaler;                 /*!< Specifies the Prescaler value for dividing the UART/USART source clock
-                                           to achieve low-power frequency.
-                                           @note Prescaler value 0 is forbidden */
-
-  uint16_t PowerMode;                 /*!< Specifies the IRDA power mode.
-                                           This parameter can be a value of @ref IRDA_Low_Power */
-}IRDA_InitTypeDef;
-
-/**
-  * @brief HAL IRDA State structures definition
-  * @note  HAL IRDA State value is a combination of 2 different substates: gState and RxState.
-  *        - gState contains IRDA state information related to global Handle management 
-  *          and also information related to Tx operations.
-  *          gState value coding follow below described bitmap :
-  *          b7-b6  Error information 
-  *             00 : No Error
-  *             01 : (Not Used)
-  *             10 : Timeout
-  *             11 : Error
-  *          b5     IP initilisation status
-  *             0  : Reset (IP not initialized)
-  *             1  : Init done (IP not initialized. HAL IRDA Init function already called)
-  *          b4-b3  (not used)
-  *             xx : Should be set to 00
-  *          b2     Intrinsic process state
-  *             0  : Ready
-  *             1  : Busy (IP busy with some configuration or internal operations)
-  *          b1     (not used)
-  *             x  : Should be set to 0
-  *          b0     Tx state
-  *             0  : Ready (no Tx operation ongoing)
-  *             1  : Busy (Tx operation ongoing)
-  *        - RxState contains information related to Rx operations.
-  *          RxState value coding follow below described bitmap :
-  *          b7-b6  (not used)
-  *             xx : Should be set to 00
-  *          b5     IP initilisation status
-  *             0  : Reset (IP not initialized)
-  *             1  : Init done (IP not initialized)
-  *          b4-b2  (not used)
-  *            xxx : Should be set to 000
-  *          b1     Rx state
-  *             0  : Ready (no Rx operation ongoing)
-  *             1  : Busy (Rx operation ongoing)
-  *          b0     (not used)
-  *             x  : Should be set to 0.
-  */
-typedef enum
-{
-  HAL_IRDA_STATE_RESET             = 0x00U,   /*!< Peripheral is not initialized
-                                                   Value is allowed for gState and RxState */
-  HAL_IRDA_STATE_READY             = 0x20U,   /*!< Peripheral Initialized and ready for use
-                                                   Value is allowed for gState and RxState */
-  HAL_IRDA_STATE_BUSY              = 0x24U,   /*!< an internal process is ongoing 
-                                                   Value is allowed for gState only */
-  HAL_IRDA_STATE_BUSY_TX           = 0x21U,   /*!< Data Transmission process is ongoing
-                                                   Value is allowed for gState only */
-  HAL_IRDA_STATE_BUSY_RX           = 0x22U,   /*!< Data Reception process is ongoing
-                                                   Value is allowed for RxState only */
-  HAL_IRDA_STATE_BUSY_TX_RX        = 0x23U,   /*!< Data Transmission and Reception process is ongoing
-                                                   Not to be used for neither gState nor RxState.
-                                                   Value is result of combination (Or) between gState and RxState values */
-  HAL_IRDA_STATE_TIMEOUT           = 0xA0U,   /*!< Timeout state
-                                                   Value is allowed for gState only */
-  HAL_IRDA_STATE_ERROR             = 0xE0U    /*!< Error
-                                                   Value is allowed for gState only */
-}HAL_IRDA_StateTypeDef;
-
-/**
-  * @brief  HAL IRDA Error Code structure definition
-  */
-
-#define  HAL_IRDA_ERROR_NONE      ((uint32_t)0x00U)    /*!< No error            */
-#define  HAL_IRDA_ERROR_PE        ((uint32_t)0x01U)    /*!< Parity error        */
-#define  HAL_IRDA_ERROR_NE        ((uint32_t)0x02U)    /*!< Noise error         */
-#define  HAL_IRDA_ERROR_FE        ((uint32_t)0x04U)    /*!< frame error         */
-#define  HAL_IRDA_ERROR_ORE       ((uint32_t)0x08U)    /*!< Overrun error       */
-#define  HAL_IRDA_ERROR_DMA       ((uint32_t)0x10U)    /*!< DMA transfer error  */
-
-/**
-  * @brief IRDA clock sources definition
-  */
-typedef enum
-{
-  IRDA_CLOCKSOURCE_PCLK1      = 0x00U,    /*!< PCLK1 clock source     */
-  IRDA_CLOCKSOURCE_PCLK2      = 0x01U,    /*!< PCLK2 clock source     */
-  IRDA_CLOCKSOURCE_HSI        = 0x02U,    /*!< HSI clock source       */
-  IRDA_CLOCKSOURCE_SYSCLK     = 0x04U,    /*!< SYSCLK clock source    */
-  IRDA_CLOCKSOURCE_LSE        = 0x08U,    /*!< LSE clock source       */
-  IRDA_CLOCKSOURCE_UNDEFINED  = 0x10U     /*!< Undefined clock source */
-}IRDA_ClockSourceTypeDef;
-
-/**
-  * @brief  IRDA handle Structure definition
-  */
-typedef struct
-{
-  USART_TypeDef            *Instance;        /*!< IRDA registers base address        */
-
-  IRDA_InitTypeDef         Init;             /*!< IRDA communication parameters      */
-
-  uint8_t                  *pTxBuffPtr;      /*!< Pointer to IRDA Tx transfer Buffer */
-
-  uint16_t                 TxXferSize;       /*!< IRDA Tx Transfer size              */
-
-  __IO uint16_t            TxXferCount;      /*!< IRDA Tx Transfer Counter           */
-
-  uint8_t                  *pRxBuffPtr;      /*!< Pointer to IRDA Rx transfer Buffer */
-
-  uint16_t                 RxXferSize;       /*!< IRDA Rx Transfer size              */
-
-  __IO uint16_t            RxXferCount;      /*!< IRDA Rx Transfer Counter           */
-
-  uint16_t                 Mask;             /*!< IRDA RX RDR register mask          */
-
-  DMA_HandleTypeDef        *hdmatx;          /*!< IRDA Tx DMA Handle parameters      */
-
-  DMA_HandleTypeDef        *hdmarx;          /*!< IRDA Rx DMA Handle parameters      */
-
-  HAL_LockTypeDef          Lock;             /*!< Locking object                     */
-
-  __IO HAL_IRDA_StateTypeDef    gState;      /*!< IRDA state information related to global Handle management 
-                                                  and also related to Tx operations.
-                                                  This parameter can be a value of @ref HAL_IRDA_StateTypeDef */
-
-  __IO HAL_IRDA_StateTypeDef    RxState;     /*!< IRDA state information related to Rx operations.
-                                                  This parameter can be a value of @ref HAL_IRDA_StateTypeDef */
-
-  __IO uint32_t           ErrorCode;        /*!< IRDA Error code                    */
-
-}IRDA_HandleTypeDef;
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup IRDA_Exported_Constants IRDA Exported Constants
-  * @{
-  */
-
-/** @defgroup IRDA_Word_Length IRDA Word Length
-  * @{
-  */
-#define IRDA_WORDLENGTH_7B                  ((uint32_t)USART_CR1_M1)   /*!< 7-bit long frame */
-#define IRDA_WORDLENGTH_8B                  ((uint32_t)0x00000000)     /*!< 8-bit long frame */
-#define IRDA_WORDLENGTH_9B                  ((uint32_t)USART_CR1_M0)   /*!< 9-bit long frame */
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_Parity IRDA Parity
-  * @{
-  */
-#define IRDA_PARITY_NONE                    ((uint32_t)0x00000000U)                     /*!< No parity   */
-#define IRDA_PARITY_EVEN                    ((uint32_t)USART_CR1_PCE)                   /*!< Even parity */
-#define IRDA_PARITY_ODD                     ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))  /*!< Odd parity  */
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_Transfer_Mode IRDA Transfer Mode
-  * @{
-  */
-#define IRDA_MODE_RX                        ((uint32_t)USART_CR1_RE)                   /*!< RX mode        */
-#define IRDA_MODE_TX                        ((uint32_t)USART_CR1_TE)                   /*!< TX mode        */
-#define IRDA_MODE_TX_RX                     ((uint32_t)(USART_CR1_TE |USART_CR1_RE))   /*!< RX and TX mode */
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_Low_Power IRDA Low Power
-  * @{
-  */
-#define IRDA_POWERMODE_NORMAL               ((uint32_t)0x00000000U)      /*!< IRDA normal power mode */ 
-#define IRDA_POWERMODE_LOWPOWER             ((uint32_t)USART_CR3_IRLP)   /*!< IRDA low power mode    */ 
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_State IRDA State
-  * @{
-  */
-#define IRDA_STATE_DISABLE                  ((uint32_t)0x00000000U)    /*!< IRDA disabled  */ 
-#define IRDA_STATE_ENABLE                   ((uint32_t)USART_CR1_UE)   /*!< IRDA enabled   */ 
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_Mode IRDA Mode
-  * @{
-  */
-#define IRDA_MODE_DISABLE                   ((uint32_t)0x00000000U)     /*!< Associated UART disabled in IRDA mode */
-#define IRDA_MODE_ENABLE                    ((uint32_t)USART_CR3_IREN)  /*!< Associated UART enabled in IRDA mode  */
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_One_Bit  IRDA One Bit Sampling
-  * @{
-  */
-#define IRDA_ONE_BIT_SAMPLE_DISABLE         ((uint32_t)0x00000000U)      /*!< One-bit sampling disabled */
-#define IRDA_ONE_BIT_SAMPLE_ENABLE          ((uint32_t)USART_CR3_ONEBIT) /*!< One-bit sampling enabled  */
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_DMA_Tx IRDA DMA Tx
-  * @{
-  */
-#define IRDA_DMA_TX_DISABLE                 ((uint32_t)0x00000000U)      /*!< IRDA DMA TX disabled */ 
-#define IRDA_DMA_TX_ENABLE                  ((uint32_t)USART_CR3_DMAT)   /*!< IRDA DMA TX enabled  */ 
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_DMA_Rx  IRDA DMA Rx
-  * @{
-  */
-#define IRDA_DMA_RX_DISABLE                 ((uint32_t)0x00000000)       /*!< IRDA DMA RX disabled */
-#define IRDA_DMA_RX_ENABLE                  ((uint32_t)USART_CR3_DMAR)   /*!< IRDA DMA RX enabled  */
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_Request_Parameters IRDA Request Parameters
-  * @{
-  */
-#define IRDA_AUTOBAUD_REQUEST            ((uint16_t)USART_RQR_ABRRQ)        /*!< Auto-Baud Rate Request      */
-#define IRDA_RXDATA_FLUSH_REQUEST        ((uint16_t)USART_RQR_RXFRQ)        /*!< Receive Data flush Request  */
-#define IRDA_TXDATA_FLUSH_REQUEST        ((uint16_t)USART_RQR_TXFRQ)        /*!< Transmit data flush Request */
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_Flags IRDA Flags
-  *        Elements values convention: 0xXXXX
-  *           - 0xXXXX  : Flag mask in the ISR register
-  * @{
-  */
-#define IRDA_FLAG_REACK                     USART_ISR_REACK  /*!< IRDA Receive enable acknowledge flag  */
-#define IRDA_FLAG_TEACK                     USART_ISR_TEACK  /*!< IRDA Transmit enable acknowledge flag */
-#define IRDA_FLAG_BUSY                      USART_ISR_BUSY   /*!< IRDA Busy flag                        */
-#define IRDA_FLAG_ABRF                      USART_ISR_ABRF   /*!< IRDA Auto baud rate flag              */
-#define IRDA_FLAG_ABRE                      USART_ISR_ABRE   /*!< IRDA Auto baud rate error             */
-#define IRDA_FLAG_TXE                       USART_ISR_TXE    /*!< IRDA Transmit data register empty     */
-#define IRDA_FLAG_TC                        USART_ISR_TC     /*!< IRDA Transmission complete            */
-#define IRDA_FLAG_RXNE                      USART_ISR_RXNE   /*!< IRDA Read data register not empty     */
-#define IRDA_FLAG_ORE                       USART_ISR_ORE    /*!< IRDA Overrun error                    */
-#define IRDA_FLAG_NE                        USART_ISR_NE     /*!< IRDA Noise error                      */
-#define IRDA_FLAG_FE                        USART_ISR_FE     /*!< IRDA Framing error                    */
-#define IRDA_FLAG_PE                        USART_ISR_PE     /*!< IRDA Parity error                     */
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_Interrupt_definition IRDA Interrupts Definition
-  *        Elements values convention: 0000ZZZZ0XXYYYYYb
-  *           - YYYYY  : Interrupt source position in the XX register (5bits)
-  *           - XX  : Interrupt source register (2bits)
-  *                 - 01: CR1 register
-  *                 - 10: CR2 register
-  *                 - 11: CR3 register
-  *           - ZZZZ  : Flag position in the ISR register(4bits)
-  * @{
-  */
-#define IRDA_IT_PE                          ((uint16_t)0x0028U)     /*!< IRDA Parity error interruption                 */
-#define IRDA_IT_TXE                         ((uint16_t)0x0727U)     /*!< IRDA Transmit data register empty interruption */
-#define IRDA_IT_TC                          ((uint16_t)0x0626U)     /*!< IRDA Transmission complete interruption        */
-#define IRDA_IT_RXNE                        ((uint16_t)0x0525U)     /*!< IRDA Read data register not empty interruption */
-#define IRDA_IT_IDLE                        ((uint16_t)0x0424U)     /*!< IRDA Idle interruption                         */
-
-/**       Elements values convention: 000000000XXYYYYYb
-  *           - YYYYY  : Interrupt source position in the XX register (5bits)
-  *           - XX  : Interrupt source register (2bits)
-  *                 - 01: CR1 register
-  *                 - 10: CR2 register
-  *                 - 11: CR3 register
-  */
-#define IRDA_IT_ERR                         ((uint16_t)0x0060U)       /*!< IRDA Error interruption        */
-
-/**       Elements values convention: 0000ZZZZ00000000b
-  *           - ZZZZ  : Flag position in the ISR register(4bits)
-  */
-#define IRDA_IT_ORE                         ((uint16_t)0x0300U)      /*!< IRDA Overrun error interruption */
-#define IRDA_IT_NE                          ((uint16_t)0x0200U)      /*!< IRDA Noise error interruption   */
-#define IRDA_IT_FE                          ((uint16_t)0x0100U)      /*!< IRDA Frame error interruption   */
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_IT_CLEAR_Flags   IRDA Interruption Clear Flags
-  * @{
-  */
-#define IRDA_CLEAR_PEF                       USART_ICR_PECF            /*!< Parity Error Clear Flag          */
-#define IRDA_CLEAR_FEF                       USART_ICR_FECF            /*!< Framing Error Clear Flag         */
-#define IRDA_CLEAR_NEF                       USART_ICR_NCF             /*!< Noise detected Clear Flag        */
-#define IRDA_CLEAR_OREF                      USART_ICR_ORECF           /*!< OverRun Error Clear Flag         */
-#define IRDA_CLEAR_IDLEF                     USART_ICR_IDLECF          /*!< IDLE line detected Clear Flag    */
-#define IRDA_CLEAR_TCF                       USART_ICR_TCCF            /*!< Transmission Complete Clear Flag */
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_Interruption_Mask    IRDA interruptions flags mask
-  * @{
-  */
-#define IRDA_IT_MASK  ((uint16_t)0x001FU)                             /*!< IRDA Interruptions flags mask */
-/**
-  * @}
-  */
-
-/**
- * @}
- */
-
-
-/* Exported macros -----------------------------------------------------------*/
-/** @defgroup IRDA_Exported_Macros IRDA Exported Macros
-  * @{
-  */
-
-/** @brief  Reset IRDA handle state.
-  * @param  __HANDLE__: IRDA handle.
-  * @retval None
-  */
-#define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__)  do{                                                   \
-                                                       (__HANDLE__)->gState = HAL_IRDA_STATE_RESET;      \
-                                                       (__HANDLE__)->RxState = HAL_IRDA_STATE_RESET;     \
-                                                     } while(0)
-
-/** @brief  Flush the IRDA DR register.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @retval None
-  */
-#define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__)                            \
-    do{                                                                    \
-         SET_BIT((__HANDLE__)->Instance->RQR, IRDA_RXDATA_FLUSH_REQUEST); \
-         SET_BIT((__HANDLE__)->Instance->RQR, IRDA_TXDATA_FLUSH_REQUEST); \
-      } while(0)
-
-/** @brief  Clear the specified IRDA pending flag.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @param  __FLAG__: specifies the flag to check.
-  *          This parameter can be any combination of the following values:
-  *            @arg @ref IRDA_CLEAR_PEF
-  *            @arg @ref IRDA_CLEAR_FEF
-  *            @arg @ref IRDA_CLEAR_NEF
-  *            @arg @ref IRDA_CLEAR_OREF
-  *            @arg @ref IRDA_CLEAR_TCF
-  *            @arg @ref IRDA_CLEAR_IDLEF
-  * @retval None
-  */
-#define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
-
-/** @brief  Clear the IRDA PE pending flag.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @retval None
-  */
-#define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)    __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_PEF)
-
-
-/** @brief  Clear the IRDA FE pending flag.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @retval None
-  */
-#define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__)    __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_FEF)
-
-/** @brief  Clear the IRDA NE pending flag.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @retval None
-  */
-#define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__)    __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_NEF)
-
-/** @brief  Clear the IRDA ORE pending flag.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @retval None
-  */
-#define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__)    __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_OREF)
-
-/** @brief  Clear the IRDA IDLE pending flag.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @retval None
-  */
-#define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__)   __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_IDLEF)
-
-/** @brief  Check whether the specified IRDA flag is set or not.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @param  __FLAG__: specifies the flag to check.
-  *        This parameter can be one of the following values:
-  *            @arg @ref IRDA_FLAG_REACK Receive enable acknowledge flag
-  *            @arg @ref IRDA_FLAG_TEACK Transmit enable acknowledge flag
-  *            @arg @ref IRDA_FLAG_BUSY  Busy flag
-  *            @arg @ref IRDA_FLAG_ABRF  Auto Baud rate detection flag
-  *            @arg @ref IRDA_FLAG_ABRE  Auto Baud rate detection error flag
-  *            @arg @ref IRDA_FLAG_TXE   Transmit data register empty flag
-  *            @arg @ref IRDA_FLAG_TC    Transmission Complete flag
-  *            @arg @ref IRDA_FLAG_RXNE  Receive data register not empty flag
-  *            @arg @ref IRDA_FLAG_ORE   OverRun Error flag
-  *            @arg @ref IRDA_FLAG_NE    Noise Error flag
-  *            @arg @ref IRDA_FLAG_FE    Framing Error flag
-  *            @arg @ref IRDA_FLAG_PE    Parity Error flag
-  * @retval The new state of __FLAG__ (TRUE or FALSE).
-  */
-#define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
-
-
-/** @brief  Enable the specified IRDA interrupt.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @param  __INTERRUPT__: specifies the IRDA interrupt source to enable.
-  *          This parameter can be one of the following values:
-  *            @arg @ref IRDA_IT_TXE  Transmit Data Register empty interrupt
-  *            @arg @ref IRDA_IT_TC   Transmission complete interrupt
-  *            @arg @ref IRDA_IT_RXNE Receive Data register not empty interrupt
-  *            @arg @ref IRDA_IT_IDLE Idle line detection interrupt
-  *            @arg @ref IRDA_IT_PE   Parity Error interrupt
-  *            @arg @ref IRDA_IT_ERR  Error interrupt(Frame error, noise error, overrun error)
-  * @retval None
-  */
-#define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__)   (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
-                                                           ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
-                                                           ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))))
-
-/** @brief  Disable the specified IRDA interrupt.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @param  __INTERRUPT__: specifies the IRDA interrupt source to disable.
-  *          This parameter can be one of the following values:
-  *            @arg @ref IRDA_IT_TXE  Transmit Data Register empty interrupt
-  *            @arg @ref IRDA_IT_TC   Transmission complete interrupt
-  *            @arg @ref IRDA_IT_RXNE Receive Data register not empty interrupt
-  *            @arg @ref IRDA_IT_IDLE Idle line detection interrupt
-  *            @arg @ref IRDA_IT_PE   Parity Error interrupt
-  *            @arg @ref IRDA_IT_ERR  Error interrupt(Frame error, noise error, overrun error)
-  * @retval None
-  */
-#define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__)  (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
-                                                           ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
-                                                           ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK))))
-
-
-/** @brief  Check whether the specified IRDA interrupt has occurred or not.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @param  __IT__: specifies the IRDA interrupt source to check.
-  *          This parameter can be one of the following values:
-  *            @arg @ref IRDA_IT_TXE Transmit Data Register empty interrupt
-  *            @arg @ref IRDA_IT_TC  Transmission complete interrupt
-  *            @arg @ref IRDA_IT_RXNE Receive Data register not empty interrupt
-  *            @arg @ref IRDA_IT_IDLE Idle line detection interrupt
-  *            @arg @ref IRDA_IT_ORE OverRun Error interrupt
-  *            @arg @ref IRDA_IT_NE Noise Error interrupt
-  *            @arg @ref IRDA_IT_FE Framing Error interrupt
-  *            @arg @ref IRDA_IT_PE Parity Error interrupt
-  * @retval The new state of __IT__ (TRUE or FALSE).
-  */
-#define __HAL_IRDA_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1U << ((__IT__)>> 0x08U)))
-
-/** @brief  Check whether the specified IRDA interrupt source is enabled or not.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @param  __IT__: specifies the IRDA interrupt source to check.
-  *          This parameter can be one of the following values:
-  *            @arg @ref IRDA_IT_TXE Transmit Data Register empty interrupt
-  *            @arg @ref IRDA_IT_TC  Transmission complete interrupt
-  *            @arg @ref IRDA_IT_RXNE Receive Data register not empty interrupt
-  *            @arg @ref IRDA_IT_IDLE Idle line detection interrupt
-  *            @arg @ref IRDA_IT_ERR Framing, overrun or noise error interrupt
-  *            @arg @ref IRDA_IT_PE Parity Error interrupt
-  * @retval The new state of __IT__ (TRUE or FALSE).
-  */
-#define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2U)? \
-                                                       (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1U << (((uint16_t)(__IT__)) & IRDA_IT_MASK)))
-
-/** @brief  Clear the specified IRDA ISR flag, in setting the proper ICR register flag.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @param  __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
-  *                       to clear the corresponding interrupt
-  *          This parameter can be one of the following values:
-  *            @arg @ref IRDA_CLEAR_PEF Parity Error Clear Flag
-  *            @arg @ref IRDA_CLEAR_FEF Framing Error Clear Flag
-  *            @arg @ref IRDA_CLEAR_NEF Noise detected Clear Flag
-  *            @arg @ref IRDA_CLEAR_OREF OverRun Error Clear Flag
-  *            @arg @ref IRDA_CLEAR_TCF Transmission Complete Clear Flag
-  * @retval None
-  */
-#define __HAL_IRDA_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
-
-
-/** @brief  Set a specific IRDA request flag.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @param  __REQ__: specifies the request flag to set
-  *          This parameter can be one of the following values:
-  *            @arg @ref IRDA_AUTOBAUD_REQUEST Auto-Baud Rate Request
-  *            @arg @ref IRDA_RXDATA_FLUSH_REQUEST Receive Data flush Request
-  *            @arg @ref IRDA_TXDATA_FLUSH_REQUEST Transmit data flush Request
-  *
-  * @retval None
-  */
-#define __HAL_IRDA_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
-
-/** @brief  Enable the IRDA one bit sample method.
-  * @param  __HANDLE__: specifies the IRDA Handle.  
-  * @retval None
-  */
-#define __HAL_IRDA_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
-
-/** @brief  Disable the IRDA one bit sample method.
-  * @param  __HANDLE__: specifies the IRDA Handle.  
-  * @retval None
-  */
-#define __HAL_IRDA_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
-
-/** @brief  Enable UART/USART associated to IRDA Handle.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @retval None
-  */
-#define __HAL_IRDA_ENABLE(__HANDLE__)                   ((__HANDLE__)->Instance->CR1 |=  USART_CR1_UE)
-
-/** @brief  Disable UART/USART associated to IRDA Handle.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @retval None
-  */
-#define __HAL_IRDA_DISABLE(__HANDLE__)                  ((__HANDLE__)->Instance->CR1 &=  ~USART_CR1_UE)
-
-/**
-  * @}
-  */
-
-/* Private macros --------------------------------------------------------*/
-/** @defgroup IRDA_Private_Macros   IRDA Private Macros
-  * @{
-  */
-
-/** @brief  Compute the mask to apply to retrieve the received data
-  *         according to the word length and to the parity bits activation.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @retval None, the mask to apply to the associated UART RDR register is stored in (__HANDLE__)->Mask field.
-  */
-#define IRDA_MASK_COMPUTATION(__HANDLE__)                             \
-  do {                                                                \
-  if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_9B)            \
-  {                                                                   \
-     if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE)               \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x01FFU ;                                \
-     }                                                                \
-     else                                                             \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x00FFU ;                                \
-     }                                                                \
-  }                                                                   \
-  else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_8B)       \
-  {                                                                   \
-     if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE)               \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x00FFU ;                                \
-     }                                                                \
-     else                                                             \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x007FU ;                                \
-     }                                                                \
-  }                                                                   \
-  else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_7B)       \
-  {                                                                   \
-     if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE)               \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x007FU ;                                \
-     }                                                                \
-     else                                                             \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x003FU ;                                \
-     }                                                                \
-  }                                                                   \
-} while(0)
-
-/** @brief  Ensure that IRDA Baud rate is less or equal to maximum value.
-  * @param  __BAUDRATE__: specifies the IRDA Baudrate set by the user.
-  * @retval True or False
-  */
-#define IS_IRDA_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 115201U)
-
-/** @brief  Ensure that IRDA prescaler value is strictly larger than 0.
-  * @param  __PRESCALER__: specifies the IRDA prescaler value set by the user.
-  * @retval True or False
-  */
-#define IS_IRDA_PRESCALER(__PRESCALER__) ((__PRESCALER__) > 0U)
-
-/**
-  * @brief Ensure that IRDA frame length is valid.
-  * @param __LENGTH__: IRDA frame length. 
-  * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
-  */ 
-#define IS_IRDA_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == IRDA_WORDLENGTH_7B) || \
-                                         ((__LENGTH__) == IRDA_WORDLENGTH_8B) || \
-                                         ((__LENGTH__) == IRDA_WORDLENGTH_9B))
-
-/**
-  * @brief Ensure that IRDA frame parity is valid.
-  * @param __PARITY__: IRDA frame parity. 
-  * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
-  */ 
-#define IS_IRDA_PARITY(__PARITY__) (((__PARITY__) == IRDA_PARITY_NONE) || \
-                                    ((__PARITY__) == IRDA_PARITY_EVEN) || \
-                                    ((__PARITY__) == IRDA_PARITY_ODD))
-
-/**
-  * @brief Ensure that IRDA communication mode is valid.
-  * @param __MODE__: IRDA communication mode. 
-  * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
-  */ 
-#define IS_IRDA_TX_RX_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(IRDA_MODE_TX_RX)))) == (uint32_t)0x00) && ((__MODE__) != (uint32_t)0x00))
-
-/**
-  * @brief Ensure that IRDA power mode is valid.
-  * @param __MODE__: IRDA power mode. 
-  * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
-  */ 
-#define IS_IRDA_POWERMODE(__MODE__) (((__MODE__) == IRDA_POWERMODE_LOWPOWER) || \
-                                     ((__MODE__) == IRDA_POWERMODE_NORMAL))
-
-/**
-  * @brief Ensure that IRDA state is valid.
-  * @param __STATE__: IRDA state mode. 
-  * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
-  */ 
-#define IS_IRDA_STATE(__STATE__) (((__STATE__) == IRDA_STATE_DISABLE) || \
-                                  ((__STATE__) == IRDA_STATE_ENABLE))
-
-/**
-  * @brief Ensure that IRDA associated UART/USART mode is valid.
-  * @param __MODE__: IRDA associated UART/USART mode. 
-  * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
-  */ 
-#define IS_IRDA_MODE(__MODE__)  (((__MODE__) == IRDA_MODE_DISABLE) || \
-                                 ((__MODE__) == IRDA_MODE_ENABLE))
-
-/**
-  * @brief Ensure that IRDA sampling rate is valid.
-  * @param __ONEBIT__: IRDA sampling rate. 
-  * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
-  */ 
-#define IS_IRDA_ONE_BIT_SAMPLE(__ONEBIT__)      (((__ONEBIT__) == IRDA_ONE_BIT_SAMPLE_DISABLE) || \
-                                                 ((__ONEBIT__) == IRDA_ONE_BIT_SAMPLE_ENABLE))
-
-/**
-  * @brief Ensure that IRDA DMA TX mode is valid.
-  * @param __DMATX__: IRDA DMA TX mode. 
-  * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
-  */ 
-#define IS_IRDA_DMA_TX(__DMATX__)     (((__DMATX__) == IRDA_DMA_TX_DISABLE) || \
-                                       ((__DMATX__) == IRDA_DMA_TX_ENABLE))
-
-/**
-  * @brief Ensure that IRDA DMA RX mode is valid.
-  * @param __DMARX__: IRDA DMA RX mode. 
-  * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
-  */ 
-#define IS_IRDA_DMA_RX(__DMARX__) (((__DMARX__) == IRDA_DMA_RX_DISABLE) || \
-                                   ((__DMARX__) == IRDA_DMA_RX_ENABLE))
-
-/**
-  * @brief Ensure that IRDA request is valid.
-  * @param __PARAM__: IRDA request. 
-  * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
-  */ 
-#define IS_IRDA_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == IRDA_AUTOBAUD_REQUEST) || \
-                                              ((__PARAM__) == IRDA_RXDATA_FLUSH_REQUEST) || \
-                                              ((__PARAM__) == IRDA_TXDATA_FLUSH_REQUEST))
-/**
- * @}
- */
-
-/* Include IRDA HAL Extended module */
-#include "stm32l0xx_hal_irda_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup IRDA_Exported_Functions IRDA Exported Functions
-  * @{
-  */
-
-/** @addtogroup IRDA_Exported_Functions_Group1 Initialization and de-initialization functions
-  * @{
-  */
-
-/* Initialization and de-initialization functions  ****************************/
-HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda);
-HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda);
-void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda);
-void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda);
-
-/**
-  * @}
-  */
-
-/** @addtogroup IRDA_Exported_Functions_Group2 IO operation functions
-  * @{
-  */
-
-/* IO operation functions *****************************************************/
-HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda);
-HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda);
-HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda);
-/* Transfer Abort functions */
-HAL_StatusTypeDef HAL_IRDA_Abort(IRDA_HandleTypeDef *hirda);
-HAL_StatusTypeDef HAL_IRDA_AbortTransmit(IRDA_HandleTypeDef *hirda);
-HAL_StatusTypeDef HAL_IRDA_AbortReceive(IRDA_HandleTypeDef *hirda);
-HAL_StatusTypeDef HAL_IRDA_Abort_IT(IRDA_HandleTypeDef *hirda);
-HAL_StatusTypeDef HAL_IRDA_AbortTransmit_IT(IRDA_HandleTypeDef *hirda);
-HAL_StatusTypeDef HAL_IRDA_AbortReceive_IT(IRDA_HandleTypeDef *hirda);
-
-void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda);
-void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda);
-void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda);
-void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
-void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
-void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda);
-void HAL_IRDA_AbortCpltCallback (IRDA_HandleTypeDef *hirda);
-void HAL_IRDA_AbortTransmitCpltCallback (IRDA_HandleTypeDef *hirda);
-void HAL_IRDA_AbortReceiveCpltCallback (IRDA_HandleTypeDef *hirda);
-
-/**
-  * @}
-  */
-
-/* Peripheral Control functions  ************************************************/
-
-/** @addtogroup IRDA_Exported_Functions_Group4 Peripheral State and Error functions
-  * @{
-  */
-
-/* Peripheral State and Error functions ***************************************/
-HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda);
-uint32_t              HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_IRDA_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_irda_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_irda_ex.h
deleted file mode 100755
index 1a37b7d0..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_irda_ex.h
+++ /dev/null
@@ -1,209 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_irda_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of IRDA HAL Extended module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_IRDA_EX_H
-#define __STM32L0xx_HAL_IRDA_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup IRDAEx
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/* Exported macros -----------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/* Private macros ------------------------------------------------------------*/
-
-/** @defgroup IRDAEx_Private_Macros IRDAEx Private Macros
-  * @{
-  */
-
-/** @brief  Report the IRDA clock source.
-  * @param  __HANDLE__: specifies the IRDA Handle.
-  * @param  __CLOCKSOURCE__: output variable.
-  * @retval IRDA clocking source, written in __CLOCKSOURCE__.
-  */
-#if defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
-#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
-  do {                                                        \
-    if((__HANDLE__)->Instance == USART2)                      \
-    {                                                         \
-       switch(__HAL_RCC_GET_USART2_SOURCE())                  \
-       {                                                      \
-        case RCC_USART2CLKSOURCE_PCLK1:                       \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1;         \
-          break;                                              \
-        case RCC_USART2CLKSOURCE_HSI:                         \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI;           \
-          break;                                              \
-        case RCC_USART2CLKSOURCE_SYSCLK:                      \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK;        \
-          break;                                              \
-        case RCC_USART2CLKSOURCE_LSE:                         \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE;           \
-          break;                                              \
-        default:                                              \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED;     \
-          break;                                              \
-       }                                                      \
-    }                                                         \
-    else if((__HANDLE__)->Instance == LPUART1)                \
-    {                                                         \
-       switch(__HAL_RCC_GET_LPUART1_SOURCE())                 \
-       {                                                      \
-        case RCC_LPUART1CLKSOURCE_PCLK1:                      \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1;         \
-          break;                                              \
-        case RCC_LPUART1CLKSOURCE_HSI:                        \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI;           \
-          break;                                              \
-        case RCC_LPUART1CLKSOURCE_SYSCLK:                     \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK;        \
-          break;                                              \
-        case RCC_LPUART1CLKSOURCE_LSE:                        \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE;           \
-          break;                                              \
-        default:                                              \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED;     \
-          break;                                              \
-       }                                                      \
-    }                                                         \
-  } while(0)
-
-#else /* (STM32L031xx) || defined (STM32L041xx) || (STM32L011xx) || defined (STM32L021xx) */
-
-#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
-  do {                                                        \
-    if((__HANDLE__)->Instance == USART1)                      \
-    {                                                         \
-       switch(__HAL_RCC_GET_USART1_SOURCE())                  \
-       {                                                      \
-        case RCC_USART1CLKSOURCE_PCLK2:                       \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2;         \
-          break;                                              \
-        case RCC_USART1CLKSOURCE_HSI:                         \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI;           \
-          break;                                              \
-        case RCC_USART1CLKSOURCE_SYSCLK:                      \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK;        \
-          break;                                              \
-        case RCC_USART1CLKSOURCE_LSE:                         \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE;           \
-          break;                                              \
-        default:                                              \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED;     \
-          break;                                              \
-       }                                                      \
-    }                                                         \
-    else if((__HANDLE__)->Instance == USART2)                 \
-    {                                                         \
-       switch(__HAL_RCC_GET_USART2_SOURCE())                  \
-       {                                                      \
-        case RCC_USART2CLKSOURCE_PCLK1:                       \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1;         \
-          break;                                              \
-        case RCC_USART2CLKSOURCE_HSI:                         \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI;           \
-          break;                                              \
-        case RCC_USART2CLKSOURCE_SYSCLK:                      \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK;        \
-          break;                                              \
-        case RCC_USART2CLKSOURCE_LSE:                         \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE;           \
-          break;                                              \
-        default:                                              \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED;     \
-          break;                                              \
-       }                                                      \
-    }                                                         \
-    else if((__HANDLE__)->Instance == LPUART1)                \
-    {                                                         \
-       switch(__HAL_RCC_GET_LPUART1_SOURCE())                 \
-       {                                                      \
-        case RCC_LPUART1CLKSOURCE_PCLK1:                      \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1;         \
-          break;                                              \
-        case RCC_LPUART1CLKSOURCE_HSI:                        \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI;           \
-          break;                                              \
-        case RCC_LPUART1CLKSOURCE_SYSCLK:                     \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK;        \
-          break;                                              \
-        case RCC_LPUART1CLKSOURCE_LSE:                        \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE;           \
-          break;                                              \
-        default:                                              \
-          (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED;     \
-          break;                                              \
-       }                                                      \
-    }                                                         \
-  } while(0)
-#endif /* (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx) */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_IRDA_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h
deleted file mode 100755
index 8d2e2a77..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h
+++ /dev/null
@@ -1,255 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_iwdg.h
-  * @author  MCD Application Team
-  * @brief   Header file of IWDG HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_IWDG_H
-#define __STM32L0xx_HAL_IWDG_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup IWDG IWDG
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup IWDG_Exported_Types IWDG Exported Types
-  * @{
-  */
-
-/** 
-  * @brief  IWDG Init structure definition
-  */
-typedef struct
-{
-  uint32_t Prescaler;  /*!< Select the prescaler of the IWDG.
-                            This parameter can be a value of @ref IWDG_Prescaler */
-
-  uint32_t Reload;     /*!< Specifies the IWDG down-counter reload value.
-                            This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
-
-  uint32_t Window;     /*!< Specifies the window value to be compared to the down-counter.
-                            This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
-
-} IWDG_InitTypeDef;
-
-/** 
-  * @brief  IWDG Handle Structure definition  
-  */
-typedef struct
-{
-  IWDG_TypeDef                 *Instance;  /*!< Register base address    */
-
-  IWDG_InitTypeDef             Init;       /*!< IWDG required parameters */
-
-}IWDG_HandleTypeDef;
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup IWDG_Exported_Constants IWDG Exported Constants
-  * @{
-  */
-
-/** @defgroup IWDG_Prescaler IWDG Prescaler
-  * @{
-  */
-#define IWDG_PRESCALER_4                0x00000000U                   /*!< IWDG prescaler set to 4   */
-#define IWDG_PRESCALER_8                IWDG_PR_PR_0                  /*!< IWDG prescaler set to 8   */
-#define IWDG_PRESCALER_16               IWDG_PR_PR_1                  /*!< IWDG prescaler set to 16  */
-#define IWDG_PRESCALER_32               (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32  */
-#define IWDG_PRESCALER_64               IWDG_PR_PR_2                  /*!< IWDG prescaler set to 64  */
-#define IWDG_PRESCALER_128              (IWDG_PR_PR_2 | IWDG_PR_PR_0)   /*!< IWDG prescaler set to 128 */
-#define IWDG_PRESCALER_256              (IWDG_PR_PR_2 | IWDG_PR_PR_1)   /*!< IWDG prescaler set to 256 */
-/**
-  * @}
-  */
-
-/** @defgroup IWDG_Window_option IWDG Window option
-  * @{
-  */
-#define IWDG_WINDOW_DISABLE             IWDG_WINR_WIN
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macros -----------------------------------------------------------*/
-/** @defgroup IWDG_Exported_Macros IWDG Exported Macros
-  * @{
-  */
-
-/**
-  * @brief  Enable the IWDG peripheral.
-  * @param  __HANDLE__  IWDG handle
-  * @retval None
-  */
-#define __HAL_IWDG_START(__HANDLE__)                WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
-
-/**
-  * @brief  Reload IWDG counter with value defined in the reload register
-  *         (write access to IWDG_PR, IWDG_RLR & IWDG_WINR registers disabled).
-  * @param  __HANDLE__  IWDG handle
-  * @retval None
-  */
-#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__)       WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup IWDG_Exported_Functions  IWDG Exported Functions
-  * @{
-  */
-
-/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
-  * @{
-  */
-/* Initialization/Start functions  ********************************************/
-HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
-/**
-  * @}
-  */
-
-/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
-  * @{
-  */
-/* I/O operation functions ****************************************************/
-HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup IWDG_Private_Constants IWDG Private Constants
-  * @{
-  */
-
-/**
-  * @brief  IWDG Key Register BitMask
-  */
-#define IWDG_KEY_RELOAD                 0x0000AAAAU  /*!< IWDG Reload Counter Enable   */
-#define IWDG_KEY_ENABLE                 0x0000CCCCU  /*!< IWDG Peripheral Enable       */
-#define IWDG_KEY_WRITE_ACCESS_ENABLE    0x00005555U  /*!< IWDG KR Write Access Enable  */
-#define IWDG_KEY_WRITE_ACCESS_DISABLE   0x00000000U  /*!< IWDG KR Write Access Disable */
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup IWDG_Private_Macros IWDG Private Macros
-  * @{
-  */
-
-/**
-  * @brief  Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
-  * @param  __HANDLE__  IWDG handle
-  * @retval None
-  */
-#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__)  WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
-
-/**
-  * @brief  Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
-  * @param  __HANDLE__  IWDG handle
-  * @retval None
-  */
-#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
-
-/**
-  * @brief  Check IWDG prescaler value.
-  * @param  __PRESCALER__  IWDG prescaler value
-  * @retval None
-  */
-#define IS_IWDG_PRESCALER(__PRESCALER__)      (((__PRESCALER__) == IWDG_PRESCALER_4)  || \
-                                               ((__PRESCALER__) == IWDG_PRESCALER_8)  || \
-                                               ((__PRESCALER__) == IWDG_PRESCALER_16) || \
-                                               ((__PRESCALER__) == IWDG_PRESCALER_32) || \
-                                               ((__PRESCALER__) == IWDG_PRESCALER_64) || \
-                                               ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
-                                               ((__PRESCALER__) == IWDG_PRESCALER_256))
-
-/**
-  * @brief  Check IWDG reload value.
-  * @param  __RELOAD__  IWDG reload value
-  * @retval None
-  */
-#define IS_IWDG_RELOAD(__RELOAD__)            ((__RELOAD__) <= IWDG_RLR_RL)
-
-/**
-  * @brief  Check IWDG window value.
-  * @param  __WINDOW__  IWDG window value
-  * @retval None
-  */
-#define IS_IWDG_WINDOW(__WINDOW__)            ((__WINDOW__) <= IWDG_WINR_WIN)
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_IWDG_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lcd.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lcd.h
deleted file mode 100755
index fa3c3a28..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lcd.h
+++ /dev/null
@@ -1,804 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_lcd.h
-  * @author  MCD Application Team
-  * @brief   Header file of LCD Controller HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_LCD_H
-#define __STM32L0xx_HAL_LCD_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx)
-   
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup LCD LCD
-  * @{
-  */ 
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup LCD_Exported_Types LCD Exported Types
-  * @{
-  */
-
-/** 
-  * @brief LCD Init structure definition
-  */
-
-typedef struct
-{
-  uint32_t Prescaler;       /*!< Configures the LCD Prescaler. 
-                                 This parameter can be one value of @ref LCD_Prescaler */
-  uint32_t Divider;         /*!< Configures the LCD Divider.
-                                 This parameter can be one value of @ref LCD_Divider */
-  uint32_t Duty;            /*!< Configures the LCD Duty.
-                                 This parameter can be one value of @ref LCD_Duty */
-  uint32_t Bias;            /*!< Configures the LCD Bias.
-                                 This parameter can be one value of @ref LCD_Bias */ 
-  uint32_t VoltageSource;   /*!< Selects the LCD Voltage source.
-                                 This parameter can be one value of @ref LCD_Voltage_Source */  
-  uint32_t Contrast;        /*!< Configures the LCD Contrast.
-                                 This parameter can be one value of @ref LCD_Contrast */
-  uint32_t DeadTime;        /*!< Configures the LCD Dead Time.
-                                 This parameter can be one value of @ref LCD_DeadTime */
-  uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration.
-                                 This parameter can be one value of @ref LCD_PulseOnDuration */
-  uint32_t HighDrive;      /*!< Configures the LCD High Drive.
-                                 This parameter can be one value of @ref LCD_HighDrive */
-  uint32_t BlinkMode;       /*!< Configures the LCD Blink Mode.
-                                 This parameter can be one value of @ref LCD_BlinkMode */
-  uint32_t BlinkFrequency;  /*!< Configures the LCD Blink frequency.
-                                 This parameter can be one value of @ref LCD_BlinkFrequency */
-  uint32_t MuxSegment;      /*!< Enable or disable mux segment.
-                                 This parameter can be one value of @ref LCD_MuxSegment */
-}LCD_InitTypeDef;
-
-/** 
-  * @brief HAL LCD State structures definition
-  */ 
-typedef enum
-{
-  HAL_LCD_STATE_RESET             = 0x00U,    /*!< Peripheral is not yet Initialized */
-  HAL_LCD_STATE_READY             = 0x01U,    /*!< Peripheral Initialized and ready for use */
-  HAL_LCD_STATE_BUSY              = 0x02U,    /*!< an internal process is ongoing */
-  HAL_LCD_STATE_TIMEOUT           = 0x03U,    /*!< Timeout state */
-  HAL_LCD_STATE_ERROR             = 0x04U     /*!< Error */
-}HAL_LCD_StateTypeDef;
-
-/** 
-  * @brief  UART handle Structure definition
-  */  
-typedef struct
-{
-  LCD_TypeDef                   *Instance;  /* LCD registers base address */
-  
-  LCD_InitTypeDef               Init;       /* LCD communication parameters */
-
-  HAL_LockTypeDef               Lock;       /* Locking object */
-
-  __IO HAL_LCD_StateTypeDef     State;      /* LCD communication state */
-  
-  __IO uint32_t                 ErrorCode;  /* LCD Error code */
-  
-}LCD_HandleTypeDef;
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup LCD_Exported_Constants LCD Exported Constants
-  * @{
-  */
-
-/** @defgroup  LCD_ErrorCode LCD Error Code
-  * @{
-  */ 
-#define HAL_LCD_ERROR_NONE       ((uint32_t)0x00U)    /*!< No error */
-#define HAL_LCD_ERROR_FCRSF      ((uint32_t)0x01U)    /*!< Synchro flag timeout error */
-#define HAL_LCD_ERROR_UDR        ((uint32_t)0x02U)    /*!< Update display request flag timeout error */
-#define HAL_LCD_ERROR_UDD        ((uint32_t)0x04U)    /*!< Update display done flag timeout error */
-#define HAL_LCD_ERROR_ENS        ((uint32_t)0x08U)    /*!< LCD enabled status flag timeout error */
-#define HAL_LCD_ERROR_RDY        ((uint32_t)0x10U)    /*!< LCD Booster ready timeout error */
-/**
-  * @}
-  */
-  
-/** @defgroup LCD_Prescaler LCD Prescaler
-  * @{
-  */
-
-#define LCD_PRESCALER_1        ((uint32_t)0x00000000U)  /*!< CLKPS = LCDCLK        */
-#define LCD_PRESCALER_2        ((uint32_t)0x00400000U)  /*!< CLKPS = LCDCLK/2      */
-#define LCD_PRESCALER_4        ((uint32_t)0x00800000U)  /*!< CLKPS = LCDCLK/4      */
-#define LCD_PRESCALER_8        ((uint32_t)0x00C00000U)  /*!< CLKPS = LCDCLK/8      */
-#define LCD_PRESCALER_16       ((uint32_t)0x01000000U)  /*!< CLKPS = LCDCLK/16     */
-#define LCD_PRESCALER_32       ((uint32_t)0x01400000U)  /*!< CLKPS = LCDCLK/32     */
-#define LCD_PRESCALER_64       ((uint32_t)0x01800000U)  /*!< CLKPS = LCDCLK/64     */
-#define LCD_PRESCALER_128      ((uint32_t)0x01C00000U)  /*!< CLKPS = LCDCLK/128    */
-#define LCD_PRESCALER_256      ((uint32_t)0x02000000U)  /*!< CLKPS = LCDCLK/256    */
-#define LCD_PRESCALER_512      ((uint32_t)0x02400000U)  /*!< CLKPS = LCDCLK/512    */
-#define LCD_PRESCALER_1024     ((uint32_t)0x02800000U)  /*!< CLKPS = LCDCLK/1024   */
-#define LCD_PRESCALER_2048     ((uint32_t)0x02C00000U)  /*!< CLKPS = LCDCLK/2048   */
-#define LCD_PRESCALER_4096     ((uint32_t)0x03000000U)  /*!< CLKPS = LCDCLK/4096   */
-#define LCD_PRESCALER_8192     ((uint32_t)0x03400000U)  /*!< CLKPS = LCDCLK/8192   */
-#define LCD_PRESCALER_16384    ((uint32_t)0x03800000U)  /*!< CLKPS = LCDCLK/16384  */
-#define LCD_PRESCALER_32768    ((uint32_t)LCD_FCR_PS)  /*!< CLKPS = LCDCLK/32768  */
-
-#define IS_LCD_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LCD_PRESCALER_1)     || \
-                                         ((__PRESCALER__) == LCD_PRESCALER_2)     || \
-                                         ((__PRESCALER__) == LCD_PRESCALER_4)     || \
-                                         ((__PRESCALER__) == LCD_PRESCALER_8)     || \
-                                         ((__PRESCALER__) == LCD_PRESCALER_16)    || \
-                                         ((__PRESCALER__) == LCD_PRESCALER_32)    || \
-                                         ((__PRESCALER__) == LCD_PRESCALER_64)    || \
-                                         ((__PRESCALER__) == LCD_PRESCALER_128)   || \
-                                         ((__PRESCALER__) == LCD_PRESCALER_256)   || \
-                                         ((__PRESCALER__) == LCD_PRESCALER_512)   || \
-                                         ((__PRESCALER__) == LCD_PRESCALER_1024)  || \
-                                         ((__PRESCALER__) == LCD_PRESCALER_2048)  || \
-                                         ((__PRESCALER__) == LCD_PRESCALER_4096)  || \
-                                         ((__PRESCALER__) == LCD_PRESCALER_8192)  || \
-                                         ((__PRESCALER__) == LCD_PRESCALER_16384) || \
-                                         ((__PRESCALER__) == LCD_PRESCALER_32768))
-
-/**
-  * @}
-  */
-  
-/** @defgroup LCD_Divider LCD Divider
-  * @{
-  */
-
-#define LCD_DIVIDER_16    ((uint32_t)0x00000000U)  /*!< LCD frequency = CLKPS/16 */
-#define LCD_DIVIDER_17    ((uint32_t)0x00040000U)  /*!< LCD frequency = CLKPS/17 */
-#define LCD_DIVIDER_18    ((uint32_t)0x00080000U)  /*!< LCD frequency = CLKPS/18 */
-#define LCD_DIVIDER_19    ((uint32_t)0x000C0000U)  /*!< LCD frequency = CLKPS/19 */
-#define LCD_DIVIDER_20    ((uint32_t)0x00100000U)  /*!< LCD frequency = CLKPS/20 */
-#define LCD_DIVIDER_21    ((uint32_t)0x00140000U)  /*!< LCD frequency = CLKPS/21 */
-#define LCD_DIVIDER_22    ((uint32_t)0x00180000U)  /*!< LCD frequency = CLKPS/22 */
-#define LCD_DIVIDER_23    ((uint32_t)0x001C0000U)  /*!< LCD frequency = CLKPS/23 */
-#define LCD_DIVIDER_24    ((uint32_t)0x00200000U)  /*!< LCD frequency = CLKPS/24 */
-#define LCD_DIVIDER_25    ((uint32_t)0x00240000U)  /*!< LCD frequency = CLKPS/25 */
-#define LCD_DIVIDER_26    ((uint32_t)0x00280000U)  /*!< LCD frequency = CLKPS/26 */
-#define LCD_DIVIDER_27    ((uint32_t)0x002C0000U)  /*!< LCD frequency = CLKPS/27 */
-#define LCD_DIVIDER_28    ((uint32_t)0x00300000U)  /*!< LCD frequency = CLKPS/28 */
-#define LCD_DIVIDER_29    ((uint32_t)0x00340000U)  /*!< LCD frequency = CLKPS/29 */
-#define LCD_DIVIDER_30    ((uint32_t)0x00380000U)  /*!< LCD frequency = CLKPS/30 */
-#define LCD_DIVIDER_31    ((uint32_t)LCD_FCR_DIV) /*!< LCD frequency = CLKPS/31 */
-
-#define IS_LCD_DIVIDER(__DIVIDER__) (((__DIVIDER__) == LCD_DIVIDER_16) || \
-                                     ((__DIVIDER__) == LCD_DIVIDER_17) || \
-                                     ((__DIVIDER__) == LCD_DIVIDER_18) || \
-                                     ((__DIVIDER__) == LCD_DIVIDER_19) || \
-                                     ((__DIVIDER__) == LCD_DIVIDER_20) || \
-                                     ((__DIVIDER__) == LCD_DIVIDER_21) || \
-                                     ((__DIVIDER__) == LCD_DIVIDER_22) || \
-                                     ((__DIVIDER__) == LCD_DIVIDER_23) || \
-                                     ((__DIVIDER__) == LCD_DIVIDER_24) || \
-                                     ((__DIVIDER__) == LCD_DIVIDER_25) || \
-                                     ((__DIVIDER__) == LCD_DIVIDER_26) || \
-                                     ((__DIVIDER__) == LCD_DIVIDER_27) || \
-                                     ((__DIVIDER__) == LCD_DIVIDER_28) || \
-                                     ((__DIVIDER__) == LCD_DIVIDER_29) || \
-                                     ((__DIVIDER__) == LCD_DIVIDER_30) || \
-                                     ((__DIVIDER__) == LCD_DIVIDER_31))
-
-/**
-  * @}
-  */
-
-
-/** @defgroup LCD_Duty LCD Duty
-  * @{
-  */
-  
-#define LCD_DUTY_STATIC                 ((uint32_t)0x00000000U)           /*!< Static duty */
-#define LCD_DUTY_1_2                    (LCD_CR_DUTY_0)                   /*!< 1/2 duty    */
-#define LCD_DUTY_1_3                    (LCD_CR_DUTY_1)                   /*!< 1/3 duty    */
-#define LCD_DUTY_1_4                    ((LCD_CR_DUTY_1 | LCD_CR_DUTY_0)) /*!< 1/4 duty    */
-#define LCD_DUTY_1_8                    (LCD_CR_DUTY_2)                   /*!< 1/8 duty    */
-
-#define IS_LCD_DUTY(__DUTY__) (((__DUTY__) == LCD_DUTY_STATIC)  || \
-                               ((__DUTY__) == LCD_DUTY_1_2)     || \
-                               ((__DUTY__) == LCD_DUTY_1_3)     || \
-                               ((__DUTY__) == LCD_DUTY_1_4)     || \
-                               ((__DUTY__) == LCD_DUTY_1_8))
-
-/**
-  * @}
-  */ 
-  
-
-/** @defgroup LCD_Bias LCD Bias
-  * @{
-  */
-  
-#define LCD_BIAS_1_4                    ((uint32_t)0x00000000U) /*!< 1/4 Bias */
-#define LCD_BIAS_1_2                    LCD_CR_BIAS_0           /*!< 1/2 Bias */
-#define LCD_BIAS_1_3                    LCD_CR_BIAS_1           /*!< 1/3 Bias */
-
-#define IS_LCD_BIAS(__BIAS__) (((__BIAS__) == LCD_BIAS_1_4) || \
-                               ((__BIAS__) == LCD_BIAS_1_2) || \
-                               ((__BIAS__) == LCD_BIAS_1_3))
-/**
-  * @}
-  */ 
-    
-/** @defgroup LCD_Voltage_Source LCD Voltage Source
-  * @{
-  */
-  
-#define LCD_VOLTAGESOURCE_INTERNAL      ((uint32_t)0x00000000U) /*!< Internal voltage source for the LCD */
-#define LCD_VOLTAGESOURCE_EXTERNAL      LCD_CR_VSEL             /*!< External voltage source for the LCD */
-
-#define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VOLTAGESOURCE_INTERNAL) || \
-                                       ((SOURCE) == LCD_VOLTAGESOURCE_EXTERNAL))
-
-/**
-  * @}
-  */  
-
-/** @defgroup LCD_Interrupts LCD Interrupts
-  * @{
-  */
-#define LCD_IT_SOF                      LCD_FCR_SOFIE
-#define LCD_IT_UDD                      LCD_FCR_UDDIE
-
-/**
-  * @}
-  */
-
-/** @defgroup LCD_PulseOnDuration LCD Pulse On Duration
-  * @{
-  */
-
-#define LCD_PULSEONDURATION_0           ((uint32_t)0x00000000U)         /*!< Pulse ON duration = 0 pulse   */
-#define LCD_PULSEONDURATION_1           (LCD_FCR_PON_0)                 /*!< Pulse ON duration = 1/CK_PS  */
-#define LCD_PULSEONDURATION_2           (LCD_FCR_PON_1)                 /*!< Pulse ON duration = 2/CK_PS  */
-#define LCD_PULSEONDURATION_3           (LCD_FCR_PON_1 | LCD_FCR_PON_0) /*!< Pulse ON duration = 3/CK_PS  */
-#define LCD_PULSEONDURATION_4           (LCD_FCR_PON_2)                 /*!< Pulse ON duration = 4/CK_PS  */
-#define LCD_PULSEONDURATION_5           (LCD_FCR_PON_2 | LCD_FCR_PON_0) /*!< Pulse ON duration = 5/CK_PS  */
-#define LCD_PULSEONDURATION_6           (LCD_FCR_PON_2 | LCD_FCR_PON_1) /*!< Pulse ON duration = 6/CK_PS  */
-#define LCD_PULSEONDURATION_7           (LCD_FCR_PON)                   /*!< Pulse ON duration = 7/CK_PS  */
-
-#define IS_LCD_PULSE_ON_DURATION(__DURATION__) (((__DURATION__) == LCD_PULSEONDURATION_0) || \
-                                                ((__DURATION__) == LCD_PULSEONDURATION_1) || \
-                                                ((__DURATION__) == LCD_PULSEONDURATION_2) || \
-                                                ((__DURATION__) == LCD_PULSEONDURATION_3) || \
-                                                ((__DURATION__) == LCD_PULSEONDURATION_4) || \
-                                                ((__DURATION__) == LCD_PULSEONDURATION_5) || \
-                                                ((__DURATION__) == LCD_PULSEONDURATION_6) || \
-                                                ((__DURATION__) == LCD_PULSEONDURATION_7))
-/**
-  * @}
-  */
-
-/** @defgroup LCD_HighDrive LCD HighDrive
-  * @{
-  */
-
-#define LCD_HIGHDRIVE_0           ((uint32_t)0x00000000U)         /*!< Low resistance Drive   */
-#define LCD_HIGHDRIVE_1           (LCD_FCR_HD)                    /*!< High resistance Drive  */
-
-#define IS_LCD_HIGHDRIVE(__HIGHDRIVE__) (((__HIGHDRIVE__) == LCD_HIGHDRIVE_0) || \
-                                         ((__HIGHDRIVE__) == LCD_HIGHDRIVE_1))
-/**
-  * @}
-  */
-
-/** @defgroup LCD_DeadTime LCD Dead Time
-  * @{
-  */
-
-#define LCD_DEADTIME_0                  ((uint32_t)0x00000000U)           /*!< No dead Time  */
-#define LCD_DEADTIME_1                  (LCD_FCR_DEAD_0)                  /*!< One Phase between different couple of Frame   */
-#define LCD_DEADTIME_2                  (LCD_FCR_DEAD_1)                  /*!< Two Phase between different couple of Frame   */
-#define LCD_DEADTIME_3                  (LCD_FCR_DEAD_1 | LCD_FCR_DEAD_0) /*!< Three Phase between different couple of Frame */
-#define LCD_DEADTIME_4                  (LCD_FCR_DEAD_2)                  /*!< Four Phase between different couple of Frame  */
-#define LCD_DEADTIME_5                  (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_0) /*!< Five Phase between different couple of Frame  */
-#define LCD_DEADTIME_6                  (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_1) /*!< Six Phase between different couple of Frame   */
-#define LCD_DEADTIME_7                  (LCD_FCR_DEAD)                    /*!< Seven Phase between different couple of Frame */
-
-#define IS_LCD_DEAD_TIME(__TIME__) (((__TIME__) == LCD_DEADTIME_0) || \
-                                    ((__TIME__) == LCD_DEADTIME_1) || \
-                                    ((__TIME__) == LCD_DEADTIME_2) || \
-                                    ((__TIME__) == LCD_DEADTIME_3) || \
-                                    ((__TIME__) == LCD_DEADTIME_4) || \
-                                    ((__TIME__) == LCD_DEADTIME_5) || \
-                                    ((__TIME__) == LCD_DEADTIME_6) || \
-                                    ((__TIME__) == LCD_DEADTIME_7))
-/**
-  * @}
-  */
-
-/** @defgroup LCD_BlinkMode LCD Blink Mode
-  * @{
-  */
-
-#define LCD_BLINKMODE_OFF               ((uint32_t)0x00000000U) /*!< Blink disabled            */
-#define LCD_BLINKMODE_SEG0_COM0         (LCD_FCR_BLINK_0)       /*!< Blink enabled on SEG[0], COM[0] (1 pixel)   */
-#define LCD_BLINKMODE_SEG0_ALLCOM       (LCD_FCR_BLINK_1)       /*!< Blink enabled on SEG[0], all COM (up to 
-                                                                    8 pixels according to the programmed duty)  */
-#define LCD_BLINKMODE_ALLSEG_ALLCOM     (LCD_FCR_BLINK)         /*!< Blink enabled on all SEG and all COM (all pixels)  */
-
-#define IS_LCD_BLINK_MODE(__MODE__) (((__MODE__) == LCD_BLINKMODE_OFF)            || \
-                                     ((__MODE__) == LCD_BLINKMODE_SEG0_COM0)      || \
-                                     ((__MODE__) == LCD_BLINKMODE_SEG0_ALLCOM)    || \
-                                     ((__MODE__) == LCD_BLINKMODE_ALLSEG_ALLCOM))
-/**
-  * @}
-  */    
-
-/** @defgroup LCD_BlinkFrequency LCD Blink Frequency
-  * @{
-  */
-
-#define LCD_BLINKFREQUENCY_DIV8         ((uint32_t)0x00000000U)               /*!< The Blink frequency = fLCD/8    */
-#define LCD_BLINKFREQUENCY_DIV16        (LCD_FCR_BLINKF_0)                    /*!< The Blink frequency = fLCD/16   */
-#define LCD_BLINKFREQUENCY_DIV32        (LCD_FCR_BLINKF_1)                    /*!< The Blink frequency = fLCD/32   */
-#define LCD_BLINKFREQUENCY_DIV64        (LCD_FCR_BLINKF_1 | LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/64   */
-#define LCD_BLINKFREQUENCY_DIV128       (LCD_FCR_BLINKF_2)                    /*!< The Blink frequency = fLCD/128  */
-#define LCD_BLINKFREQUENCY_DIV256       (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_0)  /*!< The Blink frequency = fLCD/256  */
-#define LCD_BLINKFREQUENCY_DIV512       (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_1)  /*!< The Blink frequency = fLCD/512  */
-#define LCD_BLINKFREQUENCY_DIV1024      (LCD_FCR_BLINKF)                      /*!< The Blink frequency = fLCD/1024 */
-
-#define IS_LCD_BLINK_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV8)   || \
-                                               ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV16)  || \
-                                               ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV32)  || \
-                                               ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV64)  || \
-                                               ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV128) || \
-                                               ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV256) || \
-                                               ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV512) || \
-                                               ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV1024))
-/**
-  * @}
-  */
-
-/** @defgroup LCD_Contrast LCD Contrast
-  * @{
-  */
-
-#define LCD_CONTRASTLEVEL_0               ((uint32_t)0x00000000U)       /*!< Maximum Voltage = 2.60V    */
-#define LCD_CONTRASTLEVEL_1               (LCD_FCR_CC_0)                /*!< Maximum Voltage = 2.73V    */
-#define LCD_CONTRASTLEVEL_2               (LCD_FCR_CC_1)                /*!< Maximum Voltage = 2.86V    */
-#define LCD_CONTRASTLEVEL_3               (LCD_FCR_CC_1 | LCD_FCR_CC_0) /*!< Maximum Voltage = 2.99V    */
-#define LCD_CONTRASTLEVEL_4               (LCD_FCR_CC_2)                /*!< Maximum Voltage = 3.12V    */
-#define LCD_CONTRASTLEVEL_5               (LCD_FCR_CC_2 | LCD_FCR_CC_0) /*!< Maximum Voltage = 3.25V    */
-#define LCD_CONTRASTLEVEL_6               (LCD_FCR_CC_2 | LCD_FCR_CC_1) /*!< Maximum Voltage = 3.38V    */
-#define LCD_CONTRASTLEVEL_7               (LCD_FCR_CC)                  /*!< Maximum Voltage = 3.51V    */
-
-#define IS_LCD_CONTRAST(__CONTRAST__) (((__CONTRAST__) == LCD_CONTRASTLEVEL_0) || \
-                                       ((__CONTRAST__) == LCD_CONTRASTLEVEL_1) || \
-                                       ((__CONTRAST__) == LCD_CONTRASTLEVEL_2) || \
-                                       ((__CONTRAST__) == LCD_CONTRASTLEVEL_3) || \
-                                       ((__CONTRAST__) == LCD_CONTRASTLEVEL_4) || \
-                                       ((__CONTRAST__) == LCD_CONTRASTLEVEL_5) || \
-                                       ((__CONTRAST__) == LCD_CONTRASTLEVEL_6) || \
-                                       ((__CONTRAST__) == LCD_CONTRASTLEVEL_7))
-/**
-  * @}
-  */
-      
-/** @defgroup LCD_MuxSegment LCD Mux Segment
-  * @{
-  */
-
-#define LCD_MUXSEGMENT_DISABLE            ((uint32_t)0x00000000U)       /*!< SEG pin multiplexing disabled */
-#define LCD_MUXSEGMENT_ENABLE             (LCD_CR_MUX_SEG)              /*!< SEG[31:28] are multiplexed with SEG[43:40]    */
-
-#define IS_LCD_MUXSEGMENT(__VALUE__) (((__VALUE__) == LCD_MUXSEGMENT_ENABLE) || \
-                                      ((__VALUE__) == LCD_MUXSEGMENT_DISABLE))
-/**
-  * @}
-  */
-
-/** @defgroup LCD_BUFEN LCD Voltage output buffer enable
-  * @{
-  */
-
-#define LCD_VOLTBUFOUT_DISABLE            ((uint32_t)0x00000000U)       /*!< Voltage output buffer disabled */
-#define LCD_VOLTBUFOUT_ENABLE             (LCD_CR_BUFEN)                /*!< BUFEN[1] Voltage output buffer enabled    */
-
-#define IS_LCD_VOLTBUFOUT(__VALUE__) (((__VALUE__) == LCD_VOLTBUFOUT_ENABLE) || \
-                                      ((__VALUE__) == LCD_VOLTBUFOUT_DISABLE))
-/**
-  * @}
-  */
-
-/** @defgroup LCD_Flag LCD Flag
-  * @{
-  */
-
-#define LCD_FLAG_ENS                    LCD_SR_ENS
-#define LCD_FLAG_SOF                    LCD_SR_SOF
-#define LCD_FLAG_UDR                    LCD_SR_UDR
-#define LCD_FLAG_UDD                    LCD_SR_UDD
-#define LCD_FLAG_RDY                    LCD_SR_RDY
-#define LCD_FLAG_FCRSF                  LCD_SR_FCRSR
-
-/**
-  * @}
-  */   
-
-/** @defgroup LCD_RAMRegister LCD RAMRegister
-  * @{
-  */
-
-#define LCD_RAM_REGISTER0               ((uint32_t)0x00000000U) /*!< LCD RAM Register 0  */
-#define LCD_RAM_REGISTER1               ((uint32_t)0x00000001U) /*!< LCD RAM Register 1  */
-#define LCD_RAM_REGISTER2               ((uint32_t)0x00000002U) /*!< LCD RAM Register 2  */
-#define LCD_RAM_REGISTER3               ((uint32_t)0x00000003U) /*!< LCD RAM Register 3  */
-#define LCD_RAM_REGISTER4               ((uint32_t)0x00000004U) /*!< LCD RAM Register 4  */
-#define LCD_RAM_REGISTER5               ((uint32_t)0x00000005U) /*!< LCD RAM Register 5  */
-#define LCD_RAM_REGISTER6               ((uint32_t)0x00000006U) /*!< LCD RAM Register 6  */
-#define LCD_RAM_REGISTER7               ((uint32_t)0x00000007U) /*!< LCD RAM Register 7  */
-#define LCD_RAM_REGISTER8               ((uint32_t)0x00000008U) /*!< LCD RAM Register 8  */
-#define LCD_RAM_REGISTER9               ((uint32_t)0x00000009U) /*!< LCD RAM Register 9  */
-#define LCD_RAM_REGISTER10              ((uint32_t)0x0000000AU) /*!< LCD RAM Register 10 */
-#define LCD_RAM_REGISTER11              ((uint32_t)0x0000000BU) /*!< LCD RAM Register 11 */
-#define LCD_RAM_REGISTER12              ((uint32_t)0x0000000CU) /*!< LCD RAM Register 12 */
-#define LCD_RAM_REGISTER13              ((uint32_t)0x0000000DU) /*!< LCD RAM Register 13 */
-#define LCD_RAM_REGISTER14              ((uint32_t)0x0000000EU) /*!< LCD RAM Register 14 */
-#define LCD_RAM_REGISTER15              ((uint32_t)0x0000000FU) /*!< LCD RAM Register 15 */
-
-#define IS_LCD_RAM_REGISTER(__REGISTER__) (((__REGISTER__) == LCD_RAM_REGISTER0)  || \
-                                           ((__REGISTER__) == LCD_RAM_REGISTER1)  || \
-                                           ((__REGISTER__) == LCD_RAM_REGISTER2)  || \
-                                           ((__REGISTER__) == LCD_RAM_REGISTER3)  || \
-                                           ((__REGISTER__) == LCD_RAM_REGISTER4)  || \
-                                           ((__REGISTER__) == LCD_RAM_REGISTER5)  || \
-                                           ((__REGISTER__) == LCD_RAM_REGISTER6)  || \
-                                           ((__REGISTER__) == LCD_RAM_REGISTER7)  || \
-                                           ((__REGISTER__) == LCD_RAM_REGISTER8)  || \
-                                           ((__REGISTER__) == LCD_RAM_REGISTER9)  || \
-                                           ((__REGISTER__) == LCD_RAM_REGISTER10) || \
-                                           ((__REGISTER__) == LCD_RAM_REGISTER11) || \
-                                           ((__REGISTER__) == LCD_RAM_REGISTER12) || \
-                                           ((__REGISTER__) == LCD_RAM_REGISTER13) || \
-                                           ((__REGISTER__) == LCD_RAM_REGISTER14) || \
-                                           ((__REGISTER__) == LCD_RAM_REGISTER15))
-
-/**
-  * @}
-  */  
-   
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-
-/** @defgroup LCD_Exported_Macros LCD Exported Macros
-  * @{
-  */
-
-/** @brief Reset LCD handle state
-  * @param  __HANDLE__: specifies the LCD Handle.
-  * @retval None
-  */
-#define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__)  ((__HANDLE__)->State = HAL_LCD_STATE_RESET)
-
-/** @brief  macros to enables or disables the LCD
-  * @param  __HANDLE__: specifies the LCD Handle.  
-  * @retval None
-  */     
-#define __HAL_LCD_ENABLE(__HANDLE__)              (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN))
-#define __HAL_LCD_DISABLE(__HANDLE__)             (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN))
-
-/** @brief  macros to enables or disables the Voltage output buffer
-  * @param  __HANDLE__: specifies the LCD Handle.
-  * @retval None
-  */
-#define __HAL_LCD_VOLTOUTBUFFER_ENABLE(__HANDLE__)              (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_BUFEN))
-#define __HAL_LCD_VOLTOUTBUFFER_DISABLE(__HANDLE__)             (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_BUFEN))
-
-/** @brief  Macros to enable or disable the low resistance divider. Displays with high 
-  *         internal resistance may need a longer drive time to achieve 
-  *         satisfactory contrast. This function is useful in this case if some 
-  *         additional power consumption can be tolerated.
-  * @param  __HANDLE__: specifies the LCD Handle.
-  * @note   When this mode is enabled, the PulseOn Duration (PON) have to be 
-  *         programmed to 1/CK_PS (LCD_PULSEONDURATION_1).
-  * @retval None
-  */
-#define __HAL_LCD_HIGHDRIVER_ENABLE(__HANDLE__)                                \
-                              do{                                              \
-                                  SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
-                                  LCD_WaitForSynchro(__HANDLE__);              \
-                                 }while(0)
-
-#define __HAL_LCD_HIGHDRIVER_DISABLE(__HANDLE__)                               \
-                              do{                                              \
-                                  CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
-                                  LCD_WaitForSynchro(__HANDLE__);              \
-                                 }while(0)
-
-/**
-  * @brief  Macro to configure the LCD pulses on duration.
-  * @param  __HANDLE__: specifies the LCD Handle.
-  * @param  __DURATION__: specifies the LCD pulse on duration in terms of 
-  *         CK_PS (prescaled LCD clock period) pulses.
-  *   This parameter can be one of the following values:
-  *     @arg LCD_PULSEONDURATION_0: 0 pulse
-  *     @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS
-  *     @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS
-  *     @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS
-  *     @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS
-  *     @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS
-  *     @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS
-  *     @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS
-  * @retval None
-  */
-#define __HAL_LCD_PULSEONDURATION_CONFIG(__HANDLE__, __DURATION__)                \
-        do{                                                                       \
-            MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \
-            LCD_WaitForSynchro(__HANDLE__);                                       \
-           }while(0)
-
-/**
-  * @brief  Macro to configure the LCD dead time.
-  * @param  __HANDLE__: specifies the LCD Handle.
-  * @param  __DEADTIME__: specifies the LCD dead time.
-  *   This parameter can be one of the following values:
-  *     @arg LCD_DEADTIME_0: No dead Time
-  *     @arg LCD_DEADTIME_1: One Phase between different couple of Frame
-  *     @arg LCD_DEADTIME_2: Two Phase between different couple of Frame
-  *     @arg LCD_DEADTIME_3: Three Phase between different couple of Frame
-  *     @arg LCD_DEADTIME_4: Four Phase between different couple of Frame
-  *     @arg LCD_DEADTIME_5: Five Phase between different couple of Frame
-  *     @arg LCD_DEADTIME_6: Six Phase between different couple of Frame 
-  *     @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame
-  * @retval None
-  */
-#define __HAL_LCD_DEADTIME_CONFIG(__HANDLE__, __DEADTIME__)                        \
-        do{                                                                        \
-            MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \
-            LCD_WaitForSynchro(__HANDLE__);                                        \
-           }while(0)
-
-/**
-  * @brief  Macro to configure the LCD Contrast.
-  * @param  __HANDLE__: specifies the LCD Handle.
-  * @param  __CONTRAST__: specifies the LCD Contrast.
-  *   This parameter can be one of the following values:
-  *     @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V
-  *     @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V
-  *     @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V
-  *     @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V
-  *     @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V
-  *     @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.25V
-  *     @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.38V
-  *     @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.51V
-  * @retval None
-  */
-#define __HAL_LCD_CONTRAST_CONFIG(__HANDLE__, __CONTRAST__)                       \
-        do{                                                                       \
-            MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__));  \
-            LCD_WaitForSynchro(__HANDLE__);                                       \
-           } while(0) 
-
-/**
-  * @brief  Macro to configure the LCD Blink mode and Blink frequency.
-  * @param  __HANDLE__: specifies the LCD Handle.
-  * @param  __BLINKMODE__: specifies the LCD blink mode.
-  *   This parameter can be one of the following values:
-  *     @arg LCD_BLINKMODE_OFF:           Blink disabled
-  *     @arg LCD_BLINKMODE_SEG0_COM0:     Blink enabled on SEG[0], COM[0] (1 pixel)
-  *     @arg LCD_BLINKMODE_SEG0_ALLCOM:   Blink enabled on SEG[0], all COM (up to 8 
-  *                                       pixels according to the programmed duty)
-  *     @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM 
-  *                                       (all pixels)
-  * @param  __BLINKFREQUENCY__: specifies the LCD blink frequency.
-  *     @arg LCD_BLINKFREQUENCY_DIV8:    The Blink frequency = fLcd/8
-  *     @arg LCD_BLINKFREQUENCY_DIV16:   The Blink frequency = fLcd/16
-  *     @arg LCD_BLINKFREQUENCY_DIV32:   The Blink frequency = fLcd/32
-  *     @arg LCD_BLINKFREQUENCY_DIV64:   The Blink frequency = fLcd/64 
-  *     @arg LCD_BLINKFREQUENCY_DIV128:  The Blink frequency = fLcd/128
-  *     @arg LCD_BLINKFREQUENCY_DIV256:  The Blink frequency = fLcd/256
-  *     @arg LCD_BLINKFREQUENCY_DIV512:  The Blink frequency = fLcd/512
-  *     @arg LCD_BLINKFREQUENCY_DIV1024: The Blink frequency = fLcd/1024
-  * @retval None
-  */
-#define __HAL_LCD_BLINK_CONFIG(__HANDLE__, __BLINKMODE__, __BLINKFREQUENCY__)  \
-        do{                                                                    \
-            MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BLINKFREQUENCY__))); \
-            LCD_WaitForSynchro(__HANDLE__);                                    \
-          }while(0)
-
-/** @brief  Enables or disables the specified LCD interrupt.
-  * @param  __HANDLE__: specifies the LCD Handle.
-  * @param  __INTERRUPT__: specifies the LCD interrupt source to be enabled or disabled.
-  *          This parameter can be one of the following values:
-  *     @arg LCD_IT_SOF: Start of Frame Interrupt
-  *     @arg LCD_IT_UDD: Update Display Done Interrupt
-  * @retval None
-  */
-#define __HAL_LCD_ENABLE_IT(__HANDLE__, __INTERRUPT__)                                \
-                         do{                                                          \
-                             SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__));   \
-                             LCD_WaitForSynchro(__HANDLE__);                          \
-                            }while(0)         
-#define __HAL_LCD_DISABLE_IT(__HANDLE__, __INTERRUPT__)                               \
-                         do{                                                          \
-                             CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
-                             LCD_WaitForSynchro(__HANDLE__);                          \
-                            }while(0)
-
-/** @brief  Checks whether the specified LCD interrupt is enabled or not.
-  * @param  __HANDLE__: specifies the LCD Handle.
-  * @param  __IT__: specifies the LCD interrupt source to check.
-  *        This parameter can be one of the following values:
-  *        @arg LCD_IT_SOF: Start of Frame Interrupt
-  *        @arg LCD_IT_UDD: Update Display Done Interrupt.
-  * @note If the device is in STOP mode (PCLK not provided) UDD will not 
-  *          generate an interrupt even if UDDIE = 1. 
-  *          If the display is not enabled the UDD interrupt will never occur.
-  * @retval The state of __IT__ (TRUE or FALSE).
-  */
-#define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__))
-
-/** @brief  Checks whether the specified LCD flag is set or not.
-  * @param  __HANDLE__: specifies the LCD Handle.
-  * @param  __FLAG__: specifies the flag to check.
-  *        This parameter can be one of the following values:
-  *        @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status.
-  * @note  The ENS bit is set immediately when the LCDEN bit in the LCD_CR 
-  *             goes from 0 to 1. On deactivation it reflects the real status of 
-  *             LCD so it becomes 0 at the end of the last displayed frame.  
-  *        @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at 
-  *             the beginning of a new frame, at the same time as the display data is 
-  *             updated.
-  *        @arg LCD_FLAG_UDR: Update Display Request flag.
-  *        @arg LCD_FLAG_UDD: Update Display Done flag. 
-  *        @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status 
-  *             of the step-up converter.
-  *        @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag. 
-  *             This flag is set by hardware each time the LCD_FCR register is updated 
-  *             in the LCDCLK domain. 
-  * @retval The new state of __FLAG__ (TRUE or FALSE).
-  */
-#define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__)    (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))   
-
-/** @brief  Clears the specified LCD pending flag.
-  * @param  __HANDLE__: specifies the LCD Handle.
-  * @param  __FLAG__: specifies the flag to clear.
-  *        This parameter can be any combination of the following values:
-  *        @arg LCD_FLAG_SOF: Start of Frame Interrupt
-  *        @arg LCD_FLAG_UDD: Update Display Done Interrupt
-  * @retval None
-  */
-#define __HAL_LCD_CLEAR_FLAG(__HANDLE__, __FLAG__)  ((__HANDLE__)->Instance->CLR = (__FLAG__))
-
-/**
-  * @}
-  */
-  
-/* Exported functions ------------------------------------------------------- */
-
-/** @defgroup LCD_Exported_Functions LCD Exported Functions
-  * @{
-  */
-
-/** @defgroup LCD_Exported_Functions_Group1 Initialization and de-initialization methods
-  * @{
-  */
-
-/* Initialization/de-initialization methods  **********************************/
-HAL_StatusTypeDef     HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd);
-HAL_StatusTypeDef     HAL_LCD_Init(LCD_HandleTypeDef *hlcd);
-void                  HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd);
-void                  HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd);
-
-/**
-  * @}
-  */
-
-/** @defgroup LCD_Exported_Functions_Group2 IO operation methods
-  * @{
-  */
-
-/* IO operation methods *******************************************************/
-HAL_StatusTypeDef     HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data);
-HAL_StatusTypeDef     HAL_LCD_Clear(LCD_HandleTypeDef *hlcd);
-HAL_StatusTypeDef     HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd);
-
-/**
-  * @}
-  */
-
-/** @defgroup LCD_Exported_Functions_Group3 Peripheral State methods
-  * @{
-  */
-
-/* Peripheral State methods  **************************************************/
-HAL_LCD_StateTypeDef  HAL_LCD_GetState(LCD_HandleTypeDef *hlcd);
-uint32_t              HAL_LCD_GetError(LCD_HandleTypeDef *hlcd);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup LCD_Private
-  * @{
-  */
-
-/* Private functions ---------------------------------------------------------*/
-HAL_StatusTypeDef     LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd);
-
-/**
-  * @}
-  */
-
-/* Define the private group ***********************************/
-/**************************************************************/
-/** @defgroup LCD_Private LCD Private
-  * @{
-  */
-/**
-  * @}
-  */
-/**************************************************************/
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* STM32L053xx || STM32L063xx || STM32L073xx || STM32L083xx */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_LCD_H */
-
-/******************* (C) COPYRIGHT 2016 STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lptim.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lptim.h
deleted file mode 100755
index 8bd6309c..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lptim.h
+++ /dev/null
@@ -1,743 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_lptim.h
-  * @author  MCD Application Team
-  * @brief   Header file of LPTIM HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_LPTIM_H
-#define __STM32L0xx_HAL_LPTIM_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup LPTIM LPTIM (Low power timer)
-  * @{
-  */ 
-
-/* Exported types ------------------------------------------------------------*/ 
- /** @defgroup LPTIM_Exported_Types LPTIM Exported Types
-  * @{
-  */
-
-/** @defgroup LPTIM_Clock_Configuration LPTIM Clock configuration structure
-  * @{
-  */
-#define LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT  ((uint32_t)EXTI_IMR_IM29)  /*!< External interrupt line 29 Connected to the LPTIM EXTI Line */
-
-/** 
-  * @brief  LPTIM Clock configuration definition  
-  */
-typedef struct
-{
-  uint32_t Source;         /*!< Selects the clock source.
-                           This parameter can be a value of @ref LPTIM_Clock_Source   */
-
-  uint32_t Prescaler;      /*!< Specifies the counter clock Prescaler.
-                           This parameter can be a value of @ref LPTIM_Clock_Prescaler */
-  
-}LPTIM_ClockConfigTypeDef;
-/**
-  * @}
-  */
-
-/** @defgroup LPTIM_ULPClock_Configuration LPTIM ULP Clock configuration structure
-  * @{
-  */
-/** 
-  * @brief  LPTIM ULP Clock configuration definition
-  */
-typedef struct
-{
-  uint32_t Polarity;      /*!< Selects the polarity of the active edge for the counter unit
-                           if the ULPTIM input is selected.
-                           Note: This parameter is used only when Ultra low power clock source is used.
-                           Note: If the polarity is configured on 'both edges', an auxiliary clock
-                           (one of the Low power oscillator) must be active.
-                           This parameter can be a value of @ref LPTIM_Clock_Polarity */ 
-  
-  uint32_t SampleTime;     /*!< Selects the clock sampling time to configure the clock glitch filter.
-                           Note: This parameter is used only when Ultra low power clock source is used.
-                           This parameter can be a value of @ref LPTIM_Clock_Sample_Time */  
-  
-}LPTIM_ULPClockConfigTypeDef;
-/**
-  * @}
-  */
-
-/** @defgroup LPTIM_Trigger_Configuration LPTIM Trigger configuration structure
-  * @{
-  */
-/** 
-  * @brief  LPTIM Trigger configuration structure
-  */
-typedef struct
-{
-  uint32_t Source;        /*!< Selects the Trigger source.
-                          This parameter can be a value of @ref LPTIM_Trigger_Source */
-  
-  uint32_t ActiveEdge;    /*!< Selects the Trigger active edge.
-                          Note: This parameter is used only when an external trigger is used.
-                          This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */
-  
-  uint32_t SampleTime;    /*!< Selects the trigger sampling time to configure the clock glitch filter.
-                          Note: This parameter is used only when an external trigger is used.
-                          This parameter can be a value of @ref LPTIM_Trigger_Sample_Time  */  
-}LPTIM_TriggerConfigTypeDef;
-/**
-  * @}
-  */
-
-/** @defgroup LPTIM_Init_Configuration LPTIM Initialization configuration structure
-  * @{
-  */
-/** 
-  * @brief  LPTIM Initialization Structure definition  
-  */
-typedef struct
-{                                                    
-  LPTIM_ClockConfigTypeDef     Clock;               /*!< Specifies the clock parameters */
-                                                    
-  LPTIM_ULPClockConfigTypeDef  UltraLowPowerClock;  /*!< Specifies the Ultra Low Power clock parameters */
-                                                    
-  LPTIM_TriggerConfigTypeDef   Trigger;             /*!< Specifies the Trigger parameters */
-                                                    
-  uint32_t                     OutputPolarity;      /*!< Specifies the Output polarity.
-                                                    This parameter can be a value of @ref LPTIM_Output_Polarity */
-                                                    
-  uint32_t                     UpdateMode;          /*!< Specifies whether the update of the autorelaod and the compare
-                                                    values is done immediately or after the end of current period.
-                                                    This parameter can be a value of @ref LPTIM_Updating_Mode */
-
-  uint32_t                     CounterSource;       /*!< Specifies whether the counter is incremented each internal event
-                                                    or each external event.
-                                                    This parameter can be a value of @ref LPTIM_Counter_Source */  
-  
-}LPTIM_InitTypeDef;
-/**
-  * @}
-  */
-/** @defgroup LPTIM_State_structure  LPTIM state definition
-  * @{
-  */
-/** 
-  * @brief  HAL LPTIM State structure definition  
-  */ 
-typedef enum __HAL_LPTIM_StateTypeDef
-{
-  HAL_LPTIM_STATE_RESET            = 0x00U,    /*!< Peripheral not yet initialized or disabled  */
-  HAL_LPTIM_STATE_READY            = 0x01U,    /*!< Peripheral Initialized and ready for use    */
-  HAL_LPTIM_STATE_BUSY             = 0x02U,    /*!< An internal process is ongoing              */    
-  HAL_LPTIM_STATE_TIMEOUT          = 0x03U,    /*!< Timeout state                               */  
-  HAL_LPTIM_STATE_ERROR            = 0x04U     /*!< Internal Process is ongoing                */                                                                             
-}HAL_LPTIM_StateTypeDef;
-/**
-  * @}
-  */
-
-/** @defgroup LPTIM_Handle  LPTIM handler
-  * @{
-  */
-/** 
-  * @brief  LPTIM handle Structure definition  
-  */ 
-typedef struct
-{
-      LPTIM_TypeDef              *Instance;         /*!< Register base address     */
-      
-      LPTIM_InitTypeDef           Init;             /*!< LPTIM required parameters */
-  
-      HAL_StatusTypeDef           Status;           /*!< LPTIM peripheral status   */  
-  
-      HAL_LockTypeDef             Lock;             /*!< LPTIM locking object      */
-  
-   __IO  HAL_LPTIM_StateTypeDef   State;            /*!< LPTIM peripheral state    */
-  
-}LPTIM_HandleTypeDef;
-
-/**
-  * @}
-  */
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup LPTIM_Exported_Constants LPTIM Exported constants
-  * @{
-  */
-
-/* Check autoreload value */
-#define IS_LPTIM_AUTORELOAD(__AUTORELOAD__)     ((__AUTORELOAD__) <= 0x0000FFFFU)
-
-/* Check compare value */
-#define IS_LPTIM_COMPARE(__COMPARE__)          ((__COMPARE__) <= 0x0000FFFFU)
-
-/** @defgroup LPTIM_Clock_Source Clock source
-  * @{
-  */
-#define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC        ((uint32_t)0x00U)
-#define LPTIM_CLOCKSOURCE_ULPTIM                LPTIM_CFGR_CKSEL
-/**                                             
-  * @}
-  */
-#define IS_LPTIM_CLOCK_SOURCE(__SOURCE__)       (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \
-                                                 ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC))
-
-
-/** @defgroup LPTIM_Clock_Prescaler Prescaler
-  * @{
-  */
-#define LPTIM_PRESCALER_DIV1                    ((uint32_t)0x000000U)
-#define LPTIM_PRESCALER_DIV2                    LPTIM_CFGR_PRESC_0
-#define LPTIM_PRESCALER_DIV4                    LPTIM_CFGR_PRESC_1
-#define LPTIM_PRESCALER_DIV8                    ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1))
-#define LPTIM_PRESCALER_DIV16                   LPTIM_CFGR_PRESC_2
-#define LPTIM_PRESCALER_DIV32                   ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2))
-#define LPTIM_PRESCALER_DIV64                   ((uint32_t)(LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2))
-#define LPTIM_PRESCALER_DIV128                  ((uint32_t)LPTIM_CFGR_PRESC)
-/**
-  * @}
-  */
-
-#define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) ==  LPTIM_PRESCALER_DIV1  ) || \
-                                                 ((__PRESCALER__) ==  LPTIM_PRESCALER_DIV2  ) || \
-                                                 ((__PRESCALER__) ==  LPTIM_PRESCALER_DIV4  ) || \
-                                                 ((__PRESCALER__) ==  LPTIM_PRESCALER_DIV8  ) || \
-                                                 ((__PRESCALER__) ==  LPTIM_PRESCALER_DIV16 ) || \
-                                                 ((__PRESCALER__) ==  LPTIM_PRESCALER_DIV32 ) || \
-                                                 ((__PRESCALER__) ==  LPTIM_PRESCALER_DIV64 ) || \
-                                                 ((__PRESCALER__) ==  LPTIM_PRESCALER_DIV128))
-
-#define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) ==  LPTIM_PRESCALER_DIV1)
-
-
-/** @defgroup LPTIM_Output_Polarity Output polarity
-  * @{
-  */
-#define LPTIM_OUTPUTPOLARITY_HIGH               ((uint32_t)0x00000000U)
-#define LPTIM_OUTPUTPOLARITY_LOW                (LPTIM_CFGR_WAVPOL)
-/**
-  * @}
-  */
-#define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__)  (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) || \
-                                                 ((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH))
-
-/** @defgroup LPTIM_Clock_Sample_Time Clock sample time
-  * @{
-  */
-#define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION ((uint32_t)0x00000000U)
-#define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS     LPTIM_CFGR_CKFLT_0
-#define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS     LPTIM_CFGR_CKFLT_1
-#define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS     LPTIM_CFGR_CKFLT
-/**
-  * @}
-  */
-#define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__)  (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \
-                                                     ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS)     || \
-                                                     ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS)     || \
-                                                     ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS))
-
-/** @defgroup LPTIM_Clock_Polarity Clock polarity
-  * @{
-  */
-#define LPTIM_CLOCKPOLARITY_RISING                   ((uint32_t)0x00000000U)
-#define LPTIM_CLOCKPOLARITY_FALLING                  LPTIM_CFGR_CKPOL_0
-#define LPTIM_CLOCKPOLARITY_RISING_FALLING           LPTIM_CFGR_CKPOL_1
-/**
-  * @}
-  */
-
-#define IS_LPTIM_CLOCK_POLARITY(__POLARITY__)   (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING)  || \
-                                                 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \
-                                                 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING))
-
-/** @defgroup LPTIM_External_Trigger_Polarity Trigger polarity
-  * @{
-  */
-#define LPTIM_ACTIVEEDGE_RISING                LPTIM_CFGR_TRIGEN_0
-#define LPTIM_ACTIVEEDGE_FALLING               LPTIM_CFGR_TRIGEN_1
-#define LPTIM_ACTIVEEDGE_RISING_FALLING        LPTIM_CFGR_TRIGEN
-/**
-  * @}
-  */
-#define IS_LPTIM_EXT_TRG_POLARITY(__POLAR__)   (((__POLAR__) == LPTIM_ACTIVEEDGE_RISING         ) || \
-                                                ((__POLAR__) == LPTIM_ACTIVEEDGE_FALLING        ) || \
-                                                ((__POLAR__) == LPTIM_ACTIVEEDGE_RISING_FALLING ))
-
-/** @defgroup LPTIM_Trigger_Sample_Time Trigger sample time
-  * @{
-  */
-#define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION  ((uint32_t)0x00000000U)
-#define LPTIM_TRIGSAMPLETIME_2TRANSITIONS       LPTIM_CFGR_TRGFLT_0
-#define LPTIM_TRIGSAMPLETIME_4TRANSITIONS       LPTIM_CFGR_TRGFLT_1
-#define LPTIM_TRIGSAMPLETIME_8TRANSITIONS       LPTIM_CFGR_TRGFLT
-/**
-  * @}
-  */
-#define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION  ) || \
-                                                   ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS    ) || \
-                                                   ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS    ) || \
-                                                   ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS    ))
-
-
-/** @defgroup LPTIM_Updating_Mode Updating mode
-  * @{
-  */
-
-#define LPTIM_UPDATE_IMMEDIATE                  ((uint32_t)0x00000000U)
-#define LPTIM_UPDATE_ENDOFPERIOD                LPTIM_CFGR_PRELOAD
-/**
-  * @}
-  */
-#define IS_LPTIM_UPDATE_MODE(__MODE__)          (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \
-                                                 ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD))
-
-
-
-/** @defgroup LPTIM_Counter_Source Counter source
-  * @{
-  */
-#define LPTIM_COUNTERSOURCE_INTERNAL            ((uint32_t)0x00000000U)
-#define LPTIM_COUNTERSOURCE_EXTERNAL            LPTIM_CFGR_COUNTMODE
-/**
-  * @}
-  */
-#define IS_LPTIM_COUNTER_SOURCE(__SOURCE__)     (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \
-                                                 ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL))
-
-
-
-/* Check for period value */
-#define IS_LPTIM_PERIOD(__PERIOD__)               ((__PERIOD__) <= 0x0000FFFFU)
-
-/* Check for pulse value */
-#define IS_LPTIM_PULSE(__PULSE__)                 ((__PULSE__) <= 0x0000FFFFU)
-
-/** @defgroup LPTIM_Flag_Definition Flag definition
-  * @{
-  */
-#define LPTIM_FLAG_DOWN                          LPTIM_ISR_DOWN
-#define LPTIM_FLAG_UP                            LPTIM_ISR_UP
-#define LPTIM_FLAG_ARROK                         LPTIM_ISR_ARROK
-#define LPTIM_FLAG_CMPOK                         LPTIM_ISR_CMPOK
-#define LPTIM_FLAG_EXTTRIG                       LPTIM_ISR_EXTTRIG
-#define LPTIM_FLAG_ARRM                          LPTIM_ISR_ARRM
-#define LPTIM_FLAG_CMPM                          LPTIM_ISR_CMPM
-/**
-  * @}
-  */
-
-/** @defgroup LPTIM_Interrupts_Definition Interrupts definition
-  * @{
-  */
-#define LPTIM_IT_DOWN                            LPTIM_IER_DOWNIE
-#define LPTIM_IT_UP                              LPTIM_IER_UPIE
-#define LPTIM_IT_ARROK                           LPTIM_IER_ARROKIE
-#define LPTIM_IT_CMPOK                           LPTIM_IER_CMPOKIE
-#define LPTIM_IT_EXTTRIG                         LPTIM_IER_EXTTRIGIE
-#define LPTIM_IT_ARRM                            LPTIM_IER_ARRMIE
-#define LPTIM_IT_CMPM                            LPTIM_IER_CMPMIE
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-
-/** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros
-  * @{
-  */
-
-/** @brief Reset LPTIM handle state
-  * @param  __HANDLE__: LPTIM handle
-  * @retval None
-  */
-#define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET)
-
-/**
-  * @brief  Enable/Disable the LPTIM peripheral.
-  * @param  __HANDLE__: LPTIM handle
-  * @retval None
-  */
-#define __HAL_LPTIM_ENABLE(__HANDLE__)   ((__HANDLE__)->Instance->CR |=  (LPTIM_CR_ENABLE))
-#define __HAL_LPTIM_DISABLE(__HANDLE__)  ((__HANDLE__)->Instance->CR &=  ~(LPTIM_CR_ENABLE))
-
-/**
-  * @brief  Starts the LPTIM peripheral in Continuous or in single mode.
-  * @param  __HANDLE__: DMA handle
-  * @retval None
-  */
-#define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__)  ((__HANDLE__)->Instance->CR |=  LPTIM_CR_CNTSTRT)
-#define __HAL_LPTIM_START_SINGLE(__HANDLE__)      ((__HANDLE__)->Instance->CR |=  LPTIM_CR_SNGSTRT)
- 
-    
-/**
-  * @brief  Writes the passed parameter in the Autoreload register.
-  * @param  __HANDLE__: LPTIM handle
-  * @param  __VALUE__ : Autoreload value
-  * @retval None
-  */
-#define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__)  ((__HANDLE__)->Instance->ARR =  (__VALUE__))
-
-/**
-  * @brief  Writes the passed parameter in the Compare register.
-  * @param  __HANDLE__: LPTIM handle
-  * @param  __VALUE__ : Compare value
-  * @retval None
-  */
-#define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__)     ((__HANDLE__)->Instance->CMP =  (__VALUE__))
-
-/**
-  * @brief  Checks whether the specified LPTIM flag is set or not.
-  * @param  __HANDLE__: LPTIM handle
-  * @param  __FLAG__  : LPTIM flag to check
-  *            This parameter can be a value of:
-  *            @arg LPTIM_FLAG_DOWN    : Counter direction change up Flag.
-  *            @arg LPTIM_FLAG_UP      : Counter direction change down to up Flag.
-  *            @arg LPTIM_FLAG_ARROK   : Autoreload register update OK Flag.
-  *            @arg LPTIM_FLAG_CMPOK   : Compare register update OK Flag.
-  *            @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
-  *            @arg LPTIM_FLAG_ARRM    : Autoreload match Flag.
-  *            @arg LPTIM_FLAG_CMPM    : Compare match Flag.
-  * @retval The state of the specified flag (SET or RESET).
-  */
-#define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__)          (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__))
-
-/**
-  * @brief  Clears the specified LPTIM flag.
-  * @param  __HANDLE__: LPTIM handle.
-  * @param  __FLAG__  : LPTIM flag to clear.
-  *            This parameter can be a value of:
-  *            @arg LPTIM_FLAG_DOWN    : Counter direction change up Flag.
-  *            @arg LPTIM_FLAG_UP      : Counter direction change down to up Flag.
-  *            @arg LPTIM_FLAG_ARROK   : Autoreload register update OK Flag.
-  *            @arg LPTIM_FLAG_CMPOK   : Compare register update OK Flag.
-  *            @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
-  *            @arg LPTIM_FLAG_ARRM    : Autoreload match Flag.
-  *            @arg LPTIM_FLAG_CMPM    : Compare match Flag.
-  * @retval None.
-  */
-#define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__)         ((__HANDLE__)->Instance->ICR  = (__FLAG__))
-
-/**
-  * @brief  Enable the specified LPTIM interrupt.
-  * @param  __HANDLE__    : LPTIM handle.
-  * @param  __INTERRUPT__ : LPTIM interrupt to set.
-  *            This parameter can be a value of:
-  *            @arg LPTIM_IT_DOWN    : Counter direction change up Interrupt.
-  *            @arg LPTIM_IT_UP      : Counter direction change down to up Interrupt.
-  *            @arg LPTIM_IT_ARROK   : Autoreload register update OK Interrupt.
-  *            @arg LPTIM_IT_CMPOK   : Compare register update OK Interrupt.
-  *            @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
-  *            @arg LPTIM_IT_ARRM    : Autoreload match Interrupt.
-  *            @arg LPTIM_IT_CMPM    : Compare match Interrupt.
-  * @retval None.
-  */
-#define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__)         ((__HANDLE__)->Instance->IER  |= (__INTERRUPT__))
-
- /**
-  * @brief  Disable the specified LPTIM interrupt.
-  * @param  __HANDLE__    : LPTIM handle.
-  * @param  __INTERRUPT__ : LPTIM interrupt to set.
-  *            This parameter can be a value of:
-  *            @arg LPTIM_IT_DOWN    : Counter direction change up Interrupt.
-  *            @arg LPTIM_IT_UP      : Counter direction change down to up Interrupt.
-  *            @arg LPTIM_IT_ARROK   : Autoreload register update OK Interrupt.
-  *            @arg LPTIM_IT_CMPOK   : Compare register update OK Interrupt.
-  *            @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
-  *            @arg LPTIM_IT_ARRM    : Autoreload match Interrupt.
-  *            @arg LPTIM_IT_CMPM    : Compare match Interrupt.
-  * @retval None.
-  */
-#define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__)         ((__HANDLE__)->Instance->IER  &= (~(__INTERRUPT__)))
-
-  /**
-  * @brief  Checks whether the specified LPTIM interrupt is set or not.
-  * @param  __HANDLE__    : LPTIM handle.
-  * @param  __INTERRUPT__ : LPTIM interrupt to check.
-  *            This parameter can be a value of:
-  *            @arg LPTIM_IT_DOWN    : Counter direction change up Interrupt.
-  *            @arg LPTIM_IT_UP      : Counter direction change down to up Interrupt.
-  *            @arg LPTIM_IT_ARROK   : Autoreload register update OK Interrupt.
-  *            @arg LPTIM_IT_CMPOK   : Compare register update OK Interrupt.
-  *            @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
-  *            @arg LPTIM_IT_ARRM    : Autoreload match Interrupt.
-  *            @arg LPTIM_IT_CMPM    : Compare match Interrupt.
-  * @retval Interrupt status.
-  */
-    
-#define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
-
-/**
-  * @brief  Enable interrupt on the LPTIM Wake-up Timer associated Exti line.
-  * @retval None
-  */
-#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT()       (EXTI->IMR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
-
-/**
-  * @brief  Disable interrupt on the LPTIM Wake-up Timer associated Exti line.
-  * @retval None
-  */
-#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT()      (EXTI->IMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
-
-/**
-  * @brief  Enable event on the LPTIM Wake-up Timer associated Exti line.
-  * @retval None.
-  */
-#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_EVENT()    (EXTI->EMR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
-
-/**
-  * @brief  Disable event on the LPTIM Wake-up Timer associated Exti line.
-  * @retval None.
-  */
-#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_EVENT()   (EXTI->EMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
-
-/**
-  * @brief  Enable falling edge trigger on the LPTIM Wake-up Timer associated Exti line. 
-  * @retval None.
-  */
-#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE()   (EXTI->FTSR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
-
-/**
-  * @brief  Disable falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
-  * @retval None.
-  */
-#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE()  (EXTI->FTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
-
-/**
-  * @brief  Enable rising edge trigger on the LPTIM Wake-up Timer associated Exti line.
-  * @retval None.
-  */
-#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE()    (EXTI->RTSR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
-
-/**
-  * @brief  Disable rising edge trigger on the LPTIM Wake-up Timer associated Exti line.
-  * @retval None.
-  */
-#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE()   (EXTI->RTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
-
-/**
-  * @brief  Enable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
-  * @retval None.
-  */
-#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();\
-                                                                     __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE();\
-                                                                    }while(0)
-
-/**
-  * @brief  Disable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
-  * @retval None.
-  */
-#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();\
-                                                                      __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE();\
-                                                                     }while(0)
-
-/**
-  * @brief Check whether the LPTIM Wake-up Timer associated Exti line interrupt flag is set or not.
-  * @retval Line Status.
-  */
-#define __HAL_LPTIM_WAKEUPTIMER_EXTI_GET_FLAG()              (EXTI->PR & LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
-
-/**
-  * @brief Clear the LPTIM Wake-up Timer associated Exti line flag.
-  * @retval None.
-  */
-#define __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG()            (EXTI->PR = LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
-
-/**
-  * @brief Generate a Software interrupt on the LPTIM Wake-up Timer associated Exti line.
-  * @retval None.
-  */
-#define __HAL_LPTIM_WAKEUPTIMER_EXTI_GENERATE_SWIT()         (EXTI->SWIER |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
-
-/**
-  * @}
-  */
-
-
-/* Include LPTIM HAL Extension module */
-#include "stm32l0xx_hal_lptim_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
-  * @{
-  */
-/* Initialization/de-initialization functions  ********************************/
-
-/** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
-  * @{
-  */
-HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim);
-HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim);
-
-
-/* MSP functions  *************************************************************/
-
-void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim);
-void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim);
-
-/**
-  * @}
-  */
-
-/* Start/Stop operation functions  *********************************************/
-
-/** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
-  * @{
-  */
-
-/* ################################# PWM Mode ################################*/
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
-HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
-HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim);
-
-/* ############################# One Pulse Mode ##############################*/
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
-HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
-HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim);
-
-/* ############################## Set once Mode ##############################*/
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
-HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
-HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim);
-
-/* ############################### Encoder Mode ##############################*/
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
-HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
-HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim);
-
-/* ############################# Time out  Mode ##############################*/
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
-HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
-HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim);
-
-/* ############################## Counter Mode ###############################*/
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
-HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
-HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim);
-
-/**
-  * @}
-  */
-
-/* Reading operation functions ************************************************/
-
-/** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
-  * @{
-  */
-uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim);
-uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim);
-uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim);
-/**
-  * @}
-  */
-
-/* LPTIM IRQ functions  *******************************************************/
-/** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler
-  * @{
-  */
-void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim);
-
-/* CallBack functions  ********************************************************/
-void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim);
-void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim);
-void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim);
-void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim);
-void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim);
-void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim);
-void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim);
-/**
-  * @}
-  */
-/* Peripheral State functions  ************************************************/
-/** @defgroup LPTIM_Exported_Functions_Group5 Peripheral State functions
-  * @{
-  */
-
-HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim);
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_LPTIM_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lptim_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lptim_ex.h
deleted file mode 100755
index d38c9f4d..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lptim_ex.h
+++ /dev/null
@@ -1,133 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_lptim_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of LPTIM Extended HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_LPTIM_EX_H
-#define __STM32L0xx_HAL_LPTIM_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup LPTIMEx LPTIMEx
-  * @{
-  */ 
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup LPTIMEx_Exported_Constants LPTIMEx Exported Constants
-  * @{
-  */
-
-
-/** @defgroup LPTIM_Trigger_Source Trigger source
-  * @{
-  */
-#define LPTIM_TRIGSOURCE_SOFTWARE               ((uint32_t)0x0000FFFFU)
-#define LPTIM_TRIGSOURCE_0                      ((uint32_t)0x00000000U)
-#define LPTIM_TRIGSOURCE_1                      ((uint32_t)LPTIM_CFGR_TRIGSEL_0)
-#define LPTIM_TRIGSOURCE_2                      LPTIM_CFGR_TRIGSEL_1
-#define LPTIM_TRIGSOURCE_3                      ((uint32_t)LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1)
-#define LPTIM_TRIGSOURCE_4                      LPTIM_CFGR_TRIGSEL_2
-
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx)
-#define LPTIM_TRIGSOURCE_5                      ((uint32_t)LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2)
-#endif
-
-#define LPTIM_TRIGSOURCE_6                      ((uint32_t)LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2)
-#define LPTIM_TRIGSOURCE_7                      LPTIM_CFGR_TRIGSEL
-/**
-  * @}
-  */
-
- /**
-  * @}
-  */
-
-   /** @addtogroup LPTIMEx_Private
-  * @{
-  */
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-  defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-  defined (STM32L031xx) || defined (STM32L041xx)
-
-#define IS_LPTIM_TRG_SOURCE(__TRIG__)           (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \
-                                                 ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \
-                                                 ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \
-                                                 ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \
-                                                 ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \
-                                                 ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \
-                                                 ((__TRIG__) == LPTIM_TRIGSOURCE_5) || \
-                                                 ((__TRIG__) == LPTIM_TRIGSOURCE_6) || \
-                                                 ((__TRIG__) == LPTIM_TRIGSOURCE_7))
-#else
-#define IS_LPTIM_TRG_SOURCE(__TRIG__)           (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \
-                                                 ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \
-                                                 ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \
-                                                 ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \
-                                                 ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \
-                                                 ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \
-                                                 ((__TRIG__) == LPTIM_TRIGSOURCE_6) || \
-                                                 ((__TRIG__) == LPTIM_TRIGSOURCE_7))
-#endif
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_LPTIM_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pcd.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pcd.h
deleted file mode 100755
index d3af2f86..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pcd.h
+++ /dev/null
@@ -1,808 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_pcd.h
-  * @author  MCD Application Team
-  * @brief   Header file of PCD HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_PCD_H
-#define __STM32L0xx_HAL_PCD_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"  
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup PCD PCD
-  * @{
-  */ 
-
-/** @defgroup PCD_Exported_Types PCD Exported Types
-  * @{
-  */
-/* Exported types ------------------------------------------------------------*/ 
-
-   /** 
-  * @brief  PCD State structures definition  
-  */  
-typedef enum 
-{
-  HAL_PCD_STATE_RESET    = 0x00U,
-  HAL_PCD_STATE_READY    = 0x01U,
-  HAL_PCD_STATE_ERROR    = 0x02U,
-  HAL_PCD_STATE_BUSY     = 0x03U,
-  HAL_PCD_STATE_TIMEOUT  = 0x04U
-} PCD_StateTypeDef;
-
-/* Device LPM suspend state */
-typedef enum  
-{
-  LPM_L0 = 0x00, /* on */
-  LPM_L1 = 0x01, /* LPM L1 sleep */
-  LPM_L2 = 0x02, /* suspend */
-  LPM_L3 = 0x03, /* off */
-}PCD_LPM_StateTypeDef;
-
-typedef enum
-{
-  /* double buffered endpoint direction */
-  PCD_EP_DBUF_OUT,
-  PCD_EP_DBUF_IN,
-  PCD_EP_DBUF_ERR,
-}PCD_EP_DBUF_DIR;
-
-/* endpoint buffer number */
-typedef enum 
-{
-  PCD_EP_NOBUF,
-  PCD_EP_BUF0,
-  PCD_EP_BUF1
-}PCD_EP_BUF_NUM;  
-
-
-/** 
-  * @brief  PCD Initialization Structure definition  
-  */
-typedef struct
-{
-  uint32_t dev_endpoints;        /*!< Device Endpoints number.
-                                      This parameter depends on the used USB core.   
-                                      This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ 
-
-  uint32_t speed;                /*!< USB Core speed.
-                                      This parameter can be any value of @ref PCD_Speed                */ 
-                             
-  uint32_t ep0_mps;              /*!< Set the Endpoint 0 Max Packet size. 
-                                      This parameter can be any value of @ref PCD_USB_EP0_MPS                   */ 
-                       
-  uint32_t phy_itface;           /*!< Select the used PHY interface.
-                                      This parameter can be any value of @ref PCD_USB_Core_PHY                  */ 
-                                
-  uint32_t Sof_enable;           /*!< Enable or disable the output of the SOF signal.
-                                      This parameter can be set to ENABLE or DISABLE                        */  
-  
-  uint32_t low_power_enable;       /*!< Enable or disable Low Power mode
-                                        This parameter can be set to ENABLE or DISABLE                      */ 
-  
-  uint32_t lpm_enable;             /*!< Enable or disable Link Power Management.
-                                        This parameter can be set to ENABLE or DISABLE */ 
-
-  uint32_t battery_charging_enable; /*!< Enable or disable Battery charging.
-                                         This parameter can be set to ENABLE or DISABLE */ 
-                                
-}PCD_InitTypeDef;
-
-typedef struct
-{
-  uint8_t   num;            /*!< Endpoint number
-                                This parameter must be a number between Min_Data = 1 and Max_Data = 15    */ 
-                                
-  uint8_t   is_in;          /*!< Endpoint direction
-                                This parameter must be a number between Min_Data = 0 and Max_Data = 1     */ 
-  
-  uint8_t   is_stall;       /*!< Endpoint stall condition
-                                This parameter must be a number between Min_Data = 0 and Max_Data = 1     */ 
-  
-  uint8_t   type;           /*!< Endpoint type
-                                 This parameter can be any value of @ref PCD_USB_EP_Type                     */ 
-                                
-  uint16_t  pmaadress;      /*!< PMA Address
-                                 This parameter can be any value between Min_addr = 0 and Max_addr = 1K   */ 
-  
-  
-  uint16_t  pmaaddr0;       /*!< PMA Address0
-                                 This parameter can be any value between Min_addr = 0 and Max_addr = 1K   */   
-  
-  
-  uint16_t  pmaaddr1;        /*!< PMA Address1
-                                 This parameter can be any value between Min_addr = 0 and Max_addr = 1K   */   
-  
-  
-  uint8_t   doublebuffer;    /*!< Double buffer enable
-                                 This parameter can be 0 or 1                                             */    
-                                
-  uint32_t  maxpacket;      /*!< Endpoint Max packet size
-                                 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
-
-  uint8_t   *xfer_buff;     /*!< Pointer to transfer buffer                                               */
-                                
-  
-  uint32_t  xfer_len;       /*!< Current transfer length                                                  */
-  
-  uint32_t  xfer_count;     /*!< Partial transfer length in case of multi packet transfer                 */
-
-}PCD_EPTypeDef;
-
-typedef   USB_TypeDef PCD_TypeDef; 
-
-/** 
-  * @brief  PCD Handle Structure definition  
-  */ 
-typedef struct
-{
-  PCD_TypeDef             *Instance;   /*!< Register base address              */ 
-  PCD_InitTypeDef         Init;       /*!< PCD required parameters            */
-  __IO uint8_t            USB_Address; /*!< USB Address            */  
-  PCD_EPTypeDef           IN_ep[8];  /*!< IN endpoint parameters             */
-  PCD_EPTypeDef           OUT_ep[8]; /*!< OUT endpoint parameters            */ 
-  HAL_LockTypeDef         Lock;       /*!< PCD peripheral status              */
-  __IO PCD_StateTypeDef   State;      /*!< PCD communication state            */
-  uint32_t                Setup[12];  /*!< Setup packet buffer                */
-    PCD_LPM_StateTypeDef    LPM_State;    /*!< LPM State                          */
-  uint32_t                BESL;
-  
-  
-  uint32_t lpm_active;                  /*!< Enable or disable the Link Power Management .                                  
-                                        This parameter can be set to ENABLE or DISABLE                      */
-
-  uint32_t battery_charging_active;     /*!< Enable or disable Battery charging.                                  
-                                        This parameter can be set to ENABLE or DISABLE                      */
-  void                    *pData;      /*!< Pointer to upper stack Handler     */    
-  
-} PCD_HandleTypeDef;
-
-/**
-  * @}
-  */
-
-
-#include "stm32l0xx_hal_pcd_ex.h"    
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup PCD_Exported_Constants PCD Exported Constants
-  * @{
-  */
-
-/** @defgroup PCD_EndPoint PCD End Point
-  * @{
-  */
-
-
-#define PCD_ENDP0                             ((uint8_t)0U)
-#define PCD_ENDP1                             ((uint8_t)1U)
-#define PCD_ENDP2                             ((uint8_t)2U)
-#define PCD_ENDP3                             ((uint8_t)3U)
-#define PCD_ENDP4                             ((uint8_t)4U)
-#define PCD_ENDP5                             ((uint8_t)5U)
-#define PCD_ENDP6                             ((uint8_t)6U)
-#define PCD_ENDP7                             ((uint8_t)7U)
-
-/*  Endpoint Kind */
-#define PCD_SNG_BUF                                      0U
-#define PCD_DBL_BUF                                      1U
-
-#define IS_PCD_ALL_INSTANCE            IS_USB_ALL_INSTANCE
-
-/**
-  * @}
-  */
-
-
-/** @defgroup PCD_Speed PCD Speed
-  * @{
-  */
-#define PCD_SPEED_HIGH               0U /* Not Supported */
-#define PCD_SPEED_FULL               2U
-/**
-  * @}
-  */
-  
-  /** @defgroup PCD_USB_Core_PHY PCD USB Core PHY
-  * @{
-  */
-#define PCD_PHY_EMBEDDED             2U
-/**
-  * @}
-  */
-
-  /** @defgroup PCD_USB_EP0_MPS PCD USB EP0 MPS
-  * @{
-  */
-#define DEP0CTL_MPS_64                         0U
-#define DEP0CTL_MPS_32                         1U
-#define DEP0CTL_MPS_16                         2U
-#define DEP0CTL_MPS_8                          3U
-
-#define PCD_EP0MPS_64                          DEP0CTL_MPS_64
-#define PCD_EP0MPS_32                          DEP0CTL_MPS_32
-#define PCD_EP0MPS_16                          DEP0CTL_MPS_16
-#define PCD_EP0MPS_08                          DEP0CTL_MPS_8 
-/**
-  * @}
-  */ 
-  
-/** @defgroup PCD_USB_EP_Type PCD USB EP Type
-  * @{
-  */
-#define PCD_EP_TYPE_CTRL                                 0U
-#define PCD_EP_TYPE_ISOC                                 1U
-#define PCD_EP_TYPE_BULK                                 2U
-#define PCD_EP_TYPE_INTR                                 3U
-/**
-  * @}
-  */
-
-  
-/* Exported macros -----------------------------------------------------------*/
-
-/** @defgroup PCD_Interrupt_Clock PCD Interrupt
- *  @brief macros to handle interrupts and specific clock configurations
- * @{
- */
-#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)      ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__))
-#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)    (((__HANDLE__)->Instance->ISTR) &= (uint16_t) ~(__INTERRUPT__))
-
-#define  USB_WAKEUP_EXTI_LINE              (EXTI_IMR_IM18)  /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
-
-#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()    EXTI->IMR |= USB_WAKEUP_EXTI_LINE
-#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()   EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
-#define __HAL_USB_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_WAKEUP_EXTI_LINE)
-
-/* Internal macros -----------------------------------------------------------*/
-
-/* SetENDPOINT */
-#define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue)  (*(&USBx->EP0R + bEpNum * 2U)= (uint16_t)wRegValue)
-
-/* GetENDPOINT */
-#define PCD_GET_ENDPOINT(USBx, bEpNum)        (*(&USBx->EP0R + bEpNum * 2U))
-
-
-
-/**
-  * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @param  wType: Endpoint Type.
-  * @retval None
-  */
-#define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT(USBx, bEpNum,\
-                                  ((PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_T_MASK) | wType )))
-
-/**
-  * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @retval Endpoint Type
-  */
-#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_T_FIELD)
-
-
-/**
-  * @brief free buffer used from the application realizing it to the line
-  *         toggles bit SW_BUF in the double buffered endpoint register
-  * @param  USBx: USB device.
-  * @param   bEpNum, bDir
-  * @retval None
-  */
-#define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
-do {\
-  if (bDir == PCD_EP_DBUF_OUT)\
-  { /* OUT double buffered endpoint */\
-    PCD_TX_DTOG(USBx, bEpNum);\
-  }\
-  else if (bDir == PCD_EP_DBUF_IN)\
-  { /* IN double buffered endpoint */\
-    PCD_RX_DTOG(USBx, bEpNum);\
-  }\
-} while(0)
-
-/**
-  * @brief gets direction of the double buffered endpoint
-  * @param  USBx: USB device.
-  * @param   bEpNum: Endpoint Number.
-  * @retval EP_DBUF_OUT, EP_DBUF_IN,
-  *         EP_DBUF_ERR if the endpoint counter not yet programmed.
-  */
-#define PCD_GET_DB_DIR(USBx, bEpNum)\
-do {\
-  if ((uint16_t)(*PCD_EP_RX_CNT(USBx, bEpNum) & 0xFC00U) != 0U)\
-    return(PCD_EP_DBUF_OUT);\
-  else if (((uint16_t)(*PCD_EP_TX_CNT(USBx, bEpNum)) & 0x03FFU) != 0U)\
-    return(PCD_EP_DBUF_IN);\
-  else\
-    return(PCD_EP_DBUF_ERR);\
-} while(0)
-
-/**
-  * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @param  wState: new state
-  * @retval None
-  */
-#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do {\
-   register uint16_t _wRegVal;       \
-   \
-    _wRegVal = PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPTX_DTOGMASK;\
-   /* toggle first bit ? */     \
-   if((USB_EPTX_DTOG1 & wState)!= 0U)      \
-     _wRegVal ^= USB_EPTX_DTOG1;        \
-   /* toggle second bit ?  */         \
-   if((USB_EPTX_DTOG2 & wState)!= 0U)      \
-     _wRegVal ^= USB_EPTX_DTOG2;        \
-   PCD_SET_ENDPOINT(USBx, bEpNum, (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX));    \
-  } while(0) /* PCD_SET_EP_TX_STATUS */
-
-/**
-  * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @param  wState: new state
-  * @retval None
-  */
-#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do {\
-    register uint16_t _wRegVal;   \
-    \
-    _wRegVal = PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPRX_DTOGMASK;\
-    /* toggle first bit ? */  \
-    if((USB_EPRX_DTOG1 & wState)!= 0U) \
-      _wRegVal ^= USB_EPRX_DTOG1;  \
-    /* toggle second bit ? */  \
-    if((USB_EPRX_DTOG2 & wState)!= 0U) \
-      _wRegVal ^= USB_EPRX_DTOG2;  \
-    PCD_SET_ENDPOINT(USBx, bEpNum, (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
-  } while(0) /* PCD_SET_EP_RX_STATUS */
-
-/**
-  * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @param  wStaterx: new state.
-  * @param  wStatetx: new state.
-  * @retval None
-  */
-#define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) do {\
-    register uint32_t _wRegVal;   \
-    \
-    _wRegVal = PCD_GET_ENDPOINT(USBx, bEpNum) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
-    /* toggle first bit ? */  \
-    if((USB_EPRX_DTOG1 & wStaterx)!= 0U) \
-      _wRegVal ^= USB_EPRX_DTOG1;  \
-    /* toggle second bit ? */  \
-    if((USB_EPRX_DTOG2 & wStaterx)!= 0U) \
-      _wRegVal ^= USB_EPRX_DTOG2;  \
-    /* toggle first bit ? */     \
-    if((USB_EPTX_DTOG1 & wStatetx)!= 0U)      \
-      _wRegVal ^= USB_EPTX_DTOG1;        \
-    /* toggle second bit ?  */         \
-    if((USB_EPTX_DTOG2 & wStatetx)!= 0U)      \
-      _wRegVal ^= USB_EPTX_DTOG2;        \
-    PCD_SET_ENDPOINT(USBx, bEpNum, _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX);    \
-  } while(0) /* PCD_SET_EP_TXRX_STATUS */
-
-/**
-  * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
-  *         /STAT_RX[1:0])
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @retval status
-  */
-#define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPTX_STAT)
-
-#define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPRX_STAT)
-
-/**
-  * @brief  sets directly the VALID tx/rx-status into the endpoint register
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @retval None
-  */
-#define PCD_SET_EP_TX_VALID(USBx, bEpNum)     (PCD_SET_EP_TX_STATUS(USBx, bEpNum, USB_EP_TX_VALID))
-
-#define PCD_SET_EP_RX_VALID(USBx, bEpNum)     (PCD_SET_EP_RX_STATUS(USBx, bEpNum, USB_EP_RX_VALID))
-
-/**
-  * @brief  checks stall condition in an endpoint.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @retval TRUE = endpoint in stall condition.
-  */
-#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS(USBx, bEpNum) \
-                                   == USB_EP_TX_STALL)
-#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS(USBx, bEpNum) \
-                                   == USB_EP_RX_STALL)
-
-/**
-  * @brief  set & clear EP_KIND bit.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @retval None
-  */
-#define PCD_SET_EP_KIND(USBx, bEpNum)    (PCD_SET_ENDPOINT(USBx, bEpNum, \
-                                (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT(USBx, bEpNum) | USB_EP_KIND) & USB_EPREG_MASK))))
-#define PCD_CLEAR_EP_KIND(USBx, bEpNum)  (PCD_SET_ENDPOINT(USBx, bEpNum, \
-                                (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPKIND_MASK))))
-
-/**
-  * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @retval None
-  */
-#define PCD_SET_OUT_STATUS(USBx, bEpNum)    PCD_SET_EP_KIND(USBx, bEpNum)
-#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)  PCD_CLEAR_EP_KIND(USBx, bEpNum)
-
-/**
-  * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @retval None
-  */
-#define PCD_SET_EP_DBUF(USBx, bEpNum)   PCD_SET_EP_KIND(USBx, bEpNum)
-#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND(USBx, bEpNum)
-
-/**
-  * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @retval None
-  */
-#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum)   (PCD_SET_ENDPOINT(USBx, bEpNum,\
-                                   PCD_GET_ENDPOINT(USBx, bEpNum) & 0x7FFFU & USB_EPREG_MASK))
-#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum)   (PCD_SET_ENDPOINT(USBx, bEpNum,\
-                                   PCD_GET_ENDPOINT(USBx, bEpNum) & 0xFF7FU & USB_EPREG_MASK))
-
-/**
-  * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @retval None
-  */
-#define PCD_RX_DTOG(USBx, bEpNum)    (PCD_SET_ENDPOINT(USBx, bEpNum, \
-                                   USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPREG_MASK)))
-#define PCD_TX_DTOG(USBx, bEpNum)    (PCD_SET_ENDPOINT(USBx, bEpNum, \
-                                   USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPREG_MASK)))
-
-/**
-  * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @retval None
-  */
-#define PCD_CLEAR_RX_DTOG(USBx, bEpNum)  if((PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_DTOG_RX) != 0)\
-    PCD_RX_DTOG(USBx, bEpNum)
-#define PCD_CLEAR_TX_DTOG(USBx, bEpNum)  if((PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EP_DTOG_TX) != 0)\
-    PCD_TX_DTOG(USBx, bEpNum)
-      
-/**
-  * @brief  Sets address in an endpoint register.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @param  bAddr: Address.
-  * @retval None
-  */
-#define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT(USBx, bEpNum,\
-    USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPREG_MASK) | bAddr)
-
-/**
-  * @brief  Gets address in an endpoint register.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @retval None
-  */
-#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT(USBx, bEpNum) & USB_EPADDR_FIELD))
-#define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)((USBx->BTABLE+bEpNum*8U)+     ((uint32_t)USBx + 0x400U)))
-#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((USBx->BTABLE+bEpNum*8U+2U)+  ((uint32_t)USBx + 0x400U)))
-#define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)((USBx->BTABLE+bEpNum*8U+4U)+  ((uint32_t)USBx + 0x400U)))
-#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((USBx->BTABLE+bEpNum*8U+6U)+  ((uint32_t)USBx + 0x400U)))
-
-/**
-  * @brief  sets address of the tx/rx buffer.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @param  wAddr: address to be set (must be word aligned).
-  * @retval None
-  */
-#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS(USBx, bEpNum) = ((wAddr >> 1U) << 1U))
-#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS(USBx, bEpNum) = ((wAddr >> 1U) << 1U))
-
-/**
-  * @brief  Gets address of the tx/rx buffer.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @retval address of the buffer.
-  */
-#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS(USBx, bEpNum))
-#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS(USBx, bEpNum))
-
-/**
-  * @brief  Sets counter of rx buffer with no. of blocks.
-  * @param  dwReg: Register.
-  * @param  wCount: Counter.
-  * @param  wNBlocks: Nb of block
-  * @retval None
-  */
-#define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) do {\
-    wNBlocks = wCount >> 5;\
-    if((wCount & 0x1f) == 0)\
-      wNBlocks--;\
-    *pdwReg = (uint16_t)((wNBlocks << 10U) | 0x8000U);\
-  } while(0) /* PCD_CALC_BLK32 */
-
-#define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) do {\
-    wNBlocks = wCount >> 1;\
-    if((wCount & 0x1) != 0)\
-      wNBlocks++;\
-    *pdwReg = (uint16_t)(wNBlocks << 10U);\
-  } while(0) /* PCD_CALC_BLK2 */
-
-#define PCD_SET_EP_CNT_RX_REG(dwReg,wCount)  do {\
-    uint16_t wNBlocks;\
-    if(wCount > 62){PCD_CALC_BLK32(dwReg,wCount,wNBlocks);}\
-    else {PCD_CALC_BLK2(dwReg,wCount,wNBlocks);}\
-  } while(0) /* PCD_SET_EP_CNT_RX_REG */
-
-#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) do {\
-    uint16_t *pdwReg = PCD_EP_TX_CNT(USBx, bEpNum); \
-    PCD_SET_EP_CNT_RX_REG(pdwReg, wCount);\
-  } while(0)
-/**
-  * @brief  sets counter for the tx/rx buffer.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @param  wCount: Counter value.
-  * @retval None
-  */
-#define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT(USBx, bEpNum) = wCount)
-#define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) do {\
-    uint16_t *pdwReg = PCD_EP_RX_CNT(USBx, bEpNum); \
-    PCD_SET_EP_CNT_RX_REG(pdwReg, wCount);\
-  } while(0)
-
-/**
-  * @brief  gets counter of the tx buffer.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @retval Counter value
-  */
-#define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT(USBx, bEpNum)) & 0x3ffU)
-#define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT(USBx, bEpNum)) & 0x3ffU)
-
-/**
-  * @brief  Sets buffer 0/1 address in a double buffer endpoint.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @param  wBuf0Addr: buffer 0 address.
-  * @retval Counter value
-  */
-#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wBuf0Addr);}
-#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wBuf1Addr);}
-
-/**
-  * @brief  Sets addresses in a double buffer endpoint.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @param  wBuf0Addr: buffer 0 address.
-  * @param  wBuf1Addr = buffer 1 address.
-  * @retval None
-  */
-#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
-    PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr);\
-    PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr);\
-  } /* PCD_SET_EP_DBUF_ADDR */
-
-/**
-  * @brief  Gets buffer 0/1 address of a double buffer endpoint.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @retval None
-  */
-#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS(USBx, bEpNum))
-#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS(USBx, bEpNum))
-
-/**
-  * @brief  Gets buffer 0/1 address of a double buffer endpoint.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @param  bDir: endpoint dir  EP_DBUF_OUT = OUT and EP_DBUF_IN  = IN
-  * @param  wCount: Counter value 
-  * @retval None
-  */
-#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount)  { \
-    if(bDir == PCD_EP_DBUF_OUT)\
-      /* OUT endpoint */ \
-    {PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount);} \
-    else if(bDir == PCD_EP_DBUF_IN)\
-      /* IN endpoint */ \
-      *PCD_EP_TX_CNT(USBx, bEpNum) = (uint32_t)wCount;  \
-  } /* SetEPDblBuf0Count*/
-
-#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount)  { \
-    if(bDir == PCD_EP_DBUF_OUT)\
-      /* OUT endpoint */ \
-    {PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount);}\
-    else if(bDir == PCD_EP_DBUF_IN)\
-      /* IN endpoint */\
-      *PCD_EP_RX_CNT(USBx, bEpNum) = (uint32_t)wCount; \
-  } /* SetEPDblBuf1Count */
-
-#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do {\
-    PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount); \
-    PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount); \
-  } while(0) /* PCD_SET_EP_DBUF_CNT  */
-
-/**
-  * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
-  * @param  USBx: USB device.
-  * @param  bEpNum: Endpoint Number.
-  * @retval None
-  */
-#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT(USBx, bEpNum))
-#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT(USBx, bEpNum))
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup PCD_Exported_Functions PCD Exported Functions
-  * @{
-  */
-
-/** @defgroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
- *  @brief    Initialization and Configuration functions
- * @{
- */
-/* Initialization/de-initialization functions  **********************************/
-HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
-HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
-void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
-void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
-/**
-  * @}
-  */
-/** @defgroup PCD_Exported_Functions_Group2 IO Data transfers functions
- *  @brief   Data transfers functions
- *  @{
- */
-
- /* I/O operation functions  *****************************************************/
- /* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
-HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
-void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
-
-void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
-void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
-void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
-void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
-void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
-void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
-void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
-void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
-void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
-void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
-void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
-/**
-  * @}
-  */
-
-/** @defgroup PCD_Exported_Functions_Group3 Peripheral Control functions
- *  @brief   management functions
- *  @{
- */
-/* Peripheral Control functions  ************************************************/
-HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
-HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
-HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
-HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
-HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
-HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
-HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
-uint16_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
-HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
-HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
-HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
-HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
-HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
-void PCD_WritePMA(USB_TypeDef  *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
-void PCD_ReadPMA(USB_TypeDef  *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
-/**
-  * @}
-  */
-/** @defgroup PCD_Exported_Functions_Group4 Peripheral State functions
- *  @brief   Peripheral State functions
- *  @{
- */
-
-/* Peripheral State functions  **************************************************/
-PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Define the private group ***********************************/
-/**************************************************************/
-/** @defgroup PCD_Private PCD Private
-  * @{
-  */
-/**
-  * @}
-  */
-/**************************************************************/
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-
-#endif /* #if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) */
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif /* __STM32L0xx_HAL_PCD_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pcd_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pcd_ex.h
deleted file mode 100755
index e155f672..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pcd_ex.h
+++ /dev/null
@@ -1,115 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_pcd.h
-  * @author  MCD Application Team
-  * @brief   Header file of PCD HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_PCD_EX_H
-#define __STM32L0xx_HAL_PCD_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"  
-   
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup PCDEx PCDEx
-  * @{
-  */
-/* Exported types ------------------------------------------------------------*/
-typedef enum  
-{
-  PCD_LPM_L0_ACTIVE = 0x00, /* on */
-  PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
-}PCD_LPM_MsgTypeDef;
-
-typedef enum  
-{
-  PCD_BCD_ERROR                     = 0xFF, 
-  PCD_BCD_CONTACT_DETECTION         = 0xFE,
-  PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,
-  PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,
-  PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,
-  PCD_BCD_DISCOVERY_COMPLETED       = 0x00,
-  
-}PCD_BCD_MsgTypeDef;
-
-/* Exported constants --------------------------------------------------------*/
-/* Exported macros -----------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions
-  * @{
-  */
-
-/** @defgroup PCDEx__Exported_Functions_Group1 Initialization and de-initialization functions
- *  @brief    Initialization and Configuration functions
- */
-HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, 
-                                     uint16_t ep_addr,
-                                     uint16_t ep_kind,
-                                     uint32_t pmaadress);
-HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd);
-HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd);
-HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd);
-HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd);
-void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd);
-void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg);
-void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif /* __STM32L0xx_HAL_PCD_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h
deleted file mode 100755
index 4de6152a..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h
+++ /dev/null
@@ -1,463 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_pwr.h
-  * @author  MCD Application Team
-  * @brief   Header file of PWR HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_PWR_H
-#define __STM32L0xx_HAL_PWR_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup PWR PWR
-  * @{
-  */
-
-/** @defgroup PWR_Exported_Types PWR Exported Types
-  * @{
-  */ 
-
-/**
-  * @brief  PWR PVD configuration structure definition
-  */
-typedef struct
-{
-  uint32_t PVDLevel;   /*!< PVDLevel: Specifies the PVD detection level.
-                            This parameter can be a value of @ref PWR_PVD_detection_level */
-
-  uint32_t Mode;       /*!< Mode: Specifies the operating mode for the selected pins.
-                            This parameter can be a value of @ref PWR_PVD_Mode */
-}PWR_PVDTypeDef;
-
-/**
-  * @}
-  */
-
-/** @addtogroup PWR_Private
-  * @{
-  */ 
-
-#define PWR_EXTI_LINE_PVD      EXTI_FTSR_TR16  /*!< External interrupt line 16 Connected to the PVD EXTI Line */
-
-/**
-  * @}
-  */
-
-/** @defgroup PWR_Exported_Constants PWR Exported Constants
-  * @{
-  */
-
-/** @defgroup PWR_register_alias_address PWR Register alias address
-  * @{
-  */
-#define PWR_WAKEUP_PIN1                PWR_CSR_EWUP1
-#define PWR_WAKEUP_PIN2                PWR_CSR_EWUP2
-#if defined (STM32L011xx) || defined (STM32L021xx) ||  defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L071xx) || \
-    defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
-#define PWR_WAKEUP_PIN3                PWR_CSR_EWUP3
-#endif
-/**
-  * @}
-  */
-
-/** @defgroup PWR_PVD_detection_level PVD detection level
-  * @{
-  */
-#define PWR_PVDLEVEL_0                 PWR_CR_PLS_LEV0
-#define PWR_PVDLEVEL_1                 PWR_CR_PLS_LEV1
-#define PWR_PVDLEVEL_2                 PWR_CR_PLS_LEV2
-#define PWR_PVDLEVEL_3                 PWR_CR_PLS_LEV3
-#define PWR_PVDLEVEL_4                 PWR_CR_PLS_LEV4
-#define PWR_PVDLEVEL_5                 PWR_CR_PLS_LEV5
-#define PWR_PVDLEVEL_6                 PWR_CR_PLS_LEV6
-#define PWR_PVDLEVEL_7                 PWR_CR_PLS_LEV7  /* External input analog voltage 
-                                                           (Compare internally to VREFINT) */
-/**
-  * @}
-  */
-
-/** @defgroup PWR_PVD_Mode PWR PVD Mode
-  * @{
-  */
-#define PWR_PVD_MODE_NORMAL                 ((uint32_t)0x00000000U)   /*!< basic mode is used */
-#define PWR_PVD_MODE_IT_RISING              ((uint32_t)0x00010001U)   /*!< External Interrupt Mode with Rising edge trigger detection */
-#define PWR_PVD_MODE_IT_FALLING             ((uint32_t)0x00010002U)   /*!< External Interrupt Mode with Falling edge trigger detection */
-#define PWR_PVD_MODE_IT_RISING_FALLING      ((uint32_t)0x00010003U)   /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
-#define PWR_PVD_MODE_EVENT_RISING           ((uint32_t)0x00020001U)   /*!< Event Mode with Rising edge trigger detection */
-#define PWR_PVD_MODE_EVENT_FALLING          ((uint32_t)0x00020002U)   /*!< Event Mode with Falling edge trigger detection */
-#define PWR_PVD_MODE_EVENT_RISING_FALLING   ((uint32_t)0x00020003U)   /*!< Event Mode with Rising/Falling edge trigger detection */
-
-/**
-  * @}
-  */
-
-/** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode
-  * @{
-  */
-#define PWR_MAINREGULATOR_ON           ((uint32_t)0x00000000U)
-#define PWR_LOWPOWERREGULATOR_ON       PWR_CR_LPSDSR
-
-/**
-  * @}
-  */
-
-/** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
-  * @{
-  */
-#define PWR_SLEEPENTRY_WFI             ((uint8_t)0x01U)
-#define PWR_SLEEPENTRY_WFE             ((uint8_t)0x02U)
-/**
-  * @}
-  */
-
-/** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
-  * @{
-  */
-#define PWR_STOPENTRY_WFI              ((uint8_t)0x01U)
-#define PWR_STOPENTRY_WFE              ((uint8_t)0x02U)
-/**
-  * @}
-  */
-
-/** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale
-  * @{
-  */
-
-#define PWR_REGULATOR_VOLTAGE_SCALE1   PWR_CR_VOS_0
-#define PWR_REGULATOR_VOLTAGE_SCALE2   PWR_CR_VOS_1
-#define PWR_REGULATOR_VOLTAGE_SCALE3   PWR_CR_VOS
-
-#define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
-                                             ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
-                                             ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
-/**
-  * @}
-  */
-
-/** @defgroup PWR_Flag PWR Flag
-  * @{
-  */
-#define PWR_FLAG_WU                    PWR_CSR_WUF
-#define PWR_FLAG_SB                    PWR_CSR_SBF
-#define PWR_FLAG_PVDO                  PWR_CSR_PVDO
-#define PWR_FLAG_VREFINTRDY            PWR_CSR_VREFINTRDYF
-#define PWR_FLAG_VOS                   PWR_CSR_VOSF
-#define PWR_FLAG_REGLP                 PWR_CSR_REGLPF
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup PWR_Exported_Macro PWR Exported Macros
-  * @{
-  */
-/** @brief  macros configure the main internal regulator output voltage.
-  *         When exiting Low Power Run Mode or during dynamic voltage scaling configuration,
-  *         the reference manual recommends to poll PWR_FLAG_REGLP bit to wait for the regulator 
-  *         to reach main mode (resp. to get stabilized) for a transition from 0 to 1. 
-  *         Only then the clock can be increased.
-  *
-  * @param  __REGULATOR__: specifies the regulator output voltage to achieve
-  *         a tradeoff between performance and power consumption when the device does
-  *         not operate at the maximum frequency (refer to the datasheets for more details).
-  *          This parameter can be one of the following values:
-  *            @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode,
-  *                                                System frequency up to 32 MHz.
-  *            @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode,
-  *                                                System frequency up to 16 MHz.
-  *            @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode,
-  *                                                System frequency up to 4.2 MHz
-  * @retval None
-  */
-#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)))
-
-/** @brief  Check PWR flag is set or not.
-  * @param  __FLAG__: specifies the flag to check.
-  *           This parameter can be one of the following values:
-  *            @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
-  *                  was received from the WKUP pin or from the RTC alarm (Alarm B),
-  *                  RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
-  *                  An additional wakeup event is detected if the WKUP pin is enabled
-  *                  (by setting the EWUP bit) when the WKUP pin level is already high.
-  *            @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
-  *                  resumed from StandBy mode.
-  *            @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled 
-  *                  by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode.
-  *                  For this reason, this bit is equal to 0 after Standby or reset
-  *                  until the PVDE bit is set.
-  *            @arg PWR_FLAG_VREFINTRDY: Internal voltage reference (VREFINT) ready flag.
-  *                 This bit indicates the state of the internal voltage reference, VREFINT.
-  *            @arg PWR_FLAG_VOS: Voltage Scaling select flag. A delay is required for
-  *                 the internal regulator to be ready after the voltage range is changed.
-  *                 The VOSF bit indicates that the regulator has reached the voltage level
-  *                 defined with bits VOS of PWR_CR register.
-  *            @arg PWR_FLAG_REGLP: Regulator LP flag. When the MCU exits from Low power run
-  *                 mode, this bit stays at 1 until the regulator is ready in main mode.
-  *                 A polling on this bit is recommended to wait for the regulator main mode.
-  *                 This bit is reset by hardware when the regulator is ready.
-  * @retval The new state of __FLAG__ (TRUE or FALSE).
-  */
-#define __HAL_PWR_GET_FLAG(__FLAG__)                  ((PWR->CSR & (__FLAG__)) == (__FLAG__))
-
-/** @brief  Clear the PWR pending flags.
-  * @param  __FLAG__: specifies the flag to clear.
-  *          This parameter can be one of the following values:
-  *            @arg PWR_FLAG_WU: Wake Up flag
-  *            @arg PWR_FLAG_SB: StandBy flag
-  */
-#define __HAL_PWR_CLEAR_FLAG(__FLAG__)                SET_BIT(PWR->CR, (__FLAG__) << 2U)
-
-/**
-  * @brief Enable interrupt on PVD Exti Line 16.
-  * @retval None.
-  */
-#define __HAL_PWR_PVD_EXTI_ENABLE_IT()      SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
-
-/**
-  * @brief Disable interrupt on PVD Exti Line 16. 
-  * @retval None.
-  */
-#define __HAL_PWR_PVD_EXTI_DISABLE_IT()     CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
-
-/**
-  * @brief Enable event on PVD Exti Line 16.
-  * @retval None.
-  */
-#define __HAL_PWR_PVD_EXTI_ENABLE_EVENT()   SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
-
-/**
-  * @brief Disable event on PVD Exti Line 16.
-  * @retval None.
-  */
-#define __HAL_PWR_PVD_EXTI_DISABLE_EVENT()  CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
-
-
-/**
-  * @brief  PVD EXTI line configuration: set falling edge trigger.  
-  * @retval None.
-  */
-#define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE()  SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
-
-
-/**
-  * @brief Disable the PVD Extended Interrupt Falling Trigger.
-  * @retval None.
-  */
-#define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE()  CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
-
-
-/**
-  * @brief  PVD EXTI line configuration: set rising edge trigger.
-  * @retval None.
-  */
-#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE()   SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
-
-/**
-  * @brief Disable the PVD Extended Interrupt Rising Trigger.
-  * This parameter can be:
-  * @retval None.
-  */
-#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE()  CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
-
-/**
-  * @brief  PVD EXTI line configuration: set rising & falling edge trigger.
-  * @retval None.
-  */
-#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE()   do { __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); } while(0);
-
-/**
-  * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
-  * This parameter can be:
-  * @retval None.
-  */
-#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE()  do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); } while(0);
-
-
-
-/**
-  * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
-  * @retval EXTI PVD Line Status.
-  */
-#define __HAL_PWR_PVD_EXTI_GET_FLAG()       (EXTI->PR & (PWR_EXTI_LINE_PVD))
-
-/**
-  * @brief Clear the PVD EXTI flag.
-  * @retval None.
-  */
-#define __HAL_PWR_PVD_EXTI_CLEAR_FLAG()     (EXTI->PR = (PWR_EXTI_LINE_PVD))
-
-/**
-  * @brief Generate a Software interrupt on selected EXTI line.
-  * @retval None.
-  */
-#define __HAL_PWR_PVD_EXTI_GENERATE_SWIT()  SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
-
-/**
-  * @brief Generate a Software interrupt on selected EXTI line.
-  * @retval None.
-  */
-#define __HAL_PWR_PVD_EXTI_GENERATE_SWIT()            SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
-
-/**
-  * @}
-  */
-
-/** @addtogroup PWR_Private
-  * @{
-  */
-#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
-                                 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
-                                 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
-                                 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
-
-#define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
-                              ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
-                              ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
-                              ((MODE) == PWR_PVD_MODE_NORMAL)) 
-
-#if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
-#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
-                                ((PIN) == PWR_WAKEUP_PIN2) || \
-                                ((PIN) == PWR_WAKEUP_PIN3))
-#elif defined (STM32L051xx) || defined (STM32L052xx) || defined (STM32L053xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx)
-#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
-                                ((PIN) == PWR_WAKEUP_PIN2))
-#elif defined (STM32L031xx) || defined (STM32L041xx)
-#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
-                                ((PIN) == PWR_WAKEUP_PIN2))
-#elif defined (STM32L011xx) || defined (STM32L021xx)
-#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
-                                ((PIN) == PWR_WAKEUP_PIN3))
-#endif
-
-#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
-                                     ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
-#define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
-
-#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
-
-/**
-  * @}
-  */
-
-/* Include PWR HAL Extension module */
-#include "stm32l0xx_hal_pwr_ex.h"
-
-/** @defgroup PWR_Exported_Functions PWR Exported Functions
-  * @{
-  */
-  
-/** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 
-  * @{
-  */
-void HAL_PWR_DeInit(void);
-void HAL_PWR_EnableBkUpAccess(void);
-void HAL_PWR_DisableBkUpAccess(void);
-/**
-  * @}
-  */
-
-/** @defgroup PWR_Exported_Functions_Group2 Low Power modes configuration functions
-  * @{
-  */
-
-/* PVD control functions  ************************************************/
-void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
-void HAL_PWR_EnablePVD(void);
-void HAL_PWR_DisablePVD(void);
-void HAL_PWR_PVD_IRQHandler(void);
-void HAL_PWR_PVDCallback(void);
-
-/* WakeUp pins configuration functions ****************************************/
-void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
-void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
-
-/* Low Power modes configuration functions ************************************/
-void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
-void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
-void HAL_PWR_EnterSTANDBYMode(void);
-
-void HAL_PWR_EnableSleepOnExit(void);
-void HAL_PWR_DisableSleepOnExit(void);
-void HAL_PWR_EnableSEVOnPend(void);
-void HAL_PWR_DisableSEVOnPend(void);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Define the private group ***********************************/
-/**************************************************************/
-/** @defgroup PWR_Private PWR Private
-  * @{
-  */
-/**
-  * @}
-  */
-/**************************************************************/
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif /* __STM32L0xx_HAL_PWR_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h
deleted file mode 100755
index a994a83a..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h
+++ /dev/null
@@ -1,115 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_pwr_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of PWR HAL Extension module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_PWR_EX_H
-#define __STM32L0xx_HAL_PWR_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup PWREx PWREx
-  * @{
-  */
-
-/** @defgroup PWREx_Exported_Macros PWREx Exported Macros
- * @{
- */
-
-/** @brief  Macros to enable the Deep-sleep mode with Flash memory kept off.
-  * @note   When entering low power mode (stop or standby only), if DS_EE_KOFF and RUN_PD of
-  *         FLASH_ACR register are both set , the Flash memory will not be woken up 
-  *         when exiting from deep-sleep mode.
-  */
-#define __HAL_PWR_FLASHWAKEUP_ENABLE()      CLEAR_BIT(PWR->CR, PWR_CR_DSEEKOFF)
-
-/** @brief  Macros to disable the Deep-sleep mode with Flash memory kept off.
-  * @note   When entering low power mode (stop or standby only), if DS_EE_KOFF and RUN_PD of
-  *         FLASH_ACR register are both set , the Flash memory will not be woken up 
-  *         when exiting from deep-sleep mode.
-  */
-#define __HAL_PWR_FLASHWAKEUP_DISABLE()     SET_BIT(PWR->CR, PWR_CR_DSEEKOFF)
-/**
-  * @}
-  */
-
-/** @defgroup PWREx_Exported_Functions PWREx Exported Functions
- * @{
- */
-uint32_t HAL_PWREx_GetVoltageRange(void);
-void HAL_PWREx_EnableFastWakeUp(void);
-void HAL_PWREx_DisableFastWakeUp(void);
-void HAL_PWREx_EnableUltraLowPower(void);
-void HAL_PWREx_DisableUltraLowPower(void);
-void HAL_PWREx_EnableLowPowerRunMode(void);
-HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void);
-/**
-  * @}
-  */
-
-/* Define the private group ***********************************/
-/**************************************************************/
-/** @defgroup PWREx_Private PWREx Private
-  * @{
-  */
-/**
-  * @}
-  */
-/**************************************************************/
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_PWR_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h
deleted file mode 100755
index 2e41784b..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h
+++ /dev/null
@@ -1,1754 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_rcc.h
-  * @author  MCD Application Team
-  * @brief   Header file of RCC HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_RCC_H
-#define __STM32L0xx_HAL_RCC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup RCC
-  * @{
-  */
-
-/** @addtogroup RCC_Private_Constants
-  * @{
-  */
-
-/** @defgroup RCC_Timeout RCC Timeout
-  * @{
-  */ 
-  
-/* Disable Backup domain write protection state change timeout */
-#define RCC_DBP_TIMEOUT_VALUE      (100U)       /* 100 ms */
-/* LSE state change timeout */
-#define RCC_LSE_TIMEOUT_VALUE      LSE_STARTUP_TIMEOUT
-#define CLOCKSWITCH_TIMEOUT_VALUE  (5000U)  /* 5 s    */
-#define HSE_TIMEOUT_VALUE          HSE_STARTUP_TIMEOUT
-#define MSI_TIMEOUT_VALUE          (2U)      /* 2 ms (minimum Tick + 1) */
-#define HSI_TIMEOUT_VALUE          (2U)      /* 2 ms (minimum Tick + 1) */
-#define HSI48_TIMEOUT_VALUE        (2U)      /* 2 ms (minimum Tick + 1) */
-#define LSI_TIMEOUT_VALUE          (2U)      /* 2 ms (minimum Tick + 1) */
-#define PLL_TIMEOUT_VALUE          (2U)      /* 2 ms (minimum Tick + 1) */
-#if defined(RCC_HSI48_SUPPORT)
-#define HSI48_TIMEOUT_VALUE        (2U)      /* 2 ms (minimum Tick + 1) */
-#endif /* RCC_HSI48_SUPPORT */
-/**
-  * @}
-  */
-  
-
-/** @defgroup RCC_BitAddress_AliasRegion BitAddress AliasRegion
-  * @brief RCC registers bit address in the alias region
-  * @{
-  */
-#define RCC_OFFSET                (RCC_BASE - PERIPH_BASE)
-/* --- CR Register ---*/
-/* Alias word address of HSION bit */
-#define RCC_CR_OFFSET             (RCC_OFFSET + 0x00U)
-/* --- CFGR Register ---*/
-/* Alias word address of I2SSRC bit */
-#define RCC_CFGR_OFFSET           (RCC_OFFSET + 0x08U)
-/* --- CSR Register ---*/
-#define RCC_CSR_OFFSET            (RCC_OFFSET + 0x74U)
-
-/* CR register byte 3 (Bits[23:16]) base address */
-#define RCC_CR_BYTE2_ADDRESS      (0x40023802U)
-
-/* CIER register byte 0 (Bits[0:8]) base address */
-#define CIER_BYTE0_ADDRESS        ((uint32_t)(RCC_BASE + 0x10U + 0x00U))
-/**
-  * @}
-  */
-  
-
-/* Defines used for Flags */
-#define CR_REG_INDEX                     ((uint8_t)1)
-#define CSR_REG_INDEX                    ((uint8_t)2)
-#define CRRCR_REG_INDEX                  ((uint8_t)3)
-
-#define RCC_FLAG_MASK                    ((uint8_t)0x1F)
-
-/**
-  * @}
-  */
-
-/** @addtogroup RCC_Private_Macros
-  * @{
-  */
-#if defined(RCC_HSI48_SUPPORT)
-#define IS_RCC_OSCILLATORTYPE(__OSCILLATOR__) (((__OSCILLATOR__) == RCC_OSCILLATORTYPE_NONE)                               || \
-                                               (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSE)   == RCC_OSCILLATORTYPE_HSE)   || \
-                                               (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSI)   == RCC_OSCILLATORTYPE_HSI)   || \
-                                               (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48) || \
-                                               (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_LSI)   == RCC_OSCILLATORTYPE_LSI)   || \
-                                               (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_LSE)   == RCC_OSCILLATORTYPE_LSE)   || \
-                                               (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_MSI)   == RCC_OSCILLATORTYPE_MSI))
-
-#define IS_RCC_HSI48(__HSI48__) (((__HSI48__) == RCC_HSI48_OFF) || ((__HSI48__) == RCC_HSI48_ON))
-#else
-#define IS_RCC_OSCILLATORTYPE(__OSCILLATOR__) (((__OSCILLATOR__) == RCC_OSCILLATORTYPE_NONE)                           || \
-                                               (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) || \
-                                               (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) || \
-                                               (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) || \
-                                               (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) || \
-                                               (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI))
-#endif /* RCC_HSI48_SUPPORT */
-#define IS_RCC_PLLSOURCE(__SOURCE__) (((__SOURCE__) == RCC_PLLSOURCE_HSI) || \
-                                      ((__SOURCE__) == RCC_PLLSOURCE_HSE))
-#define IS_RCC_HSE(__HSE__) (((__HSE__) == RCC_HSE_OFF) || ((__HSE__) == RCC_HSE_ON) || \
-                             ((__HSE__) == RCC_HSE_BYPASS))
-#define IS_RCC_LSE(__LSE__) (((__LSE__) == RCC_LSE_OFF) || ((__LSE__) == RCC_LSE_ON) || \
-                             ((__LSE__) == RCC_LSE_BYPASS))
-#if defined(RCC_CR_HSIOUTEN)
-#define IS_RCC_HSI(__HSI__) (((__HSI__) == RCC_HSI_OFF) || ((__HSI__) == RCC_HSI_ON) || \
-                             ((__HSI__) == RCC_HSI_DIV4) || ((__HSI__) == RCC_HSI_OUTEN ))      
-#else
-#define IS_RCC_HSI(__HSI__) (((__HSI__) == RCC_HSI_OFF) || ((__HSI__) == RCC_HSI_ON) || \
-                             ((__HSI__) == RCC_HSI_DIV4))
-#endif /* RCC_CR_HSIOUTEN */
-#define IS_RCC_CALIBRATION_VALUE(__VALUE__) ((__VALUE__) <= 0x1F)
-#define IS_RCC_MSICALIBRATION_VALUE(__VALUE__) ((__VALUE__) <= 0xFF)
-#define IS_RCC_MSI_CLOCK_RANGE(__RANGE__)  (((__RANGE__) == RCC_MSIRANGE_0) || \
-                                            ((__RANGE__) == RCC_MSIRANGE_1) || \
-                                            ((__RANGE__) == RCC_MSIRANGE_2) || \
-                                            ((__RANGE__) == RCC_MSIRANGE_3) || \
-                                            ((__RANGE__) == RCC_MSIRANGE_4) || \
-                                            ((__RANGE__) == RCC_MSIRANGE_5) || \
-                                            ((__RANGE__) == RCC_MSIRANGE_6))
-#define IS_RCC_LSI(__LSI__) (((__LSI__) == RCC_LSI_OFF) || ((__LSI__) == RCC_LSI_ON))
-#define IS_RCC_MSI(__MSI__) (((__MSI__) == RCC_MSI_OFF) || ((__MSI__) == RCC_MSI_ON))
-
-#define IS_RCC_PLL(__PLL__) (((__PLL__) == RCC_PLL_NONE) || ((__PLL__) == RCC_PLL_OFF) || \
-                             ((__PLL__) == RCC_PLL_ON))
-#define IS_RCC_PLL_DIV(__DIV__) (((__DIV__) == RCC_PLL_DIV2) || \
-                                 ((__DIV__) == RCC_PLL_DIV3) || ((__DIV__) == RCC_PLL_DIV4))
-
-#define IS_RCC_PLL_MUL(__MUL__) (((__MUL__) == RCC_PLL_MUL3)  || ((__MUL__) == RCC_PLL_MUL4)  || \
-                                 ((__MUL__) == RCC_PLL_MUL6)  || ((__MUL__) == RCC_PLL_MUL8)  || \
-                                 ((__MUL__) == RCC_PLL_MUL12) || ((__MUL__) == RCC_PLL_MUL16) || \
-                                 ((__MUL__) == RCC_PLL_MUL24) || ((__MUL__) == RCC_PLL_MUL32) || \
-                                 ((__MUL__) == RCC_PLL_MUL48))
-#define IS_RCC_CLOCKTYPE(CLK) ((((CLK) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) || \
-                               (((CLK) & RCC_CLOCKTYPE_HCLK)   == RCC_CLOCKTYPE_HCLK)   || \
-                               (((CLK) & RCC_CLOCKTYPE_PCLK1)  == RCC_CLOCKTYPE_PCLK1)  || \
-                               (((CLK) & RCC_CLOCKTYPE_PCLK2)  == RCC_CLOCKTYPE_PCLK2))
-#define IS_RCC_SYSCLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_SYSCLKSOURCE_MSI) || \
-                                         ((__SOURCE__) == RCC_SYSCLKSOURCE_HSI) || \
-                                         ((__SOURCE__) == RCC_SYSCLKSOURCE_HSE) || \
-                                         ((__SOURCE__) == RCC_SYSCLKSOURCE_PLLCLK))
-#define IS_RCC_SYSCLKSOURCE_STATUS(__SOURCE__) (((__SOURCE__) == RCC_SYSCLKSOURCE_STATUS_MSI) || \
-                                                ((__SOURCE__) == RCC_SYSCLKSOURCE_STATUS_HSI) || \
-                                                ((__SOURCE__) == RCC_SYSCLKSOURCE_STATUS_HSE) || \
-                                                ((__SOURCE__) == RCC_SYSCLKSOURCE_STATUS_PLLCLK))
-#define IS_RCC_HCLK(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2) || \
-                               ((__HCLK__) == RCC_SYSCLK_DIV4) || ((__HCLK__) == RCC_SYSCLK_DIV8) || \
-                               ((__HCLK__) == RCC_SYSCLK_DIV16) || ((__HCLK__) == RCC_SYSCLK_DIV64) || \
-                               ((__HCLK__) == RCC_SYSCLK_DIV128) || ((__HCLK__) == RCC_SYSCLK_DIV256) || \
-                               ((__HCLK__) == RCC_SYSCLK_DIV512))
-#define IS_RCC_PCLK(__PCLK__) (((__PCLK__) == RCC_HCLK_DIV1) || ((__PCLK__) == RCC_HCLK_DIV2) || \
-                               ((__PCLK__) == RCC_HCLK_DIV4) || ((__PCLK__) == RCC_HCLK_DIV8) || \
-                               ((__PCLK__) == RCC_HCLK_DIV16))
-#if  defined(STM32L031xx) || defined(STM32L041xx) || defined(STM32L073xx) || defined(STM32L083xx) \
-  || defined(STM32L072xx) || defined(STM32L082xx) || defined(STM32L071xx) || defined(STM32L081xx) 
-#define IS_RCC_MCO(__MCO__) (((__MCO__) == RCC_MCO1) || ((__MCO__) == RCC_MCO2) || ((__MCO__) == RCC_MCO3))
-#else
-#define IS_RCC_MCO(__MCO__) (((__MCO__) == RCC_MCO1) || ((__MCO__) == RCC_MCO2))
-
-#endif
-#define IS_RCC_MCODIV(__DIV__) (((__DIV__) == RCC_MCODIV_1) || ((__DIV__) == RCC_MCODIV_2) || \
-                                ((__DIV__) == RCC_MCODIV_4) || ((__DIV__) == RCC_MCODIV_8) || \
-                                ((__DIV__) == RCC_MCODIV_16)) 
-#if defined(RCC_CFGR_MCOSEL_HSI48)
-#define IS_RCC_MCO1SOURCE(__SOURCE__) (((__SOURCE__) == RCC_MCO1SOURCE_NOCLOCK) || ((__SOURCE__) == RCC_MCO1SOURCE_SYSCLK) || \
-                                      ((__SOURCE__) == RCC_MCO1SOURCE_HSI)  || ((__SOURCE__) == RCC_MCO1SOURCE_MSI) || \
-                                      ((__SOURCE__) == RCC_MCO1SOURCE_HSE)  || ((__SOURCE__) == RCC_MCO1SOURCE_PLLCLK) || \
-                                      ((__SOURCE__) == RCC_MCO1SOURCE_LSI) || ((__SOURCE__) == RCC_MCO1SOURCE_LSE) || \
-                                      ((__SOURCE__) == RCC_MCO1SOURCE_HSI48))
-#else
-#define IS_RCC_MCO1SOURCE(__SOURCE__) (((__SOURCE__) == RCC_MCO1SOURCE_NOCLOCK) || ((__SOURCE__) == RCC_MCO1SOURCE_SYSCLK) || \
-                                      ((__SOURCE__) == RCC_MCO1SOURCE_HSI)  || ((__SOURCE__) == RCC_MCO1SOURCE_MSI) || \
-                                      ((__SOURCE__) == RCC_MCO1SOURCE_HSE)  || ((__SOURCE__) == RCC_MCO1SOURCE_PLLCLK) || \
-                                      ((__SOURCE__) == RCC_MCO1SOURCE_LSI) || ((__SOURCE__) == RCC_MCO1SOURCE_LSE))
-#endif /* RCC_CFGR_MCOSEL_HSI48 */
-#define IS_RCC_RTCCLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_RTCCLKSOURCE_NO_CLK)   || \
-                                         ((__SOURCE__) == RCC_RTCCLKSOURCE_LSE)      || \
-                                         ((__SOURCE__) == RCC_RTCCLKSOURCE_LSI)      || \
-                                         ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV2) || \
-                                         ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV4) || \
-                                         ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV8) || \
-                                         ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV16))
-
-/**
-  * @}
-  */
-
-/* Exported types ------------------------------------------------------------*/
-
-/** @defgroup RCC_Exported_Types RCC Exported Types
-  * @{
-  */
-
-/** 
-  * @brief  RCC PLL configuration structure definition  
-  */
-typedef struct
-{
-  uint32_t PLLState;      /*!< PLLState: The new state of the PLL.
-                              This parameter can be a value of @ref RCC_PLL_Config */
-
-  uint32_t PLLSource;     /*!< PLLSource: PLL entry clock source.
-                              This parameter must be a value of @ref RCC_PLL_Clock_Source */          
-
-  uint32_t PLLMUL;        /*!< PLLMUL: Multiplication factor for PLL VCO input clock
-                              This parameter must be a value of @ref RCC_PLL_Multiplication_Factor*/       
-
-  uint32_t PLLDIV;        /*!< PLLDIV: Division factor for PLL VCO input clock
-                              This parameter must be a value of @ref RCC_PLL_Division_Factor*/       
-} RCC_PLLInitTypeDef;
-   
-/**
-  * @brief  RCC Internal/External Oscillator (HSE, HSI, LSE and LSI) configuration structure definition  
-  */
-typedef struct
-{
-  uint32_t OscillatorType;        /*!< The oscillators to be configured.
-                                       This parameter can be a value of @ref RCC_Oscillator_Type */
-
-  uint32_t HSEState;              /*!< The new state of the HSE.
-                                       This parameter can be a value of @ref RCC_HSE_Config */
-
-  uint32_t LSEState;              /*!< The new state of the LSE.
-                                       This parameter can be a value of @ref RCC_LSE_Config */
-
-  uint32_t HSIState;              /*!< The new state of the HSI.
-                                       This parameter can be a value of @ref RCC_HSI_Config */
-
-  uint32_t HSICalibrationValue;   /*!< The HSI calibration trimming value (default is RCC_HSICALIBRATION_DEFAULT).
-                                       This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F */
-
-  uint32_t LSIState;              /*!< The new state of the LSI.
-                                       This parameter can be a value of @ref RCC_LSI_Config */
-
-#if defined(RCC_HSI48_SUPPORT)
-  uint32_t HSI48State;            /*!< The new state of the HSI48.
-                                       This parameter can be a value of @ref RCC_HSI48_Config */
-
-#endif /* RCC_HSI48_SUPPORT */
-  uint32_t MSIState;              /*!< The new state of the MSI.
-                                       This parameter can be a value of @ref RCC_MSI_Config */
-
-  uint32_t MSICalibrationValue;   /*!< The MSI calibration trimming value. (default is RCC_MSICALIBRATION_DEFAULT).
-                                       This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */
-
-  uint32_t MSIClockRange;         /*!< The MSI  frequency  range.
-                                        This parameter can be a value of @ref RCC_MSI_Clock_Range */
-
-  RCC_PLLInitTypeDef PLL;         /*!< PLL structure parameters */     
-
-} RCC_OscInitTypeDef;
-
-/**
-  * @brief  RCC System, AHB and APB busses clock configuration structure definition  
-  */
-typedef struct
-{
-  uint32_t ClockType;             /*!< The clock to be configured.
-                                       This parameter can be a value of @ref RCC_System_Clock_Type */
-
-  uint32_t SYSCLKSource;          /*!< The clock source (SYSCLKS) used as system clock.
-                                       This parameter can be a value of @ref RCC_System_Clock_Source */
-
-  uint32_t AHBCLKDivider;         /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
-                                       This parameter can be a value of @ref RCC_AHB_Clock_Source */
-
-  uint32_t APB1CLKDivider;        /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
-                                       This parameter can be a value of @ref RCC_APB1_APB2_Clock_Source */
-
-  uint32_t APB2CLKDivider;        /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
-                                       This parameter can be a value of @ref RCC_APB1_APB2_Clock_Source */
-} RCC_ClkInitTypeDef;
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup RCC_Exported_Constants RCC Exported Constants
-  * @{
-  */
-
-/** @defgroup RCC_PLL_Clock_Source PLL Clock Source
-  * @{
-  */
-
-#define RCC_PLLSOURCE_HSI           RCC_CFGR_PLLSRC_HSI        /*!< HSI clock selected as PLL entry clock source */
-#define RCC_PLLSOURCE_HSE           RCC_CFGR_PLLSRC_HSE        /*!< HSE clock selected as PLL entry clock source */
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_Oscillator_Type Oscillator Type
-  * @{
-  */
-#define RCC_OSCILLATORTYPE_NONE            ((uint32_t)0x00000000)
-#define RCC_OSCILLATORTYPE_HSE             ((uint32_t)0x00000001)
-#define RCC_OSCILLATORTYPE_HSI             ((uint32_t)0x00000002)
-#define RCC_OSCILLATORTYPE_LSE             ((uint32_t)0x00000004)
-#define RCC_OSCILLATORTYPE_LSI             ((uint32_t)0x00000008)
-#define RCC_OSCILLATORTYPE_MSI             ((uint32_t)0x00000010)
-#if defined(RCC_HSI48_SUPPORT)
-#define RCC_OSCILLATORTYPE_HSI48           ((uint32_t)0x00000020)
-#endif /* RCC_HSI48_SUPPORT */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_HSE_Config HSE Config
-  * @{
-  */
-#define RCC_HSE_OFF                      ((uint32_t)0x00000000)                     /*!< HSE clock deactivation */
-#define RCC_HSE_ON                       RCC_CR_HSEON                               /*!< HSE clock activation */
-#define RCC_HSE_BYPASS                   ((uint32_t)(RCC_CR_HSEBYP | RCC_CR_HSEON)) /*!< External clock source for HSE clock */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LSE_Config LSE Config
-  * @{
-  */
-#define RCC_LSE_OFF                      ((uint32_t)0x00000000)                       /*!< LSE clock deactivation */
-#define RCC_LSE_ON                       RCC_CSR_LSEON                                /*!< LSE clock activation */
-#define RCC_LSE_BYPASS                   ((uint32_t)(RCC_CSR_LSEBYP | RCC_CSR_LSEON)) /*!< External clock source for LSE clock */
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_HSI_Config HSI Config
-  * @{
-  */
-#define RCC_HSI_OFF                      ((uint32_t)0x00000000)           /*!< HSI clock deactivation */
-#define RCC_HSI_ON                       RCC_CR_HSION                     /*!< HSI clock activation */
-#define RCC_HSI_DIV4                     (RCC_CR_HSIDIVEN | RCC_CR_HSION) /*!< HSI_DIV4 clock activation */
-#if defined(RCC_CR_HSIOUTEN)
-#define RCC_HSI_OUTEN                    RCC_CR_HSIOUTEN                  /*!< HSI_OUTEN clock activation */
-#endif /* RCC_CR_HSIOUTEN */
-
-#define RCC_HSICALIBRATION_DEFAULT       ((uint32_t)0x10)         /* Default HSI calibration trimming value */
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_MSI_Clock_Range MSI Clock Range
-  * @{
-  */
-
-#define RCC_MSIRANGE_0                   RCC_ICSCR_MSIRANGE_0 /*!< MSI = 65.536 KHz  */
-#define RCC_MSIRANGE_1                   RCC_ICSCR_MSIRANGE_1 /*!< MSI = 131.072 KHz */
-#define RCC_MSIRANGE_2                   RCC_ICSCR_MSIRANGE_2 /*!< MSI = 262.144 KHz */
-#define RCC_MSIRANGE_3                   RCC_ICSCR_MSIRANGE_3 /*!< MSI = 524.288 KHz */
-#define RCC_MSIRANGE_4                   RCC_ICSCR_MSIRANGE_4 /*!< MSI = 1.048 MHz   */
-#define RCC_MSIRANGE_5                   RCC_ICSCR_MSIRANGE_5 /*!< MSI = 2.097 MHz   */
-#define RCC_MSIRANGE_6                   RCC_ICSCR_MSIRANGE_6 /*!< MSI = 4.194 MHz   */
-
-/**
-  * @}
-  */
-  
-/** @defgroup RCC_LSI_Config LSI Config
-  * @{
-  */
-#define RCC_LSI_OFF                      ((uint32_t)0x00000000)   /*!< LSI clock deactivation */
-#define RCC_LSI_ON                       RCC_CSR_LSION            /*!< LSI clock activation */
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_MSI_Config MSI Config
-  * @{
-  */
-#define RCC_MSI_OFF                      ((uint32_t)0x00000000)
-#define RCC_MSI_ON                       ((uint32_t)0x00000001)
-
-#define RCC_MSICALIBRATION_DEFAULT       ((uint32_t)0x00000000U)   /* Default MSI calibration trimming value */
-
-/**
-  * @}
-  */
-
-#if defined(RCC_HSI48_SUPPORT)
-/** @defgroup RCC_HSI48_Config HSI48 Config
-  * @{
-  */
-#define RCC_HSI48_OFF               ((uint8_t)0x00)
-#define RCC_HSI48_ON                ((uint8_t)0x01)
-
-/**
-  * @}
-  */
-#endif /* RCC_HSI48_SUPPORT */
-
-/** @defgroup RCC_PLL_Config PLL Config
-  * @{
-  */
-#define RCC_PLL_NONE                      ((uint32_t)0x00000000)  /*!< PLL is not configured */
-#define RCC_PLL_OFF                       ((uint32_t)0x00000001)  /*!< PLL deactivation */
-#define RCC_PLL_ON                        ((uint32_t)0x00000002)  /*!< PLL activation */
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_System_Clock_Type System Clock Type
-  * @{
-  */
-#define RCC_CLOCKTYPE_SYSCLK             ((uint32_t)0x00000001) /*!< SYSCLK to configure */
-#define RCC_CLOCKTYPE_HCLK               ((uint32_t)0x00000002) /*!< HCLK to configure */
-#define RCC_CLOCKTYPE_PCLK1              ((uint32_t)0x00000004) /*!< PCLK1 to configure */
-#define RCC_CLOCKTYPE_PCLK2              ((uint32_t)0x00000008) /*!< PCLK2 to configure */
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_System_Clock_Source System Clock Source
-  * @{
-  */
-#define RCC_SYSCLKSOURCE_MSI             RCC_CFGR_SW_MSI /*!< MSI selected as system clock */
-#define RCC_SYSCLKSOURCE_HSI             RCC_CFGR_SW_HSI /*!< HSI selected as system clock */
-#define RCC_SYSCLKSOURCE_HSE             RCC_CFGR_SW_HSE /*!< HSE selected as system clock */
-#define RCC_SYSCLKSOURCE_PLLCLK          RCC_CFGR_SW_PLL /*!< PLL selected as system clock */
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_System_Clock_Source_Status System Clock Source Status
-  * @{
-  */
-#define RCC_SYSCLKSOURCE_STATUS_MSI      RCC_CFGR_SWS_MSI            /*!< MSI used as system clock */
-#define RCC_SYSCLKSOURCE_STATUS_HSI      RCC_CFGR_SWS_HSI            /*!< HSI used as system clock */
-#define RCC_SYSCLKSOURCE_STATUS_HSE      RCC_CFGR_SWS_HSE            /*!< HSE used as system clock */
-#define RCC_SYSCLKSOURCE_STATUS_PLLCLK   RCC_CFGR_SWS_PLL            /*!< PLL used as system clock */
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_AHB_Clock_Source AHB Clock Source
-  * @{
-  */
-#define RCC_SYSCLK_DIV1                  RCC_CFGR_HPRE_DIV1   /*!< SYSCLK not divided */
-#define RCC_SYSCLK_DIV2                  RCC_CFGR_HPRE_DIV2   /*!< SYSCLK divided by 2 */
-#define RCC_SYSCLK_DIV4                  RCC_CFGR_HPRE_DIV4   /*!< SYSCLK divided by 4 */
-#define RCC_SYSCLK_DIV8                  RCC_CFGR_HPRE_DIV8   /*!< SYSCLK divided by 8 */
-#define RCC_SYSCLK_DIV16                 RCC_CFGR_HPRE_DIV16  /*!< SYSCLK divided by 16 */
-#define RCC_SYSCLK_DIV64                 RCC_CFGR_HPRE_DIV64  /*!< SYSCLK divided by 64 */
-#define RCC_SYSCLK_DIV128                RCC_CFGR_HPRE_DIV128 /*!< SYSCLK divided by 128 */
-#define RCC_SYSCLK_DIV256                RCC_CFGR_HPRE_DIV256 /*!< SYSCLK divided by 256 */
-#define RCC_SYSCLK_DIV512                RCC_CFGR_HPRE_DIV512 /*!< SYSCLK divided by 512 */
-
-/**
-  * @}
-  */
-  
-/** @defgroup RCC_APB1_APB2_Clock_Source APB1 APB2 Clock Source
-  * @{
-  */
-#define RCC_HCLK_DIV1                    RCC_CFGR_PPRE1_DIV1  /*!< HCLK not divided */
-#define RCC_HCLK_DIV2                    RCC_CFGR_PPRE1_DIV2  /*!< HCLK divided by 2 */
-#define RCC_HCLK_DIV4                    RCC_CFGR_PPRE1_DIV4  /*!< HCLK divided by 4 */
-#define RCC_HCLK_DIV8                    RCC_CFGR_PPRE1_DIV8  /*!< HCLK divided by 8 */
-#define RCC_HCLK_DIV16                   RCC_CFGR_PPRE1_DIV16 /*!< HCLK divided by 16 */
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_HAL_EC_RTC_HSE_DIV RTC HSE Prescaler
-  * @{
-  */
-#define RCC_RTC_HSE_DIV_2               (uint32_t)0x00000000U /*!< HSE is divided by 2 for RTC clock  */
-#define RCC_RTC_HSE_DIV_4               RCC_CR_RTCPRE_0       /*!< HSE is divided by 4 for RTC clock  */
-#define RCC_RTC_HSE_DIV_8               RCC_CR_RTCPRE_1       /*!< HSE is divided by 8 for RTC clock  */
-#define RCC_RTC_HSE_DIV_16              RCC_CR_RTCPRE         /*!< HSE is divided by 16 for RTC clock */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_RTC_LCD_Clock_Source RTC LCD Clock Source
-  * @{
-  */
-#define RCC_RTCCLKSOURCE_NO_CLK          ((uint32_t)0x00000000)                 /*!< No clock */
-#define RCC_RTCCLKSOURCE_LSE             RCC_CSR_RTCSEL_LSE                  /*!< LSE oscillator clock used as RTC clock */
-#define RCC_RTCCLKSOURCE_LSI             RCC_CSR_RTCSEL_LSI                  /*!< LSI oscillator clock used as RTC clock */
-#define RCC_RTCCLKSOURCE_HSE_DIVX        RCC_CSR_RTCSEL_HSE                         /*!< HSE oscillator clock divided by X used as RTC clock */
-#define RCC_RTCCLKSOURCE_HSE_DIV2        (RCC_RTC_HSE_DIV_2  | RCC_CSR_RTCSEL_HSE)  /*!< HSE oscillator clock divided by 2 used as RTC clock */
-#define RCC_RTCCLKSOURCE_HSE_DIV4        (RCC_RTC_HSE_DIV_4  | RCC_CSR_RTCSEL_HSE)  /*!< HSE oscillator clock divided by 4 used as RTC clock */
-#define RCC_RTCCLKSOURCE_HSE_DIV8        (RCC_RTC_HSE_DIV_8  | RCC_CSR_RTCSEL_HSE)  /*!< HSE oscillator clock divided by 8 used as RTC clock */
-#define RCC_RTCCLKSOURCE_HSE_DIV16       (RCC_RTC_HSE_DIV_16 | RCC_CSR_RTCSEL_HSE)  /*!< HSE oscillator clock divided by 16 used as RTC clock */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_PLL_Division_Factor PLL Division Factor
-  * @{
-  */
-
-#define RCC_PLL_DIV2                    RCC_CFGR_PLLDIV2
-#define RCC_PLL_DIV3                    RCC_CFGR_PLLDIV3
-#define RCC_PLL_DIV4                    RCC_CFGR_PLLDIV4
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_PLL_Multiplication_Factor PLL Multiplication Factor
-  * @{
-  */
-
-#define RCC_PLL_MUL3                    RCC_CFGR_PLLMUL3
-#define RCC_PLL_MUL4                    RCC_CFGR_PLLMUL4
-#define RCC_PLL_MUL6                    RCC_CFGR_PLLMUL6
-#define RCC_PLL_MUL8                    RCC_CFGR_PLLMUL8
-#define RCC_PLL_MUL12                   RCC_CFGR_PLLMUL12
-#define RCC_PLL_MUL16                   RCC_CFGR_PLLMUL16
-#define RCC_PLL_MUL24                   RCC_CFGR_PLLMUL24
-#define RCC_PLL_MUL32                   RCC_CFGR_PLLMUL32 
-#define RCC_PLL_MUL48                   RCC_CFGR_PLLMUL48
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_MCO_Index MCO Index
-  * @{
-  */
-#define RCC_MCO1                         ((uint32_t)0x00000000)
-#define RCC_MCO2                         ((uint32_t)0x00000001)
-#if  defined(STM32L031xx) || defined(STM32L041xx) || defined(STM32L073xx) || defined(STM32L083xx) \
-  || defined(STM32L072xx) || defined(STM32L082xx) || defined(STM32L071xx) || defined(STM32L081xx) 
-#define RCC_MCO3                         ((uint32_t)0x00000002)
-#endif
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_MCOx_Clock_Prescaler MCO Clock Prescaler
-  * @{
-  */
-#define RCC_MCODIV_1                    RCC_CFGR_MCO_PRE_1
-#define RCC_MCODIV_2                    RCC_CFGR_MCO_PRE_2
-#define RCC_MCODIV_4                    RCC_CFGR_MCO_PRE_4
-#define RCC_MCODIV_8                    RCC_CFGR_MCO_PRE_8
-#define RCC_MCODIV_16                   RCC_CFGR_MCO_PRE_16
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_MCO1_Clock_Source MCO1 Clock Source
-  * @{
-  */
-#define RCC_MCO1SOURCE_NOCLOCK           RCC_CFGR_MCO_NOCLOCK
-#define RCC_MCO1SOURCE_SYSCLK            RCC_CFGR_MCO_SYSCLK
-#define RCC_MCO1SOURCE_MSI               RCC_CFGR_MCO_MSI
-#define RCC_MCO1SOURCE_HSI               RCC_CFGR_MCO_HSI
-#define RCC_MCO1SOURCE_LSE               RCC_CFGR_MCO_LSE
-#define RCC_MCO1SOURCE_LSI               RCC_CFGR_MCO_LSI
-#define RCC_MCO1SOURCE_HSE               RCC_CFGR_MCO_HSE
-#define RCC_MCO1SOURCE_PLLCLK            RCC_CFGR_MCO_PLL
-#if defined(RCC_CFGR_MCOSEL_HSI48)
-#define RCC_MCO1SOURCE_HSI48             RCC_CFGR_MCO_HSI48
-#endif /* RCC_CFGR_MCOSEL_HSI48 */
-
-/**
-  * @}
-  */
-/** @defgroup RCC_Interrupt Interrupts
-  * @{
-  */
-#define RCC_IT_LSIRDY                    RCC_CIFR_LSIRDYF   /*!< LSI Ready Interrupt flag */
-#define RCC_IT_LSERDY                    RCC_CIFR_LSERDYF   /*!< LSE Ready Interrupt flag */
-#define RCC_IT_HSIRDY                    RCC_CIFR_HSIRDYF   /*!< HSI Ready Interrupt flag */
-#define RCC_IT_HSERDY                    RCC_CIFR_HSERDYF   /*!< HSE Ready Interrupt flag */
-#define RCC_IT_PLLRDY                    RCC_CIFR_PLLRDYF   /*!< PLL Ready Interrupt flag */
-#define RCC_IT_MSIRDY                    RCC_CIFR_MSIRDYF   /*!< MSI Ready Interrupt flag */
-#define RCC_IT_LSECSS                    RCC_CIFR_CSSLSEF   /*!< LSE Clock Security System Interrupt flag */
-#if defined(RCC_HSECSS_SUPPORT)
-#define RCC_IT_CSS                       RCC_CIFR_CSSHSEF   /*!< Clock Security System Interrupt flag */
-#endif /* RCC_HSECSS_SUPPORT */
-#if defined(RCC_HSI48_SUPPORT)
-#define RCC_IT_HSI48RDY                  RCC_CIFR_HSI48RDYF /*!< HSI48 Ready Interrupt flag */
-#endif /* RCC_HSI48_SUPPORT */
-/**
-  * @}
-  */ 
-  
-/** @defgroup RCC_Flag Flags
-  *        Elements values convention: XXXYYYYYb
-  *           - YYYYY  : Flag position in the register
-  *           - XXX  : Register index
-  *                 - 001: CR register
-  *                 - 010: CSR register
-  *                 - 011: CRRCR register (*)
-  * (*)   Applicable only for STM32L052xx, STM32L053xx, (...), STM32L073xx & STM32L082xx 
-  * @{
-  */
-/* Flags in the CR register */
-#define RCC_FLAG_HSIRDY                  ((uint8_t)((CR_REG_INDEX << 5) | 2))     /*!< Internal High Speed clock ready flag */
-#define RCC_FLAG_HSIDIV                  ((uint8_t)((CR_REG_INDEX << 5) | 4))     /*!< HSI16 divider flag */
-#define RCC_FLAG_MSIRDY                  ((uint8_t)((CR_REG_INDEX << 5) | 9))     /*!< MSI clock ready flag */
-#define RCC_FLAG_HSERDY                  ((uint8_t)((CR_REG_INDEX << 5) | 17))    /*!< External High Speed clock ready flag */
-#define RCC_FLAG_PLLRDY                  ((uint8_t)((CR_REG_INDEX << 5) | 25))    /*!< PLL clock ready flag */
-/* Flags in the CSR register */
-#define RCC_FLAG_LSIRDY                  ((uint8_t)((CSR_REG_INDEX << 5) | 1))    /*!< Internal Low Speed oscillator Ready */
-#define RCC_FLAG_LSERDY                  ((uint8_t)((CSR_REG_INDEX << 5) | 9)) /*!< External Low Speed oscillator Ready */
-#define RCC_FLAG_LSECSS                  ((uint8_t)((CSR_REG_INDEX << 5) | 14))   /*!< CSS on LSE failure Detection */
-#define RCC_FLAG_OBLRST                  ((uint8_t)((CSR_REG_INDEX << 5) | 25))   /*!< Options bytes loading reset flag */
-#define RCC_FLAG_PINRST                  ((uint8_t)((CSR_REG_INDEX << 5) | 26))   /*!< PIN reset flag */
-#define RCC_FLAG_PORRST                  ((uint8_t)((CSR_REG_INDEX << 5) | 27))   /*!< POR/PDR reset flag */
-#define RCC_FLAG_SFTRST                  ((uint8_t)((CSR_REG_INDEX << 5) | 28))   /*!< Software Reset flag */
-#define RCC_FLAG_IWDGRST                 ((uint8_t)((CSR_REG_INDEX << 5) | 29))   /*!< Independent Watchdog reset flag */
-#define RCC_FLAG_WWDGRST                 ((uint8_t)((CSR_REG_INDEX << 5) | 30))   /*!< Window watchdog reset flag */
-#define RCC_FLAG_LPWRRST                 ((uint8_t)((CSR_REG_INDEX << 5) | 31))   /*!< Low-Power reset flag */
-#if defined(RCC_CSR_FWRSTF)
-#define RCC_FLAG_FWRST                   ((uint8_t)((CSR_REG_INDEX << 5) |  8))   /*!< RCC flag FW reset */
-#endif /* RCC_CSR_FWRSTF */
-/* Flags in the CRRCR register */
-#if defined(RCC_HSI48_SUPPORT)
-#define RCC_FLAG_HSI48RDY                ((uint8_t)((CRRCR_REG_INDEX << 5) | 1))  /*!< HSI48 clock ready flag */
-#endif /* RCC_HSI48_SUPPORT */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-
-/** @defgroup RCC_Exported_Macros RCC Exported Macros
-  * @{
-  */
-
-/** @defgroup RCC_AHB_Peripheral_Clock_Enable_Disable AHB Peripheral Clock Enable Disable
-  * @brief  Enable or disable the AHB peripheral clock.
-  * @note   After reset, the peripheral clock (used for registers read/write access)
-  *         is disabled and the application software has to enable this clock before 
-  *         using it.
-  * @{
-  */
-#define __HAL_RCC_DMA1_CLK_ENABLE()   do { \
-                                        __IO uint32_t tmpreg; \
-                                        SET_BIT(RCC->AHBENR, RCC_AHBENR_DMA1EN);\
-                                        /* Delay after an RCC peripheral clock enabling */ \
-                                        tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_DMA1EN);\
-                                        UNUSED(tmpreg); \
-                                      } while(0)
-                                      
-#define __HAL_RCC_MIF_CLK_ENABLE()   do { \
-                                        __IO uint32_t tmpreg; \
-                                        SET_BIT(RCC->AHBENR, RCC_AHBENR_MIFEN);\
-                                        /* Delay after an RCC peripheral clock enabling */ \
-                                        tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_MIFEN);\
-                                        UNUSED(tmpreg); \
-                                      } while(0)
-                                      
-#define __HAL_RCC_CRC_CLK_ENABLE()   do { \
-                                        __IO uint32_t tmpreg; \
-                                        SET_BIT(RCC->AHBENR, RCC_AHBENR_CRCEN);\
-                                        /* Delay after an RCC peripheral clock enabling */ \
-                                        tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_CRCEN);\
-                                        UNUSED(tmpreg); \
-                                      } while(0)
-
-
-#define __HAL_RCC_DMA1_CLK_DISABLE()          CLEAR_BIT(RCC->AHBENR, RCC_AHBENR_DMA1EN)
-#define __HAL_RCC_MIF_CLK_DISABLE()           CLEAR_BIT(RCC->AHBENR, RCC_AHBENR_MIFEN)
-#define __HAL_RCC_CRC_CLK_DISABLE()           CLEAR_BIT(RCC->AHBENR, RCC_AHBENR_CRCEN)
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_IOPORT_Clock_Enable_Disable IOPORT Peripheral Clock Enable Disable
-  * @brief  Enable or disable the IOPORT peripheral clock.
-  * @note   After reset, the peripheral clock (used for registers read/write access)
-  *         is disabled and the application software has to enable this clock before 
-  *         using it.
-  * @{
-  */
-#define __HAL_RCC_GPIOA_CLK_ENABLE()   do { \
-                                        __IO uint32_t tmpreg; \
-                                        SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN);\
-                                        /* Delay after an RCC peripheral clock enabling */ \
-                                        tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN);\
-                                        UNUSED(tmpreg); \
-                                      } while(0)
-                                      
-#define __HAL_RCC_GPIOB_CLK_ENABLE()   do { \
-                                        __IO uint32_t tmpreg; \
-                                        SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOBEN);\
-                                        /* Delay after an RCC peripheral clock enabling */ \
-                                        tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOBEN);\
-                                        UNUSED(tmpreg); \
-                                      } while(0)
-                                      
-#define __HAL_RCC_GPIOC_CLK_ENABLE()   do { \
-                                        __IO uint32_t tmpreg; \
-                                        SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN);\
-                                        /* Delay after an RCC peripheral clock enabling */ \
-                                        tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN);\
-                                        UNUSED(tmpreg); \
-                                      } while(0)
-
-#define __HAL_RCC_GPIOH_CLK_ENABLE()   do { \
-                                        __IO uint32_t tmpreg; \
-                                        SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOHEN);\
-                                        /* Delay after an RCC peripheral clock enabling */ \
-                                        tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOHEN);\
-                                        UNUSED(tmpreg); \
-                                      } while(0)
-
-
-#define __HAL_RCC_GPIOA_CLK_DISABLE()        CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN)
-#define __HAL_RCC_GPIOB_CLK_DISABLE()        CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOBEN)
-#define __HAL_RCC_GPIOC_CLK_DISABLE()        CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN)
-#define __HAL_RCC_GPIOH_CLK_DISABLE()        CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOHEN)
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_APB1_Clock_Enable_Disable APB1 Peripheral Clock Enable Disable
-  * @brief  Enable or disable the Low Speed APB (APB1) peripheral clock.
-  * @note   After reset, the peripheral clock (used for registers read/write access)
-  *         is disabled and the application software has to enable this clock before
-  *         using it.
-  * @{
-  */
-#define __HAL_RCC_WWDG_CLK_ENABLE()    SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_WWDGEN))
-#define __HAL_RCC_PWR_CLK_ENABLE()     SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_PWREN))
-
-#define __HAL_RCC_WWDG_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_WWDGEN))
-#define __HAL_RCC_PWR_CLK_DISABLE()     CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_PWREN))
-/**
-  * @}
-  */
-
-/** @defgroup RCC_APB2_Clock_Enable_Disable APB2 Peripheral Clock Enable Disable 
-  * @brief  Enable or disable the High Speed APB (APB2) peripheral clock.
-  * @note   After reset, the peripheral clock (used for registers read/write access)
-  *         is disabled and the application software has to enable this clock before 
-  *         using it.
-  * @{
-  */
-#define __HAL_RCC_SYSCFG_CLK_ENABLE()   SET_BIT(RCC->APB2ENR, (RCC_APB2ENR_SYSCFGEN))
-#define __HAL_RCC_DBGMCU_CLK_ENABLE()   SET_BIT(RCC->APB2ENR, (RCC_APB2ENR_DBGMCUEN))
-
-#define __HAL_RCC_SYSCFG_CLK_DISABLE()   CLEAR_BIT(RCC->APB2ENR, (RCC_APB2ENR_SYSCFGEN))
-#define __HAL_RCC_DBGMCU_CLK_DISABLE()   CLEAR_BIT(RCC->APB2ENR, (RCC_APB2ENR_DBGMCUEN))
-/**
-  * @}
-  */
-  
-/** @defgroup RCC_AHB_Peripheral_Clock_Enable_Disable_Status AHB Peripheral Clock Enabled or Disabled Status
-  * @brief  Check whether the AHB peripheral clock is enabled or not.
-  * @note   After reset, the peripheral clock (used for registers read/write access)
-  *         is disabled and the application software has to enable this clock before
-  *         using it.
-  * @{
-  */
-
-#define __HAL_RCC_DMA1_IS_CLK_ENABLED()        (READ_BIT(RCC->AHBENR, RCC_AHBENR_DMA1EN) != RESET)
-#define __HAL_RCC_MIF_IS_CLK_ENABLED()         (READ_BIT(RCC->AHBENR, RCC_AHBENR_MIFEN) != RESET)
-#define __HAL_RCC_CRC_IS_CLK_ENABLED()         (READ_BIT(RCC->AHBENR, RCC_AHBENR_CRCEN) != RESET)
-#define __HAL_RCC_DMA1_IS_CLK_DISABLED()       (READ_BIT(RCC->AHBENR, RCC_AHBENR_DMA1EN) == RESET)
-#define __HAL_RCC_MIF_IS_CLK_DISABLED()        (READ_BIT(RCC->AHBENR, RCC_AHBENR_MIFEN) == RESET)
-#define __HAL_RCC_CRC_IS_CLK_DISABLED()        (READ_BIT(RCC->AHBENR, RCC_AHBENR_CRCEN) == RESET)
-
-/**
-  * @}
-  */
-  
-/** @defgroup RCC_IOPORT_Peripheral_Clock_Enable_Disable_Status IOPORT Peripheral Clock Enabled or Disabled Status
-  * @brief  Check whether the IOPORT peripheral clock is enabled or not.
-  * @note   After reset, the peripheral clock (used for registers read/write access)
-  *         is disabled and the application software has to enable this clock before
-  *         using it.
-  * @{
-  */
-
-#define __HAL_RCC_GPIOA_IS_CLK_ENABLED()        (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN) != RESET)
-#define __HAL_RCC_GPIOB_IS_CLK_ENABLED()        (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOBEN) != RESET)
-#define __HAL_RCC_GPIOC_IS_CLK_ENABLED()        (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN) != RESET)
-#define __HAL_RCC_GPIOH_IS_CLK_ENABLED()        (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOHEN) != RESET)
-#define __HAL_RCC_GPIOA_IS_CLK_DISABLED()       (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN) == RESET)
-#define __HAL_RCC_GPIOB_IS_CLK_DISABLED()       (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOBEN) == RESET)
-#define __HAL_RCC_GPIOC_IS_CLK_DISABLED()       (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN) == RESET)
-#define __HAL_RCC_GPIOH_IS_CLK_DISABLED()       (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOHEN) == RESET)
-
-/**
-  * @}
-  */
-  
-/** @defgroup RCC_APB1_Clock_Enable_Disable_Status APB1 Peripheral Clock Enabled or Disabled Status
-  * @brief  Check whether the APB1 peripheral clock is enabled or not.
-  * @note   After reset, the peripheral clock (used for registers read/write access)
-  *         is disabled and the application software has to enable this clock before
-  *         using it.
-  * @{
-  */
-#define __HAL_RCC_WWDG_IS_CLK_ENABLED()        (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_WWDGEN) != RESET)
-#define __HAL_RCC_PWR_IS_CLK_ENABLED()         (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN) != RESET)
-#define __HAL_RCC_WWDG_IS_CLK_DISABLED()       (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_WWDGEN) == RESET)
-#define __HAL_RCC_PWR_IS_CLK_DISABLED()        (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN) == RESET)
-
-/**
-  * @}
-  */
-  
-/** @defgroup RCC_APB2_Clock_Enable_Disable_Status APB2 Peripheral Clock Enabled or Disabled Status
-  * @brief  Check whether the APB2 peripheral clock is enabled or not.
-  * @note   After reset, the peripheral clock (used for registers read/write access)
-  *         is disabled and the application software has to enable this clock before
-  *         using it.
-  * @{
-  */
-#define __HAL_RCC_SYSCFG_IS_CLK_ENABLED()        (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN) != RESET)
-#define __HAL_RCC_DBGMCU_IS_CLK_ENABLED()        (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DBGMCUEN) != RESET)
-#define __HAL_RCC_SYSCFG_IS_CLK_DISABLED()       (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN) == RESET)
-#define __HAL_RCC_DBGMCU_IS_CLK_DISABLED()       (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DBGMCUEN) == RESET)
-
-/**
-  * @}
-  */
-  
- /** @defgroup RCC_AHB_Force_Release_Reset AHB Peripheral Force Release Reset 
-  * @brief  Force or release AHB peripheral reset.
-  * @{
-  */
-#define __HAL_RCC_AHB_FORCE_RESET()     (RCC->AHBRSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_DMA1_FORCE_RESET()    SET_BIT(RCC->AHBRSTR, (RCC_AHBRSTR_DMA1RST))
-#define __HAL_RCC_MIF_FORCE_RESET()     SET_BIT(RCC->AHBRSTR, (RCC_AHBRSTR_MIFRST))
-#define __HAL_RCC_CRC_FORCE_RESET()     SET_BIT(RCC->AHBRSTR, (RCC_AHBRSTR_CRCRST))
-
-#define __HAL_RCC_AHB_RELEASE_RESET()     (RCC->AHBRSTR = 0x00000000U)
-#define __HAL_RCC_CRC_RELEASE_RESET()     CLEAR_BIT(RCC->AHBRSTR, (RCC_AHBRSTR_CRCRST))
-#define __HAL_RCC_DMA1_RELEASE_RESET()    CLEAR_BIT(RCC->AHBRSTR, (RCC_AHBRSTR_DMA1RST))
-#define __HAL_RCC_MIF_RELEASE_RESET()     CLEAR_BIT(RCC->AHBRSTR, (RCC_AHBRSTR_MIFRST))
-/**
-  * @}
-  */
-  
-/** @defgroup RCC_IOPORT_Force_Release_Reset IOPORT Peripheral Force Release Reset 
-  * @brief  Force or release IOPORT peripheral reset.
-  * @{
-  */
-#define __HAL_RCC_IOP_FORCE_RESET()     (RCC->IOPRSTR = 0xFFFFFFFFU) 
-#define __HAL_RCC_GPIOA_FORCE_RESET()   SET_BIT(RCC->IOPRSTR, (RCC_IOPRSTR_GPIOARST))
-#define __HAL_RCC_GPIOB_FORCE_RESET()   SET_BIT(RCC->IOPRSTR, (RCC_IOPRSTR_GPIOBRST))
-#define __HAL_RCC_GPIOC_FORCE_RESET()   SET_BIT(RCC->IOPRSTR, (RCC_IOPRSTR_GPIOCRST))
-#define __HAL_RCC_GPIOH_FORCE_RESET()   SET_BIT(RCC->IOPRSTR, (RCC_IOPRSTR_GPIOHRST))
-
-#define __HAL_RCC_IOP_RELEASE_RESET()   (RCC->IOPRSTR = 0x00000000U) 
-#define __HAL_RCC_GPIOA_RELEASE_RESET() CLEAR_BIT(RCC->IOPRSTR, (RCC_IOPRSTR_GPIOARST))
-#define __HAL_RCC_GPIOB_RELEASE_RESET() CLEAR_BIT(RCC->IOPRSTR, (RCC_IOPRSTR_GPIOBRST))
-#define __HAL_RCC_GPIOC_RELEASE_RESET() CLEAR_BIT(RCC->IOPRSTR, (RCC_IOPRSTR_GPIOCRST))
-#define __HAL_RCC_GPIOH_RELEASE_RESET() CLEAR_BIT(RCC->IOPRSTR, (RCC_IOPRSTR_GPIOHRST))
-
-/**
-  * @}
-  */
-  
-/** @defgroup RCC_APB1_Force_Release_Reset APB1 Peripheral Force Release Reset 
-  * @brief  Force or release APB1 peripheral reset.
-  * @{
-  */
-#define __HAL_RCC_APB1_FORCE_RESET()     (RCC->APB1RSTR = 0xFFFFFFFFU)  
-#define __HAL_RCC_WWDG_FORCE_RESET()     SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_WWDGRST))
-#define __HAL_RCC_PWR_FORCE_RESET()      SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_PWRRST))
-
-#define __HAL_RCC_APB1_RELEASE_RESET()   (RCC->APB1RSTR = 0x00000000U)
-#define __HAL_RCC_WWDG_RELEASE_RESET()   CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_WWDGRST))
-#define __HAL_RCC_PWR_RELEASE_RESET()    CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_PWRRST))
-
-/**
-  * @}
-  */
-  
-/** @defgroup RCC_APB2_Force_Release_Reset APB2 Peripheral Force Release Reset 
-  * @brief  Force or release APB2 peripheral reset.
-  * @{
-  */
-#define __HAL_RCC_APB2_FORCE_RESET()     (RCC->APB2RSTR = 0xFFFFFFFFU)  
-#define __HAL_RCC_DBGMCU_FORCE_RESET()   SET_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_DBGMCURST))
-#define __HAL_RCC_SYSCFG_FORCE_RESET()   SET_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_SYSCFGRST))
-
-#define __HAL_RCC_APB2_RELEASE_RESET()   (RCC->APB2RSTR = 0x00000000U)
-#define __HAL_RCC_DBGMCU_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_DBGMCURST))
-#define __HAL_RCC_SYSCFG_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_SYSCFGRST))
-/**
-  * @}
-  */
-  
-
-/** @defgroup RCC_AHB_Clock_Sleep_Enable_Disable AHB Peripheral Clock Sleep Enable Disable
-  * @brief  Enable or disable the AHB peripheral clock during Low Power (Sleep) mode.
-  * @note   Peripheral clock gating in SLEEP mode can be used to further reduce
-  *         power consumption.
-  * @note   After wakeup from SLEEP mode, the peripheral clock is enabled again.
-  * @note   By default, all peripheral activated clocks remain enabled during SLEEP mode.
-  * @{
-  */
-#define __HAL_RCC_CRC_CLK_SLEEP_ENABLE()      SET_BIT(RCC->AHBSMENR, (RCC_AHBSMENR_CRCSMEN))
-#define __HAL_RCC_MIF_CLK_SLEEP_ENABLE()      SET_BIT(RCC->AHBSMENR, (RCC_AHBSMENR_MIFSMEN))
-#define __HAL_RCC_SRAM_CLK_SLEEP_ENABLE()     SET_BIT(RCC->AHBSMENR, (RCC_AHBSMENR_SRAMSMEN))
-#define __HAL_RCC_DMA1_CLK_SLEEP_ENABLE()     SET_BIT(RCC->AHBSMENR, (RCC_AHBSMENR_DMA1SMEN))
-
-#define __HAL_RCC_CRC_CLK_SLEEP_DISABLE()     CLEAR_BIT(RCC->AHBSMENR, (RCC_AHBSMENR_CRCSMEN))
-#define __HAL_RCC_MIF_CLK_SLEEP_DISABLE()     CLEAR_BIT(RCC->AHBSMENR, (RCC_AHBSMENR_MIFSMEN))
-#define __HAL_RCC_SRAM_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->AHBSMENR, (RCC_AHBSMENR_SRAMSMEN))
-#define __HAL_RCC_DMA1_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->AHBSMENR, (RCC_AHBSMENR_DMA1SMEN))
-/**
-  * @}
-  */
-
-/** @defgroup RCC_IOPORT_Clock_Sleep_Enable_Disable IOPORT Peripheral Clock Sleep Enable Disable 
-  * @brief  Enable or disable the IOPORT peripheral clock during Low Power (Sleep) mode.
-  * @note   Peripheral clock gating in SLEEP mode can be used to further reduce
-  *         power consumption.
-  * @note   After wakeup from SLEEP mode, the peripheral clock is enabled again.
-  * @note   By default, all peripheral activated clocks remain enabled during SLEEP mode.
-  * @{
-  */
-
-#define __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE()    SET_BIT(RCC->IOPSMENR, (RCC_IOPSMENR_GPIOASMEN))
-#define __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE()    SET_BIT(RCC->IOPSMENR, (RCC_IOPSMENR_GPIOBSMEN))
-#define __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE()    SET_BIT(RCC->IOPSMENR, (RCC_IOPSMENR_GPIOCSMEN))
-#define __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE()    SET_BIT(RCC->IOPSMENR, (RCC_IOPSMENR_GPIOHSMEN))
-
-#define __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE()   CLEAR_BIT(RCC->IOPSMENR, (RCC_IOPSMENR_GPIOASMEN))
-#define __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE()   CLEAR_BIT(RCC->IOPSMENR, (RCC_IOPSMENR_GPIOBSMEN))
-#define __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE()   CLEAR_BIT(RCC->IOPSMENR, (RCC_IOPSMENR_GPIOCSMEN))
-#define __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE()   CLEAR_BIT(RCC->IOPSMENR, (RCC_IOPSMENR_GPIOHSMEN))
-/**
-  * @}
-  */
-  
-/** @defgroup RCC_APB1_Clock_Sleep_Enable_Disable APB1 Peripheral Clock Sleep Enable Disable   
-  * @brief  Enable or disable the APB1 peripheral clock during Low Power (Sleep) mode.
-  * @note   Peripheral clock gating in SLEEP mode can be used to further reduce
-  *         power consumption.
-  * @note   After wakeup from SLEEP mode, the peripheral clock is enabled again.
-  * @note   By default, all peripheral activated clocks remain enabled during SLEEP mode.
-  * @{
-  */
-#define __HAL_RCC_WWDG_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_WWDGSMEN))
-#define __HAL_RCC_PWR_CLK_SLEEP_ENABLE()     SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_PWRSMEN))
-
-#define __HAL_RCC_WWDG_CLK_SLEEP_DISABLE()   CLEAR_BIT(RCC->APB1SMENR,  (RCC_APB1SMENR_WWDGSMEN))
-#define __HAL_RCC_PWR_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB1SMENR,  (RCC_APB1SMENR_PWRSMEN))
-
-/**
-  * @}
-  */
-  
-/** @defgroup RCC_APB2_Clock_Sleep_Enable_Disable APB2 Peripheral Clock Sleep Enable Disable     
-  * @brief  Enable or disable the APB2 peripheral clock during Low Power (Sleep) mode.
-  * @note   Peripheral clock gating in SLEEP mode can be used to further reduce
-  *         power consumption.
-  * @note   After wakeup from SLEEP mode, the peripheral clock is enabled again.
-  * @note   By default, all peripheral activated clocks remain enabled during SLEEP mode.
-  * @{
-  */
-#define __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE()   SET_BIT(RCC->APB2SMENR, (RCC_APB2SMENR_SYSCFGSMEN))
-#define __HAL_RCC_DBGMCU_CLK_SLEEP_ENABLE()   SET_BIT(RCC->APB2SMENR, (RCC_APB2SMENR_DBGMCUSMEN))
-
-#define __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE()   CLEAR_BIT(RCC->APB2SMENR,   (RCC_APB2SMENR_SYSCFGSMEN))
-#define __HAL_RCC_DBGMCU_CLK_SLEEP_DISABLE()   CLEAR_BIT(RCC->APB2SMENR,   (RCC_APB2SMENR_DBGMCUSMEN))
-
-/**
-  * @}
-  */
-  
-/** @defgroup RCC_AHB_Clock_Sleep_Enable_Disable_Status AHB Peripheral Clock Sleep Enabled or Disabled Status
-  * @brief  Check whether the AHB peripheral clock during Low Power (Sleep) mode is enabled or not.
-  * @note   Peripheral clock gating in SLEEP mode can be used to further reduce
-  *         power consumption.
-  * @note   After wakeup from SLEEP mode, the peripheral clock is enabled again.
-  * @note   By default, all peripheral clocks are enabled during SLEEP mode.
-  * @{
-  */
-#define __HAL_RCC_CRC_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_CRCSMEN) != RESET)
-#define __HAL_RCC_MIF_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_MIFSMEN) != RESET)
-#define __HAL_RCC_SRAM_IS_CLK_SLEEP_ENABLED()   (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_SRAMSMEN) != RESET)
-#define __HAL_RCC_DMA1_IS_CLK_SLEEP_ENABLED()   (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_DMA1SMEN) != RESET)
-#define __HAL_RCC_CRC_IS_CLK_SLEEP_DISABLED()   (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_CRCSMEN) == RESET)
-#define __HAL_RCC_MIF_IS_CLK_SLEEP_DISABLED()   (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_MIFSMEN) == RESET)
-#define __HAL_RCC_SRAM_IS_CLK_SLEEP_DISABLED()  (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_SRAMSMEN) == RESET)
-#define __HAL_RCC_DMA1_IS_CLK_SLEEP_DISABLED()  (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_DMA1SMEN) == RESET)
-
-/**
-  * @}
-  */
-  
-/** @defgroup RCC_IOPORT_Clock_Sleep_Enable_Disable_Status IOPORT Peripheral Clock Sleep Enabled or Disabled Status
-  * @brief  Check whether the IOPORT peripheral clock during Low Power (Sleep) mode is enabled or not.
-  * @note   Peripheral clock gating in SLEEP mode can be used to further reduce
-  *         power consumption.
-  * @note   After wakeup from SLEEP mode, the peripheral clock is enabled again.
-  * @note   By default, all peripheral clocks are enabled during SLEEP mode.
-  * @{
-  */
-#define __HAL_RCC_GPIOA_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->IOPSMENR, RCC_IOPSMENR_GPIOASMEN) != RESET)
-#define __HAL_RCC_GPIOB_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->IOPSMENR, RCC_IOPSMENR_GPIOBSMEN) != RESET)
-#define __HAL_RCC_GPIOC_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->IOPSMENR, RCC_IOPSMENR_GPIOCSMEN) != RESET)
-#define __HAL_RCC_GPIOH_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->IOPSMENR, RCC_IOPSMENR_GPIOHSMEN) != RESET)
-#define __HAL_RCC_GPIOA_IS_CLK_SLEEP_DISABLED()   (READ_BIT(RCC->IOPSMENR, RCC_IOPSMENR_GPIOASMEN) == RESET)
-#define __HAL_RCC_GPIOB_IS_CLK_SLEEP_DISABLED()   (READ_BIT(RCC->IOPSMENR, RCC_IOPSMENR_GPIOBSMEN) == RESET)
-#define __HAL_RCC_GPIOC_IS_CLK_SLEEP_DISABLED()   (READ_BIT(RCC->IOPSMENR, RCC_IOPSMENR_GPIOCSMEN) == RESET)
-#define __HAL_RCC_GPIOH_IS_CLK_SLEEP_DISABLED()   (READ_BIT(RCC->IOPSMENR, RCC_IOPSMENR_GPIOHSMEN) == RESET)
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_APB1_Clock_Sleep_Enable_Disable_Status APB1 Peripheral Clock Sleep Enabled or Disabled Status
-  * @brief  Check whether the APB1 peripheral clock during Low Power (Sleep) mode is enabled or not.
-  * @note   Peripheral clock gating in SLEEP mode can be used to further reduce
-  *         power consumption.
-  * @note   After wakeup from SLEEP mode, the peripheral clock is enabled again.
-  * @note   By default, all peripheral clocks are enabled during SLEEP mode.
-  * @{
-  */
-#define __HAL_RCC_WWDG_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_WWDGSMEN) != RESET)
-#define __HAL_RCC_PWR_IS_CLK_SLEEP_ENABLED()     (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_PWRSMEN) != RESET)
-#define __HAL_RCC_WWDG_IS_CLK_SLEEP_DISABLED()   (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_WWDGSMEN) == RESET)
-#define __HAL_RCC_PWR_IS_CLK_SLEEP_DISABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_PWRSMEN) == RESET)
-
-/**
-  * @}
-  */
-  
-/** @defgroup RCC_APB2_Clock_Sleep_Enable_Disable_Status APB2 Peripheral Clock Sleep Enabled or Disabled Status
-  * @brief  Check whether the APB2 peripheral clock during Low Power (Sleep) mode is enabled or not.
-  * @note   Peripheral clock gating in SLEEP mode can be used to further reduce
-  *         power consumption.
-  * @note   After wakeup from SLEEP mode, the peripheral clock is enabled again.
-  * @note   By default, all peripheral clocks are enabled during SLEEP mode.
-  * @{
-  */
-#define __HAL_RCC_SYSCFG_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SYSCFGSMEN) != RESET)
-#define __HAL_RCC_DBGMCU_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DBGMCUSMEN) != RESET)
-#define __HAL_RCC_SYSCFG_IS_CLK_SLEEP_DISABLED()   (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SYSCFGSMEN) == RESET)
-#define __HAL_RCC_DBGMCU_IS_CLK_SLEEP_DISABLED()   (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DBGMCUSMEN) == RESET)
-
-/**
-  * @}
-  */
-/** @defgroup RCC_HSI_Configuration HSI Configuration
-  * @{   
-  */
-
-/** @brief  Macro to enable or disable the Internal High Speed oscillator (HSI).
-  * @note     After enabling the HSI, the application software should wait on 
-  *           HSIRDY flag to be set indicating that HSI clock is stable and can
-  *           be used to clock the PLL and/or system clock.
-  * @note     HSI can not be stopped if it is used directly or through the PLL
-  *           as system clock. In this case, you have to select another source 
-  *           of the system clock then stop the HSI.
-  * @note     The HSI is stopped by hardware when entering STOP and STANDBY modes. 
-  * @param    __STATE__ specifies the new state of the HSI.
-  *           This parameter can be one of the following values:
-  *            @arg @ref RCC_HSI_OFF turn OFF the HSI oscillator
-  *            @arg @ref RCC_HSI_ON turn ON the HSI oscillator
-  *            @arg @ref RCC_HSI_DIV4 turn ON the HSI oscillator and divide it by 4
-  * @note   When the HSI is stopped, HSIRDY flag goes low after 6 HSI oscillator
-  *         clock cycles. 
-  */
-#define __HAL_RCC_HSI_CONFIG(__STATE__) \
-                  MODIFY_REG(RCC->CR, RCC_CR_HSION | RCC_CR_HSIDIVEN , (uint32_t)(__STATE__))
-
-/** @brief  Macros to enable or disable the Internal High Speed oscillator (HSI).
-  * @note   The HSI is stopped by hardware when entering STOP and STANDBY modes.
-  *         It is used (enabled by hardware) as system clock source after startup
-  *         from Reset, wakeup from STOP and STANDBY mode, or in case of failure
-  *         of the HSE used directly or indirectly as system clock (if the Clock
-  *         Security System CSS is enabled).
-  * @note   HSI can not be stopped if it is used as system clock source. In this case,
-  *         you have to select another source of the system clock then stop the HSI.  
-  * @note   After enabling the HSI, the application software should wait on HSIRDY
-  *         flag to be set indicating that HSI clock is stable and can be used as
-  *         system clock source.  
-  * @note   When the HSI is stopped, HSIRDY flag goes low after 6 HSI oscillator
-  *         clock cycles.  
-  */
-#define __HAL_RCC_HSI_ENABLE()  SET_BIT(RCC->CR, RCC_CR_HSION)
-#define __HAL_RCC_HSI_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_HSION)
-
-/** @brief  Macro to adjust the Internal High Speed oscillator (HSI) calibration value.
-  * @note   The calibration is used to compensate for the variations in voltage
-  *         and temperature that influence the frequency of the internal HSI RC.
-  * @param  _HSICALIBRATIONVALUE_ specifies the calibration trimming value.
-  *         (default is RCC_HSICALIBRATION_DEFAULT).
-  *         This parameter must be a number between 0 and 0x1F.
-  */  
-#define __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(_HSICALIBRATIONVALUE_) \
-          (MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, (uint32_t)(_HSICALIBRATIONVALUE_) << 8))
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LSI_Configuration  LSI Configuration
-  * @{   
-  */
-
-/** @brief Macro to enable the Internal Low Speed oscillator (LSI).
-  * @note   After enabling the LSI, the application software should wait on 
-  *         LSIRDY flag to be set indicating that LSI clock is stable and can
-  *         be used to clock the IWDG and/or the RTC.
-  */
-#define __HAL_RCC_LSI_ENABLE() SET_BIT(RCC->CSR, RCC_CSR_LSION)
-
-/** @brief Macro to disable the Internal Low Speed oscillator (LSI).
-  * @note   LSI can not be disabled if the IWDG is running.  
-  * @note   When the LSI is stopped, LSIRDY flag goes low after 6 LSI oscillator
-  *         clock cycles. 
-  */
-#define __HAL_RCC_LSI_DISABLE() CLEAR_BIT(RCC->CSR, RCC_CSR_LSION)
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_HSE_Configuration HSE Configuration
-  * @{   
-  */
-
-/**
-  * @brief  Macro to configure the External High Speed oscillator (HSE).
-  * @note   Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not
-  *         supported by this macro. User should request a transition to HSE Off
-  *         first and then HSE On or HSE Bypass.
-  * @note   After enabling the HSE (RCC_HSE_ON or RCC_HSE_Bypass), the application
-  *         software should wait on HSERDY flag to be set indicating that HSE clock
-  *         is stable and can be used to clock the PLL and/or system clock.
-  * @note   HSE state can not be changed if it is used directly or through the
-  *         PLL as system clock. In this case, you have to select another source
-  *         of the system clock then change the HSE state (ex. disable it).
-  * @note   The HSE is stopped by hardware when entering STOP and STANDBY modes.
-  * @note   This function reset the CSSON bit, so if the clock security system(CSS)
-  *         was previously enabled you have to enable it again after calling this
-  *         function.
-  * @param  __STATE__ specifies the new state of the HSE.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_HSE_OFF turn OFF the HSE oscillator, HSERDY flag goes low after
-  *                              6 HSE oscillator clock cycles.
-  *            @arg @ref RCC_HSE_ON turn ON the HSE oscillator
-  *            @arg @ref RCC_HSE_BYPASS HSE oscillator bypassed with external clock
-  */
-#define __HAL_RCC_HSE_CONFIG(__STATE__)                                     \
-                    do{                                                     \
-                      __IO uint32_t tmpreg;                                 \
-                      if ((__STATE__) == RCC_HSE_ON)                        \
-                      {                                                     \
-                        SET_BIT(RCC->CR, RCC_CR_HSEON);                     \
-                      }                                                     \
-                      else if ((__STATE__) == RCC_HSE_BYPASS)               \
-                      {                                                     \
-                        SET_BIT(RCC->CR, RCC_CR_HSEBYP);                    \
-                        SET_BIT(RCC->CR, RCC_CR_HSEON);                     \
-                      }                                                     \
-                      else                                                  \
-                      {                                                     \
-                        CLEAR_BIT(RCC->CR, RCC_CR_HSEON);                   \
-                        /* Delay after an RCC peripheral clock */           \
-                        tmpreg = READ_BIT(RCC->CR, RCC_CR_HSEON);           \
-                        UNUSED(tmpreg);                                     \
-                        CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);                  \
-                      }                                                     \
-                    }while(0)
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LSE_Configuration LSE Configuration
-  * @{   
-  */
-
-/**
-  * @brief  Macro to configure the External Low Speed oscillator (LSE).
-  * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not supported by this macro. 
-  * @note   As the LSE is in the Backup domain and write access is denied to
-  *         this domain after reset, you have to enable write access using 
-  *         @ref HAL_PWR_EnableBkUpAccess() function before to configure the LSE
-  *         (to be done once after reset).  
-  * @note   After enabling the LSE (RCC_LSE_ON or RCC_LSE_BYPASS), the application
-  *         software should wait on LSERDY flag to be set indicating that LSE clock
-  *         is stable and can be used to clock the RTC.
-  * @param  __STATE__ specifies the new state of the LSE.
-  *         This parameter can be one of the following values:
-  *            @arg @ref RCC_LSE_OFF turn OFF the LSE oscillator, LSERDY flag goes low after
-  *                              6 LSE oscillator clock cycles.
-  *            @arg @ref RCC_LSE_ON turn ON the LSE oscillator.
-  *            @arg @ref RCC_LSE_BYPASS LSE oscillator bypassed with external clock.
-  */
-#define __HAL_RCC_LSE_CONFIG(__STATE__)                                     \
-                    do{                                                     \
-                      if ((__STATE__) == RCC_LSE_ON)                        \
-                      {                                                     \
-                        SET_BIT(RCC->CSR, RCC_CSR_LSEON);                   \
-                      }                                                     \
-                      else if ((__STATE__) == RCC_LSE_OFF)                  \
-                      {                                                     \
-                        CLEAR_BIT(RCC->CSR, RCC_CSR_LSEON);                 \
-                        CLEAR_BIT(RCC->CSR, RCC_CSR_LSEBYP);                \
-                      }                                                     \
-                      else if ((__STATE__) == RCC_LSE_BYPASS)               \
-                      {                                                     \
-                        SET_BIT(RCC->CSR, RCC_CSR_LSEBYP);                  \
-                        SET_BIT(RCC->CSR, RCC_CSR_LSEON);                   \
-                      }                                                     \
-                      else                                                  \
-                      {                                                     \
-                        CLEAR_BIT(RCC->CSR, RCC_CSR_LSEON);                 \
-                        CLEAR_BIT(RCC->CSR, RCC_CSR_LSEBYP);                \
-                      }                                                     \
-                    }while(0)
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_MSI_Configuration  MSI Configuration
-  * @{   
-  */
-
-/** @brief  Macro to enable Internal Multi Speed oscillator (MSI).
-  * @note   After enabling the MSI, the application software should wait on MSIRDY
-  *         flag to be set indicating that MSI clock is stable and can be used as
-  *         system clock source.  
-  */
-#define __HAL_RCC_MSI_ENABLE()  SET_BIT(RCC->CR, RCC_CR_MSION)
-                                       
-/** @brief  Macro to disable the Internal Multi Speed oscillator (MSI).
-  * @note   The MSI is stopped by hardware when entering STOP and STANDBY modes.
-  *         It is used (enabled by hardware) as system clock source after startup
-  *         from Reset, wakeup from STOP and STANDBY mode, or in case of failure
-  *         of the HSE used directly or indirectly as system clock (if the Clock
-  *         Security System CSS is enabled).             
-  * @note   MSI can not be stopped if it is used as system clock source. In this case,
-  *         you have to select another source of the system clock then stop the MSI.  
-  * @note   When the MSI is stopped, MSIRDY flag goes low after 6 MSI oscillator
-  *         clock cycles.  
-  */
-#define __HAL_RCC_MSI_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_MSION)
-
-/** @brief  Macro adjusts Internal Multi Speed oscillator (MSI) calibration value.
-  * @note   The calibration is used to compensate for the variations in voltage
-  *         and temperature that influence the frequency of the internal MSI RC.
-  *         Refer to the Application Note AN3300 for more details on how to  
-  *         calibrate the MSI.
-  * @param  _MSICALIBRATIONVALUE_ specifies the calibration trimming value.
-  *         (default is RCC_MSICALIBRATION_DEFAULT).
-  *         This parameter must be a number between 0 and 0xFF.
-  */  
-#define __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(_MSICALIBRATIONVALUE_) \
-          (MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSITRIM, (uint32_t)(_MSICALIBRATIONVALUE_) << 24))
-          
-/* @brief  Macro to configures the Internal Multi Speed oscillator (MSI) clock range.
-  * @note     After restart from Reset or wakeup from STANDBY, the MSI clock is 
-  *           around 2.097 MHz. The MSI clock does not change after wake-up from
-  *           STOP mode.
-  * @note    The MSI clock range can be modified on the fly.     
-  * @param  _MSIRANGEVALUE_ specifies the MSI Clock range.
-  *   This parameter must be one of the following values:
-  *     @arg @ref RCC_MSIRANGE_0 MSI clock is around 65.536 KHz
-  *     @arg @ref RCC_MSIRANGE_1 MSI clock is around 131.072 KHz
-  *     @arg @ref RCC_MSIRANGE_2 MSI clock is around 262.144 KHz
-  *     @arg @ref RCC_MSIRANGE_3 MSI clock is around 524.288 KHz
-  *     @arg @ref RCC_MSIRANGE_4 MSI clock is around 1.048 MHz
-  *     @arg @ref RCC_MSIRANGE_5 MSI clock is around 2.097 MHz (default after Reset or wake-up from STANDBY)
-  *     @arg @ref RCC_MSIRANGE_6 MSI clock is around 4.194 MHz
-  */  
-#define __HAL_RCC_MSI_RANGE_CONFIG(_MSIRANGEVALUE_) (MODIFY_REG(RCC->ICSCR, \
-          RCC_ICSCR_MSIRANGE, (uint32_t)(_MSIRANGEVALUE_)))
-
-/** @brief  Macro to get the Internal Multi Speed oscillator (MSI) clock range in run mode
-  * @retval MSI clock range.
-  *         This parameter must be one of the following values:
-  *     @arg @ref RCC_MSIRANGE_0 MSI clock is around 65.536 KHz
-  *     @arg @ref RCC_MSIRANGE_1 MSI clock is around 131.072 KHz
-  *     @arg @ref RCC_MSIRANGE_2 MSI clock is around 262.144 KHz
-  *     @arg @ref RCC_MSIRANGE_3 MSI clock is around 524.288 KHz
-  *     @arg @ref RCC_MSIRANGE_4 MSI clock is around 1.048 MHz
-  *     @arg @ref RCC_MSIRANGE_5 MSI clock is around 2.097 MHz (default after Reset or wake-up from STANDBY)
-  *     @arg @ref RCC_MSIRANGE_6 MSI clock is around 4.194 MHz
-  */
-#define __HAL_RCC_GET_MSI_RANGE() (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_MSIRANGE))
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_PLL_Configuration PLL Configuration
-  * @{   
-  */
-
-/** @brief Macro to enable the main PLL.
-  * @note   After enabling the main PLL, the application software should wait on 
-  *         PLLRDY flag to be set indicating that PLL clock is stable and can
-  *         be used as system clock source.
-  * @note   The main PLL is disabled by hardware when entering STOP and STANDBY modes.
-  */
-#define __HAL_RCC_PLL_ENABLE() SET_BIT(RCC->CR, RCC_CR_PLLON)
-
-/** @brief Macro to disable the main PLL.
-  * @note   The main PLL can not be disabled if it is used as system clock source
-  */
-#define __HAL_RCC_PLL_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_PLLON)
-
-/** @brief Macro to configure the main PLL clock source, multiplication and division factors.
-  * @note   This function must be used only when the main PLL is disabled.
-  *  
-  * @param  __RCC_PLLSOURCE__ specifies the PLL entry clock source.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_PLLSOURCE_HSI HSI oscillator clock selected as PLL clock entry
-  *            @arg @ref RCC_PLLSOURCE_HSE HSE oscillator clock selected as PLL clock entry
-  * @param  __PLLMUL__ specifies the multiplication factor for PLL VCO output clock
-  *          This parameter can be one of the following values:
-  *             @arg @ref RCC_PLL_MUL3   PLLVCO = PLL clock entry x 3
-  *             @arg @ref RCC_PLL_MUL4   PLLVCO = PLL clock entry x 4
-  *             @arg @ref RCC_PLL_MUL6   PLLVCO = PLL clock entry x 6
-  *             @arg @ref RCC_PLL_MUL8   PLLVCO = PLL clock entry x 8
-  *             @arg @ref RCC_PLL_MUL12  PLLVCO = PLL clock entry x 12
-  *             @arg @ref RCC_PLL_MUL16  PLLVCO = PLL clock entry x 16
-  *             @arg @ref RCC_PLL_MUL24  PLLVCO = PLL clock entry x 24
-  *             @arg @ref RCC_PLL_MUL32  PLLVCO = PLL clock entry x 32
-  *             @arg @ref RCC_PLL_MUL48  PLLVCO = PLL clock entry x 48
-  * @note The PLL VCO clock frequency must not exceed 96 MHz when the product is in
-  *          Range 1, 48 MHz when the product is in Range 2 and 24 MHz when the product is
-  *          in Range 3.
-  *
-  * @param  __PLLDIV__ specifies the division factor for PLL VCO input clock
-  *          This parameter can be one of the following values:
-  *             @arg @ref RCC_PLL_DIV2 PLL clock output = PLLVCO / 2
-  *             @arg @ref RCC_PLL_DIV3 PLL clock output = PLLVCO / 3
-  *             @arg @ref RCC_PLL_DIV4 PLL clock output = PLLVCO / 4
-  *   
-  */
-#define __HAL_RCC_PLL_CONFIG(__RCC_PLLSOURCE__, __PLLMUL__, __PLLDIV__)\
-          MODIFY_REG(RCC->CFGR, (RCC_CFGR_PLLSRC|RCC_CFGR_PLLMUL|RCC_CFGR_PLLDIV),((__RCC_PLLSOURCE__) | (__PLLMUL__) | (__PLLDIV__)))
-
-/** @brief  Get oscillator clock selected as PLL input clock
-  * @retval The clock source used for PLL entry. The returned value can be one
-  *         of the following:
-  *             @arg @ref RCC_PLLSOURCE_HSI HSI oscillator clock selected as PLL input clock
-  *             @arg @ref RCC_PLLSOURCE_HSE HSE oscillator clock selected as PLL input clock
-  */
-#define __HAL_RCC_GET_PLL_OSCSOURCE() ((uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC)))
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_Get_Clock_source Get Clock source
-  * @{   
-  */
-
-/**
-  * @brief  Macro to configure the system clock source.
-  * @param  __SYSCLKSOURCE__ specifies the system clock source.
-  *          This parameter can be one of the following values:
-  *              @arg @ref RCC_SYSCLKSOURCE_MSI MSI oscillator is used as system clock source.
-  *              @arg @ref RCC_SYSCLKSOURCE_HSI HSI oscillator is used as system clock source.
-  *              @arg @ref RCC_SYSCLKSOURCE_HSE HSE oscillator is used as system clock source.
-  *              @arg @ref RCC_SYSCLKSOURCE_PLLCLK PLL output is used as system clock source.
-  */
-#define __HAL_RCC_SYSCLK_CONFIG(__SYSCLKSOURCE__) \
-                  MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, (__SYSCLKSOURCE__))
-
-/** @brief  Macro to get the clock source used as system clock.
-  * @retval The clock source used as system clock. The returned value can be one
-  *         of the following:
-  *             @arg @ref RCC_SYSCLKSOURCE_STATUS_MSI MSI used as system clock
-  *             @arg @ref RCC_SYSCLKSOURCE_STATUS_HSI HSI used as system clock
-  *             @arg @ref RCC_SYSCLKSOURCE_STATUS_HSE HSE used as system clock
-  *             @arg @ref RCC_SYSCLKSOURCE_STATUS_PLLCLK PLL used as system clock
-  */
-#define __HAL_RCC_GET_SYSCLK_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR,RCC_CFGR_SWS)))
-
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_MCOx_Clock_Config RCC Extended MCOx Clock Config
-  * @{   
-  */ 
-
-/** @brief  Macro to configure the MCO clock.
-  * @param  __MCOCLKSOURCE__ specifies the MCO clock source.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_MCO1SOURCE_NOCLOCK      No clock selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_SYSCLK       System Clock selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_HSI          HSI oscillator clock selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_MSI          MSI oscillator clock selected as MCO clock 
-  *            @arg @ref RCC_MCO1SOURCE_HSE HSE oscillator clock selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK       PLL clock selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_LSI          LSI clock selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_LSE          LSE clock selected as MCO clock
-  @if STM32L052xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 clock selected as MCO clock
-  @elseif STM32L053xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 clock selected as MCO clock
-  @elseif STM32L062xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 clock selected as MCO clock
-  @elseif STM32L063xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 clock selected as MCO clock
-  @elseif STM32L072xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 clock selected as MCO clock
-  @elseif STM32L073xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 clock selected as MCO clock
-  @elseif STM32L082xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 clock selected as MCO clock
-  @elseif STM32L083xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 clock selected as MCO clock
-  @endif
-  * @param  __MCODIV__ specifies the MCO clock prescaler.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_MCODIV_1   MCO clock source is divided by 1
-  *            @arg @ref RCC_MCODIV_2   MCO clock source is divided by 2
-  *            @arg @ref RCC_MCODIV_4   MCO clock source is divided by 4
-  *            @arg @ref RCC_MCODIV_8   MCO clock source is divided by 8
-  *            @arg @ref RCC_MCODIV_16  MCO clock source is divided by 16
-  */
-#define __HAL_RCC_MCO1_CONFIG(__MCOCLKSOURCE__, __MCODIV__) \
-                 MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCOSEL | RCC_CFGR_MCO_PRE), ((__MCOCLKSOURCE__) | (__MCODIV__)))
-
-/**
-  * @}
-  */
-
-  /** @defgroup RCC_RTC_Clock_Configuration RCC RTC Clock Configuration
-  * @{   
-  */
-
-/** @brief Macro to configure the RTC clock (RTCCLK).
-  * @note   As the RTC clock configuration bits are in the Backup domain and write
-  *         access is denied to this domain after reset, you have to enable write
-  *         access using the Power Backup Access macro before to configure
-  *         the RTC clock source (to be done once after reset).    
-  * @note   Once the RTC clock is configured it cannot be changed unless the  
-  *         Backup domain is reset using @ref __HAL_RCC_BACKUPRESET_FORCE() macro, or by
-  *         a Power On Reset (POR).
-  * @note   RTC prescaler cannot be modified if HSE is enabled (HSEON = 1).
-  *
-  * @param  __RTC_CLKSOURCE__ specifies the RTC clock source.
-  *          This parameter can be one of the following values:
-  *             @arg @ref RCC_RTCCLKSOURCE_NO_CLK No clock selected as RTC clock
-  *             @arg @ref RCC_RTCCLKSOURCE_LSE LSE selected as RTC clock
-  *             @arg @ref RCC_RTCCLKSOURCE_LSI LSI selected as RTC clock
-  *             @arg @ref RCC_RTCCLKSOURCE_HSE_DIV2 HSE divided by 2 selected as RTC clock
-  *             @arg @ref RCC_RTCCLKSOURCE_HSE_DIV4 HSE divided by 4 selected as RTC clock
-  *             @arg @ref RCC_RTCCLKSOURCE_HSE_DIV8 HSE divided by 8 selected as RTC clock
-  *             @arg @ref RCC_RTCCLKSOURCE_HSE_DIV16 HSE divided by 16 selected as RTC clock
-  * @note   If the LSE or LSI is used as RTC clock source, the RTC continues to
-  *         work in STOP and STANDBY modes, and can be used as wakeup source.
-  *         However, when the HSE clock is used as RTC clock source, the RTC
-  *         cannot be used in STOP and STANDBY modes.    
-  * @note   The maximum input clock frequency for RTC is 1MHz (when using HSE as
-  *         RTC clock source).
-  */
-#define __HAL_RCC_RTC_CLKPRESCALER(__RTC_CLKSOURCE__) do { \
-            if(((__RTC_CLKSOURCE__) & RCC_CSR_RTCSEL_HSE) == RCC_CSR_RTCSEL_HSE)          \
-            {                                                                             \
-              MODIFY_REG(RCC->CR, RCC_CR_RTCPRE, ((__RTC_CLKSOURCE__) & RCC_CR_RTCPRE));  \
-            }                                                                             \
-          } while (0)
-
-#define __HAL_RCC_RTC_CONFIG(__RTC_CLKSOURCE__) do { \
-                                      __HAL_RCC_RTC_CLKPRESCALER(__RTC_CLKSOURCE__);      \
-                                      RCC->CSR |= ((__RTC_CLKSOURCE__) & RCC_CSR_RTCSEL); \
-                                    } while (0)
-                                                   
-/** @brief Macro to get the RTC clock source.
-  * @retval The clock source can be one of the following values:
-  *            @arg @ref RCC_RTCCLKSOURCE_NO_CLK No clock selected as RTC clock
-  *            @arg @ref RCC_RTCCLKSOURCE_LSE LSE selected as RTC clock
-  *            @arg @ref RCC_RTCCLKSOURCE_LSI LSI selected as RTC clock
-  *            @arg @ref RCC_RTCCLKSOURCE_HSE_DIVX HSE divided by X selected as RTC clock (X can be retrieved thanks to @ref __HAL_RCC_GET_RTC_HSE_PRESCALER()
-  */
-#define __HAL_RCC_GET_RTC_SOURCE() (READ_BIT(RCC->CSR, RCC_CSR_RTCSEL))
-
-/**
-  * @brief   Get the RTC and LCD HSE clock divider (RTCCLK / LCDCLK).
-  *
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref RCC_RTC_HSE_DIV_2  HSE divided by 2 selected as RTC clock
-  *         @arg @ref RCC_RTC_HSE_DIV_4  HSE divided by 4 selected as RTC clock
-  *         @arg @ref RCC_RTC_HSE_DIV_8  HSE divided by 8 selected as RTC clock
-  *         @arg @ref RCC_RTC_HSE_DIV_16 HSE divided by 16 selected as RTC clock
-  *
-  */
-#define  __HAL_RCC_GET_RTC_HSE_PRESCALER() ((uint32_t)(READ_BIT(RCC->CR, RCC_CR_RTCPRE)))                                                   
-
-/** @brief Macro to enable the the RTC clock.
-  * @note   These macros must be used only after the RTC clock source was selected.
-  */
-#define __HAL_RCC_RTC_ENABLE() SET_BIT(RCC->CSR, RCC_CSR_RTCEN)
-
-/** @brief Macro to disable the the RTC clock.
-  * @note  These macros must be used only after the RTC clock source was selected.
-  */
-#define __HAL_RCC_RTC_DISABLE() CLEAR_BIT(RCC->CSR, RCC_CSR_RTCEN)
-
-/** @brief  Macro to force the Backup domain reset.
-  * @note   This function resets the RTC peripheral (including the backup registers)
-  *         and the RTC clock source selection in RCC_CSR register.
-  * @note   The BKPSRAM is not affected by this reset.   
-  */
-#define __HAL_RCC_BACKUPRESET_FORCE()  SET_BIT(RCC->CSR, RCC_CSR_RTCRST) 
-
-/** @brief  Macros to release the Backup domain reset.
-  */
-#define __HAL_RCC_BACKUPRESET_RELEASE() CLEAR_BIT(RCC->CSR, RCC_CSR_RTCRST) 
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_Flags_Interrupts_Management Flags Interrupts Management
-  * @brief macros to manage the specified RCC Flags and interrupts.
-  * @{
-  */
-
-/** @brief Enable RCC interrupt.
-  * @note   The CSS interrupt doesn't have an enable bit; once the CSS is enabled
-  *         and if the HSE clock fails, the CSS interrupt occurs and an NMI is
-  *         automatically generated. The NMI will be executed indefinitely, and 
-  *         since NMI has higher priority than any other IRQ (and main program)
-  *         the application will be stacked in the NMI ISR unless the CSS interrupt
-  *         pending bit is cleared.            
-  * @param  __INTERRUPT__ specifies the RCC interrupt sources to be enabled.
-  *          This parameter can be any combination of the following values:
-  *            @arg @ref RCC_IT_LSIRDY LSI ready interrupt
-  *            @arg @ref RCC_IT_LSERDY LSE ready interrupt
-  *            @arg @ref RCC_IT_HSIRDY HSI ready interrupt
-  *            @arg @ref RCC_IT_HSERDY HSE ready interrupt
-  *            @arg @ref RCC_IT_PLLRDY main PLL ready interrupt
-  *            @arg @ref RCC_IT_MSIRDY MSI ready interrupt
-  *            @arg @ref RCC_IT_LSECSS LSE CSS interrupt
-  *            @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt (not available on all devices)   
-  */
-#define __HAL_RCC_ENABLE_IT(__INTERRUPT__) SET_BIT(RCC->CIER, (__INTERRUPT__))
-
-/** @brief Disable RCC interrupt.
-  * @note   The CSS interrupt doesn't have an enable bit; once the CSS is enabled
-  *         and if the HSE clock fails, the CSS interrupt occurs and an NMI is
-  *         automatically generated. The NMI will be executed indefinitely, and 
-  *         since NMI has higher priority than any other IRQ (and main program)
-  *         the application will be stacked in the NMI ISR unless the CSS interrupt
-  *         pending bit is cleared.            
-  * @param  __INTERRUPT__ specifies the RCC interrupt sources to be disabled.
-  *          This parameter can be any combination of the following values:
-  *            @arg @ref RCC_IT_LSIRDY LSI ready interrupt
-  *            @arg @ref RCC_IT_LSERDY LSE ready interrupt
-  *            @arg @ref RCC_IT_HSIRDY HSI ready interrupt
-  *            @arg @ref RCC_IT_HSERDY HSE ready interrupt
-  *            @arg @ref RCC_IT_PLLRDY main PLL ready interrupt
-  *            @arg @ref RCC_IT_MSIRDY MSI ready interrupt
-  *            @arg @ref RCC_IT_LSECSS LSE CSS interrupt
-  *            @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt (not available on all devices)   
-  */
-#define __HAL_RCC_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(RCC->CIER, (__INTERRUPT__))
-
-/** @brief Clear the RCC's interrupt pending bits.
-  * @param  __INTERRUPT__ specifies the interrupt pending bit to clear.
-  *          This parameter can be any combination of the following values:
-  *            @arg @ref RCC_IT_LSIRDY LSI ready interrupt.
-  *            @arg @ref RCC_IT_LSERDY LSE ready interrupt.
-  *            @arg @ref RCC_IT_HSIRDY HSI ready interrupt.
-  *            @arg @ref RCC_IT_HSERDY HSE ready interrupt.
-  *            @arg @ref RCC_IT_PLLRDY Main PLL ready interrupt.
-  *            @arg @ref RCC_IT_MSIRDY MSI ready interrupt
-  *            @arg @ref RCC_IT_LSECSS LSE CSS interrupt
-  *            @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt (not available on all devices)  
-  *            @arg @ref RCC_IT_CSS Clock Security System interrupt
-  */
-#define __HAL_RCC_CLEAR_IT(__INTERRUPT__) (RCC->CICR = (__INTERRUPT__))
-
-/** @brief  Check the RCC's interrupt has occurred or not.
-  * @param  __INTERRUPT__ specifies the RCC interrupt source to check.
-  *         This parameter can be one of the following values:
-  *     @arg @ref RCC_IT_LSIRDY LSI ready interrupt
-  *     @arg @ref RCC_IT_LSERDY LSE ready interrupt  
-  *     @arg @ref RCC_IT_HSIRDY HSI ready interrupt
-  *     @arg @ref RCC_IT_HSERDY HSE ready interrupt
-  *     @arg @ref RCC_IT_PLLRDY PLL ready interrupt
-  *     @arg @ref RCC_IT_MSIRDY MSI ready interrupt
-  *     @arg @ref RCC_IT_LSECSS LSE CSS interrupt 
-  *     @arg @ref RCC_IT_CSS Clock Security System interrupt
-  * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
-  */
-#define __HAL_RCC_GET_IT(__INTERRUPT__) ((RCC->CIFR & (__INTERRUPT__)) == (__INTERRUPT__))
-
-
-/** @brief Set RMVF bit to clear the reset flags.
-  *         The reset flags are RCC_FLAG_PINRST, RCC_FLAG_PORRST, RCC_FLAG_SFTRST,
-  *         RCC_FLAG_OBLRST, RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST, RCC_FLAG_LPWRRST
-  */
-#define __HAL_RCC_CLEAR_RESET_FLAGS() (RCC->CSR |= RCC_CSR_RMVF)
-
-/** @brief  Check RCC flag is set or not.
-  * @param  __FLAG__ specifies the flag to check.
-  *         This parameter can be one of the following values:
-  *     @arg @ref RCC_FLAG_HSIRDY HSI oscillator clock ready
-  *     @arg @ref RCC_FLAG_HSI48RDY HSI48 oscillator clock ready (not available on all devices)
-  *     @arg @ref RCC_FLAG_HSIDIV HSI16 divider flag
-  *     @arg @ref RCC_FLAG_MSIRDY MSI oscillator clock ready  
-  *     @arg @ref RCC_FLAG_HSERDY HSE oscillator clock ready
-  *     @arg @ref RCC_FLAG_PLLRDY PLL clock ready
-  *     @arg @ref RCC_FLAG_LSECSS LSE oscillator clock CSS detected  
-  *     @arg @ref RCC_FLAG_LSERDY LSE oscillator clock ready
-  *     @arg @ref RCC_FLAG_FWRST Firewall reset
-  *     @arg @ref RCC_FLAG_LSIRDY LSI oscillator clock ready
-  *     @arg @ref RCC_FLAG_OBLRST Option Byte Loader (OBL) reset 
-  *     @arg @ref RCC_FLAG_PINRST Pin reset
-  *     @arg @ref RCC_FLAG_PORRST POR/PDR reset
-  *     @arg @ref RCC_FLAG_SFTRST Software reset
-  *     @arg @ref RCC_FLAG_IWDGRST Independent Watchdog reset
-  *     @arg @ref RCC_FLAG_WWDGRST Window Watchdog reset
-  *     @arg @ref RCC_FLAG_LPWRRST Low Power reset
-  * @retval The new state of __FLAG__ (TRUE or FALSE).
-  */
-#if defined(RCC_HSI48_SUPPORT)
-#define __HAL_RCC_GET_FLAG(__FLAG__) (((((((((__FLAG__) >> 5) == CR_REG_INDEX)? RCC->CR :((((__FLAG__) >> 5) == CSR_REG_INDEX) ? RCC->CSR :RCC->CRRCR)))) & ((uint32_t)1 << ((__FLAG__) & RCC_FLAG_MASK))) != 0 ) ? 1 : 0 )  
-#else
-#define __HAL_RCC_GET_FLAG(__FLAG__) (((((((((__FLAG__) >> 5) == CR_REG_INDEX)? RCC->CR : RCC->CSR))) & ((uint32_t)1 << ((__FLAG__) & RCC_FLAG_MASK))) != 0 ) ? 1 : 0 )  
-#endif /* RCC_HSI48_SUPPORT */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Include RCC HAL Extension module */
-#include "stm32l0xx_hal_rcc_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup RCC_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup RCC_Exported_Functions_Group1
-  * @{
-  */
-
-/* Initialization and de-initialization functions  ******************************/
-void              HAL_RCC_DeInit(void);
-HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct);
-HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency);
-
-/**
-  * @}
-  */
-
-/** @addtogroup RCC_Exported_Functions_Group2
-  * @{
-  */
-
-/* Peripheral Control functions  ************************************************/
-void              HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv);
-#if defined(RCC_HSECSS_SUPPORT)
-void              HAL_RCC_EnableCSS(void);
-/* CSS NMI IRQ handler */
-void              HAL_RCC_NMI_IRQHandler(void);
-/* User Callbacks in non blocking mode (IT mode) */
-void              HAL_RCC_CSSCallback(void);
-#endif /* RCC_HSECSS_SUPPORT */
-uint32_t          HAL_RCC_GetSysClockFreq(void);
-uint32_t          HAL_RCC_GetHCLKFreq(void);
-uint32_t          HAL_RCC_GetPCLK1Freq(void);
-uint32_t          HAL_RCC_GetPCLK2Freq(void);
-void              HAL_RCC_GetOscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct);
-void              HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_RCC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h
deleted file mode 100755
index 73a1ce4c..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h
+++ /dev/null
@@ -1,2011 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_rcc_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of RCC HAL Extension module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_RCC_EX_H
-#define __STM32L0xx_HAL_RCC_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup RCCEx
-  * @{
-  */ 
-
-/** @addtogroup RCCEx_Private_Constants
- * @{
- */
-
-
-#if defined(CRS)
-/* CRS IT Error Mask */
-#define  RCC_CRS_IT_ERROR_MASK  ((uint32_t)(RCC_CRS_IT_TRIMOVF | RCC_CRS_IT_SYNCERR | RCC_CRS_IT_SYNCMISS))
-
-/* CRS Flag Error Mask */
-#define RCC_CRS_FLAG_ERROR_MASK ((uint32_t)(RCC_CRS_FLAG_TRIMOVF | RCC_CRS_FLAG_SYNCERR | RCC_CRS_FLAG_SYNCMISS))
-
-#endif /* CRS */
-/**
-  * @}
-  */
-
-/** @addtogroup RCCEx_Private_Macros
-  * @{
-  */
-#if defined (STM32L052xx) || defined(STM32L062xx)
-#define IS_RCC_PERIPHCLOCK(__CLK__) ((__CLK__) <= (RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_LPUART1 | \
-                                                 RCC_PERIPHCLK_I2C1   | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_RTC       |  \
-                                                 RCC_PERIPHCLK_USB | RCC_PERIPHCLK_LPTIM1))
-#elif defined (STM32L053xx) || defined(STM32L063xx)
-#define IS_RCC_PERIPHCLOCK(__CLK__) ((__CLK__) <= (RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_LPUART1 | \
-                                                 RCC_PERIPHCLK_I2C1   | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_RTC       |  \
-                                                 RCC_PERIPHCLK_USB | RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LCD))
-#elif defined (STM32L072xx) || defined(STM32L082xx)
-#define IS_RCC_PERIPHCLOCK(__CLK__) ((__CLK__) <= (RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_LPUART1 | \
-                                                 RCC_PERIPHCLK_I2C1   | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_RTC       |  \
-                                                 RCC_PERIPHCLK_USB | RCC_PERIPHCLK_LPTIM1  | RCC_PERIPHCLK_I2C3 ))
-#elif defined (STM32L073xx) || defined(STM32L083xx)
-#define IS_RCC_PERIPHCLOCK(__CLK__) ((__CLK__) <= (RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_LPUART1 | \
-                                                 RCC_PERIPHCLK_I2C1   | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_RTC  |  \
-                                                 RCC_PERIPHCLK_USB | RCC_PERIPHCLK_LPTIM1  | RCC_PERIPHCLK_I2C3 | \
-                                                 RCC_PERIPHCLK_LCD))
-#endif
-
-#if defined(STM32L011xx) || defined(STM32L021xx) || defined(STM32L031xx) || defined(STM32L041xx)
-#define IS_RCC_PERIPHCLOCK(__CLK__) ((__CLK__) <= ( RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_LPUART1 | \
-                                                  RCC_PERIPHCLK_I2C1   |  RCC_PERIPHCLK_RTC    | \
-                                                  RCC_PERIPHCLK_LPTIM1))
-#elif defined(STM32L051xx) || defined(STM32L061xx)
-#define IS_RCC_PERIPHCLOCK(__CLK__) ((__CLK__) <= (RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_LPUART1 | \
-                                                 RCC_PERIPHCLK_I2C1   | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_RTC       |  \
-                                                 RCC_PERIPHCLK_LPTIM1))
-#elif defined(STM32L071xx) || defined(STM32L081xx)
-#define IS_RCC_PERIPHCLOCK(__CLK__) ((__CLK__) <= (RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_LPUART1 | \
-                                                 RCC_PERIPHCLK_I2C1   | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_RTC       |  \
-                                                 RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_I2C3))                               
-#endif
-
-#if defined (RCC_CCIPR_USART1SEL)
-#define IS_RCC_USART1CLKSOURCE(__SOURCE__)  (((__SOURCE__) == RCC_USART1CLKSOURCE_PCLK2)  || \
-                                             ((__SOURCE__) == RCC_USART1CLKSOURCE_SYSCLK) || \
-                                             ((__SOURCE__) == RCC_USART1CLKSOURCE_LSE)    || \
-                                             ((__SOURCE__) == RCC_USART1CLKSOURCE_HSI))
-#endif /* RCC_CCIPR_USART1SEL */
-
-#define IS_RCC_USART2CLKSOURCE(__SOURCE__)  (((__SOURCE__) == RCC_USART2CLKSOURCE_PCLK1)  || \
-                                             ((__SOURCE__) == RCC_USART2CLKSOURCE_SYSCLK) || \
-                                             ((__SOURCE__) == RCC_USART2CLKSOURCE_LSE)    || \
-                                             ((__SOURCE__) == RCC_USART2CLKSOURCE_HSI))
-    
-#define IS_RCC_LPUART1CLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_LPUART1CLKSOURCE_PCLK1)  || \
-                                             ((__SOURCE__) == RCC_LPUART1CLKSOURCE_SYSCLK) || \
-                                             ((__SOURCE__) == RCC_LPUART1CLKSOURCE_LSE)    || \
-                                             ((__SOURCE__) == RCC_LPUART1CLKSOURCE_HSI))
-
-#define IS_RCC_I2C1CLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_I2C1CLKSOURCE_PCLK1) || \
-                                          ((__SOURCE__) == RCC_I2C1CLKSOURCE_SYSCLK)|| \
-                                          ((__SOURCE__) == RCC_I2C1CLKSOURCE_HSI))
-                                          
-#if defined(RCC_CCIPR_I2C3SEL)  
-#define IS_RCC_I2C3CLKSOURCE(__SOURCE__)  (((__SOURCE__) == RCC_I2C3CLKSOURCE_PCLK1) || \
-                                           ((__SOURCE__) == RCC_I2C3CLKSOURCE_SYSCLK)|| \
-                                           ((__SOURCE__) == RCC_I2C3CLKSOURCE_HSI))
-#endif /* RCC_CCIPR_I2C3SEL */
-                                           
-#if defined(USB)
-#define IS_RCC_USBCLKSOURCE(__SOURCE__)  (((__SOURCE__) == RCC_USBCLKSOURCE_HSI48) || \
-                                          ((__SOURCE__) == RCC_USBCLKSOURCE_PLL))
-#endif /* USB */
-
-#if defined(RNG)
-#define IS_RCC_RNGCLKSOURCE(_SOURCE_)  (((_SOURCE_) == RCC_RNGCLKSOURCE_HSI48) || \
-                                      ((_SOURCE_) == RCC_RNGCLKSOURCE_PLLCLK))
-#endif /* RNG */
-                                      
-#if defined(RCC_CCIPR_HSI48SEL)
-#define IS_RCC_HSI48MCLKSOURCE(__HSI48MCLK__) (((__HSI48MCLK__) == RCC_HSI48M_PLL) || ((__HSI48MCLK__) == RCC_HSI48M_HSI48))
-#endif /* RCC_CCIPR_HSI48SEL */
-                                          
-#define IS_RCC_LPTIMCLK(__LPTIMCLK_)     (((__LPTIMCLK_) == RCC_LPTIM1CLKSOURCE_PCLK) || \
-                                          ((__LPTIMCLK_) == RCC_LPTIM1CLKSOURCE_LSI)  || \
-                                          ((__LPTIMCLK_) == RCC_LPTIM1CLKSOURCE_HSI)  || \
-                                          ((__LPTIMCLK_) == RCC_LPTIM1CLKSOURCE_LSE))
-
-#define IS_RCC_STOPWAKEUP_CLOCK(__SOURCE__) (((__SOURCE__) == RCC_STOP_WAKEUPCLOCK_MSI) || \
-                                             ((__SOURCE__) == RCC_STOP_WAKEUPCLOCK_HSI))
-
-#define IS_RCC_LSE_DRIVE(__DRIVE__) (((__DRIVE__) == RCC_LSEDRIVE_LOW)        || ((__SOURCE__) == RCC_LSEDRIVE_MEDIUMLOW) || \
-                                     ((__DRIVE__) == RCC_LSEDRIVE_MEDIUMHIGH) || ((__SOURCE__) == RCC_LSEDRIVE_HIGH))
-
-#if defined(CRS)
-
-#define IS_RCC_CRS_SYNC_SOURCE(_SOURCE_) (((_SOURCE_) == RCC_CRS_SYNC_SOURCE_GPIO) || \
-                                          ((_SOURCE_) == RCC_CRS_SYNC_SOURCE_LSE)  || \
-                                          ((_SOURCE_) == RCC_CRS_SYNC_SOURCE_USB))
-#define IS_RCC_CRS_SYNC_DIV(_DIV_) (((_DIV_) == RCC_CRS_SYNC_DIV1)  || ((_DIV_) == RCC_CRS_SYNC_DIV2)  || \
-                                    ((_DIV_) == RCC_CRS_SYNC_DIV4)  || ((_DIV_) == RCC_CRS_SYNC_DIV8)  || \
-                                    ((_DIV_) == RCC_CRS_SYNC_DIV16) || ((_DIV_) == RCC_CRS_SYNC_DIV32) || \
-                                    ((_DIV_) == RCC_CRS_SYNC_DIV64) || ((_DIV_) == RCC_CRS_SYNC_DIV128))
-#define IS_RCC_CRS_SYNC_POLARITY(_POLARITY_) (((_POLARITY_) == RCC_CRS_SYNC_POLARITY_RISING) || \
-                                              ((_POLARITY_) == RCC_CRS_SYNC_POLARITY_FALLING))
-#define IS_RCC_CRS_RELOADVALUE(_VALUE_) (((_VALUE_) <= 0xFFFF))
-#define IS_RCC_CRS_ERRORLIMIT(_VALUE_) (((_VALUE_) <= 0xFF))
-#define IS_RCC_CRS_HSI48CALIBRATION(_VALUE_) (((_VALUE_) <= 0x3F))
-#define IS_RCC_CRS_FREQERRORDIR(_DIR_) (((_DIR_) == RCC_CRS_FREQERRORDIR_UP) || \
-                                        ((_DIR_) == RCC_CRS_FREQERRORDIR_DOWN))
-#endif /* CRS */
-/**
-  * @}
-  */
-
-/* Exported types ------------------------------------------------------------*/ 
-
-/** @defgroup RCCEx_Exported_Types RCCEx Exported Types
-  * @{
-  */
-
-/** 
-  * @brief  RCC extended clocks structure definition  
-  */
-typedef struct
-{
-  uint32_t PeriphClockSelection;                /*!< The Extended Clock to be configured.
-                                      This parameter can be a value of @ref RCCEx_Periph_Clock_Selection */
-
-  uint32_t RTCClockSelection;         /*!< specifies the RTC clock source.
-                                       This parameter can be a value of @ref RCC_RTC_LCD_Clock_Source */
-
-#if defined(LCD)
-
-  uint32_t LCDClockSelection;         /*!< specifies the LCD clock source.
-                                       This parameter can be a value of @ref RCC_RTC_LCD_Clock_Source */
-
-#endif /* LCD */
-#if defined(RCC_CCIPR_USART1SEL)
-  uint32_t Usart1ClockSelection;   /*!< USART1 clock source      
-                                        This parameter can be a value of @ref RCCEx_USART1_Clock_Source */
-#endif /* RCC_CCIPR_USART1SEL */
-  uint32_t Usart2ClockSelection;   /*!< USART2 clock source      
-                                        This parameter can be a value of @ref RCCEx_USART2_Clock_Source */
-                                   
-  uint32_t Lpuart1ClockSelection;  /*!< LPUART1 clock source      
-                                        This parameter can be a value of @ref RCCEx_LPUART1_Clock_Source */
-                                   
-  uint32_t I2c1ClockSelection;     /*!< I2C1 clock source      
-                                        This parameter can be a value of @ref RCCEx_I2C1_Clock_Source */
-                                   
-#if defined(RCC_CCIPR_I2C3SEL)
-  uint32_t I2c3ClockSelection;     /*!< I2C3 clock source      
-                                        This parameter can be a value of @ref RCCEx_I2C3_Clock_Source */
-#endif /* RCC_CCIPR_I2C3SEL */
-  uint32_t LptimClockSelection;    /*!< LPTIM1 clock source
-                                        This parameter can be a value of @ref RCCEx_LPTIM1_Clock_Source */
-#if defined(USB)
-  uint32_t UsbClockSelection;      /*!< Specifies USB and RNG Clock  Selection
-                                        This parameter can be a value of @ref RCCEx_USB_Clock_Source */
-#endif /* USB */
-} RCC_PeriphCLKInitTypeDef;
-
-#if defined (CRS)
-/** 
-  * @brief RCC_CRS Init structure definition  
-  */
-typedef struct
-{
-  uint32_t Prescaler;             /*!< Specifies the division factor of the SYNC signal.
-                                     This parameter can be a value of @ref RCCEx_CRS_SynchroDivider */
-
-  uint32_t Source;                /*!< Specifies the SYNC signal source.
-                                     This parameter can be a value of @ref RCCEx_CRS_SynchroSource */
-
-  uint32_t Polarity;              /*!< Specifies the input polarity for the SYNC signal source.
-                                     This parameter can be a value of @ref RCCEx_CRS_SynchroPolarity */
-
-  uint32_t ReloadValue;           /*!< Specifies the value to be loaded in the frequency error counter with each SYNC event.
-                                      It can be calculated in using macro @ref __HAL_RCC_CRS_RELOADVALUE_CALCULATE(__FTARGET__, __FSYNC__)
-                                     This parameter must be a number between 0 and 0xFFFF or a value of @ref RCCEx_CRS_ReloadValueDefault .*/
-
-  uint32_t ErrorLimitValue;       /*!< Specifies the value to be used to evaluate the captured frequency error value.
-                                     This parameter must be a number between 0 and 0xFF or a value of @ref RCCEx_CRS_ErrorLimitDefault */
-
-  uint32_t HSI48CalibrationValue; /*!< Specifies a user-programmable trimming value to the HSI48 oscillator.
-                                     This parameter must be a number between 0 and 0x3F or a value of @ref RCCEx_CRS_HSI48CalibrationDefault */
-
-}RCC_CRSInitTypeDef;
-
-/** 
-  * @brief RCC_CRS Synchronization structure definition  
-  */
-typedef struct
-{
-  uint32_t ReloadValue;           /*!< Specifies the value loaded in the Counter reload value.
-                                     This parameter must be a number between 0 and 0xFFFF */
-
-  uint32_t HSI48CalibrationValue; /*!< Specifies value loaded in HSI48 oscillator smooth trimming.
-                                     This parameter must be a number between 0 and 0x3F */
-
-  uint32_t FreqErrorCapture;      /*!< Specifies the value loaded in the .FECAP, the frequency error counter 
-                                                                    value latched in the time of the last SYNC event.
-                                    This parameter must be a number between 0 and 0xFFFF */
-
-  uint32_t FreqErrorDirection;    /*!< Specifies the value loaded in the .FEDIR, the counting direction of the 
-                                                                    frequency error counter latched in the time of the last SYNC event. 
-                                                                    It shows whether the actual frequency is below or above the target.
-                                    This parameter must be a value of @ref RCCEx_CRS_FreqErrorDirection*/
-
-}RCC_CRSSynchroInfoTypeDef;
-
-#endif /* CRS */
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup RCCEx_Exported_Constants RCCEx Exported Constants
-  * @{
-  */
-
-
-/** @defgroup RCCEx_EXTI_LINE_LSECSS  RCC LSE CSS external interrupt line
-  * @{
-  */
-#define RCC_EXTI_LINE_LSECSS             (EXTI_IMR_IM19)         /*!< External interrupt line 19 connected to the LSE CSS EXTI Line */
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_Periph_Clock_Selection  RCCEx Periph Clock Selection
-  * @{
-  */
-#if defined(RCC_CCIPR_USART1SEL)
-#define RCC_PERIPHCLK_USART1           ((uint32_t)0x00000001)
-#endif /* RCC_CCIPR_USART1SEL */
-#define RCC_PERIPHCLK_USART2           ((uint32_t)0x00000002)
-#define RCC_PERIPHCLK_LPUART1          ((uint32_t)0x00000004)
-#define RCC_PERIPHCLK_I2C1             ((uint32_t)0x00000008)
-#define RCC_PERIPHCLK_I2C2             ((uint32_t)0x00000010)
-#define RCC_PERIPHCLK_RTC              ((uint32_t)0x00000020)
-#if defined(USB)
-#define RCC_PERIPHCLK_USB              ((uint32_t)0x00000040)
-#endif /* USB */
-#define RCC_PERIPHCLK_LPTIM1           ((uint32_t)0x00000080)
-#if defined(LCD)
-#define RCC_PERIPHCLK_LCD              ((uint32_t)0x00000800)
-#endif /* LCD */
-#if defined(RCC_CCIPR_I2C3SEL)
-#define RCC_PERIPHCLK_I2C3             ((uint32_t)0x00000100)
-#endif /* RCC_CCIPR_I2C3SEL */
-
-/**
-  * @}
-  */
-
-#if defined (RCC_CCIPR_USART1SEL)
-/** @defgroup RCCEx_USART1_Clock_Source RCCEx USART1 Clock Source
-  * @{
-  */
-#define RCC_USART1CLKSOURCE_PCLK2        (0x00000000U) 
-#define RCC_USART1CLKSOURCE_SYSCLK       RCC_CCIPR_USART1SEL_0
-#define RCC_USART1CLKSOURCE_HSI          RCC_CCIPR_USART1SEL_1
-#define RCC_USART1CLKSOURCE_LSE          (RCC_CCIPR_USART1SEL_0 | RCC_CCIPR_USART1SEL_1)
-/**
-  * @}
-  */
-#endif /* RCC_CCIPR_USART1SEL */
-
-/** @defgroup RCCEx_USART2_Clock_Source RCCEx USART2 Clock Source
-  * @{
-  */
-#define RCC_USART2CLKSOURCE_PCLK1        (0x00000000U) 
-#define RCC_USART2CLKSOURCE_SYSCLK       RCC_CCIPR_USART2SEL_0
-#define RCC_USART2CLKSOURCE_HSI          RCC_CCIPR_USART2SEL_1
-#define RCC_USART2CLKSOURCE_LSE          (RCC_CCIPR_USART2SEL_0 | RCC_CCIPR_USART2SEL_1)
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_LPUART1_Clock_Source RCCEx LPUART1 Clock Source
-  * @{
-  */
-#define RCC_LPUART1CLKSOURCE_PCLK1        (0x00000000U) 
-#define RCC_LPUART1CLKSOURCE_SYSCLK       RCC_CCIPR_LPUART1SEL_0
-#define RCC_LPUART1CLKSOURCE_HSI          RCC_CCIPR_LPUART1SEL_1
-#define RCC_LPUART1CLKSOURCE_LSE          (RCC_CCIPR_LPUART1SEL_0 | RCC_CCIPR_LPUART1SEL_1)
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_I2C1_Clock_Source RCCEx I2C1 Clock Source
-  * @{
-  */
-#define RCC_I2C1CLKSOURCE_PCLK1          (0x00000000U) 
-#define RCC_I2C1CLKSOURCE_SYSCLK         RCC_CCIPR_I2C1SEL_0
-#define RCC_I2C1CLKSOURCE_HSI            RCC_CCIPR_I2C1SEL_1
-/**
-  * @}
-  */
-
-#if defined(RCC_CCIPR_I2C3SEL)  
-
-/** @defgroup RCCEx_I2C3_Clock_Source RCCEx I2C3 Clock Source
-  * @{
-  */
-#define RCC_I2C3CLKSOURCE_PCLK1          (0x00000000U) 
-#define RCC_I2C3CLKSOURCE_SYSCLK         RCC_CCIPR_I2C3SEL_0
-#define RCC_I2C3CLKSOURCE_HSI            RCC_CCIPR_I2C3SEL_1
-/**
-  * @}
-  */
-#endif /* RCC_CCIPR_I2C3SEL */ 
-
-/** @defgroup RCCEx_TIM_PRescaler_Selection  RCCEx TIM Prescaler Selection
-  * @{
-  */
-#define RCC_TIMPRES_DESACTIVATED        ((uint8_t)0x00)
-#define RCC_TIMPRES_ACTIVATED           ((uint8_t)0x01)
-/**
-  * @}
-  */
-
-#if defined(USB)
-/** @defgroup RCCEx_USB_Clock_Source RCCEx USB Clock Source
-  * @{
-  */
-#define RCC_USBCLKSOURCE_HSI48           RCC_CCIPR_HSI48SEL
-#define RCC_USBCLKSOURCE_PLL             (0x00000000U)
-/**
-  * @}
-  */
-#endif /* USB */
-  
-#if defined(RNG)
-/** @defgroup RCCEx_RNG_Clock_Source RCCEx RNG Clock Source
-  * @{
-  */
-#define RCC_RNGCLKSOURCE_HSI48           RCC_CCIPR_HSI48SEL
-#define RCC_RNGCLKSOURCE_PLLCLK          (0x00000000U)
-/**
-  * @}
-  */  
-#endif /* RNG */
-
-#if defined(RCC_CCIPR_HSI48SEL)
-/** @defgroup RCCEx_HSI48M_Clock_Source RCCEx HSI48M Clock Source
-  * @{
-  */
-#define RCC_FLAG_HSI48                   SYSCFG_CFGR3_VREFINT_RDYF
-
-#define RCC_HSI48M_PLL                   (0x00000000U)
-#define RCC_HSI48M_HSI48                 RCC_CCIPR_HSI48SEL
-
-/**
-  * @}
-  */
-#endif /* RCC_CCIPR_HSI48SEL */ 
-
-/** @defgroup RCCEx_LPTIM1_Clock_Source RCCEx LPTIM1 Clock Source
-  * @{
-  */
-#define RCC_LPTIM1CLKSOURCE_PCLK         (0x00000000U)
-#define RCC_LPTIM1CLKSOURCE_LSI          RCC_CCIPR_LPTIM1SEL_0
-#define RCC_LPTIM1CLKSOURCE_HSI          RCC_CCIPR_LPTIM1SEL_1
-#define RCC_LPTIM1CLKSOURCE_LSE          RCC_CCIPR_LPTIM1SEL
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_StopWakeUp_Clock RCCEx StopWakeUp Clock
-  * @{
-  */
-
-#define RCC_STOP_WAKEUPCLOCK_MSI         (0x00000000U)
-#define RCC_STOP_WAKEUPCLOCK_HSI         RCC_CFGR_STOPWUCK
-/**
-  * @}
-  */ 
-
-/** @defgroup RCCEx_LSEDrive_Configuration RCCEx LSE Drive Configuration
-  * @{
-  */
-
-#define RCC_LSEDRIVE_LOW                 (0x00000000U)
-#define RCC_LSEDRIVE_MEDIUMLOW           RCC_CSR_LSEDRV_0
-#define RCC_LSEDRIVE_MEDIUMHIGH          RCC_CSR_LSEDRV_1
-#define RCC_LSEDRIVE_HIGH                RCC_CSR_LSEDRV
-/**
-  * @}
-  */  
-
-#if defined(CRS)
-
-/** @defgroup RCCEx_CRS_Status RCCEx CRS Status
-  * @{
-  */
-#define RCC_CRS_NONE      (0x00000000U)
-#define RCC_CRS_TIMEOUT   ((uint32_t)0x00000001)
-#define RCC_CRS_SYNCOK    ((uint32_t)0x00000002)
-#define RCC_CRS_SYNCWARN  ((uint32_t)0x00000004)
-#define RCC_CRS_SYNCERR   ((uint32_t)0x00000008)
-#define RCC_CRS_SYNCMISS  ((uint32_t)0x00000010)
-#define RCC_CRS_TRIMOVF   ((uint32_t)0x00000020)
-
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_CRS_SynchroSource RCCEx CRS Synchronization Source
-  * @{
-  */
-#define RCC_CRS_SYNC_SOURCE_GPIO       ((uint32_t)0x00000000U) /*!< Synchro Signal source GPIO */
-#define RCC_CRS_SYNC_SOURCE_LSE        CRS_CFGR_SYNCSRC_0      /*!< Synchro Signal source LSE */
-#define RCC_CRS_SYNC_SOURCE_USB        CRS_CFGR_SYNCSRC_1      /*!< Synchro Signal source USB SOF (default)*/
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_CRS_SynchroDivider RCCEx CRS Synchronization Divider
-  * @{
-  */
-#define RCC_CRS_SYNC_DIV1        ((uint32_t)0x00000000U)                   /*!< Synchro Signal not divided (default) */
-#define RCC_CRS_SYNC_DIV2        CRS_CFGR_SYNCDIV_0                        /*!< Synchro Signal divided by 2 */
-#define RCC_CRS_SYNC_DIV4        CRS_CFGR_SYNCDIV_1                        /*!< Synchro Signal divided by 4 */
-#define RCC_CRS_SYNC_DIV8        (CRS_CFGR_SYNCDIV_1 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 8 */
-#define RCC_CRS_SYNC_DIV16       CRS_CFGR_SYNCDIV_2                        /*!< Synchro Signal divided by 16 */
-#define RCC_CRS_SYNC_DIV32       (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 32 */
-#define RCC_CRS_SYNC_DIV64       (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_1) /*!< Synchro Signal divided by 64 */
-#define RCC_CRS_SYNC_DIV128      CRS_CFGR_SYNCDIV                          /*!< Synchro Signal divided by 128 */
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_CRS_SynchroPolarity RCCEx CRS Synchronization Polarity
-  * @{
-  */
-#define RCC_CRS_SYNC_POLARITY_RISING   ((uint32_t)0x00000000U) /*!< Synchro Active on rising edge (default) */
-#define RCC_CRS_SYNC_POLARITY_FALLING  CRS_CFGR_SYNCPOL        /*!< Synchro Active on falling edge */
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_CRS_ReloadValueDefault RCCEx CRS Default Reload Value
-  * @{
-  */
-#define RCC_CRS_RELOADVALUE_DEFAULT    ((uint32_t)0x0000BB7FU) /*!< The reset value of the RELOAD field corresponds 
-                                                                    to a target frequency of 48 MHz and a synchronization signal frequency of 1 kHz (SOF signal from USB). */
-/**
-  * @}
-  */
-  
-/** @defgroup RCCEx_CRS_ErrorLimitDefault RCCEx CRS Default Error Limit Value
-  * @{
-  */
-#define RCC_CRS_ERRORLIMIT_DEFAULT     ((uint32_t)0x00000022U) /*!< Default Frequency error limit */
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_CRS_HSI48CalibrationDefault RCCEx CRS Default HSI48 Calibration vakye
-  * @{
-  */
-#define RCC_CRS_HSI48CALIBRATION_DEFAULT ((uint32_t)0x00000020U) /*!< The default value is 32, which corresponds to the middle of the trimming interval. 
-                                                                      The trimming step is around 67 kHz between two consecutive TRIM steps. A higher TRIM value
-                                                                      corresponds to a higher output frequency */  
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_CRS_FreqErrorDirection RCCEx CRS Frequency Error Direction
-  * @{
-  */
-#define RCC_CRS_FREQERRORDIR_UP        ((uint32_t)0x00000000U)   /*!< Upcounting direction, the actual frequency is above the target */
-#define RCC_CRS_FREQERRORDIR_DOWN      ((uint32_t)CRS_ISR_FEDIR) /*!< Downcounting direction, the actual frequency is below the target */
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_CRS_Interrupt_Sources RCCEx CRS Interrupt Sources
-  * @{
-  */
-#define RCC_CRS_IT_SYNCOK              CRS_CR_SYNCOKIE           /*!< SYNC event OK */
-#define RCC_CRS_IT_SYNCWARN            CRS_CR_SYNCWARNIE         /*!< SYNC warning */
-#define RCC_CRS_IT_ERR                 CRS_CR_ERRIE              /*!< Error */
-#define RCC_CRS_IT_ESYNC               CRS_CR_ESYNCIE            /*!< Expected SYNC */
-#define RCC_CRS_IT_SYNCERR             CRS_CR_ERRIE              /*!< SYNC error */
-#define RCC_CRS_IT_SYNCMISS            CRS_CR_ERRIE              /*!< SYNC missed */
-#define RCC_CRS_IT_TRIMOVF             CRS_CR_ERRIE              /*!< Trimming overflow or underflow */
-
-/**
-  * @}
-  */
-  
-/** @defgroup RCCEx_CRS_Flags RCCEx CRS Flags
-  * @{
-  */
-#define RCC_CRS_FLAG_SYNCOK            CRS_ISR_SYNCOKF           /*!< SYNC event OK flag     */
-#define RCC_CRS_FLAG_SYNCWARN          CRS_ISR_SYNCWARNF         /*!< SYNC warning flag      */
-#define RCC_CRS_FLAG_ERR               CRS_ISR_ERRF              /*!< Error flag        */
-#define RCC_CRS_FLAG_ESYNC             CRS_ISR_ESYNCF            /*!< Expected SYNC flag     */
-#define RCC_CRS_FLAG_SYNCERR           CRS_ISR_SYNCERR           /*!< SYNC error */
-#define RCC_CRS_FLAG_SYNCMISS          CRS_ISR_SYNCMISS          /*!< SYNC missed*/
-#define RCC_CRS_FLAG_TRIMOVF           CRS_ISR_TRIMOVF           /*!< Trimming overflow or underflow */
-
-/**
-  * @}
-  */
-
-#endif /* CRS */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup RCCEx_Exported_Macros RCCEx Exported Macros
- * @{
- */
-
-/** @defgroup RCCEx_Peripheral_Clock_Enable_Disable AHB Peripheral Clock Enable Disable
-  * @brief  Enable or disable the AHB peripheral clock.
-  * @note   After reset, the peripheral clock (used for registers read/write access)
-  *         is disabled and the application software has to enable this clock before
-  *         using it.
-  * @{
-  */
-
-#if defined(STM32L062xx) || defined(STM32L063xx)|| defined(STM32L082xx) || defined(STM32L083xx) || defined(STM32L041xx) || defined(STM32L021xx)
-#define __HAL_RCC_AES_CLK_ENABLE()   do { \
-                                        __IO uint32_t tmpreg; \
-                                        SET_BIT(RCC->AHBENR, RCC_AHBENR_CRYPEN);\
-                                        /* Delay after an RCC peripheral clock enabling */ \
-                                        tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_CRYPEN);\
-                                        UNUSED(tmpreg); \
-                                      } while(0)
-#define __HAL_RCC_AES_CLK_DISABLE()         CLEAR_BIT(RCC->AHBENR, (RCC_AHBENR_CRYPEN))
-
-#define __HAL_RCC_AES_IS_CLK_ENABLED()        (READ_BIT(RCC->AHBENR, RCC_AHBENR_CRYPEN) != RESET)
-#define __HAL_RCC_AES_IS_CLK_DISABLED()       (READ_BIT(RCC->AHBENR, RCC_AHBENR_CRYPEN) == RESET)
-
-#endif /* STM32L062xx || STM32L063xx || STM32L072xx  || STM32L073xx || STM32L082xx  || STM32L083xx || STM32L041xx || STM32L021xx */
-
-#if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined(STM32L031xx) && !defined(STM32L041xx) && !defined(STM32L051xx) && !defined(STM32L061xx) && !defined(STM32L071xx) && !defined(STM32L081xx) 
-#define __HAL_RCC_TSC_CLK_ENABLE()   do { \
-                                        __IO uint32_t tmpreg; \
-                                        SET_BIT(RCC->AHBENR, RCC_AHBENR_TSCEN);\
-                                        /* Delay after an RCC peripheral clock enabling */ \
-                                        tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_TSCEN);\
-                                        UNUSED(tmpreg); \
-                                      } while(0)
-#define __HAL_RCC_TSC_CLK_DISABLE()            CLEAR_BIT(RCC->AHBENR, (RCC_AHBENR_TSCEN))
-
-#define __HAL_RCC_TSC_IS_CLK_ENABLED()        (READ_BIT(RCC->AHBENR, RCC_AHBENR_TSCEN) != RESET)
-#define __HAL_RCC_TSC_IS_CLK_DISABLED()       (READ_BIT(RCC->AHBENR, RCC_AHBENR_TSCEN) == RESET)
-
-#define __HAL_RCC_RNG_CLK_ENABLE()   do { \
-                                        __IO uint32_t tmpreg; \
-                                        SET_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN);\
-                                        /* Delay after an RCC peripheral clock enabling */ \
-                                        tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN);\
-                                        UNUSED(tmpreg); \
-                                      } while(0)
-#define __HAL_RCC_RNG_CLK_DISABLE()           CLEAR_BIT(RCC->AHBENR, (RCC_AHBENR_RNGEN))
-
-#define __HAL_RCC_RNG_IS_CLK_ENABLED()        (READ_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN) != RESET)
-#define __HAL_RCC_RNG_IS_CLK_DISABLED()       (READ_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN) == RESET)
-#endif /* !(STM32L011xx) && !(STM32L021xx) && !(STM32L031xx ) && !(STM32L041xx ) && !(STM32L051xx ) && !(STM32L061xx ) && !(STM32L071xx ) && !(STM32L081xx ) */
-
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_IOPORT_Clock_Enable_Disable IOPORT Peripheral Clock Enable Disable
-  * @brief  Enable or disable the IOPORT peripheral clock.
-  * @note   After reset, the peripheral clock (used for registers read/write access)
-  *         is disabled and the application software has to enable this clock before 
-  *         using it.
-  * @{
-  */
-#if defined(GPIOE)
-#define __HAL_RCC_GPIOE_CLK_ENABLE()   do { \
-                                        __IO uint32_t tmpreg; \
-                                        SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOEEN);\
-                                        /* Delay after an RCC peripheral clock enabling */ \
-                                        tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOEEN);\
-                                        UNUSED(tmpreg); \
-                                      } while(0)
-
-#define __HAL_RCC_GPIOE_CLK_DISABLE()        CLEAR_BIT(RCC->IOPENR,(RCC_IOPENR_GPIOEEN))
-
-#define __HAL_RCC_GPIOE_IS_CLK_ENABLED()        (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOEEN) != RESET)
-#define __HAL_RCC_GPIOE_IS_CLK_DISABLED()       (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOEEN) == RESET)
-
-#endif /* GPIOE */
-#if defined(GPIOD)
-#define __HAL_RCC_GPIOD_CLK_ENABLE()   do { \
-                                        __IO uint32_t tmpreg; \
-                                        SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN);\
-                                        /* Delay after an RCC peripheral clock enabling */ \
-                                        tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN);\
-                                        UNUSED(tmpreg); \
-                                      } while(0)
-#define __HAL_RCC_GPIOD_CLK_DISABLE()        CLEAR_BIT(RCC->IOPENR,(RCC_IOPENR_GPIODEN))
-
-#define __HAL_RCC_GPIOD_IS_CLK_ENABLED()        (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN) != RESET)
-#define __HAL_RCC_GPIOD_IS_CLK_DISABLED()       (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN) == RESET)
-
-#endif  /* GPIOD */
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_APB1_Clock_Enable_Disable APB1 Peripheral Clock Enable Disable                
-  * @brief  Enable or disable the APB1 peripheral clock.
-  * @note   After reset, the peripheral clock (used for registers read/write access)
-  *         is disabled and the application software has to enable this clock before 
-  *         using it.   
-  * @{
-  */
-
-#if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined(STM32L031xx) && !defined(STM32L041xx) && !defined(STM32L051xx) && !defined(STM32L061xx) && !defined(STM32L071xx) && !defined(STM32L081xx) 
-#define __HAL_RCC_USB_CLK_ENABLE()        SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_USBEN))
-#define __HAL_RCC_USB_CLK_DISABLE()       CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_USBEN))
-
-#define __HAL_RCC_USB_IS_CLK_ENABLED()        (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USBEN) != RESET)
-#define __HAL_RCC_USB_IS_CLK_DISABLED()       (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USBEN) == RESET)
-
-#define __HAL_RCC_CRS_CLK_ENABLE()     SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_CRSEN))
-#define __HAL_RCC_CRS_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR,(RCC_APB1ENR_CRSEN))
-
-#define __HAL_RCC_CRS_IS_CLK_ENABLED()        (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CRSEN) != RESET)
-#define __HAL_RCC_CRS_IS_CLK_DISABLED()       (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CRSEN) == RESET)
-
-#endif /* !(STM32L011xx) && !(STM32L021xx) && !(STM32L031xx ) && !(STM32L041xx ) && !(STM32L051xx ) && !(STM32L061xx ) && !(STM32L071xx ) && !(STM32L081xx ) */
-       
-
-#if defined(STM32L053xx) || defined(STM32L063xx) || defined(STM32L073xx) || defined(STM32L083xx)
-#define __HAL_RCC_LCD_CLK_ENABLE()          SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_LCDEN))
-#define __HAL_RCC_LCD_CLK_DISABLE()         CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_LCDEN))
-
-#define __HAL_RCC_LCD_IS_CLK_ENABLED()        (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LCDEN) != RESET)
-#define __HAL_RCC_LCD_IS_CLK_DISABLED()       (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LCDEN) == RESET)
-
-#endif /* STM32L053xx || STM32L063xx || STM32L073xx  || STM32L083xx */
-
-#if defined(STM32L053xx) || defined(STM32L063xx) \
- || defined(STM32L052xx) || defined(STM32L062xx) \
- || defined(STM32L051xx) || defined(STM32L061xx)
-#define __HAL_RCC_TIM2_CLK_ENABLE()    SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_TIM2EN))
-#define __HAL_RCC_TIM6_CLK_ENABLE()    SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_TIM6EN))
-#define __HAL_RCC_SPI2_CLK_ENABLE()    SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_SPI2EN))
-#define __HAL_RCC_USART2_CLK_ENABLE()  SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_USART2EN))
-#define __HAL_RCC_LPUART1_CLK_ENABLE() SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_LPUART1EN))
-#define __HAL_RCC_I2C1_CLK_ENABLE()    SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C1EN))
-#define __HAL_RCC_I2C2_CLK_ENABLE()    SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C2EN))
-#define __HAL_RCC_DAC_CLK_ENABLE()     SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_DACEN))
-#define __HAL_RCC_LPTIM1_CLK_ENABLE()  SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_LPTIM1EN))
-
-#define __HAL_RCC_TIM2_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_TIM2EN))
-#define __HAL_RCC_TIM6_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_TIM6EN))
-#define __HAL_RCC_SPI2_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_SPI2EN))
-#define __HAL_RCC_USART2_CLK_DISABLE()  CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_USART2EN))
-#define __HAL_RCC_LPUART1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_LPUART1EN))
-#define __HAL_RCC_I2C1_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C1EN))
-#define __HAL_RCC_I2C2_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C2EN))
-#define __HAL_RCC_DAC_CLK_DISABLE()     CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_DACEN))
-#define __HAL_RCC_LPTIM1_CLK_DISABLE()  CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_LPTIM1EN))
-
-#define __HAL_RCC_TIM2_IS_CLK_ENABLED()     (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN) != RESET)
-#define __HAL_RCC_TIM6_IS_CLK_ENABLED()     (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM6EN) != RESET)
-#define __HAL_RCC_SPI2_IS_CLK_ENABLED()     (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI2EN) != RESET)
-#define __HAL_RCC_USART2_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART2EN) != RESET)
-#define __HAL_RCC_LPUART1_IS_CLK_ENABLED()  (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LPUART1EN) != RESET)
-#define __HAL_RCC_I2C1_IS_CLK_ENABLED()     (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C1EN) != RESET)
-#define __HAL_RCC_I2C2_IS_CLK_ENABLED()     (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C2EN) != RESET)
-#define __HAL_RCC_DAC_IS_CLK_ENABLED()      (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN) != RESET)
-#define __HAL_RCC_LPTIM1_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LPTIM1EN) != RESET)
-#define __HAL_RCC_TIM2_IS_CLK_DISABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN) == RESET)
-#define __HAL_RCC_TIM6_IS_CLK_DISABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM6EN) == RESET)
-#define __HAL_RCC_SPI2_IS_CLK_DISABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI2EN) == RESET)
-#define __HAL_RCC_USART2_IS_CLK_DISABLED()  (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART2EN) == RESET)
-#define __HAL_RCC_LPUART1_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LPUART1EN) == RESET)
-#define __HAL_RCC_I2C1_IS_CLK_DISABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C1EN) == RESET)
-#define __HAL_RCC_I2C2_IS_CLK_DISABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C2EN) == RESET)
-#define __HAL_RCC_DAC_IS_CLK_DISABLED()     (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN) == RESET)
-#define __HAL_RCC_LPTIM1_IS_CLK_DISABLED()  (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LPTIM1EN) == RESET)
-
-#endif /* STM32L051xx  || STM32L061xx  ||  */
-       /* STM32L052xx  || STM32L062xx  ||  */
-       /* STM32L053xx  || STM32L063xx  ||  */
-
-#if defined(STM32L011xx) || defined(STM32L021xx) || defined(STM32L031xx) || defined(STM32L041xx)
-#define __HAL_RCC_TIM2_CLK_ENABLE()     SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_TIM2EN))
-#define __HAL_RCC_USART2_CLK_ENABLE()   SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_USART2EN))
-#define __HAL_RCC_LPUART1_CLK_ENABLE()  SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_LPUART1EN))
-#define __HAL_RCC_I2C1_CLK_ENABLE()     SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C1EN))
-#define __HAL_RCC_LPTIM1_CLK_ENABLE()   SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_LPTIM1EN))
-
-#define __HAL_RCC_TIM2_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_TIM2EN))
-#define __HAL_RCC_USART2_CLK_DISABLE()  CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_USART2EN))
-#define __HAL_RCC_LPUART1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_LPUART1EN))
-#define __HAL_RCC_I2C1_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C1EN))
-#define __HAL_RCC_LPTIM1_CLK_DISABLE()  CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_LPTIM1EN))
-
-#define __HAL_RCC_TIM2_IS_CLK_ENABLED()     (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN) != RESET)
-#define __HAL_RCC_USART2_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART2EN) != RESET)
-#define __HAL_RCC_LPUART1_IS_CLK_ENABLED()  (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LPUART1EN) != RESET)
-#define __HAL_RCC_I2C1_IS_CLK_ENABLED()     (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C1EN) != RESET)
-#define __HAL_RCC_LPTIM1_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LPTIM1EN) != RESET)
-#define __HAL_RCC_TIM2_IS_CLK_DISABLED()     (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN) == RESET)
-#define __HAL_RCC_USART2_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART2EN) == RESET)
-#define __HAL_RCC_LPUART1_IS_CLK_DISABLED()  (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LPUART1EN) == RESET)
-#define __HAL_RCC_I2C1_IS_CLK_DISABLED()     (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C1EN) == RESET)
-#define __HAL_RCC_LPTIM1_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LPTIM1EN) == RESET)
-
-#endif /* STM32L011xx  || STM32L021xx  || STM32L031xx  || STM32L041xx   */
-
-
-#if defined(STM32L073xx) || defined(STM32L083xx) \
- || defined(STM32L072xx) || defined(STM32L082xx) \
- || defined(STM32L071xx) || defined(STM32L081xx)
-#define __HAL_RCC_TIM2_CLK_ENABLE()    SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_TIM2EN))
-#define __HAL_RCC_TIM3_CLK_ENABLE()    SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_TIM3EN))
-#define __HAL_RCC_TIM6_CLK_ENABLE()    SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_TIM6EN))
-#define __HAL_RCC_TIM7_CLK_ENABLE()    SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_TIM7EN))
-#define __HAL_RCC_SPI2_CLK_ENABLE()    SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_SPI2EN))
-#define __HAL_RCC_USART2_CLK_ENABLE()  SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_USART2EN))
-#define __HAL_RCC_USART4_CLK_ENABLE()  SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_USART4EN))
-#define __HAL_RCC_USART5_CLK_ENABLE()  SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_USART5EN))
-#define __HAL_RCC_LPUART1_CLK_ENABLE() SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_LPUART1EN))
-#define __HAL_RCC_I2C1_CLK_ENABLE()    SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C1EN))
-#define __HAL_RCC_I2C2_CLK_ENABLE()    SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C2EN))
-#define __HAL_RCC_I2C3_CLK_ENABLE()    SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C3EN))
-#define __HAL_RCC_DAC_CLK_ENABLE()     SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_DACEN))
-#define __HAL_RCC_LPTIM1_CLK_ENABLE()  SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_LPTIM1EN))
-
-#define __HAL_RCC_TIM2_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_TIM2EN))
-#define __HAL_RCC_TIM3_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_TIM3EN))
-#define __HAL_RCC_TIM6_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_TIM6EN))
-#define __HAL_RCC_TIM7_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_TIM7EN))
-#define __HAL_RCC_SPI2_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_SPI2EN))
-#define __HAL_RCC_USART2_CLK_DISABLE()  CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_USART2EN))
-#define __HAL_RCC_USART4_CLK_DISABLE()  CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_USART4EN))
-#define __HAL_RCC_USART5_CLK_DISABLE()  CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_USART5EN))
-#define __HAL_RCC_LPUART1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_LPUART1EN))
-#define __HAL_RCC_I2C1_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C1EN))
-#define __HAL_RCC_I2C2_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C2EN))
-#define __HAL_RCC_I2C3_CLK_DISABLE()    CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C3EN))
-#define __HAL_RCC_DAC_CLK_DISABLE()     CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_DACEN))
-#define __HAL_RCC_LPTIM1_CLK_DISABLE()  CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_LPTIM1EN))
-
-#define __HAL_RCC_TIM2_IS_CLK_ENABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN) != RESET)
-#define __HAL_RCC_TIM3_IS_CLK_ENABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM3EN) != RESET)
-#define __HAL_RCC_TIM6_IS_CLK_ENABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM6EN) != RESET)
-#define __HAL_RCC_TIM7_IS_CLK_ENABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM7EN) != RESET)
-#define __HAL_RCC_SPI2_IS_CLK_ENABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI2EN) != RESET)
-#define __HAL_RCC_USART2_IS_CLK_ENABLED()  (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART2EN) != RESET)
-#define __HAL_RCC_USART4_IS_CLK_ENABLED()  (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART4EN) != RESET)
-#define __HAL_RCC_USART5_IS_CLK_ENABLED()  (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART5EN) != RESET)
-#define __HAL_RCC_LPUART1_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LPUART1EN) != RESET)
-#define __HAL_RCC_I2C1_IS_CLK_ENABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C1EN) != RESET)
-#define __HAL_RCC_I2C2_IS_CLK_ENABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C2EN) != RESET)
-#define __HAL_RCC_I2C3_IS_CLK_ENABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN) != RESET)
-#define __HAL_RCC_DAC_IS_CLK_ENABLED()     (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN) != RESET)
-#define __HAL_RCC_LPTIM1_IS_CLK_ENABLED()  (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LPTIM1EN) != RESET)
-#define __HAL_RCC_TIM2_IS_CLK_DISABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN) == RESET)
-#define __HAL_RCC_TIM3_IS_CLK_DISABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM3EN) == RESET)
-#define __HAL_RCC_TIM6_IS_CLK_DISABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM6EN) == RESET)
-#define __HAL_RCC_TIM7_IS_CLK_DISABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM7EN) == RESET)
-#define __HAL_RCC_SPI2_IS_CLK_DISABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI2EN) == RESET)
-#define __HAL_RCC_USART2_IS_CLK_DISABLED()  (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART2EN) == RESET)
-#define __HAL_RCC_USART4_IS_CLK_DISABLED()  (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART4EN) == RESET)
-#define __HAL_RCC_USART5_IS_CLK_DISABLED()  (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART5EN) == RESET)
-#define __HAL_RCC_LPUART1_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LPUART1EN) == RESET)
-#define __HAL_RCC_I2C1_IS_CLK_DISABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C1EN) == RESET)
-#define __HAL_RCC_I2C2_IS_CLK_DISABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C2EN) == RESET)
-#define __HAL_RCC_I2C3_IS_CLK_DISABLED()    (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN) == RESET)
-#define __HAL_RCC_DAC_IS_CLK_DISABLED()     (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN) == RESET)
-#define __HAL_RCC_LPTIM1_IS_CLK_DISABLED()  (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LPTIM1EN) == RESET)
-
-#endif /* STM32L071xx  ||  STM32L081xx  || */
-       /* STM32L072xx  ||  STM32L082xx  || */
-       /* STM32L073xx  ||  STM32L083xx     */
-
- /**
-  * @}
-  */
-
-#if defined(STM32L053xx) || defined(STM32L063xx) || defined(STM32L073xx) || defined(STM32L083xx) \
- || defined(STM32L052xx) || defined(STM32L062xx) || defined(STM32L072xx) || defined(STM32L082xx) \
- || defined(STM32L051xx) || defined(STM32L061xx) || defined(STM32L071xx) || defined(STM32L081xx) \
- || defined(STM32L031xx) || defined(STM32L041xx) || defined(STM32L011xx) || defined(STM32L021xx) 
-/** @defgroup RCCEx_APB2_Clock_Enable_Disable APB2 Peripheral Clock Enable Disable     
-  * @brief  Enable or disable the APB2 peripheral clock.
-  * @note   After reset, the peripheral clock (used for registers read/write access)
-  *         is disabled and the application software has to enable this clock before 
-  *         using it.   
-  * @{
-  */
-#define __HAL_RCC_TIM21_CLK_ENABLE()    SET_BIT(RCC->APB2ENR, (RCC_APB2ENR_TIM21EN))
-#if !defined (STM32L011xx) && !defined (STM32L021xx)
-#define __HAL_RCC_TIM22_CLK_ENABLE()    SET_BIT(RCC->APB2ENR, (RCC_APB2ENR_TIM22EN))
-#endif
-#define __HAL_RCC_ADC1_CLK_ENABLE()     SET_BIT(RCC->APB2ENR, (RCC_APB2ENR_ADC1EN))
-#define __HAL_RCC_SPI1_CLK_ENABLE()     SET_BIT(RCC->APB2ENR, (RCC_APB2ENR_SPI1EN))
-#define __HAL_RCC_USART1_CLK_ENABLE()   SET_BIT(RCC->APB2ENR, (RCC_APB2ENR_USART1EN))
-
-#define __HAL_RCC_TIM21_CLK_DISABLE()    CLEAR_BIT(RCC->APB2ENR,  (RCC_APB2ENR_TIM21EN))
-#if !defined (STM32L011xx) && !defined (STM32L021xx)
-#define __HAL_RCC_TIM22_CLK_DISABLE()    CLEAR_BIT(RCC->APB2ENR,  (RCC_APB2ENR_TIM22EN))
-#endif
-#define __HAL_RCC_ADC1_CLK_DISABLE()     CLEAR_BIT(RCC->APB2ENR,  (RCC_APB2ENR_ADC1EN))
-#define __HAL_RCC_SPI1_CLK_DISABLE()     CLEAR_BIT(RCC->APB2ENR,  (RCC_APB2ENR_SPI1EN))
-#define __HAL_RCC_USART1_CLK_DISABLE()   CLEAR_BIT(RCC->APB2ENR,  (RCC_APB2ENR_USART1EN))
-#if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined(STM32L031xx) && !defined(STM32L041xx)
-#define __HAL_RCC_FIREWALL_CLK_ENABLE()  SET_BIT(RCC->APB2ENR, (RCC_APB2ENR_MIFIEN))
-#define __HAL_RCC_FIREWALL_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR,  (RCC_APB2ENR_MIFIEN))
-#endif /* !(STM32L011xx) && !(STM32L021xx) && !STM32L031xx && !STM32L041xx */
-
-#define __HAL_RCC_TIM21_IS_CLK_ENABLED()    (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM21EN) != RESET)
-#if !defined (STM32L011xx) && !defined (STM32L021xx)
-#define __HAL_RCC_TIM22_IS_CLK_ENABLED()    (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM22EN) != RESET)
-#endif
-#define __HAL_RCC_ADC1_IS_CLK_ENABLED()     (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN) != RESET)
-#define __HAL_RCC_SPI1_IS_CLK_ENABLED()     (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN) != RESET)
-#define __HAL_RCC_USART1_IS_CLK_ENABLED()   (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) != RESET)
-
-#define __HAL_RCC_TIM21_IS_CLK_DISABLED()    (READ_BIT(RCC->APB2ENR,  (RCC_APB2ENR_TIM21EN) == RESET)
-#if !defined (STM32L011xx) && !defined (STM32L021xx)
-#define __HAL_RCC_TIM22_IS_CLK_DISABLED()    (READ_BIT(RCC->APB2ENR,  (RCC_APB2ENR_TIM22EN) == RESET)
-#endif
-#define __HAL_RCC_ADC1_IS_CLK_DISABLED()     (READ_BIT(RCC->APB2ENR,  (RCC_APB2ENR_ADC1EN) == RESET)
-#define __HAL_RCC_SPI1_IS_CLK_DISABLED()     (READ_BIT(RCC->APB2ENR,  (RCC_APB2ENR_SPI1EN) == RESET)
-#define __HAL_RCC_USART1_IS_CLK_DISABLED()   (READ_BIT(RCC->APB2ENR,  (RCC_APB2ENR_USART1EN) == RESET)
-#if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined(STM32L031xx) && !defined(STM32L041xx)
-#define __HAL_RCC_FIREWALL_IS_CLK_ENABLED()  (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_MIFIEN) != RESET)
-#define __HAL_RCC_FIREWALL_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR,  (RCC_APB2ENR_MIFIEN) == RESET)
-#endif /* !(STM32L011xx) && !(STM32L021xx) && !STM32L031xx && !STM32L041xx */
-
-#endif /* STM32L051xx  || STM32L061xx  || STM32L071xx  ||  STM32L081xx  || */
-       /* STM32L052xx  || STM32L062xx  || STM32L072xx  ||  STM32L082xx  || */
-       /* STM32L053xx  || STM32L063xx  || STM32L073xx  ||  STM32L083xx  || */
-     /* STM32L031xx  || STM32L041xx  || STM32L011xx  || STM32L021xx      */
-       
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_AHB_Force_Release_Reset AHB Peripheral Force Release Reset
-  * @brief  Force or release AHB peripheral reset.
-  * @{
-  */
-#if defined(STM32L062xx) || defined(STM32L063xx)|| defined(STM32L082xx) || defined(STM32L083xx) || defined(STM32L041xx) || defined(STM32L021xx)
-#define __HAL_RCC_AES_FORCE_RESET()     SET_BIT(RCC->AHBRSTR, (RCC_AHBRSTR_CRYPRST))
-#define __HAL_RCC_AES_RELEASE_RESET()   CLEAR_BIT(RCC->AHBRSTR, (RCC_AHBRSTR_CRYPRST))
-#endif /* STM32L062xx || STM32L063xx || STM32L072xx  || STM32L073xx || STM32L082xx  || STM32L083xx || STM32L041xx || STM32L021xx*/
-
-#if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined(STM32L031xx) && !defined(STM32L041xx) && !defined(STM32L051xx) && !defined(STM32L061xx) && !defined(STM32L071xx) && !defined(STM32L081xx) 
-#define __HAL_RCC_TSC_FORCE_RESET()        SET_BIT(RCC->AHBRSTR, (RCC_AHBRSTR_TSCRST))
-#define __HAL_RCC_TSC_RELEASE_RESET()      CLEAR_BIT(RCC->AHBRSTR, (RCC_AHBRSTR_TSCRST))
-#define __HAL_RCC_RNG_FORCE_RESET()        SET_BIT(RCC->AHBRSTR, (RCC_AHBRSTR_RNGRST))
-#define __HAL_RCC_RNG_RELEASE_RESET()      CLEAR_BIT(RCC->AHBRSTR, (RCC_AHBRSTR_RNGRST))
-#endif /* !(STM32L011xx) && !(STM32L021xx) && !(STM32L031xx ) && !(STM32L041xx ) && !(STM32L051xx ) && !(STM32L061xx ) && !(STM32L071xx ) && !(STM32L081xx ) */
-
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_IOPORT_Force_Release_Reset IOPORT Peripheral Force Release Reset
-  * @brief  Force or release IOPORT peripheral reset.
-  * @{
-  */
-#if defined(STM32L073xx) || defined(STM32L083xx) \
- || defined(STM32L072xx) || defined(STM32L082xx) \
- || defined(STM32L071xx) || defined(STM32L081xx)
-#define __HAL_RCC_GPIOE_FORCE_RESET()   SET_BIT(RCC->IOPRSTR, (RCC_IOPRSTR_GPIOERST))
-
-#define __HAL_RCC_GPIOE_RELEASE_RESET() CLEAR_BIT(RCC->IOPRSTR,(RCC_IOPRSTR_GPIOERST))
-
-#endif /* STM32L071xx  ||  STM32L081xx  || */
-       /* STM32L072xx  ||  STM32L082xx  || */
-       /* STM32L073xx  ||  STM32L083xx     */
-#if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined(STM32L031xx) && !defined(STM32L041xx)
-#define __HAL_RCC_GPIOD_FORCE_RESET()   SET_BIT(RCC->IOPRSTR, (RCC_IOPRSTR_GPIODRST))
-#define __HAL_RCC_GPIOD_RELEASE_RESET() CLEAR_BIT(RCC->IOPRSTR,(RCC_IOPRSTR_GPIODRST))
-#endif  /* !(STM32L011xx) && !(STM32L021xx) && !(STM32L031xx ) && !(STM32L041xx ) */ 
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_APB1_Force_Release_Reset APB1 Peripheral Force Release Reset     
-  * @brief  Force or release APB1 peripheral reset.
-  * @{
-  */ 
-
-#if defined(STM32L053xx) || defined(STM32L063xx) \
- || defined(STM32L052xx) || defined(STM32L062xx) \
- || defined(STM32L051xx) || defined(STM32L061xx)  
-#define __HAL_RCC_TIM2_FORCE_RESET()     SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_TIM6_FORCE_RESET()     SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_TIM6RST))
-#define __HAL_RCC_LPTIM1_FORCE_RESET()   SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_LPTIM1RST))
-#define __HAL_RCC_I2C1_FORCE_RESET()     SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_I2C1RST))
-#define __HAL_RCC_I2C2_FORCE_RESET()     SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_I2C2RST))
-#define __HAL_RCC_USART2_FORCE_RESET()   SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_USART2RST))
-#define __HAL_RCC_LPUART1_FORCE_RESET()  SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_LPUART1RST))
-#define __HAL_RCC_SPI2_FORCE_RESET()     SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_SPI2RST))
-#define __HAL_RCC_DAC_FORCE_RESET()      SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_DACRST))
-
-#define __HAL_RCC_TIM2_RELEASE_RESET()     CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_TIM6_RELEASE_RESET()     CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_TIM6RST))
-#define __HAL_RCC_LPTIM1_RELEASE_RESET()   CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_LPTIM1RST))
-#define __HAL_RCC_I2C1_RELEASE_RESET()     CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_I2C1RST))
-#define __HAL_RCC_I2C2_RELEASE_RESET()     CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_I2C2RST))
-#define __HAL_RCC_USART2_RELEASE_RESET()   CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_USART2RST))
-#define __HAL_RCC_LPUART1_RELEASE_RESET()  CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_LPUART1RST))
-#define __HAL_RCC_SPI2_RELEASE_RESET()     CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_SPI2RST))
-#define __HAL_RCC_DAC_RELEASE_RESET()      CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_DACRST))
-#endif /* STM32L051xx  || STM32L061xx  || */
-       /* STM32L052xx  || STM32L062xx  || */
-       /* STM32L053xx  || STM32L063xx     */
-#if defined(STM32L011xx) || defined(STM32L021xx) || defined(STM32L031xx) || defined(STM32L041xx)
-#define __HAL_RCC_TIM2_FORCE_RESET()     SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_LPTIM1_FORCE_RESET()   SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_LPTIM1RST))
-#define __HAL_RCC_I2C1_FORCE_RESET()     SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_I2C1RST))
-#define __HAL_RCC_USART2_FORCE_RESET()   SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_USART2RST))
-#define __HAL_RCC_LPUART1_FORCE_RESET()  SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_LPUART1RST))
-
-#define __HAL_RCC_TIM2_RELEASE_RESET()     CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_LPTIM1_RELEASE_RESET()   CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_LPTIM1RST))
-#define __HAL_RCC_I2C1_RELEASE_RESET()     CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_I2C1RST))
-#define __HAL_RCC_USART2_RELEASE_RESET()   CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_USART2RST))
-#define __HAL_RCC_LPUART1_RELEASE_RESET()  CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_LPUART1RST))
-#endif /* STM32L031xx  || STM32L041xx  || STM32L011xx  || STM32L021xx  */
-
-#if defined(STM32L073xx) || defined(STM32L083xx) \
- || defined(STM32L072xx) || defined(STM32L082xx) \
- || defined(STM32L071xx) || defined(STM32L081xx) 
-#define __HAL_RCC_TIM2_FORCE_RESET()     SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_TIM3_FORCE_RESET()     SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_TIM3RST))
-#define __HAL_RCC_TIM6_FORCE_RESET()     SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_TIM6RST))
-#define __HAL_RCC_TIM7_FORCE_RESET()     SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_TIM7RST))
-#define __HAL_RCC_LPTIM1_FORCE_RESET()   SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_LPTIM1RST))
-#define __HAL_RCC_I2C1_FORCE_RESET()     SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_I2C1RST))
-#define __HAL_RCC_I2C2_FORCE_RESET()     SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_I2C2RST))
-#define __HAL_RCC_I2C3_FORCE_RESET()     SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_I2C3RST))
-#define __HAL_RCC_USART2_FORCE_RESET()   SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_USART2RST))
-#define __HAL_RCC_USART4_FORCE_RESET()   SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_USART4RST))
-#define __HAL_RCC_USART5_FORCE_RESET()   SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_USART5RST))
-#define __HAL_RCC_LPUART1_FORCE_RESET()  SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_LPUART1RST))
-#define __HAL_RCC_SPI2_FORCE_RESET()     SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_SPI2RST))
-#define __HAL_RCC_DAC_FORCE_RESET()      SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_DACRST))
-
-#define __HAL_RCC_TIM2_RELEASE_RESET()     CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_TIM3_RELEASE_RESET()     CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_TIM3RST))
-#define __HAL_RCC_TIM6_RELEASE_RESET()     CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_TIM6RST))
-#define __HAL_RCC_TIM7_RELEASE_RESET()     CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_TIM7RST))
-#define __HAL_RCC_LPTIM1_RELEASE_RESET()   CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_LPTIM1RST))
-#define __HAL_RCC_I2C1_RELEASE_RESET()     CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_I2C1RST))
-#define __HAL_RCC_I2C2_RELEASE_RESET()     CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_I2C2RST))
-#define __HAL_RCC_I2C3_RELEASE_RESET()     CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_I2C3RST))
-#define __HAL_RCC_USART2_RELEASE_RESET()   CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_USART2RST))
-#define __HAL_RCC_USART4_RELEASE_RESET()   CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_USART4RST))
-#define __HAL_RCC_USART5_RELEASE_RESET()   CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_USART5RST))
-#define __HAL_RCC_LPUART1_RELEASE_RESET()  CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_LPUART1RST))
-#define __HAL_RCC_SPI2_RELEASE_RESET()     CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_SPI2RST))
-#define __HAL_RCC_DAC_RELEASE_RESET()      CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_DACRST))
-#endif /* STM32L071xx  ||  STM32L081xx  || */
-       /* STM32L072xx  ||  STM32L082xx  || */
-       /* STM32L073xx  ||  STM32L083xx  || */
-
-#if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined(STM32L031xx) && !defined(STM32L041xx) && !defined(STM32L051xx) && !defined(STM32L061xx) && !defined(STM32L071xx) && !defined(STM32L081xx) 
-#define __HAL_RCC_USB_FORCE_RESET()        SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_USBRST))
-#define __HAL_RCC_USB_RELEASE_RESET()      CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_USBRST))
-#define __HAL_RCC_CRS_FORCE_RESET()        SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_CRSRST))
-#define __HAL_RCC_CRS_RELEASE_RESET()      CLEAR_BIT(RCC->APB1RSTR,(RCC_APB1RSTR_CRSRST))
-#endif /* !(STM32L011xx) && !(STM32L021xx) && !(STM32L031xx ) && !(STM32L041xx ) && !(STM32L051xx ) && !(STM32L061xx ) && !(STM32L071xx ) && !(STM32L081xx ) */
-
-#if defined(STM32L053xx) || defined(STM32L063xx) || defined(STM32L073xx) || defined(STM32L083xx)
-#define __HAL_RCC_LCD_FORCE_RESET()           SET_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_LCDRST))
-#define __HAL_RCC_LCD_RELEASE_RESET()         CLEAR_BIT(RCC->APB1RSTR, (RCC_APB1RSTR_LCDRST))
-#endif /* STM32L053xx || STM32L063xx || STM32L073xx  || STM32L083xx */
-
-/**
-  * @}
-  */
-
-#if defined(STM32L053xx) || defined(STM32L063xx) || defined(STM32L073xx) || defined(STM32L083xx) \
- || defined(STM32L052xx) || defined(STM32L062xx) || defined(STM32L072xx) || defined(STM32L082xx) \
- || defined(STM32L051xx) || defined(STM32L061xx) || defined(STM32L071xx) || defined(STM32L081xx)
-
-/** @defgroup RCCEx_APB2_Force_Release_Reset APB2 Peripheral Force Release Reset       
-  * @brief  Force or release APB2 peripheral reset.
-  * @{
-  */ 
-#define __HAL_RCC_USART1_FORCE_RESET()     SET_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_USART1RST))
-#define __HAL_RCC_ADC1_FORCE_RESET()       SET_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_ADC1RST))
-#define __HAL_RCC_SPI1_FORCE_RESET()       SET_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_SPI1RST))
-#define __HAL_RCC_TIM21_FORCE_RESET()      SET_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_TIM21RST))
-#if !defined (STM32L011xx) && !defined (STM32L021xx)
-#define __HAL_RCC_TIM22_FORCE_RESET()      SET_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_TIM22RST))
-#endif
-
-#define __HAL_RCC_USART1_RELEASE_RESET()     CLEAR_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_USART1RST))
-#define __HAL_RCC_ADC1_RELEASE_RESET()       CLEAR_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_ADC1RST))
-#define __HAL_RCC_SPI1_RELEASE_RESET()       CLEAR_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_SPI1RST))
-#define __HAL_RCC_TIM21_RELEASE_RESET()      CLEAR_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_TIM21RST))
-#if !defined (STM32L011xx) && !defined (STM32L021xx)
-#define __HAL_RCC_TIM22_RELEASE_RESET()      CLEAR_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_TIM22RST))
-#endif
-#endif /* STM32L051xx  || STM32L061xx  || STM32L071xx  ||  STM32L081xx  || */
-       /* STM32L052xx  || STM32L062xx  || STM32L072xx  ||  STM32L082xx  || */
-       /* STM32L053xx  || STM32L063xx  || STM32L073xx  ||  STM32L083xx  || */
-#if defined(STM32L011xx) || defined(STM32L021xx) || defined(STM32L031xx) || defined(STM32L041xx)
-#define __HAL_RCC_ADC1_FORCE_RESET()       SET_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_ADC1RST))
-#define __HAL_RCC_SPI1_FORCE_RESET()       SET_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_SPI1RST))
-#define __HAL_RCC_TIM21_FORCE_RESET()      SET_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_TIM21RST))
-#if !defined (STM32L011xx) && !defined (STM32L021xx)
-#define __HAL_RCC_TIM22_FORCE_RESET()      SET_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_TIM22RST))
-#endif
-#define __HAL_RCC_ADC1_RELEASE_RESET()       CLEAR_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_ADC1RST))
-#define __HAL_RCC_SPI1_RELEASE_RESET()       CLEAR_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_SPI1RST))
-#define __HAL_RCC_TIM21_RELEASE_RESET()      CLEAR_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_TIM21RST))
-#if !defined (STM32L011xx) && !defined (STM32L021xx)
-#define __HAL_RCC_TIM22_RELEASE_RESET()      CLEAR_BIT(RCC->APB2RSTR, (RCC_APB2RSTR_TIM22RST))
-#endif
-#endif /* STM32L031xx  || STM32L041xx  || STM32L011xx  || STM32L021xx*/
-
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_AHB_Clock_Sleep_Enable_Disable AHB Peripheral Clock Sleep Enable Disable
-  * @brief  Enable or disable the AHB peripheral clock during Low Power (Sleep) mode.
-  * @note   Peripheral clock gating in SLEEP mode can be used to further reduce
-  *         power consumption.
-  * @note   After wakeup from SLEEP mode, the peripheral clock is enabled again.
-  * @note   By default, all peripheral clocks are enabled during SLEEP mode.
-  * @{
-  */
-
-#if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined(STM32L031xx) && !defined(STM32L041xx) && !defined(STM32L051xx) && !defined(STM32L061xx) && !defined(STM32L071xx) && !defined(STM32L081xx) 
-#define __HAL_RCC_TSC_CLK_SLEEP_ENABLE()           SET_BIT(RCC->AHBSMENR, (RCC_AHBSMENR_TSCSMEN))
-#define __HAL_RCC_RNG_CLK_SLEEP_ENABLE()           SET_BIT(RCC->AHBSMENR, (RCC_AHBSMENR_RNGSMEN))
-#define __HAL_RCC_TSC_CLK_SLEEP_DISABLE()          CLEAR_BIT(RCC->AHBSMENR, (RCC_AHBSMENR_TSCSMEN))
-#define __HAL_RCC_RNG_CLK_SLEEP_DISABLE()          CLEAR_BIT(RCC->AHBSMENR, (RCC_AHBSMENR_RNGSMEN))
-
-#define __HAL_RCC_TSC_IS_CLK_SLEEP_ENABLED()      (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_TSCSMEN) != RESET)
-#define __HAL_RCC_RNG_IS_CLK_SLEEP_ENABLED()      (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_RNGSMEN) != RESET)
-#define __HAL_RCC_TSC_IS_CLK_SLEEP_DISABLED()     (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_TSCSMEN) == RESET)
-#define __HAL_RCC_RNG_IS_CLK_SLEEP_DISABLED()     (READ_BIT(RCC->AHBSMENR, RCC_AHBSMENR_RNGSMEN) == RESET)
-#endif /* !(STM32L011xx) && !(STM32L021xx) && !(STM32L031xx ) &&  !(STM32L041xx ) &&  !(STM32L051xx ) && !(STM32L061xx ) && !(STM32L071xx ) && !(STM32L081xx ) */
-       
-#if defined(STM32L062xx) || defined(STM32L063xx)|| defined(STM32L082xx) || defined(STM32L083xx) || defined(STM32L041xx)
-#define __HAL_RCC_AES_CLK_SLEEP_ENABLE()          SET_BIT(RCC->AHBLPENR, (RCC_AHBSMENR_CRYPSMEN))
-#define __HAL_RCC_AES_CLK_SLEEP_DISABLE()         CLEAR_BIT(RCC->AHBLPENR, (RCC_AHBSMENR_CRYPSMEN))
-
-#define __HAL_RCC_AES_IS_CLK_SLEEP_ENABLED()      (READ_BIT(RCC->AHBLPENR, RCC_AHBSMENR_CRYPSMEN) != RESET)
-#define __HAL_RCC_AES_IS_CLK_SLEEP_DISABLED()     (READ_BIT(RCC->AHBLPENR, RCC_AHBSMENR_CRYPSMEN) == RESET)
-#endif /* STM32L062xx || STM32L063xx || STM32L072xx || STM32L073xx || STM32L082xx || STM32L083xx || STM32L041xx */
-
-/**
-  * @}
-  */
-
-/** @defgroup RCCEx_IOPORT_Clock_Sleep_Enable_Disable IOPORT Peripheral Clock Sleep Enable Disable
-  * @brief  Enable or disable the IOPORT peripheral clock during Low Power (Sleep) mode.
-  * @note   Peripheral clock gating in SLEEP mode can be used to further reduce
-  *         power consumption.
-  * @note   After wakeup from SLEEP mode, the peripheral clock is enabled again.
-  * @note   By default, all peripheral clocks are enabled during SLEEP mode.
-  * @{
-  */
-#if defined(STM32L073xx) || defined(STM32L083xx) \
- || defined(STM32L072xx) || defined(STM32L082xx) \
- || defined(STM32L071xx) || defined(STM32L081xx) 
-#define __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE()         SET_BIT(RCC->IOPSMENR, (RCC_IOPSMENR_GPIOESMEN))
-#define __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE()        CLEAR_BIT(RCC->IOPSMENR,(RCC_IOPSMENR_GPIOESMEN))
-
-#define __HAL_RCC_GPIOE_IS_CLK_SLEEP_ENABLED()        (READ_BIT(RCC->IOPSMENR, RCC_IOPSMENR_GPIOESMEN) != RESET)
-#define __HAL_RCC_GPIOE_IS_CLK_SLEEP_DISABLED()       (READ_BIT(RCC->IOPSMENR, RCC_IOPSMENR_GPIOESMEN) == RESET)
-#endif /* STM32L071xx  ||  STM32L081xx  || */
-       /* STM32L072xx  ||  STM32L082xx  || */
-       /* STM32L073xx  ||  STM32L083xx  || */
-#if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined(STM32L031xx) && !defined(STM32L041xx)
-#define __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE()    SET_BIT(RCC->IOPSMENR, (RCC_IOPSMENR_GPIODSMEN))
-#define __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE()   CLEAR_BIT(RCC->IOPSMENR,(RCC_IOPSMENR_GPIODSMEN))
-
-#define __HAL_RCC_GPIOD_IS_CLK_SLEEP_ENABLED()        (READ_BIT(RCC->IOPSMENR, RCC_IOPSMENR_GPIODSMEN) != RESET)
-#define __HAL_RCC_GPIOD_IS_CLK_SLEEP_DISABLED()       (READ_BIT(RCC->IOPSMENR, RCC_IOPSMENR_GPIODSMEN) == RESET)
-#endif  /* !(STM32L011xx) && !(STM32L021xx) && !(STM32L031xx ) && !(STM32L041xx ) */ 
-/**
-  * @}
-  */
-
-
-/** @defgroup RCCEx_APB1_Clock_Sleep_Enable_Disable APB1 Peripheral Clock Sleep Enable Disable
-  * @brief  Enable or disable the APB1 peripheral clock during Low Power (Sleep) mode.
-  * @note   Peripheral clock gating in SLEEP mode can be used to further reduce
-  *         power consumption.
-  * @note   After wakeup from SLEEP mode, the peripheral clock is enabled again.
-  * @note   By default, all peripheral clocks are enabled during SLEEP mode.
-  * @{
-  */
-
-#if defined(STM32L053xx) || defined(STM32L063xx) \
- || defined(STM32L052xx) || defined(STM32L062xx) \
- || defined(STM32L051xx) || defined(STM32L061xx) 
-#define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM2SMEN))
-#define __HAL_RCC_TIM6_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM6SMEN))
-#define __HAL_RCC_SPI2_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_SPI2SMEN))
-#define __HAL_RCC_USART2_CLK_SLEEP_ENABLE()  SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_USART2SMEN))
-#define __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_LPUART1SMEN))
-#define __HAL_RCC_I2C1_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_I2C1SMEN))
-#define __HAL_RCC_I2C2_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_I2C2SMEN))
-#define __HAL_RCC_DAC_CLK_SLEEP_ENABLE()     SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_DACSMEN))
-#define __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE()  SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_LPTIM1SMEN))
-
-#define __HAL_RCC_TIM2_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM2SMEN))
-#define __HAL_RCC_TIM6_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM6SMEN))
-#define __HAL_RCC_SPI2_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_SPI2SMEN))
-#define __HAL_RCC_USART2_CLK_SLEEP_DISABLE()  CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_USART2SMEN))
-#define __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_LPUART1SMEN))
-#define __HAL_RCC_I2C1_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_I2C1SMEN))
-#define __HAL_RCC_I2C2_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_I2C2SMEN))
-#define __HAL_RCC_DAC_CLK_SLEEP_DISABLE()     CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_DACSMEN))
-#define __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE()  CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_LPTIM1SMEN))
-
-#define __HAL_RCC_TIM2_IS_CLK_SLEEP_ENABLED()     (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_TIM2SMEN) != RESET)
-#define __HAL_RCC_TIM6_IS_CLK_SLEEP_ENABLED()     (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_TIM6SMEN) != RESET)
-#define __HAL_RCC_SPI2_IS_CLK_SLEEP_ENABLED()     (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_SPI2SMEN) != RESET)
-#define __HAL_RCC_USART2_IS_CLK_SLEEP_ENABLED()   (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_USART2SMEN) != RESET)
-#define __HAL_RCC_LPUART1_IS_CLK_SLEEP_ENABLED()  (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_LPUART1SMEN) != RESET)
-#define __HAL_RCC_I2C1_IS_CLK_SLEEP_ENABLED()     (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_I2C1SMEN) != RESET)
-#define __HAL_RCC_I2C2_IS_CLK_SLEEP_ENABLED()     (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_I2C2SMEN) != RESET)
-#define __HAL_RCC_DAC_IS_CLK_SLEEP_ENABLED()      (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_DACSMEN) != RESET)
-#define __HAL_RCC_LPTIM1_IS_CLK_SLEEP_ENABLED()   (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_LPTIM1SMEN) != RESET)
-#define __HAL_RCC_TIM2_IS_CLK_SLEEP_DISABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_TIM2SMEN) == RESET)
-#define __HAL_RCC_TIM6_IS_CLK_SLEEP_DISABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_TIM6SMEN) == RESET)
-#define __HAL_RCC_SPI2_IS_CLK_SLEEP_DISABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_SPI2SMEN) == RESET)
-#define __HAL_RCC_USART2_IS_CLK_SLEEP_DISABLED()  (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_USART2SMEN) == RESET)
-#define __HAL_RCC_LPUART1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_LPUART1SMEN) == RESET)
-#define __HAL_RCC_I2C1_IS_CLK_SLEEP_DISABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_I2C1SMEN) == RESET)
-#define __HAL_RCC_I2C2_IS_CLK_SLEEP_DISABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_I2C2SMEN) == RESET)
-#define __HAL_RCC_DAC_IS_CLK_SLEEP_DISABLED()     (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_DACSMEN) == RESET)
-#define __HAL_RCC_LPTIM1_IS_CLK_SLEEP_DISABLED()  (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_LPTIM1SMEN) == RESET)
-#endif /* STM32L051xx  || STM32L061xx  || */
-       /* STM32L052xx  || STM32L062xx  || */
-       /* STM32L053xx  || STM32L063xx     */
-       
-#if defined(STM32L073xx) || defined(STM32L083xx) \
- || defined(STM32L072xx) || defined(STM32L082xx) \
- || defined(STM32L071xx) || defined(STM32L081xx)
-#define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM2SMEN))
-#define __HAL_RCC_TIM3_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM3SMEN))
-#define __HAL_RCC_TIM6_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM6SMEN))
-#define __HAL_RCC_TIM7_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM7SMEN))
-#define __HAL_RCC_SPI2_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_SPI2SMEN))
-#define __HAL_RCC_USART2_CLK_SLEEP_ENABLE()  SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_USART2SMEN))
-#define __HAL_RCC_USART4_CLK_SLEEP_ENABLE()  SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_USART4SMEN))
-#define __HAL_RCC_USART5_CLK_SLEEP_ENABLE()  SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_USART5SMEN))
-#define __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_LPUART1SMEN))
-#define __HAL_RCC_I2C1_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_I2C1SMEN))
-#define __HAL_RCC_I2C2_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_I2C2SMEN))
-#define __HAL_RCC_I2C3_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_I2C3SMEN))
-#define __HAL_RCC_DAC_CLK_SLEEP_ENABLE()     SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_DACSMEN))
-#define __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE()  SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_LPTIM1SMEN))
-
-#define __HAL_RCC_TIM2_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM2SMEN))
-#define __HAL_RCC_TIM3_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM3SMEN))
-#define __HAL_RCC_TIM6_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM6SMEN))
-#define __HAL_RCC_TIM7_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM7SMEN))
-#define __HAL_RCC_SPI2_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_SPI2SMEN))
-#define __HAL_RCC_USART2_CLK_SLEEP_DISABLE()  CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_USART2SMEN))
-#define __HAL_RCC_USART4_CLK_SLEEP_DISABLE()  CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_USART4SMEN))
-#define __HAL_RCC_USART5_CLK_SLEEP_DISABLE()  CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_USART5SMEN))
-#define __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_LPUART1SMEN))
-#define __HAL_RCC_I2C1_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_I2C1SMEN))
-#define __HAL_RCC_I2C2_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_I2C2SMEN))
-#define __HAL_RCC_I2C3_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_I2C3SMEN))
-#define __HAL_RCC_DAC_CLK_SLEEP_DISABLE()     CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_DACSMEN))
-#define __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE()  CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_LPTIM1SMEN))
-
-#define __HAL_RCC_TIM2_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_TIM2SMEN) != RESET)
-#define __HAL_RCC_TIM3_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_TIM3SMEN) != RESET)
-#define __HAL_RCC_TIM6_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_TIM6SMEN) != RESET)
-#define __HAL_RCC_TIM7_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_TIM7SMEN) != RESET)
-#define __HAL_RCC_SPI2_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_SPI2SMEN) != RESET)
-#define __HAL_RCC_USART2_IS_CLK_SLEEP_ENABLED()  (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_USART2SMEN) != RESET)
-#define __HAL_RCC_USART4_IS_CLK_SLEEP_ENABLED()  (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_USART4SMEN) != RESET)
-#define __HAL_RCC_USART5_IS_CLK_SLEEP_ENABLED()  (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_USART5SMEN) != RESET)
-#define __HAL_RCC_LPUART1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_LPUART1SMEN) != RESET)
-#define __HAL_RCC_I2C1_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_I2C1SMEN) != RESET)
-#define __HAL_RCC_I2C2_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_I2C2SMEN) != RESET)
-#define __HAL_RCC_I2C3_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_I2C3SMEN) != RESET)
-#define __HAL_RCC_DAC_IS_CLK_SLEEP_ENABLED()     (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_DACSMEN) != RESET)
-#define __HAL_RCC_LPTIM1_IS_CLK_SLEEP_ENABLED()  (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_LPTIM1SMEN) != RESET)
-#define __HAL_RCC_TIM2_IS_CLK_SLEEP_DISABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_TIM2SMEN) == RESET)
-#define __HAL_RCC_TIM3_IS_CLK_SLEEP_DISABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_TIM3SMEN) == RESET)
-#define __HAL_RCC_TIM6_IS_CLK_SLEEP_DISABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_TIM6SMEN) == RESET)
-#define __HAL_RCC_TIM7_IS_CLK_SLEEP_DISABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_TIM7SMEN) == RESET)
-#define __HAL_RCC_SPI2_IS_CLK_SLEEP_DISABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_SPI2SMEN) == RESET)
-#define __HAL_RCC_USART2_IS_CLK_SLEEP_DISABLED()  (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_USART2SMEN) == RESET)
-#define __HAL_RCC_USART4_IS_CLK_SLEEP_DISABLED()  (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_USART4SMEN) == RESET)
-#define __HAL_RCC_USART5_IS_CLK_SLEEP_DISABLED()  (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_USART5SMEN) == RESET)
-#define __HAL_RCC_LPUART1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_LPUART1SMEN) == RESET)
-#define __HAL_RCC_I2C1_IS_CLK_SLEEP_DISABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_I2C1SMEN) == RESET)
-#define __HAL_RCC_I2C2_IS_CLK_SLEEP_DISABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_I2C2SMEN) == RESET)
-#define __HAL_RCC_I2C3_IS_CLK_SLEEP_DISABLED()    (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_I2C3SMEN) == RESET)
-#define __HAL_RCC_DAC_IS_CLK_SLEEP_DISABLED()     (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_DACSMEN) == RESET)
-#define __HAL_RCC_LPTIM1_IS_CLK_SLEEP_DISABLED()  (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_LPTIM1SMEN) == RESET)
-#endif /*  STM32L071xx  ||  STM32L081xx  || */
-       /*  STM32L072xx  ||  STM32L082xx  || */
-       /*  STM32L073xx  ||  STM32L083xx  || */
-
-#if defined(STM32L011xx) || defined(STM32L021xx) || defined(STM32L031xx) || defined(STM32L041xx) 
-#define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE()     SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM2SMEN))
-#define __HAL_RCC_USART2_CLK_SLEEP_ENABLE()   SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_USART2SMEN))
-#define __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE()  SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_LPUART1SMEN))
-#define __HAL_RCC_I2C1_CLK_SLEEP_ENABLE()     SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_I2C1SMEN))
-#define __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE()   SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_LPTIM1SMEN))
-
-#define __HAL_RCC_TIM2_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM2SMEN))
-#define __HAL_RCC_USART2_CLK_SLEEP_DISABLE()  CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_USART2SMEN))
-#define __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_LPUART1SMEN))
-#define __HAL_RCC_I2C1_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_I2C1SMEN))
-#define __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE()  CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_LPTIM1SMEN))
-
-#define __HAL_RCC_TIM2_IS_CLK_SLEEP_ENABLED()     (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_TIM2SMEN) != RESET)
-#define __HAL_RCC_USART2_IS_CLK_SLEEP_ENABLED()   (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_USART2SMEN) != RESET)
-#define __HAL_RCC_LPUART1_IS_CLK_SLEEP_ENABLED()  (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_LPUART1SMEN) != RESET)
-#define __HAL_RCC_I2C1_IS_CLK_SLEEP_ENABLED()     (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_I2C1SMEN) != RESET)
-#define __HAL_RCC_LPTIM1_IS_CLK_SLEEP_ENABLED()   (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_LPTIM1SMEN) != RESET)
-#define __HAL_RCC_TIM2_IS_CLK_SLEEP_DISABLED()     (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_TIM2SMEN) == RESET)
-#define __HAL_RCC_USART2_IS_CLK_SLEEP_DISABLED()   (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_USART2SMEN) == RESET)
-#define __HAL_RCC_LPUART1_IS_CLK_SLEEP_DISABLED()  (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_LPUART1SMEN) == RESET)
-#define __HAL_RCC_I2C1_IS_CLK_SLEEP_DISABLED()     (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_I2C1SMEN) == RESET)
-#define __HAL_RCC_LPTIM1_IS_CLK_SLEEP_DISABLED()   (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_LPTIM1SMEN) == RESET)
-
-#endif /*  STM32L031xx  ||  STM32L041xx || STM32L011xx  || STM32L021xx */
-
-#if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined(STM32L031xx) && !defined(STM32L041xx) && !defined(STM32L051xx) && !defined(STM32L061xx) && !defined(STM32L071xx) && !defined(STM32L081xx) 
-#define __HAL_RCC_USB_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_USBSMEN))
-#define __HAL_RCC_USB_CLK_SLEEP_DISABLE()   CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_USBSMEN))
-#define __HAL_RCC_CRS_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_CRSSMEN))
-#define __HAL_RCC_CRS_CLK_SLEEP_DISABLE()   CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_CRSSMEN))
-
-#define __HAL_RCC_USB_IS_CLK_SLEEP_ENABLED()        (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_USBSMEN) != RESET)
-#define __HAL_RCC_USB_IS_CLK_SLEEP_DISABLED()       (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_USBSMEN) == RESET)
-#define __HAL_RCC_CRS_IS_CLK_SLEEP_ENABLED()        (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_CRSSMEN) != RESET)
-#define __HAL_RCC_CRS_IS_CLK_SLEEP_DISABLED()       (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_CRSSMEN) == RESET)
-#endif /* !(STM32L011xx) && !(STM32L021xx) && !(STM32L031xx ) && !(STM32L041xx ) && !(STM32L051xx ) && !(STM32L061xx )  && !(STM32L071xx ) && !(STM32L081xx ) */
-
-#if defined(STM32L053xx) || defined(STM32L063xx) || defined(STM32L073xx) || defined(STM32L083xx)
-#define __HAL_RCC_LCD_CLK_SLEEP_ENABLE()      SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_LCDSMEN))
-#define __HAL_RCC_LCD_CLK_SLEEP_DISABLE()     CLEAR_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_LCDSMEN))
-
-#define __HAL_RCC_LCD_IS_CLK_SLEEP_ENABLED()        (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_LCDSMEN) != RESET)
-#define __HAL_RCC_LCD_IS_CLK_SLEEP_DISABLED()       (READ_BIT(RCC->APB1SMENR, RCC_APB1SMENR_LCDSMEN) == RESET)
-#endif /* STM32L053xx || STM32L063xx || STM32L073xx  || STM32L083xx */
-
-/**
-  * @}
-  */
-
-#if defined(STM32L053xx) || defined(STM32L063xx) || defined(STM32L073xx) || defined(STM32L083xx) \
- || defined(STM32L052xx) || defined(STM32L062xx) || defined(STM32L072xx) || defined(STM32L082xx) \
- || defined(STM32L051xx) || defined(STM32L061xx) || defined(STM32L071xx) || defined(STM32L081xx) \
- || defined(STM32L031xx) || defined(STM32L041xx) || defined(STM32L011xx) || defined(STM32L021xx) 
-
-/** @defgroup RCCEx_APB2_Clock_Sleep_Enable_Disable APB2 Peripheral Clock Sleep Enable Disable
-  * @brief  Enable or disable the APB2 peripheral clock during Low Power (Sleep) mode.
-  * @note   Peripheral clock gating in SLEEP mode can be used to further reduce
-  *         power consumption.
-  * @note   After wakeup from SLEEP mode, the peripheral clock is enabled again.
-  * @note   By default, all peripheral clocks are enabled during SLEEP mode.
-  * @{
-  */
-#define __HAL_RCC_TIM21_CLK_SLEEP_ENABLE()   SET_BIT(RCC->APB2SMENR, (RCC_APB2SMENR_TIM21SMEN))
-#if !defined (STM32L011xx) && !defined (STM32L021xx)
-#define __HAL_RCC_TIM22_CLK_SLEEP_ENABLE()   SET_BIT(RCC->APB2SMENR, (RCC_APB2SMENR_TIM22SMEN))
-#endif
-#define __HAL_RCC_ADC1_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB2SMENR, (RCC_APB2SMENR_ADC1SMEN))
-#define __HAL_RCC_SPI1_CLK_SLEEP_ENABLE()    SET_BIT(RCC->APB2SMENR, (RCC_APB2SMENR_SPI1SMEN))
-#define __HAL_RCC_USART1_CLK_SLEEP_ENABLE()  SET_BIT(RCC->APB2SMENR, (RCC_APB2SMENR_USART1SMEN))
-
-#define __HAL_RCC_TIM21_CLK_SLEEP_DISABLE()   CLEAR_BIT(RCC->APB2SMENR,  (RCC_APB2SMENR_TIM21SMEN))
-#if !defined (STM32L011xx) && !defined (STM32L021xx)
-#define __HAL_RCC_TIM22_CLK_SLEEP_DISABLE()   CLEAR_BIT(RCC->APB2SMENR,  (RCC_APB2SMENR_TIM22SMEN))
-#endif
-#define __HAL_RCC_ADC1_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB2SMENR,  (RCC_APB2SMENR_ADC1SMEN))
-#define __HAL_RCC_SPI1_CLK_SLEEP_DISABLE()    CLEAR_BIT(RCC->APB2SMENR,  (RCC_APB2SMENR_SPI1SMEN))
-#define __HAL_RCC_USART1_CLK_SLEEP_DISABLE()  CLEAR_BIT(RCC->APB2SMENR,  (RCC_APB2SMENR_USART1SMEN))
-
-#define __HAL_RCC_TIM21_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM21SMEN) != RESET)
-#if !defined (STM32L011xx) && !defined (STM32L021xx)
-#define __HAL_RCC_TIM22_IS_CLK_SLEEP_ENABLED()    (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM22SMEN) != RESET)
-#endif
-#define __HAL_RCC_ADC1_IS_CLK_SLEEP_ENABLED()     (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_ADC1SMEN) != RESET)
-#define __HAL_RCC_SPI1_IS_CLK_SLEEP_ENABLED()     (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SPI1SMEN) != RESET)
-#define __HAL_RCC_USART1_IS_CLK_SLEEP_ENABLED()   (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_USART1SMEN) != RESET)
-
-#define __HAL_RCC_TIM21_IS_CLK_SLEEP_DISABLED()    (READ_BIT(RCC->APB2SMENR,  (RCC_APB2SMENR_TIM21SMEN) == RESET)
-#if !defined (STM32L011xx) && !defined (STM32L021xx)
-#define __HAL_RCC_TIM22_IS_CLK_SLEEP_DISABLED()    (READ_BIT(RCC->APB2SMENR,  (RCC_APB2SMENR_TIM22SMEN) == RESET)
-#endif
-#define __HAL_RCC_ADC1_IS_CLK_SLEEP_DISABLED()     (READ_BIT(RCC->APB2SMENR,  (RCC_APB2SMENR_ADC1SMEN) == RESET)
-#define __HAL_RCC_SPI1_IS_CLK_SLEEP_DISABLED()     (READ_BIT(RCC->APB2SMENR,  (RCC_APB2SMENR_SPI1SMEN) == RESET)
-#define __HAL_RCC_USART1_IS_CLK_SLEEP_DISABLED()   (READ_BIT(RCC->APB2SMENR,  (RCC_APB2SMENR_USART1SMEN) == RESET)
-
-/**
-  * @}
-  */
-
-#endif /* STM32L051xx  || STM32L061xx  || STM32L071xx  ||  STM32L081xx  || */
-       /* STM32L052xx  || STM32L062xx  || STM32L072xx  ||  STM32L082xx  || */
-       /* STM32L053xx  || STM32L063xx  || STM32L073xx  ||  STM32L083xx  || */
-       /* STM32L031xx  || STM32L041xx  || STM32L011xx  ||  STM32L021xx   */
-  
-
-/**
-  * @brief Enable interrupt on RCC LSE CSS EXTI Line 19.
-  * @retval None
-  */
-#define __HAL_RCC_LSECSS_EXTI_ENABLE_IT()      SET_BIT(EXTI->IMR, RCC_EXTI_LINE_LSECSS)
-
-/**
-  * @brief Disable interrupt on RCC LSE CSS EXTI Line 19.
-  * @retval None
-  */
-#define __HAL_RCC_LSECSS_EXTI_DISABLE_IT()     CLEAR_BIT(EXTI->IMR, RCC_EXTI_LINE_LSECSS)
-
-/**
-  * @brief Enable event on RCC LSE CSS EXTI Line 19.
-  * @retval None.
-  */
-#define __HAL_RCC_LSECSS_EXTI_ENABLE_EVENT()   SET_BIT(EXTI->EMR, RCC_EXTI_LINE_LSECSS)
-
-/**
-  * @brief Disable event on RCC LSE CSS EXTI Line 19.
-  * @retval None.
-  */
-#define __HAL_RCC_LSECSS_EXTI_DISABLE_EVENT()  CLEAR_BIT(EXTI->EMR, RCC_EXTI_LINE_LSECSS)
-
-
-/**
-  * @brief  RCC LSE CSS EXTI line configuration: set falling edge trigger.
-  * @retval None.
-  */
-#define __HAL_RCC_LSECSS_EXTI_ENABLE_FALLING_EDGE()  SET_BIT(EXTI->FTSR, RCC_EXTI_LINE_LSECSS)
-
-
-/**
-  * @brief Disable the RCC LSE CSS Extended Interrupt Falling Trigger.
-  * @retval None.
-  */
-#define __HAL_RCC_LSECSS_EXTI_DISABLE_FALLING_EDGE()  CLEAR_BIT(EXTI->FTSR, RCC_EXTI_LINE_LSECSS)
-
-
-/**
-  * @brief  RCC LSE CSS EXTI line configuration: set rising edge trigger.
-  * @retval None.
-  */
-#define __HAL_RCC_LSECSS_EXTI_ENABLE_RISING_EDGE()   SET_BIT(EXTI->RTSR, RCC_EXTI_LINE_LSECSS)
-
-/**
-  * @brief Disable the RCC LSE CSS Extended Interrupt Rising Trigger.
-  * @retval None.
-  */
-#define __HAL_RCC_LSECSS_EXTI_DISABLE_RISING_EDGE()  CLEAR_BIT(EXTI->RTSR, RCC_EXTI_LINE_LSECSS)
-
-/**
-  * @brief  RCC LSE CSS EXTI line configuration: set rising & falling edge trigger.
-  * @retval None.
-  */
-#define __HAL_RCC_LSECSS_EXTI_ENABLE_RISING_FALLING_EDGE()  \
-  do {                                                      \
-    __HAL_RCC_LSECSS_EXTI_ENABLE_RISING_EDGE();             \
-    __HAL_RCC_LSECSS_EXTI_ENABLE_FALLING_EDGE();            \
-  } while(0)  
-  
-/**
-  * @brief Disable the RCC LSE CSS Extended Interrupt Rising & Falling Trigger.
-  * @retval None.
-  */
-#define __HAL_RCC_LSECSS_EXTI_DISABLE_RISING_FALLING_EDGE()  \
-  do {                                                       \
-    __HAL_RCC_LSECSS_EXTI_DISABLE_RISING_EDGE();             \
-    __HAL_RCC_LSECSS_EXTI_DISABLE_FALLING_EDGE();            \
-  } while(0)  
-
-/**
-  * @brief Check whether the specified RCC LSE CSS EXTI interrupt flag is set or not.
-  * @retval EXTI RCC LSE CSS Line Status.
-  */
-#define __HAL_RCC_LSECSS_EXTI_GET_FLAG()       (EXTI->PR & (RCC_EXTI_LINE_LSECSS))
-
-/**
-  * @brief Clear the RCC LSE CSS EXTI flag.
-  * @retval None.
-  */
-#define __HAL_RCC_LSECSS_EXTI_CLEAR_FLAG()     (EXTI->PR = (RCC_EXTI_LINE_LSECSS))
-
-/**
-  * @brief Generate a Software interrupt on selected EXTI line.
-  * @retval None.
-  */
-#define __HAL_RCC_LSECSS_EXTI_GENERATE_SWIT()  SET_BIT(EXTI->SWIER, RCC_EXTI_LINE_LSECSS)
-
-
-#if defined(LCD)
-    
-/** @defgroup RCCEx_LCD_Configuration LCD Configuration
-  * @brief  Macros to configure clock source of LCD peripherals.
-  * @{
-  */  
-
-/** @brief Macro to configures LCD clock (LCDCLK).
-  *  @note   LCD and RTC use the same configuration
-  *  @note   LCD can however be used in the Stop low power mode if the LSE or LSI is used as the
-  *          LCD clock source.
-  *    
-  *  @param  __LCD_CLKSOURCE__ specifies the LCD clock source.
-  *          This parameter can be one of the following values:
-  *             @arg @ref RCC_RTCCLKSOURCE_LSE LSE selected as LCD clock
-  *             @arg @ref RCC_RTCCLKSOURCE_LSI LSI selected as LCD clock
-  *             @arg @ref RCC_RTCCLKSOURCE_HSE_DIV2 HSE divided by 2 selected as LCD clock
-  *             @arg @ref RCC_RTCCLKSOURCE_HSE_DIV4 HSE divided by 4 selected as LCD clock
-  *             @arg @ref RCC_RTCCLKSOURCE_HSE_DIV8 HSE divided by 8 selected as LCD clock
-  *             @arg @ref RCC_RTCCLKSOURCE_HSE_DIV16 HSE divided by 16 selected as LCD clock
-  */
-#define __HAL_RCC_LCD_CONFIG(__LCD_CLKSOURCE__) __HAL_RCC_RTC_CONFIG(__LCD_CLKSOURCE__)
-
-/** @brief Macro to get the LCD clock source.
-  */
-#define __HAL_RCC_GET_LCD_SOURCE()              __HAL_RCC_GET_RTC_SOURCE()
-
-/** @brief Macro to get the LCD clock pre-scaler.
-  */
-#define  __HAL_RCC_GET_LCD_HSE_PRESCALER()      __HAL_RCC_GET_RTC_HSE_PRESCALER()
-
-/**
-  * @}
-  */
-
-#endif /* LCD */
-
-/** @brief Macro to configure the I2C1 clock (I2C1CLK).
-  *
-  * @param  __I2C1_CLKSOURCE__ specifies the I2C1 clock source.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_I2C1CLKSOURCE_PCLK1 PCLK1 selected as I2C1 clock  
-  *            @arg @ref RCC_I2C1CLKSOURCE_HSI HSI selected as I2C1 clock
-  *            @arg @ref RCC_I2C1CLKSOURCE_SYSCLK System Clock selected as I2C1 clock 
-  */
-#define __HAL_RCC_I2C1_CONFIG(__I2C1_CLKSOURCE__) \
-                  MODIFY_REG(RCC->CCIPR, RCC_CCIPR_I2C1SEL, (uint32_t)(__I2C1_CLKSOURCE__))
-
-/** @brief  Macro to get the I2C1 clock source.
-  * @retval The clock source can be one of the following values:
-  *            @arg @ref RCC_I2C1CLKSOURCE_PCLK1 PCLK1 selected as I2C1 clock  
-  *            @arg @ref RCC_I2C1CLKSOURCE_HSI HSI selected as I2C1 clock
-  *            @arg @ref RCC_I2C1CLKSOURCE_SYSCLK System Clock selected as I2C1 clock
-  */
-#define __HAL_RCC_GET_I2C1_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR, RCC_CCIPR_I2C1SEL)))
-
-#if defined(RCC_CCIPR_I2C3SEL)  
-/** @brief Macro to configure the I2C3 clock (I2C3CLK).
-  *
-  * @param  __I2C3_CLKSOURCE__ specifies the I2C3 clock source.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_I2C3CLKSOURCE_PCLK1 PCLK1 selected as I2C3 clock  
-  *            @arg @ref RCC_I2C3CLKSOURCE_HSI HSI selected as I2C3 clock
-  *            @arg @ref RCC_I2C3CLKSOURCE_SYSCLK System Clock selected as I2C3 clock 
-  */
-#define __HAL_RCC_I2C3_CONFIG(__I2C3_CLKSOURCE__) \
-                  MODIFY_REG(RCC->CCIPR, RCC_CCIPR_I2C3SEL, (uint32_t)(__I2C3_CLKSOURCE__))
-
-/** @brief  Macro to get the I2C3 clock source.
-  * @retval The clock source can be one of the following values:
-  *            @arg @ref RCC_I2C3CLKSOURCE_PCLK1 PCLK1 selected as I2C3 clock  
-  *            @arg @ref RCC_I2C3CLKSOURCE_HSI HSI selected as I2C3 clock
-  *            @arg @ref RCC_I2C3CLKSOURCE_SYSCLK System Clock selected as I2C3 clock
-  */
-#define __HAL_RCC_GET_I2C3_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR, RCC_CCIPR_I2C3SEL)))
-
-#endif /* RCC_CCIPR_I2C3SEL */ 
-
-#if defined (RCC_CCIPR_USART1SEL)
-/** @brief Macro to configure the USART1 clock (USART1CLK).
-  *
-  * @param  __USART1_CLKSOURCE__ specifies the USART1 clock source.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_USART1CLKSOURCE_PCLK2 PCLK2 selected as USART1 clock
-  *            @arg @ref RCC_USART1CLKSOURCE_HSI HSI selected as USART1 clock
-  *            @arg @ref RCC_USART1CLKSOURCE_SYSCLK System Clock selected as USART1 clock
-  *            @arg @ref RCC_USART1CLKSOURCE_LSE LSE selected as USART1 clock
-  */
-#define __HAL_RCC_USART1_CONFIG(__USART1_CLKSOURCE__) \
-                  MODIFY_REG(RCC->CCIPR, RCC_CCIPR_USART1SEL, (uint32_t)(__USART1_CLKSOURCE__))
-
-/** @brief  Macro to get the USART1 clock source.
-  * @retval The clock source can be one of the following values:
-  *            @arg @ref RCC_USART1CLKSOURCE_PCLK2 PCLK2 selected as USART1 clock
-  *            @arg @ref RCC_USART1CLKSOURCE_HSI HSI selected as USART1 clock
-  *            @arg @ref RCC_USART1CLKSOURCE_SYSCLK System Clock selected as USART1 clock
-  *            @arg @ref RCC_USART1CLKSOURCE_LSE LSE selected as USART1 clock
-  */
-#define __HAL_RCC_GET_USART1_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR, RCC_CCIPR_USART1SEL)))
-#endif /* RCC_CCIPR_USART1SEL */
-
-/** @brief Macro to configure the USART2 clock (USART2CLK).
-  *
-  * @param  __USART2_CLKSOURCE__ specifies the USART2 clock source.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_USART2CLKSOURCE_PCLK1 PCLK1 selected as USART2 clock
-  *            @arg @ref RCC_USART2CLKSOURCE_HSI HSI selected as USART2 clock
-  *            @arg @ref RCC_USART2CLKSOURCE_SYSCLK System Clock selected as USART2 clock
-  *            @arg @ref RCC_USART2CLKSOURCE_LSE LSE selected as USART2 clock
-  */
-#define __HAL_RCC_USART2_CONFIG(__USART2_CLKSOURCE__) \
-                  MODIFY_REG(RCC->CCIPR, RCC_CCIPR_USART2SEL, (uint32_t)(__USART2_CLKSOURCE__))
-
-/** @brief  Macro to get the USART2 clock source.
-  * @retval The clock source can be one of the following values:
-  *            @arg @ref RCC_USART2CLKSOURCE_PCLK1 PCLK1 selected as USART2 clock
-  *            @arg @ref RCC_USART2CLKSOURCE_HSI HSI selected as USART2 clock
-  *            @arg @ref RCC_USART2CLKSOURCE_SYSCLK System Clock selected as USART2 clock
-  *            @arg @ref RCC_USART2CLKSOURCE_LSE LSE selected as USART2 clock
-  */
-#define __HAL_RCC_GET_USART2_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR, RCC_CCIPR_USART2SEL)))
-
-/** @brief Macro to configure the LPUART1 clock (LPUART1CLK).
-  *
-  * @param  __LPUART1_CLKSOURCE__ specifies the LPUART1 clock source.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_LPUART1CLKSOURCE_PCLK1 PCLK1 selected as LPUART1 clock
-  *            @arg @ref RCC_LPUART1CLKSOURCE_HSI HSI selected as LPUART1 clock
-  *            @arg @ref RCC_LPUART1CLKSOURCE_SYSCLK System Clock selected as LPUART1 clock
-  *            @arg @ref RCC_LPUART1CLKSOURCE_LSE LSE selected as LPUART1 clock
-  */
-#define __HAL_RCC_LPUART1_CONFIG(__LPUART1_CLKSOURCE__) \
-                  MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPUART1SEL, (uint32_t)(__LPUART1_CLKSOURCE__))
-
-/** @brief  Macro to get the LPUART1 clock source.
-  * @retval The clock source can be one of the following values:
-  *            @arg @ref RCC_LPUART1CLKSOURCE_PCLK1 PCLK1 selected as LPUART1 clock
-  *            @arg @ref RCC_LPUART1CLKSOURCE_HSI HSI selected as LPUART1 clock
-  *            @arg @ref RCC_LPUART1CLKSOURCE_SYSCLK System Clock selected as LPUART1 clock
-  *            @arg @ref RCC_LPUART1CLKSOURCE_LSE LSE selected as LPUART1 clock
-  */
-#define __HAL_RCC_GET_LPUART1_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR, RCC_CCIPR_LPUART1SEL)))
-
-/** @brief Macro to configure the LPTIM1 clock (LPTIM1CLK).
-  *
-  * @param  __LPTIM1_CLKSOURCE__ specifies the LPTIM1 clock source.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_LPTIM1CLKSOURCE_PCLK PCLK selected as LPTIM1 clock
-  *            @arg @ref RCC_LPTIM1CLKSOURCE_LSI  HSI  selected as LPTIM1 clock
-  *            @arg @ref RCC_LPTIM1CLKSOURCE_HSI  LSI  selected as LPTIM1 clock
-  *            @arg @ref RCC_LPTIM1CLKSOURCE_LSE  LSE  selected as LPTIM1 clock
-  */
-#define __HAL_RCC_LPTIM1_CONFIG(__LPTIM1_CLKSOURCE__) \
-                  MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPTIM1SEL, (uint32_t)(__LPTIM1_CLKSOURCE__))
-
-/** @brief  Macro to get the LPTIM1 clock source.
-  * @retval The clock source can be one of the following values:
-  *            @arg @ref RCC_LPTIM1CLKSOURCE_PCLK PCLK selected as LPUART1 clock
-  *            @arg @ref RCC_LPTIM1CLKSOURCE_LSI  HSI selected as LPUART1 clock
-  *            @arg @ref RCC_LPTIM1CLKSOURCE_HSI  System Clock selected as LPUART1 clock
-  *            @arg @ref RCC_LPTIM1CLKSOURCE_LSE  LSE selected as LPUART1 clock
-  */
-#define __HAL_RCC_GET_LPTIM1_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR, RCC_CCIPR_LPTIM1SEL)))
-
-#if defined(USB)
-/** @brief  Macro to configure the USB clock (USBCLK).
-  * @param  __USB_CLKSOURCE__ specifies the USB clock source.
-  *         This parameter can be one of the following values:
-  *            @arg @ref RCC_USBCLKSOURCE_HSI48  HSI48 selected as USB clock
-  *            @arg @ref RCC_USBCLKSOURCE_PLL PLL Clock selected as USB clock
-  */
-#define __HAL_RCC_USB_CONFIG(__USB_CLKSOURCE__) \
-                  MODIFY_REG(RCC->CCIPR, RCC_CCIPR_HSI48SEL, (uint32_t)(__USB_CLKSOURCE__))
-
-/** @brief  Macro to get the USB clock source.
-  * @retval The clock source can be one of the following values:
-  *            @arg @ref RCC_USBCLKSOURCE_HSI48  HSI48 selected as USB clock
-  *            @arg @ref RCC_USBCLKSOURCE_PLL PLL Clock selected as USB clock
-  */
-#define __HAL_RCC_GET_USB_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR, RCC_CCIPR_HSI48SEL)))
-#endif /* USB */
-
-#if defined(RNG)
-/** @brief  Macro to configure the RNG clock (RNGCLK).
-  * @param  __RNG_CLKSOURCE__ specifies the USB clock source.
-  *         This parameter can be one of the following values:
-  *            @arg @ref RCC_RNGCLKSOURCE_HSI48  HSI48 selected as RNG clock
-  *            @arg @ref RCC_RNGCLKSOURCE_PLLCLK PLL Clock selected as RNG clock
-  */
-#define __HAL_RCC_RNG_CONFIG(__RNG_CLKSOURCE__) \
-                  MODIFY_REG(RCC->CCIPR, RCC_CCIPR_HSI48SEL, (uint32_t)(__RNG_CLKSOURCE__))
-
-/** @brief  Macro to get the RNG clock source.
-  * @retval The clock source can be one of the following values:
-  *            @arg @ref RCC_RNGCLKSOURCE_HSI48  HSI48 selected as RNG clock
-  *            @arg @ref RCC_RNGCLKSOURCE_PLLCLK PLL Clock selected as RNG clock
-  */
-#define __HAL_RCC_GET_RNG_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR, RCC_CCIPR_HSI48SEL)))
-#endif /* RNG */
-
-#if defined(RCC_CCIPR_HSI48SEL)
-/** @brief Macro to select the HSI48M clock source 
-  * @note   This macro can be replaced by either __HAL_RCC_RNG_CONFIG or
-  *         __HAL_RCC_USB_CONFIG to configure respectively RNG or UBS clock sources.
-  *
-  * @param  __HSI48M_CLKSOURCE__ specifies the HSI48M clock source dedicated for 
-  *          USB an RNG peripherals.                 
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_HSI48M_PLL A dedicated 48MHZ PLL output.
-  *            @arg @ref RCC_HSI48M_HSI48 48MHZ issued from internal HSI48 oscillator. 
-  */
-#define __HAL_RCC_HSI48M_CONFIG(__HSI48M_CLKSOURCE__) \
-                  MODIFY_REG(RCC->CCIPR, RCC_CCIPR_HSI48SEL, (uint32_t)(__HSI48M_CLKSOURCE__))                    
-
-/** @brief  Macro to get the HSI48M clock source.
-  * @note   This macro can be replaced by either __HAL_RCC_GET_RNG_SOURCE or
-  *         __HAL_RCC_GET_USB_SOURCE to get respectively RNG or UBS clock sources.
-  * @retval The clock source can be one of the following values:
-  *           @arg @ref RCC_HSI48M_PLL A dedicated 48MHZ PLL output.
-  *            @arg @ref RCC_HSI48M_HSI48 48MHZ issued from internal HSI48 oscillator. 
-  */
-#define __HAL_RCC_GET_HSI48M_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR, RCC_CCIPR_HSI48SEL)))       
-#endif /* RCC_CCIPR_HSI48SEL */ 
-
-/**
-  * @brief    Macro to enable the force of the Internal High Speed oscillator (HSI)
-  *           in STOP mode to be quickly available as kernel clock for USART and I2C.
-  * @note     The Enable of this function has not effect on the HSION bit.
-  */
-#define __HAL_RCC_HSISTOP_ENABLE()  SET_BIT(RCC->CR, RCC_CR_HSIKERON)
-
-/**
-  * @brief    Macro to disable the force of the Internal High Speed oscillator (HSI)
-  *           in STOP mode to be quickly available as kernel clock for USART and I2C.
-  * @retval None
-  */
-#define __HAL_RCC_HSISTOP_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_HSIKERON)                   
-
-/**
-  * @brief  Macro to configures the External Low Speed oscillator (LSE) drive capability.
-  * @param  __RCC_LSEDRIVE__ specifies the new state of the LSE drive capability.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_LSEDRIVE_LOW LSE oscillator low drive capability.
-  *            @arg @ref RCC_LSEDRIVE_MEDIUMLOW LSE oscillator medium low drive capability.
-  *            @arg @ref RCC_LSEDRIVE_MEDIUMHIGH LSE oscillator medium high drive capability.
-  *            @arg @ref RCC_LSEDRIVE_HIGH LSE oscillator high drive capability.
-  * @retval None
-  */ 
-#define __HAL_RCC_LSEDRIVE_CONFIG(__RCC_LSEDRIVE__) (MODIFY_REG(RCC->CSR,\
-        RCC_CSR_LSEDRV, (uint32_t)(__RCC_LSEDRIVE__) ))
-
-/**
-  * @brief  Macro to configures the wake up from stop clock.
-  * @param  __RCC_STOPWUCLK__ specifies the clock source used after wake up from stop 
-  *   This parameter can be one of the following values:
-  *     @arg @ref RCC_STOP_WAKEUPCLOCK_MSI    MSI selected as system clock source
-  *     @arg @ref RCC_STOP_WAKEUPCLOCK_HSI    HSI selected as system clock source
-  * @retval None
-  */
-#define __HAL_RCC_WAKEUPSTOP_CLK_CONFIG(__RCC_STOPWUCLK__) (MODIFY_REG(RCC->CFGR,\
-        RCC_CFGR_STOPWUCK, (uint32_t)(__RCC_STOPWUCLK__) ))
-        
-#if defined(CRS)
-/**
-  * @brief  Enables the specified CRS interrupts.
-  * @param  __INTERRUPT__ specifies the CRS interrupt sources to be enabled.
-  *          This parameter can be any combination of the following values:
-  *              @arg @ref RCC_CRS_IT_SYNCOK
-  *              @arg @ref RCC_CRS_IT_SYNCWARN
-  *              @arg @ref RCC_CRS_IT_ERR
-  *              @arg @ref RCC_CRS_IT_ESYNC
-  * @retval None
-  */
-#define __HAL_RCC_CRS_ENABLE_IT(__INTERRUPT__)   SET_BIT(CRS->CR, (__INTERRUPT__))
-
-/**
-  * @brief  Disables the specified CRS interrupts.
-  * @param  __INTERRUPT__ specifies the CRS interrupt sources to be disabled.
-  *          This parameter can be any combination of the following values:
-  *              @arg @ref RCC_CRS_IT_SYNCOK
-  *              @arg @ref RCC_CRS_IT_SYNCWARN
-  *              @arg @ref RCC_CRS_IT_ERR
-  *              @arg @ref RCC_CRS_IT_ESYNC
-  * @retval None
-  */
-#define __HAL_RCC_CRS_DISABLE_IT(__INTERRUPT__)  CLEAR_BIT(CRS->CR,(__INTERRUPT__))
-
-/** @brief  Check the CRS interrupt has occurred or not.
-  * @param  __INTERRUPT__ specifies the CRS interrupt source to check.
-  *         This parameter can be one of the following values:
-  *              @arg @ref RCC_CRS_IT_SYNCOK
-  *              @arg @ref RCC_CRS_IT_SYNCWARN
-  *              @arg @ref RCC_CRS_IT_ERR
-  *              @arg @ref RCC_CRS_IT_ESYNC
-  * @retval The new state of __INTERRUPT__ (SET or RESET).
-  */
-#define __HAL_RCC_CRS_GET_IT_SOURCE(__INTERRUPT__)     ((CRS->CR & (__INTERRUPT__))? SET : RESET)
-
-/** @brief  Clear the CRS interrupt pending bits
-  *         bits to clear the selected interrupt pending bits.
-  * @param  __INTERRUPT__ specifies the interrupt pending bit to clear.
-  *         This parameter can be any combination of the following values:
-  *              @arg @ref RCC_CRS_IT_SYNCOK
-  *              @arg @ref RCC_CRS_IT_SYNCWARN
-  *              @arg @ref RCC_CRS_IT_ERR
-  *              @arg @ref RCC_CRS_IT_ESYNC
-  *              @arg @ref RCC_CRS_IT_TRIMOVF
-  *              @arg @ref RCC_CRS_IT_SYNCERR
-  *              @arg @ref RCC_CRS_IT_SYNCMISS
-  */
-#define __HAL_RCC_CRS_CLEAR_IT(__INTERRUPT__)  do { \
-                                                 if(((__INTERRUPT__) & RCC_CRS_IT_ERROR_MASK) != RESET) \
-                                                 { \
-                                                   WRITE_REG(CRS->ICR, CRS_ICR_ERRC | ((__INTERRUPT__) & ~RCC_CRS_IT_ERROR_MASK)); \
-                                                 } \
-                                                 else \
-                                                 { \
-                                                   WRITE_REG(CRS->ICR, (__INTERRUPT__)); \
-                                                 } \
-                                               } while(0)
-
-/**
-  * @brief  Checks whether the specified CRS flag is set or not.
-  * @param  __FLAG__ specifies the flag to check.
-  *          This parameter can be one of the following values:
-  *              @arg @ref RCC_CRS_FLAG_SYNCOK
-  *              @arg @ref RCC_CRS_FLAG_SYNCWARN
-  *              @arg @ref RCC_CRS_FLAG_ERR
-  *              @arg @ref RCC_CRS_FLAG_ESYNC
-  *              @arg @ref RCC_CRS_FLAG_TRIMOVF
-  *              @arg @ref RCC_CRS_FLAG_SYNCERR
-  *              @arg @ref RCC_CRS_FLAG_SYNCMISS
-  * @retval The new state of __FLAG__ (TRUE or FALSE).
-  */
-#define __HAL_RCC_CRS_GET_FLAG(__FLAG__)  ((CRS->ISR & (__FLAG__)) == (__FLAG__))
-
-/**
-  * @brief  Clears the CRS specified FLAG.
-  * @param __FLAG__ specifies the flag to clear.
-  *          This parameter can be one of the following values:
-  *              @arg @ref RCC_CRS_FLAG_SYNCOK
-  *              @arg @ref RCC_CRS_FLAG_SYNCWARN
-  *              @arg @ref RCC_CRS_FLAG_ERR
-  *              @arg @ref RCC_CRS_FLAG_ESYNC
-  *              @arg @ref RCC_CRS_FLAG_TRIMOVF
-  *              @arg @ref RCC_CRS_FLAG_SYNCERR
-  *              @arg @ref RCC_CRS_FLAG_SYNCMISS
-  * @retval None
-  */
-#define __HAL_RCC_CRS_CLEAR_FLAG(__FLAG__)     do { \
-                                                 if(((__FLAG__) & RCC_CRS_FLAG_ERROR_MASK) != RESET) \
-                                                 { \
-                                                   WRITE_REG(CRS->ICR, CRS_ICR_ERRC | ((__FLAG__) & ~RCC_CRS_FLAG_ERROR_MASK)); \
-                                                 } \
-                                                 else \
-                                                 { \
-                                                   WRITE_REG(CRS->ICR, (__FLAG__)); \
-                                                 } \
-                                               } while(0)
-
-/**
-  * @brief  Enables the oscillator clock for frequency error counter.
-  * @note   when the CEN bit is set the CRS_CFGR register becomes write-protected.
-  * @retval None
-  */
-#define __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE() SET_BIT(CRS->CR, CRS_CR_CEN)
-
-/**
-  * @brief  Disables the oscillator clock for frequency error counter.
-  * @retval None
-  */
-#define __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE()  CLEAR_BIT(CRS->CR, CRS_CR_CEN)
-
-/**
-  * @brief  Enables the automatic hardware adjustment of TRIM bits.
-  * @note   When the AUTOTRIMEN bit is set the CRS_CFGR register becomes write-protected.
-  * @retval None
-  */
-#define __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE()  SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN)
-
-/**
-  * @brief  Enables or disables the automatic hardware adjustment of TRIM bits.
-  * @retval None
-  */
-#define __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE()  CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN)
-
-/**
-  * @brief  Macro to calculate reload value to be set in CRS register according to target and sync frequencies
-  * @note   The RELOAD value should be selected according to the ratio between the target frequency and the frequency 
-  *             of the synchronization source after prescaling. It is then decreased by one in order to 
-  *             reach the expected synchronization on the zero value. The formula is the following:
-  *             RELOAD = (fTARGET / fSYNC) -1
-  * @param  __FTARGET__ Target frequency (value in Hz)
-  * @param  __FSYNC__   Synchronization signal frequency (value in Hz)
-  * @retval None
-  */
-#define __HAL_RCC_CRS_RELOADVALUE_CALCULATE(__FTARGET__, __FSYNC__)  (((__FTARGET__) / (__FSYNC__)) - 1)
-
-#endif /* CRS */
-
-
-#if defined(RCC_CR_HSIOUTEN)
-/** @brief  Enable he HSI OUT .
-  * @note   After reset, the HSI output is not available
-  */
-
-#define __HAL_RCC_HSI_OUT_ENABLE()   SET_BIT(RCC->CR, RCC_CR_HSIOUTEN)
-
-/** @brief  Disable the HSI OUT .
-  * @note   After reset, the HSI output is not available
-  */
-
-#define __HAL_RCC_HSI_OUT_DISABLE()  CLEAR_BIT(RCC->CR, RCC_CR_HSIOUTEN)
-
-#endif /* RCC_CR_HSIOUTEN */
-
-#if defined(STM32L053xx) || defined(STM32L063xx) || defined(STM32L073xx) || defined(STM32L083xx)\
-     || defined(STM32L052xx) || defined(STM32L062xx) || defined(STM32L072xx) || defined(STM32L082xx)
-
-/**
-  * @brief  Enable the Internal High Speed oscillator for USB (HSI48).
-  * @note   After enabling the HSI48, the application software should wait on 
-  *         HSI48RDY flag to be set indicating that HSI48 clock is stable and can
-  *         be used to clock the USB.
-  * @note   The HSI48 is stopped by hardware when entering STOP and STANDBY modes.
-  */
-#define __HAL_RCC_HSI48_ENABLE()  do { SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON);            \
-                                       SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN);       \
-                                       SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENREF_HSI48);  \
-                                  } while (0)
-/**
-  * @brief  Disable the Internal High Speed oscillator for USB (HSI48).
-  */
-#define __HAL_RCC_HSI48_DISABLE()  do { CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON);   \
-                                        CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENREF_HSI48);  \
-                                   } while (0)
-
-/** @brief  Macro to get the Internal 48Mhz High Speed oscillator (HSI48) state.
-  * @retval The clock source can be one of the following values:
-  *            @arg @ref RCC_HSI48_ON  HSI48 enabled
-  *            @arg @ref RCC_HSI48_OFF HSI48 disabled
-  */
-#define __HAL_RCC_GET_HSI48_STATE() \
-                  (((uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON)) != RESET) ? RCC_HSI48_ON : RCC_HSI48_OFF)  
-
-/** @brief  Enable or disable the HSI48M DIV6 OUT .
-  * @note   After reset, the HSI48Mhz (divided by 6) output is not available
-  */
-
-#define __HAL_RCC_HSI48M_DIV6_OUT_ENABLE()   SET_BIT(RCC->CR, RCC_CRRCR_HSI48DIV6OUTEN)
-#define __HAL_RCC_HSI48M_DIV6_OUT_DISABLE()  CLEAR_BIT(RCC->CR, RCC_CRRCR_HSI48DIV6OUTEN)
-
-#endif /* STM32L071xx  ||  STM32L081xx  || */
-       /* STM32L072xx  ||  STM32L082xx  || */
-       /* STM32L073xx  ||  STM32L083xx     */
-       
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup RCCEx_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup RCCEx_Exported_Functions_Group1
-  * @{
-  */
-
-HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit);
-void              HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit);
-uint32_t          HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk);
-
-
-void              HAL_RCCEx_EnableLSECSS(void);
-void              HAL_RCCEx_DisableLSECSS(void);
-void              HAL_RCCEx_EnableLSECSS_IT(void);
-void              HAL_RCCEx_LSECSS_IRQHandler(void);
-void              HAL_RCCEx_LSECSS_Callback(void);
-
-
-#if defined(SYSCFG_CFGR3_ENREF_HSI48)
-void HAL_RCCEx_EnableHSI48_VREFINT(void);
-void HAL_RCCEx_DisableHSI48_VREFINT(void);
-#endif /* SYSCFG_CFGR3_ENREF_HSI48 */
-
-/**
-  * @}
-  */
-
-#if defined(CRS)
-
-/** @addtogroup RCCEx_Exported_Functions_Group3
-  * @{
-  */
-
-void              HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit);
-void              HAL_RCCEx_CRSSoftwareSynchronizationGenerate(void);
-void              HAL_RCCEx_CRSGetSynchronizationInfo(RCC_CRSSynchroInfoTypeDef *pSynchroInfo);
-uint32_t          HAL_RCCEx_CRSWaitSynchronization(uint32_t Timeout);
-void              HAL_RCCEx_CRS_IRQHandler(void);
-void              HAL_RCCEx_CRS_SyncOkCallback(void);
-void              HAL_RCCEx_CRS_SyncWarnCallback(void);
-void              HAL_RCCEx_CRS_ExpectedSyncCallback(void);
-void              HAL_RCCEx_CRS_ErrorCallback(uint32_t Error);
-
-/**
-  * @}
-  */
-
-#endif /* CRS */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-/**
-  * @}
-  */
-  
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_RCC_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rng.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rng.h
deleted file mode 100755
index 544702f6..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rng.h
+++ /dev/null
@@ -1,308 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_rng.h
-
-  * @author  MCD Application Team
-  * @brief   Header file of RNG HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_RNG_H
-#define __STM32L0xx_HAL_RNG_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#if defined (STM32L052xx) || defined (STM32L053xx) || defined (STM32L062xx) ||  defined (STM32L063xx) || \
-    defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) ||  defined (STM32L083xx)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup RNG RNG
-  * @brief RNG HAL module driver
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/ 
-
-/** @defgroup RNG_Exported_Types RNG Exported Types
-  * @{
-  */
-
-/** @defgroup RNG_Exported_Types_Group1 RNG State Structure definition 
-  * @{
-  */
-typedef enum
-{
-  HAL_RNG_STATE_RESET     = 0x00U,  /*!< RNG not yet initialized or disabled */
-  HAL_RNG_STATE_READY     = 0x01U,  /*!< RNG initialized and ready for use   */
-  HAL_RNG_STATE_BUSY      = 0x02U,  /*!< RNG internal process is ongoing     */ 
-  HAL_RNG_STATE_TIMEOUT   = 0x03U,  /*!< RNG timeout state                   */
-  HAL_RNG_STATE_ERROR     = 0x04U   /*!< RNG error state                     */
-    
-}HAL_RNG_StateTypeDef;
-
-/** 
-  * @}
-  */
-
-/** @defgroup RNG_Exported_Types_Group2 RNG Handle Structure definition   
-  * @{
-  */ 
-typedef struct
-{
-  RNG_TypeDef                 *Instance;    /*!< Register base address   */ 
-  
-  HAL_LockTypeDef             Lock;         /*!< RNG locking object      */
-  
-  __IO HAL_RNG_StateTypeDef   State;        /*!< RNG communication state */
-  
-  uint32_t                    RandomNumber; /*!< Last Generated RNG Data */
-  
-}RNG_HandleTypeDef;
-
-/** 
-  * @}
-  */
-
-/**
-  * @}
-  */ 
-   
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup RNG_Exported_Constants RNG Exported Constants
-  * @{
-  */
-
-/** @defgroup RNG_Exported_Constants_Group1 RNG Interrupt definition
-  * @{
-  */ 
-#define RNG_IT_DRDY  ((uint32_t)RNG_SR_DRDY)  /*!< Data ready interrupt */
-#define RNG_IT_CEI   ((uint32_t)RNG_SR_CEIS)  /*!< Clock error interrupt */
-#define RNG_IT_SEI   ((uint32_t)RNG_SR_SEIS)  /*!< Seed error interrupt  */
-
-
-/**
-  * @}
-  */
-
-/** @defgroup RNG_Exported_Constants_Group2 RNG Flag definition
-  * @{
-  */ 
-#define RNG_FLAG_DRDY   ((uint32_t)RNG_SR_DRDY)  /*!< Data ready                 */
-#define RNG_FLAG_CECS   ((uint32_t)RNG_SR_CECS)  /*!< Clock error current status */
-#define RNG_FLAG_SECS   ((uint32_t)RNG_SR_SECS)  /*!< Seed error current status  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */ 
-  
-/* Exported macros -----------------------------------------------------------*/
-/** @defgroup RNG_Exported_Macros RNG Exported Macros
-  * @{
-  */
-
-/** @brief Reset RNG handle state
-  * @param  __HANDLE__: RNG Handle
-  * @retval None
-  */
-#define __HAL_RNG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RNG_STATE_RESET)
-
-/**
-  * @brief  Enables the RNG peripheral.
-  * @param  __HANDLE__: RNG Handle
-  * @retval None
-  */
-#define __HAL_RNG_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |=  RNG_CR_RNGEN)
-
-/**
-  * @brief  Disables the RNG peripheral.
-  * @param  __HANDLE__: RNG Handle
-  * @retval None
-  */
-#define __HAL_RNG_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_RNGEN)
-
-/**
-  * @brief  Check the selected RNG flag status.
-  * @param  __HANDLE__: RNG Handle
-  * @param  __FLAG__: RNG flag
-  *          This parameter can be one of the following values:
-  *            @arg RNG_FLAG_DRDY:  Data ready                
-  *            @arg RNG_FLAG_CECS:  Clock error current status
-  *            @arg RNG_FLAG_SECS:  Seed error current status 
-  * @retval The new state of __FLAG__ (SET or RESET).
-  */
-#define __HAL_RNG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
-
-
-/**
-  * @brief  Clears the selected RNG flag status.
-  * @param  __HANDLE__: RNG handle
-  * @param  __FLAG__: RNG flag to clear  
-  * @note   WARNING: This is a dummy macro for HAL code alignment,
-  *         flags RNG_FLAG_DRDY, RNG_FLAG_CECS and RNG_FLAG_SECS are read-only.
-  * @retval None
-  */
-#define __HAL_RNG_CLEAR_FLAG(__HANDLE__, __FLAG__)                      /* dummy  macro */
-
-
-
-/**
-  * @brief  Enables the RNG interrupts.
-  * @param  __HANDLE__: RNG Handle
-  * @retval None
-  */
-#define __HAL_RNG_ENABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR |=  RNG_CR_IE)
-    
-/**
-  * @brief  Disables the RNG interrupts.
-  * @param  __HANDLE__: RNG Handle
-  * @retval None
-  */
-#define __HAL_RNG_DISABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_IE)
-
-/**
-  * @brief  Checks whether the specified RNG interrupt has occurred or not.
-  * @param  __HANDLE__: RNG Handle
-  * @param  __INTERRUPT__: specifies the RNG interrupt status flag to check.
-  *         This parameter can be one of the following values:
-  *            @arg RNG_IT_DRDY: Data ready interrupt              
-  *            @arg RNG_IT_CEI: Clock error interrupt
-  *            @arg RNG_IT_SEI: Seed error interrupt
-  * @retval The new state of __INTERRUPT__ (SET or RESET).
-  */
-#define __HAL_RNG_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR & (__INTERRUPT__)) == (__INTERRUPT__))   
-
-/**
-  * @brief  Clears the RNG interrupt status flags.
-  * @param  __HANDLE__: RNG Handle
-  * @param  __INTERRUPT__: specifies the RNG interrupt status flag to clear.
-  *          This parameter can be one of the following values:            
-  *            @arg RNG_IT_CEI: Clock error interrupt
-  *            @arg RNG_IT_SEI: Seed error interrupt
-  * @note   RNG_IT_DRDY flag is read-only, reading RNG_DR register automatically clears RNG_IT_DRDY.          
-  * @retval None
-  */
-#define __HAL_RNG_CLEAR_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR) = ~(__INTERRUPT__))
-
-/**
-  * @}
-  */ 
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup RNG_Exported_Functions RNG Exported Functions
-  * @{
-  */
-
-/* Initialization and de-initialization functions  ******************************/
-/** @defgroup RNG_Exported_Functions_Group1 Initialization and de-initialization functions
-  * @{
-  */  
-HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng);
-HAL_StatusTypeDef HAL_RNG_DeInit (RNG_HandleTypeDef *hrng);
-void HAL_RNG_MspInit(RNG_HandleTypeDef *hrng);
-void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng);
-
-/**
-  * @}
-  */ 
-
-/* Peripheral Control functions  ************************************************/
-/** @defgroup RNG_Exported_Functions_Group2 Peripheral Control functions
-  * @{
-  */
-uint32_t HAL_RNG_GetRandomNumber(RNG_HandleTypeDef *hrng);    /* Obsolete, use HAL_RNG_GenerateRandomNumber() instead    */
-uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber_IT() instead */
-
-HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit);
-HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber_IT(RNG_HandleTypeDef *hrng);
-uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng);
-
-void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng);
-void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng);
-void HAL_RNG_ReadyDataCallback(RNG_HandleTypeDef* hrng, uint32_t random32bit);
-
-/**
-  * @}
-  */ 
-
-/* Peripheral State functions  **************************************************/
-/** @defgroup RNG_Exported_Functions_Group3 Peripheral State functions
-  * @{
-  */
-HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng);
-/**
-  * @}
-  */
-  
-/**
-  * @}
-  */ 
-
-/* Define the private group ***********************************/
-/**************************************************************/
-/** @defgroup RNG_Private RNG Private
-  * @{
-  */
-/**
-  * @}
-  */
-/**************************************************************/
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-#endif /*  if defined (STM32L052xx) || defined (STM32L053xx) || defined (STM32L062xx) ||  defined (STM32L063xx) || \
-           defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) ||  defined (STM32L083xx)         */
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_RNG_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h
deleted file mode 100755
index 597d1f70..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h
+++ /dev/null
@@ -1,904 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_rtc.h
-  * @author  MCD Application Team
-  * @brief   Header file of RTC HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_RTC_H
-#define __STM32L0xx_HAL_RTC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup RTC RTC
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/ 
-/** @defgroup RTC_Exported_Types RTC Exported Types
-  * @{
-  */
-
-/** 
-  * @brief  HAL State structures definition  
-  */
-typedef enum
-{
-  HAL_RTC_STATE_RESET             = 0x00U,  /*!< RTC not yet initialized or disabled */
-  HAL_RTC_STATE_READY             = 0x01U,  /*!< RTC initialized and ready for use   */
-  HAL_RTC_STATE_BUSY              = 0x02U,  /*!< RTC process is ongoing              */
-  HAL_RTC_STATE_TIMEOUT           = 0x03U,  /*!< RTC timeout state                   */
-  HAL_RTC_STATE_ERROR             = 0x04U   /*!< RTC error state                     */
-
-}HAL_RTCStateTypeDef;
-
-/** 
-  * @brief  RTC Configuration Structure definition
-  */
-typedef struct
-{
-  uint32_t HourFormat;      /*!< Specifies the RTC Hour Format.
-                                 This parameter can be a value of @ref RTC_Hour_Formats */
-
-  uint32_t AsynchPrediv;    /*!< Specifies the RTC Asynchronous Predivider value.
-                                 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7F */
-                               
-  uint32_t SynchPrediv;     /*!< Specifies the RTC Synchronous Predivider value.
-                                 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7FFF */
-
-  uint32_t OutPut;          /*!< Specifies which signal will be routed to the RTC output.
-                                 This parameter can be a value of @ref RTCEx_Output_selection_Definitions */
-
-  uint32_t OutPutRemap;    /*!< Specifies the remap for RTC output.
-                                 This parameter can be a value of @ref  RTC_Output_ALARM_OUT_Remap */
-
-  uint32_t OutPutPolarity;  /*!< Specifies the polarity of the output signal.  
-                                 This parameter can be a value of @ref RTC_Output_Polarity_Definitions */
-
-  uint32_t OutPutType;      /*!< Specifies the RTC Output Pin mode.
-                                 This parameter can be a value of @ref RTC_Output_Type_ALARM_OUT */
-}RTC_InitTypeDef;
-
-/** 
-  * @brief  RTC Time structure definition  
-  */
-typedef struct
-{
-  uint8_t Hours;            /*!< Specifies the RTC Time Hour.
-                                 This parameter must be a number between Min_Data = 0 and Max_Data = 12 if the RTC_HourFormat_12 is selected.
-                                 This parameter must be a number between Min_Data = 0 and Max_Data = 23 if the RTC_HourFormat_24 is selected */
-
-  uint8_t Minutes;          /*!< Specifies the RTC Time Minutes.
-                                 This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
-
-  uint8_t Seconds;          /*!< Specifies the RTC Time Seconds.
-                                 This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
-
-  uint8_t TimeFormat;       /*!< Specifies the RTC AM/PM Time.
-                                 This parameter can be a value of @ref RTC_AM_PM_Definitions */
-  
-  uint32_t SubSeconds;     /*!< Specifies the RTC_SSR RTC Sub Second register content.
-                                 This parameter corresponds to a time unit range between [0-1] Second
-                                 with [1 Sec / SecondFraction +1] granularity */
- 
-  uint32_t SecondFraction;  /*!< Specifies the range or granularity of Sub Second register content
-                                 corresponding to Synchronous pre-scaler factor value (PREDIV_S)
-                                 This parameter corresponds to a time unit range between [0-1] Second
-                                 with [1 Sec / SecondFraction +1] granularity.
-                                 This field will be used only by HAL_RTC_GetTime function */
-  
-  uint32_t DayLightSaving;  /*!< Specifies RTC_DayLightSaveOperation: the value of hour adjustment.
-                                 This parameter can be a value of @ref RTC_DayLightSaving_Definitions */
-
-  uint32_t StoreOperation;  /*!< Specifies RTC_StoreOperation value to be written in the BCK bit 
-                                 in CR register to store the operation.
-                                 This parameter can be a value of @ref RTC_StoreOperation_Definitions */
-}RTC_TimeTypeDef;
-
-/** 
-  * @brief  RTC Date structure definition
-  */
-typedef struct
-{
-  uint8_t WeekDay;  /*!< Specifies the RTC Date WeekDay.
-                         This parameter can be a value of @ref RTC_WeekDay_Definitions */
-
-  uint8_t Month;    /*!< Specifies the RTC Date Month (in BCD format).
-                         This parameter can be a value of @ref RTC_Month_Date_Definitions */
-
-  uint8_t Date;     /*!< Specifies the RTC Date.
-                         This parameter must be a number between Min_Data = 1 and Max_Data = 31 */
-
-  uint8_t Year;     /*!< Specifies the RTC Date Year.
-                         This parameter must be a number between Min_Data = 0 and Max_Data = 99 */
-
-}RTC_DateTypeDef;
-
-/** 
-  * @brief  RTC Alarm structure definition
-  */
-typedef struct
-{
-  RTC_TimeTypeDef AlarmTime;     /*!< Specifies the RTC Alarm Time members */
-
-  uint32_t AlarmMask;            /*!< Specifies the RTC Alarm Masks.
-                                      This parameter can be a value of @ref RTC_AlarmMask_Definitions */
-  
-  uint32_t AlarmSubSecondMask;   /*!< Specifies the RTC Alarm SubSeconds Masks.
-                                      This parameter can be a value of @ref RTC_Alarm_Sub_Seconds_Masks_Definitions */
-
-  uint32_t AlarmDateWeekDaySel;  /*!< Specifies the RTC Alarm is on Date or WeekDay.
-                                     This parameter can be a value of @ref RTC_AlarmDateWeekDay_Definitions */
-
-  uint8_t AlarmDateWeekDay;      /*!< Specifies the RTC Alarm Date/WeekDay.
-                                      If the Alarm Date is selected, this parameter must be set to a value in the 1-31 range.
-                                      If the Alarm WeekDay is selected, this parameter can be a value of @ref RTC_WeekDay_Definitions */
-
-  uint32_t Alarm;                /*!< Specifies the alarm .
-                                      This parameter can be a value of @ref RTC_Alarms_Definitions */
-}RTC_AlarmTypeDef;
-
-/** 
-  * @brief  RTC Handle Structure definition  
-  */ 
-typedef struct
-{
-  RTC_TypeDef               *Instance;  /*!< Register base address    */
-
-  RTC_InitTypeDef           Init;       /*!< RTC required parameters  */
-
-  HAL_LockTypeDef           Lock;       /*!< RTC locking object       */
-
-  __IO HAL_RTCStateTypeDef  State;      /*!< Time communication state */
-
-}RTC_HandleTypeDef;
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup RTC_Exported_Constants RTC Exported Constants
-  * @{
-  */
- 
-/** @defgroup RTC_Hour_Formats RTC Hour Formats
-  * @{
-  */
-#define RTC_HOURFORMAT_24              ((uint32_t)0x00000000U)
-#define RTC_HOURFORMAT_12              ((uint32_t)RTC_CR_FMT)
-
-/**
-  * @}
-  */
-
-
-/** @defgroup RTC_Output_Polarity_Definitions RTC Output Polarity Definitions
-  * @{
-  */
-#define RTC_OUTPUT_POLARITY_HIGH       ((uint32_t)0x00000000U)
-#define RTC_OUTPUT_POLARITY_LOW        ((uint32_t)RTC_CR_POL)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Output_Type_ALARM_OUT RTC Output Type ALARM OUT
-  * @{
-  */
-#define RTC_OUTPUT_TYPE_OPENDRAIN      ((uint32_t)0x00000000U)
-#define RTC_OUTPUT_TYPE_PUSHPULL       ((uint32_t)RTC_OR_ALARMOUTTYPE)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Output_ALARM_OUT_Remap RTC Output ALARM OUT Remap
-  * @{
-  */
-#define RTC_OUTPUT_REMAP_NONE              ((uint32_t)0x00000000U)
-#define RTC_OUTPUT_REMAP_POS1               ((uint32_t)RTC_OR_OUT_RMP)
-/**
-  * @}
-  */
-  
-/** @defgroup RTC_AM_PM_Definitions RTC AM PM Definitions
-  * @{
-  */
-#define RTC_HOURFORMAT12_AM            ((uint8_t)0x00U)
-#define RTC_HOURFORMAT12_PM            ((uint8_t)0x40U)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_DayLightSaving_Definitions RTC DayLightSaving Definitions
-  * @{
-  */
-#define RTC_DAYLIGHTSAVING_SUB1H       ((uint32_t)RTC_CR_SUB1H)
-#define RTC_DAYLIGHTSAVING_ADD1H       ((uint32_t)RTC_CR_ADD1H)
-#define RTC_DAYLIGHTSAVING_NONE        ((uint32_t)0x00000000U)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_StoreOperation_Definitions RTC StoreOperation Definitions
-  * @{
-  */
-#define RTC_STOREOPERATION_RESET        ((uint32_t)0x00000000U)
-#define RTC_STOREOPERATION_SET          ((uint32_t)RTC_CR_BCK)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Input_parameter_format_definitions RTC Input Parameter Format Definitions
-  * @{
-  */
-#define RTC_FORMAT_BIN   ((uint32_t)0x000000000U)
-#define RTC_FORMAT_BCD   ((uint32_t)0x000000001U)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Month_Date_Definitions RTC Month Date Definitions
-  * @{
-  */
-
-/* Coded in BCD format */
-#define RTC_MONTH_JANUARY              ((uint8_t)0x01U)
-#define RTC_MONTH_FEBRUARY             ((uint8_t)0x02U)
-#define RTC_MONTH_MARCH                ((uint8_t)0x03U)
-#define RTC_MONTH_APRIL                ((uint8_t)0x04U)
-#define RTC_MONTH_MAY                  ((uint8_t)0x05U)
-#define RTC_MONTH_JUNE                 ((uint8_t)0x06U)
-#define RTC_MONTH_JULY                 ((uint8_t)0x07U)
-#define RTC_MONTH_AUGUST               ((uint8_t)0x08U)
-#define RTC_MONTH_SEPTEMBER            ((uint8_t)0x09U)
-#define RTC_MONTH_OCTOBER              ((uint8_t)0x10U)
-#define RTC_MONTH_NOVEMBER             ((uint8_t)0x11U)
-#define RTC_MONTH_DECEMBER             ((uint8_t)0x12U)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_WeekDay_Definitions RTC WeekDay Definitions
-  * @{
-  */
-#define RTC_WEEKDAY_MONDAY             ((uint8_t)0x01U)
-#define RTC_WEEKDAY_TUESDAY            ((uint8_t)0x02U)
-#define RTC_WEEKDAY_WEDNESDAY          ((uint8_t)0x03U)
-#define RTC_WEEKDAY_THURSDAY           ((uint8_t)0x04U)
-#define RTC_WEEKDAY_FRIDAY             ((uint8_t)0x05U)
-#define RTC_WEEKDAY_SATURDAY           ((uint8_t)0x06U)
-#define RTC_WEEKDAY_SUNDAY             ((uint8_t)0x07U)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_AlarmDateWeekDay_Definitions RTC AlarmDateWeekDay Definitions
-  * @{
-  */
-#define RTC_ALARMDATEWEEKDAYSEL_DATE      ((uint32_t)0x00000000U)
-#define RTC_ALARMDATEWEEKDAYSEL_WEEKDAY   RTC_ALRMAR_WDSEL
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_AlarmMask_Definitions RTC AlarmMask Definitions
-  * @{
-  */
-#define RTC_ALARMMASK_NONE             ((uint32_t)0x00000000U)
-#define RTC_ALARMMASK_DATEWEEKDAY       RTC_ALRMAR_MSK4
-#define RTC_ALARMMASK_HOURS             RTC_ALRMAR_MSK3
-#define RTC_ALARMMASK_MINUTES           RTC_ALRMAR_MSK2
-#define RTC_ALARMMASK_SECONDS           RTC_ALRMAR_MSK1
-#define RTC_ALARMMASK_ALL               ((uint32_t) (RTC_ALARMMASK_NONE        | \
-                                                     RTC_ALARMMASK_DATEWEEKDAY | \
-                                                     RTC_ALARMMASK_HOURS       | \
-                                                     RTC_ALARMMASK_MINUTES     | \
-                                                     RTC_ALARMMASK_SECONDS))
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Alarms_Definitions RTC Alarms Definitions
-  * @{
-  */
-#define RTC_ALARM_A                       RTC_CR_ALRAE
-#define RTC_ALARM_B                       RTC_CR_ALRBE
-
-/**
-  * @}
-  */
-
-
-  /** @defgroup RTC_Alarm_Sub_Seconds_Masks_Definitions RTC Alarm Sub Seconds Masks Definitions
-  * @{
-  */
-#define RTC_ALARMSUBSECONDMASK_ALL        ((uint32_t)0x00000000U)                                                                 /*!< All Alarm SS fields are masked.
-                                                                                                                                    There is no comparison on sub seconds
-                                                                                                                                    for Alarm */
-#define RTC_ALARMSUBSECONDMASK_SS14_1      RTC_ALRMASSR_MASKSS_0                                                                 /*!< SS[14:1] are don't care in Alarm
-                                                                                                                                    comparison. Only SS[0] is compared.    */
-#define RTC_ALARMSUBSECONDMASK_SS14_2      RTC_ALRMASSR_MASKSS_1                                                                 /*!< SS[14:2] are don't care in Alarm
-                                                                                                                                     comparison. Only SS[1:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_3      ((uint32_t) (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_1))                          /*!< SS[14:3] are don't care in Alarm
-                                                                                                                                     comparison. Only SS[2:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_4      RTC_ALRMASSR_MASKSS_2                                                                 /*!< SS[14:4] are don't care in Alarm
-                                                                                                                                     comparison. Only SS[3:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_5      ((uint32_t) (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_2))                          /*!< SS[14:5] are don't care in Alarm
-                                                                                                                                      comparison. Only SS[4:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_6      ((uint32_t) (RTC_ALRMASSR_MASKSS_1 | RTC_ALRMASSR_MASKSS_2))                          /*!< SS[14:6] are don't care in Alarm
-                                                                                                                                      comparison. Only SS[5:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_7      ((uint32_t) (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_1 | RTC_ALRMASSR_MASKSS_2))  /*!< SS[14:7] are don't care in Alarm
-                                                                                                                                `     comparison. Only SS[6:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_8      RTC_ALRMASSR_MASKSS_3                                                                 /*!< SS[14:8] are don't care in Alarm
-                                                                                                                                      comparison. Only SS[7:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_9      ((uint32_t) (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_3))                          /*!< SS[14:9] are don't care in Alarm
-                                                                                                                                      comparison. Only SS[8:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_10     ((uint32_t) (RTC_ALRMASSR_MASKSS_1 | RTC_ALRMASSR_MASKSS_3))                          /*!< SS[14:10] are don't care in Alarm
-                                                                                                                                      comparison. Only SS[9:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_11     ((uint32_t) (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_1 | RTC_ALRMASSR_MASKSS_3))  /*!< SS[14:11] are don't care in Alarm
-                                                                                                                                      comparison. Only SS[10:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_SS14_12     ((uint32_t) (RTC_ALRMASSR_MASKSS_2 | RTC_ALRMASSR_MASKSS_3))                          /*!< SS[14:12] are don't care in Alarm
-                                                                                                                                      comparison.Only SS[11:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_13     ((uint32_t) (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_2 | RTC_ALRMASSR_MASKSS_3))  /*!< SS[14:13] are don't care in Alarm
-                                                                                                                                      comparison. Only SS[12:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_SS14        ((uint32_t) (RTC_ALRMASSR_MASKSS_1 | RTC_ALRMASSR_MASKSS_2 | RTC_ALRMASSR_MASKSS_3))  /*!< SS[14] is don't care in Alarm
-                                                                                                                                      comparison.Only SS[13:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_NONE        RTC_ALRMASSR_MASKSS                                                                   /*!< SS[14:0] are compared and must match
-                                                                                                                                      to activate alarm. */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Interrupts_Definitions RTC Interrupts Definitions
-  * @{
-  */
-#define RTC_IT_TS                         ((uint32_t)RTC_CR_TSIE)        /*!< Enable Timestamp Interrupt    */
-#define RTC_IT_WUT                        ((uint32_t)RTC_CR_WUTIE)       /*!< Enable Wakeup timer Interrupt */
-#define RTC_IT_ALRA                       ((uint32_t)RTC_CR_ALRAIE)      /*!< Enable Alarm A Interrupt      */
-#define RTC_IT_ALRB                       ((uint32_t)RTC_CR_ALRBIE)      /*!< Enable Alarm B Interrupt      */
-#define RTC_IT_TAMP                       ((uint32_t)RTC_TAMPCR_TAMPIE)  /*!< Enable all Tamper Interrupt   */
-
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
-    defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx)
-
-#define RTC_IT_TAMP1                      ((uint32_t)RTC_TAMPCR_TAMP1IE) /*!< Enable Tamper 1 Interrupt     */
-#endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
-        * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
-        * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
-        * (STM32L031xx) || (STM32L041xx)
-        */
-#define RTC_IT_TAMP2                      ((uint32_t)RTC_TAMPCR_TAMP2IE) /*!< Enable Tamper 2 Interrupt     */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Flags_Definitions RTC Flags Definitions
-  * @{
-  */
-#define RTC_FLAG_RECALPF                  ((uint32_t)RTC_ISR_RECALPF)
-#define RTC_FLAG_TAMP2F                   ((uint32_t)RTC_ISR_TAMP2F)
-
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
-    defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx)
-#define RTC_FLAG_TAMP1F                   ((uint32_t)RTC_ISR_TAMP1F)
-#endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
-        * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
-        * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
-        * (STM32L031xx) || (STM32L041xx)
-        */
-
-#define RTC_FLAG_TSOVF                    ((uint32_t)RTC_ISR_TSOVF)
-#define RTC_FLAG_TSF                      ((uint32_t)RTC_ISR_TSF)
-#define RTC_FLAG_WUTF                     ((uint32_t)RTC_ISR_WUTF)
-#define RTC_FLAG_ALRBF                    ((uint32_t)RTC_ISR_ALRBF)
-#define RTC_FLAG_ALRAF                    ((uint32_t)RTC_ISR_ALRAF)
-#define RTC_FLAG_INITF                    ((uint32_t)RTC_ISR_INITF)
-#define RTC_FLAG_RSF                      ((uint32_t)RTC_ISR_RSF)
-#define RTC_FLAG_INITS                    ((uint32_t)RTC_ISR_INITS)
-#define RTC_FLAG_SHPF                     ((uint32_t)RTC_ISR_SHPF)
-#define RTC_FLAG_WUTWF                    ((uint32_t)RTC_ISR_WUTWF)
-#define RTC_FLAG_ALRBWF                   ((uint32_t)RTC_ISR_ALRBWF)
-#define RTC_FLAG_ALRAWF                   ((uint32_t)RTC_ISR_ALRAWF)
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macros -----------------------------------------------------------*/
-/** @defgroup RTC_Exported_Macros RTC Exported Macros
-  * @{
-  */
-
-/** @brief Reset RTC handle state
-  * @param  __HANDLE__: RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RTC_STATE_RESET)
-
-/**
-  * @brief  Disable the write protection for RTC registers.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_WRITEPROTECTION_DISABLE(__HANDLE__)             \
-                        do{                                       \
-                            (__HANDLE__)->Instance->WPR = 0xCAU;   \
-                            (__HANDLE__)->Instance->WPR = 0x53U;   \
-                          } while(0U)
-
-/**
-  * @brief  Enable the write protection for RTC registers.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_WRITEPROTECTION_ENABLE(__HANDLE__)              \
-                        do{                                       \
-                            (__HANDLE__)->Instance->WPR = 0xFFU;   \
-                          } while(0U)
-
-/**
-  * @brief  Enable the RTC ALARMA peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_ALARMA_ENABLE(__HANDLE__)  ((__HANDLE__)->Instance->CR |= (RTC_CR_ALRAE))
-
-/**
-  * @brief  Disable the RTC ALARMA peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_ALARMA_DISABLE(__HANDLE__)  ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ALRAE))
-
-/**
-  * @brief  Enable the RTC ALARMB peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_ALARMB_ENABLE(__HANDLE__)   ((__HANDLE__)->Instance->CR |= (RTC_CR_ALRBE))
-
-/**
-  * @brief  Disable the RTC ALARMB peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_ALARMB_DISABLE(__HANDLE__)  ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ALRBE))
-
-/**
-  * @brief  Enable the RTC Alarm interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Alarm interrupt sources to be enabled or disabled.
-  *          This parameter can be any combination of the following values:
-  *             @arg RTC_IT_ALRA: Alarm A interrupt
-  *             @arg RTC_IT_ALRB: Alarm B interrupt
-  * @retval None
-  */
-#define __HAL_RTC_ALARM_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
-
-/**
-  * @brief  Disable the RTC Alarm interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Alarm interrupt sources to be enabled or disabled.
-  *         This parameter can be any combination of the following values:
-  *            @arg RTC_IT_ALRA: Alarm A interrupt
-  *            @arg RTC_IT_ALRB: Alarm B interrupt
-  * @retval None
-  */
-#define __HAL_RTC_ALARM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
-
-/**
-  * @brief  Check whether the specified RTC Alarm interrupt has occurred or not.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Alarm interrupt sources to check.
-  *         This parameter can be:
-  *            @arg RTC_IT_ALRA: Alarm A interrupt
-  *            @arg RTC_IT_ALRB: Alarm B interrupt
-  * @retval None
-  */
-#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__)  (((((__HANDLE__)->Instance->ISR)& ((__INTERRUPT__)>> 4U)) != RESET)? SET : RESET)
-
-/**
-  * @brief  Check whether the specified RTC Alarm interrupt has been enabled or not.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Alarm interrupt sources to check.
-  *         This parameter can be:
-  *            @arg RTC_IT_ALRA: Alarm A interrupt
-  *            @arg RTC_IT_ALRB: Alarm B interrupt
-  * @retval None
-  */
-#define __HAL_RTC_ALARM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)     (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
-
-/**
-  * @brief  Get the selected RTC Alarm's flag status.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC Alarm Flag sources to check.
-  *         This parameter can be:
-  *            @arg RTC_FLAG_ALRAF
-  *            @arg RTC_FLAG_ALRBF
-  *            @arg RTC_FLAG_ALRAWF
-  *            @arg RTC_FLAG_ALRBWF
-  * @retval None
-  */
-#define __HAL_RTC_ALARM_GET_FLAG(__HANDLE__, __FLAG__)   (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
-
-/**
-  * @brief  Clear the RTC Alarm's pending flags.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC Alarm Flag sources to clear.
-  *          This parameter can be:
-  *             @arg RTC_FLAG_ALRAF
-  *             @arg RTC_FLAG_ALRBF
-  * @retval None
-  */
-#define __HAL_RTC_ALARM_CLEAR_FLAG(__HANDLE__, __FLAG__)   ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT) | ((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
-
-/**
-  * @brief  Enable interrupt on the RTC Alarm associated Exti line.
-  * @retval None
-  */
-#define __HAL_RTC_ALARM_EXTI_ENABLE_IT()            (EXTI->IMR |= RTC_EXTI_LINE_ALARM_EVENT)
-
-/**
-  * @brief  Disable interrupt on the RTC Alarm associated Exti line.
-  * @retval None
-  */
-#define __HAL_RTC_ALARM_EXTI_DISABLE_IT()           (EXTI->IMR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
-
-/**
-  * @brief  Enable event on the RTC Alarm associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_ENABLE_EVENT()         (EXTI->EMR |= RTC_EXTI_LINE_ALARM_EVENT)
-
-/**
-  * @brief  Disable event on the RTC Alarm associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_DISABLE_EVENT()         (EXTI->EMR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
-
-/**
-  * @brief  Enable falling edge trigger on the RTC Alarm associated Exti line.  
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE()   (EXTI->FTSR |= RTC_EXTI_LINE_ALARM_EVENT)
-
-/**
-  * @brief  Disable falling edge trigger on the RTC Alarm associated Exti line.  
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE()  (EXTI->FTSR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
-
-/**
-  * @brief  Enable rising edge trigger on the RTC Alarm associated Exti line.  
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE()    (EXTI->RTSR |= RTC_EXTI_LINE_ALARM_EVENT)
-
-/**
-  * @brief  Disable rising edge trigger on the RTC Alarm associated Exti line.  
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE()   (EXTI->RTSR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
-
-/**
-  * @brief  Enable rising & falling edge trigger on the RTC Alarm associated Exti line.  
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_FALLING_EDGE()  do { \
-                                                             __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE();  \
-                                                             __HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE(); \
-                                                           } while(0U)
-
-/**
-  * @brief  Disable rising & falling edge trigger on the RTC Alarm associated Exti line.  
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
-                                                             __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE();  \
-                                                             __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE(); \
-                                                           } while(0U)
-
-/**
-  * @brief Check whether the RTC Alarm associated Exti line interrupt flag is set or not.
-  * @retval Line Status.
-  */
-#define __HAL_RTC_ALARM_EXTI_GET_FLAG()              (EXTI->PR & RTC_EXTI_LINE_ALARM_EVENT)
-
-/**
-  * @brief Clear the RTC Alarm associated Exti line flag.
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_CLEAR_FLAG()            (EXTI->PR = RTC_EXTI_LINE_ALARM_EVENT)
-
-/**
-  * @brief Generate a Software interrupt on RTC Alarm associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_GENERATE_SWIT()         (EXTI->SWIER |= RTC_EXTI_LINE_ALARM_EVENT)
-
-/**
-  * @}
-  */
-
-/* Include RTC HAL Extended module */
-#include "stm32l0xx_hal_rtc_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup RTC_Exported_Functions RTC Exported Functions
-  * @{
-  */
-
-/** @defgroup RTC_Exported_Functions_Group1 Initialization and de-initialization functions
-  * @{
-  */
-/* Initialization and de-initialization functions  ****************************/
-HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc);
-HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc);
-void HAL_RTC_MspInit(RTC_HandleTypeDef *hrtc);
-void HAL_RTC_MspDeInit(RTC_HandleTypeDef *hrtc);
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Exported_Functions_Group2 RTC Time and Date functions
-  * @{
-  */
-/* RTC Time and Date functions ************************************************/
-HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format);
-HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format);
-HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
-HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Exported_Functions_Group3 RTC Alarm functions
-  * @{
-  */
-/* RTC Alarm functions ********************************************************/
-HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format);
-HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format);
-HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm);
-HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format);
-void              HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc);
-HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
-void              HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc);
-/**
-  * @}
-  */
-
-/** @defgroup  RTC_Exported_Functions_Group4 Peripheral Control functions
-  * @{
-  */  
-/* Peripheral Control functions ***********************************************/
-HAL_StatusTypeDef   HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc);
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Exported_Functions_Group5 Peripheral State functions
-  * @{
-  */  
-/* Peripheral State functions *************************************************/
-HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc);
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */  
-
-/* Private types -------------------------------------------------------------*/ 
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup RTC_Private_Constants RTC Private Constants
-  * @{
-  */
-/* Masks Definition */
-#define RTC_TR_RESERVED_MASK  ((uint32_t) (RTC_TR_PM | RTC_TR_HT | RTC_TR_HU | \
-                                           RTC_TR_MNT | RTC_TR_MNU| RTC_TR_ST | \
-                                           RTC_TR_SU))
-#define RTC_DR_RESERVED_MASK  ((uint32_t) (RTC_DR_YT | RTC_DR_YU | RTC_DR_WDU | \
-                                           RTC_DR_MT | RTC_DR_MU | RTC_DR_DT  | \
-                                           RTC_DR_DU))
-#define RTC_INIT_MASK           ((uint32_t)0xFFFFFFFFU)
-#define RTC_RSF_MASK            ((uint32_t)~(RTC_ISR_INIT | RTC_ISR_RSF))
-
-#define RTC_TIMEOUT_VALUE  1000U
-  
-#define RTC_EXTI_LINE_ALARM_EVENT             ((uint32_t)EXTI_IMR_IM17)  /*!< External interrupt line 17 Connected to the RTC Alarm event */
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup RTC_Private_Macros RTC Private Macros
-  * @{
-  */
-
-/** @defgroup RTC_IS_RTC_Definitions RTC Private macros to check input parameters
-  * @{
-  */ 
-
-#define IS_RTC_HOUR_FORMAT(FORMAT)     (((FORMAT) == RTC_HOURFORMAT_12) || \
-                                        ((FORMAT) == RTC_HOURFORMAT_24))
-
-#define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OUTPUT_POLARITY_HIGH) || \
-                                ((POL) == RTC_OUTPUT_POLARITY_LOW))
-
-#define IS_RTC_OUTPUT_TYPE(TYPE) (((TYPE) == RTC_OUTPUT_TYPE_OPENDRAIN) || \
-                                  ((TYPE) == RTC_OUTPUT_TYPE_PUSHPULL))
-
-#define IS_RTC_OUTPUT_REMAP(REMAP)   (((REMAP) == RTC_OUTPUT_REMAP_NONE) || \
-                                      ((REMAP) == RTC_OUTPUT_REMAP_POS1))
-
-#define IS_RTC_HOURFORMAT12(PM)  (((PM) == RTC_HOURFORMAT12_AM) || \
-                                  ((PM) == RTC_HOURFORMAT12_PM))
-
-#define IS_RTC_DAYLIGHT_SAVING(SAVE) (((SAVE) == RTC_DAYLIGHTSAVING_SUB1H) || \
-                                      ((SAVE) == RTC_DAYLIGHTSAVING_ADD1H) || \
-                                      ((SAVE) == RTC_DAYLIGHTSAVING_NONE))
-
-#define IS_RTC_STORE_OPERATION(OPERATION) (((OPERATION) == RTC_STOREOPERATION_RESET) || \
-                                           ((OPERATION) == RTC_STOREOPERATION_SET))
-
-#define IS_RTC_FORMAT(FORMAT) (((FORMAT) == RTC_FORMAT_BIN) || ((FORMAT) == RTC_FORMAT_BCD))
-
-#define IS_RTC_YEAR(YEAR)              ((YEAR) <= (uint32_t)99U)
-
-#define IS_RTC_MONTH(MONTH)            (((MONTH) >= (uint32_t)1U) && ((MONTH) <= (uint32_t)12U))
-
-#define IS_RTC_DATE(DATE)              (((DATE) >= (uint32_t)1U) && ((DATE) <= (uint32_t)31U))
-
-#define IS_RTC_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_WEEKDAY_MONDAY)    || \
-                                 ((WEEKDAY) == RTC_WEEKDAY_TUESDAY)   || \
-                                 ((WEEKDAY) == RTC_WEEKDAY_WEDNESDAY) || \
-                                 ((WEEKDAY) == RTC_WEEKDAY_THURSDAY)  || \
-                                 ((WEEKDAY) == RTC_WEEKDAY_FRIDAY)    || \
-                                 ((WEEKDAY) == RTC_WEEKDAY_SATURDAY)  || \
-                                 ((WEEKDAY) == RTC_WEEKDAY_SUNDAY))
-
-#define IS_RTC_ALARM_DATE_WEEKDAY_DATE(DATE) (((DATE) >(uint32_t)0U) && ((DATE) <= (uint32_t)31U))
-
-#define IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_WEEKDAY_MONDAY)    || \
-                                                    ((WEEKDAY) == RTC_WEEKDAY_TUESDAY)   || \
-                                                    ((WEEKDAY) == RTC_WEEKDAY_WEDNESDAY) || \
-                                                    ((WEEKDAY) == RTC_WEEKDAY_THURSDAY)  || \
-                                                    ((WEEKDAY) == RTC_WEEKDAY_FRIDAY)    || \
-                                                    ((WEEKDAY) == RTC_WEEKDAY_SATURDAY)  || \
-                                                    ((WEEKDAY) == RTC_WEEKDAY_SUNDAY))
-
-#define IS_RTC_ALARM_DATE_WEEKDAY_SEL(SEL) (((SEL) == RTC_ALARMDATEWEEKDAYSEL_DATE) || \
-                                            ((SEL) == RTC_ALARMDATEWEEKDAYSEL_WEEKDAY))
-
-#define IS_RTC_ALARM_MASK(MASK)  (((MASK) & ~(RTC_ALARMMASK_ALL)) == (uint32_t)RESET)
-
-#define IS_RTC_ALARM(ALARM)      (((ALARM) == RTC_ALARM_A) || ((ALARM) == RTC_ALARM_B))
-
-#define IS_RTC_ALARM_SUB_SECOND_VALUE(VALUE) ((VALUE) <= RTC_ALRMASSR_SS)
-
-#define IS_RTC_ALARM_SUB_SECOND_MASK(MASK)   (((MASK) == RTC_ALARMSUBSECONDMASK_ALL) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_1) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_2) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_3) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_4) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_5) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_6) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_7) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_8) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_9) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_10) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_11) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_12) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_13) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_NONE))
-
-#define IS_RTC_ASYNCH_PREDIV(PREDIV)   ((PREDIV) <= (uint32_t)0x7FU)
-
-#define IS_RTC_SYNCH_PREDIV(PREDIV)    ((PREDIV) <= (uint32_t)0x7FFFU)
-
-#define IS_RTC_HOUR12(HOUR)            (((HOUR) > (uint32_t)0U) && ((HOUR) <= (uint32_t)12U))
-
-#define IS_RTC_HOUR24(HOUR)            ((HOUR) <= (uint32_t)23U)
-
-#define IS_RTC_MINUTES(MINUTES)        ((MINUTES) <= (uint32_t)59U)
-
-#define IS_RTC_SECONDS(SECONDS)        ((SECONDS) <= (uint32_t)59U)
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-/* Private functions -------------------------------------------------------------*/
-/** @defgroup RTC_Private_Functions RTC Private Functions
-  * @{
-  */
-HAL_StatusTypeDef  RTC_EnterInitMode(RTC_HandleTypeDef* hrtc);
-uint8_t            RTC_ByteToBcd2(uint8_t Value);
-uint8_t            RTC_Bcd2ToByte(uint8_t Value);
-/**
-  * @}
-  */
-  
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_RTC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h~RF1c1a442d.TMP b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h~RF1c1a442d.TMP
deleted file mode 100755
index 597d1f70..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h~RF1c1a442d.TMP
+++ /dev/null
@@ -1,904 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_rtc.h
-  * @author  MCD Application Team
-  * @brief   Header file of RTC HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_RTC_H
-#define __STM32L0xx_HAL_RTC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup RTC RTC
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/ 
-/** @defgroup RTC_Exported_Types RTC Exported Types
-  * @{
-  */
-
-/** 
-  * @brief  HAL State structures definition  
-  */
-typedef enum
-{
-  HAL_RTC_STATE_RESET             = 0x00U,  /*!< RTC not yet initialized or disabled */
-  HAL_RTC_STATE_READY             = 0x01U,  /*!< RTC initialized and ready for use   */
-  HAL_RTC_STATE_BUSY              = 0x02U,  /*!< RTC process is ongoing              */
-  HAL_RTC_STATE_TIMEOUT           = 0x03U,  /*!< RTC timeout state                   */
-  HAL_RTC_STATE_ERROR             = 0x04U   /*!< RTC error state                     */
-
-}HAL_RTCStateTypeDef;
-
-/** 
-  * @brief  RTC Configuration Structure definition
-  */
-typedef struct
-{
-  uint32_t HourFormat;      /*!< Specifies the RTC Hour Format.
-                                 This parameter can be a value of @ref RTC_Hour_Formats */
-
-  uint32_t AsynchPrediv;    /*!< Specifies the RTC Asynchronous Predivider value.
-                                 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7F */
-                               
-  uint32_t SynchPrediv;     /*!< Specifies the RTC Synchronous Predivider value.
-                                 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7FFF */
-
-  uint32_t OutPut;          /*!< Specifies which signal will be routed to the RTC output.
-                                 This parameter can be a value of @ref RTCEx_Output_selection_Definitions */
-
-  uint32_t OutPutRemap;    /*!< Specifies the remap for RTC output.
-                                 This parameter can be a value of @ref  RTC_Output_ALARM_OUT_Remap */
-
-  uint32_t OutPutPolarity;  /*!< Specifies the polarity of the output signal.  
-                                 This parameter can be a value of @ref RTC_Output_Polarity_Definitions */
-
-  uint32_t OutPutType;      /*!< Specifies the RTC Output Pin mode.
-                                 This parameter can be a value of @ref RTC_Output_Type_ALARM_OUT */
-}RTC_InitTypeDef;
-
-/** 
-  * @brief  RTC Time structure definition  
-  */
-typedef struct
-{
-  uint8_t Hours;            /*!< Specifies the RTC Time Hour.
-                                 This parameter must be a number between Min_Data = 0 and Max_Data = 12 if the RTC_HourFormat_12 is selected.
-                                 This parameter must be a number between Min_Data = 0 and Max_Data = 23 if the RTC_HourFormat_24 is selected */
-
-  uint8_t Minutes;          /*!< Specifies the RTC Time Minutes.
-                                 This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
-
-  uint8_t Seconds;          /*!< Specifies the RTC Time Seconds.
-                                 This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
-
-  uint8_t TimeFormat;       /*!< Specifies the RTC AM/PM Time.
-                                 This parameter can be a value of @ref RTC_AM_PM_Definitions */
-  
-  uint32_t SubSeconds;     /*!< Specifies the RTC_SSR RTC Sub Second register content.
-                                 This parameter corresponds to a time unit range between [0-1] Second
-                                 with [1 Sec / SecondFraction +1] granularity */
- 
-  uint32_t SecondFraction;  /*!< Specifies the range or granularity of Sub Second register content
-                                 corresponding to Synchronous pre-scaler factor value (PREDIV_S)
-                                 This parameter corresponds to a time unit range between [0-1] Second
-                                 with [1 Sec / SecondFraction +1] granularity.
-                                 This field will be used only by HAL_RTC_GetTime function */
-  
-  uint32_t DayLightSaving;  /*!< Specifies RTC_DayLightSaveOperation: the value of hour adjustment.
-                                 This parameter can be a value of @ref RTC_DayLightSaving_Definitions */
-
-  uint32_t StoreOperation;  /*!< Specifies RTC_StoreOperation value to be written in the BCK bit 
-                                 in CR register to store the operation.
-                                 This parameter can be a value of @ref RTC_StoreOperation_Definitions */
-}RTC_TimeTypeDef;
-
-/** 
-  * @brief  RTC Date structure definition
-  */
-typedef struct
-{
-  uint8_t WeekDay;  /*!< Specifies the RTC Date WeekDay.
-                         This parameter can be a value of @ref RTC_WeekDay_Definitions */
-
-  uint8_t Month;    /*!< Specifies the RTC Date Month (in BCD format).
-                         This parameter can be a value of @ref RTC_Month_Date_Definitions */
-
-  uint8_t Date;     /*!< Specifies the RTC Date.
-                         This parameter must be a number between Min_Data = 1 and Max_Data = 31 */
-
-  uint8_t Year;     /*!< Specifies the RTC Date Year.
-                         This parameter must be a number between Min_Data = 0 and Max_Data = 99 */
-
-}RTC_DateTypeDef;
-
-/** 
-  * @brief  RTC Alarm structure definition
-  */
-typedef struct
-{
-  RTC_TimeTypeDef AlarmTime;     /*!< Specifies the RTC Alarm Time members */
-
-  uint32_t AlarmMask;            /*!< Specifies the RTC Alarm Masks.
-                                      This parameter can be a value of @ref RTC_AlarmMask_Definitions */
-  
-  uint32_t AlarmSubSecondMask;   /*!< Specifies the RTC Alarm SubSeconds Masks.
-                                      This parameter can be a value of @ref RTC_Alarm_Sub_Seconds_Masks_Definitions */
-
-  uint32_t AlarmDateWeekDaySel;  /*!< Specifies the RTC Alarm is on Date or WeekDay.
-                                     This parameter can be a value of @ref RTC_AlarmDateWeekDay_Definitions */
-
-  uint8_t AlarmDateWeekDay;      /*!< Specifies the RTC Alarm Date/WeekDay.
-                                      If the Alarm Date is selected, this parameter must be set to a value in the 1-31 range.
-                                      If the Alarm WeekDay is selected, this parameter can be a value of @ref RTC_WeekDay_Definitions */
-
-  uint32_t Alarm;                /*!< Specifies the alarm .
-                                      This parameter can be a value of @ref RTC_Alarms_Definitions */
-}RTC_AlarmTypeDef;
-
-/** 
-  * @brief  RTC Handle Structure definition  
-  */ 
-typedef struct
-{
-  RTC_TypeDef               *Instance;  /*!< Register base address    */
-
-  RTC_InitTypeDef           Init;       /*!< RTC required parameters  */
-
-  HAL_LockTypeDef           Lock;       /*!< RTC locking object       */
-
-  __IO HAL_RTCStateTypeDef  State;      /*!< Time communication state */
-
-}RTC_HandleTypeDef;
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup RTC_Exported_Constants RTC Exported Constants
-  * @{
-  */
- 
-/** @defgroup RTC_Hour_Formats RTC Hour Formats
-  * @{
-  */
-#define RTC_HOURFORMAT_24              ((uint32_t)0x00000000U)
-#define RTC_HOURFORMAT_12              ((uint32_t)RTC_CR_FMT)
-
-/**
-  * @}
-  */
-
-
-/** @defgroup RTC_Output_Polarity_Definitions RTC Output Polarity Definitions
-  * @{
-  */
-#define RTC_OUTPUT_POLARITY_HIGH       ((uint32_t)0x00000000U)
-#define RTC_OUTPUT_POLARITY_LOW        ((uint32_t)RTC_CR_POL)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Output_Type_ALARM_OUT RTC Output Type ALARM OUT
-  * @{
-  */
-#define RTC_OUTPUT_TYPE_OPENDRAIN      ((uint32_t)0x00000000U)
-#define RTC_OUTPUT_TYPE_PUSHPULL       ((uint32_t)RTC_OR_ALARMOUTTYPE)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Output_ALARM_OUT_Remap RTC Output ALARM OUT Remap
-  * @{
-  */
-#define RTC_OUTPUT_REMAP_NONE              ((uint32_t)0x00000000U)
-#define RTC_OUTPUT_REMAP_POS1               ((uint32_t)RTC_OR_OUT_RMP)
-/**
-  * @}
-  */
-  
-/** @defgroup RTC_AM_PM_Definitions RTC AM PM Definitions
-  * @{
-  */
-#define RTC_HOURFORMAT12_AM            ((uint8_t)0x00U)
-#define RTC_HOURFORMAT12_PM            ((uint8_t)0x40U)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_DayLightSaving_Definitions RTC DayLightSaving Definitions
-  * @{
-  */
-#define RTC_DAYLIGHTSAVING_SUB1H       ((uint32_t)RTC_CR_SUB1H)
-#define RTC_DAYLIGHTSAVING_ADD1H       ((uint32_t)RTC_CR_ADD1H)
-#define RTC_DAYLIGHTSAVING_NONE        ((uint32_t)0x00000000U)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_StoreOperation_Definitions RTC StoreOperation Definitions
-  * @{
-  */
-#define RTC_STOREOPERATION_RESET        ((uint32_t)0x00000000U)
-#define RTC_STOREOPERATION_SET          ((uint32_t)RTC_CR_BCK)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Input_parameter_format_definitions RTC Input Parameter Format Definitions
-  * @{
-  */
-#define RTC_FORMAT_BIN   ((uint32_t)0x000000000U)
-#define RTC_FORMAT_BCD   ((uint32_t)0x000000001U)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Month_Date_Definitions RTC Month Date Definitions
-  * @{
-  */
-
-/* Coded in BCD format */
-#define RTC_MONTH_JANUARY              ((uint8_t)0x01U)
-#define RTC_MONTH_FEBRUARY             ((uint8_t)0x02U)
-#define RTC_MONTH_MARCH                ((uint8_t)0x03U)
-#define RTC_MONTH_APRIL                ((uint8_t)0x04U)
-#define RTC_MONTH_MAY                  ((uint8_t)0x05U)
-#define RTC_MONTH_JUNE                 ((uint8_t)0x06U)
-#define RTC_MONTH_JULY                 ((uint8_t)0x07U)
-#define RTC_MONTH_AUGUST               ((uint8_t)0x08U)
-#define RTC_MONTH_SEPTEMBER            ((uint8_t)0x09U)
-#define RTC_MONTH_OCTOBER              ((uint8_t)0x10U)
-#define RTC_MONTH_NOVEMBER             ((uint8_t)0x11U)
-#define RTC_MONTH_DECEMBER             ((uint8_t)0x12U)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_WeekDay_Definitions RTC WeekDay Definitions
-  * @{
-  */
-#define RTC_WEEKDAY_MONDAY             ((uint8_t)0x01U)
-#define RTC_WEEKDAY_TUESDAY            ((uint8_t)0x02U)
-#define RTC_WEEKDAY_WEDNESDAY          ((uint8_t)0x03U)
-#define RTC_WEEKDAY_THURSDAY           ((uint8_t)0x04U)
-#define RTC_WEEKDAY_FRIDAY             ((uint8_t)0x05U)
-#define RTC_WEEKDAY_SATURDAY           ((uint8_t)0x06U)
-#define RTC_WEEKDAY_SUNDAY             ((uint8_t)0x07U)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_AlarmDateWeekDay_Definitions RTC AlarmDateWeekDay Definitions
-  * @{
-  */
-#define RTC_ALARMDATEWEEKDAYSEL_DATE      ((uint32_t)0x00000000U)
-#define RTC_ALARMDATEWEEKDAYSEL_WEEKDAY   RTC_ALRMAR_WDSEL
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_AlarmMask_Definitions RTC AlarmMask Definitions
-  * @{
-  */
-#define RTC_ALARMMASK_NONE             ((uint32_t)0x00000000U)
-#define RTC_ALARMMASK_DATEWEEKDAY       RTC_ALRMAR_MSK4
-#define RTC_ALARMMASK_HOURS             RTC_ALRMAR_MSK3
-#define RTC_ALARMMASK_MINUTES           RTC_ALRMAR_MSK2
-#define RTC_ALARMMASK_SECONDS           RTC_ALRMAR_MSK1
-#define RTC_ALARMMASK_ALL               ((uint32_t) (RTC_ALARMMASK_NONE        | \
-                                                     RTC_ALARMMASK_DATEWEEKDAY | \
-                                                     RTC_ALARMMASK_HOURS       | \
-                                                     RTC_ALARMMASK_MINUTES     | \
-                                                     RTC_ALARMMASK_SECONDS))
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Alarms_Definitions RTC Alarms Definitions
-  * @{
-  */
-#define RTC_ALARM_A                       RTC_CR_ALRAE
-#define RTC_ALARM_B                       RTC_CR_ALRBE
-
-/**
-  * @}
-  */
-
-
-  /** @defgroup RTC_Alarm_Sub_Seconds_Masks_Definitions RTC Alarm Sub Seconds Masks Definitions
-  * @{
-  */
-#define RTC_ALARMSUBSECONDMASK_ALL        ((uint32_t)0x00000000U)                                                                 /*!< All Alarm SS fields are masked.
-                                                                                                                                    There is no comparison on sub seconds
-                                                                                                                                    for Alarm */
-#define RTC_ALARMSUBSECONDMASK_SS14_1      RTC_ALRMASSR_MASKSS_0                                                                 /*!< SS[14:1] are don't care in Alarm
-                                                                                                                                    comparison. Only SS[0] is compared.    */
-#define RTC_ALARMSUBSECONDMASK_SS14_2      RTC_ALRMASSR_MASKSS_1                                                                 /*!< SS[14:2] are don't care in Alarm
-                                                                                                                                     comparison. Only SS[1:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_3      ((uint32_t) (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_1))                          /*!< SS[14:3] are don't care in Alarm
-                                                                                                                                     comparison. Only SS[2:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_4      RTC_ALRMASSR_MASKSS_2                                                                 /*!< SS[14:4] are don't care in Alarm
-                                                                                                                                     comparison. Only SS[3:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_5      ((uint32_t) (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_2))                          /*!< SS[14:5] are don't care in Alarm
-                                                                                                                                      comparison. Only SS[4:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_6      ((uint32_t) (RTC_ALRMASSR_MASKSS_1 | RTC_ALRMASSR_MASKSS_2))                          /*!< SS[14:6] are don't care in Alarm
-                                                                                                                                      comparison. Only SS[5:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_7      ((uint32_t) (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_1 | RTC_ALRMASSR_MASKSS_2))  /*!< SS[14:7] are don't care in Alarm
-                                                                                                                                `     comparison. Only SS[6:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_8      RTC_ALRMASSR_MASKSS_3                                                                 /*!< SS[14:8] are don't care in Alarm
-                                                                                                                                      comparison. Only SS[7:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_9      ((uint32_t) (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_3))                          /*!< SS[14:9] are don't care in Alarm
-                                                                                                                                      comparison. Only SS[8:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_10     ((uint32_t) (RTC_ALRMASSR_MASKSS_1 | RTC_ALRMASSR_MASKSS_3))                          /*!< SS[14:10] are don't care in Alarm
-                                                                                                                                      comparison. Only SS[9:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_11     ((uint32_t) (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_1 | RTC_ALRMASSR_MASKSS_3))  /*!< SS[14:11] are don't care in Alarm
-                                                                                                                                      comparison. Only SS[10:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_SS14_12     ((uint32_t) (RTC_ALRMASSR_MASKSS_2 | RTC_ALRMASSR_MASKSS_3))                          /*!< SS[14:12] are don't care in Alarm
-                                                                                                                                      comparison.Only SS[11:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_SS14_13     ((uint32_t) (RTC_ALRMASSR_MASKSS_0 | RTC_ALRMASSR_MASKSS_2 | RTC_ALRMASSR_MASKSS_3))  /*!< SS[14:13] are don't care in Alarm
-                                                                                                                                      comparison. Only SS[12:0] are compared */
-#define RTC_ALARMSUBSECONDMASK_SS14        ((uint32_t) (RTC_ALRMASSR_MASKSS_1 | RTC_ALRMASSR_MASKSS_2 | RTC_ALRMASSR_MASKSS_3))  /*!< SS[14] is don't care in Alarm
-                                                                                                                                      comparison.Only SS[13:0] are compared  */
-#define RTC_ALARMSUBSECONDMASK_NONE        RTC_ALRMASSR_MASKSS                                                                   /*!< SS[14:0] are compared and must match
-                                                                                                                                      to activate alarm. */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Interrupts_Definitions RTC Interrupts Definitions
-  * @{
-  */
-#define RTC_IT_TS                         ((uint32_t)RTC_CR_TSIE)        /*!< Enable Timestamp Interrupt    */
-#define RTC_IT_WUT                        ((uint32_t)RTC_CR_WUTIE)       /*!< Enable Wakeup timer Interrupt */
-#define RTC_IT_ALRA                       ((uint32_t)RTC_CR_ALRAIE)      /*!< Enable Alarm A Interrupt      */
-#define RTC_IT_ALRB                       ((uint32_t)RTC_CR_ALRBIE)      /*!< Enable Alarm B Interrupt      */
-#define RTC_IT_TAMP                       ((uint32_t)RTC_TAMPCR_TAMPIE)  /*!< Enable all Tamper Interrupt   */
-
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
-    defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx)
-
-#define RTC_IT_TAMP1                      ((uint32_t)RTC_TAMPCR_TAMP1IE) /*!< Enable Tamper 1 Interrupt     */
-#endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
-        * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
-        * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
-        * (STM32L031xx) || (STM32L041xx)
-        */
-#define RTC_IT_TAMP2                      ((uint32_t)RTC_TAMPCR_TAMP2IE) /*!< Enable Tamper 2 Interrupt     */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Flags_Definitions RTC Flags Definitions
-  * @{
-  */
-#define RTC_FLAG_RECALPF                  ((uint32_t)RTC_ISR_RECALPF)
-#define RTC_FLAG_TAMP2F                   ((uint32_t)RTC_ISR_TAMP2F)
-
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
-    defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx)
-#define RTC_FLAG_TAMP1F                   ((uint32_t)RTC_ISR_TAMP1F)
-#endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
-        * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
-        * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
-        * (STM32L031xx) || (STM32L041xx)
-        */
-
-#define RTC_FLAG_TSOVF                    ((uint32_t)RTC_ISR_TSOVF)
-#define RTC_FLAG_TSF                      ((uint32_t)RTC_ISR_TSF)
-#define RTC_FLAG_WUTF                     ((uint32_t)RTC_ISR_WUTF)
-#define RTC_FLAG_ALRBF                    ((uint32_t)RTC_ISR_ALRBF)
-#define RTC_FLAG_ALRAF                    ((uint32_t)RTC_ISR_ALRAF)
-#define RTC_FLAG_INITF                    ((uint32_t)RTC_ISR_INITF)
-#define RTC_FLAG_RSF                      ((uint32_t)RTC_ISR_RSF)
-#define RTC_FLAG_INITS                    ((uint32_t)RTC_ISR_INITS)
-#define RTC_FLAG_SHPF                     ((uint32_t)RTC_ISR_SHPF)
-#define RTC_FLAG_WUTWF                    ((uint32_t)RTC_ISR_WUTWF)
-#define RTC_FLAG_ALRBWF                   ((uint32_t)RTC_ISR_ALRBWF)
-#define RTC_FLAG_ALRAWF                   ((uint32_t)RTC_ISR_ALRAWF)
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macros -----------------------------------------------------------*/
-/** @defgroup RTC_Exported_Macros RTC Exported Macros
-  * @{
-  */
-
-/** @brief Reset RTC handle state
-  * @param  __HANDLE__: RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RTC_STATE_RESET)
-
-/**
-  * @brief  Disable the write protection for RTC registers.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_WRITEPROTECTION_DISABLE(__HANDLE__)             \
-                        do{                                       \
-                            (__HANDLE__)->Instance->WPR = 0xCAU;   \
-                            (__HANDLE__)->Instance->WPR = 0x53U;   \
-                          } while(0U)
-
-/**
-  * @brief  Enable the write protection for RTC registers.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_WRITEPROTECTION_ENABLE(__HANDLE__)              \
-                        do{                                       \
-                            (__HANDLE__)->Instance->WPR = 0xFFU;   \
-                          } while(0U)
-
-/**
-  * @brief  Enable the RTC ALARMA peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_ALARMA_ENABLE(__HANDLE__)  ((__HANDLE__)->Instance->CR |= (RTC_CR_ALRAE))
-
-/**
-  * @brief  Disable the RTC ALARMA peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_ALARMA_DISABLE(__HANDLE__)  ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ALRAE))
-
-/**
-  * @brief  Enable the RTC ALARMB peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_ALARMB_ENABLE(__HANDLE__)   ((__HANDLE__)->Instance->CR |= (RTC_CR_ALRBE))
-
-/**
-  * @brief  Disable the RTC ALARMB peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_ALARMB_DISABLE(__HANDLE__)  ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ALRBE))
-
-/**
-  * @brief  Enable the RTC Alarm interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Alarm interrupt sources to be enabled or disabled.
-  *          This parameter can be any combination of the following values:
-  *             @arg RTC_IT_ALRA: Alarm A interrupt
-  *             @arg RTC_IT_ALRB: Alarm B interrupt
-  * @retval None
-  */
-#define __HAL_RTC_ALARM_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
-
-/**
-  * @brief  Disable the RTC Alarm interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Alarm interrupt sources to be enabled or disabled.
-  *         This parameter can be any combination of the following values:
-  *            @arg RTC_IT_ALRA: Alarm A interrupt
-  *            @arg RTC_IT_ALRB: Alarm B interrupt
-  * @retval None
-  */
-#define __HAL_RTC_ALARM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
-
-/**
-  * @brief  Check whether the specified RTC Alarm interrupt has occurred or not.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Alarm interrupt sources to check.
-  *         This parameter can be:
-  *            @arg RTC_IT_ALRA: Alarm A interrupt
-  *            @arg RTC_IT_ALRB: Alarm B interrupt
-  * @retval None
-  */
-#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__)  (((((__HANDLE__)->Instance->ISR)& ((__INTERRUPT__)>> 4U)) != RESET)? SET : RESET)
-
-/**
-  * @brief  Check whether the specified RTC Alarm interrupt has been enabled or not.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Alarm interrupt sources to check.
-  *         This parameter can be:
-  *            @arg RTC_IT_ALRA: Alarm A interrupt
-  *            @arg RTC_IT_ALRB: Alarm B interrupt
-  * @retval None
-  */
-#define __HAL_RTC_ALARM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)     (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
-
-/**
-  * @brief  Get the selected RTC Alarm's flag status.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC Alarm Flag sources to check.
-  *         This parameter can be:
-  *            @arg RTC_FLAG_ALRAF
-  *            @arg RTC_FLAG_ALRBF
-  *            @arg RTC_FLAG_ALRAWF
-  *            @arg RTC_FLAG_ALRBWF
-  * @retval None
-  */
-#define __HAL_RTC_ALARM_GET_FLAG(__HANDLE__, __FLAG__)   (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
-
-/**
-  * @brief  Clear the RTC Alarm's pending flags.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC Alarm Flag sources to clear.
-  *          This parameter can be:
-  *             @arg RTC_FLAG_ALRAF
-  *             @arg RTC_FLAG_ALRBF
-  * @retval None
-  */
-#define __HAL_RTC_ALARM_CLEAR_FLAG(__HANDLE__, __FLAG__)   ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT) | ((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
-
-/**
-  * @brief  Enable interrupt on the RTC Alarm associated Exti line.
-  * @retval None
-  */
-#define __HAL_RTC_ALARM_EXTI_ENABLE_IT()            (EXTI->IMR |= RTC_EXTI_LINE_ALARM_EVENT)
-
-/**
-  * @brief  Disable interrupt on the RTC Alarm associated Exti line.
-  * @retval None
-  */
-#define __HAL_RTC_ALARM_EXTI_DISABLE_IT()           (EXTI->IMR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
-
-/**
-  * @brief  Enable event on the RTC Alarm associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_ENABLE_EVENT()         (EXTI->EMR |= RTC_EXTI_LINE_ALARM_EVENT)
-
-/**
-  * @brief  Disable event on the RTC Alarm associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_DISABLE_EVENT()         (EXTI->EMR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
-
-/**
-  * @brief  Enable falling edge trigger on the RTC Alarm associated Exti line.  
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE()   (EXTI->FTSR |= RTC_EXTI_LINE_ALARM_EVENT)
-
-/**
-  * @brief  Disable falling edge trigger on the RTC Alarm associated Exti line.  
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE()  (EXTI->FTSR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
-
-/**
-  * @brief  Enable rising edge trigger on the RTC Alarm associated Exti line.  
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE()    (EXTI->RTSR |= RTC_EXTI_LINE_ALARM_EVENT)
-
-/**
-  * @brief  Disable rising edge trigger on the RTC Alarm associated Exti line.  
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE()   (EXTI->RTSR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
-
-/**
-  * @brief  Enable rising & falling edge trigger on the RTC Alarm associated Exti line.  
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_FALLING_EDGE()  do { \
-                                                             __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE();  \
-                                                             __HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE(); \
-                                                           } while(0U)
-
-/**
-  * @brief  Disable rising & falling edge trigger on the RTC Alarm associated Exti line.  
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
-                                                             __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE();  \
-                                                             __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE(); \
-                                                           } while(0U)
-
-/**
-  * @brief Check whether the RTC Alarm associated Exti line interrupt flag is set or not.
-  * @retval Line Status.
-  */
-#define __HAL_RTC_ALARM_EXTI_GET_FLAG()              (EXTI->PR & RTC_EXTI_LINE_ALARM_EVENT)
-
-/**
-  * @brief Clear the RTC Alarm associated Exti line flag.
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_CLEAR_FLAG()            (EXTI->PR = RTC_EXTI_LINE_ALARM_EVENT)
-
-/**
-  * @brief Generate a Software interrupt on RTC Alarm associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_ALARM_EXTI_GENERATE_SWIT()         (EXTI->SWIER |= RTC_EXTI_LINE_ALARM_EVENT)
-
-/**
-  * @}
-  */
-
-/* Include RTC HAL Extended module */
-#include "stm32l0xx_hal_rtc_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup RTC_Exported_Functions RTC Exported Functions
-  * @{
-  */
-
-/** @defgroup RTC_Exported_Functions_Group1 Initialization and de-initialization functions
-  * @{
-  */
-/* Initialization and de-initialization functions  ****************************/
-HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc);
-HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc);
-void HAL_RTC_MspInit(RTC_HandleTypeDef *hrtc);
-void HAL_RTC_MspDeInit(RTC_HandleTypeDef *hrtc);
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Exported_Functions_Group2 RTC Time and Date functions
-  * @{
-  */
-/* RTC Time and Date functions ************************************************/
-HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format);
-HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format);
-HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
-HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Exported_Functions_Group3 RTC Alarm functions
-  * @{
-  */
-/* RTC Alarm functions ********************************************************/
-HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format);
-HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format);
-HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm);
-HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format);
-void              HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc);
-HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
-void              HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc);
-/**
-  * @}
-  */
-
-/** @defgroup  RTC_Exported_Functions_Group4 Peripheral Control functions
-  * @{
-  */  
-/* Peripheral Control functions ***********************************************/
-HAL_StatusTypeDef   HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc);
-/**
-  * @}
-  */
-
-/** @defgroup RTC_Exported_Functions_Group5 Peripheral State functions
-  * @{
-  */  
-/* Peripheral State functions *************************************************/
-HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc);
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */  
-
-/* Private types -------------------------------------------------------------*/ 
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup RTC_Private_Constants RTC Private Constants
-  * @{
-  */
-/* Masks Definition */
-#define RTC_TR_RESERVED_MASK  ((uint32_t) (RTC_TR_PM | RTC_TR_HT | RTC_TR_HU | \
-                                           RTC_TR_MNT | RTC_TR_MNU| RTC_TR_ST | \
-                                           RTC_TR_SU))
-#define RTC_DR_RESERVED_MASK  ((uint32_t) (RTC_DR_YT | RTC_DR_YU | RTC_DR_WDU | \
-                                           RTC_DR_MT | RTC_DR_MU | RTC_DR_DT  | \
-                                           RTC_DR_DU))
-#define RTC_INIT_MASK           ((uint32_t)0xFFFFFFFFU)
-#define RTC_RSF_MASK            ((uint32_t)~(RTC_ISR_INIT | RTC_ISR_RSF))
-
-#define RTC_TIMEOUT_VALUE  1000U
-  
-#define RTC_EXTI_LINE_ALARM_EVENT             ((uint32_t)EXTI_IMR_IM17)  /*!< External interrupt line 17 Connected to the RTC Alarm event */
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup RTC_Private_Macros RTC Private Macros
-  * @{
-  */
-
-/** @defgroup RTC_IS_RTC_Definitions RTC Private macros to check input parameters
-  * @{
-  */ 
-
-#define IS_RTC_HOUR_FORMAT(FORMAT)     (((FORMAT) == RTC_HOURFORMAT_12) || \
-                                        ((FORMAT) == RTC_HOURFORMAT_24))
-
-#define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OUTPUT_POLARITY_HIGH) || \
-                                ((POL) == RTC_OUTPUT_POLARITY_LOW))
-
-#define IS_RTC_OUTPUT_TYPE(TYPE) (((TYPE) == RTC_OUTPUT_TYPE_OPENDRAIN) || \
-                                  ((TYPE) == RTC_OUTPUT_TYPE_PUSHPULL))
-
-#define IS_RTC_OUTPUT_REMAP(REMAP)   (((REMAP) == RTC_OUTPUT_REMAP_NONE) || \
-                                      ((REMAP) == RTC_OUTPUT_REMAP_POS1))
-
-#define IS_RTC_HOURFORMAT12(PM)  (((PM) == RTC_HOURFORMAT12_AM) || \
-                                  ((PM) == RTC_HOURFORMAT12_PM))
-
-#define IS_RTC_DAYLIGHT_SAVING(SAVE) (((SAVE) == RTC_DAYLIGHTSAVING_SUB1H) || \
-                                      ((SAVE) == RTC_DAYLIGHTSAVING_ADD1H) || \
-                                      ((SAVE) == RTC_DAYLIGHTSAVING_NONE))
-
-#define IS_RTC_STORE_OPERATION(OPERATION) (((OPERATION) == RTC_STOREOPERATION_RESET) || \
-                                           ((OPERATION) == RTC_STOREOPERATION_SET))
-
-#define IS_RTC_FORMAT(FORMAT) (((FORMAT) == RTC_FORMAT_BIN) || ((FORMAT) == RTC_FORMAT_BCD))
-
-#define IS_RTC_YEAR(YEAR)              ((YEAR) <= (uint32_t)99U)
-
-#define IS_RTC_MONTH(MONTH)            (((MONTH) >= (uint32_t)1U) && ((MONTH) <= (uint32_t)12U))
-
-#define IS_RTC_DATE(DATE)              (((DATE) >= (uint32_t)1U) && ((DATE) <= (uint32_t)31U))
-
-#define IS_RTC_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_WEEKDAY_MONDAY)    || \
-                                 ((WEEKDAY) == RTC_WEEKDAY_TUESDAY)   || \
-                                 ((WEEKDAY) == RTC_WEEKDAY_WEDNESDAY) || \
-                                 ((WEEKDAY) == RTC_WEEKDAY_THURSDAY)  || \
-                                 ((WEEKDAY) == RTC_WEEKDAY_FRIDAY)    || \
-                                 ((WEEKDAY) == RTC_WEEKDAY_SATURDAY)  || \
-                                 ((WEEKDAY) == RTC_WEEKDAY_SUNDAY))
-
-#define IS_RTC_ALARM_DATE_WEEKDAY_DATE(DATE) (((DATE) >(uint32_t)0U) && ((DATE) <= (uint32_t)31U))
-
-#define IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_WEEKDAY_MONDAY)    || \
-                                                    ((WEEKDAY) == RTC_WEEKDAY_TUESDAY)   || \
-                                                    ((WEEKDAY) == RTC_WEEKDAY_WEDNESDAY) || \
-                                                    ((WEEKDAY) == RTC_WEEKDAY_THURSDAY)  || \
-                                                    ((WEEKDAY) == RTC_WEEKDAY_FRIDAY)    || \
-                                                    ((WEEKDAY) == RTC_WEEKDAY_SATURDAY)  || \
-                                                    ((WEEKDAY) == RTC_WEEKDAY_SUNDAY))
-
-#define IS_RTC_ALARM_DATE_WEEKDAY_SEL(SEL) (((SEL) == RTC_ALARMDATEWEEKDAYSEL_DATE) || \
-                                            ((SEL) == RTC_ALARMDATEWEEKDAYSEL_WEEKDAY))
-
-#define IS_RTC_ALARM_MASK(MASK)  (((MASK) & ~(RTC_ALARMMASK_ALL)) == (uint32_t)RESET)
-
-#define IS_RTC_ALARM(ALARM)      (((ALARM) == RTC_ALARM_A) || ((ALARM) == RTC_ALARM_B))
-
-#define IS_RTC_ALARM_SUB_SECOND_VALUE(VALUE) ((VALUE) <= RTC_ALRMASSR_SS)
-
-#define IS_RTC_ALARM_SUB_SECOND_MASK(MASK)   (((MASK) == RTC_ALARMSUBSECONDMASK_ALL) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_1) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_2) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_3) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_4) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_5) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_6) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_7) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_8) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_9) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_10) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_11) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_12) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_13) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_SS14) || \
-                                              ((MASK) == RTC_ALARMSUBSECONDMASK_NONE))
-
-#define IS_RTC_ASYNCH_PREDIV(PREDIV)   ((PREDIV) <= (uint32_t)0x7FU)
-
-#define IS_RTC_SYNCH_PREDIV(PREDIV)    ((PREDIV) <= (uint32_t)0x7FFFU)
-
-#define IS_RTC_HOUR12(HOUR)            (((HOUR) > (uint32_t)0U) && ((HOUR) <= (uint32_t)12U))
-
-#define IS_RTC_HOUR24(HOUR)            ((HOUR) <= (uint32_t)23U)
-
-#define IS_RTC_MINUTES(MINUTES)        ((MINUTES) <= (uint32_t)59U)
-
-#define IS_RTC_SECONDS(SECONDS)        ((SECONDS) <= (uint32_t)59U)
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-/* Private functions -------------------------------------------------------------*/
-/** @defgroup RTC_Private_Functions RTC Private Functions
-  * @{
-  */
-HAL_StatusTypeDef  RTC_EnterInitMode(RTC_HandleTypeDef* hrtc);
-uint8_t            RTC_ByteToBcd2(uint8_t Value);
-uint8_t            RTC_Bcd2ToByte(uint8_t Value);
-/**
-  * @}
-  */
-  
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_RTC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h
deleted file mode 100755
index e428201d..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h
+++ /dev/null
@@ -1,1459 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_rtc_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of RTC HAL Extended module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_RTC_EX_H
-#define __STM32L0xx_HAL_RTC_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup RTCEx RTCEx
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/ 
-
-/** @defgroup RTCEx_Exported_Types RTCEx Exported Types
-  * @{
-  */
-
-/**
-  * @brief  RTC Tamper structure definition
-  */
-typedef struct
-{
-  uint32_t Tamper;                      /*!< Specifies the Tamper Pin.
-                                             This parameter can be a value of @ref  RTCEx_Tamper_Pins_Definitions */
-
-  uint32_t Interrupt;                   /*!< Specifies the Tamper Interrupt.
-                                             This parameter can be a value of @ref  RTCEx_Tamper_Interrupt_Definitions */
-
-  uint32_t Trigger;                     /*!< Specifies the Tamper Trigger.
-                                             This parameter can be a value of @ref  RTCEx_Tamper_Trigger_Definitions */
-
-  uint32_t NoErase;                     /*!< Specifies the Tamper no erase mode.
-                                             This parameter can be a value of @ref  RTCEx_Tamper_EraseBackUp_Definitions */
-
-  uint32_t MaskFlag;                     /*!< Specifies the Tamper Flag masking.
-                                             This parameter can be a value of @ref RTCEx_Tamper_MaskFlag_Definitions   */
-
-  uint32_t Filter;                      /*!< Specifies the RTC Filter Tamper.
-                                             This parameter can be a value of @ref RTCEx_Tamper_Filter_Definitions */
-
-  uint32_t SamplingFrequency;           /*!< Specifies the sampling frequency.
-                                             This parameter can be a value of @ref RTCEx_Tamper_Sampling_Frequencies_Definitions */
-
-  uint32_t PrechargeDuration;           /*!< Specifies the Precharge Duration .
-                                             This parameter can be a value of @ref RTCEx_Tamper_Pin_Precharge_Duration_Definitions */
-
-  uint32_t TamperPullUp;                /*!< Specifies the Tamper PullUp .
-                                             This parameter can be a value of @ref RTCEx_Tamper_Pull_UP_Definitions */
-
-  uint32_t TimeStampOnTamperDetection;  /*!< Specifies the TimeStampOnTamperDetection.
-                                             This parameter can be a value of @ref RTCEx_Tamper_TimeStampOnTamperDetection_Definitions */
-}RTC_TamperTypeDef;
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup RTCEx_Exported_Constants RTCEx Exported Constants
-  * @{
-  */
-
-/** @defgroup RTCEx_Output_selection_Definitions RTCEx Output Selection Definition
-  * @{
-  */
-#define RTC_OUTPUT_DISABLE             ((uint32_t)0x00000000U)
-#define RTC_OUTPUT_ALARMA              ((uint32_t)RTC_CR_OSEL_0)
-#define RTC_OUTPUT_ALARMB              ((uint32_t)RTC_CR_OSEL_1)
-#define RTC_OUTPUT_WAKEUP              ((uint32_t)RTC_CR_OSEL)
-
-/**
-  * @}
-  */
- 
-/** @defgroup RTCEx_Backup_Registers_Definitions RTCEx Backup Registers Definition
-  * @{
-  */
-#define RTC_BKP_DR0                       ((uint32_t)0x00000000U)
-#define RTC_BKP_DR1                       ((uint32_t)0x00000001U)
-#define RTC_BKP_DR2                       ((uint32_t)0x00000002U)
-#define RTC_BKP_DR3                       ((uint32_t)0x00000003U)
-#define RTC_BKP_DR4                       ((uint32_t)0x00000004U)
-/**
-  * @}
-  */
-  
-  
-/** @defgroup RTCEx_Time_Stamp_Edges_definitions RTCEx Time Stamp Edges definition
-  * @{
-  */ 
-#define RTC_TIMESTAMPEDGE_RISING        ((uint32_t)0x00000000U)
-#define RTC_TIMESTAMPEDGE_FALLING       RTC_CR_TSEDGE
-
-/**
-  * @}
-  */
-
-/** @defgroup RTCEx_TimeStamp_Pin_Selections RTCEx TimeStamp Pin Selection
-  * @{
-  */
-#define RTC_TIMESTAMPPIN_DEFAULT              ((uint32_t)0x00000000U)
-
-/**
-  * @}
-  */
-
-  
-/** @defgroup RTCEx_Tamper_Pins_Definitions RTCEx Tamper Pins Definition
-  * @{
-  */
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
-    defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx)
-    
-#define RTC_TAMPER_1                    RTC_TAMPCR_TAMP1E
-
-#endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
-        * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
-        * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || 
-        * (STM32L031xx) || (STM32L041xx)
-        */
-
-#define RTC_TAMPER_2                    RTC_TAMPCR_TAMP2E
-
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
-    
-#define RTC_TAMPER_3                    RTC_TAMPCR_TAMP3E
-
-#endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) ||
-		* (STM32L011xx) || (STM32L021xx)
-        */
-
-/**
-  * @}
-  */
-
-
-/** @defgroup RTCEx_Tamper_Interrupt_Definitions RTCEx Tamper Interrupt Definitions
-  * @{
-  */
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
-    defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx)
-
-#define RTC_TAMPER1_INTERRUPT                RTC_TAMPCR_TAMP1IE
-
-#endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
-        * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
-        * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || 
-        * (STM32L031xx) || (STM32L041xx)
-        */
-
-#define RTC_TAMPER2_INTERRUPT                RTC_TAMPCR_TAMP2IE
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
-    
-#define RTC_TAMPER3_INTERRUPT                RTC_TAMPCR_TAMP3IE
-
-#endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) ||
-		* (STM32L011xx) || (STM32L021xx)
-        */
-#define RTC_ALL_TAMPER_INTERRUPT             RTC_TAMPCR_TAMPIE
-/**
-  * @}
-  */        
-
-/** @defgroup RTCEx_Tamper_Trigger_Definitions RTCEx Tamper Trigger Definitions
-  * @{
-  */
-#define RTC_TAMPERTRIGGER_RISINGEDGE       ((uint32_t)0x00000000U)
-#define RTC_TAMPERTRIGGER_FALLINGEDGE      ((uint32_t)0x00000002U)
-#define RTC_TAMPERTRIGGER_LOWLEVEL         RTC_TAMPERTRIGGER_RISINGEDGE
-#define RTC_TAMPERTRIGGER_HIGHLEVEL        RTC_TAMPERTRIGGER_FALLINGEDGE
-
-/**
-  * @}
-  */
-
-/** @defgroup RTCEx_Tamper_EraseBackUp_Definitions RTCEx Tamper EraseBackUp Definitions
-* @{
-*/
-#define RTC_TAMPER_ERASE_BACKUP_ENABLE               ((uint32_t)0x00000000U)
-#define RTC_TAMPER_ERASE_BACKUP_DISABLE              ((uint32_t)0x00020000U)
-/**
-  * @}
-  */
-
-/** @defgroup RTCEx_Tamper_MaskFlag_Definitions RTCEx Tamper MaskFlag Definitions
-* @{
-*/
-#define RTC_TAMPERMASK_FLAG_DISABLE               ((uint32_t)0x00000000U)
-#define RTC_TAMPERMASK_FLAG_ENABLE                ((uint32_t)0x00040000U)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTCEx_Tamper_Filter_Definitions RTCEx Tamper Filter Definitions
-  * @{
-  */
-#define RTC_TAMPERFILTER_DISABLE   ((uint32_t)0x00000000U)  /*!< Tamper filter is disabled */
-
-#define RTC_TAMPERFILTER_2SAMPLE   RTC_TAMPCR_TAMPFLT_0    /*!< Tamper is activated after 2
-                                                                consecutive samples at the active level */
-#define RTC_TAMPERFILTER_4SAMPLE   RTC_TAMPCR_TAMPFLT_1    /*!< Tamper is activated after 4
-                                                                consecutive samples at the active level */
-#define RTC_TAMPERFILTER_8SAMPLE   RTC_TAMPCR_TAMPFLT      /*!< Tamper is activated after 8
-                                                                consecutive samples at the active leve. */
-
-/**
-  * @}
-  */
-
-/** @defgroup RTCEx_Tamper_Sampling_Frequencies_Definitions RTCEx Tamper Sampling Frequencies Definitions
-  * @{
-  */
-#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768  ((uint32_t)0x00000000U)                                         /*!< Each of the tamper inputs are sampled
-                                                                                                                    with a frequency =  RTCCLK / 32768 */
-#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384  RTC_TAMPCR_TAMPFREQ_0                                          /*!< Each of the tamper inputs are sampled
-                                                                                                                    with a frequency =  RTCCLK / 16384 */
-#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192   RTC_TAMPCR_TAMPFREQ_1                                          /*!< Each of the tamper inputs are sampled
-                                                                                                                    with a frequency =  RTCCLK / 8192  */
-#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096   ((uint32_t) (RTC_TAMPCR_TAMPFREQ_0 | RTC_TAMPCR_TAMPFREQ_1))   /*!< Each of the tamper inputs are sampled
-                                                                                                                    with a frequency =  RTCCLK / 4096  */
-#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048   RTC_TAMPCR_TAMPFREQ_2                                          /*!< Each of the tamper inputs are sampled
-                                                                                                                    with a frequency =  RTCCLK / 2048  */
-#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024   ((uint32_t) (RTC_TAMPCR_TAMPFREQ_0 | RTC_TAMPCR_TAMPFREQ_2))   /*!< Each of the tamper inputs are sampled
-                                                                                                                    with a frequency =  RTCCLK / 1024  */
-#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512    ((uint32_t) (RTC_TAMPCR_TAMPFREQ_1 | RTC_TAMPCR_TAMPFREQ_2))   /*!< Each of the tamper inputs are sampled
-                                                                                                                    with a frequency =  RTCCLK / 512   */
-#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256    ((uint32_t) (RTC_TAMPCR_TAMPFREQ_0 | RTC_TAMPCR_TAMPFREQ_1 | \
-                                                 RTC_TAMPCR_TAMPFREQ_2))                                       /*!< Each of the tamper inputs are sampled
-                                                                                                                    with a frequency =  RTCCLK / 256   */
-
-/**
-  * @}
-  */
-
-/** @defgroup RTCEx_Tamper_Pin_Precharge_Duration_Definitions RTCEx Tamper Pin Precharge Duration Definitions
-  * @{
-  */
-#define RTC_TAMPERPRECHARGEDURATION_1RTCCLK  ((uint32_t)0x00000000U)                                     /*!< Tamper pins are pre-charged before
-                                                                                                            sampling during 1 RTCCLK cycle  */
-#define RTC_TAMPERPRECHARGEDURATION_2RTCCLK  RTC_TAMPCR_TAMPPRCH_0                                      /*!< Tamper pins are pre-charged before
-                                                                                                             sampling during 2 RTCCLK cycles */
-#define RTC_TAMPERPRECHARGEDURATION_4RTCCLK  RTC_TAMPCR_TAMPPRCH_1                                      /*!< Tamper pins are pre-charged before
-                                                                                                             sampling during 4 RTCCLK cycles */
-#define RTC_TAMPERPRECHARGEDURATION_8RTCCLK ((uint32_t)(RTC_TAMPCR_TAMPPRCH_0 | RTC_TAMPCR_TAMPPRCH_1)) /*!< Tamper pins are pre-charged before
-                                                                                                             sampling during 8 RTCCLK cycles */
-
-/**
-  * @}
-  */
-
-/** @defgroup RTCEx_Tamper_TimeStampOnTamperDetection_Definitions RTCEx Tamper TimeStampOnTamperDetection Definitions
-  * @{
-  */
-#define RTC_TIMESTAMPONTAMPERDETECTION_ENABLE  RTC_TAMPCR_TAMPTS       /*!< TimeStamp on Tamper Detection event saved        */
-#define RTC_TIMESTAMPONTAMPERDETECTION_DISABLE ((uint32_t)0x00000000U)  /*!< TimeStamp on Tamper Detection event is not saved */
-
-/**
-  * @}
-  */
-
-/** @defgroup RTCEx_Tamper_Pull_UP_Definitions RTCEx Tamper Pull UP Definitions
-  * @{
-  */
-#define RTC_TAMPER_PULLUP_ENABLE  ((uint32_t)0x00000000U)  /*!< Tamper pins are pre-charged before sampling */
-#define RTC_TAMPER_PULLUP_DISABLE  RTC_TAMPCR_TAMPPUDIS   /*!< Tamper pins pre-charge is disabled          */
-
-/**
-  * @}
-  */
-
-/** @defgroup RTCEx_Wakeup_Timer_Definitions RTCEx Wakeup Timer Definitions
-  * @{
-  */
-#define RTC_WAKEUPCLOCK_RTCCLK_DIV16        ((uint32_t)0x00000000U)
-#define RTC_WAKEUPCLOCK_RTCCLK_DIV8         RTC_CR_WUCKSEL_0
-#define RTC_WAKEUPCLOCK_RTCCLK_DIV4         RTC_CR_WUCKSEL_1
-#define RTC_WAKEUPCLOCK_RTCCLK_DIV2         ((uint32_t) (RTC_CR_WUCKSEL_0 | RTC_CR_WUCKSEL_1))
-#define RTC_WAKEUPCLOCK_CK_SPRE_16BITS      RTC_CR_WUCKSEL_2
-#define RTC_WAKEUPCLOCK_CK_SPRE_17BITS      ((uint32_t) (RTC_CR_WUCKSEL_1 | RTC_CR_WUCKSEL_2))
-/**
-  * @}
-  */
-
-/** @defgroup RTCEx_Smooth_calib_period_Definitions RTCEx Smooth calib period Definitions
-  * @{
-  */
-#define RTC_SMOOTHCALIB_PERIOD_32SEC   ((uint32_t)0x00000000U)   /*!< If RTCCLK = 32768 Hz, Smooth calibation
-                                                                     period is 32s,  else 2exp20 RTCCLK pulses */
-#define RTC_SMOOTHCALIB_PERIOD_16SEC   RTC_CALR_CALW16          /*!< If RTCCLK = 32768 Hz, Smooth calibation
-                                                                     period is 16s, else 2exp19 RTCCLK pulses */
-#define RTC_SMOOTHCALIB_PERIOD_8SEC    RTC_CALR_CALW8           /*!< If RTCCLK = 32768 Hz, Smooth calibation
-                                                                     period is 8s, else 2exp18 RTCCLK pulses */
-
-/**
-  * @}
-  */
-
-/** @defgroup RTCEx_Smooth_calib_Plus_pulses_Definitions RTCEx Smooth calib Plus pulses Definitions
-  * @{
-  */
-#define RTC_SMOOTHCALIB_PLUSPULSES_SET    RTC_CALR_CALP            /*!< The number of RTCCLK pulses added
-                                                                        during a X -second window = Y - CALM[8:0]
-                                                                        with Y = 512, 256, 128 when X = 32, 16, 8 */
-#define RTC_SMOOTHCALIB_PLUSPULSES_RESET  ((uint32_t)0x00000000U)   /*!< The number of RTCCLK pulses subbstited
-                                                                        during a 32-second window = CALM[8:0] */
-
-/**
-  * @}
-  */
- /** @defgroup RTCEx_Calib_Output_selection_Definitions RTCEx Calib Output selection Definitions
-  * @{
-  */
-#define RTC_CALIBOUTPUT_512HZ            ((uint32_t)0x00000000U)
-#define RTC_CALIBOUTPUT_1HZ              RTC_CR_COSEL
-
-/**
-  * @}
-  */
-
-
-/** @defgroup RTCEx_Add_1_Second_Parameter_Definition RTCEx Add 1 Second Parameter Definitions
-  * @{
-  */
-#define RTC_SHIFTADD1S_RESET      ((uint32_t)0x00000000U)
-#define RTC_SHIFTADD1S_SET        RTC_SHIFTR_ADD1S
-/**
-  * @}
-  */
-
-  /** @defgroup RTCEx_Interrupts_Definitions RTCEx Interrupts Definitions
-  * @{
-  */
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx) 
-    
-#define RTC_IT_TAMP3                      ((uint32_t)RTC_TAMPCR_TAMP3IE)
-    
-#endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-    * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) ||
-	* (STM32L011xx) || (STM32L021xx)
-    */
-/**
-  * @}
-  */
-    
-/** @defgroup RTCEx_Flags_Definitions RTCEx Flags Definitions
-  * @{
-  */
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
-      
-#define RTC_FLAG_TAMP3F                   ((uint32_t)RTC_ISR_TAMP3F)
-      
-#endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) ||
-		* (STM32L011xx) || (STM32L021xx)
-      */   
-/**
-  * @}
-  */  
-  
-/**
-  * @}
-  */
-
-/* Exported macros -----------------------------------------------------------*/
-/** @defgroup RTCEx_Exported_Macros RTCEx Exported Macros
-  * @{
-  */
-
-/* ---------------------------------WAKEUPTIMER---------------------------------*/
-/** @defgroup RTCEx_WakeUp_Timer RTC WakeUp Timer
-  * @{
-  */
-/**
-  * @brief  Enable the RTC WakeUp Timer peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_WAKEUPTIMER_ENABLE(__HANDLE__)                      ((__HANDLE__)->Instance->CR |= (RTC_CR_WUTE))
-
-/**
-  * @brief  Disable the RTC WakeUp Timer peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_WAKEUPTIMER_DISABLE(__HANDLE__)                     ((__HANDLE__)->Instance->CR &= ~(RTC_CR_WUTE))
-
-/**
-  * @brief  Enable the RTC WakeUpTimer interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC WakeUpTimer interrupt sources to be enabled.
-  *         This parameter can be:
-  *            @arg RTC_IT_WUT: WakeUpTimer interrupt
-  * @retval None
-  */
-#define __HAL_RTC_WAKEUPTIMER_ENABLE_IT(__HANDLE__, __INTERRUPT__)    ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
-
-/**
-  * @brief  Disable the RTC WakeUpTimer interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC WakeUpTimer interrupt sources to be disabled.
-  *         This parameter can be:
-  *            @arg RTC_IT_WUT: WakeUpTimer interrupt
-  * @retval None
-  */
-#define __HAL_RTC_WAKEUPTIMER_DISABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
-
-/**
-  * @brief  Check whether the specified RTC WakeUpTimer interrupt has occurred or not.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC WakeUpTimer interrupt to check.
-  *         This parameter can be:
-  *            @arg RTC_IT_WUT:  WakeUpTimer interrupt
-  * @retval None
-  */
-#define __HAL_RTC_WAKEUPTIMER_GET_IT(__HANDLE__, __INTERRUPT__)       (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 4U)) != RESET) ? SET : RESET)
-
-/**
-  * @brief  Check whether the specified RTC Wake Up timer interrupt has been enabled or not.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Wake Up timer interrupt sources to check.
-  *         This parameter can be:
-  *            @arg RTC_IT_WUT:  WakeUpTimer interrupt
-  * @retval None
-  */
-#define __HAL_RTC_WAKEUPTIMER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)   (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
-
-/**
-  * @brief  Get the selected RTC WakeUpTimer's flag status.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC WakeUpTimer Flag is pending or not.
-  *          This parameter can be:
-  *             @arg RTC_FLAG_WUTF
-  *             @arg RTC_FLAG_WUTWF
-  * @retval None
-  */
-#define __HAL_RTC_WAKEUPTIMER_GET_FLAG(__HANDLE__, __FLAG__)   (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET)
-
-/**
-  * @brief  Clear the RTC Wake Up timer's pending flags.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC WakeUpTimer Flag to clear.
-  *         This parameter can be:
-  *            @arg RTC_FLAG_WUTF
-  * @retval None
-  */
-#define __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) 
-
-/* WAKE-UP TIMER EXTI */
-/* ------------------ */
-/**
-  * @brief  Enable interrupt on the RTC WakeUp Timer associated Exti line.
-  * @retval None
-  */
-#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT()       (EXTI->IMR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
-
-/**
-  * @brief  Disable interrupt on the RTC WakeUp Timer associated Exti line.
-  * @retval None
-  */
-#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT()      (EXTI->IMR &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
-
-/**
-  * @brief  Enable event on the RTC WakeUp Timer associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_EVENT()    (EXTI->EMR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
-
-/**
-  * @brief  Disable event on the RTC WakeUp Timer associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_EVENT()   (EXTI->EMR &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
-
-/**
-  * @brief  Enable falling edge trigger on the RTC WakeUp Timer associated Exti line. 
-  * @retval None.
-  */
-#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE()   (EXTI->FTSR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
-
-/**
-  * @brief  Disable falling edge trigger on the RTC WakeUp Timer associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE()  (EXTI->FTSR &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
-
-/**
-  * @brief  Enable rising edge trigger on the RTC WakeUp Timer associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE()    (EXTI->RTSR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
-
-/**
-  * @brief  Disable rising edge trigger on the RTC WakeUp Timer associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE()   (EXTI->RTSR &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
-
-/**
-  * @brief  Enable rising & falling edge trigger on the RTC WakeUp Timer associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE()  do { \
-                                                                   __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();  \
-                                                                   __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE(); \
-                                                                 } while(0U)
-
-/**
-  * @brief  Disable rising & falling edge trigger on the RTC WakeUp Timer associated Exti line.
-  * This parameter can be:
-  * @retval None.
-  */
-#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE()  do { \
-                                                                   __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();  \
-                                                                   __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE(); \
-                                                                  } while(0U)
-
-/**
-  * @brief Check whether the RTC WakeUp Timer associated Exti line interrupt flag is set or not.
-  * @retval Line Status.
-  */
-#define __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG()              (EXTI->PR & RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
-
-/**
-  * @brief Clear the RTC WakeUp Timer associated Exti line flag.
-  * @retval None.
-  */
-#define __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG()            (EXTI->PR = RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
-
-/**
-  * @brief Generate a Software interrupt on the RTC WakeUp Timer associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT()         (EXTI->SWIER |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
-/**
-  * @}
-  */
-
-/* ---------------------------------TIMESTAMP---------------------------------*/
-/** @defgroup RTCEx_Timestamp RTC Timestamp
-  * @{
-  */
-/**
-  * @brief  Enable the RTC TimeStamp peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_TIMESTAMP_ENABLE(__HANDLE__)                       ((__HANDLE__)->Instance->CR |= (RTC_CR_TSE))
-
-/**
-  * @brief  Disable the RTC TimeStamp peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_TIMESTAMP_DISABLE(__HANDLE__)                      ((__HANDLE__)->Instance->CR &= ~(RTC_CR_TSE))
-
-/**
-  * @brief  Enable the RTC TimeStamp interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC TimeStamp interrupt source to be enabled.
-  *         This parameter can be:
-  *            @arg RTC_IT_TS: TimeStamp interrupt
-  * @retval None
-  */
-#define __HAL_RTC_TIMESTAMP_ENABLE_IT(__HANDLE__, __INTERRUPT__)     ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
-
-/**
-  * @brief  Disable the RTC TimeStamp interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC TimeStamp interrupt source to be disabled. 
-  *         This parameter can be:
-  *            @arg RTC_IT_TS: TimeStamp interrupt
-  * @retval None
-  */
-#define __HAL_RTC_TIMESTAMP_DISABLE_IT(__HANDLE__, __INTERRUPT__)    ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
-
-/**
-  * @brief  Check whether the specified RTC TimeStamp interrupt has occurred or not.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC TimeStamp interrupt to check.
-  *         This parameter can be:
-  *            @arg RTC_IT_TS: TimeStamp interrupt
-  * @retval None
-  */
-#define __HAL_RTC_TIMESTAMP_GET_IT(__HANDLE__, __INTERRUPT__)        (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 4U)) != RESET) ? SET : RESET)
-
-/**
-  * @brief  Check whether the specified RTC Time Stamp interrupt has been enabled or not.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Time Stamp interrupt source to check.
-  *         This parameter can be:
-  *            @arg RTC_IT_TS: TimeStamp interrupt           
-  * @retval None
-  */
-#define __HAL_RTC_TIMESTAMP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)     (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
-
-/**
-  * @brief  Get the selected RTC TimeStamp's flag status.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC TimeStamp Flag is pending or not.
-  *         This parameter can be:
-  *            @arg RTC_FLAG_TSF
-  *            @arg RTC_FLAG_TSOVF
-  * @retval None
-  */
-#define __HAL_RTC_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__)     (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET)
-
-/**
-  * @brief  Clear the RTC Time Stamp's pending flags.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC Alarm Flag to clear.
-  *          This parameter can be:
-  *             @arg RTC_FLAG_TSF
-  * @retval None
-  */
-#define __HAL_RTC_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__)          ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
-
-/**
-  * @}
-  */
-
-/* ---------------------------------TAMPER------------------------------------*/
-/** @defgroup RTCEx_Tamper RTC Tamper
-  * @{
-  */ 
-  
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
-    defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx)
-/**
-  * @brief  Enable the RTC Tamper1 input detection.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER1_ENABLE(__HANDLE__)                         ((__HANDLE__)->Instance->TAMPCR |= (RTC_TAMPCR_TAMP1E))
-
-/**
-  * @brief  Disable the RTC Tamper1 input detection.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER1_DISABLE(__HANDLE__)                        ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TAMPCR_TAMP1E))
-
-#endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
-        * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
-        * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || 
-        * (STM32L031xx) || (STM32L041xx)
-        */
-
-/**
-  * @brief  Enable the RTC Tamper2 input detection.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER2_ENABLE(__HANDLE__)                         ((__HANDLE__)->Instance->TAMPCR |= (RTC_TAMPCR_TAMP2E))
-
-/**
-  * @brief  Disable the RTC Tamper2 input detection.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER2_DISABLE(__HANDLE__)                        ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TAMPCR_TAMP2E))
-
-
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
-
-/**
-  * @brief  Enable the RTC Tamper3 input detection.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER3_ENABLE(__HANDLE__)                         ((__HANDLE__)->Instance->TAMPCR |= (RTC_TAMPCR_TAMP3E))
-
-/**
-  * @brief  Disable the RTC Tamper3 input detection.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER3_DISABLE(__HANDLE__)                        ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TAMPCR_TAMP3E))
-
-#endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) ||
-		* (STM32L011xx) || (STM32L021xx)
-        */
-
-
-/**************************************************************************************************/
-        
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx)
-
-/**
-  * @brief  Enable the RTC Tamper interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt sources to be enabled.
-  *          This parameter can be any combination of the following values:
-  *             @arg  RTC_IT_TAMP: All tampers interrupts
-  *             @arg  RTC_IT_TAMP1: Tamper1 interrupt
-  *             @arg  RTC_IT_TAMP2: Tamper2 interrupt
-  * @retval None
-  */   
-#define __HAL_RTC_TAMPER_ENABLE_IT(__HANDLE__, __INTERRUPT__)        ((__HANDLE__)->Instance->TAMPCR |= (__INTERRUPT__))
-
-/**
-  * @brief  Disable the RTC Tamper interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt sources to be disabled. 
-  *         This parameter can be any combination of the following values:
-  *            @arg  RTC_IT_TAMP: All tampers interrupts
-  *            @arg  RTC_IT_TAMP1: Tamper1 interrupt
-  *            @arg  RTC_IT_TAMP2: Tamper2 interrupt
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_DISABLE_IT(__HANDLE__, __INTERRUPT__)       ((__HANDLE__)->Instance->TAMPCR &= ~(__INTERRUPT__))
-
-#elif defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-      defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-      defined (STM32L031xx) || defined (STM32L041xx)
-		
-/**
-  * @brief  Enable the RTC Tamper interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt sources to be enabled.
-  *          This parameter can be any combination of the following values:
-  *             @arg  RTC_IT_TAMP: All tampers interrupts
-  *             @arg  RTC_IT_TAMP1: Tamper1 interrupt
-  *             @arg  RTC_IT_TAMP2: Tamper2 interrupt
-  *             @arg  RTC_IT_TAMP3: Tamper3 interrupt
-  * @retval None
-  */   
-#define __HAL_RTC_TAMPER_ENABLE_IT(__HANDLE__, __INTERRUPT__)        ((__HANDLE__)->Instance->TAMPCR |= (__INTERRUPT__))
-
-/**
-  * @brief  Disable the RTC Tamper interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt sources to be disabled. 
-  *         This parameter can be any combination of the following values:
-  *            @arg  RTC_IT_TAMP: All tampers interrupts
-  *            @arg  RTC_IT_TAMP1: Tamper1 interrupt
-  *            @arg  RTC_IT_TAMP2: Tamper2 interrupt
-  *            @arg  RTC_IT_TAMP3: Tamper3 interrupt
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_DISABLE_IT(__HANDLE__, __INTERRUPT__)       ((__HANDLE__)->Instance->TAMPCR &= ~(__INTERRUPT__))
-
-#elif defined (STM32L011xx) || defined (STM32L021xx)
-
-/**
-  * @brief  Enable the RTC Tamper interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt sources to be enabled.
-  *          This parameter can be any combination of the following values:
-  *             @arg  RTC_IT_TAMP: All tampers interrupts
-  *             @arg  RTC_IT_TAMP2: Tamper2 interrupt
-  *             @arg  RTC_IT_TAMP3: Tamper3 interrupt
-  * @retval None
-  */   
-#define __HAL_RTC_TAMPER_ENABLE_IT(__HANDLE__, __INTERRUPT__)        ((__HANDLE__)->Instance->TAMPCR |= (__INTERRUPT__))
-
-/**
-  * @brief  Disable the RTC Tamper interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt sources to be disabled. 
-  *         This parameter can be any combination of the following values:
-  *            @arg  RTC_IT_TAMP: All tampers interrupts
-  *            @arg  RTC_IT_TAMP2: Tamper2 interrupt
-  *            @arg  RTC_IT_TAMP3: Tamper3 interrupt
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_DISABLE_IT(__HANDLE__, __INTERRUPT__)       ((__HANDLE__)->Instance->TAMPCR &= ~(__INTERRUPT__))
-
-#endif /* (STM32L011xx) || (STM32L021xx) 
-        */
-
-/**************************************************************************************************/
-
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx)
-
-/**
-  * @brief  Check whether the specified RTC Tamper interrupt has occurred or not.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt to check.
-  *         This parameter can be:
-  *            @arg  RTC_IT_TAMP1: Tamper1 interrupt     
-  *            @arg  RTC_IT_TAMP2: Tamper2 interrupt
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_GET_IT(__HANDLE__, __INTERRUPT__)    (((__INTERRUPT__) == RTC_IT_TAMP1) ? (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 3U)) != RESET) ? SET : RESET) : \
-                                                               ((__INTERRUPT__) == RTC_IT_TAMP2) ? (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 5U)) != RESET) ? SET : RESET))
-                                                                                                                     
-#elif defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-      defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-      defined (STM32L031xx) || defined (STM32L041xx)
-	
-/**
-  * @brief  Check whether the specified RTC Tamper interrupt has occurred or not.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt to check.
-  *         This parameter can be:
-  *            @arg  RTC_IT_TAMP1: Tamper1 interrupt     
-  *            @arg  RTC_IT_TAMP2: Tamper2 interrupt
-  *            @arg  RTC_IT_TAMP3: Tamper3 interrupt
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_GET_IT(__HANDLE__, __INTERRUPT__)    (((__INTERRUPT__) == RTC_IT_TAMP1) ? (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 3U)) != RESET) ? SET : RESET) : \
-                                                               ((__INTERRUPT__) == RTC_IT_TAMP2) ? (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 5U)) != RESET) ? SET : RESET) : \
-                                                               ((__INTERRUPT__) == RTC_IT_TAMP3) ? (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 7U)) != RESET) ? SET : RESET))
-
-#elif defined (STM32L011xx) || defined (STM32L021xx)
-
-/**
-  * @brief  Check whether the specified RTC Tamper interrupt has occurred or not.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt to check.
-  *         This parameter can be:    
-  *            @arg  RTC_IT_TAMP2: Tamper2 interrupt
-  *            @arg  RTC_IT_TAMP3: Tamper3 interrupt
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_GET_IT(__HANDLE__, __INTERRUPT__)    (((__INTERRUPT__) == RTC_IT_TAMP2) ? (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 5U)) != RESET) ? SET : RESET) : \
-                                                               ((__INTERRUPT__) == RTC_IT_TAMP3) ? (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 7U)) != RESET) ? SET : RESET))
-
-
-#endif /* (STM32L011xx) || (STM32L021xx) 
-        */
-                                                               
-/**************************************************************************************************/
-        
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx)
-
-/**
-  * @brief  Check whether the specified RTC Tamper interrupt has been enabled or not.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt source to check.
-  *         This parameter can be:
-  *            @arg  RTC_IT_TAMP: All tampers interrupts
-  *            @arg  RTC_IT_TAMP1: Tamper1 interrupt
-  *            @arg  RTC_IT_TAMP2: Tamper2 interrupt
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)    (((((__HANDLE__)->Instance->TAMPCR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
-
-
-/**
-  * @brief  Get the selected RTC Tamper's flag status.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC Tamper Flag is pending or not.
-  *          This parameter can be:
-  *             @arg RTC_FLAG_TAMP1F: Tamper1 flag
-  *             @arg RTC_FLAG_TAMP2F: Tamper2 flag
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__)        (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET)
-
-/**
-  * @brief  Clear the RTC Tamper's pending flags.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC Tamper Flag to clear.
-  *          This parameter can be:
-  *             @arg RTC_FLAG_TAMP1F: Tamper1 flag
-  *             @arg RTC_FLAG_TAMP2F: Tamper2 flag
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__)      ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
-
-
-#elif defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-      defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-      defined (STM32L031xx) || defined (STM32L041xx)
-	
-/**
-  * @brief  Check whether the specified RTC Tamper interrupt has been enabled or not.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt source to check.
-  *         This parameter can be:
-  *            @arg  RTC_IT_TAMP: All tampers interrupts
-  *            @arg  RTC_IT_TAMP1: Tamper1 interrupt
-  *            @arg  RTC_IT_TAMP2: Tamper2 interrupt
-  *            @arg  RTC_IT_TAMP3: Tamper3 interrupt
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)    (((((__HANDLE__)->Instance->TAMPCR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
-
-
-/**
-  * @brief  Get the selected RTC Tamper's flag status.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC Tamper Flag is pending or not.
-  *          This parameter can be:
-  *             @arg RTC_FLAG_TAMP1F: Tamper1 flag
-  *             @arg RTC_FLAG_TAMP2F: Tamper2 flag
-  *             @arg RTC_FLAG_TAMP3F: Tamper3 flag
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__)        (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET)
-
-/**
-  * @brief  Clear the RTC Tamper's pending flags.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC Tamper Flag to clear.
-  *          This parameter can be:
-  *             @arg RTC_FLAG_TAMP1F: Tamper1 flag
-  *             @arg RTC_FLAG_TAMP2F: Tamper2 flag
-  *             @arg RTC_FLAG_TAMP3F: Tamper3 flag 
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__)      ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
-
-#elif defined (STM32L011xx) || defined (STM32L021xx)
-	
-/**
-  * @brief  Check whether the specified RTC Tamper interrupt has been enabled or not.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt source to check.
-  *         This parameter can be:
-  *            @arg  RTC_IT_TAMP: All tampers interrupts
-  *            @arg  RTC_IT_TAMP2: Tamper2 interrupt
-  *            @arg  RTC_IT_TAMP3: Tamper3 interrupt
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)    (((((__HANDLE__)->Instance->TAMPCR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
-
-
-/**
-  * @brief  Get the selected RTC Tamper's flag status.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC Tamper Flag is pending or not.
-  *          This parameter can be:
-  *             @arg RTC_FLAG_TAMP2F: Tamper2 flag
-  *             @arg RTC_FLAG_TAMP3F: Tamper3 flag
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__)        (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET)
-
-/**
-  * @brief  Clear the RTC Tamper's pending flags.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC Tamper Flag to clear.
-  *          This parameter can be:
-  *             @arg RTC_FLAG_TAMP2F: Tamper2 flag
-  *             @arg RTC_FLAG_TAMP3F: Tamper3 flag 
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__)      ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
-
-#endif /* (STM32L011xx) || (STM32L021xx) 
-        */
-
-        
-/**************************************************************************************************/ 
-       
-/**
-  * @}
-  */
-
-/* --------------------------TAMPER/TIMESTAMP---------------------------------*/
-/** @defgroup RTCEx_Tamper_Timestamp EXTI RTC Tamper Timestamp EXTI
-  * @{
-  */
-  
-/* TAMPER TIMESTAMP EXTI */
-/* --------------------- */
-/**
-  * @brief  Enable interrupt on the RTC Tamper and Timestamp associated Exti line.
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT()        (EXTI->IMR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
-
-/**
-  * @brief  Disable interrupt on the RTC Tamper and Timestamp associated Exti line.
-  * @retval None
-  */
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT()       (EXTI->IMR &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
-
-/**
-  * @brief  Enable event on the RTC Tamper and Timestamp associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT()    (EXTI->EMR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
-
-/**
-  * @brief  Disable event on the RTC Tamper and Timestamp associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT()   (EXTI->EMR &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
-
-/**
-  * @brief  Enable falling edge trigger on the RTC Tamper and Timestamp associated Exti line. 
-  * @retval None.
-  */
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE()   (EXTI->FTSR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
-
-/**
-  * @brief  Disable falling edge trigger on the RTC Tamper and Timestamp associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE()  (EXTI->FTSR &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
-
-/**
-  * @brief  Enable rising edge trigger on the RTC Tamper and Timestamp associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE()    (EXTI->RTSR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
-
-/**
-  * @brief  Disable rising edge trigger on the RTC Tamper and Timestamp associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE()   (EXTI->RTSR &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
-
-/**
-  * @brief  Enable rising & falling edge trigger on the RTC Tamper and Timestamp associated Exti line.
-  * @retval None.
-  */
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_FALLING_EDGE()  do { \
-                                                                        __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();  \
-                                                                        __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE(); \
-                                                                      } while(0U)
-
-/**
-  * @brief  Disable rising & falling edge trigger on the RTC Tamper and Timestamp associated Exti line.
-  * This parameter can be:
-  * @retval None.
-  */
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_FALLING_EDGE()  do { \
-                                                                        __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE();  \
-                                                                        __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE(); \
-                                                                       } while(0U)
-
-/**
-  * @brief Check whether the RTC Tamper and Timestamp associated Exti line interrupt flag is set or not.
-  * @retval Line Status.
-  */
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG()         (EXTI->PR & RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
-
-/**
-  * @brief Clear the RTC Tamper and Timestamp associated Exti line flag.
-  * @retval None.
-  */
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG()       (EXTI->PR = RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
-
-/**
-  * @brief Generate a Software interrupt on the RTC Tamper and Timestamp associated Exti line
-  * @retval None.
-  */
-#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()    (EXTI->SWIER |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
-/**
-  * @}
-  */
-
-/* ------------------------------Calibration----------------------------------*/
-/** @defgroup RTCEx_Calibration RTC Calibration
-  * @{
-  */
-
-/**
-  * @brief  Enable the RTC calibration output.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(__HANDLE__)               ((__HANDLE__)->Instance->CR |= (RTC_CR_COE))
-
-/**
-  * @brief  Disable the calibration output.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(__HANDLE__)              ((__HANDLE__)->Instance->CR &= ~(RTC_CR_COE))
-
-/**
-  * @brief  Enable the clock reference detection.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_CLOCKREF_DETECTION_ENABLE(__HANDLE__)               ((__HANDLE__)->Instance->CR |= (RTC_CR_REFCKON))
-
-/**
-  * @brief  Disable the clock reference detection.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @retval None
-  */
-#define __HAL_RTC_CLOCKREF_DETECTION_DISABLE(__HANDLE__)              ((__HANDLE__)->Instance->CR &= ~(RTC_CR_REFCKON))
-
-/**
-  * @brief  Get the selected RTC shift operation's flag status.
-  * @param  __HANDLE__: specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC shift operation Flag is pending or not.
-  *          This parameter can be:
-  *             @arg RTC_FLAG_SHPF
-  * @retval None
-  */
-#define __HAL_RTC_SHIFT_GET_FLAG(__HANDLE__, __FLAG__)                (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup RTCEx_Exported_Functions RTCEx Exported Functions
-  * @{
-  */
-
-/* RTC TimeStamp and Tamper functions *****************************************/
-/** @defgroup RTCEx_Exported_Functions_Group1 Extended RTC TimeStamp and Tamper functions
- * @{
- */ 
-
-HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin);
-HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin);
-HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc);
-HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTimeStamp, RTC_DateTypeDef *sTimeStampDate, uint32_t Format);
-
-HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper);
-HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper);
-HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper);
-void              HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc);
-
-void              HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc);
-void              HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef *hrtc);
-
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
-
-void              HAL_RTCEx_Tamper3EventCallback(RTC_HandleTypeDef *hrtc);
-
-#endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) ||
-		* (STM32L011xx) || (STM32L021xx)
-        */
-
-void              HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc);
-HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
-HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
-HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
-
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
-
-HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
-
-#endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-    * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) ||
-	* (STM32L011xx) || (STM32L021xx)
-    */
-
-/**
-  * @}
-  */
-
-/* RTC Wake-up functions ******************************************************/
-/** @defgroup RTCEx_Exported_Functions_Group2 Extended RTC Wake-up functions
- * @{
- */ 
-
-HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock);
-HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock);
-uint32_t          HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc);
-uint32_t          HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc);
-void              HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc);
-void              HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc);
-HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
-/**
-  * @}
-  */
-
-/* Extended Control functions ************************************************/
-/** @defgroup RTCEx_Exported_Functions_Group3 Extended Peripheral Control functions
- * @{
- */ 
-
-void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data);
-uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister);
-
-HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef *hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmoothCalibMinusPulsesValue);
-HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef *hrtc, uint32_t ShiftAdd1S, uint32_t ShiftSubFS);
-HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef *hrtc, uint32_t CalibOutput);
-HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef *hrtc);
-HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef *hrtc);
-HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef *hrtc);
-HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef *hrtc);
-HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef *hrtc);
-/**
-  * @}
-  */
-
-/* Extended RTC features functions *******************************************/
-/** @defgroup RTCEx_Exported_Functions_Group4 Extended features functions
- * @{
- */ 
-void              HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc); 
-HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Private types -------------------------------------------------------------*/ 
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup RTCEx_Private_Constants RTCEx Private Constants
-  * @{
-  */
-  
-/* Masks Definition */
-
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx)
-    
-#define RTC_FLAGS_MASK          ((uint32_t) (RTC_FLAG_RECALPF | RTC_FLAG_TAMP2F | RTC_FLAG_TAMP1F| \
-                                             RTC_FLAG_TSOVF | RTC_FLAG_TSF | RTC_FLAG_WUTF       | \
-                                             RTC_FLAG_ALRBF | RTC_FLAG_ALRAF                     | \
-                                             RTC_FLAG_INITF | RTC_FLAG_RSF | RTC_FLAG_INITS      | \
-                                             RTC_FLAG_SHPF | RTC_FLAG_WUTWF |RTC_FLAG_ALRBWF     | \
-                                             RTC_FLAG_ALRAWF))
-
-#define RTC_TAMPCR_TAMPXE     ((uint32_t) (RTC_TAMPCR_TAMP2E | RTC_TAMPCR_TAMP1E))
-#define RTC_TAMPCR_TAMPXIE    ((uint32_t) (RTC_TAMPER1_INTERRUPT | RTC_TAMPER2_INTERRUPT | \
-                                           RTC_ALL_TAMPER_INTERRUPT))
-                                           
-#elif defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-      defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-      defined (STM32L031xx) || defined (STM32L041xx)
-       
-#define RTC_FLAGS_MASK          ((uint32_t) (RTC_FLAG_RECALPF | RTC_FLAG_TAMP3F | RTC_FLAG_TAMP2F | \
-                                             RTC_FLAG_TAMP1F| RTC_FLAG_TSOVF | RTC_FLAG_TSF       | \
-                                             RTC_FLAG_WUTF | RTC_FLAG_ALRBF | RTC_FLAG_ALRAF      | \
-                                             RTC_FLAG_INITF | RTC_FLAG_RSF                        | \
-                                             RTC_FLAG_INITS | RTC_FLAG_SHPF | RTC_FLAG_WUTWF      | \
-                                             RTC_FLAG_ALRBWF | RTC_FLAG_ALRAWF))
-                                             
-#define RTC_TAMPCR_TAMPXE     ((uint32_t) (RTC_TAMPCR_TAMP3E | RTC_TAMPCR_TAMP2E | RTC_TAMPCR_TAMP1E))
-#define RTC_TAMPCR_TAMPXIE    ((uint32_t) (RTC_TAMPER1_INTERRUPT | RTC_TAMPER2_INTERRUPT | \
-                                           RTC_TAMPER3_INTERRUPT | RTC_ALL_TAMPER_INTERRUPT))
-                                           
-#elif defined (STM32L011xx) || defined (STM32L021xx)
-                                          
-#define RTC_FLAGS_MASK          ((uint32_t) (RTC_FLAG_RECALPF | RTC_FLAG_TAMP3F | RTC_FLAG_TAMP2F | \
-                                             RTC_FLAG_TSOVF | RTC_FLAG_TSF                        | \
-                                             RTC_FLAG_WUTF | RTC_FLAG_ALRBF | RTC_FLAG_ALRAF      | \
-                                             RTC_FLAG_INITF | RTC_FLAG_RSF                        | \
-                                             RTC_FLAG_INITS | RTC_FLAG_SHPF | RTC_FLAG_WUTWF      | \
-                                             RTC_FLAG_ALRBWF | RTC_FLAG_ALRAWF))
-                                             
-#define RTC_TAMPCR_TAMPXE     ((uint32_t) (RTC_TAMPCR_TAMP3E | RTC_TAMPCR_TAMP2E))
-#define RTC_TAMPCR_TAMPXIE    ((uint32_t) (RTC_TAMPER2_INTERRUPT | \
-                                           RTC_TAMPER3_INTERRUPT | RTC_ALL_TAMPER_INTERRUPT))
-#endif /* (STM32L011xx) || (STM32L021xx)
-       */        
-        
-#define RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT  ((uint32_t)EXTI_IMR_IM19)  /*!< External interrupt line 19 Connected to the RTC Tamper and Time Stamp events */
-#define RTC_EXTI_LINE_WAKEUPTIMER_EVENT       ((uint32_t)EXTI_IMR_IM20)  /*!< External interrupt line 20 Connected to the RTC Wakeup event */
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup RTCEx_Private_Macros RTCEx Private Macros
-  * @{
-  */
-
-/** @defgroup RTCEx_IS_RTC_Definitions Private macros to check input parameters
-  * @{
-  */ 
-
-#define IS_RTC_OUTPUT(OUTPUT) (((OUTPUT) == RTC_OUTPUT_DISABLE) || \
-                               ((OUTPUT) == RTC_OUTPUT_ALARMA)  || \
-                               ((OUTPUT) == RTC_OUTPUT_ALARMB)  || \
-                               ((OUTPUT) == RTC_OUTPUT_WAKEUP))
-
-#define IS_RTC_BKP(BKP)                   ((BKP) < (uint32_t) RTC_BKP_NUMBER)
-
-#define IS_TIMESTAMP_EDGE(EDGE) (((EDGE) == RTC_TIMESTAMPEDGE_RISING) || \
-                                 ((EDGE) == RTC_TIMESTAMPEDGE_FALLING))
-
-#define  IS_RTC_TAMPER(TAMPER)  ((((TAMPER) & ((uint32_t)(0xFFFFFFFFU ^ RTC_TAMPCR_TAMPXE))) == 0x00U) && ((TAMPER) != (uint32_t)RESET))
-
-#define IS_RTC_TAMPER_INTERRUPT(INTERRUPT) ((((INTERRUPT) & (uint32_t)(0xFFFFFFFFU ^ RTC_TAMPCR_TAMPXIE)) == 0x00U) && ((INTERRUPT) != (uint32_t)RESET))
-
-#define IS_RTC_TIMESTAMP_PIN(PIN)  (((PIN) == RTC_TIMESTAMPPIN_DEFAULT))
-
-#define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TAMPERTRIGGER_RISINGEDGE) || \
-                                        ((TRIGGER) == RTC_TAMPERTRIGGER_FALLINGEDGE) || \
-                                        ((TRIGGER) == RTC_TAMPERTRIGGER_LOWLEVEL) || \
-                                        ((TRIGGER) == RTC_TAMPERTRIGGER_HIGHLEVEL)) 
-
-#define IS_RTC_TAMPER_ERASE_MODE(MODE)             (((MODE) == RTC_TAMPER_ERASE_BACKUP_ENABLE) || \
-                                                    ((MODE) == RTC_TAMPER_ERASE_BACKUP_DISABLE))
-
-#define IS_RTC_TAMPER_MASKFLAG_STATE(STATE)        (((STATE) == RTC_TAMPERMASK_FLAG_ENABLE) || \
-                                                    ((STATE) == RTC_TAMPERMASK_FLAG_DISABLE))
-
-#define IS_RTC_TAMPER_FILTER(FILTER)  (((FILTER) == RTC_TAMPERFILTER_DISABLE) || \
-                                       ((FILTER) == RTC_TAMPERFILTER_2SAMPLE) || \
-                                       ((FILTER) == RTC_TAMPERFILTER_4SAMPLE) || \
-                                       ((FILTER) == RTC_TAMPERFILTER_8SAMPLE))
-
-#define IS_RTC_TAMPER_SAMPLING_FREQ(FREQ) (((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768)|| \
-                                           ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384)|| \
-                                           ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192) || \
-                                           ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096) || \
-                                           ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048) || \
-                                           ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024) || \
-                                           ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512)  || \
-                                          ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256))
-
-#define IS_RTC_TAMPER_PRECHARGE_DURATION(DURATION) (((DURATION) == RTC_TAMPERPRECHARGEDURATION_1RTCCLK) || \
-                                                    ((DURATION) == RTC_TAMPERPRECHARGEDURATION_2RTCCLK) || \
-                                                    ((DURATION) == RTC_TAMPERPRECHARGEDURATION_4RTCCLK) || \
-                                                   ((DURATION) == RTC_TAMPERPRECHARGEDURATION_8RTCCLK))
-
-#define IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(DETECTION) (((DETECTION) == RTC_TIMESTAMPONTAMPERDETECTION_ENABLE) || \
-                                                              ((DETECTION) == RTC_TIMESTAMPONTAMPERDETECTION_DISABLE))
-
-#define IS_RTC_TAMPER_PULLUP_STATE(STATE) (((STATE) == RTC_TAMPER_PULLUP_ENABLE) || \
-                                           ((STATE) == RTC_TAMPER_PULLUP_DISABLE))
-
-#define IS_RTC_WAKEUP_CLOCK(CLOCK) (((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV16)   || \
-                                    ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV8)    || \
-                                    ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV4)    || \
-                                    ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV2)    || \
-                                    ((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_16BITS) || \
-                                    ((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_17BITS))
-
-#define IS_RTC_WAKEUP_COUNTER(COUNTER)  ((COUNTER) <= RTC_WUTR_WUT)
-
-#define IS_RTC_SMOOTH_CALIB_PERIOD(PERIOD) (((PERIOD) == RTC_SMOOTHCALIB_PERIOD_32SEC) || \
-                                            ((PERIOD) == RTC_SMOOTHCALIB_PERIOD_16SEC) || \
-                                            ((PERIOD) == RTC_SMOOTHCALIB_PERIOD_8SEC))
-
-#define IS_RTC_SMOOTH_CALIB_PLUS(PLUS) (((PLUS) == RTC_SMOOTHCALIB_PLUSPULSES_SET) || \
-                                        ((PLUS) == RTC_SMOOTHCALIB_PLUSPULSES_RESET))
-
-
-/** @defgroup RTCEx_Smooth_calib_Minus_pulses_Definitions RTCEx Smooth calib Minus pulses Definitions
-  * @{
-  */
-#define  IS_RTC_SMOOTH_CALIB_MINUS(VALUE) ((VALUE) <= RTC_CALR_CALM)
-/**
-  * @}
-  */
-  
-
-#define IS_RTC_SHIFT_ADD1S(SEL) (((SEL) == RTC_SHIFTADD1S_RESET) || \
-                                 ((SEL) == RTC_SHIFTADD1S_SET))
-
-
-
-/** @defgroup RTCEx_Substract_Fraction_Of_Second_Value RTCEx Substract Fraction Of Second Value
-  * @{
-  */
-#define IS_RTC_SHIFT_SUBFS(FS) ((FS) <= RTC_SHIFTR_SUBFS)
-/**
-  * @}
-  */
-#define IS_RTC_CALIB_OUTPUT(OUTPUT)  (((OUTPUT) == RTC_CALIBOUTPUT_512HZ) || \
-                                      ((OUTPUT) == RTC_CALIBOUTPUT_1HZ))
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_RTC_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_smartcard.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_smartcard.h
deleted file mode 100755
index 6c02d079..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_smartcard.h
+++ /dev/null
@@ -1,1095 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_smartcard.h
-  * @author  MCD Application Team
-  * @brief   Header file of SMARTCARD HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_SMARTCARD_H
-#define __STM32L0xx_HAL_SMARTCARD_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup SMARTCARD
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup SMARTCARD_Exported_Types SMARTCARD Exported Types
-  * @{
-  */
-
-/**
-  * @brief SMARTCARD Init Structure definition
-  */
-typedef struct
-{
-  uint32_t BaudRate;                  /*!< Configures the SmartCard communication baud rate.
-                                           The baud rate register is computed using the following formula:
-                                              Baud Rate Register = ((PCLKx) / ((hsmartcard->Init.BaudRate))) */
-
-  uint32_t WordLength;                /*!< Specifies the number of data bits transmitted or received in a frame.
-                                           This parameter @ref SMARTCARD_Word_Length can only be set to 9 (8 data + 1 parity bits). */
-
-  uint32_t StopBits;                  /*!< Specifies the number of stop bits.
-                                           This parameter can be a value of @ref SMARTCARD_Stop_Bits. */
-
-  uint16_t Parity;                    /*!< Specifies the parity mode.
-                                           This parameter can be a value of @ref SMARTCARD_Parity
-                                           @note The parity is enabled by default (PCE is forced to 1).
-                                                 Since the WordLength is forced to 8 bits + parity, M is
-                                                 forced to 1 and the parity bit is the 9th bit. */
-
-  uint16_t Mode;                      /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
-                                           This parameter can be a value of @ref SMARTCARD_Mode */
-
-  uint16_t CLKPolarity;               /*!< Specifies the steady state of the serial clock.
-                                           This parameter can be a value of @ref SMARTCARD_Clock_Polarity */
-
-  uint16_t CLKPhase;                  /*!< Specifies the clock transition on which the bit capture is made.
-                                           This parameter can be a value of @ref SMARTCARD_Clock_Phase */
-
-  uint16_t CLKLastBit;                /*!< Specifies whether the clock pulse corresponding to the last transmitted
-                                           data bit (MSB) has to be output on the SCLK pin in synchronous mode.
-                                           This parameter can be a value of @ref SMARTCARD_Last_Bit */
-
-  uint16_t OneBitSampling;            /*!< Specifies whether a single sample or three samples' majority vote is selected.
-                                           Selecting the single sample method increases the receiver tolerance to clock
-                                           deviations. This parameter can be a value of @ref SMARTCARD_OneBit_Sampling. */
-
-  uint8_t  Prescaler;                 /*!< Specifies the SmartCard Prescaler. */
-
-  uint8_t  GuardTime;                 /*!< Specifies the SmartCard Guard Time applied after stop bits. */
-
-  uint16_t NACKEnable;                /*!< Specifies whether the SmartCard NACK transmission is enabled
-                                           in case of parity error.
-                                           This parameter can be a value of @ref SMARTCARD_NACK_Enable */
-
-  uint32_t TimeOutEnable;             /*!< Specifies whether the receiver timeout is enabled.
-                                            This parameter can be a value of @ref SMARTCARD_Timeout_Enable*/
-
-  uint32_t TimeOutValue;              /*!< Specifies the receiver time out value in number of baud blocks:
-                                           it is used to implement the Character Wait Time (CWT) and
-                                           Block Wait Time (BWT). It is coded over 24 bits. */
-
-  uint8_t BlockLength;                /*!< Specifies the SmartCard Block Length in T=1 Reception mode.
-                                           This parameter can be any value from 0x0 to 0xFF */
-
-  uint8_t AutoRetryCount;             /*!< Specifies the SmartCard auto-retry count (number of retries in
-                                            receive and transmit mode). When set to 0, retransmission is
-                                            disabled. Otherwise, its maximum value is 7 (before signalling
-                                            an error) */
-
-}SMARTCARD_InitTypeDef;
-
-/**
-  * @brief  SMARTCARD advanced features initalization structure definition
-  */
-typedef struct
-{
-  uint32_t AdvFeatureInit;            /*!< Specifies which advanced SMARTCARD features is initialized. Several
-                                           advanced features may be initialized at the same time. This parameter
-                                           can be a value of @ref SMARTCARD_Advanced_Features_Initialization_Type */
-
-  uint32_t TxPinLevelInvert;          /*!< Specifies whether the TX pin active level is inverted.
-                                           This parameter can be a value of @ref SMARTCARD_Tx_Inv  */
-
-  uint32_t RxPinLevelInvert;          /*!< Specifies whether the RX pin active level is inverted.
-                                           This parameter can be a value of @ref SMARTCARD_Rx_Inv  */
-
-  uint32_t DataInvert;                /*!< Specifies whether data are inverted (positive/direct logic
-                                           vs negative/inverted logic).
-                                           This parameter can be a value of @ref SMARTCARD_Data_Inv */
-
-  uint32_t Swap;                      /*!< Specifies whether TX and RX pins are swapped.
-                                           This parameter can be a value of @ref SMARTCARD_Rx_Tx_Swap */
-
-  uint32_t OverrunDisable;            /*!< Specifies whether the reception overrun detection is disabled.
-                                           This parameter can be a value of @ref SMARTCARD_Overrun_Disable */
-
-  uint32_t DMADisableonRxError;       /*!< Specifies whether the DMA is disabled in case of reception error.
-                                           This parameter can be a value of @ref SMARTCARD_DMA_Disable_on_Rx_Error */
-
-  uint32_t MSBFirst;                  /*!< Specifies whether MSB is sent first on UART line.
-                                           This parameter can be a value of @ref SMARTCARD_MSB_First */
-}SMARTCARD_AdvFeatureInitTypeDef;
-
-/**
-  * @brief HAL SMARTCARD State structures definition
-  * @note  HAL SMARTCARD State value is a combination of 2 different substates: gState and RxState.
-  *        - gState contains SMARTCARD state information related to global Handle management 
-  *          and also information related to Tx operations.
-  *          gState value coding follow below described bitmap :
-  *          b7-b6  Error information 
-  *             00 : No Error
-  *             01 : (Not Used)
-  *             10 : Timeout
-  *             11 : Error
-  *          b5     IP initilisation status
-  *             0  : Reset (IP not initialized)
-  *             1  : Init done (IP not initialized. HAL SMARTCARD Init function already called)
-  *          b4-b3  (not used)
-  *             xx : Should be set to 00
-  *          b2     Intrinsic process state
-  *             0  : Ready
-  *             1  : Busy (IP busy with some configuration or internal operations)
-  *          b1     (not used)
-  *             x  : Should be set to 0
-  *          b0     Tx state
-  *             0  : Ready (no Tx operation ongoing)
-  *             1  : Busy (Tx operation ongoing)
-  *        - RxState contains information related to Rx operations.
-  *          RxState value coding follow below described bitmap :
-  *          b7-b6  (not used)
-  *             xx : Should be set to 00
-  *          b5     IP initilisation status
-  *             0  : Reset (IP not initialized)
-  *             1  : Init done (IP not initialized)
-  *          b4-b2  (not used)
-  *            xxx : Should be set to 000
-  *          b1     Rx state
-  *             0  : Ready (no Rx operation ongoing)
-  *             1  : Busy (Rx operation ongoing)
-  *          b0     (not used)
-  *             x  : Should be set to 0.
-  */
-typedef enum
-{
-  HAL_SMARTCARD_STATE_RESET             = 0x00U,   /*!< Peripheral is not initialized
-                                                        Value is allowed for gState and RxState */
-  HAL_SMARTCARD_STATE_READY             = 0x20U,   /*!< Peripheral Initialized and ready for use
-                                                        Value is allowed for gState and RxState */
-  HAL_SMARTCARD_STATE_BUSY              = 0x24U,   /*!< an internal process is ongoing 
-                                                        Value is allowed for gState only */
-  HAL_SMARTCARD_STATE_BUSY_TX           = 0x21U,   /*!< Data Transmission process is ongoing
-                                                        Value is allowed for gState only */
-  HAL_SMARTCARD_STATE_BUSY_RX           = 0x22U,   /*!< Data Reception process is ongoing
-                                                        Value is allowed for RxState only */
-  HAL_SMARTCARD_STATE_BUSY_TX_RX        = 0x23U,   /*!< Data Transmission and Reception process is ongoing
-                                                        Not to be used for neither gState nor RxState.
-                                                        Value is result of combination (Or) between gState and RxState values */
-  HAL_SMARTCARD_STATE_TIMEOUT           = 0xA0U,   /*!< Timeout state
-                                                        Value is allowed for gState only */
-  HAL_SMARTCARD_STATE_ERROR             = 0xE0U    /*!< Error
-                                                        Value is allowed for gState only */
-}HAL_SMARTCARD_StateTypeDef;
-
-/**
-  * @brief  HAL SMARTCARD Error Code structure definition
-  */
-typedef enum
-{
-  HAL_SMARTCARD_ERROR_NONE      = 0x00,    /*!< No error                */
-  HAL_SMARTCARD_ERROR_PE        = 0x01,    /*!< Parity error            */
-  HAL_SMARTCARD_ERROR_NE        = 0x02,    /*!< Noise error             */
-  HAL_SMARTCARD_ERROR_FE        = 0x04,    /*!< frame error             */
-  HAL_SMARTCARD_ERROR_ORE       = 0x08,    /*!< Overrun error           */
-  HAL_SMARTCARD_ERROR_DMA       = 0x10,    /*!< DMA transfer error      */
-  HAL_SMARTCARD_ERROR_RTO       = 0x20     /*!< Receiver TimeOut error  */
-}HAL_SMARTCARD_ErrorTypeDef;
-
-/**
-  * @brief  SMARTCARD handle Structure definition
-  */
-typedef struct
-{
-  USART_TypeDef                   *Instance;        /*!< USART registers base address                          */
-
-  SMARTCARD_InitTypeDef           Init;             /*!< SmartCard communication parameters                    */
-
-  SMARTCARD_AdvFeatureInitTypeDef AdvancedInit;     /*!< SmartCard advanced features initialization parameters */
-
-  uint8_t                         *pTxBuffPtr;      /*!< Pointer to SmartCard Tx transfer Buffer               */
-
-  uint16_t                        TxXferSize;       /*!< SmartCard Tx Transfer size                            */
-
-  __IO uint16_t                   TxXferCount;      /*!< SmartCard Tx Transfer Counter                         */
-
-  uint8_t                         *pRxBuffPtr;      /*!< Pointer to SmartCard Rx transfer Buffer               */
-
-  uint16_t                        RxXferSize;       /*!< SmartCard Rx Transfer size                            */
-
-  __IO uint16_t                   RxXferCount;      /*!< SmartCard Rx Transfer Counter                         */
-
-  DMA_HandleTypeDef               *hdmatx;          /*!< SmartCard Tx DMA Handle parameters                    */
-
-  DMA_HandleTypeDef               *hdmarx;          /*!< SmartCard Rx DMA Handle parameters                    */
-
-  HAL_LockTypeDef                 Lock;             /*!< Locking object                                        */
-
-  __IO HAL_SMARTCARD_StateTypeDef    gState;        /*!< SmartCard state information related to global Handle management 
-                                                         and also related to Tx operations.
-                                                         This parameter can be a value of @ref HAL_SMARTCARD_StateTypeDef */
-
-  __IO HAL_SMARTCARD_StateTypeDef    RxState;       /*!< SmartCard state information related to Rx operations.
-                                                         This parameter can be a value of @ref HAL_SMARTCARD_StateTypeDef */
-
-  __IO uint32_t                   ErrorCode;        /*!< SmartCard Error code                                  */
-
-}SMARTCARD_HandleTypeDef;
-
-/**
-  * @brief  SMARTCARD clock sources
-  */
-typedef enum
-{
-  SMARTCARD_CLOCKSOURCE_PCLK1     = 0x00U, /*!< PCLK1 clock source     */
-  SMARTCARD_CLOCKSOURCE_PCLK2     = 0x01U, /*!< PCLK2 clock source     */
-  SMARTCARD_CLOCKSOURCE_HSI       = 0x02U, /*!< HSI clock source       */
-  SMARTCARD_CLOCKSOURCE_SYSCLK    = 0x04U, /*!< SYSCLK clock source    */
-  SMARTCARD_CLOCKSOURCE_LSE       = 0x08U, /*!< LSE clock source       */
-  SMARTCARD_CLOCKSOURCE_UNDEFINED = 0x10U  /*!< undefined clock source */
-}SMARTCARD_ClockSourceTypeDef;
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup SMARTCARD_Exported_Constants  SMARTCARD Exported Constants
-  * @{
-  */
-
-/** @defgroup SMARTCARD_Word_Length SMARTCARD Word Length
-  * @{
-  */
-#define SMARTCARD_WORDLENGTH_9B             ((uint32_t)USART_CR1_M0)              /*!< SMARTCARD frame length */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Stop_Bits SMARTCARD Number of Stop Bits
-  * @{
-  */
-#define SMARTCARD_STOPBITS_0_5              ((uint32_t)USART_CR2_STOP_0)                      /*!< SMARTCARD frame with 0.5 stop bit  */
-#define SMARTCARD_STOPBITS_1_5              ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1)) /*!< SMARTCARD frame with 1.5 stop bits */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Parity SMARTCARD Parity
-  * @{
-  */
-#define SMARTCARD_PARITY_EVEN               ((uint32_t)USART_CR1_PCE)                  /*!< SMARTCARD frame even parity */
-#define SMARTCARD_PARITY_ODD                ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) /*!< SMARTCARD frame odd parity  */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Mode SMARTCARD Transfer Mode
-  * @{
-  */
-#define SMARTCARD_MODE_RX                   ((uint32_t)USART_CR1_RE)                  /*!< SMARTCARD RX mode        */
-#define SMARTCARD_MODE_TX                   ((uint32_t)USART_CR1_TE)                  /*!< SMARTCARD TX mode        */
-#define SMARTCARD_MODE_TX_RX                ((uint32_t)(USART_CR1_TE |USART_CR1_RE))  /*!< SMARTCARD RX and TX mode */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Clock_Polarity SMARTCARD Clock Polarity
-  * @{
-  */
-#define SMARTCARD_POLARITY_LOW              ((uint32_t)0x00000000)                   /*!< SMARTCARD frame low polarity  */
-#define SMARTCARD_POLARITY_HIGH             ((uint32_t)USART_CR2_CPOL)               /*!< SMARTCARD frame high polarity */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Clock_Phase SMARTCARD Clock Phase
-  * @{
-  */
-#define SMARTCARD_PHASE_1EDGE               ((uint32_t)0x00000000)                  /*!< SMARTCARD frame phase on first clock transition  */
-#define SMARTCARD_PHASE_2EDGE               ((uint32_t)USART_CR2_CPHA)              /*!< SMARTCARD frame phase on second clock transition */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Last_Bit SMARTCARD Last Bit
-  * @{
-  */
-#define SMARTCARD_LASTBIT_DISABLE           ((uint32_t)0x00000000)                 /*!< SMARTCARD frame last data bit clock pulse not output to SCLK pin */
-#define SMARTCARD_LASTBIT_ENABLE            ((uint32_t)USART_CR2_LBCL)             /*!< SMARTCARD frame last data bit clock pulse output to SCLK pin     */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_OneBit_Sampling SMARTCARD One Bit Sampling Method
-  * @{
-  */
-#define SMARTCARD_ONE_BIT_SAMPLE_DISABLE    ((uint32_t)0x00000000)                 /*!< SMARTCARD frame one-bit sample disabled */
-#define SMARTCARD_ONE_BIT_SAMPLE_ENABLE     ((uint32_t)USART_CR3_ONEBIT)           /*!< SMARTCARD frame one-bit sample enabled  */
-/**
-  * @}
-  */
-
-
-/** @defgroup SMARTCARD_NACK_Enable SMARTCARD NACK Enable
-  * @{
-  */
-#define SMARTCARD_NACK_ENABLE               ((uint32_t)USART_CR3_NACK)            /*!< SMARTCARD NACK transmission disabled */
-#define SMARTCARD_NACK_DISABLE              ((uint32_t)0x00000000)                /*!< SMARTCARD NACK transmission enabled  */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Timeout_Enable SMARTCARD Timeout Enable
-  * @{
-  */
-#define SMARTCARD_TIMEOUT_DISABLE           ((uint32_t)0x00000000)                /*!< SMARTCARD receiver timeout disabled */
-#define SMARTCARD_TIMEOUT_ENABLE            ((uint32_t)USART_CR2_RTOEN)           /*!< SMARTCARD receiver timeout enabled  */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_DMA_Requests SMARTCARD DMA Requests
-  * @{
-  */
-
-#define SMARTCARD_DMAREQ_TX                    ((uint32_t)USART_CR3_DMAT)
-#define SMARTCARD_DMAREQ_RX                    ((uint32_t)USART_CR3_DMAR)
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Advanced_Features_Initialization_Type SMARTCARD Advanced Features Initialization
-  * @{
-  */
-#define SMARTCARD_ADVFEATURE_NO_INIT                 ((uint32_t)0x00000000U)
-#define SMARTCARD_ADVFEATURE_TXINVERT_INIT           ((uint32_t)0x00000001U)
-#define SMARTCARD_ADVFEATURE_RXINVERT_INIT           ((uint32_t)0x00000002U)
-#define SMARTCARD_ADVFEATURE_DATAINVERT_INIT         ((uint32_t)0x00000004U)
-#define SMARTCARD_ADVFEATURE_SWAP_INIT               ((uint32_t)0x00000008U)
-#define SMARTCARD_ADVFEATURE_RXOVERRUNDISABLE_INIT   ((uint32_t)0x00000010U)
-#define SMARTCARD_ADVFEATURE_DMADISABLEONERROR_INIT  ((uint32_t)0x00000020U)
-#define SMARTCARD_ADVFEATURE_MSBFIRST_INIT           ((uint32_t)0x00000080U)
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Tx_Inv SMARTCARD advanced feature TX pin active level inversion
-  * @{
-  */
-#define SMARTCARD_ADVFEATURE_TXINV_DISABLE  ((uint32_t)0x00000000U)               /*!< TX pin active level inversion disable */
-#define SMARTCARD_ADVFEATURE_TXINV_ENABLE   ((uint32_t)USART_CR2_TXINV)           /*!< TX pin active level inversion enable  */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Rx_Inv SMARTCARD advanced feature RX pin active level inversion
-  * @{
-  */
-#define SMARTCARD_ADVFEATURE_RXINV_DISABLE  ((uint32_t)0x00000000U)               /*!< RX pin active level inversion disable */
-#define SMARTCARD_ADVFEATURE_RXINV_ENABLE   ((uint32_t)USART_CR2_RXINV)           /*!< RX pin active level inversion enable  */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Data_Inv SMARTCARD advanced feature Binary Data inversion
-  * @{
-  */
-#define SMARTCARD_ADVFEATURE_DATAINV_DISABLE  ((uint32_t)0x00000000U)             /*!< Binary data inversion disable */
-#define SMARTCARD_ADVFEATURE_DATAINV_ENABLE   ((uint32_t)USART_CR2_DATAINV)       /*!< Binary data inversion enable  */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Rx_Tx_Swap SMARTCARD advanced feature RX TX pins swap
-  * @{
-  */
-#define SMARTCARD_ADVFEATURE_SWAP_DISABLE   ((uint32_t)0x00000000U)               /*!< TX/RX pins swap disable */
-#define SMARTCARD_ADVFEATURE_SWAP_ENABLE    ((uint32_t)USART_CR2_SWAP)            /*!< TX/RX pins swap enable  */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Overrun_Disable SMARTCARD advanced feature Overrun Disable
-  * @{
-  */
-#define SMARTCARD_ADVFEATURE_OVERRUN_ENABLE   ((uint32_t)0x00000000U)             /*!< RX overrun enable  */
-#define SMARTCARD_ADVFEATURE_OVERRUN_DISABLE  ((uint32_t)USART_CR3_OVRDIS)        /*!< RX overrun disable */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_DMA_Disable_on_Rx_Error SMARTCARD advanced feature DMA Disable on Rx Error
-  * @{
-  */
-#define SMARTCARD_ADVFEATURE_DMA_ENABLEONRXERROR   ((uint32_t)0x00000000U)        /*!< DMA enable on Reception Error  */
-#define SMARTCARD_ADVFEATURE_DMA_DISABLEONRXERROR  ((uint32_t)USART_CR3_DDRE)     /*!< DMA disable on Reception Error */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_MSB_First   SMARTCARD advanced feature MSB first
-  * @{
-  */
-#define SMARTCARD_ADVFEATURE_MSBFIRST_DISABLE      ((uint32_t)0x00000000U)          /*!< Most significant bit sent/received first disable */
-#define SMARTCARD_ADVFEATURE_MSBFIRST_ENABLE       ((uint32_t)USART_CR2_MSBFIRST)   /*!< Most significant bit sent/received first enable  */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Request_Parameters SMARTCARD Request Parameters
-  * @{
-  */
-#define SMARTCARD_RXDATA_FLUSH_REQUEST      ((uint16_t)USART_RQR_RXFRQ)        /*!< Receive data flush request */
-#define SMARTCARD_TXDATA_FLUSH_REQUEST      ((uint16_t)USART_RQR_TXFRQ)        /*!< Transmit data flush request */
-/**
-  * @}
-  */
-
-
-/** @defgroup SMARTCARD_Flags SMARTCARD Flags
-  *        Elements values convention: 0xXXXX
-  *           - 0xXXXX  : Flag mask in the ISR register
-  * @{
-  */
-#define SMARTCARD_FLAG_REACK          USART_ISR_REACK      /*!< SMARTCARD receive enable acknowledge flag  */
-#define SMARTCARD_FLAG_TEACK          USART_ISR_TEACK      /*!< SMARTCARD transmit enable acknowledge flag */
-#define SMARTCARD_FLAG_BUSY           USART_ISR_BUSY       /*!< SMARTCARD busy flag                        */
-#define SMARTCARD_FLAG_EOBF           USART_ISR_EOBF       /*!< SMARTCARD end of block flag                */
-#define SMARTCARD_FLAG_RTOF           USART_ISR_RTOF       /*!< SMARTCARD receiver timeout flag            */
-#define SMARTCARD_FLAG_TXE            USART_ISR_TXE        /*!< SMARTCARD transmit data register empty     */
-#define SMARTCARD_FLAG_TC             USART_ISR_TC         /*!< SMARTCARD transmission complete            */
-#define SMARTCARD_FLAG_RXNE           USART_ISR_RXNE       /*!< SMARTCARD read data register not empty     */
-#define SMARTCARD_FLAG_IDLE           USART_ISR_IDLE       /*!< SMARTCARD idle line detection              */
-#define SMARTCARD_FLAG_ORE            USART_ISR_ORE        /*!< SMARTCARD overrun error                    */
-#define SMARTCARD_FLAG_NE             USART_ISR_NE         /*!< SMARTCARD noise error                      */
-#define SMARTCARD_FLAG_FE             USART_ISR_FE         /*!< SMARTCARD frame error                      */
-#define SMARTCARD_FLAG_PE             USART_ISR_PE         /*!< SMARTCARD parity error                     */
-
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Interrupt_definition SMARTCARD Interrupt definition
-  *        Elements values convention: 0000ZZZZ0XXYYYYYb
-  *           - YYYYY  : Interrupt source position in the XX register (5bits)
-  *           - XX  : Interrupt source register (2bits)
-  *                 - 01: CR1 register
-  *                 - 10: CR2 register
-  *                 - 11: CR3 register
-  *           - ZZZZ  : Flag position in the ISR register(4bits)
-  * @{
-  */
-  
-#define SMARTCARD_IT_PE                          ((uint16_t)0x0028U)    /*!< SMARTCARD parity error interruption                 */
-#define SMARTCARD_IT_TXE                         ((uint16_t)0x0727U)    /*!< SMARTCARD transmit data register empty interruption */
-#define SMARTCARD_IT_TC                          ((uint16_t)0x0626U)    /*!< SMARTCARD transmission complete interruption        */
-#define SMARTCARD_IT_RXNE                        ((uint16_t)0x0525U)    /*!< SMARTCARD read data register not empty interruption */
-#define SMARTCARD_IT_IDLE                        ((uint16_t)0x0424U)    /*!< SMARTCARD idle line detection interruption          */
-
-#define SMARTCARD_IT_ERR                         ((uint16_t)0x0060U)    /*!< SMARTCARD error interruption         */
-#define SMARTCARD_IT_ORE                         ((uint16_t)0x0300U)    /*!< SMARTCARD overrun error interruption */
-#define SMARTCARD_IT_NE                          ((uint16_t)0x0200U)    /*!< SMARTCARD noise error interruption   */
-#define SMARTCARD_IT_FE                          ((uint16_t)0x0100U)    /*!< SMARTCARD frame error interruption   */
-
-#define SMARTCARD_IT_EOB                         ((uint16_t)0x0C3BU)    /*!< SMARTCARD end of block interruption     */
-#define SMARTCARD_IT_RTO                         ((uint16_t)0x0B3AU)    /*!< SMARTCARD receiver timeout interruption */
-/**
-  * @}
-  */ 
-
-
-/** @defgroup SMARTCARD_IT_CLEAR_Flags SMARTCARD IT CLEAR Flags
-  * @{
-  */
-#define SMARTCARD_CLEAR_PEF                       USART_ICR_PECF            /*!< Parity Error Clear Flag */          
-#define SMARTCARD_CLEAR_FEF                       USART_ICR_FECF            /*!< Framing Error Clear Flag */         
-#define SMARTCARD_CLEAR_NEF                       USART_ICR_NCF             /*!< Noise detected Clear Flag */        
-#define SMARTCARD_CLEAR_OREF                      USART_ICR_ORECF           /*!< OverRun Error Clear Flag */         
-#define SMARTCARD_CLEAR_IDLEF                     USART_ICR_IDLECF          /*!< IDLE line detected Clear Flag */
-#define SMARTCARD_CLEAR_TCF                       USART_ICR_TCCF            /*!< Transmission Complete Clear Flag */ 
-#define SMARTCARD_CLEAR_RTOF                      USART_ICR_RTOCF           /*!< Receiver Time Out Clear Flag */     
-#define SMARTCARD_CLEAR_EOBF                      USART_ICR_EOBCF           /*!< End Of Block Clear Flag */          
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_CR3_SCARCNT_LSB_POS SMARTCARD auto retry counter LSB position in CR3 register
-  * @{
-  */
-#define SMARTCARD_CR3_SCARCNT_LSB_POS       ((uint32_t) 17U)   /*!< SMARTCARD auto retry counter LSB position in CR3 register */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_GTPR_GT_LSB_POS SMARTCARD guard time value LSB position in GTPR register
-  * @{
-  */
-#define SMARTCARD_GTPR_GT_LSB_POS           ((uint32_t) 8U)   /*!<  SMARTCARD guard time value LSB position in GTPR register */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_RTOR_BLEN_LSB_POS SMARTCARD block length LSB position in RTOR register
-  * @{
-  */
-#define SMARTCARD_RTOR_BLEN_LSB_POS         ((uint32_t) 24U)  /*!< SMARTCARD block length LSB position in RTOR register */
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Interruption_Mask SMARTCARD interruptions flags mask
-  * @{
-  */
-#define SMARTCARD_IT_MASK               ((uint16_t)0x001FU)   /*!< SMARTCARD interruptions flags mask */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macros -----------------------------------------------------------*/
-/** @defgroup SMARTCARD_Exported_Macros  SMARTCARD Exported Macros
-  * @{
-  */
-
-/** @brief  Reset SMARTCARD handle states.
-  * @param  __HANDLE__: SMARTCARD handle.
-  * @retval None
-  */
-#define __HAL_SMARTCARD_RESET_HANDLE_STATE(__HANDLE__)  do{                                                       \
-                                                           (__HANDLE__)->gState = HAL_SMARTCARD_STATE_RESET;      \
-                                                           (__HANDLE__)->RxState = HAL_SMARTCARD_STATE_RESET;     \
-                                                          } while(0)
-
-/** @brief  Flush the Smartcard Data registers.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @retval None
-  */
-#define __HAL_SMARTCARD_FLUSH_DRREGISTER(__HANDLE__)                                 \
-    do{                                                                              \
-      SET_BIT((__HANDLE__)->Instance->RQR, SMARTCARD_RXDATA_FLUSH_REQUEST); \
-      SET_BIT((__HANDLE__)->Instance->RQR, SMARTCARD_TXDATA_FLUSH_REQUEST); \
-      } while(0)
-
-/** @brief  Clear the specified SMARTCARD pending flag.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @param  __FLAG__: specifies the flag to check.
-  *          This parameter can be any combination of the following values:
-  *            @arg @ref SMARTCARD_CLEAR_PEF    Parity error clear flag
-  *            @arg @ref SMARTCARD_CLEAR_FEF    Framing error clear flag
-  *            @arg @ref SMARTCARD_CLEAR_NEF    Noise detected clear flag
-  *            @arg @ref SMARTCARD_CLEAR_OREF   OverRun error clear flag
-  *            @arg @ref SMARTCARD_CLEAR_IDLEF  Idle line detected clear flag
-  *            @arg @ref SMARTCARD_CLEAR_TCF    Transmission complete clear flag
-  *            @arg @ref SMARTCARD_CLEAR_RTOF   Receiver timeout clear flag
-  *            @arg @ref SMARTCARD_CLEAR_EOBF   End of block clear flag
-  * @retval None
-  */
-#define __HAL_SMARTCARD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
-
-/** @brief  Clear the SMARTCARD PE pending flag.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @retval None
-  */
-#define __HAL_SMARTCARD_CLEAR_PEFLAG(__HANDLE__)   __HAL_SMARTCARD_CLEAR_FLAG((__HANDLE__), SMARTCARD_CLEAR_PEF)
-
-
-/** @brief  Clear the SMARTCARD FE pending flag.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @retval None
-  */
-#define __HAL_SMARTCARD_CLEAR_FEFLAG(__HANDLE__)   __HAL_SMARTCARD_CLEAR_FLAG((__HANDLE__), SMARTCARD_CLEAR_FEF)
-
-/** @brief  Clear the SMARTCARD NE pending flag.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @retval None
-  */
-#define __HAL_SMARTCARD_CLEAR_NEFLAG(__HANDLE__)   __HAL_SMARTCARD_CLEAR_FLAG((__HANDLE__), SMARTCARD_CLEAR_NEF)
-
-/** @brief  Clear the SMARTCARD ORE pending flag.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @retval None
-  */
-#define __HAL_SMARTCARD_CLEAR_OREFLAG(__HANDLE__)   __HAL_SMARTCARD_CLEAR_FLAG((__HANDLE__), SMARTCARD_CLEAR_OREF)
-
-/** @brief  Clear the SMARTCARD IDLE pending flag.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @retval None
-  */
-#define __HAL_SMARTCARD_CLEAR_IDLEFLAG(__HANDLE__)   __HAL_SMARTCARD_CLEAR_FLAG((__HANDLE__), SMARTCARD_CLEAR_IDLEF)
-
-/** @brief  Check whether the specified Smartcard flag is set or not.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @param  __FLAG__: specifies the flag to check.
-  *        This parameter can be one of the following values:
-  *            @arg @ref SMARTCARD_FLAG_REACK Receive enable acknowledge flag
-  *            @arg @ref SMARTCARD_FLAG_TEACK Transmit enable acknowledge flag
-  *            @arg @ref SMARTCARD_FLAG_BUSY  Busy flag
-  *            @arg @ref SMARTCARD_FLAG_EOBF  End of block flag
-  *            @arg @ref SMARTCARD_FLAG_RTOF  Receiver timeout flag
-  *            @arg @ref SMARTCARD_FLAG_TXE   Transmit data register empty flag
-  *            @arg @ref SMARTCARD_FLAG_TC    Transmission complete flag
-  *            @arg @ref SMARTCARD_FLAG_RXNE  Receive data register not empty flag
-  *            @arg @ref SMARTCARD_FLAG_IDLE  Idle line detection flag  
-  *            @arg @ref SMARTCARD_FLAG_ORE   Overrun error flag
-  *            @arg @ref SMARTCARD_FLAG_NE    Noise error flag
-  *            @arg @ref SMARTCARD_FLAG_FE    Framing error flag
-  *            @arg @ref SMARTCARD_FLAG_PE    Parity error flag
-  * @retval The new state of __FLAG__ (TRUE or FALSE).
-  */
-#define __HAL_SMARTCARD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
-
-
-/** @brief  Enable the specified SmartCard interrupt.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @param  __INTERRUPT__: specifies the SMARTCARD interrupt to enable.
-  *          This parameter can be one of the following values:
-  *            @arg @ref SMARTCARD_IT_EOB   End of block interrupt
-  *            @arg @ref SMARTCARD_IT_RTO   Receive timeout interrupt
-  *            @arg @ref SMARTCARD_IT_TXE   Transmit data register empty interrupt
-  *            @arg @ref SMARTCARD_IT_TC    Transmission complete interrupt
-  *            @arg @ref SMARTCARD_IT_RXNE  Receive data register not empty interrupt
-  *            @arg @ref SMARTCARD_IT_IDLE  Idle line detection interrupt  
-  *            @arg @ref SMARTCARD_IT_PE    Parity error interrupt
-  *            @arg @ref SMARTCARD_IT_ERR   Error interrupt(frame error, noise error, overrun error)
-  * @retval None
-  */
-#define __HAL_SMARTCARD_ENABLE_IT(__HANDLE__, __INTERRUPT__)   (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & SMARTCARD_IT_MASK))): \
-                                                                ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & SMARTCARD_IT_MASK))): \
-                                                                ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & SMARTCARD_IT_MASK))))
-
-/** @brief  Disable the specified SmartCard interrupt.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @param  __INTERRUPT__: specifies the SMARTCARD interrupt to disable.
-  *          This parameter can be one of the following values:
-  *            @arg @ref SMARTCARD_IT_EOB   End of block interrupt
-  *            @arg @ref SMARTCARD_IT_RTO   Receive timeout interrupt
-  *            @arg @ref SMARTCARD_IT_TXE   Transmit data register empty interrupt
-  *            @arg @ref SMARTCARD_IT_TC    Transmission complete interrupt
-  *            @arg @ref SMARTCARD_IT_RXNE  Receive data register not empty interrupt
-  *            @arg @ref SMARTCARD_IT_IDLE  Idle line detection interrupt   
-  *            @arg @ref SMARTCARD_IT_PE    Parity error interrupt
-  *            @arg @ref SMARTCARD_IT_ERR   Error interrupt(frame error, noise error, overrun error)
-  * @retval None
-  */
-#define __HAL_SMARTCARD_DISABLE_IT(__HANDLE__, __INTERRUPT__)  (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & SMARTCARD_IT_MASK))): \
-                                                                ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & SMARTCARD_IT_MASK))): \
-                                                                ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & SMARTCARD_IT_MASK))))
-
-
-/** @brief  Check whether the specified SmartCard interrupt has occurred or not.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @param  __IT__: specifies the SMARTCARD interrupt to check.
-  *          This parameter can be one of the following values:
-  *            @arg @ref SMARTCARD_IT_EOB   End of block interrupt
-  *            @arg @ref SMARTCARD_IT_RTO   Receive timeout interrupt
-  *            @arg @ref SMARTCARD_IT_TXE   Transmit data register empty interrupt
-  *            @arg @ref SMARTCARD_IT_TC    Transmission complete interrupt
-  *            @arg @ref SMARTCARD_IT_RXNE  Receive data register not empty interrupt
-  *            @arg @ref SMARTCARD_IT_IDLE  Idle line detection interrupt  
-  *            @arg @ref SMARTCARD_IT_ORE   Overrun error interrupt
-  *            @arg @ref SMARTCARD_IT_NE    Noise error interrupt
-  *            @arg @ref SMARTCARD_IT_FE    Framing error interrupt
-  *            @arg @ref SMARTCARD_IT_PE    Parity error interrupt
-  * @retval The new state of __IT__ (TRUE or FALSE).
-  */
-#define __HAL_SMARTCARD_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1U << ((__IT__)>> 0x08U))) 
-
-/** @brief  Check whether the specified SmartCard interrupt source is enabled or not.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @param  __IT__: specifies the SMARTCARD interrupt source to check.
-  *          This parameter can be one of the following values:
-  *            @arg @ref SMARTCARD_IT_EOB   End of block interrupt
-  *            @arg @ref SMARTCARD_IT_RTO   Receive timeout interrupt
-  *            @arg @ref SMARTCARD_IT_TXE   Transmit data register empty interrupt
-  *            @arg @ref SMARTCARD_IT_TC    Transmission complete interrupt
-  *            @arg @ref SMARTCARD_IT_RXNE  Receive data register not empty interrupt
-  *            @arg @ref SMARTCARD_IT_IDLE  Idle line detection interrupt  
-  *            @arg @ref SMARTCARD_IT_ERR   Framing, overrun or noise error interrupt
-  *            @arg @ref SMARTCARD_IT_PE    Parity error interrupt
-  * @retval The new state of __IT__ (TRUE or FALSE).
-  */
-#define __HAL_SMARTCARD_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1 : \
-                                                           (((((uint8_t)(__IT__)) >> 5U) == 2U)? (__HANDLE__)->Instance->CR2 : \
-                                                           (__HANDLE__)->Instance->CR3)) & ((uint32_t)1U << (((uint16_t)(__IT__)) & SMARTCARD_IT_MASK)))
-
-
-/** @brief  Clear the specified SMARTCARD ISR flag, in setting the proper ICR register flag.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @param  __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
-  *                       to clear the corresponding interrupt.
-  *          This parameter can be one of the following values:
-  *            @arg @ref SMARTCARD_CLEAR_PEF    Parity error clear flag
-  *            @arg @ref SMARTCARD_CLEAR_FEF    Framing error clear flag
-  *            @arg @ref SMARTCARD_CLEAR_NEF    Noise detected clear flag
-  *            @arg @ref SMARTCARD_CLEAR_OREF   OverRun error clear flag
-  *            @arg @ref SMARTCARD_CLEAR_IDLEF  Idle line detection clear flag    
-  *            @arg @ref SMARTCARD_CLEAR_TCF    Transmission complete clear flag
-  *            @arg @ref SMARTCARD_CLEAR_RTOF   Receiver timeout clear flag
-  *            @arg @ref SMARTCARD_CLEAR_EOBF   End of block clear flag
-  * @retval None
-  */
-#define __HAL_SMARTCARD_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
-
-/** @brief  Set a specific SMARTCARD request flag.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @param  __REQ__: specifies the request flag to set
-  *          This parameter can be one of the following values:
-  *            @arg @ref SMARTCARD_RXDATA_FLUSH_REQUEST Receive data flush Request
-  *            @arg @ref SMARTCARD_TXDATA_FLUSH_REQUEST Transmit data flush Request
-  *
-  * @retval None
-  */
-#define __HAL_SMARTCARD_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
-
-/** @brief  Enable the SMARTCARD one bit sample method.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.  
-  * @retval None
-  */
-#define __HAL_SMARTCARD_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
-
-/** @brief  Disable the SMARTCARD one bit sample method.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.  
-  * @retval None
-  */
-#define __HAL_SMARTCARD_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
-
-/** @brief  Enable the USART associated to the SMARTCARD Handle.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @retval None
-  */
-#define __HAL_SMARTCARD_ENABLE(__HANDLE__)               ((__HANDLE__)->Instance->CR1 |=  USART_CR1_UE)
-
-/** @brief  Disable the USART associated to the SMARTCARD Handle
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @retval None
-  */
-#define __HAL_SMARTCARD_DISABLE(__HANDLE__)              ((__HANDLE__)->Instance->CR1 &=  ~USART_CR1_UE)
-
-/** @brief  Macros to enable or disable the SmartCard DMA request.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  *         The Handle Instance which can be USART1 or USART2.
-  * @param  __REQUEST__: specifies the SmartCard DMA request.
-  *          This parameter can be one of the following values:
-  *            @arg SMARTCARD_DMAREQ_TX: SmartCard DMA transmit request
-  *            @arg SMARTCARD_DMAREQ_RX: SmartCard DMA receive request
-  */
-#define __HAL_SMARTCARD_DMA_REQUEST_ENABLE(__HANDLE__, __REQUEST__)    ((__HANDLE__)->Instance->CR3 |=  (__REQUEST__))
-#define __HAL_SMARTCARD_DMA_REQUEST_DISABLE(__HANDLE__, __REQUEST__)   ((__HANDLE__)->Instance->CR3 &=  ~(__REQUEST__))
-
-/**
-  * @}
-  */
-
-/* Private macros -------------------------------------------------------------*/
-/** @defgroup SMARTCARD_Private_Macros SMARTCARD Private Macros
-  * @{
-  */
-
-/** @brief  Check the Baud rate range. 
-  * @note   The maximum Baud Rate is derived from the maximum clock on L0 (i.e. 32 MHz)
-  *         divided by the oversampling used on the SMARTCARD (i.e. 16).
-  * @param  __BAUDRATE__: Baud rate set by the configuration function.
-  * @retval Test result (TRUE or FALSE)
-  */
-#define IS_SMARTCARD_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 2000001U)
-
-/** @brief  Check the block length range.
-  * @note   The maximum SMARTCARD block length is 0xFF.
-  * @param  __LENGTH__: block length.
-  * @retval Test result (TRUE or FALSE)
-  */
-#define IS_SMARTCARD_BLOCKLENGTH(__LENGTH__) ((__LENGTH__) <= 0xFFU)
-
-/** @brief  Check the receiver timeout value. 
-  * @note   The maximum SMARTCARD receiver timeout value is 0xFFFFFF.
-  * @param  __TIMEOUTVALUE__: receiver timeout value.
-  * @retval Test result (TRUE or FALSE)
-  */
-#define IS_SMARTCARD_TIMEOUT_VALUE(__TIMEOUTVALUE__)    ((__TIMEOUTVALUE__) <= 0xFFFFFFU)
-
-/** @brief  Check the SMARTCARD autoretry counter value. 
-  * @note   The maximum number of retransmissions is 0x7.
-  * @param  __COUNT__: number of retransmissions.
-  * @retval Test result (TRUE or FALSE)
-  */
-#define IS_SMARTCARD_AUTORETRY_COUNT(__COUNT__)         ((__COUNT__) <= 0x7U)
-
-/**
-  * @brief Ensure that SMARTCARD frame length is valid.
-  * @param __LENGTH__: SMARTCARD frame length. 
-  * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
-  */ 
-#define IS_SMARTCARD_WORD_LENGTH(__LENGTH__) ((__LENGTH__) == SMARTCARD_WORDLENGTH_9B)
-
-/**
-  * @brief Ensure that SMARTCARD frame number of stop bits is valid.
-  * @param __STOPBITS__: SMARTCARD frame number of stop bits. 
-  * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
-  */ 
-#define IS_SMARTCARD_STOPBITS(__STOPBITS__) (((__STOPBITS__) == SMARTCARD_STOPBITS_0_5) ||\
-                                             ((__STOPBITS__) == SMARTCARD_STOPBITS_1_5))
-
-/**
-  * @brief Ensure that SMARTCARD frame parity is valid.
-  * @param __PARITY__: SMARTCARD frame parity. 
-  * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
-  */ 
-#define IS_SMARTCARD_PARITY(__PARITY__) (((__PARITY__) == SMARTCARD_PARITY_EVEN) || \
-                                         ((__PARITY__) == SMARTCARD_PARITY_ODD))
-
-/**
-  * @brief Ensure that SMARTCARD communication mode is valid.
-  * @param __MODE__: SMARTCARD communication mode. 
-  * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
-  */ 
-#define IS_SMARTCARD_MODE(__MODE__) ((((__MODE__) & (uint16_t)0xFFF3) == 0x00) && ((__MODE__) != (uint16_t)0x00))
-
-/**
-  * @brief Ensure that SMARTCARD frame polarity is valid.
-  * @param __CPOL__: SMARTCARD frame polarity. 
-  * @retval SET (__CPOL__ is valid) or RESET (__CPOL__ is invalid)
-  */ 
-#define IS_SMARTCARD_POLARITY(__CPOL__) (((__CPOL__) == SMARTCARD_POLARITY_LOW) || ((__CPOL__) == SMARTCARD_POLARITY_HIGH))
-
-/**
-  * @brief Ensure that SMARTCARD frame phase is valid.
-  * @param __CPHA__: SMARTCARD frame phase. 
-  * @retval SET (__CPHA__ is valid) or RESET (__CPHA__ is invalid)
-  */
-#define IS_SMARTCARD_PHASE(__CPHA__) (((__CPHA__) == SMARTCARD_PHASE_1EDGE) || ((__CPHA__) == SMARTCARD_PHASE_2EDGE))
-
-/**
-  * @brief Ensure that SMARTCARD frame last bit clock pulse setting is valid.
-  * @param __LASTBIT__: SMARTCARD frame last bit clock pulse setting. 
-  * @retval SET (__LASTBIT__ is valid) or RESET (__LASTBIT__ is invalid)
-  */
-#define IS_SMARTCARD_LASTBIT(__LASTBIT__) (((__LASTBIT__) == SMARTCARD_LASTBIT_DISABLE) || \
-                                           ((__LASTBIT__) == SMARTCARD_LASTBIT_ENABLE))
-
-/**
-  * @brief Ensure that SMARTCARD frame sampling is valid.
-  * @param __ONEBIT__: SMARTCARD frame sampling. 
-  * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
-  */
-#define IS_SMARTCARD_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == SMARTCARD_ONE_BIT_SAMPLE_DISABLE) || \
-                                                 ((__ONEBIT__) == SMARTCARD_ONE_BIT_SAMPLE_ENABLE))
-
-/**
-  * @brief Ensure that SMARTCARD NACK transmission setting is valid.
-  * @param __NACK__: SMARTCARD NACK transmission setting. 
-  * @retval SET (__NACK__ is valid) or RESET (__NACK__ is invalid)
-  */
-#define IS_SMARTCARD_NACK(__NACK__) (((__NACK__) == SMARTCARD_NACK_ENABLE) || \
-                                     ((__NACK__) == SMARTCARD_NACK_DISABLE))
-
-/**
-  * @brief Ensure that SMARTCARD receiver timeout setting is valid.
-  * @param __TIMEOUT__: SMARTCARD receiver timeout setting. 
-  * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid)
-  */
-#define IS_SMARTCARD_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == SMARTCARD_TIMEOUT_DISABLE) || \
-                                           ((__TIMEOUT__) == SMARTCARD_TIMEOUT_ENABLE))
-
-/**
-  * @brief Ensure that SMARTCARD advanced features initialization is valid.
-  * @param __INIT__: SMARTCARD advanced features initialization. 
-  * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid)
-  */
-#define IS_SMARTCARD_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (SMARTCARD_ADVFEATURE_NO_INIT                | \
-                                                               SMARTCARD_ADVFEATURE_TXINVERT_INIT          | \
-                                                               SMARTCARD_ADVFEATURE_RXINVERT_INIT          | \
-                                                               SMARTCARD_ADVFEATURE_DATAINVERT_INIT        | \
-                                                               SMARTCARD_ADVFEATURE_SWAP_INIT              | \
-                                                               SMARTCARD_ADVFEATURE_RXOVERRUNDISABLE_INIT  | \
-                                                               SMARTCARD_ADVFEATURE_DMADISABLEONERROR_INIT | \
-                                                               SMARTCARD_ADVFEATURE_MSBFIRST_INIT))
-
-/**
-  * @brief Ensure that SMARTCARD frame TX inversion setting is valid.
-  * @param __TXINV__: SMARTCARD frame TX inversion setting. 
-  * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid)
-  */
-#define IS_SMARTCARD_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == SMARTCARD_ADVFEATURE_TXINV_DISABLE) || \
-                                                  ((__TXINV__) == SMARTCARD_ADVFEATURE_TXINV_ENABLE))
-
-/**
-  * @brief Ensure that SMARTCARD frame RX inversion setting is valid.
-  * @param __RXINV__: SMARTCARD frame RX inversion setting. 
-  * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid)
-  */
-#define IS_SMARTCARD_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == SMARTCARD_ADVFEATURE_RXINV_DISABLE) || \
-                                                  ((__RXINV__) == SMARTCARD_ADVFEATURE_RXINV_ENABLE))
-
-/**
-  * @brief Ensure that SMARTCARD frame data inversion setting is valid.
-  * @param __DATAINV__: SMARTCARD frame data inversion setting. 
-  * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid)
-  */
-#define IS_SMARTCARD_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == SMARTCARD_ADVFEATURE_DATAINV_DISABLE) || \
-                                                      ((__DATAINV__) == SMARTCARD_ADVFEATURE_DATAINV_ENABLE))
-
-/**
-  * @brief Ensure that SMARTCARD frame RX/TX pins swap setting is valid.
-  * @param __SWAP__: SMARTCARD frame RX/TX pins swap setting. 
-  * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid)
-  */
-#define IS_SMARTCARD_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == SMARTCARD_ADVFEATURE_SWAP_DISABLE) || \
-                                                ((__SWAP__) == SMARTCARD_ADVFEATURE_SWAP_ENABLE))
-
-/**
-  * @brief Ensure that SMARTCARD frame overrun setting is valid.
-  * @param __OVERRUN__: SMARTCARD frame overrun setting. 
-  * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid)
-  */
-#define IS_SMARTCARD_OVERRUN(__OVERRUN__) (((__OVERRUN__) == SMARTCARD_ADVFEATURE_OVERRUN_ENABLE) || \
-                                           ((__OVERRUN__) == SMARTCARD_ADVFEATURE_OVERRUN_DISABLE))
-
-/**
-  * @brief Ensure that SMARTCARD DMA enabling or disabling on error setting is valid.
-  * @param __DMA__: SMARTCARD DMA enabling or disabling on error setting. 
-  * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid)
-  */
-#define IS_SMARTCARD_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == SMARTCARD_ADVFEATURE_DMA_ENABLEONRXERROR) || \
-                                                       ((__DMA__) == SMARTCARD_ADVFEATURE_DMA_DISABLEONRXERROR))
-
-/**
-  * @brief Ensure that SMARTCARD frame MSB first setting is valid.
-  * @param __MSBFIRST__: SMARTCARD frame MSB first setting. 
-  * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid)
-  */
-#define IS_SMARTCARD_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == SMARTCARD_ADVFEATURE_MSBFIRST_DISABLE) || \
-                                                        ((__MSBFIRST__) == SMARTCARD_ADVFEATURE_MSBFIRST_ENABLE))
-
-/**
-  * @brief Ensure that SMARTCARD request parameter is valid.
-  * @param __PARAM__: SMARTCARD request parameter. 
-  * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
-  */
-#define IS_SMARTCARD_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == SMARTCARD_RXDATA_FLUSH_REQUEST) || \
-                                                   ((__PARAM__) == SMARTCARD_TXDATA_FLUSH_REQUEST))
-
-/**
-  * @}
-  */
-
-/* Include SMARTCARD HAL Extended module */
-#include "stm32l0xx_hal_smartcard_ex.h"
-
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup SMARTCARD_Exported_Functions
-  * @{
-  */
-
-/* Initialization and de-initialization functions  ****************************/
-/** @addtogroup SMARTCARD_Exported_Functions_Group1
-  * @{
-  */
-
-HAL_StatusTypeDef HAL_SMARTCARD_Init(SMARTCARD_HandleTypeDef *hsmartcard);
-HAL_StatusTypeDef HAL_SMARTCARD_DeInit(SMARTCARD_HandleTypeDef *hsmartcard);
-void HAL_SMARTCARD_MspInit(SMARTCARD_HandleTypeDef *hsmartcard);
-void HAL_SMARTCARD_MspDeInit(SMARTCARD_HandleTypeDef *hsmartcard);
-
-/**
-  * @}
-  */
-
-/* IO operation functions *****************************************************/
-/** @addtogroup SMARTCARD_Exported_Functions_Group2
-  * @{
-  */
-
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size);
-/* Transfer Abort functions */
-HAL_StatusTypeDef HAL_SMARTCARD_Abort(SMARTCARD_HandleTypeDef *hsmartcard);
-HAL_StatusTypeDef HAL_SMARTCARD_AbortTransmit(SMARTCARD_HandleTypeDef *hsmartcard);
-HAL_StatusTypeDef HAL_SMARTCARD_AbortReceive(SMARTCARD_HandleTypeDef *hsmartcard);
-HAL_StatusTypeDef HAL_SMARTCARD_Abort_IT(SMARTCARD_HandleTypeDef *hsmartcard);
-HAL_StatusTypeDef HAL_SMARTCARD_AbortTransmit_IT(SMARTCARD_HandleTypeDef *hsmartcard);
-HAL_StatusTypeDef HAL_SMARTCARD_AbortReceive_IT(SMARTCARD_HandleTypeDef *hsmartcard);
-
-void HAL_SMARTCARD_IRQHandler(SMARTCARD_HandleTypeDef *hsmartcard);
-void HAL_SMARTCARD_TxCpltCallback(SMARTCARD_HandleTypeDef *hsmartcard);
-void HAL_SMARTCARD_RxCpltCallback(SMARTCARD_HandleTypeDef *hsmartcard);
-void HAL_SMARTCARD_ErrorCallback(SMARTCARD_HandleTypeDef *hsmartcard);
-void HAL_SMARTCARD_AbortCpltCallback (SMARTCARD_HandleTypeDef *hsmartcard);
-void HAL_SMARTCARD_AbortTransmitCpltCallback (SMARTCARD_HandleTypeDef *hsmartcard);
-void HAL_SMARTCARD_AbortReceiveCpltCallback (SMARTCARD_HandleTypeDef *hsmartcard);
-
-/**
-  * @}
-  */
-
-/* Peripheral Control functions ***********************************************/
-/* Peripheral State and Error functions ***************************************/
-/** @addtogroup SMARTCARD_Exported_Functions_Group4
-  * @{
-  */
-
-HAL_SMARTCARD_StateTypeDef HAL_SMARTCARD_GetState(SMARTCARD_HandleTypeDef *hsmartcard);
-uint32_t                   HAL_SMARTCARD_GetError(SMARTCARD_HandleTypeDef *hsmartcard);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_SMARTCARD_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_smartcard_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_smartcard_ex.h
deleted file mode 100755
index 2f84a9d2..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_smartcard_ex.h
+++ /dev/null
@@ -1,188 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_smartcard_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of SMARTCARD HAL Extended module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_SMARTCARD_EX_H
-#define __STM32L0xx_HAL_SMARTCARD_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup SMARTCARDEx
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/  
-/* Exported constants --------------------------------------------------------*/
-/* Exported macros -----------------------------------------------------------*/  
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup SMARTCARDEx_Private_Macros SMARTCARD Extended Private Macros
-  * @{
-  */
-  
-/** @brief  Report the SMARTCARD clock source.
-  * @param  __HANDLE__: specifies the SMARTCARD Handle.
-  * @param  __CLOCKSOURCE__: output variable.
-  * @retval the SMARTCARD clocking source, written in __CLOCKSOURCE__.
-  */
-#if defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
-#define SMARTCARD_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__)   \
-  do {                                                         \
-    if((__HANDLE__)->Instance == USART2)                       \
-    {                                                          \
-       switch(__HAL_RCC_GET_USART2_SOURCE())                   \
-       {                                                       \
-        case RCC_USART2CLKSOURCE_PCLK1:                        \
-          (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1;     \
-          break;                                               \
-        case RCC_USART2CLKSOURCE_HSI:                          \
-          (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI;       \
-          break;                                               \
-        case RCC_USART2CLKSOURCE_SYSCLK:                       \
-          (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK;    \
-          break;                                               \
-        case RCC_USART2CLKSOURCE_LSE:                          \
-          (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE;       \
-          break;                                               \
-        default:                                               \
-          (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
-          break;                                               \
-       }                                                       \
-    }                                                          \
-  } while(0)
-
-#else /* (STM32L031xx) || defined (STM32L041xx) || (STM32L011xx) || defined (STM32L021xx) */
-
-#define SMARTCARD_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__)   \
-  do {                                                         \
-    if((__HANDLE__)->Instance == USART1)                       \
-    {                                                          \
-       switch(__HAL_RCC_GET_USART1_SOURCE())                   \
-       {                                                       \
-        case RCC_USART1CLKSOURCE_PCLK2:                        \
-          (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK2;     \
-          break;                                               \
-        case RCC_USART1CLKSOURCE_HSI:                          \
-          (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI;       \
-          break;                                               \
-        case RCC_USART1CLKSOURCE_SYSCLK:                       \
-          (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK;    \
-          break;                                               \
-        case RCC_USART1CLKSOURCE_LSE:                          \
-          (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE;       \
-          break;                                               \
-        default:                                               \
-          (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
-          break;                                               \
-       }                                                       \
-    }                                                          \
-    else if((__HANDLE__)->Instance == USART2)                  \
-    {                                                          \
-       switch(__HAL_RCC_GET_USART2_SOURCE())                   \
-       {                                                       \
-        case RCC_USART2CLKSOURCE_PCLK1:                        \
-          (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1;     \
-          break;                                               \
-        case RCC_USART2CLKSOURCE_HSI:                          \
-          (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI;       \
-          break;                                               \
-        case RCC_USART2CLKSOURCE_SYSCLK:                       \
-          (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK;    \
-          break;                                               \
-        case RCC_USART2CLKSOURCE_LSE:                          \
-          (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE;       \
-          break;                                               \
-        default:                                               \
-          (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
-          break;                                               \
-       }                                                       \
-    }                                                          \
-  } while(0)
-#endif /* (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || defined (STM32L021xx) */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup SMARTCARDEx_Exported_Functions
-  * @{
-  */
-
-/* Initialization and de-initialization functions  ****************************/
-/* IO operation methods *******************************************************/
-
-/** @addtogroup SMARTCARDEx_Exported_Functions_Group1
-  * @{
-  */
-
-/* Peripheral Control functions ***********************************************/
-void              HAL_SMARTCARDEx_BlockLength_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t BlockLength);
-void              HAL_SMARTCARDEx_TimeOut_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t TimeOutValue);
-HAL_StatusTypeDef HAL_SMARTCARDEx_EnableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard);
-HAL_StatusTypeDef HAL_SMARTCARDEx_DisableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_SMARTCARD_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_smbus.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_smbus.h
deleted file mode 100755
index c46525e5..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_smbus.h
+++ /dev/null
@@ -1,699 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_smbus.h
-  * @author  MCD Application Team
-  * @brief   Header file of SMBUS HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_SMBUS_H
-#define __STM32L0xx_HAL_SMBUS_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup SMBUS
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup SMBUS_Exported_Types SMBUS Exported Types
-  * @{
-  */
-
-/** @defgroup SMBUS_Configuration_Structure_definition SMBUS Configuration Structure definition
-  * @brief  SMBUS Configuration Structure definition
-  * @{
-  */
-typedef struct
-{
-  uint32_t Timing;                 /*!< Specifies the SMBUS_TIMINGR_register value.
-                                     This parameter calculated by referring to SMBUS initialization
-                                            section in Reference manual */
-  uint32_t AnalogFilter;           /*!< Specifies if Analog Filter is enable or not.
-                                     This parameter can be a value of @ref SMBUS_Analog_Filter */
-
-  uint32_t OwnAddress1;            /*!< Specifies the first device own address.
-                                     This parameter can be a 7-bit or 10-bit address. */
-
-  uint32_t AddressingMode;         /*!< Specifies if 7-bit or 10-bit addressing mode for master is selected.
-                                     This parameter can be a value of @ref SMBUS_addressing_mode */
-
-  uint32_t DualAddressMode;        /*!< Specifies if dual addressing mode is selected.
-                                     This parameter can be a value of @ref SMBUS_dual_addressing_mode */
-
-  uint32_t OwnAddress2;            /*!< Specifies the second device own address if dual addressing mode is selected
-                                     This parameter can be a 7-bit address. */
-
-  uint32_t OwnAddress2Masks;       /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected
-                                     This parameter can be a value of @ref SMBUS_own_address2_masks. */
-
-  uint32_t GeneralCallMode;        /*!< Specifies if general call mode is selected.
-                                     This parameter can be a value of @ref SMBUS_general_call_addressing_mode. */
-
-  uint32_t NoStretchMode;          /*!< Specifies if nostretch mode is selected.
-                                     This parameter can be a value of @ref SMBUS_nostretch_mode */
-
-  uint32_t PacketErrorCheckMode;   /*!< Specifies if Packet Error Check mode is selected.
-                                     This parameter can be a value of @ref SMBUS_packet_error_check_mode */
-
-  uint32_t PeripheralMode;         /*!< Specifies which mode of Periphal is selected.
-                                     This parameter can be a value of @ref SMBUS_peripheral_mode */
-
-  uint32_t SMBusTimeout;           /*!< Specifies the content of the 32 Bits SMBUS_TIMEOUT_register value.
-                                      (Enable bits and different timeout values)
-                                     This parameter calculated by referring to SMBUS initialization
-                                         section in Reference manual */
-} SMBUS_InitTypeDef;
-/**
-  * @}
-  */
-
-/** @defgroup HAL_state_definition HAL state definition
-  * @brief  HAL State definition
-  * @{
-  */
-#define HAL_SMBUS_STATE_RESET           (0x00000000U)  /*!< SMBUS not yet initialized or disabled         */
-#define HAL_SMBUS_STATE_READY           (0x00000001U)  /*!< SMBUS initialized and ready for use           */
-#define HAL_SMBUS_STATE_BUSY            (0x00000002U)  /*!< SMBUS internal process is ongoing             */
-#define HAL_SMBUS_STATE_MASTER_BUSY_TX  (0x00000012U)  /*!< Master Data Transmission process is ongoing   */
-#define HAL_SMBUS_STATE_MASTER_BUSY_RX  (0x00000022U)  /*!< Master Data Reception process is ongoing      */
-#define HAL_SMBUS_STATE_SLAVE_BUSY_TX   (0x00000032U)  /*!< Slave Data Transmission process is ongoing    */
-#define HAL_SMBUS_STATE_SLAVE_BUSY_RX   (0x00000042U)  /*!< Slave Data Reception process is ongoing       */
-#define HAL_SMBUS_STATE_TIMEOUT         (0x00000003U)  /*!< Timeout state                                 */
-#define HAL_SMBUS_STATE_ERROR           (0x00000004U)  /*!< Reception process is ongoing                  */
-#define HAL_SMBUS_STATE_LISTEN          (0x00000008U)   /*!< Address Listen Mode is ongoing                */
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_Error_Code_definition SMBUS Error Code definition
-  * @brief  SMBUS Error Code definition
-  * @{
-  */
-#define HAL_SMBUS_ERROR_NONE            (0x00000000U)    /*!< No error             */
-#define HAL_SMBUS_ERROR_BERR            (0x00000001U)    /*!< BERR error           */
-#define HAL_SMBUS_ERROR_ARLO            (0x00000002U)    /*!< ARLO error           */
-#define HAL_SMBUS_ERROR_ACKF            (0x00000004U)    /*!< ACKF error           */
-#define HAL_SMBUS_ERROR_OVR             (0x00000008U)    /*!< OVR error            */
-#define HAL_SMBUS_ERROR_HALTIMEOUT      (0x00000010U)    /*!< Timeout error        */
-#define HAL_SMBUS_ERROR_BUSTIMEOUT      (0x00000020U)    /*!< Bus Timeout error    */
-#define HAL_SMBUS_ERROR_ALERT           (0x00000040U)    /*!< Alert error          */
-#define HAL_SMBUS_ERROR_PECERR          (0x00000080U)    /*!< PEC error            */
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_handle_Structure_definition SMBUS handle Structure definition
-  * @brief  SMBUS handle Structure definition
-  * @{
-  */
-typedef struct
-{
-  I2C_TypeDef                  *Instance;       /*!< SMBUS registers base address       */
-
-  SMBUS_InitTypeDef            Init;            /*!< SMBUS communication parameters     */
-
-  uint8_t                      *pBuffPtr;       /*!< Pointer to SMBUS transfer buffer   */
-
-  uint16_t                     XferSize;        /*!< SMBUS transfer size                */
-
-  __IO uint16_t                XferCount;       /*!< SMBUS transfer counter             */
-
-  __IO uint32_t                XferOptions;     /*!< SMBUS transfer options             */
-
-  __IO uint32_t                PreviousState;   /*!< SMBUS communication Previous state */
-
-  HAL_LockTypeDef              Lock;            /*!< SMBUS locking object               */
-
-  __IO uint32_t                State;           /*!< SMBUS communication state          */
-
-  __IO uint32_t                ErrorCode;       /*!< SMBUS Error code                   */
-
-} SMBUS_HandleTypeDef;
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup SMBUS_Exported_Constants SMBUS Exported Constants
-  * @{
-  */
-
-/** @defgroup SMBUS_Analog_Filter SMBUS Analog Filter
-  * @{
-  */
-#define SMBUS_ANALOGFILTER_ENABLE               (0x00000000U)
-#define SMBUS_ANALOGFILTER_DISABLE              I2C_CR1_ANFOFF
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_addressing_mode SMBUS addressing mode
-  * @{
-  */
-#define SMBUS_ADDRESSINGMODE_7BIT               (0x00000001U)
-#define SMBUS_ADDRESSINGMODE_10BIT              (0x00000002U)
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_dual_addressing_mode SMBUS dual addressing mode
-  * @{
-  */
-
-#define SMBUS_DUALADDRESS_DISABLE               (0x00000000U)
-#define SMBUS_DUALADDRESS_ENABLE                I2C_OAR2_OA2EN
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_own_address2_masks SMBUS ownaddress2 masks
-  * @{
-  */
-
-#define SMBUS_OA2_NOMASK                        ((uint8_t)0x00U)
-#define SMBUS_OA2_MASK01                        ((uint8_t)0x01U)
-#define SMBUS_OA2_MASK02                        ((uint8_t)0x02U)
-#define SMBUS_OA2_MASK03                        ((uint8_t)0x03U)
-#define SMBUS_OA2_MASK04                        ((uint8_t)0x04U)
-#define SMBUS_OA2_MASK05                        ((uint8_t)0x05U)
-#define SMBUS_OA2_MASK06                        ((uint8_t)0x06U)
-#define SMBUS_OA2_MASK07                        ((uint8_t)0x07U)
-/**
-  * @}
-  */
-
-
-/** @defgroup SMBUS_general_call_addressing_mode SMBUS general call addressing mode
-  * @{
-  */
-#define SMBUS_GENERALCALL_DISABLE               (0x00000000U)
-#define SMBUS_GENERALCALL_ENABLE                I2C_CR1_GCEN
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_nostretch_mode  SMBUS nostretch mode
-  * @{
-  */
-#define SMBUS_NOSTRETCH_DISABLE                 (0x00000000U)
-#define SMBUS_NOSTRETCH_ENABLE                  I2C_CR1_NOSTRETCH
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_packet_error_check_mode SMBUS packet error check mode
-  * @{
-  */
-#define SMBUS_PEC_DISABLE                       (0x00000000U)
-#define SMBUS_PEC_ENABLE                        I2C_CR1_PECEN
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_peripheral_mode SMBUS peripheral mode
-  * @{
-  */
-#define SMBUS_PERIPHERAL_MODE_SMBUS_HOST        I2C_CR1_SMBHEN
-#define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE       (0x00000000U)
-#define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP   I2C_CR1_SMBDEN
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_ReloadEndMode_definition SMBUS ReloadEndMode definition
-  * @{
-  */
-
-#define  SMBUS_SOFTEND_MODE                     (0x00000000U)
-#define  SMBUS_RELOAD_MODE                      I2C_CR2_RELOAD
-#define  SMBUS_AUTOEND_MODE                     I2C_CR2_AUTOEND
-#define  SMBUS_SENDPEC_MODE                     I2C_CR2_PECBYTE
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_StartStopMode_definition SMBUS StartStopMode definition
-  * @{
-  */
-
-#define  SMBUS_NO_STARTSTOP                     (0x00000000U)
-#define  SMBUS_GENERATE_STOP                    (uint32_t)(0x80000000U | I2C_CR2_STOP)
-#define  SMBUS_GENERATE_START_READ              (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
-#define  SMBUS_GENERATE_START_WRITE             (uint32_t)(0x80000000U | I2C_CR2_START)
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_XferOptions_definition SMBUS XferOptions definition
-  * @{
-  */
-
-/* List of XferOptions in usage of :
- * 1- Restart condition when direction change
- * 2- No Restart condition in other use cases
- */
-#define  SMBUS_FIRST_FRAME                      SMBUS_SOFTEND_MODE
-#define  SMBUS_NEXT_FRAME                       ((uint32_t)(SMBUS_RELOAD_MODE | SMBUS_SOFTEND_MODE))
-#define  SMBUS_FIRST_AND_LAST_FRAME_NO_PEC      SMBUS_AUTOEND_MODE
-#define  SMBUS_LAST_FRAME_NO_PEC                SMBUS_AUTOEND_MODE
-#define  SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC    ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE))
-#define  SMBUS_LAST_FRAME_WITH_PEC              ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE))
-
-/* List of XferOptions in usage of :
- * 1- Restart condition in all use cases (direction change or not)
- */
-#define  SMBUS_OTHER_FRAME_NO_PEC               (0x000000AAU)
-#define  SMBUS_OTHER_FRAME_WITH_PEC             (0x0000AA00U)
-#define  SMBUS_OTHER_AND_LAST_FRAME_NO_PEC      (0x00AA0000U)
-#define  SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC    (0xAA000000U)
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_Interrupt_configuration_definition SMBUS Interrupt configuration definition
-  * @brief SMBUS Interrupt definition
-  *        Elements values convention: 0xXXXXXXXX
-  *           - XXXXXXXX  : Interrupt control mask
-  * @{
-  */
-#define SMBUS_IT_ERRI                           I2C_CR1_ERRIE
-#define SMBUS_IT_TCI                            I2C_CR1_TCIE
-#define SMBUS_IT_STOPI                          I2C_CR1_STOPIE
-#define SMBUS_IT_NACKI                          I2C_CR1_NACKIE
-#define SMBUS_IT_ADDRI                          I2C_CR1_ADDRIE
-#define SMBUS_IT_RXI                            I2C_CR1_RXIE
-#define SMBUS_IT_TXI                            I2C_CR1_TXIE
-#define SMBUS_IT_TX                             (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI)
-#define SMBUS_IT_RX                             (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_NACKI | SMBUS_IT_RXI)
-#define SMBUS_IT_ALERT                          (SMBUS_IT_ERRI)
-#define SMBUS_IT_ADDR                           (SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI)
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_Flag_definition SMBUS Flag definition
-  * @brief Flag definition
-  *        Elements values convention: 0xXXXXYYYY
-  *           - XXXXXXXX  : Flag mask
-  * @{
-  */
-
-#define  SMBUS_FLAG_TXE                         I2C_ISR_TXE
-#define  SMBUS_FLAG_TXIS                        I2C_ISR_TXIS
-#define  SMBUS_FLAG_RXNE                        I2C_ISR_RXNE
-#define  SMBUS_FLAG_ADDR                        I2C_ISR_ADDR
-#define  SMBUS_FLAG_AF                          I2C_ISR_NACKF
-#define  SMBUS_FLAG_STOPF                       I2C_ISR_STOPF
-#define  SMBUS_FLAG_TC                          I2C_ISR_TC
-#define  SMBUS_FLAG_TCR                         I2C_ISR_TCR
-#define  SMBUS_FLAG_BERR                        I2C_ISR_BERR
-#define  SMBUS_FLAG_ARLO                        I2C_ISR_ARLO
-#define  SMBUS_FLAG_OVR                         I2C_ISR_OVR
-#define  SMBUS_FLAG_PECERR                      I2C_ISR_PECERR
-#define  SMBUS_FLAG_TIMEOUT                     I2C_ISR_TIMEOUT
-#define  SMBUS_FLAG_ALERT                       I2C_ISR_ALERT
-#define  SMBUS_FLAG_BUSY                        I2C_ISR_BUSY
-#define  SMBUS_FLAG_DIR                         I2C_ISR_DIR
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macros ------------------------------------------------------------*/
-/** @defgroup SMBUS_Exported_Macros SMBUS Exported Macros
-  * @{
-  */
-
-/** @brief  Reset SMBUS handle state.
-  * @param  __HANDLE__ specifies the SMBUS Handle.
-  * @retval None
-  */
-#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET)
-
-/** @brief  Enable the specified SMBUS interrupts.
-  * @param  __HANDLE__ specifies the SMBUS Handle.
-  * @param  __INTERRUPT__ specifies the interrupt source to enable.
-  *        This parameter can be one of the following values:
-  *            @arg @ref SMBUS_IT_ERRI  Errors interrupt enable
-  *            @arg @ref SMBUS_IT_TCI   Transfer complete interrupt enable
-  *            @arg @ref SMBUS_IT_STOPI STOP detection interrupt enable
-  *            @arg @ref SMBUS_IT_NACKI NACK received interrupt enable
-  *            @arg @ref SMBUS_IT_ADDRI Address match interrupt enable
-  *            @arg @ref SMBUS_IT_RXI   RX interrupt enable
-  *            @arg @ref SMBUS_IT_TXI   TX interrupt enable
-  *
-  * @retval None
-  */
-#define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
-
-/** @brief  Disable the specified SMBUS interrupts.
-  * @param  __HANDLE__ specifies the SMBUS Handle.
-  * @param  __INTERRUPT__ specifies the interrupt source to disable.
-  *        This parameter can be one of the following values:
-  *            @arg @ref SMBUS_IT_ERRI  Errors interrupt enable
-  *            @arg @ref SMBUS_IT_TCI   Transfer complete interrupt enable
-  *            @arg @ref SMBUS_IT_STOPI STOP detection interrupt enable
-  *            @arg @ref SMBUS_IT_NACKI NACK received interrupt enable
-  *            @arg @ref SMBUS_IT_ADDRI Address match interrupt enable
-  *            @arg @ref SMBUS_IT_RXI   RX interrupt enable
-  *            @arg @ref SMBUS_IT_TXI   TX interrupt enable
-  *
-  * @retval None
-  */
-#define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__)  ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
-
-/** @brief  Check whether the specified SMBUS interrupt source is enabled or not.
-  * @param  __HANDLE__ specifies the SMBUS Handle.
-  * @param  __INTERRUPT__ specifies the SMBUS interrupt source to check.
-  *          This parameter can be one of the following values:
-  *            @arg @ref SMBUS_IT_ERRI  Errors interrupt enable
-  *            @arg @ref SMBUS_IT_TCI   Transfer complete interrupt enable
-  *            @arg @ref SMBUS_IT_STOPI STOP detection interrupt enable
-  *            @arg @ref SMBUS_IT_NACKI NACK received interrupt enable
-  *            @arg @ref SMBUS_IT_ADDRI Address match interrupt enable
-  *            @arg @ref SMBUS_IT_RXI   RX interrupt enable
-  *            @arg @ref SMBUS_IT_TXI   TX interrupt enable
-  *
-  * @retval The new state of __IT__ (TRUE or FALSE).
-  */
-#define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
-
-/** @brief  Check whether the specified SMBUS flag is set or not.
-  * @param  __HANDLE__ specifies the SMBUS Handle.
-  * @param  __FLAG__ specifies the flag to check.
-  *        This parameter can be one of the following values:
-  *            @arg @ref SMBUS_FLAG_TXE     Transmit data register empty
-  *            @arg @ref SMBUS_FLAG_TXIS    Transmit interrupt status
-  *            @arg @ref SMBUS_FLAG_RXNE    Receive data register not empty
-  *            @arg @ref SMBUS_FLAG_ADDR    Address matched (slave mode)
-  *            @arg @ref SMBUS_FLAG_AF      NACK received flag
-  *            @arg @ref SMBUS_FLAG_STOPF   STOP detection flag
-  *            @arg @ref SMBUS_FLAG_TC      Transfer complete (master mode)
-  *            @arg @ref SMBUS_FLAG_TCR     Transfer complete reload
-  *            @arg @ref SMBUS_FLAG_BERR    Bus error
-  *            @arg @ref SMBUS_FLAG_ARLO    Arbitration lost
-  *            @arg @ref SMBUS_FLAG_OVR     Overrun/Underrun
-  *            @arg @ref SMBUS_FLAG_PECERR  PEC error in reception
-  *            @arg @ref SMBUS_FLAG_TIMEOUT Timeout or Tlow detection flag
-  *            @arg @ref SMBUS_FLAG_ALERT   SMBus alert
-  *            @arg @ref SMBUS_FLAG_BUSY    Bus busy
-  *            @arg @ref SMBUS_FLAG_DIR     Transfer direction (slave mode)
-  *
-  * @retval The new state of __FLAG__ (TRUE or FALSE).
-  */
-#define SMBUS_FLAG_MASK  (0x0001FFFFU)
-#define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))
-
-/** @brief  Clear the SMBUS pending flags which are cleared by writing 1 in a specific bit.
-  * @param  __HANDLE__ specifies the SMBUS Handle.
-  * @param  __FLAG__ specifies the flag to clear.
-  *          This parameter can be any combination of the following values:
-  *            @arg @ref SMBUS_FLAG_ADDR    Address matched (slave mode)
-  *            @arg @ref SMBUS_FLAG_AF      NACK received flag
-  *            @arg @ref SMBUS_FLAG_STOPF   STOP detection flag
-  *            @arg @ref SMBUS_FLAG_BERR    Bus error
-  *            @arg @ref SMBUS_FLAG_ARLO    Arbitration lost
-  *            @arg @ref SMBUS_FLAG_OVR     Overrun/Underrun
-  *            @arg @ref SMBUS_FLAG_PECERR  PEC error in reception
-  *            @arg @ref SMBUS_FLAG_TIMEOUT Timeout or Tlow detection flag
-  *            @arg @ref SMBUS_FLAG_ALERT   SMBus alert
-  *
-  * @retval None
-  */
-#define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
-
-/** @brief  Enable the specified SMBUS peripheral.
-  * @param  __HANDLE__ specifies the SMBUS Handle.
-  * @retval None
-  */
-#define __HAL_SMBUS_ENABLE(__HANDLE__)                  (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
-
-/** @brief  Disable the specified SMBUS peripheral.
-  * @param  __HANDLE__ specifies the SMBUS Handle.
-  * @retval None
-  */
-#define __HAL_SMBUS_DISABLE(__HANDLE__)                 (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
-
-/** @brief  Generate a Non-Acknowledge SMBUS peripheral in Slave mode.
-  * @param  __HANDLE__ specifies the SMBUS Handle.
-  * @retval None
-  */
-#define __HAL_SMBUS_GENERATE_NACK(__HANDLE__)           (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
-
-/**
-  * @}
-  */
-
-
-/* Private constants ---------------------------------------------------------*/
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup SMBUS_Private_Macro SMBUS Private Macros
-  * @{
-  */
-
-#define IS_SMBUS_ANALOG_FILTER(FILTER)                  (((FILTER) == SMBUS_ANALOGFILTER_ENABLE) || \
-                                                          ((FILTER) == SMBUS_ANALOGFILTER_DISABLE))
-
-#define IS_SMBUS_DIGITAL_FILTER(FILTER)                 ((FILTER) <= 0x0000000FU)
-
-#define IS_SMBUS_ADDRESSING_MODE(MODE)                  (((MODE) == SMBUS_ADDRESSINGMODE_7BIT)  || \
-                                                          ((MODE) == SMBUS_ADDRESSINGMODE_10BIT))
-
-#define IS_SMBUS_DUAL_ADDRESS(ADDRESS)                  (((ADDRESS) == SMBUS_DUALADDRESS_DISABLE) || \
-                                                          ((ADDRESS) == SMBUS_DUALADDRESS_ENABLE))
-
-#define IS_SMBUS_OWN_ADDRESS2_MASK(MASK)                (((MASK) == SMBUS_OA2_NOMASK)    || \
-                                                         ((MASK) == SMBUS_OA2_MASK01)    || \
-                                                         ((MASK) == SMBUS_OA2_MASK02)    || \
-                                                         ((MASK) == SMBUS_OA2_MASK03)    || \
-                                                         ((MASK) == SMBUS_OA2_MASK04)    || \
-                                                         ((MASK) == SMBUS_OA2_MASK05)    || \
-                                                         ((MASK) == SMBUS_OA2_MASK06)    || \
-                                                         ((MASK) == SMBUS_OA2_MASK07))
-
-#define IS_SMBUS_GENERAL_CALL(CALL)                     (((CALL) == SMBUS_GENERALCALL_DISABLE) || \
-                                                         ((CALL) == SMBUS_GENERALCALL_ENABLE))
-
-#define IS_SMBUS_NO_STRETCH(STRETCH)                    (((STRETCH) == SMBUS_NOSTRETCH_DISABLE) || \
-                                                         ((STRETCH) == SMBUS_NOSTRETCH_ENABLE))
-
-#define IS_SMBUS_PEC(PEC)                               (((PEC) == SMBUS_PEC_DISABLE) || \
-                                                          ((PEC) == SMBUS_PEC_ENABLE))
-
-#define IS_SMBUS_PERIPHERAL_MODE(MODE)                  (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST)    || \
-                                                          ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE)  || \
-                                                          ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))
-
-#define IS_SMBUS_TRANSFER_MODE(MODE)                    (((MODE) == SMBUS_RELOAD_MODE)                           || \
-                                                          ((MODE) == SMBUS_AUTOEND_MODE)                         || \
-                                                          ((MODE) == SMBUS_SOFTEND_MODE)                         || \
-                                                          ((MODE) == SMBUS_SENDPEC_MODE)                         || \
-                                                          ((MODE) == (SMBUS_RELOAD_MODE | SMBUS_SENDPEC_MODE))   || \
-                                                          ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE))  || \
-                                                          ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_RELOAD_MODE))   || \
-                                                          ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE | SMBUS_RELOAD_MODE )))
-
-
-#define IS_SMBUS_TRANSFER_REQUEST(REQUEST)              (((REQUEST) == SMBUS_GENERATE_STOP)              || \
-                                                          ((REQUEST) == SMBUS_GENERATE_START_READ)       || \
-                                                          ((REQUEST) == SMBUS_GENERATE_START_WRITE)      || \
-                                                          ((REQUEST) == SMBUS_NO_STARTSTOP))
-
-
-#define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST)      (((REQUEST) == SMBUS_FIRST_FRAME)                        || \
-                                                          ((REQUEST) == SMBUS_NEXT_FRAME)                        || \
-                                                          ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC)       || \
-                                                          ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC)                 || \
-                                                          ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC)     || \
-                                                          ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC)               || \
-                                                          IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
-
-#define IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_OTHER_FRAME_NO_PEC)                || \
-                                                          ((REQUEST) == SMBUS_OTHER_AND_LAST_FRAME_NO_PEC)       || \
-                                                          ((REQUEST) == SMBUS_OTHER_FRAME_WITH_PEC)              || \
-                                                          ((REQUEST) == SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC))
-
-#define SMBUS_RESET_CR1(__HANDLE__)                       ((__HANDLE__)->Instance->CR1 &= (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN | I2C_CR1_SMBDEN | I2C_CR1_PECEN)))
-#define SMBUS_RESET_CR2(__HANDLE__)                       ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
-
-#define SMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__)     (((__ADDMODE__) == SMBUS_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
-                                                                  (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
-
-#define SMBUS_GET_ADDR_MATCH(__HANDLE__)                  (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 17U)
-#define SMBUS_GET_DIR(__HANDLE__)                         (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)
-#define SMBUS_GET_STOP_MODE(__HANDLE__)                   ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
-#define SMBUS_GET_PEC_MODE(__HANDLE__)                    ((__HANDLE__)->Instance->CR2 & I2C_CR2_PECBYTE)
-#define SMBUS_GET_ALERT_ENABLED(__HANDLE__)                ((__HANDLE__)->Instance->CR1 & I2C_CR1_ALERTEN)
-
-#define SMBUS_GET_ISR_REG(__HANDLE__)                   ((__HANDLE__)->Instance->ISR)
-#define SMBUS_CHECK_FLAG(__ISR__, __FLAG__)             ((((__ISR__) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))
-
-#define IS_SMBUS_OWN_ADDRESS1(ADDRESS1)                         ((ADDRESS1) <= 0x000003FFU)
-#define IS_SMBUS_OWN_ADDRESS2(ADDRESS2)                         ((ADDRESS2) <= (uint16_t)0x00FFU)
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup SMBUS_Exported_Functions SMBUS Exported Functions
-  * @{
-  */
-
-/** @addtogroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
- * @{
- */
-
-/* Initialization and de-initialization functions  **********************************/
-HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus);
-HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus);
-void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus);
-void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus);
-HAL_StatusTypeDef HAL_SMBUS_ConfigAnalogFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter);
-HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter);
-
-/**
-  * @}
-  */
-
-/** @addtogroup SMBUS_Exported_Functions_Group2 Input and Output operation functions
- * @{
- */
-
-/* IO operation functions  *****************************************************/
-/** @addtogroup Blocking_mode_Polling Blocking mode Polling
- * @{
- */
-/******* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
-/**
-  * @}
-  */
-
-/** @addtogroup Non-Blocking_mode_Interrupt Non-Blocking mode Interrupt
- * @{
- */
-/******* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress);
-HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-
-HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
-HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
-HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus);
-HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus);
-/**
-  * @}
-  */
-
-/** @addtogroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
- * @{
- */
-/******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */
-void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
-void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
-void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
-void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
-void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
-void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
-void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);
-void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus);
-void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus);
-
-/**
-  * @}
-  */
-
-/** @addtogroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions
- *  @{
- */
-
-/* Peripheral State and Errors functions  **************************************************/
-uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus);
-uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Private Functions ---------------------------------------------------------*/
-/** @defgroup SMBUS_Private_Functions SMBUS Private Functions
-  * @{
-  */
-/* Private functions are defined in stm32l0xx_hal_smbus.c file */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif /* __STM32L0xx_HAL_SMBUS_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h
deleted file mode 100755
index a0270e44..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h
+++ /dev/null
@@ -1,676 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_spi.h
-  * @author  MCD Application Team
-  * @brief   Header file of SPI HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_SPI_H
-#define __STM32L0xx_HAL_SPI_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"  
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup SPI SPI
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup SPI_Exported_Types SPI Exported Types
-  * @{
-  */
-
-/** 
-  * @brief  SPI Configuration Structure definition  
-  */
-typedef struct
-{
-  uint32_t Mode;               /*!< Specifies the SPI operating mode.
-                                    This parameter can be a value of @ref SPI_mode */
-
-  uint32_t Direction;          /*!< Specifies the SPI Directional mode state.
-                                    This parameter can be a value of @ref SPI_Direction_mode */
-
-  uint32_t DataSize;           /*!< Specifies the SPI data size.
-                                    This parameter can be a value of @ref SPI_data_size */
-
-  uint32_t CLKPolarity;        /*!< Specifies the serial clock steady state.
-                                    This parameter can be a value of @ref SPI_Clock_Polarity */
-
-  uint32_t CLKPhase;           /*!< Specifies the clock active edge for the bit capture.
-                                    This parameter can be a value of @ref SPI_Clock_Phase */
-
-  uint32_t NSS;                /*!< Specifies whether the NSS signal is managed by
-                                    hardware (NSS pin) or by software using the SSI bit.
-                                    This parameter can be a value of @ref SPI_Slave_Select_management */
-
-  uint32_t BaudRatePrescaler;  /*!< Specifies the Baud Rate prescaler value which will be
-                                    used to configure the transmit and receive SCK clock.
-                                    This parameter can be a value of @ref SPI_BaudRate_Prescaler
-                                    @note The communication clock is derived from the master
-                                    clock. The slave clock does not need to be set */
-
-  uint32_t FirstBit;           /*!< Specifies whether data transfers start from MSB or LSB bit.
-                                    This parameter can be a value of @ref SPI_MSB_LSB_transmission */
-
-  uint32_t TIMode;             /*!< Specifies if the TI mode is enabled or not.
-                                    This parameter can be a value of @ref SPI_TI_mode */
-
-  uint32_t CRCCalculation;     /*!< Specifies if the CRC calculation is enabled or not.
-                                    This parameter can be a value of @ref SPI_CRC_Calculation */
-
-  uint32_t CRCPolynomial;      /*!< Specifies the polynomial used for the CRC calculation.
-                                    This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
-
-}SPI_InitTypeDef;
-
-/**
-  * @brief  HAL SPI State structure definition
-  */
-typedef enum
-{
-  HAL_SPI_STATE_RESET      = 0x00U,  /*!< SPI not yet initialized or disabled                */
-  HAL_SPI_STATE_READY      = 0x01U,  /*!< SPI initialized and ready for use                  */
-  HAL_SPI_STATE_BUSY       = 0x02U,  /*!< SPI process is ongoing                             */
-  HAL_SPI_STATE_BUSY_TX    = 0x12U,  /*!< Data Transmission process is ongoing               */
-  HAL_SPI_STATE_BUSY_RX    = 0x22U,  /*!< Data Reception process is ongoing                  */
-  HAL_SPI_STATE_BUSY_TX_RX = 0x32U,  /*!< Data Transmission and Reception process is ongoing */
-  HAL_SPI_STATE_ERROR      = 0x03U   /*!< SPI error state                                    */
-    
-}HAL_SPI_StateTypeDef;
-
-/** 
-  * @brief  SPI handle Structure definition
-  */
-typedef struct __SPI_HandleTypeDef
-{
-  SPI_TypeDef                *Instance;    /*!< SPI registers base address */
-
-  SPI_InitTypeDef            Init;         /*!< SPI communication parameters */
-
-  uint8_t                    *pTxBuffPtr;  /*!< Pointer to SPI Tx transfer Buffer */
-
-  uint16_t                   TxXferSize;   /*!< SPI Tx transfer size */
-  
-  __IO uint16_t              TxXferCount;  /*!< SPI Tx Transfer Counter */
-
-  uint8_t                    *pRxBuffPtr;  /*!< Pointer to SPI Rx transfer Buffer */
-
-  uint16_t                   RxXferSize;   /*!< SPI Rx transfer size */
-
-  __IO uint16_t              RxXferCount;  /*!< SPI Rx Transfer Counter */
-
-  DMA_HandleTypeDef          *hdmatx;      /*!< SPI Tx DMA handle parameters */
-
-  DMA_HandleTypeDef          *hdmarx;      /*!< SPI Rx DMA handle parameters */
-
-  void                       (*RxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Rx ISR */
-
-  void                       (*TxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Tx ISR */
-
-  HAL_LockTypeDef            Lock;         /*!< SPI locking object */
-
-  __IO HAL_SPI_StateTypeDef  State;        /*!< SPI communication state */
-
-  __IO  uint32_t             ErrorCode;    /*!< SPI Error code */
-
-}SPI_HandleTypeDef;
-/**
-  * @}
-  */
-
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup SPI_Exported_Constants SPI Exported Constants
-  * @{
-  */
-
-/**
-  * @defgroup SPI_ErrorCode SPI Error Code
-  * @{
-  */
-#define HAL_SPI_ERROR_NONE      ((uint32_t)0x00U)    /*!< No error             */
-#define HAL_SPI_ERROR_MODF      ((uint32_t)0x01U)    /*!< MODF error           */
-#define HAL_SPI_ERROR_CRC       ((uint32_t)0x02U)    /*!< CRC error            */
-#define HAL_SPI_ERROR_OVR       ((uint32_t)0x04U)    /*!< OVR error            */
-#define HAL_SPI_ERROR_FRE       ((uint32_t)0x08U)    /*!< FRE error            */
-#define HAL_SPI_ERROR_DMA       ((uint32_t)0x10U)    /*!< DMA transfer error   */
-#define HAL_SPI_ERROR_FLAG      ((uint32_t)0x20U)     /*!< Flag: RXNE,TXE, BSY  */
-/**
-  * @}
-  */
-
-/** @defgroup SPI_mode SPI mode
-  * @{
-  */
-#define SPI_MODE_SLAVE                  ((uint32_t)0x00000000U)
-#define SPI_MODE_MASTER                 (SPI_CR1_MSTR | SPI_CR1_SSI)
-
-/**
-  * @}
-  */
-
-/** @defgroup SPI_Direction_mode SPI Direction mode
-  * @{
-  */
-#define SPI_DIRECTION_2LINES            ((uint32_t)0x00000000U)
-#define SPI_DIRECTION_2LINES_RXONLY     SPI_CR1_RXONLY
-#define SPI_DIRECTION_1LINE             SPI_CR1_BIDIMODE
-
-/**
-  * @}
-  */
-
-/** @defgroup SPI_data_size SPI data size
-  * @{
-  */
-#define SPI_DATASIZE_8BIT               ((uint32_t)0x00000000U)
-#define SPI_DATASIZE_16BIT              SPI_CR1_DFF
-
-/**
-  * @}
-  */ 
-
-/** @defgroup SPI_Clock_Polarity SPI Clock Polarity
-  * @{
-  */
-#define SPI_POLARITY_LOW                ((uint32_t)0x00000000U)
-#define SPI_POLARITY_HIGH               SPI_CR1_CPOL
-
-/**
-  * @}
-  */
-
-/** @defgroup SPI_Clock_Phase SPI Clock Phase
-  * @{
-  */
-#define SPI_PHASE_1EDGE                 ((uint32_t)0x00000000U)
-#define SPI_PHASE_2EDGE                 SPI_CR1_CPHA
-
-/**
-  * @}
-  */
-
-/** @defgroup SPI_Slave_Select_management SPI Slave Select management
-  * @{
-  */
-#define SPI_NSS_SOFT                    SPI_CR1_SSM
-#define SPI_NSS_HARD_INPUT              ((uint32_t)0x00000000U)
-#define SPI_NSS_HARD_OUTPUT             ((uint32_t)(SPI_CR2_SSOE << 16U))
-
-/**
-  * @}
-  */ 
-
-/** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
-  * @{
-  */
-#define SPI_BAUDRATEPRESCALER_2         ((uint32_t)0x00000000U)
-#define SPI_BAUDRATEPRESCALER_4         ((uint32_t)SPI_CR1_BR_0)
-#define SPI_BAUDRATEPRESCALER_8         ((uint32_t)SPI_CR1_BR_1)
-#define SPI_BAUDRATEPRESCALER_16        ((uint32_t)SPI_CR1_BR_1 | SPI_CR1_BR_0)
-#define SPI_BAUDRATEPRESCALER_32        ((uint32_t)SPI_CR1_BR_2)
-#define SPI_BAUDRATEPRESCALER_64        ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_0)
-#define SPI_BAUDRATEPRESCALER_128       ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_1)
-#define SPI_BAUDRATEPRESCALER_256       ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)
-
-/**
-  * @}
-  */ 
-
-/** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission
-  * @{
-  */
-#define SPI_FIRSTBIT_MSB                ((uint32_t)0x00000000U)
-#define SPI_FIRSTBIT_LSB                SPI_CR1_LSBFIRST
-
-/**
-  * @}
-  */
-
-/** @defgroup SPI_TI_mode SPI TI mode
-  * @{
-  */
-#define SPI_TIMODE_DISABLE             ((uint32_t)0x00000000U)
-#define SPI_TIMODE_ENABLE              SPI_CR2_FRF
-
-/**
-  * @}
-  */
-
-/** @defgroup SPI_CRC_Calculation SPI CRC Calculation
-  * @{
-  */
-#define SPI_CRCCALCULATION_DISABLE     ((uint32_t)0x00000000U)
-#define SPI_CRCCALCULATION_ENABLE      SPI_CR1_CRCEN
-
-/**
-  * @}
-  */
-
-/** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition
-  * @{
-  */
-#define SPI_IT_TXE                      SPI_CR2_TXEIE
-#define SPI_IT_RXNE                     SPI_CR2_RXNEIE
-#define SPI_IT_ERR                      SPI_CR2_ERRIE
-/**
-  * @}
-  */
-
-/** @defgroup SPI_Flag_definition SPI Flag definition
-  * @{
-  */
-#define SPI_FLAG_RXNE                   SPI_SR_RXNE
-#define SPI_FLAG_TXE                    SPI_SR_TXE
-#define SPI_FLAG_CRCERR                 SPI_SR_CRCERR
-#define SPI_FLAG_MODF                   SPI_SR_MODF
-#define SPI_FLAG_OVR                    SPI_SR_OVR
-#define SPI_FLAG_BSY                    SPI_SR_BSY
-#define SPI_FLAG_FRE                    SPI_SR_FRE
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup SPI_Exported_Macros SPI Exported Macros
-  * @{
-  */
-
-/** @brief Reset SPI handle state
-  * @param  __HANDLE__: specifies the SPI handle.
-  *         This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral.
-  * @retval None
-  */
-#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
-
-/** @brief  Enable the specified SPI interrupts.
-  * @param  __HANDLE__: specifies the SPI handle.
-  *         This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral.
-  * @param  __INTERRUPT__: specifies the interrupt source to enable.
-  *         This parameter can be one of the following values:
-  *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
-  *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
-  *            @arg SPI_IT_ERR: Error interrupt enable
-  * @retval None
-  */
-#define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__)   SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
-
-/** @brief  Disable the specified SPI interrupts.
-  * @param  __HANDLE__: specifies the SPI handle.
-  *         This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral.
-  * @param  __INTERRUPT__: specifies the interrupt source to disable.
-  *         This parameter can be one of the following values:
-  *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
-  *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
-  *            @arg SPI_IT_ERR: Error interrupt enable
-  * @retval None
-  */
-#define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__)  CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
-
-/** @brief  Check if the specified SPI interrupt source is enabled or disabled.
-  * @param  __HANDLE__: specifies the SPI handle.
-  *         This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral.
-  * @param  __INTERRUPT__: specifies the SPI interrupt source to check.
-  *          This parameter can be one of the following values:
-  *             @arg SPI_IT_TXE: Tx buffer empty interrupt enable
-  *             @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
-  *             @arg SPI_IT_ERR: Error interrupt enable
-  * @retval The new state of __IT__ (TRUE or FALSE).
-  */
-#define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
-
-/** @brief  Check whether the specified SPI flag is set or not.
-  * @param  __HANDLE__: specifies the SPI handle.
-  *         This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral.
-  * @param  __FLAG__: specifies the flag to check.
-  *         This parameter can be one of the following values:
-  *            @arg SPI_FLAG_RXNE: Receive buffer not empty flag
-  *            @arg SPI_FLAG_TXE: Transmit buffer empty flag
-  *            @arg SPI_FLAG_CRCERR: CRC error flag
-  *            @arg SPI_FLAG_MODF: Mode fault flag
-  *            @arg SPI_FLAG_OVR: Overrun flag
-  *            @arg SPI_FLAG_BSY: Busy flag
-  *            @arg SPI_FLAG_FRE: Frame format error flag  
-  * @retval The new state of __FLAG__ (TRUE or FALSE).
-  */
-#define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
-
-/** @brief  Clear the SPI CRCERR pending flag.
-  * @param  __HANDLE__: specifies the SPI handle.
-  *         This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral.
-  * @retval None
-  */
-#define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = ~(SPI_FLAG_CRCERR))
-
-/** @brief  Clear the SPI MODF pending flag.
-  * @param  __HANDLE__: specifies the SPI handle.
-  *         This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral. 
-  * @retval None
-  */                                            
-#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__)        \
-   do{                                              \
-     __IO uint32_t tmpreg_modf;                     \
-     tmpreg_modf = (__HANDLE__)->Instance->SR;      \
-     (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
-     UNUSED(tmpreg_modf);                           \
-   } while(0)
-
-/** @brief  Clear the SPI OVR pending flag.
-  * @param  __HANDLE__: specifies the SPI handle.
-  *         This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral. 
-  * @retval None
-  */
-#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__)         \
-   do{                                              \
-     __IO uint32_t tmpreg_ovr;                      \
-     tmpreg_ovr = (__HANDLE__)->Instance->DR;       \
-     tmpreg_ovr = (__HANDLE__)->Instance->SR;       \
-     UNUSED(tmpreg_ovr);                            \
-   } while(0)
-
-/** @brief  Clear the SPI FRE pending flag.
-  * @param  __HANDLE__: specifies the SPI handle.
-  *         This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral.
-  * @retval None
-  */
-#define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__)         \
-   do{                                              \
-     __IO uint32_t tmpreg_fre;                      \
-     tmpreg_fre = (__HANDLE__)->Instance->SR;       \
-     UNUSED(tmpreg_fre);                            \
-   } while(0)
-
-/** @brief  Enables the SPI.
-  * @param  __HANDLE__: specifies the SPI Handle.
-  *         This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral.
-  * @retval None
-  */                                                 
-#define __HAL_SPI_ENABLE(__HANDLE__)  SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
-                                                 
-/** @brief  Disables the SPI.
-  * @param  __HANDLE__: specifies the SPI Handle.
-  *         This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral.
-  * @retval None
-  */                                           
-#define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
-/**
-  * @}
-  */
-
-
-/* Private macros -----------------------------------------------------------*/
-/** @defgroup SPI_Private_Macros SPI Private Macros
-  * @{
-  */
-
-/** @brief  Checks if SPI Mode parameter is in allowed range.
-  * @param  __MODE__: specifies the SPI Mode.
-  *         This parameter can be a value of @ref SPI_mode
-  * @retval None
-  */
-#define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || ((__MODE__) == SPI_MODE_MASTER))
-
-/** @brief  Checks if SPI Direction Mode parameter is in allowed range.
-  * @param  __MODE__: specifies the SPI Direction Mode.
-  *         This parameter can be a value of @ref SPI_Direction_mode
-  * @retval None
-  */
-#define IS_SPI_DIRECTION_MODE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES)        || \
-                                         ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \
-                                         ((__MODE__) == SPI_DIRECTION_1LINE))
-
-/** @brief  Checks if SPI Direction Mode parameter is 1 or 2 lines.
-  * @param  __MODE__: specifies the SPI Direction Mode.
-  * @retval None
-  */
-#define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES)  || \
-                                                    ((__MODE__) == SPI_DIRECTION_1LINE))
-
-/** @brief  Checks if SPI Direction Mode parameter is 2 lines.
-  * @param  __MODE__: specifies the SPI Direction Mode.
-  * @retval None
-  */
-#define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES)
-
-/** @brief  Checks if SPI Data Size parameter is in allowed range.
-  * @param  __DATASIZE__: specifies the SPI Data Size.
-  *         This parameter can be a value of @ref SPI_data_size
-  * @retval None
-  */
-#define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \
-                                       ((__DATASIZE__) == SPI_DATASIZE_8BIT))
-
-/** @brief  Checks if SPI Serial clock steady state parameter is in allowed range.
-  * @param  __CPOL__: specifies the SPI serial clock steady state.
-  *         This parameter can be a value of @ref SPI_Clock_Polarity
-  * @retval None
-  */
-#define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \
-                               ((__CPOL__) == SPI_POLARITY_HIGH))
-
-/** @brief  Checks if SPI Clock Phase parameter is in allowed range.
-  * @param  __CPHA__: specifies the SPI Clock Phase.
-  *         This parameter can be a value of @ref SPI_Clock_Phase
-  * @retval None
-  */
-#define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \
-                               ((__CPHA__) == SPI_PHASE_2EDGE))
-
-/** @brief  Checks if SPI Slave select parameter is in allowed range.
-  * @param  __NSS__: specifies the SPI Slave Slelect management parameter.
-  *         This parameter can be a value of @ref SPI_Slave_Select_management
-  * @retval None
-  */
-#define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT)       || \
-                             ((__NSS__) == SPI_NSS_HARD_INPUT) || \
-                             ((__NSS__) == SPI_NSS_HARD_OUTPUT))
-
-/** @brief  Checks if SPI Baudrate prescaler parameter is in allowed range.
-  * @param  __PRESCALER__: specifies the SPI Baudrate prescaler.
-  *         This parameter can be a value of @ref SPI_BaudRate_Prescaler
-  * @retval None
-  */
-#define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2)   || \
-                                                  ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4)   || \
-                                                  ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8)   || \
-                                                  ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16)  || \
-                                                  ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32)  || \
-                                                  ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64)  || \
-                                                  ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \
-                                                  ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256))
-
-/** @brief  Checks if SPI MSB LSB transmission parameter is in allowed range.
-  * @param  __BIT__: specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit).
-  *         This parameter can be a value of @ref SPI_MSB_LSB_transmission
-  * @retval None
-  */
-#define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \
-                                   ((__BIT__) == SPI_FIRSTBIT_LSB))
-
-/** @brief  Checks if SPI TI mode parameter is in allowed range.
-  * @param  __MODE__: specifies the SPI TI mode.
-  *         This parameter can be a value of @ref SPI_TI_mode
-  * @retval None
-  */
-#define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \
-                                 ((__MODE__) == SPI_TIMODE_ENABLE))
-/** @brief  Checks if SPI CRC calculation enabled state is in allowed range.
-  * @param  __CALCULATION__: specifies the SPI CRC calculation enable state.
-  *         This parameter can be a value of @ref SPI_CRC_Calculation
-  * @retval None
-  */
-#define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \
-                                                 ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE))
-
-/** @brief  Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range.
-  * @param  __POLYNOMIAL__: specifies the SPI polynomial value to be used for the CRC calculation.
-  *         This parameter must be a number between Min_Data = 0 and Max_Data = 65535 
-  * @retval None
-  */
-#define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && ((__POLYNOMIAL__) <= 0xFFFFU))
-/** @brief  Sets the SPI transmit-only mode.
-  * @param  __HANDLE__: specifies the SPI Handle.
-  *         This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral.
-  * @retval None
-  */
-#define SPI_1LINE_TX(__HANDLE__)  SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
-
-/** @brief  Sets the SPI receive-only mode.
-  * @param  __HANDLE__: specifies the SPI Handle.
-  *         This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral.
-  * @retval None
-  */               
-#define SPI_1LINE_RX(__HANDLE__)  CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 
-
-/** @brief  Resets the CRC calculation of the SPI.
-  * @param  __HANDLE__: specifies the SPI Handle.
-  *         This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral.
-  * @retval None
-  */
-#define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\
-                                             SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0)
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup SPI_Exported_Functions SPI Exported Functions
-  * @{
-  */
-
-/* Initialization/de-initialization functions  **********************************/
-/** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
-  * @{
-  */
-HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
-HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
-void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
-void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
-/**
-  * @}
-  */
-
-/* I/O operation functions  *****************************************************/
-/** @defgroup SPI_Exported_Functions_Group2 IO operation functions
-  * @{
-  */
-HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
-HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
-HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
-HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
-HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
-
-void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
-void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
-void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
-void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
-void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
-void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
-void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
-void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
-/**
-  * @}
-  */
-
-
-/* Peripheral State and Control functions  **************************************/
-/** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
-  * @{
-  */
-HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
-uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Private group definition ------------------------------------------------------*/
-/** @defgroup SPI_Private_Macros SPI Private Macros
-  * @{
-  */
-/**
-  * @}
-  */
-
-/* Define the private group ***********************************/
-/**************************************************************/
-/** @defgroup SPI_Private SPI Private
-  * @{
-  */
-/**
-  * @}
-  */
-/**************************************************************/
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */
-  
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_SPI_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h
deleted file mode 100755
index 6f0a885f..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h
+++ /dev/null
@@ -1,1499 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_tim.h
-  * @author  MCD Application Team
-  * @brief   Header file of TIM HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_TIM_H
-#define __STM32L0xx_HAL_TIM_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup TIM TIM (Timer)
-  * @{
-  */ 
-
-/* Exported types ------------------------------------------------------------*/ 
-
- /** @defgroup TIM_Exported_Types TIM Exported Types
-  * @{
-  */
-
-/** @defgroup TIM_Base_Configuration TIM base configuration structure
-  * @{
-  */
-/** 
-  * @brief  TIM Time base Configuration Structure definition  
-  */
-typedef struct
-{
-  uint32_t Prescaler;         /*!< Specifies the prescaler value used to divide the TIM clock.
-                                   This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
-
-  uint32_t CounterMode;       /*!< Specifies the counter mode.
-                                   This parameter can be a value of @ref TIM_Counter_Mode */
-
-  uint32_t Period;            /*!< Specifies the period value to be loaded into the active
-                                   Auto-Reload Register at the next update event.
-                                   This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.  */ 
-
-  uint32_t ClockDivision;     /*!< Specifies the clock division.
-                                   This parameter can be a value of @ref TIM_ClockDivision */
-} TIM_Base_InitTypeDef;
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Output_Configuration TIM output compare configuration structure
-  * @{
-  */
-
-/**
-  * @brief  TIM Output Compare Configuration Structure definition  
-  */
-
-typedef struct
-{                                 
-  uint32_t OCMode;        /*!< Specifies the TIM mode.
-                               This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
-
-  uint32_t Pulse;         /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 
-                               This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */                          
-
-  uint32_t OCPolarity;    /*!< Specifies the output polarity.
-                               This parameter can be a value of @ref TIM_Output_Compare_Polarity */
-  
-  uint32_t OCFastMode;   /*!< Specifies the Fast mode state.
-                               This parameter can be a value of @ref TIM_Output_Fast_State
-                               @note This parameter is valid only in PWM1 and PWM2 mode. */
-
-} TIM_OC_InitTypeDef;  
-/**
-  * @}
-  */
-
-/** @defgroup TIM_OnePulse_Configuration TIM One Pulse configuration structure
-  * @{
-  */
-/** 
-  * @brief  TIM One Pulse Mode Configuration Structure definition  
-  */
-typedef struct
-{                               
-  uint32_t OCMode;        /*!< Specifies the TIM mode.
-                               This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
-
-  uint32_t Pulse;         /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 
-                               This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */                          
-
-  uint32_t OCPolarity;    /*!< Specifies the output polarity.
-                               This parameter can be a value of @ref TIM_Output_Compare_Polarity */
-
-
-  uint32_t ICPolarity;    /*!< Specifies the active edge of the input signal.
-                               This parameter can be a value of @ref TIM_Input_Capture_Polarity */
-
-  uint32_t ICSelection;   /*!< Specifies the input.
-                              This parameter can be a value of @ref TIM_Input_Capture_Selection */
-
-  uint32_t ICFilter;      /*!< Specifies the input capture filter.
-                              This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */  
-} TIM_OnePulse_InitTypeDef;  
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Input_Capture TIM input capture configuration structure
-  * @{
-  */
-/** 
-  * @brief  TIM Input Capture Configuration Structure definition  
-  */
-
-typedef struct
-{                                  
-  uint32_t  ICPolarity;   /*!< Specifies the active edge of the input signal.
-                               This parameter can be a value of @ref TIM_Input_Capture_Polarity */
-
-  uint32_t ICSelection;  /*!< Specifies the input.
-                              This parameter can be a value of @ref TIM_Input_Capture_Selection */
-
-  uint32_t ICPrescaler;  /*!< Specifies the Input Capture Prescaler.
-                              This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
-
-  uint32_t ICFilter;     /*!< Specifies the input capture filter.
-                              This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
-} TIM_IC_InitTypeDef;
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Encoder TIM encoder configuration structure
-  * @{
-  */
-/** 
-  * @brief  TIM Encoder Configuration Structure definition  
-  */
-
-typedef struct
-{
-  uint32_t EncoderMode;   /*!< Specifies the active edge of the input signal.
-                               This parameter can be a value of @ref TIM_Encoder_Mode */
-                                  
-  uint32_t IC1Polarity;   /*!< Specifies the active edge of the input signal.
-                               This parameter can be a value of @ref TIM_Input_Capture_Polarity */
-
-  uint32_t IC1Selection;  /*!< Specifies the input.
-                               This parameter can be a value of @ref TIM_Input_Capture_Selection */
-
-  uint32_t IC1Prescaler;  /*!< Specifies the Input Capture Prescaler.
-                               This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
-
-  uint32_t IC1Filter;     /*!< Specifies the input capture filter.
-                               This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
-                                  
-  uint32_t IC2Polarity;   /*!< Specifies the active edge of the input signal.
-                               This parameter can be a value of @ref TIM_Input_Capture_Polarity */
-
-  uint32_t IC2Selection;  /*!< Specifies the input.
-                              This parameter can be a value of @ref TIM_Input_Capture_Selection */
-
-  uint32_t IC2Prescaler;  /*!< Specifies the Input Capture Prescaler.
-                               This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
-
-  uint32_t IC2Filter;     /*!< Specifies the input capture filter.
-                               This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */                                 
-} TIM_Encoder_InitTypeDef;
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Clock_Configuration TIM clock configuration structure
-  * @{
-  */
-/** 
-  * @brief  Clock Configuration Handle Structure definition  
-  */ 
-typedef struct
-{
-  uint32_t ClockSource;     /*!< TIM clock sources. 
-                                 This parameter can be a value of @ref TIM_Clock_Source */ 
-  uint32_t ClockPolarity;   /*!< TIM clock polarity. 
-                                 This parameter can be a value of @ref TIM_Clock_Polarity */
-  uint32_t ClockPrescaler;  /*!< TIM clock prescaler. 
-                                 This parameter can be a value of @ref TIM_Clock_Prescaler */
-  uint32_t ClockFilter;    /*!< TIM clock filter. 
-                                This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
-}TIM_ClockConfigTypeDef;
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Clear_Input_Configuration TIM clear input configuration structure
-  * @{
-  */
-/** 
-  * @brief  Clear Input Configuration Handle Structure definition  
-  */ 
-typedef struct
-{ 
-  uint32_t ClearInputState;      /*!< TIM clear Input state. 
-                                      This parameter can be ENABLE or DISABLE */  
-  uint32_t ClearInputSource;     /*!< TIM clear Input sources. 
-                                      This parameter can be a value of @ref TIM_ClearInput_Source */ 
-  uint32_t ClearInputPolarity;   /*!< TIM Clear Input polarity. 
-                                      This parameter can be a value of @ref TIM_ClearInput_Polarity */
-  uint32_t ClearInputPrescaler;  /*!< TIM Clear Input prescaler. 
-                                      This parameter can be a value of @ref TIM_ClearInput_Prescaler */
-  uint32_t ClearInputFilter;    /*!< TIM Clear Input filter. 
-                                     This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
-}TIM_ClearInputConfigTypeDef;
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Slave_Configuratio TIM slave configuration structure
-  * @{
-  */
-/** 
-  * @brief  TIM Slave configuration Structure definition  
-  */ 
-typedef struct {
-  uint32_t  SlaveMode;         /*!< Slave mode selection. 
-                                  This parameter can be a value of @ref TIM_Slave_Mode */ 
-  uint32_t  InputTrigger;      /*!< Input Trigger source. 
-                                  This parameter can be a value of @ref TIM_Trigger_Selection */
-  uint32_t  TriggerPolarity;   /*!< Input Trigger polarity. 
-                                  This parameter can be a value of @ref TIM_Trigger_Polarity */
-  uint32_t  TriggerPrescaler;  /*!< Input trigger prescaler. 
-                                  This parameter can be a value of @ref TIM_Trigger_Prescaler */
-  uint32_t  TriggerFilter;     /*!< Input trigger filter. 
-                                  This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
-
-}TIM_SlaveConfigTypeDef;
-/**
-  * @}
-  */
-
-/** @defgroup TIM_State_Definition  TIM state definition
-  * @{
-  */
-/** 
-  * @brief  HAL State structures definition  
-  */ 
-typedef enum
-{
-  HAL_TIM_STATE_RESET             = 0x00U,    /*!< Peripheral not yet initialized or disabled  */
-  HAL_TIM_STATE_READY             = 0x01U,    /*!< Peripheral Initialized and ready for use    */
-  HAL_TIM_STATE_BUSY              = 0x02U,    /*!< An internal process is ongoing              */    
-  HAL_TIM_STATE_TIMEOUT           = 0x03U,    /*!< Timeout state                               */  
-  HAL_TIM_STATE_ERROR             = 0x04U     /*!< Reception process is ongoing                */                                                                             
-}HAL_TIM_StateTypeDef;
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Active_Channel  TIM active channel definition
-  * @{
-  */
-/** 
-  * @brief  HAL Active channel structures definition  
-  */ 
-typedef enum
-{
-  HAL_TIM_ACTIVE_CHANNEL_1        = 0x01U,    /*!< The active channel is 1     */
-  HAL_TIM_ACTIVE_CHANNEL_2        = 0x02U,    /*!< The active channel is 2     */
-  HAL_TIM_ACTIVE_CHANNEL_3        = 0x04U,    /*!< The active channel is 3     */   
-  HAL_TIM_ACTIVE_CHANNEL_4        = 0x08U,    /*!< The active channel is 4     */
-  HAL_TIM_ACTIVE_CHANNEL_CLEARED  = 0x00U     /*!< All active channels cleared */    
-}HAL_TIM_ActiveChannel;
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Handle  TIM handler
-  * @{
-  */
-/** 
-  * @brief  TIM Time Base Handle Structure definition  
-  */ 
-typedef struct
-{
-  TIM_TypeDef              *Instance;     /*!< Register base address             */ 
-  TIM_Base_InitTypeDef     Init;          /*!< TIM Time Base required parameters */
-  HAL_TIM_ActiveChannel    Channel;       /*!< Active channel                    */ 
-  DMA_HandleTypeDef        *hdma[7];      /*!< DMA Handlers array
-                                             This array is accessed by a @ref DMA_Handle_index */
-  HAL_LockTypeDef          Lock;          /*!< Locking object                    */
-__IO HAL_TIM_StateTypeDef  State;         /*!< TIM operation state               */  
-}TIM_HandleTypeDef;
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup TIM_Exported_Constants TIM Exported Constants
-  * @{
-  */
-
-
-#define IS_TIM_PERIOD(__PERIOD__)      ((__PERIOD__) <= 0xFFFFU)
-
-#define IS_TIM_PRESCALER(__PRESCALER__)      ((__PRESCALER__) <= 0xFFFFU)
-
-
-/** @defgroup TIM_Input_Channel_Polarity Input channel polarity
-  * @{
-  */
-#define  TIM_INPUTCHANNELPOLARITY_RISING      ((uint32_t)0x00000000U)            /*!< Polarity for TIx source */
-#define  TIM_INPUTCHANNELPOLARITY_FALLING     (TIM_CCER_CC1P)                   /*!< Polarity for TIx source */
-#define  TIM_INPUTCHANNELPOLARITY_BOTHEDGE    (TIM_CCER_CC1P | TIM_CCER_CC1NP)  /*!< Polarity for TIx source */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_ETR_Polarity ETR polarity
-  * @{
-  */
-#define TIM_ETRPOLARITY_INVERTED              (TIM_SMCR_ETP)                    /*!< Polarity for ETR source */ 
-#define TIM_ETRPOLARITY_NONINVERTED           ((uint32_t)0x0000U)                /*!< Polarity for ETR source */ 
-/**
-  * @}
-  */
-
-/** @defgroup TIM_ETR_Prescaler ETR prescaler
-  * @{
-  */                
-#define TIM_ETRPRESCALER_DIV1                 ((uint32_t)0x0000U)                /*!< No prescaler is used */
-#define TIM_ETRPRESCALER_DIV2                 (TIM_SMCR_ETPS_0)                 /*!< ETR input source is divided by 2 */
-#define TIM_ETRPRESCALER_DIV4                 (TIM_SMCR_ETPS_1)                 /*!< ETR input source is divided by 4 */
-#define TIM_ETRPRESCALER_DIV8                 (TIM_SMCR_ETPS)                   /*!< ETR input source is divided by 8 */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Counter_Mode Counter mode
-  * @{
-  */
-#define TIM_COUNTERMODE_UP                 ((uint32_t)0x0000U)
-#define TIM_COUNTERMODE_DOWN               TIM_CR1_DIR
-#define TIM_COUNTERMODE_CENTERALIGNED1     TIM_CR1_CMS_0
-#define TIM_COUNTERMODE_CENTERALIGNED2     TIM_CR1_CMS_1
-#define TIM_COUNTERMODE_CENTERALIGNED3     TIM_CR1_CMS
-/**
-  * @}
-  */
-#define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP)              || \
-                                       ((__MODE__) == TIM_COUNTERMODE_DOWN)            || \
-                                       ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1)  || \
-                                       ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2)  || \
-                                       ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
-
-
-
-  
-/** @defgroup TIM_ClockDivision Clock division
-  * @{
-  */
-#define TIM_CLOCKDIVISION_DIV1                       ((uint32_t)0x0000U)
-#define TIM_CLOCKDIVISION_DIV2                       (TIM_CR1_CKD_0)
-#define TIM_CLOCKDIVISION_DIV4                       (TIM_CR1_CKD_1)
-/**
-  * @}
-  */
-#define IS_TIM_CLOCKDIVISION_DIV(__DIV__) (((__DIV__) == TIM_CLOCKDIVISION_DIV1) || \
-                                           ((__DIV__) == TIM_CLOCKDIVISION_DIV2) || \
-                                           ((__DIV__) == TIM_CLOCKDIVISION_DIV4))
-
-
-/** @defgroup TIM_Output_Compare_and_PWM_modes Output compare and PWM modes
-  * @{
-  */
-#define TIM_OCMODE_TIMING                   ((uint32_t)0x0000U)
-#define TIM_OCMODE_ACTIVE                   (TIM_CCMR1_OC1M_0)
-#define TIM_OCMODE_INACTIVE                 (TIM_CCMR1_OC1M_1)
-#define TIM_OCMODE_TOGGLE                   (TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_1)
-#define TIM_OCMODE_PWM1                     (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2)
-#define TIM_OCMODE_PWM2                     (TIM_CCMR1_OC1M)
-#define TIM_OCMODE_FORCED_ACTIVE            (TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2)
-#define TIM_OCMODE_FORCED_INACTIVE          (TIM_CCMR1_OC1M_2)
-/**
-  * @}
-  */
-
-#define IS_TIM_PWM_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_PWM1) || \
-                                   ((__MODE__) == TIM_OCMODE_PWM2))
-                              
-#define IS_TIM_OC_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_TIMING)           || \
-                                  ((__MODE__) == TIM_OCMODE_ACTIVE)           || \
-                                  ((__MODE__) == TIM_OCMODE_INACTIVE)         || \
-                                  ((__MODE__) == TIM_OCMODE_TOGGLE)           || \
-                                  ((__MODE__) == TIM_OCMODE_FORCED_ACTIVE)    || \
-                                  ((__MODE__) == TIM_OCMODE_FORCED_INACTIVE))
-
-
-/** @defgroup TIM_Output_Compare_State Output compare state
-  * @{
-  */
-#define TIM_OUTPUTSTATE_DISABLE            ((uint32_t)0x0000U)
-#define TIM_OUTPUTSTATE_ENABLE             (TIM_CCER_CC1E)
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Output_Fast_State Output fast state
-  * @{
-  */
-#define TIM_OCFAST_DISABLE                ((uint32_t)0x0000U)
-#define TIM_OCFAST_ENABLE                 (TIM_CCMR1_OC1FE)
-/**
-  * @}
-  */ 
-#define IS_TIM_FAST_STATE(__STATE__) (((__STATE__) == TIM_OCFAST_DISABLE) || \
-                                      ((__STATE__) == TIM_OCFAST_ENABLE))
-
-/** @defgroup TIM_Output_Compare_N_State Output compare N state
-  * @{
-  */
-#define TIM_OUTPUTNSTATE_DISABLE            ((uint32_t)0x0000U)
-#define TIM_OUTPUTNSTATE_ENABLE             (TIM_CCER_CC1NE)
-/**
-  * @}
-  */
-  
-/** @defgroup TIM_Output_Compare_Polarity Output compare polarity
-  * @{
-  */
-#define TIM_OCPOLARITY_HIGH                ((uint32_t)0x0000U)
-#define TIM_OCPOLARITY_LOW                 (TIM_CCER_CC1P)
-/**
-  * @}
-  */
-#define IS_TIM_OC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_OCPOLARITY_HIGH) || \
-                                          ((__POLARITY__) == TIM_OCPOLARITY_LOW))
-
-/** @defgroup TIM_Channel TIM channels
-  * @{
-  */
-#define TIM_CHANNEL_1                      ((uint32_t)0x0000U)
-#define TIM_CHANNEL_2                      ((uint32_t)0x0004U)
-#define TIM_CHANNEL_3                      ((uint32_t)0x0008U)
-#define TIM_CHANNEL_4                      ((uint32_t)0x000CU)
-#define TIM_CHANNEL_ALL                    ((uint32_t)0x0018U)
-/**
-  * @}
-  */
-
-#define IS_TIM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
-                                      ((__CHANNEL__) == TIM_CHANNEL_2) || \
-                                      ((__CHANNEL__) == TIM_CHANNEL_3) || \
-                                      ((__CHANNEL__) == TIM_CHANNEL_4) || \
-                                      ((__CHANNEL__) == TIM_CHANNEL_ALL))
-
-#define IS_TIM_OPM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
-                                          ((__CHANNEL__) == TIM_CHANNEL_2))
-
-
-/** @defgroup TIM_Input_Capture_Polarity Input capture polarity
-  * @{
-  */
-#define  TIM_ICPOLARITY_RISING             TIM_INPUTCHANNELPOLARITY_RISING
-#define  TIM_ICPOLARITY_FALLING            TIM_INPUTCHANNELPOLARITY_FALLING
-#define  TIM_ICPOLARITY_BOTHEDGE           TIM_INPUTCHANNELPOLARITY_BOTHEDGE
-/**
-  * @}
-  */
-#define IS_TIM_IC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_ICPOLARITY_RISING)   || \
-                                          ((__POLARITY__) == TIM_ICPOLARITY_FALLING)  || \
-                                          ((__POLARITY__) == TIM_ICPOLARITY_BOTHEDGE))
-
-
-/** @defgroup TIM_Input_Capture_Selection Input capture selection
-  * @{
-  */
-#define TIM_ICSELECTION_DIRECTTI           (TIM_CCMR1_CC1S_0)   /*!< TIM Input 1, 2, 3 or 4 is selected to be 
-                                                                     connected to IC1, IC2, IC3 or IC4, respectively */
-#define TIM_ICSELECTION_INDIRECTTI         (TIM_CCMR1_CC1S_1)   /*!< TIM Input 1, 2, 3 or 4 is selected to be
-                                                                     connected to IC2, IC1, IC4 or IC3, respectively */
-#define TIM_ICSELECTION_TRC                (TIM_CCMR1_CC1S)     /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC */
-
-#define IS_TIM_IC_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_ICSELECTION_DIRECTTI) || \
-                                            ((__SELECTION__) == TIM_ICSELECTION_INDIRECTTI) || \
-                                            ((__SELECTION__) == TIM_ICSELECTION_TRC))
-/**
-  * @}
-  */ 
-
-/** @defgroup TIM_Input_Capture_Prescaler Input capture prescaler
-  * @{
-  */
-#define TIM_ICPSC_DIV1                     ((uint32_t)0x0000U)       /*!< Capture performed each time an edge is detected on the capture input */
-#define TIM_ICPSC_DIV2                     (TIM_CCMR1_IC1PSC_0)     /*!< Capture performed once every 2 events */
-#define TIM_ICPSC_DIV4                     (TIM_CCMR1_IC1PSC_1)     /*!< Capture performed once every 4 events */
-#define TIM_ICPSC_DIV8                     (TIM_CCMR1_IC1PSC)       /*!< Capture performed once every 8 events */
-/**
-  * @}
-  */
-#define IS_TIM_IC_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_ICPSC_DIV1) || \
-                                            ((__PRESCALER__) == TIM_ICPSC_DIV2) || \
-                                            ((__PRESCALER__) == TIM_ICPSC_DIV4) || \
-                                            ((__PRESCALER__) == TIM_ICPSC_DIV8))
-
-/** @defgroup TIM_One_Pulse_Mode One pulse mode
-  * @{
-  */
-#define TIM_OPMODE_SINGLE                  (TIM_CR1_OPM)
-#define TIM_OPMODE_REPETITIVE              ((uint32_t)0x0000U)
-/**
-  * @}
-  */ 
-#define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) || \
-                                   ((__MODE__) == TIM_OPMODE_REPETITIVE))
-
-/** @defgroup TIM_Encoder_Mode Encoder_Mode
-  * @{
-  */ 
-#define TIM_ENCODERMODE_TI1                (TIM_SMCR_SMS_0)
-#define TIM_ENCODERMODE_TI2                (TIM_SMCR_SMS_1)
-#define TIM_ENCODERMODE_TI12               (TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0)
-/**
-  * @}
-  */
-#define IS_TIM_ENCODER_MODE(__MODE__) (((__MODE__) == TIM_ENCODERMODE_TI1) || \
-                                       ((__MODE__) == TIM_ENCODERMODE_TI2) || \
-                                       ((__MODE__) == TIM_ENCODERMODE_TI12))
-
-/** @defgroup TIM_Interrupt_definition Interrupt definition
-  * @{
-  */ 
-#define TIM_IT_UPDATE           (TIM_DIER_UIE)
-#define TIM_IT_CC1              (TIM_DIER_CC1IE)
-#define TIM_IT_CC2              (TIM_DIER_CC2IE)
-#define TIM_IT_CC3              (TIM_DIER_CC3IE)
-#define TIM_IT_CC4              (TIM_DIER_CC4IE)
-#define TIM_IT_TRIGGER          (TIM_DIER_TIE)
-/**
-  * @}
-  */
-
-/** @defgroup TIM_DMA_sources DMA sources
-  * @{
-  */
-#define TIM_DMA_UPDATE                     (TIM_DIER_UDE)
-#define TIM_DMA_CC1                        (TIM_DIER_CC1DE)
-#define TIM_DMA_CC2                        (TIM_DIER_CC2DE)
-#define TIM_DMA_CC3                        (TIM_DIER_CC3DE)
-#define TIM_DMA_CC4                        (TIM_DIER_CC4DE)
-#define TIM_DMA_TRIGGER                    (TIM_DIER_TDE)
-/**
-  * @}
-  */
-#define IS_TIM_DMA_SOURCE(__SOURCE__) ((((__SOURCE__) & 0xFFFFA0FFU) == 0x00000000U) && ((__SOURCE__) != 0x00000000U))
-
-
-    
-/** @defgroup TIM_Event_Source Event sources
-  * @{
-  */
-#define TIM_EVENTSOURCE_UPDATE            TIM_EGR_UG  
-#define TIM_EVENTSOURCE_CC1                 TIM_EGR_CC1G
-#define TIM_EVENTSOURCE_CC2                 TIM_EGR_CC2G
-#define TIM_EVENTSOURCE_CC3               TIM_EGR_CC3G
-#define TIM_EVENTSOURCE_CC4                 TIM_EGR_CC4G
-#define TIM_EVENTSOURCE_TRIGGER               TIM_EGR_TG    
-/**
-  * @}
-  */
-#define IS_TIM_EVENT_SOURCE(__SOURCE__) ((((__SOURCE__) & 0xFFFFFFA0U) == 0x00000000U) && ((__SOURCE__) != 0x00000000U))
-  
-
-/** @defgroup TIM_Flag_definition Flag definition
-  * @{
-  */                                
-#define TIM_FLAG_UPDATE                    (TIM_SR_UIF)
-#define TIM_FLAG_CC1                       (TIM_SR_CC1IF)
-#define TIM_FLAG_CC2                       (TIM_SR_CC2IF)
-#define TIM_FLAG_CC3                       (TIM_SR_CC3IF)
-#define TIM_FLAG_CC4                       (TIM_SR_CC4IF)
-#define TIM_FLAG_TRIGGER                   (TIM_SR_TIF)
-#define TIM_FLAG_CC1OF                     (TIM_SR_CC1OF)
-#define TIM_FLAG_CC2OF                     (TIM_SR_CC2OF)
-#define TIM_FLAG_CC3OF                     (TIM_SR_CC3OF)
-#define TIM_FLAG_CC4OF                     (TIM_SR_CC4OF)
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Clock_Source Clock source
-  * @{
-  */ 
-#define  TIM_CLOCKSOURCE_ETRMODE2    (TIM_SMCR_ETPS_1)
-#define  TIM_CLOCKSOURCE_INTERNAL    (TIM_SMCR_ETPS_0)
-#define  TIM_CLOCKSOURCE_ITR0        ((uint32_t)0x0000U)
-#define  TIM_CLOCKSOURCE_ITR1        (TIM_SMCR_TS_0)
-#define  TIM_CLOCKSOURCE_ITR2        (TIM_SMCR_TS_1)
-#define  TIM_CLOCKSOURCE_ITR3        (TIM_SMCR_TS_0 | TIM_SMCR_TS_1)
-#define  TIM_CLOCKSOURCE_TI1ED       (TIM_SMCR_TS_2)
-#define  TIM_CLOCKSOURCE_TI1         (TIM_SMCR_TS_0 | TIM_SMCR_TS_2)
-#define  TIM_CLOCKSOURCE_TI2         (TIM_SMCR_TS_1 | TIM_SMCR_TS_2)
-#define  TIM_CLOCKSOURCE_ETRMODE1    (TIM_SMCR_TS)
-/**
-  * @}
-  */
-
-#define IS_TIM_CLOCKSOURCE(__CLOCK__) (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
-                                       ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
-                                       ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0)     || \
-                                       ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1)     || \
-                                       ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2)     || \
-                                       ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3)     || \
-                                       ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED)    || \
-                                       ((__CLOCK__) == TIM_CLOCKSOURCE_TI1)      || \
-                                       ((__CLOCK__) == TIM_CLOCKSOURCE_TI2)      || \
-                                       ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1))
-
-
-/** @defgroup TIM_Clock_Polarity Clock polarity
-  * @{
-  */
-#define TIM_CLOCKPOLARITY_INVERTED           TIM_ETRPOLARITY_INVERTED          /*!< Polarity for ETRx clock sources */ 
-#define TIM_CLOCKPOLARITY_NONINVERTED        TIM_ETRPOLARITY_NONINVERTED       /*!< Polarity for ETRx clock sources */ 
-#define TIM_CLOCKPOLARITY_RISING             TIM_INPUTCHANNELPOLARITY_RISING   /*!< Polarity for TIx clock sources */ 
-#define TIM_CLOCKPOLARITY_FALLING            TIM_INPUTCHANNELPOLARITY_FALLING   /*!< Polarity for TIx clock sources */ 
-#define TIM_CLOCKPOLARITY_BOTHEDGE           TIM_INPUTCHANNELPOLARITY_BOTHEDGE  /*!< Polarity for TIx clock sources */ 
-/**
-  * @}
-  */
-#define IS_TIM_CLOCKPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLOCKPOLARITY_INVERTED)    || \
-                                            ((__POLARITY__) == TIM_CLOCKPOLARITY_NONINVERTED) || \
-                                            ((__POLARITY__) == TIM_CLOCKPOLARITY_RISING)      || \
-                                            ((__POLARITY__) == TIM_CLOCKPOLARITY_FALLING)     || \
-                                            ((__POLARITY__) == TIM_CLOCKPOLARITY_BOTHEDGE))
-
-/** @defgroup TIM_Clock_Prescaler Clock prescaler
-  * @{
-  */                
-#define TIM_CLOCKPRESCALER_DIV1                 TIM_ETRPRESCALER_DIV1     /*!< No prescaler is used */
-#define TIM_CLOCKPRESCALER_DIV2                 TIM_ETRPRESCALER_DIV2     /*!< Prescaler for External ETR Clock: Capture performed once every 2 events. */
-#define TIM_CLOCKPRESCALER_DIV4                 TIM_ETRPRESCALER_DIV4     /*!< Prescaler for External ETR Clock: Capture performed once every 4 events. */
-#define TIM_CLOCKPRESCALER_DIV8                 TIM_ETRPRESCALER_DIV8     /*!< Prescaler for External ETR Clock: Capture performed once every 8 events. */
-/**
-  * @}
-  */
-#define IS_TIM_CLOCKPRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV1) || \
-                                              ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV2) || \
-                                              ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV4) || \
-                                              ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV8))
-
-  
-/* Check clock filter */
-#define IS_TIM_CLOCKFILTER(__ICFILTER__)      ((__ICFILTER__) <= 0xFU)
-
-/** @defgroup TIM_ClearInput_Source Clear input source
-  * @{
-  */
-#define TIM_CLEARINPUTSOURCE_ETR           ((uint32_t)0x0001U) 
-#define TIM_CLEARINPUTSOURCE_NONE          ((uint32_t)0x0000U)
-/**
-  * @}
-  */
-
-#define IS_TIM_CLEARINPUT_SOURCE(__SOURCE__)  (((__SOURCE__) == TIM_CLEARINPUTSOURCE_NONE) || \
-                                               ((__SOURCE__) == TIM_CLEARINPUTSOURCE_ETR))
-
-
-/** @defgroup TIM_ClearInput_Polarity Clear input polarity
-  * @{
-  */
-#define TIM_CLEARINPUTPOLARITY_INVERTED           TIM_ETRPOLARITY_INVERTED                    /*!< Polarity for ETRx pin */ 
-#define TIM_CLEARINPUTPOLARITY_NONINVERTED        TIM_ETRPOLARITY_NONINVERTED                 /*!< Polarity for ETRx pin */ 
-/**
-  * @}
-  */ 
-#define IS_TIM_CLEARINPUT_POLARITY(__POLARITY__)   (((__POLARITY__) == TIM_CLEARINPUTPOLARITY_INVERTED) || \
-                                                    ((__POLARITY__) == TIM_CLEARINPUTPOLARITY_NONINVERTED))
-
-
-/** @defgroup TIM_ClearInput_Prescaler Clear input prescaler
-  * @{
-  */
-#define TIM_CLEARINPUTPRESCALER_DIV1                    TIM_ETRPRESCALER_DIV1      /*!< No prescaler is used */
-#define TIM_CLEARINPUTPRESCALER_DIV2                    TIM_ETRPRESCALER_DIV2      /*!< Prescaler for External ETR pin: Capture performed once every 2 events. */
-#define TIM_CLEARINPUTPRESCALER_DIV4                    TIM_ETRPRESCALER_DIV4      /*!< Prescaler for External ETR pin: Capture performed once every 4 events. */
-#define TIM_CLEARINPUTPRESCALER_DIV8                    TIM_ETRPRESCALER_DIV8        /*!< Prescaler for External ETR pin: Capture performed once every 8 events. */
-/**
-  * @}
-  */
-#define IS_TIM_CLEARINPUT_PRESCALER(__PRESCALER__)   (((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV1) || \
-                                                      ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV2) || \
-                                                      ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV4) || \
-                                                      ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV8))
-
-  
-/* Check IC filter */
-#define IS_TIM_CLEARINPUT_FILTER(ICFILTER) ((ICFILTER) <= 0xFU) 
-
-  
-/** @defgroup TIM_Master_Mode_Selection TIM Master Mode Selection
-  * @{
-  */  
-#define  TIM_TRGO_RESET            ((uint32_t)0x0000U)
-#define  TIM_TRGO_ENABLE           (TIM_CR2_MMS_0)
-#define  TIM_TRGO_UPDATE           (TIM_CR2_MMS_1)
-#define  TIM_TRGO_OC1              ((TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
-#define  TIM_TRGO_OC1REF           (TIM_CR2_MMS_2)
-#define  TIM_TRGO_OC2REF           ((TIM_CR2_MMS_2 | TIM_CR2_MMS_0))
-#define  TIM_TRGO_OC3REF           ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1))
-#define  TIM_TRGO_OC4REF           ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
-/**
-  * @}
-  */
-#define IS_TIM_TRGO_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO_RESET) || \
-                                        ((__SOURCE__) == TIM_TRGO_ENABLE) || \
-                                        ((__SOURCE__) == TIM_TRGO_UPDATE) || \
-                                        ((__SOURCE__) == TIM_TRGO_OC1) || \
-                                        ((__SOURCE__) == TIM_TRGO_OC1REF) || \
-                                        ((__SOURCE__) == TIM_TRGO_OC2REF) || \
-                                        ((__SOURCE__) == TIM_TRGO_OC3REF) || \
-                                        ((__SOURCE__) == TIM_TRGO_OC4REF))
-      
-   
-
-/** @defgroup TIM_Slave_Mode Slave mode
-  * @{
-  */
-#define TIM_SLAVEMODE_DISABLE              ((uint32_t)0x0000U)
-#define TIM_SLAVEMODE_RESET                ((uint32_t)0x0004U)
-#define TIM_SLAVEMODE_GATED                ((uint32_t)0x0005U)
-#define TIM_SLAVEMODE_TRIGGER              ((uint32_t)0x0006U)
-#define TIM_SLAVEMODE_EXTERNAL1            ((uint32_t)0x0007U)
-/**
-  * @}
-  */
-#define IS_TIM_SLAVE_MODE(__MODE__) (((__MODE__) == TIM_SLAVEMODE_DISABLE) || \
-                                     ((__MODE__) == TIM_SLAVEMODE_GATED) || \
-                                     ((__MODE__) == TIM_SLAVEMODE_RESET) || \
-                                     ((__MODE__) == TIM_SLAVEMODE_TRIGGER) || \
-                                     ((__MODE__) == TIM_SLAVEMODE_EXTERNAL1))
-
-/** @defgroup TIM_Master_Slave_Mode Master slave mode
-  * @{
-  */
-
-#define TIM_MASTERSLAVEMODE_ENABLE          ((uint32_t)0x0080U)
-#define TIM_MASTERSLAVEMODE_DISABLE         ((uint32_t)0x0000U)
-/**
-  * @}
-  */
-#define IS_TIM_MSM_STATE(__STATE__) (((__STATE__) == TIM_MASTERSLAVEMODE_ENABLE) || \
-                                     ((__STATE__) == TIM_MASTERSLAVEMODE_DISABLE))
-
-/** @defgroup TIM_Trigger_Selection Trigger selection
-  * @{
-  */
-#define TIM_TS_ITR0                        ((uint32_t)0x0000U)
-#define TIM_TS_ITR1                        ((uint32_t)0x0010U)
-#define TIM_TS_ITR2                        ((uint32_t)0x0020U)
-#define TIM_TS_ITR3                        ((uint32_t)0x0030U)
-#define TIM_TS_TI1F_ED                     ((uint32_t)0x0040U)
-#define TIM_TS_TI1FP1                      ((uint32_t)0x0050U)
-#define TIM_TS_TI2FP2                      ((uint32_t)0x0060U)
-#define TIM_TS_ETRF                        ((uint32_t)0x0070U)
-#define TIM_TS_NONE                        ((uint32_t)0xFFFFU)
-/**
-  * @}
-  */
-#define IS_TIM_TRIGGER_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
-                                                 ((__SELECTION__) == TIM_TS_ITR1) || \
-                                                 ((__SELECTION__) == TIM_TS_ITR2) || \
-                                                 ((__SELECTION__) == TIM_TS_ITR3) || \
-                                                 ((__SELECTION__) == TIM_TS_TI1F_ED) || \
-                                                 ((__SELECTION__) == TIM_TS_TI1FP1) || \
-                                                 ((__SELECTION__) == TIM_TS_TI2FP2) || \
-                                                 ((__SELECTION__) == TIM_TS_ETRF))
-#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
-                                                               ((__SELECTION__) == TIM_TS_ITR1) || \
-                                                               ((__SELECTION__) == TIM_TS_ITR2) || \
-                                                               ((__SELECTION__) == TIM_TS_ITR3) || \
-                                                               ((__SELECTION__) == TIM_TS_NONE))
-
-
-/** @defgroup TIM_Trigger_Polarity Trigger polarity
-  * @{
-  */
-#define TIM_TRIGGERPOLARITY_INVERTED           TIM_ETRPOLARITY_INVERTED      /*!< Polarity for ETRx trigger sources */ 
-#define TIM_TRIGGERPOLARITY_NONINVERTED        TIM_ETRPOLARITY_NONINVERTED   /*!< Polarity for ETRx trigger sources */ 
-#define TIM_TRIGGERPOLARITY_RISING             TIM_INPUTCHANNELPOLARITY_RISING        /*!< Polarity for TIxFPx or TI1_ED trigger sources */ 
-#define TIM_TRIGGERPOLARITY_FALLING            TIM_INPUTCHANNELPOLARITY_FALLING       /*!< Polarity for TIxFPx or TI1_ED trigger sources */ 
-#define TIM_TRIGGERPOLARITY_BOTHEDGE           TIM_INPUTCHANNELPOLARITY_BOTHEDGE      /*!< Polarity for TIxFPx or TI1_ED trigger sources */ 
-/**
-  * @}
-  */
-#define IS_TIM_TRIGGERPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_TRIGGERPOLARITY_INVERTED   ) || \
-                                              ((__POLARITY__) == TIM_TRIGGERPOLARITY_NONINVERTED) || \
-                                              ((__POLARITY__) == TIM_TRIGGERPOLARITY_RISING     ) || \
-                                              ((__POLARITY__) == TIM_TRIGGERPOLARITY_FALLING    ) || \
-                                              ((__POLARITY__) == TIM_TRIGGERPOLARITY_BOTHEDGE   ))
-
-
-/** @defgroup TIM_Trigger_Prescaler Trigger prescaler
-  * @{
-  */                
-#define TIM_TRIGGERPRESCALER_DIV1             TIM_ETRPRESCALER_DIV1     /*!< No prescaler is used */
-#define TIM_TRIGGERPRESCALER_DIV2             TIM_ETRPRESCALER_DIV2     /*!< Prescaler for External ETR Trigger: Capture performed once every 2 events. */
-#define TIM_TRIGGERPRESCALER_DIV4             TIM_ETRPRESCALER_DIV4     /*!< Prescaler for External ETR Trigger: Capture performed once every 4 events. */
-#define TIM_TRIGGERPRESCALER_DIV8             TIM_ETRPRESCALER_DIV8     /*!< Prescaler for External ETR Trigger: Capture performed once every 8 events. */
-/**
-  * @}
-  */
-#define IS_TIM_TRIGGERPRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV1) || \
-                                                ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV2) || \
-                                                ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV4) || \
-                                                ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV8))
-
-
-/* Check trigger filter */
-#define IS_TIM_TRIGGERFILTER(__ICFILTER__)     ((__ICFILTER__) <= 0xFU)
-
-
- /** @defgroup TIM_TI1_Selection TI1 selection
-  * @{
-  */
-#define TIM_TI1SELECTION_CH1                ((uint32_t)0x0000U)
-#define TIM_TI1SELECTION_XORCOMBINATION     (TIM_CR2_TI1S)
-/**
-  * @}
-  */
-#define IS_TIM_TI1SELECTION(__TI1SELECTION__) (((__TI1SELECTION__) == TIM_TI1SELECTION_CH1) || \
-                                               ((__TI1SELECTION__) == TIM_TI1SELECTION_XORCOMBINATION))
-
-  
-/** @defgroup TIM_DMA_Base_address DMA base address
-  * @{
-  */
-#define TIM_DMABASE_CR1                    (0x00000000U)
-#define TIM_DMABASE_CR2                    (0x00000001U)
-#define TIM_DMABASE_SMCR                   (0x00000002U)
-#define TIM_DMABASE_DIER                   (0x00000003U)
-#define TIM_DMABASE_SR                     (0x00000004U)
-#define TIM_DMABASE_EGR                    (0x00000005U)
-#define TIM_DMABASE_CCMR1                  (0x00000006U)
-#define TIM_DMABASE_CCMR2                  (0x00000007U)
-#define TIM_DMABASE_CCER                   (0x00000008U)
-#define TIM_DMABASE_CNT                    (0x00000009U)
-#define TIM_DMABASE_PSC                    (0x0000000AU)
-#define TIM_DMABASE_ARR                    (0x0000000BU)
-#define TIM_DMABASE_CCR1                   (0x0000000DU)
-#define TIM_DMABASE_CCR2                   (0x0000000EU)
-#define TIM_DMABASE_CCR3                   (0x0000000FU)
-#define TIM_DMABASE_CCR4                   (0x00000010U)
-#define TIM_DMABASE_DCR                    (0x00000012U)
-#define TIM_DMABASE_OR                     (0x00000013U)
-/**
-  * @}
-  */
-#define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \
-                                   ((__BASE__) == TIM_DMABASE_CR2) || \
-                                   ((__BASE__) == TIM_DMABASE_SMCR) || \
-                                   ((__BASE__) == TIM_DMABASE_DIER) || \
-                                   ((__BASE__) == TIM_DMABASE_SR) || \
-                                   ((__BASE__) == TIM_DMABASE_EGR) || \
-                                   ((__BASE__) == TIM_DMABASE_CCMR1) || \
-                                   ((__BASE__) == TIM_DMABASE_CCMR2  ) || \
-                                   ((__BASE__) == TIM_DMABASE_CCER) || \
-                                   ((__BASE__) == TIM_DMABASE_CNT) || \
-                                   ((__BASE__) == TIM_DMABASE_PSC) || \
-                                   ((__BASE__) == TIM_DMABASE_ARR) || \
-                                   ((__BASE__) == TIM_DMABASE_CCR1) || \
-                                   ((__BASE__) == TIM_DMABASE_CCR2) || \
-                                   ((__BASE__) == TIM_DMABASE_CCR3) || \
-                                   ((__BASE__) == TIM_DMABASE_CCR4) || \
-                                   ((__BASE__) == TIM_DMABASE_DCR) || \
-                                   ((__BASE__) == TIM_DMABASE_OR))
-
-
-/** @defgroup TIM_DMA_Burst_Length DMA burst length
-  * @{
-  */
-#define TIM_DMABURSTLENGTH_1TRANSFER           (0x00000000U)
-#define TIM_DMABURSTLENGTH_2TRANSFERS          (0x00000100U)
-#define TIM_DMABURSTLENGTH_3TRANSFERS          (0x00000200U)
-#define TIM_DMABURSTLENGTH_4TRANSFERS          (0x00000300U)
-#define TIM_DMABURSTLENGTH_5TRANSFERS          (0x00000400U)
-#define TIM_DMABURSTLENGTH_6TRANSFERS          (0x00000500U)
-#define TIM_DMABURSTLENGTH_7TRANSFERS          (0x00000600U)
-#define TIM_DMABURSTLENGTH_8TRANSFERS          (0x00000700U)
-#define TIM_DMABURSTLENGTH_9TRANSFERS          (0x00000800U)
-#define TIM_DMABURSTLENGTH_10TRANSFERS         (0x00000900U)
-#define TIM_DMABURSTLENGTH_11TRANSFERS         (0x00000A00U)
-#define TIM_DMABURSTLENGTH_12TRANSFERS         (0x00000B00U)
-#define TIM_DMABURSTLENGTH_13TRANSFERS         (0x00000C00U)
-#define TIM_DMABURSTLENGTH_14TRANSFERS         (0x00000D00U)
-#define TIM_DMABURSTLENGTH_15TRANSFERS         (0x00000E00U)
-#define TIM_DMABURSTLENGTH_16TRANSFERS         (0x00000F00U)
-#define TIM_DMABURSTLENGTH_17TRANSFERS         (0x00001000U)
-#define TIM_DMABURSTLENGTH_18TRANSFERS         (0x00001100U)
-/**
-  * @}
-  */
-#define IS_TIM_DMA_LENGTH(__LENGTH__) (((__LENGTH__) == TIM_DMABURSTLENGTH_1TRANSFER  ) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_2TRANSFERS) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_3TRANSFERS) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_4TRANSFERS) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_5TRANSFERS) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_6TRANSFERS) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_7TRANSFERS) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_8TRANSFERS) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_9TRANSFERS  ) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_10TRANSFERS) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_11TRANSFERS  ) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_12TRANSFERS) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_13TRANSFERS) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_14TRANSFERS) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_15TRANSFERS) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_16TRANSFERS) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_17TRANSFERS) || \
-                                       ((__LENGTH__) == TIM_DMABURSTLENGTH_18TRANSFERS  ))
-
-
-/* Check IC filter */
-#define IS_TIM_IC_FILTER(__ICFILTER__) ((__ICFILTER__) <= 0xFU)
-
-/** @defgroup DMA_Handle_index DMA handle index
-  * @{
-  */
-#define TIM_DMA_ID_UPDATE                ((uint16_t) 0x0U)       /*!< Index of the DMA handle used for Update DMA requests */
-#define TIM_DMA_ID_CC1                   ((uint16_t) 0x1U)       /*!< Index of the DMA handle used for Capture/Compare 1 DMA requests */
-#define TIM_DMA_ID_CC2                   ((uint16_t) 0x2U)       /*!< Index of the DMA handle used for Capture/Compare 2 DMA requests */
-#define TIM_DMA_ID_CC3                   ((uint16_t) 0x3U)       /*!< Index of the DMA handle used for Capture/Compare 3 DMA requests */
-#define TIM_DMA_ID_CC4                   ((uint16_t) 0x4U)       /*!< Index of the DMA handle used for Capture/Compare 4 DMA requests */
-#define TIM_DMA_ID_TRIGGER               ((uint16_t) 0x5U)       /*!< Index of the DMA handle used for Trigger DMA requests */
-/**
-  * @}
-  */ 
-
-/** @defgroup Channel_CC_State Channel state
-  * @{
-  */
-#define TIM_CCx_ENABLE                   ((uint32_t)0x0001U)
-#define TIM_CCx_DISABLE                  ((uint32_t)0x0000U)
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */   
-  
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup TIM_Exported_Macro TIM Exported Macro
-  * @{
-  */
-
-/** @brief Reset UART handle state
-  * @param  __HANDLE__ : TIM handle
-  * @retval None
-  */
-#define __HAL_TIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TIM_STATE_RESET)
-
-/**
-  * @brief  Enable the TIM peripheral.
-  * @param  __HANDLE__ : TIM handle
-  * @retval None
- */
-#define __HAL_TIM_ENABLE(__HANDLE__)                 ((__HANDLE__)->Instance->CR1|=(TIM_CR1_CEN))
-
-/* The counter of a timer instance is disabled only if all the CCx channels have
-   been disabled */
-#define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E))
-
-/**
-  * @brief  Disable the TIM peripheral.
-  * @param  __HANDLE__ : TIM handle
-  * @retval None
-  */
-#define __HAL_TIM_DISABLE(__HANDLE__) \
-                        do { \
-                          if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0U) \
-                          { \
-                            (__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \
-                          } \
-                        } while(0) 
-
-#define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__)    ((__HANDLE__)->Instance->DIER |= (__INTERRUPT__))
-#define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__)         ((__HANDLE__)->Instance->DIER |= (__DMA__))
-#define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__))
-#define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__)        ((__HANDLE__)->Instance->DIER &= ~(__DMA__))
-#define __HAL_TIM_GET_FLAG(__HANDLE__, __FLAG__)          (((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__))
-#define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__)        ((__HANDLE__)->Instance->SR = ~(__FLAG__))
-
-#define __HAL_TIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
-#define __HAL_TIM_CLEAR_IT(__HANDLE__, __INTERRUPT__)     ((__HANDLE__)->Instance->SR = ~(__INTERRUPT__))
-
-#define __HAL_TIM_IS_TIM_COUNTING_DOWN(__HANDLE__)            (((__HANDLE__)->Instance->CR1 &(TIM_CR1_DIR)) == (TIM_CR1_DIR))
-#define __HAL_TIM_SET_PRESCALER(__HANDLE__, __PRESC__)        ((__HANDLE__)->Instance->PSC = (__PRESC__))
-
-#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \
-(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8U)) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) :\
- ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8)))
-
-#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \
-(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC1PSC) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC2PSC) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC3PSC) :\
- ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC4PSC))
-                          
-#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \
-(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER |= (__POLARITY__)) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 4U)) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 8U)) :\
- ((__HANDLE__)->Instance->CCER |= (((__POLARITY__) << 12U) & TIM_CCER_CC4P)))
-
-#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \
-(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP)) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC2P | TIM_CCER_CC2NP)) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC3P | TIM_CCER_CC3NP)) :\
- ((__HANDLE__)->Instance->CCER &= (uint16_t)~TIM_CCER_CC4P))
-
-/**
-  * @brief  Sets the TIM Capture Compare Register value on runtime without
-  *         calling another time ConfigChannel function.
-  * @param  __HANDLE__ : TIM handle.
-  * @param  __CHANNEL__ : TIM Channels to be configured.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @param  __COMPARE__: specifies the Capture Compare register new value.
-  * @retval None
-  */
-#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \
-(*(__IO uint32_t *)(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2U)) = (__COMPARE__))
-
-/**
-  * @brief  Gets the TIM Capture Compare Register value on runtime
-  * @param  __HANDLE__ : TIM handle.
-  * @param  __CHANNEL__ : TIM Channel associated with the capture compare register
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: get capture/compare 1 register value
-  *            @arg TIM_CHANNEL_2: get capture/compare 2 register value
-  *            @arg TIM_CHANNEL_3: get capture/compare 3 register value
-  *            @arg TIM_CHANNEL_4: get capture/compare 4 register value
-  * @retval None
-  */
-#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \
-  (*(__IO uint32_t *)(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2U)))
-
-/**
-  * @brief  Sets the TIM Counter Register value on runtime.
-  * @param  __HANDLE__ : TIM handle.
-  * @param  __COUNTER__: specifies the Counter register new value.
-  * @retval None
-  */
-#define __HAL_TIM_SET_COUNTER(__HANDLE__, __COUNTER__)  ((__HANDLE__)->Instance->CNT = (__COUNTER__))
-
-/**
-  * @brief  Gets the TIM Counter Register value on runtime.
-  * @param  __HANDLE__ : TIM handle.
-  * @retval None
-  */
-#define __HAL_TIM_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNT)
-
-/**
-  * @brief  Sets the TIM Autoreload Register value on runtime without calling 
-  *         another time any Init function.
-  * @param  __HANDLE__ : TIM handle.
-  * @param  __AUTORELOAD__: specifies the Counter register new value.
-  * @retval None
-  */
-#define __HAL_TIM_SET_AUTORELOAD(__HANDLE__, __AUTORELOAD__) \
-                        do{                                                    \
-                              (__HANDLE__)->Instance->ARR = (__AUTORELOAD__);  \
-                              (__HANDLE__)->Init.Period = (__AUTORELOAD__);    \
-                          } while(0)
-/**
-  * @brief  Gets the TIM Autoreload Register value on runtime
-  * @param  __HANDLE__ : TIM handle.
-  * @retval None
-  */
-#define __HAL_TIM_GET_AUTORELOAD(__HANDLE__) ((__HANDLE__)->Instance->ARR)
-
-/**
-  * @brief  Sets the TIM Clock Division value on runtime without calling 
-  *         another time any Init function. 
-  * @param  __HANDLE__ : TIM handle.
-  * @param  __CKD__: specifies the clock division value.
-  *          This parameter can be one of the following value:
-  *            @arg TIM_CLOCKDIVISION_DIV1
-  *            @arg TIM_CLOCKDIVISION_DIV2
-  *            @arg TIM_CLOCKDIVISION_DIV4
-  * @retval None
-  */
-#define __HAL_TIM_SET_CLOCKDIVISION(__HANDLE__, __CKD__) \
-                        do{                                                    \
-                              (__HANDLE__)->Instance->CR1 &= (uint16_t)(~TIM_CR1_CKD);  \
-                              (__HANDLE__)->Instance->CR1 |= (__CKD__);                   \
-                              (__HANDLE__)->Init.ClockDivision = (__CKD__);             \
-                          } while(0)
-/**
-  * @brief  Gets the TIM Clock Division value on runtime
-  * @param  __HANDLE__ : TIM handle.
-  * @retval None
-  */
-#define __HAL_TIM_GET_CLOCKDIVISION(__HANDLE__) ((__HANDLE__)->Instance->CR1 & TIM_CR1_CKD)
-
-/**
-  * @brief  Sets the TIM Input Capture prescaler on runtime without calling 
-  *         another time HAL_TIM_IC_ConfigChannel() function.
-  * @param  __HANDLE__ : TIM handle.
-  * @param  __CHANNEL__ : TIM Channels to be configured.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @param  __ICPSC__: specifies the Input Capture4 prescaler new value.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICPSC_DIV1: no prescaler
-  *            @arg TIM_ICPSC_DIV2: capture is done once every 2 events
-  *            @arg TIM_ICPSC_DIV4: capture is done once every 4 events
-  *            @arg TIM_ICPSC_DIV8: capture is done once every 8 events
-  * @retval None
-  */
-#define __HAL_TIM_SET_ICPRESCALER(__HANDLE__, __CHANNEL__, __ICPSC__) \
-                        do{                                                    \
-                              TIM_RESET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__));  \
-                              TIM_SET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__), (__ICPSC__)); \
-                          } while(0)
-
-/**
-  * @brief  Gets the TIM Input Capture prescaler on runtime
-  * @param  __HANDLE__ : TIM handle.
-  * @param  __CHANNEL__ : TIM Channels to be configured.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: get input capture 1 prescaler value
-  *            @arg TIM_CHANNEL_2: get input capture 2 prescaler value
-  *            @arg TIM_CHANNEL_3: get input capture 3 prescaler value
-  *            @arg TIM_CHANNEL_4: get input capture 4 prescaler value
-  * @retval None
-  */
-#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__)  \
-  (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\
-   ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8) :\
-   ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\
-   (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8U)
-   
-
-/**
-  * @brief  Set the Update Request Source (URS) bit of the TIMx_CR1 register
-  * @param  __HANDLE__: TIM handle.
-  * @note  When the URS bit of the TIMx_CR1 register is set, only counter
-  *        overflow/underflow generates an update interrupt or DMA request (if
-  *        enabled)
-  * @retval None
-  */
-#define __HAL_TIM_URS_ENABLE(__HANDLE__) \
-    ((__HANDLE__)->Instance->CR1|= (TIM_CR1_URS))
-
-/**
-  * @brief  Reset the Update Request Source (URS) bit of the TIMx_CR1 register
-  * @param  __HANDLE__: TIM handle.
-  * @note  When the URS bit of the TIMx_CR1 register is reset, any of the
-  *        following events generate an update interrupt or DMA request (if
-  *        enabled):
-  *            Counter overflow/underflow
-  *            Setting the UG bit
-  *            Update generation through the slave mode controller
-  * @retval None
-  */
-#define __HAL_TIM_URS_DISABLE(__HANDLE__) \
-      ((__HANDLE__)->Instance->CR1&=~(TIM_CR1_URS))
-
-/**
-  * @brief  Sets the TIM Capture x input polarity on runtime.
-  * @param  __HANDLE__: TIM handle.
-  * @param  __CHANNEL__: TIM Channels to be configured.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @param  __POLARITY__: Polarity for TIx source
-  *            @arg TIM_INPUTCHANNELPOLARITY_RISING: Rising Edge
-  *            @arg TIM_INPUTCHANNELPOLARITY_FALLING: Falling Edge
-  *            @arg TIM_INPUTCHANNELPOLARITY_BOTHEDGE: Rising and Falling Edge
-  * @note  The polarity TIM_INPUTCHANNELPOLARITY_BOTHEDGE is not authorized  for TIM Channel 4.
-  * @retval None
-  */
-#define __HAL_TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__)                          \
-                       do{                                                                            \
-                           TIM_RESET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__));               \
-                           TIM_SET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__), (__POLARITY__)); \
-                         }while(0)
-
-/**
-  * @}
-  */   
-     
-/* Include TIM HAL Extension module */
-#include "stm32l0xx_hal_tim_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup TIM_Exported_Functions TIM Exported Functions
-  * @{
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/* Time Base functions ********************************************************/
-
-/** @defgroup TIM_Exported_Functions_Group1 Timer Base functions
- *  @brief    Time Base functions
- *  @{
- */
-HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim);
-HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim);
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim);
-HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim);
-HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim);
-/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
-HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim);
-
-/**
-  * @}
-  */
-
-
-/* Timer Output Compare functions **********************************************/
-
-/** @defgroup TIM_Exported_Functions_Group2 Timer Output Compare functions
- *  @brief    Timer Output Compare functions
- *  @{
- */
-
-HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim);
-HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim);
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
-HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
-/**
-  * @}
-  */
-
-
-/* Timer PWM functions *********************************************************/
-
-/** @defgroup TIM_Exported_Functions_Group3 Timer PWM functions
- *   @brief    Timer PWM functions
- *   @{
- */
-HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim);
-HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim);
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
-HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
-/**
-  * @}
-  */
-
-/* Timer Input Capture functions ***********************************************/
-
-/** @defgroup TIM_Exported_Functions_Group4 Timer Input Capture functions
- *  @brief    Timer Input Capture functions
- *  @{
- */
-HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim);
-HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim);
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
-HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
-/**
-  * @}
-  */
-
-/* Timer One Pulse functions ***************************************************/
-
-/** @defgroup TIM_Exported_Functions_Group5 Timer One Pulse functions
- *  @brief    Timer One Pulse functions
- *  @{
- */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode);
-HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim);
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
-HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
-
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
-HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
-
-/**
-  * @}
-  */
-
-/* Timer Encoder functions *****************************************************/
-
-/** @defgroup TIM_Exported_Functions_Group6 Timer Encoder functions
- *  @brief       Timer Encoder functions
- *  @{
- */
-HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim,  TIM_Encoder_InitTypeDef* sConfig);
-HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim);
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1, uint32_t *pData2, uint16_t Length);
-HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
-
-/**
-  * @}
-  */
-
-/* Interrupt Handler functions  **********************************************/
-
-/** @defgroup TIM_Exported_Functions_Group7 Timer IRQ handler management
- *  @brief      Interrupt Handler functions
- *  @{
- */
-void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim);
-/**
-  * @}
-  */
-
-/* Control functions  *********************************************************/
-
-/** @defgroup TIM_Exported_Functions_Group8 Peripheral Control functions
- *  @brief      Control functions
- *  @{
- */
-HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef* sConfig, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef* sConfig, uint32_t OutputChannel,  uint32_t InputChannel);
-HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef * sClearInputConfig, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef * sClockSourceConfig);    
-HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection);
-HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig);
-HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig);
-HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
-                                              uint32_t  *BurstBuffer, uint32_t  BurstLength);
-HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
-HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
-                                              uint32_t  *BurstBuffer, uint32_t  BurstLength);
-HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
-HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource);
-uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel);
-
-/**
-  * @}
-  */
-
-/* Callback in non blocking modes (Interrupt and DMA) *************************/
-
-/** @defgroup TIM_Exported_Functions_Group9 Timer Callbacks functions
- *  @brief      Callback functions
- *  @{
- */
-void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim);
-void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim);
-void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim);
-void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim);
-void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim);
-void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim);
-/**
-  * @}
-  */
-
-
-/* Peripheral State functions  **************************************************/
-
-/** @defgroup TIM_Exported_Functions_Group10 Peripheral State functions
- *  @brief      Peripheral State functions
- *  @{
- */
-HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim);
-void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma);
-void TIM_DMAError(DMA_HandleTypeDef *hdma);
-void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma);
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */
-
-/* Define the private group ***********************************/
-/**************************************************************/
-/** @defgroup TIM_Private TIM Private
-  * @{
-  */
-/**
-  * @}
-  */
-/**************************************************************/
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_TIM_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h
deleted file mode 100755
index fcb5c1cf..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h
+++ /dev/null
@@ -1,285 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_tim_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of TIM HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_TIM_EX_H
-#define __STM32L0xx_HAL_TIM_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup TIMEx TIMEx
-  * @{
-  */ 
-
-/* Exported types ------------------------------------------------------------*/
- /** @defgroup TIM_Exported_Types TIM Exported Types
-  * @{
-  */
-/** 
-  * @brief  TIM Master configuration Structure definition  
-  */ 
-typedef struct {
-  uint32_t  MasterOutputTrigger;   /*!< Trigger output (TRGO) selection 
-                                      This parameter can be a value of @ref TIM_Master_Mode_Selection */
-  uint32_t  MasterSlaveMode;       /*!< Master/slave mode selection 
-                                      This parameter can be a value of @ref TIM_Master_Slave_Mode */
-}TIM_MasterConfigTypeDef;
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup TIMEx_Exported_Constants TIMEx Exported Constants
-  * @{
-  */
-
-/** @defgroup TIMEx_Trigger_Selection Trigger selection
-  * @{
-  */  
-#define  TIM_TRGO_RESET            ((uint32_t)0x0000U)
-#define  TIM_TRGO_ENABLE           (TIM_CR2_MMS_0)
-#define  TIM_TRGO_UPDATE           (TIM_CR2_MMS_1)
-#define  TIM_TRGO_OC1              ((TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
-#define  TIM_TRGO_OC1REF           (TIM_CR2_MMS_2)
-#define  TIM_TRGO_OC2REF           ((TIM_CR2_MMS_2 | TIM_CR2_MMS_0))
-#define  TIM_TRGO_OC3REF           ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1))
-#define  TIM_TRGO_OC4REF           ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
-
-#define IS_TIM_TRGO_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO_RESET)  || \
-                                        ((__SOURCE__) == TIM_TRGO_ENABLE) || \
-                                        ((__SOURCE__) == TIM_TRGO_UPDATE) || \
-                                        ((__SOURCE__) == TIM_TRGO_OC1)    || \
-                                        ((__SOURCE__) == TIM_TRGO_OC1REF) || \
-                                        ((__SOURCE__) == TIM_TRGO_OC2REF) || \
-                                        ((__SOURCE__) == TIM_TRGO_OC3REF) || \
-                                        ((__SOURCE__) == TIM_TRGO_OC4REF))
-   
-/**
-  * @}
-  */ 
-
-/** @defgroup TIMEx_Remap Remaping
-  * @{
-  */
-#if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) \
-    || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
-
-#define TIM2_ETR_GPIO                     ((uint32_t)0x0U)
-#define TIM2_ETR_HSI48                    TIM2_OR_ETR_RMP_2
-#define TIM2_ETR_HSI16                    (TIM2_OR_ETR_RMP_1 | TIM2_OR_ETR_RMP_0)
-#define TIM2_ETR_LSE                      (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_0)
-#define TIM2_ETR_COMP2_OUT                (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_1)
-#define TIM2_ETR_COMP1_OUT                TIM2_OR_ETR_RMP
-
-#elif defined (STM32L011xx) || defined (STM32L021xx) || defined (STM32L031xx) || defined (STM32L041xx)
-
-#define TIM2_ETR_GPIO                     ((uint32_t)0x0U)
-#define TIM2_ETR_HSI16                    (TIM2_OR_ETR_RMP_1 | TIM2_OR_ETR_RMP_0)
-#define TIM2_ETR_LSE                      (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_0)
-#define TIM2_ETR_COMP2_OUT                (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_1)
-#define TIM2_ETR_COMP1_OUT                TIM2_OR_ETR_RMP
-
-#else
-
-#define TIM2_ETR_GPIO                     ((uint32_t)0x0U)
-#define TIM2_ETR_HSI48                    TIM2_OR_ETR_RMP_2
-#define TIM2_ETR_LSE                      (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_0)
-#define TIM2_ETR_COMP2_OUT                (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_1)
-#define TIM2_ETR_COMP1_OUT                TIM2_OR_ETR_RMP
-
-#endif
-
-
-
-#define TIM2_TI4_GPIO                     ((uint32_t)0x0U)
-#define TIM2_TI4_COMP2                    TIM2_OR_TI4_RMP_0
-#define TIM2_TI4_COMP1                    TIM2_OR_TI4_RMP_1
-
-#define TIM21_ETR_GPIO                    ((uint32_t)0x0U)
-#define TIM21_ETR_COMP2_OUT               TIM21_OR_ETR_RMP_0
-#define TIM21_ETR_COMP1_OUT               TIM21_OR_ETR_RMP_1
-#define TIM21_ETR_LSE                     TIM21_OR_ETR_RMP
-#define TIM21_TI1_GPIO                    ((uint32_t)0x0U)
-#define TIM21_TI1_MCO                     TIM21_OR_TI1_RMP
-#define TIM21_TI1_RTC_WKUT_IT             TIM21_OR_TI1_RMP_0
-#define TIM21_TI1_HSE_RTC                 TIM21_OR_TI1_RMP_1
-#define TIM21_TI1_MSI                     (TIM21_OR_TI1_RMP_0 | TIM21_OR_TI1_RMP_1)
-#define TIM21_TI1_LSE                     TIM21_OR_TI1_RMP_2
-#define TIM21_TI1_LSI                     (TIM21_OR_TI1_RMP_2 | TIM21_OR_TI1_RMP_0)
-#define TIM21_TI1_COMP1_OUT               (TIM21_OR_TI1_RMP_2 | TIM21_OR_TI1_RMP_1)
-#define TIM21_TI2_GPIO                    ((uint32_t)0x0U)
-#define TIM21_TI2_COMP2_OUT               TIM21_OR_TI2_RMP
-
-#if !defined(STM32L011xx) && !defined(STM32L021xx)
-#define TIM22_ETR_GPIO                    ((uint32_t)0x0U)
-#define TIM22_ETR_COMP2_OUT               TIM22_OR_ETR_RMP_0
-#define TIM22_ETR_COMP1_OUT               TIM22_OR_ETR_RMP_1
-#define TIM22_ETR_LSE                     TIM22_OR_ETR_RMP
-#define TIM22_TI1_GPIO1                   ((uint32_t)0x0U)
-#define TIM22_TI1_COMP2_OUT               TIM22_OR_TI1_RMP_0
-#define TIM22_TI1_COMP1_OUT               TIM22_OR_TI1_RMP_1
-#define TIM22_TI1_GPIO2                   TIM22_OR_TI1_RMP
-#endif
-
-#if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) \
-    || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
-
-#define TIM3_TI4_GPIO_DEF                 ((uint32_t)0x0U)
-#define TIM3_TI4_GPIOC9_AF2               TIM3_OR_TI4_RMP
-#define TIM3_TI2_GPIO_DEF                 ((uint32_t)0x0U)
-#define TIM3_TI2_GPIOB5_AF4               TIM3_OR_TI2_RMP
-#define TIM3_TI1_USB_SOF                  ((uint32_t)0x0U)
-#define TIM3_TI1_GPIO                     TIM3_OR_TI1_RMP
-#define TIM3_ETR_GPIO                     ((uint32_t)0x0U)
-#define TIM3_ETR_HSI                      TIM3_OR_ETR_RMP_1
-
-#endif /*defined (STM32L07Xxx) or defined (STM32L08Xxx) */
-      
-
-#if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) \
-    || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
-
-
-#define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__)               \
-        ((((__INSTANCE__) == TIM2)   &&  ((__TIM_REMAP__) <=  (TIM2_OR_TI4_RMP  | TIM2_OR_ETR_RMP))) || \
-         (((__INSTANCE__) == TIM22)  &&  ((__TIM_REMAP__) <=  (TIM22_OR_TI1_RMP | TIM22_OR_ETR_RMP))) || \
-         (((__INSTANCE__) == TIM21)  &&  ((__TIM_REMAP__) <=  (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP))) || \
-         (((__INSTANCE__) == TIM3)   &&  ((__TIM_REMAP__) <=  (TIM3_OR_ETR_RMP  | TIM3_OR_TI1_RMP  | TIM3_OR_TI2_RMP | TIM3_OR_TI4_RMP))))
-
-#define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__)     \
-        ((((__INSTANCE__) == TIM2)   &&  (((__CHANNEL__) == TIM_CHANNEL_1)    ||   \
-                                        ((__CHANNEL__) == TIM_CHANNEL_2)   ||   \
-                                        ((__CHANNEL__) == TIM_CHANNEL_3)   ||   \
-                                        ((__CHANNEL__) == TIM_CHANNEL_4))) ||   \
-          (((__INSTANCE__) == TIM3) &&   (((__CHANNEL__) == TIM_CHANNEL_1)    ||   \
-                                        ((__CHANNEL__) == TIM_CHANNEL_2)   ||   \
-                                        ((__CHANNEL__) == TIM_CHANNEL_3)   ||   \
-                                        ((__CHANNEL__) == TIM_CHANNEL_4))) ||   \
-          (((__INSTANCE__) == TIM21) &&  (((__CHANNEL__) == TIM_CHANNEL_1)    ||   \
-                                        ((__CHANNEL__) == TIM_CHANNEL_2))) ||   \
-          (((__INSTANCE__) == TIM22) &&  (((__CHANNEL__) == TIM_CHANNEL_1)    ||   \
-                                        ((__CHANNEL__) == TIM_CHANNEL_2))))
-									
-#elif defined (STM32L011xx) || defined (STM32L021xx)
-
-#define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__)               \
-        ((((__INSTANCE__) == TIM2)   &&  ((__TIM_REMAP__) <=  (TIM2_OR_TI4_RMP  | TIM2_OR_ETR_RMP))) || \
-         (((__INSTANCE__) == TIM21)  &&  ((__TIM_REMAP__) <=  (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP))))
-
-#define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__)     \
-        ((((__INSTANCE__) == TIM2)   &&   (((__CHANNEL__) == TIM_CHANNEL_1)   || \
-                                         ((__CHANNEL__) == TIM_CHANNEL_2)   || \
-                                         ((__CHANNEL__) == TIM_CHANNEL_3)   || \
-                                         ((__CHANNEL__) == TIM_CHANNEL_4))) || \
-          (((__INSTANCE__) == TIM21)  &&  (((__CHANNEL__) == TIM_CHANNEL_1)   || \
-                                         ((__CHANNEL__) == TIM_CHANNEL_2))))
-										 
-#else
-
-#define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__)               \
-        ((((__INSTANCE__) == TIM2)   &&  ((__TIM_REMAP__) <=  (TIM2_OR_TI4_RMP  | TIM2_OR_ETR_RMP))) || \
-         (((__INSTANCE__) == TIM22)  &&  ((__TIM_REMAP__) <=  (TIM22_OR_TI1_RMP | TIM22_OR_ETR_RMP))) || \
-         (((__INSTANCE__) == TIM21)  &&  ((__TIM_REMAP__) <=  (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP))))
-
-#define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__)     \
-        ((((__INSTANCE__) == TIM2)   &&   (((__CHANNEL__) == TIM_CHANNEL_1)   || \
-                                         ((__CHANNEL__) == TIM_CHANNEL_2)   || \
-                                         ((__CHANNEL__) == TIM_CHANNEL_3)   || \
-                                         ((__CHANNEL__) == TIM_CHANNEL_4))) || \
-          (((__INSTANCE__) == TIM21)  &&  (((__CHANNEL__) == TIM_CHANNEL_1)   || \
-                                         ((__CHANNEL__) == TIM_CHANNEL_2))) || \
-          (((__INSTANCE__) == TIM22)  &&  (((__CHANNEL__) == TIM_CHANNEL_1)   || \
-                                         ((__CHANNEL__) == TIM_CHANNEL_2))))
-
-#endif /*defined (STM32L07Xxx) or defined (STM32L08Xxx) */
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-/* Exported macro ------------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-/* Control functions  ***********************************************************/
-
-/** @defgroup TIMEx_Exported_Functions TIMEx Exported Functions
- *  @{
- */
-
-/** @defgroup TIMEx_Exported_Functions_Group1 TIMEx Peripheral Control functions
- *  @{
- */
-
-HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
-HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_TIM_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tsc.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tsc.h
deleted file mode 100755
index cacef337..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tsc.h
+++ /dev/null
@@ -1,659 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_tsc.h
-  * @author  MCD Application Team
-  * @brief   This file contains all the functions prototypes for the TSC firmware 
-  *          library.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_TSC_H
-#define __STM32L0xx_TSC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx)
-   
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup TSC TSC
-  * @{
-  */ 
-
-   /** @defgroup TSC_Exported_Types TSC Exported Types
-  * @{
-  */
-/* Exported types ------------------------------------------------------------*/
-   
-/** 
-  * @brief TSC state structure definition  
-  */ 
-typedef enum
-{
-  HAL_TSC_STATE_RESET  = 0x00U, /*!< TSC registers have their reset value */
-  HAL_TSC_STATE_READY  = 0x01U, /*!< TSC registers are initialized or acquisition is completed with success */
-  HAL_TSC_STATE_BUSY   = 0x02U, /*!< TSC initialization or acquisition is on-going */
-  HAL_TSC_STATE_ERROR  = 0x03U  /*!< Acquisition is completed with max count error */
-} HAL_TSC_StateTypeDef;
-
-/** 
-  * @brief TSC group status structure definition  
-  */ 
-typedef enum
-{
-  TSC_GROUP_ONGOING   = 0x00U, /*!< Acquisition on group is on-going or not started */
-  TSC_GROUP_COMPLETED = 0x01U  /*!< Acquisition on group is completed with success (no max count error) */
-} TSC_GroupStatusTypeDef;
-
-/** 
-  * @brief TSC init structure definition  
-  */ 
-typedef struct
-{
-  uint32_t CTPulseHighLength;       /*!< Charge-transfer high pulse length */
-  uint32_t CTPulseLowLength;        /*!< Charge-transfer low pulse length */
-  uint32_t SpreadSpectrum;          /*!< Spread spectrum activation */
-  uint32_t SpreadSpectrumDeviation; /*!< Spread spectrum deviation */
-  uint32_t SpreadSpectrumPrescaler; /*!< Spread spectrum prescaler */
-  uint32_t PulseGeneratorPrescaler; /*!< Pulse generator prescaler */
-  uint32_t MaxCountValue;           /*!< Max count value */
-  uint32_t IODefaultMode;           /*!< IO default mode */
-  uint32_t SynchroPinPolarity;      /*!< Synchro pin polarity */
-  uint32_t AcquisitionMode;         /*!< Acquisition mode */
-  uint32_t MaxCountInterrupt;       /*!< Max count interrupt activation */
-  uint32_t ChannelIOs;              /*!< Channel IOs mask */
-  uint32_t ShieldIOs;               /*!< Shield IOs mask */
-  uint32_t SamplingIOs;             /*!< Sampling IOs mask */
-} TSC_InitTypeDef;
-
-/** 
-  * @brief TSC IOs configuration structure definition  
-  */ 
-typedef struct
-{
-  uint32_t ChannelIOs;  /*!< Channel IOs mask */
-  uint32_t ShieldIOs;   /*!< Shield IOs mask */
-  uint32_t SamplingIOs; /*!< Sampling IOs mask */
-} TSC_IOConfigTypeDef;
-
-/** 
-  * @brief  TSC handle Structure definition  
-  */ 
-typedef struct
-{
-  TSC_TypeDef               *Instance; /*!< Register base address */
-  TSC_InitTypeDef           Init;      /*!< Initialization parameters */
-  __IO HAL_TSC_StateTypeDef State;     /*!< Peripheral state */
-  HAL_LockTypeDef           Lock;      /*!< Lock feature */
-} TSC_HandleTypeDef;
-
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup TSC_Exported_Constants TSC Exported Constants
-  * @{
-  */ 
-
-
-#define TSC_CTPH_1CYCLE   ((uint32_t)((uint32_t) 0U << 28U))
-#define TSC_CTPH_2CYCLES  ((uint32_t)((uint32_t) 1U << 28U))
-#define TSC_CTPH_3CYCLES  ((uint32_t)((uint32_t) 2U << 28U))
-#define TSC_CTPH_4CYCLES  ((uint32_t)((uint32_t) 3U << 28U))
-#define TSC_CTPH_5CYCLES  ((uint32_t)((uint32_t) 4U << 28U))
-#define TSC_CTPH_6CYCLES  ((uint32_t)((uint32_t) 5U << 28U))
-#define TSC_CTPH_7CYCLES  ((uint32_t)((uint32_t) 6U << 28U))
-#define TSC_CTPH_8CYCLES  ((uint32_t)((uint32_t) 7U << 28U))
-#define TSC_CTPH_9CYCLES  ((uint32_t)((uint32_t) 8U << 28U))
-#define TSC_CTPH_10CYCLES ((uint32_t)((uint32_t) 9U << 28U))
-#define TSC_CTPH_11CYCLES ((uint32_t)((uint32_t)10U << 28U))
-#define TSC_CTPH_12CYCLES ((uint32_t)((uint32_t)11U << 28U))
-#define TSC_CTPH_13CYCLES ((uint32_t)((uint32_t)12U << 28U))
-#define TSC_CTPH_14CYCLES ((uint32_t)((uint32_t)13U << 28U))
-#define TSC_CTPH_15CYCLES ((uint32_t)((uint32_t)14U << 28U))
-#define TSC_CTPH_16CYCLES ((uint32_t)((uint32_t)15U << 28U))
-
-#define TSC_CTPL_1CYCLE   ((uint32_t)((uint32_t) 0U << 24U))
-#define TSC_CTPL_2CYCLES  ((uint32_t)((uint32_t) 1U << 24U))
-#define TSC_CTPL_3CYCLES  ((uint32_t)((uint32_t) 2U << 24U))
-#define TSC_CTPL_4CYCLES  ((uint32_t)((uint32_t) 3U << 24U))
-#define TSC_CTPL_5CYCLES  ((uint32_t)((uint32_t) 4U << 24U))
-#define TSC_CTPL_6CYCLES  ((uint32_t)((uint32_t) 5U << 24U))
-#define TSC_CTPL_7CYCLES  ((uint32_t)((uint32_t) 6U << 24U))
-#define TSC_CTPL_8CYCLES  ((uint32_t)((uint32_t) 7U << 24U))
-#define TSC_CTPL_9CYCLES  ((uint32_t)((uint32_t) 8U << 24U))
-#define TSC_CTPL_10CYCLES ((uint32_t)((uint32_t) 9U << 24U))
-#define TSC_CTPL_11CYCLES ((uint32_t)((uint32_t)10U << 24U))
-#define TSC_CTPL_12CYCLES ((uint32_t)((uint32_t)11U << 24U))
-#define TSC_CTPL_13CYCLES ((uint32_t)((uint32_t)12U << 24U))
-#define TSC_CTPL_14CYCLES ((uint32_t)((uint32_t)13U << 24U))
-#define TSC_CTPL_15CYCLES ((uint32_t)((uint32_t)14U << 24U))
-#define TSC_CTPL_16CYCLES ((uint32_t)((uint32_t)15U << 24U))
-
-#define TSC_SS_PRESC_DIV1 ((uint32_t)0U)  
-#define TSC_SS_PRESC_DIV2  (TSC_CR_SSPSC) 
-
-#define TSC_PG_PRESC_DIV1   ((uint32_t)(0U << 12U))
-#define TSC_PG_PRESC_DIV2   ((uint32_t)(1U << 12U))
-#define TSC_PG_PRESC_DIV4   ((uint32_t)(2U << 12U))
-#define TSC_PG_PRESC_DIV8   ((uint32_t)(3U << 12U))
-#define TSC_PG_PRESC_DIV16  ((uint32_t)(4U << 12U))
-#define TSC_PG_PRESC_DIV32  ((uint32_t)(5U << 12U))
-#define TSC_PG_PRESC_DIV64  ((uint32_t)(6U << 12U))
-#define TSC_PG_PRESC_DIV128 ((uint32_t)(7U << 12U))
-#define TSC_MCV_255   ((uint32_t)(0U << 5U))
-#define TSC_MCV_511   ((uint32_t)(1U << 5U))
-#define TSC_MCV_1023  ((uint32_t)(2U << 5U))
-#define TSC_MCV_2047  ((uint32_t)(3U << 5U))
-#define TSC_MCV_4095  ((uint32_t)(4U << 5U))
-#define TSC_MCV_8191  ((uint32_t)(5U << 5U))
-#define TSC_MCV_16383 ((uint32_t)(6U << 5U))
-
-#define TSC_IODEF_OUT_PP_LOW ((uint32_t)0U)
-#define TSC_IODEF_IN_FLOAT   (TSC_CR_IODEF)
-
-#define TSC_SYNC_POLARITY_FALLING      ((uint32_t)0U)
-#define TSC_SYNC_POLARITY_RISING (TSC_CR_SYNCPOL)
-
-#define TSC_ACQ_MODE_NORMAL  ((uint32_t)0U)
-#define TSC_ACQ_MODE_SYNCHRO (TSC_CR_AM)
-
-#define TSC_IOMODE_UNUSED   ((uint32_t)0U)
-#define TSC_IOMODE_CHANNEL  ((uint32_t)1U)
-#define TSC_IOMODE_SHIELD   ((uint32_t)2U)
-#define TSC_IOMODE_SAMPLING ((uint32_t)3U)
-
-/** @defgroup TSC_interrupts_definition TSC Interrupts Definition
-  * @{
-  */
-#define TSC_IT_EOA ((uint32_t)TSC_IER_EOAIE)  
-#define TSC_IT_MCE ((uint32_t)TSC_IER_MCEIE) 
-/**
-  * @}
-  */ 
-
-/** @defgroup TSC_flags_definition TSC Flags Definition
-  * @{
-  */ 
-#define TSC_FLAG_EOA ((uint32_t)TSC_ISR_EOAF)
-#define TSC_FLAG_MCE ((uint32_t)TSC_ISR_MCEF)
-/**
-  * @}
-  */
-
-#define TSC_NB_OF_GROUPS (8)
-
-#define TSC_GROUP1 ((uint32_t)0x00000001U)
-#define TSC_GROUP2 ((uint32_t)0x00000002U)
-#define TSC_GROUP3 ((uint32_t)0x00000004U)
-#define TSC_GROUP4 ((uint32_t)0x00000008U)
-#define TSC_GROUP5 ((uint32_t)0x00000010U)
-#define TSC_GROUP6 ((uint32_t)0x00000020U)
-#define TSC_GROUP7 ((uint32_t)0x00000040U)
-#define TSC_GROUP8 ((uint32_t)0x00000080U)
-#define TSC_ALL_GROUPS ((uint32_t)0x000000FFU)
-
-#define TSC_GROUP1_IDX ((uint32_t)0U)
-#define TSC_GROUP2_IDX ((uint32_t)1U)
-#define TSC_GROUP3_IDX ((uint32_t)2U)
-#define TSC_GROUP4_IDX ((uint32_t)3U)
-#define TSC_GROUP5_IDX ((uint32_t)4U)
-#define TSC_GROUP6_IDX ((uint32_t)5U)
-#define TSC_GROUP7_IDX ((uint32_t)6U)
-#define TSC_GROUP8_IDX ((uint32_t)7U)
-
-#define TSC_GROUP1_IO1 ((uint32_t)0x00000001U)
-#define TSC_GROUP1_IO2 ((uint32_t)0x00000002U)
-#define TSC_GROUP1_IO3 ((uint32_t)0x00000004U)
-#define TSC_GROUP1_IO4 ((uint32_t)0x00000008U)
-#define TSC_GROUP1_ALL_IOS ((uint32_t)0x0000000FU)
-
-#define TSC_GROUP2_IO1 ((uint32_t)0x00000010U)
-#define TSC_GROUP2_IO2 ((uint32_t)0x00000020U)
-#define TSC_GROUP2_IO3 ((uint32_t)0x00000040U)
-#define TSC_GROUP2_IO4 ((uint32_t)0x00000080U)
-#define TSC_GROUP2_ALL_IOS ((uint32_t)0x000000F0U)
-
-#define TSC_GROUP3_IO1 ((uint32_t)0x00000100U)
-#define TSC_GROUP3_IO2 ((uint32_t)0x00000200U)
-#define TSC_GROUP3_IO3 ((uint32_t)0x00000400U)
-#define TSC_GROUP3_IO4 ((uint32_t)0x00000800U)
-#define TSC_GROUP3_ALL_IOS ((uint32_t)0x00000F00U)
-
-#define TSC_GROUP4_IO1 ((uint32_t)0x00001000U)
-#define TSC_GROUP4_IO2 ((uint32_t)0x00002000U)
-#define TSC_GROUP4_IO3 ((uint32_t)0x00004000U)
-#define TSC_GROUP4_IO4 ((uint32_t)0x00008000U)
-#define TSC_GROUP4_ALL_IOS ((uint32_t)0x0000F000U)
-
-#define TSC_GROUP5_IO1 ((uint32_t)0x00010000U)
-#define TSC_GROUP5_IO2 ((uint32_t)0x00020000U)
-#define TSC_GROUP5_IO3 ((uint32_t)0x00040000U)
-#define TSC_GROUP5_IO4 ((uint32_t)0x00080000U)
-#define TSC_GROUP5_ALL_IOS ((uint32_t)0x000F0000U)
-
-#define TSC_GROUP6_IO1 ((uint32_t)0x00100000U)
-#define TSC_GROUP6_IO2 ((uint32_t)0x00200000U)
-#define TSC_GROUP6_IO3 ((uint32_t)0x00400000U)
-#define TSC_GROUP6_IO4 ((uint32_t)0x00800000U)
-#define TSC_GROUP6_ALL_IOS ((uint32_t)0x00F00000U)
-
-#define TSC_GROUP7_IO1 ((uint32_t)0x01000000U)
-#define TSC_GROUP7_IO2 ((uint32_t)0x02000000U)
-#define TSC_GROUP7_IO3 ((uint32_t)0x04000000U)
-#define TSC_GROUP7_IO4 ((uint32_t)0x08000000U)
-#define TSC_GROUP7_ALL_IOS ((uint32_t)0x0F000000U)
-
-#define TSC_GROUP8_IO1 ((uint32_t)0x10000000U)
-#define TSC_GROUP8_IO2 ((uint32_t)0x20000000U)
-#define TSC_GROUP8_IO3 ((uint32_t)0x40000000U)
-#define TSC_GROUP8_IO4 ((uint32_t)0x80000000U)
-#define TSC_GROUP8_ALL_IOS ((uint32_t)0xF0000000U)
-
-#define TSC_ALL_GROUPS_ALL_IOS ((uint32_t)0xFFFFFFFFU)
-
-/**
-  * @}
-  */ 
-
-/* Exported macros -----------------------------------------------------------*/
-
-/** @defgroup TSC_Exported_Macros TSC Exported Macros
-  * @{
-  */
-
-/** @brief Reset TSC handle state
-  * @param  __HANDLE__: TSC handle
-  * @retval None
-  */
-#define __HAL_TSC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TSC_STATE_RESET)
-
-/**
-  * @brief Enable the TSC peripheral.
-  * @param  __HANDLE__: TSC handle
-  * @retval None
-  */
-#define __HAL_TSC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_TSCE)
-
-/**
-  * @brief Disable the TSC peripheral.
-  * @param  __HANDLE__: TSC handle
-  * @retval None
-  */
-#define __HAL_TSC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_TSCE))
-
-/**
-  * @brief Start acquisition
-  * @param  __HANDLE__: TSC handle
-  * @retval None
-  */
-#define __HAL_TSC_START_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_START)
-
-/**
-  * @brief Stop acquisition
-  * @param  __HANDLE__: TSC handle
-  * @retval None
-  */
-#define __HAL_TSC_STOP_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_START))
-
-/**
-  * @brief Set IO default mode to output push-pull low
-  * @param  __HANDLE__: TSC handle
-  * @retval None
-  */
-#define __HAL_TSC_SET_IODEF_OUTPPLOW(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_IODEF))
-
-/**
-  * @brief Set IO default mode to input floating
-  * @param  __HANDLE__: TSC handle
-  * @retval None
-  */
-#define __HAL_TSC_SET_IODEF_INFLOAT(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_IODEF)
-
-/**
-  * @brief Set synchronization polarity to falling edge
-  * @param  __HANDLE__: TSC handle
-  * @retval None
-  */
-#define __HAL_TSC_SET_SYNC_POL_FALL(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_SYNCPOL))
-
-/**
-  * @brief Set synchronization polarity to rising edge and high level
-  * @param  __HANDLE__: TSC handle
-  * @retval None
-  */
-#define __HAL_TSC_SET_SYNC_POL_RISE_HIGH(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_SYNCPOL)
-
-/**
-  * @brief Enable TSC interrupt.
-  * @param  __HANDLE__: TSC handle
-  * @param  __INTERRUPT__: TSC interrupt
-  * @retval None
-  */
-#define __HAL_TSC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
-
-/**
-  * @brief Disable TSC interrupt.
-  * @param  __HANDLE__: TSC handle
-  * @param  __INTERRUPT__: TSC interrupt
-  * @retval None
-  */
-#define __HAL_TSC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (uint32_t)(~(__INTERRUPT__)))
-
-/** @brief Check if the specified TSC interrupt source is enabled or disabled.
-  * @param  __HANDLE__: TSC Handle
-  * @param  __INTERRUPT__: TSC interrupt
-  * @retval SET or RESET
-  */
-#define __HAL_TSC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
-
-/**
-  * @brief Get the selected TSC's flag status.
-  * @param  __HANDLE__: TSC handle
-  * @param  __FLAG__: TSC flag
-  * @retval SET or RESET
-  */
-#define __HAL_TSC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
-
-/**
-  * @brief Clear the TSC's pending flag.
-  * @param  __HANDLE__: TSC handle
-  * @param  __FLAG__: TSC flag
-  * @retval None
-  */
-#define __HAL_TSC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
-
-/**
-  * @brief Enable schmitt trigger hysteresis on a group of IOs
-  * @param  __HANDLE__: TSC handle
-  * @param  __GX_IOY_MASK__: IOs mask
-  * @retval None
-  */
-#define __HAL_TSC_ENABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR |= (__GX_IOY_MASK__))
-
-/**
-  * @brief Disable schmitt trigger hysteresis on a group of IOs
-  * @param  __HANDLE__: TSC handle
-  * @param  __GX_IOY_MASK__: IOs mask
-  * @retval None
-  */
-#define __HAL_TSC_DISABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR &= (uint32_t)(~(__GX_IOY_MASK__)))
-
-/**
-  * @brief Open analog switch on a group of IOs
-  * @param  __HANDLE__: TSC handle
-  * @param  __GX_IOY_MASK__: IOs mask
-  * @retval None
-  */
-#define __HAL_TSC_OPEN_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR &= (uint32_t)(~(__GX_IOY_MASK__)))
-
-/**
-  * @brief Close analog switch on a group of IOs
-  * @param  __HANDLE__: TSC handle
-  * @param  __GX_IOY_MASK__: IOs mask
-  * @retval None
-  */
-#define __HAL_TSC_CLOSE_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR |= (__GX_IOY_MASK__))
-
-/**
-  * @brief Enable a group of IOs in channel mode
-  * @param  __HANDLE__: TSC handle
-  * @param  __GX_IOY_MASK__: IOs mask
-  * @retval None
-  */
-#define __HAL_TSC_ENABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR |= (__GX_IOY_MASK__))
-
-/**
-  * @brief Disable a group of channel IOs
-  * @param  __HANDLE__: TSC handle
-  * @param  __GX_IOY_MASK__: IOs mask
-  * @retval None
-  */
-#define __HAL_TSC_DISABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR &= (uint32_t)(~(__GX_IOY_MASK__)))
-
-/**
-  * @brief Enable a group of IOs in sampling mode
-  * @param  __HANDLE__: TSC handle
-  * @param  __GX_IOY_MASK__: IOs mask
-  * @retval None
-  */
-#define __HAL_TSC_ENABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR |= (__GX_IOY_MASK__))
-
-/**
-  * @brief Disable a group of sampling IOs
-  * @param  __HANDLE__: TSC handle
-  * @param  __GX_IOY_MASK__: IOs mask
-  * @retval None
-  */
-#define __HAL_TSC_DISABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR &= (uint32_t)(~(__GX_IOY_MASK__)))
-
-/**
-  * @brief Enable acquisition groups
-  * @param  __HANDLE__: TSC handle
-  * @param  __GX_MASK__: Groups mask
-  * @retval None
-  */
-#define __HAL_TSC_ENABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR |= (__GX_MASK__))
-
-/**
-  * @brief Disable acquisition groups
-  * @param  __HANDLE__: TSC handle
-  * @param  __GX_MASK__: Groups mask
-  * @retval None
-  */
-#define __HAL_TSC_DISABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR &= (uint32_t)(~(__GX_MASK__)))
-
-/** @brief Gets acquisition group status
-  * @param  __HANDLE__: TSC Handle
-  * @param  __GX_INDEX__: Group index
-  * @retval SET or RESET
-  */
-#define __HAL_TSC_GET_GROUP_STATUS(__HANDLE__, __GX_INDEX__) \
-((((__HANDLE__)->Instance->IOGCSR & (uint32_t)((uint32_t)1U << ((__GX_INDEX__) + (uint32_t)16U))) == (uint32_t)((uint32_t)1U << ((__GX_INDEX__) + (uint32_t)16U))) ? TSC_GROUP_COMPLETED : TSC_GROUP_ONGOING)
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-
-/** @defgroup TSC_Private_Macros TSC Private Macros
-  * @{
-  */
-#define IS_TSC_ALL_INSTANCE(PERIPH) ((PERIPH) == TSC)
-
-#define IS_TSC_CTPH(VAL) (((VAL) == TSC_CTPH_1CYCLE) || \
-                          ((VAL) == TSC_CTPH_2CYCLES) || \
-                          ((VAL) == TSC_CTPH_3CYCLES) || \
-                          ((VAL) == TSC_CTPH_4CYCLES) || \
-                          ((VAL) == TSC_CTPH_5CYCLES) || \
-                          ((VAL) == TSC_CTPH_6CYCLES) || \
-                          ((VAL) == TSC_CTPH_7CYCLES) || \
-                          ((VAL) == TSC_CTPH_8CYCLES) || \
-                          ((VAL) == TSC_CTPH_9CYCLES) || \
-                          ((VAL) == TSC_CTPH_10CYCLES) || \
-                          ((VAL) == TSC_CTPH_11CYCLES) || \
-                          ((VAL) == TSC_CTPH_12CYCLES) || \
-                          ((VAL) == TSC_CTPH_13CYCLES) || \
-                          ((VAL) == TSC_CTPH_14CYCLES) || \
-                          ((VAL) == TSC_CTPH_15CYCLES) || \
-                          ((VAL) == TSC_CTPH_16CYCLES))
-#define IS_TSC_CTPL(VAL) (((VAL) == TSC_CTPL_1CYCLE) || \
-                          ((VAL) == TSC_CTPL_2CYCLES) || \
-                          ((VAL) == TSC_CTPL_3CYCLES) || \
-                          ((VAL) == TSC_CTPL_4CYCLES) || \
-                          ((VAL) == TSC_CTPL_5CYCLES) || \
-                          ((VAL) == TSC_CTPL_6CYCLES) || \
-                          ((VAL) == TSC_CTPL_7CYCLES) || \
-                          ((VAL) == TSC_CTPL_8CYCLES) || \
-                          ((VAL) == TSC_CTPL_9CYCLES) || \
-                          ((VAL) == TSC_CTPL_10CYCLES) || \
-                          ((VAL) == TSC_CTPL_11CYCLES) || \
-                          ((VAL) == TSC_CTPL_12CYCLES) || \
-                          ((VAL) == TSC_CTPL_13CYCLES) || \
-                          ((VAL) == TSC_CTPL_14CYCLES) || \
-                          ((VAL) == TSC_CTPL_15CYCLES) || \
-                          ((VAL) == TSC_CTPL_16CYCLES))
-
-#define IS_TSC_SS(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE))
-
-#define IS_TSC_SSD(VAL) (((VAL) == 0U) || (((VAL) > 0U) && ((VAL) < 128U)))
-#define IS_TSC_SS_PRESC(VAL) (((VAL) == TSC_SS_PRESC_DIV1) || ((VAL) == TSC_SS_PRESC_DIV2))
-#define IS_TSC_PG_PRESC(VAL) (((VAL) == TSC_PG_PRESC_DIV1) || \
-                              ((VAL) == TSC_PG_PRESC_DIV2) || \
-                              ((VAL) == TSC_PG_PRESC_DIV4) || \
-                              ((VAL) == TSC_PG_PRESC_DIV8) || \
-                              ((VAL) == TSC_PG_PRESC_DIV16) || \
-                              ((VAL) == TSC_PG_PRESC_DIV32) || \
-                              ((VAL) == TSC_PG_PRESC_DIV64) || \
-                              ((VAL) == TSC_PG_PRESC_DIV128))
-
-#define IS_TSC_MCV(VAL) (((VAL) == TSC_MCV_255) || \
-                         ((VAL) == TSC_MCV_511) || \
-                         ((VAL) == TSC_MCV_1023) || \
-                         ((VAL) == TSC_MCV_2047) || \
-                         ((VAL) == TSC_MCV_4095) || \
-                         ((VAL) == TSC_MCV_8191) || \
-                         ((VAL) == TSC_MCV_16383))
-#define IS_TSC_IODEF(VAL) (((VAL) == TSC_IODEF_OUT_PP_LOW) || ((VAL) == TSC_IODEF_IN_FLOAT))
-#define IS_TSC_SYNC_POL(VAL) (((VAL) == TSC_SYNC_POLARITY_FALLING) || ((VAL) == TSC_SYNC_POLARITY_RISING))
-#define IS_TSC_ACQ_MODE(VAL) (((VAL) == TSC_ACQ_MODE_NORMAL) || ((VAL) == TSC_ACQ_MODE_SYNCHRO))
-#define IS_TSC_IOMODE(VAL) (((VAL) == TSC_IOMODE_UNUSED) || \
-                            ((VAL) == TSC_IOMODE_CHANNEL) || \
-                            ((VAL) == TSC_IOMODE_SHIELD) || \
-                            ((VAL) == TSC_IOMODE_SAMPLING))
-#define IS_TSC_MCE_IT(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE))
-
-#define IS_TSC_GROUP_INDEX(VAL) (((VAL) == 0U) || (((VAL) > 0U) && ((VAL) < TSC_NB_OF_GROUPS)))
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/  
-
-/** @defgroup TSC_Exported_Functions TSC Exported Functions
-  * @{
-  */
-
-/** @defgroup TSC_Exported_Functions_Group1 Initialization and de-initialization functions
-  * @{
-  */
-/* Initialization and de-initialization functions *****************************/
-HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc);
-HAL_StatusTypeDef HAL_TSC_DeInit(TSC_HandleTypeDef *htsc);
-void HAL_TSC_MspInit(TSC_HandleTypeDef* htsc);
-void HAL_TSC_MspDeInit(TSC_HandleTypeDef* htsc);
-/**
-  * @}
-  */
-
-/** @defgroup HAL_TSC_Exported_Functions_Group2 IO operation functions
-  * @{
-  */
-/* IO operation functions *****************************************************/
-HAL_StatusTypeDef HAL_TSC_Start(TSC_HandleTypeDef* htsc);
-HAL_StatusTypeDef HAL_TSC_Start_IT(TSC_HandleTypeDef* htsc);
-HAL_StatusTypeDef HAL_TSC_Stop(TSC_HandleTypeDef* htsc);
-HAL_StatusTypeDef HAL_TSC_Stop_IT(TSC_HandleTypeDef* htsc);
-HAL_StatusTypeDef HAL_TSC_PollForAcquisition(TSC_HandleTypeDef* htsc);
-TSC_GroupStatusTypeDef HAL_TSC_GroupGetStatus(TSC_HandleTypeDef* htsc, uint32_t gx_index);
-uint32_t HAL_TSC_GroupGetValue(TSC_HandleTypeDef* htsc, uint32_t gx_index);
-
-/**
-  * @}
-  */
-/** @defgroup HAL_TSC_Exported_Functions_Group3 Peripheral Control functions
-  * @{
-  */
-/* Peripheral Control functions ***********************************************/
-HAL_StatusTypeDef HAL_TSC_IOConfig(TSC_HandleTypeDef* htsc, TSC_IOConfigTypeDef* config);
-HAL_StatusTypeDef HAL_TSC_IODischarge(TSC_HandleTypeDef* htsc, uint32_t choice);
-
-/**
-  * @}
-  */
-/** @defgroup HAL_TSC_Exported_Functions_Group4 State callback and error Functions
-  * @{
-  */
-/* Peripheral State and Error functions ***************************************/
-HAL_TSC_StateTypeDef HAL_TSC_GetState(TSC_HandleTypeDef* htsc);
-void HAL_TSC_IRQHandler(TSC_HandleTypeDef* htsc);
-
-/* Callback functions *********************************************************/
-void HAL_TSC_ConvCpltCallback(TSC_HandleTypeDef* htsc);
-void HAL_TSC_ErrorCallback(TSC_HandleTypeDef* htsc);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Define the private group ***********************************/
-/**************************************************************/
-/** @defgroup TSC_Private TSC Private
-  * @{
-  */
-/**
-  * @}
-  */
-/**************************************************************/
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__STM32L0xx_TSC_H */
-#endif /* #if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h
deleted file mode 100755
index 4ae7f175..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h
+++ /dev/null
@@ -1,1468 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_uart.h
-  * @author  MCD Application Team
-  * @brief   Header file of UART HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_UART_H
-#define __STM32L0xx_HAL_UART_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup UART
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup UART_Exported_Types UART Exported Types
-  * @{
-  */
-
-/**
-  * @brief UART Init Structure definition
-  */
-typedef struct
-{
-  uint32_t BaudRate;                  /*!< This member configures the UART communication baud rate.
-                                           The baud rate register is computed using the following formula:
-                                           - If oversampling is 16 or in LIN mode,
-                                              Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate)))
-                                           - If oversampling is 8,
-                                              Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4]
-                                              Baud Rate Register[3] =  0
-                                              Baud Rate Register[2:0] =  (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1      */
-
-  uint32_t WordLength;                /*!< Specifies the number of data bits transmitted or received in a frame.
-                                           This parameter can be a value of @ref UARTEx_Word_Length. */
-
-  uint32_t StopBits;                  /*!< Specifies the number of stop bits transmitted.
-                                           This parameter can be a value of @ref UART_Stop_Bits. */
-
-  uint32_t Parity;                    /*!< Specifies the parity mode.
-                                           This parameter can be a value of @ref UART_Parity
-                                           @note When parity is enabled, the computed parity is inserted
-                                                 at the MSB position of the transmitted data (9th bit when
-                                                 the word length is set to 9 data bits; 8th bit when the
-                                                 word length is set to 8 data bits). */
-
-  uint32_t Mode;                      /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
-                                           This parameter can be a value of @ref UART_Mode. */
-
-  uint32_t HwFlowCtl;                 /*!< Specifies whether the hardware flow control mode is enabled
-                                           or disabled.
-                                           This parameter can be a value of @ref UART_Hardware_Flow_Control. */
-
-  uint32_t OverSampling;              /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8).
-                                           This parameter can be a value of @ref UART_Over_Sampling. */
-
-  uint32_t OneBitSampling;            /*!< Specifies whether a single sample or three samples' majority vote is selected.
-                                           Selecting the single sample method increases the receiver tolerance to clock
-                                           deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */
-}UART_InitTypeDef;
-
-/**
-  * @brief  UART Advanced Features initalization structure definition
-  */
-typedef struct
-{
-  uint32_t AdvFeatureInit;        /*!< Specifies which advanced UART features is initialized. Several
-                                       Advanced Features may be initialized at the same time .
-                                       This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */
-
-  uint32_t TxPinLevelInvert;      /*!< Specifies whether the TX pin active level is inverted.
-                                       This parameter can be a value of @ref UART_Tx_Inv.  */
-
-  uint32_t RxPinLevelInvert;      /*!< Specifies whether the RX pin active level is inverted.
-                                       This parameter can be a value of @ref UART_Rx_Inv.  */
-
-  uint32_t DataInvert;            /*!< Specifies whether data are inverted (positive/direct logic
-                                       vs negative/inverted logic).
-                                       This parameter can be a value of @ref UART_Data_Inv. */
-
-  uint32_t Swap;                  /*!< Specifies whether TX and RX pins are swapped.
-                                       This parameter can be a value of @ref UART_Rx_Tx_Swap. */
-
-  uint32_t OverrunDisable;        /*!< Specifies whether the reception overrun detection is disabled.
-                                       This parameter can be a value of @ref UART_Overrun_Disable. */
-
-  uint32_t DMADisableonRxError;   /*!< Specifies whether the DMA is disabled in case of reception error.
-                                       This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */
-
-  uint32_t AutoBaudRateEnable;    /*!< Specifies whether auto Baud rate detection is enabled.
-                                       This parameter can be a value of @ref UART_AutoBaudRate_Enable */
-
-  uint32_t AutoBaudRateMode;      /*!< If auto Baud rate detection is enabled, specifies how the rate
-                                       detection is carried out.
-                                       This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */
-
-  uint32_t MSBFirst;              /*!< Specifies whether MSB is sent first on UART line.
-                                       This parameter can be a value of @ref UART_MSB_First. */
-} UART_AdvFeatureInitTypeDef;
-
-
-
-/**
-  * @brief HAL UART State structures definition
-  * @note  HAL UART State value is a combination of 2 different substates: gState and RxState.
-  *        - gState contains UART state information related to global Handle management 
-  *          and also information related to Tx operations.
-  *          gState value coding follow below described bitmap :
-  *          b7-b6  Error information 
-  *             00 : No Error
-  *             01 : (Not Used)
-  *             10 : Timeout
-  *             11 : Error
-  *          b5     IP initilisation status
-  *             0  : Reset (IP not initialized)
-  *             1  : Init done (IP not initialized. HAL UART Init function already called)
-  *          b4-b3  (not used)
-  *             xx : Should be set to 00
-  *          b2     Intrinsic process state
-  *             0  : Ready
-  *             1  : Busy (IP busy with some configuration or internal operations)
-  *          b1     (not used)
-  *             x  : Should be set to 0
-  *          b0     Tx state
-  *             0  : Ready (no Tx operation ongoing)
-  *             1  : Busy (Tx operation ongoing)
-  *        - RxState contains information related to Rx operations.
-  *          RxState value coding follow below described bitmap :
-  *          b7-b6  (not used)
-  *             xx : Should be set to 00
-  *          b5     IP initilisation status
-  *             0  : Reset (IP not initialized)
-  *             1  : Init done (IP not initialized)
-  *          b4-b2  (not used)
-  *            xxx : Should be set to 000
-  *          b1     Rx state
-  *             0  : Ready (no Rx operation ongoing)
-  *             1  : Busy (Rx operation ongoing)
-  *          b0     (not used)
-  *             x  : Should be set to 0.
-  */
-typedef enum
-{
-  HAL_UART_STATE_RESET             = 0x00U,   /*!< Peripheral is not initialized
-                                                   Value is allowed for gState and RxState */
-  HAL_UART_STATE_READY             = 0x20U,   /*!< Peripheral Initialized and ready for use
-                                                   Value is allowed for gState and RxState */
-  HAL_UART_STATE_BUSY              = 0x24U,   /*!< an internal process is ongoing 
-                                                   Value is allowed for gState only */
-  HAL_UART_STATE_BUSY_TX           = 0x21U,   /*!< Data Transmission process is ongoing
-                                                   Value is allowed for gState only */
-  HAL_UART_STATE_BUSY_RX           = 0x22U,   /*!< Data Reception process is ongoing
-                                                   Value is allowed for RxState only */
-  HAL_UART_STATE_BUSY_TX_RX        = 0x23U,   /*!< Data Transmission and Reception process is ongoing
-                                                   Not to be used for neither gState nor RxState.
-                                                   Value is result of combination (Or) between gState and RxState values */
-  HAL_UART_STATE_TIMEOUT           = 0xA0U,   /*!< Timeout state
-                                                   Value is allowed for gState only */
-  HAL_UART_STATE_ERROR             = 0xE0U    /*!< Error
-                                                   Value is allowed for gState only */
-}HAL_UART_StateTypeDef;
-
-/**
-  * @brief  HAL UART Error Code structure definition
-  */
-typedef enum
-{
-  HAL_UART_ERROR_NONE      = 0x00,    /*!< No error            */
-  HAL_UART_ERROR_PE        = 0x01,    /*!< Parity error        */
-  HAL_UART_ERROR_NE        = 0x02,    /*!< Noise error         */
-  HAL_UART_ERROR_FE        = 0x04,    /*!< frame error         */
-  HAL_UART_ERROR_ORE       = 0x08,    /*!< Overrun error       */
-  HAL_UART_ERROR_DMA       = 0x10,    /*!< DMA transfer error  */
-  HAL_UART_ERROR_BUSY      = 0x20     /*!< Busy Error          */
-}HAL_UART_ErrorTypeDef;
-
-/**
-  * @brief UART clock sources definition
-  */
-typedef enum
-{
-  UART_CLOCKSOURCE_PCLK1      = 0x00,    /*!< PCLK1 clock source     */
-  UART_CLOCKSOURCE_PCLK2      = 0x01,    /*!< PCLK2 clock source     */
-  UART_CLOCKSOURCE_HSI        = 0x02,    /*!< HSI clock source       */
-  UART_CLOCKSOURCE_SYSCLK     = 0x04,    /*!< SYSCLK clock source    */
-  UART_CLOCKSOURCE_LSE        = 0x08,    /*!< LSE clock source       */
-  UART_CLOCKSOURCE_UNDEFINED  = 0x10     /*!< Undefined clock source */
-}UART_ClockSourceTypeDef;
-
-/**
-  * @brief  UART handle Structure definition
-  */
-typedef struct
-{
-  USART_TypeDef            *Instance;        /*!< UART registers base address        */
-
-  UART_InitTypeDef         Init;             /*!< UART communication parameters      */
-
-  UART_AdvFeatureInitTypeDef AdvancedInit;   /*!< UART Advanced Features initialization parameters */
-
-  uint8_t                  *pTxBuffPtr;      /*!< Pointer to UART Tx transfer Buffer */
-
-  uint16_t                 TxXferSize;       /*!< UART Tx Transfer size              */
-
-  __IO uint16_t            TxXferCount;      /*!< UART Tx Transfer Counter           */
-
-  uint8_t                  *pRxBuffPtr;      /*!< Pointer to UART Rx transfer Buffer */
-
-  uint16_t                 RxXferSize;       /*!< UART Rx Transfer size              */
-
-  __IO uint16_t            RxXferCount;      /*!< UART Rx Transfer Counter           */
-
-  uint16_t                 Mask;             /*!< UART Rx RDR register mask          */
-
-  DMA_HandleTypeDef        *hdmatx;          /*!< UART Tx DMA Handle parameters      */
-
-  DMA_HandleTypeDef        *hdmarx;          /*!< UART Rx DMA Handle parameters      */
-
-  HAL_LockTypeDef           Lock;            /*!< Locking object                     */
-
-  __IO HAL_UART_StateTypeDef    gState;      /*!< UART state information related to global Handle management 
-                                                  and also related to Tx operations.
-                                                  This parameter can be a value of @ref HAL_UART_StateTypeDef */
-
-  __IO HAL_UART_StateTypeDef    RxState;     /*!< UART state information related to Rx operations.
-                                                  This parameter can be a value of @ref HAL_UART_StateTypeDef */
-
-  __IO uint32_t             ErrorCode;       /*!< UART Error code                    */
-
-}UART_HandleTypeDef;
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup UART_Exported_Constants UART Exported Constants
-  * @{
-  */
-
-/** @defgroup UART_Stop_Bits   UART Number of Stop Bits
-  * @{
-  */
-#define UART_STOPBITS_1                     ((uint32_t)0x00000000U)               /*!< UART frame with 1 stop bit    */
-#define UART_STOPBITS_1_5                   (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */
-#define UART_STOPBITS_2                      USART_CR2_STOP_1                     /*!< UART frame with 2 stop bits   */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Parity  UART Parity
-  * @{
-  */
-#define UART_PARITY_NONE                    ((uint32_t)0x00000000U)                        /*!< No parity   */
-#define UART_PARITY_EVEN                    ((uint32_t)USART_CR1_PCE)                      /*!< Even parity */
-#define UART_PARITY_ODD                     ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))     /*!< Odd parity  */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
-  * @{
-  */
-#define UART_HWCONTROL_NONE                  ((uint32_t)0x00000000U)                          /*!< No hardware control       */
-#define UART_HWCONTROL_RTS                   ((uint32_t)USART_CR3_RTSE)                       /*!< Request To Send           */
-#define UART_HWCONTROL_CTS                   ((uint32_t)USART_CR3_CTSE)                       /*!< Clear To Send             */
-#define UART_HWCONTROL_RTS_CTS               ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))    /*!< Request and Clear To Send */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Mode UART Transfer Mode
-  * @{
-  */
-#define UART_MODE_RX                        ((uint32_t)USART_CR1_RE)                    /*!< RX mode        */ 
-#define UART_MODE_TX                        ((uint32_t)USART_CR1_TE)                    /*!< TX mode        */ 
-#define UART_MODE_TX_RX                     ((uint32_t)(USART_CR1_TE |USART_CR1_RE))    /*!< RX and TX mode */ 
-/**
-  * @}
-  */
-
-/** @defgroup UART_State  UART State
-  * @{
-  */
-#define UART_STATE_DISABLE                  ((uint32_t)0x00000000U)         /*!< UART disabled  */
-#define UART_STATE_ENABLE                   ((uint32_t)USART_CR1_UE)        /*!< UART enabled   */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Over_Sampling UART Over Sampling
-  * @{
-  */
-#define UART_OVERSAMPLING_16                ((uint32_t)0x00000000U)         /*!< Oversampling by 16 */
-#define UART_OVERSAMPLING_8                 ((uint32_t)USART_CR1_OVER8)     /*!< Oversampling by 8  */
-/**
-  * @}
-  */
-
-/** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
-  * @{
-  */
-#define UART_ONE_BIT_SAMPLE_DISABLE         ((uint32_t)0x00000000U)         /*!< One-bit sampling disable */
-#define UART_ONE_BIT_SAMPLE_ENABLE          ((uint32_t)USART_CR3_ONEBIT)    /*!< One-bit sampling enable  */
-/**
-  * @}
-  */
-
-/** @defgroup UART_AutoBaud_Rate_Mode    UART Advanced Feature AutoBaud Rate Mode
-  * @{
-  */
-#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT    ((uint32_t)0x00000000)            /*!< Auto Baud rate detection on start bit            */
-#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0)   /*!< Auto Baud rate detection on falling edge         */
-#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME   ((uint32_t)USART_CR2_ABRMODE_1)   /*!< Auto Baud rate detection on 0x7F frame detection */
-#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME   ((uint32_t)USART_CR2_ABRMODE)     /*!< Auto Baud rate detection on 0x55 frame detection */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut
-  * @{
-  */
-#define UART_RECEIVER_TIMEOUT_DISABLE       ((uint32_t)0x00000000U)                 /*!< UART receiver timeout disable */
-#define UART_RECEIVER_TIMEOUT_ENABLE        ((uint32_t)USART_CR2_RTOEN)             /*!< UART receiver timeout enable  */
-/**
-  * @}
-  */
-
-/** @defgroup UART_LIN    UART Local Interconnection Network mode
-  * @{
-  */
-#define UART_LIN_DISABLE                    ((uint32_t)0x00000000U)                /*!< Local Interconnect Network disable */
-#define UART_LIN_ENABLE                     ((uint32_t)USART_CR2_LINEN)            /*!< Local Interconnect Network enable  */
-/**
-  * @}
-  */
-
-/** @defgroup UART_LIN_Break_Detection  UART LIN Break Detection
-  * @{
-  */
-#define UART_LINBREAKDETECTLENGTH_10B       ((uint32_t)0x00000000U)               /*!< LIN 10-bit break detection length */
-#define UART_LINBREAKDETECTLENGTH_11B       ((uint32_t)USART_CR2_LBDL)            /*!< LIN 11-bit break detection length  */
-/**
-  * @}
-  */
-
-/** @defgroup UART_DMA_Tx    UART DMA Tx
-  * @{
-  */
-#define UART_DMA_TX_DISABLE                 ((uint32_t)0x00000000U)               /*!< UART DMA TX disabled */
-#define UART_DMA_TX_ENABLE                  ((uint32_t)USART_CR3_DMAT)            /*!< UART DMA TX enabled  */
-/**
-  * @}
-  */
-
-/** @defgroup UART_DMA_Rx   UART DMA Rx
-  * @{
-  */
-#define UART_DMA_RX_DISABLE                 ((uint32_t)0x00000000U)                 /*!< UART DMA RX disabled */
-#define UART_DMA_RX_ENABLE                  ((uint32_t)USART_CR3_DMAR)              /*!< UART DMA RX enabled  */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Half_Duplex_Selection  UART Half Duplex Selection
-  * @{
-  */
-#define UART_HALF_DUPLEX_DISABLE            ((uint32_t)0x00000000U)                 /*!< UART half-duplex disabled */
-#define UART_HALF_DUPLEX_ENABLE             ((uint32_t)USART_CR3_HDSEL)             /*!< UART half-duplex enabled  */
-/**
-  * @}
-  */
-
-/** @defgroup UART_WakeUp_Methods   UART WakeUp Methods
-  * @{
-  */
-#define UART_WAKEUPMETHOD_IDLELINE          ((uint32_t)0x00000000U)                 /*!< UART wake-up on idle line    */
-#define UART_WAKEUPMETHOD_ADDRESSMARK       ((uint32_t)USART_CR1_WAKE)              /*!< UART wake-up on address mark */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Request_Parameters UART Request Parameters
-  * @{
-  */
-#define UART_AUTOBAUD_REQUEST               ((uint32_t)USART_RQR_ABRRQ)        /*!< Auto-Baud Rate Request      */
-#define UART_SENDBREAK_REQUEST              ((uint32_t)USART_RQR_SBKRQ)        /*!< Send Break Request          */
-#define UART_MUTE_MODE_REQUEST              ((uint32_t)USART_RQR_MMRQ)         /*!< Mute Mode Request           */
-#define UART_RXDATA_FLUSH_REQUEST           ((uint32_t)USART_RQR_RXFRQ)        /*!< Receive Data flush Request  */
-#define UART_TXDATA_FLUSH_REQUEST           ((uint32_t)USART_RQR_TXFRQ)        /*!< Transmit data flush Request */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Advanced_Features_Initialization_Type  UART Advanced Feature Initialization Type
-  * @{
-  */
-#define UART_ADVFEATURE_NO_INIT                 ((uint32_t)0x00000000U)         /*!< No advanced feature initialization       */
-#define UART_ADVFEATURE_TXINVERT_INIT           ((uint32_t)0x00000001U)         /*!< TX pin active level inversion            */
-#define UART_ADVFEATURE_RXINVERT_INIT           ((uint32_t)0x00000002U)         /*!< RX pin active level inversion            */
-#define UART_ADVFEATURE_DATAINVERT_INIT         ((uint32_t)0x00000004U)         /*!< Binary data inversion                    */
-#define UART_ADVFEATURE_SWAP_INIT               ((uint32_t)0x00000008U)         /*!< TX/RX pins swap                          */
-#define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT   ((uint32_t)0x00000010U)         /*!< RX overrun disable                       */
-#define UART_ADVFEATURE_DMADISABLEONERROR_INIT  ((uint32_t)0x00000020U)         /*!< DMA disable on Reception Error           */
-#define UART_ADVFEATURE_AUTOBAUDRATE_INIT       ((uint32_t)0x00000040U)         /*!< Auto Baud rate detection initialization  */
-#define UART_ADVFEATURE_MSBFIRST_INIT           ((uint32_t)0x00000080U)         /*!< Most significant bit sent/received first */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
-  * @{
-  */
-#define UART_ADVFEATURE_TXINV_DISABLE       ((uint32_t)0x00000000U)             /*!< TX pin active level inversion disable */
-#define UART_ADVFEATURE_TXINV_ENABLE        ((uint32_t)USART_CR2_TXINV)         /*!< TX pin active level inversion enable  */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
-  * @{
-  */
-#define UART_ADVFEATURE_RXINV_DISABLE       ((uint32_t)0x00000000U)             /*!< RX pin active level inversion disable */ 
-#define UART_ADVFEATURE_RXINV_ENABLE        ((uint32_t)USART_CR2_RXINV)         /*!< RX pin active level inversion enable  */ 
-/**
-  * @}
-  */
-
-/** @defgroup UART_Data_Inv  UART Advanced Feature Binary Data Inversion
-  * @{
-  */
-#define UART_ADVFEATURE_DATAINV_DISABLE     ((uint32_t)0x00000000U)             /*!< Binary data inversion disable */
-#define UART_ADVFEATURE_DATAINV_ENABLE      ((uint32_t)USART_CR2_DATAINV)       /*!< Binary data inversion enable  */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
-  * @{
-  */
-#define UART_ADVFEATURE_SWAP_DISABLE        ((uint32_t)0x00000000U)             /*!< TX/RX pins swap disable */
-#define UART_ADVFEATURE_SWAP_ENABLE         ((uint32_t)USART_CR2_SWAP)          /*!< TX/RX pins swap enable  */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Overrun_Disable  UART Advanced Feature Overrun Disable
-  * @{
-  */
-#define UART_ADVFEATURE_OVERRUN_ENABLE      ((uint32_t)0x00000000U)             /*!< RX overrun enable  */ 
-#define UART_ADVFEATURE_OVERRUN_DISABLE     ((uint32_t)USART_CR3_OVRDIS)        /*!< RX overrun disable */ 
-/**
-  * @}
-  */
-
-/** @defgroup UART_AutoBaudRate_Enable  UART Advanced Feature Auto BaudRate Enable
-  * @{
-  */
-#define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE   ((uint32_t)0x00000000U)          /*!< RX Auto Baud rate detection enable  */ 
-#define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE    ((uint32_t)USART_CR2_ABREN)      /*!< RX Auto Baud rate detection disable */ 
-/**
-  * @}
-  */
-
-/** @defgroup UART_DMA_Disable_on_Rx_Error   UART Advanced Feature DMA Disable On Rx Error
-  * @{
-  */
-#define UART_ADVFEATURE_DMA_ENABLEONRXERROR    ((uint32_t)0x00000000U)          /*!< DMA enable on Reception Error  */
-#define UART_ADVFEATURE_DMA_DISABLEONRXERROR   ((uint32_t)USART_CR3_DDRE)       /*!< DMA disable on Reception Error */
-/**
-  * @}
-  */
-
-/** @defgroup UART_MSB_First   UART Advanced Feature MSB First
-  * @{
-  */
-#define UART_ADVFEATURE_MSBFIRST_DISABLE    ((uint32_t)0x00000000U)             /*!< Most significant bit sent/received first disable */
-#define UART_ADVFEATURE_MSBFIRST_ENABLE     ((uint32_t)USART_CR2_MSBFIRST)      /*!< Most significant bit sent/received first enable  */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Stop_Mode_Enable   UART Advanced Feature Stop Mode Enable
-  * @{
-  */
-#define UART_ADVFEATURE_STOPMODE_DISABLE    ((uint32_t)0x00000000U)             /*!< UART stop mode disable */
-#define UART_ADVFEATURE_STOPMODE_ENABLE     ((uint32_t)USART_CR1_UESM)          /*!< UART stop mode enable  */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Mute_Mode   UART Advanced Feature Mute Mode Enable
-  * @{
-  */
-#define UART_ADVFEATURE_MUTEMODE_DISABLE    ((uint32_t)0x00000000U)             /*!< UART mute mode disable */
-#define UART_ADVFEATURE_MUTEMODE_ENABLE     ((uint32_t)USART_CR1_MME)           /*!< UART mute mode enable  */
-/**
-  * @}
-  */
-
-/** @defgroup UART_CR2_ADDRESS_LSB_POS    UART Address-matching LSB Position In CR2 Register
-  * @{
-  */
-#define UART_CR2_ADDRESS_LSB_POS            ((uint32_t) 24U)                    /*!< UART address-matching LSB position in CR2 register */
-/**
-  * @}
-  */
-
-/** @defgroup UART_WakeUp_from_Stop_Selection   UART WakeUp From Stop Selection
-  * @{
-  */
-#define UART_WAKEUP_ON_ADDRESS              ((uint32_t)0x00000000U)             /*!< UART wake-up on address                         */
-#define UART_WAKEUP_ON_STARTBIT             ((uint32_t)USART_CR3_WUS_1)         /*!< UART wake-up on start bit                       */
-#define UART_WAKEUP_ON_READDATA_NONEMPTY    ((uint32_t)USART_CR3_WUS)           /*!< UART wake-up on receive data register not empty */
-/**
-  * @}
-  */
-
-/** @defgroup UART_DriverEnable_Polarity      UART DriverEnable Polarity
-  * @{
-  */
-#define UART_DE_POLARITY_HIGH               ((uint32_t)0x00000000U)             /*!< Driver enable signal is active high */
-#define UART_DE_POLARITY_LOW                ((uint32_t)USART_CR3_DEP)           /*!< Driver enable signal is active low  */
-/**
-  * @}
-  */
-
-/** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS    UART Driver Enable Assertion Time LSB Position In CR1 Register
-  * @{
-  */
-#define UART_CR1_DEAT_ADDRESS_LSB_POS       ((uint32_t) 21U)                    /*!< UART Driver Enable assertion time LSB position in CR1 register */
-/**
-  * @}
-  */
-
-/** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS    UART Driver Enable DeAssertion Time LSB Position In CR1 Register
-  * @{
-  */
-#define UART_CR1_DEDT_ADDRESS_LSB_POS       ((uint32_t) 16U)                    /*!< UART Driver Enable de-assertion time LSB position in CR1 register */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Interruption_Mask    UART Interruptions Flag Mask
-  * @{
-  */
-#define UART_IT_MASK                        ((uint32_t)0x001FU)                 /*!< UART interruptions flags mask */
-/**
-  * @}
-  */
-
-/** @defgroup UART_TimeOut_Value    UART polling-based communications time-out value
-  * @{
-  */
-#define HAL_UART_TIMEOUT_VALUE              0x1FFFFFF                           /*!< UART polling-based communications time-out value */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Flags     UART Status Flags
-  *        Elements values convention: 0xXXXX
-  *           - 0xXXXX  : Flag mask in the ISR register
-  * @{
-  */
-#define UART_FLAG_REACK                     USART_ISR_REACK   /*!< UART receive enable acknowledge flag      */
-#define UART_FLAG_TEACK                     USART_ISR_TEACK   /*!< UART transmit enable acknowledge flag     */
-#define UART_FLAG_WUF                       USART_ISR_WUF     /*!< UART wake-up from stop mode flag          */
-#define UART_FLAG_RWU                       USART_ISR_RWU     /*!< UART receiver wake-up from mute mode flag */
-#define UART_FLAG_SBKF                      USART_ISR_SBKF    /*!< UART send break flag                      */
-#define UART_FLAG_CMF                       USART_ISR_CMF     /*!< UART character match flag                 */
-#define UART_FLAG_BUSY                      USART_ISR_BUSY    /*!< UART busy flag                            */
-#define UART_FLAG_ABRF                      USART_ISR_ABRF    /*!< UART auto Baud rate flag                  */
-#define UART_FLAG_ABRE                      USART_ISR_ABRE    /*!< UART auto Baud rate error                 */
-#define UART_FLAG_EOBF                      USART_ISR_EOBF    /*!< UART end of block flag                    */
-#define UART_FLAG_RTOF                      USART_ISR_RTOF    /*!< UART receiver timeout flag                */
-#define UART_FLAG_CTS                       USART_ISR_CTS     /*!< UART clear to send flag                   */
-#define UART_FLAG_CTSIF                     USART_ISR_CTSIF   /*!< UART clear to send interrupt flag         */
-#define UART_FLAG_LBDF                      USART_ISR_LBDF    /*!< UART LIN break detection flag             */
-#define UART_FLAG_TXE                       USART_ISR_TXE     /*!< UART transmit data register empty         */
-#define UART_FLAG_TC                        USART_ISR_TC      /*!< UART transmission complete                */
-#define UART_FLAG_RXNE                      USART_ISR_RXNE    /*!< UART read data register not empty         */
-#define UART_FLAG_IDLE                      USART_ISR_IDLE    /*!< UART idle flag                            */
-#define UART_FLAG_ORE                       USART_ISR_ORE     /*!< UART overrun error                        */
-#define UART_FLAG_NE                        USART_ISR_NE      /*!< UART noise error                          */
-#define UART_FLAG_FE                        USART_ISR_FE      /*!< UART frame error                          */
-#define UART_FLAG_PE                        USART_ISR_PE      /*!< UART parity error                         */
-/**
-  * @}
-  */
-
-/** @defgroup UART_Interrupt_definition   UART Interrupts Definition
-  *        Elements values convention: 000ZZZZZ0XXYYYYYb
-  *           - YYYYY  : Interrupt source position in the XX register (5bits)
-  *           - XX  : Interrupt source register (2bits)
-  *                 - 01: CR1 register
-  *                 - 10: CR2 register
-  *                 - 11: CR3 register
-  *           - ZZZZZ  : Flag position in the ISR register(5bits)
-  * @{
-  */
-#define UART_IT_PE                          ((uint32_t)0x0028)                  /*!< UART parity error interruption                 */
-#define UART_IT_TXE                         ((uint32_t)0x0727)                  /*!< UART transmit data register empty interruption */
-#define UART_IT_TC                          ((uint32_t)0x0626)                  /*!< UART transmission complete interruption        */
-#define UART_IT_RXNE                        ((uint32_t)0x0525)                  /*!< UART read data register not empty interruption */
-#define UART_IT_IDLE                        ((uint32_t)0x0424)                  /*!< UART idle interruption                         */
-#define UART_IT_LBD                         ((uint32_t)0x0846)                  /*!< UART LIN break detection interruption          */
-#define UART_IT_CTS                         ((uint32_t)0x096A)                  /*!< UART CTS interruption                          */
-#define UART_IT_CM                          ((uint32_t)0x112E)                  /*!< UART character match interruption              */
-#define UART_IT_WUF                         ((uint32_t)0x1476)                  /*!< UART wake-up from stop mode interruption       */
-
-/**       Elements values convention: 000000000XXYYYYYb
-  *           - YYYYY  : Interrupt source position in the XX register (5bits)
-  *           - XX  : Interrupt source register (2bits)
-  *                 - 01: CR1 register
-  *                 - 10: CR2 register
-  *                 - 11: CR3 register
-  */
-#define UART_IT_ERR                         ((uint32_t)0x0060)                  /*!< UART error interruption         */   
-
-/**       Elements values convention: 0000ZZZZ00000000b
-  *           - ZZZZ  : Flag position in the ISR register(4bits)
-  */
-#define UART_IT_ORE                         ((uint32_t)0x0300)                  /*!< UART overrun error interruption */ 
-#define UART_IT_NE                          ((uint32_t)0x0200)                  /*!< UART noise error interruption   */ 
-#define UART_IT_FE                          ((uint32_t)0x0100)                  /*!< UART frame error interruption   */ 
-/**
-  * @}
-  */
-
-/** @defgroup UART_IT_CLEAR_Flags  UART Interruption Clear Flags
-  * @{
-  */
-#define UART_CLEAR_PEF                       USART_ICR_PECF            /*!< Parity Error Clear Flag           */
-#define UART_CLEAR_FEF                       USART_ICR_FECF            /*!< Framing Error Clear Flag          */
-#define UART_CLEAR_NEF                       USART_ICR_NCF             /*!< Noise detected Clear Flag         */
-#define UART_CLEAR_OREF                      USART_ICR_ORECF           /*!< Overrun Error Clear Flag          */
-#define UART_CLEAR_IDLEF                     USART_ICR_IDLECF          /*!< IDLE line detected Clear Flag     */
-#define UART_CLEAR_TCF                       USART_ICR_TCCF            /*!< Transmission Complete Clear Flag  */
-#define UART_CLEAR_LBDF                      USART_ICR_LBDCF           /*!< LIN Break Detection Clear Flag    */
-#define UART_CLEAR_CTSF                      USART_ICR_CTSCF           /*!< CTS Interrupt Clear Flag          */
-#define UART_CLEAR_RTOF                      USART_ICR_RTOCF           /*!< Receiver Time Out Clear Flag      */
-#define UART_CLEAR_EOBF                      USART_ICR_EOBCF           /*!< End Of Block Clear Flag           */
-#define UART_CLEAR_CMF                       USART_ICR_CMCF            /*!< Character Match Clear Flag        */
-#define UART_CLEAR_WUF                       USART_ICR_WUCF            /*!< Wake Up from stop mode Clear Flag */
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-/* Exported macros -----------------------------------------------------------*/
-/** @defgroup UART_Exported_Macros UART Exported Macros
-  * @{
-  */
-
-/** @brief  Reset UART handle states.
-  * @param  __HANDLE__: UART handle.
-  * @retval None
-  */
-#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__)  do{                                                   \
-                                                       (__HANDLE__)->gState = HAL_UART_STATE_RESET;      \
-                                                       (__HANDLE__)->RxState = HAL_UART_STATE_RESET;     \
-                                                     } while(0)
-/** @brief  Flush the UART Data registers.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @retval None
-  */
-#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__)  \
-  do{                \
-      SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
-      SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
-    }  while(0)
-
-/** @brief  Clear the specified UART pending flag.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @param  __FLAG__: specifies the flag to check.
-  *          This parameter can be any combination of the following values:
-  *            @arg @ref UART_CLEAR_PEF      Parity Error Clear Flag           
-  *            @arg @ref UART_CLEAR_FEF      Framing Error Clear Flag          
-  *            @arg @ref UART_CLEAR_NEF      Noise detected Clear Flag         
-  *            @arg @ref UART_CLEAR_OREF     Overrun Error Clear Flag          
-  *            @arg @ref UART_CLEAR_IDLEF    IDLE line detected Clear Flag     
-  *            @arg @ref UART_CLEAR_TCF      Transmission Complete Clear Flag  
-  *            @arg @ref UART_CLEAR_LBDF     LIN Break Detection Clear Flag
-  *            @arg @ref UART_CLEAR_CTSF     CTS Interrupt Clear Flag          
-  *            @arg @ref UART_CLEAR_RTOF     Receiver Time Out Clear Flag      
-  *            @arg @ref UART_CLEAR_EOBF     End Of Block Clear Flag
-  *            @arg @ref UART_CLEAR_CMF      Character Match Clear Flag        
-  *            @arg @ref UART_CLEAR_WUF      Wake Up from stop mode Clear Flag 
-  * @retval None
-  */
-#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
-
-/** @brief  Clear the UART PE pending flag.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @retval None
-  */
-#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__)   __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF)
-
-/** @brief  Clear the UART FE pending flag.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @retval None
-  */
-#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__)   __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF)
-
-/** @brief  Clear the UART NE pending flag.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @retval None
-  */
-#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__)  __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF)
-
-/** @brief  Clear the UART ORE pending flag.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @retval None
-  */
-#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__)   __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF)
-
-/** @brief  Clear the UART IDLE pending flag.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @retval None
-  */
-#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__)   __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF)
-
-/** @brief  Check whether the specified UART flag is set or not.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @param  __FLAG__: specifies the flag to check.
-  *        This parameter can be one of the following values:
-  *            @arg @ref UART_FLAG_REACK Receive enable acknowledge flag
-  *            @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag
-  *            @arg @ref UART_FLAG_WUF   Wake up from stop mode flag
-  *            @arg @ref UART_FLAG_RWU   Receiver wake up flag (if the UART in mute mode)
-  *            @arg @ref UART_FLAG_SBKF  Send Break flag
-  *            @arg @ref UART_FLAG_CMF   Character match flag
-  *            @arg @ref UART_FLAG_BUSY  Busy flag
-  *            @arg @ref UART_FLAG_ABRF  Auto Baud rate detection flag
-  *            @arg @ref UART_FLAG_ABRE  Auto Baud rate detection error flag
-  *            @arg @ref UART_FLAG_EOBF  End of block flag
-  *            @arg @ref UART_FLAG_RTOF  Receiver timeout flag
-  *            @arg @ref UART_FLAG_CTS   CTS Change flag
-  *            @arg @ref UART_FLAG_LBDF  LIN Break detection flag
-  *            @arg @ref UART_FLAG_TXE   Transmit data register empty flag
-  *            @arg @ref UART_FLAG_TC    Transmission Complete flag
-  *            @arg @ref UART_FLAG_RXNE  Receive data register not empty flag
-  *            @arg @ref UART_FLAG_IDLE  Idle Line detection flag
-  *            @arg @ref UART_FLAG_ORE   Overrun Error flag
-  *            @arg @ref UART_FLAG_NE    Noise Error flag
-  *            @arg @ref UART_FLAG_FE    Framing Error flag
-  *            @arg @ref UART_FLAG_PE    Parity Error flag
-  * @retval The new state of __FLAG__ (TRUE or FALSE).
-  */
-#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
-
-/** @brief  Enable the specified UART interrupt.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @param  __INTERRUPT__: specifies the UART interrupt source to enable.
-  *          This parameter can be one of the following values:
-  *            @arg @ref UART_IT_WUF  Wakeup from stop mode interrupt
-  *            @arg @ref UART_IT_CM   Character match interrupt
-  *            @arg @ref UART_IT_CTS  CTS change interrupt
-  *            @arg @ref UART_IT_LBD  LIN Break detection interrupt
-  *            @arg @ref UART_IT_TXE  Transmit Data Register empty interrupt
-  *            @arg @ref UART_IT_TC   Transmission complete interrupt
-  *            @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
-  *            @arg @ref UART_IT_IDLE Idle line detection interrupt
-  *            @arg @ref UART_IT_PE   Parity Error interrupt
-  *            @arg @ref UART_IT_ERR  Error interrupt (Frame error, noise error, overrun error)
-  * @retval None
-  */
-#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__)   (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
-                                                           ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
-                                                           ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
-
-
-/** @brief  Disable the specified UART interrupt.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @param  __INTERRUPT__: specifies the UART interrupt source to disable.
-  *          This parameter can be one of the following values:
-  *            @arg @ref UART_IT_WUF  Wakeup from stop mode interrupt
-  *            @arg @ref UART_IT_CM   Character match interrupt
-  *            @arg @ref UART_IT_CTS  CTS change interrupt
-  *            @arg @ref UART_IT_LBD  LIN Break detection interrupt
-  *            @arg @ref UART_IT_TXE  Transmit Data Register empty interrupt
-  *            @arg @ref UART_IT_TC   Transmission complete interrupt
-  *            @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
-  *            @arg @ref UART_IT_IDLE Idle line detection interrupt
-  *            @arg @ref UART_IT_PE   Parity Error interrupt
-  *            @arg @ref UART_IT_ERR  Error interrupt (Frame error, noise error, overrun error)
-  * @retval None
-  */
-#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__)  (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
-                                                           ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
-                                                           ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
-
-/** @brief  Check whether the specified UART interrupt has occurred or not.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @param  __IT__: specifies the UART interrupt to check.
-  *          This parameter can be one of the following values:
-  *            @arg @ref UART_IT_WUF  Wakeup from stop mode interrupt
-  *            @arg @ref UART_IT_CM   Character match interrupt
-  *            @arg @ref UART_IT_CTS  CTS change interrupt
-  *            @arg @ref UART_IT_LBD  LIN Break detection interrupt
-  *            @arg @ref UART_IT_TXE  Transmit Data Register empty interrupt
-  *            @arg @ref UART_IT_TC   Transmission complete interrupt
-  *            @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
-  *            @arg @ref UART_IT_IDLE Idle line detection interrupt
-  *            @arg @ref UART_IT_ORE  Overrun Error interrupt
-  *            @arg @ref UART_IT_NE   Noise Error interrupt   
-  *            @arg @ref UART_IT_FE   Framing Error interrupt   
-  *            @arg @ref UART_IT_PE   Parity Error interrupt
-  * @retval The new state of __IT__ (TRUE or FALSE).
-  */
-#define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1U << ((__IT__)>> 0x08U)))
-
-/** @brief  Check whether the specified UART interrupt source is enabled or not.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @param  __IT__: specifies the UART interrupt source to check.
-  *          This parameter can be one of the following values:
-  *            @arg @ref UART_IT_WUF  Wakeup from stop mode interrupt
-  *            @arg @ref UART_IT_CM   Character match interrupt  
-  *            @arg @ref UART_IT_CTS  CTS change interrupt
-  *            @arg @ref UART_IT_LBD  LIN Break detection interrupt
-  *            @arg @ref UART_IT_TXE  Transmit Data Register empty interrupt
-  *            @arg @ref UART_IT_TC   Transmission complete interrupt
-  *            @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
-  *            @arg @ref UART_IT_IDLE Idle line detection interrupt
-  *            @arg @ref UART_IT_ERR  Error interrupt (Frame error, noise error, overrun error)
-  *            @arg @ref UART_IT_PE   Parity Error interrupt
-  * @retval The new state of __IT__ (TRUE or FALSE).
-  */
-#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2U)? \
-                                                       (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1U << (((uint16_t)(__IT__)) & UART_IT_MASK)))
-
-/** @brief  Clear the specified UART ISR flag, in setting the proper ICR register flag.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @param  __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
-  *                       to clear the corresponding interrupt
-  *          This parameter can be one of the following values:
-  *            @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
-  *            @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
-  *            @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
-  *            @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
-  *            @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
-  *            @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
-  *            @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
-  *            @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
-  *            @arg @ref UART_CLEAR_RTOF Receiver Time Out Clear Flag
-  *            @arg @ref UART_CLEAR_EOBF End Of Block Clear Flag
-  *            @arg @ref UART_CLEAR_CMF Character Match Clear Flag
-  *            @arg @ref UART_CLEAR_WUF  Wake Up from stop mode Clear Flag
-  * @retval None
-  */
-#define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
-
-/** @brief  Set a specific UART request flag.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @param  __REQ__: specifies the request flag to set
-  *          This parameter can be one of the following values:
-  *            @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request
-  *            @arg @ref UART_SENDBREAK_REQUEST Send Break Request
-  *            @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request
-  *            @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request
-  *            @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request
-  * @retval None
-  */
-#define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint32_t)(__REQ__))
-
-/** @brief  Enable the UART one bit sample method.
-  * @param  __HANDLE__: specifies the UART Handle.  
-  * @retval None
-  */     
-#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
-
-/** @brief  Disable the UART one bit sample method.
-  * @param  __HANDLE__: specifies the UART Handle.  
-  * @retval None
-  */      
-#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
-
-/** @brief  Enable UART.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @retval None
-  */
-#define __HAL_UART_ENABLE(__HANDLE__)                   ((__HANDLE__)->Instance->CR1 |=  USART_CR1_UE)
-
-/** @brief  Disable UART.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @retval None
-  */
-#define __HAL_UART_DISABLE(__HANDLE__)                  ((__HANDLE__)->Instance->CR1 &=  ~USART_CR1_UE)
-
-/** @brief  Enable CTS flow control.
-  * @note   This macro allows to enable CTS hardware flow control for a given UART instance, 
-  *         without need to call HAL_UART_Init() function.
-  *         As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
-  * @note   As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
-  *         for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
-  *           - UART instance should have already been initialised (through call of HAL_UART_Init() )
-  *           - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
-  *             and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).                                                                                                                  
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @retval None
-  */
-#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__)        \
-  do{                                                      \
-    SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE);  \
-    (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE;        \
-  } while(0)
-
-/** @brief  Disable CTS flow control.
-  * @note   This macro allows to disable CTS hardware flow control for a given UART instance, 
-  *         without need to call HAL_UART_Init() function.
-  *         As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
-  * @note   As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
-  *         for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
-  *           - UART instance should have already been initialised (through call of HAL_UART_Init() )
-  *           - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
-  *             and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @retval None
-  */
-#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__)        \
-  do{                                                       \
-    CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
-    (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE);      \
-  } while(0)
-
-/** @brief  Enable RTS flow control.
-  * @note   This macro allows to enable RTS hardware flow control for a given UART instance, 
-  *         without need to call HAL_UART_Init() function.
-  *         As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
-  * @note   As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
-  *         for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
-  *           - UART instance should have already been initialised (through call of HAL_UART_Init() )
-  *           - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
-  *             and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @retval None
-  */
-#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__)       \
-  do{                                                     \
-    SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
-    (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE;       \
-  } while(0)
-
-/** @brief  Disable RTS flow control.
-  * @note   This macro allows to disable RTS hardware flow control for a given UART instance, 
-  *         without need to call HAL_UART_Init() function.
-  *         As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
-  * @note   As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
-  *         for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
-  *           - UART instance should have already been initialised (through call of HAL_UART_Init() )
-  *           - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
-  *             and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @retval None
-  */
-#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__)       \
-  do{                                                      \
-    CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
-    (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE);     \
-  } while(0)
-
-/** @brief  macros to enable the UART's one bit sampling method
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @retval None
-  */
-#define __HAL_UART_ONE_BIT_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
-
-/** @brief  macros to disable the UART's one bit sampling method
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @retval None
-  */
-#define __HAL_UART_ONE_BIT_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
-
-
-/**
-  * @}
-  */
-
-/* Private macros --------------------------------------------------------*/
-/** @defgroup UART_Private_Macros   UART Private Macros
-  * @{
-  */
-/** @brief  BRR division operation to set BRR register with LPUART.
-  * @param  __PCLK__: LPUART clock.
-  * @param  __BAUD__: Baud rate set by the user.
-  * @retval Division result
-  */
-#define UART_DIV_LPUART(__PCLK__, __BAUD__)      ((((uint64_t)(__PCLK__)*256U) + ((__BAUD__)/2U)) / (__BAUD__))
-
-/** @brief  BRR division operation to set BRR register in 8-bit oversampling mode.
-  * @param  __PCLK__: UART clock.
-  * @param  __BAUD__: Baud rate set by the user.
-  * @retval Division result
-  */
-#define UART_DIV_SAMPLING8(__PCLK__, __BAUD__)   ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__))
-
-/** @brief  BRR division operation to set BRR register in 16-bit oversampling mode.
-  * @param  __PCLK__: UART clock.
-  * @param  __BAUD__: Baud rate set by the user.
-  * @retval Division result
-  */
-#define UART_DIV_SAMPLING16(__PCLK__, __BAUD__)  (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__))
-
-/** @brief  Check whether or not UART instance is Low Power UART.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @retval SET (instance is LPUART) or RESET (instance isn't LPUART)
-  */
-#define UART_INSTANCE_LOWPOWER(__HANDLE__) (((__HANDLE__)->Instance == LPUART1) ? SET : RESET )
-
-/** @brief  Check UART Baud rate.
-  * @param  __BAUDRATE__: Baudrate specified by the user.
-  *         The maximum Baud Rate is derived from the maximum clock on L0 (i.e. 32 MHz)
-  *         divided by the smallest oversampling used on the USART (i.e. 8)
-  * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
-  */
-#define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 4000001)
-
-/** @brief  Check UART byte address
-  * @param  ADDRESS: UART 8-bit address for wake-up process scheme
-  * @retval Test result (TRUE or FALSE).
-  */
-#define IS_UART_7B_ADDRESS(ADDRESS) ((ADDRESS) <= 0x7F)
-
-/** @brief  Check UART 4-bit address
-  * @param  ADDRESS: UART 4-bit address for wake-up process scheme
-  * @retval Test result (TRUE or FALSE).
-  */
-#define IS_UART_4B_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
-
-/** @brief  Check UART assertion time.
-  * @param  __TIME__: 5-bit value assertion time.
-  * @retval Test result (TRUE or FALSE).
-  */
-#define IS_UART_ASSERTIONTIME(__TIME__)    ((__TIME__) <= 0x1F)
-
-/** @brief  Check UART deassertion time.
-  * @param  __TIME__: 5-bit value deassertion time.
-  * @retval Test result (TRUE or FALSE).
-  */
-#define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1F)
-
-/**
-  * @brief Ensure that UART frame number of stop bits is valid.
-  * @param __STOPBITS__: UART frame number of stop bits. 
-  * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
-  */
-#define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1)   || \
-                                        ((__STOPBITS__) == UART_STOPBITS_1_5) || \
-                                        ((__STOPBITS__) == UART_STOPBITS_2))
-
-/**
-  * @brief Ensure that LPUART frame number of stop bits is valid.
-  * @param __STOPBITS__: LPUART frame number of stop bits. 
-  * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
-  */ 
-#define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \
-                                          ((__STOPBITS__) == UART_STOPBITS_2))
-
-/**
-  * @brief Ensure that UART frame parity is valid.
-  * @param __PARITY__: UART frame parity. 
-  * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
-  */ 
-#define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \
-                                    ((__PARITY__) == UART_PARITY_EVEN) || \
-                                    ((__PARITY__) == UART_PARITY_ODD))
-
-/**
-  * @brief Ensure that UART hardware flow control is valid.
-  * @param __CONTROL__: UART hardware flow control. 
-  * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid)
-  */ 
-#define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\
-                                   (((__CONTROL__) == UART_HWCONTROL_NONE) || \
-                                    ((__CONTROL__) == UART_HWCONTROL_RTS)  || \
-                                    ((__CONTROL__) == UART_HWCONTROL_CTS)  || \
-                                    ((__CONTROL__) == UART_HWCONTROL_RTS_CTS))
-
-/**
-  * @brief Ensure that UART communication mode is valid.
-  * @param __MODE__: UART communication mode. 
-  * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
-  */ 
-#define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == (uint32_t)0x00U) && ((__MODE__) != (uint32_t)0x00U))
-
-/**
-  * @brief Ensure that UART state is valid.
-  * @param __STATE__: UART state. 
-  * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
-  */ 
-#define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \
-                                  ((__STATE__) == UART_STATE_ENABLE))
-
-/**
-  * @brief Ensure that UART oversampling is valid.
-  * @param __SAMPLING__: UART oversampling. 
-  * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
-  */ 
-#define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \
-                                            ((__SAMPLING__) == UART_OVERSAMPLING_8))
-
-/**
-  * @brief Ensure that UART frame sampling is valid.
-  * @param __ONEBIT__: UART frame sampling. 
-  * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
-  */
-#define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \
-                                            ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE))
-
-/**
-  * @brief Ensure that UART auto Baud rate detection mode is valid.
-  * @param __MODE__: UART auto Baud rate detection mode. 
-  * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
-  */
-#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__)  (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT)    || \
-                                                        ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \
-                                                        ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME)   || \
-                                                        ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
-
-/**
-  * @brief Ensure that UART receiver timeout setting is valid.
-  * @param __TIMEOUT__: UART receiver timeout setting. 
-  * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid)
-  */
-#define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \
-                                               ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE))
-
-/**
-  * @brief Ensure that UART LIN state is valid.
-  * @param __LIN__: UART LIN state. 
-  * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid)
-  */
-#define IS_UART_LIN(__LIN__)        (((__LIN__) == UART_LIN_DISABLE) || \
-                                     ((__LIN__) == UART_LIN_ENABLE))
-
-/**
-  * @brief Ensure that UART LIN break detection length is valid.
-  * @param __LENGTH__: UART LIN break detection length. 
-  * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
-  */
-#define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \
-                                                     ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B))
-
-/**
-  * @brief Ensure that UART DMA TX state is valid.
-  * @param __DMATX__: UART DMA TX state. 
-  * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
-  */
-#define IS_UART_DMA_TX(__DMATX__)     (((__DMATX__) == UART_DMA_TX_DISABLE) || \
-                                       ((__DMATX__) == UART_DMA_TX_ENABLE))
-
-/**
-  * @brief Ensure that UART DMA RX state is valid.
-  * @param __DMARX__: UART DMA RX state. 
-  * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
-  */
-#define IS_UART_DMA_RX(__DMARX__)     (((__DMARX__) == UART_DMA_RX_DISABLE) || \
-                                       ((__DMARX__) == UART_DMA_RX_ENABLE))
-
-/**
-  * @brief Ensure that UART half-duplex state is valid.
-  * @param __HDSEL__: UART half-duplex state. 
-  * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid)
-  */
-#define IS_UART_HALF_DUPLEX(__HDSEL__)     (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \
-                                            ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE))
-
-/**
-  * @brief Ensure that UART wake-up method is valid.
-  * @param __WAKEUP__: UART wake-up method . 
-  * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid)
-  */
-#define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \
-                                          ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK))
-
-/**
-  * @brief Ensure that UART request parameter is valid.
-  * @param __PARAM__: UART request parameter. 
-  * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
-  */
-#define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST)     || \
-                                              ((__PARAM__) == UART_SENDBREAK_REQUEST)    || \
-                                              ((__PARAM__) == UART_MUTE_MODE_REQUEST)    || \
-                                              ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \
-                                              ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST))
-
-/**
-  * @brief Ensure that UART advanced features initialization is valid.
-  * @param __INIT__: UART advanced features initialization. 
-  * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid)
-  */
-#define IS_UART_ADVFEATURE_INIT(__INIT__)   ((__INIT__) <= (UART_ADVFEATURE_NO_INIT                | \
-                                                            UART_ADVFEATURE_TXINVERT_INIT          | \
-                                                            UART_ADVFEATURE_RXINVERT_INIT          | \
-                                                            UART_ADVFEATURE_DATAINVERT_INIT        | \
-                                                            UART_ADVFEATURE_SWAP_INIT              | \
-                                                            UART_ADVFEATURE_RXOVERRUNDISABLE_INIT  | \
-                                                            UART_ADVFEATURE_DMADISABLEONERROR_INIT | \
-                                                            UART_ADVFEATURE_AUTOBAUDRATE_INIT      | \
-                                                            UART_ADVFEATURE_MSBFIRST_INIT))
-
-/**
-  * @brief Ensure that UART frame TX inversion setting is valid.
-  * @param __TXINV__: UART frame TX inversion setting. 
-  * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid)
-  */
-#define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \
-                                             ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE))
-
-/**
-  * @brief Ensure that UART frame RX inversion setting is valid.
-  * @param __RXINV__: UART frame RX inversion setting. 
-  * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid)
-  */
-#define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \
-                                             ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE))
-
-/**
-  * @brief Ensure that UART frame data inversion setting is valid.
-  * @param __DATAINV__: UART frame data inversion setting. 
-  * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid)
-  */
-#define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \
-                                                 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE))
-
-/**
-  * @brief Ensure that UART frame RX/TX pins swap setting is valid.
-  * @param __SWAP__: UART frame RX/TX pins swap setting. 
-  * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid)
-  */
-#define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \
-                                           ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE))
-
-/**
-  * @brief Ensure that UART frame overrun setting is valid.
-  * @param __OVERRUN__: UART frame overrun setting. 
-  * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid)
-  */
-#define IS_UART_OVERRUN(__OVERRUN__)     (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \
-                                          ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE))
-
-/**
-  * @brief Ensure that UART auto Baud rate state is valid.
-  * @param __AUTOBAUDRATE__: UART auto Baud rate state. 
-  * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid)
-  */
-#define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__)  (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \
-                                                            ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
-
-/**
-  * @brief Ensure that UART DMA enabling or disabling on error setting is valid.
-  * @param __DMA__: UART DMA enabling or disabling on error setting. 
-  * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid)
-  */
-#define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__)  (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \
-                                                   ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
-
-/**
-  * @brief Ensure that UART frame MSB first setting is valid.
-  * @param __MSBFIRST__: UART frame MSB first setting. 
-  * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid)
-  */
-#define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \
-                                                   ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE))
-
-/**
-  * @brief Ensure that UART stop mode state is valid.
-  * @param __STOPMODE__: UART stop mode state. 
-  * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid)
-  */
-#define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \
-                                                   ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE))
-
-/**
-  * @brief Ensure that UART mute mode state is valid.
-  * @param __MUTE__: UART mute mode state. 
-  * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid)
-  */
-#define IS_UART_MUTE_MODE(__MUTE__)       (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \
-                                           ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE))
-
-/**
-  * @brief Ensure that UART wake-up selection is valid.
-  * @param __WAKE__: UART wake-up selection. 
-  * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid)
-  */
-#define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \
-                                            ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \
-                                            ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY))
-
-/**
-  * @brief Ensure that UART driver enable polarity is valid.
-  * @param __POLARITY__: UART driver enable polarity. 
-  * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid)
-  */
-#define IS_UART_DE_POLARITY(__POLARITY__)    (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \
-                                              ((__POLARITY__) == UART_DE_POLARITY_LOW))
-
-/**
-  * @}
-  */
-
-/* Include UART HAL Extended module */
-#include "stm32l0xx_hal_uart_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup UART_Exported_Functions UART Exported Functions
-  * @{
-  */
-
-/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
-  * @{
-  */
-
-/* Initialization and de-initialization functions  ****************************/
-HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
-HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
-HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
-void HAL_UART_MspInit(UART_HandleTypeDef *huart);
-void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
-
-/**
-  * @}
-  */
-
-/** @addtogroup UART_Exported_Functions_Group2 IO operation functions
-  * @{
-  */
-
-/* IO operation functions *****************************************************/
-HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
-/* Transfer Abort functions */
-HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
-
-void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
-void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
-void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
-void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
-void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
-void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
-void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart);
-void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart);
-void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart);
-
-/**
-  * @}
-  */
-
-/** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
-  * @{
-  */
-
-/* Peripheral Control functions  ************************************************/
-HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
-void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
-
-/**
-  * @}
-  */
-
-/** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
-  * @{
-  */
-
-/* Peripheral State and Errors functions  **************************************************/
-HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
-uint32_t              HAL_UART_GetError(UART_HandleTypeDef *huart);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Private functions -----------------------------------------------------------*/
-/** @addtogroup UART_Private_Functions UART Private Functions
-  * @{
-  */
-
-HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
-void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_UART_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
deleted file mode 100755
index 2844fca9..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h
+++ /dev/null
@@ -1,437 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_uart_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of UART HAL Extended module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_UART_EX_H
-#define __STM32L0xx_HAL_UART_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup UARTEx
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup UARTEx_Exported_Types UARTEx Exported Types
-  * @{
-  */
-
-/**
-  * @brief  UART wake up from stop mode parameters
-  */
-typedef struct
-{
-  uint32_t WakeUpEvent;        /*!< Specifies which event will activat the Wakeup from Stop mode flag (WUF).
-                                    This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection.
-                                    If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must
-                                    be filled up. */
-
-  uint16_t AddressLength;      /*!< Specifies whether the address is 4 or 7-bit long.
-                                    This parameter can be a value of @ref UARTEx_WakeUp_Address_Length.  */
-
-  uint8_t Address;             /*!< UART/USART node address (7-bit long max). */
-} UART_WakeUpTypeDef;
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants
-  * @{
-  */
-
-/** @defgroup UARTEx_Word_Length UART Word Length
-  * @{
-  */
-#define UART_WORDLENGTH_7B                  ((uint32_t)USART_CR1_M1)   /*!< 7-bit long UART frame */
-#define UART_WORDLENGTH_8B                  ((uint32_t)0x00000000U)    /*!< 8-bit long UART frame */
-#define UART_WORDLENGTH_9B                  ((uint32_t)USART_CR1_M0)   /*!< 9-bit long UART frame */
-/**
-  * @}
-  */
-  
-/** @defgroup UARTEx_WakeUp_Address_Length UART Extended WakeUp Address Length
-  * @{
-  */
-#define UART_ADDRESS_DETECT_4B              ((uint32_t)0x00000000U)      /*!< 4-bit long wake-up address */
-#define UART_ADDRESS_DETECT_7B              ((uint32_t)USART_CR2_ADDM7)  /*!< 7-bit long wake-up address */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macros -----------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup UARTEx_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup UARTEx_Exported_Functions_Group1
-  * @{
-  */
-
-/* Initialization and de-initialization functions  ****************************/
-HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime);
-
-/**
-  * @}
-  */
-
-/* IO operation functions *****************************************************/
-
-/** @addtogroup UARTEx_Exported_Functions_Group3
-  * @{
-  */
-
-/* Peripheral Control functions  **********************************************/
-HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
-HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
-HAL_StatusTypeDef HAL_UARTEx_EnableClockStopMode(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UARTEx_DisableClockStopMode(UART_HandleTypeDef *huart);
-void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup UARTEx_Private_Macros UARTEx Private Macros
-  * @{
-  */
-
-/** @brief  Report the UART clock source.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @param  __CLOCKSOURCE__: output variable.
-  * @retval UART clocking source, written in __CLOCKSOURCE__.
-  */
-#if defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
-#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__)       \
-  do {                                                        \
-    if((__HANDLE__)->Instance == USART2)                      \
-    {                                                         \
-       switch(__HAL_RCC_GET_USART2_SOURCE())                  \
-       {                                                      \
-        case RCC_USART2CLKSOURCE_PCLK1:                       \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1;         \
-          break;                                              \
-        case RCC_USART2CLKSOURCE_HSI:                         \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI;           \
-          break;                                              \
-        case RCC_USART2CLKSOURCE_SYSCLK:                      \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK;        \
-          break;                                              \
-        case RCC_USART2CLKSOURCE_LSE:                         \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE;           \
-          break;                                              \
-        default:                                              \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED;     \
-          break;                                              \
-       }                                                      \
-    }                                                         \
-    else if((__HANDLE__)->Instance == LPUART1)                \
-    {                                                         \
-       switch(__HAL_RCC_GET_LPUART1_SOURCE())                 \
-       {                                                      \
-        case RCC_LPUART1CLKSOURCE_PCLK1:                      \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1;         \
-          break;                                              \
-        case RCC_LPUART1CLKSOURCE_HSI:                        \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI;           \
-          break;                                              \
-        case RCC_LPUART1CLKSOURCE_SYSCLK:                     \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK;        \
-          break;                                              \
-        case RCC_LPUART1CLKSOURCE_LSE:                        \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE;           \
-          break;                                              \
-        default:                                              \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED;     \
-          break;                                              \
-       }                                                      \
-    }                                                         \
-  } while(0)
-
-#elif defined (STM32L051xx) || defined (STM32L052xx) || defined (STM32L053xx) || defined (STM32L061xx)  || defined (STM32L062xx) || defined (STM32L063xx)
-
-#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__)       \
-  do {                                                        \
-    if((__HANDLE__)->Instance == USART1)                      \
-    {                                                         \
-       switch(__HAL_RCC_GET_USART1_SOURCE())                  \
-       {                                                      \
-        case RCC_USART1CLKSOURCE_PCLK2:                       \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2;         \
-          break;                                              \
-        case RCC_USART1CLKSOURCE_HSI:                         \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI;           \
-          break;                                              \
-        case RCC_USART1CLKSOURCE_SYSCLK:                      \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK;        \
-          break;                                              \
-        case RCC_USART1CLKSOURCE_LSE:                         \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE;           \
-          break;                                              \
-        default:                                              \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED;     \
-          break;                                              \
-       }                                                      \
-    }                                                         \
-    else if((__HANDLE__)->Instance == USART2)                 \
-    {                                                         \
-       switch(__HAL_RCC_GET_USART2_SOURCE())                  \
-       {                                                      \
-        case RCC_USART2CLKSOURCE_PCLK1:                       \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1;         \
-          break;                                              \
-        case RCC_USART2CLKSOURCE_HSI:                         \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI;           \
-          break;                                              \
-        case RCC_USART2CLKSOURCE_SYSCLK:                      \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK;        \
-          break;                                              \
-        case RCC_USART2CLKSOURCE_LSE:                         \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE;           \
-          break;                                              \
-        default:                                              \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED;     \
-          break;                                              \
-       }                                                      \
-    }                                                         \
-    else if((__HANDLE__)->Instance == LPUART1)                \
-    {                                                         \
-       switch(__HAL_RCC_GET_LPUART1_SOURCE())                 \
-       {                                                      \
-        case RCC_LPUART1CLKSOURCE_PCLK1:                      \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1;         \
-          break;                                              \
-        case RCC_LPUART1CLKSOURCE_HSI:                        \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI;           \
-          break;                                              \
-        case RCC_LPUART1CLKSOURCE_SYSCLK:                     \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK;        \
-          break;                                              \
-        case RCC_LPUART1CLKSOURCE_LSE:                        \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE;           \
-          break;                                              \
-        default:                                              \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED;     \
-          break;                                              \
-       }                                                      \
-    }                                                         \
-  } while(0)
-
-#else
-
-#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__)       \
-  do {                                                        \
-    if((__HANDLE__)->Instance == USART1)                      \
-    {                                                         \
-       switch(__HAL_RCC_GET_USART1_SOURCE())                  \
-       {                                                      \
-        case RCC_USART1CLKSOURCE_PCLK2:                       \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2;         \
-          break;                                              \
-        case RCC_USART1CLKSOURCE_HSI:                         \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI;           \
-          break;                                              \
-        case RCC_USART1CLKSOURCE_SYSCLK:                      \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK;        \
-          break;                                              \
-        case RCC_USART1CLKSOURCE_LSE:                         \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE;           \
-          break;                                              \
-        default:                                              \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED;     \
-          break;                                              \
-       }                                                      \
-    }                                                         \
-    else if((__HANDLE__)->Instance == USART2)                 \
-    {                                                         \
-       switch(__HAL_RCC_GET_USART2_SOURCE())                  \
-       {                                                      \
-        case RCC_USART2CLKSOURCE_PCLK1:                       \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1;         \
-          break;                                              \
-        case RCC_USART2CLKSOURCE_HSI:                         \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI;           \
-          break;                                              \
-        case RCC_USART2CLKSOURCE_SYSCLK:                      \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK;        \
-          break;                                              \
-        case RCC_USART2CLKSOURCE_LSE:                         \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE;           \
-          break;                                              \
-        default:                                              \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED;     \
-          break;                                              \
-       }                                                      \
-    }                                                         \
-    else if((__HANDLE__)->Instance == USART4)                 \
-    {                                                         \
-      (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1;             \
-    }                                                         \
-    else if((__HANDLE__)->Instance == USART5)                 \
-    {                                                         \
-      (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1;             \
-    }                                                         \
-    else if((__HANDLE__)->Instance == LPUART1)                \
-    {                                                         \
-       switch(__HAL_RCC_GET_LPUART1_SOURCE())                 \
-       {                                                      \
-        case RCC_LPUART1CLKSOURCE_PCLK1:                      \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1;         \
-          break;                                              \
-        case RCC_LPUART1CLKSOURCE_HSI:                        \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI;           \
-          break;                                              \
-        case RCC_LPUART1CLKSOURCE_SYSCLK:                     \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK;        \
-          break;                                              \
-        case RCC_LPUART1CLKSOURCE_LSE:                        \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE;           \
-          break;                                              \
-        default:                                              \
-          (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED;     \
-          break;                                              \
-       }                                                      \
-    }                                                         \
-  } while(0)
-#endif /* (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || defined (STM32L021xx) */
-
-/** @brief  Report the UART mask to apply to retrieve the received data
-  *         according to the word length and to the parity bits activation.
-  * @note   If PCE = 1, the parity bit is not included in the data extracted
-  *         by the reception API().
-  *         This masking operation is not carried out in the case of
-  *         DMA transfers.
-  * @param  __HANDLE__: specifies the UART Handle.
-  * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field.
-  */
-#define UART_MASK_COMPUTATION(__HANDLE__)                             \
-  do {                                                                \
-  if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B)            \
-  {                                                                   \
-     if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE)               \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x01FF ;                                 \
-     }                                                                \
-     else                                                             \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x00FF ;                                 \
-     }                                                                \
-  }                                                                   \
-  else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B)       \
-  {                                                                   \
-     if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE)               \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x00FF ;                                 \
-     }                                                                \
-     else                                                             \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x007F ;                                 \
-     }                                                                \
-  }                                                                   \
-  else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B)       \
-  {                                                                   \
-     if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE)               \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x007F ;                                 \
-     }                                                                \
-     else                                                             \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x003F ;                                 \
-     }                                                                \
-  }                                                                   \
-} while(0)
-
-
-/**
-  * @brief Ensure that UART frame length is valid.
-  * @param __LENGTH__: UART frame length. 
-  * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
-  */
-#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \
-                                         ((__LENGTH__) == UART_WORDLENGTH_8B) || \
-                                         ((__LENGTH__) == UART_WORDLENGTH_9B))
-
-/**
-  * @brief Ensure that UART wake-up address length is valid.
-  * @param __ADDRESS__: UART wake-up address length. 
-  * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid)
-  */
-#define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \
-                                                   ((__ADDRESS__) == UART_ADDRESS_DETECT_7B))
-
-/**
-  * @}
-  */
-
-/* Private functions ---------------------------------------------------------*/
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_UART_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_usart.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_usart.h
deleted file mode 100755
index 57ef3b2d..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_usart.h
+++ /dev/null
@@ -1,710 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_usart.h
-  * @author  MCD Application Team
-  * @brief   Header file of USART HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_USART_H
-#define __STM32L0xx_HAL_USART_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup USART
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup USART_Exported_Types USART Exported Types
-  * @{
-  */
-
-/**
-  * @brief USART Init Structure definition
-  */
-typedef struct
-{
-  uint32_t BaudRate;                  /*!< This member configures the Usart communication baud rate.
-                                           The baud rate is computed using the following formula:
-                                              Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate))). */
-
-  uint32_t WordLength;                /*!< Specifies the number of data bits transmitted or received in a frame.
-                                           This parameter can be a value of @ref USARTEx_Word_Length. */
-
-  uint32_t StopBits;                  /*!< Specifies the number of stop bits transmitted.
-                                           This parameter can be a value of @ref USART_Stop_Bits. */
-
-  uint32_t Parity;                   /*!< Specifies the parity mode.
-                                           This parameter can be a value of @ref USART_Parity
-                                           @note When parity is enabled, the computed parity is inserted
-                                                 at the MSB position of the transmitted data (9th bit when
-                                                 the word length is set to 9 data bits; 8th bit when the
-                                                 word length is set to 8 data bits). */
-
-  uint32_t Mode;                      /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
-                                           This parameter can be a value of @ref USART_Mode. */
-
-  uint32_t CLKPolarity;               /*!< Specifies the steady state of the serial clock.
-                                           This parameter can be a value of @ref USART_Clock_Polarity. */
-
-  uint32_t CLKPhase;                  /*!< Specifies the clock transition on which the bit capture is made.
-                                           This parameter can be a value of @ref USART_Clock_Phase. */
-
-  uint32_t CLKLastBit;                /*!< Specifies whether the clock pulse corresponding to the last transmitted
-                                           data bit (MSB) has to be output on the SCLK pin in synchronous mode.
-                                           This parameter can be a value of @ref USART_Last_Bit. */
-}USART_InitTypeDef;
-
-/**
-  * @brief HAL USART State structures definition
-  */
-typedef enum
-{
-  HAL_USART_STATE_RESET             = 0x00U,    /*!< Peripheral is not initialized                  */
-  HAL_USART_STATE_READY             = 0x01U,    /*!< Peripheral Initialized and ready for use       */
-  HAL_USART_STATE_BUSY              = 0x02U,    /*!< an internal process is ongoing                 */
-  HAL_USART_STATE_BUSY_TX           = 0x12U,    /*!< Data Transmission process is ongoing           */
-  HAL_USART_STATE_BUSY_RX           = 0x22U,    /*!< Data Reception process is ongoing              */
-  HAL_USART_STATE_BUSY_TX_RX        = 0x32U,    /*!< Data Transmission Reception process is ongoing */
-  HAL_USART_STATE_TIMEOUT           = 0x03U,    /*!< Timeout state                                  */
-  HAL_USART_STATE_ERROR             = 0x04U     /*!< Error                                          */
-}HAL_USART_StateTypeDef;
-
-/**
-  * @brief  HAL USART Error Code structure definition
-  */
-#define   HAL_USART_ERROR_NONE      ((uint32_t)0x00U)    /*!< No error            */
-#define   HAL_USART_ERROR_PE        ((uint32_t)0x01U)    /*!< Parity error        */
-#define   HAL_USART_ERROR_NE        ((uint32_t)0x02U)    /*!< Noise error         */
-#define   HAL_USART_ERROR_FE        ((uint32_t)0x04U)    /*!< frame error         */
-#define   HAL_USART_ERROR_ORE       ((uint32_t)0x08U)    /*!< Overrun error       */
-#define   HAL_USART_ERROR_DMA       ((uint32_t)0x10U)    /*!< DMA transfer error  */
-
-/**
-  * @brief  USART clock sources definitions
-  */
-typedef enum
-{
-  USART_CLOCKSOURCE_PCLK1      = 0x00U,    /*!< PCLK1 clock source     */
-  USART_CLOCKSOURCE_PCLK2      = 0x01U,    /*!< PCLK2 clock source     */
-  USART_CLOCKSOURCE_HSI        = 0x02U,    /*!< HSI clock source       */
-  USART_CLOCKSOURCE_SYSCLK     = 0x04U,    /*!< SYSCLK clock source    */
-  USART_CLOCKSOURCE_LSE        = 0x08U,    /*!< LSE clock source       */
-  USART_CLOCKSOURCE_UNDEFINED  = 0x10U     /*!< Undefined clock source */
-}USART_ClockSourceTypeDef;
-
-
-/**
-  * @brief  USART handle Structure definition
-  */
-typedef struct
-{
-  USART_TypeDef                 *Instance;        /*!< USART registers base address        */
-
-  USART_InitTypeDef             Init;             /*!< USART communication parameters      */
-
-  uint8_t                       *pTxBuffPtr;      /*!< Pointer to USART Tx transfer Buffer */
-
-  uint16_t                      TxXferSize;       /*!< USART Tx Transfer size              */
-
-  __IO uint16_t                 TxXferCount;      /*!< USART Tx Transfer Counter           */
-
-  uint8_t                       *pRxBuffPtr;      /*!< Pointer to USART Rx transfer Buffer */
-
-  uint16_t                      RxXferSize;       /*!< USART Rx Transfer size              */
-
-  __IO uint16_t                 RxXferCount;      /*!< USART Rx Transfer Counter           */
-
-  uint16_t                      Mask;             /*!< USART Rx RDR register mask          */
-
-  DMA_HandleTypeDef             *hdmatx;          /*!< USART Tx DMA Handle parameters      */
-
-  DMA_HandleTypeDef             *hdmarx;          /*!< USART Rx DMA Handle parameters      */
-
-  HAL_LockTypeDef               Lock;             /*!< Locking object                      */
-
-  __IO HAL_USART_StateTypeDef   State;            /*!< USART communication state           */
-
-  __IO uint32_t                 ErrorCode;        /*!< USART Error code                    */
-
-}USART_HandleTypeDef;
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup USART_Exported_Constants USART Exported Constants
-  * @{
-  */
-
-/** @defgroup USART_Stop_Bits  USART Number of Stop Bits
-  * @{
-  */
-#define USART_STOPBITS_0_5                   USART_CR2_STOP_0                      /*!< USART frame with 0.5 stop bit  */
-#define USART_STOPBITS_1                     ((uint32_t)0x00000000)                /*!< USART frame with 1 stop bit    */   
-#define USART_STOPBITS_1_5                   (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< USART frame with 1.5 stop bits */ 
-#define USART_STOPBITS_2                     USART_CR2_STOP_1                      /*!< USART frame with 2 stop bits   */ 
-/**
-  * @}
-  */
-
-/** @defgroup USART_Parity    USART Parity
-  * @{
-  */
-#define USART_PARITY_NONE                   ((uint32_t)0x00000000U)                     /*!< No parity   */
-#define USART_PARITY_EVEN                   ((uint32_t)USART_CR1_PCE)                   /*!< Even parity */
-#define USART_PARITY_ODD                    ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))  /*!< Odd parity  */
-/**
-  * @}
-  */
-
-/** @defgroup USART_Mode   USART Mode
-  * @{
-  */
-#define USART_MODE_RX                       ((uint32_t)USART_CR1_RE)                   /*!< RX mode        */
-#define USART_MODE_TX                       ((uint32_t)USART_CR1_TE)                   /*!< TX mode        */
-#define USART_MODE_TX_RX                    ((uint32_t)(USART_CR1_TE |USART_CR1_RE))   /*!< RX and TX mode */
-/**
-  * @}
-  */
-
-/** @defgroup USART_Clock  USART Clock
-  * @{
-  */
-#define USART_CLOCK_DISABLE                 ((uint32_t)0x00000000U)       /*!< USART clock disable */
-#define USART_CLOCK_ENABLE                  ((uint32_t)USART_CR2_CLKEN)   /*!< USART clock enable  */
-/**
-  * @}
-  */
-
-/** @defgroup USART_Clock_Polarity  USART Clock Polarity
-  * @{
-  */
-#define USART_POLARITY_LOW                  ((uint32_t)0x00000000U)      /*!< USART Clock signal is steady Low */
-#define USART_POLARITY_HIGH                 ((uint32_t)USART_CR2_CPOL)   /*!< USART Clock signal is steady High  */
-/**
-  * @}
-  */
-
-/** @defgroup USART_Clock_Phase   USART Clock Phase
-  * @{
-  */
-#define USART_PHASE_1EDGE                   ((uint32_t)0x00000000U)      /*!< USART frame phase on first clock transition  */
-#define USART_PHASE_2EDGE                   ((uint32_t)USART_CR2_CPHA)   /*!< USART frame phase on second clock transition */
-/**
-  * @}
-  */
-
-/** @defgroup USART_Last_Bit  USART Last Bit
-  * @{
-  */
-#define USART_LASTBIT_DISABLE               ((uint32_t)0x00000000U)      /*!< USART frame last data bit clock pulse not output to SCLK pin */
-#define USART_LASTBIT_ENABLE                ((uint32_t)USART_CR2_LBCL)   /*!< USART frame last data bit clock pulse output to SCLK pin     */
-/**
-  * @}
-  */
-
-/** @defgroup USART_Request_Parameters  USART Request Parameters
-  * @{
-  */
-#define USART_RXDATA_FLUSH_REQUEST        ((uint32_t)USART_RQR_RXFRQ)        /*!< Receive Data flush Request  */
-#define USART_TXDATA_FLUSH_REQUEST        ((uint32_t)USART_RQR_TXFRQ)        /*!< Transmit data flush Request */
-/**
-  * @}
-  */
-
-/** @defgroup USART_Flags      USART Flags
-  *        Elements values convention: 0xXXXX
-  *           - 0xXXXX  : Flag mask in the ISR register
-  * @{
-  */
-#define USART_FLAG_REACK                     USART_ISR_REACK /*!< USART receive enable acknowledge flag  */
-#define USART_FLAG_TEACK                     USART_ISR_TEACK /*!< USART transmit enable acknowledge flag */
-#define USART_FLAG_BUSY                      USART_ISR_BUSY  /*!< USART busy flag                        */
-#define USART_FLAG_CTS                       USART_ISR_CTS   /*!< USART clear to send flag               */
-#define USART_FLAG_CTSIF                     USART_ISR_CTSIF /*!< USART clear to send interrupt flag     */
-#define USART_FLAG_LBDF                      USART_ISR_LBDF  /*!< USART LIN break detection flag         */
-#define USART_FLAG_TXE                       USART_ISR_TXE   /*!< USART transmit data register empty     */
-#define USART_FLAG_TC                        USART_ISR_TC    /*!< USART transmission complete            */
-#define USART_FLAG_RXNE                      USART_ISR_RXNE  /*!< USART read data register not empty     */
-#define USART_FLAG_IDLE                      USART_ISR_IDLE  /*!< USART idle flag                        */
-#define USART_FLAG_ORE                       USART_ISR_ORE   /*!< USART overrun error                    */
-#define USART_FLAG_NE                        USART_ISR_NE    /*!< USART noise error                      */
-#define USART_FLAG_FE                        USART_ISR_FE    /*!< USART frame error                      */
-#define USART_FLAG_PE                        USART_ISR_PE    /*!< USART parity error                     */
-/**
-  * @}
-  */
-
-/** @defgroup USART_Interrupt_definition USART Interrupts Definition
-  *        Elements values convention: 0000ZZZZ0XXYYYYYb
-  *           - YYYYY  : Interrupt source position in the XX register (5bits)
-  *           - XX  : Interrupt source register (2bits)
-  *                 - 01: CR1 register
-  *                 - 10: CR2 register
-  *                 - 11: CR3 register
-  *           - ZZZZ  : Flag position in the ISR register(4bits)
-  * @{
-  */
-
-#define USART_IT_PE                          ((uint16_t)0x0028U)     /*!< USART parity error interruption                 */   
-#define USART_IT_TXE                         ((uint16_t)0x0727U)     /*!< USART transmit data register empty interruption */   
-#define USART_IT_TC                          ((uint16_t)0x0626U)     /*!< USART transmission complete interruption        */   
-#define USART_IT_RXNE                        ((uint16_t)0x0525U)     /*!< USART read data register not empty interruption */   
-#define USART_IT_IDLE                        ((uint16_t)0x0424U)     /*!< USART idle interruption                         */   
-#define USART_IT_ERR                         ((uint16_t)0x0060U)     /*!< USART error interruption                        */
-#define USART_IT_ORE                         ((uint16_t)0x0300U)     /*!< USART overrun error interruption                */ 
-#define USART_IT_NE                          ((uint16_t)0x0200U)     /*!< USART noise error interruption                  */ 
-#define USART_IT_FE                          ((uint16_t)0x0100U)     /*!< USART frame error interruption                  */ 
-/**
-  * @}
-  */
-
-/** @defgroup USART_IT_CLEAR_Flags    USART Interruption Clear Flags
-  * @{
-  */
-#define USART_CLEAR_PEF                       USART_ICR_PECF            /*!< Parity Error Clear Flag          */
-#define USART_CLEAR_FEF                       USART_ICR_FECF            /*!< Framing Error Clear Flag         */
-#define USART_CLEAR_NEF                       USART_ICR_NCF             /*!< Noise detected Clear Flag        */
-#define USART_CLEAR_OREF                      USART_ICR_ORECF           /*!< OverRun Error Clear Flag         */
-#define USART_CLEAR_IDLEF                     USART_ICR_IDLECF          /*!< IDLE line detected Clear Flag    */
-#define USART_CLEAR_TCF                       USART_ICR_TCCF            /*!< Transmission Complete Clear Flag */
-#define USART_CLEAR_CTSF                      USART_ICR_CTSCF           /*!< CTS Interrupt Clear Flag */
-/**
-  * @}
-  */
-
-/** @defgroup USART_Interruption_Mask    USART Interruption Flags Mask
-  * @{
-  */
-#define USART_IT_MASK                             ((uint16_t)0x001FU)     /*!< USART interruptions flags mask */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macros -----------------------------------------------------------*/
-/** @defgroup USART_Exported_Macros USART Exported Macros
-  * @{
-  */
-
-/** @brief Reset USART handle state.
-  * @param  __HANDLE__: USART handle.
-  * @retval None
-  */
-#define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__)  ((__HANDLE__)->State = HAL_USART_STATE_RESET)
-
-/** @brief  Flush the USART Data registers
-  * @param  __HANDLE__: specifies the USART Handle.
-  */
-#define __HAL_USART_FLUSH_DRREGISTER(__HANDLE__)  \
-  do{                \
-      SET_BIT((__HANDLE__)->Instance->RQR, USART_RXDATA_FLUSH_REQUEST); \
-      SET_BIT((__HANDLE__)->Instance->RQR, USART_TXDATA_FLUSH_REQUEST); \
-    } while(0)
-
-
-/** @brief  Check whether the specified USART flag is set or not.
-  * @param  __HANDLE__: specifies the USART Handle
-  * @param  __FLAG__: specifies the flag to check.
-  *        This parameter can be one of the following values:
-  *            @arg @ref USART_FLAG_REACK Receive enable acknowledge flag
-  *            @arg @ref USART_FLAG_TEACK Transmit enable acknowledge flag
-  *            @arg @ref USART_FLAG_BUSY  Busy flag
-  *            @arg @ref USART_FLAG_CTS   CTS Change flag
-  *            @arg @ref USART_FLAG_TXE   Transmit data register empty flag
-  *            @arg @ref USART_FLAG_TC    Transmission Complete flag
-  *            @arg @ref USART_FLAG_RXNE  Receive data register not empty flag
-  *            @arg @ref USART_FLAG_IDLE  Idle Line detection flag
-  *            @arg @ref USART_FLAG_ORE   OverRun Error flag
-  *            @arg @ref USART_FLAG_NE    Noise Error flag
-  *            @arg @ref USART_FLAG_FE    Framing Error flag
-  *            @arg @ref USART_FLAG_PE    Parity Error flag
-  * @retval The new state of __FLAG__ (TRUE or FALSE).
-  */
-#define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
-
-/** @brief  Clear the specified USART pending flag.
-  * @param  __HANDLE__: specifies the USART Handle.
-  * @param  __FLAG__: specifies the flag to check.
-  *          This parameter can be any combination of the following values:
-  *            @arg @ref USART_CLEAR_PEF
-  *            @arg @ref USART_CLEAR_FEF
-  *            @arg @ref USART_CLEAR_NEF
-  *            @arg @ref USART_CLEAR_OREF
-  *            @arg @ref USART_CLEAR_IDLEF
-  *            @arg @ref USART_CLEAR_TCF
-  *            @arg @ref USART_CLEAR_CTSF
-  * @retval None
-  */
-#define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
-
-/** @brief  Clear the USART PE pending flag.
-  * @param  __HANDLE__: specifies the USART Handle.
-  * @retval None
-  */
-#define __HAL_USART_CLEAR_PEFLAG(__HANDLE__)   __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_PEF)
-
-/** @brief  Clear the USART FE pending flag.
-  * @param  __HANDLE__: specifies the USART Handle.
-  * @retval None
-  */
-#define __HAL_USART_CLEAR_FEFLAG(__HANDLE__)   __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_FEF)
-
-/** @brief  Clear the USART NE pending flag.
-  * @param  __HANDLE__: specifies the USART Handle.
-  * @retval None
-  */
-#define __HAL_USART_CLEAR_NEFLAG(__HANDLE__)  __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_NEF)
-
-/** @brief  Clear the USART ORE pending flag.
-  * @param  __HANDLE__: specifies the USART Handle.
-  * @retval None
-  */
-#define __HAL_USART_CLEAR_OREFLAG(__HANDLE__)   __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_OREF)
-
-/** @brief  Clear the USART IDLE pending flag.
-  * @param  __HANDLE__: specifies the USART Handle.
-  * @retval None
-  */
-#define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__)   __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF)
-
-/** @brief  Enable the specified USART interrupt.
-  * @param  __HANDLE__: specifies the USART Handle.
-  * @param  __INTERRUPT__: specifies the USART interrupt source to enable.
-  *          This parameter can be one of the following values:
-  *            @arg @ref USART_IT_TXE  Transmit Data Register empty interrupt
-  *            @arg @ref USART_IT_TC   Transmission complete interrupt
-  *            @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
-  *            @arg @ref USART_IT_IDLE Idle line detection interrupt
-  *            @arg @ref USART_IT_PE   Parity Error interrupt
-  *            @arg @ref USART_IT_ERR  Error interrupt(Frame error, noise error, overrun error)
-  * @retval None
-  */
-#define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__)   (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
-                                                            ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
-                                                            ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))))
-
-/** @brief  Disable the specified USART interrupt.
-  * @param  __HANDLE__: specifies the USART Handle.
-  * @param  __INTERRUPT__: specifies the USART interrupt source to disable.
-  *          This parameter can be one of the following values:
-  *            @arg @ref USART_IT_TXE  Transmit Data Register empty interrupt
-  *            @arg @ref USART_IT_TC   Transmission complete interrupt
-  *            @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
-  *            @arg @ref USART_IT_IDLE Idle line detection interrupt
-  *            @arg @ref USART_IT_PE   Parity Error interrupt
-  *            @arg @ref USART_IT_ERR  Error interrupt(Frame error, noise error, overrun error)
-  * @retval None
-  */
-#define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__)  (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
-                                                            ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
-                                                            ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))))
-
-
-/** @brief  Check whether the specified USART interrupt has occurred or not.
-  * @param  __HANDLE__: specifies the USART Handle.
-  * @param  __IT__: specifies the USART interrupt source to check.
-  *          This parameter can be one of the following values:
-  *            @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
-  *            @arg @ref USART_IT_TC  Transmission complete interrupt
-  *            @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
-  *            @arg @ref USART_IT_IDLE Idle line detection interrupt
-  *            @arg @ref USART_IT_ORE OverRun Error interrupt
-  *            @arg @ref USART_IT_NE Noise Error interrupt
-  *            @arg @ref USART_IT_FE Framing Error interrupt
-  *            @arg @ref USART_IT_PE Parity Error interrupt
-  * @retval The new state of __IT__ (TRUE or FALSE).
-  */
-#define __HAL_USART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1U << ((__IT__)>> 0x08U)))
-
-/** @brief  Check whether the specified USART interrupt source is enabled or not.
-  * @param  __HANDLE__: specifies the USART Handle.
-  * @param  __IT__: specifies the USART interrupt source to check.
-  *          This parameter can be one of the following values:
-  *            @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
-  *            @arg @ref USART_IT_TC  Transmission complete interrupt
-  *            @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
-  *            @arg @ref USART_IT_IDLE Idle line detection interrupt
-  *            @arg @ref USART_IT_ORE OverRun Error interrupt
-  *            @arg @ref USART_IT_NE Noise Error interrupt
-  *            @arg @ref USART_IT_FE Framing Error interrupt
-  *            @arg @ref USART_IT_PE Parity Error interrupt
-  * @retval The new state of __IT__ (TRUE or FALSE).
-  */
-#define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2U)? \
-                                                   (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1U << \
-                                                   (((uint16_t)(__IT__)) & USART_IT_MASK)))
-
-
-/** @brief  Clear the specified USART ISR flag, in setting the proper ICR register flag.
-  * @param  __HANDLE__: specifies the USART Handle.
-  * @param  __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
-  *                       to clear the corresponding interrupt.
-  *          This parameter can be one of the following values:
-  *            @arg @ref USART_CLEAR_PEF Parity Error Clear Flag
-  *            @arg @ref USART_CLEAR_FEF Framing Error Clear Flag
-  *            @arg @ref USART_CLEAR_NEF Noise detected Clear Flag
-  *            @arg @ref USART_CLEAR_OREF OverRun Error Clear Flag
-  *            @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag
-  *            @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag
-  *            @arg @ref USART_CLEAR_CTSF CTS Interrupt Clear Flag
-  * @retval None
-  */
-#define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
-
-/** @brief  Set a specific USART request flag.
-  * @param  __HANDLE__: specifies the USART Handle.
-  * @param  __REQ__: specifies the request flag to set.
-  *          This parameter can be one of the following values:
-  *            @arg @ref USART_RXDATA_FLUSH_REQUEST Receive Data flush Request
-  *            @arg @ref USART_TXDATA_FLUSH_REQUEST Transmit data flush Request
-  *
-  * @retval None
-  */
-#define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__)      ((__HANDLE__)->Instance->RQR |= (uint32_t)(__REQ__))
-
-/** @brief  Enable the USART one bit sample method.
-  * @param  __HANDLE__: specifies the USART Handle.  
-  * @retval None
-  */
-#define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
-
-/** @brief  Disable the USART one bit sample method.
-  * @param  __HANDLE__: specifies the USART Handle.  
-  * @retval None
-  */
-#define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
-
-/** @brief  Enable USART.
-  * @param  __HANDLE__: specifies the USART Handle.
-  * @retval None
-  */
-#define __HAL_USART_ENABLE(__HANDLE__)                 ((__HANDLE__)->Instance->CR1 |=  USART_CR1_UE)
-
-/** @brief  Disable USART.
-  * @param  __HANDLE__: specifies the USART Handle.
-  * @retval None
-  */
-#define __HAL_USART_DISABLE(__HANDLE__)                ((__HANDLE__)->Instance->CR1 &=  ~USART_CR1_UE)
-
-/**
-  * @}
-  */
-
-/* Private macros --------------------------------------------------------*/
-/** @defgroup USART_Private_Macros   USART Private Macros
-  * @{
-  */
-
-/** @brief  Check USART Baud rate.
-  * @param  __BAUDRATE__: Baudrate specified by the user.
-  *         The maximum Baud Rate is derived from the maximum clock on L0 (i.e. 32 MHz)
-  *         divided by the smallest oversampling used on the USART (i.e. 8).
-  * @retval Test result (TRUE or FALSE).
-  */
-#define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 4000001U)
-
-
-/**
-  * @brief Ensure that USART frame number of stop bits is valid.
-  * @param __STOPBITS__: USART frame number of stop bits. 
-  * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
-  */
-#define IS_USART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == USART_STOPBITS_0_5) || \
-                                         ((__STOPBITS__) == USART_STOPBITS_1)   || \
-                                         ((__STOPBITS__) == USART_STOPBITS_1_5) || \
-                                         ((__STOPBITS__) == USART_STOPBITS_2))
-
-/**
-  * @brief Ensure that USART frame parity is valid.
-  * @param __PARITY__: USART frame parity. 
-  * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
-  */ 
-#define IS_USART_PARITY(__PARITY__) (((__PARITY__) == USART_PARITY_NONE) || \
-                                     ((__PARITY__) == USART_PARITY_EVEN) || \
-                                     ((__PARITY__) == USART_PARITY_ODD))
-
-/**
-  * @brief Ensure that USART communication mode is valid.
-  * @param __MODE__: USART communication mode. 
-  * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
-  */ 
-#define IS_USART_MODE(MODE)     (((MODE) == USART_MODE_RX) || \
-                                 ((MODE) == USART_MODE_TX) || \
-                                 ((MODE) == USART_MODE_TX_RX))
-
-/**
-  * @brief Ensure that USART clock state is valid.
-  * @param __CLOCK__: USART clock state. 
-  * @retval SET (__CLOCK__ is valid) or RESET (__CLOCK__ is invalid)
-  */ 
-#define IS_USART_CLOCK(__CLOCK__) (((__CLOCK__) == USART_CLOCK_DISABLE) || \
-                                   ((__CLOCK__) == USART_CLOCK_ENABLE))
-
-/**
-  * @brief Ensure that USART frame polarity is valid.
-  * @param __CPOL__: USART frame polarity. 
-  * @retval SET (__CPOL__ is valid) or RESET (__CPOL__ is invalid)
-  */ 
-#define IS_USART_POLARITY(__CPOL__) (((__CPOL__) == USART_POLARITY_LOW) || ((__CPOL__) == USART_POLARITY_HIGH))
-
-/**
-  * @brief Ensure that USART frame phase is valid.
-  * @param __CPHA__: USART frame phase. 
-  * @retval SET (__CPHA__ is valid) or RESET (__CPHA__ is invalid)
-  */
-#define IS_USART_PHASE(__CPHA__) (((__CPHA__) == USART_PHASE_1EDGE) || ((__CPHA__) == USART_PHASE_2EDGE))
-
-/**
-  * @brief Ensure that USART frame last bit clock pulse setting is valid.
-  * @param __LASTBIT__: USART frame last bit clock pulse setting. 
-  * @retval SET (__LASTBIT__ is valid) or RESET (__LASTBIT__ is invalid)
-  */
-#define IS_USART_LASTBIT(__LASTBIT__) (((__LASTBIT__) == USART_LASTBIT_DISABLE) || \
-                                       ((__LASTBIT__) == USART_LASTBIT_ENABLE))
-
-/**
-  * @brief Ensure that USART request parameter is valid.
-  * @param __PARAM__: USART request parameter. 
-  * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
-  */
-#define IS_USART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == USART_RXDATA_FLUSH_REQUEST) || \
-                                               ((__PARAM__) == USART_TXDATA_FLUSH_REQUEST))
-
-/**
-  * @}
-  */
-
-/* Include USART HAL Extended module */
-#include "stm32l0xx_hal_usart_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup USART_Exported_Functions USART Exported Functions
-  * @{
-  */
-
-/** @addtogroup USART_Exported_Functions_Group1 Initialization and de-initialization functions
-  * @{
-  */
-
-/* Initialization and de-initialization functions  ****************************/
-HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
-HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
-void HAL_USART_MspInit(USART_HandleTypeDef *husart);
-void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
-
-/**
-  * @}
-  */
-
-/** @addtogroup USART_Exported_Functions_Group2 IO operation functions
-  * @{
-  */
-
-/* IO operation functions *****************************************************/
-HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
-HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
-HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData,  uint16_t Size);
-HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
-HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
-HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
-HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
-HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
-HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
-/* Transfer Abort functions */
-HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart);
-HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart);
-
-void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
-void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
-void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
-void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
-void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
-void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
-void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
-void HAL_USART_AbortCpltCallback (USART_HandleTypeDef *husart);
-
-/**
-  * @}
-  */
-
-/* Peripheral Control functions ***********************************************/
-
-/** @addtogroup USART_Exported_Functions_Group4 Peripheral State and Error functions
-  * @{
-  */
-
-/* Peripheral State and Error functions ***************************************/
-HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart);
-uint32_t               HAL_USART_GetError(USART_HandleTypeDef *husart);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_USART_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_usart_ex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_usart_ex.h
deleted file mode 100755
index d5a2d423..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_usart_ex.h
+++ /dev/null
@@ -1,297 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_usart_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of USART HAL Extended module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_USART_EX_H
-#define __STM32L0xx_HAL_USART_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup USARTEx
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup USARTEx_Exported_Constants USARTEx Exported Constants
-  * @{
-  */
-  
-/** @defgroup USARTEx_Word_Length USARTEx Word Length
-  * @{
-  */
-#define USART_WORDLENGTH_7B                  ((uint32_t)USART_CR1_M1)   /*!< 7-bit long USART frame */ 
-#define USART_WORDLENGTH_8B                  ((uint32_t)0x00000000U)    /*!< 8-bit long USART frame */ 
-#define USART_WORDLENGTH_9B                  ((uint32_t)USART_CR1_M0)   /*!< 9-bit long USART frame */ 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup USARTEx_Private_Macros USARTEx Private Macros
-  * @{
-  */
-
-/** @brief  Report the USART clock source.
-  * @param  __HANDLE__: specifies the USART Handle.
-  * @param  __CLOCKSOURCE__: output variable.
-  * @retval the USART clocking source, written in __CLOCKSOURCE__.
-  */
-#if defined (STM32L051xx) || defined (STM32L052xx) || defined (STM32L053xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx)
-
-#define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__)       \
-  do {                                                         \
-    if((__HANDLE__)->Instance == USART1)                       \
-    {                                                          \
-       switch(__HAL_RCC_GET_USART1_SOURCE())                   \
-       {                                                       \
-        case RCC_USART1CLKSOURCE_PCLK2:                        \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2;         \
-          break;                                               \
-        case RCC_USART1CLKSOURCE_HSI:                          \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI;           \
-          break;                                               \
-        case RCC_USART1CLKSOURCE_SYSCLK:                       \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK;        \
-          break;                                               \
-        case RCC_USART1CLKSOURCE_LSE:                          \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE;           \
-          break;                                               \
-        default:                                               \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED;     \
-          break;                                               \
-       }                                                       \
-    }                                                          \
-    else if((__HANDLE__)->Instance == USART2)                  \
-    {                                                          \
-       switch(__HAL_RCC_GET_USART2_SOURCE())                   \
-       {                                                       \
-        case RCC_USART2CLKSOURCE_PCLK1:                        \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1;         \
-          break;                                               \
-        case RCC_USART2CLKSOURCE_HSI:                          \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI;           \
-          break;                                               \
-        case RCC_USART2CLKSOURCE_SYSCLK:                       \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK;        \
-          break;                                               \
-        case RCC_USART2CLKSOURCE_LSE:                          \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE;           \
-          break;                                               \
-        default:                                               \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED;     \
-          break;                                               \
-       }                                                       \
-    }                                                          \
-  } while(0)
-
-#elif defined(STM32L071xx) || defined (STM32L081xx) || defined(STM32L072xx) || defined (STM32L082xx) || defined(STM32L073xx) || defined (STM32L083xx)
-
-#define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__)       \
-  do {                                                         \
-    if((__HANDLE__)->Instance == USART1)                       \
-    {                                                          \
-       switch(__HAL_RCC_GET_USART1_SOURCE())                   \
-       {                                                       \
-        case RCC_USART1CLKSOURCE_PCLK2:                        \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2;         \
-          break;                                               \
-        case RCC_USART1CLKSOURCE_HSI:                          \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI;           \
-          break;                                               \
-        case RCC_USART1CLKSOURCE_SYSCLK:                       \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK;        \
-          break;                                               \
-        case RCC_USART1CLKSOURCE_LSE:                          \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE;           \
-          break;                                               \
-        default:                                               \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED;     \
-          break;                                               \
-       }                                                       \
-    }                                                          \
-    else if((__HANDLE__)->Instance == USART2)                  \
-    {                                                          \
-       switch(__HAL_RCC_GET_USART2_SOURCE())                   \
-       {                                                       \
-        case RCC_USART2CLKSOURCE_PCLK1:                        \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1;         \
-          break;                                               \
-        case RCC_USART2CLKSOURCE_HSI:                          \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI;           \
-          break;                                               \
-        case RCC_USART2CLKSOURCE_SYSCLK:                       \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK;        \
-          break;                                               \
-        case RCC_USART2CLKSOURCE_LSE:                          \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE;           \
-          break;                                               \
-        default:                                               \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED;     \
-          break;                                               \
-       }                                                       \
-    }                                                          \
-    else if((__HANDLE__)->Instance == USART4)                  \
-    {                                                          \
-      (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1;             \
-    }                                                          \
-    else if((__HANDLE__)->Instance == USART5)                  \
-    {                                                          \
-      (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1;             \
-    }                                                          \
-  } while(0)
-
-#else
-
-#define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__)       \
-  do {                                                         \
-    if((__HANDLE__)->Instance == USART2)                       \
-    {                                                          \
-       switch(__HAL_RCC_GET_USART2_SOURCE())                   \
-       {                                                       \
-        case RCC_USART2CLKSOURCE_PCLK1:                        \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1;         \
-          break;                                               \
-        case RCC_USART2CLKSOURCE_HSI:                          \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI;           \
-          break;                                               \
-        case RCC_USART2CLKSOURCE_SYSCLK:                       \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK;        \
-          break;                                               \
-        case RCC_USART2CLKSOURCE_LSE:                          \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE;           \
-          break;                                               \
-        default:                                               \
-          (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED;     \
-          break;                                               \
-       }                                                       \
-    }                                                          \
-  } while(0)
-
-#endif
-
-/** @brief  Compute the USART mask to apply to retrieve the received data
-  *         according to the word length and to the parity bits activation.
-  * @note   If PCE = 1, the parity bit is not included in the data extracted
-  *         by the reception API().
-  *         This masking operation is not carried out in the case of
-  *         DMA transfers.
-  * @param  __HANDLE__: specifies the USART Handle.
-  * @retval None, the mask to apply to USART RDR register is stored in (__HANDLE__)->Mask field.
-  */
-#define USART_MASK_COMPUTATION(__HANDLE__)                            \
-  do {                                                                \
-  if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B)           \
-  {                                                                   \
-     if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE)              \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x01FF ;                                 \
-     }                                                                \
-     else                                                             \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x00FF ;                                 \
-     }                                                                \
-  }                                                                   \
-  else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B)      \
-  {                                                                   \
-     if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE)              \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x00FF ;                                 \
-     }                                                                \
-     else                                                             \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x007F ;                                 \
-     }                                                                \
-  }                                                                   \
-  else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_7B)      \
-  {                                                                   \
-     if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE)              \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x007F ;                                 \
-     }                                                                \
-     else                                                             \
-     {                                                                \
-        (__HANDLE__)->Mask = 0x003F ;                                 \
-     }                                                                \
-  }                                                                   \
-} while(0)
-
-
-/**
-  * @brief Ensure that USART frame length is valid.
-  * @param __LENGTH__: USART frame length. 
-  * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
-  */
-#define IS_USART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == USART_WORDLENGTH_7B) || \
-                                          ((__LENGTH__) == USART_WORDLENGTH_8B) || \
-                                          ((__LENGTH__) == USART_WORDLENGTH_9B))
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_USART_EX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_wwdg.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_wwdg.h
deleted file mode 100755
index 89819260..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_wwdg.h
+++ /dev/null
@@ -1,283 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_wwdg.h
-  * @author  MCD Application Team
-  * @brief   Header file of WWDG HAL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_WWDG_H
-#define __STM32L0xx_HAL_WWDG_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal_def.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup WWDG
-  * @{
-  */
-
-/* Exported types ------------------------------------------------------------*/
-
-/** @defgroup WWDG_Exported_Types WWDG Exported Types
-  * @{
-  */
-
-/** 
-  * @brief  WWDG Init structure definition
-  */
-typedef struct
-{
-  uint32_t Prescaler;     /*!< Specifies the prescaler value of the WWDG.
-                               This parameter can be a value of @ref WWDG_Prescaler */
-
-  uint32_t Window;        /*!< Specifies the WWDG window value to be compared to the downcounter.
-                               This parameter must be a number Min_Data = 0x40 and Max_Data = 0x7F */
-
-  uint32_t Counter;       /*!< Specifies the WWDG free-running downcounter  value.
-                               This parameter must be a number between Min_Data = 0x40 and Max_Data = 0x7F */
-
-  uint32_t EWIMode ;      /*!< Specifies if WWDG Early Wakeup Interupt is enable or not.
-                               This parameter can be a value of @ref WWDG_EWI_Mode */
-
-}WWDG_InitTypeDef;
-
-/**
-  * @brief  WWDG handle Structure definition
-  */
-typedef struct
-{
-  WWDG_TypeDef                 *Instance;  /*!< Register base address    */
-
-  WWDG_InitTypeDef             Init;       /*!< WWDG required parameters */
-
-}WWDG_HandleTypeDef;
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup WWDG_Exported_Constants WWDG Exported Constants
-  * @{
-  */
-
-/** @defgroup WWDG_Interrupt_definition WWDG Interrupt definition
-  * @{
-  */
-#define WWDG_IT_EWI                         WWDG_CFR_EWI  /*!< Early wakeup interrupt */
-/**
-  * @}
-  */
-
-/** @defgroup WWDG_Flag_definition WWDG Flag definition
-  * @brief WWDG Flag definition
-  * @{
-  */
-#define WWDG_FLAG_EWIF                      WWDG_SR_EWIF  /*!< Early wakeup interrupt flag */
-/**
-  * @}
-  */
-
-/** @defgroup WWDG_Prescaler WWDG Prescaler
-  * @{
-  */
-#define WWDG_PRESCALER_1                    0x00000000U       /*!< WWDG counter clock = (PCLK1/4096)/1 */
-#define WWDG_PRESCALER_2                    WWDG_CFR_WDGTB_0  /*!< WWDG counter clock = (PCLK1/4096)/2 */
-#define WWDG_PRESCALER_4                    WWDG_CFR_WDGTB_1  /*!< WWDG counter clock = (PCLK1/4096)/4 */
-#define WWDG_PRESCALER_8                    WWDG_CFR_WDGTB    /*!< WWDG counter clock = (PCLK1/4096)/8 */
-/**
-  * @}
-  */
-
-/** @defgroup WWDG_EWI_Mode WWDG Early Wakeup Interrupt Mode
-  * @{
-  */
-#define WWDG_EWI_DISABLE                    0x00000000U       /*!< EWI Disable */
-#define WWDG_EWI_ENABLE                     WWDG_CFR_EWI      /*!< EWI Enable */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-
-/** @defgroup WWDG_Private_Macros WWDG Private Macros
-  * @{
-  */
-#define IS_WWDG_PRESCALER(__PRESCALER__)    (((__PRESCALER__) == WWDG_PRESCALER_1) || \
-                                             ((__PRESCALER__) == WWDG_PRESCALER_2) || \
-                                             ((__PRESCALER__) == WWDG_PRESCALER_4) || \
-                                             ((__PRESCALER__) == WWDG_PRESCALER_8))
-
-#define IS_WWDG_WINDOW(__WINDOW__)          (((__WINDOW__) >= WWDG_CFR_W_6) && ((__WINDOW__) <= WWDG_CFR_W))
-
-#define IS_WWDG_COUNTER(__COUNTER__)        (((__COUNTER__) >= WWDG_CR_T_6) && ((__COUNTER__) <= WWDG_CR_T))
-
-#define IS_WWDG_EWI_MODE(__MODE__)          (((__MODE__) == WWDG_EWI_ENABLE) || \
-                                             ((__MODE__) == WWDG_EWI_DISABLE))
-/**
-  * @}
-  */
-
-
-/* Exported macros ------------------------------------------------------------*/
-
-/** @defgroup WWDG_Exported_Macros WWDG Exported Macros
-  * @{
-  */
-
-/**
-  * @brief  Enable the WWDG peripheral.
-  * @param  __HANDLE__  WWDG handle
-  * @retval None
-  */
-#define __HAL_WWDG_ENABLE(__HANDLE__)                         SET_BIT((__HANDLE__)->Instance->CR, WWDG_CR_WDGA)
-
-/**
-  * @brief  Enable the WWDG early wakeup interrupt.
-  * @param  __HANDLE__: WWDG handle
-  * @param  __INTERRUPT__  specifies the interrupt to enable.
-  *         This parameter can be one of the following values:
-  *            @arg WWDG_IT_EWI: Early wakeup interrupt
-  * @note   Once enabled this interrupt cannot be disabled except by a system reset.
-  * @retval None
-  */
-#define __HAL_WWDG_ENABLE_IT(__HANDLE__, __INTERRUPT__)       SET_BIT((__HANDLE__)->Instance->CFR, (__INTERRUPT__))
-
-/**
-  * @brief  Check whether the selected WWDG interrupt has occurred or not.
-  * @param  __HANDLE__  WWDG handle
-  * @param  __INTERRUPT__  specifies the it to check.
-  *        This parameter can be one of the following values:
-  *            @arg WWDG_FLAG_EWIF: Early wakeup interrupt IT
-  * @retval The new state of WWDG_FLAG (SET or RESET).
-  */
-#define __HAL_WWDG_GET_IT(__HANDLE__, __INTERRUPT__)        __HAL_WWDG_GET_FLAG((__HANDLE__),(__INTERRUPT__))
-
-/** @brief  Clear the WWDG interrupt pending bits.
-  *         bits to clear the selected interrupt pending bits.
-  * @param  __HANDLE__  WWDG handle
-  * @param  __INTERRUPT__  specifies the interrupt pending bit to clear.
-  *         This parameter can be one of the following values:
-  *            @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag
-  */
-#define __HAL_WWDG_CLEAR_IT(__HANDLE__, __INTERRUPT__)      __HAL_WWDG_CLEAR_FLAG((__HANDLE__), (__INTERRUPT__))
-
-/**
-  * @brief  Check whether the specified WWDG flag is set or not.
-  * @param  __HANDLE__  WWDG handle
-  * @param  __FLAG__  specifies the flag to check.
-  *         This parameter can be one of the following values:
-  *            @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag
-  * @retval The new state of WWDG_FLAG (SET or RESET).
-  */
-#define __HAL_WWDG_GET_FLAG(__HANDLE__, __FLAG__)           (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
-
-/**
-  * @brief  Clear the WWDG's pending flags.
-  * @param  __HANDLE__  WWDG handle
-  * @param  __FLAG__  specifies the flag to clear.
-  *         This parameter can be one of the following values:
-  *            @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag
-  * @retval None
-  */
-#define __HAL_WWDG_CLEAR_FLAG(__HANDLE__, __FLAG__)         ((__HANDLE__)->Instance->SR = ~(__FLAG__))
-
-/** @brief  Check whether the specified WWDG interrupt source is enabled or not.
-  * @param  __HANDLE__  WWDG Handle.
-  * @param  __INTERRUPT__  specifies the WWDG interrupt source to check.
-  *         This parameter can be one of the following values:
-  *            @arg WWDG_IT_EWI: Early Wakeup Interrupt
-  * @retval state of __INTERRUPT__ (TRUE or FALSE).
-  */
-#define __HAL_WWDG_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CFR & (__INTERRUPT__)) == (__INTERRUPT__))
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @addtogroup WWDG_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup WWDG_Exported_Functions_Group1
-  * @{
-  */
-/* Initialization/de-initialization functions  **********************************/
-HAL_StatusTypeDef     HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg);
-void                  HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg);
-/**
-  * @}
-  */
-
-/** @addtogroup WWDG_Exported_Functions_Group2
-  * @{
-  */
-/* I/O operation functions ******************************************************/
-HAL_StatusTypeDef     HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg);
-void                  HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg);
-void                  HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef* hwwdg);
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_WWDG_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h
deleted file mode 100755
index 05fc80c4..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h
+++ /dev/null
@@ -1,4049 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_adc.h
-  * @author  MCD Application Team
-  * @brief   Header file of ADC LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_ADC_H
-#define __STM32L0xx_LL_ADC_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (ADC1)
-
-/** @defgroup ADC_LL ADC
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup ADC_LL_Private_Constants ADC Private Constants
-  * @{
-  */
-
-/* Internal mask for ADC group regular trigger:                               */
-/* To select into literal LL_ADC_REG_TRIG_x the relevant bits for:            */
-/* - regular trigger source                                                   */
-/* - regular trigger edge                                                     */
-#define ADC_REG_TRIG_EXT_EDGE_DEFAULT       (ADC_CFGR1_EXTEN_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value) */
-
-/* Mask containing trigger source masks for each of possible                  */
-/* trigger edge selection duplicated with shifts [0; 4; 8; 12]                */
-/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}.        */
-#define ADC_REG_TRIG_SOURCE_MASK            (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTSEL) << (4U * 0U)) | \
-                                             ((ADC_CFGR1_EXTSEL)                            << (4U * 1U)) | \
-                                             ((ADC_CFGR1_EXTSEL)                            << (4U * 2U)) | \
-                                             ((ADC_CFGR1_EXTSEL)                            << (4U * 3U))  )
-
-/* Mask containing trigger edge masks for each of possible                    */
-/* trigger edge selection duplicated with shifts [0; 4; 8; 12]                */
-/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}.        */
-#define ADC_REG_TRIG_EDGE_MASK              (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN) << (4U * 0U)) | \
-                                             ((ADC_REG_TRIG_EXT_EDGE_DEFAULT)              << (4U * 1U)) | \
-                                             ((ADC_REG_TRIG_EXT_EDGE_DEFAULT)              << (4U * 2U)) | \
-                                             ((ADC_REG_TRIG_EXT_EDGE_DEFAULT)              << (4U * 3U))  )
-
-/* Definition of ADC group regular trigger bits information.                  */
-#define ADC_REG_TRIG_EXTSEL_BITOFFSET_POS  ((uint32_t) 6U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_EXTSEL) */
-#define ADC_REG_TRIG_EXTEN_BITOFFSET_POS   ((uint32_t)10U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_EXTEN) */
-
-
-
-/* Internal mask for ADC channel:                                             */
-/* To select into literal LL_ADC_CHANNEL_x the relevant bits for:             */
-/* - channel identifier defined by number                                     */
-/* - channel identifier defined by bitfield                                   */
-/* - channel differentiation between external channels (connected to          */
-/*   GPIO pins) and internal channels (connected to internal paths)           */
-#define ADC_CHANNEL_ID_NUMBER_MASK         (ADC_CFGR1_AWDCH)
-#define ADC_CHANNEL_ID_BITFIELD_MASK       (ADC_CHSELR_CHSEL)
-#define ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS ((uint32_t)26U)/* Value equivalent to POSITION_VAL(ADC_CHANNEL_ID_NUMBER_MASK) */
-#define ADC_CHANNEL_ID_MASK                (ADC_CHANNEL_ID_NUMBER_MASK | ADC_CHANNEL_ID_BITFIELD_MASK | ADC_CHANNEL_ID_INTERNAL_CH_MASK)
-/* Equivalent mask of ADC_CHANNEL_NUMBER_MASK aligned on register LSB (bit 0) */
-#define ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 ((uint32_t)0x0000001FU) /* Equivalent to shift: (ADC_CHANNEL_NUMBER_MASK >> POSITION_VAL(ADC_CHANNEL_NUMBER_MASK)) */
-
-/* Channel differentiation between external and internal channels */
-#define ADC_CHANNEL_ID_INTERNAL_CH         ((uint32_t)0x80000000U) /* Marker of internal channel */
-#define ADC_CHANNEL_ID_INTERNAL_CH_MASK    (ADC_CHANNEL_ID_INTERNAL_CH)
-
-/* Definition of channels ID number information to be inserted into           */
-/* channels literals definition.                                              */
-#define ADC_CHANNEL_0_NUMBER               ((uint32_t)0x00000000U)
-#define ADC_CHANNEL_1_NUMBER               (                                                                                ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_2_NUMBER               (                                                            ADC_CFGR1_AWDCH_1                    )
-#define ADC_CHANNEL_3_NUMBER               (                                                            ADC_CFGR1_AWDCH_1 | ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_4_NUMBER               (                                        ADC_CFGR1_AWDCH_2                                        )
-#define ADC_CHANNEL_5_NUMBER               (                                        ADC_CFGR1_AWDCH_2                     | ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_6_NUMBER               (                                        ADC_CFGR1_AWDCH_2 | ADC_CFGR1_AWDCH_1                    )
-#define ADC_CHANNEL_7_NUMBER               (                                        ADC_CFGR1_AWDCH_2 | ADC_CFGR1_AWDCH_1 | ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_8_NUMBER               (                    ADC_CFGR1_AWDCH_3                                                            )
-#define ADC_CHANNEL_9_NUMBER               (                    ADC_CFGR1_AWDCH_3                                         | ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_10_NUMBER              (                    ADC_CFGR1_AWDCH_3                     | ADC_CFGR1_AWDCH_1                    )
-#define ADC_CHANNEL_11_NUMBER              (                    ADC_CFGR1_AWDCH_3                     | ADC_CFGR1_AWDCH_1 | ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_12_NUMBER              (                    ADC_CFGR1_AWDCH_3 | ADC_CFGR1_AWDCH_2                                        )
-#define ADC_CHANNEL_13_NUMBER              (                    ADC_CFGR1_AWDCH_3 | ADC_CFGR1_AWDCH_2                     | ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_14_NUMBER              (                    ADC_CFGR1_AWDCH_3 | ADC_CFGR1_AWDCH_2 | ADC_CFGR1_AWDCH_1                    )
-#define ADC_CHANNEL_15_NUMBER              (                    ADC_CFGR1_AWDCH_3 | ADC_CFGR1_AWDCH_2 | ADC_CFGR1_AWDCH_1 | ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_16_NUMBER              (ADC_CFGR1_AWDCH_4                                                                                )
-#define ADC_CHANNEL_17_NUMBER              (ADC_CFGR1_AWDCH_4                                                             | ADC_CFGR1_AWDCH_0)
-#define ADC_CHANNEL_18_NUMBER              (ADC_CFGR1_AWDCH_4                                         | ADC_CFGR1_AWDCH_1                    )
-
-/* Definition of channels ID bitfield information to be inserted into         */
-/* channels literals definition.                                              */
-#define ADC_CHANNEL_0_BITFIELD             (ADC_CHSELR_CHSEL0)
-#define ADC_CHANNEL_1_BITFIELD             (ADC_CHSELR_CHSEL1)
-#define ADC_CHANNEL_2_BITFIELD             (ADC_CHSELR_CHSEL2)
-#define ADC_CHANNEL_3_BITFIELD             (ADC_CHSELR_CHSEL3)
-#define ADC_CHANNEL_4_BITFIELD             (ADC_CHSELR_CHSEL4)
-#define ADC_CHANNEL_5_BITFIELD             (ADC_CHSELR_CHSEL5)
-#define ADC_CHANNEL_6_BITFIELD             (ADC_CHSELR_CHSEL6)
-#define ADC_CHANNEL_7_BITFIELD             (ADC_CHSELR_CHSEL7)
-#define ADC_CHANNEL_8_BITFIELD             (ADC_CHSELR_CHSEL8)
-#define ADC_CHANNEL_9_BITFIELD             (ADC_CHSELR_CHSEL9)
-#define ADC_CHANNEL_10_BITFIELD            (ADC_CHSELR_CHSEL10)
-#define ADC_CHANNEL_11_BITFIELD            (ADC_CHSELR_CHSEL11)
-#define ADC_CHANNEL_12_BITFIELD            (ADC_CHSELR_CHSEL12)
-#define ADC_CHANNEL_13_BITFIELD            (ADC_CHSELR_CHSEL13)
-#define ADC_CHANNEL_14_BITFIELD            (ADC_CHSELR_CHSEL14)
-#define ADC_CHANNEL_15_BITFIELD            (ADC_CHSELR_CHSEL15)
-#if  defined(ADC_CCR_VLCDEN)
-#define ADC_CHANNEL_16_BITFIELD            (ADC_CHSELR_CHSEL16)
-#endif
-#define ADC_CHANNEL_17_BITFIELD            (ADC_CHSELR_CHSEL17)
-#define ADC_CHANNEL_18_BITFIELD            (ADC_CHSELR_CHSEL18)
-
-/* Internal mask for ADC analog watchdog:                                     */
-/* To select into literals LL_ADC_AWD_CHANNELx_xxx the relevant bits for:     */
-/* (concatenation of multiple bits used in different analog watchdogs,        */
-/* (feature of several watchdogs not available on all STM32 families)).       */
-/* - analog watchdog 1: monitored channel defined by number,                  */
-/*   selection of ADC group (ADC group regular).                              */
-
-/* Internal register offset for ADC analog watchdog channel configuration */
-#define ADC_AWD_CR1_REGOFFSET              ((uint32_t)0x00000000U)
-
-#define ADC_AWD_CRX_REGOFFSET_MASK         (ADC_AWD_CR1_REGOFFSET)
-
-#define ADC_AWD_CR1_CHANNEL_MASK           (ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)
-#define ADC_AWD_CR_ALL_CHANNEL_MASK        (ADC_AWD_CR1_CHANNEL_MASK)
-
-/* Internal register offset for ADC analog watchdog threshold configuration */
-#define ADC_AWD_TR1_REGOFFSET              (ADC_AWD_CR1_REGOFFSET)
-#define ADC_AWD_TRX_REGOFFSET_MASK         (ADC_AWD_TR1_REGOFFSET)
-
-
-/* ADC registers bits positions */
-#define ADC_CFGR1_RES_BITOFFSET_POS        ((uint32_t) 3U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_RES) */
-#define ADC_CFGR1_AWDSGL_BITOFFSET_POS     ((uint32_t)22U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_AWDSGL) */
-#define ADC_TR_HT_BITOFFSET_POS            ((uint32_t)16U) /* Value equivalent to POSITION_VAL(ADC_TR_HT) */
-#define ADC_CHSELR_CHSEL0_BITOFFSET_POS    ((uint32_t) 0U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL0) */
-#define ADC_CHSELR_CHSEL1_BITOFFSET_POS    ((uint32_t) 1U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL1) */
-#define ADC_CHSELR_CHSEL2_BITOFFSET_POS    ((uint32_t) 2U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL2) */
-#define ADC_CHSELR_CHSEL3_BITOFFSET_POS    ((uint32_t) 3U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL3) */
-#define ADC_CHSELR_CHSEL4_BITOFFSET_POS    ((uint32_t) 4U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL4) */
-#define ADC_CHSELR_CHSEL5_BITOFFSET_POS    ((uint32_t) 5U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL5) */
-#define ADC_CHSELR_CHSEL6_BITOFFSET_POS    ((uint32_t) 6U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL6) */
-#define ADC_CHSELR_CHSEL7_BITOFFSET_POS    ((uint32_t) 7U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL7) */
-#define ADC_CHSELR_CHSEL8_BITOFFSET_POS    ((uint32_t) 8U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL8) */
-#define ADC_CHSELR_CHSEL9_BITOFFSET_POS    ((uint32_t) 9U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL9) */
-#define ADC_CHSELR_CHSEL10_BITOFFSET_POS   ((uint32_t)10U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL10) */
-#define ADC_CHSELR_CHSEL11_BITOFFSET_POS   ((uint32_t)11U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL11) */
-#define ADC_CHSELR_CHSEL12_BITOFFSET_POS   ((uint32_t)12U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL12) */
-#define ADC_CHSELR_CHSEL13_BITOFFSET_POS   ((uint32_t)13U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL13) */
-#define ADC_CHSELR_CHSEL14_BITOFFSET_POS   ((uint32_t)14U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL14) */
-#define ADC_CHSELR_CHSEL15_BITOFFSET_POS   ((uint32_t)15U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL15) */
-#if  defined(ADC_CCR_VLCDEN)
-#define ADC_CHSELR_CHSEL16_BITOFFSET_POS   ((uint32_t)16U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL16) */
-#endif
-#define ADC_CHSELR_CHSEL17_BITOFFSET_POS   ((uint32_t)17U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL17) */
-#define ADC_CHSELR_CHSEL18_BITOFFSET_POS   ((uint32_t)18U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL18) */
-
-
-/* ADC registers bits groups */
-#define ADC_CR_BITS_PROPERTY_RS            (ADC_CR_ADCAL | ADC_CR_ADSTP | ADC_CR_ADSTART | ADC_CR_ADDIS | ADC_CR_ADEN) /* ADC register CR bits with HW property "rs": Software can read as well as set this bit. Writing '0' has no effect on the bit value. */
-
-
-/* ADC internal channels related definitions */
-/* Internal voltage reference VrefInt */
-#define VREFINT_CAL_ADDR                   ((uint16_t*) ((uint32_t)0x1FF80078U)) /* Internal voltage reference, address of parameter VREFINT_CAL: VrefInt ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
-#define VREFINT_CAL_VREF                   ((uint32_t) 3000U)                    /* Analog voltage reference (Vref+) value with which temperature sensor has been calibrated in production (tolerance: +-10 mV) (unit: mV). */
-/* Temperature sensor */
-/* Note: On device STM32L011, calibration parameter TS_CAL1 is not available. */
-#if !defined(STM32L011xx)
-#define TEMPSENSOR_CAL1_ADDR               ((uint16_t*) ((uint32_t)0x1FF8007AU)) /* Internal temperature sensor, address of parameter TS_CAL1: On STM32L0, temperature sensor ADC raw data acquired at temperature  30 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
-#endif
-#define TEMPSENSOR_CAL2_ADDR               ((uint16_t*) ((uint32_t)0x1FF8007EU)) /* Internal temperature sensor, address of parameter TS_CAL2: On STM32L0, temperature sensor ADC raw data acquired at temperature 130 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
-#if !defined(STM32L011xx)
-#define TEMPSENSOR_CAL1_TEMP               (( int32_t)   30)                     /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL1_ADDR (tolerance: +-5 DegC) (unit: DegC). */
-#endif
-#define TEMPSENSOR_CAL2_TEMP               (( int32_t)  130)                     /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL2_ADDR (tolerance: +-5 DegC) (unit: DegC). */
-#define TEMPSENSOR_CAL_VREFANALOG          ((uint32_t) 3000U)                    /* Analog voltage reference (Vref+) voltage with which temperature sensor has been calibrated in production (+-10 mV) (unit: mV). */
-
-
-/**
-  * @}
-  */
-
-
-#if  defined(USE_FULL_LL_DRIVER)
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup ADC_LL_Private_Macros ADC Private Macros
-  * @{
-  */
-
-
-/**
-  * @}
-  */
-
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup ADC_LL_ES_INIT ADC Exported Init structure
-  * @{
-  */
-
-/**
-  * @brief  Structure definition of some features of ADC common parameters
-  *         and multimode
-  *         (all ADC instances belonging to the same ADC common instance).
-  * @note   The setting of these parameters by function @ref LL_ADC_CommonInit()
-  *         is conditioned to ADC instances state (all ADC instances
-  *         sharing the same ADC common instance):
-  *         All ADC instances sharing the same ADC common instance must be
-  *         disabled.
-  */
-typedef struct
-{
-  uint32_t CommonClock;                 /*!< Set parameter common to several ADC: Clock source and prescaler.
-                                             This parameter can be a value of @ref ADC_LL_EC_COMMON_CLOCK_SOURCE
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_ADC_SetCommonClock(). */
-
-} LL_ADC_CommonInitTypeDef;
-
-/**
-  * @brief  Structure definition of some features of ADC instance.
-  * @note   These parameters have an impact on ADC scope: ADC instance.
-  *         Refer to corresponding unitary functions into
-  *         @ref ADC_LL_EF_Configuration_ADC_Instance .
-  * @note   The setting of these parameters by function @ref LL_ADC_Init()
-  *         is conditioned to ADC state:
-  *         ADC instance must be disabled.
-  *         This condition is applied to all ADC features, for efficiency
-  *         and compatibility over all STM32 families. However, the different
-  *         features can be set under different ADC state conditions
-  *         (setting possible with ADC enabled without conversion on going,
-  *         ADC enabled with conversion on going, ...)
-  *         Each feature can be updated afterwards with a unitary function
-  *         and potentially with ADC in a different state than disabled,
-  *         refer to description of each function for setting
-  *         conditioned to ADC state.
-  */
-typedef struct
-{
-  uint32_t Clock;                       /*!< Set ADC instance clock source and prescaler.
-                                             This parameter can be a value of @ref ADC_LL_EC_CLOCK_SOURCE
-                                             @note On this STM32 serie, this parameter has some clock ratio constraints:
-                                                   ADC clock synchronous (from PCLK) with prescaler 1 must be enabled only if PCLK has a 50% duty clock cycle
-                                                   (APB prescaler configured inside the RCC must be bypassed and the system clock must by 50% duty cycle).
-                                             
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_ADC_SetClock().
-                                             For more details, refer to description of this function. */
-
-  uint32_t Resolution;                  /*!< Set ADC resolution.
-                                             This parameter can be a value of @ref ADC_LL_EC_RESOLUTION
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_ADC_SetResolution(). */
-
-  uint32_t DataAlignment;               /*!< Set ADC conversion data alignment.
-                                             This parameter can be a value of @ref ADC_LL_EC_DATA_ALIGN
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_ADC_SetDataAlignment(). */
-
-  uint32_t LowPowerMode;                /*!< Set ADC low power mode.
-                                             This parameter can be a value of @ref ADC_LL_EC_LP_MODE
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_ADC_SetLowPowerMode(). */
-
-} LL_ADC_InitTypeDef;
-
-/**
-  * @brief  Structure definition of some features of ADC group regular.
-  * @note   These parameters have an impact on ADC scope: ADC group regular.
-  *         Refer to corresponding unitary functions into
-  *         @ref ADC_LL_EF_Configuration_ADC_Group_Regular
-  *         (functions with prefix "REG").
-  * @note   The setting of these parameters by function @ref LL_ADC_REG_Init()
-  *         is conditioned to ADC state:
-  *         ADC instance must be disabled.
-  *         This condition is applied to all ADC features, for efficiency
-  *         and compatibility over all STM32 families. However, the different
-  *         features can be set under different ADC state conditions
-  *         (setting possible with ADC enabled without conversion on going,
-  *         ADC enabled with conversion on going, ...)
-  *         Each feature can be updated afterwards with a unitary function
-  *         and potentially with ADC in a different state than disabled,
-  *         refer to description of each function for setting
-  *         conditioned to ADC state.
-  */
-typedef struct
-{
-  uint32_t TriggerSource;               /*!< Set ADC group regular conversion trigger source: internal (SW start) or from external IP (timer event, external interrupt line).
-                                             This parameter can be a value of @ref ADC_LL_EC_REG_TRIGGER_SOURCE
-                                             @note On this STM32 serie, setting trigger source to external trigger also set trigger polarity to rising edge
-                                                   (default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value).
-                                                   In case of need to modify trigger edge, use function @ref LL_ADC_REG_SetTriggerEdge().
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetTriggerSource(). */
-
-  uint32_t SequencerDiscont;            /*!< Set ADC group regular sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks.
-                                             This parameter can be a value of @ref ADC_LL_EC_REG_SEQ_DISCONT_MODE
-                                             @note This parameter has an effect only if group regular sequencer is enabled
-                                                   (several ADC channels enabled in group regular sequencer).
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetSequencerDiscont(). */
-
-  uint32_t ContinuousMode;              /*!< Set ADC continuous conversion mode on ADC group regular, whether ADC conversions are performed in single mode (one conversion per trigger) or in continuous mode (after the first trigger, following conversions launched successively automatically).
-                                             This parameter can be a value of @ref ADC_LL_EC_REG_CONTINUOUS_MODE
-                                             Note: It is not possible to enable both ADC group regular continuous mode and discontinuous mode.
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetContinuousMode(). */
-
-  uint32_t DMATransfer;                 /*!< Set ADC group regular conversion data transfer: no transfer or transfer by DMA, and DMA requests mode.
-                                             This parameter can be a value of @ref ADC_LL_EC_REG_DMA_TRANSFER
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetDMATransfer(). */
-
-  uint32_t Overrun;                     /*!< Set ADC group regular behavior in case of overrun:
-                                             data preserved or overwritten.
-                                             This parameter can be a value of @ref ADC_LL_EC_REG_OVR_DATA_BEHAVIOR
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetOverrun(). */
-
-} LL_ADC_REG_InitTypeDef;
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup ADC_LL_Exported_Constants ADC Exported Constants
-  * @{
-  */
-
-/** @defgroup ADC_LL_EC_FLAG ADC flags
-  * @brief    Flags defines which can be used with LL_ADC_ReadReg function
-  * @{
-  */
-#define LL_ADC_FLAG_ADRDY                  ADC_ISR_ADRDY      /*!< ADC flag ADC instance ready */
-#define LL_ADC_FLAG_EOC                    ADC_ISR_EOC        /*!< ADC flag ADC group regular end of unitary conversion */
-#define LL_ADC_FLAG_EOS                    ADC_ISR_EOS        /*!< ADC flag ADC group regular end of sequence conversions */
-#define LL_ADC_FLAG_OVR                    ADC_ISR_OVR        /*!< ADC flag ADC group regular overrun */
-#define LL_ADC_FLAG_EOSMP                  ADC_ISR_EOSMP      /*!< ADC flag ADC group regular end of sampling phase */
-#define LL_ADC_FLAG_AWD1                   ADC_ISR_AWD        /*!< ADC flag ADC analog watchdog 1 */
-#define LL_ADC_FLAG_EOCAL                  ADC_ISR_EOCAL      /*!< ADC flag end of calibration */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_IT ADC interruptions for configuration (interruption enable or disable)
-  * @brief    IT defines which can be used with LL_ADC_ReadReg and  LL_ADC_WriteReg functions
-  * @{
-  */
-#define LL_ADC_IT_ADRDY                    ADC_IER_ADRDYIE    /*!< ADC interruption ADC instance ready */
-#define LL_ADC_IT_EOC                      ADC_IER_EOCIE      /*!< ADC interruption ADC group regular end of unitary conversion */
-#define LL_ADC_IT_EOS                      ADC_IER_EOSIE      /*!< ADC interruption ADC group regular end of sequence conversions */
-#define LL_ADC_IT_OVR                      ADC_IER_OVRIE      /*!< ADC interruption ADC group regular overrun */
-#define LL_ADC_IT_EOSMP                    ADC_IER_EOSMPIE    /*!< ADC interruption ADC group regular end of sampling phase */
-#define LL_ADC_IT_AWD1                     ADC_IER_AWDIE      /*!< ADC interruption ADC analog watchdog 1 */
-#define LL_ADC_IT_EOCAL                    ADC_IER_EOCALIE    /*!< ADC interruption ADC end of calibration */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_REGISTERS  ADC registers compliant with specific purpose
-  * @{
-  */
-/* List of ADC registers intended to be used (most commonly) with             */
-/* DMA transfer.                                                              */
-/* Refer to function @ref LL_ADC_DMA_GetRegAddr().                            */
-#define LL_ADC_DMA_REG_REGULAR_DATA          ((uint32_t)0x00000000U) /* ADC group regular conversion data register (corresponding to register DR) to be used with ADC configured in independent mode. Without DMA transfer, register accessed by LL function @ref LL_ADC_REG_ReadConversionData32() and other functions @ref LL_ADC_REG_ReadConversionDatax() */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_COMMON_CLOCK_SOURCE  ADC common - Clock source
-  * @{
-  */
-#define LL_ADC_CLOCK_ASYNC_DIV1            ((uint32_t)0x00000000U)                               /*!< ADC asynchronous clock without prescaler */
-#define LL_ADC_CLOCK_ASYNC_DIV2            (ADC_CCR_PRESC_0)                                     /*!< ADC asynchronous clock with prescaler division by 2. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). */
-#define LL_ADC_CLOCK_ASYNC_DIV4            (ADC_CCR_PRESC_1                  )                   /*!< ADC asynchronous clock with prescaler division by 4. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). */
-#define LL_ADC_CLOCK_ASYNC_DIV6            (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0)                   /*!< ADC asynchronous clock with prescaler division by 6. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). */
-#define LL_ADC_CLOCK_ASYNC_DIV8            (ADC_CCR_PRESC_2                                    ) /*!< ADC asynchronous clock with prescaler division by 8. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). */
-#define LL_ADC_CLOCK_ASYNC_DIV10           (ADC_CCR_PRESC_2                   | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division by 10. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). */
-#define LL_ADC_CLOCK_ASYNC_DIV12           (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1                  ) /*!< ADC asynchronous clock with prescaler division by 12. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). */
-#define LL_ADC_CLOCK_ASYNC_DIV16           (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division by 16. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). */
-#define LL_ADC_CLOCK_ASYNC_DIV32           (ADC_CCR_PRESC_3)                                     /*!< ADC asynchronous clock with prescaler division by 32. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). */
-#define LL_ADC_CLOCK_ASYNC_DIV64           (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0)                   /*!< ADC asynchronous clock with prescaler division by 64. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). */
-#define LL_ADC_CLOCK_ASYNC_DIV128          (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1)                   /*!< ADC asynchronous clock with prescaler division by 128. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). */
-#define LL_ADC_CLOCK_ASYNC_DIV256          (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC asynchronous clock with prescaler division by 256. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_COMMON_CLOCK_FREQ_MODE  ADC common - Clock frequency mode
-  * @{
-  */
-#define LL_ADC_CLOCK_FREQ_MODE_HIGH        ((uint32_t)0x00000000U)/*!< ADC clock mode to high frequency. On STM32L0, ADC clock frequency above 2.8MHz.  */
-#define LL_ADC_CLOCK_FREQ_MODE_LOW         (ADC_CCR_LFMEN)        /*!< ADC clock mode to low frequency. On STM32L0, ADC clock frequency below 2.8MHz.  */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_COMMON_PATH_INTERNAL  ADC common - Measurement path to internal channels
-  * @{
-  */
-/* Note: Other measurement paths to internal channels may be available        */
-/*       (connections to other peripherals).                                  */
-/*       If they are not listed below, they do not require any specific       */
-/*       path enable. In this case, Access to measurement path is done        */
-/*       only by selecting the corresponding ADC internal channel.            */
-#define LL_ADC_PATH_INTERNAL_NONE          ((uint32_t)0x00000000U)/*!< ADC measurement pathes all disabled */
-#define LL_ADC_PATH_INTERNAL_VREFINT       (ADC_CCR_VREFEN)       /*!< ADC measurement path to internal channel VrefInt */
-#define LL_ADC_PATH_INTERNAL_TEMPSENSOR    (ADC_CCR_TSEN)         /*!< ADC measurement path to internal channel temperature sensor */
-#define LL_ADC_PATH_INTERNAL_VLCD          (ADC_CCR_VLCDEN)       /*!< ADC measurement path to internal channel Vlcd */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_CLOCK_SOURCE  ADC instance - Clock source
-  * @{
-  */
-#define LL_ADC_CLOCK_SYNC_PCLK_DIV4        (ADC_CFGR2_CKMODE_1)                                  /*!< ADC synchronous clock derived from AHB clock divided by 4 */
-#define LL_ADC_CLOCK_SYNC_PCLK_DIV2        (ADC_CFGR2_CKMODE_0)                                  /*!< ADC synchronous clock derived from AHB clock divided by 2 */
-#define LL_ADC_CLOCK_SYNC_PCLK_DIV1        (ADC_CFGR2_CKMODE_1 | ADC_CFGR2_CKMODE_0)             /*!< ADC synchronous clock derived from AHB clock not divided  */
-#define LL_ADC_CLOCK_ASYNC                 ((uint32_t)0x00000000U)                               /*!< ADC asynchronous clock. Asynchronous clock prescaler can be configured using function @ref LL_ADC_SetCommonClock(). */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_RESOLUTION  ADC instance - Resolution
-  * @{
-  */
-#define LL_ADC_RESOLUTION_12B              ((uint32_t)0x00000000U)             /*!< ADC resolution 12 bits */
-#define LL_ADC_RESOLUTION_10B              (                  ADC_CFGR1_RES_0) /*!< ADC resolution 10 bits */
-#define LL_ADC_RESOLUTION_8B               (ADC_CFGR1_RES_1                  ) /*!< ADC resolution  8 bits */
-#define LL_ADC_RESOLUTION_6B               (ADC_CFGR1_RES_1 | ADC_CFGR1_RES_0) /*!< ADC resolution  6 bits */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_DATA_ALIGN  ADC instance - Data alignment
-  * @{
-  */
-#define LL_ADC_DATA_ALIGN_RIGHT            ((uint32_t)0x00000000U)/*!< ADC conversion data alignment: right aligned (alignment on data register LSB bit 0)*/
-#define LL_ADC_DATA_ALIGN_LEFT             (ADC_CFGR1_ALIGN)      /*!< ADC conversion data alignment: left aligned (aligment on data register MSB bit 15)*/
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_LP_MODE  ADC instance - Low power mode
-  * @{
-  */
-#define LL_ADC_LP_MODE_NONE                ((uint32_t)0x00000000U)             /*!< No ADC low power mode activated */
-#define LL_ADC_LP_AUTOWAIT                 (ADC_CFGR1_WAIT)                    /*!< ADC low power mode auto delay: Dynamic low power mode, ADC conversions are performed only when necessary (when previous ADC conversion data is read). See description with function @ref LL_ADC_SetLowPowerMode(). */
-#define LL_ADC_LP_AUTOPOWEROFF             (ADC_CFGR1_AUTOFF)                  /*!< ADC low power mode auto power-off: the ADC automatically powers-off after a ADC conversion and automatically wakes up when a new ADC conversion is triggered (with startup time between trigger and start of sampling). See description with function @ref LL_ADC_SetLowPowerMode(). */
-#define LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF    (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF) /*!< ADC low power modes auto wait and auto power-off combined. See description with function @ref LL_ADC_SetLowPowerMode(). */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_GROUPS  ADC instance - Groups
-  * @{
-  */
-#define LL_ADC_GROUP_REGULAR               ((uint32_t)0x00000001U) /*!< ADC group regular (available on all STM32 devices) */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_CHANNEL  ADC instance - Channel number
-  * @{
-  */
-#define LL_ADC_CHANNEL_0                   (ADC_CHANNEL_0_NUMBER  | ADC_CHANNEL_0_BITFIELD ) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN0  */
-#define LL_ADC_CHANNEL_1                   (ADC_CHANNEL_1_NUMBER  | ADC_CHANNEL_1_BITFIELD ) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN1  */
-#define LL_ADC_CHANNEL_2                   (ADC_CHANNEL_2_NUMBER  | ADC_CHANNEL_2_BITFIELD ) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN2  */
-#define LL_ADC_CHANNEL_3                   (ADC_CHANNEL_3_NUMBER  | ADC_CHANNEL_3_BITFIELD ) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN3  */
-#define LL_ADC_CHANNEL_4                   (ADC_CHANNEL_4_NUMBER  | ADC_CHANNEL_4_BITFIELD ) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN4  */
-#define LL_ADC_CHANNEL_5                   (ADC_CHANNEL_5_NUMBER  | ADC_CHANNEL_5_BITFIELD ) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN5  */
-#define LL_ADC_CHANNEL_6                   (ADC_CHANNEL_6_NUMBER  | ADC_CHANNEL_6_BITFIELD ) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN6  */
-#define LL_ADC_CHANNEL_7                   (ADC_CHANNEL_7_NUMBER  | ADC_CHANNEL_7_BITFIELD ) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN7  */
-#define LL_ADC_CHANNEL_8                   (ADC_CHANNEL_8_NUMBER  | ADC_CHANNEL_8_BITFIELD ) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN8  */
-#define LL_ADC_CHANNEL_9                   (ADC_CHANNEL_9_NUMBER  | ADC_CHANNEL_9_BITFIELD ) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN9  */
-#define LL_ADC_CHANNEL_10                  (ADC_CHANNEL_10_NUMBER | ADC_CHANNEL_10_BITFIELD) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN10 */
-#define LL_ADC_CHANNEL_11                  (ADC_CHANNEL_11_NUMBER | ADC_CHANNEL_11_BITFIELD) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN11 */
-#define LL_ADC_CHANNEL_12                  (ADC_CHANNEL_12_NUMBER | ADC_CHANNEL_12_BITFIELD) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN12 */
-#define LL_ADC_CHANNEL_13                  (ADC_CHANNEL_13_NUMBER | ADC_CHANNEL_13_BITFIELD) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN13 */
-#define LL_ADC_CHANNEL_14                  (ADC_CHANNEL_14_NUMBER | ADC_CHANNEL_14_BITFIELD) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN14 */
-#define LL_ADC_CHANNEL_15                  (ADC_CHANNEL_15_NUMBER | ADC_CHANNEL_15_BITFIELD) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN15 */
-#define LL_ADC_CHANNEL_17                  (ADC_CHANNEL_17_NUMBER | ADC_CHANNEL_17_BITFIELD) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN17 */
-#define LL_ADC_CHANNEL_18                  (ADC_CHANNEL_18_NUMBER | ADC_CHANNEL_18_BITFIELD) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN18 */
-#define LL_ADC_CHANNEL_VREFINT             (LL_ADC_CHANNEL_17 | ADC_CHANNEL_ID_INTERNAL_CH)  /*!< ADC internal channel connected to VrefInt: Internal voltage reference. */
-#define LL_ADC_CHANNEL_TEMPSENSOR          (LL_ADC_CHANNEL_18 | ADC_CHANNEL_ID_INTERNAL_CH)  /*!< ADC internal channel connected to Temperature sensor. */
-#if defined(ADC_CCR_VLCDEN)
-#define LL_ADC_CHANNEL_16                  (ADC_CHANNEL_16_NUMBER | ADC_CHANNEL_16_BITFIELD) /*!< ADC external channel (channel connected to GPIO pin) ADCx_IN16 */
-#define LL_ADC_CHANNEL_VLCD                (LL_ADC_CHANNEL_16 | ADC_CHANNEL_ID_INTERNAL_CH)  /*!< ADC internal channel connected to Vlcd: Vlcd voltage through a divider ladder of factor 1/4, 1/3 or 1/2 (set by LCD voltage generator biasing),  to have Vlcd always below Vdda. */
-#endif
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_REG_TRIGGER_SOURCE  ADC group regular - Trigger source
-  * @{
-  */
-#define LL_ADC_REG_TRIG_SOFTWARE           ((uint32_t)0x00000000U)                                                                        /*!< ADC group regular conversion trigger internal: SW start. */
-#define LL_ADC_REG_TRIG_EXT_TIM6_TRGO      (ADC_REG_TRIG_EXT_EDGE_DEFAULT)                                                                /*!< ADC group regular conversion trigger from external IP: TIM6 TRGO. Trigger edge set to rising edge (default setting). */
-#define LL_ADC_REG_TRIG_EXT_TIM21_CH2      (ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT)                                           /*!< ADC group regular conversion trigger from external IP: TIM21 channel 2 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). */
-#define LL_ADC_REG_TRIG_EXT_TIM2_TRGO      (ADC_CFGR1_EXTSEL_1 | ADC_REG_TRIG_EXT_EDGE_DEFAULT)                                           /*!< ADC group regular conversion trigger from external IP: TIM2 TRGO. Trigger edge set to rising edge (default setting). */
-#define LL_ADC_REG_TRIG_EXT_TIM2_CH4       (ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT)                      /*!< ADC group regular conversion trigger from external IP: TIM2 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). */
-#define LL_ADC_REG_TRIG_EXT_TIM22_TRGO     (ADC_CFGR1_EXTSEL_2 | ADC_REG_TRIG_EXT_EDGE_DEFAULT)                                           /*!< ADC group regular conversion trigger from external IP: TIM22 TRGO. Trigger edge set to rising edge (default setting). */
-#define LL_ADC_REG_TRIG_EXT_TIM2_CH3       (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT)                      /*!< ADC group regular conversion trigger from external IP: TIM2 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). */
-#define LL_ADC_REG_TRIG_EXT_TIM3_TRGO      (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_1 | ADC_REG_TRIG_EXT_EDGE_DEFAULT)                      /*!< ADC group regular conversion trigger from external IP: TIM3 TRG0. Trigger edge set to rising edge (default setting). */
-#define LL_ADC_REG_TRIG_EXT_EXTI_LINE11    (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*!< ADC group regular conversion trigger from external IP: external interrupt line 11. Trigger edge set to rising edge (default setting). */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_REG_TRIGGER_EDGE  ADC group regular - Trigger edge
-  * @{
-  */
-#define LL_ADC_REG_TRIG_EXT_RISING         (                    ADC_CFGR1_EXTEN_0) /*!< ADC group regular conversion trigger polarity set to rising edge */
-#define LL_ADC_REG_TRIG_EXT_FALLING        (ADC_CFGR1_EXTEN_1                    ) /*!< ADC group regular conversion trigger polarity set to falling edge */
-#define LL_ADC_REG_TRIG_EXT_RISINGFALLING  (ADC_CFGR1_EXTEN_1 | ADC_CFGR1_EXTEN_0) /*!< ADC group regular conversion trigger polarity set to both rising and falling edges */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_REG_CONTINUOUS_MODE  ADC group regular - Continuous mode
-* @{
-*/
-#define LL_ADC_REG_CONV_SINGLE             ((uint32_t)0x00000000U) /*!< ADC conversions are performed in single mode: one conversion per trigger */
-#define LL_ADC_REG_CONV_CONTINUOUS         (ADC_CFGR1_CONT)        /*!< ADC conversions are performed in continuous mode: after the first trigger, following conversions launched successively automatically */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_REG_DMA_TRANSFER  ADC group regular - DMA transfer of ADC conversion data
-  * @{
-  */
-#define LL_ADC_REG_DMA_TRANSFER_NONE       ((uint32_t)0x00000000U)              /*!< ADC conversions are not transferred by DMA */
-#define LL_ADC_REG_DMA_TRANSFER_LIMITED    (                   ADC_CFGR1_DMAEN) /*!< ADC conversion data are transferred by DMA, in limited mode (one shot mode): DMA transfer requests are stopped when number of DMA data transfers (number of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circular. */
-#define LL_ADC_REG_DMA_TRANSFER_UNLIMITED  (ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN) /*!< ADC conversion data are transferred by DMA, in unlimited mode: DMA transfer requests are unlimited, whatever number of DMA data transferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_REG_OVR_DATA_BEHAVIOR  ADC group regular - Overrun behavior on conversion data
-* @{
-*/
-#define LL_ADC_REG_OVR_DATA_PRESERVED      ((uint32_t)0x00000000U)/*!< ADC group regular behavior in case of overrun: data preserved */
-#define LL_ADC_REG_OVR_DATA_OVERWRITTEN    (ADC_CFGR1_OVRMOD)     /*!< ADC group regular behavior in case of overrun: data overwritten */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_REG_SEQ_SCAN_DIRECTION  ADC group regular - Sequencer scan direction
-  * @{
-  */
-#define LL_ADC_REG_SEQ_SCAN_DIR_FORWARD    ((uint32_t)0x00000000U)/*!< ADC group regular sequencer scan direction forward: from lowest channel number to highest channel number (scan of all ranks, ADC conversion of ranks with channels enabled in sequencer). On some other STM32 families, this setting is not available and the default scan direction is forward. */
-#define LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD   (ADC_CFGR1_SCANDIR)    /*!< ADC group regular sequencer scan direction backward: from highest channel number to lowest channel number (scan of all ranks, ADC conversion of ranks with channels enabled in sequencer) */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_REG_SEQ_DISCONT_MODE  ADC group regular - Sequencer discontinuous mode
-  * @{
-  */
-#define LL_ADC_REG_SEQ_DISCONT_DISABLE     ((uint32_t)0x00000000U)                                                          /*!< ADC group regular sequencer discontinuous mode disable */
-#define LL_ADC_REG_SEQ_DISCONT_1RANK       (ADC_CFGR1_DISCEN)                                                               /*!< ADC group regular sequencer discontinuous mode enable with sequence interruption every rank */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_CHANNEL_SAMPLINGTIME  Channel - Sampling time
-  * @{
-  */
-#define LL_ADC_SAMPLINGTIME_1CYCLE_5       ((uint32_t)0x00000000U)                               /*!< Sampling time 1.5 ADC clock cycle */
-#define LL_ADC_SAMPLINGTIME_3CYCLES_5      (ADC_SMPR_SMP_0)                                      /*!< Sampling time 3.5 ADC clock cycles */
-#define LL_ADC_SAMPLINGTIME_7CYCLES_5      (ADC_SMPR_SMP_1)                                      /*!< Sampling time 7.5 ADC clock cycles */
-#define LL_ADC_SAMPLINGTIME_12CYCLES_5     (ADC_SMPR_SMP_1 | ADC_SMPR_SMP_0)                     /*!< Sampling time 12.5 ADC clock cycles */
-#define LL_ADC_SAMPLINGTIME_19CYCLES_5     (ADC_SMPR_SMP_2)                                      /*!< Sampling time 19.5 ADC clock cycles */
-#define LL_ADC_SAMPLINGTIME_39CYCLES_5     (ADC_SMPR_SMP_2 | ADC_SMPR_SMP_0)                     /*!< Sampling time 39.5 ADC clock cycles */
-#define LL_ADC_SAMPLINGTIME_79CYCLES_5     (ADC_SMPR_SMP_2 | ADC_SMPR_SMP_1)                     /*!< Sampling time 79.5 ADC clock cycles */
-#define LL_ADC_SAMPLINGTIME_160CYCLES_5    (ADC_SMPR_SMP_2 | ADC_SMPR_SMP_1 | ADC_SMPR_SMP_0)    /*!< Sampling time 160.5 ADC clock cycles */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_AWD_NUMBER Analog watchdog - Analog watchdog number
-  * @{
-  */
-#define LL_ADC_AWD1                        (ADC_AWD_CR1_CHANNEL_MASK  | ADC_AWD_CR1_REGOFFSET) /*!< ADC analog watchdog number 1 */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_AWD_CHANNELS  Analog watchdog - Monitored channels
-  * @{
-  */
-#define LL_ADC_AWD_DISABLE                 ((uint32_t)0x00000000U)                                                                    /*!< ADC analog watchdog monitoring disabled */
-#define LL_ADC_AWD_ALL_CHANNELS_REG        (                                                    ADC_CFGR1_AWDEN                   )   /*!< ADC analog watchdog monitoring of all channels, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_0_REG           ((LL_ADC_CHANNEL_0  & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN0, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_1_REG           ((LL_ADC_CHANNEL_1  & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN1, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_2_REG           ((LL_ADC_CHANNEL_2  & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN2, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_3_REG           ((LL_ADC_CHANNEL_3  & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN3, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_4_REG           ((LL_ADC_CHANNEL_4  & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN4, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_5_REG           ((LL_ADC_CHANNEL_5  & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN5, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_6_REG           ((LL_ADC_CHANNEL_6  & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN6, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_7_REG           ((LL_ADC_CHANNEL_7  & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN7, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_8_REG           ((LL_ADC_CHANNEL_8  & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN8, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_9_REG           ((LL_ADC_CHANNEL_9  & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN9, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_10_REG          ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN10, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_11_REG          ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN11, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_12_REG          ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN12, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_13_REG          ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN13, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_14_REG          ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN14, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_15_REG          ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN15, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_17_REG          ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN17, converted by group regular only */
-#define LL_ADC_AWD_CHANNEL_18_REG          ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN18, converted by group regular only */
-#define LL_ADC_AWD_CH_VREFINT_REG          ((LL_ADC_CHANNEL_VREFINT    & ADC_CHANNEL_ID_MASK) | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC internal channel connected to VrefInt: Internal voltage reference, converted by group regular only */
-#define LL_ADC_AWD_CH_TEMPSENSOR_REG       ((LL_ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_ID_MASK) | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC internal channel connected to Temperature sensor, converted by group regular only */
-#if defined(ADC_CCR_VLCDEN)
-#define LL_ADC_AWD_CHANNEL_16_REG          ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK)         | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN16, converted by group regular only */
-#define LL_ADC_AWD_CH_VLCD_REG             ((LL_ADC_CHANNEL_VLCD       & ADC_CHANNEL_ID_MASK) | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)   /*!< ADC analog watchdog monitoring of ADC internal channel connected to Vbat/3: Vbat voltage through a divider ladder of factor 1/3 to have Vbat always below Vdda, converted by group regular only */
-#endif
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_AWD_THRESHOLDS  Analog watchdog - Thresholds
-  * @{
-  */
-#define LL_ADC_AWD_THRESHOLD_HIGH          (ADC_TR_HT            )     /*!< ADC analog watchdog threshold high */
-#define LL_ADC_AWD_THRESHOLD_LOW           (            ADC_TR_LT)     /*!< ADC analog watchdog threshold low */
-#define LL_ADC_AWD_THRESHOLDS_HIGH_LOW     (ADC_TR_HT | ADC_TR_LT)     /*!< ADC analog watchdog both thresholds high and low concatenated into the same data */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_OVS_SCOPE  Oversampling - Oversampling scope
-  * @{
-  */
-#define LL_ADC_OVS_DISABLE                 ((uint32_t)0x00000000U)                               /*!< ADC oversampling disabled. */
-#define LL_ADC_OVS_GRP_REGULAR_CONTINUED   (                                    ADC_CFGR2_OVSE)  /*!< ADC oversampling on conversions of ADC group regular. Literal suffix "continued" is kept for compatibility with other STM32 devices featuring ADC group injected, in this case other oversampling scope parameters are available. */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_OVS_DISCONT_MODE  Oversampling - Discontinuous mode
-  * @{
-  */
-#define LL_ADC_OVS_REG_CONT                ((uint32_t)0x00000000U)/*!< ADC oversampling discontinuous mode: continuous mode (all conversions of oversampling ratio are done from 1 trigger) */
-#define LL_ADC_OVS_REG_DISCONT             (ADC_CFGR2_TOVS)       /*!< ADC oversampling discontinuous mode: discontinuous mode (each conversion of oversampling ratio needs a trigger) */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_OVS_RATIO  Oversampling - Ratio
-  * @{
-  */
-#define LL_ADC_OVS_RATIO_2                 ((uint32_t)0x00000000U)                                  /*!< ADC oversampling ratio of 2 (2 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) */
-#define LL_ADC_OVS_RATIO_4                 (                                      ADC_CFGR2_OVSR_0) /*!< ADC oversampling ratio of 4 (4 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) */
-#define LL_ADC_OVS_RATIO_8                 (                   ADC_CFGR2_OVSR_1                   ) /*!< ADC oversampling ratio of 8 (8 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) */
-#define LL_ADC_OVS_RATIO_16                (                   ADC_CFGR2_OVSR_1 | ADC_CFGR2_OVSR_0) /*!< ADC oversampling ratio of 16 (16 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) */
-#define LL_ADC_OVS_RATIO_32                (ADC_CFGR2_OVSR_2                                      ) /*!< ADC oversampling ratio of 32 (32 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) */
-#define LL_ADC_OVS_RATIO_64                (ADC_CFGR2_OVSR_2                    | ADC_CFGR2_OVSR_0) /*!< ADC oversampling ratio of 64 (64 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) */
-#define LL_ADC_OVS_RATIO_128               (ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_1                   ) /*!< ADC oversampling ratio of 128 (128 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) */
-#define LL_ADC_OVS_RATIO_256               (ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_1 | ADC_CFGR2_OVSR_0) /*!< ADC oversampling ratio of 256 (256 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EC_OVS_SHIFT  Oversampling - Data shift
-  * @{
-  */
-#define LL_ADC_OVS_SHIFT_NONE              ((uint32_t)0x00000000U)                                                     /*!< ADC oversampling no shift (sum of the ADC conversions data is not divided to result as the ADC oversampling conversion data) */
-#define LL_ADC_OVS_SHIFT_RIGHT_1           (                                                         ADC_CFGR2_OVSS_0) /*!< ADC oversampling shift of 1 (sum of the ADC conversions data is divided by 2 to result as the ADC oversampling conversion data) */
-#define LL_ADC_OVS_SHIFT_RIGHT_2           (                                      ADC_CFGR2_OVSS_1                   ) /*!< ADC oversampling shift of 2 (sum of the ADC conversions data is divided by 4 to result as the ADC oversampling conversion data) */
-#define LL_ADC_OVS_SHIFT_RIGHT_3           (                                      ADC_CFGR2_OVSS_1 | ADC_CFGR2_OVSS_0) /*!< ADC oversampling shift of 3 (sum of the ADC conversions data is divided by 8 to result as the ADC oversampling conversion data) */
-#define LL_ADC_OVS_SHIFT_RIGHT_4           (                   ADC_CFGR2_OVSS_2                                      ) /*!< ADC oversampling shift of 4 (sum of the ADC conversions data is divided by 16 to result as the ADC oversampling conversion data) */
-#define LL_ADC_OVS_SHIFT_RIGHT_5           (                   ADC_CFGR2_OVSS_2                    | ADC_CFGR2_OVSS_0) /*!< ADC oversampling shift of 5 (sum of the ADC conversions data is divided by 32 to result as the ADC oversampling conversion data) */
-#define LL_ADC_OVS_SHIFT_RIGHT_6           (                   ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_1                   ) /*!< ADC oversampling shift of 6 (sum of the ADC conversions data is divided by 64 to result as the ADC oversampling conversion data) */
-#define LL_ADC_OVS_SHIFT_RIGHT_7           (                   ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_1 | ADC_CFGR2_OVSS_0) /*!< ADC oversampling shift of 7 (sum of the ADC conversions data is divided by 128 to result as the ADC oversampling conversion data) */
-#define LL_ADC_OVS_SHIFT_RIGHT_8           (ADC_CFGR2_OVSS_3                                                         ) /*!< ADC oversampling shift of 8 (sum of the ADC conversions data is divided by 256 to result as the ADC oversampling conversion data) */
-/**
-  * @}
-  */
-
-
-/** @defgroup ADC_LL_EC_HW_DELAYS  Definitions of ADC hardware constraints delays
-  * @note   Only ADC IP HW delays are defined in ADC LL driver driver,
-  *         not timeout values.
-  *         For details on delays values, refer to descriptions in source code
-  *         above each literal definition.
-  * @{
-  */
-  
-/* Note: Only ADC IP HW delays are defined in ADC LL driver driver,           */
-/*       not timeout values.                                                  */
-/*       Timeout values for ADC operations are dependent to device clock      */
-/*       configuration (system clock versus ADC clock),                       */
-/*       and therefore must be defined in user application.                   */
-/*       Indications for estimation of ADC timeout delays, for this           */
-/*       STM32 serie:                                                         */
-/*       - ADC calibration time: maximum delay is 83/fADC.                    */
-/*         (refer to device datasheet, parameter "tCAL")                      */
-/*       - ADC enable time: maximum delay is 1 conversion cycle.              */
-/*         (refer to device datasheet, parameter "tSTAB")                     */
-/*       - ADC disable time: maximum delay should be a few ADC clock cycles   */
-/*       - ADC stop conversion time: maximum delay should be a few ADC clock  */
-/*         cycles                                                             */
-/*       - ADC conversion time: duration depending on ADC clock and ADC       */
-/*         configuration.                                                     */
-/*         (refer to device reference manual, section "Timing")               */
-
-/* Delay for ADC stabilization time (ADC voltage regulator start-up time)     */
-/* Delay set to maximum value (refer to device datasheet,                     */
-/* parameter "tUP_LDO").                                                      */
-#define LL_ADC_DELAY_INTERNAL_REGUL_STAB_US ((uint32_t)  10U)  /*!< Delay for ADC stabilization time (ADC voltage regulator start-up time) */
-
-/* Delay for internal voltage reference stabilization time.                   */
-/* Delay set to maximum value (refer to device datasheet,                     */
-/* parameter "TADC_BUF").                                                     */
-/* Unit: us                                                                   */
-#define LL_ADC_DELAY_VREFINT_STAB_US       ((uint32_t)  10U)  /*!< Delay for internal voltage reference stabilization time */
-
-/* Delay for temperature sensor stabilization time.                           */
-/* Literal set to maximum value (refer to device datasheet,                   */
-/* parameter "tSTART").                                                       */
-/* Unit: us                                                                   */
-#define LL_ADC_DELAY_TEMPSENSOR_STAB_US    ((uint32_t)  10U)  /*!< Delay for temperature sensor stabilization time */
-
-/* Delay required between ADC end of calibration and ADC enable.              */
-/* Note: On this STM32 serie, a minimum number of ADC clock cycles            */
-/*       are required between ADC end of calibration and ADC enable.          */
-/*       Wait time can be computed in user application by waiting for the     */
-/*       equivalent number of CPU cycles, by taking into account              */
-/*       ratio of CPU clock versus ADC clock prescalers.                      */
-/* Unit: ADC clock cycles.                                                    */
-#define LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES ((uint32_t) 2U)  /*!< Delay required between ADC end of calibration and ADC enable */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup ADC_LL_Exported_Macros ADC Exported Macros
-  * @{
-  */
-
-/** @defgroup ADC_LL_EM_WRITE_READ Common write and read registers Macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in ADC register
-  * @param  __INSTANCE__ ADC Instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_ADC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in ADC register
-  * @param  __INSTANCE__ ADC Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_ADC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EM_HELPER_MACRO ADC helper macro
-  * @{
-  */
-
-/**
-  * @brief  Helper macro to get ADC channel number in decimal format
-  *         from literals LL_ADC_CHANNEL_x.
-  * @note   Example:
-  *           __LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_CHANNEL_4)
-  *           will return decimal number "4".
-  * @note   The input can be a value from functions where a channel
-  *         number is returned, either defined with number
-  *         or with bitfield (only one bit must be set).
-  * @param  __CHANNEL__ This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_CHANNEL_0
-  *         @arg @ref LL_ADC_CHANNEL_1
-  *         @arg @ref LL_ADC_CHANNEL_2
-  *         @arg @ref LL_ADC_CHANNEL_3
-  *         @arg @ref LL_ADC_CHANNEL_4
-  *         @arg @ref LL_ADC_CHANNEL_5
-  *         @arg @ref LL_ADC_CHANNEL_6
-  *         @arg @ref LL_ADC_CHANNEL_7
-  *         @arg @ref LL_ADC_CHANNEL_8
-  *         @arg @ref LL_ADC_CHANNEL_9
-  *         @arg @ref LL_ADC_CHANNEL_10
-  *         @arg @ref LL_ADC_CHANNEL_11
-  *         @arg @ref LL_ADC_CHANNEL_12
-  *         @arg @ref LL_ADC_CHANNEL_13
-  *         @arg @ref LL_ADC_CHANNEL_14
-  *         @arg @ref LL_ADC_CHANNEL_15
-  *         @arg @ref LL_ADC_CHANNEL_16         (1)
-  *         @arg @ref LL_ADC_CHANNEL_17
-  *         @arg @ref LL_ADC_CHANNEL_18
-  *         @arg @ref LL_ADC_CHANNEL_VREFINT
-  *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
-  *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)
-  *         
-  *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
-  * @retval Value between Min_Data=0 and Max_Data=18
-  */
-#if defined(ADC_CCR_VLCDEN)
-#define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__)                                                               \
-  ((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0U)                                                         \
-    ? (                                                                                                           \
-       ((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS                        \
-      )                                                                                                           \
-      :                                                                                                           \
-      (                                                                                                           \
-       (((__CHANNEL__) & ADC_CHSELR_CHSEL0) == ADC_CHSELR_CHSEL0) ? (0U) :                                        \
-        (                                                                                                         \
-         (((__CHANNEL__) & ADC_CHSELR_CHSEL1) == ADC_CHSELR_CHSEL1) ? (1U) :                                      \
-          (                                                                                                       \
-           (((__CHANNEL__) & ADC_CHSELR_CHSEL2) == ADC_CHSELR_CHSEL2) ? (2U) :                                    \
-            (                                                                                                     \
-             (((__CHANNEL__) & ADC_CHSELR_CHSEL3) == ADC_CHSELR_CHSEL3) ? (3U) :                                  \
-              (                                                                                                   \
-               (((__CHANNEL__) & ADC_CHSELR_CHSEL4) == ADC_CHSELR_CHSEL4) ? (4U) :                                \
-                (                                                                                                 \
-                 (((__CHANNEL__) & ADC_CHSELR_CHSEL5) == ADC_CHSELR_CHSEL5) ? (5U) :                              \
-                  (                                                                                               \
-                   (((__CHANNEL__) & ADC_CHSELR_CHSEL6) == ADC_CHSELR_CHSEL6) ? (6U) :                            \
-                    (                                                                                             \
-                     (((__CHANNEL__) & ADC_CHSELR_CHSEL7) == ADC_CHSELR_CHSEL7) ? (7U) :                          \
-                      (                                                                                           \
-                       (((__CHANNEL__) & ADC_CHSELR_CHSEL8) == ADC_CHSELR_CHSEL8) ? (8U) :                        \
-                        (                                                                                         \
-                         (((__CHANNEL__) & ADC_CHSELR_CHSEL9) == ADC_CHSELR_CHSEL9) ? (9U) :                      \
-                          (                                                                                       \
-                           (((__CHANNEL__) & ADC_CHSELR_CHSEL10) == ADC_CHSELR_CHSEL10) ? (10U) :                 \
-                            (                                                                                     \
-                             (((__CHANNEL__) & ADC_CHSELR_CHSEL11) == ADC_CHSELR_CHSEL11) ? (11U) :               \
-                              (                                                                                   \
-                               (((__CHANNEL__) & ADC_CHSELR_CHSEL12) == ADC_CHSELR_CHSEL12) ? (12U) :             \
-                                (                                                                                 \
-                                 (((__CHANNEL__) & ADC_CHSELR_CHSEL13) == ADC_CHSELR_CHSEL13) ? (13U) :           \
-                                  (                                                                               \
-                                   (((__CHANNEL__) & ADC_CHSELR_CHSEL14) == ADC_CHSELR_CHSEL14) ? (14U) :         \
-                                    (                                                                             \
-                                     (((__CHANNEL__) & ADC_CHSELR_CHSEL15) == ADC_CHSELR_CHSEL15) ? (15U) :       \
-                                      (                                                                           \
-                                       (((__CHANNEL__) & ADC_CHSELR_CHSEL16) == ADC_CHSELR_CHSEL16) ? (16U) :     \
-                                        (                                                                         \
-                                         (((__CHANNEL__) & ADC_CHSELR_CHSEL17) == ADC_CHSELR_CHSEL17) ? (17U) :   \
-                                          (                                                                       \
-                                           (((__CHANNEL__) & ADC_CHSELR_CHSEL18) == ADC_CHSELR_CHSEL18) ? (18U) : \
-                                            (0U)                                                                   \
-                                          )                                                                       \
-                                        )                                                                         \
-                                      )                                                                           \
-                                    )                                                                             \
-                                  )                                                                               \
-                                )                                                                                 \
-                              )                                                                                   \
-                            )                                                                                     \
-                          )                                                                                       \
-                        )                                                                                         \
-                      )                                                                                           \
-                    )                                                                                             \
-                  )                                                                                               \
-                )                                                                                                 \
-              )                                                                                                   \
-            )                                                                                                     \
-          )                                                                                                       \
-        )                                                                                                         \
-      )                                                                                                           \
-  )
-#else
-#define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__)                                                               \
-  ((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0U)                                                         \
-    ? (                                                                                                           \
-       ((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS                        \
-      )                                                                                                           \
-      :                                                                                                           \
-      (                                                                                                           \
-       (((__CHANNEL__) & ADC_CHSELR_CHSEL0) == ADC_CHSELR_CHSEL0) ? (0U) :                                        \
-        (                                                                                                         \
-         (((__CHANNEL__) & ADC_CHSELR_CHSEL1) == ADC_CHSELR_CHSEL1) ? (1U) :                                      \
-          (                                                                                                       \
-           (((__CHANNEL__) & ADC_CHSELR_CHSEL2) == ADC_CHSELR_CHSEL2) ? (2U) :                                    \
-            (                                                                                                     \
-             (((__CHANNEL__) & ADC_CHSELR_CHSEL3) == ADC_CHSELR_CHSEL3) ? (3U) :                                  \
-              (                                                                                                   \
-               (((__CHANNEL__) & ADC_CHSELR_CHSEL4) == ADC_CHSELR_CHSEL4) ? (4U) :                                \
-                (                                                                                                 \
-                 (((__CHANNEL__) & ADC_CHSELR_CHSEL5) == ADC_CHSELR_CHSEL5) ? (5U) :                              \
-                  (                                                                                               \
-                   (((__CHANNEL__) & ADC_CHSELR_CHSEL6) == ADC_CHSELR_CHSEL6) ? (6U) :                            \
-                    (                                                                                             \
-                     (((__CHANNEL__) & ADC_CHSELR_CHSEL7) == ADC_CHSELR_CHSEL7) ? (7U) :                          \
-                      (                                                                                           \
-                       (((__CHANNEL__) & ADC_CHSELR_CHSEL8) == ADC_CHSELR_CHSEL8) ? (8U) :                        \
-                        (                                                                                         \
-                         (((__CHANNEL__) & ADC_CHSELR_CHSEL9) == ADC_CHSELR_CHSEL9) ? (9U) :                      \
-                          (                                                                                       \
-                           (((__CHANNEL__) & ADC_CHSELR_CHSEL10) == ADC_CHSELR_CHSEL10) ? (10U) :                 \
-                            (                                                                                     \
-                             (((__CHANNEL__) & ADC_CHSELR_CHSEL11) == ADC_CHSELR_CHSEL11) ? (11U) :               \
-                              (                                                                                   \
-                               (((__CHANNEL__) & ADC_CHSELR_CHSEL12) == ADC_CHSELR_CHSEL12) ? (12U) :             \
-                                (                                                                                 \
-                                 (((__CHANNEL__) & ADC_CHSELR_CHSEL13) == ADC_CHSELR_CHSEL13) ? (13U) :           \
-                                  (                                                                               \
-                                   (((__CHANNEL__) & ADC_CHSELR_CHSEL14) == ADC_CHSELR_CHSEL14) ? (14U) :         \
-                                    (                                                                             \
-                                     (((__CHANNEL__) & ADC_CHSELR_CHSEL15) == ADC_CHSELR_CHSEL15) ? (15U) :       \
-                                      (                                                                           \
-                                       (((__CHANNEL__) & ADC_CHSELR_CHSEL17) == ADC_CHSELR_CHSEL17) ? (17U) :     \
-                                        (                                                                         \
-                                         (((__CHANNEL__) & ADC_CHSELR_CHSEL18) == ADC_CHSELR_CHSEL18) ? (18U) :   \
-                                          (0U)                                                                     \
-                                        )                                                                         \
-                                      )                                                                           \
-                                    )                                                                             \
-                                  )                                                                               \
-                                )                                                                                 \
-                              )                                                                                   \
-                            )                                                                                     \
-                          )                                                                                       \
-                        )                                                                                         \
-                      )                                                                                           \
-                    )                                                                                             \
-                  )                                                                                               \
-                )                                                                                                 \
-              )                                                                                                   \
-            )                                                                                                     \
-          )                                                                                                       \
-        )                                                                                                         \
-      )                                                                                                           \
-  )
-#endif
-
-/**
-  * @brief  Helper macro to get ADC channel in literal format LL_ADC_CHANNEL_x
-  *         from number in decimal format.
-  * @note   Example:
-  *           __LL_ADC_DECIMAL_NB_TO_CHANNEL(4)
-  *           will return a data equivalent to "LL_ADC_CHANNEL_4".
-  * @param  __DECIMAL_NB__: Value between Min_Data=0 and Max_Data=18
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_CHANNEL_0
-  *         @arg @ref LL_ADC_CHANNEL_1
-  *         @arg @ref LL_ADC_CHANNEL_2
-  *         @arg @ref LL_ADC_CHANNEL_3
-  *         @arg @ref LL_ADC_CHANNEL_4
-  *         @arg @ref LL_ADC_CHANNEL_5
-  *         @arg @ref LL_ADC_CHANNEL_6
-  *         @arg @ref LL_ADC_CHANNEL_7
-  *         @arg @ref LL_ADC_CHANNEL_8
-  *         @arg @ref LL_ADC_CHANNEL_9
-  *         @arg @ref LL_ADC_CHANNEL_10
-  *         @arg @ref LL_ADC_CHANNEL_11
-  *         @arg @ref LL_ADC_CHANNEL_12
-  *         @arg @ref LL_ADC_CHANNEL_13
-  *         @arg @ref LL_ADC_CHANNEL_14
-  *         @arg @ref LL_ADC_CHANNEL_15
-  *         @arg @ref LL_ADC_CHANNEL_16         (1)
-  *         @arg @ref LL_ADC_CHANNEL_17
-  *         @arg @ref LL_ADC_CHANNEL_18
-  *         @arg @ref LL_ADC_CHANNEL_VREFINT       (2)
-  *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR    (2)
-  *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)(2)
-  *         
-  *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.\n
-  *         (2) For ADC channel read back from ADC register,
-  *             comparison with internal channel parameter to be done
-  *             using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
-  */
-#define __LL_ADC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__)                         \
-  (                                                                            \
-   ((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) |                 \
-   (ADC_CHSELR_CHSEL0 << (__DECIMAL_NB__))                                     \
-  )
-
-/**
-  * @brief  Helper macro to determine whether the selected channel
-  *         corresponds to literal definitions of driver.
-  * @note   The different literal definitions of ADC channels are:
-  *         - ADC internal channel:
-  *           LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...
-  *         - ADC external channel (channel connected to a GPIO pin):
-  *           LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...
-  * @note   The channel parameter must be a value defined from literal
-  *         definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
-  *         LL_ADC_CHANNEL_TEMPSENSOR, ...),
-  *         ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...),
-  *         must not be a value from functions where a channel number is
-  *         returned from ADC registers,
-  *         because internal and external channels share the same channel
-  *         number in ADC registers. The differentiation is made only with
-  *         parameters definitions of driver.
-  * @param  __CHANNEL__ This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_CHANNEL_0
-  *         @arg @ref LL_ADC_CHANNEL_1
-  *         @arg @ref LL_ADC_CHANNEL_2
-  *         @arg @ref LL_ADC_CHANNEL_3
-  *         @arg @ref LL_ADC_CHANNEL_4
-  *         @arg @ref LL_ADC_CHANNEL_5
-  *         @arg @ref LL_ADC_CHANNEL_6
-  *         @arg @ref LL_ADC_CHANNEL_7
-  *         @arg @ref LL_ADC_CHANNEL_8
-  *         @arg @ref LL_ADC_CHANNEL_9
-  *         @arg @ref LL_ADC_CHANNEL_10
-  *         @arg @ref LL_ADC_CHANNEL_11
-  *         @arg @ref LL_ADC_CHANNEL_12
-  *         @arg @ref LL_ADC_CHANNEL_13
-  *         @arg @ref LL_ADC_CHANNEL_14
-  *         @arg @ref LL_ADC_CHANNEL_15
-  *         @arg @ref LL_ADC_CHANNEL_16         (1)
-  *         @arg @ref LL_ADC_CHANNEL_17
-  *         @arg @ref LL_ADC_CHANNEL_18
-  *         @arg @ref LL_ADC_CHANNEL_VREFINT
-  *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
-  *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)
-  *         
-  *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
-  * @retval Value "0" if the channel corresponds to a parameter definition of a ADC external channel (channel connected to a GPIO pin).
-  *         Value "1" if the channel corresponds to a parameter definition of a ADC internal channel.
-  */
-#define __LL_ADC_IS_CHANNEL_INTERNAL(__CHANNEL__)                              \
-  (((__CHANNEL__) & ADC_CHANNEL_ID_INTERNAL_CH_MASK) != 0U)
-
-/**
-  * @brief  Helper macro to convert a channel defined from parameter
-  *         definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
-  *         LL_ADC_CHANNEL_TEMPSENSOR, ...),
-  *         to its equivalent parameter definition of a ADC external channel
-  *         (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...).
-  * @note   The channel parameter can be, additionally to a value
-  *         defined from parameter definition of a ADC internal channel
-  *         (LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...),
-  *         a value defined from parameter definition of
-  *         ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
-  *         or a value from functions where a channel number is returned
-  *         from ADC registers.
-  * @param  __CHANNEL__ This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_CHANNEL_0
-  *         @arg @ref LL_ADC_CHANNEL_1
-  *         @arg @ref LL_ADC_CHANNEL_2
-  *         @arg @ref LL_ADC_CHANNEL_3
-  *         @arg @ref LL_ADC_CHANNEL_4
-  *         @arg @ref LL_ADC_CHANNEL_5
-  *         @arg @ref LL_ADC_CHANNEL_6
-  *         @arg @ref LL_ADC_CHANNEL_7
-  *         @arg @ref LL_ADC_CHANNEL_8
-  *         @arg @ref LL_ADC_CHANNEL_9
-  *         @arg @ref LL_ADC_CHANNEL_10
-  *         @arg @ref LL_ADC_CHANNEL_11
-  *         @arg @ref LL_ADC_CHANNEL_12
-  *         @arg @ref LL_ADC_CHANNEL_13
-  *         @arg @ref LL_ADC_CHANNEL_14
-  *         @arg @ref LL_ADC_CHANNEL_15
-  *         @arg @ref LL_ADC_CHANNEL_16         (1)
-  *         @arg @ref LL_ADC_CHANNEL_17
-  *         @arg @ref LL_ADC_CHANNEL_18
-  *         @arg @ref LL_ADC_CHANNEL_VREFINT
-  *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
-  *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)
-  *         
-  *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_CHANNEL_0
-  *         @arg @ref LL_ADC_CHANNEL_1
-  *         @arg @ref LL_ADC_CHANNEL_2
-  *         @arg @ref LL_ADC_CHANNEL_3
-  *         @arg @ref LL_ADC_CHANNEL_4
-  *         @arg @ref LL_ADC_CHANNEL_5
-  *         @arg @ref LL_ADC_CHANNEL_6
-  *         @arg @ref LL_ADC_CHANNEL_7
-  *         @arg @ref LL_ADC_CHANNEL_8
-  *         @arg @ref LL_ADC_CHANNEL_9
-  *         @arg @ref LL_ADC_CHANNEL_10
-  *         @arg @ref LL_ADC_CHANNEL_11
-  *         @arg @ref LL_ADC_CHANNEL_12
-  *         @arg @ref LL_ADC_CHANNEL_13
-  *         @arg @ref LL_ADC_CHANNEL_14
-  *         @arg @ref LL_ADC_CHANNEL_15
-  *         @arg @ref LL_ADC_CHANNEL_16
-  *         @arg @ref LL_ADC_CHANNEL_17
-  *         @arg @ref LL_ADC_CHANNEL_18
-  */
-#define __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(__CHANNEL__)                     \
-  ((__CHANNEL__) & ~ADC_CHANNEL_ID_INTERNAL_CH_MASK)
-
-/**
-  * @brief  Helper macro to determine whether the internal channel
-  *         selected is available on the ADC instance selected.
-  * @note   The channel parameter must be a value defined from parameter
-  *         definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
-  *         LL_ADC_CHANNEL_TEMPSENSOR, ...),
-  *         must not be a value defined from parameter definition of
-  *         ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
-  *         or a value from functions where a channel number is
-  *         returned from ADC registers,
-  *         because internal and external channels share the same channel
-  *         number in ADC registers. The differentiation is made only with
-  *         parameters definitions of driver.
-  * @param  __ADC_INSTANCE__ ADC instance
-  * @param  __CHANNEL__ This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_CHANNEL_VREFINT
-  *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
-  *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)
-  *         
-  *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
-
-  * @retval Value "0" if the internal channel selected is not available on the ADC instance selected.
-  *         Value "1" if the internal channel selected is available on the ADC instance selected.
-  */
-#if defined(ADC_CCR_VLCDEN)
-#define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__)  \
-  (                                                                            \
-    ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT)    ||                            \
-    ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) ||                            \
-    ((__CHANNEL__) == LL_ADC_CHANNEL_VLCD)                                     \
-  )
-#else
-#define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__)  \
-  (                                                                            \
-    ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT)    ||                            \
-    ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR)                               \
-  )
-#endif
-
-/**
-  * @brief  Helper macro to define ADC analog watchdog parameter:
-  *         define a single channel to monitor with analog watchdog
-  *         from sequencer channel and groups definition.
-  * @note   To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
-  *         Example:
-  *           LL_ADC_SetAnalogWDMonitChannels(
-  *             ADC1, LL_ADC_AWD1,
-  *             __LL_ADC_ANALOGWD_CHANNEL_GROUP(LL_ADC_CHANNEL4, LL_ADC_GROUP_REGULAR))
-  * @param  __CHANNEL__ This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_CHANNEL_0
-  *         @arg @ref LL_ADC_CHANNEL_1
-  *         @arg @ref LL_ADC_CHANNEL_2
-  *         @arg @ref LL_ADC_CHANNEL_3
-  *         @arg @ref LL_ADC_CHANNEL_4
-  *         @arg @ref LL_ADC_CHANNEL_5
-  *         @arg @ref LL_ADC_CHANNEL_6
-  *         @arg @ref LL_ADC_CHANNEL_7
-  *         @arg @ref LL_ADC_CHANNEL_8
-  *         @arg @ref LL_ADC_CHANNEL_9
-  *         @arg @ref LL_ADC_CHANNEL_10
-  *         @arg @ref LL_ADC_CHANNEL_11
-  *         @arg @ref LL_ADC_CHANNEL_12
-  *         @arg @ref LL_ADC_CHANNEL_13
-  *         @arg @ref LL_ADC_CHANNEL_14
-  *         @arg @ref LL_ADC_CHANNEL_15
-  *         @arg @ref LL_ADC_CHANNEL_16         (1)
-  *         @arg @ref LL_ADC_CHANNEL_17
-  *         @arg @ref LL_ADC_CHANNEL_18
-  *         @arg @ref LL_ADC_CHANNEL_VREFINT       (2)
-  *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR    (2)
-  *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)(2)
-  *         
-  *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.\n
-  *         (2) For ADC channel read back from ADC register,
-  *             comparison with internal channel parameter to be done
-  *             using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
-  * @param  __GROUP__ This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_GROUP_REGULAR
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_AWD_DISABLE
-  *         @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_0_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_1_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_2_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_3_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_4_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_5_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_6_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_7_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_8_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_9_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_10_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_11_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_12_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_13_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_14_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_15_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_16_REG          (1)
-  *         @arg @ref LL_ADC_AWD_CHANNEL_17_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_18_REG
-  *         @arg @ref LL_ADC_AWD_CH_VREFINT_REG
-  *         @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG
-  *         @arg @ref LL_ADC_AWD_CH_VLCD_REG             (1)
-  *         
-  *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
-  */
-#define __LL_ADC_ANALOGWD_CHANNEL_GROUP(__CHANNEL__, __GROUP__)                                           \
-  (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)
-
-/**
-  * @brief  Helper macro to set the value of ADC analog watchdog threshold high
-  *         or low in function of ADC resolution, when ADC resolution is
-  *         different of 12 bits.
-  * @note   To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
-  *         or @ref LL_ADC_SetAnalogWDThresholds().
-  *         Example, with a ADC resolution of 8 bits, to set the value of
-  *         analog watchdog threshold high (on 8 bits):
-  *           LL_ADC_SetAnalogWDThresholds
-  *            (< ADCx param >,
-  *             __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(LL_ADC_RESOLUTION_8B, )
-  *            );
-  * @param  __ADC_RESOLUTION__ This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_RESOLUTION_12B
-  *         @arg @ref LL_ADC_RESOLUTION_10B
-  *         @arg @ref LL_ADC_RESOLUTION_8B
-  *         @arg @ref LL_ADC_RESOLUTION_6B
-  * @param  __AWD_THRESHOLD__ Value between Min_Data=0x000 and Max_Data=0xFFF
-  * @retval Value between Min_Data=0x000 and Max_Data=0xFFF
-  */
-#define __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD__) \
-  ((__AWD_THRESHOLD__) << ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U )))
-
-/**
-  * @brief  Helper macro to get the value of ADC analog watchdog threshold high
-  *         or low in function of ADC resolution, when ADC resolution is 
-  *         different of 12 bits.
-  * @note   To be used with function @ref LL_ADC_GetAnalogWDThresholds().
-  *         Example, with a ADC resolution of 8 bits, to get the value of
-  *         analog watchdog threshold high (on 8 bits):
-  *           < threshold_value_6_bits > = __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION
-  *            (LL_ADC_RESOLUTION_8B,
-  *             LL_ADC_GetAnalogWDThresholds(, LL_ADC_AWD_THRESHOLD_HIGH)
-  *            );
-  * @param  __ADC_RESOLUTION__ This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_RESOLUTION_12B
-  *         @arg @ref LL_ADC_RESOLUTION_10B
-  *         @arg @ref LL_ADC_RESOLUTION_8B
-  *         @arg @ref LL_ADC_RESOLUTION_6B
-  * @param  __AWD_THRESHOLD_12_BITS__ Value between Min_Data=0x000 and Max_Data=0xFFF
-  * @retval Value between Min_Data=0x000 and Max_Data=0xFFF
-  */
-#define __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD_12_BITS__) \
-  ((__AWD_THRESHOLD_12_BITS__) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U )))
-
-/**
-  * @brief  Helper macro to get the ADC analog watchdog threshold high
-  *         or low from raw value containing both thresholds concatenated.
-  * @note   To be used with function @ref LL_ADC_GetAnalogWDThresholds().
-  *         Example, to get analog watchdog threshold high from the register raw value:
-  *           __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(LL_ADC_AWD_THRESHOLD_HIGH, );
-  * @param  __AWD_THRESHOLD_TYPE__ This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
-  *         @arg @ref LL_ADC_AWD_THRESHOLD_LOW
-  * @param  __AWD_THRESHOLDS__ Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
-  * @retval Value between Min_Data=0x000 and Max_Data=0xFFF
-  */
-#define __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(__AWD_THRESHOLD_TYPE__, __AWD_THRESHOLDS__) \
-  (((__AWD_THRESHOLD_TYPE__) == LL_ADC_AWD_THRESHOLD_LOW)                                 \
-    ? (                                                                                   \
-       (__AWD_THRESHOLDS__) & LL_ADC_AWD_THRESHOLD_LOW                                    \
-      )                                                                                   \
-      :                                                                                   \
-      (                                                                                   \
-       ((__AWD_THRESHOLDS__) >> ADC_TR_HT_BITOFFSET_POS) & LL_ADC_AWD_THRESHOLD_LOW       \
-      )                                                                                   \
-  )
-
-/**
-  * @brief  Helper macro to select the ADC common instance
-  *         to which is belonging the selected ADC instance.
-  * @note   ADC common register instance can be used for:
-  *         - Set parameters common to several ADC instances
-  *         - Multimode (for devices with several ADC instances)
-  *         Refer to functions having argument "ADCxy_COMMON" as parameter.
-  * @param  __ADCx__ ADC instance
-  * @retval ADC common register instance
-  */
-#define __LL_ADC_COMMON_INSTANCE(__ADCx__)                                     \
-  (ADC1_COMMON)
-
-/**
-  * @brief  Helper macro to check if all ADC instances sharing the same
-  *         ADC common instance are disabled.
-  * @note   This check is required by functions with setting conditioned to
-  *         ADC state:
-  *         All ADC instances of the ADC common group must be disabled.
-  *         Refer to functions having argument "ADCxy_COMMON" as parameter.
-  * @note   On devices with only 1 ADC common instance, parameter of this macro
-  *         is useless and can be ignored (parameter kept for compatibility
-  *         with devices featuring several ADC common instances).
-  * @param  __ADCXY_COMMON__ ADC common instance
-  *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
-  * @retval Value "0" if all ADC instances sharing the same ADC common instance
-  *         are disabled.
-  *         Value "1" if at least one ADC instance sharing the same ADC common instance
-  *         is enabled.
-  */
-#define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__)              \
-  LL_ADC_IsEnabled(ADC1)
-
-/**
-  * @brief  Helper macro to define the ADC conversion data full-scale digital
-  *         value corresponding to the selected ADC resolution.
-  * @note   ADC conversion data full-scale corresponds to voltage range
-  *         determined by analog voltage references Vref+ and Vref-
-  *         (refer to reference manual).
-  * @param  __ADC_RESOLUTION__ This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_RESOLUTION_12B
-  *         @arg @ref LL_ADC_RESOLUTION_10B
-  *         @arg @ref LL_ADC_RESOLUTION_8B
-  *         @arg @ref LL_ADC_RESOLUTION_6B
-  * @retval ADC conversion data equivalent voltage value (unit: mVolt)
-  */
-#define __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__)                             \
-  (((uint32_t)0xFFFU) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U)))
-
-/**
-  * @brief  Helper macro to convert the ADC conversion data from
-  *         a resolution to another resolution.
-  * @param  __DATA__ ADC conversion data to be converted 
-  * @param  __ADC_RESOLUTION_CURRENT__ Resolution of to the data to be converted
-  *         This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_RESOLUTION_12B
-  *         @arg @ref LL_ADC_RESOLUTION_10B
-  *         @arg @ref LL_ADC_RESOLUTION_8B
-  *         @arg @ref LL_ADC_RESOLUTION_6B
-  * @param  __ADC_RESOLUTION_TARGET__ Resolution of the data after conversion
-  *         This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_RESOLUTION_12B
-  *         @arg @ref LL_ADC_RESOLUTION_10B
-  *         @arg @ref LL_ADC_RESOLUTION_8B
-  *         @arg @ref LL_ADC_RESOLUTION_6B
-  * @retval ADC conversion data to the requested resolution
-  */
-#define __LL_ADC_CONVERT_DATA_RESOLUTION(__DATA__, __ADC_RESOLUTION_CURRENT__, __ADC_RESOLUTION_TARGET__) \
-  (((__DATA__)                                                                 \
-    << ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U)))   \
-   >> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U))      \
-  )
-
-/**
-  * @brief  Helper macro to calculate the voltage (unit: mVolt)
-  *         corresponding to a ADC conversion data (unit: digital value).
-  * @note   Analog reference voltage (Vref+) must be either known from
-  *         user board environment or can be calculated using ADC measurement
-  *         and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
-  * @param  __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
-  * @param  __ADC_DATA__ ADC conversion data (resolution 12 bits)
-  *                       (unit: digital value).
-  * @param  __ADC_RESOLUTION__ This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_RESOLUTION_12B
-  *         @arg @ref LL_ADC_RESOLUTION_10B
-  *         @arg @ref LL_ADC_RESOLUTION_8B
-  *         @arg @ref LL_ADC_RESOLUTION_6B
-  * @retval ADC conversion data equivalent voltage value (unit: mVolt)
-  */
-#define __LL_ADC_CALC_DATA_TO_VOLTAGE(__VREFANALOG_VOLTAGE__,\
-                                      __ADC_DATA__,\
-                                      __ADC_RESOLUTION__)                      \
-  ((__ADC_DATA__) * (__VREFANALOG_VOLTAGE__)                                   \
-   / __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__)                                \
-  )
-
-/**
-  * @brief  Helper macro to calculate analog reference voltage (Vref+)
-  *         (unit: mVolt) from ADC conversion data of internal voltage
-  *         reference VrefInt.
-  * @note   Computation is using VrefInt calibration value
-  *         stored in system memory for each device during production.
-  * @note   This voltage depends on user board environment: voltage level
-  *         connected to pin Vref+.
-  *         On devices with small package, the pin Vref+ is not present
-  *         and internally bonded to pin Vdda.
-  * @note   On this STM32 serie, calibration data of internal voltage reference
-  *         VrefInt corresponds to a resolution of 12 bits,
-  *         this is the recommended ADC resolution to convert voltage of
-  *         internal voltage reference VrefInt.
-  *         Otherwise, this macro performs the processing to scale
-  *         ADC conversion data to 12 bits.
-  * @param  __VREFINT_ADC_DATA__: ADC conversion data (resolution 12 bits)
-  *         of internal voltage reference VrefInt (unit: digital value).
-  * @param  __ADC_RESOLUTION__ This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_RESOLUTION_12B
-  *         @arg @ref LL_ADC_RESOLUTION_10B
-  *         @arg @ref LL_ADC_RESOLUTION_8B
-  *         @arg @ref LL_ADC_RESOLUTION_6B
-  * @retval Analog reference voltage (unit: mV)
-  */
-#define __LL_ADC_CALC_VREFANALOG_VOLTAGE(__VREFINT_ADC_DATA__,\
-                                         __ADC_RESOLUTION__)                   \
-  (((uint32_t)(*VREFINT_CAL_ADDR) * VREFINT_CAL_VREF)                          \
-    / __LL_ADC_CONVERT_DATA_RESOLUTION((__VREFINT_ADC_DATA__),                 \
-                                       (__ADC_RESOLUTION__),                   \
-                                       LL_ADC_RESOLUTION_12B)                  \
-  )
-
-/* Note: On device STM32L011, calibration parameter TS_CAL1 is not available. */
-/*       Therefore, helper macro __LL_ADC_CALC_TEMPERATURE() is not available.*/
-/*       Use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS().        */
-#if !defined(STM32L011xx)
-/**
-  * @brief  Helper macro to calculate the temperature (unit: degree Celsius)
-  *         from ADC conversion data of internal temperature sensor.
-  * @note   Computation is using temperature sensor calibration values
-  *         stored in system memory for each device during production.
-  * @note   Calculation formula:
-  *           Temperature = ((TS_ADC_DATA - TS_CAL1)
-  *                           * (TS_CAL2_TEMP - TS_CAL1_TEMP))
-  *                         / (TS_CAL2 - TS_CAL1) + TS_CAL1_TEMP
-  *           with TS_ADC_DATA = temperature sensor raw data measured by ADC
-  *                Avg_Slope = (TS_CAL2 - TS_CAL1)
-  *                            / (TS_CAL2_TEMP - TS_CAL1_TEMP)
-  *                TS_CAL1   = equivalent TS_ADC_DATA at temperature
-  *                            TEMP_DEGC_CAL1 (calibrated in factory)
-  *                TS_CAL2   = equivalent TS_ADC_DATA at temperature
-  *                            TEMP_DEGC_CAL2 (calibrated in factory)
-  *         Caution: Calculation relevancy under reserve that calibration
-  *                  parameters are correct (address and data).
-  *                  To calculate temperature using temperature sensor
-  *                  datasheet typical values (generic values less, therefore
-  *                  less accurate than calibrated values),
-  *                  use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS().
-  * @note   As calculation input, the analog reference voltage (Vref+) must be
-  *         defined as it impacts the ADC LSB equivalent voltage.
-  * @note   Analog reference voltage (Vref+) must be either known from
-  *         user board environment or can be calculated using ADC measurement
-  *         and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
-  * @note   On this STM32 serie, calibration data of temperature sensor
-  *         corresponds to a resolution of 12 bits,
-  *         this is the recommended ADC resolution to convert voltage of
-  *         temperature sensor.
-  *         Otherwise, this macro performs the processing to scale
-  *         ADC conversion data to 12 bits.
-  * @param  __VREFANALOG_VOLTAGE__  Analog reference voltage (unit: mV)
-  * @param  __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal
-  *                                 temperature sensor (unit: digital value).
-  * @param  __ADC_RESOLUTION__      ADC resolution at which internal temperature
-  *                                 sensor voltage has been measured.
-  *         This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_RESOLUTION_12B
-  *         @arg @ref LL_ADC_RESOLUTION_10B
-  *         @arg @ref LL_ADC_RESOLUTION_8B
-  *         @arg @ref LL_ADC_RESOLUTION_6B
-  * @retval Temperature (unit: degree Celsius)
-  */
-#define __LL_ADC_CALC_TEMPERATURE(__VREFANALOG_VOLTAGE__,\
-                                  __TEMPSENSOR_ADC_DATA__,\
-                                  __ADC_RESOLUTION__)                              \
-  (((( ((int32_t)((__LL_ADC_CONVERT_DATA_RESOLUTION((__TEMPSENSOR_ADC_DATA__),     \
-                                                    (__ADC_RESOLUTION__),          \
-                                                    LL_ADC_RESOLUTION_12B)         \
-                   * (__VREFANALOG_VOLTAGE__))                                     \
-                  / TEMPSENSOR_CAL_VREFANALOG)                                     \
-        - (int32_t) *TEMPSENSOR_CAL1_ADDR)                                         \
-     ) * (int32_t)(TEMPSENSOR_CAL2_TEMP - TEMPSENSOR_CAL1_TEMP)                    \
-    ) / (int32_t)((int32_t)*TEMPSENSOR_CAL2_ADDR - (int32_t)*TEMPSENSOR_CAL1_ADDR) \
-   ) + TEMPSENSOR_CAL1_TEMP                                                        \
-  )
-#endif
-
-/**
-  * @brief  Helper macro to calculate the temperature (unit: degree Celsius)
-  *         from ADC conversion data of internal temperature sensor.
-  * @note   Computation is using temperature sensor typical values
-  *         (refer to device datasheet).
-  * @note   Calculation formula:
-  *           Temperature = (TS_TYP_CALx_VOLT(uV) - TS_ADC_DATA * Conversion_uV)
-  *                         / Avg_Slope + CALx_TEMP
-  *           with TS_ADC_DATA      = temperature sensor raw data measured by ADC
-  *                                   (unit: digital value)
-  *                Avg_Slope        = temperature sensor slope
-  *                                   (unit: uV/Degree Celsius)
-  *                TS_TYP_CALx_VOLT = temperature sensor digital value at
-  *                                   temperature CALx_TEMP (unit: mV)
-  *         Caution: Calculation relevancy under reserve the temperature sensor
-  *                  of the current device has characteristics in line with
-  *                  datasheet typical values.
-  *                  If temperature sensor calibration values are available on
-  *                  on this device (presence of macro __LL_ADC_CALC_TEMPERATURE()),
-  *                  temperature calculation will be more accurate using
-  *                  helper macro @ref __LL_ADC_CALC_TEMPERATURE().
-  * @note   As calculation input, the analog reference voltage (Vref+) must be
-  *         defined as it impacts the ADC LSB equivalent voltage.
-  * @note   Analog reference voltage (Vref+) must be either known from
-  *         user board environment or can be calculated using ADC measurement
-  *         and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
-  * @note   ADC measurement data must correspond to a resolution of 12bits
-  *         (full scale digital value 4095). If not the case, the data must be
-  *         preliminarily rescaled to an equivalent resolution of 12 bits.
-  * @param  __TEMPSENSOR_TYP_AVGSLOPE__   Device datasheet data: Temperature sensor slope typical value (unit: uV/DegCelsius).
-  *                                       On STM32L0, refer to device datasheet parameter "Avg_Slope".
-  * @param  __TEMPSENSOR_TYP_CALX_V__     Device datasheet data: Temperature sensor voltage typical value (at temperature and Vref+ defined in parameters below) (unit: mV).
-  *                                       On STM32L0, refer to device datasheet parameter "V130" (corresponding to TS_CAL2).
-  * @param  __TEMPSENSOR_CALX_TEMP__      Device datasheet data: Temperature at which temperature sensor voltage (see parameter above) is corresponding (unit: mV)
-  * @param  __VREFANALOG_VOLTAGE__        Analog voltage reference (Vref+) voltage (unit: mV)
-  * @param  __TEMPSENSOR_ADC_DATA__       ADC conversion data of internal temperature sensor (unit: digital value).
-  * @param  __ADC_RESOLUTION__            ADC resolution at which internal temperature sensor voltage has been measured.
-  *         This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_RESOLUTION_12B
-  *         @arg @ref LL_ADC_RESOLUTION_10B
-  *         @arg @ref LL_ADC_RESOLUTION_8B
-  *         @arg @ref LL_ADC_RESOLUTION_6B
-  * @retval Temperature (unit: degree Celsius)
-  */
-#define __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(__TEMPSENSOR_TYP_AVGSLOPE__,\
-                                             __TEMPSENSOR_TYP_CALX_V__,\
-                                             __TEMPSENSOR_CALX_TEMP__,\
-                                             __VREFANALOG_VOLTAGE__,\
-                                             __TEMPSENSOR_ADC_DATA__,\
-                                             __ADC_RESOLUTION__)               \
-  ((( (                                                                        \
-       (int32_t)((((__TEMPSENSOR_ADC_DATA__) * (__VREFANALOG_VOLTAGE__))       \
-                  / __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__))                \
-                 * 1000)                                                       \
-       -                                                                       \
-       (int32_t)(((__TEMPSENSOR_TYP_CALX_V__))                                 \
-                 * 1000)                                                       \
-      )                                                                        \
-    ) / (__TEMPSENSOR_TYP_AVGSLOPE__)                                          \
-   ) + (__TEMPSENSOR_CALX_TEMP__)                                              \
-  )
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup ADC_LL_Exported_Functions ADC Exported Functions
-  * @{
-  */
-
-/** @defgroup ADC_LL_EF_DMA_Management ADC DMA management
-  * @{
-  */
-/* Note: LL ADC functions to set DMA transfer are located into sections of    */
-/*       configuration of ADC instance, groups and multimode (if available):  */
-/*       @ref LL_ADC_REG_SetDMATransfer(), ...                                */
-
-/**
-  * @brief  Function to help to configure DMA transfer from ADC: retrieve the
-  *         ADC register address from ADC instance and a list of ADC registers
-  *         intended to be used (most commonly) with DMA transfer.
-  * @note   These ADC registers are data registers:
-  *         when ADC conversion data is available in ADC data registers,
-  *         ADC generates a DMA transfer request.
-  * @note   This macro is intended to be used with LL DMA driver, refer to
-  *         function "LL_DMA_ConfigAddresses()".
-  *         Example:
-  *           LL_DMA_ConfigAddresses(DMA1,
-  *                                  LL_DMA_CHANNEL_1,
-  *                                  LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA),
-  *                                  (uint32_t)&< array or variable >,
-  *                                  LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
-  * @note   For devices with several ADC: in multimode, some devices
-  *         use a different data register outside of ADC instance scope
-  *         (common data register). This macro manages this register difference,
-  *         only ADC instance has to be set as parameter.
-  * @rmtoll DR       DATA           LL_ADC_DMA_GetRegAddr
-  * @param  ADCx ADC instance
-  * @param  Register This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_DMA_REG_REGULAR_DATA
-  * @retval ADC register address
-  */
-__STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Register)
-{
-  /* Retrieve address of register DR */
-  return (uint32_t)&(ADCx->DR);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EF_Configuration_ADC_Common Configuration of ADC hierarchical scope: common to several ADC instances
-  * @{
-  */
-
-/**
-  * @brief  Set parameter common to several ADC: Clock source and prescaler.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         All ADC instances of the ADC common group must be disabled.
-  *         This check can be done with function @ref LL_ADC_IsEnabled() for each
-  *         ADC instance or by using helper macro helper macro
-  *         @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
-  * @rmtoll CCR      PRESC          LL_ADC_SetCommonClock
-  * @param  ADCxy_COMMON ADC common instance
-  *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
-  * @param  CommonClock This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV1   (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV2   (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV4   (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV6   (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV8   (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV10  (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV12  (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV16  (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV32  (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV64  (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 (1)
-  *
-  *         (1) ADC common clock asynchonous prescaler is applied to 
-  *             each ADC instance if the corresponding ADC instance clock  
-  *             is set to clock source asynchronous.
-  *             (refer to function @ref LL_ADC_SetClock() ).
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_SetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonClock)
-{
-  MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_PRESC, CommonClock);
-}
-
-/**
-  * @brief  Get parameter common to several ADC: Clock source and prescaler.
-  * @rmtoll CCR      PRESC          LL_ADC_GetCommonClock
-  * @param  ADCxy_COMMON ADC common instance
-  *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV1   (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV2   (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV4   (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV6   (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV8   (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV10  (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV12  (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV16  (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV32  (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV64  (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 (1)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 (1)
-  *
-  *         (1) ADC common clock asynchonous prescaler is applied to 
-  *             each ADC instance if the corresponding ADC instance clock  
-  *             is set to clock source asynchronous.
-  *             (refer to function @ref LL_ADC_SetClock() ).
-  */
-__STATIC_INLINE uint32_t LL_ADC_GetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON)
-{
-  return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_PRESC));
-}
-
-/**
-  * @brief  Set parameter common to several ADC: Clock low frequency mode.
-  *         Refer to reference manual for alignments formats
-  *         dependencies to ADC resolutions.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CCR      LFMEN          LL_ADC_SetCommonFrequencyMode
-  * @param  ADCxy_COMMON ADC common instance
-  *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
-  * @param  Resolution This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_CLOCK_FREQ_MODE_HIGH
-  *         @arg @ref LL_ADC_CLOCK_FREQ_MODE_LOW
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_SetCommonFrequencyMode(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Resolution)
-{
-  MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_LFMEN, Resolution);
-}
-
-/**
-  * @brief  Get parameter common to several ADC: Clock low frequency mode.
-  *         Refer to reference manual for alignments formats
-  *         dependencies to ADC resolutions.
-  * @rmtoll CCR      LFMEN          LL_ADC_GetCommonFrequencyMode
-  * @param  ADCxy_COMMON ADC common instance
-  *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_CLOCK_FREQ_MODE_HIGH
-  *         @arg @ref LL_ADC_CLOCK_FREQ_MODE_LOW
-  */
-__STATIC_INLINE uint32_t LL_ADC_GetCommonFrequencyMode(ADC_Common_TypeDef *ADCxy_COMMON)
-{
-  return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_LFMEN));
-}
-
-/**
-  * @brief  Set parameter common to several ADC: measurement path to internal
-  *         channels (VrefInt, temperature sensor, ...).
-  * @note   One or several values can be selected.
-  *         Example: (LL_ADC_PATH_INTERNAL_VREFINT |
-  *                   LL_ADC_PATH_INTERNAL_TEMPSENSOR)
-  * @note   Stabilization time of measurement path to internal channel:
-  *         After enabling internal paths, before starting ADC conversion,
-  *         a delay is required for internal voltage reference and
-  *         temperature sensor stabilization time.
-  *         Refer to device datasheet.
-  *         Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US.
-  *         Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US.
-  * @note   ADC internal channel sampling time constraint:
-  *         For ADC conversion of internal channels,
-  *         a sampling time minimum value is required.
-  *         Refer to device datasheet.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         All ADC instances of the ADC common group must be disabled.
-  *         This check can be done with function @ref LL_ADC_IsEnabled() for each
-  *         ADC instance or by using helper macro helper macro
-  *         @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
-  * @rmtoll CCR      VREFEN         LL_ADC_SetCommonPathInternalCh\n
-  *         CCR      TSEN           LL_ADC_SetCommonPathInternalCh\n
-  *         CCR      VLCDEN         LL_ADC_SetCommonPathInternalCh
-  * @param  ADCxy_COMMON ADC common instance
-  *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
-  * @param  PathInternal This parameter can be a combination of the following values:
-  *         @arg @ref LL_ADC_PATH_INTERNAL_NONE
-  *         @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
-  *         @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
-  *         @arg @ref LL_ADC_PATH_INTERNAL_VLCD (*)
-  *
-  *         (*) value not defined in all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t PathInternal)
-{
-#if defined (ADC_CCR_VLCDEN)
-  MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VLCDEN, PathInternal);
-#else
-  MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN, PathInternal);
-#endif
-}
-
-/**
-  * @brief  Get parameter common to several ADC: measurement path to internal
-  *         channels (VrefInt, temperature sensor, ...).
-  * @note   One or several values can be selected.
-  *         Example: (LL_ADC_PATH_INTERNAL_VREFINT |
-  *                   LL_ADC_PATH_INTERNAL_TEMPSENSOR)
-  * @rmtoll CCR      VREFEN         LL_ADC_GetCommonPathInternalCh\n
-  *         CCR      TSEN           LL_ADC_GetCommonPathInternalCh\n
-  *         CCR      VLCDEN         LL_ADC_GetCommonPathInternalCh
-  * @param  ADCxy_COMMON ADC common instance
-  *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
-  * @retval Returned value can be a combination of the following values:
-  *         @arg @ref LL_ADC_PATH_INTERNAL_NONE
-  *         @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
-  *         @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
-  *         @arg @ref LL_ADC_PATH_INTERNAL_VLCD (*)
-  *
-  *         (*) value not defined in all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
-  */
-__STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON)
-{
-#if defined(ADC_CCR_VLCDEN)
-  return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VLCDEN));
-#else
-  return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN));
-#endif
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EF_Configuration_ADC_Instance Configuration of ADC hierarchical scope: ADC instance
-  * @{
-  */
-
-/**
-  * @brief  Set ADC instance clock source and prescaler.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled.
-  * @rmtoll CFGR2    CKMODE         LL_ADC_SetClock
-  * @param  ADCx ADC instance
-  * @param  ClockSource This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
-  *         @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
-  *         @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 (2)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC (1)
-  *         
-  *         (1) Asynchronous clock prescaler can be configured using
-  *             function @ref LL_ADC_SetCommonClock().\n
-  *         (2) Caution: This parameter has some clock ratio constraints:
-  *             This configuration must be enabled only if PCLK has a 50%
-  *             duty clock cycle (APB prescaler configured inside the RCC
-  *             must be bypassed and the system clock must by 50% duty
-  *             cycle).
-  *             Refer to reference manual.
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_SetClock(ADC_TypeDef *ADCx, uint32_t ClockSource)
-{
-  MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_CKMODE, ClockSource);
-}
-
-/**
-  * @brief  Get ADC instance clock source and prescaler.
-  * @rmtoll CFGR2    CKMODE         LL_ADC_GetClock
-  * @param  ADCx ADC instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
-  *         @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
-  *         @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 (2)
-  *         @arg @ref LL_ADC_CLOCK_ASYNC (1)
-  *         
-  *         (1) Asynchronous clock prescaler can be retrieved using
-  *             function @ref LL_ADC_GetCommonClock().\n
-  *         (2) Caution: This parameter has some clock ratio constraints:
-  *             This configuration must be enabled only if PCLK has a 50%
-  *             duty clock cycle (APB prescaler configured inside the RCC
-  *             must be bypassed and the system clock must by 50% duty
-  *             cycle).
-  *             Refer to reference manual.
-  */
-__STATIC_INLINE uint32_t LL_ADC_GetClock(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_CKMODE));
-}
-
-/**
-  * @brief  Set ADC calibration factor in the mode single-ended
-  *         or differential (for devices with differential mode available).
-  * @note   This function is intended to set calibration parameters
-  *         without having to perform a new calibration using
-  *         @ref LL_ADC_StartCalibration().
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be enabled, without calibration on going, without conversion
-  *         on going on group regular.
-  * @rmtoll CALFACT  CALFACT        LL_ADC_SetCalibrationFactor
-  * @param  ADCx ADC instance
-  * @param  CalibrationFactor Value between Min_Data=0x00 and Max_Data=0x7F
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_SetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t CalibrationFactor)
-{
-  MODIFY_REG(ADCx->CALFACT,
-             ADC_CALFACT_CALFACT,
-             CalibrationFactor);
-}
-
-/**
-  * @brief  Get ADC calibration factor in the mode single-ended
-  *         or differential (for devices with differential mode available).
-  * @note   Calibration factors are set by hardware after performing
-  *         a calibration run using function @ref LL_ADC_StartCalibration().
-  * @rmtoll CALFACT  CALFACT        LL_ADC_GetCalibrationFactor
-  * @param  ADCx ADC instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0x7F
-  */
-__STATIC_INLINE uint32_t LL_ADC_GetCalibrationFactor(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->CALFACT, ADC_CALFACT_CALFACT));
-}
-
-/**
-  * @brief  Set ADC resolution.
-  *         Refer to reference manual for alignments formats
-  *         dependencies to ADC resolutions.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CFGR1    RES            LL_ADC_SetResolution
-  * @param  ADCx ADC instance
-  * @param  Resolution This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_RESOLUTION_12B
-  *         @arg @ref LL_ADC_RESOLUTION_10B
-  *         @arg @ref LL_ADC_RESOLUTION_8B
-  *         @arg @ref LL_ADC_RESOLUTION_6B
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_SetResolution(ADC_TypeDef *ADCx, uint32_t Resolution)
-{
-  MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution);
-}
-
-/**
-  * @brief  Get ADC resolution.
-  *         Refer to reference manual for alignments formats
-  *         dependencies to ADC resolutions.
-  * @rmtoll CFGR1    RES            LL_ADC_GetResolution
-  * @param  ADCx ADC instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_RESOLUTION_12B
-  *         @arg @ref LL_ADC_RESOLUTION_10B
-  *         @arg @ref LL_ADC_RESOLUTION_8B
-  *         @arg @ref LL_ADC_RESOLUTION_6B
-  */
-__STATIC_INLINE uint32_t LL_ADC_GetResolution(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES));
-}
-
-/**
-  * @brief  Set ADC conversion data alignment.
-  * @note   Refer to reference manual for alignments formats
-  *         dependencies to ADC resolutions.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CFGR1    ALIGN          LL_ADC_SetDataAlignment
-  * @param  ADCx ADC instance
-  * @param  DataAlignment This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_DATA_ALIGN_RIGHT
-  *         @arg @ref LL_ADC_DATA_ALIGN_LEFT
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_SetDataAlignment(ADC_TypeDef *ADCx, uint32_t DataAlignment)
-{
-  MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment);
-}
-
-/**
-  * @brief  Get ADC conversion data alignment.
-  * @note   Refer to reference manual for alignments formats
-  *         dependencies to ADC resolutions.
-  * @rmtoll CFGR1    ALIGN          LL_ADC_GetDataAlignment
-  * @param  ADCx ADC instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_DATA_ALIGN_RIGHT
-  *         @arg @ref LL_ADC_DATA_ALIGN_LEFT
-  */
-__STATIC_INLINE uint32_t LL_ADC_GetDataAlignment(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN));
-}
-
-/**
-  * @brief  Set ADC low power mode.
-  * @note   Description of ADC low power modes:
-  *         - ADC low power mode "auto wait": Dynamic low power mode,
-  *           ADC conversions occurrences are limited to the minimum necessary
-  *           in order to reduce power consumption.
-  *           New ADC conversion starts only when the previous
-  *           unitary conversion data (for ADC group regular)
-  *           has been retrieved by user software.
-  *           In the meantime, ADC remains idle: does not performs any
-  *           other conversion.
-  *           This mode allows to automatically adapt the ADC conversions
-  *           triggers to the speed of the software that reads the data.
-  *           Moreover, this avoids risk of overrun for low frequency
-  *           applications.
-  *           How to use this low power mode:
-  *           - Do not use with interruption or DMA since these modes
-  *             have to clear immediately the EOC flag to free the
-  *             IRQ vector sequencer.
-  *           - Do use with polling: 1. Start conversion,
-  *             2. Later on, when conversion data is needed: poll for end of
-  *             conversion  to ensure that conversion is completed and
-  *             retrieve ADC conversion data. This will trig another
-  *             ADC conversion start.
-  *         - ADC low power mode "auto power-off" (feature available on
-  *           this device if parameter LL_ADC_LP_MODE_AUTOOFF is available):
-  *           the ADC automatically powers-off after a conversion and
-  *           automatically wakes up when a new conversion is triggered
-  *           (with startup time between trigger and start of sampling).
-  *           This feature can be combined with low power mode "auto wait".
-  * @note   With ADC low power mode "auto wait", the ADC conversion data read
-  *         is corresponding to previous ADC conversion start, independently
-  *         of delay during which ADC was idle.
-  *         Therefore, the ADC conversion data may be outdated: does not
-  *         correspond to the current voltage level on the selected
-  *         ADC channel.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CFGR1    WAIT           LL_ADC_SetLowPowerMode\n
-  *         CFGR1    AUTOFF         LL_ADC_SetLowPowerMode
-  * @param  ADCx ADC instance
-  * @param  LowPowerMode This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_LP_MODE_NONE
-  *         @arg @ref LL_ADC_LP_AUTOWAIT
-  *         @arg @ref LL_ADC_LP_AUTOPOWEROFF
-  *         @arg @ref LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_SetLowPowerMode(ADC_TypeDef *ADCx, uint32_t LowPowerMode)
-{
-  MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF), LowPowerMode);
-}
-
-/**
-  * @brief  Get ADC low power mode:
-  * @note   Description of ADC low power modes:
-  *         - ADC low power mode "auto wait": Dynamic low power mode,
-  *           ADC conversions occurrences are limited to the minimum necessary
-  *           in order to reduce power consumption.
-  *           New ADC conversion starts only when the previous
-  *           unitary conversion data (for ADC group regular)
-  *           has been retrieved by user software.
-  *           In the meantime, ADC remains idle: does not performs any
-  *           other conversion.
-  *           This mode allows to automatically adapt the ADC conversions
-  *           triggers to the speed of the software that reads the data.
-  *           Moreover, this avoids risk of overrun for low frequency
-  *           applications.
-  *           How to use this low power mode:
-  *           - Do not use with interruption or DMA since these modes
-  *             have to clear immediately the EOC flag to free the
-  *             IRQ vector sequencer.
-  *           - Do use with polling: 1. Start conversion,
-  *             2. Later on, when conversion data is needed: poll for end of
-  *             conversion  to ensure that conversion is completed and
-  *             retrieve ADC conversion data. This will trig another
-  *             ADC conversion start.
-  *         - ADC low power mode "auto power-off" (feature available on
-  *           this device if parameter LL_ADC_LP_MODE_AUTOOFF is available):
-  *           the ADC automatically powers-off after a conversion and
-  *           automatically wakes up when a new conversion is triggered
-  *           (with startup time between trigger and start of sampling).
-  *           This feature can be combined with low power mode "auto wait".
-  * @note   With ADC low power mode "auto wait", the ADC conversion data read
-  *         is corresponding to previous ADC conversion start, independently
-  *         of delay during which ADC was idle.
-  *         Therefore, the ADC conversion data may be outdated: does not
-  *         correspond to the current voltage level on the selected
-  *         ADC channel.
-  * @rmtoll CFGR1    WAIT           LL_ADC_GetLowPowerMode\n
-  *         CFGR1    AUTOFF         LL_ADC_GetLowPowerMode
-  * @param  ADCx ADC instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_LP_MODE_NONE
-  *         @arg @ref LL_ADC_LP_AUTOWAIT
-  *         @arg @ref LL_ADC_LP_AUTOPOWEROFF
-  *         @arg @ref LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF
-  */
-__STATIC_INLINE uint32_t LL_ADC_GetLowPowerMode(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF)));
-}
-
-/**
-  * @brief  Set sampling time common to a group of channels.
-  * @note   Unit: ADC clock cycles.
-  * @note   On this STM32 serie, sampling time scope is on ADC instance:
-  *         Sampling time common to all channels.
-  *         (on some other STM32 families, sampling time is channel wise)
-  * @note   In case of internal channel (VrefInt, TempSensor, ...) to be
-  *         converted:
-  *         sampling time constraints must be respected (sampling time can be
-  *         adjusted in function of ADC clock frequency and sampling time
-  *         setting).
-  *         Refer to device datasheet for timings values (parameters TS_vrefint,
-  *         TS_temp, ...).
-  * @note   Conversion time is the addition of sampling time and processing time.
-  *         On this STM32 serie, ADC processing time is:
-  *         - 12.5 ADC clock cycles at ADC resolution 12 bits
-  *         - 10.5 ADC clock cycles at ADC resolution 10 bits
-  *         - 8.5 ADC clock cycles at ADC resolution 8 bits
-  *         - 6.5 ADC clock cycles at ADC resolution 6 bits
-  * @note   In case of ADC conversion of internal channel (VrefInt,
-  *         temperature sensor, ...), a sampling time minimum value
-  *         is required.
-  *         Refer to device datasheet.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll SMPR     SMP            LL_ADC_SetSamplingTimeCommonChannels
-  * @param  ADCx ADC instance
-  * @param  SamplingTime This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_SAMPLINGTIME_1CYCLE_5
-  *         @arg @ref LL_ADC_SAMPLINGTIME_3CYCLES_5
-  *         @arg @ref LL_ADC_SAMPLINGTIME_7CYCLES_5
-  *         @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5
-  *         @arg @ref LL_ADC_SAMPLINGTIME_19CYCLES_5
-  *         @arg @ref LL_ADC_SAMPLINGTIME_39CYCLES_5
-  *         @arg @ref LL_ADC_SAMPLINGTIME_79CYCLES_5
-  *         @arg @ref LL_ADC_SAMPLINGTIME_160CYCLES_5
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_SetSamplingTimeCommonChannels(ADC_TypeDef *ADCx, uint32_t SamplingTime)
-{
-  MODIFY_REG(ADCx->SMPR, ADC_SMPR_SMP, SamplingTime);
-}
-
-/**
-  * @brief  Get sampling time common to a group of channels.
-  * @note   Unit: ADC clock cycles.
-  * @note   On this STM32 serie, sampling time scope is on ADC instance:
-  *         Sampling time common to all channels.
-  *         (on some other STM32 families, sampling time is channel wise)
-  * @note   Conversion time is the addition of sampling time and processing time.
-  *         Refer to reference manual for ADC processing time of
-  *         this STM32 serie.
-  * @rmtoll SMPR     SMP            LL_ADC_GetSamplingTimeCommonChannels
-  * @param  ADCx ADC instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_SAMPLINGTIME_1CYCLE_5
-  *         @arg @ref LL_ADC_SAMPLINGTIME_3CYCLES_5
-  *         @arg @ref LL_ADC_SAMPLINGTIME_7CYCLES_5
-  *         @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5
-  *         @arg @ref LL_ADC_SAMPLINGTIME_19CYCLES_5
-  *         @arg @ref LL_ADC_SAMPLINGTIME_39CYCLES_5
-  *         @arg @ref LL_ADC_SAMPLINGTIME_79CYCLES_5
-  *         @arg @ref LL_ADC_SAMPLINGTIME_160CYCLES_5
-  */
-__STATIC_INLINE uint32_t LL_ADC_GetSamplingTimeCommonChannels(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->SMPR, ADC_SMPR_SMP));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EF_Configuration_ADC_Group_Regular Configuration of ADC hierarchical scope: group regular
-  * @{
-  */
-
-/**
-  * @brief  Set ADC group regular conversion trigger source:
-  *         internal (SW start) or from external IP (timer event,
-  *         external interrupt line).
-  * @note   On this STM32 serie, setting trigger source to external trigger
-  *         also set trigger polarity to rising edge 
-  *         (default setting for compatibility with some ADC on other
-  *         STM32 families having this setting set by HW default value).
-  *         In case of need to modify trigger edge, use
-  *         function @ref LL_ADC_REG_SetTriggerEdge().
-  * @note   Availability of parameters of trigger sources from timer 
-  *         depends on timers availability on the selected device.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CFGR1    EXTSEL         LL_ADC_REG_SetTriggerSource\n
-  *         CFGR1    EXTEN          LL_ADC_REG_SetTriggerSource
-  * @param  ADCx ADC instance
-  * @param  TriggerSource This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_REG_TRIG_SOFTWARE
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM21_CH2
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH4
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM22_TRGO
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (*)
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11
-  *
-  *         (*) value not defined in all devices
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_REG_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
-{
-  MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource);
-}
-
-/**
-  * @brief  Get ADC group regular conversion trigger source:
-  *         internal (SW start) or from external IP (timer event,
-  *         external interrupt line).
-  * @note   To determine whether group regular trigger source is
-  *         internal (SW start) or external, without detail
-  *         of which peripheral is selected as external trigger,
-  *         (equivalent to 
-  *         "if(LL_ADC_REG_GetTriggerSource(ADC1) == LL_ADC_REG_TRIG_SOFTWARE)")
-  *         use function @ref LL_ADC_REG_IsTriggerSourceSWStart.
-  * @note   Availability of parameters of trigger sources from timer 
-  *         depends on timers availability on the selected device.
-  * @rmtoll CFGR1    EXTSEL         LL_ADC_REG_GetTriggerSource\n
-  *         CFGR1    EXTEN          LL_ADC_REG_GetTriggerSource
-  * @param  ADCx ADC instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_REG_TRIG_SOFTWARE
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM21_CH2
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH4
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM22_TRGO
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (*)
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11
-  *
-  *         (*) value not defined in all devices
-  */
-__STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerSource(ADC_TypeDef *ADCx)
-{
-  register uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN);
-  
-  /* Value for shift of {0; 4; 8; 12} depending on value of bitfield          */
-  /* corresponding to ADC_CFGR1_EXTEN {0; 1; 2; 3}.                           */
-  register uint32_t ShiftExten = ((TriggerSource & ADC_CFGR1_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2U));
-  
-  /* Set bitfield corresponding to ADC_CFGR1_EXTEN and ADC_CFGR1_EXTSEL       */
-  /* to match with triggers literals definition.                              */
-  return ((TriggerSource
-           & (ADC_REG_TRIG_SOURCE_MASK >> ShiftExten) & ADC_CFGR1_EXTSEL)
-          | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR1_EXTEN)
-         );
-}
-
-/**
-  * @brief  Get ADC group regular conversion trigger source internal (SW start)
-            or external.
-  * @note   In case of group regular trigger source set to external trigger,
-  *         to determine which peripheral is selected as external trigger,
-  *         use function @ref LL_ADC_REG_GetTriggerSource().
-  * @rmtoll CFGR1    EXTEN          LL_ADC_REG_IsTriggerSourceSWStart
-  * @param  ADCx ADC instance
-  * @retval Value "0" if trigger source external trigger
-  *         Value "1" if trigger source SW start.
-  */
-__STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN));
-}
-
-/**
-  * @brief  Set ADC group regular conversion trigger polarity.
-  * @note   Applicable only for trigger source set to external trigger.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CFGR1    EXTEN          LL_ADC_REG_SetTriggerEdge
-  * @param  ADCx ADC instance
-  * @param  ExternalTriggerEdge This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_RISING
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_REG_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge)
-{
-  MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge);
-}
-
-/**
-  * @brief  Get ADC group regular conversion trigger polarity.
-  * @note   Applicable only for trigger source set to external trigger.
-  * @rmtoll CFGR1    EXTEN          LL_ADC_REG_GetTriggerEdge
-  * @param  ADCx ADC instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_RISING
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
-  *         @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
-  */
-__STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerEdge(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN));
-}
-
-
-/**
-  * @brief  Set ADC group regular sequencer scan direction.
-  * @note   On some other STM32 families, this setting is not available and
-  *         the default scan direction is forward.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CFGR1    SCANDIR        LL_ADC_REG_SetSequencerScanDirection
-  * @param  ADCx ADC instance
-  * @param  ScanDirection This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_FORWARD
-  *         @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_REG_SetSequencerScanDirection(ADC_TypeDef *ADCx, uint32_t ScanDirection)
-{
-  MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_SCANDIR, ScanDirection);
-}
-
-/**
-  * @brief  Get ADC group regular sequencer scan direction.
-  * @note   On some other STM32 families, this setting is not available and
-  *         the default scan direction is forward.
-  * @rmtoll CFGR1    SCANDIR        LL_ADC_REG_GetSequencerScanDirection
-  * @param  ADCx ADC instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_FORWARD
-  *         @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD
-  */
-__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerScanDirection(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_SCANDIR));
-}
-
-/**
-  * @brief  Set ADC group regular sequencer discontinuous mode:
-  *         sequence subdivided and scan conversions interrupted every selected
-  *         number of ranks.
-  * @note   It is not possible to enable both ADC group regular 
-  *         continuous mode and sequencer discontinuous mode.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CFGR1    DISCEN         LL_ADC_REG_SetSequencerDiscont\n
-  * @param  ADCx ADC instance
-  * @param  SeqDiscont This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
-  *         @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_REG_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont)
-{
-  MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_DISCEN, SeqDiscont);
-}
-
-/**
-  * @brief  Get ADC group regular sequencer discontinuous mode:
-  *         sequence subdivided and scan conversions interrupted every selected
-  *         number of ranks.
-  * @rmtoll CFGR1    DISCEN         LL_ADC_REG_GetSequencerDiscont\n
-  * @param  ADCx ADC instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
-  *         @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
-  */
-__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerDiscont(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_DISCEN));
-}
-
-/**
-  * @brief  Set ADC group regular sequence: channel on rank corresponding to
-  *         channel number.
-  * @note   This function performs:
-  *         - Channels ordering into each rank of scan sequence:
-  *           rank of each channel is fixed by channel HW number
-  *           (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
-  *         - Set channels selected by overwriting the current sequencer
-  *           configuration.
-  * @note   On this STM32 serie, ADC group regular sequencer is
-  *         not fully configurable: sequencer length and each rank
-  *         affectation to a channel are fixed by channel HW number.
-  * @note   Depending on devices and packages, some channels may not be available.
-  *         Refer to device datasheet for channels availability.
-  * @note   On this STM32 serie, to measure internal channels (VrefInt,
-  *         TempSensor, ...), measurement paths to internal channels must be
-  *         enabled separately.
-  *         This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @note   One or several values can be selected.
-  *         Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...)
-  * @rmtoll CHSELR   CHSEL0         LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL1         LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL2         LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL3         LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL4         LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL5         LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL6         LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL7         LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL8         LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL9         LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL10        LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL11        LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL12        LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL13        LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL14        LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL15        LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL16        LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL17        LL_ADC_REG_SetSequencerChannels\n
-  *         CHSELR   CHSEL18        LL_ADC_REG_SetSequencerChannels
-  * @param  ADCx ADC instance
-  * @param  Channel This parameter can be a combination of the following values:
-  *         @arg @ref LL_ADC_CHANNEL_0
-  *         @arg @ref LL_ADC_CHANNEL_1
-  *         @arg @ref LL_ADC_CHANNEL_2
-  *         @arg @ref LL_ADC_CHANNEL_3
-  *         @arg @ref LL_ADC_CHANNEL_4
-  *         @arg @ref LL_ADC_CHANNEL_5
-  *         @arg @ref LL_ADC_CHANNEL_6
-  *         @arg @ref LL_ADC_CHANNEL_7
-  *         @arg @ref LL_ADC_CHANNEL_8
-  *         @arg @ref LL_ADC_CHANNEL_9
-  *         @arg @ref LL_ADC_CHANNEL_10
-  *         @arg @ref LL_ADC_CHANNEL_11
-  *         @arg @ref LL_ADC_CHANNEL_12
-  *         @arg @ref LL_ADC_CHANNEL_13
-  *         @arg @ref LL_ADC_CHANNEL_14
-  *         @arg @ref LL_ADC_CHANNEL_15
-  *         @arg @ref LL_ADC_CHANNEL_16         (1)
-  *         @arg @ref LL_ADC_CHANNEL_17
-  *         @arg @ref LL_ADC_CHANNEL_18
-  *         @arg @ref LL_ADC_CHANNEL_VREFINT
-  *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
-  *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)
-  *         
-  *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_REG_SetSequencerChannels(ADC_TypeDef *ADCx, uint32_t Channel)
-{
-  /* Parameter "Channel" is used with masks because containing                */
-  /* other bits reserved for other purpose.                                   */
-  WRITE_REG(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
-}
-
-/**
-  * @brief  Add channel to ADC group regular sequence: channel on rank corresponding to
-  *         channel number.
-  * @note   This function performs:
-  *         - Channels ordering into each rank of scan sequence:
-  *           rank of each channel is fixed by channel HW number
-  *           (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
-  *         - Set channels selected by adding them to the current sequencer
-  *           configuration.
-  * @note   On this STM32 serie, ADC group regular sequencer is
-  *         not fully configurable: sequencer length and each rank
-  *         affectation to a channel are fixed by channel HW number.
-  * @note   Depending on devices and packages, some channels may not be available.
-  *         Refer to device datasheet for channels availability.
-  * @note   On this STM32 serie, to measure internal channels (VrefInt,
-  *         TempSensor, ...), measurement paths to internal channels must be
-  *         enabled separately.
-  *         This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @note   One or several values can be selected.
-  *         Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...)
-  * @rmtoll CHSELR   CHSEL0         LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL1         LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL2         LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL3         LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL4         LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL5         LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL6         LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL7         LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL8         LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL9         LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL10        LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL11        LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL12        LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL13        LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL14        LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL15        LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL16        LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL17        LL_ADC_REG_SetSequencerChAdd\n
-  *         CHSELR   CHSEL18        LL_ADC_REG_SetSequencerChAdd
-  * @param  ADCx ADC instance
-  * @param  Channel This parameter can be a combination of the following values:
-  *         @arg @ref LL_ADC_CHANNEL_0
-  *         @arg @ref LL_ADC_CHANNEL_1
-  *         @arg @ref LL_ADC_CHANNEL_2
-  *         @arg @ref LL_ADC_CHANNEL_3
-  *         @arg @ref LL_ADC_CHANNEL_4
-  *         @arg @ref LL_ADC_CHANNEL_5
-  *         @arg @ref LL_ADC_CHANNEL_6
-  *         @arg @ref LL_ADC_CHANNEL_7
-  *         @arg @ref LL_ADC_CHANNEL_8
-  *         @arg @ref LL_ADC_CHANNEL_9
-  *         @arg @ref LL_ADC_CHANNEL_10
-  *         @arg @ref LL_ADC_CHANNEL_11
-  *         @arg @ref LL_ADC_CHANNEL_12
-  *         @arg @ref LL_ADC_CHANNEL_13
-  *         @arg @ref LL_ADC_CHANNEL_14
-  *         @arg @ref LL_ADC_CHANNEL_15
-  *         @arg @ref LL_ADC_CHANNEL_16         (1)
-  *         @arg @ref LL_ADC_CHANNEL_17
-  *         @arg @ref LL_ADC_CHANNEL_18
-  *         @arg @ref LL_ADC_CHANNEL_VREFINT
-  *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
-  *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)
-  *         
-  *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_REG_SetSequencerChAdd(ADC_TypeDef *ADCx, uint32_t Channel)
-{
-  /* Parameter "Channel" is used with masks because containing                */
-  /* other bits reserved for other purpose.                                   */
-  SET_BIT(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
-}
-
-/**
-  * @brief  Remove channel to ADC group regular sequence: channel on rank corresponding to
-  *         channel number.
-  * @note   This function performs:
-  *         - Channels ordering into each rank of scan sequence:
-  *           rank of each channel is fixed by channel HW number
-  *           (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
-  *         - Set channels selected by removing them to the current sequencer
-  *           configuration.
-  * @note   On this STM32 serie, ADC group regular sequencer is
-  *         not fully configurable: sequencer length and each rank
-  *         affectation to a channel are fixed by channel HW number.
-  * @note   Depending on devices and packages, some channels may not be available.
-  *         Refer to device datasheet for channels availability.
-  * @note   On this STM32 serie, to measure internal channels (VrefInt,
-  *         TempSensor, ...), measurement paths to internal channels must be
-  *         enabled separately.
-  *         This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @note   One or several values can be selected.
-  *         Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...)
-  * @rmtoll CHSELR   CHSEL0         LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL1         LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL2         LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL3         LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL4         LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL5         LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL6         LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL7         LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL8         LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL9         LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL10        LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL11        LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL12        LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL13        LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL14        LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL15        LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL16        LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL17        LL_ADC_REG_SetSequencerChRem\n
-  *         CHSELR   CHSEL18        LL_ADC_REG_SetSequencerChRem
-  * @param  ADCx ADC instance
-  * @param  Channel This parameter can be a combination of the following values:
-  *         @arg @ref LL_ADC_CHANNEL_0
-  *         @arg @ref LL_ADC_CHANNEL_1
-  *         @arg @ref LL_ADC_CHANNEL_2
-  *         @arg @ref LL_ADC_CHANNEL_3
-  *         @arg @ref LL_ADC_CHANNEL_4
-  *         @arg @ref LL_ADC_CHANNEL_5
-  *         @arg @ref LL_ADC_CHANNEL_6
-  *         @arg @ref LL_ADC_CHANNEL_7
-  *         @arg @ref LL_ADC_CHANNEL_8
-  *         @arg @ref LL_ADC_CHANNEL_9
-  *         @arg @ref LL_ADC_CHANNEL_10
-  *         @arg @ref LL_ADC_CHANNEL_11
-  *         @arg @ref LL_ADC_CHANNEL_12
-  *         @arg @ref LL_ADC_CHANNEL_13
-  *         @arg @ref LL_ADC_CHANNEL_14
-  *         @arg @ref LL_ADC_CHANNEL_15
-  *         @arg @ref LL_ADC_CHANNEL_16         (1)
-  *         @arg @ref LL_ADC_CHANNEL_17
-  *         @arg @ref LL_ADC_CHANNEL_18
-  *         @arg @ref LL_ADC_CHANNEL_VREFINT
-  *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
-  *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)
-  *         
-  *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_REG_SetSequencerChRem(ADC_TypeDef *ADCx, uint32_t Channel)
-{
-  /* Parameter "Channel" is used with masks because containing                */
-  /* other bits reserved for other purpose.                                   */
-  CLEAR_BIT(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
-}
-
-/**
-  * @brief  Get ADC group regular sequence: channel on rank corresponding to
-  *         channel number.
-  * @note   This function performs:
-  *         - Channels order reading into each rank of scan sequence:
-  *           rank of each channel is fixed by channel HW number
-  *           (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
-  * @note   On this STM32 serie, ADC group regular sequencer is
-  *         not fully configurable: sequencer length and each rank
-  *         affectation to a channel are fixed by channel HW number.
-  * @note   Depending on devices and packages, some channels may not be available.
-  *         Refer to device datasheet for channels availability.
-  * @note   On this STM32 serie, to measure internal channels (VrefInt,
-  *         TempSensor, ...), measurement paths to internal channels must be
-  *         enabled separately.
-  *         This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @note   One or several values can be retrieved.
-  *         Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...)
-  * @rmtoll CHSELR   CHSEL0         LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL1         LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL2         LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL3         LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL4         LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL5         LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL6         LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL7         LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL8         LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL9         LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL10        LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL11        LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL12        LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL13        LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL14        LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL15        LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL16        LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL17        LL_ADC_REG_GetSequencerChannels\n
-  *         CHSELR   CHSEL18        LL_ADC_REG_GetSequencerChannels
-  * @param  ADCx ADC instance
-  * @retval Returned value can be a combination of the following values:
-  *         @arg @ref LL_ADC_CHANNEL_0
-  *         @arg @ref LL_ADC_CHANNEL_1
-  *         @arg @ref LL_ADC_CHANNEL_2
-  *         @arg @ref LL_ADC_CHANNEL_3
-  *         @arg @ref LL_ADC_CHANNEL_4
-  *         @arg @ref LL_ADC_CHANNEL_5
-  *         @arg @ref LL_ADC_CHANNEL_6
-  *         @arg @ref LL_ADC_CHANNEL_7
-  *         @arg @ref LL_ADC_CHANNEL_8
-  *         @arg @ref LL_ADC_CHANNEL_9
-  *         @arg @ref LL_ADC_CHANNEL_10
-  *         @arg @ref LL_ADC_CHANNEL_11
-  *         @arg @ref LL_ADC_CHANNEL_12
-  *         @arg @ref LL_ADC_CHANNEL_13
-  *         @arg @ref LL_ADC_CHANNEL_14
-  *         @arg @ref LL_ADC_CHANNEL_15
-  *         @arg @ref LL_ADC_CHANNEL_16         (1)
-  *         @arg @ref LL_ADC_CHANNEL_17
-  *         @arg @ref LL_ADC_CHANNEL_18
-  *         @arg @ref LL_ADC_CHANNEL_VREFINT
-  *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
-  *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)
-  *         
-  *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
-  */
-__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerChannels(ADC_TypeDef *ADCx)
-{
-  register uint32_t ChannelsBitfield = READ_BIT(ADCx->CHSELR, ADC_CHSELR_CHSEL);
-  
-  return (   (((ChannelsBitfield & ADC_CHSELR_CHSEL0) >> ADC_CHSELR_CHSEL0_BITOFFSET_POS) * LL_ADC_CHANNEL_0)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL1) >> ADC_CHSELR_CHSEL1_BITOFFSET_POS) * LL_ADC_CHANNEL_1)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL2) >> ADC_CHSELR_CHSEL2_BITOFFSET_POS) * LL_ADC_CHANNEL_2)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL3) >> ADC_CHSELR_CHSEL3_BITOFFSET_POS) * LL_ADC_CHANNEL_3)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL4) >> ADC_CHSELR_CHSEL4_BITOFFSET_POS) * LL_ADC_CHANNEL_4)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL5) >> ADC_CHSELR_CHSEL5_BITOFFSET_POS) * LL_ADC_CHANNEL_5)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL6) >> ADC_CHSELR_CHSEL6_BITOFFSET_POS) * LL_ADC_CHANNEL_6)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL7) >> ADC_CHSELR_CHSEL7_BITOFFSET_POS) * LL_ADC_CHANNEL_7)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL8) >> ADC_CHSELR_CHSEL8_BITOFFSET_POS) * LL_ADC_CHANNEL_8)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL9) >> ADC_CHSELR_CHSEL9_BITOFFSET_POS) * LL_ADC_CHANNEL_9)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL10) >> ADC_CHSELR_CHSEL10_BITOFFSET_POS) * LL_ADC_CHANNEL_10)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL11) >> ADC_CHSELR_CHSEL11_BITOFFSET_POS) * LL_ADC_CHANNEL_11)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL12) >> ADC_CHSELR_CHSEL12_BITOFFSET_POS) * LL_ADC_CHANNEL_12)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL13) >> ADC_CHSELR_CHSEL13_BITOFFSET_POS) * LL_ADC_CHANNEL_13)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL14) >> ADC_CHSELR_CHSEL14_BITOFFSET_POS) * LL_ADC_CHANNEL_14)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL15) >> ADC_CHSELR_CHSEL15_BITOFFSET_POS) * LL_ADC_CHANNEL_15)
-#if defined(ADC_CCR_VLCDEN)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL16) >> ADC_CHSELR_CHSEL16_BITOFFSET_POS) * LL_ADC_CHANNEL_16)
-#endif
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL17) >> ADC_CHSELR_CHSEL17_BITOFFSET_POS) * LL_ADC_CHANNEL_17)
-           | (((ChannelsBitfield & ADC_CHSELR_CHSEL18) >> ADC_CHSELR_CHSEL18_BITOFFSET_POS) * LL_ADC_CHANNEL_18)
-         );
-}
-/**
-  * @brief  Set ADC continuous conversion mode on ADC group regular.
-  * @note   Description of ADC continuous conversion mode:
-  *         - single mode: one conversion per trigger
-  *         - continuous mode: after the first trigger, following
-  *           conversions launched successively automatically.
-  * @note   It is not possible to enable both ADC group regular 
-  *         continuous mode and sequencer discontinuous mode.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CFGR1    CONT           LL_ADC_REG_SetContinuousMode
-  * @param  ADCx ADC instance
-  * @param  Continuous This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_REG_CONV_SINGLE
-  *         @arg @ref LL_ADC_REG_CONV_CONTINUOUS
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_REG_SetContinuousMode(ADC_TypeDef *ADCx, uint32_t Continuous)
-{
-  MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_CONT, Continuous);
-}
-
-/**
-  * @brief  Get ADC continuous conversion mode on ADC group regular.
-  * @note   Description of ADC continuous conversion mode:
-  *         - single mode: one conversion per trigger
-  *         - continuous mode: after the first trigger, following
-  *           conversions launched successively automatically.
-  * @rmtoll CFGR1    CONT           LL_ADC_REG_GetContinuousMode
-  * @param  ADCx ADC instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_REG_CONV_SINGLE
-  *         @arg @ref LL_ADC_REG_CONV_CONTINUOUS
-  */
-__STATIC_INLINE uint32_t LL_ADC_REG_GetContinuousMode(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_CONT));
-}
-
-/**
-  * @brief  Set ADC group regular conversion data transfer: no transfer or
-  *         transfer by DMA, and DMA requests mode.
-  * @note   If transfer by DMA selected, specifies the DMA requests
-  *         mode:
-  *         - Limited mode (One shot mode): DMA transfer requests are stopped
-  *           when number of DMA data transfers (number of
-  *           ADC conversions) is reached.
-  *           This ADC mode is intended to be used with DMA mode non-circular.
-  *         - Unlimited mode: DMA transfer requests are unlimited,
-  *           whatever number of DMA data transfers (number of
-  *           ADC conversions).
-  *           This ADC mode is intended to be used with DMA mode circular.
-  * @note   If ADC DMA requests mode is set to unlimited and DMA is set to
-  *         mode non-circular:
-  *         when DMA transfers size will be reached, DMA will stop transfers of
-  *         ADC conversions data ADC will raise an overrun error
-  *        (overrun flag and interruption if enabled).
-  * @note   To configure DMA source address (peripheral address),
-  *         use function @ref LL_ADC_DMA_GetRegAddr().
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CFGR1    DMAEN          LL_ADC_REG_SetDMATransfer\n
-  *         CFGR1    DMACFG         LL_ADC_REG_SetDMATransfer
-  * @param  ADCx ADC instance
-  * @param  DMATransfer This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE
-  *         @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
-  *         @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_REG_SetDMATransfer(ADC_TypeDef *ADCx, uint32_t DMATransfer)
-{
-  MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG, DMATransfer);
-}
-
-/**
-  * @brief  Get ADC group regular conversion data transfer: no transfer or
-  *         transfer by DMA, and DMA requests mode.
-  * @note   If transfer by DMA selected, specifies the DMA requests
-  *         mode:
-  *         - Limited mode (One shot mode): DMA transfer requests are stopped
-  *           when number of DMA data transfers (number of
-  *           ADC conversions) is reached.
-  *           This ADC mode is intended to be used with DMA mode non-circular.
-  *         - Unlimited mode: DMA transfer requests are unlimited,
-  *           whatever number of DMA data transfers (number of
-  *           ADC conversions).
-  *           This ADC mode is intended to be used with DMA mode circular.
-  * @note   If ADC DMA requests mode is set to unlimited and DMA is set to
-  *         mode non-circular:
-  *         when DMA transfers size will be reached, DMA will stop transfers of
-  *         ADC conversions data ADC will raise an overrun error
-  *         (overrun flag and interruption if enabled).
-  * @note   To configure DMA source address (peripheral address),
-  *         use function @ref LL_ADC_DMA_GetRegAddr().
-  * @rmtoll CFGR1    DMAEN          LL_ADC_REG_GetDMATransfer\n
-  *         CFGR1    DMACFG         LL_ADC_REG_GetDMATransfer
-  * @param  ADCx ADC instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE
-  *         @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
-  *         @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
-  */
-__STATIC_INLINE uint32_t LL_ADC_REG_GetDMATransfer(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG));
-}
-
-/**
-  * @brief  Set ADC group regular behavior in case of overrun:
-  *         data preserved or overwritten.
-  * @note   Compatibility with devices without feature overrun:
-  *         other devices without this feature have a behavior
-  *         equivalent to data overwritten.
-  *         The default setting of overrun is data preserved.
-  *         Therefore, for compatibility with all devices, parameter
-  *         overrun should be set to data overwritten.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CFGR1    OVRMOD         LL_ADC_REG_SetOverrun
-  * @param  ADCx ADC instance
-  * @param  Overrun This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
-  *         @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_REG_SetOverrun(ADC_TypeDef *ADCx, uint32_t Overrun)
-{
-  MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_OVRMOD, Overrun);
-}
-
-/**
-  * @brief  Get ADC group regular behavior in case of overrun:
-  *         data preserved or overwritten.
-  * @rmtoll CFGR1    OVRMOD         LL_ADC_REG_GetOverrun
-  * @param  ADCx ADC instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
-  *         @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
-  */
-__STATIC_INLINE uint32_t LL_ADC_REG_GetOverrun(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_OVRMOD));
-}
-
-/**
-  * @}
-  */
-
-
-/** @defgroup ADC_LL_EF_Configuration_ADC_AnalogWatchdog Configuration of ADC transversal scope: analog watchdog
-  * @{
-  */
-
-/**
-  * @brief  Set ADC analog watchdog monitored channels:
-  *         a single channel or all channels,
-  *         on ADC group regular.
-  * @note   Once monitored channels are selected, analog watchdog
-  *         is enabled.
-  * @note   In case of need to define a single channel to monitor
-  *         with analog watchdog from sequencer channel definition,
-  *         use helper macro @ref __LL_ADC_ANALOGWD_CHANNEL_GROUP().
-  * @note   On this STM32 serie, there is only 1 kind of analog watchdog
-  *         instance:
-  *         - AWD standard (instance AWD1):
-  *           - channels monitored: can monitor 1 channel or all channels.
-  *           - groups monitored: ADC group regular.
-  *           - resolution: resolution is not limited (corresponds to
-  *             ADC resolution configured).
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CFGR1    AWDCH          LL_ADC_SetAnalogWDMonitChannels\n
-  *         CFGR1    AWDSGL         LL_ADC_SetAnalogWDMonitChannels\n
-  *         CFGR1    AWDEN          LL_ADC_SetAnalogWDMonitChannels
-  * @param  ADCx ADC instance
-  * @param  AWDChannelGroup This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_AWD_DISABLE
-  *         @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_0_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_1_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_2_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_3_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_4_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_5_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_6_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_7_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_8_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_9_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_10_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_11_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_12_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_13_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_14_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_15_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_16_REG          (1)
-  *         @arg @ref LL_ADC_AWD_CHANNEL_17_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_18_REG
-  *         @arg @ref LL_ADC_AWD_CH_VREFINT_REG
-  *         @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG
-  *         @arg @ref LL_ADC_AWD_CH_VLCD_REG             (1)
-  *         
-  *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_SetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDChannelGroup)
-{
-  MODIFY_REG(ADCx->CFGR1,
-             (ADC_CFGR1_AWDCH | ADC_CFGR1_AWDSGL | ADC_CFGR1_AWDEN),
-             (AWDChannelGroup & ADC_AWD_CR_ALL_CHANNEL_MASK));
-}
-
-/**
-  * @brief  Get ADC analog watchdog monitored channel.
-  * @note   Usage of the returned channel number:
-  *         - To reinject this channel into another function LL_ADC_xxx:
-  *           the returned channel number is only partly formatted on definition
-  *           of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
-  *           with parts of literals LL_ADC_CHANNEL_x or using
-  *           helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
-  *           Then the selected literal LL_ADC_CHANNEL_x can be used
-  *           as parameter for another function.
-  *         - To get the channel number in decimal format:
-  *           process the returned value with the helper macro
-  *           @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
-  *           Applicable only when the analog watchdog is set to monitor
-  *           one channel.
-  * @note   On this STM32 serie, there is only 1 kind of analog watchdog
-  *         instance:
-  *         - AWD standard (instance AWD1):
-  *           - channels monitored: can monitor 1 channel or all channels.
-  *           - groups monitored: ADC group regular.
-  *           - resolution: resolution is not limited (corresponds to
-  *             ADC resolution configured).
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CFGR1    AWDCH          LL_ADC_GetAnalogWDMonitChannels\n
-  *         CFGR1    AWDSGL         LL_ADC_GetAnalogWDMonitChannels\n
-  *         CFGR1    AWDEN          LL_ADC_GetAnalogWDMonitChannels
-  * @param  ADCx ADC instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_AWD_DISABLE
-  *         @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_0_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_1_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_2_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_3_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_4_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_5_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_6_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_7_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_8_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_9_REG 
-  *         @arg @ref LL_ADC_AWD_CHANNEL_10_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_11_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_12_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_13_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_14_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_15_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_16_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_17_REG
-  *         @arg @ref LL_ADC_AWD_CHANNEL_18_REG
-  */
-__STATIC_INLINE uint32_t LL_ADC_GetAnalogWDMonitChannels(ADC_TypeDef *ADCx)
-{
-  register uint32_t AWDChannelGroup = READ_BIT(ADCx->CFGR1, (ADC_CFGR1_AWDCH | ADC_CFGR1_AWDSGL | ADC_CFGR1_AWDEN));
-  
-  /* Note: Set variable according to channel definition including channel ID  */
-  /*       with bitfield.                                                     */
-  register uint32_t AWDChannelSingle = ((AWDChannelGroup & ADC_CFGR1_AWDSGL) >> ADC_CFGR1_AWDSGL_BITOFFSET_POS);
-  register uint32_t AWDChannelBitField = (ADC_CHANNEL_0_BITFIELD << ((AWDChannelGroup & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS));
-  
-  return (AWDChannelGroup | (AWDChannelBitField * AWDChannelSingle));
-}
-
-/**
-  * @brief  Set ADC analog watchdog thresholds value of both thresholds
-  *         high and low.
-  * @note   If value of only one threshold high or low must be set,
-  *         use function @ref LL_ADC_SetAnalogWDThresholds().
-  * @note   In case of ADC resolution different of 12 bits,
-  *         analog watchdog thresholds data require a specific shift.
-  *         Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
-  * @note   On this STM32 serie, there is only 1 kind of analog watchdog
-  *         instance:
-  *         - AWD standard (instance AWD1):
-  *           - channels monitored: can monitor 1 channel or all channels.
-  *           - groups monitored: ADC group regular.
-  *           - resolution: resolution is not limited (corresponds to
-  *             ADC resolution configured).
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll TR       HT             LL_ADC_ConfigAnalogWDThresholds\n
-  *         TR       LT             LL_ADC_ConfigAnalogWDThresholds
-  * @param  ADCx ADC instance
-  * @param  AWDThresholdHighValue Value between Min_Data=0x000 and Max_Data=0xFFF
-  * @param  AWDThresholdLowValue Value between Min_Data=0x000 and Max_Data=0xFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_ConfigAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdHighValue, uint32_t AWDThresholdLowValue)
-{
-  MODIFY_REG(ADCx->TR,
-             ADC_TR_HT | ADC_TR_LT,
-             (AWDThresholdHighValue << ADC_TR_HT_BITOFFSET_POS) | AWDThresholdLowValue);
-}
-
-/**
-  * @brief  Set ADC analog watchdog threshold value of threshold
-  *         high or low.
-  * @note   If values of both thresholds high or low must be set,
-  *         use function @ref LL_ADC_ConfigAnalogWDThresholds().
-  * @note   In case of ADC resolution different of 12 bits,
-  *         analog watchdog thresholds data require a specific shift.
-  *         Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
-  * @note   On this STM32 serie, there is only 1 kind of analog watchdog
-  *         instance:
-  *         - AWD standard (instance AWD1):
-  *           - channels monitored: can monitor 1 channel or all channels.
-  *           - groups monitored: ADC group regular.
-  *           - resolution: resolution is not limited (corresponds to
-  *             ADC resolution configured).
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll TR       HT             LL_ADC_SetAnalogWDThresholds\n
-  *         TR       LT             LL_ADC_SetAnalogWDThresholds
-  * @param  ADCx ADC instance
-  * @param  AWDThresholdsHighLow This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
-  *         @arg @ref LL_ADC_AWD_THRESHOLD_LOW
-  * @param  AWDThresholdValue: Value between Min_Data=0x000 and Max_Data=0xFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_SetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdsHighLow, uint32_t AWDThresholdValue)
-{
-  /* Parameter "AWDThresholdsHighLow" is used with mask "0x00000010"          */
-  /* to be equivalent to "POSITION_VAL(AWDThresholdsHighLow)": if threshold   */
-  /* high is selected, then data is shifted to LSB. Else(threshold low),      */
-  /* data is not shifted.                                                     */
-  MODIFY_REG(ADCx->TR,
-             AWDThresholdsHighLow,
-             AWDThresholdValue << ((AWDThresholdsHighLow >> ADC_TR_HT_BITOFFSET_POS) & ((uint32_t)0x00000010U)));
-}
-
-/**
-  * @brief  Get ADC analog watchdog threshold value of threshold high,
-  *         threshold low or raw data with ADC thresholds high and low
-  *         concatenated.
-  * @note   If raw data with ADC thresholds high and low is retrieved,
-  *         the data of each threshold high or low can be isolated
-  *         using helper macro:
-  *         @ref __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW().
-  * @note   In case of ADC resolution different of 12 bits,
-  *         analog watchdog thresholds data require a specific shift.
-  *         Use helper macro @ref __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION().
-  * @rmtoll TR       HT             LL_ADC_GetAnalogWDThresholds\n
-  *         TR       LT             LL_ADC_GetAnalogWDThresholds
-  * @param  ADCx ADC instance
-  * @param  AWDThresholdsHighLow This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
-  *         @arg @ref LL_ADC_AWD_THRESHOLD_LOW
-  *         @arg @ref LL_ADC_AWD_THRESHOLDS_HIGH_LOW
-  * @retval Value between Min_Data=0x000 and Max_Data=0xFFF
-*/
-__STATIC_INLINE uint32_t LL_ADC_GetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdsHighLow)
-{
-  /* Parameter "AWDThresholdsHighLow" is used with mask "0x00000010"          */
-  /* to be equivalent to "POSITION_VAL(AWDThresholdsHighLow)": if threshold   */
-  /* high is selected, then data is shifted to LSB. Else(threshold low or     */
-  /* both thresholds), data is not shifted.                                   */
-  return (uint32_t)(READ_BIT(ADCx->TR,
-                             (AWDThresholdsHighLow | ADC_TR_LT))
-                    >> ((~AWDThresholdsHighLow) & ((uint32_t)0x00000010U))
-                   );
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EF_Configuration_ADC_oversampling Configuration of ADC transversal scope: oversampling
-  * @{
-  */
-
-/**
-  * @brief  Set ADC oversampling scope.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CFGR2    OVSE           LL_ADC_SetOverSamplingScope
-  * @param  ADCx ADC instance
-  * @param  OvsScope This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_OVS_DISABLE
-  *         @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_SetOverSamplingScope(ADC_TypeDef *ADCx, uint32_t OvsScope)
-{
-  MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_OVSE, OvsScope);
-}
-
-/**
-  * @brief  Get ADC oversampling scope.
-  * @rmtoll CFGR2    OVSE           LL_ADC_GetOverSamplingScope
-  * @param  ADCx ADC instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_OVS_DISABLE
-  *         @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED
-  */
-__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingScope(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSE));
-}
-
-/**
-  * @brief  Set ADC oversampling discontinuous mode (triggered mode)
-  *         on the selected ADC group.
-  * @note   Number of oversampled conversions are done either in:
-  *         - continuous mode (all conversions of oversampling ratio
-  *           are done from 1 trigger)
-  *         - discontinuous mode (each conversion of oversampling ratio
-  *           needs a trigger)
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CFGR2    TOVS           LL_ADC_SetOverSamplingDiscont
-  * @param  ADCx ADC instance
-  * @param  OverSamplingDiscont This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_OVS_REG_CONT
-  *         @arg @ref LL_ADC_OVS_REG_DISCONT
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_SetOverSamplingDiscont(ADC_TypeDef *ADCx, uint32_t OverSamplingDiscont)
-{
-  MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_TOVS, OverSamplingDiscont);
-}
-
-/**
-  * @brief  Get ADC oversampling discontinuous mode (triggered mode)
-  *         on the selected ADC group.
-  * @note   Number of oversampled conversions are done either in:
-  *         - continuous mode (all conversions of oversampling ratio
-  *           are done from 1 trigger)
-  *         - discontinuous mode (each conversion of oversampling ratio
-  *           needs a trigger)
-  * @rmtoll CFGR2    TOVS           LL_ADC_GetOverSamplingDiscont
-  * @param  ADCx ADC instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_ADC_OVS_REG_CONT
-  *         @arg @ref LL_ADC_OVS_REG_DISCONT
-  */
-__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingDiscont(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_TOVS));
-}
-
-/**
-  * @brief  Set ADC oversampling
-  * @note   This function set the 2 items of oversampling configuration:
-  *         - ratio
-  *         - shift
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be disabled or enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CFGR2    OVSS           LL_ADC_ConfigOverSamplingRatioShift\n
-  *         CFGR2    OVSR           LL_ADC_ConfigOverSamplingRatioShift
-  * @param  ADCx ADC instance
-  * @param  Ratio This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_OVS_RATIO_2
-  *         @arg @ref LL_ADC_OVS_RATIO_4
-  *         @arg @ref LL_ADC_OVS_RATIO_8
-  *         @arg @ref LL_ADC_OVS_RATIO_16
-  *         @arg @ref LL_ADC_OVS_RATIO_32
-  *         @arg @ref LL_ADC_OVS_RATIO_64
-  *         @arg @ref LL_ADC_OVS_RATIO_128
-  *         @arg @ref LL_ADC_OVS_RATIO_256
-  * @param  Shift This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_OVS_SHIFT_NONE
-  *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1
-  *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2
-  *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3
-  *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4
-  *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5
-  *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6
-  *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7
-  *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_ConfigOverSamplingRatioShift(ADC_TypeDef *ADCx, uint32_t Ratio, uint32_t Shift)
-{
-  MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS | ADC_CFGR2_OVSR), (Shift | Ratio));
-}
-
-/**
-  * @brief  Get ADC oversampling ratio
-  * @rmtoll CFGR2    OVSR           LL_ADC_GetOverSamplingRatio
-  * @param  ADCx ADC instance
-  * @retval Ratio This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_OVS_RATIO_2
-  *         @arg @ref LL_ADC_OVS_RATIO_4
-  *         @arg @ref LL_ADC_OVS_RATIO_8
-  *         @arg @ref LL_ADC_OVS_RATIO_16
-  *         @arg @ref LL_ADC_OVS_RATIO_32
-  *         @arg @ref LL_ADC_OVS_RATIO_64
-  *         @arg @ref LL_ADC_OVS_RATIO_128
-  *         @arg @ref LL_ADC_OVS_RATIO_256
-*/
-__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingRatio(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR));
-}
-
-/**
-  * @brief  Get ADC oversampling shift
-  * @rmtoll CFGR2    OVSS           LL_ADC_GetOverSamplingShift
-  * @param  ADCx ADC instance
-  * @retval Shift This parameter can be one of the following values:
-  *         @arg @ref LL_ADC_OVS_SHIFT_NONE
-  *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1
-  *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2
-  *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3
-  *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4
-  *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5
-  *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6
-  *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7
-  *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8
-*/
-__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingShift(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSS));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EF_Operation_ADC_Instance Operation on ADC hierarchical scope: ADC instance
-  * @{
-  */
-
-/**
-  * @brief  Enable ADC instance internal voltage regulator.
-  * @note   On this STM32 serie, there are three possibilities to enable
-  *         the voltage regulator:
-  *         - by enabling it manually
-  *           using function @ref LL_ADC_EnableInternalRegulator().
-  *         - by launching a calibration
-  *           using function @ref LL_ADC_StartCalibration().
-  *         - by enabling the ADC
-  *           using function @ref LL_ADC_Enable().
-  * @note   On this STM32 serie, after ADC internal voltage regulator enable,
-  *         a delay for ADC internal voltage regulator stabilization
-  *         is required before performing a ADC calibration or ADC enable.
-  *         Refer to device datasheet, parameter "tUP_LDO".
-  *         Refer to literal @ref LL_ADC_DELAY_INTERNAL_REGUL_STAB_US.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be ADC disabled.
-  * @rmtoll CR       ADVREGEN       LL_ADC_EnableInternalRegulator
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx)
-{
-  /* Note: Write register with some additional bits forced to state reset     */
-  /*       instead of modifying only the selected bit for this function,      */
-  /*       to not interfere with bits with HW property "rs".                  */
-  MODIFY_REG(ADCx->CR,
-             ADC_CR_BITS_PROPERTY_RS,
-             ADC_CR_ADVREGEN);
-}
-
-/**
-  * @brief  Disable ADC internal voltage regulator.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be ADC disabled.
-  * @rmtoll CR       ADVREGEN       LL_ADC_DisableInternalRegulator
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_DisableInternalRegulator(ADC_TypeDef *ADCx)
-{
-  CLEAR_BIT(ADCx->CR, (ADC_CR_ADVREGEN | ADC_CR_BITS_PROPERTY_RS));
-}
-
-/**
-  * @brief  Get the selected ADC instance internal voltage regulator state.
-  * @rmtoll CR       ADVREGEN       LL_ADC_IsInternalRegulatorEnabled
-  * @param  ADCx ADC instance
-  * @retval 0: internal regulator is disabled, 1: internal regulator is enabled.
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN));
-}
-
-/**
-  * @brief  Enable the selected ADC instance.
-  * @note   On this STM32 serie, after ADC enable, a delay for 
-  *         ADC internal analog stabilization is required before performing a
-  *         ADC conversion start.
-  *         Refer to device datasheet, parameter tSTAB.
-  * @note   On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
-  *         is enabled and when conversion clock is active.
-  *         (not only core clock: this ADC has a dual clock domain)
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be ADC disabled and ADC internal voltage regulator enabled.
-  * @rmtoll CR       ADEN           LL_ADC_Enable
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx)
-{
-  /* Note: Write register with some additional bits forced to state reset     */
-  /*       instead of modifying only the selected bit for this function,      */
-  /*       to not interfere with bits with HW property "rs".                  */
-  MODIFY_REG(ADCx->CR,
-             ADC_CR_BITS_PROPERTY_RS,
-             ADC_CR_ADEN);
-}
-
-/**
-  * @brief  Disable the selected ADC instance.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be not disabled. Must be enabled without conversion on going
-  *         on group regular.
-  * @rmtoll CR       ADDIS          LL_ADC_Disable
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx)
-{
-  /* Note: Write register with some additional bits forced to state reset     */
-  /*       instead of modifying only the selected bit for this function,      */
-  /*       to not interfere with bits with HW property "rs".                  */
-  MODIFY_REG(ADCx->CR,
-             ADC_CR_BITS_PROPERTY_RS,
-             ADC_CR_ADDIS);
-}
-
-/**
-  * @brief  Get the selected ADC instance enable state.
-  * @note   On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
-  *         is enabled and when conversion clock is active.
-  *         (not only core clock: this ADC has a dual clock domain)
-  * @rmtoll CR       ADEN           LL_ADC_IsEnabled
-  * @param  ADCx ADC instance
-  * @retval 0: ADC is disabled, 1: ADC is enabled.
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsEnabled(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN));
-}
-
-/**
-  * @brief  Get the selected ADC instance disable state.
-  * @rmtoll CR       ADDIS          LL_ADC_IsDisableOngoing
-  * @param  ADCx ADC instance
-  * @retval 0: no ADC disable command on going.
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS));
-}
-
-/**
-  * @brief  Start ADC calibration in the mode single-ended
-  *         or differential (for devices with differential mode available).
-  * @note   On this STM32 serie, a minimum number of ADC clock cycles
-  *         are required between ADC end of calibration and ADC enable.
-  *         Refer to literal @ref LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES.
-  * @note   In case of usage of ADC with DMA transfer:
-  *         On this STM32 serie, ADC DMA transfer request should be disabled
-  *         during calibration:
-  *         Calibration factor is available in data register
-  *         and also transfered by DMA.
-  *         To not insert ADC calibration factor among ADC conversion data
-  *         in array variable, DMA transfer must be disabled during
-  *         calibration.
-  *         (DMA transfer setting backup and disable before calibration,
-  *         DMA transfer setting restore after calibration.
-  *         Refer to functions @ref LL_ADC_REG_GetDMATransfer(),
-  *         @ref LL_ADC_REG_SetDMATransfer() ).
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be ADC disabled.
-  * @rmtoll CR       ADCAL          LL_ADC_StartCalibration
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_StartCalibration(ADC_TypeDef *ADCx)
-{
-  /* Note: Write register with some additional bits forced to state reset     */
-  /*       instead of modifying only the selected bit for this function,      */
-  /*       to not interfere with bits with HW property "rs".                  */
-  MODIFY_REG(ADCx->CR,
-             ADC_CR_BITS_PROPERTY_RS,
-             ADC_CR_ADCAL);
-}
-
-/**
-  * @brief  Get ADC calibration state.
-  * @rmtoll CR       ADCAL          LL_ADC_IsCalibrationOnGoing
-  * @param  ADCx ADC instance
-  * @retval 0: calibration complete, 1: calibration in progress.
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsCalibrationOnGoing(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->CR, ADC_CR_ADCAL) == (ADC_CR_ADCAL));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EF_Operation_ADC_Group_Regular Operation on ADC hierarchical scope: group regular
-  * @{
-  */
-
-/**
-  * @brief  Start ADC group regular conversion.
-  * @note   On this STM32 serie, this function is relevant for both 
-  *         internal trigger (SW start) and external trigger:
-  *         - If ADC trigger has been set to software start, ADC conversion
-  *           starts immediately.
-  *         - If ADC trigger has been set to external trigger, ADC conversion
-  *           will start at next trigger event (on the selected trigger edge)
-  *           following the ADC start conversion command.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be enabled without conversion on going on group regular,
-  *         without conversion stop command on going on group regular,
-  *         without ADC disable command on going.
-  * @rmtoll CR       ADSTART        LL_ADC_REG_StartConversion
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx)
-{
-  /* Note: Write register with some additional bits forced to state reset     */
-  /*       instead of modifying only the selected bit for this function,      */
-  /*       to not interfere with bits with HW property "rs".                  */
-  MODIFY_REG(ADCx->CR,
-             ADC_CR_BITS_PROPERTY_RS,
-             ADC_CR_ADSTART);
-}
-
-/**
-  * @brief  Stop ADC group regular conversion.
-  * @note   On this STM32 serie, setting of this feature is conditioned to
-  *         ADC state:
-  *         ADC must be enabled with conversion on going on group regular,
-  *         without ADC disable command on going.
-  * @rmtoll CR       ADSTP          LL_ADC_REG_StopConversion
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx)
-{
-  /* Note: Write register with some additional bits forced to state reset     */
-  /*       instead of modifying only the selected bit for this function,      */
-  /*       to not interfere with bits with HW property "rs".                  */
-  MODIFY_REG(ADCx->CR,
-             ADC_CR_BITS_PROPERTY_RS,
-             ADC_CR_ADSTP);
-}
-
-/**
-  * @brief  Get ADC group regular conversion state.
-  * @rmtoll CR       ADSTART        LL_ADC_REG_IsConversionOngoing
-  * @param  ADCx ADC instance
-  * @retval 0: no conversion is on going on ADC group regular.
-  */
-__STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART));
-}
-
-/**
-  * @brief  Get ADC group regular command of conversion stop state
-  * @rmtoll CR       ADSTP          LL_ADC_REG_IsStopConversionOngoing
-  * @param  ADCx ADC instance
-  * @retval 0: no command of conversion stop is on going on ADC group regular.
-  */
-__STATIC_INLINE uint32_t LL_ADC_REG_IsStopConversionOngoing(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->CR, ADC_CR_ADSTP) == (ADC_CR_ADSTP));
-}
-
-/**
-  * @brief  Get ADC group regular conversion data, range fit for
-  *         all ADC configurations: all ADC resolutions and
-  *         all oversampling increased data width (for devices
-  *         with feature oversampling).
-  * @rmtoll DR       DATA           LL_ADC_REG_ReadConversionData32
-  * @param  ADCx ADC instance
-  * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
-  */
-__STATIC_INLINE uint32_t LL_ADC_REG_ReadConversionData32(ADC_TypeDef *ADCx)
-{
-  return (uint32_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
-}
-
-/**
-  * @brief  Get ADC group regular conversion data, range fit for
-  *         ADC resolution 12 bits.
-  * @note   For devices with feature oversampling: Oversampling
-  *         can increase data width, function for extended range
-  *         may be needed: @ref LL_ADC_REG_ReadConversionData32.
-  * @rmtoll DR       DATA           LL_ADC_REG_ReadConversionData12
-  * @param  ADCx ADC instance
-  * @retval Value between Min_Data=0x000 and Max_Data=0xFFF
-  */
-__STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData12(ADC_TypeDef *ADCx)
-{
-  return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
-}
-
-/**
-  * @brief  Get ADC group regular conversion data, range fit for
-  *         ADC resolution 10 bits.
-  * @note   For devices with feature oversampling: Oversampling
-  *         can increase data width, function for extended range
-  *         may be needed: @ref LL_ADC_REG_ReadConversionData32.
-  * @rmtoll DR       DATA           LL_ADC_REG_ReadConversionData10
-  * @param  ADCx ADC instance
-  * @retval Value between Min_Data=0x000 and Max_Data=0x3FF
-  */
-__STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData10(ADC_TypeDef *ADCx)
-{
-  return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
-}
-
-/**
-  * @brief  Get ADC group regular conversion data, range fit for
-  *         ADC resolution 8 bits.
-  * @note   For devices with feature oversampling: Oversampling
-  *         can increase data width, function for extended range
-  *         may be needed: @ref LL_ADC_REG_ReadConversionData32.
-  * @rmtoll DR       DATA           LL_ADC_REG_ReadConversionData8
-  * @param  ADCx ADC instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0xFF
-  */
-__STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData8(ADC_TypeDef *ADCx)
-{
-  return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
-}
-
-/**
-  * @brief  Get ADC group regular conversion data, range fit for
-  *         ADC resolution 6 bits.
-  * @note   For devices with feature oversampling: Oversampling
-  *         can increase data width, function for extended range
-  *         may be needed: @ref LL_ADC_REG_ReadConversionData32.
-  * @rmtoll DR       DATA           LL_ADC_REG_ReadConversionData6
-  * @param  ADCx ADC instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0x3F
-  */
-__STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData6(ADC_TypeDef *ADCx)
-{
-  return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EF_FLAG_Management ADC flag management
-  * @{
-  */
-
-/**
-  * @brief  Get flag ADC ready.
-  * @note   On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
-  *         is enabled and when conversion clock is active.
-  *         (not only core clock: this ADC has a dual clock domain)
-  * @rmtoll ISR      ADRDY          LL_ADC_IsActiveFlag_ADRDY
-  * @param  ADCx ADC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_ADRDY(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_ADRDY) == (LL_ADC_FLAG_ADRDY));
-}
-
-/**
-  * @brief  Get flag ADC group regular end of unitary conversion.
-  * @rmtoll ISR      EOC            LL_ADC_IsActiveFlag_EOC
-  * @param  ADCx ADC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOC(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->ISR, ADC_ISR_EOC) == (ADC_ISR_EOC));
-}
-
-/**
-  * @brief  Get flag ADC group regular end of sequence conversions.
-  * @rmtoll ISR      EOSEQ          LL_ADC_IsActiveFlag_EOS
-  * @param  ADCx ADC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOS(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOS) == (LL_ADC_FLAG_EOS));
-}
-
-/**
-  * @brief  Get flag ADC group regular overrun.
-  * @rmtoll ISR      OVR            LL_ADC_IsActiveFlag_OVR
-  * @param  ADCx ADC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_OVR(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_OVR) == (LL_ADC_FLAG_OVR));
-}
-
-/**
-  * @brief  Get flag ADC group regular end of sampling phase.
-  * @rmtoll ISR      EOSMP          LL_ADC_IsActiveFlag_EOSMP
-  * @param  ADCx ADC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOSMP(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOSMP) == (LL_ADC_FLAG_EOSMP));
-}
-
-/**
-  * @brief  Get flag ADC analog watchdog 1 flag
-  * @rmtoll ISR      AWD            LL_ADC_IsActiveFlag_AWD1
-  * @param  ADCx ADC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_AWD1(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_AWD1) == (LL_ADC_FLAG_AWD1));
-}
-
-/**
-  * @brief  Get flag ADC end of calibration.
-  * @rmtoll ISR      EOCAL          LL_ADC_IsActiveFlag_EOCAL
-  * @param  ADCx ADC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOCAL(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOCAL) == (LL_ADC_FLAG_EOCAL));
-}
-
-/**
-  * @brief  Clear flag ADC ready.
-  * @note   On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
-  *         is enabled and when conversion clock is active.
-  *         (not only core clock: this ADC has a dual clock domain)
-  * @rmtoll ISR      ADRDY          LL_ADC_ClearFlag_ADRDY
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_ClearFlag_ADRDY(ADC_TypeDef *ADCx)
-{
-  WRITE_REG(ADCx->ISR, LL_ADC_FLAG_ADRDY);
-}
-
-/**
-  * @brief  Clear flag ADC group regular end of unitary conversion.
-  * @rmtoll ISR      EOC            LL_ADC_ClearFlag_EOC
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_ClearFlag_EOC(ADC_TypeDef *ADCx)
-{
-  WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOC);
-}
-
-/**
-  * @brief  Clear flag ADC group regular end of sequence conversions.
-  * @rmtoll ISR      EOSEQ          LL_ADC_ClearFlag_EOS
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_ClearFlag_EOS(ADC_TypeDef *ADCx)
-{
-  WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOS);
-}
-
-/**
-  * @brief  Clear flag ADC group regular overrun.
-  * @rmtoll ISR      OVR            LL_ADC_ClearFlag_OVR
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_ClearFlag_OVR(ADC_TypeDef *ADCx)
-{
-  WRITE_REG(ADCx->ISR, LL_ADC_FLAG_OVR);
-}
-
-/**
-  * @brief  Clear flag ADC group regular end of sampling phase.
-  * @rmtoll ISR      EOSMP          LL_ADC_ClearFlag_EOSMP
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_ClearFlag_EOSMP(ADC_TypeDef *ADCx)
-{
-  WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOSMP);
-}
-
-/**
-  * @brief  Clear flag ADC analog watchdog 1.
-  * @rmtoll ISR      AWD            LL_ADC_ClearFlag_AWD1
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_ClearFlag_AWD1(ADC_TypeDef *ADCx)
-{
-  WRITE_REG(ADCx->ISR, LL_ADC_FLAG_AWD1);
-}
-
-/**
-  * @brief  Clear flag ADC end of calibration.
-  * @rmtoll ISR      EOCAL          LL_ADC_ClearFlag_EOCAL
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_ClearFlag_EOCAL(ADC_TypeDef *ADCx)
-{
-  WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOCAL);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup ADC_LL_EF_IT_Management ADC IT management
-  * @{
-  */
-
-/**
-  * @brief  Enable ADC ready.
-  * @rmtoll IER      ADRDYIE        LL_ADC_EnableIT_ADRDY
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_EnableIT_ADRDY(ADC_TypeDef *ADCx)
-{
-  SET_BIT(ADCx->IER, LL_ADC_IT_ADRDY);
-}
-
-/**
-  * @brief  Enable interruption ADC group regular end of unitary conversion.
-  * @rmtoll IER      EOCIE          LL_ADC_EnableIT_EOC
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_EnableIT_EOC(ADC_TypeDef *ADCx)
-{
-  SET_BIT(ADCx->IER, LL_ADC_IT_EOC);
-}
-
-/**
-  * @brief  Enable interruption ADC group regular end of sequence conversions.
-  * @rmtoll IER      EOSEQIE        LL_ADC_EnableIT_EOS
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_EnableIT_EOS(ADC_TypeDef *ADCx)
-{
-  SET_BIT(ADCx->IER, LL_ADC_IT_EOS);
-}
-
-/**
-  * @brief  Enable ADC group regular interruption overrun.
-  * @rmtoll IER      OVRIE          LL_ADC_EnableIT_OVR
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_EnableIT_OVR(ADC_TypeDef *ADCx)
-{
-  SET_BIT(ADCx->IER, LL_ADC_IT_OVR);
-}
-
-/**
-  * @brief  Enable interruption ADC group regular end of sampling.
-  * @rmtoll IER      EOSMPIE        LL_ADC_EnableIT_EOSMP
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_EnableIT_EOSMP(ADC_TypeDef *ADCx)
-{
-  SET_BIT(ADCx->IER, LL_ADC_IT_EOSMP);
-}
-
-/**
-  * @brief  Enable interruption ADC analog watchdog 1.
-  * @rmtoll IER      AWDIE          LL_ADC_EnableIT_AWD1
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_EnableIT_AWD1(ADC_TypeDef *ADCx)
-{
-  SET_BIT(ADCx->IER, LL_ADC_IT_AWD1);
-}
-
-/**
-  * @brief  Enable interruption ADC end of calibration.
-  * @rmtoll IER      EOCALIE        LL_ADC_EnableIT_EOCAL
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_EnableIT_EOCAL(ADC_TypeDef *ADCx)
-{
-  SET_BIT(ADCx->IER, LL_ADC_IT_EOCAL);
-}
-
-/**
-  * @brief  Disable interruption ADC ready.
-  * @rmtoll IER      ADRDYIE        LL_ADC_DisableIT_ADRDY
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_DisableIT_ADRDY(ADC_TypeDef *ADCx)
-{
-  CLEAR_BIT(ADCx->IER, LL_ADC_IT_ADRDY);
-}
-
-/**
-  * @brief  Disable interruption ADC group regular end of unitary conversion.
-  * @rmtoll IER      EOCIE          LL_ADC_DisableIT_EOC
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_DisableIT_EOC(ADC_TypeDef *ADCx)
-{
-  CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOC);
-}
-
-/**
-  * @brief  Disable interruption ADC group regular end of sequence conversions.
-  * @rmtoll IER      EOSEQIE        LL_ADC_DisableIT_EOS
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_DisableIT_EOS(ADC_TypeDef *ADCx)
-{
-  CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOS);
-}
-
-/**
-  * @brief  Disable interruption ADC group regular overrun.
-  * @rmtoll IER      OVRIE          LL_ADC_DisableIT_OVR
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_DisableIT_OVR(ADC_TypeDef *ADCx)
-{
-  CLEAR_BIT(ADCx->IER, LL_ADC_IT_OVR);
-}
-
-/**
-  * @brief  Disable interruption ADC group regular end of sampling.
-  * @rmtoll IER      EOSMPIE        LL_ADC_DisableIT_EOSMP
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_DisableIT_EOSMP(ADC_TypeDef *ADCx)
-{
-  CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOSMP);
-}
-
-/**
-  * @brief  Disable interruption ADC analog watchdog 1.
-  * @rmtoll IER      AWDIE          LL_ADC_DisableIT_AWD1
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_DisableIT_AWD1(ADC_TypeDef *ADCx)
-{
-  CLEAR_BIT(ADCx->IER, LL_ADC_IT_AWD1);
-}
-
-/**
-  * @brief  Disable interruption ADC end of calibration.
-  * @rmtoll IER      EOCALIE        LL_ADC_DisableIT_EOCAL
-  * @param  ADCx ADC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_ADC_DisableIT_EOCAL(ADC_TypeDef *ADCx)
-{
-  CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOCAL);
-}
-
-/**
-  * @brief  Get state of interruption ADC ready
-  *         (0: interrupt disabled, 1: interrupt enabled).
-  * @rmtoll IER      ADRDYIE        LL_ADC_IsEnabledIT_ADRDY
-  * @param  ADCx ADC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_ADRDY(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->IER, LL_ADC_IT_ADRDY) == (LL_ADC_IT_ADRDY));
-}
-
-/**
-  * @brief  Get state of interruption ADC group regular end of unitary conversion
-  *         (0: interrupt disabled, 1: interrupt enabled).
-  * @rmtoll IER      EOCIE          LL_ADC_IsEnabledIT_EOC
-  * @param  ADCx ADC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOC(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->IER, LL_ADC_IT_EOC) == (LL_ADC_IT_EOC));
-}
-
-/**
-  * @brief  Get state of interruption ADC group regular end of sequence conversions
-  *         (0: interrupt disabled, 1: interrupt enabled).
-  * @rmtoll IER      EOSEQIE        LL_ADC_IsEnabledIT_EOS
-  * @param  ADCx ADC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOS(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->IER, LL_ADC_IT_EOS) == (LL_ADC_IT_EOS));
-}
-
-/**
-  * @brief  Get state of interruption ADC group regular overrun
-  *         (0: interrupt disabled, 1: interrupt enabled).
-  * @rmtoll IER      OVRIE          LL_ADC_IsEnabledIT_OVR
-  * @param  ADCx ADC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_OVR(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->IER, LL_ADC_IT_OVR) == (LL_ADC_IT_OVR));
-}
-
-/**
-  * @brief  Get state of interruption ADC group regular end of sampling
-  *         (0: interrupt disabled, 1: interrupt enabled).
-  * @rmtoll IER      EOSMPIE        LL_ADC_IsEnabledIT_EOSMP
-  * @param  ADCx ADC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOSMP(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->IER, LL_ADC_IT_EOSMP) == (LL_ADC_IT_EOSMP));
-}
-
-/**
-  * @brief  Get state of interruption ADC analog watchdog 1
-  *         (0: interrupt disabled, 1: interrupt enabled).
-  * @rmtoll IER      AWDIE          LL_ADC_IsEnabledIT_AWD1
-  * @param  ADCx ADC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_AWD1(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->IER, LL_ADC_IT_AWD1) == (LL_ADC_IT_AWD1));
-}
-
-/**
-  * @brief  Get state of interruption ADC end of calibration
-  *         (0: interrupt disabled, 1: interrupt enabled).
-  * @rmtoll IER      EOCALIE        LL_ADC_IsEnabledIT_EOCAL
-  * @param  ADCx ADC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOCAL(ADC_TypeDef *ADCx)
-{
-  return (READ_BIT(ADCx->IER, LL_ADC_IT_EOCAL) == (LL_ADC_IT_EOCAL));
-}
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup ADC_LL_EF_Init Initialization and de-initialization functions
-  * @{
-  */
-
-/* Initialization of some features of ADC common parameters and multimode */
-ErrorStatus LL_ADC_CommonDeInit(ADC_Common_TypeDef *ADCxy_COMMON);
-ErrorStatus LL_ADC_CommonInit(ADC_Common_TypeDef *ADCxy_COMMON, LL_ADC_CommonInitTypeDef *ADC_CommonInitStruct);
-void        LL_ADC_CommonStructInit(LL_ADC_CommonInitTypeDef *ADC_CommonInitStruct);
-
-/* De-initialization of ADC instance */
-ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx);
-
-/* Initialization of some features of ADC instance */
-ErrorStatus LL_ADC_Init(ADC_TypeDef *ADCx, LL_ADC_InitTypeDef *ADC_InitStruct);
-void        LL_ADC_StructInit(LL_ADC_InitTypeDef *ADC_InitStruct);
-
-/* Initialization of some features of ADC instance and ADC group regular */
-ErrorStatus LL_ADC_REG_Init(ADC_TypeDef *ADCx, LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct);
-void        LL_ADC_REG_StructInit(LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct);
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* ADC1 */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_ADC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h
deleted file mode 100755
index dada43c3..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h
+++ /dev/null
@@ -1,1187 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_bus.h
-  * @author  MCD Application Team
-  * @brief   Header file of BUS LL module.
-
-  @verbatim                
-                      ##### RCC Limitations #####
-  ==============================================================================
-    [..]  
-      A delay between an RCC peripheral clock enable and the effective peripheral 
-      enabling should be taken into account in order to manage the peripheral read/write 
-      from/to registers.
-      (+) This delay depends on the peripheral mapping.
-        (++) AHB & APB peripherals, 1 dummy read is necessary
-
-    [..]  
-      Workarounds:
-      (#) For AHB & APB peripherals, a dummy read to the peripheral register has been
-          inserted in each LL_{BUS}_GRP{x}_EnableClock() function.
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_BUS_H
-#define __STM32L0xx_LL_BUS_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined(RCC)
-
-/** @defgroup BUS_LL BUS
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-
-/* Private macros ------------------------------------------------------------*/
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup BUS_LL_Exported_Constants BUS Exported Constants
-  * @{
-  */
-
-/** @defgroup BUS_LL_EC_AHB1_GRP1_PERIPH  AHB1 GRP1 PERIPH
-  * @{
-  */
-#define LL_AHB1_GRP1_PERIPH_ALL            (uint32_t)0xFFFFFFFFU
-#define LL_AHB1_GRP1_PERIPH_DMA1           RCC_AHBENR_DMA1EN      /*!< DMA1 clock enable */
-#define LL_AHB1_GRP1_PERIPH_MIF            RCC_AHBENR_MIFEN       /*!< MIF clock enable */
-#define LL_AHB1_GRP1_PERIPH_SRAM           RCC_AHBSMENR_SRAMSMEN  /*!< Sleep Mode SRAM clock enable */
-#define LL_AHB1_GRP1_PERIPH_CRC            RCC_AHBENR_CRCEN       /*!< CRC clock enable */
-#if defined(TSC)
-#define LL_AHB1_GRP1_PERIPH_TSC            RCC_AHBENR_TSCEN       /*!< TSC clock enable */
-#endif /*TSC*/
-#if defined(RNG)
-#define LL_AHB1_GRP1_PERIPH_RNG            RCC_AHBENR_RNGEN       /*!< RNG clock enable */
-#endif /*RNG*/
-#if defined(AES)
-#define LL_AHB1_GRP1_PERIPH_CRYP           RCC_AHBENR_CRYPEN      /*!< CRYP clock enable */
-#endif /*AES*/
-/**
-  * @}
-  */
-
-
-/** @defgroup BUS_LL_EC_APB1_GRP1_PERIPH  APB1 GRP1 PERIPH
-  * @{
-  */
-#define LL_APB1_GRP1_PERIPH_ALL            (uint32_t)0xFFFFFFFFU
-#define LL_APB1_GRP1_PERIPH_TIM2           RCC_APB1ENR_TIM2EN     /*!< TIM2 clock enable */
-#if defined(TIM3)
-#define LL_APB1_GRP1_PERIPH_TIM3           RCC_APB1ENR_TIM3EN     /*!< TIM3 clock enable */
-#endif
-#if defined(TIM6)
-#define LL_APB1_GRP1_PERIPH_TIM6           RCC_APB1ENR_TIM6EN     /*!< TIM6 clock enable */
-#endif
-#if defined(TIM7)
-#define LL_APB1_GRP1_PERIPH_TIM7           RCC_APB1ENR_TIM7EN     /*!< TIM7 clock enable */
-#endif
-#if defined(LCD)
-#define LL_APB1_GRP1_PERIPH_LCD            RCC_APB1ENR_LCDEN      /*!< LCD clock enable */
-#endif /*LCD*/
-#define LL_APB1_GRP1_PERIPH_WWDG           RCC_APB1ENR_WWDGEN     /*!< WWDG clock enable */
-#if defined(SPI2)
-#define LL_APB1_GRP1_PERIPH_SPI2           RCC_APB1ENR_SPI2EN     /*!< SPI2 clock enable */
-#endif
-#define LL_APB1_GRP1_PERIPH_USART2         RCC_APB1ENR_USART2EN   /*!< USART2 clock enable */
-#define LL_APB1_GRP1_PERIPH_LPUART1        RCC_APB1ENR_LPUART1EN  /*!< LPUART1 clock enable */
-#if defined(USART4)
-#define LL_APB1_GRP1_PERIPH_USART4         RCC_APB1ENR_USART4EN   /*!< USART4 clock enable */
-#endif
-#if defined(USART5)
-#define LL_APB1_GRP1_PERIPH_USART5         RCC_APB1ENR_USART5EN   /*!< USART5 clock enable */
-#endif
-#define LL_APB1_GRP1_PERIPH_I2C1           RCC_APB1ENR_I2C1EN     /*!< I2C1 clock enable */
-#if defined(I2C2)
-#define LL_APB1_GRP1_PERIPH_I2C2           RCC_APB1ENR_I2C2EN     /*!< I2C2 clock enable */
-#endif
-#if defined(USB)
-#define LL_APB1_GRP1_PERIPH_USB            RCC_APB1ENR_USBEN      /*!< USB clock enable */
-#endif /*USB*/
-#if defined(CRS)
-#define LL_APB1_GRP1_PERIPH_CRS            RCC_APB1ENR_CRSEN      /*!< CRS clock enable */
-#endif /*CRS*/
-#define LL_APB1_GRP1_PERIPH_PWR            RCC_APB1ENR_PWREN      /*!< PWR clock enable */
-#if defined(DAC)
-#define LL_APB1_GRP1_PERIPH_DAC1           RCC_APB1ENR_DACEN      /*!< DAC clock enable */
-#endif
-#if defined(I2C3)
-#define LL_APB1_GRP1_PERIPH_I2C3           RCC_APB1ENR_I2C3EN     /*!< I2C3 clock enable */
-#endif
-#define LL_APB1_GRP1_PERIPH_LPTIM1         RCC_APB1ENR_LPTIM1EN   /*!< LPTIM1 clock enable */
-/**
-  * @}
-  */
-
-
-
-
-/** @defgroup BUS_LL_EC_APB2_GRP1_PERIPH  APB2 GRP1 PERIPH
-  * @{
-  */
-#define LL_APB2_GRP1_PERIPH_ALL            (uint32_t)0xFFFFFFFFU
-#define LL_APB2_GRP1_PERIPH_SYSCFG         RCC_APB2ENR_SYSCFGEN  /*!< SYSCFG clock enable */
-#define LL_APB2_GRP1_PERIPH_TIM21          RCC_APB2ENR_TIM21EN   /*!< TIM21 clock enable */
-#if defined(TIM22)
-#define LL_APB2_GRP1_PERIPH_TIM22          RCC_APB2ENR_TIM22EN   /*!< TIM22 clock enable */
-#endif
-#define LL_APB2_GRP1_PERIPH_FW             RCC_APB2ENR_FWEN      /*!< FireWall clock enable */
-#define LL_APB2_GRP1_PERIPH_ADC1           RCC_APB2ENR_ADC1EN    /*!< ADC1 clock enable */
-#define LL_APB2_GRP1_PERIPH_SPI1           RCC_APB2ENR_SPI1EN    /*!< SPI1 clock enable */
-#if defined(USART1)
-#define LL_APB2_GRP1_PERIPH_USART1         RCC_APB2ENR_USART1EN  /*!< USART1 clock enable */
-#endif
-#define LL_APB2_GRP1_PERIPH_DBGMCU         RCC_APB2ENR_DBGMCUEN  /*!< DBGMCU clock enable */
-
-/**
-  * @}
-  */
-
-
-
-/** @defgroup BUS_LL_EC_IOP_GRP1_PERIPH  IOP GRP1 PERIPH
-  * @{
-  */
-#define LL_IOP_GRP1_PERIPH_ALL             (uint32_t)0xFFFFFFFFU
-#define LL_IOP_GRP1_PERIPH_GPIOA           RCC_IOPENR_GPIOAEN    /*!< GPIO port A control */
-#define LL_IOP_GRP1_PERIPH_GPIOB           RCC_IOPENR_GPIOBEN    /*!< GPIO port B control */
-#define LL_IOP_GRP1_PERIPH_GPIOC           RCC_IOPENR_GPIOCEN    /*!< GPIO port C control */
-#if defined(GPIOD)
-#define LL_IOP_GRP1_PERIPH_GPIOD           RCC_IOPENR_GPIODEN    /*!< GPIO port D control */
-#endif /*GPIOD*/
-#if defined(GPIOE)
-#define LL_IOP_GRP1_PERIPH_GPIOE           RCC_IOPENR_GPIOEEN    /*!< GPIO port H control */
-#endif /*GPIOE*/
-#if defined(GPIOH)
-#define LL_IOP_GRP1_PERIPH_GPIOH           RCC_IOPENR_GPIOHEN    /*!< GPIO port H control */
-#endif /*GPIOH*/
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup BUS_LL_Exported_Functions BUS Exported Functions
-  * @{
-  */
-
-/** @defgroup BUS_LL_EF_AHB1 AHB1
-  * @{
-  */
-
-/**
-  * @brief  Enable AHB1 peripherals clock.
-  * @rmtoll AHBENR      DMAEN        LL_AHB1_GRP1_EnableClock\n
-  *         AHBENR      MIFEN        LL_AHB1_GRP1_EnableClock\n
-  *         AHBENR      CRCEN        LL_AHB1_GRP1_EnableClock\n
-  *         AHBENR      TSCEN        LL_AHB1_GRP1_EnableClock\n
-  *         AHBENR      RNGEN        LL_AHB1_GRP1_EnableClock\n
-  *         AHBENR      CRYPEN       LL_AHB1_GRP1_EnableClock
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs)
-{
-  __IO uint32_t tmpreg;
-  SET_BIT(RCC->AHBENR, Periphs);
-  /* Delay after an RCC peripheral clock enabling */
-  tmpreg = READ_BIT(RCC->AHBENR, Periphs);
-  (void)tmpreg;
-}
-
-/**
-  * @brief  Check if AHB1 peripheral clock is enabled or not
-  * @rmtoll AHBENR      DMAEN        LL_AHB1_GRP1_IsEnabledClock\n
-  *         AHBENR      MIFEN        LL_AHB1_GRP1_IsEnabledClock\n
-  *         AHBENR      CRCEN        LL_AHB1_GRP1_IsEnabledClock\n
-  *         AHBENR      TSCEN        LL_AHB1_GRP1_IsEnabledClock\n
-  *         AHBENR      RNGEN        LL_AHB1_GRP1_IsEnabledClock\n
-  *         AHBENR      CRYPEN       LL_AHB1_GRP1_IsEnabledClock
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval State of Periphs (1 or 0).
-*/
-__STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs)
-{
-  return (READ_BIT(RCC->AHBENR, Periphs) == Periphs);
-}
-
-/**
-  * @brief  Disable AHB1 peripherals clock.
-  * @rmtoll AHBENR      DMAEN        LL_AHB1_GRP1_DisableClock\n
-  *         AHBENR      MIFEN        LL_AHB1_GRP1_DisableClock\n
-  *         AHBENR      CRCEN        LL_AHB1_GRP1_DisableClock\n
-  *         AHBENR      TSCEN        LL_AHB1_GRP1_DisableClock\n
-  *         AHBENR      RNGEN        LL_AHB1_GRP1_DisableClock\n
-  *         AHBENR      CRYPEN       LL_AHB1_GRP1_DisableClock
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs)
-{
-  CLEAR_BIT(RCC->AHBENR, Periphs);
-}
-
-/**
-  * @brief  Force AHB1 peripherals reset.
-  * @rmtoll AHBRSTR      DMARST        LL_AHB1_GRP1_ForceReset\n
-  *         AHBRSTR      MIFRST        LL_AHB1_GRP1_ForceReset\n
-  *         AHBRSTR      CRCRST        LL_AHB1_GRP1_ForceReset\n
-  *         AHBRSTR      TSCRST        LL_AHB1_GRP1_ForceReset\n
-  *         AHBRSTR      RNGRST        LL_AHB1_GRP1_ForceReset\n
-  *         AHBRSTR      CRYPRST       LL_AHB1_GRP1_ForceReset
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_ALL
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs)
-{
-  SET_BIT(RCC->AHBRSTR, Periphs);
-}
-
-/**
-  * @brief  Release AHB1 peripherals reset.
-  * @rmtoll AHBRSTR      DMARST        LL_AHB1_GRP1_ReleaseReset\n
-  *         AHBRSTR      MIFRST        LL_AHB1_GRP1_ReleaseReset\n
-  *         AHBRSTR      CRCRST        LL_AHB1_GRP1_ReleaseReset\n
-  *         AHBRSTR      TSCRST        LL_AHB1_GRP1_ReleaseReset\n
-  *         AHBRSTR      RNGRST        LL_AHB1_GRP1_ReleaseReset\n
-  *         AHBRSTR      CRYPRST       LL_AHB1_GRP1_ReleaseReset
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_ALL
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs)
-{
-  CLEAR_BIT(RCC->AHBRSTR, Periphs);
-}
-
-/**
-  * @brief  Enable AHB1 peripherals clock during Low Power (Sleep) mode.
-  * @rmtoll AHBSMENR     DMASMEN       LL_AHB1_GRP1_EnableClockSleep\n
-  *         AHBSMENR     MIFSMEN       LL_AHB1_GRP1_EnableClockSleep\n
-  *         AHBSMENR     SRAMSMEN      LL_AHB1_GRP1_EnableClockSleep\n
-  *         AHBSMENR     CRCSMEN       LL_AHB1_GRP1_EnableClockSleep\n
-  *         AHBSMENR     TSCSMEN       LL_AHB1_GRP1_EnableClockSleep\n
-  *         AHBSMENR     RNGSMEN       LL_AHB1_GRP1_EnableClockSleep\n
-  *         AHBSMENR     CRYPSMEN      LL_AHB1_GRP1_EnableClockSleep
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_SRAM
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_AHB1_GRP1_EnableClockSleep(uint32_t Periphs)
-{
-  __IO uint32_t tmpreg;
-  SET_BIT(RCC->AHBSMENR, Periphs);
-  /* Delay after an RCC peripheral clock enabling */
-  tmpreg = READ_BIT(RCC->AHBSMENR, Periphs);
-  (void)tmpreg;
-}
-
-/**
-  * @brief  Disable AHB1 peripherals clock during Low Power (Sleep) mode.
-  * @rmtoll AHBSMENR     DMASMEN       LL_AHB1_GRP1_DisableClockSleep\n
-  *         AHBSMENR     MIFSMEN       LL_AHB1_GRP1_DisableClockSleep\n
-  *         AHBSMENR     SRAMSMEN      LL_AHB1_GRP1_DisableClockSleep\n
-  *         AHBSMENR     CRCSMEN       LL_AHB1_GRP1_DisableClockSleep\n
-  *         AHBSMENR     TSCSMEN       LL_AHB1_GRP1_DisableClockSleep\n
-  *         AHBSMENR     RNGSMEN       LL_AHB1_GRP1_DisableClockSleep\n
-  *         AHBSMENR     CRYPSMEN      LL_AHB1_GRP1_DisableClockSleep
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_SRAM
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
-  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_AHB1_GRP1_DisableClockSleep(uint32_t Periphs)
-{
-  CLEAR_BIT(RCC->AHBSMENR, Periphs);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup BUS_LL_EF_APB1 APB1
-  * @{
-  */
-
-/**
-  * @brief  Enable APB1 peripherals clock.
-  * @rmtoll APB1ENR     TIM2EN        LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     TIM3EN        LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     TIM6EN        LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     TIM7EN        LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     LCDEN         LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     WWDGEN        LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     SPI2EN        LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     USART2EN      LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     LPUART1EN     LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     USART4EN      LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     USART5EN      LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     I2C1EN        LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     I2C2EN        LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     USBEN         LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     CRSEN         LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     PWREN         LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     DACEN         LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     I2C3EN        LL_APB1_GRP1_EnableClock\n
-  *         APB1ENR     LPTIM1EN      LL_APB1_GRP1_EnableClock
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
-  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
-  *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs)
-{
-  __IO uint32_t tmpreg;
-  SET_BIT(RCC->APB1ENR, Periphs);
-  /* Delay after an RCC peripheral clock enabling */
-  tmpreg = READ_BIT(RCC->APB1ENR, Periphs);
-  (void)tmpreg;
-}
-
-/**
-  * @brief  Check if APB1 peripheral clock is enabled or not
-  * @rmtoll APB1ENR     TIM2EN        LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     TIM3EN        LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     TIM6EN        LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     TIM7EN        LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     LCDEN         LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     WWDGEN        LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     SPI2EN        LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     USART2EN      LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     LPUART1EN     LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     USART4EN      LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     USART5EN      LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     I2C1EN        LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     I2C2EN        LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     USBEN         LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     CRSEN         LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     PWREN         LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     DACEN         LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     I2C3EN        LL_APB1_GRP1_IsEnabledClock\n
-  *         APB1ENR     LPTIM1EN      LL_APB1_GRP1_IsEnabledClock
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
-  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
-  *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
-  *
-  *         (*) value not defined in all devices.
-  * @retval State of Periphs (1 or 0).
-*/
-__STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs)
-{
-  return (READ_BIT(RCC->APB1ENR, Periphs) == Periphs);
-}
-
-/**
-  * @brief  Disable APB1 peripherals clock.
-  * @rmtoll APB1ENR     TIM2EN        LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     TIM3EN        LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     TIM6EN        LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     TIM7EN        LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     LCDEN         LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     WWDGEN        LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     SPI2EN        LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     USART2EN      LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     LPUART1EN     LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     USART4EN      LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     USART5EN      LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     I2C1EN        LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     I2C2EN        LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     USBEN         LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     CRSEN         LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     PWREN         LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     DACEN         LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     I2C3EN        LL_APB1_GRP1_DisableClock\n
-  *         APB1ENR     LPTIM1EN      LL_APB1_GRP1_DisableClock
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
-  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
-  *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs)
-{
-  CLEAR_BIT(RCC->APB1ENR, Periphs);
-}
-
-/**
-  * @brief  Force APB1 peripherals reset.
-  * @rmtoll APB1RSTR     TIM2RST        LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     TIM3RST        LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     TIM6RST        LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     TIM7RST        LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     LCDRST         LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     WWDGRST        LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     SPI2RST        LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     USART2RST      LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     LPUART1RST     LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     USART4RST      LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     USART5RST      LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     I2C1RST        LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     I2C2RST        LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     USBRST         LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     CRSRST         LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     PWRRST         LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     DACRST         LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     I2C3RST        LL_APB1_GRP1_ForceReset\n
-  *         APB1RSTR     LPTIM1RST      LL_APB1_GRP1_ForceReset
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_APB1_GRP1_PERIPH_ALL
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
-  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
-  *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs)
-{
-  SET_BIT(RCC->APB1RSTR, Periphs);
-}
-
-/**
-  * @brief  Release APB1 peripherals reset.
-  * @rmtoll APB1RSTR     TIM2RST        LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     TIM3RST        LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     TIM6RST        LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     TIM7RST        LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     LCDRST         LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     WWDGRST        LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     SPI2RST        LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     USART2RST      LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     LPUART1RST     LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     USART4RST      LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     USART5RST      LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     I2C1RST        LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     I2C2RST        LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     USBRST         LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     CRSRST         LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     PWRRST         LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     DACRST         LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     I2C3RST        LL_APB1_GRP1_ReleaseReset\n
-  *         APB1RSTR     LPTIM1RST      LL_APB1_GRP1_ReleaseReset
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_APB1_GRP1_PERIPH_ALL
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
-  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
-  *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs)
-{
-  CLEAR_BIT(RCC->APB1RSTR, Periphs);
-}
-
-/**
-  * @brief  Enable APB1 peripherals clock during Low Power (Sleep) mode.
-  * @rmtoll APB1SMENR    TIM2SMEN      LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    TIM3SMEN      LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    TIM6SMEN      LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    TIM7SMEN      LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    LCDSMEN       LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    WWDGSMEN      LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    SPI2SMEN      LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    USART2SMEN    LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    LPUART1SMEN   LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    USART4SMEN    LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    USART5SMEN    LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    I2C1SMEN      LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    I2C2SMEN      LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    USBSMEN       LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    CRSSMEN       LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    PWRSMEN       LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    DACSMEN       LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    I2C3SMEN      LL_APB1_GRP1_EnableClockSleep\n
-  *         APB1SMENR    LPTIM1SMEN    LL_APB1_GRP1_EnableClockSleep
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
-  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
-  *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_APB1_GRP1_EnableClockSleep(uint32_t Periphs)
-{
-  __IO uint32_t tmpreg;
-  SET_BIT(RCC->APB1SMENR, Periphs);
-  /* Delay after an RCC peripheral clock enabling */
-  tmpreg = READ_BIT(RCC->APB1SMENR, Periphs);
-  (void)tmpreg;
-}
-
-/**
-  * @brief  Disable APB1 peripherals clock during Low Power (Sleep) mode.
-  * @rmtoll APB1SMENR    TIM2SMEN      LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    TIM3SMEN      LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    TIM6SMEN      LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    TIM7SMEN      LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    LCDSMEN       LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    WWDGSMEN      LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    SPI2SMEN      LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    USART2SMEN    LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    LPUART1SMEN   LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    USART4SMEN    LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    USART5SMEN    LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    I2C1SMEN      LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    I2C2SMEN      LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    USBSMEN       LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    CRSSMEN       LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    PWRSMEN       LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    DACSMEN       LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    I2C3SMEN      LL_APB1_GRP1_DisableClockSleep\n
-  *         APB1SMENR    LPTIM1SMEN    LL_APB1_GRP1_DisableClockSleep
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
-  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
-  *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
-  *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_APB1_GRP1_DisableClockSleep(uint32_t Periphs)
-{
-  CLEAR_BIT(RCC->APB1SMENR, Periphs);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup BUS_LL_EF_APB2 APB2
-  * @{
-  */
-
-/**
-  * @brief  Enable APB2 peripherals clock.
-  * @rmtoll APB2ENR      SYSCFGEN      LL_APB2_GRP1_EnableClock\n
-  *         APB2ENR      TIM21EN       LL_APB2_GRP1_EnableClock\n
-  *         APB2ENR      TIM22EN       LL_APB2_GRP1_EnableClock\n
-  *         APB2ENR      FWEN          LL_APB2_GRP1_EnableClock\n
-  *         APB2ENR      ADCEN         LL_APB2_GRP1_EnableClock\n
-  *         APB2ENR      SPI1EN        LL_APB2_GRP1_EnableClock\n
-  *         APB2ENR      USART1EN      LL_APB2_GRP1_EnableClock\n
-  *         APB2ENR      DBGEN         LL_APB2_GRP1_EnableClock
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
-  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
-  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
-  *         @arg @ref LL_APB2_GRP1_PERIPH_FW
-  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
-  *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
-  *         @arg @ref LL_APB2_GRP1_PERIPH_USART1 (*)
-  *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs)
-{
-  __IO uint32_t tmpreg;
-  SET_BIT(RCC->APB2ENR, Periphs);
-  /* Delay after an RCC peripheral clock enabling */
-  tmpreg = READ_BIT(RCC->APB2ENR, Periphs);
-  (void)tmpreg;
-}
-
-/**
-  * @brief  Check if APB2 peripheral clock is enabled or not
-  * @rmtoll APB2ENR      SYSCFGEN      LL_APB2_GRP1_IsEnabledClock\n
-  *         APB2ENR      TIM21EN       LL_APB2_GRP1_IsEnabledClock\n
-  *         APB2ENR      TIM22EN       LL_APB2_GRP1_IsEnabledClock\n
-  *         APB2ENR      FWEN          LL_APB2_GRP1_IsEnabledClock\n
-  *         APB2ENR      ADCEN         LL_APB2_GRP1_IsEnabledClock\n
-  *         APB2ENR      SPI1EN        LL_APB2_GRP1_IsEnabledClock\n
-  *         APB2ENR      USART1EN      LL_APB2_GRP1_IsEnabledClock\n
-  *         APB2ENR      DBGEN         LL_APB2_GRP1_IsEnabledClock
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
-  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
-  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
-  *         @arg @ref LL_APB2_GRP1_PERIPH_FW
-  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
-  *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
-  *         @arg @ref LL_APB2_GRP1_PERIPH_USART1 (*)
-  *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
-  *
-  *         (*) value not defined in all devices.
-  * @retval State of Periphs (1 or 0).
-*/
-__STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs)
-{
-  return (READ_BIT(RCC->APB2ENR, Periphs) == Periphs);
-}
-
-/**
-  * @brief  Disable APB2 peripherals clock.
-  * @rmtoll APB2ENR      SYSCFGEN      LL_APB2_GRP1_DisableClock\n
-  *         APB2ENR      TIM21EN       LL_APB2_GRP1_DisableClock\n
-  *         APB2ENR      TIM22EN       LL_APB2_GRP1_DisableClock\n
-  *         APB2ENR      FWEN          LL_APB2_GRP1_DisableClock\n
-  *         APB2ENR      ADCEN         LL_APB2_GRP1_DisableClock\n
-  *         APB2ENR      SPI1EN        LL_APB2_GRP1_DisableClock\n
-  *         APB2ENR      USART1EN      LL_APB2_GRP1_DisableClock\n
-  *         APB2ENR      DBGEN         LL_APB2_GRP1_DisableClock
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
-  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
-  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
-  *         @arg @ref LL_APB2_GRP1_PERIPH_FW
-  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
-  *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
-  *         @arg @ref LL_APB2_GRP1_PERIPH_USART1  (*)
-  *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs)
-{
-  CLEAR_BIT(RCC->APB2ENR, Periphs);
-}
-
-/**
-  * @brief  Force APB2 peripherals reset.
-  * @rmtoll APB2RSTR     SYSCFGRST     LL_APB2_GRP1_ForceReset\n
-  *         APB2RSTR     TIM21RST      LL_APB2_GRP1_ForceReset\n
-  *         APB2RSTR     TIM22RST      LL_APB2_GRP1_ForceReset\n
-  *         APB2RSTR     ADCRST        LL_APB2_GRP1_ForceReset\n
-  *         APB2RSTR     SPI1RST       LL_APB2_GRP1_ForceReset\n
-  *         APB2RSTR     USART1RST     LL_APB2_GRP1_ForceReset\n
-  *         APB2RSTR     DBGRST        LL_APB2_GRP1_ForceReset
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_APB2_GRP1_PERIPH_ALL
-  *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
-  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
-  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
-  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
-  *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
-  *         @arg @ref LL_APB2_GRP1_PERIPH_USART1 (*)
-  *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs)
-{
-  SET_BIT(RCC->APB2RSTR, Periphs);
-}
-
-/**
-  * @brief  Release APB2 peripherals reset.
-  * @rmtoll APB2RSTR     SYSCFGRST     LL_APB2_GRP1_ReleaseReset\n
-  *         APB2RSTR     TIM21RST      LL_APB2_GRP1_ReleaseReset\n
-  *         APB2RSTR     TIM22RST      LL_APB2_GRP1_ReleaseReset\n
-  *         APB2RSTR     ADCRST        LL_APB2_GRP1_ReleaseReset\n
-  *         APB2RSTR     SPI1RST       LL_APB2_GRP1_ReleaseReset\n
-  *         APB2RSTR     USART1RST     LL_APB2_GRP1_ReleaseReset\n
-  *         APB2RSTR     DBGRST        LL_APB2_GRP1_ReleaseReset
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_APB2_GRP1_PERIPH_ALL
-  *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
-  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
-  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
-  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
-  *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
-  *         @arg @ref LL_APB2_GRP1_PERIPH_USART1  (*)
-  *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs)
-{
-  CLEAR_BIT(RCC->APB2RSTR, Periphs);
-}
-
-/**
-  * @brief  Enable APB2 peripherals clock during Low Power (Sleep) mode.
-  * @rmtoll APB2SMENR    SYSCFGSMEN    LL_APB2_GRP1_EnableClockSleep\n
-  *         APB2SMENR    TIM21SMEN     LL_APB2_GRP1_EnableClockSleep\n
-  *         APB2SMENR    TIM22SMEN     LL_APB2_GRP1_EnableClockSleep\n
-  *         APB2SMENR    ADCSMEN       LL_APB2_GRP1_EnableClockSleep\n
-  *         APB2SMENR    SPI1SMEN      LL_APB2_GRP1_EnableClockSleep\n
-  *         APB2SMENR    USART1SMEN    LL_APB2_GRP1_EnableClockSleep\n
-  *         APB2SMENR    DBGSMEN       LL_APB2_GRP1_EnableClockSleep
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
-  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
-  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
-  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
-  *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
-  *         @arg @ref LL_APB2_GRP1_PERIPH_USART1  (*)
-  *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_APB2_GRP1_EnableClockSleep(uint32_t Periphs)
-{
-  __IO uint32_t tmpreg;
-  SET_BIT(RCC->APB2SMENR, Periphs);
-  /* Delay after an RCC peripheral clock enabling */
-  tmpreg = READ_BIT(RCC->APB2SMENR, Periphs);
-  (void)tmpreg;
-}
-
-/**
-  * @brief  Disable APB2 peripherals clock during Low Power (Sleep) mode.
-  * @rmtoll APB2SMENR    SYSCFGSMEN    LL_APB2_GRP1_DisableClockSleep\n
-  *         APB2SMENR    TIM21SMEN     LL_APB2_GRP1_DisableClockSleep\n
-  *         APB2SMENR    TIM22SMEN     LL_APB2_GRP1_DisableClockSleep\n
-  *         APB2SMENR    ADCSMEN       LL_APB2_GRP1_DisableClockSleep\n
-  *         APB2SMENR    SPI1SMEN      LL_APB2_GRP1_DisableClockSleep\n
-  *         APB2SMENR    USART1SMEN    LL_APB2_GRP1_DisableClockSleep\n
-  *         APB2SMENR    DBGSMEN       LL_APB2_GRP1_DisableClockSleep
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
-  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
-  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
-  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
-  *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
-  *         @arg @ref LL_APB2_GRP1_PERIPH_USART1  (*)
-  *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_APB2_GRP1_DisableClockSleep(uint32_t Periphs)
-{
-  CLEAR_BIT(RCC->APB2SMENR, Periphs);
-}
-
-/**
-  * @}
-  */
-/** @defgroup BUS_LL_EF_IOP IOP
-  * @{
-  */
-
-/**
-  * @brief  Enable IOP peripherals clock.
-  * @rmtoll IOPENR       GPIOAEN       LL_IOP_GRP1_EnableClock\n
-  *         IOPENR       GPIOBEN       LL_IOP_GRP1_EnableClock\n
-  *         IOPENR       GPIOCEN       LL_IOP_GRP1_EnableClock\n
-  *         IOPENR       GPIODEN       LL_IOP_GRP1_EnableClock\n
-  *         IOPENR       GPIOEEN       LL_IOP_GRP1_EnableClock\n
-  *         IOPENR       GPIOHEN       LL_IOP_GRP1_EnableClock
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOA
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOB
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOC
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOD (*)
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOE (*)
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOH (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_IOP_GRP1_EnableClock(uint32_t Periphs)
-{
-  __IO uint32_t tmpreg;
-  SET_BIT(RCC->IOPENR, Periphs);
-  /* Delay after an RCC peripheral clock enabling */
-  tmpreg = READ_BIT(RCC->IOPENR, Periphs);
-  (void)tmpreg;
-}
-
-/**
-  * @brief  Check if IOP peripheral clock is enabled or not
-  * @rmtoll IOPENR       GPIOAEN       LL_IOP_GRP1_IsEnabledClock\n
-  *         IOPENR       GPIOBEN       LL_IOP_GRP1_IsEnabledClock\n
-  *         IOPENR       GPIOCEN       LL_IOP_GRP1_IsEnabledClock\n
-  *         IOPENR       GPIODEN       LL_IOP_GRP1_IsEnabledClock\n
-  *         IOPENR       GPIOEEN       LL_IOP_GRP1_IsEnabledClock\n
-  *         IOPENR       GPIOHEN       LL_IOP_GRP1_IsEnabledClock
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOA
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOB
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOC
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOD (*)
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOE (*)
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOH (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval State of Periphs (1 or 0).
-*/
-__STATIC_INLINE uint32_t LL_IOP_GRP1_IsEnabledClock(uint32_t Periphs)
-{
-  return (READ_BIT(RCC->IOPENR, Periphs) == Periphs);
-}
-
-/**
-  * @brief  Disable IOP peripherals clock.
-  * @rmtoll IOPENR       GPIOAEN       LL_IOP_GRP1_DisableClock\n
-  *         IOPENR       GPIOBEN       LL_IOP_GRP1_DisableClock\n
-  *         IOPENR       GPIOCEN       LL_IOP_GRP1_DisableClock\n
-  *         IOPENR       GPIODEN       LL_IOP_GRP1_DisableClock\n
-  *         IOPENR       GPIOEEN       LL_IOP_GRP1_DisableClock\n
-  *         IOPENR       GPIOHEN       LL_IOP_GRP1_DisableClock
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOA
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOB
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOC
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOD (*)
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOE (*)
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOH (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_IOP_GRP1_DisableClock(uint32_t Periphs)
-{
-  CLEAR_BIT(RCC->IOPENR, Periphs);
-}
-
-/**
-  * @brief  Disable IOP peripherals clock.
-  * @rmtoll IOPRSTR      GPIOASMEN     LL_IOP_GRP1_ForceReset\n
-  *         IOPRSTR      GPIOBSMEN     LL_IOP_GRP1_ForceReset\n
-  *         IOPRSTR      GPIOCSMEN     LL_IOP_GRP1_ForceReset\n
-  *         IOPRSTR      GPIODSMEN     LL_IOP_GRP1_ForceReset\n
-  *         IOPRSTR      GPIOESMEN     LL_IOP_GRP1_ForceReset\n
-  *         IOPRSTR      GPIOHSMEN     LL_IOP_GRP1_ForceReset
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_IOP_GRP1_PERIPH_ALL
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOA
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOB
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOC
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOD (*)
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOE (*)
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOH (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_IOP_GRP1_ForceReset(uint32_t Periphs)
-{
-  SET_BIT(RCC->IOPRSTR, Periphs);
-}
-
-/**
-  * @brief  Release IOP peripherals reset.
-  * @rmtoll IOPRSTR      GPIOASMEN     LL_IOP_GRP1_ReleaseReset\n
-  *         IOPRSTR      GPIOBSMEN     LL_IOP_GRP1_ReleaseReset\n
-  *         IOPRSTR      GPIOCSMEN     LL_IOP_GRP1_ReleaseReset\n
-  *         IOPRSTR      GPIODSMEN     LL_IOP_GRP1_ReleaseReset\n
-  *         IOPRSTR      GPIOESMEN     LL_IOP_GRP1_ReleaseReset\n
-  *         IOPRSTR      GPIOHSMEN     LL_IOP_GRP1_ReleaseReset
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_IOP_GRP1_PERIPH_ALL
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOA
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOB
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOC
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOD (*)
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOE (*)
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOH (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_IOP_GRP1_ReleaseReset(uint32_t Periphs)
-{
-  CLEAR_BIT(RCC->IOPRSTR, Periphs);
-}
-
-/**
-  * @brief  Enable IOP peripherals clock during Low Power (Sleep) mode.
-  * @rmtoll IOPSMENR     GPIOARST      LL_IOP_GRP1_EnableClockSleep\n
-  *         IOPSMENR     GPIOBRST      LL_IOP_GRP1_EnableClockSleep\n
-  *         IOPSMENR     GPIOCRST      LL_IOP_GRP1_EnableClockSleep\n
-  *         IOPSMENR     GPIODRST      LL_IOP_GRP1_EnableClockSleep\n
-  *         IOPSMENR     GPIOERST      LL_IOP_GRP1_EnableClockSleep\n
-  *         IOPSMENR     GPIOHRST      LL_IOP_GRP1_EnableClockSleep
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOA
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOB
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOC
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOD (*)
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOE (*)
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOH (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_IOP_GRP1_EnableClockSleep(uint32_t Periphs)
-{
-  __IO uint32_t tmpreg;
-  SET_BIT(RCC->IOPSMENR, Periphs);
-  /* Delay after an RCC peripheral clock enabling */
-  tmpreg = READ_BIT(RCC->IOPSMENR, Periphs);
-  (void)tmpreg;
-}
-
-/**
-  * @brief  Disable IOP peripherals clock during Low Power (Sleep) mode.
-  * @rmtoll IOPSMENR     GPIOARST      LL_IOP_GRP1_DisableClockSleep\n
-  *         IOPSMENR     GPIOBRST      LL_IOP_GRP1_DisableClockSleep\n
-  *         IOPSMENR     GPIOCRST      LL_IOP_GRP1_DisableClockSleep\n
-  *         IOPSMENR     GPIODRST      LL_IOP_GRP1_DisableClockSleep\n
-  *         IOPSMENR     GPIOERST      LL_IOP_GRP1_DisableClockSleep\n
-  *         IOPSMENR     GPIOHRST      LL_IOP_GRP1_DisableClockSleep
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOA
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOB
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOC
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOD (*)
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOE (*)
-  *         @arg @ref LL_IOP_GRP1_PERIPH_GPIOH (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-*/
-__STATIC_INLINE void LL_IOP_GRP1_DisableClockSleep(uint32_t Periphs)
-{
-  CLEAR_BIT(RCC->IOPSMENR, Periphs);
-}
-
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined(RCC) */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_BUS_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_comp.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_comp.h
deleted file mode 100755
index 89fbd87b..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_comp.h
+++ /dev/null
@@ -1,721 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_comp.h
-  * @author  MCD Application Team
-  * @brief   Header file of COMP LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_COMP_H
-#define __STM32L0xx_LL_COMP_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (COMP1) || defined (COMP2)
-
-/** @defgroup COMP_LL COMP
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup COMP_LL_Private_Constants COMP Private Constants
-  * @{
-  */
-
-/* COMP registers bits positions */
-#define LL_COMP_OUTPUT_LEVEL_BITOFFSET_POS ((uint32_t)30U) /* Value equivalent to POSITION_VAL(COMP_CSR_COMP1VALUE) */
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup COMP_LL_ES_INIT COMP Exported Init structure
-  * @{
-  */
-
-/**
-  * @brief  Structure definition of some features of COMP instance.
-  */
-typedef struct
-{
-  uint32_t PowerMode;                   /*!< Set comparator operating mode to adjust power and speed.
-                                             This parameter can be a value of @ref COMP_LL_EC_POWERMODE
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_COMP_SetPowerMode(). */
-
-  uint32_t InputPlus;                   /*!< Set comparator input plus (non-inverting input).
-                                             This parameter can be a value of @ref COMP_LL_EC_INPUT_PLUS
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_COMP_SetInputPlus(). */
-
-  uint32_t InputMinus;                  /*!< Set comparator input minus (inverting input).
-                                             This parameter can be a value of @ref COMP_LL_EC_INPUT_MINUS
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_COMP_SetInputMinus(). */
-
-  uint32_t OutputPolarity;              /*!< Set comparator output polarity.
-                                             This parameter can be a value of @ref COMP_LL_EC_OUTPUT_POLARITY
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_COMP_SetOutputPolarity(). */
-
-} LL_COMP_InitTypeDef;
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup COMP_LL_Exported_Constants COMP Exported Constants
-  * @{
-  */
-
-/** @defgroup COMP_LL_EC_COMMON_WINDOWMODE Comparator common modes - Window mode
-  * @{
-  */
-#define LL_COMP_WINDOWMODE_DISABLE                 ((uint32_t)0x00000000U) /*!< Window mode disable: Comparators 1 and 2 are independent */
-#define LL_COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON (COMP_CSR_COMP1WM)      /*!< Window mode enable: Comparators instances pair COMP1 and COMP2 have their input plus connected together. The common input is COMP1 input plus (COMP2 input plus is no more accessible). */
-/**
-  * @}
-  */
-
-/** @defgroup COMP_LL_EC_POWERMODE Comparator modes - Power mode
-  * @{
-  */
-#define LL_COMP_POWERMODE_ULTRALOWPOWER   ((uint32_t)0x00000000U)     /*!< COMP power mode to low speed (specific to COMP instance: COMP2) */
-#define LL_COMP_POWERMODE_MEDIUMSPEED     (COMP_CSR_COMP2SPEED)       /*!< COMP power mode to fast speed (specific to COMP instance: COMP2) */
-/**
-  * @}
-  */
-
-/** @defgroup COMP_LL_EC_INPUT_PLUS Comparator inputs - Input plus (input non-inverting) selection
-  * @{
-  */
-#define LL_COMP_INPUT_PLUS_IO1          ((uint32_t)0x00000000U)                            /*!< Comparator input plus connected to IO1 (pin PA1 for COMP1, pin PA3 for COMP2) */
-#define LL_COMP_INPUT_PLUS_IO2          (COMP_CSR_COMP2INPSEL_0)                           /*!< Comparator input plus connected to IO2 (pin PB4 for COMP2) (specific to COMP instance: COMP2) */
-#define LL_COMP_INPUT_PLUS_IO3          (COMP_CSR_COMP2INPSEL_1)                           /*!< Comparator input plus connected to IO3 (pin PA5 for COMP2) (specific to COMP instance: COMP2) */
-#define LL_COMP_INPUT_PLUS_IO4          (COMP_CSR_COMP2INPSEL_0 | COMP_CSR_COMP2INPSEL_1)  /*!< Comparator input plus connected to IO4 (pin PB6 for COMP2) (specific to COMP instance: COMP2) */
-#define LL_COMP_INPUT_PLUS_IO5          (COMP_CSR_COMP2INPSEL_2)                           /*!< Comparator input plus connected to IO5 (pin PB7 for COMP2) (specific to COMP instance: COMP2) */
-#if defined (STM32L011xx) || defined (STM32L021xx)
-#define LL_COMP_INPUT_PLUS_IO6          (COMP_CSR_COMP2INPSEL_2 | COMP_CSR_COMP2INPSEL_0)  /*!< Comparator input plus connected to IO6 (pin PA7 for COMP2) (specific to COMP instance: COMP2) (Available only on devices STM32L0 category 1) */
-#endif
-/**
-  * @}
-  */
-
-/** @defgroup COMP_LL_EC_INPUT_MINUS Comparator inputs - Input minus (input inverting) selection
-  * @{
-  */
-#define LL_COMP_INPUT_MINUS_1_4VREFINT  (COMP_CSR_COMP2INNSEL_2                                                  ) /*!< Comparator input minus connected to 1/4 VrefInt (specifity of COMP2 related to path to enable via SYSCFG: refer to comment in function @ref LL_COMP_SetInputMinus() ) (specific to COMP instance: COMP2) */
-#define LL_COMP_INPUT_MINUS_1_2VREFINT  (COMP_CSR_COMP2INNSEL_2 |                          COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to 1/2 VrefInt (specifity of COMP2 related to path to enable via SYSCFG: refer to comment in function @ref LL_COMP_SetInputMinus() ) (specific to COMP instance: COMP2) */
-#define LL_COMP_INPUT_MINUS_3_4VREFINT  (COMP_CSR_COMP2INNSEL_2 | COMP_CSR_COMP2INNSEL_1                         ) /*!< Comparator input minus connected to 3/4 VrefInt (specifity of COMP2 related to path to enable via SYSCFG: refer to comment in function @ref LL_COMP_SetInputMinus() ) (specific to COMP instance: COMP2) */
-#define LL_COMP_INPUT_MINUS_VREFINT     ((uint32_t)0x00000000U)                                                    /*!< Comparator input minus connected to VrefInt (specifity of COMP2 related to path to enable via SYSCFG: refer to comment in function @ref LL_COMP_SetInputMinus() ) */
-#define LL_COMP_INPUT_MINUS_DAC1_CH1    (                         COMP_CSR_COMP2INNSEL_1                         ) /*!< Comparator input minus connected to DAC1 channel 1 (DAC_OUT1)  */
-#define LL_COMP_INPUT_MINUS_DAC1_CH2    (                         COMP_CSR_COMP2INNSEL_1 | COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to DAC1 channel 2 (DAC_OUT2)  */
-#define LL_COMP_INPUT_MINUS_IO1         (                                                  COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to IO1 (pin PA0 for COMP1, pin PA2 for COMP2) */
-#define LL_COMP_INPUT_MINUS_IO2         (COMP_CSR_COMP2INNSEL_2 | COMP_CSR_COMP2INNSEL_1 | COMP_CSR_COMP2INNSEL_0) /*!< Comparator input minus connected to IO2 (pin PB3 for COMP2) (specific to COMP instance: COMP2) */
-/**
-  * @}
-  */
-
-/** @defgroup COMP_LL_EC_OUTPUT_SELECTION_LPTIM Comparator output - Output selection specific to LPTIM peripheral
-  * @{
-  */
-#define LL_COMP_OUTPUT_LPTIM1_IN1_COMP1         (COMP_CSR_COMP1LPTIM1IN1)                                                   /*!< COMP output connected to TIM2 input capture 4 */
-#define LL_COMP_OUTPUT_LPTIM1_IN1_COMP2         (COMP_CSR_COMP2LPTIM1IN1)                                                   /*!< COMP output connected to TIM2 input capture 4 */
-#define LL_COMP_OUTPUT_LPTIM1_IN2_COMP2         (COMP_CSR_COMP2LPTIM1IN2)                                                   /*!< COMP output connected to TIM2 input capture 4 */
-/**
-  * @}
-  */
-
-/** @defgroup COMP_LL_EC_OUTPUT_POLARITY Comparator output - Output polarity
-  * @{
-  */
-#define LL_COMP_OUTPUTPOL_NONINVERTED   ((uint32_t)0x00000000U)  /*!< COMP output polarity is not inverted: comparator output is high when the plus (non-inverting) input is at a higher voltage than the minus (inverting) input */
-#define LL_COMP_OUTPUTPOL_INVERTED      (COMP_CSR_COMP1POLARITY) /*!< COMP output polarity is inverted: comparator output is low when the plus (non-inverting) input is at a lower voltage than the minus (inverting) input */
-
-/**
-  * @}
-  */
-
-/** @defgroup COMP_LL_EC_OUTPUT_LEVEL Comparator output - Output level
-  * @{
-  */
-#define LL_COMP_OUTPUT_LEVEL_LOW        ((uint32_t)0x00000000U) /*!< Comparator output level low (if the polarity is not inverted, otherwise to be complemented) */
-#define LL_COMP_OUTPUT_LEVEL_HIGH       ((uint32_t)0x00000001U) /*!< Comparator output level high (if the polarity is not inverted, otherwise to be complemented) */
-/**
-  * @}
-  */
-
-/** @defgroup COMP_LL_EC_HW_DELAYS  Definitions of COMP hardware constraints delays
-  * @note   Only COMP IP HW delays are defined in COMP LL driver driver,
-  *         not timeout values.
-  *         For details on delays values, refer to descriptions in source code
-  *         above each literal definition.
-  * @{
-  */
-
-/* Delay for comparator startup time.                                         */
-/* Note: Delay required to reach propagation delay specification.             */
-/* Literal set to maximum value (refer to device datasheet,                   */
-/* parameter "tSTART").                                                       */
-/* Unit: us                                                                   */
-#define LL_COMP_DELAY_STARTUP_US          ((uint32_t) 25U)  /*!< Delay for COMP startup time */
-
-/* Delay for comparator voltage scaler stabilization time                     */
-/* (voltage from VrefInt, delay based on VrefInt startup time).               */
-/* Literal set to maximum value (refer to device datasheet,                   */
-/* parameter "TVREFINT").                                                     */
-/* Unit: us                                                                   */
-#define LL_COMP_DELAY_VOLTAGE_SCALER_STAB_US ((uint32_t)3000U)  /*!< Delay for COMP voltage scaler stabilization time */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup COMP_LL_Exported_Macros COMP Exported Macros
-  * @{
-  */
-/** @defgroup COMP_LL_EM_WRITE_READ Common write and read registers macro
-  * @{
-  */
-
-/**
-  * @brief  Write a value in COMP register
-  * @param  __INSTANCE__ comparator instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_COMP_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in COMP register
-  * @param  __INSTANCE__ comparator instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_COMP_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-/** @defgroup COMP_LL_EM_HELPER_MACRO COMP helper macro
-  * @{
-  */
-
-/**
-  * @brief  Helper macro to select the COMP common instance
-  *         to which is belonging the selected COMP instance.
-  * @note   COMP common register instance can be used to
-  *         set parameters common to several COMP instances.
-  *         Refer to functions having argument "COMPxy_COMMON" as parameter.
-  * @param  __COMPx__ COMP instance
-  * @retval COMP common instance or value "0" if there is no COMP common instance.
-  */
-#define __LL_COMP_COMMON_INSTANCE(__COMPx__)                                   \
-  (COMP12_COMMON)
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup COMP_LL_Exported_Functions COMP Exported Functions
-  * @{
-  */
-
-/** @defgroup COMP_LL_EF_Configuration_comparator_common Configuration of COMP hierarchical scope: common to several COMP instances
-  * @{
-  */
-
-/**
-  * @brief  Set window mode of a pair of comparators instances
-  *         (2 consecutive COMP instances odd and even COMP and COMP).
-  * @rmtoll COMP1_CSR COMP1WM       LL_COMP_SetCommonWindowMode
-  * @param  COMPxy_COMMON Comparator common instance
-  *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_COMP_COMMON_INSTANCE() )
-  * @param  WindowMode This parameter can be one of the following values:
-  *         @arg @ref LL_COMP_WINDOWMODE_DISABLE
-  *         @arg @ref LL_COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON
-  * @retval None
-  */
-__STATIC_INLINE void LL_COMP_SetCommonWindowMode(COMP_Common_TypeDef *COMPxy_COMMON, uint32_t WindowMode)
-{
-  MODIFY_REG(COMPxy_COMMON->CSR, COMP_CSR_COMP1WM, WindowMode);
-}
-
-/**
-  * @brief  Get window mode of a pair of comparators instances
-  *         (2 consecutive COMP instances odd and even COMP and COMP).
-  * @rmtoll COMP1_CSR COMP1WM       LL_COMP_GetCommonWindowMode
-  * @param  COMPxy_COMMON Comparator common instance
-  *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_COMP_COMMON_INSTANCE() )
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_COMP_WINDOWMODE_DISABLE
-  *         @arg @ref LL_COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON
-  */
-__STATIC_INLINE uint32_t LL_COMP_GetCommonWindowMode(COMP_Common_TypeDef *COMPxy_COMMON)
-{
-  return (uint32_t)(READ_BIT(COMPxy_COMMON->CSR, COMP_CSR_COMP1WM));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup COMP_LL_EF_Configuration_comparator_modes Configuration of comparator modes
-  * @{
-  */
-
-/**
-  * @brief  Set comparator instance operating mode to adjust power and speed.
-  * @rmtoll COMP2_CSR COMP2SPEED    LL_COMP_SetPowerMode
-  * @param  COMPx Comparator instance
-  * @param  PowerMode This parameter can be one of the following values:
-  *         @arg @ref LL_COMP_POWERMODE_MEDIUMSPEED   (1)
-  *         @arg @ref LL_COMP_POWERMODE_ULTRALOWPOWER (1)
-  *         
-  *         (1) Available only on COMP instance: COMP2.
-  * @retval None
-  */
-__STATIC_INLINE void LL_COMP_SetPowerMode(COMP_TypeDef *COMPx, uint32_t PowerMode)
-{
-  MODIFY_REG(COMPx->CSR, COMP_CSR_COMP2SPEED, PowerMode);
-}
-
-/**
-  * @brief  Get comparator instance operating mode to adjust power and speed.
-  * @note  Available only on COMP instance: COMP2.
-  * @rmtoll COMP2_CSR COMP2SPEED    LL_COMP_GetPowerMode\n
-  * @param  COMPx Comparator instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_COMP_POWERMODE_MEDIUMSPEED   (1)
-  *         @arg @ref LL_COMP_POWERMODE_ULTRALOWPOWER (1)
-  *         
-  *         (1) Available only on COMP instance: COMP2.
-  */
-__STATIC_INLINE uint32_t LL_COMP_GetPowerMode(COMP_TypeDef *COMPx)
-{
-  return (uint32_t)(READ_BIT(COMPx->CSR, COMP_CSR_COMP2SPEED));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup COMP_LL_EF_Configuration_comparator_inputs Configuration of comparator inputs
-  * @{
-  */
-
-/**
-  * @brief  Set comparator inputs minus (inverting) and plus (non-inverting).
-  * @note   This function shall only be used for COMP2.
-  *         For setting COMP1 input it is recommended to use LL_COMP_SetInputMinus()
-  *         Plus (non-inverting) input is not configurable on COMP1.
-  *         Using this function for COMP1 will corrupt COMP1WM register
-  * @note   On this STM32 serie, specificity if using COMP instance COMP2
-  *         with COMP input based on VrefInt (VrefInt or subdivision
-  *         of VrefInt): scaler bridge is based on VrefInt and requires
-  *         to enable path from VrefInt (refer to literal
-  *         SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP).
-  * @rmtoll COMP2_CSR COMP2INNSEL   LL_COMP_ConfigInputs\n
-  *         COMP2_CSR COMP2INPSEL   LL_COMP_ConfigInputs
-  * @param  COMPx Comparator instance
-  * @param  InputMinus This parameter can be one of the following values:
-  *         @arg @ref LL_COMP_INPUT_MINUS_VREFINT
-  *         @arg @ref LL_COMP_INPUT_MINUS_IO1
-  *         @arg @ref LL_COMP_INPUT_MINUS_DAC1_CH1
-  *         @arg @ref LL_COMP_INPUT_MINUS_DAC1_CH2
-  *         @arg @ref LL_COMP_INPUT_MINUS_1_4VREFINT
-  *         @arg @ref LL_COMP_INPUT_MINUS_1_2VREFINT
-  *         @arg @ref LL_COMP_INPUT_MINUS_3_4VREFINT
-  *         @arg @ref LL_COMP_INPUT_MINUS_IO2
-  * @param  InputPlus This parameter can be one of the following values:
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO1 (1)
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO2 (1)
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO3 (1)
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO4 (1)
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO5 (1)
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO6 (1)(2)
-  *
-  *         (1) Available only on COMP instance: COMP2.
-  *         (2) Available only on devices STM32L0 category 1.
-  * @retval None
-  */
-__STATIC_INLINE void LL_COMP_ConfigInputs(COMP_TypeDef *COMPx, uint32_t InputMinus, uint32_t InputPlus)
-{
-  MODIFY_REG(COMPx->CSR,
-             COMP_CSR_COMP2INNSEL | COMP_CSR_COMP2INPSEL,
-             InputMinus | InputPlus);
-}
-
-/**
-  * @brief  Set comparator input plus (non-inverting).
-  * @note   Only COMP2 allows to set the input plus (non-inverting).
-  *         For COMP1 it is always PA1 IO, except when Windows Mode is selected.
-  * @rmtoll COMP2_CSR COMP2INPSEL    LL_COMP_SetInputPlus
-  * @param  COMPx Comparator instance
-  * @param  InputPlus This parameter can be one of the following values:
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO1 (1)
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO2 (1)
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO3 (1)
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO4 (1)
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO5 (1)
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO6 (1)(2)
-  *
-  *         (1) Available only on COMP instance: COMP2.
-  *         (2) Available only on devices STM32L0 category 1.
-  * @retval None
-  */
-__STATIC_INLINE void LL_COMP_SetInputPlus(COMP_TypeDef *COMPx, uint32_t InputPlus)
-{
-  MODIFY_REG(COMPx->CSR, COMP_CSR_COMP2INPSEL, InputPlus);
-}
-
-/**
-  * @brief  Get comparator input plus (non-inverting).
-  * @note   Only COMP2 allows to set the input plus (non-inverting).
-  *         For COMP1 it is always PA1 IO, except when Windows Mode is selected.
-  * @rmtoll COMP2_CSR COMP2INPSEL    LL_COMP_GetInputPlus
-  * @param  COMPx Comparator instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO1 (1)
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO2 (1)
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO3 (1)
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO4 (1)
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO5 (1)
-  *         @arg @ref LL_COMP_INPUT_PLUS_IO6 (1)(2)
-  *
-  *         (1) Available only on COMP instance: COMP2.
-  *         (2) Available only on devices STM32L0 category 1.
-  */
-__STATIC_INLINE uint32_t LL_COMP_GetInputPlus(COMP_TypeDef *COMPx)
-{
-  return (uint32_t)(READ_BIT(COMPx->CSR, COMP_CSR_COMP2INPSEL));
-}
-
-/**
-  * @brief  Set comparator input minus (inverting).
-  * @note   In case of comparator input selected to be connected to IO:
-  *         GPIO pins are specific to each comparator instance.
-  *         Refer to description of parameters or to reference manual.
-  * @note   On this STM32 serie, specificity if using COMP instance COMP2
-  *         with COMP input based on VrefInt (VrefInt or subdivision
-  *         of VrefInt): scaler bridge is based on VrefInt and requires
-  *         to enable path from VrefInt (refer to literal
-  *         SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP).
-  * @rmtoll COMP1_CSR COMP1INNSEL    LL_COMP_SetInputMinus\n
-  *         COMP2_CSR COMP2INNSEL    LL_COMP_SetInputMinus
-  * @param  COMPx Comparator instance
-  * @param  InputMinus This parameter can be one of the following values:
-  *         @arg @ref LL_COMP_INPUT_MINUS_VREFINT
-  *         @arg @ref LL_COMP_INPUT_MINUS_IO1
-  *         @arg @ref LL_COMP_INPUT_MINUS_DAC1_CH1
-  *         @arg @ref LL_COMP_INPUT_MINUS_DAC1_CH2
-  *         @arg @ref LL_COMP_INPUT_MINUS_1_4VREFINT (*)
-  *         @arg @ref LL_COMP_INPUT_MINUS_1_2VREFINT (*)
-  *         @arg @ref LL_COMP_INPUT_MINUS_3_4VREFINT (*)
-  *         @arg @ref LL_COMP_INPUT_MINUS_IO2        (*)
-  *         
-  *         (*) Available only on COMP instance: COMP2.
-  * @retval None
-  */
-__STATIC_INLINE void LL_COMP_SetInputMinus(COMP_TypeDef *COMPx, uint32_t InputMinus)
-{
-  MODIFY_REG(COMPx->CSR, COMP_CSR_COMP2INNSEL, InputMinus);
-}
-
-/**
-  * @brief  Get comparator input minus (inverting).
-  * @note   In case of comparator input selected to be connected to IO:
-  *         GPIO pins are specific to each comparator instance.
-  *         Refer to description of parameters or to reference manual.
-  * @rmtoll COMP1_CSR COMP1INNSEL   LL_COMP_GetInputMinus\n
-  *         COMP2_CSR COMP2INNSEL   LL_COMP_GetInputMinus
-  * @param  COMPx Comparator instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_COMP_INPUT_MINUS_VREFINT
-  *         @arg @ref LL_COMP_INPUT_MINUS_IO1
-  *         @arg @ref LL_COMP_INPUT_MINUS_DAC1_CH1
-  *         @arg @ref LL_COMP_INPUT_MINUS_DAC1_CH2
-  *         @arg @ref LL_COMP_INPUT_MINUS_1_4VREFINT (*)
-  *         @arg @ref LL_COMP_INPUT_MINUS_1_2VREFINT (*)
-  *         @arg @ref LL_COMP_INPUT_MINUS_3_4VREFINT (*)
-  *         @arg @ref LL_COMP_INPUT_MINUS_IO2        (*)
-  *         
-  *         (*) Available only on COMP instance: COMP2.
-  */
-__STATIC_INLINE uint32_t LL_COMP_GetInputMinus(COMP_TypeDef *COMPx)
-{
-  return (uint32_t)(READ_BIT(COMPx->CSR, COMP_CSR_COMP2INNSEL));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup COMP_LL_EF_Configuration_comparator_output Configuration of comparator output
-  * @{
-  */
-
-/**
-  * @brief  Set comparator output LPTIM.
-  * @rmtoll COMP1_CSR COMP1LPTIMIN1 LL_COMP_SetOutputLPTIM\n
-  *         COMP2_CSR COMP2LPTIMIN1 LL_COMP_SetOutputLPTIM\n
-  *         COMP2_CSR COMP2LPTIMIN2 LL_COMP_SetOutputLPTIM
-  * @param  COMPx Comparator instance
-  * @param  OutputLptim This parameter can be one of the following values:
-  *         @arg @ref LL_COMP_OUTPUT_LPTIM1_IN1_COMP1 (*)
-  *         @arg @ref LL_COMP_OUTPUT_LPTIM1_IN1_COMP2 (**)
-  *         @arg @ref LL_COMP_OUTPUT_LPTIM1_IN2_COMP2 (**)
-  *         
-  *         (*)  Available only on COMP instance: COMP1.\n
-  *         (**) Available only on COMP instance: COMP2.
-  * @retval None
-  */
-__STATIC_INLINE void LL_COMP_SetOutputLPTIM(COMP_TypeDef *COMPx, uint32_t OutputLptim)
-{
-  MODIFY_REG(COMPx->CSR, (COMP_CSR_COMP1LPTIM1IN1 | COMP_CSR_COMP2LPTIM1IN1 | COMP_CSR_COMP2LPTIM1IN2), OutputLptim);
-}
-
-/**
-  * @brief  Get comparator output LPTIM.
-  * @rmtoll COMP1_CSR COMP1LPTIMIN1 LL_COMP_GetOutputLPTIM\n
-  *         COMP2_CSR COMP2LPTIMIN1 LL_COMP_GetOutputLPTIM\n
-  *         COMP2_CSR COMP2LPTIMIN2 LL_COMP_GetOutputLPTIM
-  * @param  COMPx Comparator instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_COMP_OUTPUT_LPTIM1_IN1_COMP1 (*)
-  *         @arg @ref LL_COMP_OUTPUT_LPTIM1_IN1_COMP2 (**)
-  *         @arg @ref LL_COMP_OUTPUT_LPTIM1_IN2_COMP2 (**)
-  *         
-  *         (*)  Available only on COMP instance: COMP1.\n
-  *         (**) Available only on COMP instance: COMP2.
-  */
-__STATIC_INLINE uint32_t LL_COMP_GetOutputLPTIM(COMP_TypeDef *COMPx)
-{
-  return (uint32_t)(READ_BIT(COMPx->CSR, (COMP_CSR_COMP1LPTIM1IN1 | COMP_CSR_COMP2LPTIM1IN1 | COMP_CSR_COMP2LPTIM1IN2)));
-}
-
-/**
-  * @brief  Set comparator instance output polarity.
-  * @rmtoll COMP     COMP1POLARITY  LL_COMP_SetOutputPolarity
-  * @param  COMPx Comparator instance
-  * @param  OutputPolarity This parameter can be one of the following values:
-  *         @arg @ref LL_COMP_OUTPUTPOL_NONINVERTED
-  *         @arg @ref LL_COMP_OUTPUTPOL_INVERTED
-  * @retval None
-  */
-__STATIC_INLINE void LL_COMP_SetOutputPolarity(COMP_TypeDef *COMPx, uint32_t OutputPolarity)
-{
-  MODIFY_REG(COMPx->CSR, COMP_CSR_COMPxPOLARITY, OutputPolarity);
-}
-
-/**
-  * @brief  Get comparator instance output polarity.
-  * @rmtoll COMP     COMP1POLARITY  LL_COMP_GetOutputPolarity
-  * @param  COMPx Comparator instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_COMP_OUTPUTPOL_NONINVERTED
-  *         @arg @ref LL_COMP_OUTPUTPOL_INVERTED
-  */
-__STATIC_INLINE uint32_t LL_COMP_GetOutputPolarity(COMP_TypeDef *COMPx)
-{
-  return (uint32_t)(READ_BIT(COMPx->CSR, COMP_CSR_COMPxPOLARITY));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup COMP_LL_EF_Operation Operation on comparator instance
-  * @{
-  */
-
-/**
-  * @brief  Enable comparator instance.
-  * @note   After enable from off state, comparator requires a delay
-  *         to reach reach propagation delay specification.
-  *         Refer to device datasheet, parameter "tSTART".
-  * @rmtoll COMP1_CSR COMP1EN       LL_COMP_Enable\n
-  *         COMP2_CSR COMP2EN       LL_COMP_Enable
-  * @param  COMPx Comparator instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_COMP_Enable(COMP_TypeDef *COMPx)
-{
-  SET_BIT(COMPx->CSR, COMP_CSR_COMPxEN);
-}
-
-/**
-  * @brief  Disable comparator instance.
-  * @rmtoll COMP1_CSR COMP1EN       LL_COMP_Disable\n
-  *         COMP2_CSR COMP2EN       LL_COMP_Disable
-  * @param  COMPx Comparator instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_COMP_Disable(COMP_TypeDef *COMPx)
-{
-  CLEAR_BIT(COMPx->CSR, COMP_CSR_COMPxEN);
-}
-
-/**
-  * @brief  Get comparator enable state
-  *         (0: COMP is disabled, 1: COMP is enabled)
-  * @rmtoll COMP1_CSR COMP1EN        LL_COMP_IsEnabled\n
-  *         COMP2_CSR COMP2EN        LL_COMP_IsEnabled
-  * @param  COMPx Comparator instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_COMP_IsEnabled(COMP_TypeDef *COMPx)
-{
-  return (READ_BIT(COMPx->CSR, COMP_CSR_COMPxEN) == (COMP_CSR_COMPxEN));
-}
-
-/**
-  * @brief  Lock comparator instance.
-  * @note   Once locked, comparator configuration can be accessed in read-only.
-  * @note   The only way to unlock the comparator is a device hardware reset.
-  * @rmtoll COMP1_CSR COMP1LOCK     LL_COMP_Lock\n
-  *         COMP2_CSR COMP2LOCK     LL_COMP_Lock
-  * @param  COMPx Comparator instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_COMP_Lock(COMP_TypeDef *COMPx)
-{
-  SET_BIT(COMPx->CSR, COMP_CSR_COMPxLOCK);
-}
-
-/**
-  * @brief  Get comparator lock state
-  *         (0: COMP is unlocked, 1: COMP is locked).
-  * @note   Once locked, comparator configuration can be accessed in read-only.
-  * @note   The only way to unlock the comparator is a device hardware reset.
-  * @rmtoll COMP1_CSR COMP1LOCK     LL_COMP_IsLocked\n
-  *         COMP2_CSR COMP2LOCK     LL_COMP_IsLocked
-  * @param  COMPx Comparator instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_COMP_IsLocked(COMP_TypeDef *COMPx)
-{
-  return (READ_BIT(COMPx->CSR, COMP_CSR_COMPxLOCK) == (COMP_CSR_COMPxLOCK));
-}
-
-/**
-  * @brief  Read comparator instance output level.
-  * @note   The comparator output level depends on the selected polarity
-  *         (Refer to function @ref LL_COMP_SetOutputPolarity()).
-  *         If the comparator polarity is not inverted:
-  *          - Comparator output is low when the input plus
-  *            is at a lower voltage than the input minus
-  *          - Comparator output is high when the input plus
-  *            is at a higher voltage than the input minus
-  *         If the comparator polarity is inverted:
-  *          - Comparator output is high when the input plus
-  *            is at a lower voltage than the input minus
-  *          - Comparator output is low when the input plus
-  *            is at a higher voltage than the input minus
-  * @rmtoll COMP1_CSR COMP1VALUE    LL_COMP_ReadOutputLevel\n
-  *         COMP2_CSR COMP2VALUE    LL_COMP_ReadOutputLevel
-  * @param  COMPx Comparator instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_COMP_OUTPUT_LEVEL_LOW
-  *         @arg @ref LL_COMP_OUTPUT_LEVEL_HIGH
-  */
-__STATIC_INLINE uint32_t LL_COMP_ReadOutputLevel(COMP_TypeDef *COMPx)
-{
-  return (uint32_t)(READ_BIT(COMPx->CSR, COMP_CSR_COMPxOUTVALUE)
-                    >> LL_COMP_OUTPUT_LEVEL_BITOFFSET_POS);
-}
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup COMP_LL_EF_Init Initialization and de-initialization functions
-  * @{
-  */
-
-ErrorStatus LL_COMP_DeInit(COMP_TypeDef *COMPx);
-ErrorStatus LL_COMP_Init(COMP_TypeDef *COMPx, LL_COMP_InitTypeDef *COMP_InitStruct);
-void        LL_COMP_StructInit(LL_COMP_InitTypeDef *COMP_InitStruct);
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* COMP1 || COMP2 */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_COMP_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h
deleted file mode 100755
index 13032554..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h
+++ /dev/null
@@ -1,606 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_cortex.h
-  * @author  MCD Application Team
-  * @brief   Header file of CORTEX LL module.
-  @verbatim
-  ==============================================================================
-                     ##### How to use this driver #####
-  ==============================================================================
-    [..]
-    The LL CORTEX driver contains a set of generic APIs that can be
-    used by user:
-      (+) SYSTICK configuration used by @ref LL_mDelay and @ref LL_Init1msTick
-          functions
-      (+) Low power mode configuration (SCB register of Cortex-MCU)
-      (+) MPU API to configure and enable regions
-      (+) API to access to MCU info (CPUID register)
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_CORTEX_H
-#define __STM32L0xx_LL_CORTEX_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-/** @defgroup CORTEX_LL CORTEX
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-
-/* Private macros ------------------------------------------------------------*/
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup CORTEX_LL_Exported_Constants CORTEX Exported Constants
-  * @{
-  */
-
-/** @defgroup CORTEX_LL_EC_CLKSOURCE_HCLK SYSTICK Clock Source
-  * @{
-  */
-#define LL_SYSTICK_CLKSOURCE_HCLK_DIV8     ((uint32_t)0x00000000U)                 /*!< AHB clock divided by 8 selected as SysTick clock source.*/
-#define LL_SYSTICK_CLKSOURCE_HCLK          ((uint32_t)SysTick_CTRL_CLKSOURCE_Msk) /*!< AHB clock selected as SysTick clock source. */
-/**
-  * @}
-  */
-
-#if __MPU_PRESENT
-
-/** @defgroup CORTEX_LL_EC_CTRL_HFNMI_PRIVDEF MPU Control
-  * @{
-  */
-#define LL_MPU_CTRL_HFNMI_PRIVDEF_NONE     ((uint32_t)0x00000000U)                            /*!< Disable NMI and privileged SW access */
-#define LL_MPU_CTRL_HARDFAULT_NMI          MPU_CTRL_HFNMIENA_Msk                             /*!< Enables the operation of MPU during hard fault, NMI, and FAULTMASK handlers */
-#define LL_MPU_CTRL_PRIVILEGED_DEFAULT     MPU_CTRL_PRIVDEFENA_Msk                           /*!< Enable privileged software access to default memory map */
-#define LL_MPU_CTRL_HFNMI_PRIVDEF          (MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk) /*!< Enable NMI and privileged SW access */
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_LL_EC_REGION MPU Region Number
-  * @{
-  */
-#define LL_MPU_REGION_NUMBER0              ((uint32_t)0x00U) /*!< REGION Number 0 */
-#define LL_MPU_REGION_NUMBER1              ((uint32_t)0x01U) /*!< REGION Number 1 */
-#define LL_MPU_REGION_NUMBER2              ((uint32_t)0x02U) /*!< REGION Number 2 */
-#define LL_MPU_REGION_NUMBER3              ((uint32_t)0x03U) /*!< REGION Number 3 */
-#define LL_MPU_REGION_NUMBER4              ((uint32_t)0x04U) /*!< REGION Number 4 */
-#define LL_MPU_REGION_NUMBER5              ((uint32_t)0x05U) /*!< REGION Number 5 */
-#define LL_MPU_REGION_NUMBER6              ((uint32_t)0x06U) /*!< REGION Number 6 */
-#define LL_MPU_REGION_NUMBER7              ((uint32_t)0x07U) /*!< REGION Number 7 */
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_LL_EC_REGION_SIZE MPU Region Size
-  * @{
-  */
-#define LL_MPU_REGION_SIZE_32B             ((uint32_t)(0x04U << MPU_RASR_SIZE_Pos)) /*!< 32B Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_64B             ((uint32_t)(0x05U << MPU_RASR_SIZE_Pos)) /*!< 64B Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_128B            ((uint32_t)(0x06U << MPU_RASR_SIZE_Pos)) /*!< 128B Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_256B            ((uint32_t)(0x07U << MPU_RASR_SIZE_Pos)) /*!< 256B Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_512B            ((uint32_t)(0x08U << MPU_RASR_SIZE_Pos)) /*!< 512B Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_1KB             ((uint32_t)(0x09U << MPU_RASR_SIZE_Pos)) /*!< 1KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_2KB             ((uint32_t)(0x0AU << MPU_RASR_SIZE_Pos)) /*!< 2KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_4KB             ((uint32_t)(0x0BU << MPU_RASR_SIZE_Pos)) /*!< 4KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_8KB             ((uint32_t)(0x0CU << MPU_RASR_SIZE_Pos)) /*!< 8KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_16KB            ((uint32_t)(0x0DU << MPU_RASR_SIZE_Pos)) /*!< 16KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_32KB            ((uint32_t)(0x0EU << MPU_RASR_SIZE_Pos)) /*!< 32KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_64KB            ((uint32_t)(0x0FU << MPU_RASR_SIZE_Pos)) /*!< 64KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_128KB           ((uint32_t)(0x10U << MPU_RASR_SIZE_Pos)) /*!< 128KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_256KB           ((uint32_t)(0x11U << MPU_RASR_SIZE_Pos)) /*!< 256KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_512KB           ((uint32_t)(0x12U << MPU_RASR_SIZE_Pos)) /*!< 512KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_1MB             ((uint32_t)(0x13U << MPU_RASR_SIZE_Pos)) /*!< 1MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_2MB             ((uint32_t)(0x14U << MPU_RASR_SIZE_Pos)) /*!< 2MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_4MB             ((uint32_t)(0x15U << MPU_RASR_SIZE_Pos)) /*!< 4MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_8MB             ((uint32_t)(0x16U << MPU_RASR_SIZE_Pos)) /*!< 8MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_16MB            ((uint32_t)(0x17U << MPU_RASR_SIZE_Pos)) /*!< 16MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_32MB            ((uint32_t)(0x18U << MPU_RASR_SIZE_Pos)) /*!< 32MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_64MB            ((uint32_t)(0x19U << MPU_RASR_SIZE_Pos)) /*!< 64MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_128MB           ((uint32_t)(0x1AU << MPU_RASR_SIZE_Pos)) /*!< 128MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_256MB           ((uint32_t)(0x1BU << MPU_RASR_SIZE_Pos)) /*!< 256MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_512MB           ((uint32_t)(0x1CU << MPU_RASR_SIZE_Pos)) /*!< 512MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_1GB             ((uint32_t)(0x1DU << MPU_RASR_SIZE_Pos)) /*!< 1GB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_2GB             ((uint32_t)(0x1EU << MPU_RASR_SIZE_Pos)) /*!< 2GB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_4GB             ((uint32_t)(0x1FU << MPU_RASR_SIZE_Pos)) /*!< 4GB Size of the MPU protection region */
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_LL_EC_REGION_PRIVILEDGES MPU Region Privileges
-  * @{
-  */
-#define LL_MPU_REGION_NO_ACCESS            ((uint32_t)(0x00U << MPU_RASR_AP_Pos)) /*!< No access*/
-#define LL_MPU_REGION_PRIV_RW              ((uint32_t)(0x01U << MPU_RASR_AP_Pos)) /*!< RW privileged (privileged access only)*/
-#define LL_MPU_REGION_PRIV_RW_URO          ((uint32_t)(0x02U << MPU_RASR_AP_Pos)) /*!< RW privileged - RO user (Write in a user program generates a fault) */
-#define LL_MPU_REGION_FULL_ACCESS          ((uint32_t)(0x03U << MPU_RASR_AP_Pos)) /*!< RW privileged & user (Full access) */
-#define LL_MPU_REGION_PRIV_RO              ((uint32_t)(0x05U << MPU_RASR_AP_Pos)) /*!< RO privileged (privileged read only)*/
-#define LL_MPU_REGION_PRIV_RO_URO          ((uint32_t)(0x06U << MPU_RASR_AP_Pos)) /*!< RO privileged & user (read only) */
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_LL_EC_TEX MPU TEX Level
-  * @{
-  */
-#define LL_MPU_TEX_LEVEL0                  ((uint32_t)(0x00U << MPU_RASR_TEX_Pos)) /*!< b000 for TEX bits */
-#define LL_MPU_TEX_LEVEL1                  ((uint32_t)(0x01U << MPU_RASR_TEX_Pos)) /*!< b001 for TEX bits */
-#define LL_MPU_TEX_LEVEL2                  ((uint32_t)(0x02U << MPU_RASR_TEX_Pos)) /*!< b010 for TEX bits */
-#define LL_MPU_TEX_LEVEL4                  ((uint32_t)(0x04U << MPU_RASR_TEX_Pos)) /*!< b100 for TEX bits */
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_LL_EC_INSTRUCTION_ACCESS MPU Instruction Access
-  * @{
-  */
-#define LL_MPU_INSTRUCTION_ACCESS_ENABLE   ((uint32_t)0x00U) /*!< Instruction fetches enabled */
-#define LL_MPU_INSTRUCTION_ACCESS_DISABLE  MPU_RASR_XN_Msk  /*!< Instruction fetches disabled*/
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_LL_EC_SHAREABLE_ACCESS MPU Shareable Access
-  * @{
-  */
-#define LL_MPU_ACCESS_SHAREABLE            MPU_RASR_S_Msk   /*!< Shareable memory attribute */
-#define LL_MPU_ACCESS_NOT_SHAREABLE        ((uint32_t)0x00U) /*!< Not Shareable memory attribute */
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_LL_EC_CACHEABLE_ACCESS MPU Cacheable Access
-  * @{
-  */
-#define LL_MPU_ACCESS_CACHEABLE            MPU_RASR_C_Msk   /*!< Cacheable memory attribute */
-#define LL_MPU_ACCESS_NOT_CACHEABLE        ((uint32_t)0x00U) /*!< Not Cacheable memory attribute */
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_LL_EC_BUFFERABLE_ACCESS MPU Bufferable Access
-  * @{
-  */
-#define LL_MPU_ACCESS_BUFFERABLE           MPU_RASR_B_Msk   /*!< Bufferable memory attribute */
-#define LL_MPU_ACCESS_NOT_BUFFERABLE       ((uint32_t)0x00U) /*!< Not Bufferable memory attribute */
-/**
-  * @}
-  */
-#endif /* __MPU_PRESENT */
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup CORTEX_LL_Exported_Functions CORTEX Exported Functions
-  * @{
-  */
-
-/** @defgroup CORTEX_LL_EF_SYSTICK SYSTICK
-  * @{
-  */
-
-/**
-  * @brief  This function checks if the Systick counter flag is active or not.
-  * @note   It can be used in timeout function on application side.
-  * @rmtoll STK_CTRL     COUNTFLAG     LL_SYSTICK_IsActiveCounterFlag
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SYSTICK_IsActiveCounterFlag(void)
-{
-  return ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == (SysTick_CTRL_COUNTFLAG_Msk));
-}
-
-/**
-  * @brief  Configures the SysTick clock source
-  * @rmtoll STK_CTRL     CLKSOURCE     LL_SYSTICK_SetClkSource
-  * @param  Source This parameter can be one of the following values:
-  *         @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8
-  *         @arg @ref LL_SYSTICK_CLKSOURCE_HCLK
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSTICK_SetClkSource(uint32_t Source)
-{
-  if (Source == LL_SYSTICK_CLKSOURCE_HCLK)
-  {
-    SET_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK);
-  }
-  else
-  {
-    CLEAR_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK);
-  }
-}
-
-/**
-  * @brief  Get the SysTick clock source
-  * @rmtoll STK_CTRL     CLKSOURCE     LL_SYSTICK_GetClkSource
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8
-  *         @arg @ref LL_SYSTICK_CLKSOURCE_HCLK
-  */
-__STATIC_INLINE uint32_t LL_SYSTICK_GetClkSource(void)
-{
-  return READ_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK);
-}
-
-/**
-  * @brief  Enable SysTick exception request
-  * @rmtoll STK_CTRL     TICKINT       LL_SYSTICK_EnableIT
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSTICK_EnableIT(void)
-{
-  SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk);
-}
-
-/**
-  * @brief  Disable SysTick exception request
-  * @rmtoll STK_CTRL     TICKINT       LL_SYSTICK_DisableIT
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSTICK_DisableIT(void)
-{
-  CLEAR_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk);
-}
-
-/**
-  * @brief  Checks if the SYSTICK interrupt is enabled or disabled.
-  * @rmtoll STK_CTRL     TICKINT       LL_SYSTICK_IsEnabledIT
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SYSTICK_IsEnabledIT(void)
-{
-  return (READ_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk) == (SysTick_CTRL_TICKINT_Msk));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_LL_EF_LOW_POWER_MODE LOW POWER MODE
-  * @{
-  */
-
-/**
-  * @brief  Processor uses sleep as its low power mode
-  * @rmtoll SCB_SCR      SLEEPDEEP     LL_LPM_EnableSleep
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPM_EnableSleep(void)
-{
-  /* Clear SLEEPDEEP bit of Cortex System Control Register */
-  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
-}
-
-/**
-  * @brief  Processor uses deep sleep as its low power mode
-  * @rmtoll SCB_SCR      SLEEPDEEP     LL_LPM_EnableDeepSleep
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPM_EnableDeepSleep(void)
-{
-  /* Set SLEEPDEEP bit of Cortex System Control Register */
-  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
-}
-
-/**
-  * @brief  Configures sleep-on-exit when returning from Handler mode to Thread mode.
-  * @note   Setting this bit to 1 enables an interrupt-driven application to avoid returning to an
-  *         empty main application.
-  * @rmtoll SCB_SCR      SLEEPONEXIT   LL_LPM_EnableSleepOnExit
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPM_EnableSleepOnExit(void)
-{
-  /* Set SLEEPONEXIT bit of Cortex System Control Register */
-  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
-}
-
-/**
-  * @brief  Do not sleep when returning to Thread mode.
-  * @rmtoll SCB_SCR      SLEEPONEXIT   LL_LPM_DisableSleepOnExit
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPM_DisableSleepOnExit(void)
-{
-  /* Clear SLEEPONEXIT bit of Cortex System Control Register */
-  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
-}
-
-/**
-  * @brief  Enabled events and all interrupts, including disabled interrupts, can wakeup the
-  *         processor.
-  * @rmtoll SCB_SCR      SEVEONPEND    LL_LPM_EnableEventOnPend
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPM_EnableEventOnPend(void)
-{
-  /* Set SEVEONPEND bit of Cortex System Control Register */
-  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
-}
-
-/**
-  * @brief  Only enabled interrupts or events can wakeup the processor, disabled interrupts are
-  *         excluded
-  * @rmtoll SCB_SCR      SEVEONPEND    LL_LPM_DisableEventOnPend
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPM_DisableEventOnPend(void)
-{
-  /* Clear SEVEONPEND bit of Cortex System Control Register */
-  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_LL_EF_MCU_INFO MCU INFO
-  * @{
-  */
-
-/**
-  * @brief  Get Implementer code
-  * @rmtoll SCB_CPUID    IMPLEMENTER   LL_CPUID_GetImplementer
-  * @retval Value should be equal to 0x41 for ARM
-  */
-__STATIC_INLINE uint32_t LL_CPUID_GetImplementer(void)
-{
-  return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_IMPLEMENTER_Msk) >> SCB_CPUID_IMPLEMENTER_Pos);
-}
-
-/**
-  * @brief  Get Variant number (The r value in the rnpn product revision identifier)
-  * @rmtoll SCB_CPUID    VARIANT       LL_CPUID_GetVariant
-  * @retval Value between 0 and 255 (0x0: revision 0)
-  */
-__STATIC_INLINE uint32_t LL_CPUID_GetVariant(void)
-{
-  return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_VARIANT_Msk) >> SCB_CPUID_VARIANT_Pos);
-}
-
-/**
-  * @brief  Get Architecture number 
-  * @rmtoll SCB_CPUID    ARCHITECTURE  LL_CPUID_GetArchitecture
-  * @retval Value should be equal to 0xC for Cortex-M0+ devices
-  */
-__STATIC_INLINE uint32_t LL_CPUID_GetArchitecture(void)
-{
-  return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_ARCHITECTURE_Msk) >> SCB_CPUID_ARCHITECTURE_Pos);
-}
-
-/**
-  * @brief  Get Part number
-  * @rmtoll SCB_CPUID    PARTNO        LL_CPUID_GetParNo
-  * @retval Value should be equal to 0xC60 for Cortex-M0+
-  */
-__STATIC_INLINE uint32_t LL_CPUID_GetParNo(void)
-{
-  return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_PARTNO_Msk) >> SCB_CPUID_PARTNO_Pos);
-}
-
-/**
-  * @brief  Get Revision number (The p value in the rnpn product revision identifier, indicates patch release)
-  * @rmtoll SCB_CPUID    REVISION      LL_CPUID_GetRevision
-  * @retval Value between 0 and 255 (0x1: patch 1)
-  */
-__STATIC_INLINE uint32_t LL_CPUID_GetRevision(void)
-{
-  return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_REVISION_Msk) >> SCB_CPUID_REVISION_Pos);
-}
-
-/**
-  * @}
-  */
-
-#if __MPU_PRESENT
-/** @defgroup CORTEX_LL_EF_MPU MPU
-  * @{
-  */
-
-/**
-  * @brief  Enable MPU with input options
-  * @rmtoll MPU_CTRL     ENABLE        LL_MPU_Enable
-  * @param  Options This parameter can be one of the following values:
-  *         @arg @ref LL_MPU_CTRL_HFNMI_PRIVDEF_NONE
-  *         @arg @ref LL_MPU_CTRL_HARDFAULT_NMI
-  *         @arg @ref LL_MPU_CTRL_PRIVILEGED_DEFAULT
-  *         @arg @ref LL_MPU_CTRL_HFNMI_PRIVDEF
-  * @retval None
-  */
-__STATIC_INLINE void LL_MPU_Enable(uint32_t Options)
-{
-  /* Enable the MPU*/
-  WRITE_REG(MPU->CTRL, (MPU_CTRL_ENABLE_Msk | Options));
-  /* Ensure MPU settings take effects */
-  __DSB();
-  /* Sequence instruction fetches using update settings */
-  __ISB();
-}
-
-/**
-  * @brief  Disable MPU
-  * @rmtoll MPU_CTRL     ENABLE        LL_MPU_Disable
-  * @retval None
-  */
-__STATIC_INLINE void LL_MPU_Disable(void)
-{
-  /* Make sure outstanding transfers are done */
-  __DMB();
-  /* Disable MPU*/
-  WRITE_REG(MPU->CTRL, 0U);
-}
-
-/**
-  * @brief  Check if MPU is enabled or not
-  * @rmtoll MPU_CTRL     ENABLE        LL_MPU_IsEnabled
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_MPU_IsEnabled(void)
-{
-  return (READ_BIT(MPU->CTRL, MPU_CTRL_ENABLE_Msk) == (MPU_CTRL_ENABLE_Msk));
-}
-
-/**
-  * @brief  Enable a MPU region
-  * @rmtoll MPU_RASR     ENABLE        LL_MPU_EnableRegion
-  * @param  Region This parameter can be one of the following values:
-  *         @arg @ref LL_MPU_REGION_NUMBER0
-  *         @arg @ref LL_MPU_REGION_NUMBER1
-  *         @arg @ref LL_MPU_REGION_NUMBER2
-  *         @arg @ref LL_MPU_REGION_NUMBER3
-  *         @arg @ref LL_MPU_REGION_NUMBER4
-  *         @arg @ref LL_MPU_REGION_NUMBER5
-  *         @arg @ref LL_MPU_REGION_NUMBER6
-  *         @arg @ref LL_MPU_REGION_NUMBER7
-  * @retval None
-  */
-__STATIC_INLINE void LL_MPU_EnableRegion(uint32_t Region)
-{
-  /* Set Region number */
-  WRITE_REG(MPU->RNR, Region);
-  /* Enable the MPU region */
-  SET_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
-}
-
-/**
-  * @brief  Configure and enable a region
-  * @rmtoll MPU_RNR      REGION        LL_MPU_ConfigRegion\n
-  *         MPU_RBAR     REGION        LL_MPU_ConfigRegion\n
-  *         MPU_RBAR     ADDR          LL_MPU_ConfigRegion\n
-  *         MPU_RASR     XN            LL_MPU_ConfigRegion\n
-  *         MPU_RASR     AP            LL_MPU_ConfigRegion\n
-  *         MPU_RASR     S             LL_MPU_ConfigRegion\n
-  *         MPU_RASR     C             LL_MPU_ConfigRegion\n
-  *         MPU_RASR     B             LL_MPU_ConfigRegion\n
-  *         MPU_RASR     SIZE          LL_MPU_ConfigRegion
-  * @param  Region This parameter can be one of the following values:
-  *         @arg @ref LL_MPU_REGION_NUMBER0
-  *         @arg @ref LL_MPU_REGION_NUMBER1
-  *         @arg @ref LL_MPU_REGION_NUMBER2
-  *         @arg @ref LL_MPU_REGION_NUMBER3
-  *         @arg @ref LL_MPU_REGION_NUMBER4
-  *         @arg @ref LL_MPU_REGION_NUMBER5
-  *         @arg @ref LL_MPU_REGION_NUMBER6
-  *         @arg @ref LL_MPU_REGION_NUMBER7
-  * @param  Address Value of region base address
-  * @param  SubRegionDisable Sub-region disable value between Min_Data = 0x00 and Max_Data = 0xFF
-  * @param  Attributes This parameter can be a combination of the following values:
-  *         @arg @ref LL_MPU_REGION_SIZE_32B or @ref LL_MPU_REGION_SIZE_64B or @ref LL_MPU_REGION_SIZE_128B or @ref LL_MPU_REGION_SIZE_256B or @ref LL_MPU_REGION_SIZE_512B
-  *           or @ref LL_MPU_REGION_SIZE_1KB or @ref LL_MPU_REGION_SIZE_2KB or @ref LL_MPU_REGION_SIZE_4KB or @ref LL_MPU_REGION_SIZE_8KB or @ref LL_MPU_REGION_SIZE_16KB
-  *           or @ref LL_MPU_REGION_SIZE_32KB or @ref LL_MPU_REGION_SIZE_64KB or @ref LL_MPU_REGION_SIZE_128KB or @ref LL_MPU_REGION_SIZE_256KB or @ref LL_MPU_REGION_SIZE_512KB
-  *           or @ref LL_MPU_REGION_SIZE_1MB or @ref LL_MPU_REGION_SIZE_2MB or @ref LL_MPU_REGION_SIZE_4MB or @ref LL_MPU_REGION_SIZE_8MB or @ref LL_MPU_REGION_SIZE_16MB
-  *           or @ref LL_MPU_REGION_SIZE_32MB or @ref LL_MPU_REGION_SIZE_64MB or @ref LL_MPU_REGION_SIZE_128MB or @ref LL_MPU_REGION_SIZE_256MB or @ref LL_MPU_REGION_SIZE_512MB
-  *           or @ref LL_MPU_REGION_SIZE_1GB or @ref LL_MPU_REGION_SIZE_2GB or @ref LL_MPU_REGION_SIZE_4GB
-  *         @arg @ref LL_MPU_REGION_NO_ACCESS or @ref LL_MPU_REGION_PRIV_RW or @ref LL_MPU_REGION_PRIV_RW_URO or @ref LL_MPU_REGION_FULL_ACCESS
-  *           or @ref LL_MPU_REGION_PRIV_RO or @ref LL_MPU_REGION_PRIV_RO_URO
-  *         @arg @ref LL_MPU_TEX_LEVEL0 or @ref LL_MPU_TEX_LEVEL1 or @ref LL_MPU_TEX_LEVEL2 or @ref LL_MPU_TEX_LEVEL4
-  *         @arg @ref LL_MPU_INSTRUCTION_ACCESS_ENABLE or  @ref LL_MPU_INSTRUCTION_ACCESS_DISABLE
-  *         @arg @ref LL_MPU_ACCESS_SHAREABLE or @ref LL_MPU_ACCESS_NOT_SHAREABLE
-  *         @arg @ref LL_MPU_ACCESS_CACHEABLE or @ref LL_MPU_ACCESS_NOT_CACHEABLE
-  *         @arg @ref LL_MPU_ACCESS_BUFFERABLE or @ref LL_MPU_ACCESS_NOT_BUFFERABLE
-  * @retval None
-  */
-__STATIC_INLINE void LL_MPU_ConfigRegion(uint32_t Region, uint32_t SubRegionDisable, uint32_t Address, uint32_t Attributes)
-{
-  /* Set Region number */
-  WRITE_REG(MPU->RNR, Region);
-  /* Set base address */
-  WRITE_REG(MPU->RBAR, (Address & 0xFFFFFFE0U));
-  /* Configure MPU */
-  WRITE_REG(MPU->RASR, (MPU_RASR_ENABLE_Msk | Attributes | SubRegionDisable << MPU_RASR_SRD_Pos));
-}
-
-/**
-  * @brief  Disable a region
-  * @rmtoll MPU_RNR      REGION        LL_MPU_DisableRegion\n
-  *         MPU_RASR     ENABLE        LL_MPU_DisableRegion
-  * @param  Region This parameter can be one of the following values:
-  *         @arg @ref LL_MPU_REGION_NUMBER0
-  *         @arg @ref LL_MPU_REGION_NUMBER1
-  *         @arg @ref LL_MPU_REGION_NUMBER2
-  *         @arg @ref LL_MPU_REGION_NUMBER3
-  *         @arg @ref LL_MPU_REGION_NUMBER4
-  *         @arg @ref LL_MPU_REGION_NUMBER5
-  *         @arg @ref LL_MPU_REGION_NUMBER6
-  *         @arg @ref LL_MPU_REGION_NUMBER7
-  * @retval None
-  */
-__STATIC_INLINE void LL_MPU_DisableRegion(uint32_t Region)
-{
-  /* Set Region number */
-  WRITE_REG(MPU->RNR, Region);
-  /* Disable the MPU region */
-  CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
-}
-
-/**
-  * @}
-  */
-
-#endif /* __MPU_PRESENT */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_CORTEX_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crc.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crc.h
deleted file mode 100755
index e57fd67f..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crc.h
+++ /dev/null
@@ -1,477 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_crc.h
-  * @author  MCD Application Team
-  * @brief   Header file of CRC LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_CRC_H
-#define __STM32L0xx_LL_CRC_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined(CRC)
-
-/** @defgroup CRC_LL CRC
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup CRC_LL_Exported_Constants CRC Exported Constants
-  * @{
-  */
-
-/** @defgroup CRC_LL_EC_POLYLENGTH Polynomial length
-  * @{
-  */
-#define LL_CRC_POLYLENGTH_32B              (uint32_t)0x00000000U                    /*!< 32 bits Polynomial size */
-#define LL_CRC_POLYLENGTH_16B              CRC_CR_POLYSIZE_0                        /*!< 16 bits Polynomial size */
-#define LL_CRC_POLYLENGTH_8B               CRC_CR_POLYSIZE_1                        /*!< 8 bits Polynomial size */
-#define LL_CRC_POLYLENGTH_7B               (CRC_CR_POLYSIZE_1 | CRC_CR_POLYSIZE_0)  /*!< 7 bits Polynomial size */
-/**
-  * @}
-  */
-
-/** @defgroup CRC_LL_EC_INDATA_REVERSE Input Data Reverse
-  * @{
-  */
-#define LL_CRC_INDATA_REVERSE_NONE         (uint32_t)0x00000000U                    /*!< Input Data bit order not affected */
-#define LL_CRC_INDATA_REVERSE_BYTE         CRC_CR_REV_IN_0                          /*!< Input Data bit reversal done by byte */
-#define LL_CRC_INDATA_REVERSE_HALFWORD     CRC_CR_REV_IN_1                          /*!< Input Data bit reversal done by half-word */
-#define LL_CRC_INDATA_REVERSE_WORD         (CRC_CR_REV_IN_1 | CRC_CR_REV_IN_0)      /*!< Input Data bit reversal done by word */
-/**
-  * @}
-  */
-
-/** @defgroup CRC_LL_EC_OUTDATA_REVERSE Output Data Reverse
-  * @{
-  */
-#define LL_CRC_OUTDATA_REVERSE_NONE        (uint32_t)0x00000000U                     /*!< Output Data bit order not affected */
-#define LL_CRC_OUTDATA_REVERSE_BIT         CRC_CR_REV_OUT                            /*!< Output Data bit reversal done by bit */
-/**
-  * @}
-  */
-
-/** @defgroup CRC_LL_EC_Default_Polynomial_Value    Default CRC generating polynomial value
-  * @brief    Normal representation of this polynomial value is
-  *           X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2 + X + 1 .
-  * @{
-  */
-#define LL_CRC_DEFAULT_CRC32_POLY          (uint32_t)0x04C11DB7U                     /*!< Default CRC generating polynomial value */
-/**
-  * @}
-  */
-
-/** @defgroup CRC_LL_EC_Default_InitValue    Default CRC computation initialization value
-  * @{
-  */
-#define LL_CRC_DEFAULT_CRC_INITVALUE       (uint32_t)0xFFFFFFFFU                     /*!< Default CRC computation initialization value */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup CRC_LL_Exported_Macros CRC Exported Macros
-  * @{
-  */
-
-/** @defgroup CRC_LL_EM_WRITE_READ Common Write and read registers Macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in CRC register
-  * @param  __INSTANCE__ CRC Instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_CRC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in CRC register
-  * @param  __INSTANCE__ CRC Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_CRC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup CRC_LL_Exported_Functions CRC Exported Functions
-  * @{
-  */
-
-/** @defgroup CRC_LL_EF_Configuration CRC Configuration functions
-  * @{
-  */
-
-/**
-  * @brief  Reset the CRC calculation unit.
-  * @note   If Programmable Initial CRC value feature
-  *         is available, also set the Data Register to the value stored in the
-  *         CRC_INIT register, otherwise, reset Data Register to its default value.
-  * @rmtoll CR           RESET         LL_CRC_ResetCRCCalculationUnit
-  * @param  CRCx CRC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRC_ResetCRCCalculationUnit(CRC_TypeDef *CRCx)
-{
-  SET_BIT(CRCx->CR, CRC_CR_RESET);
-}
-
-/**
-  * @brief  Configure size of the polynomial.
-  * @rmtoll CR           POLYSIZE      LL_CRC_SetPolynomialSize
-  * @param  CRCx CRC Instance
-  * @param  PolySize This parameter can be one of the following values:
-  *         @arg @ref LL_CRC_POLYLENGTH_32B
-  *         @arg @ref LL_CRC_POLYLENGTH_16B
-  *         @arg @ref LL_CRC_POLYLENGTH_8B
-  *         @arg @ref LL_CRC_POLYLENGTH_7B
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRC_SetPolynomialSize(CRC_TypeDef *CRCx, uint32_t PolySize)
-{
-  MODIFY_REG(CRCx->CR, CRC_CR_POLYSIZE, PolySize);
-}
-
-/**
-  * @brief  Return size of the polynomial.
-  * @rmtoll CR           POLYSIZE      LL_CRC_GetPolynomialSize
-  * @param  CRCx CRC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_CRC_POLYLENGTH_32B
-  *         @arg @ref LL_CRC_POLYLENGTH_16B
-  *         @arg @ref LL_CRC_POLYLENGTH_8B
-  *         @arg @ref LL_CRC_POLYLENGTH_7B
-  */
-__STATIC_INLINE uint32_t LL_CRC_GetPolynomialSize(CRC_TypeDef *CRCx)
-{
-  return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_POLYSIZE));
-}
-
-/**
-  * @brief  Configure the reversal of the bit order of the input data
-  * @rmtoll CR           REV_IN        LL_CRC_SetInputDataReverseMode
-  * @param  CRCx CRC Instance
-  * @param  ReverseMode This parameter can be one of the following values:
-  *         @arg @ref LL_CRC_INDATA_REVERSE_NONE
-  *         @arg @ref LL_CRC_INDATA_REVERSE_BYTE
-  *         @arg @ref LL_CRC_INDATA_REVERSE_HALFWORD
-  *         @arg @ref LL_CRC_INDATA_REVERSE_WORD
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRC_SetInputDataReverseMode(CRC_TypeDef *CRCx, uint32_t ReverseMode)
-{
-  MODIFY_REG(CRCx->CR, CRC_CR_REV_IN, ReverseMode);
-}
-
-/**
-  * @brief  Return type of reversal for input data bit order
-  * @rmtoll CR           REV_IN        LL_CRC_GetInputDataReverseMode
-  * @param  CRCx CRC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_CRC_INDATA_REVERSE_NONE
-  *         @arg @ref LL_CRC_INDATA_REVERSE_BYTE
-  *         @arg @ref LL_CRC_INDATA_REVERSE_HALFWORD
-  *         @arg @ref LL_CRC_INDATA_REVERSE_WORD
-  */
-__STATIC_INLINE uint32_t LL_CRC_GetInputDataReverseMode(CRC_TypeDef *CRCx)
-{
-  return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_IN));
-}
-
-/**
-  * @brief  Configure the reversal of the bit order of the Output data
-  * @rmtoll CR           REV_OUT       LL_CRC_SetOutputDataReverseMode
-  * @param  CRCx CRC Instance
-  * @param  ReverseMode This parameter can be one of the following values:
-  *         @arg @ref LL_CRC_OUTDATA_REVERSE_NONE
-  *         @arg @ref LL_CRC_OUTDATA_REVERSE_BIT
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRC_SetOutputDataReverseMode(CRC_TypeDef *CRCx, uint32_t ReverseMode)
-{
-  MODIFY_REG(CRCx->CR, CRC_CR_REV_OUT, ReverseMode);
-}
-
-/**
-  * @brief  Configure the reversal of the bit order of the Output data
-  * @rmtoll CR           REV_OUT       LL_CRC_GetOutputDataReverseMode
-  * @param  CRCx CRC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_CRC_OUTDATA_REVERSE_NONE
-  *         @arg @ref LL_CRC_OUTDATA_REVERSE_BIT
-  */
-__STATIC_INLINE uint32_t LL_CRC_GetOutputDataReverseMode(CRC_TypeDef *CRCx)
-{
-  return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_OUT));
-}
-
-/**
-  * @brief  Initialize the Programmable initial CRC value.
-  * @note   If the CRC size is less than 32 bits, the least significant bits
-  *         are used to write the correct value
-  * @note   LL_CRC_DEFAULT_CRC_INITVALUE could be used as value for InitCrc parameter.
-  * @rmtoll INIT         INIT          LL_CRC_SetInitialData
-  * @param  CRCx CRC Instance
-  * @param  InitCrc Value to be programmed in Programmable initial CRC value register
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRC_SetInitialData(CRC_TypeDef *CRCx, uint32_t InitCrc)
-{
-  WRITE_REG(CRCx->INIT, InitCrc);
-}
-
-/**
-  * @brief  Return current Initial CRC value.
-  * @note   If the CRC size is less than 32 bits, the least significant bits
-  *         are used to read the correct value
-  * @rmtoll INIT         INIT          LL_CRC_GetInitialData
-  * @param  CRCx CRC Instance
-  * @retval Value programmed in Programmable initial CRC value register
-  */
-__STATIC_INLINE uint32_t LL_CRC_GetInitialData(CRC_TypeDef *CRCx)
-{
-  return (uint32_t)(READ_REG(CRCx->INIT));
-}
-
-/**
-  * @brief  Initialize the Programmable polynomial value
-  *         (coefficients of the polynomial to be used for CRC calculation).
-  * @note   LL_CRC_DEFAULT_CRC32_POLY could be used as value for PolynomCoef parameter.
-  * @note   Please check Reference Manual and existing Errata Sheets,
-  *         regarding possible limitations for Polynomial values usage.
-  *         For example, for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65
-  * @rmtoll POL          POL           LL_CRC_SetPolynomialCoef
-  * @param  CRCx CRC Instance
-  * @param  PolynomCoef Value to be programmed in Programmable Polynomial value register
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRC_SetPolynomialCoef(CRC_TypeDef *CRCx, uint32_t PolynomCoef)
-{
-  WRITE_REG(CRCx->POL, PolynomCoef);
-}
-
-/**
-  * @brief  Return current Programmable polynomial value
-  * @note   Please check Reference Manual and existing Errata Sheets,
-  *         regarding possible limitations for Polynomial values usage.
-  *         For example, for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65
-  * @rmtoll POL          POL           LL_CRC_GetPolynomialCoef
-  * @param  CRCx CRC Instance
-  * @retval Value programmed in Programmable Polynomial value register
-  */
-__STATIC_INLINE uint32_t LL_CRC_GetPolynomialCoef(CRC_TypeDef *CRCx)
-{
-  return (uint32_t)(READ_REG(CRCx->POL));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup CRC_LL_EF_Data_Management Data_Management
-  * @{
-  */
-
-/**
-  * @brief  Write given 32-bit data to the CRC calculator
-  * @rmtoll DR           DR            LL_CRC_FeedData32
-  * @param  CRCx CRC Instance
-  * @param  InData value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFFFFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRC_FeedData32(CRC_TypeDef *CRCx, uint32_t InData)
-{
-  WRITE_REG(CRCx->DR, InData);
-}
-
-/**
-  * @brief  Write given 16-bit data to the CRC calculator
-  * @rmtoll DR           DR            LL_CRC_FeedData16
-  * @param  CRCx CRC Instance
-  * @param  InData 16 bit value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRC_FeedData16(CRC_TypeDef *CRCx, uint16_t InData)
-{
-  *(uint16_t __IO *)(&CRCx->DR) = (uint16_t) InData;
-}
-
-/**
-  * @brief  Write given 8-bit data to the CRC calculator
-  * @rmtoll DR           DR            LL_CRC_FeedData8
-  * @param  CRCx CRC Instance
-  * @param  InData 8 bit value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRC_FeedData8(CRC_TypeDef *CRCx, uint8_t InData)
-{
-  *(uint8_t __IO *)(&CRCx->DR) = (uint8_t) InData;
-}
-
-/**
-  * @brief  Return current CRC calculation result. 32 bits value is returned.
-  * @rmtoll DR           DR            LL_CRC_ReadData32
-  * @param  CRCx CRC Instance
-  * @retval Current CRC calculation result as stored in CRC_DR register (32 bits).
-  */
-__STATIC_INLINE uint32_t LL_CRC_ReadData32(CRC_TypeDef *CRCx)
-{
-  return (uint32_t)(READ_REG(CRCx->DR));
-}
-
-/**
-  * @brief  Return current CRC calculation result. 16 bits value is returned.
-  * @note   This function is expected to be used in a 16 bits CRC polynomial size context.
-  * @rmtoll DR           DR            LL_CRC_ReadData16
-  * @param  CRCx CRC Instance
-  * @retval Current CRC calculation result as stored in CRC_DR register (16 bits).
-  */
-__STATIC_INLINE uint16_t LL_CRC_ReadData16(CRC_TypeDef *CRCx)
-{
-  return (uint16_t)READ_REG(CRCx->DR);
-}
-
-/**
-  * @brief  Return current CRC calculation result. 8 bits value is returned.
-  * @note   This function is expected to be used in a 8 bits CRC polynomial size context.
-  * @rmtoll DR           DR            LL_CRC_ReadData8
-  * @param  CRCx CRC Instance
-  * @retval Current CRC calculation result as stored in CRC_DR register (8 bits).
-  */
-__STATIC_INLINE uint8_t LL_CRC_ReadData8(CRC_TypeDef *CRCx)
-{
-  return (uint8_t)READ_REG(CRCx->DR);
-}
-
-/**
-  * @brief  Return current CRC calculation result. 7 bits value is returned.
-  * @note   This function is expected to be used in a 7 bits CRC polynomial size context.
-  * @rmtoll DR           DR            LL_CRC_ReadData7
-  * @param  CRCx CRC Instance
-  * @retval Current CRC calculation result as stored in CRC_DR register (7 bits).
-  */
-__STATIC_INLINE uint8_t LL_CRC_ReadData7(CRC_TypeDef *CRCx)
-{
-  return (uint8_t)(READ_REG(CRCx->DR) & 0x7FU);
-}
-
-/**
-  * @brief  Return data stored in the Independent Data(IDR) register.
-  * @note   This register can be used as a temporary storage location for one byte.
-  * @rmtoll IDR          IDR           LL_CRC_Read_IDR
-  * @param  CRCx CRC Instance
-  * @retval Value stored in CRC_IDR register (General-purpose 8-bit data register).
-  */
-__STATIC_INLINE uint32_t LL_CRC_Read_IDR(CRC_TypeDef *CRCx)
-{
-  return (uint32_t)(READ_REG(CRCx->IDR));
-}
-
-/**
-  * @brief  Store data in the Independent Data(IDR) register.
-  * @note   This register can be used as a temporary storage location for one byte.
-  * @rmtoll IDR          IDR           LL_CRC_Write_IDR
-  * @param  CRCx CRC Instance
-  * @param  InData value to be stored in CRC_IDR register (8-bit) between between Min_Data=0 and Max_Data=0xFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRC_Write_IDR(CRC_TypeDef *CRCx, uint32_t InData)
-{
-  *((uint8_t __IO *)(&CRCx->IDR)) = (uint8_t) InData;
-}
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup CRC_LL_EF_Init Initialization and de-initialization functions
-  * @{
-  */
-
-ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx);
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined(CRC) */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_CRC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h
deleted file mode 100755
index 5706e829..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h
+++ /dev/null
@@ -1,814 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_crs.h
-  * @author  MCD Application Team
-  * @brief   Header file of CRS LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_CRS_H
-#define __STM32L0xx_LL_CRS_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined(CRS)
-
-/** @defgroup CRS_LL CRS
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup CRS_LL_Private_Constants CRS Private Constants
-  * @{
-  */
-
-/* Defines used for the bit position in the register and perform offsets*/
-#define CRS_POSITION_TRIM        (CRS_CR_TRIM_Pos)     /* bit position in CR reg */
-#define CRS_POSITION_FECAP       (CRS_ISR_FECAP_Pos)   /* bit position in ISR reg */
-#define CRS_POSITION_FELIM       (CRS_CFGR_FELIM_Pos)  /* bit position in CFGR reg */
-
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup CRS_LL_Exported_Constants CRS Exported Constants
-  * @{
-  */
-
-/** @defgroup CRS_LL_EC_GET_FLAG Get Flags Defines
-  * @brief    Flags defines which can be used with LL_CRS_ReadReg function
-  * @{
-  */
-#define LL_CRS_ISR_SYNCOKF                 CRS_ISR_SYNCOKF
-#define LL_CRS_ISR_SYNCWARNF               CRS_ISR_SYNCWARNF
-#define LL_CRS_ISR_ERRF                    CRS_ISR_ERRF
-#define LL_CRS_ISR_ESYNCF                  CRS_ISR_ESYNCF
-#define LL_CRS_ISR_SYNCERR                 CRS_ISR_SYNCERR
-#define LL_CRS_ISR_SYNCMISS                CRS_ISR_SYNCMISS
-#define LL_CRS_ISR_TRIMOVF                 CRS_ISR_TRIMOVF
-/**
-  * @}
-  */
-
-/** @defgroup CRS_LL_EC_IT IT Defines
-  * @brief    IT defines which can be used with LL_CRS_ReadReg and  LL_CRS_WriteReg functions
-  * @{
-  */
-#define LL_CRS_CR_SYNCOKIE                 CRS_CR_SYNCOKIE
-#define LL_CRS_CR_SYNCWARNIE               CRS_CR_SYNCWARNIE
-#define LL_CRS_CR_ERRIE                    CRS_CR_ERRIE
-#define LL_CRS_CR_ESYNCIE                  CRS_CR_ESYNCIE
-/**
-  * @}
-  */
-
-/** @defgroup CRS_LL_EC_SYNC_DIV Synchronization Signal Divider
-  * @{
-  */
-#define LL_CRS_SYNC_DIV_1                  ((uint32_t)0x00U)                         /*!< Synchro Signal not divided (default) */
-#define LL_CRS_SYNC_DIV_2                  CRS_CFGR_SYNCDIV_0                        /*!< Synchro Signal divided by 2 */
-#define LL_CRS_SYNC_DIV_4                  CRS_CFGR_SYNCDIV_1                        /*!< Synchro Signal divided by 4 */
-#define LL_CRS_SYNC_DIV_8                  (CRS_CFGR_SYNCDIV_1 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 8 */
-#define LL_CRS_SYNC_DIV_16                 CRS_CFGR_SYNCDIV_2                        /*!< Synchro Signal divided by 16 */
-#define LL_CRS_SYNC_DIV_32                 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 32 */
-#define LL_CRS_SYNC_DIV_64                 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_1) /*!< Synchro Signal divided by 64 */
-#define LL_CRS_SYNC_DIV_128                CRS_CFGR_SYNCDIV                          /*!< Synchro Signal divided by 128 */
-/**
-  * @}
-  */
-
-/** @defgroup CRS_LL_EC_SYNC_SOURCE Synchronization Signal Source
-  * @{
-  */
-#define LL_CRS_SYNC_SOURCE_GPIO            ((uint32_t)0x00U)       /*!< Synchro Signal soucre GPIO */
-#define LL_CRS_SYNC_SOURCE_LSE             CRS_CFGR_SYNCSRC_0      /*!< Synchro Signal source LSE */
-#define LL_CRS_SYNC_SOURCE_USB             CRS_CFGR_SYNCSRC_1      /*!< Synchro Signal source USB SOF (default)*/
-/**
-  * @}
-  */
-
-/** @defgroup CRS_LL_EC_SYNC_POLARITY Synchronization Signal Polarity
-  * @{
-  */
-#define LL_CRS_SYNC_POLARITY_RISING        ((uint32_t)0x00U)     /*!< Synchro Active on rising edge (default) */
-#define LL_CRS_SYNC_POLARITY_FALLING       CRS_CFGR_SYNCPOL      /*!< Synchro Active on falling edge */
-/**
-  * @}
-  */
-
-/** @defgroup CRS_LL_EC_FREQERRORDIR Frequency Error Direction
-  * @{
-  */
-#define LL_CRS_FREQ_ERROR_DIR_UP             ((uint32_t)0x00U)         /*!< Upcounting direction, the actual frequency is above the target */
-#define LL_CRS_FREQ_ERROR_DIR_DOWN           ((uint32_t)CRS_ISR_FEDIR) /*!< Downcounting direction, the actual frequency is below the target */
-/**
-  * @}
-  */
-
-/** @defgroup CRS_LL_EC_DEFAULTVALUES Default Values
-  * @{
-  */
-/**
-  * @brief Reset value of the RELOAD field
-  * @note The reset value of the RELOAD field corresponds to a target frequency of 48 MHz
-  *       and a synchronization signal frequency of 1 kHz (SOF signal from USB)
-  */
-#define LL_CRS_RELOADVALUE_DEFAULT         ((uint32_t)0xBB7FU)      
-
-/**
-  * @brief Reset value of Frequency error limit.
-  */
-#define LL_CRS_ERRORLIMIT_DEFAULT          ((uint32_t)0x22U)      
-
-/**
-  * @brief Reset value of the HSI48 Calibration field
-  * @note The default value is 32, which corresponds to the middle of the trimming interval. 
-  *       The trimming step is around 67 kHz between two consecutive TRIM steps. 
-  *       A higher TRIM value corresponds to a higher output frequency
-  */
-#define LL_CRS_HSI48CALIBRATION_DEFAULT    ((uint32_t)0x20U)      
-/**
-  * @}
-  */ 
-  
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup CRS_LL_Exported_Macros CRS Exported Macros
-  * @{
-  */
-
-/** @defgroup CRS_LL_EM_WRITE_READ Common Write and read registers Macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in CRS register
-  * @param  __INSTANCE__ CRS Instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_CRS_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in CRS register
-  * @param  __INSTANCE__ CRS Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_CRS_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-/** @defgroup CRS_LL_EM_Exported_Macros_Calculate_Reload Exported_Macros_Calculate_Reload
-  * @{
-  */
-
-/**
-  * @brief  Macro to calculate reload value to be set in CRS register according to target and sync frequencies
-  * @note   The RELOAD value should be selected according to the ratio between 
-  *         the target frequency and the frequency of the synchronization source after
-  *         prescaling. It is then decreased by one in order to reach the expected
-  *         synchronization on the zero value. The formula is the following:
-  *              RELOAD = (fTARGET / fSYNC) -1
-  * @param  __FTARGET__ Target frequency (value in Hz)
-  * @param  __FSYNC__ Synchronization signal frequency (value in Hz)
-  * @retval Reload value (in Hz)
-  */
-#define __LL_CRS_CALC_CALCULATE_RELOADVALUE(__FTARGET__, __FSYNC__) (((__FTARGET__) / (__FSYNC__)) - 1U)
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup CRS_LL_Exported_Functions CRS Exported Functions
-  * @{
-  */
-
-/** @defgroup CRS_LL_EF_Configuration Configuration
-  * @{
-  */
-
-/**
-  * @brief  Enable Frequency error counter
-  * @note When this bit is set, the CRS_CFGR register is write-protected and cannot be modified
-  * @rmtoll CR           CEN           LL_CRS_EnableFreqErrorCounter
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_EnableFreqErrorCounter(void)
-{
-  SET_BIT(CRS->CR, CRS_CR_CEN);
-}
-
-/**
-  * @brief  Disable Frequency error counter
-  * @rmtoll CR           CEN           LL_CRS_DisableFreqErrorCounter
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_DisableFreqErrorCounter(void)
-{
-  CLEAR_BIT(CRS->CR, CRS_CR_CEN);
-}
-
-/**
-  * @brief  Check if Frequency error counter is enabled or not
-  * @rmtoll CR           CEN           LL_CRS_IsEnabledFreqErrorCounter
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_CRS_IsEnabledFreqErrorCounter(void)
-{
-  return (READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN));
-}
-
-/**
-  * @brief  Enable Automatic trimming counter
-  * @rmtoll CR           AUTOTRIMEN    LL_CRS_EnableAutoTrimming
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_EnableAutoTrimming(void)
-{
-  SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN);
-}
-
-/**
-  * @brief  Disable Automatic trimming counter
-  * @rmtoll CR           AUTOTRIMEN    LL_CRS_DisableAutoTrimming
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_DisableAutoTrimming(void)
-{
-  CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN);
-}
-
-/**
-  * @brief  Check if Automatic trimming is enabled or not
-  * @rmtoll CR           AUTOTRIMEN    LL_CRS_IsEnabledAutoTrimming
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_CRS_IsEnabledAutoTrimming(void)
-{
-  return (READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN));
-}
-
-/**
-  * @brief  Set HSI48 oscillator smooth trimming
-  * @note   When the AUTOTRIMEN bit is set, this field is controlled by hardware and is read-only
-  * @rmtoll CR           TRIM          LL_CRS_SetHSI48SmoothTrimming
-  * @param  Value a number between Min_Data = 0 and Max_Data = 63
-  * @note   Default value can be set thanks to @ref LL_CRS_HSI48CALIBRATION_DEFAULT 
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_SetHSI48SmoothTrimming(uint32_t Value)
-{
-  MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_POSITION_TRIM);
-}
-
-/**
-  * @brief  Get HSI48 oscillator smooth trimming
-  * @rmtoll CR           TRIM          LL_CRS_GetHSI48SmoothTrimming
-  * @retval a number between Min_Data = 0 and Max_Data = 63
-  */
-__STATIC_INLINE uint32_t LL_CRS_GetHSI48SmoothTrimming(void)
-{
-  return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_POSITION_TRIM);
-}
-
-/**
-  * @brief  Set counter reload value
-  * @rmtoll CFGR         RELOAD        LL_CRS_SetReloadCounter
-  * @param  Value a number between Min_Data = 0 and Max_Data = 0xFFFF
-  * @note   Default value can be set thanks to @ref LL_CRS_RELOADVALUE_DEFAULT 
-  *         Otherwise it can be calculated in using macro @ref __LL_CRS_CALC_CALCULATE_RELOADVALUE (_FTARGET_, _FSYNC_)
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_SetReloadCounter(uint32_t Value)
-{
-  MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value);
-}
-
-/**
-  * @brief  Get counter reload value
-  * @rmtoll CFGR         RELOAD        LL_CRS_GetReloadCounter
-  * @retval a number between Min_Data = 0 and Max_Data = 0xFFFF
-  */
-__STATIC_INLINE uint32_t LL_CRS_GetReloadCounter(void)
-{
-  return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD));
-}
-
-/**
-  * @brief  Set frequency error limit
-  * @rmtoll CFGR         FELIM         LL_CRS_SetFreqErrorLimit
-  * @param  Value a number between Min_Data = 0 and Max_Data = 255
-  * @note   Default value can be set thanks to @ref LL_CRS_ERRORLIMIT_DEFAULT 
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_SetFreqErrorLimit(uint32_t Value)
-{
-  MODIFY_REG(CRS->CFGR, CRS_CFGR_FELIM, Value << CRS_POSITION_FELIM);
-}
-
-/**
-  * @brief  Get frequency error limit
-  * @rmtoll CFGR         FELIM         LL_CRS_GetFreqErrorLimit
-  * @retval A number between Min_Data = 0 and Max_Data = 255
-  */
-__STATIC_INLINE uint32_t LL_CRS_GetFreqErrorLimit(void)
-{
-  return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_FELIM) >> CRS_POSITION_FELIM);
-}
-
-/**
-  * @brief  Set division factor for SYNC signal
-  * @rmtoll CFGR         SYNCDIV       LL_CRS_SetSyncDivider
-  * @param  Divider This parameter can be one of the following values:
-  *         @arg @ref LL_CRS_SYNC_DIV_1
-  *         @arg @ref LL_CRS_SYNC_DIV_2
-  *         @arg @ref LL_CRS_SYNC_DIV_4
-  *         @arg @ref LL_CRS_SYNC_DIV_8
-  *         @arg @ref LL_CRS_SYNC_DIV_16
-  *         @arg @ref LL_CRS_SYNC_DIV_32
-  *         @arg @ref LL_CRS_SYNC_DIV_64
-  *         @arg @ref LL_CRS_SYNC_DIV_128
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_SetSyncDivider(uint32_t Divider)
-{
-  MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCDIV, Divider);
-}
-
-/**
-  * @brief  Get division factor for SYNC signal
-  * @rmtoll CFGR         SYNCDIV       LL_CRS_GetSyncDivider
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_CRS_SYNC_DIV_1
-  *         @arg @ref LL_CRS_SYNC_DIV_2
-  *         @arg @ref LL_CRS_SYNC_DIV_4
-  *         @arg @ref LL_CRS_SYNC_DIV_8
-  *         @arg @ref LL_CRS_SYNC_DIV_16
-  *         @arg @ref LL_CRS_SYNC_DIV_32
-  *         @arg @ref LL_CRS_SYNC_DIV_64
-  *         @arg @ref LL_CRS_SYNC_DIV_128
-  */
-__STATIC_INLINE uint32_t LL_CRS_GetSyncDivider(void)
-{
-  return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCDIV));
-}
-
-/**
-  * @brief  Set SYNC signal source
-  * @rmtoll CFGR         SYNCSRC       LL_CRS_SetSyncSignalSource
-  * @param  Source This parameter can be one of the following values:
-  *         @arg @ref LL_CRS_SYNC_SOURCE_GPIO
-  *         @arg @ref LL_CRS_SYNC_SOURCE_LSE
-  *         @arg @ref LL_CRS_SYNC_SOURCE_USB
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_SetSyncSignalSource(uint32_t Source)
-{
-  MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCSRC, Source);
-}
-
-/**
-  * @brief  Get SYNC signal source
-  * @rmtoll CFGR         SYNCSRC       LL_CRS_GetSyncSignalSource
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_CRS_SYNC_SOURCE_GPIO
-  *         @arg @ref LL_CRS_SYNC_SOURCE_LSE
-  *         @arg @ref LL_CRS_SYNC_SOURCE_USB
-  */
-__STATIC_INLINE uint32_t LL_CRS_GetSyncSignalSource(void)
-{
-  return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCSRC));
-}
-
-/**
-  * @brief  Set input polarity for the SYNC signal source
-  * @rmtoll CFGR         SYNCPOL       LL_CRS_SetSyncPolarity
-  * @param  Polarity This parameter can be one of the following values:
-  *         @arg @ref LL_CRS_SYNC_POLARITY_RISING
-  *         @arg @ref LL_CRS_SYNC_POLARITY_FALLING
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_SetSyncPolarity(uint32_t Polarity)
-{
-  MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCPOL, Polarity);
-}
-
-/**
-  * @brief  Get input polarity for the SYNC signal source
-  * @rmtoll CFGR         SYNCPOL       LL_CRS_GetSyncPolarity
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_CRS_SYNC_POLARITY_RISING
-  *         @arg @ref LL_CRS_SYNC_POLARITY_FALLING
-  */
-__STATIC_INLINE uint32_t LL_CRS_GetSyncPolarity(void)
-{
-  return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCPOL));
-}
-
-/**
-  * @brief  Configure CRS for the synchronization
-  * @rmtoll CR           TRIM          LL_CRS_ConfigSynchronization\n
-  *         CFGR         RELOAD        LL_CRS_ConfigSynchronization\n
-  *         CFGR         FELIM         LL_CRS_ConfigSynchronization\n
-  *         CFGR         SYNCDIV       LL_CRS_ConfigSynchronization\n
-  *         CFGR         SYNCSRC       LL_CRS_ConfigSynchronization\n
-  *         CFGR         SYNCPOL       LL_CRS_ConfigSynchronization
-  * @param  HSI48CalibrationValue a number between Min_Data = 0 and Max_Data = 63
-  * @param  ErrorLimitValue a number between Min_Data = 0 and Max_Data = 0xFFFF
-  * @param  ReloadValue a number between Min_Data = 0 and Max_Data = 255
-  * @param  Settings This parameter can be a combination of the following values:
-  *         @arg @ref LL_CRS_SYNC_DIV_1 or @ref LL_CRS_SYNC_DIV_2 or @ref LL_CRS_SYNC_DIV_4 or @ref LL_CRS_SYNC_DIV_8
-  *              or @ref LL_CRS_SYNC_DIV_16 or @ref LL_CRS_SYNC_DIV_32 or @ref LL_CRS_SYNC_DIV_64 or @ref LL_CRS_SYNC_DIV_128
-  *         @arg @ref LL_CRS_SYNC_SOURCE_GPIO or @ref LL_CRS_SYNC_SOURCE_LSE or @ref LL_CRS_SYNC_SOURCE_USB
-  *         @arg @ref LL_CRS_SYNC_POLARITY_RISING or @ref LL_CRS_SYNC_POLARITY_FALLING
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_ConfigSynchronization(uint32_t HSI48CalibrationValue, uint32_t ErrorLimitValue, uint32_t ReloadValue, uint32_t Settings)
-{
-  MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue);
-  MODIFY_REG(CRS->CFGR, 
-             CRS_CFGR_RELOAD | CRS_CFGR_FELIM | CRS_CFGR_SYNCDIV | CRS_CFGR_SYNCSRC | CRS_CFGR_SYNCPOL, 
-             ReloadValue | (ErrorLimitValue << CRS_POSITION_FELIM) | Settings);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup CRS_LL_EF_CRS_Management CRS_Management
-  * @{
-  */
-
-/**
-  * @brief  Generate software SYNC event
-  * @rmtoll CR           SWSYNC        LL_CRS_GenerateEvent_SWSYNC
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_GenerateEvent_SWSYNC(void)
-{
-  SET_BIT(CRS->CR, CRS_CR_SWSYNC);
-}
-
-/**
-  * @brief  Get the frequency error direction latched in the time of the last 
-  * SYNC event
-  * @rmtoll ISR          FEDIR         LL_CRS_GetFreqErrorDirection
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_CRS_FREQ_ERROR_DIR_UP
-  *         @arg @ref LL_CRS_FREQ_ERROR_DIR_DOWN
-  */
-__STATIC_INLINE uint32_t LL_CRS_GetFreqErrorDirection(void)
-{
-  return (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FEDIR));
-}
-
-/**
-  * @brief  Get the frequency error counter value latched in the time of the last SYNC event
-  * @rmtoll ISR          FECAP         LL_CRS_GetFreqErrorCapture
-  * @retval A number between Min_Data = 0x0000 and Max_Data = 0xFFFF
-  */
-__STATIC_INLINE uint32_t LL_CRS_GetFreqErrorCapture(void)
-{
-  return (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_POSITION_FECAP);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup CRS_LL_EF_FLAG_Management FLAG_Management
-  * @{
-  */
-
-/**
-  * @brief  Check if SYNC event OK signal occurred or not
-  * @rmtoll ISR          SYNCOKF       LL_CRS_IsActiveFlag_SYNCOK
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCOK(void)
-{
-  return (READ_BIT(CRS->ISR, CRS_ISR_SYNCOKF) == (CRS_ISR_SYNCOKF));
-}
-
-/**
-  * @brief  Check if SYNC warning signal occurred or not
-  * @rmtoll ISR          SYNCWARNF     LL_CRS_IsActiveFlag_SYNCWARN
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCWARN(void)
-{
-  return (READ_BIT(CRS->ISR, CRS_ISR_SYNCWARNF) == (CRS_ISR_SYNCWARNF));
-}
-
-/**
-  * @brief  Check if Synchronization or trimming error signal occurred or not
-  * @rmtoll ISR          ERRF          LL_CRS_IsActiveFlag_ERR
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_ERR(void)
-{
-  return (READ_BIT(CRS->ISR, CRS_ISR_ERRF) == (CRS_ISR_ERRF));
-}
-
-/**
-  * @brief  Check if Expected SYNC signal occurred or not
-  * @rmtoll ISR          ESYNCF        LL_CRS_IsActiveFlag_ESYNC
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_ESYNC(void)
-{
-  return (READ_BIT(CRS->ISR, CRS_ISR_ESYNCF) == (CRS_ISR_ESYNCF));
-}
-
-/**
-  * @brief  Check if SYNC error signal occurred or not
-  * @rmtoll ISR          SYNCERR       LL_CRS_IsActiveFlag_SYNCERR
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCERR(void)
-{
-  return (READ_BIT(CRS->ISR, CRS_ISR_SYNCERR) == (CRS_ISR_SYNCERR));
-}
-
-/**
-  * @brief  Check if SYNC missed error signal occurred or not
-  * @rmtoll ISR          SYNCMISS      LL_CRS_IsActiveFlag_SYNCMISS
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCMISS(void)
-{
-  return (READ_BIT(CRS->ISR, CRS_ISR_SYNCMISS) == (CRS_ISR_SYNCMISS));
-}
-
-/**
-  * @brief  Check if Trimming overflow or underflow occurred or not
-  * @rmtoll ISR          TRIMOVF       LL_CRS_IsActiveFlag_TRIMOVF
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_TRIMOVF(void)
-{
-  return (READ_BIT(CRS->ISR, CRS_ISR_TRIMOVF) == (CRS_ISR_TRIMOVF));
-}
-
-/**
-  * @brief  Clear the SYNC event OK flag
-  * @rmtoll ICR          SYNCOKC       LL_CRS_ClearFlag_SYNCOK
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_ClearFlag_SYNCOK(void)
-{
-  WRITE_REG(CRS->ICR, CRS_ICR_SYNCOKC);
-}
-
-/**
-  * @brief  Clear the  SYNC warning flag
-  * @rmtoll ICR          SYNCWARNC     LL_CRS_ClearFlag_SYNCWARN
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_ClearFlag_SYNCWARN(void)
-{
-  WRITE_REG(CRS->ICR, CRS_ICR_SYNCWARNC);
-}
-
-/**
-  * @brief  Clear TRIMOVF, SYNCMISS and SYNCERR bits and consequently also 
-  * the ERR flag
-  * @rmtoll ICR          ERRC          LL_CRS_ClearFlag_ERR
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_ClearFlag_ERR(void)
-{
-  WRITE_REG(CRS->ICR, CRS_ICR_ERRC);
-}
-
-/**
-  * @brief  Clear Expected SYNC flag
-  * @rmtoll ICR          ESYNCC        LL_CRS_ClearFlag_ESYNC
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_ClearFlag_ESYNC(void)
-{
-  WRITE_REG(CRS->ICR, CRS_ICR_ESYNCC);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup CRS_LL_EF_IT_Management IT_Management
-  * @{
-  */
-
-/**
-  * @brief  Enable SYNC event OK interrupt
-  * @rmtoll CR           SYNCOKIE      LL_CRS_EnableIT_SYNCOK
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_EnableIT_SYNCOK(void)
-{
-  SET_BIT(CRS->CR, CRS_CR_SYNCOKIE);
-}
-
-/**
-  * @brief  Disable SYNC event OK interrupt
-  * @rmtoll CR           SYNCOKIE      LL_CRS_DisableIT_SYNCOK
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_DisableIT_SYNCOK(void)
-{
-  CLEAR_BIT(CRS->CR, CRS_CR_SYNCOKIE);
-}
-
-/**
-  * @brief  Check if SYNC event OK interrupt is enabled or not
-  * @rmtoll CR           SYNCOKIE      LL_CRS_IsEnabledIT_SYNCOK
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_SYNCOK(void)
-{
-  return (READ_BIT(CRS->CR, CRS_CR_SYNCOKIE) == (CRS_CR_SYNCOKIE));
-}
-
-/**
-  * @brief  Enable SYNC warning interrupt
-  * @rmtoll CR           SYNCWARNIE    LL_CRS_EnableIT_SYNCWARN
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_EnableIT_SYNCWARN(void)
-{
-  SET_BIT(CRS->CR, CRS_CR_SYNCWARNIE);
-}
-
-/**
-  * @brief  Disable SYNC warning interrupt
-  * @rmtoll CR           SYNCWARNIE    LL_CRS_DisableIT_SYNCWARN
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_DisableIT_SYNCWARN(void)
-{
-  CLEAR_BIT(CRS->CR, CRS_CR_SYNCWARNIE);
-}
-
-/**
-  * @brief  Check if SYNC warning interrupt is enabled or not
-  * @rmtoll CR           SYNCWARNIE    LL_CRS_IsEnabledIT_SYNCWARN
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_SYNCWARN(void)
-{
-  return (READ_BIT(CRS->CR, CRS_CR_SYNCWARNIE) == (CRS_CR_SYNCWARNIE));
-}
-
-/**
-  * @brief  Enable Synchronization or trimming error interrupt
-  * @rmtoll CR           ERRIE         LL_CRS_EnableIT_ERR
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_EnableIT_ERR(void)
-{
-  SET_BIT(CRS->CR, CRS_CR_ERRIE);
-}
-
-/**
-  * @brief  Disable Synchronization or trimming error interrupt
-  * @rmtoll CR           ERRIE         LL_CRS_DisableIT_ERR
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_DisableIT_ERR(void)
-{
-  CLEAR_BIT(CRS->CR, CRS_CR_ERRIE);
-}
-
-/**
-  * @brief  Check if Synchronization or trimming error interrupt is enabled or not
-  * @rmtoll CR           ERRIE         LL_CRS_IsEnabledIT_ERR
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_ERR(void)
-{
-  return (READ_BIT(CRS->CR, CRS_CR_ERRIE) == (CRS_CR_ERRIE));
-}
-
-/**
-  * @brief  Enable Expected SYNC interrupt
-  * @rmtoll CR           ESYNCIE       LL_CRS_EnableIT_ESYNC
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_EnableIT_ESYNC(void)
-{
-  SET_BIT(CRS->CR, CRS_CR_ESYNCIE);
-}
-
-/**
-  * @brief  Disable Expected SYNC interrupt
-  * @rmtoll CR           ESYNCIE       LL_CRS_DisableIT_ESYNC
-  * @retval None
-  */
-__STATIC_INLINE void LL_CRS_DisableIT_ESYNC(void)
-{
-  CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE);
-}
-
-/**
-  * @brief  Check if Expected SYNC interrupt is enabled or not
-  * @rmtoll CR           ESYNCIE       LL_CRS_IsEnabledIT_ESYNC
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_ESYNC(void)
-{
-  return (READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE));
-}
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup CRS_LL_EF_Init Initialization and de-initialization functions
-  * @{
-  */
-  
-ErrorStatus LL_CRS_DeInit(void);
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined(CRS) */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_CRS_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dac.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dac.h
deleted file mode 100755
index 90fbb079..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dac.h
+++ /dev/null
@@ -1,1434 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_dac.h
-  * @author  MCD Application Team
-  * @brief   Header file of DAC LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_DAC_H
-#define __STM32L0xx_LL_DAC_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (DAC1)
-
-/** @defgroup DAC_LL DAC
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup DAC_LL_Private_Constants DAC Private Constants
-  * @{
-  */
-
-/* Internal masks for DAC channels definition */
-/* To select into literal LL_DAC_CHANNEL_x the relevant bits for:             */
-/* - channel bits position into register CR                                   */
-/* - channel bits position into register SWTRIG                               */
-/* - channel register offset of data holding register DHRx                    */
-/* - channel register offset of data output register DORx                     */
-#define DAC_CR_CH1_BITOFFSET           0U    /* Position of channel bits into registers CR, MCR, CCR, SHHR, SHRR of channel 1 */
-#define DAC_CR_CH2_BITOFFSET           16U   /* Position of channel bits into registers CR, MCR, CCR, SHHR, SHRR of channel 2 */
-#define DAC_CR_CHX_BITOFFSET_MASK      (DAC_CR_CH1_BITOFFSET | DAC_CR_CH2_BITOFFSET)
-
-#define DAC_SWTR_CH1                   (DAC_SWTRIGR_SWTRIG1) /* Channel bit into register SWTRIGR of channel 1. This bit is into area of LL_DAC_CR_CHx_BITOFFSET but excluded by mask DAC_CR_CHX_BITOFFSET_MASK (done to be enable to trig SW start of both DAC channels simultaneously). */
-#if defined(DAC_CHANNEL2_SUPPORT)
-#define DAC_SWTR_CH2                   (DAC_SWTRIGR_SWTRIG2) /* Channel bit into register SWTRIGR of channel 2. This bit is into area of LL_DAC_CR_CHx_BITOFFSET but excluded by mask DAC_CR_CHX_BITOFFSET_MASK (done to be enable to trig SW start of both DAC channels simultaneously). */
-#define DAC_SWTR_CHX_MASK              (DAC_SWTR_CH1 | DAC_SWTR_CH2)
-#else
-#define DAC_SWTR_CHX_MASK              (DAC_SWTR_CH1)
-#endif /* DAC_CHANNEL2_SUPPORT */
-
-#define DAC_REG_DHR12R1_REGOFFSET      0x00000000U             /* Register DHR12Rx channel 1 taken as reference */
-#define DAC_REG_DHR12L1_REGOFFSET      0x00100000U             /* Register offset of DHR12Lx channel 1 versus DHR12Rx channel 1 (shifted left of 20 bits) */
-#define DAC_REG_DHR8R1_REGOFFSET       0x02000000U             /* Register offset of DHR8Rx  channel 1 versus DHR12Rx channel 1 (shifted left of 24 bits) */
-#if defined(DAC_CHANNEL2_SUPPORT)
-#define DAC_REG_DHR12R2_REGOFFSET      0x00030000U             /* Register offset of DHR12Rx channel 2 versus DHR12Rx channel 1 (shifted left of 16 bits) */
-#define DAC_REG_DHR12L2_REGOFFSET      0x00400000U             /* Register offset of DHR12Lx channel 2 versus DHR12Rx channel 1 (shifted left of 20 bits) */
-#define DAC_REG_DHR8R2_REGOFFSET       0x05000000U             /* Register offset of DHR8Rx  channel 2 versus DHR12Rx channel 1 (shifted left of 24 bits) */
-#endif /* DAC_CHANNEL2_SUPPORT */
-#define DAC_REG_DHR12RX_REGOFFSET_MASK 0x000F0000U
-#define DAC_REG_DHR12LX_REGOFFSET_MASK 0x00F00000U
-#define DAC_REG_DHR8RX_REGOFFSET_MASK  0x0F000000U
-#define DAC_REG_DHRX_REGOFFSET_MASK    (DAC_REG_DHR12RX_REGOFFSET_MASK | DAC_REG_DHR12LX_REGOFFSET_MASK | DAC_REG_DHR8RX_REGOFFSET_MASK)
-
-#define DAC_REG_DOR1_REGOFFSET         0x00000000U             /* Register DORx channel 1 taken as reference */
-#if defined(DAC_CHANNEL2_SUPPORT)
-#define DAC_REG_DOR2_REGOFFSET         0x10000000U             /* Register offset of DORx channel 1 versus DORx channel 2 (shifted left of 28 bits) */
-#define DAC_REG_DORX_REGOFFSET_MASK    (DAC_REG_DOR1_REGOFFSET | DAC_REG_DOR2_REGOFFSET)
-#else
-#define DAC_REG_DORX_REGOFFSET_MASK    (DAC_REG_DOR1_REGOFFSET)
-#endif /* DAC_CHANNEL2_SUPPORT */
-
-#define DAC_REG_REGOFFSET_MASK_POSBIT0             0x0000000FU  /* Mask of registers offset (DHR12Rx, DHR12Lx, DHR8Rx, DORx, ...) when shifted to position 0 */
-
-#define DAC_REG_DHR12RX_REGOFFSET_BITOFFSET_POS           16U   /* Position of bits register offset of DHR12Rx channel 1 or 2 versus DHR12Rx channel 1 (shifted left of 16 bits) */
-#define DAC_REG_DHR12LX_REGOFFSET_BITOFFSET_POS           20U   /* Position of bits register offset of DHR12Lx channel 1 or 2 versus DHR12Rx channel 1 (shifted left of 20 bits) */
-#define DAC_REG_DHR8RX_REGOFFSET_BITOFFSET_POS            24U   /* Position of bits register offset of DHR8Rx  channel 1 or 2 versus DHR12Rx channel 1 (shifted left of 24 bits) */
-#define DAC_REG_DORX_REGOFFSET_BITOFFSET_POS              28U   /* Position of bits register offset of DORx channel 1 or 2 versus DORx channel 1 (shifted left of 28 bits) */
-
-/* DAC registers bits positions */
-#if defined(DAC_CHANNEL2_SUPPORT)
-#define DAC_DHR12RD_DACC2DHR_BITOFFSET_POS                16U  /* Value equivalent to POSITION_VAL(DAC_DHR12RD_DACC2DHR) */
-#define DAC_DHR12LD_DACC2DHR_BITOFFSET_POS                20U  /* Value equivalent to POSITION_VAL(DAC_DHR12LD_DACC2DHR) */
-#define DAC_DHR8RD_DACC2DHR_BITOFFSET_POS                  8U  /* Value equivalent to POSITION_VAL(DAC_DHR8RD_DACC2DHR) */
-#endif /* DAC_CHANNEL2_SUPPORT */
-
-/* Miscellaneous data */
-#define DAC_DIGITAL_SCALE_12BITS                        4095U  /* Full-scale digital value with a resolution of 12 bits (voltage range determined by analog voltage references Vref+ and Vref-, refer to reference manual) */
-
-/**
-  * @}
-  */
-
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup DAC_LL_Private_Macros DAC Private Macros
-  * @{
-  */
-
-/**
-  * @brief  Driver macro reserved for internal use: set a pointer to
-  *         a register from a register basis from which an offset
-  *         is applied.
-  * @param  __REG__ Register basis from which the offset is applied.
-  * @param  __REG_OFFFSET__ Offset to be applied (unit: number of registers).
-  * @retval Pointer to register address
-*/
-#define __DAC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__)                         \
- ((uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2U))))
-
-/**
-  * @}
-  */
-
-
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup DAC_LL_ES_INIT DAC Exported Init structure
-  * @{
-  */
-
-/**
-  * @brief  Structure definition of some features of DAC instance.
-  */
-typedef struct
-{
-  uint32_t TriggerSource;               /*!< Set the conversion trigger source for the selected DAC channel: internal (SW start) or from external IP (timer event, external interrupt line).
-                                             This parameter can be a value of @ref DAC_LL_EC_TRIGGER_SOURCE
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_DAC_SetTriggerSource(). */
-
-  uint32_t WaveAutoGeneration;          /*!< Set the waveform automatic generation mode for the selected DAC channel.
-                                             This parameter can be a value of @ref DAC_LL_EC_WAVE_AUTO_GENERATION_MODE
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_DAC_SetWaveAutoGeneration(). */
-
-  uint32_t WaveAutoGenerationConfig;    /*!< Set the waveform automatic generation mode for the selected DAC channel.
-                                             If waveform automatic generation mode is set to noise, this parameter can be a value of @ref DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS
-                                             If waveform automatic generation mode is set to triangle, this parameter can be a value of @ref DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE
-                                             @note If waveform automatic generation mode is disabled, this parameter is discarded.
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_DAC_SetWaveNoiseLFSR() or @ref LL_DAC_SetWaveTriangleAmplitude(), depending on the wave automatic generation selected. */
-
-  uint32_t OutputBuffer;                /*!< Set the output buffer for the selected DAC channel.
-                                             This parameter can be a value of @ref DAC_LL_EC_OUTPUT_BUFFER
-                                             
-                                             This feature can be modified afterwards using unitary function @ref LL_DAC_SetOutputBuffer(). */
-
-} LL_DAC_InitTypeDef;
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup DAC_LL_Exported_Constants DAC Exported Constants
-  * @{
-  */
-
-/** @defgroup DAC_LL_EC_GET_FLAG DAC flags
-  * @brief    Flags defines which can be used with LL_DAC_ReadReg function
-  * @{
-  */
-/* DAC channel 1 flags */
-#define LL_DAC_FLAG_DMAUDR1                (DAC_SR_DMAUDR1)   /*!< DAC channel 1 flag DMA underrun */
-
-#if defined(DAC_CHANNEL2_SUPPORT)
-/* DAC channel 2 flags */
-#define LL_DAC_FLAG_DMAUDR2                (DAC_SR_DMAUDR2)   /*!< DAC channel 2 flag DMA underrun */
-#endif /* DAC_CHANNEL2_SUPPORT */
-/**
-  * @}
-  */
-
-/** @defgroup DAC_LL_EC_IT DAC interruptions
-  * @brief    IT defines which can be used with LL_DAC_ReadReg and  LL_DAC_WriteReg functions
-  * @{
-  */
-#define LL_DAC_IT_DMAUDRIE1                (DAC_CR_DMAUDRIE1) /*!< DAC channel 1 interruption DMA underrun */
-#if defined(DAC_CHANNEL2_SUPPORT)
-#define LL_DAC_IT_DMAUDRIE2                (DAC_CR_DMAUDRIE2) /*!< DAC channel 2 interruption DMA underrun */
-#endif /* DAC_CHANNEL2_SUPPORT */
-/**
-  * @}
-  */
-
-/** @defgroup DAC_LL_EC_CHANNEL DAC channels
-  * @{
-  */
-#define LL_DAC_CHANNEL_1                   (DAC_REG_DOR1_REGOFFSET | DAC_REG_DHR12R1_REGOFFSET | DAC_REG_DHR12L1_REGOFFSET | DAC_REG_DHR8R1_REGOFFSET | DAC_CR_CH1_BITOFFSET | DAC_SWTR_CH1) /*!< DAC channel 1 */
-#if defined(DAC_CHANNEL2_SUPPORT)
-#define LL_DAC_CHANNEL_2                   (DAC_REG_DOR2_REGOFFSET | DAC_REG_DHR12R2_REGOFFSET | DAC_REG_DHR12L2_REGOFFSET | DAC_REG_DHR8R2_REGOFFSET | DAC_CR_CH2_BITOFFSET | DAC_SWTR_CH2) /*!< DAC channel 2 */
-#endif /* DAC_CHANNEL2_SUPPORT */
-/**
-  * @}
-  */
-
-/** @defgroup DAC_LL_EC_TRIGGER_SOURCE DAC trigger source
-  * @{
-  */
-#define LL_DAC_TRIG_SOFTWARE               (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger internal (SW start) */
-#define LL_DAC_TRIG_EXT_TIM2_TRGO          (DAC_CR_TSEL1_2                                  ) /*!< DAC channel conversion trigger from external IP: TIM2 TRGO. */
-#define LL_DAC_TRIG_EXT_TIM3_TRGO          (                                  DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: TIM3 TRGO. */
-#define LL_DAC_TRIG_EXT_TIM3_CH3           (                 DAC_CR_TSEL1_1                 ) /*!< DAC channel conversion trigger from external IP: TIM3 CH3 event. */
-#define LL_DAC_TRIG_EXT_TIM6_TRGO          0x00000000U                                        /*!< DAC channel conversion trigger from external IP: TIM6 TRGO. */
-#define LL_DAC_TRIG_EXT_TIM7_TRGO          (DAC_CR_TSEL1_2                  | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: TIM7 TRGO. */
-#define LL_DAC_TRIG_EXT_TIM21_TRGO         (                 DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: TIM21 TRGO. */
-#define LL_DAC_TRIG_EXT_EXTI_LINE9         (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1                 ) /*!< DAC channel conversion trigger from external IP: external interrupt line 9. */
-/**
-  * @}
-  */
-
-/** @defgroup DAC_LL_EC_WAVE_AUTO_GENERATION_MODE DAC waveform automatic generation mode
-  * @{
-  */
-#define LL_DAC_WAVE_AUTO_GENERATION_NONE     0x00000000U             /*!< DAC channel wave auto generation mode disabled. */
-#define LL_DAC_WAVE_AUTO_GENERATION_NOISE    (DAC_CR_WAVE1_0)        /*!< DAC channel wave auto generation mode enabled, set generated noise waveform. */
-#define LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE (DAC_CR_WAVE1_1)        /*!< DAC channel wave auto generation mode enabled, set generated triangle waveform. */
-/**
-  * @}
-  */
-
-/** @defgroup DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS DAC wave generation - Noise LFSR unmask bits
-  * @{
-  */
-#define LL_DAC_NOISE_LFSR_UNMASK_BIT0      0x00000000U                                                         /*!< Noise wave generation, unmask LFSR bit0, for the selected DAC channel */
-#define LL_DAC_NOISE_LFSR_UNMASK_BITS1_0   (                                                   DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[1:0], for the selected DAC channel */
-#define LL_DAC_NOISE_LFSR_UNMASK_BITS2_0   (                                  DAC_CR_MAMP1_1                 ) /*!< Noise wave generation, unmask LFSR bits[2:0], for the selected DAC channel */
-#define LL_DAC_NOISE_LFSR_UNMASK_BITS3_0   (                                  DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[3:0], for the selected DAC channel */
-#define LL_DAC_NOISE_LFSR_UNMASK_BITS4_0   (                 DAC_CR_MAMP1_2                                  ) /*!< Noise wave generation, unmask LFSR bits[4:0], for the selected DAC channel */
-#define LL_DAC_NOISE_LFSR_UNMASK_BITS5_0   (                 DAC_CR_MAMP1_2                  | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[5:0], for the selected DAC channel */
-#define LL_DAC_NOISE_LFSR_UNMASK_BITS6_0   (                 DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1                 ) /*!< Noise wave generation, unmask LFSR bits[6:0], for the selected DAC channel */
-#define LL_DAC_NOISE_LFSR_UNMASK_BITS7_0   (                 DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[7:0], for the selected DAC channel */
-#define LL_DAC_NOISE_LFSR_UNMASK_BITS8_0   (DAC_CR_MAMP1_3                                                   ) /*!< Noise wave generation, unmask LFSR bits[8:0], for the selected DAC channel */
-#define LL_DAC_NOISE_LFSR_UNMASK_BITS9_0   (DAC_CR_MAMP1_3                                   | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[9:0], for the selected DAC channel */
-#define LL_DAC_NOISE_LFSR_UNMASK_BITS10_0  (DAC_CR_MAMP1_3                  | DAC_CR_MAMP1_1                 ) /*!< Noise wave generation, unmask LFSR bits[10:0], for the selected DAC channel */
-#define LL_DAC_NOISE_LFSR_UNMASK_BITS11_0  (DAC_CR_MAMP1_3                  | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[11:0], for the selected DAC channel */
-/**
-  * @}
-  */
-
-/** @defgroup DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE DAC wave generation - Triangle amplitude
-  * @{
-  */
-#define LL_DAC_TRIANGLE_AMPLITUDE_1        0x00000000U                                                         /*!< Triangle wave generation, amplitude of 1 LSB of DAC output range, for the selected DAC channel */
-#define LL_DAC_TRIANGLE_AMPLITUDE_3        (                                                   DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 3 LSB of DAC output range, for the selected DAC channel */
-#define LL_DAC_TRIANGLE_AMPLITUDE_7        (                                  DAC_CR_MAMP1_1                 ) /*!< Triangle wave generation, amplitude of 7 LSB of DAC output range, for the selected DAC channel */
-#define LL_DAC_TRIANGLE_AMPLITUDE_15       (                                  DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 15 LSB of DAC output range, for the selected DAC channel */
-#define LL_DAC_TRIANGLE_AMPLITUDE_31       (                 DAC_CR_MAMP1_2                                  ) /*!< Triangle wave generation, amplitude of 31 LSB of DAC output range, for the selected DAC channel */
-#define LL_DAC_TRIANGLE_AMPLITUDE_63       (                 DAC_CR_MAMP1_2                  | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 63 LSB of DAC output range, for the selected DAC channel */
-#define LL_DAC_TRIANGLE_AMPLITUDE_127      (                 DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1                 ) /*!< Triangle wave generation, amplitude of 127 LSB of DAC output range, for the selected DAC channel */
-#define LL_DAC_TRIANGLE_AMPLITUDE_255      (                 DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 255 LSB of DAC output range, for the selected DAC channel */
-#define LL_DAC_TRIANGLE_AMPLITUDE_511      (DAC_CR_MAMP1_3                                                   ) /*!< Triangle wave generation, amplitude of 512 LSB of DAC output range, for the selected DAC channel */
-#define LL_DAC_TRIANGLE_AMPLITUDE_1023     (DAC_CR_MAMP1_3                                   | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 1023 LSB of DAC output range, for the selected DAC channel */
-#define LL_DAC_TRIANGLE_AMPLITUDE_2047     (DAC_CR_MAMP1_3                  | DAC_CR_MAMP1_1                 ) /*!< Triangle wave generation, amplitude of 2047 LSB of DAC output range, for the selected DAC channel */
-#define LL_DAC_TRIANGLE_AMPLITUDE_4095     (DAC_CR_MAMP1_3                  | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 4095 LSB of DAC output range, for the selected DAC channel */
-/**
-  * @}
-  */
-
-/** @defgroup DAC_LL_EC_OUTPUT_BUFFER DAC channel output buffer
-  * @{
-  */
-#define LL_DAC_OUTPUT_BUFFER_ENABLE        0x00000000U             /*!< The selected DAC channel output is buffered: higher drive current capability, but also higher current consumption */
-#define LL_DAC_OUTPUT_BUFFER_DISABLE       (DAC_CR_BOFF1)          /*!< The selected DAC channel output is not buffered: lower drive current capability, but also lower current consumption */
-/**
-  * @}
-  */
-
-
-/** @defgroup DAC_LL_EC_RESOLUTION  DAC channel output resolution
-  * @{
-  */
-#define LL_DAC_RESOLUTION_12B              0x00000000U             /*!< DAC channel resolution 12 bits */
-#define LL_DAC_RESOLUTION_8B               0x00000002U             /*!< DAC channel resolution 8 bits */
-/**
-  * @}
-  */
-
-/** @defgroup DAC_LL_EC_REGISTERS  DAC registers compliant with specific purpose
-  * @{
-  */
-/* List of DAC registers intended to be used (most commonly) with             */
-/* DMA transfer.                                                              */
-/* Refer to function @ref LL_DAC_DMA_GetRegAddr().                            */
-#define LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED  DAC_REG_DHR12RX_REGOFFSET_BITOFFSET_POS /*!< DAC channel data holding register 12 bits right aligned */
-#define LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED   DAC_REG_DHR12LX_REGOFFSET_BITOFFSET_POS /*!< DAC channel data holding register 12 bits left aligned */
-#define LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED   DAC_REG_DHR8RX_REGOFFSET_BITOFFSET_POS  /*!< DAC channel data holding register 8 bits right aligned */
-/**
-  * @}
-  */
-
-/** @defgroup DAC_LL_EC_HW_DELAYS  Definitions of DAC hardware constraints delays
-  * @note   Only DAC IP HW delays are defined in DAC LL driver driver,
-  *         not timeout values.
-  *         For details on delays values, refer to descriptions in source code
-  *         above each literal definition.
-  * @{
-  */
-
-/* Delay for DAC channel voltage settling time from DAC channel startup       */
-/* (transition from disable to enable).                                       */
-/* Note: DAC channel startup time depends on board application environment:   */
-/*       impedance connected to DAC channel output.                           */
-/*       The delay below is specified under conditions:                       */
-/*        - voltage maximum transition (lowest to highest value)              */
-/*        - until voltage reaches final value +-1LSB                          */
-/*        - DAC channel output buffer enabled                                 */
-/*        - load impedance of 5kOhm (min), 50pF (max)                         */
-/* Literal set to maximum value (refer to device datasheet,                   */
-/* parameter "tWAKEUP").                                                      */
-/* Unit: us                                                                   */
-#define LL_DAC_DELAY_STARTUP_VOLTAGE_SETTLING_US             15U  /*!< Delay for DAC channel voltage settling time from DAC channel startup (transition from disable to enable) */
-
-/* Delay for DAC channel voltage settling time.                               */
-/* Note: DAC channel startup time depends on board application environment:   */
-/*       impedance connected to DAC channel output.                           */
-/*       The delay below is specified under conditions:                       */
-/*        - voltage maximum transition (lowest to highest value)              */
-/*        - until voltage reaches final value +-1LSB                          */
-/*        - DAC channel output buffer enabled                                 */
-/*        - load impedance of 5kOhm min, 50pF max                             */
-/* Literal set to maximum value (refer to device datasheet,                   */
-/* parameter "tSETTLING").                                                    */
-/* Unit: us                                                                   */
-#define LL_DAC_DELAY_VOLTAGE_SETTLING_US                    12U  /*!< Delay for DAC channel voltage settling time */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup DAC_LL_Exported_Macros DAC Exported Macros
-  * @{
-  */
-
-/** @defgroup DAC_LL_EM_WRITE_READ Common write and read registers macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in DAC register
-  * @param  __INSTANCE__ DAC Instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_DAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in DAC register
-  * @param  __INSTANCE__ DAC Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_DAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-
-/**
-  * @}
-  */
-
-/** @defgroup DAC_LL_EM_HELPER_MACRO DAC helper macro
-  * @{
-  */
-
-/**
-  * @brief  Helper macro to get DAC channel number in decimal format
-  *         from literals LL_DAC_CHANNEL_x.
-  *         Example:
-  *            __LL_DAC_CHANNEL_TO_DECIMAL_NB(LL_DAC_CHANNEL_1)
-  *            will return decimal number "1".
-  * @note   The input can be a value from functions where a channel
-  *         number is returned.
-  * @param  __CHANNEL__ This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval 1...2 (value "2" depending on DAC channel 2 availability)
-  */
-#define __LL_DAC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__)                            \
-  ((__CHANNEL__) & DAC_SWTR_CHX_MASK)
-
-/**
-  * @brief  Helper macro to get DAC channel in literal format LL_DAC_CHANNEL_x
-  *         from number in decimal format.
-  *         Example:
-  *           __LL_DAC_DECIMAL_NB_TO_CHANNEL(1)
-  *           will return a data equivalent to "LL_DAC_CHANNEL_1".
-  * @note  If the input parameter does not correspond to a DAC channel,
-  *        this macro returns value '0'.
-  * @param  __DECIMAL_NB__ 1...2 (value "2" depending on DAC channel 2 availability)
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  */
-#if defined(DAC_CHANNEL2_SUPPORT)
-#define __LL_DAC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__)                         \
-  (((__DECIMAL_NB__) == 1U)                                                     \
-    ? (                                                                        \
-       LL_DAC_CHANNEL_1                                                        \
-      )                                                                        \
-      :                                                                        \
-      (((__DECIMAL_NB__) == 2U)                                                 \
-        ? (                                                                    \
-           LL_DAC_CHANNEL_2                                                    \
-          )                                                                    \
-          :                                                                    \
-          (                                                                    \
-           0                                                                   \
-          )                                                                    \
-      )                                                                        \
-  )
-#else
-#define __LL_DAC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__)                         \
-  (((__DECIMAL_NB__) == 1U)                                                     \
-    ? (                                                                        \
-       LL_DAC_CHANNEL_1                                                        \
-      )                                                                        \
-      :                                                                        \
-      (                                                                        \
-       0                                                                       \
-      )                                                                        \
-  )
-#endif  /* DAC_CHANNEL2_SUPPORT */
-
-/**
-  * @brief  Helper macro to define the DAC conversion data full-scale digital
-  *         value corresponding to the selected DAC resolution.
-  * @note   DAC conversion data full-scale corresponds to voltage range
-  *         determined by analog voltage references Vref+ and Vref-
-  *         (refer to reference manual).
-  * @param  __DAC_RESOLUTION__ This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_RESOLUTION_12B
-  *         @arg @ref LL_DAC_RESOLUTION_8B
-  * @retval ADC conversion data equivalent voltage value (unit: mVolt)
-  */
-#define __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__)                             \
-  ((0x00000FFFU) >> ((__DAC_RESOLUTION__) << 1U))
-
-/**
-  * @brief  Helper macro to calculate the DAC conversion data (unit: digital
-  *         value) corresponding to a voltage (unit: mVolt).
-  * @note   This helper macro is intended to provide input data in voltage
-  *         rather than digital value,
-  *         to be used with LL DAC functions such as
-  *         @ref LL_DAC_ConvertData12RightAligned().
-  * @note   Analog reference voltage (Vref+) must be either known from
-  *         user board environment or can be calculated using ADC measurement
-  *         and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
-  * @param  __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
-  * @param  __DAC_VOLTAGE__ Voltage to be generated by DAC channel
-  *                         (unit: mVolt).
-  * @param  __DAC_RESOLUTION__ This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_RESOLUTION_12B
-  *         @arg @ref LL_DAC_RESOLUTION_8B
-  * @retval DAC conversion data (unit: digital value)
-  */
-#define __LL_DAC_CALC_VOLTAGE_TO_DATA(__VREFANALOG_VOLTAGE__,\
-                                      __DAC_VOLTAGE__,\
-                                      __DAC_RESOLUTION__)                      \
-  ((__DAC_VOLTAGE__) * __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__)              \
-   / (__VREFANALOG_VOLTAGE__)                                                  \
-  )
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup DAC_LL_Exported_Functions DAC Exported Functions
-  * @{
-  */
-/** @defgroup DAC_LL_EF_Configuration Configuration of DAC channels
-  * @{
-  */
-
-/**
-  * @brief  Set the conversion trigger source for the selected DAC channel.
-  * @note   For conversion trigger source to be effective, DAC trigger
-  *         must be enabled using function @ref LL_DAC_EnableTrigger().
-  * @note   To set conversion trigger source, DAC channel must be disabled.
-  *         Otherwise, the setting is discarded.
-  * @note   Availability of parameters of trigger sources from timer
-  *         depends on timers availability on the selected device.
-  * @rmtoll CR       TSEL1          LL_DAC_SetTriggerSource\n
-  *         CR       TSEL2          LL_DAC_SetTriggerSource
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @param  TriggerSource This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_TRIG_SOFTWARE
-  *         @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO
-  *         @arg @ref LL_DAC_TRIG_EXT_TIM3_TRGO
-  *         @arg @ref LL_DAC_TRIG_EXT_TIM3_CH3
-  *         @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO
-  *         @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO
-  *         @arg @ref LL_DAC_TRIG_EXT_TIM21_TRGO
-  *         @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_SetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriggerSource)
-{
-  MODIFY_REG(DACx->CR,
-             DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
-             TriggerSource << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
-}
-
-/**
-  * @brief  Get the conversion trigger source for the selected DAC channel.
-  * @note   For conversion trigger source to be effective, DAC trigger
-  *         must be enabled using function @ref LL_DAC_EnableTrigger().
-  * @note   Availability of parameters of trigger sources from timer
-  *         depends on timers availability on the selected device.
-  * @rmtoll CR       TSEL1          LL_DAC_GetTriggerSource\n
-  *         CR       TSEL2          LL_DAC_GetTriggerSource
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_DAC_TRIG_SOFTWARE
-  *         @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO
-  *         @arg @ref LL_DAC_TRIG_EXT_TIM3_TRGO
-  *         @arg @ref LL_DAC_TRIG_EXT_TIM3_CH3
-  *         @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO
-  *         @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO
-  *         @arg @ref LL_DAC_TRIG_EXT_TIM21_TRGO
-  *         @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9
-  */
-__STATIC_INLINE uint32_t LL_DAC_GetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel)
-{
-  return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
-                    >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
-                   );
-}
-
-/**
-  * @brief  Set the waveform automatic generation mode
-  *         for the selected DAC channel.
-  * @rmtoll CR       WAVE1          LL_DAC_SetWaveAutoGeneration\n
-  *         CR       WAVE2          LL_DAC_SetWaveAutoGeneration
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @param  WaveAutoGeneration This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE
-  *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE
-  *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_SetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t WaveAutoGeneration)
-{
-  MODIFY_REG(DACx->CR,
-             DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
-             WaveAutoGeneration << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
-}
-
-/**
-  * @brief  Get the waveform automatic generation mode
-  *         for the selected DAC channel.
-  * @rmtoll CR       WAVE1          LL_DAC_GetWaveAutoGeneration\n
-  *         CR       WAVE2          LL_DAC_GetWaveAutoGeneration
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE
-  *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE
-  *         @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE
-  */
-__STATIC_INLINE uint32_t LL_DAC_GetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel)
-{
-  return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
-                    >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
-                   );
-}
-
-/**
-  * @brief  Set the noise waveform generation for the selected DAC channel:
-  *         Noise mode and parameters LFSR (linear feedback shift register).
-  * @note   For wave generation to be effective, DAC channel
-  *         wave generation mode must be enabled using
-  *         function @ref LL_DAC_SetWaveAutoGeneration().
-  * @note   This setting can be set when the selected DAC channel is disabled
-  *         (otherwise, the setting operation is ignored).
-  * @rmtoll CR       MAMP1          LL_DAC_SetWaveNoiseLFSR\n
-  *         CR       MAMP2          LL_DAC_SetWaveNoiseLFSR
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @param  NoiseLFSRMask This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_SetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t NoiseLFSRMask)
-{
-  MODIFY_REG(DACx->CR,
-             DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
-             NoiseLFSRMask << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
-}
-
-/**
-  * @brief  Set the noise waveform generation for the selected DAC channel:
-  *         Noise mode and parameters LFSR (linear feedback shift register).
-  * @rmtoll CR       MAMP1          LL_DAC_GetWaveNoiseLFSR\n
-  *         CR       MAMP2          LL_DAC_GetWaveNoiseLFSR
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
-  *         @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
-  */
-__STATIC_INLINE uint32_t LL_DAC_GetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel)
-{
-  return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
-                    >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
-                   );
-}
-
-/**
-  * @brief  Set the triangle waveform generation for the selected DAC channel:
-  *         triangle mode and amplitude.
-  * @note   For wave generation to be effective, DAC channel
-  *         wave generation mode must be enabled using
-  *         function @ref LL_DAC_SetWaveAutoGeneration().
-  * @note   This setting can be set when the selected DAC channel is disabled
-  *         (otherwise, the setting operation is ignored).
-  * @rmtoll CR       MAMP1          LL_DAC_SetWaveTriangleAmplitude\n
-  *         CR       MAMP2          LL_DAC_SetWaveTriangleAmplitude
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @param  TriangleAmplitude This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_SetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriangleAmplitude)
-{
-  MODIFY_REG(DACx->CR,
-             DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
-             TriangleAmplitude << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
-}
-
-/**
-  * @brief  Set the triangle waveform generation for the selected DAC channel:
-  *         triangle mode and amplitude.
-  * @rmtoll CR       MAMP1          LL_DAC_GetWaveTriangleAmplitude\n
-  *         CR       MAMP2          LL_DAC_GetWaveTriangleAmplitude
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
-  *         @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
-  */
-__STATIC_INLINE uint32_t LL_DAC_GetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel)
-{
-  return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
-                    >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
-                   );
-}
-
-/**
-  * @brief  Set the output buffer for the selected DAC channel.
-  * @rmtoll CR       BOFF1          LL_DAC_SetOutputBuffer\n
-  *         CR       BOFF2          LL_DAC_SetOutputBuffer
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @param  OutputBuffer This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
-  *         @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_SetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t OutputBuffer)
-{
-  MODIFY_REG(DACx->CR,
-             DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
-             OutputBuffer << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
-}
-
-/**
-  * @brief  Get the output buffer state for the selected DAC channel.
-  * @rmtoll CR       BOFF1          LL_DAC_GetOutputBuffer\n
-  *         CR       BOFF2          LL_DAC_GetOutputBuffer
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
-  *         @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
-  */
-__STATIC_INLINE uint32_t LL_DAC_GetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel)
-{
-  return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
-                    >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
-                   );
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup DAC_LL_EF_DMA_Management DMA Management
-  * @{
-  */
-
-/**
-  * @brief  Enable DAC DMA transfer request of the selected channel.
-  * @note   To configure DMA source address (peripheral address),
-  *         use function @ref LL_DAC_DMA_GetRegAddr().
-  * @rmtoll CR       DMAEN1         LL_DAC_EnableDMAReq\n
-  *         CR       DMAEN2         LL_DAC_EnableDMAReq
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_EnableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel)
-{
-  SET_BIT(DACx->CR,
-          DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
-}
-
-/**
-  * @brief  Disable DAC DMA transfer request of the selected channel.
-  * @note   To configure DMA source address (peripheral address),
-  *         use function @ref LL_DAC_DMA_GetRegAddr().
-  * @rmtoll CR       DMAEN1         LL_DAC_DisableDMAReq\n
-  *         CR       DMAEN2         LL_DAC_DisableDMAReq
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_DisableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel)
-{
-  CLEAR_BIT(DACx->CR,
-            DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
-}
-
-/**
-  * @brief  Get DAC DMA transfer request state of the selected channel.
-  *         (0: DAC DMA transfer request is disabled, 1: DAC DMA transfer request is enabled)
-  * @rmtoll CR       DMAEN1         LL_DAC_IsDMAReqEnabled\n
-  *         CR       DMAEN2         LL_DAC_IsDMAReqEnabled
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DAC_IsDMAReqEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
-{
-  return (READ_BIT(DACx->CR,
-                   DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
-          == (DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)));
-}
-
-/**
-  * @brief  Function to help to configure DMA transfer to DAC: retrieve the
-  *         DAC register address from DAC instance and a list of DAC registers
-  *         intended to be used (most commonly) with DMA transfer.
-  * @note   These DAC registers are data holding registers:
-  *         when DAC conversion is requested, DAC generates a DMA transfer
-  *         request to have data available in DAC data holding registers.
-  * @note   This macro is intended to be used with LL DMA driver, refer to
-  *         function "LL_DMA_ConfigAddresses()".
-  *         Example:
-  *           LL_DMA_ConfigAddresses(DMA1,
-  *                                  LL_DMA_CHANNEL_1,
-  *                                  (uint32_t)&< array or variable >,
-  *                                  LL_DAC_DMA_GetRegAddr(DAC1, LL_DAC_CHANNEL_1, LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED),
-  *                                  LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
-  * @rmtoll DHR12R1  DACC1DHR       LL_DAC_DMA_GetRegAddr\n
-  *         DHR12L1  DACC1DHR       LL_DAC_DMA_GetRegAddr\n
-  *         DHR8R1   DACC1DHR       LL_DAC_DMA_GetRegAddr\n
-  *         DHR12R2  DACC2DHR       LL_DAC_DMA_GetRegAddr\n
-  *         DHR12L2  DACC2DHR       LL_DAC_DMA_GetRegAddr\n
-  *         DHR8R2   DACC2DHR       LL_DAC_DMA_GetRegAddr
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @param  Register This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED
-  *         @arg @ref LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED
-  *         @arg @ref LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED
-  * @retval DAC register address
-  */
-__STATIC_INLINE uint32_t LL_DAC_DMA_GetRegAddr(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Register)
-{
-  /* Retrieve address of register DHR12Rx, DHR12Lx or DHR8Rx depending on     */
-  /* DAC channel selected.                                                    */
-  return ((uint32_t)(__DAC_PTR_REG_OFFSET((DACx)->DHR12R1, ((DAC_Channel >> Register) & DAC_REG_REGOFFSET_MASK_POSBIT0))));
-}
-/**
-  * @}
-  */
-
-/** @defgroup DAC_LL_EF_Operation Operation on DAC channels
-  * @{
-  */
-
-/**
-  * @brief  Enable DAC selected channel.
-  * @rmtoll CR       EN1            LL_DAC_Enable\n
-  *         CR       EN2            LL_DAC_Enable
-  * @note   After enable from off state, DAC channel requires a delay
-  *         for output voltage to reach accuracy +/- 1 LSB.
-  *         Refer to device datasheet, parameter "tWAKEUP".
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_Enable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
-{
-  SET_BIT(DACx->CR,
-          DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
-}
-
-/**
-  * @brief  Disable DAC selected channel.
-  * @rmtoll CR       EN1            LL_DAC_Disable\n
-  *         CR       EN2            LL_DAC_Disable
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_Disable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
-{
-  CLEAR_BIT(DACx->CR,
-            DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
-}
-
-/**
-  * @brief  Get DAC enable state of the selected channel.
-  *         (0: DAC channel is disabled, 1: DAC channel is enabled)
-  * @rmtoll CR       EN1            LL_DAC_IsEnabled\n
-  *         CR       EN2            LL_DAC_IsEnabled
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DAC_IsEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
-{
-  return (READ_BIT(DACx->CR,
-                   DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
-          == (DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)));
-}
-
-/**
-  * @brief  Enable DAC trigger of the selected channel.
-  * @note   - If DAC trigger is disabled, DAC conversion is performed
-  *           automatically once the data holding register is updated,
-  *           using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()":
-  *           @ref LL_DAC_ConvertData12RightAligned(), ...
-  *         - If DAC trigger is enabled, DAC conversion is performed
-  *           only when a hardware of software trigger event is occurring.
-  *           Select trigger source using
-  *           function @ref LL_DAC_SetTriggerSource().
-  * @rmtoll CR       TEN1           LL_DAC_EnableTrigger\n
-  *         CR       TEN2           LL_DAC_EnableTrigger
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_EnableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel)
-{
-  SET_BIT(DACx->CR,
-          DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
-}
-
-/**
-  * @brief  Disable DAC trigger of the selected channel.
-  * @rmtoll CR       TEN1           LL_DAC_DisableTrigger\n
-  *         CR       TEN2           LL_DAC_DisableTrigger
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_DisableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel)
-{
-  CLEAR_BIT(DACx->CR,
-            DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
-}
-
-/**
-  * @brief  Get DAC trigger state of the selected channel.
-  *         (0: DAC trigger is disabled, 1: DAC trigger is enabled)
-  * @rmtoll CR       TEN1           LL_DAC_IsTriggerEnabled\n
-  *         CR       TEN2           LL_DAC_IsTriggerEnabled
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DAC_IsTriggerEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
-{
-  return (READ_BIT(DACx->CR,
-                   DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
-          == (DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)));
-}
-
-/**
-  * @brief  Trig DAC conversion by software for the selected DAC channel.
-  * @note   Preliminarily, DAC trigger must be set to software trigger
-  *         using function @ref LL_DAC_SetTriggerSource()
-  *         with parameter "LL_DAC_TRIGGER_SOFTWARE".
-  *         and DAC trigger must be enabled using
-  *         function @ref LL_DAC_EnableTrigger().
-  * @note   For devices featuring DAC with 2 channels: this function
-  *         can perform a SW start of both DAC channels simultaneously.
-  *         Two channels can be selected as parameter.
-  *         Example: (LL_DAC_CHANNEL_1 | LL_DAC_CHANNEL_2)
-  * @rmtoll SWTRIGR  SWTRIG1        LL_DAC_TrigSWConversion\n
-  *         SWTRIGR  SWTRIG2        LL_DAC_TrigSWConversion
-  * @param  DACx DAC instance
-  * @param  DAC_Channel  This parameter can a combination of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_TrigSWConversion(DAC_TypeDef *DACx, uint32_t DAC_Channel)
-{
-  SET_BIT(DACx->SWTRIGR,
-          (DAC_Channel & DAC_SWTR_CHX_MASK));
-}
-
-/**
-  * @brief  Set the data to be loaded in the data holding register
-  *         in format 12 bits left alignment (LSB aligned on bit 0),
-  *         for the selected DAC channel.
-  * @rmtoll DHR12R1  DACC1DHR       LL_DAC_ConvertData12RightAligned\n
-  *         DHR12R2  DACC2DHR       LL_DAC_ConvertData12RightAligned
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @param  Data Value between Min_Data=0x000 and Max_Data=0xFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_ConvertData12RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
-{
-  register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, (DAC_Channel >> DAC_REG_DHR12RX_REGOFFSET_BITOFFSET_POS) & DAC_REG_REGOFFSET_MASK_POSBIT0);
-  
-  MODIFY_REG(*preg,
-             DAC_DHR12R1_DACC1DHR,
-             Data);
-}
-
-/**
-  * @brief  Set the data to be loaded in the data holding register
-  *         in format 12 bits left alignment (MSB aligned on bit 15),
-  *         for the selected DAC channel.
-  * @rmtoll DHR12L1  DACC1DHR       LL_DAC_ConvertData12LeftAligned\n
-  *         DHR12L2  DACC2DHR       LL_DAC_ConvertData12LeftAligned
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @param  Data Value between Min_Data=0x000 and Max_Data=0xFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_ConvertData12LeftAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
-{
-  register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, (DAC_Channel >> DAC_REG_DHR12LX_REGOFFSET_BITOFFSET_POS) & DAC_REG_REGOFFSET_MASK_POSBIT0);
-  
-  MODIFY_REG(*preg,
-             DAC_DHR12L1_DACC1DHR,
-             Data);
-}
-
-/**
-  * @brief  Set the data to be loaded in the data holding register
-  *         in format 8 bits left alignment (LSB aligned on bit 0),
-  *         for the selected DAC channel.
-  * @rmtoll DHR8R1   DACC1DHR       LL_DAC_ConvertData8RightAligned\n
-  *         DHR8R2   DACC2DHR       LL_DAC_ConvertData8RightAligned
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @param  Data Value between Min_Data=0x00 and Max_Data=0xFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_ConvertData8RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
-{
-  register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, (DAC_Channel >> DAC_REG_DHR8RX_REGOFFSET_BITOFFSET_POS) & DAC_REG_REGOFFSET_MASK_POSBIT0);
-  
-  MODIFY_REG(*preg,
-             DAC_DHR8R1_DACC1DHR,
-             Data);
-}
-
-#if defined(DAC_CHANNEL2_SUPPORT)
-/**
-  * @brief  Set the data to be loaded in the data holding register
-  *         in format 12 bits left alignment (LSB aligned on bit 0),
-  *         for both DAC channels.
-  * @rmtoll DHR12RD  DACC1DHR       LL_DAC_ConvertDualData12RightAligned\n
-  *         DHR12RD  DACC2DHR       LL_DAC_ConvertDualData12RightAligned
-  * @param  DACx DAC instance
-  * @param  DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF
-  * @param  DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_ConvertDualData12RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
-{
-  MODIFY_REG(DACx->DHR12RD,
-             (DAC_DHR12RD_DACC2DHR | DAC_DHR12RD_DACC1DHR),
-             ((DataChannel2 << DAC_DHR12RD_DACC2DHR_BITOFFSET_POS) | DataChannel1));
-}
-
-/**
-  * @brief  Set the data to be loaded in the data holding register
-  *         in format 12 bits left alignment (MSB aligned on bit 15),
-  *         for both DAC channels.
-  * @rmtoll DHR12LD  DACC1DHR       LL_DAC_ConvertDualData12LeftAligned\n
-  *         DHR12LD  DACC2DHR       LL_DAC_ConvertDualData12LeftAligned
-  * @param  DACx DAC instance
-  * @param  DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF
-  * @param  DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_ConvertDualData12LeftAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
-{
-  /* Note: Data of DAC channel 2 shift value subtracted of 4 because          */
-  /*       data on 16 bits and DAC channel 2 bits field is on the 12 MSB,     */
-  /*       the 4 LSB must be taken into account for the shift value.          */
-  MODIFY_REG(DACx->DHR12LD,
-             (DAC_DHR12LD_DACC2DHR | DAC_DHR12LD_DACC1DHR),
-             ((DataChannel2 << (DAC_DHR12LD_DACC2DHR_BITOFFSET_POS - 4U)) | DataChannel1));
-}
-
-/**
-  * @brief  Set the data to be loaded in the data holding register
-  *         in format 8 bits left alignment (LSB aligned on bit 0),
-  *         for both DAC channels.
-  * @rmtoll DHR8RD  DACC1DHR       LL_DAC_ConvertDualData8RightAligned\n
-  *         DHR8RD  DACC2DHR       LL_DAC_ConvertDualData8RightAligned
-  * @param  DACx DAC instance
-  * @param  DataChannel1 Value between Min_Data=0x00 and Max_Data=0xFF
-  * @param  DataChannel2 Value between Min_Data=0x00 and Max_Data=0xFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_ConvertDualData8RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
-{
-  MODIFY_REG(DACx->DHR8RD,
-             (DAC_DHR8RD_DACC2DHR | DAC_DHR8RD_DACC1DHR),
-             ((DataChannel2 << DAC_DHR8RD_DACC2DHR_BITOFFSET_POS) | DataChannel1));
-}
-
-#endif /* DAC_CHANNEL2_SUPPORT */
-/**
-  * @brief  Retrieve output data currently generated for the selected DAC channel.
-  * @note   Whatever alignment and resolution settings
-  *         (using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()":
-  *         @ref LL_DAC_ConvertData12RightAligned(), ...),
-  *         output data format is 12 bits right aligned (LSB aligned on bit 0).
-  * @rmtoll DOR1     DACC1DOR       LL_DAC_RetrieveOutputData\n
-  *         DOR2     DACC2DOR       LL_DAC_RetrieveOutputData
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @retval Value between Min_Data=0x000 and Max_Data=0xFFF
-  */
-__STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData(DAC_TypeDef *DACx, uint32_t DAC_Channel)
-{
-  register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DOR1, (DAC_Channel >> DAC_REG_DORX_REGOFFSET_BITOFFSET_POS) & DAC_REG_REGOFFSET_MASK_POSBIT0);
-  
-  return (uint16_t) READ_BIT(*preg, DAC_DOR1_DACC1DOR);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup DAC_LL_EF_FLAG_Management FLAG Management
-  * @{
-  */
-/**
-  * @brief  Get DAC underrun flag for DAC channel 1
-  * @rmtoll SR       DMAUDR1        LL_DAC_IsActiveFlag_DMAUDR1
-  * @param  DACx DAC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR1(DAC_TypeDef *DACx)
-{
-  return (READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR1) == (LL_DAC_FLAG_DMAUDR1));
-}
-
-#if defined(DAC_CHANNEL2_SUPPORT)
-/**
-  * @brief  Get DAC underrun flag for DAC channel 2
-  * @rmtoll SR       DMAUDR2        LL_DAC_IsActiveFlag_DMAUDR2
-  * @param  DACx DAC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR2(DAC_TypeDef *DACx)
-{
-  return (READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR2) == (LL_DAC_FLAG_DMAUDR2));
-}
-#endif /* DAC_CHANNEL2_SUPPORT */
-
-/**
-  * @brief  Clear DAC underrun flag for DAC channel 1
-  * @rmtoll SR       DMAUDR1        LL_DAC_ClearFlag_DMAUDR1
-  * @param  DACx DAC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR1(DAC_TypeDef *DACx)
-{
-  WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR1);
-}
-
-#if defined(DAC_CHANNEL2_SUPPORT)
-/**
-  * @brief  Clear DAC underrun flag for DAC channel 2
-  * @rmtoll SR       DMAUDR2        LL_DAC_ClearFlag_DMAUDR2
-  * @param  DACx DAC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR2(DAC_TypeDef *DACx)
-{
-  WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR2);
-}
-#endif /* DAC_CHANNEL2_SUPPORT */
-
-/**
-  * @}
-  */
-
-/** @defgroup DAC_LL_EF_IT_Management IT management
-  * @{
-  */
-
-/**
-  * @brief  Enable DMA underrun interrupt for DAC channel 1
-  * @rmtoll CR       DMAUDRIE1      LL_DAC_EnableIT_DMAUDR1
-  * @param  DACx DAC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_EnableIT_DMAUDR1(DAC_TypeDef *DACx)
-{
-  SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1);
-}
-
-#if defined(DAC_CHANNEL2_SUPPORT)
-/**
-  * @brief  Enable DMA underrun interrupt for DAC channel 2
-  * @rmtoll CR       DMAUDRIE2      LL_DAC_EnableIT_DMAUDR2
-  * @param  DACx DAC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_EnableIT_DMAUDR2(DAC_TypeDef *DACx)
-{
-  SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2);
-}
-#endif /* DAC_CHANNEL2_SUPPORT */
-
-/**
-  * @brief  Disable DMA underrun interrupt for DAC channel 1
-  * @rmtoll CR       DMAUDRIE1      LL_DAC_DisableIT_DMAUDR1
-  * @param  DACx DAC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_DisableIT_DMAUDR1(DAC_TypeDef *DACx)
-{
-  CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1);
-}
-
-#if defined(DAC_CHANNEL2_SUPPORT)
-/**
-  * @brief  Disable DMA underrun interrupt for DAC channel 2
-  * @rmtoll CR       DMAUDRIE2      LL_DAC_DisableIT_DMAUDR2
-  * @param  DACx DAC instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DAC_DisableIT_DMAUDR2(DAC_TypeDef *DACx)
-{
-  CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2);
-}
-#endif /* DAC_CHANNEL2_SUPPORT */
-
-/**
-  * @brief  Get DMA underrun interrupt for DAC channel 1
-  * @rmtoll CR       DMAUDRIE1      LL_DAC_IsEnabledIT_DMAUDR1
-  * @param  DACx DAC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR1(DAC_TypeDef *DACx)
-{
-  return (READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1) == (LL_DAC_IT_DMAUDRIE1));
-}
-
-#if defined(DAC_CHANNEL2_SUPPORT)
-/**
-  * @brief  Get DMA underrun interrupt for DAC channel 2
-  * @rmtoll CR       DMAUDRIE2      LL_DAC_IsEnabledIT_DMAUDR2
-  * @param  DACx DAC instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR2(DAC_TypeDef *DACx)
-{
-  return (READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2) == (LL_DAC_IT_DMAUDRIE2));
-}
-#endif /* DAC_CHANNEL2_SUPPORT */
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup DAC_LL_EF_Init Initialization and de-initialization functions
-  * @{
-  */
-
-ErrorStatus LL_DAC_DeInit(DAC_TypeDef* DACx);
-ErrorStatus LL_DAC_Init(DAC_TypeDef* DACx, uint32_t DAC_Channel, LL_DAC_InitTypeDef* DAC_InitStruct);
-void        LL_DAC_StructInit(LL_DAC_InitTypeDef* DAC_InitStruct);
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* DAC1 */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_DAC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h
deleted file mode 100755
index 1b420347..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h
+++ /dev/null
@@ -1,2153 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_dma.h
-  * @author  MCD Application Team
-  * @brief   Header file of DMA LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_DMA_H
-#define __STM32L0xx_LL_DMA_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (DMA1)
-
-/** @defgroup DMA_LL DMA
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/** @defgroup DMA_LL_Private_Variables DMA Private Variables
-  * @{
-  */
-/* Array used to get the DMA channel register offset versus channel index LL_DMA_CHANNEL_x */
-static const uint8_t CHANNEL_OFFSET_TAB[] =
-{
-  (uint8_t)(DMA1_Channel1_BASE - DMA1_BASE),
-  (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
-  (uint8_t)(DMA1_Channel3_BASE - DMA1_BASE),
-  (uint8_t)(DMA1_Channel4_BASE - DMA1_BASE),
-  (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
-#if defined(DMA1_Channel6)
-  (uint8_t)(DMA1_Channel6_BASE - DMA1_BASE),
-#endif /*DMA1_Channel6*/
-#if defined(DMA1_Channel7)
-  (uint8_t)(DMA1_Channel7_BASE - DMA1_BASE)
-#endif /*DMA1_Channel7*/
-};
-/**
-  * @}
-  */
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup DMA_LL_Private_Constants DMA Private Constants
-  * @{
-  */
-/* Define used to get CSELR register offset */
-#define DMA_CSELR_OFFSET                  (uint32_t)(DMA1_CSELR_BASE - DMA1_BASE)
-
-/* Defines used for the bit position in the register and perform offsets */
-#define DMA_POSITION_CSELR_CXS            ((Channel-1U)*4U)
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup DMA_LL_Private_Macros DMA Private Macros
-  * @{
-  */
-/**
-  * @}
-  */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup DMA_LL_ES_INIT DMA Exported Init structure
-  * @{
-  */
-typedef struct
-{
-  uint32_t PeriphOrM2MSrcAddress;  /*!< Specifies the peripheral base address for DMA transfer
-                                        or as Source base address in case of memory to memory transfer direction.
-
-                                        This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. */
-
-  uint32_t MemoryOrM2MDstAddress;  /*!< Specifies the memory base address for DMA transfer
-                                        or as Destination base address in case of memory to memory transfer direction.
-
-                                        This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. */
-
-  uint32_t Direction;              /*!< Specifies if the data will be transferred from memory to peripheral,
-                                        from memory to memory or from peripheral to memory.
-                                        This parameter can be a value of @ref DMA_LL_EC_DIRECTION
-
-                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetDataTransferDirection(). */
-
-  uint32_t Mode;                   /*!< Specifies the normal or circular operation mode.
-                                        This parameter can be a value of @ref DMA_LL_EC_MODE
-                                        @note: The circular buffer mode cannot be used if the memory to memory
-                                               data transfer direction is configured on the selected Channel
-
-                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetMode(). */
-
-  uint32_t PeriphOrM2MSrcIncMode;  /*!< Specifies whether the Peripheral address or Source address in case of memory to memory transfer direction
-                                        is incremented or not.
-                                        This parameter can be a value of @ref DMA_LL_EC_PERIPH
-
-                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphIncMode(). */
-
-  uint32_t MemoryOrM2MDstIncMode;  /*!< Specifies whether the Memory address or Destination address in case of memory to memory transfer direction
-                                        is incremented or not.
-                                        This parameter can be a value of @ref DMA_LL_EC_MEMORY
-
-                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetMemoryIncMode(). */
-
-  uint32_t PeriphOrM2MSrcDataSize; /*!< Specifies the Peripheral data size alignment or Source data size alignment (byte, half word, word)
-                                        in case of memory to memory transfer direction.
-                                        This parameter can be a value of @ref DMA_LL_EC_PDATAALIGN
-
-                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphSize(). */
-
-  uint32_t MemoryOrM2MDstDataSize; /*!< Specifies the Memory data size alignment or Destination data size alignment (byte, half word, word)
-                                        in case of memory to memory transfer direction.
-                                        This parameter can be a value of @ref DMA_LL_EC_MDATAALIGN
-
-                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetMemorySize(). */
-
-  uint32_t NbData;                 /*!< Specifies the number of data to transfer, in data unit.
-                                        The data unit is equal to the source buffer configuration set in PeripheralSize
-                                        or MemorySize parameters depending in the transfer direction.
-                                        This parameter must be a value between Min_Data = 0 and Max_Data = 0x0000FFFF
-
-                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetDataLength(). */
-
-  uint32_t PeriphRequest;          /*!< Specifies the peripheral request.
-                                        This parameter can be a value of @ref DMA_LL_EC_REQUEST
-
-                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphRequest(). */
-
-  uint32_t Priority;               /*!< Specifies the channel priority level.
-                                        This parameter can be a value of @ref DMA_LL_EC_PRIORITY
-
-                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetChannelPriorityLevel(). */
-
-} LL_DMA_InitTypeDef;
-/**
-  * @}
-  */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup DMA_LL_Exported_Constants DMA Exported Constants
-  * @{
-  */
-/** @defgroup DMA_LL_EC_CLEAR_FLAG Clear Flags Defines
-  * @brief    Flags defines which can be used with LL_DMA_WriteReg function
-  * @{
-  */
-#define LL_DMA_IFCR_CGIF1                 DMA_IFCR_CGIF1        /*!< Channel 1 global flag            */
-#define LL_DMA_IFCR_CTCIF1                DMA_IFCR_CTCIF1       /*!< Channel 1 transfer complete flag */
-#define LL_DMA_IFCR_CHTIF1                DMA_IFCR_CHTIF1       /*!< Channel 1 half transfer flag     */
-#define LL_DMA_IFCR_CTEIF1                DMA_IFCR_CTEIF1       /*!< Channel 1 transfer error flag    */
-#define LL_DMA_IFCR_CGIF2                 DMA_IFCR_CGIF2        /*!< Channel 2 global flag            */
-#define LL_DMA_IFCR_CTCIF2                DMA_IFCR_CTCIF2       /*!< Channel 2 transfer complete flag */
-#define LL_DMA_IFCR_CHTIF2                DMA_IFCR_CHTIF2       /*!< Channel 2 half transfer flag     */
-#define LL_DMA_IFCR_CTEIF2                DMA_IFCR_CTEIF2       /*!< Channel 2 transfer error flag    */
-#define LL_DMA_IFCR_CGIF3                 DMA_IFCR_CGIF3        /*!< Channel 3 global flag            */
-#define LL_DMA_IFCR_CTCIF3                DMA_IFCR_CTCIF3       /*!< Channel 3 transfer complete flag */
-#define LL_DMA_IFCR_CHTIF3                DMA_IFCR_CHTIF3       /*!< Channel 3 half transfer flag     */
-#define LL_DMA_IFCR_CTEIF3                DMA_IFCR_CTEIF3       /*!< Channel 3 transfer error flag    */
-#define LL_DMA_IFCR_CGIF4                 DMA_IFCR_CGIF4        /*!< Channel 4 global flag            */
-#define LL_DMA_IFCR_CTCIF4                DMA_IFCR_CTCIF4       /*!< Channel 4 transfer complete flag */
-#define LL_DMA_IFCR_CHTIF4                DMA_IFCR_CHTIF4       /*!< Channel 4 half transfer flag     */
-#define LL_DMA_IFCR_CTEIF4                DMA_IFCR_CTEIF4       /*!< Channel 4 transfer error flag    */
-#define LL_DMA_IFCR_CGIF5                 DMA_IFCR_CGIF5        /*!< Channel 5 global flag            */
-#define LL_DMA_IFCR_CTCIF5                DMA_IFCR_CTCIF5       /*!< Channel 5 transfer complete flag */
-#define LL_DMA_IFCR_CHTIF5                DMA_IFCR_CHTIF5       /*!< Channel 5 half transfer flag     */
-#define LL_DMA_IFCR_CTEIF5                DMA_IFCR_CTEIF5       /*!< Channel 5 transfer error flag    */
-#if defined(DMA1_Channel6)
-#define LL_DMA_IFCR_CGIF6                 DMA_IFCR_CGIF6        /*!< Channel 6 global flag            */
-#define LL_DMA_IFCR_CTCIF6                DMA_IFCR_CTCIF6       /*!< Channel 6 transfer complete flag */
-#define LL_DMA_IFCR_CHTIF6                DMA_IFCR_CHTIF6       /*!< Channel 6 half transfer flag     */
-#define LL_DMA_IFCR_CTEIF6                DMA_IFCR_CTEIF6       /*!< Channel 6 transfer error flag    */
-#endif
-#if defined(DMA1_Channel7)
-#define LL_DMA_IFCR_CGIF7                 DMA_IFCR_CGIF7        /*!< Channel 7 global flag            */
-#define LL_DMA_IFCR_CTCIF7                DMA_IFCR_CTCIF7       /*!< Channel 7 transfer complete flag */
-#define LL_DMA_IFCR_CHTIF7                DMA_IFCR_CHTIF7       /*!< Channel 7 half transfer flag     */
-#define LL_DMA_IFCR_CTEIF7                DMA_IFCR_CTEIF7       /*!< Channel 7 transfer error flag    */
-#endif
-/**
-  * @}
-  */
-
-/** @defgroup DMA_LL_EC_GET_FLAG Get Flags Defines
-  * @brief    Flags defines which can be used with LL_DMA_ReadReg function
-  * @{
-  */
-#define LL_DMA_ISR_GIF1                   DMA_ISR_GIF1          /*!< Channel 1 global flag            */
-#define LL_DMA_ISR_TCIF1                  DMA_ISR_TCIF1         /*!< Channel 1 transfer complete flag */
-#define LL_DMA_ISR_HTIF1                  DMA_ISR_HTIF1         /*!< Channel 1 half transfer flag     */
-#define LL_DMA_ISR_TEIF1                  DMA_ISR_TEIF1         /*!< Channel 1 transfer error flag    */
-#define LL_DMA_ISR_GIF2                   DMA_ISR_GIF2          /*!< Channel 2 global flag            */
-#define LL_DMA_ISR_TCIF2                  DMA_ISR_TCIF2         /*!< Channel 2 transfer complete flag */
-#define LL_DMA_ISR_HTIF2                  DMA_ISR_HTIF2         /*!< Channel 2 half transfer flag     */
-#define LL_DMA_ISR_TEIF2                  DMA_ISR_TEIF2         /*!< Channel 2 transfer error flag    */
-#define LL_DMA_ISR_GIF3                   DMA_ISR_GIF3          /*!< Channel 3 global flag            */
-#define LL_DMA_ISR_TCIF3                  DMA_ISR_TCIF3         /*!< Channel 3 transfer complete flag */
-#define LL_DMA_ISR_HTIF3                  DMA_ISR_HTIF3         /*!< Channel 3 half transfer flag     */
-#define LL_DMA_ISR_TEIF3                  DMA_ISR_TEIF3         /*!< Channel 3 transfer error flag    */
-#define LL_DMA_ISR_GIF4                   DMA_ISR_GIF4          /*!< Channel 4 global flag            */
-#define LL_DMA_ISR_TCIF4                  DMA_ISR_TCIF4         /*!< Channel 4 transfer complete flag */
-#define LL_DMA_ISR_HTIF4                  DMA_ISR_HTIF4         /*!< Channel 4 half transfer flag     */
-#define LL_DMA_ISR_TEIF4                  DMA_ISR_TEIF4         /*!< Channel 4 transfer error flag    */
-#define LL_DMA_ISR_GIF5                   DMA_ISR_GIF5          /*!< Channel 5 global flag            */
-#define LL_DMA_ISR_TCIF5                  DMA_ISR_TCIF5         /*!< Channel 5 transfer complete flag */
-#define LL_DMA_ISR_HTIF5                  DMA_ISR_HTIF5         /*!< Channel 5 half transfer flag     */
-#define LL_DMA_ISR_TEIF5                  DMA_ISR_TEIF5         /*!< Channel 5 transfer error flag    */
-#if defined(DMA1_Channel6)
-#define LL_DMA_ISR_GIF6                   DMA_ISR_GIF6          /*!< Channel 6 global flag            */
-#define LL_DMA_ISR_TCIF6                  DMA_ISR_TCIF6         /*!< Channel 6 transfer complete flag */
-#define LL_DMA_ISR_HTIF6                  DMA_ISR_HTIF6         /*!< Channel 6 half transfer flag     */
-#define LL_DMA_ISR_TEIF6                  DMA_ISR_TEIF6         /*!< Channel 6 transfer error flag    */
-#endif
-#if defined(DMA1_Channel7)
-#define LL_DMA_ISR_GIF7                   DMA_ISR_GIF7          /*!< Channel 7 global flag            */
-#define LL_DMA_ISR_TCIF7                  DMA_ISR_TCIF7         /*!< Channel 7 transfer complete flag */
-#define LL_DMA_ISR_HTIF7                  DMA_ISR_HTIF7         /*!< Channel 7 half transfer flag     */
-#define LL_DMA_ISR_TEIF7                  DMA_ISR_TEIF7         /*!< Channel 7 transfer error flag    */
-#endif
-/**
-  * @}
-  */
-
-/** @defgroup DMA_LL_EC_IT IT Defines
-  * @brief    IT defines which can be used with LL_DMA_ReadReg and  LL_DMA_WriteReg functions
-  * @{
-  */
-#define LL_DMA_CCR_TCIE                   DMA_CCR_TCIE          /*!< Transfer complete interrupt */
-#define LL_DMA_CCR_HTIE                   DMA_CCR_HTIE          /*!< Half Transfer interrupt     */
-#define LL_DMA_CCR_TEIE                   DMA_CCR_TEIE          /*!< Transfer error interrupt    */
-/**
-  * @}
-  */
-
-/** @defgroup DMA_LL_EC_CHANNEL CHANNEL
-  * @{
-  */
-#define LL_DMA_CHANNEL_1                  ((uint32_t)0x00000001U) /*!< DMA Channel 1 */
-#define LL_DMA_CHANNEL_2                  ((uint32_t)0x00000002U) /*!< DMA Channel 2 */
-#define LL_DMA_CHANNEL_3                  ((uint32_t)0x00000003U) /*!< DMA Channel 3 */
-#define LL_DMA_CHANNEL_4                  ((uint32_t)0x00000004U) /*!< DMA Channel 4 */
-#define LL_DMA_CHANNEL_5                  ((uint32_t)0x00000005U) /*!< DMA Channel 5 */
-#if defined(DMA1_Channel6)
-#define LL_DMA_CHANNEL_6                  ((uint32_t)0x00000006U) /*!< DMA Channel 6 */
-#endif
-#if defined(DMA1_Channel7)
-#define LL_DMA_CHANNEL_7                  ((uint32_t)0x00000007U) /*!< DMA Channel 7 */
-#endif
-#if defined(USE_FULL_LL_DRIVER)
-#define LL_DMA_CHANNEL_ALL                ((uint32_t)0xFFFF0000U) /*!< DMA Channel all (used only for function @ref LL_DMA_DeInit(). */
-#endif /*USE_FULL_LL_DRIVER*/
-/**
-  * @}
-  */
-
-/** @defgroup DMA_LL_EC_DIRECTION Transfer Direction
-  * @{
-  */
-#define LL_DMA_DIRECTION_PERIPH_TO_MEMORY ((uint32_t)0x00000000U) /*!< Peripheral to memory direction */
-#define LL_DMA_DIRECTION_MEMORY_TO_PERIPH DMA_CCR_DIR             /*!< Memory to peripheral direction */
-#define LL_DMA_DIRECTION_MEMORY_TO_MEMORY DMA_CCR_MEM2MEM         /*!< Memory to memory direction     */
-/**
-  * @}
-  */
-
-/** @defgroup DMA_LL_EC_MODE Transfer mode
-  * @{
-  */
-#define LL_DMA_MODE_NORMAL                ((uint32_t)0x00000000U) /*!< Normal Mode                  */
-#define LL_DMA_MODE_CIRCULAR              DMA_CCR_CIRC            /*!< Circular Mode                */
-/**
-  * @}
-  */
-
-/** @defgroup DMA_LL_EC_PERIPH Peripheral increment mode
-  * @{
-  */
-#define LL_DMA_PERIPH_INCREMENT           DMA_CCR_PINC            /*!< Peripheral increment mode Enable */
-#define LL_DMA_PERIPH_NOINCREMENT         ((uint32_t)0x00000000U) /*!< Peripheral increment mode Disable */
-/**
-  * @}
-  */
-
-/** @defgroup DMA_LL_EC_MEMORY Memory increment mode
-  * @{
-  */
-#define LL_DMA_MEMORY_INCREMENT           DMA_CCR_MINC            /*!< Memory increment mode Enable  */
-#define LL_DMA_MEMORY_NOINCREMENT         ((uint32_t)0x00000000U) /*!< Memory increment mode Disable */
-/**
-  * @}
-  */
-
-/** @defgroup DMA_LL_EC_PDATAALIGN Peripheral data alignment
-  * @{
-  */
-#define LL_DMA_PDATAALIGN_BYTE            ((uint32_t)0x00000000U) /*!< Peripheral data alignment : Byte     */
-#define LL_DMA_PDATAALIGN_HALFWORD        DMA_CCR_PSIZE_0         /*!< Peripheral data alignment : HalfWord */
-#define LL_DMA_PDATAALIGN_WORD            DMA_CCR_PSIZE_1         /*!< Peripheral data alignment : Word     */
-/**
-  * @}
-  */
-
-/** @defgroup DMA_LL_EC_MDATAALIGN Memory data alignment
-  * @{
-  */
-#define LL_DMA_MDATAALIGN_BYTE            ((uint32_t)0x00000000U) /*!< Memory data alignment : Byte     */
-#define LL_DMA_MDATAALIGN_HALFWORD        DMA_CCR_MSIZE_0         /*!< Memory data alignment : HalfWord */
-#define LL_DMA_MDATAALIGN_WORD            DMA_CCR_MSIZE_1         /*!< Memory data alignment : Word     */
-/**
-  * @}
-  */
-
-/** @defgroup DMA_LL_EC_PRIORITY Transfer Priority level
-  * @{
-  */
-#define LL_DMA_PRIORITY_LOW               ((uint32_t)0x00000000U) /*!< Priority level : Low       */
-#define LL_DMA_PRIORITY_MEDIUM            DMA_CCR_PL_0            /*!< Priority level : Medium    */
-#define LL_DMA_PRIORITY_HIGH              DMA_CCR_PL_1            /*!< Priority level : High      */
-#define LL_DMA_PRIORITY_VERYHIGH          DMA_CCR_PL              /*!< Priority level : Very_High */
-/**
-  * @}
-  */
-
-/** @defgroup DMA_LL_EC_REQUEST Transfer peripheral request
-  * @{
-  */
-#define LL_DMA_REQUEST_0                  ((uint32_t)0x00000000U) /*!< DMA peripheral request 0  */
-#define LL_DMA_REQUEST_1                  ((uint32_t)0x00000001U) /*!< DMA peripheral request 1  */
-#define LL_DMA_REQUEST_2                  ((uint32_t)0x00000002U) /*!< DMA peripheral request 2  */
-#define LL_DMA_REQUEST_3                  ((uint32_t)0x00000003U) /*!< DMA peripheral request 3  */
-#define LL_DMA_REQUEST_4                  ((uint32_t)0x00000004U) /*!< DMA peripheral request 4  */
-#define LL_DMA_REQUEST_5                  ((uint32_t)0x00000005U) /*!< DMA peripheral request 5  */
-#define LL_DMA_REQUEST_6                  ((uint32_t)0x00000006U) /*!< DMA peripheral request 6  */
-#define LL_DMA_REQUEST_7                  ((uint32_t)0x00000007U) /*!< DMA peripheral request 7  */
-#define LL_DMA_REQUEST_8                  ((uint32_t)0x00000008U) /*!< DMA peripheral request 8  */
-#define LL_DMA_REQUEST_9                  ((uint32_t)0x00000009U) /*!< DMA peripheral request 9  */
-#define LL_DMA_REQUEST_10                 ((uint32_t)0x0000000AU) /*!< DMA peripheral request 10 */
-#define LL_DMA_REQUEST_11                 ((uint32_t)0x0000000BU) /*!< DMA peripheral request 11 */
-#define LL_DMA_REQUEST_12                 ((uint32_t)0x0000000CU) /*!< DMA peripheral request 12 */
-#define LL_DMA_REQUEST_13                 ((uint32_t)0x0000000DU) /*!< DMA peripheral request 13 */
-#define LL_DMA_REQUEST_14                 ((uint32_t)0x0000000EU) /*!< DMA peripheral request 14 */
-#define LL_DMA_REQUEST_15                 ((uint32_t)0x0000000FU) /*!< DMA peripheral request 15 */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup DMA_LL_Exported_Macros DMA Exported Macros
-  * @{
-  */
-
-/** @defgroup DMA_LL_EM_WRITE_READ Common Write and read registers macros
-  * @{
-  */
-/**
-  * @brief  Write a value in DMA register
-  * @param  __INSTANCE__ DMA Instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_DMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in DMA register
-  * @param  __INSTANCE__ DMA Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_DMA_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-/** @defgroup DMA_LL_EM_CONVERT_DMAxCHANNELy Convert DMAxChannely
-  * @{
-  */
-/**
-  * @brief  Convert DMAx_Channely into DMAx
-  * @param  __CHANNEL_INSTANCE__ DMAx_Channely
-  * @retval DMAx
-  */
-#define __LL_DMA_GET_INSTANCE(__CHANNEL_INSTANCE__)  (DMA1)
-
-/**
-  * @brief  Convert DMAx_Channely into LL_DMA_CHANNEL_y
-  * @param  __CHANNEL_INSTANCE__ DMAx_Channely
-  * @retval LL_DMA_CHANNEL_y
-  */
-#if defined (DMA1_Channel6) && defined (DMA1_Channel7)
-#define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__)   \
-(((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \
- ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \
- ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \
- ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \
- ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel5)) ? LL_DMA_CHANNEL_5 : \
- ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel6)) ? LL_DMA_CHANNEL_6 : \
- LL_DMA_CHANNEL_7)
-#elif defined (DMA1_Channel6)
-#define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__)   \
-(((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \
- ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \
- ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \
- ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \
- ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel5)) ? LL_DMA_CHANNEL_5 : \
- LL_DMA_CHANNEL_6)
-#else
-#define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__)   \
-(((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \
- ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \
- ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \
- ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \
- LL_DMA_CHANNEL_5)
-#endif /* DMA1_Channel6 && DMA1_Channel7 */
-
-/**
-  * @brief  Convert DMA Instance DMAx and LL_DMA_CHANNEL_y into DMAx_Channely
-  * @param  __DMA_INSTANCE__ DMAx
-  * @param  __CHANNEL__ LL_DMA_CHANNEL_y
-  * @retval DMAx_Channely
-  */
-#if defined (DMA1_Channel6) && defined (DMA1_Channel7)
-#define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__)   \
-((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA1_Channel1 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA1_Channel2 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA1_Channel3 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA1_Channel4 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_5))) ? DMA1_Channel5 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_6))) ? DMA1_Channel6 : \
- DMA1_Channel7)
-#elif defined (DMA1_Channel6)
-#define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__)   \
-((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA1_Channel1 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA1_Channel2 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA1_Channel3 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA1_Channel4 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_5))) ? DMA1_Channel5 : \
- DMA1_Channel6)
-#else
-#define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__)   \
-((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA1_Channel1 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA1_Channel2 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA1_Channel3 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA1_Channel4 : \
- DMA1_Channel5)
-#endif /* DMA1_Channel6 && DMA1_Channel7 */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup DMA_LL_Exported_Functions DMA Exported Functions
- * @{
- */
-
-/** @defgroup DMA_LL_EF_Configuration Configuration
-  * @{
-  */
-/**
-  * @brief  Enable DMA channel.
-  * @rmtoll CCR          EN            LL_DMA_EnableChannel
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_EN);
-}
-
-/**
-  * @brief  Disable DMA channel.
-  * @rmtoll CCR          EN            LL_DMA_DisableChannel
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_EN);
-}
-
-/**
-  * @brief  Check if DMA channel is enabled or disabled.
-  * @rmtoll CCR          EN            LL_DMA_IsEnabledChannel
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
-                   DMA_CCR_EN) == (DMA_CCR_EN));
-}
-
-/**
-  * @brief  Configure all parameters link to DMA transfer.
-  * @rmtoll CCR          DIR           LL_DMA_ConfigTransfer\n
-  *         CCR          MEM2MEM       LL_DMA_ConfigTransfer\n
-  *         CCR          CIRC          LL_DMA_ConfigTransfer\n
-  *         CCR          PINC          LL_DMA_ConfigTransfer\n
-  *         CCR          MINC          LL_DMA_ConfigTransfer\n
-  *         CCR          PSIZE         LL_DMA_ConfigTransfer\n
-  *         CCR          MSIZE         LL_DMA_ConfigTransfer\n
-  *         CCR          PL            LL_DMA_ConfigTransfer
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @param  Configuration This parameter must be a combination of all the following values:
-  *         @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY or @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH or @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
-  *         @arg @ref LL_DMA_MODE_NORMAL or @ref LL_DMA_MODE_CIRCULAR
-  *         @arg @ref LL_DMA_PERIPH_INCREMENT or @ref LL_DMA_PERIPH_NOINCREMENT
-  *         @arg @ref LL_DMA_MEMORY_INCREMENT or @ref LL_DMA_MEMORY_NOINCREMENT
-  *         @arg @ref LL_DMA_PDATAALIGN_BYTE or @ref LL_DMA_PDATAALIGN_HALFWORD or @ref LL_DMA_PDATAALIGN_WORD
-  *         @arg @ref LL_DMA_MDATAALIGN_BYTE or @ref LL_DMA_MDATAALIGN_HALFWORD or @ref LL_DMA_MDATAALIGN_WORD
-  *         @arg @ref LL_DMA_PRIORITY_LOW or @ref LL_DMA_PRIORITY_MEDIUM or @ref LL_DMA_PRIORITY_HIGH or @ref LL_DMA_PRIORITY_VERYHIGH
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configuration)
-{
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
-             DMA_CCR_DIR | DMA_CCR_MEM2MEM | DMA_CCR_CIRC | DMA_CCR_PINC | DMA_CCR_MINC | DMA_CCR_PSIZE | DMA_CCR_MSIZE | DMA_CCR_PL,
-             Configuration);
-}
-
-/**
-  * @brief  Set Data transfer direction (read from peripheral or from memory).
-  * @rmtoll CCR          DIR           LL_DMA_SetDataTransferDirection\n
-  *         CCR          MEM2MEM       LL_DMA_SetDataTransferDirection
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @param  Direction This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
-  *         @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
-  *         @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Direction)
-{
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
-             DMA_CCR_DIR | DMA_CCR_MEM2MEM, Direction);
-}
-
-/**
-  * @brief  Get Data transfer direction (read from peripheral or from memory).
-  * @rmtoll CCR          DIR           LL_DMA_GetDataTransferDirection\n
-  *         CCR          MEM2MEM       LL_DMA_GetDataTransferDirection
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
-  *         @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
-  *         @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
-  */
-__STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
-                   DMA_CCR_DIR | DMA_CCR_MEM2MEM));
-}
-
-/**
-  * @brief  Set DMA mode circular or normal.
-  * @note The circular buffer mode cannot be used if the memory-to-memory
-  * data transfer is configured on the selected Channel.
-  * @rmtoll CCR          CIRC          LL_DMA_SetMode
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @param  Mode This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_MODE_NORMAL
-  *         @arg @ref LL_DMA_MODE_CIRCULAR
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Mode)
-{
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_CIRC,
-             Mode);
-}
-
-/**
-  * @brief  Get DMA mode circular or normal.
-  * @rmtoll CCR          CIRC          LL_DMA_GetMode
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_DMA_MODE_NORMAL
-  *         @arg @ref LL_DMA_MODE_CIRCULAR
-  */
-__STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
-                   DMA_CCR_CIRC));
-}
-
-/**
-  * @brief  Set Peripheral increment mode.
-  * @rmtoll CCR          PINC          LL_DMA_SetPeriphIncMode
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @param  PeriphOrM2MSrcIncMode This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_PERIPH_INCREMENT
-  *         @arg @ref LL_DMA_PERIPH_NOINCREMENT
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcIncMode)
-{
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PINC,
-             PeriphOrM2MSrcIncMode);
-}
-
-/**
-  * @brief  Get Peripheral increment mode.
-  * @rmtoll CCR          PINC          LL_DMA_GetPeriphIncMode
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_DMA_PERIPH_INCREMENT
-  *         @arg @ref LL_DMA_PERIPH_NOINCREMENT
-  */
-__STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
-                   DMA_CCR_PINC));
-}
-
-/**
-  * @brief  Set Memory increment mode.
-  * @rmtoll CCR          MINC          LL_DMA_SetMemoryIncMode
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @param  MemoryOrM2MDstIncMode This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_MEMORY_INCREMENT
-  *         @arg @ref LL_DMA_MEMORY_NOINCREMENT
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_SetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstIncMode)
-{
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_MINC,
-             MemoryOrM2MDstIncMode);
-}
-
-/**
-  * @brief  Get Memory increment mode.
-  * @rmtoll CCR          MINC          LL_DMA_GetMemoryIncMode
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_DMA_MEMORY_INCREMENT
-  *         @arg @ref LL_DMA_MEMORY_NOINCREMENT
-  */
-__STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
-                   DMA_CCR_MINC));
-}
-
-/**
-  * @brief  Set Peripheral size.
-  * @rmtoll CCR          PSIZE         LL_DMA_SetPeriphSize
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @param  PeriphOrM2MSrcDataSize This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_PDATAALIGN_BYTE
-  *         @arg @ref LL_DMA_PDATAALIGN_HALFWORD
-  *         @arg @ref LL_DMA_PDATAALIGN_WORD
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcDataSize)
-{
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PSIZE,
-             PeriphOrM2MSrcDataSize);
-}
-
-/**
-  * @brief  Get Peripheral size.
-  * @rmtoll CCR          PSIZE         LL_DMA_GetPeriphSize
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_DMA_PDATAALIGN_BYTE
-  *         @arg @ref LL_DMA_PDATAALIGN_HALFWORD
-  *         @arg @ref LL_DMA_PDATAALIGN_WORD
-  */
-__STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
-                   DMA_CCR_PSIZE));
-}
-
-/**
-  * @brief  Set Memory size.
-  * @rmtoll CCR          MSIZE         LL_DMA_SetMemorySize
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @param  MemoryOrM2MDstDataSize This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_MDATAALIGN_BYTE
-  *         @arg @ref LL_DMA_MDATAALIGN_HALFWORD
-  *         @arg @ref LL_DMA_MDATAALIGN_WORD
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstDataSize)
-{
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_MSIZE,
-             MemoryOrM2MDstDataSize);
-}
-
-/**
-  * @brief  Get Memory size.
-  * @rmtoll CCR          MSIZE         LL_DMA_GetMemorySize
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_DMA_MDATAALIGN_BYTE
-  *         @arg @ref LL_DMA_MDATAALIGN_HALFWORD
-  *         @arg @ref LL_DMA_MDATAALIGN_WORD
-  */
-__STATIC_INLINE uint32_t LL_DMA_GetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
-                   DMA_CCR_MSIZE));
-}
-
-/**
-  * @brief  Set Channel priority level.
-  * @rmtoll CCR          PL            LL_DMA_SetChannelPriorityLevel
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @param  Priority This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_PRIORITY_LOW
-  *         @arg @ref LL_DMA_PRIORITY_MEDIUM
-  *         @arg @ref LL_DMA_PRIORITY_HIGH
-  *         @arg @ref LL_DMA_PRIORITY_VERYHIGH
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_SetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Priority)
-{
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PL,
-             Priority);
-}
-
-/**
-  * @brief  Get Channel priority level.
-  * @rmtoll CCR          PL            LL_DMA_GetChannelPriorityLevel
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_DMA_PRIORITY_LOW
-  *         @arg @ref LL_DMA_PRIORITY_MEDIUM
-  *         @arg @ref LL_DMA_PRIORITY_HIGH
-  *         @arg @ref LL_DMA_PRIORITY_VERYHIGH
-  */
-__STATIC_INLINE uint32_t LL_DMA_GetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
-                   DMA_CCR_PL));
-}
-
-/**
-  * @brief  Set Number of data to transfer.
-  * @note   This action has no effect if
-  *         channel is enabled.
-  * @rmtoll CNDTR        NDT           LL_DMA_SetDataLength
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @param  NbData Between Min_Data = 0 and Max_Data = 0x0000FFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_SetDataLength(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t NbData)
-{
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CNDTR,
-             DMA_CNDTR_NDT, NbData);
-}
-
-/**
-  * @brief  Get Number of data to transfer.
-  * @note   Once the channel is enabled, the return value indicate the
-  *         remaining bytes to be transmitted.
-  * @rmtoll CNDTR        NDT           LL_DMA_GetDataLength
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
-  */
-__STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CNDTR,
-                   DMA_CNDTR_NDT));
-}
-
-/**
-  * @brief  Configure the Source and Destination addresses.
-  * @note   Each IP using DMA provides an API to get directly the register adress (LL_PPP_DMA_GetRegAddr)
-  * @rmtoll CPAR         PA            LL_DMA_ConfigAddresses\n
-  *         CMAR         MA            LL_DMA_ConfigAddresses
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @param  SrcAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
-  * @param  DstAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
-  * @param  Direction This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
-  *         @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
-  *         @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ConfigAddresses(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t SrcAddress,
-                                            uint32_t DstAddress, uint32_t Direction)
-{
-  /* Direction Memory to Periph */
-  if (Direction == LL_DMA_DIRECTION_MEMORY_TO_PERIPH)
-  {
-    MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA,
-               SrcAddress);
-    MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DMA_CPAR_PA,
-               DstAddress);
-  }
-  /* Direction Periph to Memory and Memory to Memory */
-  else
-  {
-    MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DMA_CPAR_PA,
-               SrcAddress);
-    MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA,
-               DstAddress);
-  }
-}
-
-/**
-  * @brief  Set the Memory address.
-  * @note   Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
-  * @rmtoll CMAR         MA            LL_DMA_SetMemoryAddress
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @param  MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
-{
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA,
-             MemoryAddress);
-}
-
-/**
-  * @brief  Set the Peripheral address.
-  * @note   Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
-  * @rmtoll CPAR         PA            LL_DMA_SetPeriphAddress
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @param  PeriphAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphAddress)
-{
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DMA_CPAR_PA,
-             PeriphAddress);
-}
-
-/**
-  * @brief  Get Memory address.
-  * @note   Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
-  * @rmtoll CMAR         MA            LL_DMA_GetMemoryAddress
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
-  */
-__STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR,
-                   DMA_CMAR_MA));
-}
-
-/**
-  * @brief  Get Peripheral address.
-  * @note   Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
-  * @rmtoll CPAR         PA            LL_DMA_GetPeriphAddress
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
-  */
-__STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR,
-                   DMA_CPAR_PA));
-}
-
-/**
-  * @brief  Set the Memory to Memory Source address.
-  * @note   Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
-  * @rmtoll CPAR         PA            LL_DMA_SetM2MSrcAddress
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @param  MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
-{
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DMA_CPAR_PA,
-             MemoryAddress);
-}
-
-/**
-  * @brief  Set the Memory to Memory Destination address.
-  * @note   Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
-  * @rmtoll CMAR         MA            LL_DMA_SetM2MDstAddress
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @param  MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
-{
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA,
-             MemoryAddress);
-}
-
-/**
-  * @brief  Get the Memory to Memory Source address.
-  * @note   Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
-  * @rmtoll CPAR         PA            LL_DMA_GetM2MSrcAddress
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
-  */
-__STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR,
-                   DMA_CPAR_PA));
-}
-
-/**
-  * @brief  Get the Memory to Memory Destination address.
-  * @note   Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
-  * @rmtoll CMAR         MA            LL_DMA_GetM2MDstAddress
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
-  */
-__STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR,
-                   DMA_CMAR_MA));
-}
-
-/**
-  * @brief  Set DMA request for DMA instance on Channel x.
-  * @note   Please refer to Reference Manual to get the available mapping of Request value link to Channel Selection.
-  * @rmtoll CSELR        C1S           LL_DMA_SetPeriphRequest\n
-  *         CSELR        C2S           LL_DMA_SetPeriphRequest\n
-  *         CSELR        C3S           LL_DMA_SetPeriphRequest\n
-  *         CSELR        C4S           LL_DMA_SetPeriphRequest\n
-  *         CSELR        C5S           LL_DMA_SetPeriphRequest\n
-  *         CSELR        C6S           LL_DMA_SetPeriphRequest\n
-  *         CSELR        C7S           LL_DMA_SetPeriphRequest
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @param  PeriphRequest This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_REQUEST_0
-  *         @arg @ref LL_DMA_REQUEST_1
-  *         @arg @ref LL_DMA_REQUEST_2
-  *         @arg @ref LL_DMA_REQUEST_3
-  *         @arg @ref LL_DMA_REQUEST_4
-  *         @arg @ref LL_DMA_REQUEST_5
-  *         @arg @ref LL_DMA_REQUEST_6
-  *         @arg @ref LL_DMA_REQUEST_7
-  *         @arg @ref LL_DMA_REQUEST_8
-  *         @arg @ref LL_DMA_REQUEST_9
-  *         @arg @ref LL_DMA_REQUEST_10
-  *         @arg @ref LL_DMA_REQUEST_11
-  *         @arg @ref LL_DMA_REQUEST_12
-  *         @arg @ref LL_DMA_REQUEST_13
-  *         @arg @ref LL_DMA_REQUEST_14
-  *         @arg @ref LL_DMA_REQUEST_15
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphRequest)
-{
-  MODIFY_REG(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR,
-             DMA_CSELR_C1S << ((Channel - 1U) * 4U), PeriphRequest << DMA_POSITION_CSELR_CXS);
-}
-
-/**
-  * @brief  Get DMA request for DMA instance on Channel x.
-  * @rmtoll CSELR        C1S           LL_DMA_GetPeriphRequest\n
-  *         CSELR        C2S           LL_DMA_GetPeriphRequest\n
-  *         CSELR        C3S           LL_DMA_GetPeriphRequest\n
-  *         CSELR        C4S           LL_DMA_GetPeriphRequest\n
-  *         CSELR        C5S           LL_DMA_GetPeriphRequest\n
-  *         CSELR        C6S           LL_DMA_GetPeriphRequest\n
-  *         CSELR        C7S           LL_DMA_GetPeriphRequest
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_DMA_REQUEST_0
-  *         @arg @ref LL_DMA_REQUEST_1
-  *         @arg @ref LL_DMA_REQUEST_2
-  *         @arg @ref LL_DMA_REQUEST_3
-  *         @arg @ref LL_DMA_REQUEST_4
-  *         @arg @ref LL_DMA_REQUEST_5
-  *         @arg @ref LL_DMA_REQUEST_6
-  *         @arg @ref LL_DMA_REQUEST_7
-  *         @arg @ref LL_DMA_REQUEST_8
-  *         @arg @ref LL_DMA_REQUEST_9
-  *         @arg @ref LL_DMA_REQUEST_10
-  *         @arg @ref LL_DMA_REQUEST_11
-  *         @arg @ref LL_DMA_REQUEST_12
-  *         @arg @ref LL_DMA_REQUEST_13
-  *         @arg @ref LL_DMA_REQUEST_14
-  *         @arg @ref LL_DMA_REQUEST_15
-  */
-__STATIC_INLINE uint32_t LL_DMA_GetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR,
-                   DMA_CSELR_C1S << ((Channel - 1U) * 4U)) >> DMA_POSITION_CSELR_CXS);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup DMA_LL_EF_FLAG_Management FLAG_Management
-  * @{
-  */
-
-/**
-  * @brief  Get Channel 1 global interrupt flag.
-  * @rmtoll ISR          GIF1          LL_DMA_IsActiveFlag_GI1
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI1(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_GIF1) == (DMA_ISR_GIF1));
-}
-
-/**
-  * @brief  Get Channel 2 global interrupt flag.
-  * @rmtoll ISR          GIF2          LL_DMA_IsActiveFlag_GI2
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI2(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_GIF2) == (DMA_ISR_GIF2));
-}
-
-/**
-  * @brief  Get Channel 3 global interrupt flag.
-  * @rmtoll ISR          GIF3          LL_DMA_IsActiveFlag_GI3
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI3(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_GIF3) == (DMA_ISR_GIF3));
-}
-
-/**
-  * @brief  Get Channel 4 global interrupt flag.
-  * @rmtoll ISR          GIF4          LL_DMA_IsActiveFlag_GI4
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI4(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_GIF4) == (DMA_ISR_GIF4));
-}
-
-/**
-  * @brief  Get Channel 5 global interrupt flag.
-  * @rmtoll ISR          GIF5          LL_DMA_IsActiveFlag_GI5
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI5(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_GIF5) == (DMA_ISR_GIF5));
-}
-
-#if defined(DMA1_Channel6)
-/**
-  * @brief  Get Channel 6 global interrupt flag.
-  * @rmtoll ISR          GIF6          LL_DMA_IsActiveFlag_GI6
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI6(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_GIF6) == (DMA_ISR_GIF6));
-}
-#endif
-
-#if defined(DMA1_Channel7)
-/**
-  * @brief  Get Channel 7 global interrupt flag.
-  * @rmtoll ISR          GIF7          LL_DMA_IsActiveFlag_GI7
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI7(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_GIF7) == (DMA_ISR_GIF7));
-}
-#endif
-
-/**
-  * @brief  Get Channel 1 transfer complete flag.
-  * @rmtoll ISR          TCIF1         LL_DMA_IsActiveFlag_TC1
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC1(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF1) == (DMA_ISR_TCIF1));
-}
-
-/**
-  * @brief  Get Channel 2 transfer complete flag.
-  * @rmtoll ISR          TCIF2         LL_DMA_IsActiveFlag_TC2
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF2) == (DMA_ISR_TCIF2));
-}
-
-/**
-  * @brief  Get Channel 3 transfer complete flag.
-  * @rmtoll ISR          TCIF3         LL_DMA_IsActiveFlag_TC3
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC3(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF3) == (DMA_ISR_TCIF3));
-}
-
-/**
-  * @brief  Get Channel 4 transfer complete flag.
-  * @rmtoll ISR          TCIF4         LL_DMA_IsActiveFlag_TC4
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC4(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF4) == (DMA_ISR_TCIF4));
-}
-
-/**
-  * @brief  Get Channel 5 transfer complete flag.
-  * @rmtoll ISR          TCIF5         LL_DMA_IsActiveFlag_TC5
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC5(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF5) == (DMA_ISR_TCIF5));
-}
-
-#if defined(DMA1_Channel6)
-/**
-  * @brief  Get Channel 6 transfer complete flag.
-  * @rmtoll ISR          TCIF6         LL_DMA_IsActiveFlag_TC6
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC6(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF6) == (DMA_ISR_TCIF6));
-}
-#endif
-
-#if defined(DMA1_Channel7)
-/**
-  * @brief  Get Channel 7 transfer complete flag.
-  * @rmtoll ISR          TCIF7         LL_DMA_IsActiveFlag_TC7
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC7(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF7) == (DMA_ISR_TCIF7));
-}
-#endif
-
-/**
-  * @brief  Get Channel 1 half transfer flag.
-  * @rmtoll ISR          HTIF1         LL_DMA_IsActiveFlag_HT1
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT1(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF1) == (DMA_ISR_HTIF1));
-}
-
-/**
-  * @brief  Get Channel 2 half transfer flag.
-  * @rmtoll ISR          HTIF2         LL_DMA_IsActiveFlag_HT2
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT2(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF2) == (DMA_ISR_HTIF2));
-}
-
-/**
-  * @brief  Get Channel 3 half transfer flag.
-  * @rmtoll ISR          HTIF3         LL_DMA_IsActiveFlag_HT3
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT3(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF3) == (DMA_ISR_HTIF3));
-}
-
-/**
-  * @brief  Get Channel 4 half transfer flag.
-  * @rmtoll ISR          HTIF4         LL_DMA_IsActiveFlag_HT4
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT4(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF4) == (DMA_ISR_HTIF4));
-}
-
-/**
-  * @brief  Get Channel 5 half transfer flag.
-  * @rmtoll ISR          HTIF5         LL_DMA_IsActiveFlag_HT5
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF5) == (DMA_ISR_HTIF5));
-}
-
-#if defined(DMA1_Channel6)
-/**
-  * @brief  Get Channel 6 half transfer flag.
-  * @rmtoll ISR          HTIF6         LL_DMA_IsActiveFlag_HT6
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT6(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF6) == (DMA_ISR_HTIF6));
-}
-#endif
-
-#if defined(DMA1_Channel7)
-/**
-  * @brief  Get Channel 7 half transfer flag.
-  * @rmtoll ISR          HTIF7         LL_DMA_IsActiveFlag_HT7
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT7(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF7) == (DMA_ISR_HTIF7));
-}
-#endif
-
-/**
-  * @brief  Get Channel 1 transfer error flag.
-  * @rmtoll ISR          TEIF1         LL_DMA_IsActiveFlag_TE1
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF1) == (DMA_ISR_TEIF1));
-}
-
-/**
-  * @brief  Get Channel 2 transfer error flag.
-  * @rmtoll ISR          TEIF2         LL_DMA_IsActiveFlag_TE2
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE2(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF2) == (DMA_ISR_TEIF2));
-}
-
-/**
-  * @brief  Get Channel 3 transfer error flag.
-  * @rmtoll ISR          TEIF3         LL_DMA_IsActiveFlag_TE3
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE3(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF3) == (DMA_ISR_TEIF3));
-}
-
-/**
-  * @brief  Get Channel 4 transfer error flag.
-  * @rmtoll ISR          TEIF4         LL_DMA_IsActiveFlag_TE4
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE4(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF4) == (DMA_ISR_TEIF4));
-}
-
-/**
-  * @brief  Get Channel 5 transfer error flag.
-  * @rmtoll ISR          TEIF5         LL_DMA_IsActiveFlag_TE5
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE5(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF5) == (DMA_ISR_TEIF5));
-}
-
-#if defined(DMA1_Channel6)
-/**
-  * @brief  Get Channel 6 transfer error flag.
-  * @rmtoll ISR          TEIF6         LL_DMA_IsActiveFlag_TE6
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE6(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF6) == (DMA_ISR_TEIF6));
-}
-#endif
-
-#if defined(DMA1_Channel7)
-/**
-  * @brief  Get Channel 7 transfer error flag.
-  * @rmtoll ISR          TEIF7         LL_DMA_IsActiveFlag_TE7
-  * @param  DMAx DMAx Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE7(DMA_TypeDef *DMAx)
-{
-  return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF7) == (DMA_ISR_TEIF7));
-}
-#endif
-
-/**
-  * @brief  Clear Channel 1 global interrupt flag.
-  * @rmtoll IFCR         CGIF1         LL_DMA_ClearFlag_GI1
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_GI1(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF1);
-}
-
-/**
-  * @brief  Clear Channel 2 global interrupt flag.
-  * @rmtoll IFCR         CGIF2         LL_DMA_ClearFlag_GI2
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_GI2(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF2);
-}
-
-/**
-  * @brief  Clear Channel 3 global interrupt flag.
-  * @rmtoll IFCR         CGIF3         LL_DMA_ClearFlag_GI3
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_GI3(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF3);
-}
-
-/**
-  * @brief  Clear Channel 4 global interrupt flag.
-  * @rmtoll IFCR         CGIF4         LL_DMA_ClearFlag_GI4
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_GI4(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF4);
-}
-
-/**
-  * @brief  Clear Channel 5 global interrupt flag.
-  * @rmtoll IFCR         CGIF5         LL_DMA_ClearFlag_GI5
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_GI5(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF5);
-}
-
-#if defined(DMA1_Channel6)
-/**
-  * @brief  Clear Channel 6 global interrupt flag.
-  * @rmtoll IFCR         CGIF6         LL_DMA_ClearFlag_GI6
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_GI6(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF6);
-}
-#endif
-
-#if defined(DMA1_Channel7)
-/**
-  * @brief  Clear Channel 7 global interrupt flag.
-  * @rmtoll IFCR         CGIF7         LL_DMA_ClearFlag_GI7
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_GI7(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF7);
-}
-#endif
-
-/**
-  * @brief  Clear Channel 1  transfer complete flag.
-  * @rmtoll IFCR         CTCIF1        LL_DMA_ClearFlag_TC1
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_TC1(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF1);
-}
-
-/**
-  * @brief  Clear Channel 2  transfer complete flag.
-  * @rmtoll IFCR         CTCIF2        LL_DMA_ClearFlag_TC2
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_TC2(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF2);
-}
-
-/**
-  * @brief  Clear Channel 3  transfer complete flag.
-  * @rmtoll IFCR         CTCIF3        LL_DMA_ClearFlag_TC3
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_TC3(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF3);
-}
-
-/**
-  * @brief  Clear Channel 4  transfer complete flag.
-  * @rmtoll IFCR         CTCIF4        LL_DMA_ClearFlag_TC4
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_TC4(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF4);
-}
-
-/**
-  * @brief  Clear Channel 5  transfer complete flag.
-  * @rmtoll IFCR         CTCIF5        LL_DMA_ClearFlag_TC5
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF5);
-}
-
-#if defined(DMA1_Channel6)
-/**
-  * @brief  Clear Channel 6  transfer complete flag.
-  * @rmtoll IFCR         CTCIF6        LL_DMA_ClearFlag_TC6
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_TC6(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF6);
-}
-#endif
-
-#if defined(DMA1_Channel7)
-/**
-  * @brief  Clear Channel 7  transfer complete flag.
-  * @rmtoll IFCR         CTCIF7        LL_DMA_ClearFlag_TC7
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF7);
-}
-#endif
-
-/**
-  * @brief  Clear Channel 1  half transfer flag.
-  * @rmtoll IFCR         CHTIF1        LL_DMA_ClearFlag_HT1
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_HT1(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF1);
-}
-
-/**
-  * @brief  Clear Channel 2  half transfer flag.
-  * @rmtoll IFCR         CHTIF2        LL_DMA_ClearFlag_HT2
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_HT2(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF2);
-}
-
-/**
-  * @brief  Clear Channel 3  half transfer flag.
-  * @rmtoll IFCR         CHTIF3        LL_DMA_ClearFlag_HT3
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_HT3(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF3);
-}
-
-/**
-  * @brief  Clear Channel 4  half transfer flag.
-  * @rmtoll IFCR         CHTIF4        LL_DMA_ClearFlag_HT4
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_HT4(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF4);
-}
-
-/**
-  * @brief  Clear Channel 5  half transfer flag.
-  * @rmtoll IFCR         CHTIF5        LL_DMA_ClearFlag_HT5
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_HT5(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF5);
-}
-
-#if defined(DMA1_Channel6)
-/**
-  * @brief  Clear Channel 6  half transfer flag.
-  * @rmtoll IFCR         CHTIF6        LL_DMA_ClearFlag_HT6
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_HT6(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF6);
-}
-#endif
-
-#if defined(DMA1_Channel7)
-/**
-  * @brief  Clear Channel 7  half transfer flag.
-  * @rmtoll IFCR         CHTIF7        LL_DMA_ClearFlag_HT7
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_HT7(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF7);
-}
-#endif
-
-/**
-  * @brief  Clear Channel 1 transfer error flag.
-  * @rmtoll IFCR         CTEIF1        LL_DMA_ClearFlag_TE1
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_TE1(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF1);
-}
-
-/**
-  * @brief  Clear Channel 2 transfer error flag.
-  * @rmtoll IFCR         CTEIF2        LL_DMA_ClearFlag_TE2
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_TE2(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF2);
-}
-
-/**
-  * @brief  Clear Channel 3 transfer error flag.
-  * @rmtoll IFCR         CTEIF3        LL_DMA_ClearFlag_TE3
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_TE3(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF3);
-}
-
-/**
-  * @brief  Clear Channel 4 transfer error flag.
-  * @rmtoll IFCR         CTEIF4        LL_DMA_ClearFlag_TE4
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_TE4(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF4);
-}
-
-/**
-  * @brief  Clear Channel 5 transfer error flag.
-  * @rmtoll IFCR         CTEIF5        LL_DMA_ClearFlag_TE5
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_TE5(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF5);
-}
-
-#if defined(DMA1_Channel6)
-/**
-  * @brief  Clear Channel 6 transfer error flag.
-  * @rmtoll IFCR         CTEIF6        LL_DMA_ClearFlag_TE6
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_TE6(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF6);
-}
-#endif
-
-#if defined(DMA1_Channel7)
-/**
-  * @brief  Clear Channel 7 transfer error flag.
-  * @rmtoll IFCR         CTEIF7        LL_DMA_ClearFlag_TE7
-  * @param  DMAx DMAx Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx)
-{
-  SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF7);
-}
-#endif
-
-/**
-  * @}
-  */
-
-/** @defgroup DMA_LL_EF_IT_Management IT_Management
-  * @{
-  */
-/**
-  * @brief  Enable Transfer complete interrupt.
-  * @rmtoll CCR          TCIE          LL_DMA_EnableIT_TC
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE);
-}
-
-/**
-  * @brief  Enable Half transfer interrupt.
-  * @rmtoll CCR          HTIE          LL_DMA_EnableIT_HT
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE);
-}
-
-/**
-  * @brief  Enable Transfer error interrupt.
-  * @rmtoll CCR          TEIE          LL_DMA_EnableIT_TE
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TEIE);
-}
-
-/**
-  * @brief  Disable Transfer complete interrupt.
-  * @rmtoll CCR          TCIE          LL_DMA_DisableIT_TC
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE);
-}
-
-/**
-  * @brief  Disable Half transfer interrupt.
-  * @rmtoll CCR          HTIE          LL_DMA_DisableIT_HT
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE);
-}
-
-/**
-  * @brief  Disable Transfer error interrupt.
-  * @rmtoll CCR          TEIE          LL_DMA_DisableIT_TE
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TEIE);
-}
-
-/**
-  * @brief  Check if Transfer complete Interrupt is enabled.
-  * @rmtoll CCR          TCIE          LL_DMA_IsEnabledIT_TC
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
-                   DMA_CCR_TCIE) == (DMA_CCR_TCIE));
-}
-
-/**
-  * @brief  Check if Half transfer Interrupt is enabled.
-  * @rmtoll CCR          HTIE          LL_DMA_IsEnabledIT_HT
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
-                   DMA_CCR_HTIE) == (DMA_CCR_HTIE));
-}
-
-/**
-  * @brief  Check if Transfer error Interrupt is enabled.
-  * @rmtoll CCR          TEIE          LL_DMA_IsEnabledIT_TE
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6
-  *         @arg @ref LL_DMA_CHANNEL_7
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
-                   DMA_CCR_TEIE) == (DMA_CCR_TEIE));
-}
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup DMA_LL_EF_Init Initialization and de-initialization functions
-  * @{
-  */
-
-uint32_t LL_DMA_Init(DMA_TypeDef *DMAx, uint32_t Channel, LL_DMA_InitTypeDef *DMA_InitStruct);
-uint32_t LL_DMA_DeInit(DMA_TypeDef *DMAx, uint32_t Channel);
-void LL_DMA_StructInit(LL_DMA_InitTypeDef *DMA_InitStruct);
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* DMA1 */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_DMA_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h
deleted file mode 100755
index e6a6e702..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h
+++ /dev/null
@@ -1,1032 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_exti.h
-  * @author  MCD Application Team
-  * @brief   Header file of EXTI LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_EXTI_H
-#define __STM32L0xx_LL_EXTI_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (EXTI)
-
-/** @defgroup EXTI_LL EXTI
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private Macros ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
-  * @{
-  */
-/**
-  * @}
-  */
-#endif /*USE_FULL_LL_DRIVER*/
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
-  * @{
-  */
-typedef struct
-{
-
-  uint32_t Line_0_31;           /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
-                                     This parameter can be any combination of @ref EXTI_LL_EC_LINE */
-
-  FunctionalState LineCommand;  /*!< Specifies the new state of the selected EXTI lines.
-                                     This parameter can be set either to ENABLE or DISABLE */
-
-  uint8_t Mode;                 /*!< Specifies the mode for the EXTI lines.
-                                     This parameter can be a value of @ref EXTI_LL_EC_MODE. */
-
-  uint8_t Trigger;              /*!< Specifies the trigger signal active edge for the EXTI lines.
-                                     This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
-} LL_EXTI_InitTypeDef;
-
-/**
-  * @}
-  */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
-  * @{
-  */
-
-/** @defgroup EXTI_LL_EC_LINE LINE
-  * @{
-  */
-#define LL_EXTI_LINE_0                 EXTI_IMR_IM0           /*!< Extended line 0 */
-#define LL_EXTI_LINE_1                 EXTI_IMR_IM1           /*!< Extended line 1 */
-#define LL_EXTI_LINE_2                 EXTI_IMR_IM2           /*!< Extended line 2 */
-#define LL_EXTI_LINE_3                 EXTI_IMR_IM3           /*!< Extended line 3 */
-#define LL_EXTI_LINE_4                 EXTI_IMR_IM4           /*!< Extended line 4 */
-#define LL_EXTI_LINE_5                 EXTI_IMR_IM5           /*!< Extended line 5 */
-#define LL_EXTI_LINE_6                 EXTI_IMR_IM6           /*!< Extended line 6 */
-#define LL_EXTI_LINE_7                 EXTI_IMR_IM7           /*!< Extended line 7 */
-#define LL_EXTI_LINE_8                 EXTI_IMR_IM8           /*!< Extended line 8 */
-#define LL_EXTI_LINE_9                 EXTI_IMR_IM9           /*!< Extended line 9 */
-#define LL_EXTI_LINE_10                EXTI_IMR_IM10          /*!< Extended line 10 */
-#define LL_EXTI_LINE_11                EXTI_IMR_IM11          /*!< Extended line 11 */
-#define LL_EXTI_LINE_12                EXTI_IMR_IM12          /*!< Extended line 12 */
-#define LL_EXTI_LINE_13                EXTI_IMR_IM13          /*!< Extended line 13 */
-#define LL_EXTI_LINE_14                EXTI_IMR_IM14          /*!< Extended line 14 */
-#define LL_EXTI_LINE_15                EXTI_IMR_IM15          /*!< Extended line 15 */
-#if defined(EXTI_IMR_IM16)
-#define LL_EXTI_LINE_16                EXTI_IMR_IM16          /*!< Extended line 16 */
-#endif
-#define LL_EXTI_LINE_17                EXTI_IMR_IM17          /*!< Extended line 17 */
-#if defined(EXTI_IMR_IM18)
-#define LL_EXTI_LINE_18                EXTI_IMR_IM18          /*!< Extended line 18 */
-#endif
-#define LL_EXTI_LINE_19                EXTI_IMR_IM19          /*!< Extended line 19 */
-#if defined(EXTI_IMR_IM20)
-#define LL_EXTI_LINE_20                EXTI_IMR_IM20          /*!< Extended line 20 */
-#endif
-#if defined(EXTI_IMR_IM21)
-#define LL_EXTI_LINE_21                EXTI_IMR_IM21          /*!< Extended line 21 */
-#endif
-#if defined(EXTI_IMR_IM22)
-#define LL_EXTI_LINE_22                EXTI_IMR_IM22          /*!< Extended line 22 */
-#endif
-#define LL_EXTI_LINE_23                EXTI_IMR_IM23          /*!< Extended line 23 */
-#if defined(EXTI_IMR_IM24)
-#define LL_EXTI_LINE_24                EXTI_IMR_IM24          /*!< Extended line 24 */
-#endif
-#if defined(EXTI_IMR_IM25)
-#define LL_EXTI_LINE_25                EXTI_IMR_IM25          /*!< Extended line 25 */
-#endif
-#if defined(EXTI_IMR_IM26)
-#define LL_EXTI_LINE_26                EXTI_IMR_IM26          /*!< Extended line 26 */
-#endif
-#if defined(EXTI_IMR_IM27)
-#define LL_EXTI_LINE_27                EXTI_IMR_IM27          /*!< Extended line 27 */
-#endif
-#if defined(EXTI_IMR_IM28)
-#define LL_EXTI_LINE_28                EXTI_IMR_IM28          /*!< Extended line 28 */
-#endif
-#if defined(EXTI_IMR_IM29)
-#define LL_EXTI_LINE_29                EXTI_IMR_IM29          /*!< Extended line 29 */
-#endif
-#if defined(EXTI_IMR_IM30)
-#define LL_EXTI_LINE_30                EXTI_IMR_IM30          /*!< Extended line 30 */
-#endif
-#if defined(EXTI_IMR_IM31)
-#define LL_EXTI_LINE_31                EXTI_IMR_IM31          /*!< Extended line 31 */
-#endif
-#define LL_EXTI_LINE_ALL_0_31          EXTI_IMR_IM            /*!< All Extended line not reserved*/
-
-
-#define LL_EXTI_LINE_ALL               ((uint32_t)0xFFFFFFFFU)  /*!< All Extended line */
-
-#if defined(USE_FULL_LL_DRIVER)
-#define LL_EXTI_LINE_NONE              ((uint32_t)0x00000000U)  /*!< None Extended line */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/**
-  * @}
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/** @defgroup EXTI_LL_EC_MODE Mode
-  * @{
-  */
-#define LL_EXTI_MODE_IT                 ((uint8_t)0x00U) /*!< Interrupt Mode */
-#define LL_EXTI_MODE_EVENT              ((uint8_t)0x01U) /*!< Event Mode */
-#define LL_EXTI_MODE_IT_EVENT           ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
-/**
-  * @}
-  */
-
-/** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
-  * @{
-  */
-#define LL_EXTI_TRIGGER_NONE            ((uint8_t)0x00U) /*!< No Trigger Mode */
-#define LL_EXTI_TRIGGER_RISING          ((uint8_t)0x01U) /*!< Trigger Rising Mode */
-#define LL_EXTI_TRIGGER_FALLING         ((uint8_t)0x02U) /*!< Trigger Falling Mode */
-#define LL_EXTI_TRIGGER_RISING_FALLING  ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
-
-/**
-  * @}
-  */
-
-
-#endif /*USE_FULL_LL_DRIVER*/
-
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
-  * @{
-  */
-
-/** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in EXTI register
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in EXTI register
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
- * @{
- */
-/** @defgroup EXTI_LL_EF_IT_Management IT_Management
-  * @{
-  */
-
-/**
-  * @brief  Enable ExtiLine Interrupt request for Lines in range 0 to 31
-  * @note The reset value for the direct or internal lines (see RM)
-  *       is set to 1 in order to enable the interrupt by default.
-  *       Bits are set automatically at Power on.
-  * @rmtoll IMR         IMx           LL_EXTI_EnableIT_0_31
-  * @param  ExtiLine This parameter can be one of the following values:
-  *         @arg @ref LL_EXTI_LINE_0
-  *         @arg @ref LL_EXTI_LINE_1
-  *         @arg @ref LL_EXTI_LINE_2
-  *         @arg @ref LL_EXTI_LINE_3
-  *         @arg @ref LL_EXTI_LINE_4
-  *         @arg @ref LL_EXTI_LINE_5
-  *         @arg @ref LL_EXTI_LINE_6
-  *         @arg @ref LL_EXTI_LINE_7
-  *         @arg @ref LL_EXTI_LINE_8
-  *         @arg @ref LL_EXTI_LINE_9
-  *         @arg @ref LL_EXTI_LINE_10
-  *         @arg @ref LL_EXTI_LINE_11
-  *         @arg @ref LL_EXTI_LINE_12
-  *         @arg @ref LL_EXTI_LINE_13
-  *         @arg @ref LL_EXTI_LINE_14
-  *         @arg @ref LL_EXTI_LINE_15
-  *         @arg @ref LL_EXTI_LINE_16
-  *         @arg @ref LL_EXTI_LINE_17
-  *         @arg @ref LL_EXTI_LINE_18
-  *         @arg @ref LL_EXTI_LINE_19
-  *         @arg @ref LL_EXTI_LINE_20
-  *         @arg @ref LL_EXTI_LINE_21
-  *         @arg @ref LL_EXTI_LINE_22
-  *         @arg @ref LL_EXTI_LINE_23
-  *         @arg @ref LL_EXTI_LINE_24
-  *         @arg @ref LL_EXTI_LINE_25
-  *         @arg @ref LL_EXTI_LINE_26
-  *         @arg @ref LL_EXTI_LINE_27
-  *         @arg @ref LL_EXTI_LINE_28
-  *         @arg @ref LL_EXTI_LINE_29
-  *         @arg @ref LL_EXTI_LINE_30
-  *         @arg @ref LL_EXTI_LINE_31
-  *         @arg @ref LL_EXTI_LINE_ALL_0_31
-  * @note   Please check each device line mapping for EXTI Line availability
-  * @retval None
-  */
-__STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
-{
-  SET_BIT(EXTI->IMR, ExtiLine);
-}
-
-/**
-  * @brief  Disable ExtiLine Interrupt request for Lines in range 0 to 31
-  * @note The reset value for the direct or internal lines (see RM)
-  *       is set to 1 in order to enable the interrupt by default.
-  *       Bits are set automatically at Power on.
-  * @rmtoll IMR         IMx           LL_EXTI_DisableIT_0_31
-  * @param  ExtiLine This parameter can be one of the following values:
-  *         @arg @ref LL_EXTI_LINE_0
-  *         @arg @ref LL_EXTI_LINE_1
-  *         @arg @ref LL_EXTI_LINE_2
-  *         @arg @ref LL_EXTI_LINE_3
-  *         @arg @ref LL_EXTI_LINE_4
-  *         @arg @ref LL_EXTI_LINE_5
-  *         @arg @ref LL_EXTI_LINE_6
-  *         @arg @ref LL_EXTI_LINE_7
-  *         @arg @ref LL_EXTI_LINE_8
-  *         @arg @ref LL_EXTI_LINE_9
-  *         @arg @ref LL_EXTI_LINE_10
-  *         @arg @ref LL_EXTI_LINE_11
-  *         @arg @ref LL_EXTI_LINE_12
-  *         @arg @ref LL_EXTI_LINE_13
-  *         @arg @ref LL_EXTI_LINE_14
-  *         @arg @ref LL_EXTI_LINE_15
-  *         @arg @ref LL_EXTI_LINE_16
-  *         @arg @ref LL_EXTI_LINE_17
-  *         @arg @ref LL_EXTI_LINE_18
-  *         @arg @ref LL_EXTI_LINE_19
-  *         @arg @ref LL_EXTI_LINE_20
-  *         @arg @ref LL_EXTI_LINE_21
-  *         @arg @ref LL_EXTI_LINE_22
-  *         @arg @ref LL_EXTI_LINE_23
-  *         @arg @ref LL_EXTI_LINE_24
-  *         @arg @ref LL_EXTI_LINE_25
-  *         @arg @ref LL_EXTI_LINE_26
-  *         @arg @ref LL_EXTI_LINE_27
-  *         @arg @ref LL_EXTI_LINE_28
-  *         @arg @ref LL_EXTI_LINE_29
-  *         @arg @ref LL_EXTI_LINE_30
-  *         @arg @ref LL_EXTI_LINE_31
-  *         @arg @ref LL_EXTI_LINE_ALL_0_31
-  * @note   Please check each device line mapping for EXTI Line availability
-  * @retval None
-  */
-__STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
-{
-  CLEAR_BIT(EXTI->IMR, ExtiLine);
-}
-
-
-/**
-  * @brief  Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
-  * @note The reset value for the direct or internal lines (see RM)
-  *       is set to 1 in order to enable the interrupt by default.
-  *       Bits are set automatically at Power on.
-  * @rmtoll IMR         IMx           LL_EXTI_IsEnabledIT_0_31
-  * @param  ExtiLine This parameter can be one of the following values:
-  *         @arg @ref LL_EXTI_LINE_0
-  *         @arg @ref LL_EXTI_LINE_1
-  *         @arg @ref LL_EXTI_LINE_2
-  *         @arg @ref LL_EXTI_LINE_3
-  *         @arg @ref LL_EXTI_LINE_4
-  *         @arg @ref LL_EXTI_LINE_5
-  *         @arg @ref LL_EXTI_LINE_6
-  *         @arg @ref LL_EXTI_LINE_7
-  *         @arg @ref LL_EXTI_LINE_8
-  *         @arg @ref LL_EXTI_LINE_9
-  *         @arg @ref LL_EXTI_LINE_10
-  *         @arg @ref LL_EXTI_LINE_11
-  *         @arg @ref LL_EXTI_LINE_12
-  *         @arg @ref LL_EXTI_LINE_13
-  *         @arg @ref LL_EXTI_LINE_14
-  *         @arg @ref LL_EXTI_LINE_15
-  *         @arg @ref LL_EXTI_LINE_16
-  *         @arg @ref LL_EXTI_LINE_17
-  *         @arg @ref LL_EXTI_LINE_18
-  *         @arg @ref LL_EXTI_LINE_19
-  *         @arg @ref LL_EXTI_LINE_20
-  *         @arg @ref LL_EXTI_LINE_21
-  *         @arg @ref LL_EXTI_LINE_22
-  *         @arg @ref LL_EXTI_LINE_23
-  *         @arg @ref LL_EXTI_LINE_24
-  *         @arg @ref LL_EXTI_LINE_25
-  *         @arg @ref LL_EXTI_LINE_26
-  *         @arg @ref LL_EXTI_LINE_27
-  *         @arg @ref LL_EXTI_LINE_28
-  *         @arg @ref LL_EXTI_LINE_29
-  *         @arg @ref LL_EXTI_LINE_30
-  *         @arg @ref LL_EXTI_LINE_31
-  *         @arg @ref LL_EXTI_LINE_ALL_0_31
-  * @note   Please check each device line mapping for EXTI Line availability
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
-{
-  return (READ_BIT(EXTI->IMR, ExtiLine) == (ExtiLine));
-}
-
-
-/**
-  * @}
-  */
-
-/** @defgroup EXTI_LL_EF_Event_Management Event_Management
-  * @{
-  */
-
-/**
-  * @brief  Enable ExtiLine Event request for Lines in range 0 to 31
-  * @rmtoll EMR         EMx           LL_EXTI_EnableEvent_0_31
-  * @param  ExtiLine This parameter can be one of the following values:
-  *         @arg @ref LL_EXTI_LINE_0
-  *         @arg @ref LL_EXTI_LINE_1
-  *         @arg @ref LL_EXTI_LINE_2
-  *         @arg @ref LL_EXTI_LINE_3
-  *         @arg @ref LL_EXTI_LINE_4
-  *         @arg @ref LL_EXTI_LINE_5
-  *         @arg @ref LL_EXTI_LINE_6
-  *         @arg @ref LL_EXTI_LINE_7
-  *         @arg @ref LL_EXTI_LINE_8
-  *         @arg @ref LL_EXTI_LINE_9
-  *         @arg @ref LL_EXTI_LINE_10
-  *         @arg @ref LL_EXTI_LINE_11
-  *         @arg @ref LL_EXTI_LINE_12
-  *         @arg @ref LL_EXTI_LINE_13
-  *         @arg @ref LL_EXTI_LINE_14
-  *         @arg @ref LL_EXTI_LINE_15
-  *         @arg @ref LL_EXTI_LINE_16
-  *         @arg @ref LL_EXTI_LINE_17
-  *         @arg @ref LL_EXTI_LINE_18
-  *         @arg @ref LL_EXTI_LINE_19
-  *         @arg @ref LL_EXTI_LINE_20
-  *         @arg @ref LL_EXTI_LINE_21
-  *         @arg @ref LL_EXTI_LINE_22
-  *         @arg @ref LL_EXTI_LINE_23
-  *         @arg @ref LL_EXTI_LINE_24
-  *         @arg @ref LL_EXTI_LINE_25
-  *         @arg @ref LL_EXTI_LINE_26
-  *         @arg @ref LL_EXTI_LINE_27
-  *         @arg @ref LL_EXTI_LINE_28
-  *         @arg @ref LL_EXTI_LINE_29
-  *         @arg @ref LL_EXTI_LINE_30
-  *         @arg @ref LL_EXTI_LINE_31
-  *         @arg @ref LL_EXTI_LINE_ALL_0_31
-  * @note   Please check each device line mapping for EXTI Line availability
-  * @retval None
-  */
-__STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
-{
-  SET_BIT(EXTI->EMR, ExtiLine);
-
-}
-
-
-/**
-  * @brief  Disable ExtiLine Event request for Lines in range 0 to 31
-  * @rmtoll EMR         EMx           LL_EXTI_DisableEvent_0_31
-  * @param  ExtiLine This parameter can be one of the following values:
-  *         @arg @ref LL_EXTI_LINE_0
-  *         @arg @ref LL_EXTI_LINE_1
-  *         @arg @ref LL_EXTI_LINE_2
-  *         @arg @ref LL_EXTI_LINE_3
-  *         @arg @ref LL_EXTI_LINE_4
-  *         @arg @ref LL_EXTI_LINE_5
-  *         @arg @ref LL_EXTI_LINE_6
-  *         @arg @ref LL_EXTI_LINE_7
-  *         @arg @ref LL_EXTI_LINE_8
-  *         @arg @ref LL_EXTI_LINE_9
-  *         @arg @ref LL_EXTI_LINE_10
-  *         @arg @ref LL_EXTI_LINE_11
-  *         @arg @ref LL_EXTI_LINE_12
-  *         @arg @ref LL_EXTI_LINE_13
-  *         @arg @ref LL_EXTI_LINE_14
-  *         @arg @ref LL_EXTI_LINE_15
-  *         @arg @ref LL_EXTI_LINE_16
-  *         @arg @ref LL_EXTI_LINE_17
-  *         @arg @ref LL_EXTI_LINE_18
-  *         @arg @ref LL_EXTI_LINE_19
-  *         @arg @ref LL_EXTI_LINE_20
-  *         @arg @ref LL_EXTI_LINE_21
-  *         @arg @ref LL_EXTI_LINE_22
-  *         @arg @ref LL_EXTI_LINE_23
-  *         @arg @ref LL_EXTI_LINE_24
-  *         @arg @ref LL_EXTI_LINE_25
-  *         @arg @ref LL_EXTI_LINE_26
-  *         @arg @ref LL_EXTI_LINE_27
-  *         @arg @ref LL_EXTI_LINE_28
-  *         @arg @ref LL_EXTI_LINE_29
-  *         @arg @ref LL_EXTI_LINE_30
-  *         @arg @ref LL_EXTI_LINE_31
-  *         @arg @ref LL_EXTI_LINE_ALL_0_31
-  * @note   Please check each device line mapping for EXTI Line availability
-  * @retval None
-  */
-__STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
-{
-  CLEAR_BIT(EXTI->EMR, ExtiLine);
-}
-
-
-/**
-  * @brief  Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
-  * @rmtoll EMR         EMx           LL_EXTI_IsEnabledEvent_0_31
-  * @param  ExtiLine This parameter can be one of the following values:
-  *         @arg @ref LL_EXTI_LINE_0
-  *         @arg @ref LL_EXTI_LINE_1
-  *         @arg @ref LL_EXTI_LINE_2
-  *         @arg @ref LL_EXTI_LINE_3
-  *         @arg @ref LL_EXTI_LINE_4
-  *         @arg @ref LL_EXTI_LINE_5
-  *         @arg @ref LL_EXTI_LINE_6
-  *         @arg @ref LL_EXTI_LINE_7
-  *         @arg @ref LL_EXTI_LINE_8
-  *         @arg @ref LL_EXTI_LINE_9
-  *         @arg @ref LL_EXTI_LINE_10
-  *         @arg @ref LL_EXTI_LINE_11
-  *         @arg @ref LL_EXTI_LINE_12
-  *         @arg @ref LL_EXTI_LINE_13
-  *         @arg @ref LL_EXTI_LINE_14
-  *         @arg @ref LL_EXTI_LINE_15
-  *         @arg @ref LL_EXTI_LINE_16
-  *         @arg @ref LL_EXTI_LINE_17
-  *         @arg @ref LL_EXTI_LINE_18
-  *         @arg @ref LL_EXTI_LINE_19
-  *         @arg @ref LL_EXTI_LINE_20
-  *         @arg @ref LL_EXTI_LINE_21
-  *         @arg @ref LL_EXTI_LINE_22
-  *         @arg @ref LL_EXTI_LINE_23
-  *         @arg @ref LL_EXTI_LINE_24
-  *         @arg @ref LL_EXTI_LINE_25
-  *         @arg @ref LL_EXTI_LINE_26
-  *         @arg @ref LL_EXTI_LINE_27
-  *         @arg @ref LL_EXTI_LINE_28
-  *         @arg @ref LL_EXTI_LINE_29
-  *         @arg @ref LL_EXTI_LINE_30
-  *         @arg @ref LL_EXTI_LINE_31
-  *         @arg @ref LL_EXTI_LINE_ALL_0_31
-  * @note   Please check each device line mapping for EXTI Line availability
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
-{
-  return (READ_BIT(EXTI->EMR, ExtiLine) == (ExtiLine));
-
-}
-
-
-/**
-  * @}
-  */
-
-/** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
-  * @{
-  */
-
-/**
-  * @brief  Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
-  * @note The configurable wakeup lines are edge-triggered. No glitch must be
-  *       generated on these lines. If a rising edge on a configurable interrupt
-  *       line occurs during a write operation in the EXTI_RTSR register, the
-  *       pending bit is not set.
-  *       Rising and falling edge triggers can be set for
-  *       the same interrupt line. In this case, both generate a trigger
-  *       condition.
-  * @rmtoll RTSR        RTx           LL_EXTI_EnableRisingTrig_0_31
-  * @param  ExtiLine This parameter can be a combination of the following values:
-  *         @arg @ref LL_EXTI_LINE_0
-  *         @arg @ref LL_EXTI_LINE_1
-  *         @arg @ref LL_EXTI_LINE_2
-  *         @arg @ref LL_EXTI_LINE_3
-  *         @arg @ref LL_EXTI_LINE_4
-  *         @arg @ref LL_EXTI_LINE_5
-  *         @arg @ref LL_EXTI_LINE_6
-  *         @arg @ref LL_EXTI_LINE_7
-  *         @arg @ref LL_EXTI_LINE_8
-  *         @arg @ref LL_EXTI_LINE_9
-  *         @arg @ref LL_EXTI_LINE_10
-  *         @arg @ref LL_EXTI_LINE_11
-  *         @arg @ref LL_EXTI_LINE_12
-  *         @arg @ref LL_EXTI_LINE_13
-  *         @arg @ref LL_EXTI_LINE_14
-  *         @arg @ref LL_EXTI_LINE_15
-  *         @arg @ref LL_EXTI_LINE_16
-  *         @arg @ref LL_EXTI_LINE_18
-  *         @arg @ref LL_EXTI_LINE_19
-  *         @arg @ref LL_EXTI_LINE_20
-  *         @arg @ref LL_EXTI_LINE_21
-  *         @arg @ref LL_EXTI_LINE_22
-  *         @arg @ref LL_EXTI_LINE_29
-  *         @arg @ref LL_EXTI_LINE_30
-  *         @arg @ref LL_EXTI_LINE_31
-  * @note   Please check each device line mapping for EXTI Line availability
-  * @retval None
-  */
-__STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
-{
-  SET_BIT(EXTI->RTSR, ExtiLine);
-
-}
-
-
-/**
-  * @brief  Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
-  * @note The configurable wakeup lines are edge-triggered. No glitch must be
-  *       generated on these lines. If a rising edge on a configurable interrupt
-  *       line occurs during a write operation in the EXTI_RTSR register, the
-  *       pending bit is not set.
-  *       Rising and falling edge triggers can be set for
-  *       the same interrupt line. In this case, both generate a trigger
-  *       condition.
-  * @rmtoll RTSR        RTx           LL_EXTI_DisableRisingTrig_0_31
-  * @param  ExtiLine This parameter can be a combination of the following values:
-  *         @arg @ref LL_EXTI_LINE_0
-  *         @arg @ref LL_EXTI_LINE_1
-  *         @arg @ref LL_EXTI_LINE_2
-  *         @arg @ref LL_EXTI_LINE_3
-  *         @arg @ref LL_EXTI_LINE_4
-  *         @arg @ref LL_EXTI_LINE_5
-  *         @arg @ref LL_EXTI_LINE_6
-  *         @arg @ref LL_EXTI_LINE_7
-  *         @arg @ref LL_EXTI_LINE_8
-  *         @arg @ref LL_EXTI_LINE_9
-  *         @arg @ref LL_EXTI_LINE_10
-  *         @arg @ref LL_EXTI_LINE_11
-  *         @arg @ref LL_EXTI_LINE_12
-  *         @arg @ref LL_EXTI_LINE_13
-  *         @arg @ref LL_EXTI_LINE_14
-  *         @arg @ref LL_EXTI_LINE_15
-  *         @arg @ref LL_EXTI_LINE_16
-  *         @arg @ref LL_EXTI_LINE_18
-  *         @arg @ref LL_EXTI_LINE_19
-  *         @arg @ref LL_EXTI_LINE_20
-  *         @arg @ref LL_EXTI_LINE_21
-  *         @arg @ref LL_EXTI_LINE_22
-  *         @arg @ref LL_EXTI_LINE_29
-  *         @arg @ref LL_EXTI_LINE_30
-  *         @arg @ref LL_EXTI_LINE_31
-  * @note   Please check each device line mapping for EXTI Line availability
-  * @retval None
-  */
-__STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
-{
-  CLEAR_BIT(EXTI->RTSR, ExtiLine);
-
-}
-
-
-/**
-  * @brief  Check if rising edge trigger is enabled for Lines in range 0 to 31
-  * @rmtoll RTSR        RTx           LL_EXTI_IsEnabledRisingTrig_0_31
-  * @param  ExtiLine This parameter can be a combination of the following values:
-  *         @arg @ref LL_EXTI_LINE_0
-  *         @arg @ref LL_EXTI_LINE_1
-  *         @arg @ref LL_EXTI_LINE_2
-  *         @arg @ref LL_EXTI_LINE_3
-  *         @arg @ref LL_EXTI_LINE_4
-  *         @arg @ref LL_EXTI_LINE_5
-  *         @arg @ref LL_EXTI_LINE_6
-  *         @arg @ref LL_EXTI_LINE_7
-  *         @arg @ref LL_EXTI_LINE_8
-  *         @arg @ref LL_EXTI_LINE_9
-  *         @arg @ref LL_EXTI_LINE_10
-  *         @arg @ref LL_EXTI_LINE_11
-  *         @arg @ref LL_EXTI_LINE_12
-  *         @arg @ref LL_EXTI_LINE_13
-  *         @arg @ref LL_EXTI_LINE_14
-  *         @arg @ref LL_EXTI_LINE_15
-  *         @arg @ref LL_EXTI_LINE_16
-  *         @arg @ref LL_EXTI_LINE_18
-  *         @arg @ref LL_EXTI_LINE_19
-  *         @arg @ref LL_EXTI_LINE_20
-  *         @arg @ref LL_EXTI_LINE_21
-  *         @arg @ref LL_EXTI_LINE_22
-  *         @arg @ref LL_EXTI_LINE_29
-  *         @arg @ref LL_EXTI_LINE_30
-  *         @arg @ref LL_EXTI_LINE_31
-  * @note   Please check each device line mapping for EXTI Line availability
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
-{
-  return (READ_BIT(EXTI->RTSR, ExtiLine) == (ExtiLine));
-}
-
-
-/**
-  * @}
-  */
-
-/** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
-  * @{
-  */
-
-/**
-  * @brief  Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
-  * @note The configurable wakeup lines are edge-triggered. No glitch must be
-  *       generated on these lines. If a falling edge on a configurable interrupt
-  *       line occurs during a write operation in the EXTI_FTSR register, the
-  *       pending bit is not set.
-  *       Rising and falling edge triggers can be set for
-  *       the same interrupt line. In this case, both generate a trigger
-  *       condition.
-  * @rmtoll FTSR        FTx           LL_EXTI_EnableFallingTrig_0_31
-  * @param  ExtiLine This parameter can be a combination of the following values:
-  *         @arg @ref LL_EXTI_LINE_0
-  *         @arg @ref LL_EXTI_LINE_1
-  *         @arg @ref LL_EXTI_LINE_2
-  *         @arg @ref LL_EXTI_LINE_3
-  *         @arg @ref LL_EXTI_LINE_4
-  *         @arg @ref LL_EXTI_LINE_5
-  *         @arg @ref LL_EXTI_LINE_6
-  *         @arg @ref LL_EXTI_LINE_7
-  *         @arg @ref LL_EXTI_LINE_8
-  *         @arg @ref LL_EXTI_LINE_9
-  *         @arg @ref LL_EXTI_LINE_10
-  *         @arg @ref LL_EXTI_LINE_11
-  *         @arg @ref LL_EXTI_LINE_12
-  *         @arg @ref LL_EXTI_LINE_13
-  *         @arg @ref LL_EXTI_LINE_14
-  *         @arg @ref LL_EXTI_LINE_15
-  *         @arg @ref LL_EXTI_LINE_16
-  *         @arg @ref LL_EXTI_LINE_18
-  *         @arg @ref LL_EXTI_LINE_19
-  *         @arg @ref LL_EXTI_LINE_20
-  *         @arg @ref LL_EXTI_LINE_21
-  *         @arg @ref LL_EXTI_LINE_22
-  *         @arg @ref LL_EXTI_LINE_29
-  *         @arg @ref LL_EXTI_LINE_30
-  *         @arg @ref LL_EXTI_LINE_31
-  * @note   Please check each device line mapping for EXTI Line availability
-  * @retval None
-  */
-__STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
-{
-  SET_BIT(EXTI->FTSR, ExtiLine);
-}
-
-
-/**
-  * @brief  Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
-  * @note The configurable wakeup lines are edge-triggered. No glitch must be
-  *       generated on these lines. If a Falling edge on a configurable interrupt
-  *       line occurs during a write operation in the EXTI_FTSR register, the
-  *       pending bit is not set.
-  *       Rising and falling edge triggers can be set for the same interrupt line.
-  *       In this case, both generate a trigger condition.
-  * @rmtoll FTSR        FTx           LL_EXTI_DisableFallingTrig_0_31
-  * @param  ExtiLine This parameter can be a combination of the following values:
-  *         @arg @ref LL_EXTI_LINE_0
-  *         @arg @ref LL_EXTI_LINE_1
-  *         @arg @ref LL_EXTI_LINE_2
-  *         @arg @ref LL_EXTI_LINE_3
-  *         @arg @ref LL_EXTI_LINE_4
-  *         @arg @ref LL_EXTI_LINE_5
-  *         @arg @ref LL_EXTI_LINE_6
-  *         @arg @ref LL_EXTI_LINE_7
-  *         @arg @ref LL_EXTI_LINE_8
-  *         @arg @ref LL_EXTI_LINE_9
-  *         @arg @ref LL_EXTI_LINE_10
-  *         @arg @ref LL_EXTI_LINE_11
-  *         @arg @ref LL_EXTI_LINE_12
-  *         @arg @ref LL_EXTI_LINE_13
-  *         @arg @ref LL_EXTI_LINE_14
-  *         @arg @ref LL_EXTI_LINE_15
-  *         @arg @ref LL_EXTI_LINE_16
-  *         @arg @ref LL_EXTI_LINE_18
-  *         @arg @ref LL_EXTI_LINE_19
-  *         @arg @ref LL_EXTI_LINE_20
-  *         @arg @ref LL_EXTI_LINE_21
-  *         @arg @ref LL_EXTI_LINE_22
-  *         @arg @ref LL_EXTI_LINE_29
-  *         @arg @ref LL_EXTI_LINE_30
-  *         @arg @ref LL_EXTI_LINE_31
-  * @note   Please check each device line mapping for EXTI Line availability
-  * @retval None
-  */
-__STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
-{
-  CLEAR_BIT(EXTI->FTSR, ExtiLine);
-}
-
-
-/**
-  * @brief  Check if falling edge trigger is enabled for Lines in range 0 to 31
-  * @rmtoll FTSR        FTx           LL_EXTI_IsEnabledFallingTrig_0_31
-  * @param  ExtiLine This parameter can be a combination of the following values:
-  *         @arg @ref LL_EXTI_LINE_0
-  *         @arg @ref LL_EXTI_LINE_1
-  *         @arg @ref LL_EXTI_LINE_2
-  *         @arg @ref LL_EXTI_LINE_3
-  *         @arg @ref LL_EXTI_LINE_4
-  *         @arg @ref LL_EXTI_LINE_5
-  *         @arg @ref LL_EXTI_LINE_6
-  *         @arg @ref LL_EXTI_LINE_7
-  *         @arg @ref LL_EXTI_LINE_8
-  *         @arg @ref LL_EXTI_LINE_9
-  *         @arg @ref LL_EXTI_LINE_10
-  *         @arg @ref LL_EXTI_LINE_11
-  *         @arg @ref LL_EXTI_LINE_12
-  *         @arg @ref LL_EXTI_LINE_13
-  *         @arg @ref LL_EXTI_LINE_14
-  *         @arg @ref LL_EXTI_LINE_15
-  *         @arg @ref LL_EXTI_LINE_16
-  *         @arg @ref LL_EXTI_LINE_18
-  *         @arg @ref LL_EXTI_LINE_19
-  *         @arg @ref LL_EXTI_LINE_20
-  *         @arg @ref LL_EXTI_LINE_21
-  *         @arg @ref LL_EXTI_LINE_22
-  *         @arg @ref LL_EXTI_LINE_29
-  *         @arg @ref LL_EXTI_LINE_30
-  *         @arg @ref LL_EXTI_LINE_31
-  * @note   Please check each device line mapping for EXTI Line availability
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
-{
-  return (READ_BIT(EXTI->FTSR, ExtiLine) == (ExtiLine));
-}
-
-
-/**
-  * @}
-  */
-
-/** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
-  * @{
-  */
-
-/**
-  * @brief  Generate a software Interrupt Event for Lines in range 0 to 31
-  * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
-  *       this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
-  *       resulting in an interrupt request generation.
-  *       This bit is cleared by clearing the corresponding bit in the EXTI_PR
-  *       register (by writing a 1 into the bit)
-  * @rmtoll SWIER       SWIx          LL_EXTI_GenerateSWI_0_31
-  * @param  ExtiLine This parameter can be a combination of the following values:
-  *         @arg @ref LL_EXTI_LINE_0
-  *         @arg @ref LL_EXTI_LINE_1
-  *         @arg @ref LL_EXTI_LINE_2
-  *         @arg @ref LL_EXTI_LINE_3
-  *         @arg @ref LL_EXTI_LINE_4
-  *         @arg @ref LL_EXTI_LINE_5
-  *         @arg @ref LL_EXTI_LINE_6
-  *         @arg @ref LL_EXTI_LINE_7
-  *         @arg @ref LL_EXTI_LINE_8
-  *         @arg @ref LL_EXTI_LINE_9
-  *         @arg @ref LL_EXTI_LINE_10
-  *         @arg @ref LL_EXTI_LINE_11
-  *         @arg @ref LL_EXTI_LINE_12
-  *         @arg @ref LL_EXTI_LINE_13
-  *         @arg @ref LL_EXTI_LINE_14
-  *         @arg @ref LL_EXTI_LINE_15
-  *         @arg @ref LL_EXTI_LINE_16
-  *         @arg @ref LL_EXTI_LINE_18
-  *         @arg @ref LL_EXTI_LINE_19
-  *         @arg @ref LL_EXTI_LINE_20
-  *         @arg @ref LL_EXTI_LINE_21
-  *         @arg @ref LL_EXTI_LINE_22
-  *         @arg @ref LL_EXTI_LINE_29
-  *         @arg @ref LL_EXTI_LINE_30
-  *         @arg @ref LL_EXTI_LINE_31
-  * @note   Please check each device line mapping for EXTI Line availability
-  * @retval None
-  */
-__STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
-{
-  SET_BIT(EXTI->SWIER, ExtiLine);
-}
-
-
-/**
-  * @}
-  */
-
-/** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
-  * @{
-  */
-
-/**
-  * @brief  Check if the ExtLine Flag is set or not for Lines in range 0 to 31
-  * @note This bit is set when the selected edge event arrives on the interrupt
-  *       line. This bit is cleared by writing a 1 to the bit.
-  * @rmtoll PR          PIFx           LL_EXTI_IsActiveFlag_0_31
-  * @param  ExtiLine This parameter can be a combination of the following values:
-  *         @arg @ref LL_EXTI_LINE_0
-  *         @arg @ref LL_EXTI_LINE_1
-  *         @arg @ref LL_EXTI_LINE_2
-  *         @arg @ref LL_EXTI_LINE_3
-  *         @arg @ref LL_EXTI_LINE_4
-  *         @arg @ref LL_EXTI_LINE_5
-  *         @arg @ref LL_EXTI_LINE_6
-  *         @arg @ref LL_EXTI_LINE_7
-  *         @arg @ref LL_EXTI_LINE_8
-  *         @arg @ref LL_EXTI_LINE_9
-  *         @arg @ref LL_EXTI_LINE_10
-  *         @arg @ref LL_EXTI_LINE_11
-  *         @arg @ref LL_EXTI_LINE_12
-  *         @arg @ref LL_EXTI_LINE_13
-  *         @arg @ref LL_EXTI_LINE_14
-  *         @arg @ref LL_EXTI_LINE_15
-  *         @arg @ref LL_EXTI_LINE_16
-  *         @arg @ref LL_EXTI_LINE_18
-  *         @arg @ref LL_EXTI_LINE_19
-  *         @arg @ref LL_EXTI_LINE_20
-  *         @arg @ref LL_EXTI_LINE_21
-  *         @arg @ref LL_EXTI_LINE_22
-  *         @arg @ref LL_EXTI_LINE_29
-  *         @arg @ref LL_EXTI_LINE_30
-  *         @arg @ref LL_EXTI_LINE_31
-  * @note   Please check each device line mapping for EXTI Line availability
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
-{
-  return (READ_BIT(EXTI->PR, ExtiLine) == (ExtiLine));
-}
-
-
-/**
-  * @brief  Read ExtLine Combination Flag for Lines in range 0 to 31
-  * @note This bit is set when the selected edge event arrives on the interrupt
-  *       line. This bit is cleared by writing a 1 to the bit.
-  * @rmtoll PR          PIFx           LL_EXTI_ReadFlag_0_31
-  * @param  ExtiLine This parameter can be a combination of the following values:
-  *         @arg @ref LL_EXTI_LINE_0
-  *         @arg @ref LL_EXTI_LINE_1
-  *         @arg @ref LL_EXTI_LINE_2
-  *         @arg @ref LL_EXTI_LINE_3
-  *         @arg @ref LL_EXTI_LINE_4
-  *         @arg @ref LL_EXTI_LINE_5
-  *         @arg @ref LL_EXTI_LINE_6
-  *         @arg @ref LL_EXTI_LINE_7
-  *         @arg @ref LL_EXTI_LINE_8
-  *         @arg @ref LL_EXTI_LINE_9
-  *         @arg @ref LL_EXTI_LINE_10
-  *         @arg @ref LL_EXTI_LINE_11
-  *         @arg @ref LL_EXTI_LINE_12
-  *         @arg @ref LL_EXTI_LINE_13
-  *         @arg @ref LL_EXTI_LINE_14
-  *         @arg @ref LL_EXTI_LINE_15
-  *         @arg @ref LL_EXTI_LINE_16
-  *         @arg @ref LL_EXTI_LINE_18
-  *         @arg @ref LL_EXTI_LINE_19
-  *         @arg @ref LL_EXTI_LINE_20
-  *         @arg @ref LL_EXTI_LINE_21
-  *         @arg @ref LL_EXTI_LINE_22
-  *         @arg @ref LL_EXTI_LINE_29
-  *         @arg @ref LL_EXTI_LINE_30
-  *         @arg @ref LL_EXTI_LINE_31
-  * @note   Please check each device line mapping for EXTI Line availability
-  * @retval @note This bit is set when the selected edge event arrives on the interrupt
-  */
-__STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
-{
-  return (uint32_t)(READ_BIT(EXTI->PR, ExtiLine));
-}
-
-
-/**
-  * @brief  Clear ExtLine Flags  for Lines in range 0 to 31
-  * @note This bit is set when the selected edge event arrives on the interrupt
-  *       line. This bit is cleared by writing a 1 to the bit.
-  * @rmtoll PR          PIFx           LL_EXTI_ClearFlag_0_31
-  * @param  ExtiLine This parameter can be a combination of the following values:
-  *         @arg @ref LL_EXTI_LINE_0
-  *         @arg @ref LL_EXTI_LINE_1
-  *         @arg @ref LL_EXTI_LINE_2
-  *         @arg @ref LL_EXTI_LINE_3
-  *         @arg @ref LL_EXTI_LINE_4
-  *         @arg @ref LL_EXTI_LINE_5
-  *         @arg @ref LL_EXTI_LINE_6
-  *         @arg @ref LL_EXTI_LINE_7
-  *         @arg @ref LL_EXTI_LINE_8
-  *         @arg @ref LL_EXTI_LINE_9
-  *         @arg @ref LL_EXTI_LINE_10
-  *         @arg @ref LL_EXTI_LINE_11
-  *         @arg @ref LL_EXTI_LINE_12
-  *         @arg @ref LL_EXTI_LINE_13
-  *         @arg @ref LL_EXTI_LINE_14
-  *         @arg @ref LL_EXTI_LINE_15
-  *         @arg @ref LL_EXTI_LINE_16
-  *         @arg @ref LL_EXTI_LINE_18
-  *         @arg @ref LL_EXTI_LINE_19
-  *         @arg @ref LL_EXTI_LINE_20
-  *         @arg @ref LL_EXTI_LINE_21
-  *         @arg @ref LL_EXTI_LINE_22
-  *         @arg @ref LL_EXTI_LINE_29
-  *         @arg @ref LL_EXTI_LINE_30
-  *         @arg @ref LL_EXTI_LINE_31
-  * @note   Please check each device line mapping for EXTI Line availability
-  * @retval None
-  */
-__STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
-{
-  WRITE_REG(EXTI->PR, ExtiLine);
-}
-
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
-  * @{
-  */
-
-uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
-uint32_t LL_EXTI_DeInit(void);
-void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
-
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* EXTI */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_EXTI_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h
deleted file mode 100755
index dca7307b..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h
+++ /dev/null
@@ -1,959 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_gpio.h
-  * @author  MCD Application Team
-  * @brief   Header file of GPIO LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_GPIO_H
-#define __STM32L0xx_LL_GPIO_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOH)
-
-/** @defgroup GPIO_LL GPIO
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup GPIO_LL_Private_Macros GPIO Private Macros
-  * @{
-  */
-
-/**
-  * @}
-  */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup GPIO_LL_ES_INIT GPIO Exported Init structures
-  * @{
-  */
-
-/**
-  * @brief LL GPIO Init Structure definition
-  */
-typedef struct
-{
-  uint32_t Pin;          /*!< Specifies the GPIO pins to be configured.
-                              This parameter can be any value of @ref GPIO_LL_EC_PIN */
-
-  uint32_t Mode;         /*!< Specifies the operating mode for the selected pins.
-                              This parameter can be a value of @ref GPIO_LL_EC_MODE.
-
-                              GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinMode().*/
-
-  uint32_t Speed;        /*!< Specifies the speed for the selected pins.
-                              This parameter can be a value of @ref GPIO_LL_EC_SPEED.
-
-                              GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinSpeed().*/
-
-  uint32_t OutputType;   /*!< Specifies the operating output type for the selected pins.
-                              This parameter can be a value of @ref GPIO_LL_EC_OUTPUT.
-
-                              GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinOutputType().*/
-
-  uint32_t Pull;         /*!< Specifies the operating Pull-up/Pull down for the selected pins.
-                              This parameter can be a value of @ref GPIO_LL_EC_PULL.
-
-                              GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinPull().*/
-
-  uint32_t Alternate;    /*!< Specifies the Peripheral to be connected to the selected pins.
-                              This parameter can be a value of @ref GPIO_LL_EC_AF.
-
-                              GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetAFPin_0_7() and LL_GPIO_SetAFPin_8_15().*/
-} LL_GPIO_InitTypeDef;
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup GPIO_LL_Exported_Constants GPIO Exported Constants
-  * @{
-  */
-
-/** @defgroup GPIO_LL_EC_PIN PIN
-  * @{
-  */
-#define LL_GPIO_PIN_0                      GPIO_BSRR_BS_0 /*!< Select pin 0 */
-#define LL_GPIO_PIN_1                      GPIO_BSRR_BS_1 /*!< Select pin 1 */
-#define LL_GPIO_PIN_2                      GPIO_BSRR_BS_2 /*!< Select pin 2 */
-#define LL_GPIO_PIN_3                      GPIO_BSRR_BS_3 /*!< Select pin 3 */
-#define LL_GPIO_PIN_4                      GPIO_BSRR_BS_4 /*!< Select pin 4 */
-#define LL_GPIO_PIN_5                      GPIO_BSRR_BS_5 /*!< Select pin 5 */
-#define LL_GPIO_PIN_6                      GPIO_BSRR_BS_6 /*!< Select pin 6 */
-#define LL_GPIO_PIN_7                      GPIO_BSRR_BS_7 /*!< Select pin 7 */
-#define LL_GPIO_PIN_8                      GPIO_BSRR_BS_8 /*!< Select pin 8 */
-#define LL_GPIO_PIN_9                      GPIO_BSRR_BS_9 /*!< Select pin 9 */
-#define LL_GPIO_PIN_10                     GPIO_BSRR_BS_10 /*!< Select pin 10 */
-#define LL_GPIO_PIN_11                     GPIO_BSRR_BS_11 /*!< Select pin 11 */
-#define LL_GPIO_PIN_12                     GPIO_BSRR_BS_12 /*!< Select pin 12 */
-#define LL_GPIO_PIN_13                     GPIO_BSRR_BS_13 /*!< Select pin 13 */
-#define LL_GPIO_PIN_14                     GPIO_BSRR_BS_14 /*!< Select pin 14 */
-#define LL_GPIO_PIN_15                     GPIO_BSRR_BS_15 /*!< Select pin 15 */
-#define LL_GPIO_PIN_ALL                    (GPIO_BSRR_BS_0 | GPIO_BSRR_BS_1  | GPIO_BSRR_BS_2  | \
-                                           GPIO_BSRR_BS_3  | GPIO_BSRR_BS_4  | GPIO_BSRR_BS_5  | \
-                                           GPIO_BSRR_BS_6  | GPIO_BSRR_BS_7  | GPIO_BSRR_BS_8  | \
-                                           GPIO_BSRR_BS_9  | GPIO_BSRR_BS_10 | GPIO_BSRR_BS_11 | \
-                                           GPIO_BSRR_BS_12 | GPIO_BSRR_BS_13 | GPIO_BSRR_BS_14 | \
-                                           GPIO_BSRR_BS_15) /*!< Select all pins */
-/**
-  * @}
-  */
-
-/** @defgroup GPIO_LL_EC_MODE Mode
-  * @{
-  */
-#define LL_GPIO_MODE_INPUT                 ((uint32_t)0x00000000U) /*!< Select input mode */
-#define LL_GPIO_MODE_OUTPUT                GPIO_MODER_MODE0_0  /*!< Select output mode */
-#define LL_GPIO_MODE_ALTERNATE             GPIO_MODER_MODE0_1  /*!< Select alternate function mode */
-#define LL_GPIO_MODE_ANALOG                GPIO_MODER_MODE0    /*!< Select analog mode */
-/**
-  * @}
-  */
-
-/** @defgroup GPIO_LL_EC_OUTPUT Output Type
-  * @{
-  */
-#define LL_GPIO_OUTPUT_PUSHPULL            ((uint32_t)0x00000000U) /*!< Select push-pull as output type */
-#define LL_GPIO_OUTPUT_OPENDRAIN           GPIO_OTYPER_OT_0 /*!< Select open-drain as output type */
-/**
-  * @}
-  */
-
-/** @defgroup GPIO_LL_EC_SPEED Output Speed
-  * @{
-  */
-#define LL_GPIO_SPEED_FREQ_LOW             ((uint32_t)0x00000000U) /*!< Select I/O low output speed    */
-#define LL_GPIO_SPEED_FREQ_MEDIUM          GPIO_OSPEEDER_OSPEED0_0 /*!< Select I/O medium output speed */
-#define LL_GPIO_SPEED_FREQ_HIGH            GPIO_OSPEEDER_OSPEED0_1 /*!< Select I/O fast output speed   */
-#define LL_GPIO_SPEED_FREQ_VERY_HIGH       GPIO_OSPEEDER_OSPEED0   /*!< Select I/O high output speed   */
-/**
-  * @}
-  */
-#define LL_GPIO_SPEED_LOW                  LL_GPIO_SPEED_FREQ_LOW
-#define LL_GPIO_SPEED_MEDIUM               LL_GPIO_SPEED_FREQ_MEDIUM
-#define LL_GPIO_SPEED_FAST                 LL_GPIO_SPEED_FREQ_HIGH
-#define LL_GPIO_SPEED_HIGH                 LL_GPIO_SPEED_FREQ_VERY_HIGH
-
-/** @defgroup GPIO_LL_EC_PULL Pull Up Pull Down
-  * @{
-  */
-#define LL_GPIO_PULL_NO                    ((uint32_t)0x00000000U) /*!< Select I/O no pull */
-#define LL_GPIO_PULL_UP                    GPIO_PUPDR_PUPD0_0 /*!< Select I/O pull up */
-#define LL_GPIO_PULL_DOWN                  GPIO_PUPDR_PUPD0_1 /*!< Select I/O pull down */
-/**
-  * @}
-  */
-
-/** @defgroup GPIO_LL_EC_AF Alternate Function
-  * @{
-  */
-#define LL_GPIO_AF_0                       ((uint32_t)0x0000000U) /*!< Select alternate function 0 */
-#define LL_GPIO_AF_1                       ((uint32_t)0x0000001U) /*!< Select alternate function 1 */
-#define LL_GPIO_AF_2                       ((uint32_t)0x0000002U) /*!< Select alternate function 2 */
-#define LL_GPIO_AF_3                       ((uint32_t)0x0000003U) /*!< Select alternate function 3 */
-#define LL_GPIO_AF_4                       ((uint32_t)0x0000004U) /*!< Select alternate function 4 */
-#define LL_GPIO_AF_5                       ((uint32_t)0x0000005U) /*!< Select alternate function 5 */
-#define LL_GPIO_AF_6                       ((uint32_t)0x0000006U) /*!< Select alternate function 6 */
-#define LL_GPIO_AF_7                       ((uint32_t)0x0000007U) /*!< Select alternate function 7 */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup GPIO_LL_Exported_Macros GPIO Exported Macros
-  * @{
-  */
-
-/** @defgroup GPIO_LL_EM_WRITE_READ Common Write and read registers Macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in GPIO register
-  * @param  __INSTANCE__ GPIO Instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_GPIO_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in GPIO register
-  * @param  __INSTANCE__ GPIO Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup GPIO_LL_Exported_Functions GPIO Exported Functions
-  * @{
-  */
-
-/** @defgroup GPIO_LL_EF_Port_Configuration Port Configuration
-  * @{
-  */
-
-/**
-  * @brief  Configure gpio mode for a dedicated pin on dedicated port.
-  * @note   I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
-  * @note   Warning: only one pin can be passed as parameter.
-  * @rmtoll MODER        MODEy         LL_GPIO_SetPinMode
-  * @param  GPIOx GPIO Port
-  * @param  Pin This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  * @param  Mode This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_MODE_INPUT
-  *         @arg @ref LL_GPIO_MODE_OUTPUT
-  *         @arg @ref LL_GPIO_MODE_ALTERNATE
-  *         @arg @ref LL_GPIO_MODE_ANALOG
-  * @retval None
-  */
-__STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
-{
-  MODIFY_REG(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODE0), ((Pin * Pin) * Mode));
-}
-
-/**
-  * @brief  Return gpio mode for a dedicated pin on dedicated port.
-  * @note   I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
-  * @note   Warning: only one pin can be passed as parameter.
-  * @rmtoll MODER        MODEy         LL_GPIO_GetPinMode
-  * @param  GPIOx GPIO Port
-  * @param  Pin This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_GPIO_MODE_INPUT
-  *         @arg @ref LL_GPIO_MODE_OUTPUT
-  *         @arg @ref LL_GPIO_MODE_ALTERNATE
-  *         @arg @ref LL_GPIO_MODE_ANALOG
-  */
-__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
-{
-  return (uint32_t)(READ_BIT(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODE0)) / (Pin * Pin));
-}
-
-/**
-  * @brief  Configure gpio output type for several pins on dedicated port.
-  * @note   Output type as to be set when gpio pin is in output or
-  *         alternate modes. Possible type are Push-pull or Open-drain.
-  * @rmtoll OTYPER       OTy           LL_GPIO_SetPinOutputType
-  * @param  GPIOx GPIO Port
-  * @param  PinMask This parameter can be a combination of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  *         @arg @ref LL_GPIO_PIN_ALL
-  * @param  OutputType This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_OUTPUT_PUSHPULL
-  *         @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
-  * @retval None
-  */
-__STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
-{
-  MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
-}
-
-/**
-  * @brief  Return gpio output type for several pins on dedicated port.
-  * @note   Output type as to be set when gpio pin is in output or
-  *         alternate modes. Possible type are Push-pull or Open-drain.
-  * @note   Warning: only one pin can be passed as parameter.
-  * @rmtoll OTYPER       OTy           LL_GPIO_GetPinOutputType
-  * @param  GPIOx GPIO Port
-  * @param  Pin This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  *         @arg @ref LL_GPIO_PIN_ALL
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_GPIO_OUTPUT_PUSHPULL
-  *         @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
-  */
-__STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin)
-{
-  return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) / Pin);
-}
-
-/**
-  * @brief  Configure gpio speed for a dedicated pin on dedicated port.
-  * @note   I/O speed can be Low, Medium, Fast or High speed.
-  * @note   Warning: only one pin can be passed as parameter.
-  * @note   Refer to datasheet for frequency specifications and the power
-  *         supply and load conditions for each speed.
-  * @rmtoll OSPEEDR      OSPEEDy       LL_GPIO_SetPinSpeed
-  * @param  GPIOx GPIO Port
-  * @param  Pin This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  * @param  Speed This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_SPEED_FREQ_LOW
-  *         @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
-  *         @arg @ref LL_GPIO_SPEED_FREQ_HIGH
-  *         @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH
-  * @retval None
-  */
-__STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t  Speed)
-{
-  MODIFY_REG(GPIOx->OSPEEDR, ((Pin * Pin) * GPIO_OSPEEDER_OSPEED0), ((Pin * Pin) * Speed));
-}
-
-/**
-  * @brief  Return gpio speed for a dedicated pin on dedicated port.
-  * @note   I/O speed can be Low, Medium, Fast or High speed.
-  * @note   Warning: only one pin can be passed as parameter.
-  * @note   Refer to datasheet for frequency specifications and the power
-  *         supply and load conditions for each speed.
-  * @rmtoll OSPEEDR      OSPEEDy       LL_GPIO_GetPinSpeed
-  * @param  GPIOx GPIO Port
-  * @param  Pin This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_GPIO_SPEED_FREQ_LOW
-  *         @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
-  *         @arg @ref LL_GPIO_SPEED_FREQ_HIGH
-  *         @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH
-  */
-__STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin)
-{
-  return (uint32_t)(READ_BIT(GPIOx->OSPEEDR, ((Pin * Pin) * GPIO_OSPEEDER_OSPEED0)) / (Pin * Pin));
-}
-
-/**
-  * @brief  Configure gpio pull-up or pull-down for a dedicated pin on a dedicated port.
-  * @note   Warning: only one pin can be passed as parameter.
-  * @rmtoll PUPDR        PUPDy         LL_GPIO_SetPinPull
-  * @param  GPIOx GPIO Port
-  * @param  Pin This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  * @param  Pull This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_PULL_NO
-  *         @arg @ref LL_GPIO_PULL_UP
-  *         @arg @ref LL_GPIO_PULL_DOWN
-  * @retval None
-  */
-__STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
-{
-  MODIFY_REG(GPIOx->PUPDR, ((Pin * Pin) * GPIO_PUPDR_PUPD0), ((Pin * Pin) * Pull));
-}
-
-/**
-  * @brief  Return gpio pull-up or pull-down for a dedicated pin on a dedicated port
-  * @note   Warning: only one pin can be passed as parameter.
-  * @rmtoll PUPDR        PUPDy         LL_GPIO_GetPinPull
-  * @param  GPIOx GPIO Port
-  * @param  Pin This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_GPIO_PULL_NO
-  *         @arg @ref LL_GPIO_PULL_UP
-  *         @arg @ref LL_GPIO_PULL_DOWN
-  */
-__STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin)
-{
-  return (uint32_t)(READ_BIT(GPIOx->PUPDR, ((Pin * Pin) * GPIO_PUPDR_PUPD0)) / (Pin * Pin));
-}
-
-/**
-  * @brief  Configure gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
-  * @note   Possible values are from AF0 to AF7 depending on target.
-  * @note   Warning: only one pin can be passed as parameter.
-  * @rmtoll AFRL         AFSELy        LL_GPIO_SetAFPin_0_7
-  * @param  GPIOx GPIO Port
-  * @param  Pin This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  * @param  Alternate This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_AF_0
-  *         @arg @ref LL_GPIO_AF_1
-  *         @arg @ref LL_GPIO_AF_2
-  *         @arg @ref LL_GPIO_AF_3
-  *         @arg @ref LL_GPIO_AF_4
-  *         @arg @ref LL_GPIO_AF_5
-  *         @arg @ref LL_GPIO_AF_6
-  *         @arg @ref LL_GPIO_AF_7
-  * @retval None
-  */
-__STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
-{
-  MODIFY_REG(GPIOx->AFR[0], ((((Pin * Pin) * Pin) * Pin) * GPIO_AFRL_AFRL0),
-             ((((Pin * Pin) * Pin) * Pin) * Alternate));
-}
-
-/**
-  * @brief  Return gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
-  * @rmtoll AFRL         AFSELy        LL_GPIO_GetAFPin_0_7
-  * @param  GPIOx GPIO Port
-  * @param  Pin This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_GPIO_AF_0
-  *         @arg @ref LL_GPIO_AF_1
-  *         @arg @ref LL_GPIO_AF_2
-  *         @arg @ref LL_GPIO_AF_3
-  *         @arg @ref LL_GPIO_AF_4
-  *         @arg @ref LL_GPIO_AF_5
-  *         @arg @ref LL_GPIO_AF_6
-  *         @arg @ref LL_GPIO_AF_7
-  */
-__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin)
-{
-  return (uint32_t)(READ_BIT(GPIOx->AFR[0],
-                             ((((Pin * Pin) * Pin) * Pin) * GPIO_AFRL_AFRL0)) / (((Pin * Pin) * Pin) * Pin));
-}
-
-/**
-  * @brief  Configure gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
-  * @note   Possible values are from AF0 to AF7 depending on target.
-  * @note   Warning: only one pin can be passed as parameter.
-  * @rmtoll AFRH         AFSELy        LL_GPIO_SetAFPin_8_15
-  * @param  GPIOx GPIO Port
-  * @param  Pin This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  * @param  Alternate This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_AF_0
-  *         @arg @ref LL_GPIO_AF_1
-  *         @arg @ref LL_GPIO_AF_2
-  *         @arg @ref LL_GPIO_AF_3
-  *         @arg @ref LL_GPIO_AF_4
-  *         @arg @ref LL_GPIO_AF_5
-  *         @arg @ref LL_GPIO_AF_6
-  *         @arg @ref LL_GPIO_AF_7
-  * @retval None
-  */
-__STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
-{
-  MODIFY_REG(GPIOx->AFR[1], (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * GPIO_AFRH_AFRH0),
-             (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * Alternate));
-}
-
-/**
-  * @brief  Return gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
-  * @note   Possible values are from AF0 to AF7 depending on target.
-  * @rmtoll AFRH         AFSELy        LL_GPIO_GetAFPin_8_15
-  * @param  GPIOx GPIO Port
-  * @param  Pin This parameter can be one of the following values:
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_GPIO_AF_0
-  *         @arg @ref LL_GPIO_AF_1
-  *         @arg @ref LL_GPIO_AF_2
-  *         @arg @ref LL_GPIO_AF_3
-  *         @arg @ref LL_GPIO_AF_4
-  *         @arg @ref LL_GPIO_AF_5
-  *         @arg @ref LL_GPIO_AF_6
-  *         @arg @ref LL_GPIO_AF_7
-  */
-__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin)
-{
-  return (uint32_t)(READ_BIT(GPIOx->AFR[1],
-                             (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * GPIO_AFRH_AFRH0)) / ((((Pin >> 8U) *
-                                 (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)));
-}
-
-
-/**
-  * @brief  Lock configuration of several pins for a dedicated port.
-  * @note   When the lock sequence has been applied on a port bit, the
-  *         value of this port bit can no longer be modified until the
-  *         next reset.
-  * @note   Each lock bit freezes a specific configuration register
-  *         (control and alternate function registers).
-  * @rmtoll LCKR         LCKK          LL_GPIO_LockPin
-  * @param  GPIOx GPIO Port
-  * @param  PinMask This parameter can be a combination of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  *         @arg @ref LL_GPIO_PIN_ALL
-  * @retval None
-  */
-__STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
-  __IO uint32_t temp;
-  WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
-  WRITE_REG(GPIOx->LCKR, PinMask);
-  WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
-  temp = READ_REG(GPIOx->LCKR);
-  (void) temp;
-}
-
-/**
-  * @brief  Return 1 if all pins passed as parameter, of a dedicated port, are locked. else Return 0.
-  * @rmtoll LCKR         LCKy          LL_GPIO_IsPinLocked
-  * @param  GPIOx GPIO Port
-  * @param  PinMask This parameter can be a combination of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  *         @arg @ref LL_GPIO_PIN_ALL
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
-  return (READ_BIT(GPIOx->LCKR, PinMask) == (PinMask));
-}
-
-/**
-  * @brief  Return 1 if one of the pin of a dedicated port is locked. else return 0.
-  * @rmtoll LCKR         LCKK          LL_GPIO_IsAnyPinLocked
-  * @param  GPIOx GPIO Port
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
-{
-  return (READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup GPIO_LL_EF_Data_Access Data Access
-  * @{
-  */
-
-/**
-  * @brief  Return full input data register value for a dedicated port.
-  * @rmtoll IDR          IDy           LL_GPIO_ReadInputPort
-  * @param  GPIOx GPIO Port
-  * @retval Input data register value of port
-  */
-__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
-{
-  return (uint32_t)(READ_REG(GPIOx->IDR));
-}
-
-/**
-  * @brief  Return if input data level for several pins of dedicated port is high or low.
-  * @rmtoll IDR          IDy           LL_GPIO_IsInputPinSet
-  * @param  GPIOx GPIO Port
-  * @param  PinMask This parameter can be a combination of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  *         @arg @ref LL_GPIO_PIN_ALL
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
-  return (READ_BIT(GPIOx->IDR, PinMask) == (PinMask));
-}
-
-/**
-  * @brief  Write output data register for the port.
-  * @rmtoll ODR          ODy           LL_GPIO_WriteOutputPort
-  * @param  GPIOx GPIO Port
-  * @param  PortValue Level value for each pin of the port
-  * @retval None
-  */
-__STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue)
-{
-  WRITE_REG(GPIOx->ODR, PortValue);
-}
-
-/**
-  * @brief  Return full output data register value for a dedicated port.
-  * @rmtoll ODR          ODy           LL_GPIO_ReadOutputPort
-  * @param  GPIOx GPIO Port
-  * @retval Output data register value of port
-  */
-__STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
-{
-  return (uint32_t)(READ_REG(GPIOx->ODR));
-}
-
-/**
-  * @brief  Return if input data level for several pins of dedicated port is high or low.
-  * @rmtoll ODR          ODy           LL_GPIO_IsOutputPinSet
-  * @param  GPIOx GPIO Port
-  * @param  PinMask This parameter can be a combination of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  *         @arg @ref LL_GPIO_PIN_ALL
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
-  return (READ_BIT(GPIOx->ODR, PinMask) == (PinMask));
-}
-
-/**
-  * @brief  Set several pins to high level on dedicated gpio port.
-  * @rmtoll BSRR         BSy           LL_GPIO_SetOutputPin
-  * @param  GPIOx GPIO Port
-  * @param  PinMask This parameter can be a combination of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  *         @arg @ref LL_GPIO_PIN_ALL
-  * @retval None
-  */
-__STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
-  WRITE_REG(GPIOx->BSRR, PinMask);
-}
-
-/**
-  * @brief  Set several pins to low level on dedicated gpio port.
-  * @rmtoll BRR          BRy           LL_GPIO_ResetOutputPin
-  * @param  GPIOx GPIO Port
-  * @param  PinMask This parameter can be a combination of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  *         @arg @ref LL_GPIO_PIN_ALL
-  * @retval None
-  */
-__STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
-  WRITE_REG(GPIOx->BRR, PinMask);
-}
-
-/**
-  * @brief  Toggle data value for several pin of dedicated port.
-  * @rmtoll ODR          ODy           LL_GPIO_TogglePin
-  * @param  GPIOx GPIO Port
-  * @param  PinMask This parameter can be a combination of the following values:
-  *         @arg @ref LL_GPIO_PIN_0
-  *         @arg @ref LL_GPIO_PIN_1
-  *         @arg @ref LL_GPIO_PIN_2
-  *         @arg @ref LL_GPIO_PIN_3
-  *         @arg @ref LL_GPIO_PIN_4
-  *         @arg @ref LL_GPIO_PIN_5
-  *         @arg @ref LL_GPIO_PIN_6
-  *         @arg @ref LL_GPIO_PIN_7
-  *         @arg @ref LL_GPIO_PIN_8
-  *         @arg @ref LL_GPIO_PIN_9
-  *         @arg @ref LL_GPIO_PIN_10
-  *         @arg @ref LL_GPIO_PIN_11
-  *         @arg @ref LL_GPIO_PIN_12
-  *         @arg @ref LL_GPIO_PIN_13
-  *         @arg @ref LL_GPIO_PIN_14
-  *         @arg @ref LL_GPIO_PIN_15
-  *         @arg @ref LL_GPIO_PIN_ALL
-  * @retval None
-  */
-__STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
-  WRITE_REG(GPIOx->ODR, READ_REG(GPIOx->ODR) ^ PinMask);
-}
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup GPIO_LL_EF_Init Initialization and de-initialization functions
-  * @{
-  */
-
-ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx);
-ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct);
-void        LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct);
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOH) */
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_GPIO_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h
deleted file mode 100755
index ad6e4662..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h
+++ /dev/null
@@ -1,2244 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_i2c.h
-  * @author  MCD Application Team
-  * @brief   Header file of I2C LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_I2C_H
-#define __STM32L0xx_LL_I2C_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (I2C1) || defined (I2C2) || defined (I2C3)
-
-/** @defgroup I2C_LL I2C
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup I2C_LL_Private_Constants I2C Private Constants
-  * @{
-  */
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup I2C_LL_Private_Macros I2C Private Macros
-  * @{
-  */
-/**
-  * @}
-  */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup I2C_LL_ES_INIT I2C Exported Init structure
-  * @{
-  */
-typedef struct
-{
-  uint32_t PeripheralMode;      /*!< Specifies the peripheral mode.
-                                     This parameter can be a value of @ref I2C_LL_EC_PERIPHERAL_MODE
-
-                                     This feature can be modified afterwards using unitary function @ref LL_I2C_SetMode(). */
-
-  uint32_t Timing;              /*!< Specifies the SDA setup, hold time and the SCL high, low period values.
-                                     This parameter must be set by referring to the STM32CubeMX Tool and
-                                     the helper macro @ref __LL_I2C_CONVERT_TIMINGS()
-
-                                     This feature can be modified afterwards using unitary function @ref LL_I2C_SetTiming(). */
-
-  uint32_t AnalogFilter;        /*!< Enables or disables analog noise filter.
-                                     This parameter can be a value of @ref I2C_LL_EC_ANALOGFILTER_SELECTION
-
-                                     This feature can be modified afterwards using unitary functions @ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */
-
-  uint32_t DigitalFilter;       /*!< Configures the digital noise filter.
-                                     This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x0F
-
-                                     This feature can be modified afterwards using unitary function @ref LL_I2C_SetDigitalFilter(). */
-
-  uint32_t OwnAddress1;         /*!< Specifies the device own address 1.
-                                     This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF
-
-                                     This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
-
-  uint32_t TypeAcknowledge;     /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
-                                     This parameter can be a value of @ref I2C_LL_EC_I2C_ACKNOWLEDGE
-
-                                     This feature can be modified afterwards using unitary function @ref LL_I2C_AcknowledgeNextData(). */
-
-  uint32_t OwnAddrSize;         /*!< Specifies the device own address 1 size (7-bit or 10-bit).
-                                     This parameter can be a value of @ref I2C_LL_EC_OWNADDRESS1
-
-                                     This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
-} LL_I2C_InitTypeDef;
-/**
-  * @}
-  */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup I2C_LL_Exported_Constants I2C Exported Constants
-  * @{
-  */
-
-/** @defgroup I2C_LL_EC_CLEAR_FLAG Clear Flags Defines
-  * @brief    Flags defines which can be used with LL_I2C_WriteReg function
-  * @{
-  */
-#define LL_I2C_ICR_ADDRCF                   I2C_ICR_ADDRCF          /*!< Address Matched flag   */
-#define LL_I2C_ICR_NACKCF                   I2C_ICR_NACKCF          /*!< Not Acknowledge flag   */
-#define LL_I2C_ICR_STOPCF                   I2C_ICR_STOPCF          /*!< Stop detection flag    */
-#define LL_I2C_ICR_BERRCF                   I2C_ICR_BERRCF          /*!< Bus error flag         */
-#define LL_I2C_ICR_ARLOCF                   I2C_ICR_ARLOCF          /*!< Arbitration Lost flag  */
-#define LL_I2C_ICR_OVRCF                    I2C_ICR_OVRCF           /*!< Overrun/Underrun flag  */
-#define LL_I2C_ICR_PECCF                    I2C_ICR_PECCF           /*!< PEC error flag         */
-#define LL_I2C_ICR_TIMOUTCF                 I2C_ICR_TIMOUTCF        /*!< Timeout detection flag */
-#define LL_I2C_ICR_ALERTCF                  I2C_ICR_ALERTCF         /*!< Alert flag             */
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EC_GET_FLAG Get Flags Defines
-  * @brief    Flags defines which can be used with LL_I2C_ReadReg function
-  * @{
-  */
-#define LL_I2C_ISR_TXE                      I2C_ISR_TXE             /*!< Transmit data register empty        */
-#define LL_I2C_ISR_TXIS                     I2C_ISR_TXIS            /*!< Transmit interrupt status           */
-#define LL_I2C_ISR_RXNE                     I2C_ISR_RXNE            /*!< Receive data register not empty     */
-#define LL_I2C_ISR_ADDR                     I2C_ISR_ADDR            /*!< Address matched (slave mode)        */
-#define LL_I2C_ISR_NACKF                    I2C_ISR_NACKF           /*!< Not Acknowledge received flag       */
-#define LL_I2C_ISR_STOPF                    I2C_ISR_STOPF           /*!< Stop detection flag                 */
-#define LL_I2C_ISR_TC                       I2C_ISR_TC              /*!< Transfer Complete (master mode)     */
-#define LL_I2C_ISR_TCR                      I2C_ISR_TCR             /*!< Transfer Complete Reload            */
-#define LL_I2C_ISR_BERR                     I2C_ISR_BERR            /*!< Bus error                           */
-#define LL_I2C_ISR_ARLO                     I2C_ISR_ARLO            /*!< Arbitration lost                    */
-#define LL_I2C_ISR_OVR                      I2C_ISR_OVR             /*!< Overrun/Underrun (slave mode)       */
-#define LL_I2C_ISR_PECERR                   I2C_ISR_PECERR          /*!< PEC Error in reception (SMBus mode) */
-#define LL_I2C_ISR_TIMEOUT                  I2C_ISR_TIMEOUT         /*!< Timeout detection flag (SMBus mode) */
-#define LL_I2C_ISR_ALERT                    I2C_ISR_ALERT           /*!< SMBus alert (SMBus mode)            */
-#define LL_I2C_ISR_BUSY                     I2C_ISR_BUSY            /*!< Bus busy                            */
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EC_IT IT Defines
-  * @brief    IT defines which can be used with LL_I2C_ReadReg and  LL_I2C_WriteReg functions
-  * @{
-  */
-#define LL_I2C_CR1_TXIE                     I2C_CR1_TXIE            /*!< TX Interrupt enable                         */
-#define LL_I2C_CR1_RXIE                     I2C_CR1_RXIE            /*!< RX Interrupt enable                         */
-#define LL_I2C_CR1_ADDRIE                   I2C_CR1_ADDRIE          /*!< Address match Interrupt enable (slave only) */
-#define LL_I2C_CR1_NACKIE                   I2C_CR1_NACKIE          /*!< Not acknowledge received Interrupt enable   */
-#define LL_I2C_CR1_STOPIE                   I2C_CR1_STOPIE          /*!< STOP detection Interrupt enable             */
-#define LL_I2C_CR1_TCIE                     I2C_CR1_TCIE            /*!< Transfer Complete interrupt enable          */
-#define LL_I2C_CR1_ERRIE                    I2C_CR1_ERRIE           /*!< Error interrupts enable                     */
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EC_PERIPHERAL_MODE Peripheral Mode
-  * @{
-  */
-#define LL_I2C_MODE_I2C                    0x00000000U              /*!< I2C Master or Slave mode                                    */
-#define LL_I2C_MODE_SMBUS_HOST             I2C_CR1_SMBHEN           /*!< SMBus Host address acknowledge                              */
-#define LL_I2C_MODE_SMBUS_DEVICE           0x00000000U              /*!< SMBus Device default mode (Default address not acknowledge) */
-#define LL_I2C_MODE_SMBUS_DEVICE_ARP       I2C_CR1_SMBDEN           /*!< SMBus Device Default address acknowledge                    */
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EC_ANALOGFILTER_SELECTION Analog Filter Selection
-  * @{
-  */
-#define LL_I2C_ANALOGFILTER_ENABLE          0x00000000U             /*!< Analog filter is enabled.  */
-#define LL_I2C_ANALOGFILTER_DISABLE         I2C_CR1_ANFOFF          /*!< Analog filter is disabled. */
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EC_ADDRESSING_MODE Master Addressing Mode
-  * @{
-  */
-#define LL_I2C_ADDRESSING_MODE_7BIT         0x00000000U              /*!< Master operates in 7-bit addressing mode. */
-#define LL_I2C_ADDRESSING_MODE_10BIT        I2C_CR2_ADD10            /*!< Master operates in 10-bit addressing mode.*/
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EC_OWNADDRESS1 Own Address 1 Length
-  * @{
-  */
-#define LL_I2C_OWNADDRESS1_7BIT             0x00000000U             /*!< Own address 1 is a 7-bit address. */
-#define LL_I2C_OWNADDRESS1_10BIT            I2C_OAR1_OA1MODE        /*!< Own address 1 is a 10-bit address.*/
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EC_OWNADDRESS2 Own Address 2 Masks
-  * @{
-  */
-#define LL_I2C_OWNADDRESS2_NOMASK           I2C_OAR2_OA2NOMASK      /*!< Own Address2 No mask.                                */
-#define LL_I2C_OWNADDRESS2_MASK01           I2C_OAR2_OA2MASK01      /*!< Only Address2 bits[7:2] are compared.                */
-#define LL_I2C_OWNADDRESS2_MASK02           I2C_OAR2_OA2MASK02      /*!< Only Address2 bits[7:3] are compared.                */
-#define LL_I2C_OWNADDRESS2_MASK03           I2C_OAR2_OA2MASK03      /*!< Only Address2 bits[7:4] are compared.                */
-#define LL_I2C_OWNADDRESS2_MASK04           I2C_OAR2_OA2MASK04      /*!< Only Address2 bits[7:5] are compared.                */
-#define LL_I2C_OWNADDRESS2_MASK05           I2C_OAR2_OA2MASK05      /*!< Only Address2 bits[7:6] are compared.                */
-#define LL_I2C_OWNADDRESS2_MASK06           I2C_OAR2_OA2MASK06      /*!< Only Address2 bits[7] are compared.                  */
-#define LL_I2C_OWNADDRESS2_MASK07           I2C_OAR2_OA2MASK07      /*!< No comparison is done. All Address2 are acknowledged.*/
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EC_I2C_ACKNOWLEDGE Acknowledge Generation
-  * @{
-  */
-#define LL_I2C_ACK                          0x00000000U              /*!< ACK is sent after current received byte. */
-#define LL_I2C_NACK                         I2C_CR2_NACK             /*!< NACK is sent after current received byte.*/
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EC_ADDRSLAVE Slave Address Length
-  * @{
-  */
-#define LL_I2C_ADDRSLAVE_7BIT               0x00000000U              /*!< Slave Address in 7-bit. */
-#define LL_I2C_ADDRSLAVE_10BIT              I2C_CR2_ADD10            /*!< Slave Address in 10-bit.*/
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EC_REQUEST Transfer Request Direction
-  * @{
-  */
-#define LL_I2C_REQUEST_WRITE                0x00000000U              /*!< Master request a write transfer. */
-#define LL_I2C_REQUEST_READ                 I2C_CR2_RD_WRN           /*!< Master request a read transfer.  */
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EC_MODE Transfer End Mode
-  * @{
-  */
-#define LL_I2C_MODE_RELOAD                  I2C_CR2_RELOAD                                      /*!< Enable I2C Reload mode.                                   */
-#define LL_I2C_MODE_AUTOEND                 I2C_CR2_AUTOEND                                     /*!< Enable I2C Automatic end mode with no HW PEC comparison.  */
-#define LL_I2C_MODE_SOFTEND                 0x00000000U                                         /*!< Enable I2C Software end mode with no HW PEC comparison.   */
-#define LL_I2C_MODE_SMBUS_RELOAD            LL_I2C_MODE_RELOAD                                  /*!< Enable SMBUS Automatic end mode with HW PEC comparison.   */
-#define LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC    LL_I2C_MODE_AUTOEND                                 /*!< Enable SMBUS Automatic end mode with HW PEC comparison.   */
-#define LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC    LL_I2C_MODE_SOFTEND                                 /*!< Enable SMBUS Software end mode with HW PEC comparison.    */
-#define LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC  (uint32_t)(LL_I2C_MODE_AUTOEND | I2C_CR2_PECBYTE)   /*!< Enable SMBUS Automatic end mode with HW PEC comparison.   */
-#define LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC  (uint32_t)(LL_I2C_MODE_SOFTEND | I2C_CR2_PECBYTE)   /*!< Enable SMBUS Software end mode with HW PEC comparison.    */
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EC_GENERATE Start And Stop Generation
-  * @{
-  */
-#define LL_I2C_GENERATE_NOSTARTSTOP         0x00000000U                                                                /*!< Don't Generate Stop and Start condition.                */
-#define LL_I2C_GENERATE_STOP                (uint32_t)(0x80000000U | I2C_CR2_STOP)                                     /*!< Generate Stop condition (Size should be set to 0).      */
-#define LL_I2C_GENERATE_START_READ          (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)                   /*!< Generate Start for read request.                        */
-#define LL_I2C_GENERATE_START_WRITE         (uint32_t)(0x80000000U | I2C_CR2_START)                                    /*!< Generate Start for write request.                       */
-#define LL_I2C_GENERATE_RESTART_7BIT_READ   (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)                   /*!< Generate Restart for read request, slave 7Bit address.  */
-#define LL_I2C_GENERATE_RESTART_7BIT_WRITE  (uint32_t)(0x80000000U | I2C_CR2_START)                                    /*!< Generate Restart for write request, slave 7Bit address. */
-#define LL_I2C_GENERATE_RESTART_10BIT_READ  (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN | I2C_CR2_HEAD10R) /*!< Generate Restart for read request, slave 10Bit address. */
-#define LL_I2C_GENERATE_RESTART_10BIT_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)                                    /*!< Generate Restart for write request, slave 10Bit address.*/
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EC_DIRECTION Read Write Direction
-  * @{
-  */
-#define LL_I2C_DIRECTION_WRITE              0x00000000U              /*!< Write transfer request by master, slave enters receiver mode.  */
-#define LL_I2C_DIRECTION_READ               I2C_ISR_DIR              /*!< Read transfer request by master, slave enters transmitter mode.*/
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EC_DMA_REG_DATA DMA Register Data
-  * @{
-  */
-#define LL_I2C_DMA_REG_DATA_TRANSMIT        0x00000000U              /*!< Get address of data register used for transmission */
-#define LL_I2C_DMA_REG_DATA_RECEIVE         0x00000001U              /*!< Get address of data register used for reception */
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EC_SMBUS_TIMEOUTA_MODE SMBus TimeoutA Mode SCL SDA Timeout
-  * @{
-  */
-#define LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW      0x00000000U          /*!< TimeoutA is used to detect SCL low level timeout.              */
-#define LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH I2C_TIMEOUTR_TIDLE   /*!< TimeoutA is used to detect both SCL and SDA high level timeout.*/
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EC_SMBUS_TIMEOUT_SELECTION SMBus Timeout Selection
-  * @{
-  */
-#define LL_I2C_SMBUS_TIMEOUTA               I2C_TIMEOUTR_TIMOUTEN                                   /*!< TimeoutA enable bit                                */
-#define LL_I2C_SMBUS_TIMEOUTB               I2C_TIMEOUTR_TEXTEN                                     /*!< TimeoutB (extended clock) enable bit               */
-#define LL_I2C_SMBUS_ALL_TIMEOUT            (uint32_t)(I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN) /*!< TimeoutA and TimeoutB (extended clock) enable bits */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup I2C_LL_Exported_Macros I2C Exported Macros
-  * @{
-  */
-
-/** @defgroup I2C_LL_EM_WRITE_READ Common Write and read registers Macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in I2C register
-  * @param  __INSTANCE__ I2C Instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_I2C_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in I2C register
-  * @param  __INSTANCE__ I2C Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_I2C_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EM_CONVERT_TIMINGS Convert SDA SCL timings
-  * @{
-  */
-/**
-  * @brief  Configure the SDA setup, hold time and the SCL high, low period.
-  * @param  __PRESCALER__ This parameter must be a value between  Min_Data=0 and Max_Data=0xF.
-  * @param  __DATA_SETUP_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tscldel = (SCLDEL+1)xtpresc)
-  * @param  __DATA_HOLD_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tsdadel = SDADELxtpresc)
-  * @param  __CLOCK_HIGH_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tsclh = (SCLH+1)xtpresc)
-  * @param  __CLOCK_LOW_PERIOD__ This parameter must be a value between  Min_Data=0 and Max_Data=0xFF. (tscll = (SCLL+1)xtpresc)
-  * @retval Value between Min_Data=0 and Max_Data=0xFFFFFFFF
-  */
-#define __LL_I2C_CONVERT_TIMINGS(__PRESCALER__, __DATA_SETUP_TIME__, __DATA_HOLD_TIME__, __CLOCK_HIGH_PERIOD__, __CLOCK_LOW_PERIOD__)   \
-        ((((uint32_t)(__PRESCALER__)         << I2C_TIMINGR_PRESC_Pos)  & I2C_TIMINGR_PRESC)   | \
-         (((uint32_t)(__DATA_SETUP_TIME__)   << I2C_TIMINGR_SCLDEL_Pos) & I2C_TIMINGR_SCLDEL)  | \
-         (((uint32_t)(__DATA_HOLD_TIME__)    << I2C_TIMINGR_SDADEL_Pos) & I2C_TIMINGR_SDADEL)  | \
-         (((uint32_t)(__CLOCK_HIGH_PERIOD__) << I2C_TIMINGR_SCLH_Pos)   & I2C_TIMINGR_SCLH)    | \
-         (((uint32_t)(__CLOCK_LOW_PERIOD__)  << I2C_TIMINGR_SCLL_Pos)   & I2C_TIMINGR_SCLL))
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup I2C_LL_Exported_Functions I2C Exported Functions
-  * @{
-  */
-
-/** @defgroup I2C_LL_EF_Configuration Configuration
-  * @{
-  */
-
-/**
-  * @brief  Enable I2C peripheral (PE = 1).
-  * @rmtoll CR1          PE            LL_I2C_Enable
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_Enable(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_PE);
-}
-
-/**
-  * @brief  Disable I2C peripheral (PE = 0).
-  * @note   When PE = 0, the I2C SCL and SDA lines are released.
-  *         Internal state machines and status bits are put back to their reset value.
-  *         When cleared, PE must be kept low for at least 3 APB clock cycles.
-  * @rmtoll CR1          PE            LL_I2C_Disable
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_Disable(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);
-}
-
-/**
-  * @brief  Check if the I2C peripheral is enabled or disabled.
-  * @rmtoll CR1          PE            LL_I2C_IsEnabled
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE));
-}
-
-/**
-  * @brief  Configure Noise Filters (Analog and Digital).
-  * @note   If the analog filter is also enabled, the digital filter is added to analog filter.
-  *         The filters can only be programmed when the I2C is disabled (PE = 0).
-  * @rmtoll CR1          ANFOFF        LL_I2C_ConfigFilters\n
-  *         CR1          DNF           LL_I2C_ConfigFilters
-  * @param  I2Cx I2C Instance.
-  * @param  AnalogFilter This parameter can be one of the following values:
-  *         @arg @ref LL_I2C_ANALOGFILTER_ENABLE
-  *         @arg @ref LL_I2C_ANALOGFILTER_DISABLE
-  * @param  DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
-  *         This parameter is used to configure the digital noise filter on SDA and SCL input.
-  *         The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_ConfigFilters(I2C_TypeDef *I2Cx, uint32_t AnalogFilter, uint32_t DigitalFilter)
-{
-  MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF | I2C_CR1_DNF, AnalogFilter | (DigitalFilter << I2C_CR1_DNF_Pos));
-}
-
-/**
-  * @brief  Configure Digital Noise Filter.
-  * @note   If the analog filter is also enabled, the digital filter is added to analog filter.
-  *         This filter can only be programmed when the I2C is disabled (PE = 0).
-  * @rmtoll CR1          DNF           LL_I2C_SetDigitalFilter
-  * @param  I2Cx I2C Instance.
-  * @param  DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
-  *         This parameter is used to configure the digital noise filter on SDA and SCL input.
-  *         The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_SetDigitalFilter(I2C_TypeDef *I2Cx, uint32_t DigitalFilter)
-{
-  MODIFY_REG(I2Cx->CR1, I2C_CR1_DNF, DigitalFilter << I2C_CR1_DNF_Pos);
-}
-
-/**
-  * @brief  Get the current Digital Noise Filter configuration.
-  * @rmtoll CR1          DNF           LL_I2C_GetDigitalFilter
-  * @param  I2Cx I2C Instance.
-  * @retval Value between Min_Data=0x0 and Max_Data=0xF
-  */
-__STATIC_INLINE uint32_t LL_I2C_GetDigitalFilter(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_DNF) >> I2C_CR1_DNF_Pos);
-}
-
-/**
-  * @brief  Enable Analog Noise Filter.
-  * @note   This filter can only be programmed when the I2C is disabled (PE = 0).
-  * @rmtoll CR1          ANFOFF        LL_I2C_EnableAnalogFilter
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableAnalogFilter(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
-}
-
-/**
-  * @brief  Disable Analog Noise Filter.
-  * @note   This filter can only be programmed when the I2C is disabled (PE = 0).
-  * @rmtoll CR1          ANFOFF        LL_I2C_DisableAnalogFilter
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableAnalogFilter(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
-}
-
-/**
-  * @brief  Check if Analog Noise Filter is enabled or disabled.
-  * @rmtoll CR1          ANFOFF        LL_I2C_IsEnabledAnalogFilter
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledAnalogFilter(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_ANFOFF) != (I2C_CR1_ANFOFF));
-}
-
-/**
-  * @brief  Enable DMA transmission requests.
-  * @rmtoll CR1          TXDMAEN       LL_I2C_EnableDMAReq_TX
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableDMAReq_TX(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
-}
-
-/**
-  * @brief  Disable DMA transmission requests.
-  * @rmtoll CR1          TXDMAEN       LL_I2C_DisableDMAReq_TX
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableDMAReq_TX(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
-}
-
-/**
-  * @brief  Check if DMA transmission requests are enabled or disabled.
-  * @rmtoll CR1          TXDMAEN       LL_I2C_IsEnabledDMAReq_TX
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_TX(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN) == (I2C_CR1_TXDMAEN));
-}
-
-/**
-  * @brief  Enable DMA reception requests.
-  * @rmtoll CR1          RXDMAEN       LL_I2C_EnableDMAReq_RX
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableDMAReq_RX(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
-}
-
-/**
-  * @brief  Disable DMA reception requests.
-  * @rmtoll CR1          RXDMAEN       LL_I2C_DisableDMAReq_RX
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableDMAReq_RX(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
-}
-
-/**
-  * @brief  Check if DMA reception requests are enabled or disabled.
-  * @rmtoll CR1          RXDMAEN       LL_I2C_IsEnabledDMAReq_RX
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_RX(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN) == (I2C_CR1_RXDMAEN));
-}
-
-/**
-  * @brief  Get the data register address used for DMA transfer
-  * @rmtoll TXDR         TXDATA        LL_I2C_DMA_GetRegAddr\n
-  *         RXDR         RXDATA        LL_I2C_DMA_GetRegAddr
-  * @param  I2Cx I2C Instance
-  * @param  Direction This parameter can be one of the following values:
-  *         @arg @ref LL_I2C_DMA_REG_DATA_TRANSMIT
-  *         @arg @ref LL_I2C_DMA_REG_DATA_RECEIVE
-  * @retval Address of data register
-  */
-__STATIC_INLINE uint32_t LL_I2C_DMA_GetRegAddr(I2C_TypeDef *I2Cx, uint32_t Direction)
-{
-  register uint32_t data_reg_addr = 0U;
-
-  if (Direction == LL_I2C_DMA_REG_DATA_TRANSMIT)
-  {
-    /* return address of TXDR register */
-    data_reg_addr = (uint32_t) & (I2Cx->TXDR);
-  }
-  else
-  {
-    /* return address of RXDR register */
-    data_reg_addr = (uint32_t) & (I2Cx->RXDR);
-  }
-
-  return data_reg_addr;
-}
-
-/**
-  * @brief  Enable Clock stretching.
-  * @note   This bit can only be programmed when the I2C is disabled (PE = 0).
-  * @rmtoll CR1          NOSTRETCH     LL_I2C_EnableClockStretching
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableClockStretching(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
-}
-
-/**
-  * @brief  Disable Clock stretching.
-  * @note   This bit can only be programmed when the I2C is disabled (PE = 0).
-  * @rmtoll CR1          NOSTRETCH     LL_I2C_DisableClockStretching
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableClockStretching(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
-}
-
-/**
-  * @brief  Check if Clock stretching is enabled or disabled.
-  * @rmtoll CR1          NOSTRETCH     LL_I2C_IsEnabledClockStretching
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledClockStretching(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH));
-}
-
-/**
-  * @brief  Enable hardware byte control in slave mode.
-  * @rmtoll CR1          SBC           LL_I2C_EnableSlaveByteControl
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableSlaveByteControl(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_SBC);
-}
-
-/**
-  * @brief  Disable hardware byte control in slave mode.
-  * @rmtoll CR1          SBC           LL_I2C_DisableSlaveByteControl
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableSlaveByteControl(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_SBC);
-}
-
-/**
-  * @brief  Check if hardware byte control in slave mode is enabled or disabled.
-  * @rmtoll CR1          SBC           LL_I2C_IsEnabledSlaveByteControl
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledSlaveByteControl(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC));
-}
-
-/**
-  * @brief  Enable Wakeup from STOP.
-  * @note   Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
-  *         WakeUpFromStop feature is supported by the I2Cx Instance.
-  * @note   This bit can only be programmed when Digital Filter is disabled.
-  * @rmtoll CR1          WUPEN         LL_I2C_EnableWakeUpFromStop
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableWakeUpFromStop(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
-}
-
-/**
-  * @brief  Disable Wakeup from STOP.
-  * @note   Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
-  *         WakeUpFromStop feature is supported by the I2Cx Instance.
-  * @rmtoll CR1          WUPEN         LL_I2C_DisableWakeUpFromStop
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableWakeUpFromStop(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
-}
-
-/**
-  * @brief  Check if Wakeup from STOP is enabled or disabled.
-  * @note   Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
-  *         WakeUpFromStop feature is supported by the I2Cx Instance.
-  * @rmtoll CR1          WUPEN         LL_I2C_IsEnabledWakeUpFromStop
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledWakeUpFromStop(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_WUPEN) == (I2C_CR1_WUPEN));
-}
-
-/**
-  * @brief  Enable General Call.
-  * @note   When enabled the Address 0x00 is ACKed.
-  * @rmtoll CR1          GCEN          LL_I2C_EnableGeneralCall
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableGeneralCall(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_GCEN);
-}
-
-/**
-  * @brief  Disable General Call.
-  * @note   When disabled the Address 0x00 is NACKed.
-  * @rmtoll CR1          GCEN          LL_I2C_DisableGeneralCall
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableGeneralCall(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);
-}
-
-/**
-  * @brief  Check if General Call is enabled or disabled.
-  * @rmtoll CR1          GCEN          LL_I2C_IsEnabledGeneralCall
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledGeneralCall(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_GCEN) == (I2C_CR1_GCEN));
-}
-
-/**
-  * @brief  Configure the Master to operate in 7-bit or 10-bit addressing mode.
-  * @note   Changing this bit is not allowed, when the START bit is set.
-  * @rmtoll CR2          ADD10         LL_I2C_SetMasterAddressingMode
-  * @param  I2Cx I2C Instance.
-  * @param  AddressingMode This parameter can be one of the following values:
-  *         @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
-  *         @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_SetMasterAddressingMode(I2C_TypeDef *I2Cx, uint32_t AddressingMode)
-{
-  MODIFY_REG(I2Cx->CR2, I2C_CR2_ADD10, AddressingMode);
-}
-
-/**
-  * @brief  Get the Master addressing mode.
-  * @rmtoll CR2          ADD10         LL_I2C_GetMasterAddressingMode
-  * @param  I2Cx I2C Instance.
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
-  *         @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
-  */
-__STATIC_INLINE uint32_t LL_I2C_GetMasterAddressingMode(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_ADD10));
-}
-
-/**
-  * @brief  Set the Own Address1.
-  * @rmtoll OAR1         OA1           LL_I2C_SetOwnAddress1\n
-  *         OAR1         OA1MODE       LL_I2C_SetOwnAddress1
-  * @param  I2Cx I2C Instance.
-  * @param  OwnAddress1 This parameter must be a value between Min_Data=0 and Max_Data=0x3FF.
-  * @param  OwnAddrSize This parameter can be one of the following values:
-  *         @arg @ref LL_I2C_OWNADDRESS1_7BIT
-  *         @arg @ref LL_I2C_OWNADDRESS1_10BIT
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_SetOwnAddress1(I2C_TypeDef *I2Cx, uint32_t OwnAddress1, uint32_t OwnAddrSize)
-{
-  MODIFY_REG(I2Cx->OAR1, I2C_OAR1_OA1 | I2C_OAR1_OA1MODE, OwnAddress1 | OwnAddrSize);
-}
-
-/**
-  * @brief  Enable acknowledge on Own Address1 match address.
-  * @rmtoll OAR1         OA1EN         LL_I2C_EnableOwnAddress1
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableOwnAddress1(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
-}
-
-/**
-  * @brief  Disable acknowledge on Own Address1 match address.
-  * @rmtoll OAR1         OA1EN         LL_I2C_DisableOwnAddress1
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableOwnAddress1(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
-}
-
-/**
-  * @brief  Check if Own Address1 acknowledge is enabled or disabled.
-  * @rmtoll OAR1         OA1EN         LL_I2C_IsEnabledOwnAddress1
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress1(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN) == (I2C_OAR1_OA1EN));
-}
-
-/**
-  * @brief  Set the 7bits Own Address2.
-  * @note   This action has no effect if own address2 is enabled.
-  * @rmtoll OAR2         OA2           LL_I2C_SetOwnAddress2\n
-  *         OAR2         OA2MSK        LL_I2C_SetOwnAddress2
-  * @param  I2Cx I2C Instance.
-  * @param  OwnAddress2 Value between Min_Data=0 and Max_Data=0x7F.
-  * @param  OwnAddrMask This parameter can be one of the following values:
-  *         @arg @ref LL_I2C_OWNADDRESS2_NOMASK
-  *         @arg @ref LL_I2C_OWNADDRESS2_MASK01
-  *         @arg @ref LL_I2C_OWNADDRESS2_MASK02
-  *         @arg @ref LL_I2C_OWNADDRESS2_MASK03
-  *         @arg @ref LL_I2C_OWNADDRESS2_MASK04
-  *         @arg @ref LL_I2C_OWNADDRESS2_MASK05
-  *         @arg @ref LL_I2C_OWNADDRESS2_MASK06
-  *         @arg @ref LL_I2C_OWNADDRESS2_MASK07
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_SetOwnAddress2(I2C_TypeDef *I2Cx, uint32_t OwnAddress2, uint32_t OwnAddrMask)
-{
-  MODIFY_REG(I2Cx->OAR2, I2C_OAR2_OA2 | I2C_OAR2_OA2MSK, OwnAddress2 | OwnAddrMask);
-}
-
-/**
-  * @brief  Enable acknowledge on Own Address2 match address.
-  * @rmtoll OAR2         OA2EN         LL_I2C_EnableOwnAddress2
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableOwnAddress2(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
-}
-
-/**
-  * @brief  Disable  acknowledge on Own Address2 match address.
-  * @rmtoll OAR2         OA2EN         LL_I2C_DisableOwnAddress2
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableOwnAddress2(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
-}
-
-/**
-  * @brief  Check if Own Address1 acknowledge is enabled or disabled.
-  * @rmtoll OAR2         OA2EN         LL_I2C_IsEnabledOwnAddress2
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress2(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN) == (I2C_OAR2_OA2EN));
-}
-
-/**
-  * @brief  Configure the SDA setup, hold time and the SCL high, low period.
-  * @note   This bit can only be programmed when the I2C is disabled (PE = 0).
-  * @rmtoll TIMINGR      TIMINGR       LL_I2C_SetTiming
-  * @param  I2Cx I2C Instance.
-  * @param  Timing This parameter must be a value between Min_Data=0 and Max_Data=0xFFFFFFFF.
-  * @note   This parameter is computed with the STM32CubeMX Tool.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_SetTiming(I2C_TypeDef *I2Cx, uint32_t Timing)
-{
-  WRITE_REG(I2Cx->TIMINGR, Timing);
-}
-
-/**
-  * @brief  Get the Timing Prescaler setting.
-  * @rmtoll TIMINGR      PRESC         LL_I2C_GetTimingPrescaler
-  * @param  I2Cx I2C Instance.
-  * @retval Value between Min_Data=0x0 and Max_Data=0xF
-  */
-__STATIC_INLINE uint32_t LL_I2C_GetTimingPrescaler(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_PRESC) >> I2C_TIMINGR_PRESC_Pos);
-}
-
-/**
-  * @brief  Get the SCL low period setting.
-  * @rmtoll TIMINGR      SCLL          LL_I2C_GetClockLowPeriod
-  * @param  I2Cx I2C Instance.
-  * @retval Value between Min_Data=0x00 and Max_Data=0xFF
-  */
-__STATIC_INLINE uint32_t LL_I2C_GetClockLowPeriod(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLL) >> I2C_TIMINGR_SCLL_Pos);
-}
-
-/**
-  * @brief  Get the SCL high period setting.
-  * @rmtoll TIMINGR      SCLH          LL_I2C_GetClockHighPeriod
-  * @param  I2Cx I2C Instance.
-  * @retval Value between Min_Data=0x00 and Max_Data=0xFF
-  */
-__STATIC_INLINE uint32_t LL_I2C_GetClockHighPeriod(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLH) >> I2C_TIMINGR_SCLH_Pos);
-}
-
-/**
-  * @brief  Get the SDA hold time.
-  * @rmtoll TIMINGR      SDADEL        LL_I2C_GetDataHoldTime
-  * @param  I2Cx I2C Instance.
-  * @retval Value between Min_Data=0x0 and Max_Data=0xF
-  */
-__STATIC_INLINE uint32_t LL_I2C_GetDataHoldTime(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SDADEL) >> I2C_TIMINGR_SDADEL_Pos);
-}
-
-/**
-  * @brief  Get the SDA setup time.
-  * @rmtoll TIMINGR      SCLDEL        LL_I2C_GetDataSetupTime
-  * @param  I2Cx I2C Instance.
-  * @retval Value between Min_Data=0x0 and Max_Data=0xF
-  */
-__STATIC_INLINE uint32_t LL_I2C_GetDataSetupTime(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLDEL) >> I2C_TIMINGR_SCLDEL_Pos);
-}
-
-/**
-  * @brief  Configure peripheral mode.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll CR1          SMBHEN        LL_I2C_SetMode\n
-  *         CR1          SMBDEN        LL_I2C_SetMode
-  * @param  I2Cx I2C Instance.
-  * @param  PeripheralMode This parameter can be one of the following values:
-  *         @arg @ref LL_I2C_MODE_I2C
-  *         @arg @ref LL_I2C_MODE_SMBUS_HOST
-  *         @arg @ref LL_I2C_MODE_SMBUS_DEVICE
-  *         @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode)
-{
-  MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN, PeripheralMode);
-}
-
-/**
-  * @brief  Get peripheral mode.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll CR1          SMBHEN        LL_I2C_GetMode\n
-  *         CR1          SMBDEN        LL_I2C_GetMode
-  * @param  I2Cx I2C Instance.
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_I2C_MODE_I2C
-  *         @arg @ref LL_I2C_MODE_SMBUS_HOST
-  *         @arg @ref LL_I2C_MODE_SMBUS_DEVICE
-  *         @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
-  */
-__STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN));
-}
-
-/**
-  * @brief  Enable SMBus alert (Host or Device mode)
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @note   SMBus Device mode:
-  *         - SMBus Alert pin is drived low and
-  *           Alert Response Address Header acknowledge is enabled.
-  *         SMBus Host mode:
-  *         - SMBus Alert pin management is supported.
-  * @rmtoll CR1          ALERTEN       LL_I2C_EnableSMBusAlert
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
-}
-
-/**
-  * @brief  Disable SMBus alert (Host or Device mode)
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @note   SMBus Device mode:
-  *         - SMBus Alert pin is not drived (can be used as a standard GPIO) and
-  *           Alert Response Address Header acknowledge is disabled.
-  *         SMBus Host mode:
-  *         - SMBus Alert pin management is not supported.
-  * @rmtoll CR1          ALERTEN       LL_I2C_DisableSMBusAlert
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
-}
-
-/**
-  * @brief  Check if SMBus alert (Host or Device mode) is enabled or disabled.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll CR1          ALERTEN       LL_I2C_IsEnabledSMBusAlert
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_ALERTEN) == (I2C_CR1_ALERTEN));
-}
-
-/**
-  * @brief  Enable SMBus Packet Error Calculation (PEC).
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll CR1          PECEN         LL_I2C_EnableSMBusPEC
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_PECEN);
-}
-
-/**
-  * @brief  Disable SMBus Packet Error Calculation (PEC).
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll CR1          PECEN         LL_I2C_DisableSMBusPEC
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_PECEN);
-}
-
-/**
-  * @brief  Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll CR1          PECEN         LL_I2C_IsEnabledSMBusPEC
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_PECEN) == (I2C_CR1_PECEN));
-}
-
-/**
-  * @brief  Configure the SMBus Clock Timeout.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @note   This configuration can only be programmed when associated Timeout is disabled (TimeoutA and/orTimeoutB).
-  * @rmtoll TIMEOUTR     TIMEOUTA      LL_I2C_ConfigSMBusTimeout\n
-  *         TIMEOUTR     TIDLE         LL_I2C_ConfigSMBusTimeout\n
-  *         TIMEOUTR     TIMEOUTB      LL_I2C_ConfigSMBusTimeout
-  * @param  I2Cx I2C Instance.
-  * @param  TimeoutA This parameter must be a value between  Min_Data=0 and Max_Data=0xFFF.
-  * @param  TimeoutAMode This parameter can be one of the following values:
-  *         @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
-  *         @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
-  * @param  TimeoutB
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_ConfigSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t TimeoutA, uint32_t TimeoutAMode,
-    uint32_t TimeoutB)
-{
-  MODIFY_REG(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA | I2C_TIMEOUTR_TIDLE | I2C_TIMEOUTR_TIMEOUTB,
-             TimeoutA | TimeoutAMode | (TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos));
-}
-
-/**
-  * @brief  Configure the SMBus Clock TimeoutA (SCL low timeout or SCL and SDA high timeout depends on TimeoutA mode).
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @note   These bits can only be programmed when TimeoutA is disabled.
-  * @rmtoll TIMEOUTR     TIMEOUTA      LL_I2C_SetSMBusTimeoutA
-  * @param  I2Cx I2C Instance.
-  * @param  TimeoutA This parameter must be a value between  Min_Data=0 and Max_Data=0xFFF.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_SetSMBusTimeoutA(I2C_TypeDef *I2Cx, uint32_t TimeoutA)
-{
-  WRITE_REG(I2Cx->TIMEOUTR, TimeoutA);
-}
-
-/**
-  * @brief  Get the SMBus Clock TimeoutA setting.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll TIMEOUTR     TIMEOUTA      LL_I2C_GetSMBusTimeoutA
-  * @param  I2Cx I2C Instance.
-  * @retval Value between Min_Data=0 and Max_Data=0xFFF
-  */
-__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutA(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA));
-}
-
-/**
-  * @brief  Set the SMBus Clock TimeoutA mode.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @note   This bit can only be programmed when TimeoutA is disabled.
-  * @rmtoll TIMEOUTR     TIDLE         LL_I2C_SetSMBusTimeoutAMode
-  * @param  I2Cx I2C Instance.
-  * @param  TimeoutAMode This parameter can be one of the following values:
-  *         @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
-  *         @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_SetSMBusTimeoutAMode(I2C_TypeDef *I2Cx, uint32_t TimeoutAMode)
-{
-  WRITE_REG(I2Cx->TIMEOUTR, TimeoutAMode);
-}
-
-/**
-  * @brief  Get the SMBus Clock TimeoutA mode.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll TIMEOUTR     TIDLE         LL_I2C_GetSMBusTimeoutAMode
-  * @param  I2Cx I2C Instance.
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
-  *         @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
-  */
-__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutAMode(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIDLE));
-}
-
-/**
-  * @brief  Configure the SMBus Extended Cumulative Clock TimeoutB (Master or Slave mode).
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @note   These bits can only be programmed when TimeoutB is disabled.
-  * @rmtoll TIMEOUTR     TIMEOUTB      LL_I2C_SetSMBusTimeoutB
-  * @param  I2Cx I2C Instance.
-  * @param  TimeoutB This parameter must be a value between  Min_Data=0 and Max_Data=0xFFF.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_SetSMBusTimeoutB(I2C_TypeDef *I2Cx, uint32_t TimeoutB)
-{
-  WRITE_REG(I2Cx->TIMEOUTR, TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos);
-}
-
-/**
-  * @brief  Get the SMBus Extented Cumulative Clock TimeoutB setting.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll TIMEOUTR     TIMEOUTB      LL_I2C_GetSMBusTimeoutB
-  * @param  I2Cx I2C Instance.
-  * @retval Value between Min_Data=0 and Max_Data=0xFFF
-  */
-__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutB(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTB) >> I2C_TIMEOUTR_TIMEOUTB_Pos);
-}
-
-/**
-  * @brief  Enable the SMBus Clock Timeout.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll TIMEOUTR     TIMOUTEN      LL_I2C_EnableSMBusTimeout\n
-  *         TIMEOUTR     TEXTEN        LL_I2C_EnableSMBusTimeout
-  * @param  I2Cx I2C Instance.
-  * @param  ClockTimeout This parameter can be one of the following values:
-  *         @arg @ref LL_I2C_SMBUS_TIMEOUTA
-  *         @arg @ref LL_I2C_SMBUS_TIMEOUTB
-  *         @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
-{
-  SET_BIT(I2Cx->TIMEOUTR, ClockTimeout);
-}
-
-/**
-  * @brief  Disable the SMBus Clock Timeout.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll TIMEOUTR     TIMOUTEN      LL_I2C_DisableSMBusTimeout\n
-  *         TIMEOUTR     TEXTEN        LL_I2C_DisableSMBusTimeout
-  * @param  I2Cx I2C Instance.
-  * @param  ClockTimeout This parameter can be one of the following values:
-  *         @arg @ref LL_I2C_SMBUS_TIMEOUTA
-  *         @arg @ref LL_I2C_SMBUS_TIMEOUTB
-  *         @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
-{
-  CLEAR_BIT(I2Cx->TIMEOUTR, ClockTimeout);
-}
-
-/**
-  * @brief  Check if the SMBus Clock Timeout is enabled or disabled.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll TIMEOUTR     TIMOUTEN      LL_I2C_IsEnabledSMBusTimeout\n
-  *         TIMEOUTR     TEXTEN        LL_I2C_IsEnabledSMBusTimeout
-  * @param  I2Cx I2C Instance.
-  * @param  ClockTimeout This parameter can be one of the following values:
-  *         @arg @ref LL_I2C_SMBUS_TIMEOUTA
-  *         @arg @ref LL_I2C_SMBUS_TIMEOUTB
-  *         @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
-{
-  return (READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EF_IT_Management IT_Management
-  * @{
-  */
-
-/**
-  * @brief  Enable TXIS interrupt.
-  * @rmtoll CR1          TXIE          LL_I2C_EnableIT_TX
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableIT_TX(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_TXIE);
-}
-
-/**
-  * @brief  Disable TXIS interrupt.
-  * @rmtoll CR1          TXIE          LL_I2C_DisableIT_TX
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableIT_TX(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXIE);
-}
-
-/**
-  * @brief  Check if the TXIS Interrupt is enabled or disabled.
-  * @rmtoll CR1          TXIE          LL_I2C_IsEnabledIT_TX
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TX(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_TXIE) == (I2C_CR1_TXIE));
-}
-
-/**
-  * @brief  Enable RXNE interrupt.
-  * @rmtoll CR1          RXIE          LL_I2C_EnableIT_RX
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableIT_RX(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_RXIE);
-}
-
-/**
-  * @brief  Disable RXNE interrupt.
-  * @rmtoll CR1          RXIE          LL_I2C_DisableIT_RX
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableIT_RX(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXIE);
-}
-
-/**
-  * @brief  Check if the RXNE Interrupt is enabled or disabled.
-  * @rmtoll CR1          RXIE          LL_I2C_IsEnabledIT_RX
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_RX(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_RXIE) == (I2C_CR1_RXIE));
-}
-
-/**
-  * @brief  Enable Address match interrupt (slave mode only).
-  * @rmtoll CR1          ADDRIE        LL_I2C_EnableIT_ADDR
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableIT_ADDR(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
-}
-
-/**
-  * @brief  Disable Address match interrupt (slave mode only).
-  * @rmtoll CR1          ADDRIE        LL_I2C_DisableIT_ADDR
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableIT_ADDR(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
-}
-
-/**
-  * @brief  Check if Address match interrupt is enabled or disabled.
-  * @rmtoll CR1          ADDRIE        LL_I2C_IsEnabledIT_ADDR
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ADDR(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE));
-}
-
-/**
-  * @brief  Enable Not acknowledge received interrupt.
-  * @rmtoll CR1          NACKIE        LL_I2C_EnableIT_NACK
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableIT_NACK(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
-}
-
-/**
-  * @brief  Disable Not acknowledge received interrupt.
-  * @rmtoll CR1          NACKIE        LL_I2C_DisableIT_NACK
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableIT_NACK(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
-}
-
-/**
-  * @brief  Check if Not acknowledge received interrupt is enabled or disabled.
-  * @rmtoll CR1          NACKIE        LL_I2C_IsEnabledIT_NACK
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_NACK(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_NACKIE) == (I2C_CR1_NACKIE));
-}
-
-/**
-  * @brief  Enable STOP detection interrupt.
-  * @rmtoll CR1          STOPIE        LL_I2C_EnableIT_STOP
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableIT_STOP(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
-}
-
-/**
-  * @brief  Disable STOP detection interrupt.
-  * @rmtoll CR1          STOPIE        LL_I2C_DisableIT_STOP
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableIT_STOP(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
-}
-
-/**
-  * @brief  Check if STOP detection interrupt is enabled or disabled.
-  * @rmtoll CR1          STOPIE        LL_I2C_IsEnabledIT_STOP
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_STOP(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_STOPIE) == (I2C_CR1_STOPIE));
-}
-
-/**
-  * @brief  Enable Transfer Complete interrupt.
-  * @note   Any of these events will generate interrupt :
-  *         Transfer Complete (TC)
-  *         Transfer Complete Reload (TCR)
-  * @rmtoll CR1          TCIE          LL_I2C_EnableIT_TC
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableIT_TC(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_TCIE);
-}
-
-/**
-  * @brief  Disable Transfer Complete interrupt.
-  * @note   Any of these events will generate interrupt :
-  *         Transfer Complete (TC)
-  *         Transfer Complete Reload (TCR)
-  * @rmtoll CR1          TCIE          LL_I2C_DisableIT_TC
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableIT_TC(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_TCIE);
-}
-
-/**
-  * @brief  Check if Transfer Complete interrupt is enabled or disabled.
-  * @rmtoll CR1          TCIE          LL_I2C_IsEnabledIT_TC
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TC(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_TCIE) == (I2C_CR1_TCIE));
-}
-
-/**
-  * @brief  Enable Error interrupts.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @note   Any of these errors will generate interrupt :
-  *         Arbitration Loss (ARLO)
-  *         Bus Error detection (BERR)
-  *         Overrun/Underrun (OVR)
-  *         SMBus Timeout detection (TIMEOUT)
-  *         SMBus PEC error detection (PECERR)
-  *         SMBus Alert pin event detection (ALERT)
-  * @rmtoll CR1          ERRIE         LL_I2C_EnableIT_ERR
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
-}
-
-/**
-  * @brief  Disable Error interrupts.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @note   Any of these errors will generate interrupt :
-  *         Arbitration Loss (ARLO)
-  *         Bus Error detection (BERR)
-  *         Overrun/Underrun (OVR)
-  *         SMBus Timeout detection (TIMEOUT)
-  *         SMBus PEC error detection (PECERR)
-  *         SMBus Alert pin event detection (ALERT)
-  * @rmtoll CR1          ERRIE         LL_I2C_DisableIT_ERR
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableIT_ERR(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
-}
-
-/**
-  * @brief  Check if Error interrupts are enabled or disabled.
-  * @rmtoll CR1          ERRIE         LL_I2C_IsEnabledIT_ERR
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ERR(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR1, I2C_CR1_ERRIE) == (I2C_CR1_ERRIE));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EF_FLAG_management FLAG_management
-  * @{
-  */
-
-/**
-  * @brief  Indicate the status of Transmit data register empty flag.
-  * @note   RESET: When next data is written in Transmit data register.
-  *         SET: When Transmit data register is empty.
-  * @rmtoll ISR          TXE           LL_I2C_IsActiveFlag_TXE
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE));
-}
-
-/**
-  * @brief  Indicate the status of Transmit interrupt flag.
-  * @note   RESET: When next data is written in Transmit data register.
-  *         SET: When Transmit data register is empty.
-  * @rmtoll ISR          TXIS          LL_I2C_IsActiveFlag_TXIS
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXIS(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->ISR, I2C_ISR_TXIS) == (I2C_ISR_TXIS));
-}
-
-/**
-  * @brief  Indicate the status of Receive data register not empty flag.
-  * @note   RESET: When Receive data register is read.
-  *         SET: When the received data is copied in Receive data register.
-  * @rmtoll ISR          RXNE          LL_I2C_IsActiveFlag_RXNE
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE));
-}
-
-/**
-  * @brief  Indicate the status of Address matched flag (slave mode).
-  * @note   RESET: Clear default value.
-  *         SET: When the received slave address matched with one of the enabled slave address.
-  * @rmtoll ISR          ADDR          LL_I2C_IsActiveFlag_ADDR
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->ISR, I2C_ISR_ADDR) == (I2C_ISR_ADDR));
-}
-
-/**
-  * @brief  Indicate the status of Not Acknowledge received flag.
-  * @note   RESET: Clear default value.
-  *         SET: When a NACK is received after a byte transmission.
-  * @rmtoll ISR          NACKF         LL_I2C_IsActiveFlag_NACK
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_NACK(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->ISR, I2C_ISR_NACKF) == (I2C_ISR_NACKF));
-}
-
-/**
-  * @brief  Indicate the status of Stop detection flag.
-  * @note   RESET: Clear default value.
-  *         SET: When a Stop condition is detected.
-  * @rmtoll ISR          STOPF         LL_I2C_IsActiveFlag_STOP
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF));
-}
-
-/**
-  * @brief  Indicate the status of Transfer complete flag (master mode).
-  * @note   RESET: Clear default value.
-  *         SET: When RELOAD=0, AUTOEND=0 and NBYTES date have been transferred.
-  * @rmtoll ISR          TC            LL_I2C_IsActiveFlag_TC
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TC(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->ISR, I2C_ISR_TC) == (I2C_ISR_TC));
-}
-
-/**
-  * @brief  Indicate the status of Transfer complete flag (master mode).
-  * @note   RESET: Clear default value.
-  *         SET: When RELOAD=1 and NBYTES date have been transferred.
-  * @rmtoll ISR          TCR           LL_I2C_IsActiveFlag_TCR
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TCR(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->ISR, I2C_ISR_TCR) == (I2C_ISR_TCR));
-}
-
-/**
-  * @brief  Indicate the status of Bus error flag.
-  * @note   RESET: Clear default value.
-  *         SET: When a misplaced Start or Stop condition is detected.
-  * @rmtoll ISR          BERR          LL_I2C_IsActiveFlag_BERR
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BERR(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->ISR, I2C_ISR_BERR) == (I2C_ISR_BERR));
-}
-
-/**
-  * @brief  Indicate the status of Arbitration lost flag.
-  * @note   RESET: Clear default value.
-  *         SET: When arbitration lost.
-  * @rmtoll ISR          ARLO          LL_I2C_IsActiveFlag_ARLO
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ARLO(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->ISR, I2C_ISR_ARLO) == (I2C_ISR_ARLO));
-}
-
-/**
-  * @brief  Indicate the status of Overrun/Underrun flag (slave mode).
-  * @note   RESET: Clear default value.
-  *         SET: When an overrun/underrun error occurs (Clock Stretching Disabled).
-  * @rmtoll ISR          OVR           LL_I2C_IsActiveFlag_OVR
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->ISR, I2C_ISR_OVR) == (I2C_ISR_OVR));
-}
-
-/**
-  * @brief  Indicate the status of SMBus PEC error flag in reception.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @note   RESET: Clear default value.
-  *         SET: When the received PEC does not match with the PEC register content.
-  * @rmtoll ISR          PECERR        LL_I2C_IsActiveSMBusFlag_PECERR
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->ISR, I2C_ISR_PECERR) == (I2C_ISR_PECERR));
-}
-
-/**
-  * @brief  Indicate the status of SMBus Timeout detection flag.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @note   RESET: Clear default value.
-  *         SET: When a timeout or extended clock timeout occurs.
-  * @rmtoll ISR          TIMEOUT       LL_I2C_IsActiveSMBusFlag_TIMEOUT
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->ISR, I2C_ISR_TIMEOUT) == (I2C_ISR_TIMEOUT));
-}
-
-/**
-  * @brief  Indicate the status of SMBus alert flag.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @note   RESET: Clear default value.
-  *         SET: When SMBus host configuration, SMBus alert enabled and
-  *              a falling edge event occurs on SMBA pin.
-  * @rmtoll ISR          ALERT         LL_I2C_IsActiveSMBusFlag_ALERT
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->ISR, I2C_ISR_ALERT) == (I2C_ISR_ALERT));
-}
-
-/**
-  * @brief  Indicate the status of Bus Busy flag.
-  * @note   RESET: Clear default value.
-  *         SET: When a Start condition is detected.
-  * @rmtoll ISR          BUSY          LL_I2C_IsActiveFlag_BUSY
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BUSY(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->ISR, I2C_ISR_BUSY) == (I2C_ISR_BUSY));
-}
-
-/**
-  * @brief  Clear Address Matched flag.
-  * @rmtoll ICR          ADDRCF        LL_I2C_ClearFlag_ADDR
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_ClearFlag_ADDR(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->ICR, I2C_ICR_ADDRCF);
-}
-
-/**
-  * @brief  Clear Not Acknowledge flag.
-  * @rmtoll ICR          NACKCF        LL_I2C_ClearFlag_NACK
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_ClearFlag_NACK(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->ICR, I2C_ICR_NACKCF);
-}
-
-/**
-  * @brief  Clear Stop detection flag.
-  * @rmtoll ICR          STOPCF        LL_I2C_ClearFlag_STOP
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_ClearFlag_STOP(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->ICR, I2C_ICR_STOPCF);
-}
-
-/**
-  * @brief  Clear Transmit data register empty flag (TXE).
-  * @note   This bit can be clear by software in order to flush the transmit data register (TXDR).
-  * @rmtoll ISR          TXE           LL_I2C_ClearFlag_TXE
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_ClearFlag_TXE(I2C_TypeDef *I2Cx)
-{
-  WRITE_REG(I2Cx->ISR, I2C_ISR_TXE);
-}
-
-/**
-  * @brief  Clear Bus error flag.
-  * @rmtoll ICR          BERRCF        LL_I2C_ClearFlag_BERR
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_ClearFlag_BERR(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->ICR, I2C_ICR_BERRCF);
-}
-
-/**
-  * @brief  Clear Arbitration lost flag.
-  * @rmtoll ICR          ARLOCF        LL_I2C_ClearFlag_ARLO
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_ClearFlag_ARLO(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->ICR, I2C_ICR_ARLOCF);
-}
-
-/**
-  * @brief  Clear Overrun/Underrun flag.
-  * @rmtoll ICR          OVRCF         LL_I2C_ClearFlag_OVR
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->ICR, I2C_ICR_OVRCF);
-}
-
-/**
-  * @brief  Clear SMBus PEC error flag.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll ICR          PECCF         LL_I2C_ClearSMBusFlag_PECERR
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->ICR, I2C_ICR_PECCF);
-}
-
-/**
-  * @brief  Clear SMBus Timeout detection flag.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll ICR          TIMOUTCF      LL_I2C_ClearSMBusFlag_TIMEOUT
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->ICR, I2C_ICR_TIMOUTCF);
-}
-
-/**
-  * @brief  Clear SMBus Alert flag.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll ICR          ALERTCF       LL_I2C_ClearSMBusFlag_ALERT
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_ClearSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->ICR, I2C_ICR_ALERTCF);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup I2C_LL_EF_Data_Management Data_Management
-  * @{
-  */
-
-/**
-  * @brief  Enable automatic STOP condition generation (master mode).
-  * @note   Automatic end mode : a STOP condition is automatically sent when NBYTES data are transferred.
-  *         This bit has no effect in slave mode or when RELOAD bit is set.
-  * @rmtoll CR2          AUTOEND       LL_I2C_EnableAutoEndMode
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableAutoEndMode(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
-}
-
-/**
-  * @brief  Disable automatic STOP condition generation (master mode).
-  * @note   Software end mode : TC flag is set when NBYTES data are transferre, stretching SCL low.
-  * @rmtoll CR2          AUTOEND       LL_I2C_DisableAutoEndMode
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableAutoEndMode(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
-}
-
-/**
-  * @brief  Check if automatic STOP condition is enabled or disabled.
-  * @rmtoll CR2          AUTOEND       LL_I2C_IsEnabledAutoEndMode
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledAutoEndMode(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR2, I2C_CR2_AUTOEND) == (I2C_CR2_AUTOEND));
-}
-
-/**
-  * @brief  Enable reload mode (master mode).
-  * @note   The transfer is not completed after the NBYTES data transfer, NBYTES will be reloaded when TCR flag is set.
-  * @rmtoll CR2          RELOAD       LL_I2C_EnableReloadMode
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableReloadMode(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
-}
-
-/**
-  * @brief  Disable reload mode (master mode).
-  * @note   The transfer is completed after the NBYTES data transfer(STOP or RESTART will follow).
-  * @rmtoll CR2          RELOAD       LL_I2C_DisableReloadMode
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableReloadMode(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
-}
-
-/**
-  * @brief  Check if reload mode is enabled or disabled.
-  * @rmtoll CR2          RELOAD       LL_I2C_IsEnabledReloadMode
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledReloadMode(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR2, I2C_CR2_RELOAD) == (I2C_CR2_RELOAD));
-}
-
-/**
-  * @brief  Configure the number of bytes for transfer.
-  * @note   Changing these bits when START bit is set is not allowed.
-  * @rmtoll CR2          NBYTES           LL_I2C_SetTransferSize
-  * @param  I2Cx I2C Instance.
-  * @param  TransferSize This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_SetTransferSize(I2C_TypeDef *I2Cx, uint32_t TransferSize)
-{
-  MODIFY_REG(I2Cx->CR2, I2C_CR2_NBYTES, TransferSize << I2C_CR2_NBYTES_Pos);
-}
-
-/**
-  * @brief  Get the number of bytes configured for transfer.
-  * @rmtoll CR2          NBYTES           LL_I2C_GetTransferSize
-  * @param  I2Cx I2C Instance.
-  * @retval Value between Min_Data=0x0 and Max_Data=0xFF
-  */
-__STATIC_INLINE uint32_t LL_I2C_GetTransferSize(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_NBYTES) >> I2C_CR2_NBYTES_Pos);
-}
-
-/**
-  * @brief  Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
-  * @note   Usage in Slave mode only.
-  * @rmtoll CR2          NACK          LL_I2C_AcknowledgeNextData
-  * @param  I2Cx I2C Instance.
-  * @param  TypeAcknowledge This parameter can be one of the following values:
-  *         @arg @ref LL_I2C_ACK
-  *         @arg @ref LL_I2C_NACK
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_AcknowledgeNextData(I2C_TypeDef *I2Cx, uint32_t TypeAcknowledge)
-{
-  MODIFY_REG(I2Cx->CR2, I2C_CR2_NACK, TypeAcknowledge);
-}
-
-/**
-  * @brief  Generate a START or RESTART condition
-  * @note   The START bit can be set even if bus is BUSY or I2C is in slave mode.
-  *         This action has no effect when RELOAD is set.
-  * @rmtoll CR2          START           LL_I2C_GenerateStartCondition
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_GenerateStartCondition(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR2, I2C_CR2_START);
-}
-
-/**
-  * @brief  Generate a STOP condition after the current byte transfer (master mode).
-  * @rmtoll CR2          STOP          LL_I2C_GenerateStopCondition
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR2, I2C_CR2_STOP);
-}
-
-/**
-  * @brief  Enable automatic RESTART Read request condition for 10bit address header (master mode).
-  * @note   The master sends the complete 10bit slave address read sequence :
-  *         Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address in Read direction.
-  * @rmtoll CR2          HEAD10R       LL_I2C_EnableAuto10BitRead
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableAuto10BitRead(I2C_TypeDef *I2Cx)
-{
-  CLEAR_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
-}
-
-/**
-  * @brief  Disable automatic RESTART Read request condition for 10bit address header (master mode).
-  * @note   The master only sends the first 7 bits of 10bit address in Read direction.
-  * @rmtoll CR2          HEAD10R       LL_I2C_DisableAuto10BitRead
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_DisableAuto10BitRead(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
-}
-
-/**
-  * @brief  Check if automatic RESTART Read request condition for 10bit address header is enabled or disabled.
-  * @rmtoll CR2          HEAD10R       LL_I2C_IsEnabledAuto10BitRead
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledAuto10BitRead(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR2, I2C_CR2_HEAD10R) != (I2C_CR2_HEAD10R));
-}
-
-/**
-  * @brief  Configure the transfer direction (master mode).
-  * @note   Changing these bits when START bit is set is not allowed.
-  * @rmtoll CR2          RD_WRN           LL_I2C_SetTransferRequest
-  * @param  I2Cx I2C Instance.
-  * @param  TransferRequest This parameter can be one of the following values:
-  *         @arg @ref LL_I2C_REQUEST_WRITE
-  *         @arg @ref LL_I2C_REQUEST_READ
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_SetTransferRequest(I2C_TypeDef *I2Cx, uint32_t TransferRequest)
-{
-  MODIFY_REG(I2Cx->CR2, I2C_CR2_RD_WRN, TransferRequest);
-}
-
-/**
-  * @brief  Get the transfer direction requested (master mode).
-  * @rmtoll CR2          RD_WRN           LL_I2C_GetTransferRequest
-  * @param  I2Cx I2C Instance.
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_I2C_REQUEST_WRITE
-  *         @arg @ref LL_I2C_REQUEST_READ
-  */
-__STATIC_INLINE uint32_t LL_I2C_GetTransferRequest(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_RD_WRN));
-}
-
-/**
-  * @brief  Configure the slave address for transfer (master mode).
-  * @note   Changing these bits when START bit is set is not allowed.
-  * @rmtoll CR2          SADD           LL_I2C_SetSlaveAddr
-  * @param  I2Cx I2C Instance.
-  * @param  SlaveAddr This parameter must be a value between Min_Data=0x00 and Max_Data=0x3F.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_SetSlaveAddr(I2C_TypeDef *I2Cx, uint32_t SlaveAddr)
-{
-  MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD, SlaveAddr);
-}
-
-/**
-  * @brief  Get the slave address programmed for transfer.
-  * @rmtoll CR2          SADD           LL_I2C_GetSlaveAddr
-  * @param  I2Cx I2C Instance.
-  * @retval Value between Min_Data=0x0 and Max_Data=0x3F
-  */
-__STATIC_INLINE uint32_t LL_I2C_GetSlaveAddr(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_SADD));
-}
-
-/**
-  * @brief  Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
-  * @rmtoll CR2          SADD          LL_I2C_HandleTransfer\n
-  *         CR2          ADD10         LL_I2C_HandleTransfer\n
-  *         CR2          RD_WRN        LL_I2C_HandleTransfer\n
-  *         CR2          START         LL_I2C_HandleTransfer\n
-  *         CR2          STOP          LL_I2C_HandleTransfer\n
-  *         CR2          RELOAD        LL_I2C_HandleTransfer\n
-  *         CR2          NBYTES        LL_I2C_HandleTransfer\n
-  *         CR2          AUTOEND       LL_I2C_HandleTransfer\n
-  *         CR2          HEAD10R       LL_I2C_HandleTransfer
-  * @param  I2Cx I2C Instance.
-  * @param  SlaveAddr Specifies the slave address to be programmed.
-  * @param  SlaveAddrSize This parameter can be one of the following values:
-  *         @arg @ref LL_I2C_ADDRSLAVE_7BIT
-  *         @arg @ref LL_I2C_ADDRSLAVE_10BIT
-  * @param  TransferSize Specifies the number of bytes to be programmed.
-  *                       This parameter must be a value between Min_Data=0 and Max_Data=255.
-  * @param  EndMode This parameter can be one of the following values:
-  *         @arg @ref LL_I2C_MODE_RELOAD
-  *         @arg @ref LL_I2C_MODE_AUTOEND
-  *         @arg @ref LL_I2C_MODE_SOFTEND
-  *         @arg @ref LL_I2C_MODE_SMBUS_RELOAD
-  *         @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC
-  *         @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC
-  *         @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC
-  *         @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC
-  * @param  Request This parameter can be one of the following values:
-  *         @arg @ref LL_I2C_GENERATE_NOSTARTSTOP
-  *         @arg @ref LL_I2C_GENERATE_STOP
-  *         @arg @ref LL_I2C_GENERATE_START_READ
-  *         @arg @ref LL_I2C_GENERATE_START_WRITE
-  *         @arg @ref LL_I2C_GENERATE_RESTART_7BIT_READ
-  *         @arg @ref LL_I2C_GENERATE_RESTART_7BIT_WRITE
-  *         @arg @ref LL_I2C_GENERATE_RESTART_10BIT_READ
-  *         @arg @ref LL_I2C_GENERATE_RESTART_10BIT_WRITE
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize,
-                                                          uint32_t TransferSize, uint32_t EndMode, uint32_t Request)
-{
-  MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD | I2C_CR2_ADD10 | (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_RELOAD |
-             I2C_CR2_NBYTES | I2C_CR2_AUTOEND | I2C_CR2_HEAD10R,
-             SlaveAddr | SlaveAddrSize | TransferSize << I2C_CR2_NBYTES_Pos | EndMode | Request);
-}
-
-/**
-  * @brief  Indicate the value of transfer direction (slave mode).
-  * @note   RESET: Write transfer, Slave enters in receiver mode.
-  *         SET: Read transfer, Slave enters in transmitter mode.
-  * @rmtoll ISR          DIR           LL_I2C_GetTransferDirection
-  * @param  I2Cx I2C Instance.
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_I2C_DIRECTION_WRITE
-  *         @arg @ref LL_I2C_DIRECTION_READ
-  */
-__STATIC_INLINE uint32_t LL_I2C_GetTransferDirection(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_DIR));
-}
-
-/**
-  * @brief  Return the slave matched address.
-  * @rmtoll ISR          ADDCODE       LL_I2C_GetAddressMatchCode
-  * @param  I2Cx I2C Instance.
-  * @retval Value between Min_Data=0x00 and Max_Data=0x3F
-  */
-__STATIC_INLINE uint32_t LL_I2C_GetAddressMatchCode(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_ADDCODE) >> I2C_ISR_ADDCODE_Pos << 1);
-}
-
-/**
-  * @brief  Enable internal comparison of the SMBus Packet Error byte (transmission or reception mode).
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @note   This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition or an Address Matched is received.
-  *         This bit has no effect when RELOAD bit is set.
-  *         This bit has no effect in device mode when SBC bit is not set.
-  * @rmtoll CR2          PECBYTE       LL_I2C_EnableSMBusPECCompare
-  * @param  I2Cx I2C Instance.
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
-{
-  SET_BIT(I2Cx->CR2, I2C_CR2_PECBYTE);
-}
-
-/**
-  * @brief  Check if the SMBus Packet Error byte internal comparison is requested or not.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll CR2          PECBYTE       LL_I2C_IsEnabledSMBusPECCompare
-  * @param  I2Cx I2C Instance.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
-{
-  return (READ_BIT(I2Cx->CR2, I2C_CR2_PECBYTE) == (I2C_CR2_PECBYTE));
-}
-
-/**
-  * @brief  Get the SMBus Packet Error byte calculated.
-  * @note   Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
-  *         SMBus feature is supported by the I2Cx Instance.
-  * @rmtoll PECR         PEC           LL_I2C_GetSMBusPEC
-  * @param  I2Cx I2C Instance.
-  * @retval Value between Min_Data=0x00 and Max_Data=0xFF
-*/
-__STATIC_INLINE uint32_t LL_I2C_GetSMBusPEC(I2C_TypeDef *I2Cx)
-{
-  return (uint32_t)(READ_BIT(I2Cx->PECR, I2C_PECR_PEC));
-}
-
-/**
-  * @brief  Read Receive Data register.
-  * @rmtoll RXDR         RXDATA        LL_I2C_ReceiveData8
-  * @param  I2Cx I2C Instance.
-  * @retval Value between Min_Data=0x00 and Max_Data=0xFF
-  */
-__STATIC_INLINE uint8_t LL_I2C_ReceiveData8(I2C_TypeDef *I2Cx)
-{
-  return (uint8_t)(READ_BIT(I2Cx->RXDR, I2C_RXDR_RXDATA));
-}
-
-/**
-  * @brief  Write in Transmit Data Register .
-  * @rmtoll TXDR         TXDATA        LL_I2C_TransmitData8
-  * @param  I2Cx I2C Instance.
-  * @param  Data Value between Min_Data=0x00 and Max_Data=0xFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data)
-{
-  WRITE_REG(I2Cx->TXDR, Data);
-}
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup I2C_LL_EF_Init Initialization and de-initialization functions
-  * @{
-  */
-
-uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct);
-uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx);
-void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct);
-
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* I2C1 || I2C2 || I2C3 */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_I2C_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_iwdg.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_iwdg.h
deleted file mode 100755
index 0870b60a..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_iwdg.h
+++ /dev/null
@@ -1,361 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_iwdg.h
-  * @author  MCD Application Team
-  * @brief   Header file of IWDG LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_IWDG_H
-#define __STM32L0xx_LL_IWDG_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined(IWDG)
-
-/** @defgroup IWDG_LL IWDG
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
-  * @{
-  */
-
-#define LL_IWDG_KEY_RELOAD                 ((uint32_t)0x0000AAAAU)               /*!< IWDG Reload Counter Enable   */
-#define LL_IWDG_KEY_ENABLE                 ((uint32_t)0x0000CCCCU)               /*!< IWDG Peripheral Enable       */
-#define LL_IWDG_KEY_WR_ACCESS_ENABLE       ((uint32_t)0x00005555U)               /*!< IWDG KR Write Access Enable  */
-#define LL_IWDG_KEY_WR_ACCESS_DISABLE      ((uint32_t)0x00000000U)               /*!< IWDG KR Write Access Disable */
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants
-  * @{
-  */
-
-/** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines
-  * @brief    Flags defines which can be used with LL_IWDG_ReadReg function
-  * @{
-  */
-#define LL_IWDG_SR_PVU                     IWDG_SR_PVU                           /*!< Watchdog prescaler value update */
-#define LL_IWDG_SR_RVU                     IWDG_SR_RVU                           /*!< Watchdog counter reload value update */
-#define LL_IWDG_SR_WVU                     IWDG_SR_WVU                           /*!< Watchdog counter window value update */
-
-/**
-  * @}
-  */
-
-/** @defgroup IWDG_LL_EC_PRESCALER  Prescaler Divider
-  * @{
-  */
-#define LL_IWDG_PRESCALER_4                ((uint32_t)0x00000000U)               /*!< Divider by 4   */
-#define LL_IWDG_PRESCALER_8                (IWDG_PR_PR_0)                        /*!< Divider by 8   */
-#define LL_IWDG_PRESCALER_16               (IWDG_PR_PR_1)                        /*!< Divider by 16  */
-#define LL_IWDG_PRESCALER_32               (IWDG_PR_PR_1 | IWDG_PR_PR_0)         /*!< Divider by 32  */
-#define LL_IWDG_PRESCALER_64               (IWDG_PR_PR_2)                        /*!< Divider by 64  */
-#define LL_IWDG_PRESCALER_128              (IWDG_PR_PR_2 | IWDG_PR_PR_0)         /*!< Divider by 128 */
-#define LL_IWDG_PRESCALER_256              (IWDG_PR_PR_2 | IWDG_PR_PR_1)         /*!< Divider by 256 */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros
-  * @{
-  */
-
-/** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in IWDG register
-  * @param  __INSTANCE__ IWDG Instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in IWDG register
-  * @param  __INSTANCE__ IWDG Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions
-  * @{
-  */
-/** @defgroup IWDG_LL_EF_Configuration Configuration
-  * @{
-  */
-
-/**
-  * @brief  Start the Independent Watchdog
-  * @note   Except if the hardware watchdog option is selected
-  * @rmtoll KR           KEY           LL_IWDG_Enable
-  * @param  IWDGx IWDG Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
-{
-  WRITE_REG(IWDG->KR, LL_IWDG_KEY_ENABLE);
-}
-
-/**
-  * @brief  Reloads IWDG counter with value defined in the reload register
-  * @rmtoll KR           KEY           LL_IWDG_ReloadCounter
-  * @param  IWDGx IWDG Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
-{
-  WRITE_REG(IWDG->KR, LL_IWDG_KEY_RELOAD);
-}
-
-/**
-  * @brief  Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
-  * @rmtoll KR           KEY           LL_IWDG_EnableWriteAccess
-  * @param  IWDGx IWDG Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
-{
-  WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
-}
-
-/**
-  * @brief  Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
-  * @rmtoll KR           KEY           LL_IWDG_DisableWriteAccess
-  * @param  IWDGx IWDG Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
-{
-  WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
-}
-
-/**
-  * @brief  Select the prescaler of the IWDG
-  * @rmtoll PR           PR            LL_IWDG_SetPrescaler
-  * @param  IWDGx IWDG Instance
-  * @param  Prescaler This parameter can be one of the following values:
-  *         @arg @ref LL_IWDG_PRESCALER_4
-  *         @arg @ref LL_IWDG_PRESCALER_8
-  *         @arg @ref LL_IWDG_PRESCALER_16
-  *         @arg @ref LL_IWDG_PRESCALER_32
-  *         @arg @ref LL_IWDG_PRESCALER_64
-  *         @arg @ref LL_IWDG_PRESCALER_128
-  *         @arg @ref LL_IWDG_PRESCALER_256
-  * @retval None
-  */
-__STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler)
-{
-  WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler);
-}
-
-/**
-  * @brief  Get the selected prescaler of the IWDG
-  * @rmtoll PR           PR            LL_IWDG_GetPrescaler
-  * @param  IWDGx IWDG Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_IWDG_PRESCALER_4
-  *         @arg @ref LL_IWDG_PRESCALER_8
-  *         @arg @ref LL_IWDG_PRESCALER_16
-  *         @arg @ref LL_IWDG_PRESCALER_32
-  *         @arg @ref LL_IWDG_PRESCALER_64
-  *         @arg @ref LL_IWDG_PRESCALER_128
-  *         @arg @ref LL_IWDG_PRESCALER_256
-  */
-__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx)
-{
-  return (uint32_t)(READ_REG(IWDGx->PR));
-}
-
-/**
-  * @brief  Specify the IWDG down-counter reload value
-  * @rmtoll RLR          RL            LL_IWDG_SetReloadCounter
-  * @param  IWDGx IWDG Instance
-  * @param  Counter Value between Min_Data=0 and Max_Data=0x0FFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter)
-{
-  WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter);
-}
-
-/**
-  * @brief  Get the specified IWDG down-counter reload value
-  * @rmtoll RLR          RL            LL_IWDG_GetReloadCounter
-  * @param  IWDGx IWDG Instance
-  * @retval Value between Min_Data=0 and Max_Data=0x0FFF
-  */
-__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx)
-{
-  return (uint32_t)(READ_REG(IWDGx->RLR));
-}
-
-/**
-  * @brief  Specify high limit of the window value to be compared to the down-counter.
-  * @rmtoll WINR         WIN           LL_IWDG_SetWindow
-  * @param  IWDGx IWDG Instance
-  * @param  Window Value between Min_Data=0 and Max_Data=0x0FFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window)
-{
-  WRITE_REG(IWDGx->WINR, IWDG_WINR_WIN & Window);
-}
-
-/**
-  * @brief  Get the high limit of the window value specified.
-  * @rmtoll WINR         WIN           LL_IWDG_GetWindow
-  * @param  IWDGx IWDG Instance
-  * @retval Value between Min_Data=0 and Max_Data=0x0FFF
-  */
-__STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx)
-{
-  return (uint32_t)(READ_REG(IWDGx->WINR));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management
-  * @{
-  */
-
-/**
-  * @brief  Check if flag Prescaler Value Update is set or not
-  * @rmtoll SR           PVU           LL_IWDG_IsActiveFlag_PVU
-  * @param  IWDGx IWDG Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
-{
-  return (READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU));
-}
-
-/**
-  * @brief  Check if flag Reload Value Update is set or not
-  * @rmtoll SR           RVU           LL_IWDG_IsActiveFlag_RVU
-  * @param  IWDGx IWDG Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
-{
-  return (READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU));
-}
-
-/**
-  * @brief  Check if flag Window Value Update is set or not
-  * @rmtoll SR           WVU           LL_IWDG_IsActiveFlag_WVU
-  * @param  IWDGx IWDG Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx)
-{
-  return (READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU));
-}
-
-/**
-  * @brief  Check if all flags Prescaler, Reload & Window Value Update are reset or not
-  * @rmtoll SR           PVU           LL_IWDG_IsReady\n
-  *         SR           WVU           LL_IWDG_IsReady\n
-  *         SR           RVU           LL_IWDG_IsReady
-  * @param  IWDGx IWDG Instance
-  * @retval State of bits (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
-{
-  return (READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U);
-}
-
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* IWDG) */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_IWDG_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lptim.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lptim.h
deleted file mode 100755
index 9e9eca32..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lptim.h
+++ /dev/null
@@ -1,1380 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_lptim.h
-  * @author  MCD Application Team
-  * @brief   Header file of LPTIM LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_LPTIM_H
-#define __STM32L0xx_LL_LPTIM_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-#if defined (LPTIM1) 
-	
-/** @defgroup LPTIM_LL LPTIM
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-
-/* Private macros ------------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
-  * @{
-  */
-/**
-  * @}
-  */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
-  * @{
-  */
-
-/**
-  * @brief  LPTIM Init structure definition
-  */
-typedef struct
-{
-  uint32_t ClockSource;    /*!< Specifies the source of the clock used by the LPTIM instance.
-                                This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
-
-                                This feature can be modified afterwards using unitary function @ref LL_LPTIM_SetClockSource().*/
-
-  uint32_t Prescaler;      /*!< Specifies the prescaler division ratio.
-                                This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
-
-                                This feature can be modified afterwards using using unitary function @ref LL_LPTIM_SetPrescaler().*/
-
-  uint32_t Waveform;       /*!< Specifies the waveform shape.
-                                This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
-
-                                This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
-
-  uint32_t Polarity;       /*!< Specifies waveform polarity.
-                                This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
-
-                                This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
-} LL_LPTIM_InitTypeDef;
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
-  * @{
-  */
-
-/** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
-  * @brief    Flags defines which can be used with LL_LPTIM_ReadReg function
-  * @{
-  */
-#define LL_LPTIM_ISR_CMPM                     LPTIM_ISR_CMPM     /*!< Compare match */
-#define LL_LPTIM_ISR_ARRM                     LPTIM_ISR_ARRM     /*!< Autoreload match */
-#define LL_LPTIM_ISR_EXTTRIG                  LPTIM_ISR_EXTTRIG  /*!< External trigger edge event */
-#define LL_LPTIM_ISR_CMPOK                    LPTIM_ISR_CMPOK    /*!< Compare register update OK */
-#define LL_LPTIM_ISR_ARROK                    LPTIM_ISR_ARROK    /*!< Autoreload register update OK */
-#define LL_LPTIM_ISR_UP                       LPTIM_ISR_UP       /*!< Counter direction change down to up */
-#define LL_LPTIM_ISR_DOWN                     LPTIM_ISR_DOWN     /*!< Counter direction change up to down */
-/**
-  * @}
-  */
-
-/** @defgroup LPTIM_LL_EC_IT IT Defines
-  * @brief    IT defines which can be used with LL_LPTIM_ReadReg and  LL_LPTIM_WriteReg functions
-  * @{
-  */
-#define LL_LPTIM_IER_CMPMIE                   LPTIM_IER_CMPMIE       /*!< Compare match Interrupt Enable */
-#define LL_LPTIM_IER_ARRMIE                   LPTIM_IER_ARRMIE       /*!< Autoreload match Interrupt Enable */
-#define LL_LPTIM_IER_EXTTRIGIE                LPTIM_IER_EXTTRIGIE    /*!< External trigger valid edge Interrupt Enable */
-#define LL_LPTIM_IER_CMPOKIE                  LPTIM_IER_CMPOKIE      /*!< Compare register update OK Interrupt Enable */
-#define LL_LPTIM_IER_ARROKIE                  LPTIM_IER_ARROKIE      /*!< Autoreload register update OK Interrupt Enable */
-#define LL_LPTIM_IER_UPIE                     LPTIM_IER_UPIE         /*!< Direction change to UP Interrupt Enable */
-#define LL_LPTIM_IER_DOWNIE                   LPTIM_IER_DOWNIE       /*!< Direction change to down Interrupt Enable */
-/**
-  * @}
-  */
-
-/** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
-  * @{
-  */
-#define LL_LPTIM_OPERATING_MODE_CONTINUOUS    LPTIM_CR_CNTSTRT       /*!__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in LPTIM register
-  * @param  __INSTANCE__ LPTIM Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
-  * @{
-  */
-
-/** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
-  * @{
-  */
-
-/**
-  * @brief  Enable the LPTIM instance
-  * @note After setting the ENABLE bit, a delay of two counter clock is needed
-  *       before the LPTIM instance is actually enabled.
-  * @rmtoll CR           ENABLE        LL_LPTIM_Enable
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
-}
-
-/**
-  * @brief  Disable the LPTIM instance
-  * @rmtoll CR           ENABLE        LL_LPTIM_Disable
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
-{
-  CLEAR_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
-}
-
-/**
-  * @brief  Indicates whether the LPTIM instance is enabled.
-  * @rmtoll CR           ENABLE        LL_LPTIM_IsEnabled
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == (LPTIM_CR_ENABLE));
-}
-
-/**
-  * @brief  Starts the LPTIM counter in the desired mode.
-  * @note LPTIM instance must be enabled before starting the counter.
-  * @note It is possible to change on the fly from One Shot mode to
-  *       Continuous mode.
-  * @rmtoll CR           CNTSTRT       LL_LPTIM_StartCounter\n
-  *         CR           SNGSTRT       LL_LPTIM_StartCounter
-  * @param  LPTIMx Low-Power Timer instance
-  * @param  OperatingMode This parameter can be one of the following values:
-  *         @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
-  *         @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
-{
-  MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
-}
-
-/**
-  * @brief  Set the LPTIM registers update mode (enable/disable register preload)
-  * @note This function must be called when the LPTIM instance is disabled.
-  * @rmtoll CFGR         PRELOAD       LL_LPTIM_SetUpdateMode
-  * @param  LPTIMx Low-Power Timer instance
-  * @param  UpdateMode This parameter can be one of the following values:
-  *         @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
-  *         @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
-{
-  MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
-}
-
-/**
-  * @brief  Get the LPTIM registers update mode
-  * @rmtoll CFGR         PRELOAD       LL_LPTIM_GetUpdateMode
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
-  *         @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(LPTIM_TypeDef *LPTIMx)
-{
-  return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
-}
-
-/**
-  * @brief  Set the auto reload value
-  * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
-  * @note After a write to the LPTIMx_ARR register a new write operation to the
-  *       same register can only be performed when the previous write operation
-  *       is completed. Any successive write before  the ARROK flag be set, will
-  *       lead to unpredictable results.
-  * @note autoreload value be strictly greater than the compare value.
-  * @rmtoll ARR          ARR           LL_LPTIM_SetAutoReload
-  * @param  LPTIMx Low-Power Timer instance
-  * @param  AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
-{
-  MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
-}
-
-/**
-  * @brief  Get actual auto reload value
-  * @rmtoll ARR          ARR           LL_LPTIM_GetAutoReload
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(LPTIM_TypeDef *LPTIMx)
-{
-  return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
-}
-
-/**
-  * @brief  Set the compare value
-  * @note After a write to the LPTIMx_CMP register a new write operation to the
-  *       same register can only be performed when the previous write operation
-  *       is completed. Any successive write before the CMPOK flag be set, will
-  *       lead to unpredictable results.
-  * @rmtoll CMP          CMP           LL_LPTIM_SetCompare
-  * @param  LPTIMx Low-Power Timer instance
-  * @param  CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
-{
-  MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
-}
-
-/**
-  * @brief  Get actual compare value
-  * @rmtoll CMP          CMP           LL_LPTIM_GetCompare
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_GetCompare(LPTIM_TypeDef *LPTIMx)
-{
-  return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
-}
-
-/**
-  * @brief  Get actual counter value
-  * @note When the LPTIM instance is running with an asynchronous clock, reading
-  *       the LPTIMx_CNT register may return unreliable values. So in this case
-  *       it is necessary to perform two consecutive read accesses and verify
-  *       that the two returned values are identical.
-  * @rmtoll CNT          CNT           LL_LPTIM_GetCounter
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval Counter value
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_GetCounter(LPTIM_TypeDef *LPTIMx)
-{
-  return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
-}
-
-/**
-  * @brief  Set the counter mode (selection of the LPTIM counter clock source).
-  * @note The counter mode can be set only when the LPTIM instance is disabled.
-  * @rmtoll CFGR         COUNTMODE     LL_LPTIM_SetCounterMode
-  * @param  LPTIMx Low-Power Timer instance
-  * @param  CounterMode This parameter can be one of the following values:
-  *         @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
-  *         @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
-{
-  MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
-}
-
-/**
-  * @brief  Get the counter mode
-  * @rmtoll CFGR         COUNTMODE     LL_LPTIM_GetCounterMode
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
-  *         @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(LPTIM_TypeDef *LPTIMx)
-{
-  return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
-}
-
-/**
-  * @brief  Configure the LPTIM instance output (LPTIMx_OUT)
-  * @note This function must be called when the LPTIM instance is disabled.
-  * @note Regarding the LPTIM output polarity the change takes effect
-  *       immediately, so the output default value will change immediately after
-  *       the polarity is re-configured, even before the timer is enabled.
-  * @rmtoll CFGR         WAVE          LL_LPTIM_ConfigOutput\n
-  *         CFGR         WAVPOL        LL_LPTIM_ConfigOutput
-  * @param  LPTIMx Low-Power Timer instance
-  * @param  Waveform This parameter can be one of the following values:
-  *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
-  *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
-  * @param  Polarity This parameter can be one of the following values:
-  *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
-  *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
-{
-  MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
-}
-
-/**
-  * @brief  Set  waveform shape
-  * @rmtoll CFGR         WAVE          LL_LPTIM_SetWaveform
-  * @param  LPTIMx Low-Power Timer instance
-  * @param  Waveform This parameter can be one of the following values:
-  *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
-  *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
-{
-  MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
-}
-
-/**
-  * @brief  Get actual waveform shape
-  * @rmtoll CFGR         WAVE          LL_LPTIM_GetWaveform
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
-  *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(LPTIM_TypeDef *LPTIMx)
-{
-  return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
-}
-
-/**
-  * @brief  Set  output polarity
-  * @rmtoll CFGR         WAVPOL        LL_LPTIM_SetPolarity
-  * @param  LPTIMx Low-Power Timer instance
-  * @param  Polarity This parameter can be one of the following values:
-  *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
-  *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
-{
-  MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
-}
-
-/**
-  * @brief  Get actual output polarity
-  * @rmtoll CFGR         WAVPOL        LL_LPTIM_GetPolarity
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
-  *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(LPTIM_TypeDef *LPTIMx)
-{
-  return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
-}
-
-/**
-  * @brief  Set actual prescaler division ratio.
-  * @note This function must be called when the LPTIM instance is disabled.
-  * @note When the LPTIM is configured to be clocked by an internal clock source
-  *       and the LPTIM counter is configured to be updated by active edges
-  *       detected on the LPTIM external Input1, the internal clock provided to
-  *       the LPTIM must be not be prescaled.
-  * @rmtoll CFGR         PRESC         LL_LPTIM_SetPrescaler
-  * @param  LPTIMx Low-Power Timer instance
-  * @param  Prescaler This parameter can be one of the following values:
-  *         @arg @ref LL_LPTIM_PRESCALER_DIV1
-  *         @arg @ref LL_LPTIM_PRESCALER_DIV2
-  *         @arg @ref LL_LPTIM_PRESCALER_DIV4
-  *         @arg @ref LL_LPTIM_PRESCALER_DIV8
-  *         @arg @ref LL_LPTIM_PRESCALER_DIV16
-  *         @arg @ref LL_LPTIM_PRESCALER_DIV32
-  *         @arg @ref LL_LPTIM_PRESCALER_DIV64
-  *         @arg @ref LL_LPTIM_PRESCALER_DIV128
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
-{
-  MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
-}
-
-/**
-  * @brief  Get actual prescaler division ratio.
-  * @rmtoll CFGR         PRESC         LL_LPTIM_GetPrescaler
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPTIM_PRESCALER_DIV1
-  *         @arg @ref LL_LPTIM_PRESCALER_DIV2
-  *         @arg @ref LL_LPTIM_PRESCALER_DIV4
-  *         @arg @ref LL_LPTIM_PRESCALER_DIV8
-  *         @arg @ref LL_LPTIM_PRESCALER_DIV16
-  *         @arg @ref LL_LPTIM_PRESCALER_DIV32
-  *         @arg @ref LL_LPTIM_PRESCALER_DIV64
-  *         @arg @ref LL_LPTIM_PRESCALER_DIV128
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(LPTIM_TypeDef *LPTIMx)
-{
-  return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
-}
-
-
-/**
-  * @}
-  */
-
-/** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
-  * @{
-  */
-
-/**
-  * @brief  Enable the timeout function
-  * @note This function must be called when the LPTIM instance is disabled.
-  * @note The first trigger event will start the timer, any successive trigger
-  *       event will reset the counter and the timer will restart.
-  * @note The timeout value corresponds to the compare value; if no trigger
-  *       occurs within the expected time frame, the MCU is waked-up by the
-  *       compare match event.
-  * @rmtoll CFGR         TIMOUT        LL_LPTIM_EnableTimeout
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
-}
-
-/**
-  * @brief  Disable the timeout function
-  * @note This function must be called when the LPTIM instance is disabled.
-  * @note A trigger event arriving when the timer is already started will be
-  *       ignored.
-  * @rmtoll CFGR         TIMOUT        LL_LPTIM_DisableTimeout
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
-{
-  CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
-}
-
-/**
-  * @brief  Indicate whether the timeout function is enabled.
-  * @rmtoll CFGR         TIMOUT        LL_LPTIM_IsEnabledTimeout
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == (LPTIM_CFGR_TIMOUT));
-}
-
-/**
-  * @brief  Start the LPTIM counter
-  * @note This function must be called when the LPTIM instance is disabled.
-  * @rmtoll CFGR         TRIGEN        LL_LPTIM_TrigSw
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
-{
-  CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
-}
-
-/**
-  * @brief  Configure the external trigger used as a trigger event for the LPTIM.
-  * @note This function must be called when the LPTIM instance is disabled.
-  * @note An internal clock source must be present when a digital filter is
-  *       required for the trigger.
-  * @rmtoll CFGR         TRIGSEL       LL_LPTIM_ConfigTrigger\n
-  *         CFGR         TRGFLT        LL_LPTIM_ConfigTrigger\n
-  *         CFGR         TRIGEN        LL_LPTIM_ConfigTrigger
-  * @param  LPTIMx Low-Power Timer instance
-  * @param  Source This parameter can be one of the following values:
-  *         @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
-  *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
-  *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
-  *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
-  *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
-  *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
-  *         @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
-  *         @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
-  * @param  Filter This parameter can be one of the following values:
-  *         @arg @ref LL_LPTIM_TRIG_FILTER_NONE
-  *         @arg @ref LL_LPTIM_TRIG_FILTER_2
-  *         @arg @ref LL_LPTIM_TRIG_FILTER_4
-  *         @arg @ref LL_LPTIM_TRIG_FILTER_8
-  * @param  Polarity This parameter can be one of the following values:
-  *         @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
-  *         @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
-  *         @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
-{
-  MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
-}
-
-/**
-  * @brief  Get actual external trigger source.
-  * @rmtoll CFGR         TRIGSEL       LL_LPTIM_GetTriggerSource
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
-  *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
-  *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
-  *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
-  *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
-  *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
-  *         @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
-  *         @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(LPTIM_TypeDef *LPTIMx)
-{
-  return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
-}
-
-/**
-  * @brief  Get actual external trigger filter.
-  * @rmtoll CFGR         TRGFLT        LL_LPTIM_GetTriggerFilter
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPTIM_TRIG_FILTER_NONE
-  *         @arg @ref LL_LPTIM_TRIG_FILTER_2
-  *         @arg @ref LL_LPTIM_TRIG_FILTER_4
-  *         @arg @ref LL_LPTIM_TRIG_FILTER_8
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(LPTIM_TypeDef *LPTIMx)
-{
-  return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
-}
-
-/**
-  * @brief  Get actual external trigger polarity.
-  * @rmtoll CFGR         TRIGEN        LL_LPTIM_GetTriggerPolarity
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
-  *         @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
-  *         @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(LPTIM_TypeDef *LPTIMx)
-{
-  return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
-  * @{
-  */
-
-/**
-  * @brief  Set the source of the clock used by the LPTIM instance.
-  * @note This function must be called when the LPTIM instance is disabled.
-  * @rmtoll CFGR         CKSEL         LL_LPTIM_SetClockSource
-  * @param  LPTIMx Low-Power Timer instance
-  * @param  ClockSource This parameter can be one of the following values:
-  *         @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
-  *         @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
-{
-  MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
-}
-
-/**
-  * @brief  Get actual LPTIM instance clock source.
-  * @rmtoll CFGR         CKSEL         LL_LPTIM_GetClockSource
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
-  *         @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(LPTIM_TypeDef *LPTIMx)
-{
-  return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
-}
-
-/**
-  * @brief  Configure the active edge or edges used by the counter when the LPTIM is clocked by an external clock source.
-  * @note This function must be called when the LPTIM instance is disabled.
-  * @note When both external clock signal edges are considered active ones,
-  *       the LPTIM must also be clocked by an internal clock source with a
-  *       frequency equal to at least four times the external clock frequency.
-  * @note An internal clock source must be present when a digital filter is
-  *       required for external clock.
-  * @rmtoll CFGR         CKFLT         LL_LPTIM_ConfigClock\n
-  *         CFGR         CKPOL         LL_LPTIM_ConfigClock
-  * @param  LPTIMx Low-Power Timer instance
-  * @param  ClockFilter This parameter can be one of the following values:
-  *         @arg @ref LL_LPTIM_CLK_FILTER_NONE
-  *         @arg @ref LL_LPTIM_CLK_FILTER_2
-  *         @arg @ref LL_LPTIM_CLK_FILTER_4
-  *         @arg @ref LL_LPTIM_CLK_FILTER_8
-  * @param  ClockPolarity This parameter can be one of the following values:
-  *         @arg @ref LL_LPTIM_CLK_POLARITY_RISING
-  *         @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
-  *         @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
-{
-  MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
-}
-
-/**
-  * @brief  Get actual clock polarity
-  * @rmtoll CFGR         CKPOL         LL_LPTIM_GetClockPolarity
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPTIM_CLK_POLARITY_RISING
-  *         @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
-  *         @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(LPTIM_TypeDef *LPTIMx)
-{
-  return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
-}
-
-/**
-  * @brief  Get actual clock digital filter
-  * @rmtoll CFGR         CKFLT         LL_LPTIM_GetClockFilter
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPTIM_CLK_FILTER_NONE
-  *         @arg @ref LL_LPTIM_CLK_FILTER_2
-  *         @arg @ref LL_LPTIM_CLK_FILTER_4
-  *         @arg @ref LL_LPTIM_CLK_FILTER_8
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(LPTIM_TypeDef *LPTIMx)
-{
-  return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
-  * @{
-  */
-
-/**
-  * @brief  Configure the encoder mode.
-  * @note This function must be called when the LPTIM instance is disabled.
-  * @rmtoll CFGR         CKPOL         LL_LPTIM_SetEncoderMode
-  * @param  LPTIMx Low-Power Timer instance
-  * @param  EncoderMode This parameter can be one of the following values:
-  *         @arg @ref LL_LPTIM_ENCODER_MODE_RISING
-  *         @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
-  *         @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
-{
-  MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
-}
-
-/**
-  * @brief  Get actual encoder mode.
-  * @rmtoll CFGR         CKPOL         LL_LPTIM_GetEncoderMode
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPTIM_ENCODER_MODE_RISING
-  *         @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
-  *         @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(LPTIM_TypeDef *LPTIMx)
-{
-  return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
-}
-
-/**
-  * @brief  Enable the encoder mode
-  * @note This function must be called when the LPTIM instance is disabled.
-  * @note In this mode the LPTIM instance must be clocked by an internal clock
-  *       source. Also, the prescaler division ratio must be equal to 1.
-  * @note LPTIM instance must be configured in continuous mode prior enabling
-  *       the encoder mode.
-  * @rmtoll CFGR         ENC           LL_LPTIM_EnableEncoderMode
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
-}
-
-/**
-  * @brief  Disable the encoder mode
-  * @note This function must be called when the LPTIM instance is disabled.
-  * @rmtoll CFGR         ENC           LL_LPTIM_DisableEncoderMode
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
-{
-  CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
-}
-
-/**
-  * @brief  Indicates whether the LPTIM operates in encoder mode.
-  * @rmtoll CFGR         ENC           LL_LPTIM_IsEnabledEncoderMode
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == (LPTIM_CFGR_ENC));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
-  * @{
-  */
-
-/**
-  * @brief  Clear the compare match flag (CMPMCF)
-  * @rmtoll ICR          CMPMCF        LL_LPTIM_ClearFLAG_CMPM
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
-}
-
-/**
-  * @brief  Inform application whether a compare match interrupt has occurred.
-  * @rmtoll ISR          CMPM          LL_LPTIM_IsActiveFlag_CMPM
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == (LPTIM_ISR_CMPM));
-}
-
-/**
-  * @brief  Clear the autoreload match flag (ARRMCF)
-  * @rmtoll ICR          ARRMCF        LL_LPTIM_ClearFLAG_ARRM
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
-}
-
-/**
-  * @brief  Inform application whether a autoreload match interrupt has occured.
-  * @rmtoll ISR          ARRM          LL_LPTIM_IsActiveFlag_ARRM
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == (LPTIM_ISR_ARRM));
-}
-
-/**
-  * @brief  Clear the external trigger valid edge flag(EXTTRIGCF).
-  * @rmtoll ICR          EXTTRIGCF     LL_LPTIM_ClearFlag_EXTTRIG
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
-}
-
-/**
-  * @brief  Inform application whether a valid edge on the selected external trigger input has occurred.
-  * @rmtoll ISR          EXTTRIG       LL_LPTIM_IsActiveFlag_EXTTRIG
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == (LPTIM_ISR_EXTTRIG));
-}
-
-/**
-  * @brief  Clear the compare register update interrupt flag (CMPOKCF).
-  * @rmtoll ICR          CMPOKCF       LL_LPTIM_ClearFlag_CMPOK
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
-}
-
-/**
-  * @brief  Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully completed; If so, a new one can be initiated.
-  * @rmtoll ISR          CMPOK         LL_LPTIM_IsActiveFlag_CMPOK
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == (LPTIM_ISR_CMPOK));
-}
-
-/**
-  * @brief  Clear the autoreload register update interrupt flag (ARROKCF).
-  * @rmtoll ICR          ARROKCF       LL_LPTIM_ClearFlag_ARROK
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
-}
-
-/**
-  * @brief  Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully completed; If so, a new one can be initiated.
-  * @rmtoll ISR          ARROK         LL_LPTIM_IsActiveFlag_ARROK
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == (LPTIM_ISR_ARROK));
-}
-
-/**
-  * @brief  Clear the counter direction change to up interrupt flag (UPCF).
-  * @rmtoll ICR          UPCF          LL_LPTIM_ClearFlag_UP
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
-}
-
-/**
-  * @brief  Informs the application whether the counter direction has changed from down to up (when the LPTIM instance operates in encoder mode).
-  * @rmtoll ISR          UP            LL_LPTIM_IsActiveFlag_UP
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == (LPTIM_ISR_UP));
-}
-
-/**
-  * @brief  Clear the counter direction change to down interrupt flag (DOWNCF).
-  * @rmtoll ICR          DOWNCF        LL_LPTIM_ClearFlag_DOWN
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
-}
-
-/**
-  * @brief  Informs the application whether the counter direction has changed from up to down (when the LPTIM instance operates in encoder mode).
-  * @rmtoll ISR          DOWN          LL_LPTIM_IsActiveFlag_DOWN
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == (LPTIM_ISR_DOWN));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
-  * @{
-  */
-
-/**
-  * @brief  Enable compare match interrupt (CMPMIE).
-  * @rmtoll IER          CMPMIE        LL_LPTIM_EnableIT_CMPM
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
-}
-
-/**
-  * @brief  Disable compare match interrupt (CMPMIE).
-  * @rmtoll IER          CMPMIE        LL_LPTIM_DisableIT_CMPM
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
-{
-  CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
-}
-
-/**
-  * @brief  Indicates whether the compare match interrupt (CMPMIE) is enabled.
-  * @rmtoll IER          CMPMIE        LL_LPTIM_IsEnabledIT_CMPM
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == (LPTIM_IER_CMPMIE));
-}
-
-/**
-  * @brief  Enable autoreload match interrupt (ARRMIE).
-  * @rmtoll IER          ARRMIE        LL_LPTIM_EnableIT_ARRM
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
-}
-
-/**
-  * @brief  Disable autoreload match interrupt (ARRMIE).
-  * @rmtoll IER          ARRMIE        LL_LPTIM_DisableIT_ARRM
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
-{
-  CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
-}
-
-/**
-  * @brief  Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
-  * @rmtoll IER          ARRMIE        LL_LPTIM_IsEnabledIT_ARRM
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == (LPTIM_IER_ARRMIE));
-}
-
-/**
-  * @brief  Enable external trigger valid edge interrupt (EXTTRIGIE).
-  * @rmtoll IER          EXTTRIGIE     LL_LPTIM_EnableIT_EXTTRIG
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
-}
-
-/**
-  * @brief  Disable external trigger valid edge interrupt (EXTTRIGIE).
-  * @rmtoll IER          EXTTRIGIE     LL_LPTIM_DisableIT_EXTTRIG
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
-{
-  CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
-}
-
-/**
-  * @brief  Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
-  * @rmtoll IER          EXTTRIGIE     LL_LPTIM_IsEnabledIT_EXTTRIG
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == (LPTIM_IER_EXTTRIGIE));
-}
-
-/**
-  * @brief  Enable compare register write completed interrupt (CMPOKIE).
-  * @rmtoll IER          CMPOKIE       LL_LPTIM_EnableIT_CMPOK
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
-}
-
-/**
-  * @brief  Disable compare register write completed interrupt (CMPOKIE).
-  * @rmtoll IER          CMPOKIE       LL_LPTIM_DisableIT_CMPOK
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
-{
-  CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
-}
-
-/**
-  * @brief  Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
-  * @rmtoll IER          CMPOKIE       LL_LPTIM_IsEnabledIT_CMPOK
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == (LPTIM_IER_CMPOKIE));
-}
-
-/**
-  * @brief  Enable autoreload register write completed interrupt (ARROKIE).
-  * @rmtoll IER          ARROKIE       LL_LPTIM_EnableIT_ARROK
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
-}
-
-/**
-  * @brief  Disable autoreload register write completed interrupt (ARROKIE).
-  * @rmtoll IER          ARROKIE       LL_LPTIM_DisableIT_ARROK
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
-{
-  CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
-}
-
-/**
-  * @brief  Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
-  * @rmtoll IER          ARROKIE       LL_LPTIM_IsEnabledIT_ARROK
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == (LPTIM_IER_ARROKIE));
-}
-
-/**
-  * @brief  Enable direction change to up interrupt (UPIE).
-  * @rmtoll IER          UPIE          LL_LPTIM_EnableIT_UP
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
-}
-
-/**
-  * @brief  Disable direction change to up interrupt (UPIE).
-  * @rmtoll IER          UPIE          LL_LPTIM_DisableIT_UP
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
-{
-  CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
-}
-
-/**
-  * @brief  Indicates whether the direction change to up interrupt (UPIE) is enabled.
-  * @rmtoll IER          UPIE          LL_LPTIM_IsEnabledIT_UP
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == (LPTIM_IER_UPIE));
-}
-
-/**
-  * @brief  Enable direction change to down interrupt (DOWNIE).
-  * @rmtoll IER          DOWNIE        LL_LPTIM_EnableIT_DOWN
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
-{
-  SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
-}
-
-/**
-  * @brief  Disable direction change to down interrupt (DOWNIE).
-  * @rmtoll IER          DOWNIE        LL_LPTIM_DisableIT_DOWN
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
-{
-  CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
-}
-
-/**
-  * @brief  Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
-  * @rmtoll IER          DOWNIE        LL_LPTIM_IsEnabledIT_DOWN
-  * @param  LPTIMx Low-Power Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(LPTIM_TypeDef *LPTIMx)
-{
-  return (READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == (LPTIM_IER_DOWNIE));
-}
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
-  * @{
-  */
-
-ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
-void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
-ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* LPTIM1 */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_LPTIM_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h
deleted file mode 100755
index d9306edf..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h
+++ /dev/null
@@ -1,2153 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_lpuart.h
-  * @author  MCD Application Team
-  * @brief   Header file of LPUART LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_LPUART_H
-#define __STM32L0xx_LL_LPUART_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (LPUART1)
-
-/** @defgroup LPUART_LL LPUART
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup LPUART_LL_Private_Constants LPUART Private Constants
-  * @{
-  */
-
-/* Defines used for the bit position in the register and perform offsets*/
-#define LPUART_POSITION_CR1_DEDT      (uint32_t)16U
-#define LPUART_POSITION_CR1_DEAT      (uint32_t)21U
-#define LPUART_POSITION_CR2_ADD       (uint32_t)24U
-
-/* Defines used in Baud Rate related macros and corresponding register setting computation */
-#define LPUART_LPUARTDIV_FREQ_MUL     (uint32_t)(256U)
-#define LPUART_BRR_MASK               (uint32_t)(0x000FFFFFU)
-#define LPUART_BRR_MIN_VALUE          (uint32_t)(0x00000300U)
-/**
-  * @}
-  */
-
-
-/* Private macros ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup LPUART_LL_Private_Macros LPUART Private Macros
-  * @{
-  */
-/**
-  * @}
-  */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup LPUART_LL_ES_INIT LPUART Exported Init structures
-  * @{
-  */
-
-/**
-  * @brief LL LPUART Init Structure definition
-  */
-typedef struct
-{
-  uint32_t BaudRate;                  /*!< This field defines expected LPUART communication baud rate.
-
-                                           This feature can be modified afterwards using unitary function @ref LL_LPUART_SetBaudRate().*/
-
-  uint32_t DataWidth;                 /*!< Specifies the number of data bits transmitted or received in a frame.
-                                           This parameter can be a value of @ref LPUART_LL_EC_DATAWIDTH.
-
-                                           This feature can be modified afterwards using unitary function @ref LL_LPUART_SetDataWidth().*/
-
-  uint32_t StopBits;                  /*!< Specifies the number of stop bits transmitted.
-                                           This parameter can be a value of @ref LPUART_LL_EC_STOPBITS.
-
-                                           This feature can be modified afterwards using unitary function @ref LL_LPUART_SetStopBitsLength().*/
-
-  uint32_t Parity;                    /*!< Specifies the parity mode.
-                                           This parameter can be a value of @ref LPUART_LL_EC_PARITY.
-
-                                           This feature can be modified afterwards using unitary function @ref LL_LPUART_SetParity().*/
-
-  uint32_t TransferDirection;         /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
-                                           This parameter can be a value of @ref LPUART_LL_EC_DIRECTION.
-
-                                           This feature can be modified afterwards using unitary function @ref LL_LPUART_SetTransferDirection().*/
-
-  uint32_t HardwareFlowControl;       /*!< Specifies whether the hardware flow control mode is enabled or disabled.
-                                           This parameter can be a value of @ref LPUART_LL_EC_HWCONTROL.
-
-                                           This feature can be modified afterwards using unitary function @ref LL_LPUART_SetHWFlowCtrl().*/
-
-} LL_LPUART_InitTypeDef;
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup LPUART_LL_Exported_Constants LPUART Exported Constants
-  * @{
-  */
-
-/** @defgroup LPUART_LL_EC_CLEAR_FLAG Clear Flags Defines
-  * @brief    Flags defines which can be used with LL_LPUART_WriteReg function
-  * @{
-  */
-#define LL_LPUART_ICR_PECF                 USART_ICR_PECF                /*!< Parity error flag */
-#define LL_LPUART_ICR_FECF                 USART_ICR_FECF                /*!< Framing error flag */
-#define LL_LPUART_ICR_NCF                  USART_ICR_NCF                 /*!< Noise detected flag */
-#define LL_LPUART_ICR_ORECF                USART_ICR_ORECF               /*!< Overrun error flag */
-#define LL_LPUART_ICR_IDLECF               USART_ICR_IDLECF              /*!< Idle line detected flag */
-#define LL_LPUART_ICR_TCCF                 USART_ICR_TCCF                /*!< Transmission complete flag */
-#define LL_LPUART_ICR_CTSCF                USART_ICR_CTSCF               /*!< CTS flag */
-#define LL_LPUART_ICR_CMCF                 USART_ICR_CMCF                /*!< Character match flag */
-#define LL_LPUART_ICR_WUCF                 USART_ICR_WUCF                /*!< Wakeup from Stop mode flag */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_GET_FLAG Get Flags Defines
-  * @brief    Flags defines which can be used with LL_LPUART_ReadReg function
-  * @{
-  */
-#define LL_LPUART_ISR_PE                   USART_ISR_PE                  /*!< Parity error flag */
-#define LL_LPUART_ISR_FE                   USART_ISR_FE                  /*!< Framing error flag */
-#define LL_LPUART_ISR_NE                   USART_ISR_NE                  /*!< Noise detected flag */
-#define LL_LPUART_ISR_ORE                  USART_ISR_ORE                 /*!< Overrun error flag */
-#define LL_LPUART_ISR_IDLE                 USART_ISR_IDLE                /*!< Idle line detected flag */
-#define LL_LPUART_ISR_RXNE                 USART_ISR_RXNE                /*!< Read data register not empty flag */
-#define LL_LPUART_ISR_TC                   USART_ISR_TC                  /*!< Transmission complete flag */
-#define LL_LPUART_ISR_TXE                  USART_ISR_TXE                 /*!< Transmit data register empty flag */
-#define LL_LPUART_ISR_CTSIF                USART_ISR_CTSIF               /*!< CTS interrupt flag */
-#define LL_LPUART_ISR_CTS                  USART_ISR_CTS                 /*!< CTS flag */
-#define LL_LPUART_ISR_BUSY                 USART_ISR_BUSY                /*!< Busy flag */
-#define LL_LPUART_ISR_CMF                  USART_ISR_CMF                 /*!< Character match flag */
-#define LL_LPUART_ISR_SBKF                 USART_ISR_SBKF                /*!< Send break flag */
-#define LL_LPUART_ISR_RWU                  USART_ISR_RWU                 /*!< Receiver wakeup from Mute mode flag */
-#define LL_LPUART_ISR_WUF                  USART_ISR_WUF                 /*!< Wakeup from Stop mode flag */
-#define LL_LPUART_ISR_TEACK                USART_ISR_TEACK               /*!< Transmit enable acknowledge flag */
-#define LL_LPUART_ISR_REACK                USART_ISR_REACK               /*!< Receive enable acknowledge flag */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_IT IT Defines
-  * @brief    IT defines which can be used with LL_LPUART_ReadReg and  LL_LPUART_WriteReg functions
-  * @{
-  */
-#define LL_LPUART_CR1_IDLEIE               USART_CR1_IDLEIE              /*!< IDLE interrupt enable */
-#define LL_LPUART_CR1_RXNEIE               USART_CR1_RXNEIE              /*!< Read data register not empty interrupt enable */
-#define LL_LPUART_CR1_TCIE                 USART_CR1_TCIE                /*!< Transmission complete interrupt enable */
-#define LL_LPUART_CR1_TXEIE                USART_CR1_TXEIE               /*!< Transmit data register empty interrupt enable */
-#define LL_LPUART_CR1_PEIE                 USART_CR1_PEIE                /*!< Parity error */
-#define LL_LPUART_CR1_CMIE                 USART_CR1_CMIE                /*!< Character match interrupt enable */
-#define LL_LPUART_CR3_EIE                  USART_CR3_EIE                 /*!< Error interrupt enable */
-#define LL_LPUART_CR3_CTSIE                USART_CR3_CTSIE               /*!< CTS interrupt enable */
-#define LL_LPUART_CR3_WUFIE                USART_CR3_WUFIE               /*!< Wakeup from Stop mode interrupt enable */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_DIRECTION Direction
-  * @{
-  */
-#define LL_LPUART_DIRECTION_NONE           (uint32_t)0x00000000U              /*!< Transmitter and Receiver are disabled */
-#define LL_LPUART_DIRECTION_RX             USART_CR1_RE                       /*!< Transmitter is disabled and Receiver is enabled */
-#define LL_LPUART_DIRECTION_TX             USART_CR1_TE                       /*!< Transmitter is enabled and Receiver is disabled */
-#define LL_LPUART_DIRECTION_TX_RX          (USART_CR1_TE |USART_CR1_RE)       /*!< Transmitter and Receiver are enabled */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_PARITY Parity Control
-  * @{
-  */
-#define LL_LPUART_PARITY_NONE              (uint32_t)0x00000000U              /*!< Parity control disabled */
-#define LL_LPUART_PARITY_EVEN              USART_CR1_PCE                      /*!< Parity control enabled and Even Parity is selected */
-#define LL_LPUART_PARITY_ODD               (USART_CR1_PCE | USART_CR1_PS)     /*!< Parity control enabled and Odd Parity is selected */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_WAKEUP Wakeup
-  * @{
-  */
-#define LL_LPUART_WAKEUP_IDLELINE          (uint32_t)0x00000000U              /*!<  LPUART wake up from Mute mode on Idle Line */
-#define LL_LPUART_WAKEUP_ADDRESSMARK       USART_CR1_WAKE                     /*!<  LPUART wake up from Mute mode on Address Mark */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_DATAWIDTH Datawidth
-  * @{
-  */
-#define LL_LPUART_DATAWIDTH_7B             USART_CR1_M1                       /*!< 7 bits word length : Start bit, 7 data bits, n stop bits */
-#define LL_LPUART_DATAWIDTH_8B             (uint32_t)0x00000000U              /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */
-#define LL_LPUART_DATAWIDTH_9B             USART_CR1_M0                       /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_STOPBITS Stop Bits
-  * @{
-  */
-#define LL_LPUART_STOPBITS_1               (uint32_t)0x00000000U              /*!< 1 stop bit */
-#define LL_LPUART_STOPBITS_2               USART_CR2_STOP_1                   /*!< 2 stop bits */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_TXRX TX RX Pins Swap
-  * @{
-  */
-#define LL_LPUART_TXRX_STANDARD            (uint32_t)0x00000000U              /*!< TX/RX pins are used as defined in standard pinout */
-#define LL_LPUART_TXRX_SWAPPED             (USART_CR2_SWAP)                   /*!< TX and RX pins functions are swapped.             */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_RXPIN_LEVEL RX Pin Active Level Inversion
-  * @{
-  */
-#define LL_LPUART_RXPIN_LEVEL_STANDARD     (uint32_t)0x00000000U              /*!< RX pin signal works using the standard logic levels */
-#define LL_LPUART_RXPIN_LEVEL_INVERTED     (USART_CR2_RXINV)                  /*!< RX pin signal values are inverted.                  */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion
-  * @{
-  */
-#define LL_LPUART_TXPIN_LEVEL_STANDARD     (uint32_t)0x00000000U              /*!< TX pin signal works using the standard logic levels */
-#define LL_LPUART_TXPIN_LEVEL_INVERTED     (USART_CR2_TXINV)                  /*!< TX pin signal values are inverted.                  */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_BINARY_LOGIC Binary Data Inversion
-  * @{
-  */
-#define LL_LPUART_BINARY_LOGIC_POSITIVE    (uint32_t)0x00000000U              /*!< Logical data from the data register are send/received in positive/direct logic. (1=H, 0=L) */
-#define LL_LPUART_BINARY_LOGIC_NEGATIVE    USART_CR2_DATAINV                  /*!< Logical data from the data register are send/received in negative/inverse logic. (1=L, 0=H). The parity bit is also inverted. */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_BITORDER Bit Order
-  * @{
-  */
-#define LL_LPUART_BITORDER_LSBFIRST        (uint32_t)0x00000000U              /*!< data is transmitted/received with data bit 0 first, following the start bit */
-#define LL_LPUART_BITORDER_MSBFIRST        USART_CR2_MSBFIRST                 /*!< data is transmitted/received with the MSB first, following the start bit */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_ADDRESS_DETECT Address Length Detection
-  * @{
-  */
-#define LL_LPUART_ADDRESS_DETECT_4B        (uint32_t)0x00000000U              /*!< 4-bit address detection method selected */
-#define LL_LPUART_ADDRESS_DETECT_7B        USART_CR2_ADDM7                    /*!< 7-bit address detection (in 8-bit data mode) method selected */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_HWCONTROL Hardware Control
-  * @{
-  */
-#define LL_LPUART_HWCONTROL_NONE           (uint32_t)0x00000000U              /*!< CTS and RTS hardware flow control disabled */
-#define LL_LPUART_HWCONTROL_RTS            USART_CR3_RTSE                     /*!< RTS output enabled, data is only requested when there is space in the receive buffer */
-#define LL_LPUART_HWCONTROL_CTS            USART_CR3_CTSE                     /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */
-#define LL_LPUART_HWCONTROL_RTS_CTS        (USART_CR3_RTSE | USART_CR3_CTSE)  /*!< CTS and RTS hardware flow control enabled */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_WAKEUP_ON Wakeup Activation
-  * @{
-  */
-#define LL_LPUART_WAKEUP_ON_ADDRESS        (uint32_t)0x00000000U                   /*!< Wake up active on address match */
-#define LL_LPUART_WAKEUP_ON_STARTBIT       USART_CR3_WUS_1                         /*!< Wake up active on Start bit detection */
-#define LL_LPUART_WAKEUP_ON_RXNE           (USART_CR3_WUS_0 | USART_CR3_WUS_1)     /*!< Wake up active on RXNE */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_DE_POLARITY Driver Enable Polarity
-  * @{
-  */
-#define LL_LPUART_DE_POLARITY_HIGH         (uint32_t)0x00000000U              /*!< DE signal is active high */
-#define LL_LPUART_DE_POLARITY_LOW          USART_CR3_DEP                      /*!< DE signal is active low */
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EC_DMA_REG_DATA DMA Register Data
-  * @{
-  */
-#define LL_LPUART_DMA_REG_DATA_TRANSMIT    (uint32_t)0U                       /*!< Get address of data register used for transmission */
-#define LL_LPUART_DMA_REG_DATA_RECEIVE     (uint32_t)1U                       /*!< Get address of data register used for reception */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup LPUART_LL_Exported_Macros LPUART Exported Macros
-  * @{
-  */
-
-/** @defgroup LPUART_LL_EM_WRITE_READ Common Write and read registers Macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in LPUART register
-  * @param  __INSTANCE__ LPUART Instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_LPUART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in LPUART register
-  * @param  __INSTANCE__ LPUART Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_LPUART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EM_Exported_Macros_Helper Helper Macros
-  * @{
-  */
-
-/**
-  * @brief  Compute LPUARTDIV value according to Peripheral Clock and
-  *         expected Baud Rate (20-bit value of LPUARTDIV is returned)
-  * @param  __PERIPHCLK__ Peripheral Clock frequency used for LPUART Instance
-  * @param  __BAUDRATE__ Baud Rate value to achieve
-  * @retval LPUARTDIV value to be used for BRR register filling
-  */
-#define __LL_LPUART_DIV(__PERIPHCLK__, __BAUDRATE__) (((((uint64_t)(__PERIPHCLK__)*LPUART_LPUARTDIV_FREQ_MUL) + ((__BAUDRATE__)/2))/(__BAUDRATE__)) & LPUART_BRR_MASK)
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup LPUART_LL_Exported_Functions LPUART Exported Functions
-  * @{
-  */
-
-/** @defgroup LPUART_LL_EF_Configuration Configuration functions
-  * @{
-  */
-
-/**
-  * @brief  LPUART Enable
-  * @rmtoll CR1          UE            LL_LPUART_Enable
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_Enable(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR1, USART_CR1_UE);
-}
-
-/**
-  * @brief  LPUART Disable
-  * @note   When LPUART is disabled, LPUART prescalers and outputs are stopped immediately,
-  *         and current operations are discarded. The configuration of the LPUART is kept, but all the status
-  *         flags, in the LPUARTx_ISR are set to their default values.
-  * @note   In order to go into low-power mode without generating errors on the line,
-  *         the TE bit must be reset before and the software must wait
-  *         for the TC bit in the LPUART_ISR to be set before resetting the UE bit.
-  *         The DMA requests are also reset when UE = 0 so the DMA channel must
-  *         be disabled before resetting the UE bit.
-  * @rmtoll CR1          UE            LL_LPUART_Disable
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_Disable(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR1, USART_CR1_UE);
-}
-
-/**
-  * @brief  Indicate if LPUART is enabled
-  * @rmtoll CR1          UE            LL_LPUART_IsEnabled
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabled(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
-}
-
-/**
-  * @brief  LPUART enabled in STOP Mode
-  * @note   When this function is enabled, LPUART is able to wake up the MCU from Stop mode, provided that
-  *         LPUART clock selection is HSI or LSE in RCC.
-  * @rmtoll CR1          UESM          LL_LPUART_EnableInStopMode
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR1, USART_CR1_UESM);
-}
-
-/**
-  * @brief  LPUART disabled in STOP Mode
-  * @note   When this function is disabled, LPUART is not able to wake up the MCU from Stop mode
-  * @rmtoll CR1          UESM          LL_LPUART_DisableInStopMode
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableInStopMode(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR1, USART_CR1_UESM);
-}
-
-/**
-  * @brief  Indicate if LPUART is enabled in STOP Mode
-  *         (able to wake up MCU from Stop mode or not)
-  * @rmtoll CR1          UESM          LL_LPUART_IsEnabledInStopMode
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledInStopMode(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM));
-}
-
-/**
-  * @brief  Receiver Enable (Receiver is enabled and begins searching for a start bit)
-  * @rmtoll CR1          RE            LL_LPUART_EnableDirectionRx
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR1, USART_CR1_RE);
-}
-
-/**
-  * @brief  Receiver Disable
-  * @rmtoll CR1          RE            LL_LPUART_DisableDirectionRx
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR1, USART_CR1_RE);
-}
-
-/**
-  * @brief  Transmitter Enable
-  * @rmtoll CR1          TE            LL_LPUART_EnableDirectionTx
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR1, USART_CR1_TE);
-}
-
-/**
-  * @brief  Transmitter Disable
-  * @rmtoll CR1          TE            LL_LPUART_DisableDirectionTx
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR1, USART_CR1_TE);
-}
-
-/**
-  * @brief  Configure simultaneously enabled/disabled states
-  *         of Transmitter and Receiver
-  * @rmtoll CR1          RE            LL_LPUART_SetTransferDirection\n
-  *         CR1          TE            LL_LPUART_SetTransferDirection
-  * @param  LPUARTx LPUART Instance
-  * @param  TransferDirection This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_DIRECTION_NONE
-  *         @arg @ref LL_LPUART_DIRECTION_RX
-  *         @arg @ref LL_LPUART_DIRECTION_TX
-  *         @arg @ref LL_LPUART_DIRECTION_TX_RX
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetTransferDirection(USART_TypeDef *LPUARTx, uint32_t TransferDirection)
-{
-  MODIFY_REG(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
-}
-
-/**
-  * @brief  Return enabled/disabled states of Transmitter and Receiver
-  * @rmtoll CR1          RE            LL_LPUART_GetTransferDirection\n
-  *         CR1          TE            LL_LPUART_GetTransferDirection
-  * @param  LPUARTx LPUART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPUART_DIRECTION_NONE
-  *         @arg @ref LL_LPUART_DIRECTION_RX
-  *         @arg @ref LL_LPUART_DIRECTION_TX
-  *         @arg @ref LL_LPUART_DIRECTION_TX_RX
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetTransferDirection(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE));
-}
-
-/**
-  * @brief  Configure Parity (enabled/disabled and parity mode if enabled)
-  * @note   This function selects if hardware parity control (generation and detection) is enabled or disabled.
-  *         When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
-  *         (depending on data width) and parity is checked on the received data.
-  * @rmtoll CR1          PS            LL_LPUART_SetParity\n
-  *         CR1          PCE           LL_LPUART_SetParity
-  * @param  LPUARTx LPUART Instance
-  * @param  Parity This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_PARITY_NONE
-  *         @arg @ref LL_LPUART_PARITY_EVEN
-  *         @arg @ref LL_LPUART_PARITY_ODD
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetParity(USART_TypeDef *LPUARTx, uint32_t Parity)
-{
-  MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
-}
-
-/**
-  * @brief  Return Parity configuration (enabled/disabled and parity mode if enabled)
-  * @rmtoll CR1          PS            LL_LPUART_GetParity\n
-  *         CR1          PCE           LL_LPUART_GetParity
-  * @param  LPUARTx LPUART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPUART_PARITY_NONE
-  *         @arg @ref LL_LPUART_PARITY_EVEN
-  *         @arg @ref LL_LPUART_PARITY_ODD
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetParity(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
-}
-
-/**
-  * @brief  Set Receiver Wake Up method from Mute mode.
-  * @rmtoll CR1          WAKE          LL_LPUART_SetWakeUpMethod
-  * @param  LPUARTx LPUART Instance
-  * @param  Method This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_WAKEUP_IDLELINE
-  *         @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetWakeUpMethod(USART_TypeDef *LPUARTx, uint32_t Method)
-{
-  MODIFY_REG(LPUARTx->CR1, USART_CR1_WAKE, Method);
-}
-
-/**
-  * @brief  Return Receiver Wake Up method from Mute mode
-  * @rmtoll CR1          WAKE          LL_LPUART_GetWakeUpMethod
-  * @param  LPUARTx LPUART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPUART_WAKEUP_IDLELINE
-  *         @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetWakeUpMethod(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_WAKE));
-}
-
-/**
-  * @brief  Set Word length (nb of data bits, excluding start and stop bits)
-  * @rmtoll CR1          M             LL_LPUART_SetDataWidth
-  * @param  LPUARTx LPUART Instance
-  * @param  DataWidth This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_DATAWIDTH_7B
-  *         @arg @ref LL_LPUART_DATAWIDTH_8B
-  *         @arg @ref LL_LPUART_DATAWIDTH_9B
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetDataWidth(USART_TypeDef *LPUARTx, uint32_t DataWidth)
-{
-  MODIFY_REG(LPUARTx->CR1, USART_CR1_M, DataWidth);
-}
-
-/**
-  * @brief  Return Word length (i.e. nb of data bits, excluding start and stop bits)
-  * @rmtoll CR1          M             LL_LPUART_GetDataWidth
-  * @param  LPUARTx LPUART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPUART_DATAWIDTH_7B
-  *         @arg @ref LL_LPUART_DATAWIDTH_8B
-  *         @arg @ref LL_LPUART_DATAWIDTH_9B
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetDataWidth(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_M));
-}
-
-/**
-  * @brief  Allow switch between Mute Mode and Active mode
-  * @rmtoll CR1          MME           LL_LPUART_EnableMuteMode
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR1, USART_CR1_MME);
-}
-
-/**
-  * @brief  Prevent Mute Mode use. Set Receiver in active mode permanently.
-  * @rmtoll CR1          MME           LL_LPUART_DisableMuteMode
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableMuteMode(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR1, USART_CR1_MME);
-}
-
-/**
-  * @brief  Indicate if switch between Mute Mode and Active mode is allowed
-  * @rmtoll CR1          MME           LL_LPUART_IsEnabledMuteMode
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledMuteMode(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR1, USART_CR1_MME) == (USART_CR1_MME));
-}
-
-/**
-  * @brief  Set the length of the stop bits
-  * @rmtoll CR2          STOP          LL_LPUART_SetStopBitsLength
-  * @param  LPUARTx LPUART Instance
-  * @param  StopBits This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_STOPBITS_1
-  *         @arg @ref LL_LPUART_STOPBITS_2
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetStopBitsLength(USART_TypeDef *LPUARTx, uint32_t StopBits)
-{
-  MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
-}
-
-/**
-  * @brief  Retrieve the length of the stop bits
-  * @rmtoll CR2          STOP          LL_LPUART_GetStopBitsLength
-  * @param  LPUARTx LPUART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPUART_STOPBITS_1
-  *         @arg @ref LL_LPUART_STOPBITS_2
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetStopBitsLength(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_STOP));
-}
-
-/**
-  * @brief  Configure Character frame format (Datawidth, Parity control, Stop Bits)
-  * @note   Call of this function is equivalent to following function call sequence :
-  *         - Data Width configuration using @ref LL_LPUART_SetDataWidth() function
-  *         - Parity Control and mode configuration using @ref LL_LPUART_SetParity() function
-  *         - Stop bits configuration using @ref LL_LPUART_SetStopBitsLength() function
-  * @rmtoll CR1          PS            LL_LPUART_ConfigCharacter\n
-  *         CR1          PCE           LL_LPUART_ConfigCharacter\n
-  *         CR1          M             LL_LPUART_ConfigCharacter\n
-  *         CR2          STOP          LL_LPUART_ConfigCharacter
-  * @param  LPUARTx LPUART Instance
-  * @param  DataWidth This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_DATAWIDTH_7B
-  *         @arg @ref LL_LPUART_DATAWIDTH_8B
-  *         @arg @ref LL_LPUART_DATAWIDTH_9B
-  * @param  Parity This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_PARITY_NONE
-  *         @arg @ref LL_LPUART_PARITY_EVEN
-  *         @arg @ref LL_LPUART_PARITY_ODD
-  * @param  StopBits This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_STOPBITS_1
-  *         @arg @ref LL_LPUART_STOPBITS_2
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_ConfigCharacter(USART_TypeDef *LPUARTx, uint32_t DataWidth, uint32_t Parity,
-                                               uint32_t StopBits)
-{
-  MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
-  MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
-}
-
-/**
-  * @brief  Configure TX/RX pins swapping setting.
-  * @rmtoll CR2          SWAP          LL_LPUART_SetTXRXSwap
-  * @param  LPUARTx LPUART Instance
-  * @param  SwapConfig This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_TXRX_STANDARD
-  *         @arg @ref LL_LPUART_TXRX_SWAPPED
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetTXRXSwap(USART_TypeDef *LPUARTx, uint32_t SwapConfig)
-{
-  MODIFY_REG(LPUARTx->CR2, USART_CR2_SWAP, SwapConfig);
-}
-
-/**
-  * @brief  Retrieve TX/RX pins swapping configuration.
-  * @rmtoll CR2          SWAP          LL_LPUART_GetTXRXSwap
-  * @param  LPUARTx LPUART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPUART_TXRX_STANDARD
-  *         @arg @ref LL_LPUART_TXRX_SWAPPED
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetTXRXSwap(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_SWAP));
-}
-
-/**
-  * @brief  Configure RX pin active level logic
-  * @rmtoll CR2          RXINV         LL_LPUART_SetRXPinLevel
-  * @param  LPUARTx LPUART Instance
-  * @param  PinInvMethod This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD
-  *         @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetRXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
-{
-  MODIFY_REG(LPUARTx->CR2, USART_CR2_RXINV, PinInvMethod);
-}
-
-/**
-  * @brief  Retrieve RX pin active level logic configuration
-  * @rmtoll CR2          RXINV         LL_LPUART_GetRXPinLevel
-  * @param  LPUARTx LPUART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD
-  *         @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetRXPinLevel(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_RXINV));
-}
-
-/**
-  * @brief  Configure TX pin active level logic
-  * @rmtoll CR2          TXINV         LL_LPUART_SetTXPinLevel
-  * @param  LPUARTx LPUART Instance
-  * @param  PinInvMethod This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD
-  *         @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetTXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
-{
-  MODIFY_REG(LPUARTx->CR2, USART_CR2_TXINV, PinInvMethod);
-}
-
-/**
-  * @brief  Retrieve TX pin active level logic configuration
-  * @rmtoll CR2          TXINV         LL_LPUART_GetTXPinLevel
-  * @param  LPUARTx LPUART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD
-  *         @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetTXPinLevel(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_TXINV));
-}
-
-/**
-  * @brief  Configure Binary data logic.
-  *
-  * @note   Allow to define how Logical data from the data register are send/received :
-  *         either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H)
-  * @rmtoll CR2          DATAINV       LL_LPUART_SetBinaryDataLogic
-  * @param  LPUARTx LPUART Instance
-  * @param  DataLogic This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE
-  *         @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetBinaryDataLogic(USART_TypeDef *LPUARTx, uint32_t DataLogic)
-{
-  MODIFY_REG(LPUARTx->CR2, USART_CR2_DATAINV, DataLogic);
-}
-
-/**
-  * @brief  Retrieve Binary data configuration
-  * @rmtoll CR2          DATAINV       LL_LPUART_GetBinaryDataLogic
-  * @param  LPUARTx LPUART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE
-  *         @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetBinaryDataLogic(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_DATAINV));
-}
-
-/**
-  * @brief  Configure transfer bit order (either Less or Most Significant Bit First)
-  * @note   MSB First means data is transmitted/received with the MSB first, following the start bit.
-  *         LSB First means data is transmitted/received with data bit 0 first, following the start bit.
-  * @rmtoll CR2          MSBFIRST      LL_LPUART_SetTransferBitOrder
-  * @param  LPUARTx LPUART Instance
-  * @param  BitOrder This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_BITORDER_LSBFIRST
-  *         @arg @ref LL_LPUART_BITORDER_MSBFIRST
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetTransferBitOrder(USART_TypeDef *LPUARTx, uint32_t BitOrder)
-{
-  MODIFY_REG(LPUARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
-}
-
-/**
-  * @brief  Return transfer bit order (either Less or Most Significant Bit First)
-  * @note   MSB First means data is transmitted/received with the MSB first, following the start bit.
-  *         LSB First means data is transmitted/received with data bit 0 first, following the start bit.
-  * @rmtoll CR2          MSBFIRST      LL_LPUART_GetTransferBitOrder
-  * @param  LPUARTx LPUART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPUART_BITORDER_LSBFIRST
-  *         @arg @ref LL_LPUART_BITORDER_MSBFIRST
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetTransferBitOrder(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_MSBFIRST));
-}
-
-/**
-  * @brief  Set Address of the LPUART node.
-  * @note   This is used in multiprocessor communication during Mute mode or Stop mode,
-  *         for wake up with address mark detection.
-  * @note   4bits address node is used when 4-bit Address Detection is selected in ADDM7.
-  *         (b7-b4 should be set to 0)
-  *         8bits address node is used when 7-bit Address Detection is selected in ADDM7.
-  *         (This is used in multiprocessor communication during Mute mode or Stop mode,
-  *         for wake up with 7-bit address mark detection.
-  *         The MSB of the character sent by the transmitter should be equal to 1.
-  *         It may also be used for character detection during normal reception,
-  *         Mute mode inactive (for example, end of block detection in ModBus protocol).
-  *         In this case, the whole received character (8-bit) is compared to the ADD[7:0]
-  *         value and CMF flag is set on match)
-  * @rmtoll CR2          ADD           LL_LPUART_ConfigNodeAddress\n
-  *         CR2          ADDM7         LL_LPUART_ConfigNodeAddress
-  * @param  LPUARTx LPUART Instance
-  * @param  AddressLen This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_ADDRESS_DETECT_4B
-  *         @arg @ref LL_LPUART_ADDRESS_DETECT_7B
-  * @param  NodeAddress 4 or 7 bit Address of the LPUART node.
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_ConfigNodeAddress(USART_TypeDef *LPUARTx, uint32_t AddressLen, uint32_t NodeAddress)
-{
-  MODIFY_REG(LPUARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7,
-             (uint32_t)(AddressLen | (NodeAddress << LPUART_POSITION_CR2_ADD)));
-}
-
-/**
-  * @brief  Return 8 bit Address of the LPUART node as set in ADD field of CR2.
-  * @note   If 4-bit Address Detection is selected in ADDM7,
-  *         only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
-  *         If 7-bit Address Detection is selected in ADDM7,
-  *         only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant)
-  * @rmtoll CR2          ADD           LL_LPUART_GetNodeAddress
-  * @param  LPUARTx LPUART Instance
-  * @retval Address of the LPUART node (Value between Min_Data=0 and Max_Data=255)
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetNodeAddress(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADD) >> LPUART_POSITION_CR2_ADD);
-}
-
-/**
-  * @brief  Return Length of Node Address used in Address Detection mode (7-bit or 4-bit)
-  * @rmtoll CR2          ADDM7         LL_LPUART_GetNodeAddressLen
-  * @param  LPUARTx LPUART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPUART_ADDRESS_DETECT_4B
-  *         @arg @ref LL_LPUART_ADDRESS_DETECT_7B
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetNodeAddressLen(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADDM7));
-}
-
-/**
-  * @brief  Enable RTS HW Flow Control
-  * @rmtoll CR3          RTSE          LL_LPUART_EnableRTSHWFlowCtrl
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR3, USART_CR3_RTSE);
-}
-
-/**
-  * @brief  Disable RTS HW Flow Control
-  * @rmtoll CR3          RTSE          LL_LPUART_DisableRTSHWFlowCtrl
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR3, USART_CR3_RTSE);
-}
-
-/**
-  * @brief  Enable CTS HW Flow Control
-  * @rmtoll CR3          CTSE          LL_LPUART_EnableCTSHWFlowCtrl
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR3, USART_CR3_CTSE);
-}
-
-/**
-  * @brief  Disable CTS HW Flow Control
-  * @rmtoll CR3          CTSE          LL_LPUART_DisableCTSHWFlowCtrl
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSE);
-}
-
-/**
-  * @brief  Configure HW Flow Control mode (both CTS and RTS)
-  * @rmtoll CR3          RTSE          LL_LPUART_SetHWFlowCtrl\n
-  *         CR3          CTSE          LL_LPUART_SetHWFlowCtrl
-  * @param  LPUARTx LPUART Instance
-  * @param  HardwareFlowControl This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_HWCONTROL_NONE
-  *         @arg @ref LL_LPUART_HWCONTROL_RTS
-  *         @arg @ref LL_LPUART_HWCONTROL_CTS
-  *         @arg @ref LL_LPUART_HWCONTROL_RTS_CTS
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetHWFlowCtrl(USART_TypeDef *LPUARTx, uint32_t HardwareFlowControl)
-{
-  MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
-}
-
-/**
-  * @brief  Return HW Flow Control configuration (both CTS and RTS)
-  * @rmtoll CR3          RTSE          LL_LPUART_GetHWFlowCtrl\n
-  *         CR3          CTSE          LL_LPUART_GetHWFlowCtrl
-  * @param  LPUARTx LPUART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPUART_HWCONTROL_NONE
-  *         @arg @ref LL_LPUART_HWCONTROL_RTS
-  *         @arg @ref LL_LPUART_HWCONTROL_CTS
-  *         @arg @ref LL_LPUART_HWCONTROL_RTS_CTS
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetHWFlowCtrl(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
-}
-
-/**
-  * @brief  Enable Overrun detection
-  * @rmtoll CR3          OVRDIS        LL_LPUART_EnableOverrunDetect
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableOverrunDetect(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
-}
-
-/**
-  * @brief  Disable Overrun detection
-  * @rmtoll CR3          OVRDIS        LL_LPUART_DisableOverrunDetect
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableOverrunDetect(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
-}
-
-/**
-  * @brief  Indicate if Overrun detection is enabled
-  * @rmtoll CR3          OVRDIS        LL_LPUART_IsEnabledOverrunDetect
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledOverrunDetect(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS);
-}
-
-/**
-  * @brief  Select event type for Wake UP Interrupt Flag (WUS[1:0] bits)
-  * @rmtoll CR3          WUS           LL_LPUART_SetWKUPType
-  * @param  LPUARTx LPUART Instance
-  * @param  Type This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS
-  *         @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT
-  *         @arg @ref LL_LPUART_WAKEUP_ON_RXNE
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetWKUPType(USART_TypeDef *LPUARTx, uint32_t Type)
-{
-  MODIFY_REG(LPUARTx->CR3, USART_CR3_WUS, Type);
-}
-
-/**
-  * @brief  Return event type for Wake UP Interrupt Flag (WUS[1:0] bits)
-  * @rmtoll CR3          WUS           LL_LPUART_GetWKUPType
-  * @param  LPUARTx LPUART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS
-  *         @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT
-  *         @arg @ref LL_LPUART_WAKEUP_ON_RXNE
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetWKUPType(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_WUS));
-}
-
-/**
-  * @brief  Configure LPUART BRR register for achieving expected Baud Rate value.
-  *
-  * @note   Compute and set LPUARTDIV value in BRR Register (full BRR content)
-  *         according to used Peripheral Clock and expected Baud Rate values
-  * @note   Peripheral clock and Baud Rate values provided as function parameters should be valid
-  *         (Baud rate value != 0).
-  * @note   Provided that LPUARTx_BRR must be > = 0x300 and LPUART_BRR is 20-bit,
-  *         a care should be taken when generating high baud rates using high PeriphClk
-  *         values. PeriphClk must be in the range [3 x BaudRate, 4096 x BaudRate].
-  * @rmtoll BRR          BRR           LL_LPUART_SetBaudRate
-  * @param  LPUARTx LPUART Instance
-  * @param  PeriphClk Peripheral Clock
-  * @param  BaudRate Baud Rate
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t BaudRate)
-{
-  LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, BaudRate);
-}
-
-/**
-  * @brief  Return current Baud Rate value, according to LPUARTDIV present in BRR register
-  *         (full BRR content), and to used Peripheral Clock values
-  * @note   In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
-  * @rmtoll BRR          BRR           LL_LPUART_GetBaudRate
-  * @param  LPUARTx LPUART Instance
-  * @param  PeriphClk Peripheral Clock
-  * @retval Baud Rate
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk)
-{
-  register uint32_t lpuartdiv = 0x0U;
-  register uint32_t brrresult = 0x0U;
-
-  lpuartdiv = LPUARTx->BRR & LPUART_BRR_MASK;
-
-  if (lpuartdiv >= LPUART_BRR_MIN_VALUE)
-  {
-    brrresult = (uint32_t)(((uint64_t)(PeriphClk) * LPUART_LPUARTDIV_FREQ_MUL) / lpuartdiv);
-  }
-
-  return (brrresult);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
-  * @{
-  */
-
-/**
-  * @brief  Enable Single Wire Half-Duplex mode
-  * @rmtoll CR3          HDSEL         LL_LPUART_EnableHalfDuplex
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableHalfDuplex(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
-}
-
-/**
-  * @brief  Disable Single Wire Half-Duplex mode
-  * @rmtoll CR3          HDSEL         LL_LPUART_DisableHalfDuplex
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableHalfDuplex(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
-}
-
-/**
-  * @brief  Indicate if Single Wire Half-Duplex mode is enabled
-  * @rmtoll CR3          HDSEL         LL_LPUART_IsEnabledHalfDuplex
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledHalfDuplex(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature
-  * @{
-  */
-
-/**
-  * @brief  Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits).
-  * @rmtoll CR1          DEDT          LL_LPUART_SetDEDeassertionTime
-  * @param  LPUARTx LPUART Instance
-  * @param  Time Value between Min_Data=0 and Max_Data=31
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetDEDeassertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
-{
-  MODIFY_REG(LPUARTx->CR1, USART_CR1_DEDT, Time << LPUART_POSITION_CR1_DEDT);
-}
-
-/**
-  * @brief  Return DEDT (Driver Enable De-Assertion Time)
-  * @rmtoll CR1          DEDT          LL_LPUART_GetDEDeassertionTime
-  * @param  LPUARTx LPUART Instance
-  * @retval Time value expressed on 5 bits ([4:0] bits) : c
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetDEDeassertionTime(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEDT) >> LPUART_POSITION_CR1_DEDT);
-}
-
-/**
-  * @brief  Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits).
-  * @rmtoll CR1          DEAT          LL_LPUART_SetDEAssertionTime
-  * @param  LPUARTx LPUART Instance
-  * @param  Time Value between Min_Data=0 and Max_Data=31
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetDEAssertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
-{
-  MODIFY_REG(LPUARTx->CR1, USART_CR1_DEAT, Time << LPUART_POSITION_CR1_DEAT);
-}
-
-/**
-  * @brief  Return DEAT (Driver Enable Assertion Time)
-  * @rmtoll CR1          DEAT          LL_LPUART_GetDEAssertionTime
-  * @param  LPUARTx LPUART Instance
-  * @retval Time value expressed on 5 bits ([4:0] bits) : Time Value between Min_Data=0 and Max_Data=31
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetDEAssertionTime(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEAT) >> LPUART_POSITION_CR1_DEAT);
-}
-
-/**
-  * @brief  Enable Driver Enable (DE) Mode
-  * @rmtoll CR3          DEM           LL_LPUART_EnableDEMode
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableDEMode(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR3, USART_CR3_DEM);
-}
-
-/**
-  * @brief  Disable Driver Enable (DE) Mode
-  * @rmtoll CR3          DEM           LL_LPUART_DisableDEMode
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableDEMode(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR3, USART_CR3_DEM);
-}
-
-/**
-  * @brief  Indicate if Driver Enable (DE) Mode is enabled
-  * @rmtoll CR3          DEM           LL_LPUART_IsEnabledDEMode
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDEMode(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM));
-}
-
-/**
-  * @brief  Select Driver Enable Polarity
-  * @rmtoll CR3          DEP           LL_LPUART_SetDESignalPolarity
-  * @param  LPUARTx LPUART Instance
-  * @param  Polarity This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_DE_POLARITY_HIGH
-  *         @arg @ref LL_LPUART_DE_POLARITY_LOW
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetDESignalPolarity(USART_TypeDef *LPUARTx, uint32_t Polarity)
-{
-  MODIFY_REG(LPUARTx->CR3, USART_CR3_DEP, Polarity);
-}
-
-/**
-  * @brief  Return Driver Enable Polarity
-  * @rmtoll CR3          DEP           LL_LPUART_GetDESignalPolarity
-  * @param  LPUARTx LPUART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_LPUART_DE_POLARITY_HIGH
-  *         @arg @ref LL_LPUART_DE_POLARITY_LOW
-  */
-__STATIC_INLINE uint32_t LL_LPUART_GetDESignalPolarity(USART_TypeDef *LPUARTx)
-{
-  return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_DEP));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EF_FLAG_Management FLAG_Management
-  * @{
-  */
-
-/**
-  * @brief  Check if the LPUART Parity Error Flag is set or not
-  * @rmtoll ISR          PE            LL_LPUART_IsActiveFlag_PE
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_PE(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_PE) == (USART_ISR_PE));
-}
-
-/**
-  * @brief  Check if the LPUART Framing Error Flag is set or not
-  * @rmtoll ISR          FE            LL_LPUART_IsActiveFlag_FE
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_FE(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_FE) == (USART_ISR_FE));
-}
-
-/**
-  * @brief  Check if the LPUART Noise detected Flag is set or not
-  * @rmtoll ISR          NE            LL_LPUART_IsActiveFlag_NE
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_NE(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_NE) == (USART_ISR_NE));
-}
-
-/**
-  * @brief  Check if the LPUART OverRun Error Flag is set or not
-  * @rmtoll ISR          ORE           LL_LPUART_IsActiveFlag_ORE
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_ORE(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE));
-}
-
-/**
-  * @brief  Check if the LPUART IDLE line detected Flag is set or not
-  * @rmtoll ISR          IDLE          LL_LPUART_IsActiveFlag_IDLE
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_IDLE(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE));
-}
-
-/**
-  * @brief  Check if the LPUART Read Data Register Not Empty Flag is set or not
-  * @rmtoll ISR          RXNE          LL_LPUART_IsActiveFlag_RXNE
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE));
-}
-
-/**
-  * @brief  Check if the LPUART Transmission Complete Flag is set or not
-  * @rmtoll ISR          TC            LL_LPUART_IsActiveFlag_TC
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TC(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_TC) == (USART_ISR_TC));
-}
-
-/**
-  * @brief  Check if the LPUART Transmit Data Register Empty Flag is set or not
-  * @rmtoll ISR          TXE           LL_LPUART_IsActiveFlag_TXE
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE));
-}
-
-/**
-  * @brief  Check if the LPUART CTS interrupt Flag is set or not
-  * @rmtoll ISR          CTSIF         LL_LPUART_IsActiveFlag_nCTS
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_nCTS(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF));
-}
-
-/**
-  * @brief  Check if the LPUART CTS Flag is set or not
-  * @rmtoll ISR          CTS           LL_LPUART_IsActiveFlag_CTS
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CTS(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS));
-}
-
-/**
-  * @brief  Check if the LPUART Busy Flag is set or not
-  * @rmtoll ISR          BUSY          LL_LPUART_IsActiveFlag_BUSY
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_BUSY(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY));
-}
-
-/**
-  * @brief  Check if the LPUART Character Match Flag is set or not
-  * @rmtoll ISR          CMF           LL_LPUART_IsActiveFlag_CM
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CM(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF));
-}
-
-/**
-  * @brief  Check if the LPUART Send Break Flag is set or not
-  * @rmtoll ISR          SBKF          LL_LPUART_IsActiveFlag_SBK
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_SBK(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF));
-}
-
-/**
-  * @brief  Check if the LPUART Receive Wake Up from mute mode Flag is set or not
-  * @rmtoll ISR          RWU           LL_LPUART_IsActiveFlag_RWU
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RWU(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU));
-}
-
-/**
-  * @brief  Check if the LPUART Wake Up from stop mode Flag is set or not
-  * @rmtoll ISR          WUF           LL_LPUART_IsActiveFlag_WKUP
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_WKUP(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF));
-}
-
-/**
-  * @brief  Check if the LPUART Transmit Enable Acknowledge Flag is set or not
-  * @rmtoll ISR          TEACK         LL_LPUART_IsActiveFlag_TEACK
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TEACK(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK));
-}
-
-/**
-  * @brief  Check if the LPUART Receive Enable Acknowledge Flag is set or not
-  * @rmtoll ISR          REACK         LL_LPUART_IsActiveFlag_REACK
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_REACK(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK));
-}
-
-/**
-  * @brief  Clear Parity Error Flag
-  * @rmtoll ICR          PECF          LL_LPUART_ClearFlag_PE
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_ClearFlag_PE(USART_TypeDef *LPUARTx)
-{
-  WRITE_REG(LPUARTx->ICR, USART_ICR_PECF);
-}
-
-/**
-  * @brief  Clear Framing Error Flag
-  * @rmtoll ICR          FECF          LL_LPUART_ClearFlag_FE
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_ClearFlag_FE(USART_TypeDef *LPUARTx)
-{
-  WRITE_REG(LPUARTx->ICR, USART_ICR_FECF);
-}
-
-/**
-  * @brief  Clear Noise detected Flag
-  * @rmtoll ICR          NCF           LL_LPUART_ClearFlag_NE
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_ClearFlag_NE(USART_TypeDef *LPUARTx)
-{
-  WRITE_REG(LPUARTx->ICR, USART_ICR_NCF);
-}
-
-/**
-  * @brief  Clear OverRun Error Flag
-  * @rmtoll ICR          ORECF         LL_LPUART_ClearFlag_ORE
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_ClearFlag_ORE(USART_TypeDef *LPUARTx)
-{
-  WRITE_REG(LPUARTx->ICR, USART_ICR_ORECF);
-}
-
-/**
-  * @brief  Clear IDLE line detected Flag
-  * @rmtoll ICR          IDLECF        LL_LPUART_ClearFlag_IDLE
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_ClearFlag_IDLE(USART_TypeDef *LPUARTx)
-{
-  WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF);
-}
-
-/**
-  * @brief  Clear Transmission Complete Flag
-  * @rmtoll ICR          TCCF          LL_LPUART_ClearFlag_TC
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_ClearFlag_TC(USART_TypeDef *LPUARTx)
-{
-  WRITE_REG(LPUARTx->ICR, USART_ICR_TCCF);
-}
-
-/**
-  * @brief  Clear CTS Interrupt Flag
-  * @rmtoll ICR          CTSCF         LL_LPUART_ClearFlag_nCTS
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_ClearFlag_nCTS(USART_TypeDef *LPUARTx)
-{
-  WRITE_REG(LPUARTx->ICR, USART_ICR_CTSCF);
-}
-
-/**
-  * @brief  Clear Character Match Flag
-  * @rmtoll ICR          CMCF          LL_LPUART_ClearFlag_CM
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_ClearFlag_CM(USART_TypeDef *LPUARTx)
-{
-  WRITE_REG(LPUARTx->ICR, USART_ICR_CMCF);
-}
-
-/**
-  * @brief  Clear Wake Up from stop mode Flag
-  * @rmtoll ICR          WUCF          LL_LPUART_ClearFlag_WKUP
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_ClearFlag_WKUP(USART_TypeDef *LPUARTx)
-{
-  WRITE_REG(LPUARTx->ICR, USART_ICR_WUCF);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EF_IT_Management IT_Management
-  * @{
-  */
-
-/**
-  * @brief  Enable IDLE Interrupt
-  * @rmtoll CR1          IDLEIE        LL_LPUART_EnableIT_IDLE
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
-}
-
-/**
-  * @brief  Enable RX Not Empty Interrupt
-  * @rmtoll CR1          RXNEIE        LL_LPUART_EnableIT_RXNE
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableIT_RXNE(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
-}
-
-/**
-  * @brief  Enable Transmission Complete Interrupt
-  * @rmtoll CR1          TCIE          LL_LPUART_EnableIT_TC
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR1, USART_CR1_TCIE);
-}
-
-/**
-  * @brief  Enable TX Empty Interrupt
-  * @rmtoll CR1          TXEIE         LL_LPUART_EnableIT_TXE
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableIT_TXE(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
-}
-
-/**
-  * @brief  Enable Parity Error Interrupt
-  * @rmtoll CR1          PEIE          LL_LPUART_EnableIT_PE
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR1, USART_CR1_PEIE);
-}
-
-/**
-  * @brief  Enable Character Match Interrupt
-  * @rmtoll CR1          CMIE          LL_LPUART_EnableIT_CM
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR1, USART_CR1_CMIE);
-}
-
-/**
-  * @brief  Enable Error Interrupt
-  * @note   When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
-  *         error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register).
-  *         - 0: Interrupt is inhibited
-  *         - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register.
-  * @rmtoll CR3          EIE           LL_LPUART_EnableIT_ERROR
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR3, USART_CR3_EIE);
-}
-
-/**
-  * @brief  Enable CTS Interrupt
-  * @rmtoll CR3          CTSIE         LL_LPUART_EnableIT_CTS
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
-}
-
-/**
-  * @brief  Enable Wake Up from Stop Mode Interrupt
-  * @rmtoll CR3          WUFIE         LL_LPUART_EnableIT_WKUP
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
-}
-
-/**
-  * @brief  Disable IDLE Interrupt
-  * @rmtoll CR1          IDLEIE        LL_LPUART_DisableIT_IDLE
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
-}
-
-/**
-  * @brief  Disable RX Not Empty Interrupt
-  * @rmtoll CR1          RXNEIE        LL_LPUART_DisableIT_RXNE
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableIT_RXNE(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
-}
-
-/**
-  * @brief  Disable Transmission Complete Interrupt
-  * @rmtoll CR1          TCIE          LL_LPUART_DisableIT_TC
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE);
-}
-
-/**
-  * @brief  Disable TX Empty Interrupt
-  * @rmtoll CR1          TXEIE         LL_LPUART_DisableIT_TXE
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableIT_TXE(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
-}
-
-/**
-  * @brief  Disable Parity Error Interrupt
-  * @rmtoll CR1          PEIE          LL_LPUART_DisableIT_PE
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR1, USART_CR1_PEIE);
-}
-
-/**
-  * @brief  Disable Character Match Interrupt
-  * @rmtoll CR1          CMIE          LL_LPUART_DisableIT_CM
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE);
-}
-
-/**
-  * @brief  Disable Error Interrupt
-  * @note   When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
-  *         error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register).
-  *         - 0: Interrupt is inhibited
-  *         - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register.
-  * @rmtoll CR3          EIE           LL_LPUART_DisableIT_ERROR
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR3, USART_CR3_EIE);
-}
-
-/**
-  * @brief  Disable CTS Interrupt
-  * @rmtoll CR3          CTSIE         LL_LPUART_DisableIT_CTS
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
-}
-
-/**
-  * @brief  Disable Wake Up from Stop Mode Interrupt
-  * @rmtoll CR3          WUFIE         LL_LPUART_DisableIT_WKUP
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
-}
-
-/**
-  * @brief  Check if the LPUART IDLE Interrupt  source is enabled or disabled.
-  * @rmtoll CR1          IDLEIE        LL_LPUART_IsEnabledIT_IDLE
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_IDLE(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
-}
-
-/**
-  * @brief  Check if the LPUART RX Not Empty Interrupt is enabled or disabled.
-  * @rmtoll CR1          RXNEIE        LL_LPUART_IsEnabledIT_RXNE
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
-}
-
-/**
-  * @brief  Check if the LPUART Transmission Complete Interrupt is enabled or disabled.
-  * @rmtoll CR1          TCIE          LL_LPUART_IsEnabledIT_TC
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TC(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
-}
-
-/**
-  * @brief  Check if the LPUART TX Empty Interrupt is enabled or disabled.
-  * @rmtoll CR1          TXEIE         LL_LPUART_IsEnabledIT_TXE
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
-}
-
-/**
-  * @brief  Check if the LPUART Parity Error Interrupt is enabled or disabled.
-  * @rmtoll CR1          PEIE          LL_LPUART_IsEnabledIT_PE
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_PE(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
-}
-
-/**
-  * @brief  Check if the LPUART Character Match Interrupt is enabled or disabled.
-  * @rmtoll CR1          CMIE          LL_LPUART_IsEnabledIT_CM
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CM(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE));
-}
-
-/**
-  * @brief  Check if the LPUART Error Interrupt is enabled or disabled.
-  * @rmtoll CR3          EIE           LL_LPUART_IsEnabledIT_ERROR
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_ERROR(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
-}
-
-/**
-  * @brief  Check if the LPUART CTS Interrupt is enabled or disabled.
-  * @rmtoll CR3          CTSIE         LL_LPUART_IsEnabledIT_CTS
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CTS(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
-}
-
-/**
-  * @brief  Check if the LPUART Wake Up from Stop Mode Interrupt is enabled or disabled.
-  * @rmtoll CR3          WUFIE         LL_LPUART_IsEnabledIT_WKUP
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_WKUP(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EF_DMA_Management DMA_Management
-  * @{
-  */
-
-/**
-  * @brief  Enable DMA Mode for reception
-  * @rmtoll CR3          DMAR          LL_LPUART_EnableDMAReq_RX
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR3, USART_CR3_DMAR);
-}
-
-/**
-  * @brief  Disable DMA Mode for reception
-  * @rmtoll CR3          DMAR          LL_LPUART_DisableDMAReq_RX
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableDMAReq_RX(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAR);
-}
-
-/**
-  * @brief  Check if DMA Mode is enabled for reception
-  * @rmtoll CR3          DMAR          LL_LPUART_IsEnabledDMAReq_RX
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_RX(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
-}
-
-/**
-  * @brief  Enable DMA Mode for transmission
-  * @rmtoll CR3          DMAT          LL_LPUART_EnableDMAReq_TX
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR3, USART_CR3_DMAT);
-}
-
-/**
-  * @brief  Disable DMA Mode for transmission
-  * @rmtoll CR3          DMAT          LL_LPUART_DisableDMAReq_TX
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableDMAReq_TX(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAT);
-}
-
-/**
-  * @brief  Check if DMA Mode is enabled for transmission
-  * @rmtoll CR3          DMAT          LL_LPUART_IsEnabledDMAReq_TX
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_TX(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
-}
-
-/**
-  * @brief  Enable DMA Disabling on Reception Error
-  * @rmtoll CR3          DDRE          LL_LPUART_EnableDMADeactOnRxErr
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR3, USART_CR3_DDRE);
-}
-
-/**
-  * @brief  Disable DMA Disabling on Reception Error
-  * @rmtoll CR3          DDRE          LL_LPUART_DisableDMADeactOnRxErr
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_DisableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
-{
-  CLEAR_BIT(LPUARTx->CR3, USART_CR3_DDRE);
-}
-
-/**
-  * @brief  Indicate if DMA Disabling on Reception Error is disabled
-  * @rmtoll CR3          DDRE          LL_LPUART_IsEnabledDMADeactOnRxErr
-  * @param  LPUARTx LPUART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMADeactOnRxErr(USART_TypeDef *LPUARTx)
-{
-  return (READ_BIT(LPUARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE));
-}
-
-/**
-  * @brief  Get the LPUART data register address used for DMA transfer
-  * @rmtoll RDR          RDR           LL_LPUART_DMA_GetRegAddr\n
-  * @rmtoll TDR          TDR           LL_LPUART_DMA_GetRegAddr
-  * @param  LPUARTx LPUART Instance
-  * @param  Direction This parameter can be one of the following values:
-  *         @arg @ref LL_LPUART_DMA_REG_DATA_TRANSMIT
-  *         @arg @ref LL_LPUART_DMA_REG_DATA_RECEIVE
-  * @retval Address of data register
-  */
-__STATIC_INLINE uint32_t LL_LPUART_DMA_GetRegAddr(USART_TypeDef *LPUARTx, uint32_t Direction)
-{
-  register uint32_t data_reg_addr = 0U;
-
-  if (Direction == LL_LPUART_DMA_REG_DATA_TRANSMIT)
-  {
-    /* return address of TDR register */
-    data_reg_addr = (uint32_t) &(LPUARTx->TDR);
-  }
-  else
-  {
-    /* return address of RDR register */
-    data_reg_addr = (uint32_t) &(LPUARTx->RDR);
-  }
-
-  return data_reg_addr;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EF_Data_Management Data_Management
-  * @{
-  */
-
-/**
-  * @brief  Read Receiver Data register (Receive Data value, 8 bits)
-  * @rmtoll RDR          RDR           LL_LPUART_ReceiveData8
-  * @param  LPUARTx LPUART Instance
-  * @retval Time Value between Min_Data=0x00 and Max_Data=0xFF
-  */
-__STATIC_INLINE uint8_t LL_LPUART_ReceiveData8(USART_TypeDef *LPUARTx)
-{
-  return (uint8_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR));
-}
-
-/**
-  * @brief  Read Receiver Data register (Receive Data value, 9 bits)
-  * @rmtoll RDR          RDR           LL_LPUART_ReceiveData9
-  * @param  LPUARTx LPUART Instance
-  * @retval Time Value between Min_Data=0x00 and Max_Data=0x1FF
-  */
-__STATIC_INLINE uint16_t LL_LPUART_ReceiveData9(USART_TypeDef *LPUARTx)
-{
-  return (uint16_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR));
-}
-
-/**
-  * @brief  Write in Transmitter Data Register (Transmit Data value, 8 bits)
-  * @rmtoll TDR          TDR           LL_LPUART_TransmitData8
-  * @param  LPUARTx LPUART Instance
-  * @param  Value between Min_Data=0x00 and Max_Data=0xFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_TransmitData8(USART_TypeDef *LPUARTx, uint8_t Value)
-{
-  LPUARTx->TDR = Value;
-}
-
-/**
-  * @brief  Write in Transmitter Data Register (Transmit Data value, 9 bits)
-  * @rmtoll TDR          TDR           LL_LPUART_TransmitData9
-  * @param  LPUARTx LPUART Instance
-  * @param  Value between Min_Data=0x00 and Max_Data=0x1FF
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_TransmitData9(USART_TypeDef *LPUARTx, uint16_t Value)
-{
-  LPUARTx->TDR = Value & 0x1FFU;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup LPUART_LL_EF_Execution Execution
-  * @{
-  */
-
-/**
-  * @brief  Request Break sending
-  * @rmtoll RQR          SBKRQ         LL_LPUART_RequestBreakSending
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_RequestBreakSending(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->RQR, USART_RQR_SBKRQ);
-}
-
-/**
-  * @brief  Put LPUART in mute mode and set the RWU flag
-  * @rmtoll RQR          MMRQ          LL_LPUART_RequestEnterMuteMode
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_RequestEnterMuteMode(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->RQR, USART_RQR_MMRQ);
-}
-
-/**
-  * @brief  Request a Receive Data flush
-  * @rmtoll RQR          RXFRQ         LL_LPUART_RequestRxDataFlush
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_RequestRxDataFlush(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->RQR, USART_RQR_RXFRQ);
-}
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup LPUART_LL_EF_Init Initialization and de-initialization functions
-  * @{
-  */
-ErrorStatus LL_LPUART_DeInit(USART_TypeDef *LPUARTx);
-ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, LL_LPUART_InitTypeDef *LPUART_InitStruct);
-void        LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct);
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* LPUART1 */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_LPUART_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h
deleted file mode 100755
index 280438e3..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h
+++ /dev/null
@@ -1,759 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_pwr.h
-  * @author  MCD Application Team
-  * @brief   Header file of PWR LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_PWR_H
-#define __STM32L0xx_LL_PWR_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined(PWR)
-
-/** @defgroup PWR_LL PWR
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
-  * @{
-  */
-
-/** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
-  * @brief    Flags defines which can be used with LL_PWR_WriteReg function
-  * @{
-  */
-#define LL_PWR_CR_CSBF                     PWR_CR_CSBF            /*!< Clear standby flag */
-#define LL_PWR_CR_CWUF                     PWR_CR_CWUF            /*!< Clear wakeup flag */
-/**
-  * @}
-  */
-
-/** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
-  * @brief    Flags defines which can be used with LL_PWR_ReadReg function
-  * @{
-  */
-#define LL_PWR_CSR_WUF                     PWR_CSR_WUF            /*!< Wakeup flag */
-#define LL_PWR_CSR_SBF                     PWR_CSR_SBF            /*!< Standby flag */
-#if defined(PWR_PVD_SUPPORT)
-#define LL_PWR_CSR_PVDO                    PWR_CSR_PVDO           /*!< Power voltage detector output flag */
-#endif /* PWR_PVD_SUPPORT */
-#if defined(PWR_CSR_VREFINTRDYF)
-#define LL_PWR_CSR_VREFINTRDYF             PWR_CSR_VREFINTRDYF    /*!< VREFINT ready flag */
-#endif /* PWR_CSR_VREFINTRDYF */
-#define LL_PWR_CSR_VOS                     PWR_CSR_VOSF           /*!< Voltage scaling select flag */
-#define LL_PWR_CSR_REGLPF                  PWR_CSR_REGLPF         /*!< Regulator low power flag */
-#define LL_PWR_CSR_EWUP1                   PWR_CSR_EWUP1          /*!< Enable WKUP pin 1 */
-#define LL_PWR_CSR_EWUP2                   PWR_CSR_EWUP2          /*!< Enable WKUP pin 2 */
-#if defined(PWR_CSR_EWUP3)
-#define LL_PWR_CSR_EWUP3                   PWR_CSR_EWUP3          /*!< Enable WKUP pin 3 */
-#endif /* PWR_CSR_EWUP3 */
-/**
-  * @}
-  */
-
-/** @defgroup PWR_LL_EC_REGU_VOLTAGE Regulator Voltage
-  * @{
-  */
-#define LL_PWR_REGU_VOLTAGE_SCALE1         (PWR_CR_VOS_0)                   /*!< 1.8V (range 1) */
-#define LL_PWR_REGU_VOLTAGE_SCALE2         (PWR_CR_VOS_1)                   /*!< 1.5V (range 2) */
-#define LL_PWR_REGU_VOLTAGE_SCALE3         (PWR_CR_VOS_0 | PWR_CR_VOS_1)    /*!< 1.2V (range 3) */
-/**
-  * @}
-  */
-
-/** @defgroup PWR_LL_EC_MODE_PWR Mode Power
-  * @{
-  */
-#define LL_PWR_MODE_STOP                      0x00000000U                    /*!< Enter Stop mode when the CPU enters deepsleep */
-#define LL_PWR_MODE_STANDBY                   (PWR_CR_PDDS)                  /*!< Enter Standby mode when the CPU enters deepsleep */
-/**
-  * @}
-  */
-
-/** @defgroup PWR_LL_EC_REGU_MODE_LP_MODES  Regulator Mode In Low Power Modes
-  * @{
-  */
-#define LL_PWR_REGU_LPMODES_MAIN           0x00000000U        /*!< Voltage regulator in main mode during deepsleep/sleep/low-power run mode */
-#define LL_PWR_REGU_LPMODES_LOW_POWER      (PWR_CR_LPSDSR)    /*!< Voltage regulator in low-power mode during deepsleep/sleep/low-power run mode */
-/**
-  * @}
-  */
-#if defined(PWR_CR_LPDS)
-/** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE  Regulator Mode In Deep Sleep Mode
- * @{
- */
-#define LL_PWR_REGU_DSMODE_MAIN        0x00000000U           /*!< Voltage regulator in main mode during deepsleep mode when PWR_CR_LPSDSR = 0 */
-#define LL_PWR_REGU_DSMODE_LOW_POWER   (PWR_CR_LPDS)         /*!< Voltage regulator in low-power mode during deepsleep mode when PWR_CR_LPSDSR = 0 */
-/**
-  * @}
-  */
-#endif /* PWR_CR_LPDS */
-
-#if defined(PWR_PVD_SUPPORT)
-/** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
-  * @{
-  */
-#define LL_PWR_PVDLEVEL_0                  (PWR_CR_PLS_LEV0)      /*!< Voltage threshold detected by PVD 1.9 V */
-#define LL_PWR_PVDLEVEL_1                  (PWR_CR_PLS_LEV1)      /*!< Voltage threshold detected by PVD 2.1 V */
-#define LL_PWR_PVDLEVEL_2                  (PWR_CR_PLS_LEV2)      /*!< Voltage threshold detected by PVD 2.3 V */
-#define LL_PWR_PVDLEVEL_3                  (PWR_CR_PLS_LEV3)      /*!< Voltage threshold detected by PVD 2.5 V */
-#define LL_PWR_PVDLEVEL_4                  (PWR_CR_PLS_LEV4)      /*!< Voltage threshold detected by PVD 2.7 V */
-#define LL_PWR_PVDLEVEL_5                  (PWR_CR_PLS_LEV5)      /*!< Voltage threshold detected by PVD 2.9 V */
-#define LL_PWR_PVDLEVEL_6                  (PWR_CR_PLS_LEV6)      /*!< Voltage threshold detected by PVD 3.1 V */
-#define LL_PWR_PVDLEVEL_7                  (PWR_CR_PLS_LEV7)      /*!< External input analog voltage   (Compare internally to VREFINT) */
-/**
-  * @}
-  */
-#endif /* PWR_PVD_SUPPORT */
-/** @defgroup PWR_LL_EC_WAKEUP_PIN  Wakeup Pins
-  * @{
-  */
-#define LL_PWR_WAKEUP_PIN1                 (PWR_CSR_EWUP1)        /*!< WKUP pin 1 : PA0 */
-#define LL_PWR_WAKEUP_PIN2                 (PWR_CSR_EWUP2)        /*!< WKUP pin 2 : PC13 */
-#if defined(PWR_CSR_EWUP3)
-#define LL_PWR_WAKEUP_PIN3                 (PWR_CSR_EWUP3)        /*!< WKUP pin 3 : PE6 or PA2 according to device */
-#endif /* PWR_CSR_EWUP3 */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
-  * @{
-  */
-
-/** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in PWR register
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in PWR register
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
-  * @{
-  */
-
-/** @defgroup PWR_LL_EF_Configuration Configuration
-  * @{
-  */
-/**
-  * @brief  Switch the regulator from main mode to low-power mode
-  * @rmtoll CR    LPRUN       LL_PWR_EnableLowPowerRunMode
-  * @note   Remind to set the regulator to low power before enabling
-  *         LowPower run mode (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER).
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_EnableLowPowerRunMode(void)
-{
-  SET_BIT(PWR->CR, PWR_CR_LPRUN);
-}
-
-/**
-  * @brief  Switch the regulator from low-power mode to main mode
-  * @rmtoll CR    LPRUN       LL_PWR_DisableLowPowerRunMode
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_DisableLowPowerRunMode(void)
-{
-  CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);
-}
-
-/**
-  * @brief  Check if the regulator is in low-power mode
-  * @rmtoll CR    LPRUN       LL_PWR_IsEnabledLowPowerRunMode
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRunMode(void)
-{
-  return (READ_BIT(PWR->CR, PWR_CR_LPRUN) == (PWR_CR_LPRUN));
-}
-
-/**
-  * @brief  Set voltage regulator to low-power and switch from 
-  *         run main mode to run low-power mode.
-  * @rmtoll CR    LPSDSR       LL_PWR_EnterLowPowerRunMode\n
-  *         CR    LPRUN        LL_PWR_EnterLowPowerRunMode
-  * @note   This "high level" function is introduced to provide functional
-  *         compatibility with other families. Notice that the two registers
-  *         have to be written sequentially, so this function is not atomic.
-  *         To assure atomicity you can call separately the following functions:
-  *         - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_LOW_POWER);
-  *         - @ref LL_PWR_EnableLowPowerRunMode();
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_EnterLowPowerRunMode(void)
-{
-  SET_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_LOW_POWER) */
-  SET_BIT(PWR->CR, PWR_CR_LPRUN);  /* => LL_PWR_EnableLowPowerRunMode() */
-}
-
-/**
-  * @brief  Set voltage regulator to main and switch from 
-  *         run main mode to low-power mode.
-  * @rmtoll CR    LPSDSR       LL_PWR_ExitLowPowerRunMode\n
-  *         CR    LPRUN        LL_PWR_ExitLowPowerRunMode
-  * @note   This "high level" function is introduced to provide functional   
-  *         compatibility with other families. Notice that the two registers 
-  *         have to be written sequentially, so this function is not atomic.
-  *         To assure atomicity you can call separately the following functions:
-  *         - @ref LL_PWR_DisableLowPowerRunMode();
-  *         - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_MAIN);
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_ExitLowPowerRunMode(void)
-{
-  CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);   /* => LL_PWR_DisableLowPowerRunMode() */
-  CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR);  /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_MAIN) */
-}
-/**
-  * @brief  Set the main internal regulator output voltage
-  * @rmtoll CR    VOS       LL_PWR_SetRegulVoltageScaling
-  * @param  VoltageScaling This parameter can be one of the following values:
-  *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
-  *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
-  *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling)
-{
-  MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling);
-}
-
-/**
-  * @brief  Get the main internal regulator output voltage
-  * @rmtoll CR    VOS       LL_PWR_GetRegulVoltageScaling
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
-  *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
-  *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
-  */
-__STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(void)
-{
-  return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS));
-}
-
-/**
-  * @brief  Enable access to the backup domain
-  * @rmtoll CR    DBP       LL_PWR_EnableBkUpAccess
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
-{
-  SET_BIT(PWR->CR, PWR_CR_DBP);
-}
-
-/**
-  * @brief  Disable access to the backup domain
-  * @rmtoll CR    DBP       LL_PWR_DisableBkUpAccess
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
-{
-  CLEAR_BIT(PWR->CR, PWR_CR_DBP);
-}
-
-/**
-  * @brief  Check if the backup domain is enabled
-  * @rmtoll CR    DBP       LL_PWR_IsEnabledBkUpAccess
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
-{
-  return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
-}
-
-/**
-  * @brief  Set voltage regulator mode during low power modes
-  * @rmtoll CR    LPSDSR       LL_PWR_SetRegulModeLP
-  * @param  RegulMode This parameter can be one of the following values:
-  *         @arg @ref LL_PWR_REGU_LPMODES_MAIN
-  *         @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_SetRegulModeLP(uint32_t RegulMode)
-{
-  MODIFY_REG(PWR->CR, PWR_CR_LPSDSR, RegulMode);
-}
-
-/**
-  * @brief  Get voltage regulator mode during low power modes
-  * @rmtoll CR    LPSDSR       LL_PWR_GetRegulModeLP
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_PWR_REGU_LPMODES_MAIN
-  *         @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER
-  */
-__STATIC_INLINE uint32_t LL_PWR_GetRegulModeLP(void)
-{
-  return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPSDSR));
-}
-
-#if defined(PWR_CR_LPDS)
-/**
-  * @brief  Set voltage regulator mode during deep sleep mode
-  * @rmtoll CR    LPDS         LL_PWR_SetRegulModeDS
-  * @param  RegulMode This parameter can be one of the following values:
-  *         @arg @ref LL_PWR_REGU_DSMODE_MAIN
-  *         @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
-{
-  MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
-}
-
-/**
-  * @brief  Get voltage regulator mode during deep sleep mode
-  * @rmtoll CR    LPDS         LL_PWR_GetRegulModeDS
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_PWR_REGU_DSMODE_MAIN
-  *         @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
-  */
-__STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
-{
-  return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
-}
-#endif /* PWR_CR_LPDS */
-
-/**
-  * @brief  Set power down mode when CPU enters deepsleep
-  * @rmtoll CR    PDDS         LL_PWR_SetPowerMode
-  * @param  PDMode This parameter can be one of the following values:
-  *         @arg @ref LL_PWR_MODE_STOP
-  *         @arg @ref LL_PWR_MODE_STANDBY
-  * @note   Set the regulator to low power (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER)  
-  *         before setting MODE_STOP. If the regulator remains in "main mode",   
-  *         it consumes more power without providing any additional feature. 
-  *         In MODE_STANDBY the regulator is automatically off.
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
-{
-  MODIFY_REG(PWR->CR, PWR_CR_PDDS, PDMode);
-}
-
-/**
-  * @brief  Get power down mode when CPU enters deepsleep
-  * @rmtoll CR    PDDS         LL_PWR_GetPowerMode
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_PWR_MODE_STOP
-  *         @arg @ref LL_PWR_MODE_STANDBY
-  */
-__STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
-{
-  return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PDDS));
-}
-
-#if defined(PWR_PVD_SUPPORT)
-/**
-  * @brief  Configure the voltage threshold detected by the Power Voltage Detector
-  * @rmtoll CR    PLS       LL_PWR_SetPVDLevel
-  * @param  PVDLevel This parameter can be one of the following values:
-  *         @arg @ref LL_PWR_PVDLEVEL_0
-  *         @arg @ref LL_PWR_PVDLEVEL_1
-  *         @arg @ref LL_PWR_PVDLEVEL_2
-  *         @arg @ref LL_PWR_PVDLEVEL_3
-  *         @arg @ref LL_PWR_PVDLEVEL_4
-  *         @arg @ref LL_PWR_PVDLEVEL_5
-  *         @arg @ref LL_PWR_PVDLEVEL_6
-  *         @arg @ref LL_PWR_PVDLEVEL_7
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
-{
-  MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
-}
-
-/**
-  * @brief  Get the voltage threshold detection
-  * @rmtoll CR    PLS       LL_PWR_GetPVDLevel
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_PWR_PVDLEVEL_0
-  *         @arg @ref LL_PWR_PVDLEVEL_1
-  *         @arg @ref LL_PWR_PVDLEVEL_2
-  *         @arg @ref LL_PWR_PVDLEVEL_3
-  *         @arg @ref LL_PWR_PVDLEVEL_4
-  *         @arg @ref LL_PWR_PVDLEVEL_5
-  *         @arg @ref LL_PWR_PVDLEVEL_6
-  *         @arg @ref LL_PWR_PVDLEVEL_7
-  */
-__STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
-{
-  return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
-}
-
-/**
-  * @brief  Enable Power Voltage Detector
-  * @rmtoll CR    PVDE       LL_PWR_EnablePVD
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_EnablePVD(void)
-{
-  SET_BIT(PWR->CR, PWR_CR_PVDE);
-}
-
-/**
-  * @brief  Disable Power Voltage Detector
-  * @rmtoll CR    PVDE       LL_PWR_DisablePVD
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_DisablePVD(void)
-{
-  CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
-}
-
-/**
-  * @brief  Check if Power Voltage Detector is enabled
-  * @rmtoll CR    PVDE       LL_PWR_IsEnabledPVD
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
-{
-  return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
-}
-#endif /* PWR_PVD_SUPPORT */
-
-/**
-  * @brief  Enable the WakeUp PINx functionality
-  * @rmtoll CSR   EWUP1       LL_PWR_EnableWakeUpPin\n
-  * @rmtoll CSR   EWUP2       LL_PWR_EnableWakeUpPin\n
-  * @rmtoll CSR   EWUP3       LL_PWR_EnableWakeUpPin
-  * @param  WakeUpPin This parameter can be one of the following values:
-  *         @arg @ref LL_PWR_WAKEUP_PIN1
-  *         @arg @ref LL_PWR_WAKEUP_PIN2
-  *         @arg @ref LL_PWR_WAKEUP_PIN3 (*)
-  *
-  *         (*) not available on all devices
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
-{
-  SET_BIT(PWR->CSR, WakeUpPin);
-}
-
-/**
-  * @brief  Disable the WakeUp PINx functionality
-  * @rmtoll CSR   EWUP1       LL_PWR_DisableWakeUpPin\n
-  * @rmtoll CSR   EWUP2       LL_PWR_DisableWakeUpPin\n
-  * @rmtoll CSR   EWUP3       LL_PWR_DisableWakeUpPin
-  * @param  WakeUpPin This parameter can be one of the following values:
-  *         @arg @ref LL_PWR_WAKEUP_PIN1
-  *         @arg @ref LL_PWR_WAKEUP_PIN2
-  *         @arg @ref LL_PWR_WAKEUP_PIN3 (*)
-  *
-  *         (*) not available on all devices
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
-{
-  CLEAR_BIT(PWR->CSR, WakeUpPin);
-}
-
-/**
-  * @brief  Check if the WakeUp PINx functionality is enabled
-  * @rmtoll CSR   EWUP1       LL_PWR_IsEnabledWakeUpPin\n
-  * @rmtoll CSR   EWUP2       LL_PWR_IsEnabledWakeUpPin\n
-  * @rmtoll CSR   EWUP3       LL_PWR_IsEnabledWakeUpPin
-  * @param  WakeUpPin This parameter can be one of the following values:
-  *         @arg @ref LL_PWR_WAKEUP_PIN1
-  *         @arg @ref LL_PWR_WAKEUP_PIN2
-  *         @arg @ref LL_PWR_WAKEUP_PIN3 (*)
-  *
-  *         (*) not available on all devices
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
-{
-  return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
-}
-
-/**
-  * @brief  Enable ultra low-power mode by enabling VREFINT switch off in low-power modes
-  * @rmtoll CR    ULP       LL_PWR_EnableUltraLowPower
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_EnableUltraLowPower(void)
-{
-  SET_BIT(PWR->CR, PWR_CR_ULP);
-}
-
-/**
-  * @brief  Disable ultra low-power mode by disabling VREFINT switch off in low-power modes
-  * @rmtoll CR    ULP       LL_PWR_DisableUltraLowPower
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_DisableUltraLowPower(void)
-{
-  CLEAR_BIT(PWR->CR, PWR_CR_ULP);
-}
-
-/**
-  * @brief  Check if ultra low-power mode is enabled by checking if VREFINT switch off in low-power modes is enabled
-  * @rmtoll CR    ULP       LL_PWR_IsEnabledUltraLowPower
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledUltraLowPower(void)
-{
-  return (READ_BIT(PWR->CR, PWR_CR_ULP) == (PWR_CR_ULP));
-}
-
-/**
-  * @brief  Enable fast wakeup by ignoring VREFINT startup time when exiting from low-power mode
-  * @rmtoll CR    FWU       LL_PWR_EnableFastWakeUp
-  * @note   Works in conjunction with ultra low power mode.
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_EnableFastWakeUp(void)
-{
-  SET_BIT(PWR->CR, PWR_CR_FWU);
-}
-
-/**
-  * @brief  Disable fast wakeup by waiting VREFINT startup time when exiting from low-power mode
-  * @rmtoll CR    FWU       LL_PWR_DisableFastWakeUp
-  * @note   Works in conjunction with ultra low power mode.
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_DisableFastWakeUp(void)
-{
-  CLEAR_BIT(PWR->CR, PWR_CR_FWU);
-}
-
-/**
-  * @brief  Check if fast wakeup is enabled by checking if VREFINT startup time when exiting from low-power mode is ignored
-  * @rmtoll CR    FWU       LL_PWR_IsEnabledFastWakeUp
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledFastWakeUp(void)
-{
-  return (READ_BIT(PWR->CR, PWR_CR_FWU) == (PWR_CR_FWU));
-}
-
-/**
-  * @brief  Enable non-volatile memory (Flash and EEPROM) keeping off feature when exiting from low-power mode
-  * @rmtoll CR    DS_EE_KOFF       LL_PWR_EnableNVMKeptOff
-  * @note   When enabled, after entering low-power mode (Stop or Standby only), if RUN_PD of FLASH_ACR register
-  *         is also set, the Flash memory will not be woken up when exiting from deepsleep mode.
-  *         When enabled, the EEPROM will not be woken up when exiting from low-power mode (if the bit RUN_PD is set)
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_EnableNVMKeptOff(void)
-{
-  SET_BIT(PWR->CR, PWR_CR_DSEEKOFF);
-}
-
-/**
-  * @brief  Disable non-volatile memory (Flash and EEPROM) keeping off feature when exiting from low-power mode
-  * @rmtoll CR    DS_EE_KOFF       LL_PWR_DisableNVMKeptOff
-  * @note   When disabled, Flash memory is woken up when exiting from deepsleep mode even if the bit RUN_PD is set
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_DisableNVMKeptOff(void)
-{
-  CLEAR_BIT(PWR->CR, PWR_CR_DSEEKOFF);
-}
-
-/**
-  * @brief  Check if non-volatile memory (Flash and EEPROM) keeping off feature when exiting from low-power mode is enabled
-  * @rmtoll CR    DS_EE_KOFF       LL_PWR_IsEnabledNVMKeptOff
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledNVMKeptOff(void)
-{
-  return (READ_BIT(PWR->CR, PWR_CR_DSEEKOFF) == (PWR_CR_DSEEKOFF));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
-  * @{
-  */
-
-/**
-  * @brief  Get Wake-up Flag
-  * @rmtoll CSR   WUF       LL_PWR_IsActiveFlag_WU
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
-{
-  return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
-}
-
-/**
-  * @brief  Get Standby Flag
-  * @rmtoll CSR   SBF       LL_PWR_IsActiveFlag_SB
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
-{
-  return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
-}
-
-#if defined(PWR_PVD_SUPPORT)
-/**
-  * @brief  Indicate whether VDD voltage is below the selected PVD threshold
-  * @rmtoll CSR   PVDO       LL_PWR_IsActiveFlag_PVDO
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
-{
-  return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
-}
-#endif /* PWR_PVD_SUPPORT */
-
-#if defined(PWR_CSR_VREFINTRDYF)
-/**
-  * @brief  Get Internal Reference VrefInt Flag
-  * @rmtoll CSR   VREFINTRDYF       LL_PWR_IsActiveFlag_VREFINTRDY
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VREFINTRDY(void)
-{
-  return (READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == (PWR_CSR_VREFINTRDYF));
-}
-#endif /* PWR_CSR_VREFINTRDYF */
-/**
-  * @brief  Indicate whether the regulator is ready in the selected voltage range or if its output voltage is still changing to the required voltage level
-  * @rmtoll CSR   VOSF       LL_PWR_IsActiveFlag_VOSF
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOSF(void)
-{
-  return (READ_BIT(PWR->CSR, LL_PWR_CSR_VOS) == (LL_PWR_CSR_VOS));
-}
-/**
-  * @brief Indicate whether the regulator is ready in main mode or is in low-power mode
-  * @rmtoll CSR   REGLPF       LL_PWR_IsActiveFlag_REGLPF
-  * @note Take care, return value "0" means the regulator is ready.  Return value "1" means the output voltage range is still changing.
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPF(void)
-{
-  return (READ_BIT(PWR->CSR, PWR_CSR_REGLPF) == (PWR_CSR_REGLPF));
-}
-/**
-  * @brief  Clear Standby Flag
-  * @rmtoll CR   CSBF       LL_PWR_ClearFlag_SB
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
-{
-  SET_BIT(PWR->CR, PWR_CR_CSBF);
-}
-
-/**
-  * @brief  Clear Wake-up Flags
-  * @rmtoll CR   CWUF       LL_PWR_ClearFlag_WU
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
-{
-  SET_BIT(PWR->CR, PWR_CR_CWUF);
-}
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup PWR_LL_EF_Init De-initialization function
-  * @{
-  */
-ErrorStatus LL_PWR_DeInit(void);
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined(PWR) */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_PWR_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h
deleted file mode 100755
index 7add2fb6..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h
+++ /dev/null
@@ -1,2514 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_rcc.h
-  * @author  MCD Application Team
-  * @brief   Header file of RCC LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_RCC_H
-#define __STM32L0xx_LL_RCC_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined(RCC)
-
-/** @defgroup RCC_LL RCC
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/** @defgroup RCC_LL_Private_Variables RCC Private Variables
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup RCC_LL_Private_Constants RCC Private Constants
-  * @{
-  */
-/* Defines used for the bit position in the register and perform offsets*/
-#define RCC_POSITION_HPRE       (uint32_t)4U  /*!< field position in register RCC_CFGR */
-#define RCC_POSITION_PPRE1      (uint32_t)8U  /*!< field position in register RCC_CFGR */
-#define RCC_POSITION_PPRE2      (uint32_t)11U /*!< field position in register RCC_CFGR */
-#define RCC_POSITION_PLLDIV     (uint32_t)22U /*!< field position in register RCC_CFGR */
-#define RCC_POSITION_PLLMUL     (uint32_t)18U /*!< field position in register RCC_CFGR */
-#define RCC_POSITION_HSICAL     (uint32_t)0U  /*!< field position in register RCC_ICSCR */
-#define RCC_POSITION_HSITRIM    (uint32_t)8U  /*!< field position in register RCC_ICSCR */
-#define RCC_POSITION_MSIRANGE   (uint32_t)13U /*!< field position in register RCC_ICSCR */
-#define RCC_POSITION_MSICAL     (uint32_t)16U /*!< field position in register RCC_ICSCR */
-#define RCC_POSITION_MSITRIM    (uint32_t)24U /*!< field position in register RCC_ICSCR */
-#if defined(RCC_HSI48_SUPPORT)
-#define RCC_POSITION_HSI48CAL   (uint32_t)8U  /*!< field position in register RCC_CRRCR */
-#endif /* RCC_HSI48_SUPPORT */
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup RCC_LL_Private_Macros RCC Private Macros
-  * @{
-  */
-/**
-  * @}
-  */
-#endif /*USE_FULL_LL_DRIVER*/
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup RCC_LL_Exported_Types RCC Exported Types
-  * @{
-  */
-
-/** @defgroup LL_ES_CLOCK_FREQ Clocks Frequency Structure
-  * @{
-  */
-
-/**
-  * @brief  RCC Clocks Frequency Structure
-  */
-typedef struct
-{
-  uint32_t SYSCLK_Frequency;        /*!< SYSCLK clock frequency */
-  uint32_t HCLK_Frequency;          /*!< HCLK clock frequency */
-  uint32_t PCLK1_Frequency;         /*!< PCLK1 clock frequency */
-  uint32_t PCLK2_Frequency;         /*!< PCLK2 clock frequency */
-} LL_RCC_ClocksTypeDef;
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup RCC_LL_Exported_Constants RCC Exported Constants
-  * @{
-  */
-
-/** @defgroup RCC_LL_EC_OSC_VALUES Oscillator Values adaptation
-  * @brief    Defines used to adapt values of different oscillators
-  * @note     These values could be modified in the user environment according to
-  *           HW set-up.
-  * @{
-  */
-#if !defined  (HSE_VALUE)
-#define HSE_VALUE    ((uint32_t)8000000U)  /*!< Value of the HSE oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSI_VALUE)
-#define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the HSI oscillator in Hz */
-#endif /* HSI_VALUE */
-
-#if !defined  (LSE_VALUE)
-#define LSE_VALUE    ((uint32_t)32768U)    /*!< Value of the LSE oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSI_VALUE)
-#define LSI_VALUE    ((uint32_t)37000U)    /*!< Value of the LSI oscillator in Hz */
-#endif /* LSI_VALUE */
-#if defined(RCC_HSI48_SUPPORT)
-
-#if !defined  (HSI48_VALUE)
-#define HSI48_VALUE  ((uint32_t)48000000U) /*!< Value of the HSI48 oscillator in Hz */
-#endif /* HSI48_VALUE */
-#endif /* RCC_HSI48_SUPPORT */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_CLEAR_FLAG Clear Flags Defines
-  * @brief    Flags defines which can be used with LL_RCC_WriteReg function
-  * @{
-  */
-#define LL_RCC_CICR_LSIRDYC                RCC_CICR_LSIRDYC     /*!< LSI Ready Interrupt Clear */
-#define LL_RCC_CICR_LSERDYC                RCC_CICR_LSERDYC     /*!< LSE Ready Interrupt Clear */
-#define LL_RCC_CICR_HSIRDYC                RCC_CICR_HSIRDYC     /*!< HSI Ready Interrupt Clear */
-#define LL_RCC_CICR_HSERDYC                RCC_CICR_HSERDYC     /*!< HSE Ready Interrupt Clear */
-#define LL_RCC_CICR_PLLRDYC                RCC_CICR_PLLRDYC     /*!< PLL Ready Interrupt Clear */
-#define LL_RCC_CICR_MSIRDYC                RCC_CICR_MSIRDYC     /*!< MSI Ready Interrupt Clear */
-#if defined(RCC_HSI48_SUPPORT)
-#define LL_RCC_CICR_HSI48RDYC               RCC_CICR_HSI48RDYC  /*!< HSI48 Ready Interrupt Clear */
-#endif /* RCC_HSI48_SUPPORT */
-#define LL_RCC_CICR_LSECSSC                RCC_CICR_LSECSSC     /*!< LSE Clock Security System Interrupt Clear */
-#define LL_RCC_CICR_CSSC                   RCC_CICR_CSSC        /*!< Clock Security System Interrupt Clear */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_GET_FLAG Get Flags Defines
-  * @brief    Flags defines which can be used with LL_RCC_ReadReg function
-  * @{
-  */
-#define LL_RCC_CIFR_LSIRDYF                RCC_CIFR_LSIRDYF     /*!< LSI Ready Interrupt flag */
-#define LL_RCC_CIFR_LSERDYF                RCC_CIFR_LSERDYF     /*!< LSE Ready Interrupt flag */
-#define LL_RCC_CIFR_HSIRDYF                RCC_CIFR_HSIRDYF     /*!< HSI Ready Interrupt flag */
-#define LL_RCC_CIFR_HSERDYF                RCC_CIFR_HSERDYF     /*!< HSE Ready Interrupt flag */
-#define LL_RCC_CIFR_PLLRDYF                RCC_CIFR_PLLRDYF     /*!< PLL Ready Interrupt flag */
-#define LL_RCC_CIFR_MSIRDYF                RCC_CIFR_MSIRDYF     /*!< MSI Ready Interrupt flag */
-#if defined(RCC_HSI48_SUPPORT)
-#define LL_RCC_CIFR_HSI48RDYF               RCC_CIFR_HSI48RDYF  /*!< HSI48 Ready Interrupt flag */
-#endif /* RCC_HSI48_SUPPORT */
-#define LL_RCC_CIFR_LSECSSF                RCC_CIFR_LSECSSF    /*!< LSE Clock Security System Interrupt flag */
-#define LL_RCC_CIFR_CSSF                   RCC_CIFR_CSSF       /*!< Clock Security System Interrupt flag */
-#define LL_RCC_CSR_FWRSTF                 RCC_CSR_FWRSTF          /*!< Firewall reset flag */
-#define LL_RCC_CSR_OBLRSTF                RCC_CSR_OBLRSTF         /*!< OBL reset flag */
-#define LL_RCC_CSR_PINRSTF                RCC_CSR_PINRSTF         /*!< PIN reset flag */
-#define LL_RCC_CSR_PORRSTF                RCC_CSR_PORRSTF         /*!< POR/PDR reset flag */
-#define LL_RCC_CSR_SFTRSTF                RCC_CSR_SFTRSTF         /*!< Software Reset flag */
-#define LL_RCC_CSR_IWDGRSTF               RCC_CSR_IWDGRSTF        /*!< Independent Watchdog reset flag */
-#define LL_RCC_CSR_WWDGRSTF               RCC_CSR_WWDGRSTF        /*!< Window watchdog reset flag */
-#define LL_RCC_CSR_LPWRRSTF               RCC_CSR_LPWRRSTF        /*!< Low-Power reset flag */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_IT IT Defines
-  * @brief    IT defines which can be used with LL_RCC_ReadReg and  LL_RCC_WriteReg functions
-  * @{
-  */
-#define LL_RCC_CIER_LSIRDYIE               RCC_CIER_LSIRDYIE      /*!< LSI Ready Interrupt Enable */
-#define LL_RCC_CIER_LSERDYIE               RCC_CIER_LSERDYIE      /*!< LSE Ready Interrupt Enable */
-#define LL_RCC_CIER_HSIRDYIE               RCC_CIER_HSIRDYIE      /*!< HSI Ready Interrupt Enable */
-#define LL_RCC_CIER_HSERDYIE               RCC_CIER_HSERDYIE      /*!< HSE Ready Interrupt Enable */
-#define LL_RCC_CIER_PLLRDYIE               RCC_CIER_PLLRDYIE      /*!< PLL Ready Interrupt Enable */
-#define LL_RCC_CIER_MSIRDYIE               RCC_CIER_MSIRDYIE      /*!< MSI Ready Interrupt Enable */
-#if defined(RCC_HSI48_SUPPORT)
-#define LL_RCC_CIER_HSI48RDYIE              RCC_CIER_HSI48RDYIE   /*!< HSI48 Ready Interrupt Enable */
-#endif /* RCC_HSI48_SUPPORT */
-#define LL_RCC_CIER_LSECSSIE               RCC_CIER_LSECSSIE      /*!< LSE CSS Interrupt Enable */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_LSEDRIVE  LSE oscillator drive capability
-  * @{
-  */
-#define LL_RCC_LSEDRIVE_LOW                ((uint32_t)0x00000000U) /*!< Xtal mode lower driving capability */
-#define LL_RCC_LSEDRIVE_MEDIUMLOW          RCC_CSR_LSEDRV_0 /*!< Xtal mode medium low driving capability */
-#define LL_RCC_LSEDRIVE_MEDIUMHIGH         RCC_CSR_LSEDRV_1 /*!< Xtal mode medium high driving capability */
-#define LL_RCC_LSEDRIVE_HIGH               RCC_CSR_LSEDRV   /*!< Xtal mode higher driving capability */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_RTC_HSE_DIV RTC HSE Prescaler
-  * @{
-  */
-#define LL_RCC_RTC_HSE_DIV_2               (uint32_t)0x00000000U/*!< HSE is divided by 2 for RTC clock  */
-#define LL_RCC_RTC_HSE_DIV_4               RCC_CR_RTCPRE_0      /*!< HSE is divided by 4 for RTC clock  */
-#define LL_RCC_RTC_HSE_DIV_8               RCC_CR_RTCPRE_1      /*!< HSE is divided by 8 for RTC clock  */
-#define LL_RCC_RTC_HSE_DIV_16              RCC_CR_RTCPRE        /*!< HSE is divided by 16 for RTC clock */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_MSIRANGE  MSI clock ranges
-  * @{
-  */
-#define LL_RCC_MSIRANGE_0                  RCC_ICSCR_MSIRANGE_0  /*!< MSI = 65.536 KHz */
-#define LL_RCC_MSIRANGE_1                  RCC_ICSCR_MSIRANGE_1  /*!< MSI = 131.072 KHz*/
-#define LL_RCC_MSIRANGE_2                  RCC_ICSCR_MSIRANGE_2  /*!< MSI = 262.144 KHz */
-#define LL_RCC_MSIRANGE_3                  RCC_ICSCR_MSIRANGE_3  /*!< MSI = 524.288 KHz */
-#define LL_RCC_MSIRANGE_4                  RCC_ICSCR_MSIRANGE_4  /*!< MSI = 1.048 MHz */
-#define LL_RCC_MSIRANGE_5                  RCC_ICSCR_MSIRANGE_5  /*!< MSI = 2.097 MHz */
-#define LL_RCC_MSIRANGE_6                  RCC_ICSCR_MSIRANGE_6  /*!< MSI = 4.194 MHz */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_SYS_CLKSOURCE  System clock switch
-  * @{
-  */
-#define LL_RCC_SYS_CLKSOURCE_MSI           RCC_CFGR_SW_MSI    /*!< MSI selection as system clock */
-#define LL_RCC_SYS_CLKSOURCE_HSI           RCC_CFGR_SW_HSI    /*!< HSI selection as system clock */
-#define LL_RCC_SYS_CLKSOURCE_HSE           RCC_CFGR_SW_HSE    /*!< HSE selection as system clock */
-#define LL_RCC_SYS_CLKSOURCE_PLL           RCC_CFGR_SW_PLL    /*!< PLL selection as system clock */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_SYS_CLKSOURCE_STATUS  System clock switch status
-  * @{
-  */
-#define LL_RCC_SYS_CLKSOURCE_STATUS_MSI    RCC_CFGR_SWS_MSI   /*!< MSI used as system clock */
-#define LL_RCC_SYS_CLKSOURCE_STATUS_HSI    RCC_CFGR_SWS_HSI   /*!< HSI used as system clock */
-#define LL_RCC_SYS_CLKSOURCE_STATUS_HSE    RCC_CFGR_SWS_HSE   /*!< HSE used as system clock */
-#define LL_RCC_SYS_CLKSOURCE_STATUS_PLL    RCC_CFGR_SWS_PLL   /*!< PLL used as system clock */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_SYSCLK_DIV  AHB prescaler
-  * @{
-  */
-#define LL_RCC_SYSCLK_DIV_1                RCC_CFGR_HPRE_DIV1   /*!< SYSCLK not divided */
-#define LL_RCC_SYSCLK_DIV_2                RCC_CFGR_HPRE_DIV2   /*!< SYSCLK divided by 2 */
-#define LL_RCC_SYSCLK_DIV_4                RCC_CFGR_HPRE_DIV4   /*!< SYSCLK divided by 4 */
-#define LL_RCC_SYSCLK_DIV_8                RCC_CFGR_HPRE_DIV8   /*!< SYSCLK divided by 8 */
-#define LL_RCC_SYSCLK_DIV_16               RCC_CFGR_HPRE_DIV16  /*!< SYSCLK divided by 16 */
-#define LL_RCC_SYSCLK_DIV_64               RCC_CFGR_HPRE_DIV64  /*!< SYSCLK divided by 64 */
-#define LL_RCC_SYSCLK_DIV_128              RCC_CFGR_HPRE_DIV128 /*!< SYSCLK divided by 128 */
-#define LL_RCC_SYSCLK_DIV_256              RCC_CFGR_HPRE_DIV256 /*!< SYSCLK divided by 256 */
-#define LL_RCC_SYSCLK_DIV_512              RCC_CFGR_HPRE_DIV512 /*!< SYSCLK divided by 512 */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_APB1_DIV  APB low-speed prescaler (APB1)
-  * @{
-  */
-#define LL_RCC_APB1_DIV_1                  RCC_CFGR_PPRE1_DIV1  /*!< HCLK not divided */
-#define LL_RCC_APB1_DIV_2                  RCC_CFGR_PPRE1_DIV2  /*!< HCLK divided by 2 */
-#define LL_RCC_APB1_DIV_4                  RCC_CFGR_PPRE1_DIV4  /*!< HCLK divided by 4 */
-#define LL_RCC_APB1_DIV_8                  RCC_CFGR_PPRE1_DIV8  /*!< HCLK divided by 8 */
-#define LL_RCC_APB1_DIV_16                 RCC_CFGR_PPRE1_DIV16 /*!< HCLK divided by 16 */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_APB2_DIV  APB high-speed prescaler (APB2)
-  * @{
-  */
-#define LL_RCC_APB2_DIV_1                  RCC_CFGR_PPRE2_DIV1  /*!< HCLK not divided */
-#define LL_RCC_APB2_DIV_2                  RCC_CFGR_PPRE2_DIV2  /*!< HCLK divided by 2 */
-#define LL_RCC_APB2_DIV_4                  RCC_CFGR_PPRE2_DIV4  /*!< HCLK divided by 4 */
-#define LL_RCC_APB2_DIV_8                  RCC_CFGR_PPRE2_DIV8  /*!< HCLK divided by 8 */
-#define LL_RCC_APB2_DIV_16                 RCC_CFGR_PPRE2_DIV16 /*!< HCLK divided by 16 */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_STOP_WAKEUPCLOCK  Wakeup from Stop and CSS backup clock selection
-  * @{
-  */
-#define LL_RCC_STOP_WAKEUPCLOCK_MSI        ((uint32_t)0x00000000U) /*!< MSI selection after wake-up from STOP */
-#define LL_RCC_STOP_WAKEUPCLOCK_HSI        RCC_CFGR_STOPWUCK       /*!< HSI selection after wake-up from STOP */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_MCO1SOURCE  MCO1 SOURCE selection
-  * @{
-  */
-#define LL_RCC_MCO1SOURCE_NOCLOCK          RCC_CFGR_MCOSEL_NOCLOCK      /*!< MCO output disabled, no clock on MCO */
-#define LL_RCC_MCO1SOURCE_SYSCLK           RCC_CFGR_MCOSEL_SYSCLK       /*!< SYSCLK selection as MCO source */
-#define LL_RCC_MCO1SOURCE_HSI              RCC_CFGR_MCOSEL_HSI          /*!< HSI selection as MCO source */
-#define LL_RCC_MCO1SOURCE_MSI              RCC_CFGR_MCOSEL_MSI          /*!< MSI selection as MCO source */
-#define LL_RCC_MCO1SOURCE_HSE              RCC_CFGR_MCOSEL_HSE          /*!< HSE selection as MCO source */
-#define LL_RCC_MCO1SOURCE_LSI              RCC_CFGR_MCOSEL_LSI          /*!< LSI selection as MCO source */
-#define LL_RCC_MCO1SOURCE_LSE              RCC_CFGR_MCOSEL_LSE          /*!< LSE selection as MCO source */
-#if defined(RCC_CFGR_MCOSEL_HSI48)
-#define LL_RCC_MCO1SOURCE_HSI48            RCC_CFGR_MCOSEL_HSI48        /*!< HSI48 selection as MCO source */
-#endif /* RCC_CFGR_MCOSEL_HSI48 */
-#define LL_RCC_MCO1SOURCE_PLLCLK           RCC_CFGR_MCOSEL_PLL          /*!< PLLCLK selection as MCO source */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_MCO1_DIV  MCO1 prescaler
-  * @{
-  */
-#define LL_RCC_MCO1_DIV_1                  RCC_CFGR_MCOPRE_DIV1  /*!< MCO Clock divided by 1  */
-#define LL_RCC_MCO1_DIV_2                  RCC_CFGR_MCOPRE_DIV2  /*!< MCO Clock divided by 2  */
-#define LL_RCC_MCO1_DIV_4                  RCC_CFGR_MCOPRE_DIV4  /*!< MCO Clock divided by 4  */
-#define LL_RCC_MCO1_DIV_8                  RCC_CFGR_MCOPRE_DIV8  /*!< MCO Clock divided by 8  */
-#define LL_RCC_MCO1_DIV_16                 RCC_CFGR_MCOPRE_DIV16 /*!< MCO Clock divided by 16 */
-/**
-  * @}
-  */
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup RCC_LL_EC_PERIPH_FREQUENCY Peripheral clock frequency
-  * @{
-  */
-#define LL_RCC_PERIPH_FREQUENCY_NO         (uint32_t)0x00000000U      /*!< No clock enabled for the peripheral            */
-#define LL_RCC_PERIPH_FREQUENCY_NA         (uint32_t)0xFFFFFFFFU      /*!< Frequency cannot be provided as external clock */
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/** @defgroup RCC_LL_EC_USART1_CLKSOURCE  Peripheral USART clock source selection
-  * @{
-  */
-#if defined(RCC_CCIPR_USART1SEL)
-#define LL_RCC_USART1_CLKSOURCE_PCLK2      (uint32_t)((RCC_CCIPR_USART1SEL << 16U) | 0x00000000U)             /*!< PCLK2 selected as USART1 clock */
-#define LL_RCC_USART1_CLKSOURCE_SYSCLK     (uint32_t)((RCC_CCIPR_USART1SEL << 16U) | RCC_CCIPR_USART1SEL_0)   /*!< SYSCLK selected as USART1 clock */
-#define LL_RCC_USART1_CLKSOURCE_HSI        (uint32_t)((RCC_CCIPR_USART1SEL << 16U) | RCC_CCIPR_USART1SEL_1)   /*!< HSI selected as USART1 clock */
-#define LL_RCC_USART1_CLKSOURCE_LSE        (uint32_t)((RCC_CCIPR_USART1SEL << 16U) | RCC_CCIPR_USART1SEL)     /*!< LSE selected as USART1 clock*/
-#endif /* RCC_CCIPR_USART1SEL */
-#define LL_RCC_USART2_CLKSOURCE_PCLK1      (uint32_t)((RCC_CCIPR_USART2SEL << 16U) | 0x00000000U)             /*!< PCLK1 selected as USART2 clock */
-#define LL_RCC_USART2_CLKSOURCE_SYSCLK     (uint32_t)((RCC_CCIPR_USART2SEL << 16U) | RCC_CCIPR_USART2SEL_0)   /*!< SYSCLK selected as USART2 clock */
-#define LL_RCC_USART2_CLKSOURCE_HSI        (uint32_t)((RCC_CCIPR_USART2SEL << 16U) | RCC_CCIPR_USART2SEL_1)   /*!< HSI selected as USART2 clock */
-#define LL_RCC_USART2_CLKSOURCE_LSE        (uint32_t)((RCC_CCIPR_USART2SEL << 16U) | RCC_CCIPR_USART2SEL)     /*!< LSE selected as USART2 clock*/
-/**
-  * @}
-  */
-
-
-
-/** @defgroup RCC_LL_EC_LPUART1_CLKSOURCE  Peripheral LPUART clock source selection
-  * @{
-  */
-#define LL_RCC_LPUART1_CLKSOURCE_PCLK1     (uint32_t)0x00000000U   /*!< PCLK1 selected as LPUART1 clock */
-#define LL_RCC_LPUART1_CLKSOURCE_SYSCLK    RCC_CCIPR_LPUART1SEL_0  /*!< SYSCLK selected as LPUART1 clock */
-#define LL_RCC_LPUART1_CLKSOURCE_HSI       RCC_CCIPR_LPUART1SEL_1  /*!< HSI selected as LPUART1 clock */
-#define LL_RCC_LPUART1_CLKSOURCE_LSE       RCC_CCIPR_LPUART1SEL    /*!< LSE selected as LPUART1 clock*/
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_I2C1_CLKSOURCE  Peripheral I2C clock source selection
-  * @{
-  */
-#define LL_RCC_I2C1_CLKSOURCE_PCLK1        (uint32_t)((RCC_CCIPR_I2C1SEL << 4U) | (0x00000000U >> 4U))           /*!< PCLK1 selected as I2C1 clock */
-#define LL_RCC_I2C1_CLKSOURCE_SYSCLK       (uint32_t)((RCC_CCIPR_I2C1SEL << 4U) | (RCC_CCIPR_I2C1SEL_0 >> 4U))  /*!< SYSCLK selected as I2C1 clock */
-#define LL_RCC_I2C1_CLKSOURCE_HSI          (uint32_t)((RCC_CCIPR_I2C1SEL << 4U) | (RCC_CCIPR_I2C1SEL_1 >> 4U))  /*!< HSI selected as I2C1 clock */
-#if defined(RCC_CCIPR_I2C3SEL)
-#define LL_RCC_I2C3_CLKSOURCE_PCLK1        (uint32_t)((RCC_CCIPR_I2C3SEL << 4U) | (0x00000000U >> 4U))           /*!< PCLK1 selected as I2C3 clock */
-#define LL_RCC_I2C3_CLKSOURCE_SYSCLK       (uint32_t)((RCC_CCIPR_I2C3SEL << 4U) | (RCC_CCIPR_I2C3SEL_0 >> 4U))  /*!< SYSCLK selected as I2C3 clock */
-#define LL_RCC_I2C3_CLKSOURCE_HSI          (uint32_t)((RCC_CCIPR_I2C3SEL << 4U) | (RCC_CCIPR_I2C3SEL_1 >> 4U))  /*!< HSI selected as I2C3 clock */
-#endif /*RCC_CCIPR_I2C3SEL*/
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_LPTIM1_CLKSOURCE  Peripheral LPTIM clock source selection
-  * @{
-  */
-#define LL_RCC_LPTIM1_CLKSOURCE_PCLK1      (uint32_t)(0x00000000U)          /*!< PCLK1 selected as LPTIM1 clock */
-#define LL_RCC_LPTIM1_CLKSOURCE_LSI        (uint32_t)RCC_CCIPR_LPTIM1SEL_0  /*!< LSI selected as LPTIM1 clock */
-#define LL_RCC_LPTIM1_CLKSOURCE_HSI        (uint32_t)RCC_CCIPR_LPTIM1SEL_1  /*!< HSI selected as LPTIM1 clock */
-#define LL_RCC_LPTIM1_CLKSOURCE_LSE        (uint32_t)RCC_CCIPR_LPTIM1SEL    /*!< LSE selected as LPTIM1 clock*/
-/**
-  * @}
-  */
-
-#if defined(RCC_CCIPR_HSI48SEL)
-
-#if defined(RNG)
-/** @defgroup RCC_LL_EC_RNG_CLKSOURCE  Peripheral RNG clock source selection
-  * @{
-  */
-#define LL_RCC_RNG_CLKSOURCE_PLL           (uint32_t)(0x00000000U)          /*!< PLL selected as RNG clock */
-#define LL_RCC_RNG_CLKSOURCE_HSI48         (uint32_t)(RCC_CCIPR_HSI48SEL)   /*!< HSI48 selected as RNG clock*/
-/**
-  * @}
-  */
-#endif /* RNG */
-#if defined(USB)
-/** @defgroup RCC_LL_EC_USB_CLKSOURCE  Peripheral USB clock source selection
-  * @{
-  */
-#define LL_RCC_USB_CLKSOURCE_PLL           (uint32_t)(0x00000000U)          /*!< PLL selected as USB clock */
-#define LL_RCC_USB_CLKSOURCE_HSI48         (uint32_t)(RCC_CCIPR_HSI48SEL)   /*!< HSI48 selected as USB clock*/
-/**
-  * @}
-  */
-
-#endif /* USB */
-#endif /* RCC_CCIPR_HSI48SEL */
-
-
-/** @defgroup RCC_LL_EC_USART1 Peripheral USART get clock source
-  * @{
-  */
-#if defined(RCC_CCIPR_USART1SEL)
-#define LL_RCC_USART1_CLKSOURCE            RCC_CCIPR_USART1SEL    /*!< USART1 clock source selection bits */
-#endif /* RCC_CCIPR_USART1SEL */
-#define LL_RCC_USART2_CLKSOURCE            RCC_CCIPR_USART2SEL    /*!< USART2 clock source selection bits */
-/**
-  * @}
-  */
-
-
-/** @defgroup RCC_LL_EC_LPUART1 Peripheral LPUART get clock source
-  * @{
-  */
-#define LL_RCC_LPUART1_CLKSOURCE           RCC_CCIPR_LPUART1SEL   /*!< LPUART1 clock source selection bits */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_I2C1 Peripheral I2C get clock source
-  * @{
-  */
-#define LL_RCC_I2C1_CLKSOURCE              RCC_CCIPR_I2C1SEL   /*!< I2C1 clock source selection bits */
-#if defined(RCC_CCIPR_I2C3SEL)
-#define LL_RCC_I2C3_CLKSOURCE              RCC_CCIPR_I2C3SEL   /*!< I2C3 clock source selection bits */
-#endif /*RCC_CCIPR_I2C3SEL*/
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_LPTIM1 Peripheral LPTIM get clock source
-  * @{
-  */
-#define LL_RCC_LPTIM1_CLKSOURCE            RCC_CCIPR_LPTIM1SEL  /*!< LPTIM1 clock source selection bits */
-/**
-  * @}
-  */
-
-#if defined(RCC_CCIPR_HSI48SEL)
-#if defined(RNG)
-/** @defgroup RCC_LL_EC_RNG  Peripheral RNG get clock source
-  * @{
-  */
-#define LL_RCC_RNG_CLKSOURCE               RCC_CCIPR_HSI48SEL   /*!< HSI48 RC clock source selection bit for RNG*/
-/**
-  * @}
-  */
-#endif /* RNG */
-
-#if defined(USB)
-/** @defgroup RCC_LL_EC_USB  Peripheral USB get clock source
-  * @{
-  */
-#define LL_RCC_USB_CLKSOURCE               RCC_CCIPR_HSI48SEL  /*!< HSI48 RC clock source selection bit for USB*/
-/**
-  * @}
-  */
-
-#endif /* USB */
-#endif /* RCC_CCIPR_HSI48SEL */
-
-/** @defgroup RCC_LL_EC_RTC_CLKSOURCE  RTC clock source selection
-  * @{
-  */
-#define LL_RCC_RTC_CLKSOURCE_NONE          (uint32_t)0x00000000U         /*!< No clock used as RTC clock */
-#define LL_RCC_RTC_CLKSOURCE_LSE           RCC_CSR_RTCSEL_LSE            /*!< LSE oscillator clock used as RTC clock */
-#define LL_RCC_RTC_CLKSOURCE_LSI           RCC_CSR_RTCSEL_LSI            /*!< LSI oscillator clock used as RTC clock */
-#define LL_RCC_RTC_CLKSOURCE_HSE           RCC_CSR_RTCSEL_HSE            /*!< HSE oscillator clock divided by a programmable prescaler 
-                                                                             (selection through @ref LL_RCC_SetRTC_HSEPrescaler function ) */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_PLL_MUL PLL Multiplicator factor
-  * @{
-  */
-#define LL_RCC_PLL_MUL_3                   RCC_CFGR_PLLMUL3  /*!< PLL input clock * 3  */
-#define LL_RCC_PLL_MUL_4                   RCC_CFGR_PLLMUL4  /*!< PLL input clock * 4  */
-#define LL_RCC_PLL_MUL_6                   RCC_CFGR_PLLMUL6  /*!< PLL input clock * 6  */
-#define LL_RCC_PLL_MUL_8                   RCC_CFGR_PLLMUL8  /*!< PLL input clock * 8  */
-#define LL_RCC_PLL_MUL_12                  RCC_CFGR_PLLMUL12 /*!< PLL input clock * 12 */
-#define LL_RCC_PLL_MUL_16                  RCC_CFGR_PLLMUL16 /*!< PLL input clock * 16 */
-#define LL_RCC_PLL_MUL_24                  RCC_CFGR_PLLMUL24 /*!< PLL input clock * 24 */
-#define LL_RCC_PLL_MUL_32                  RCC_CFGR_PLLMUL32 /*!< PLL input clock * 32 */
-#define LL_RCC_PLL_MUL_48                  RCC_CFGR_PLLMUL48 /*!< PLL input clock * 48 */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_PLL_DIV PLL division factor
-  * @{
-  */
-#define LL_RCC_PLL_DIV_2                   RCC_CFGR_PLLDIV2 /*!< PLL clock output = PLLVCO / 2 */
-#define LL_RCC_PLL_DIV_3                   RCC_CFGR_PLLDIV3 /*!< PLL clock output = PLLVCO / 3 */
-#define LL_RCC_PLL_DIV_4                   RCC_CFGR_PLLDIV4 /*!< PLL clock output = PLLVCO / 4 */
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EC_PLLSOURCE PLL SOURCE
-  * @{
-  */
-#define LL_RCC_PLLSOURCE_HSI               RCC_CFGR_PLLSRC_HSI                           /*!< HSI clock selected as PLL entry clock source */
-#define LL_RCC_PLLSOURCE_HSE               RCC_CFGR_PLLSRC_HSE                           /*!< HSE clock selected as PLL entry clock source */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup RCC_LL_Exported_Macros RCC Exported Macros
-  * @{
-  */
-
-/** @defgroup RCC_LL_EM_WRITE_READ Common Write and read registers Macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in RCC register
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_RCC_WriteReg(__REG__, __VALUE__) WRITE_REG(RCC->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in RCC register
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_RCC_ReadReg(__REG__) READ_REG(RCC->__REG__)
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EM_CALC_FREQ Calculate frequencies
-  * @{
-  */
-
-/**
-  * @brief  Helper macro to calculate the PLLCLK frequency
-  * @note ex: @ref __LL_RCC_CALC_PLLCLK_FREQ (HSE_VALUE,
-  *                                      @ref LL_RCC_PLL_GetMultiplicator (),
-  *                                      @ref LL_RCC_PLL_GetDivider ());
-  * @param  __INPUTFREQ__ PLL Input frequency (based on MSI/HSE/HSI)
-  * @param  __PLLMUL__ This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_PLL_MUL_3
-  *         @arg @ref LL_RCC_PLL_MUL_4
-  *         @arg @ref LL_RCC_PLL_MUL_6
-  *         @arg @ref LL_RCC_PLL_MUL_8
-  *         @arg @ref LL_RCC_PLL_MUL_12
-  *         @arg @ref LL_RCC_PLL_MUL_16
-  *         @arg @ref LL_RCC_PLL_MUL_24
-  *         @arg @ref LL_RCC_PLL_MUL_32
-  *         @arg @ref LL_RCC_PLL_MUL_48
-  * @param  __PLLDIV__ This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_PLL_DIV_2
-  *         @arg @ref LL_RCC_PLL_DIV_3
-  *         @arg @ref LL_RCC_PLL_DIV_4
-  * @retval PLL clock frequency (in Hz)
-  */
-#define __LL_RCC_CALC_PLLCLK_FREQ(__INPUTFREQ__, __PLLMUL__,  __PLLDIV__) ((__INPUTFREQ__) * (PLLMulTable[(__PLLMUL__) >> RCC_POSITION_PLLMUL]) / (((__PLLDIV__) >> RCC_POSITION_PLLDIV)+1U))
-
-/**
-  * @brief  Helper macro to calculate the HCLK frequency
-  * @note: __AHBPRESCALER__ be retrieved by @ref LL_RCC_GetAHBPrescaler
-  *        ex: __LL_RCC_CALC_HCLK_FREQ(LL_RCC_GetAHBPrescaler())
-  * @param  __SYSCLKFREQ__ SYSCLK frequency (based on MSI/HSE/HSI/PLLCLK)
-  * @param  __AHBPRESCALER__: This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_SYSCLK_DIV_1
-  *         @arg @ref LL_RCC_SYSCLK_DIV_2
-  *         @arg @ref LL_RCC_SYSCLK_DIV_4
-  *         @arg @ref LL_RCC_SYSCLK_DIV_8
-  *         @arg @ref LL_RCC_SYSCLK_DIV_16
-  *         @arg @ref LL_RCC_SYSCLK_DIV_64
-  *         @arg @ref LL_RCC_SYSCLK_DIV_128
-  *         @arg @ref LL_RCC_SYSCLK_DIV_256
-  *         @arg @ref LL_RCC_SYSCLK_DIV_512
-  * @retval HCLK clock frequency (in Hz)
-  */
-#define __LL_RCC_CALC_HCLK_FREQ(__SYSCLKFREQ__, __AHBPRESCALER__) ((__SYSCLKFREQ__) >> AHBPrescTable[((__AHBPRESCALER__) & RCC_CFGR_HPRE) >>  RCC_POSITION_HPRE])
-
-/**
-  * @brief  Helper macro to calculate the PCLK1 frequency (ABP1)
-  * @note: __APB1PRESCALER__ be retrieved by @ref LL_RCC_GetAPB1Prescaler
-  *        ex: __LL_RCC_CALC_PCLK1_FREQ(LL_RCC_GetAPB1Prescaler())
-  * @param  __HCLKFREQ__ HCLK frequency
-  * @param  __APB1PRESCALER__: This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_APB1_DIV_1
-  *         @arg @ref LL_RCC_APB1_DIV_2
-  *         @arg @ref LL_RCC_APB1_DIV_4
-  *         @arg @ref LL_RCC_APB1_DIV_8
-  *         @arg @ref LL_RCC_APB1_DIV_16
-  * @retval PCLK1 clock frequency (in Hz)
-  */
-#define __LL_RCC_CALC_PCLK1_FREQ(__HCLKFREQ__, __APB1PRESCALER__) ((__HCLKFREQ__) >> APBPrescTable[(__APB1PRESCALER__) >>  RCC_POSITION_PPRE1])
-
-/**
-  * @brief  Helper macro to calculate the PCLK2 frequency (ABP2)
-  * @note: __APB2PRESCALER__ be retrieved by @ref LL_RCC_GetAPB2Prescaler
-  *        ex: __LL_RCC_CALC_PCLK2_FREQ(LL_RCC_GetAPB2Prescaler())
-  * @param  __HCLKFREQ__ HCLK frequency
-  * @param  __APB2PRESCALER__: This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_APB2_DIV_1
-  *         @arg @ref LL_RCC_APB2_DIV_2
-  *         @arg @ref LL_RCC_APB2_DIV_4
-  *         @arg @ref LL_RCC_APB2_DIV_8
-  *         @arg @ref LL_RCC_APB2_DIV_16
-  * @retval PCLK2 clock frequency (in Hz)
-  */
-#define __LL_RCC_CALC_PCLK2_FREQ(__HCLKFREQ__, __APB2PRESCALER__) ((__HCLKFREQ__) >> APBPrescTable[(__APB2PRESCALER__) >>  RCC_POSITION_PPRE2])
-
-/**
-  * @brief  Helper macro to calculate the MSI frequency (in Hz)
-  * @note: __MSIRANGE__can be retrieved by @ref LL_RCC_MSI_GetRange
-  *        ex: __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_GetRange())
-  * @param  __MSIRANGE__: This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_MSIRANGE_0
-  *         @arg @ref LL_RCC_MSIRANGE_1
-  *         @arg @ref LL_RCC_MSIRANGE_2
-  *         @arg @ref LL_RCC_MSIRANGE_3
-  *         @arg @ref LL_RCC_MSIRANGE_4
-  *         @arg @ref LL_RCC_MSIRANGE_5
-  *         @arg @ref LL_RCC_MSIRANGE_6
-  * @retval MSI clock frequency (in Hz)
-  */
-#define __LL_RCC_CALC_MSI_FREQ(__MSIRANGE__) ((32768U * ( 1U << (((__MSIRANGE__) >> RCC_POSITION_MSIRANGE) + 1U))))
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup RCC_LL_Exported_Functions RCC Exported Functions
-  * @{
-  */
-
-/** @defgroup RCC_LL_EF_HSE HSE
-  * @{
-  */
-
-#if defined(RCC_HSECSS_SUPPORT)
-/**
-  * @brief  Enable the Clock Security System.
-  * @rmtoll CR           CSSHSEON         LL_RCC_HSE_EnableCSS
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSE_EnableCSS(void)
-{
-  SET_BIT(RCC->CR, RCC_CR_CSSON);
-}
-#endif /* RCC_HSECSS_SUPPORT */
-
-/**
-  * @brief  Enable HSE external oscillator (HSE Bypass)
-  * @rmtoll CR           HSEBYP        LL_RCC_HSE_EnableBypass
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSE_EnableBypass(void)
-{
-  SET_BIT(RCC->CR, RCC_CR_HSEBYP);
-}
-
-/**
-  * @brief  Disable HSE external oscillator (HSE Bypass)
-  * @rmtoll CR           HSEBYP        LL_RCC_HSE_DisableBypass
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSE_DisableBypass(void)
-{
-  CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
-}
-
-/**
-  * @brief  Enable HSE crystal oscillator (HSE ON)
-  * @rmtoll CR           HSEON         LL_RCC_HSE_Enable
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSE_Enable(void)
-{
-  SET_BIT(RCC->CR, RCC_CR_HSEON);
-}
-
-/**
-  * @brief  Disable HSE crystal oscillator (HSE ON)
-  * @rmtoll CR           HSEON         LL_RCC_HSE_Disable
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSE_Disable(void)
-{
-  CLEAR_BIT(RCC->CR, RCC_CR_HSEON);
-}
-
-/**
-  * @brief  Check if HSE oscillator Ready
-  * @rmtoll CR           HSERDY        LL_RCC_HSE_IsReady
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_HSE_IsReady(void)
-{
-  return (READ_BIT(RCC->CR, RCC_CR_HSERDY) == (RCC_CR_HSERDY));
-}
-
-/**
-  * @brief  Configure the RTC prescaler (divider)
-  * @rmtoll CR           RTCPRE        LL_RCC_SetRTC_HSEPrescaler
-  * @param  Div This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_RTC_HSE_DIV_2
-  *         @arg @ref LL_RCC_RTC_HSE_DIV_4
-  *         @arg @ref LL_RCC_RTC_HSE_DIV_8
-  *         @arg @ref LL_RCC_RTC_HSE_DIV_16
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetRTC_HSEPrescaler(uint32_t Div)
-{
-  MODIFY_REG(RCC->CR, RCC_CR_RTCPRE, Div);
-}
-
-/**
-  * @brief  Get the RTC divider (prescaler)
-  * @rmtoll CR           RTCPRE        LL_RCC_GetRTC_HSEPrescaler
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_RTC_HSE_DIV_2
-  *         @arg @ref LL_RCC_RTC_HSE_DIV_4
-  *         @arg @ref LL_RCC_RTC_HSE_DIV_8
-  *         @arg @ref LL_RCC_RTC_HSE_DIV_16
-  */
-__STATIC_INLINE uint32_t LL_RCC_GetRTC_HSEPrescaler(void)
-{
-  return (uint32_t)(READ_BIT(RCC->CR, RCC_CR_RTCPRE));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EF_HSI HSI
-  * @{
-  */
-
-/**
-  * @brief  Enable HSI oscillator
-  * @rmtoll CR           HSION         LL_RCC_HSI_Enable
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSI_Enable(void)
-{
-  SET_BIT(RCC->CR, RCC_CR_HSION);
-}
-
-/**
-  * @brief  Disable HSI oscillator
-  * @rmtoll CR           HSION         LL_RCC_HSI_Disable
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSI_Disable(void)
-{
-  CLEAR_BIT(RCC->CR, RCC_CR_HSION);
-}
-
-/**
-  * @brief  Check if HSI clock is ready
-  * @rmtoll CR           HSIRDY        LL_RCC_HSI_IsReady
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_HSI_IsReady(void)
-{
-  return (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == (RCC_CR_HSIRDY));
-}
-
-/**
-  * @brief  Enable HSI even in stop mode
-  * @note HSI oscillator is forced ON even in Stop mode
-  * @rmtoll CR           HSIKERON      LL_RCC_HSI_EnableInStopMode
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSI_EnableInStopMode(void)
-{
-  SET_BIT(RCC->CR, RCC_CR_HSIKERON);
-}
-
-/**
-  * @brief  Disable HSI in stop mode
-  * @rmtoll CR           HSIKERON      LL_RCC_HSI_DisableInStopMode
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSI_DisableInStopMode(void)
-{
-  CLEAR_BIT(RCC->CR, RCC_CR_HSIKERON);
-}
-
-/**
-  * @brief  Enable HSI Divider (it divides by 4)
-  * @rmtoll CR           HSIDIVEN       LL_RCC_HSI_EnableDivider
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSI_EnableDivider(void)
-{
-  SET_BIT(RCC->CR, RCC_CR_HSIDIVEN);
-}
-
-/**
-  * @brief  Disable HSI Divider (it divides by 4)
-  * @rmtoll CR           HSIDIVEN       LL_RCC_HSI_DisableDivider
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSI_DisableDivider(void)
-{
-  CLEAR_BIT(RCC->CR, RCC_CR_HSIDIVEN);
-}
-
-
-
-#if defined(RCC_CR_HSIOUTEN)
-/**
-  * @brief  Enable HSI Output
-  * @rmtoll CR           HSIOUTEN       LL_RCC_HSI_EnableOutput
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSI_EnableOutput(void)
-{
-  SET_BIT(RCC->CR, RCC_CR_HSIOUTEN);
-}
-
-/**
-  * @brief  Disable HSI Output
-  * @rmtoll CR           HSIOUTEN       LL_RCC_HSI_DisableOutput
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSI_DisableOutput(void)
-{
-  CLEAR_BIT(RCC->CR, RCC_CR_HSIOUTEN);
-}
-#endif /* RCC_CR_HSIOUTEN */
-
-/**
-  * @brief  Get HSI Calibration value
-  * @note When HSITRIM is written, HSICAL is updated with the sum of
-  *       HSITRIM and the factory trim value
-  * @rmtoll ICSCR        HSICAL        LL_RCC_HSI_GetCalibration
-  * @retval Between Min_Data = 0x00 and Max_Data = 0xFF
-  */
-__STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibration(void)
-{
-  return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_HSICAL) >> RCC_POSITION_HSICAL);
-}
-
-/**
-  * @brief  Set HSI Calibration trimming
-  * @note user-programmable trimming value that is added to the HSICAL
-  * @note Default value is 16, which, when added to the HSICAL value,
-  *       should trim the HSI to 16 MHz +/- 1 %
-  * @rmtoll ICSCR        HSITRIM       LL_RCC_HSI_SetCalibTrimming
-  * @param  Value between Min_Data = 0x00 and Max_Data = 0x1F
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSI_SetCalibTrimming(uint32_t Value)
-{
-  MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, Value << RCC_POSITION_HSITRIM);
-}
-
-/**
-  * @brief  Get HSI Calibration trimming
-  * @rmtoll ICSCR        HSITRIM       LL_RCC_HSI_GetCalibTrimming
-  * @retval Between Min_Data = 0x00 and Max_Data = 0x1F
-  */
-__STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibTrimming(void)
-{
-  return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_HSITRIM) >> RCC_POSITION_HSITRIM);
-}
-
-/**
-  * @}
-  */
-
-#if defined(RCC_HSI48_SUPPORT)
-/** @defgroup RCC_LL_EF_HSI48 HSI48
-  * @{
-  */
-
-/**
-  * @brief  Enable HSI48
-  * @rmtoll CRRCR          HSI48ON       LL_RCC_HSI48_Enable
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSI48_Enable(void)
-{
-  SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON);
-}
-
-/**
-  * @brief  Disable HSI48
-  * @rmtoll CRRCR          HSI48ON       LL_RCC_HSI48_Disable
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSI48_Disable(void)
-{
-  CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON);
-}
-
-/**
-  * @brief  Check if HSI48 oscillator Ready
-  * @rmtoll CRRCR          HSI48RDY      LL_RCC_HSI48_IsReady
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_HSI48_IsReady(void)
-{
-  return (READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == (RCC_CRRCR_HSI48RDY));
-}
-
-/**
-  * @brief  Get HSI48 Calibration value
-  * @rmtoll CRRCR          HSI48CAL      LL_RCC_HSI48_GetCalibration
-  * @retval Between Min_Data = 0x00 and Max_Data = 0xFF
-  */
-__STATIC_INLINE uint32_t LL_RCC_HSI48_GetCalibration(void)
-{
-  return (uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48CAL) >> RCC_POSITION_HSI48CAL);
-}
-
-#if defined(RCC_CRRCR_HSI48DIV6OUTEN)
-/**
-  * @brief  Enable HSI48 Divider (it divides by 6)
-  * @rmtoll CRRCR           HSI48DIV6OUTEN       LL_RCC_HSI48_EnableDivider
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSI48_EnableDivider(void)
-{
-  SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48DIV6OUTEN);
-}
-
-/**
-  * @brief  Disable HSI48 Divider (it divides by 6)
-  * @rmtoll CRRCR           HSI48DIV6OUTEN       LL_RCC_HSI48_DisableDivider
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_HSI48_DisableDivider(void)
-{
-  CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48DIV6OUTEN);
-}
-
-/**
-  * @brief  Check if HSI48 Divider is enabled (it divides by 6)
-  * @rmtoll CRRCR        HSI48DIV6OUTEN        LL_RCC_HSI48_IsDivided
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_HSI48_IsDivided(void)
-{
-  return (READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48DIV6OUTEN) == (RCC_CRRCR_HSI48DIV6OUTEN));
-}
-
-#endif /*RCC_CRRCR_HSI48DIV6OUTEN*/
-
-/**
-  * @}
-  */
-
-#endif /* RCC_HSI48_SUPPORT */
-
-/** @defgroup RCC_LL_EF_LSE LSE
-  * @{
-  */
-
-/**
-  * @brief  Enable  Low Speed External (LSE) crystal.
-  * @rmtoll CSR         LSEON         LL_RCC_LSE_Enable
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_LSE_Enable(void)
-{
-  SET_BIT(RCC->CSR, RCC_CSR_LSEON);
-}
-
-/**
-  * @brief  Disable  Low Speed External (LSE) crystal.
-  * @rmtoll CSR         LSEON         LL_RCC_LSE_Disable
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_LSE_Disable(void)
-{
-  CLEAR_BIT(RCC->CSR, RCC_CSR_LSEON);
-}
-
-/**
-  * @brief  Enable external clock source (LSE bypass).
-  * @rmtoll CSR         LSEBYP        LL_RCC_LSE_EnableBypass
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_LSE_EnableBypass(void)
-{
-  SET_BIT(RCC->CSR, RCC_CSR_LSEBYP);
-}
-
-/**
-  * @brief  Disable external clock source (LSE bypass).
-  * @rmtoll CSR         LSEBYP        LL_RCC_LSE_DisableBypass
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_LSE_DisableBypass(void)
-{
-  CLEAR_BIT(RCC->CSR, RCC_CSR_LSEBYP);
-}
-
-/**
-  * @brief  Set LSE oscillator drive capability
-  * @note The oscillator is in Xtal mode when it is not in bypass mode.
-  * @rmtoll CSR         LSEDRV        LL_RCC_LSE_SetDriveCapability
-  * @param  LSEDrive This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_LSEDRIVE_LOW
-  *         @arg @ref LL_RCC_LSEDRIVE_MEDIUMLOW
-  *         @arg @ref LL_RCC_LSEDRIVE_MEDIUMHIGH
-  *         @arg @ref LL_RCC_LSEDRIVE_HIGH
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_LSE_SetDriveCapability(uint32_t LSEDrive)
-{
-  MODIFY_REG(RCC->CSR, RCC_CSR_LSEDRV, LSEDrive);
-}
-
-/**
-  * @brief  Get LSE oscillator drive capability
-  * @rmtoll CSR         LSEDRV        LL_RCC_LSE_GetDriveCapability
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_LSEDRIVE_LOW
-  *         @arg @ref LL_RCC_LSEDRIVE_MEDIUMLOW
-  *         @arg @ref LL_RCC_LSEDRIVE_MEDIUMHIGH
-  *         @arg @ref LL_RCC_LSEDRIVE_HIGH
-  */
-__STATIC_INLINE uint32_t LL_RCC_LSE_GetDriveCapability(void)
-{
-  return (uint32_t)(READ_BIT(RCC->CSR, RCC_CSR_LSEDRV));
-}
-
-/**
-  * @brief  Enable Clock security system on LSE.
-  * @rmtoll CSR         LSECSSON      LL_RCC_LSE_EnableCSS
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_LSE_EnableCSS(void)
-{
-  SET_BIT(RCC->CSR, RCC_CSR_LSECSSON);
-}
-
-/**
-  * @brief  Disable Clock security system on LSE.
-  * @note   Clock security system can be disabled only after a LSE
-  *         failure detection. In that case it MUST be disabled by software.
-  * @rmtoll CSR          LSECSSON      LL_RCC_LSE_DisableCSS
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_LSE_DisableCSS(void)
-{
-  CLEAR_BIT(RCC->CSR, RCC_CSR_LSECSSON);
-}
-
-/**
-  * @brief  Check if LSE oscillator Ready
-  * @rmtoll CSR         LSERDY        LL_RCC_LSE_IsReady
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_LSE_IsReady(void)
-{
-  return (READ_BIT(RCC->CSR, RCC_CSR_LSERDY) == (RCC_CSR_LSERDY));
-}
-
-/**
-  * @brief  Check if CSS on LSE failure Detection
-  * @rmtoll CSR         LSECSSD       LL_RCC_LSE_IsCSSDetected
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_LSE_IsCSSDetected(void)
-{
-  return (READ_BIT(RCC->CSR, RCC_CSR_LSECSSD) == (RCC_CSR_LSECSSD));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EF_LSI LSI
-  * @{
-  */
-
-/**
-  * @brief  Enable LSI Oscillator
-  * @rmtoll CSR          LSION         LL_RCC_LSI_Enable
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_LSI_Enable(void)
-{
-  SET_BIT(RCC->CSR, RCC_CSR_LSION);
-}
-
-/**
-  * @brief  Disable LSI Oscillator
-  * @rmtoll CSR          LSION         LL_RCC_LSI_Disable
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_LSI_Disable(void)
-{
-  CLEAR_BIT(RCC->CSR, RCC_CSR_LSION);
-}
-
-/**
-  * @brief  Check if LSI is Ready
-  * @rmtoll CSR          LSIRDY        LL_RCC_LSI_IsReady
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_LSI_IsReady(void)
-{
-  return (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == (RCC_CSR_LSIRDY));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EF_MSI MSI
-  * @{
-  */
-
-/**
-  * @brief  Enable MSI oscillator
-  * @rmtoll CR           MSION         LL_RCC_MSI_Enable
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_MSI_Enable(void)
-{
-  SET_BIT(RCC->CR, RCC_CR_MSION);
-}
-
-/**
-  * @brief  Disable MSI oscillator
-  * @rmtoll CR           MSION         LL_RCC_MSI_Disable
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_MSI_Disable(void)
-{
-  CLEAR_BIT(RCC->CR, RCC_CR_MSION);
-}
-
-/**
-  * @brief  Check if MSI oscillator Ready
-  * @rmtoll CR           MSIRDY        LL_RCC_MSI_IsReady
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_MSI_IsReady(void)
-{
-  return (READ_BIT(RCC->CR, RCC_CR_MSIRDY) == (RCC_CR_MSIRDY));
-}
-
-/**
-  * @brief  Configure the Internal Multi Speed oscillator (MSI) clock range in run mode.
-  * @rmtoll ICSCR           MSIRANGE      LL_RCC_MSI_SetRange
-  * @param  Range This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_MSIRANGE_0
-  *         @arg @ref LL_RCC_MSIRANGE_1
-  *         @arg @ref LL_RCC_MSIRANGE_2
-  *         @arg @ref LL_RCC_MSIRANGE_3
-  *         @arg @ref LL_RCC_MSIRANGE_4
-  *         @arg @ref LL_RCC_MSIRANGE_5
-  *         @arg @ref LL_RCC_MSIRANGE_6
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_MSI_SetRange(uint32_t Range)
-{
-  MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSIRANGE, Range);
-}
-
-/**
-  * @brief  Get the Internal Multi Speed oscillator (MSI) clock range in run mode.
-  * @rmtoll ICSCR           MSIRANGE      LL_RCC_MSI_GetRange
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_MSIRANGE_0
-  *         @arg @ref LL_RCC_MSIRANGE_1
-  *         @arg @ref LL_RCC_MSIRANGE_2
-  *         @arg @ref LL_RCC_MSIRANGE_3
-  *         @arg @ref LL_RCC_MSIRANGE_4
-  *         @arg @ref LL_RCC_MSIRANGE_5
-  *         @arg @ref LL_RCC_MSIRANGE_6
-  */
-__STATIC_INLINE uint32_t LL_RCC_MSI_GetRange(void)
-{
-  return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_MSIRANGE));
-}
-
-/**
-  * @brief  Get MSI Calibration value
-  * @note When MSITRIM is written, MSICAL is updated with the sum of
-  *       MSITRIM and the factory trim value
-  * @rmtoll ICSCR        MSICAL        LL_RCC_MSI_GetCalibration
-  * @retval Between Min_Data = 0x00 and Max_Data = 0xFF
-  */
-__STATIC_INLINE uint32_t LL_RCC_MSI_GetCalibration(void)
-{
-  return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_MSICAL) >> RCC_POSITION_MSICAL);
-}
-
-/**
-  * @brief  Set MSI Calibration trimming
-  * @note user-programmable trimming value that is added to the MSICAL
-  * @rmtoll ICSCR        MSITRIM       LL_RCC_MSI_SetCalibTrimming
-  * @param  Value between Min_Data = 0x00 and Max_Data = 0xFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_MSI_SetCalibTrimming(uint32_t Value)
-{
-  MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSITRIM, Value << RCC_POSITION_MSITRIM);
-}
-
-/**
-  * @brief  Get MSI Calibration trimming
-  * @rmtoll ICSCR        MSITRIM       LL_RCC_MSI_GetCalibTrimming
-  * @retval Between Min_Data = 0x00 and Max_Data = 0xFF
-  */
-__STATIC_INLINE uint32_t LL_RCC_MSI_GetCalibTrimming(void)
-{
-  return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_MSITRIM) >> RCC_POSITION_MSITRIM);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EF_System System
-  * @{
-  */
-
-/**
-  * @brief  Configure the system clock source
-  * @rmtoll CFGR         SW            LL_RCC_SetSysClkSource
-  * @param  Source This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_SYS_CLKSOURCE_MSI
-  *         @arg @ref LL_RCC_SYS_CLKSOURCE_HSI
-  *         @arg @ref LL_RCC_SYS_CLKSOURCE_HSE
-  *         @arg @ref LL_RCC_SYS_CLKSOURCE_PLL
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source)
-{
-  MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source);
-}
-
-/**
-  * @brief  Get the system clock source
-  * @rmtoll CFGR         SWS           LL_RCC_GetSysClkSource
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_MSI
-  *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI
-  *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE
-  *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL
-  */
-__STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void)
-{
-  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS));
-}
-
-/**
-  * @brief  Set AHB prescaler
-  * @rmtoll CFGR         HPRE          LL_RCC_SetAHBPrescaler
-  * @param  Prescaler This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_SYSCLK_DIV_1
-  *         @arg @ref LL_RCC_SYSCLK_DIV_2
-  *         @arg @ref LL_RCC_SYSCLK_DIV_4
-  *         @arg @ref LL_RCC_SYSCLK_DIV_8
-  *         @arg @ref LL_RCC_SYSCLK_DIV_16
-  *         @arg @ref LL_RCC_SYSCLK_DIV_64
-  *         @arg @ref LL_RCC_SYSCLK_DIV_128
-  *         @arg @ref LL_RCC_SYSCLK_DIV_256
-  *         @arg @ref LL_RCC_SYSCLK_DIV_512
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler)
-{
-  MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler);
-}
-
-/**
-  * @brief  Set APB1 prescaler
-  * @rmtoll CFGR         PPRE1         LL_RCC_SetAPB1Prescaler
-  * @param  Prescaler This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_APB1_DIV_1
-  *         @arg @ref LL_RCC_APB1_DIV_2
-  *         @arg @ref LL_RCC_APB1_DIV_4
-  *         @arg @ref LL_RCC_APB1_DIV_8
-  *         @arg @ref LL_RCC_APB1_DIV_16
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler)
-{
-  MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler);
-}
-
-/**
-  * @brief  Set APB2 prescaler
-  * @rmtoll CFGR         PPRE2         LL_RCC_SetAPB2Prescaler
-  * @param  Prescaler This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_APB2_DIV_1
-  *         @arg @ref LL_RCC_APB2_DIV_2
-  *         @arg @ref LL_RCC_APB2_DIV_4
-  *         @arg @ref LL_RCC_APB2_DIV_8
-  *         @arg @ref LL_RCC_APB2_DIV_16
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler)
-{
-  MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler);
-}
-
-/**
-  * @brief  Get AHB prescaler
-  * @rmtoll CFGR         HPRE          LL_RCC_GetAHBPrescaler
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_SYSCLK_DIV_1
-  *         @arg @ref LL_RCC_SYSCLK_DIV_2
-  *         @arg @ref LL_RCC_SYSCLK_DIV_4
-  *         @arg @ref LL_RCC_SYSCLK_DIV_8
-  *         @arg @ref LL_RCC_SYSCLK_DIV_16
-  *         @arg @ref LL_RCC_SYSCLK_DIV_64
-  *         @arg @ref LL_RCC_SYSCLK_DIV_128
-  *         @arg @ref LL_RCC_SYSCLK_DIV_256
-  *         @arg @ref LL_RCC_SYSCLK_DIV_512
-  */
-__STATIC_INLINE uint32_t LL_RCC_GetAHBPrescaler(void)
-{
-  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE));
-}
-
-/**
-  * @brief  Get APB1 prescaler
-  * @rmtoll CFGR         PPRE1         LL_RCC_GetAPB1Prescaler
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_APB1_DIV_1
-  *         @arg @ref LL_RCC_APB1_DIV_2
-  *         @arg @ref LL_RCC_APB1_DIV_4
-  *         @arg @ref LL_RCC_APB1_DIV_8
-  *         @arg @ref LL_RCC_APB1_DIV_16
-  */
-__STATIC_INLINE uint32_t LL_RCC_GetAPB1Prescaler(void)
-{
-  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1));
-}
-
-/**
-  * @brief  Get APB2 prescaler
-  * @rmtoll CFGR         PPRE2         LL_RCC_GetAPB2Prescaler
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_APB2_DIV_1
-  *         @arg @ref LL_RCC_APB2_DIV_2
-  *         @arg @ref LL_RCC_APB2_DIV_4
-  *         @arg @ref LL_RCC_APB2_DIV_8
-  *         @arg @ref LL_RCC_APB2_DIV_16
-  */
-__STATIC_INLINE uint32_t LL_RCC_GetAPB2Prescaler(void)
-{
-  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2));
-}
-
-/**
-  * @brief  Set Clock After Wake-Up From Stop mode
-  * @rmtoll CFGR         STOPWUCK      LL_RCC_SetClkAfterWakeFromStop
-  * @param  Clock This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_STOP_WAKEUPCLOCK_MSI
-  *         @arg @ref LL_RCC_STOP_WAKEUPCLOCK_HSI
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetClkAfterWakeFromStop(uint32_t Clock)
-{
-  MODIFY_REG(RCC->CFGR, RCC_CFGR_STOPWUCK, Clock);
-}
-
-/**
-  * @brief  Get Clock After Wake-Up From Stop mode
-  * @rmtoll CFGR         STOPWUCK      LL_RCC_GetClkAfterWakeFromStop
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_STOP_WAKEUPCLOCK_MSI
-  *         @arg @ref LL_RCC_STOP_WAKEUPCLOCK_HSI
-  */
-__STATIC_INLINE uint32_t LL_RCC_GetClkAfterWakeFromStop(void)
-{
-  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_STOPWUCK));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EF_MCO MCO
-  * @{
-  */
-
-/**
-  * @brief  Configure MCOx
-  * @rmtoll CFGR         MCOSEL        LL_RCC_ConfigMCO\n
-  *         CFGR         MCOPRE        LL_RCC_ConfigMCO
-  * @param  MCOxSource This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_MCO1SOURCE_NOCLOCK
-  *         @arg @ref LL_RCC_MCO1SOURCE_SYSCLK
-  *         @arg @ref LL_RCC_MCO1SOURCE_HSI
-  *         @arg @ref LL_RCC_MCO1SOURCE_MSI
-  *         @arg @ref LL_RCC_MCO1SOURCE_HSE
-  *         @arg @ref LL_RCC_MCO1SOURCE_PLLCLK
-  *         @arg @ref LL_RCC_MCO1SOURCE_LSI
-  *         @arg @ref LL_RCC_MCO1SOURCE_LSE
-  *         @arg @ref LL_RCC_MCO1SOURCE_HSI48 (*)
-  *
-  *         (*) value not defined in all devices.
-  * @param  MCOxPrescaler This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_MCO1_DIV_1
-  *         @arg @ref LL_RCC_MCO1_DIV_2
-  *         @arg @ref LL_RCC_MCO1_DIV_4
-  *         @arg @ref LL_RCC_MCO1_DIV_8
-  *         @arg @ref LL_RCC_MCO1_DIV_16
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_ConfigMCO(uint32_t MCOxSource, uint32_t MCOxPrescaler)
-{
-  MODIFY_REG(RCC->CFGR, RCC_CFGR_MCOSEL | RCC_CFGR_MCOPRE, MCOxSource | MCOxPrescaler);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EF_Peripheral_Clock_Source Peripheral Clock Source
-  * @{
-  */
-
-/**
-  * @brief  Configure USARTx clock source
-  * @rmtoll CCIPR        USARTxSEL     LL_RCC_SetUSARTClockSource
-  * @param  USARTxSource This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_USART1_CLKSOURCE_PCLK2 (*)
-  *         @arg @ref LL_RCC_USART1_CLKSOURCE_SYSCLK (*)
-  *         @arg @ref LL_RCC_USART1_CLKSOURCE_HSI (*)
-  *         @arg @ref LL_RCC_USART1_CLKSOURCE_LSE (*)
-  *         @arg @ref LL_RCC_USART2_CLKSOURCE_PCLK1
-  *         @arg @ref LL_RCC_USART2_CLKSOURCE_SYSCLK
-  *         @arg @ref LL_RCC_USART2_CLKSOURCE_HSI
-  *         @arg @ref LL_RCC_USART2_CLKSOURCE_LSE
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetUSARTClockSource(uint32_t USARTxSource)
-{
-  MODIFY_REG(RCC->CCIPR, (USARTxSource >> 16U), (USARTxSource & 0x0000FFFFU));
-}
-
-/**
-  * @brief  Configure LPUART1x clock source
-  * @rmtoll CCIPR        LPUART1SEL    LL_RCC_SetLPUARTClockSource
-  * @param  LPUARTxSource This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE_PCLK1
-  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE_SYSCLK
-  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE_HSI
-  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE_LSE
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetLPUARTClockSource(uint32_t LPUARTxSource)
-{
-  MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPUART1SEL, LPUARTxSource);
-}
-
-/**
-  * @brief  Configure I2Cx clock source
-  * @rmtoll CCIPR        I2CxSEL       LL_RCC_SetI2CClockSource
-  * @param  I2CxSource This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_I2C1_CLKSOURCE_PCLK1
-  *         @arg @ref LL_RCC_I2C1_CLKSOURCE_SYSCLK
-  *         @arg @ref LL_RCC_I2C1_CLKSOURCE_HSI
-  *         @arg @ref LL_RCC_I2C3_CLKSOURCE_PCLK1 (*)
-  *         @arg @ref LL_RCC_I2C3_CLKSOURCE_SYSCLK (*)
-  *         @arg @ref LL_RCC_I2C3_CLKSOURCE_HSI (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetI2CClockSource(uint32_t I2CxSource)
-{
-  MODIFY_REG(RCC->CCIPR, ((I2CxSource >> 4U) & 0x000FF000U), ((I2CxSource << 4U) & 0x000FF000U));
-}
-
-/**
-  * @brief  Configure LPTIMx clock source
-  * @rmtoll CCIPR        LPTIMxSEL     LL_RCC_SetLPTIMClockSource
-  * @param  LPTIMxSource This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_LPTIM1_CLKSOURCE_PCLK1
-  *         @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSI
-  *         @arg @ref LL_RCC_LPTIM1_CLKSOURCE_HSI
-  *         @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSE
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetLPTIMClockSource(uint32_t LPTIMxSource)
-{
-  MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPTIM1SEL, LPTIMxSource);
-}
-
-#if defined(RCC_CCIPR_HSI48SEL)
-#if defined(RNG)
-/**
-  * @brief  Configure RNG clock source
-  * @rmtoll CCIPR        HSI48SEL      LL_RCC_SetRNGClockSource
-  * @param  RNGxSource This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_RNG_CLKSOURCE_PLL
-  *         @arg @ref LL_RCC_RNG_CLKSOURCE_HSI48
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetRNGClockSource(uint32_t RNGxSource)
-{
-  MODIFY_REG(RCC->CCIPR, RCC_CCIPR_HSI48SEL, RNGxSource);
-}
-#endif /* RNG */
-
-#if defined(USB)
-/**
-  * @brief  Configure USB clock source
-  * @rmtoll CCIPR        HSI48SEL      LL_RCC_SetUSBClockSource
-  * @param  USBxSource This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_RNG_CLKSOURCE_PLL
-  *         @arg @ref LL_RCC_RNG_CLKSOURCE_HSI48
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetUSBClockSource(uint32_t USBxSource)
-{
-  MODIFY_REG(RCC->CCIPR, RCC_CCIPR_HSI48SEL, USBxSource);
-}
-#endif /* USB */
-
-#endif /* RCC_CCIPR_HSI48SEL */
-
-/**
-  * @brief  Get USARTx clock source
-  * @rmtoll CCIPR        USARTxSEL     LL_RCC_GetUSARTClockSource
-  * @param  USARTx This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_USART1_CLKSOURCE (*)
-  *         @arg @ref LL_RCC_USART2_CLKSOURCE
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_USART1_CLKSOURCE_PCLK2 (*)
-  *         @arg @ref LL_RCC_USART1_CLKSOURCE_SYSCLK (*)
-  *         @arg @ref LL_RCC_USART1_CLKSOURCE_HSI (*)
-  *         @arg @ref LL_RCC_USART1_CLKSOURCE_LSE (*)
-  *         @arg @ref LL_RCC_USART2_CLKSOURCE_PCLK1
-  *         @arg @ref LL_RCC_USART2_CLKSOURCE_SYSCLK
-  *         @arg @ref LL_RCC_USART2_CLKSOURCE_HSI
-  *         @arg @ref LL_RCC_USART2_CLKSOURCE_LSE
-  *
-  *         (*) value not defined in all devices.
-  */
-__STATIC_INLINE uint32_t LL_RCC_GetUSARTClockSource(uint32_t USARTx)
-{
-  return (uint32_t)(READ_BIT(RCC->CCIPR, USARTx) | (USARTx << 16U));
-}
-
-
-
-/**
-  * @brief  Get LPUARTx clock source
-  * @rmtoll CCIPR        LPUART1SEL    LL_RCC_GetLPUARTClockSource
-  * @param  LPUARTx This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE_PCLK1
-  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE_SYSCLK
-  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE_HSI
-  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE_LSE
-  */
-__STATIC_INLINE uint32_t LL_RCC_GetLPUARTClockSource(uint32_t LPUARTx)
-{
-  return (uint32_t)(READ_BIT(RCC->CCIPR, LPUARTx));
-}
-
-/**
-  * @brief  Get I2Cx clock source
-  * @rmtoll CCIPR        I2CxSEL       LL_RCC_GetI2CClockSource
-  * @param  I2Cx This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_I2C1_CLKSOURCE
-  *         @arg @ref LL_RCC_I2C3_CLKSOURCE
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_I2C1_CLKSOURCE_PCLK1
-  *         @arg @ref LL_RCC_I2C1_CLKSOURCE_SYSCLK
-  *         @arg @ref LL_RCC_I2C1_CLKSOURCE_HSI
-  *         @arg @ref LL_RCC_I2C3_CLKSOURCE_PCLK1  (*)
-  *         @arg @ref LL_RCC_I2C3_CLKSOURCE_SYSCLK  (*)
-  *         @arg @ref LL_RCC_I2C3_CLKSOURCE_HSI   (*)
-  *
-  *         (*) value not defined in all devices.
-  */
-__STATIC_INLINE uint32_t LL_RCC_GetI2CClockSource(uint32_t I2Cx)
-{
-  return (uint32_t)((READ_BIT(RCC->CCIPR, I2Cx) >> 4U) | (I2Cx << 4U));
-}
-
-/**
-  * @brief  Get LPTIMx clock source
-  * @rmtoll CCIPR        LPTIMxSEL     LL_RCC_GetLPTIMClockSource
-  * @param  LPTIMx This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_LPTIM1_CLKSOURCE
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_LPTIM1_CLKSOURCE_PCLK1
-  *         @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSI
-  *         @arg @ref LL_RCC_LPTIM1_CLKSOURCE_HSI
-  *         @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSE
-  */
-__STATIC_INLINE uint32_t LL_RCC_GetLPTIMClockSource(uint32_t LPTIMx)
-{
-  return (uint32_t)(READ_BIT(RCC->CCIPR, LPTIMx));
-}
-
-#if defined(RCC_CCIPR_HSI48SEL)
-#if defined(RNG)
-/**
-  * @brief  Get RNGx clock source
-  * @rmtoll CCIPR        CLK48SEL      LL_RCC_GetRNGClockSource
-  * @param  RNGx This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_RNG_CLKSOURCE
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_RNG_CLKSOURCE_PLL
-  *         @arg @ref LL_RCC_RNG_CLKSOURCE_HSI48
-  */
-__STATIC_INLINE uint32_t LL_RCC_GetRNGClockSource(uint32_t RNGx)
-{
-  return (uint32_t)(READ_BIT(RCC->CCIPR, RNGx));
-}
-#endif /* RNG */
-
-#if defined(USB)
-/**
-  * @brief  Get USBx clock source
-  * @rmtoll CCIPR        CLK48SEL      LL_RCC_GetUSBClockSource
-  * @param  USBx This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_USB_CLKSOURCE
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL
-  *         @arg @ref LL_RCC_USB_CLKSOURCE_HSI48
-  */
-__STATIC_INLINE uint32_t LL_RCC_GetUSBClockSource(uint32_t USBx)
-{
-  return (uint32_t)(READ_BIT(RCC->CCIPR, USBx));
-}
-#endif /* USB */
-
-#endif /* RCC_CCIPR_HSI48SEL */
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EF_RTC RTC
-  * @{
-  */
-
-/**
-  * @brief  Set RTC Clock Source
-  * @note Once the RTC clock source has been selected, it cannot be changed any more unless
-  *       the Backup domain is reset, or unless a failure is detected on LSE (LSECSSD is
-  *       set). The RTCRST bit can be used to reset them.
-  * @rmtoll CSR         RTCSEL        LL_RCC_SetRTCClockSource
-  * @param  Source This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_RTC_CLKSOURCE_NONE
-  *         @arg @ref LL_RCC_RTC_CLKSOURCE_LSE
-  *         @arg @ref LL_RCC_RTC_CLKSOURCE_LSI
-  *         @arg @ref LL_RCC_RTC_CLKSOURCE_HSE
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetRTCClockSource(uint32_t Source)
-{
-  MODIFY_REG(RCC->CSR, RCC_CSR_RTCSEL, Source);
-}
-
-/**
-  * @brief  Get RTC Clock Source
-  * @rmtoll CSR         RTCSEL        LL_RCC_GetRTCClockSource
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_RTC_CLKSOURCE_NONE
-  *         @arg @ref LL_RCC_RTC_CLKSOURCE_LSE
-  *         @arg @ref LL_RCC_RTC_CLKSOURCE_LSI
-  *         @arg @ref LL_RCC_RTC_CLKSOURCE_HSE
-  */
-__STATIC_INLINE uint32_t LL_RCC_GetRTCClockSource(void)
-{
-  return (uint32_t)(READ_BIT(RCC->CSR, RCC_CSR_RTCSEL));
-}
-
-/**
-  * @brief  Enable RTC
-  * @rmtoll CSR         RTCEN         LL_RCC_EnableRTC
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_EnableRTC(void)
-{
-  SET_BIT(RCC->CSR, RCC_CSR_RTCEN);
-}
-
-/**
-  * @brief  Disable RTC
-  * @rmtoll CSR         RTCEN         LL_RCC_DisableRTC
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_DisableRTC(void)
-{
-  CLEAR_BIT(RCC->CSR, RCC_CSR_RTCEN);
-}
-
-/**
-  * @brief  Check if RTC has been enabled or not
-  * @rmtoll CSR         RTCEN         LL_RCC_IsEnabledRTC
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledRTC(void)
-{
-  return (READ_BIT(RCC->CSR, RCC_CSR_RTCEN) == (RCC_CSR_RTCEN));
-}
-
-/**
-  * @brief  Force the Backup domain reset
-  * @rmtoll CSR         RTCRST         LL_RCC_ForceBackupDomainReset
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_ForceBackupDomainReset(void)
-{
-  SET_BIT(RCC->CSR, RCC_CSR_RTCRST);
-}
-
-/**
-  * @brief  Release the Backup domain reset
-  * @rmtoll CSR         RTCRST         LL_RCC_ReleaseBackupDomainReset
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_ReleaseBackupDomainReset(void)
-{
-  CLEAR_BIT(RCC->CSR, RCC_CSR_RTCRST);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EF_PLL PLL
-  * @{
-  */
-
-/**
-  * @brief  Enable PLL
-  * @rmtoll CR           PLLON         LL_RCC_PLL_Enable
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_PLL_Enable(void)
-{
-  SET_BIT(RCC->CR, RCC_CR_PLLON);
-}
-
-/**
-  * @brief  Disable PLL
-  * @note Cannot be disabled if the PLL clock is used as the system clock
-  * @rmtoll CR           PLLON         LL_RCC_PLL_Disable
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_PLL_Disable(void)
-{
-  CLEAR_BIT(RCC->CR, RCC_CR_PLLON);
-}
-
-/**
-  * @brief  Check if PLL Ready
-  * @rmtoll CR           PLLRDY        LL_RCC_PLL_IsReady
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_PLL_IsReady(void)
-{
-  return (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == (RCC_CR_PLLRDY));
-}
-
-/**
-  * @brief  Configure PLL used for SYSCLK Domain
-  * @rmtoll CFGR         PLLSRC        LL_RCC_PLL_ConfigDomain_SYS\n
-  *         CFGR         PLLMUL        LL_RCC_PLL_ConfigDomain_SYS\n
-  *         CFGR         PLLDIV        LL_RCC_PLL_ConfigDomain_SYS
-  * @param  Source This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_PLLSOURCE_HSI
-  *         @arg @ref LL_RCC_PLLSOURCE_HSE
-  * @param  PLLMul This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_PLL_MUL_3
-  *         @arg @ref LL_RCC_PLL_MUL_4
-  *         @arg @ref LL_RCC_PLL_MUL_6
-  *         @arg @ref LL_RCC_PLL_MUL_8
-  *         @arg @ref LL_RCC_PLL_MUL_12
-  *         @arg @ref LL_RCC_PLL_MUL_16
-  *         @arg @ref LL_RCC_PLL_MUL_24
-  *         @arg @ref LL_RCC_PLL_MUL_32
-  *         @arg @ref LL_RCC_PLL_MUL_48
-  * @param  PLLDiv This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_PLL_DIV_2
-  *         @arg @ref LL_RCC_PLL_DIV_3
-  *         @arg @ref LL_RCC_PLL_DIV_4
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLMul, uint32_t PLLDiv)
-{
-  MODIFY_REG(RCC->CFGR, RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL | RCC_CFGR_PLLDIV, Source | PLLMul | PLLDiv);
-}
-
-/**
-  * @brief  Get the oscillator used as PLL clock source.
-  * @rmtoll CFGR         PLLSRC        LL_RCC_PLL_GetMainSource
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_PLLSOURCE_HSI
-  *         @arg @ref LL_RCC_PLLSOURCE_HSE
-  */
-__STATIC_INLINE uint32_t LL_RCC_PLL_GetMainSource(void)
-{
-  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC));
-}
-
-/**
-  * @brief  Get PLL multiplication Factor
-  * @rmtoll CFGR         PLLMUL        LL_RCC_PLL_GetMultiplicator
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_PLL_MUL_3
-  *         @arg @ref LL_RCC_PLL_MUL_4
-  *         @arg @ref LL_RCC_PLL_MUL_6
-  *         @arg @ref LL_RCC_PLL_MUL_8
-  *         @arg @ref LL_RCC_PLL_MUL_12
-  *         @arg @ref LL_RCC_PLL_MUL_16
-  *         @arg @ref LL_RCC_PLL_MUL_24
-  *         @arg @ref LL_RCC_PLL_MUL_32
-  *         @arg @ref LL_RCC_PLL_MUL_48
-  */
-__STATIC_INLINE uint32_t LL_RCC_PLL_GetMultiplicator(void)
-{
-  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLMUL));
-}
-
-/**
-  * @brief  Get Division factor for the main PLL and other PLL
-  * @rmtoll CFGR         PLLDIV        LL_RCC_PLL_GetDivider
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RCC_PLL_DIV_2
-  *         @arg @ref LL_RCC_PLL_DIV_3
-  *         @arg @ref LL_RCC_PLL_DIV_4
-  */
-__STATIC_INLINE uint32_t LL_RCC_PLL_GetDivider(void)
-{
-  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLDIV));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EF_FLAG_Management FLAG Management
-  * @{
-  */
-
-/**
-  * @brief  Clear LSI ready interrupt flag
-  * @rmtoll CICR         LSIRDYC       LL_RCC_ClearFlag_LSIRDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_ClearFlag_LSIRDY(void)
-{
-  SET_BIT(RCC->CICR, RCC_CICR_LSIRDYC);
-}
-
-/**
-  * @brief  Clear LSE ready interrupt flag
-  * @rmtoll CICR         LSERDYC       LL_RCC_ClearFlag_LSERDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_ClearFlag_LSERDY(void)
-{
-  SET_BIT(RCC->CICR, RCC_CICR_LSERDYC);
-}
-
-/**
-  * @brief  Clear MSI ready interrupt flag
-  * @rmtoll CICR         MSIRDYC       LL_RCC_ClearFlag_MSIRDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_ClearFlag_MSIRDY(void)
-{
-  SET_BIT(RCC->CICR, RCC_CICR_MSIRDYC);
-}
-
-/**
-  * @brief  Clear HSI ready interrupt flag
-  * @rmtoll CICR         HSIRDYC       LL_RCC_ClearFlag_HSIRDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_ClearFlag_HSIRDY(void)
-{
-  SET_BIT(RCC->CICR, RCC_CICR_HSIRDYC);
-}
-
-/**
-  * @brief  Clear HSE ready interrupt flag
-  * @rmtoll CICR         HSERDYC       LL_RCC_ClearFlag_HSERDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_ClearFlag_HSERDY(void)
-{
-  SET_BIT(RCC->CICR, RCC_CICR_HSERDYC);
-}
-
-/**
-  * @brief  Clear PLL ready interrupt flag
-  * @rmtoll CICR         PLLRDYC       LL_RCC_ClearFlag_PLLRDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_ClearFlag_PLLRDY(void)
-{
-  SET_BIT(RCC->CICR, RCC_CICR_PLLRDYC);
-}
-
-#if defined(RCC_HSI48_SUPPORT)
-/**
-  * @brief  Clear HSI48 ready interrupt flag
-  * @rmtoll CICR          HSI48RDYC     LL_RCC_ClearFlag_HSI48RDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_ClearFlag_HSI48RDY(void)
-{
-  SET_BIT(RCC->CICR, RCC_CICR_HSI48RDYC);
-}
-#endif /* RCC_HSI48_SUPPORT */
-
-#if defined(RCC_HSECSS_SUPPORT)
-/**
-  * @brief  Clear Clock security system interrupt flag
-  * @rmtoll CICR         CSSC          LL_RCC_ClearFlag_HSECSS
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_ClearFlag_HSECSS(void)
-{
-  SET_BIT(RCC->CICR, RCC_CICR_CSSC);
-}
-#endif /* RCC_HSECSS_SUPPORT */
-
-/**
-  * @brief  Clear LSE Clock security system interrupt flag
-  * @rmtoll CICR         LSECSSC       LL_RCC_ClearFlag_LSECSS
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_ClearFlag_LSECSS(void)
-{
-  SET_BIT(RCC->CICR, RCC_CICR_LSECSSC);
-}
-
-/**
-  * @brief  Check if LSI ready interrupt occurred or not
-  * @rmtoll CIFR         LSIRDYF       LL_RCC_IsActiveFlag_LSIRDY
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSIRDY(void)
-{
-  return (READ_BIT(RCC->CIFR, RCC_CIFR_LSIRDYF) == (RCC_CIFR_LSIRDYF));
-}
-
-/**
-  * @brief  Check if LSE ready interrupt occurred or not
-  * @rmtoll CIFR         LSERDYF       LL_RCC_IsActiveFlag_LSERDY
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSERDY(void)
-{
-  return (READ_BIT(RCC->CIFR, RCC_CIFR_LSERDYF) == (RCC_CIFR_LSERDYF));
-}
-
-/**
-  * @brief  Check if MSI ready interrupt occurred or not
-  * @rmtoll CIFR         MSIRDYF       LL_RCC_IsActiveFlag_MSIRDY
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_MSIRDY(void)
-{
-  return (READ_BIT(RCC->CIFR, RCC_CIFR_MSIRDYF) == (RCC_CIFR_MSIRDYF));
-}
-
-/**
-  * @brief  Check if HSI ready interrupt occurred or not
-  * @rmtoll CIFR         HSIRDYF       LL_RCC_IsActiveFlag_HSIRDY
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSIRDY(void)
-{
-  return (READ_BIT(RCC->CIFR, RCC_CIFR_HSIRDYF) == (RCC_CIFR_HSIRDYF));
-}
-
-/**
-  * @brief  Check if HSE ready interrupt occurred or not
-  * @rmtoll CIFR         HSERDYF       LL_RCC_IsActiveFlag_HSERDY
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSERDY(void)
-{
-  return (READ_BIT(RCC->CIFR, RCC_CIFR_HSERDYF) == (RCC_CIFR_HSERDYF));
-}
-
-/**
-  * @brief  Check if PLL ready interrupt occurred or not
-  * @rmtoll CIFR         PLLRDYF       LL_RCC_IsActiveFlag_PLLRDY
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PLLRDY(void)
-{
-  return (READ_BIT(RCC->CIFR, RCC_CIFR_PLLRDYF) == (RCC_CIFR_PLLRDYF));
-}
-
-#if defined(RCC_HSI48_SUPPORT)
-/**
-  * @brief  Check if HSI48 ready interrupt occurred or not
-  * @rmtoll CIFR          HSI48RDYF     LL_RCC_IsActiveFlag_HSI48RDY
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSI48RDY(void)
-{
-  return (READ_BIT(RCC->CIFR, RCC_CIFR_HSI48RDYF) == (RCC_CIFR_HSI48RDYF));
-}
-#endif /* RCC_HSI48_SUPPORT */
-
-#if defined(RCC_HSECSS_SUPPORT)
-/**
-  * @brief  Check if Clock security system interrupt occurred or not
-  * @rmtoll CIFR         CSSF          LL_RCC_IsActiveFlag_HSECSS
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSECSS(void)
-{
-  return (READ_BIT(RCC->CIFR, RCC_CIFR_CSSF) == (RCC_CIFR_CSSF));
-}
-#endif /* RCC_HSECSS_SUPPORT */
-
-/**
-  * @brief  Check if LSE Clock security system interrupt occurred or not
-  * @rmtoll CIFR         LSECSSF       LL_RCC_IsActiveFlag_LSECSS
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSECSS(void)
-{
-  return (READ_BIT(RCC->CIFR, RCC_CIFR_LSECSSF) == (RCC_CIFR_LSECSSF));
-}
-
-/**
-  * @brief  Check if HSI Divider is enabled (it divides by 4)
-  * @rmtoll CR        HSIDIVF        LL_RCC_IsActiveFlag_HSIDIV
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSIDIV(void)
-{
-  return (READ_BIT(RCC->CR, RCC_CR_HSIDIVF) == (RCC_CR_HSIDIVF));
-}
-
-#if defined(RCC_CSR_FWRSTF)
-/**
-  * @brief  Check if RCC flag FW reset is set or not.
-  * @rmtoll CSR          FWRSTF        LL_RCC_IsActiveFlag_FWRST
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_FWRST(void)
-{
-  return (READ_BIT(RCC->CSR, RCC_CSR_FWRSTF) == (RCC_CSR_FWRSTF));
-}
-#endif /* RCC_CSR_FWRSTF */
-
-/**
-  * @brief  Check if RCC flag Independent Watchdog reset is set or not.
-  * @rmtoll CSR          IWDGRSTF      LL_RCC_IsActiveFlag_IWDGRST
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_IWDGRST(void)
-{
-  return (READ_BIT(RCC->CSR, RCC_CSR_IWDGRSTF) == (RCC_CSR_IWDGRSTF));
-}
-
-/**
-  * @brief  Check if RCC flag Low Power reset is set or not.
-  * @rmtoll CSR          LPWRRSTF      LL_RCC_IsActiveFlag_LPWRRST
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LPWRRST(void)
-{
-  return (READ_BIT(RCC->CSR, RCC_CSR_LPWRRSTF) == (RCC_CSR_LPWRRSTF));
-}
-
-/**
-  * @brief  Check if RCC flag is set or not.
-  * @rmtoll CSR          OBLRSTF       LL_RCC_IsActiveFlag_OBLRST
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_OBLRST(void)
-{
-  return (READ_BIT(RCC->CSR, RCC_CSR_OBLRSTF) == (RCC_CSR_OBLRSTF));
-}
-
-/**
-  * @brief  Check if RCC flag Pin reset is set or not.
-  * @rmtoll CSR          PINRSTF       LL_RCC_IsActiveFlag_PINRST
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PINRST(void)
-{
-  return (READ_BIT(RCC->CSR, RCC_CSR_PINRSTF) == (RCC_CSR_PINRSTF));
-}
-
-/**
-  * @brief  Check if RCC flag POR/PDR reset is set or not.
-  * @rmtoll CSR          PORRSTF       LL_RCC_IsActiveFlag_PORRST
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PORRST(void)
-{
-  return (READ_BIT(RCC->CSR, RCC_CSR_PORRSTF) == (RCC_CSR_PORRSTF));
-}
-
-/**
-  * @brief  Check if RCC flag Software reset is set or not.
-  * @rmtoll CSR          SFTRSTF       LL_RCC_IsActiveFlag_SFTRST
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_SFTRST(void)
-{
-  return (READ_BIT(RCC->CSR, RCC_CSR_SFTRSTF) == (RCC_CSR_SFTRSTF));
-}
-
-/**
-  * @brief  Check if RCC flag Window Watchdog reset is set or not.
-  * @rmtoll CSR          WWDGRSTF      LL_RCC_IsActiveFlag_WWDGRST
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_WWDGRST(void)
-{
-  return (READ_BIT(RCC->CSR, RCC_CSR_WWDGRSTF) == (RCC_CSR_WWDGRSTF));
-}
-
-/**
-  * @brief  Set RMVF bit to clear the reset flags.
-  * @rmtoll CSR          RMVF          LL_RCC_ClearResetFlags
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_ClearResetFlags(void)
-{
-  SET_BIT(RCC->CSR, RCC_CSR_RMVF);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EF_IT_Management IT Management
-  * @{
-  */
-
-/**
-  * @brief  Enable LSI ready interrupt
-  * @rmtoll CIER         LSIRDYIE      LL_RCC_EnableIT_LSIRDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_EnableIT_LSIRDY(void)
-{
-  SET_BIT(RCC->CIER, RCC_CIER_LSIRDYIE);
-}
-
-/**
-  * @brief  Enable LSE ready interrupt
-  * @rmtoll CIER         LSERDYIE      LL_RCC_EnableIT_LSERDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_EnableIT_LSERDY(void)
-{
-  SET_BIT(RCC->CIER, RCC_CIER_LSERDYIE);
-}
-
-/**
-  * @brief  Enable MSI ready interrupt
-  * @rmtoll CIER         MSIRDYIE      LL_RCC_EnableIT_MSIRDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_EnableIT_MSIRDY(void)
-{
-  SET_BIT(RCC->CIER, RCC_CIER_MSIRDYIE);
-}
-
-/**
-  * @brief  Enable HSI ready interrupt
-  * @rmtoll CIER         HSIRDYIE      LL_RCC_EnableIT_HSIRDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_EnableIT_HSIRDY(void)
-{
-  SET_BIT(RCC->CIER, RCC_CIER_HSIRDYIE);
-}
-
-/**
-  * @brief  Enable HSE ready interrupt
-  * @rmtoll CIER         HSERDYIE      LL_RCC_EnableIT_HSERDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_EnableIT_HSERDY(void)
-{
-  SET_BIT(RCC->CIER, RCC_CIER_HSERDYIE);
-}
-
-/**
-  * @brief  Enable PLL ready interrupt
-  * @rmtoll CIER         PLLRDYIE      LL_RCC_EnableIT_PLLRDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_EnableIT_PLLRDY(void)
-{
-  SET_BIT(RCC->CIER, RCC_CIER_PLLRDYIE);
-}
-
-#if defined(RCC_HSI48_SUPPORT)
-/**
-  * @brief  Enable HSI48 ready interrupt
-  * @rmtoll CIER          HSI48RDYIE    LL_RCC_EnableIT_HSI48RDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_EnableIT_HSI48RDY(void)
-{
-  SET_BIT(RCC->CIER, RCC_CIER_HSI48RDYIE);
-}
-#endif /* RCC_HSI48_SUPPORT */
-
-/**
-  * @brief  Enable LSE clock security system interrupt
-  * @rmtoll CIER         LSECSSIE      LL_RCC_EnableIT_LSECSS
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_EnableIT_LSECSS(void)
-{
-  SET_BIT(RCC->CIER, RCC_CIER_LSECSSIE);
-}
-
-/**
-  * @brief  Disable LSI ready interrupt
-  * @rmtoll CIER         LSIRDYIE      LL_RCC_DisableIT_LSIRDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_DisableIT_LSIRDY(void)
-{
-  CLEAR_BIT(RCC->CIER, RCC_CIER_LSIRDYIE);
-}
-
-/**
-  * @brief  Disable LSE ready interrupt
-  * @rmtoll CIER         LSERDYIE      LL_RCC_DisableIT_LSERDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_DisableIT_LSERDY(void)
-{
-  CLEAR_BIT(RCC->CIER, RCC_CIER_LSERDYIE);
-}
-
-/**
-  * @brief  Disable MSI ready interrupt
-  * @rmtoll CIER         MSIRDYIE      LL_RCC_DisableIT_MSIRDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_DisableIT_MSIRDY(void)
-{
-  CLEAR_BIT(RCC->CIER, RCC_CIER_MSIRDYIE);
-}
-
-/**
-  * @brief  Disable HSI ready interrupt
-  * @rmtoll CIER         HSIRDYIE      LL_RCC_DisableIT_HSIRDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_DisableIT_HSIRDY(void)
-{
-  CLEAR_BIT(RCC->CIER, RCC_CIER_HSIRDYIE);
-}
-
-/**
-  * @brief  Disable HSE ready interrupt
-  * @rmtoll CIER         HSERDYIE      LL_RCC_DisableIT_HSERDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_DisableIT_HSERDY(void)
-{
-  CLEAR_BIT(RCC->CIER, RCC_CIER_HSERDYIE);
-}
-
-/**
-  * @brief  Disable PLL ready interrupt
-  * @rmtoll CIER         PLLRDYIE      LL_RCC_DisableIT_PLLRDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_DisableIT_PLLRDY(void)
-{
-  CLEAR_BIT(RCC->CIER, RCC_CIER_PLLRDYIE);
-}
-
-#if defined(RCC_HSI48_SUPPORT)
-/**
-  * @brief  Disable HSI48 ready interrupt
-  * @rmtoll CIER          HSI48RDYIE    LL_RCC_DisableIT_HSI48RDY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_DisableIT_HSI48RDY(void)
-{
-  CLEAR_BIT(RCC->CIER, RCC_CIER_HSI48RDYIE);
-}
-#endif /* RCC_HSI48_SUPPORT */
-
-/**
-  * @brief  Disable LSE clock security system interrupt
-  * @rmtoll CIER         LSECSSIE      LL_RCC_DisableIT_LSECSS
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_DisableIT_LSECSS(void)
-{
-  CLEAR_BIT(RCC->CIER, RCC_CIER_LSECSSIE);
-}
-
-/**
-  * @brief  Checks if LSI ready interrupt source is enabled or disabled.
-  * @rmtoll CIER         LSIRDYIE      LL_RCC_IsEnabledIT_LSIRDY
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSIRDY(void)
-{
-  return (READ_BIT(RCC->CIER, RCC_CIER_LSIRDYIE) == (RCC_CIER_LSIRDYIE));
-}
-
-/**
-  * @brief  Checks if LSE ready interrupt source is enabled or disabled.
-  * @rmtoll CIER         LSERDYIE      LL_RCC_IsEnabledIT_LSERDY
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSERDY(void)
-{
-  return (READ_BIT(RCC->CIER, RCC_CIER_LSERDYIE) == (RCC_CIER_LSERDYIE));
-}
-
-/**
-  * @brief  Checks if MSI ready interrupt source is enabled or disabled.
-  * @rmtoll CIER         MSIRDYIE      LL_RCC_IsEnabledIT_MSIRDY
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_MSIRDY(void)
-{
-  return (READ_BIT(RCC->CIER, RCC_CIER_MSIRDYIE) == (RCC_CIER_MSIRDYIE));
-}
-
-/**
-  * @brief  Checks if HSI ready interrupt source is enabled or disabled.
-  * @rmtoll CIER         HSIRDYIE      LL_RCC_IsEnabledIT_HSIRDY
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSIRDY(void)
-{
-  return (READ_BIT(RCC->CIER, RCC_CIER_HSIRDYIE) == (RCC_CIER_HSIRDYIE));
-}
-
-/**
-  * @brief  Checks if HSE ready interrupt source is enabled or disabled.
-  * @rmtoll CIER         HSERDYIE      LL_RCC_IsEnabledIT_HSERDY
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSERDY(void)
-{
-  return (READ_BIT(RCC->CIER, RCC_CIER_HSERDYIE) == (RCC_CIER_HSERDYIE));
-}
-
-/**
-  * @brief  Checks if PLL ready interrupt source is enabled or disabled.
-  * @rmtoll CIER         PLLRDYIE      LL_RCC_IsEnabledIT_PLLRDY
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_PLLRDY(void)
-{
-  return (READ_BIT(RCC->CIER, RCC_CIER_PLLRDYIE) == (RCC_CIER_PLLRDYIE));
-}
-
-#if defined(RCC_HSI48_SUPPORT)
-/**
-  * @brief  Checks if HSI48 ready interrupt source is enabled or disabled.
-  * @rmtoll CIER          HSI48RDYIE    LL_RCC_IsEnabledIT_HSI48RDY
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSI48RDY(void)
-{
-  return (READ_BIT(RCC->CIER, RCC_CIER_HSI48RDYIE) == (RCC_CIER_HSI48RDYIE));
-}
-#endif /* RCC_HSI48_SUPPORT */
-
-/**
-  * @brief  Checks if LSECSS interrupt source is enabled or disabled.
-  * @rmtoll CIER         LSECSSIE      LL_RCC_IsEnabledIT_LSECSS
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSECSS(void)
-{
-  return (READ_BIT(RCC->CIER, RCC_CIER_LSECSSIE) == (RCC_CIER_LSECSSIE));
-}
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup RCC_LL_EF_Init De-initialization function
-  * @{
-  */
-ErrorStatus LL_RCC_DeInit(void);
-/**
-  * @}
-  */
-
-/** @defgroup RCC_LL_EF_Get_Freq Get system and peripherals clocks frequency functions
-  * @{
-  */
-void        LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks);
-uint32_t    LL_RCC_GetUSARTClockFreq(uint32_t USARTxSource);
-uint32_t    LL_RCC_GetI2CClockFreq(uint32_t I2CxSource);
-uint32_t    LL_RCC_GetLPUARTClockFreq(uint32_t LPUARTxSource);
-uint32_t    LL_RCC_GetLPTIMClockFreq(uint32_t LPTIMxSource);
-#if defined(USB_OTG_FS) || defined(USB)
-uint32_t    LL_RCC_GetUSBClockFreq(uint32_t USBxSource);
-#endif /* USB_OTG_FS || USB */
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* RCC */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_RCC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rng.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rng.h
deleted file mode 100755
index e80c51f2..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rng.h
+++ /dev/null
@@ -1,353 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_rng.h
-  * @author  MCD Application Team
-  * @brief   Header file of RNG LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_RNG_H
-#define __STM32L0xx_LL_RNG_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined(RNG)
-
-/** @defgroup RNG_LL RNG
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup RNG_LL_Exported_Constants RNG Exported Constants
-  * @{
-  */
-
-/** @defgroup RNG_LL_EC_GET_FLAG Get Flags Defines
-  * @brief    Flags defines which can be used with LL_RNG_ReadReg function
-  * @{
-  */
-#define LL_RNG_SR_DRDY RNG_SR_DRDY    /*!< Register contains valid random data */
-#define LL_RNG_SR_CECS RNG_SR_CECS    /*!< Clock error current status */
-#define LL_RNG_SR_SECS RNG_SR_SECS    /*!< Seed error current status */
-#define LL_RNG_SR_CEIS RNG_SR_CEIS    /*!< Clock error interrupt status */
-#define LL_RNG_SR_SEIS RNG_SR_SEIS    /*!< Seed error interrupt status */
-/**
-  * @}
-  */
-
-/** @defgroup RNG_LL_EC_IT IT Defines
-  * @brief    IT defines which can be used with LL_RNG_ReadReg and  LL_RNG_WriteReg macros
-  * @{
-  */
-#define LL_RNG_CR_IE   RNG_CR_IE      /*!< RNG Interrupt enable */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup RNG_LL_Exported_Macros RNG Exported Macros
-  * @{
-  */
-
-/** @defgroup RNG_LL_EM_WRITE_READ Common Write and read registers Macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in RNG register
-  * @param  __INSTANCE__ RNG Instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_RNG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in RNG register
-  * @param  __INSTANCE__ RNG Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_RNG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup RNG_LL_Exported_Functions RNG Exported Functions
-  * @{
-  */
-/** @defgroup RNG_LL_EF_Configuration RNG Configuration functions
-  * @{
-  */
-
-/**
-  * @brief  Enable Random Number Generation
-  * @rmtoll CR           RNGEN         LL_RNG_Enable
-  * @param  RNGx RNG Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RNG_Enable(RNG_TypeDef *RNGx)
-{
-  SET_BIT(RNGx->CR, RNG_CR_RNGEN);
-}
-
-/**
-  * @brief  Disable Random Number Generation
-  * @rmtoll CR           RNGEN         LL_RNG_Disable
-  * @param  RNGx RNG Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx)
-{
-  CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN);
-}
-
-/**
-  * @brief  Check if Random Number Generator is enabled
-  * @rmtoll CR           RNGEN         LL_RNG_IsEnabled
-  * @param  RNGx RNG Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RNG_IsEnabled(RNG_TypeDef *RNGx)
-{
-  return (READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RNG_LL_EF_FLAG_Management FLAG Management
-  * @{
-  */
-
-/**
-  * @brief  Indicate if the RNG Data ready Flag is set or not
-  * @rmtoll SR           DRDY          LL_RNG_IsActiveFlag_DRDY
-  * @param  RNGx RNG Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef *RNGx)
-{
-  return (READ_BIT(RNGx->SR, RNG_SR_DRDY) == (RNG_SR_DRDY));
-}
-
-/**
-  * @brief  Indicate if the Clock Error Current Status Flag is set or not
-  * @rmtoll SR           CECS          LL_RNG_IsActiveFlag_CECS
-  * @param  RNGx RNG Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(RNG_TypeDef *RNGx)
-{
-  return (READ_BIT(RNGx->SR, RNG_SR_CECS) == (RNG_SR_CECS));
-}
-
-/**
-  * @brief  Indicate if the Seed Error Current Status Flag is set or not
-  * @rmtoll SR           SECS          LL_RNG_IsActiveFlag_SECS
-  * @param  RNGx RNG Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(RNG_TypeDef *RNGx)
-{
-  return (READ_BIT(RNGx->SR, RNG_SR_SECS) == (RNG_SR_SECS));
-}
-
-/**
-  * @brief  Indicate if the Clock Error Interrupt Status Flag is set or not
-  * @rmtoll SR           CEIS          LL_RNG_IsActiveFlag_CEIS
-  * @param  RNGx RNG Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef *RNGx)
-{
-  return (READ_BIT(RNGx->SR, RNG_SR_CEIS) == (RNG_SR_CEIS));
-}
-
-/**
-  * @brief  Indicate if the Seed Error Interrupt Status Flag is set or not
-  * @rmtoll SR           SEIS          LL_RNG_IsActiveFlag_SEIS
-  * @param  RNGx RNG Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef *RNGx)
-{
-  return (READ_BIT(RNGx->SR, RNG_SR_SEIS) == (RNG_SR_SEIS));
-}
-
-/**
-  * @brief  Clear Clock Error interrupt Status (CEIS) Flag
-  * @rmtoll SR           CEIS          LL_RNG_ClearFlag_CEIS
-  * @param  RNGx RNG Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RNG_ClearFlag_CEIS(RNG_TypeDef *RNGx)
-{
-  WRITE_REG(RNGx->SR, ~RNG_SR_CEIS);
-}
-
-/**
-  * @brief  Clear Seed Error interrupt Status (SEIS) Flag
-  * @rmtoll SR           SEIS          LL_RNG_ClearFlag_SEIS
-  * @param  RNGx RNG Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RNG_ClearFlag_SEIS(RNG_TypeDef *RNGx)
-{
-  WRITE_REG(RNGx->SR, ~RNG_SR_SEIS);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RNG_LL_EF_IT_Management IT Management
-  * @{
-  */
-
-/**
-  * @brief  Enable Random Number Generator Interrupt
-  *         (applies for either Seed error, Clock Error or Data ready interrupts)
-  * @rmtoll CR           IE            LL_RNG_EnableIT
-  * @param  RNGx RNG Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RNG_EnableIT(RNG_TypeDef *RNGx)
-{
-  SET_BIT(RNGx->CR, RNG_CR_IE);
-}
-
-/**
-  * @brief  Disable Random Number Generator Interrupt
-  *         (applies for either Seed error, Clock Error or Data ready interrupts)
-  * @rmtoll CR           IE            LL_RNG_DisableIT
-  * @param  RNGx RNG Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RNG_DisableIT(RNG_TypeDef *RNGx)
-{
-  CLEAR_BIT(RNGx->CR, RNG_CR_IE);
-}
-
-/**
-  * @brief  Check if Random Number Generator Interrupt is enabled
-  *         (applies for either Seed error, Clock Error or Data ready interrupts)
-  * @rmtoll CR           IE            LL_RNG_IsEnabledIT
-  * @param  RNGx RNG Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(RNG_TypeDef *RNGx)
-{
-  return (READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RNG_LL_EF_Data_Management Data Management
-  * @{
-  */
-
-/**
-  * @brief  Return32-bit Random Number value
-  * @rmtoll DR           RNDATA        LL_RNG_ReadRandData32
-  * @param  RNGx RNG Instance
-  * @retval Generated 32-bit random value
-  */
-__STATIC_INLINE uint32_t LL_RNG_ReadRandData32(RNG_TypeDef *RNGx)
-{
-  return (uint32_t)(READ_REG(RNGx->DR));
-}
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions
-  * @{
-  */
-
-ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx);
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined(RNG) */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_RNG_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rtc.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rtc.h
deleted file mode 100755
index f5b9b740..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rtc.h
+++ /dev/null
@@ -1,3860 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_rtc.h
-  * @author  MCD Application Team
-  * @brief   Header file of RTC LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_RTC_H
-#define __STM32L0xx_LL_RTC_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined(RTC)
-
-/** @defgroup RTC_LL RTC
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup RTC_LL_Private_Constants RTC Private Constants
-  * @{
-  */
-/* Masks Definition */
-#define RTC_INIT_MASK                 ((uint32_t)0xFFFFFFFFU)
-#define RTC_RSF_MASK                  ((uint32_t)~(RTC_ISR_INIT | RTC_ISR_RSF))
-
-/* Write protection defines */
-#define RTC_WRITE_PROTECTION_DISABLE  ((uint8_t)0xFFU)
-#define RTC_WRITE_PROTECTION_ENABLE_1 ((uint8_t)0xCAU)
-#define RTC_WRITE_PROTECTION_ENABLE_2 ((uint8_t)0x53U)
-
-/* Defines used for the bit position in the register and perform offsets */
-#define RTC_POSITION_TR_HT            (uint32_t)20U
-#define RTC_POSITION_TR_HU            (uint32_t)16U
-#define RTC_POSITION_TR_MT            (uint32_t)12U
-#define RTC_POSITION_TR_MU            (uint32_t)8U
-#define RTC_POSITION_TR_ST            (uint32_t)4U
-#define RTC_POSITION_TR_SU            (uint32_t)0U
-#define RTC_POSITION_DR_YT            (uint32_t)20U
-#define RTC_POSITION_DR_YU            (uint32_t)16U
-#define RTC_POSITION_DR_MT            (uint32_t)12U
-#define RTC_POSITION_DR_MU            (uint32_t)8U
-#define RTC_POSITION_DR_DT            (uint32_t)4U
-#define RTC_POSITION_DR_DU            (uint32_t)0U
-#define RTC_POSITION_DR_WDU           (uint32_t)13U
-#define RTC_POSITION_ALMA_DT          (uint32_t)28U
-#define RTC_POSITION_ALMA_DU          (uint32_t)24U
-#define RTC_POSITION_ALMA_HT          (uint32_t)20U
-#define RTC_POSITION_ALMA_HU          (uint32_t)16U
-#define RTC_POSITION_ALMA_MT          (uint32_t)12U
-#define RTC_POSITION_ALMA_MU          (uint32_t)8U
-#define RTC_POSITION_ALMA_SU          (uint32_t)0U
-#define RTC_POSITION_ALMA_ST          (uint32_t)4U
-#define RTC_POSITION_ALMB_DT          (uint32_t)28U
-#define RTC_POSITION_ALMB_DU          (uint32_t)24U
-#define RTC_POSITION_ALMB_HT          (uint32_t)20U
-#define RTC_POSITION_ALMB_HU          (uint32_t)16U
-#define RTC_POSITION_ALMB_MT          (uint32_t)12U
-#define RTC_POSITION_ALMB_MU          (uint32_t)8U
-#define RTC_POSITION_ALMB_SU          (uint32_t)0U
-#define RTC_POSITION_ALMB_ST          (uint32_t)4U
-#define RTC_POSITION_PRER_PREDIV_A    (uint32_t)16U
-#define RTC_POSITION_ALMA_MASKSS      (uint32_t)24U
-#define RTC_POSITION_ALMB_MASKSS      (uint32_t)24U
-#define RTC_POSITION_TS_HU            (uint32_t)16U
-#define RTC_POSITION_TS_MNU           (uint32_t)8U
-#define RTC_POSITION_TS_WDU           (uint32_t)13U
-#define RTC_POSITION_TS_MU            (uint32_t)8U
-
-/* Defines used to combine date & time */
-#define RTC_OFFSET_WEEKDAY            (uint32_t)24U
-#define RTC_OFFSET_DAY                (uint32_t)16U
-#define RTC_OFFSET_MONTH              (uint32_t)8U
-#define RTC_OFFSET_HOUR               (uint32_t)16U
-#define RTC_OFFSET_MINUTE             (uint32_t)8U
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup RTC_LL_Private_Macros RTC Private Macros
-  * @{
-  */
-/**
-  * @}
-  */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup RTC_LL_ES_INIT RTC Exported Init structure
-  * @{
-  */
-
-/**
-  * @brief  RTC Init structures definition
-  */
-typedef struct
-{
-  uint32_t HourFormat;   /*!< Specifies the RTC Hours Format.
-                              This parameter can be a value of @ref RTC_LL_EC_HOURFORMAT
-                              
-                              This feature can be modified afterwards using unitary function
-                              @ref LL_RTC_SetHourFormat(). */
-
-  uint32_t AsynchPrescaler; /*!< Specifies the RTC Asynchronous Predivider value.
-                              This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7F
-                              
-                              This feature can be modified afterwards using unitary function
-                              @ref LL_RTC_SetAsynchPrescaler(). */
-
-  uint32_t SynchPrescaler;  /*!< Specifies the RTC Synchronous Predivider value.
-                              This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7FFF
-                              
-                              This feature can be modified afterwards using unitary function
-                              @ref LL_RTC_SetSynchPrescaler(). */
-} LL_RTC_InitTypeDef;
-
-/**
-  * @brief  RTC Time structure definition
-  */
-typedef struct
-{
-  uint32_t TimeFormat; /*!< Specifies the RTC AM/PM Time.
-                            This parameter can be a value of @ref RTC_LL_EC_TIME_FORMAT
-
-                            This feature can be modified afterwards using unitary function @ref LL_RTC_TIME_SetFormat(). */
-
-  uint8_t Hours;       /*!< Specifies the RTC Time Hours.
-                            This parameter must be a number between Min_Data = 0 and Max_Data = 12 if the @ref LL_RTC_TIME_FORMAT_PM is selected.
-                            This parameter must be a number between Min_Data = 0 and Max_Data = 23 if the @ref LL_RTC_TIME_FORMAT_AM_OR_24 is selected.
-
-                            This feature can be modified afterwards using unitary function @ref LL_RTC_TIME_SetHour(). */
-
-  uint8_t Minutes;     /*!< Specifies the RTC Time Minutes.
-                            This parameter must be a number between Min_Data = 0 and Max_Data = 59
-
-                            This feature can be modified afterwards using unitary function @ref LL_RTC_TIME_SetMinute(). */
-
-  uint8_t Seconds;     /*!< Specifies the RTC Time Seconds.
-                            This parameter must be a number between Min_Data = 0 and Max_Data = 59
-
-                            This feature can be modified afterwards using unitary function @ref LL_RTC_TIME_SetSecond(). */
-} LL_RTC_TimeTypeDef;
-
-/**
-  * @brief  RTC Date structure definition
-  */
-typedef struct
-{
-  uint8_t WeekDay;  /*!< Specifies the RTC Date WeekDay.
-                         This parameter can be a value of @ref RTC_LL_EC_WEEKDAY
-
-                         This feature can be modified afterwards using unitary function @ref LL_RTC_DATE_SetWeekDay(). */
-
-  uint8_t Month;    /*!< Specifies the RTC Date Month.
-                         This parameter can be a value of @ref RTC_LL_EC_MONTH
-
-                         This feature can be modified afterwards using unitary function @ref LL_RTC_DATE_SetMonth(). */
-
-  uint8_t Day;      /*!< Specifies the RTC Date Day.
-                         This parameter must be a number between Min_Data = 1 and Max_Data = 31
-
-                         This feature can be modified afterwards using unitary function @ref LL_RTC_DATE_SetDay(). */
-
-  uint8_t Year;     /*!< Specifies the RTC Date Year.
-                         This parameter must be a number between Min_Data = 0 and Max_Data = 99
-
-                         This feature can be modified afterwards using unitary function @ref LL_RTC_DATE_SetYear(). */
-} LL_RTC_DateTypeDef;
-
-/**
-  * @brief  RTC Alarm structure definition
-  */
-typedef struct
-{
-  LL_RTC_TimeTypeDef AlarmTime;  /*!< Specifies the RTC Alarm Time members. */
-
-  uint32_t AlarmMask;            /*!< Specifies the RTC Alarm Masks.
-                                      This parameter can be a value of @ref RTC_LL_EC_ALMA_MASK for ALARM A or @ref RTC_LL_EC_ALMB_MASK for ALARM B.
-
-                                      This feature can be modified afterwards using unitary function @ref LL_RTC_ALMA_SetMask() for ALARM A 
-                                      or @ref LL_RTC_ALMB_SetMask() for ALARM B
-                                 */
-
-  uint32_t AlarmDateWeekDaySel;  /*!< Specifies the RTC Alarm is on day or WeekDay.
-                                      This parameter can be a value of @ref RTC_LL_EC_ALMA_WEEKDAY_SELECTION for ALARM A or @ref RTC_LL_EC_ALMB_WEEKDAY_SELECTION for ALARM B
-
-                                      This feature can be modified afterwards using unitary function @ref LL_RTC_ALMA_EnableWeekday() or @ref LL_RTC_ALMA_DisableWeekday()
-                                      for ALARM A or @ref LL_RTC_ALMB_EnableWeekday() or @ref LL_RTC_ALMB_DisableWeekday() for ALARM B
-                                 */
-
-  uint8_t AlarmDateWeekDay;      /*!< Specifies the RTC Alarm Day/WeekDay.
-                                      If AlarmDateWeekDaySel set to day, this parameter  must be a number between Min_Data = 1 and Max_Data = 31.
-
-                                      This feature can be modified afterwards using unitary function @ref LL_RTC_ALMA_SetDay()
-                                      for ALARM A or @ref LL_RTC_ALMB_SetDay() for ALARM B.
-
-                                      If AlarmDateWeekDaySel set to Weekday, this parameter can be a value of @ref RTC_LL_EC_WEEKDAY.
-
-                                      This feature can be modified afterwards using unitary function @ref LL_RTC_ALMA_SetWeekDay()
-                                      for ALARM A or @ref LL_RTC_ALMB_SetWeekDay() for ALARM B.
-                                 */
-} LL_RTC_AlarmTypeDef;
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup RTC_LL_Exported_Constants RTC Exported Constants
-  * @{
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup RTC_LL_EC_FORMAT FORMAT
-  * @{
-  */
-#define LL_RTC_FORMAT_BIN                  ((uint32_t)0x000000000U) /*!< Binary data format */
-#define LL_RTC_FORMAT_BCD                  ((uint32_t)0x000000001U) /*!< BCD data format */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_ALMA_WEEKDAY_SELECTION RTC Alarm A Date WeekDay
-  * @{
-  */
-#define LL_RTC_ALMA_DATEWEEKDAYSEL_DATE    ((uint32_t)0x00000000U) /*!< Alarm A Date is selected */
-#define LL_RTC_ALMA_DATEWEEKDAYSEL_WEEKDAY RTC_ALRMAR_WDSEL        /*!< Alarm A WeekDay is selected */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_ALMB_WEEKDAY_SELECTION RTC Alarm B Date WeekDay
-  * @{
-  */
-#define LL_RTC_ALMB_DATEWEEKDAYSEL_DATE    ((uint32_t)0x00000000U) /*!< Alarm B Date is selected */
-#define LL_RTC_ALMB_DATEWEEKDAYSEL_WEEKDAY RTC_ALRMBR_WDSEL        /*!< Alarm B WeekDay is selected */
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/** @defgroup RTC_LL_EC_GET_FLAG Get Flags Defines
-  * @brief    Flags defines which can be used with LL_RTC_ReadReg function
-  * @{
-  */
-#define LL_RTC_ISR_RECALPF                 RTC_ISR_RECALPF
-#define LL_RTC_ISR_TAMP3F                  RTC_ISR_TAMP3F
-#define LL_RTC_ISR_TAMP2F                  RTC_ISR_TAMP2F
-#define LL_RTC_ISR_TAMP1F                  RTC_ISR_TAMP1F
-#define LL_RTC_ISR_TSOVF                   RTC_ISR_TSOVF
-#define LL_RTC_ISR_TSF                     RTC_ISR_TSF
-#define LL_RTC_ISR_WUTF                    RTC_ISR_WUTF
-#define LL_RTC_ISR_ALRBF                   RTC_ISR_ALRBF
-#define LL_RTC_ISR_ALRAF                   RTC_ISR_ALRAF
-#define LL_RTC_ISR_INITF                   RTC_ISR_INITF
-#define LL_RTC_ISR_RSF                     RTC_ISR_RSF
-#define LL_RTC_ISR_INITS                   RTC_ISR_INITS
-#define LL_RTC_ISR_SHPF                    RTC_ISR_SHPF
-#define LL_RTC_ISR_WUTWF                   RTC_ISR_WUTWF
-#define LL_RTC_ISR_ALRBWF                  RTC_ISR_ALRBWF
-#define LL_RTC_ISR_ALRAWF                  RTC_ISR_ALRAWF
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_IT IT Defines
-  * @brief    IT defines which can be used with LL_RTC_ReadReg and  LL_RTC_WriteReg functions
-  * @{
-  */
-#define LL_RTC_CR_TSIE                     RTC_CR_TSIE
-#define LL_RTC_CR_WUTIE                    RTC_CR_WUTIE
-#define LL_RTC_CR_ALRBIE                   RTC_CR_ALRBIE
-#define LL_RTC_CR_ALRAIE                   RTC_CR_ALRAIE
-#define LL_RTC_TAMPCR_TAMP3IE              RTC_TAMPCR_TAMP3IE
-#define LL_RTC_TAMPCR_TAMP2IE              RTC_TAMPCR_TAMP2IE
-#define LL_RTC_TAMPCR_TAMP1IE              RTC_TAMPCR_TAMP1IE
-#define LL_RTC_TAMPCR_TAMPIE               RTC_TAMPCR_TAMPIE
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_WEEKDAY  WEEK DAY
-  * @{
-  */
-#define LL_RTC_WEEKDAY_MONDAY              ((uint8_t)0x01U) /*!< Monday    */
-#define LL_RTC_WEEKDAY_TUESDAY             ((uint8_t)0x02U) /*!< Tuesday   */
-#define LL_RTC_WEEKDAY_WEDNESDAY           ((uint8_t)0x03U) /*!< Wednesday */
-#define LL_RTC_WEEKDAY_THURSDAY            ((uint8_t)0x04U) /*!< Thrusday  */
-#define LL_RTC_WEEKDAY_FRIDAY              ((uint8_t)0x05U) /*!< Friday    */
-#define LL_RTC_WEEKDAY_SATURDAY            ((uint8_t)0x06U) /*!< Saturday  */
-#define LL_RTC_WEEKDAY_SUNDAY              ((uint8_t)0x07U) /*!< Sunday    */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_MONTH  MONTH
-  * @{
-  */
-#define LL_RTC_MONTH_JANUARY               ((uint8_t)0x01U)  /*!< January   */
-#define LL_RTC_MONTH_FEBRUARY              ((uint8_t)0x02U)  /*!< February  */
-#define LL_RTC_MONTH_MARCH                 ((uint8_t)0x03U)  /*!< March     */
-#define LL_RTC_MONTH_APRIL                 ((uint8_t)0x04U)  /*!< April     */
-#define LL_RTC_MONTH_MAY                   ((uint8_t)0x05U)  /*!< May       */
-#define LL_RTC_MONTH_JUNE                  ((uint8_t)0x06U)  /*!< June      */
-#define LL_RTC_MONTH_JULY                  ((uint8_t)0x07U)  /*!< July      */
-#define LL_RTC_MONTH_AUGUST                ((uint8_t)0x08U)  /*!< August    */
-#define LL_RTC_MONTH_SEPTEMBER             ((uint8_t)0x09U)  /*!< September */
-#define LL_RTC_MONTH_OCTOBER               ((uint8_t)0x10U)  /*!< October   */
-#define LL_RTC_MONTH_NOVEMBER              ((uint8_t)0x11U)  /*!< November  */
-#define LL_RTC_MONTH_DECEMBER              ((uint8_t)0x12U)  /*!< December  */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_HOURFORMAT  HOUR FORMAT
-  * @{
-  */
-#define LL_RTC_HOURFORMAT_24HOUR           (uint32_t)0x00000000U /*!< 24 hour/day format */
-#define LL_RTC_HOURFORMAT_AMPM             RTC_CR_FMT            /*!< AM/PM hour format */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_ALARMOUT  ALARM OUTPUT
-  * @{
-  */
-#define LL_RTC_ALARMOUT_DISABLE            ((uint32_t)0x00000000U) /*!< Output disabled */
-#define LL_RTC_ALARMOUT_ALMA               RTC_CR_OSEL_0           /*!< Alarm A output enabled */
-#define LL_RTC_ALARMOUT_ALMB               RTC_CR_OSEL_1           /*!< Alarm B output enabled */
-#define LL_RTC_ALARMOUT_WAKEUP             RTC_CR_OSEL             /*!< Wakeup output enabled */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_ALARM_OUTPUTTYPE  ALARM OUTPUT TYPE
-  * @{
-  */
-#define LL_RTC_ALARM_OUTPUTTYPE_OPENDRAIN  (uint32_t)0x00000000U  /*!< RTC_ALARM, when mapped on PC13, is open-drain output */
-#define LL_RTC_ALARM_OUTPUTTYPE_PUSHPULL   RTC_OR_ALARMOUTTYPE /*!< RTC_ALARM, when mapped on PC13, is push-pull output */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_OUTPUTPOLARITY_PIN  OUTPUT POLARITY PIN
-  * @{
-  */
-#define LL_RTC_OUTPUTPOLARITY_PIN_HIGH     (uint32_t)0x00000000U /*!< Pin is high when ALRAF/ALRBF/WUTF is asserted (depending on OSEL)*/
-#define LL_RTC_OUTPUTPOLARITY_PIN_LOW      RTC_CR_POL            /*!< Pin is low when ALRAF/ALRBF/WUTF is asserted (depending on OSEL) */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_TIME_FORMAT TIME FORMAT
-  * @{
-  */
-#define LL_RTC_TIME_FORMAT_AM_OR_24        (uint32_t)0x00000000U /*!< AM or 24-hour format */
-#define LL_RTC_TIME_FORMAT_PM              RTC_TR_PM             /*!< PM */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_SHIFT_SECOND  SHIFT SECOND
-  * @{
-  */
-#define LL_RTC_SHIFT_SECOND_DELAY          (uint32_t)0x00000000U /* Delay (seconds) = SUBFS / (PREDIV_S + 1) */
-#define LL_RTC_SHIFT_SECOND_ADVANCE        RTC_SHIFTR_ADD1S      /* Advance (seconds) = (1 - (SUBFS / (PREDIV_S + 1))) */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_ALMA_MASK  ALARMA MASK
-  * @{
-  */
-#define LL_RTC_ALMA_MASK_NONE              ((uint32_t)0x00000000U) /*!< No masks applied on Alarm A*/
-#define LL_RTC_ALMA_MASK_DATEWEEKDAY       RTC_ALRMAR_MSK4         /*!< Date/day do not care in Alarm A comparison */
-#define LL_RTC_ALMA_MASK_HOURS             RTC_ALRMAR_MSK3         /*!< Hours do not care in Alarm A comparison */
-#define LL_RTC_ALMA_MASK_MINUTES           RTC_ALRMAR_MSK2         /*!< Minutes do not care in Alarm A comparison */
-#define LL_RTC_ALMA_MASK_SECONDS           RTC_ALRMAR_MSK1         /*!< Seconds do not care in Alarm A comparison */
-#define LL_RTC_ALMA_MASK_ALL               (RTC_ALRMAR_MSK4 | RTC_ALRMAR_MSK3 | RTC_ALRMAR_MSK2 | RTC_ALRMAR_MSK1) /*!< Masks all */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_ALMA_TIME_FORMAT  ALARMA TIME FORMAT
-  * @{
-  */
-#define LL_RTC_ALMA_TIME_FORMAT_AM         (uint32_t)0x00000000U /*!< AM or 24-hour format */
-#define LL_RTC_ALMA_TIME_FORMAT_PM         RTC_ALRMAR_PM         /*!< PM */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_ALMB_MASK  ALARMB MASK
-  * @{
-  */
-#define LL_RTC_ALMB_MASK_NONE              ((uint32_t)0x00000000U) /*!< No masks applied on Alarm B*/
-#define LL_RTC_ALMB_MASK_DATEWEEKDAY       RTC_ALRMBR_MSK4         /*!< Date/day do not care in Alarm B comparison */
-#define LL_RTC_ALMB_MASK_HOURS             RTC_ALRMBR_MSK3         /*!< Hours do not care in Alarm B comparison */
-#define LL_RTC_ALMB_MASK_MINUTES           RTC_ALRMBR_MSK2         /*!< Minutes do not care in Alarm B comparison */
-#define LL_RTC_ALMB_MASK_SECONDS           RTC_ALRMBR_MSK1         /*!< Seconds do not care in Alarm B comparison */
-#define LL_RTC_ALMB_MASK_ALL               (RTC_ALRMBR_MSK4 | RTC_ALRMBR_MSK3 | RTC_ALRMBR_MSK2 | RTC_ALRMBR_MSK1) /*!< Masks all */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_ALMB_TIME_FORMAT  ALARMB TIME FORMAT
-  * @{
-  */
-#define LL_RTC_ALMB_TIME_FORMAT_AM         (uint32_t)0x00000000U /*!< AM or 24-hour format */
-#define LL_RTC_ALMB_TIME_FORMAT_PM         RTC_ALRMBR_PM         /*!< PM */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_TIMESTAMP_EDGE  TIMESTAMP EDGE
-  * @{
-  */
-#define LL_RTC_TIMESTAMP_EDGE_RISING       (uint32_t)0x00000000U /*!< RTC_TS input rising edge generates a time-stamp event */
-#define LL_RTC_TIMESTAMP_EDGE_FALLING      RTC_CR_TSEDGE         /*!< RTC_TS input falling edge generates a time-stamp even */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_TS_TIME_FORMAT  TIMESTAMP TIME FORMAT
-  * @{
-  */
-#define LL_RTC_TS_TIME_FORMAT_AM           (uint32_t)0x00000000U /*!< AM or 24-hour format */
-#define LL_RTC_TS_TIME_FORMAT_PM           RTC_TSTR_PM           /*!< PM */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_TAMPER  TAMPER
-  * @{
-  */
-#if defined(RTC_TAMPER1_SUPPORT)
-#define LL_RTC_TAMPER_1                    RTC_TAMPCR_TAMP1E /*!< RTC_TAMP1 input detection */
-#endif /* RTC_TAMPER1_SUPPORT */
-#if defined(RTC_TAMPER2_SUPPORT)
-#define LL_RTC_TAMPER_2                    RTC_TAMPCR_TAMP2E /*!< RTC_TAMP2 input detection */
-#endif /* RTC_TAMPER2_SUPPORT */
-#if defined(RTC_TAMPER3_SUPPORT)
-#define LL_RTC_TAMPER_3                    RTC_TAMPCR_TAMP3E /*!< RTC_TAMP3 input detection */
-#endif /* RTC_TAMPER3_SUPPORT */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_TAMPER_MASK  TAMPER MASK
-  * @{
-  */
-#if defined(RTC_TAMPER1_SUPPORT)
-#define LL_RTC_TAMPER_MASK_TAMPER1         RTC_TAMPCR_TAMP1MF /*!< Tamper 1 event generates a trigger event. TAMP1F is masked and internally cleared by hardware.The backup registers are not erased */
-#endif /* RTC_TAMPER1_SUPPORT */
-#if defined(RTC_TAMPER2_SUPPORT)
-#define LL_RTC_TAMPER_MASK_TAMPER2         RTC_TAMPCR_TAMP2MF /*!< Tamper 2 event generates a trigger event. TAMP2F is masked and internally cleared by hardware. The backup registers are not erased. */
-#endif /* RTC_TAMPER2_SUPPORT */
-#if defined(RTC_TAMPER3_SUPPORT)
-#define LL_RTC_TAMPER_MASK_TAMPER3         RTC_TAMPCR_TAMP3MF /*!< Tamper 3 event generates a trigger event. TAMP3F is masked and internally cleared by hardware. The backup registers are not erased */
-#endif /* RTC_TAMPER3_SUPPORT */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_TAMPER_NOERASE  TAMPER NO ERASE
-  * @{
-  */
-#if defined(RTC_TAMPER1_SUPPORT)
-#define LL_RTC_TAMPER_NOERASE_TAMPER1      RTC_TAMPCR_TAMP1NOERASE /*!< Tamper 1 event does not erase the backup registers. */
-#endif /* RTC_TAMPER1_SUPPORT */
-#if defined(RTC_TAMPER2_SUPPORT)
-#define LL_RTC_TAMPER_NOERASE_TAMPER2      RTC_TAMPCR_TAMP2NOERASE /*!< Tamper 2 event does not erase the backup registers. */
-#endif /* RTC_TAMPER2_SUPPORT */
-#if defined(RTC_TAMPER3_SUPPORT)
-#define LL_RTC_TAMPER_NOERASE_TAMPER3      RTC_TAMPCR_TAMP3NOERASE /*!< Tamper 3 event does not erase the backup registers. */
-#endif /* RTC_TAMPER3_SUPPORT */
-/**
-  * @}
-  */
-
-#if defined(RTC_TAMPCR_TAMPPRCH)
-/** @defgroup RTC_LL_EC_TAMPER_DURATION  TAMPER DURATION
-  * @{
-  */
-#define LL_RTC_TAMPER_DURATION_1RTCCLK     ((uint32_t)0x00000000U) /*!< Tamper pins are pre-charged before sampling during 1 RTCCLK cycle  */
-#define LL_RTC_TAMPER_DURATION_2RTCCLK     RTC_TAMPCR_TAMPPRCH_0  /*!< Tamper pins are pre-charged before sampling during 2 RTCCLK cycles */
-#define LL_RTC_TAMPER_DURATION_4RTCCLK     RTC_TAMPCR_TAMPPRCH_1  /*!< Tamper pins are pre-charged before sampling during 4 RTCCLK cycles */
-#define LL_RTC_TAMPER_DURATION_8RTCCLK     RTC_TAMPCR_TAMPPRCH    /*!< Tamper pins are pre-charged before sampling during 8 RTCCLK cycles */
-/**
-  * @}
-  */
-#endif /* RTC_TAMPCR_TAMPPRCH */
-
-#if defined(RTC_TAMPCR_TAMPFLT)
-/** @defgroup RTC_LL_EC_TAMPER_FILTER  TAMPER FILTER
-  * @{
-  */
-#define LL_RTC_TAMPER_FILTER_DISABLE       ((uint32_t)0x00000000U)  /*!< Tamper filter is disabled */
-#define LL_RTC_TAMPER_FILTER_2SAMPLE       RTC_TAMPCR_TAMPFLT_0    /*!< Tamper is activated after 2 consecutive samples at the active level */
-#define LL_RTC_TAMPER_FILTER_4SAMPLE       RTC_TAMPCR_TAMPFLT_1    /*!< Tamper is activated after 4 consecutive samples at the active level */
-#define LL_RTC_TAMPER_FILTER_8SAMPLE       RTC_TAMPCR_TAMPFLT      /*!< Tamper is activated after 8 consecutive samples at the active level. */
-/**
-  * @}
-  */
-#endif /* RTC_TAMPCR_TAMPFLT */
-
-#if defined(RTC_TAMPCR_TAMPFREQ)
-/** @defgroup RTC_LL_EC_TAMPER_SAMPLFREQDIV  TAMPER SAMPLING FREQUENCY DIVIDER
-  * @{
-  */
-#define LL_RTC_TAMPER_SAMPLFREQDIV_32768   ((uint32_t)0x00000000U)                          /*!< Each of the tamper inputs are sampled with a frequency =  RTCCLK / 32768 */
-#define LL_RTC_TAMPER_SAMPLFREQDIV_16384   RTC_TAMPCR_TAMPFREQ_0                           /*!< Each of the tamper inputs are sampled with a frequency =  RTCCLK / 16384 */
-#define LL_RTC_TAMPER_SAMPLFREQDIV_8192    RTC_TAMPCR_TAMPFREQ_1                           /*!< Each of the tamper inputs are sampled with a frequency =  RTCCLK / 8192 */
-#define LL_RTC_TAMPER_SAMPLFREQDIV_4096    (RTC_TAMPCR_TAMPFREQ_1 | RTC_TAMPCR_TAMPFREQ_0) /*!< Each of the tamper inputs are sampled with a frequency =  RTCCLK / 4096 */
-#define LL_RTC_TAMPER_SAMPLFREQDIV_2048    RTC_TAMPCR_TAMPFREQ_2                           /*!< Each of the tamper inputs are sampled with a frequency =  RTCCLK / 2048 */
-#define LL_RTC_TAMPER_SAMPLFREQDIV_1024    (RTC_TAMPCR_TAMPFREQ_2 | RTC_TAMPCR_TAMPFREQ_0) /*!< Each of the tamper inputs are sampled with a frequency =  RTCCLK / 1024 */
-#define LL_RTC_TAMPER_SAMPLFREQDIV_512     (RTC_TAMPCR_TAMPFREQ_2 | RTC_TAMPCR_TAMPFREQ_1) /*!< Each of the tamper inputs are sampled with a frequency =  RTCCLK / 512 */
-#define LL_RTC_TAMPER_SAMPLFREQDIV_256     RTC_TAMPCR_TAMPFREQ                             /*!< Each of the tamper inputs are sampled with a frequency =  RTCCLK / 256 */
-/**
-  * @}
-  */
-#endif /* RTC_TAMPCR_TAMPFREQ */
-
-/** @defgroup RTC_LL_EC_TAMPER_ACTIVELEVEL  TAMPER ACTIVE LEVEL
-  * @{
-  */
-#if defined(RTC_TAMPER1_SUPPORT)
-#define LL_RTC_TAMPER_ACTIVELEVEL_TAMP1    RTC_TAMPCR_TAMP1TRG /*!< RTC_TAMP1 input falling edge (if TAMPFLT = 00) or staying high (if TAMPFLT != 00) triggers a tamper detection event*/
-#endif /* RTC_TAMPER1_SUPPORT */
-#if defined(RTC_TAMPER2_SUPPORT)
-#define LL_RTC_TAMPER_ACTIVELEVEL_TAMP2    RTC_TAMPCR_TAMP2TRG /*!< RTC_TAMP2 input falling edge (if TAMPFLT = 00) or staying high (if TAMPFLT != 00) triggers a tamper detection event*/
-#endif /* RTC_TAMPER2_SUPPORT */
-#if defined(RTC_TAMPER3_SUPPORT)
-#define LL_RTC_TAMPER_ACTIVELEVEL_TAMP3    RTC_TAMPCR_TAMP3TRG /*!< RTC_TAMP3 input falling edge (if TAMPFLT = 00) or staying high (if TAMPFLT != 00) triggers a tamper detection event*/
-#endif /* RTC_TAMPER3_SUPPORT */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_WAKEUPCLOCK_DIV  WAKEUP CLOCK DIV
-  * @{
-  */
-#define LL_RTC_WAKEUPCLOCK_DIV_16          ((uint32_t)0x00000000U)               /*!< RTC/16 clock is selected */
-#define LL_RTC_WAKEUPCLOCK_DIV_8           (RTC_CR_WUCKSEL_0)                    /*!< RTC/8 clock is selected */
-#define LL_RTC_WAKEUPCLOCK_DIV_4           (RTC_CR_WUCKSEL_1)                    /*!< RTC/4 clock is selected */
-#define LL_RTC_WAKEUPCLOCK_DIV_2           (RTC_CR_WUCKSEL_1 | RTC_CR_WUCKSEL_0) /*!< RTC/2 clock is selected */
-#define LL_RTC_WAKEUPCLOCK_CKSPRE          (RTC_CR_WUCKSEL_2)                    /*!< ck_spre (usually 1 Hz) clock is selected */
-#define LL_RTC_WAKEUPCLOCK_CKSPRE_WUT      (RTC_CR_WUCKSEL_2 | RTC_CR_WUCKSEL_1) /*!< ck_spre (usually 1 Hz) clock is selected and 2exp16 is added to the WUT counter value*/
-/**
-  * @}
-  */
-
-#if defined(RTC_BACKUP_SUPPORT)
-/** @defgroup RTC_LL_EC_BKP  BACKUP
-  * @{
-  */
-#define LL_RTC_BKP_DR0                     ((uint32_t)0x00000000U)
-#define LL_RTC_BKP_DR1                     ((uint32_t)0x00000001U)
-#define LL_RTC_BKP_DR2                     ((uint32_t)0x00000002U)
-#define LL_RTC_BKP_DR3                     ((uint32_t)0x00000003U)
-#define LL_RTC_BKP_DR4                     ((uint32_t)0x00000004U)
-/**
-  * @}
-  */
-#endif /* RTC_BACKUP_SUPPORT */
-
-/** @defgroup RTC_LL_EC_CALIB_OUTPUT  Calibration output
-  * @{
-  */
-#define LL_RTC_CALIB_OUTPUT_NONE           (uint32_t)0x00000000U       /*!< Calibration output disabled */
-#define LL_RTC_CALIB_OUTPUT_1HZ            (RTC_CR_COE | RTC_CR_COSEL) /*!< Calibration output is 512 Hz */
-#define LL_RTC_CALIB_OUTPUT_512HZ          (RTC_CR_COE)                /*!< Calibration output is 1 Hz */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_CALIB_INSERTPULSE  Calibration pulse insertion 
-  * @{
-  */
-#define LL_RTC_CALIB_INSERTPULSE_NONE      (uint32_t)0x00000000U /*!< No RTCCLK pulses are added */
-#define LL_RTC_CALIB_INSERTPULSE_SET       RTC_CALR_CALP         /*!< One RTCCLK pulse is effectively inserted every 2exp11 pulses (frequency increased by 488.5 ppm) */
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EC_CALIB_PERIOD  Calibration period
-  * @{
-  */
-#define LL_RTC_CALIB_PERIOD_32SEC          (uint32_t)0x00000000U /*!< Use a 32-second calibration cycle period */
-#define LL_RTC_CALIB_PERIOD_16SEC          RTC_CALR_CALW16       /*!< Use a 16-second calibration cycle period */
-#define LL_RTC_CALIB_PERIOD_8SEC           RTC_CALR_CALW8        /*!< Use a 8-second calibration cycle period */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup RTC_LL_Exported_Macros RTC Exported Macros
-  * @{
-  */
-
-/** @defgroup RTC_LL_EM_WRITE_READ Common Write and read registers Macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in RTC register
-  * @param  __INSTANCE__ RTC Instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_RTC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in RTC register
-  * @param  __INSTANCE__ RTC Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_RTC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EM_Convert Convert helper Macros
-  * @{
-  */
-
-/**
-  * @brief  Helper macro to convert a value from 2 digit decimal format to BCD format
-  * @param  __VALUE__ Byte to be converted
-  * @retval Converted byte
-  */
-#define __LL_RTC_CONVERT_BIN2BCD(__VALUE__) (uint8_t)((((__VALUE__) / 10U) << 4U) | ((__VALUE__) % 10U))
-
-/**
-  * @brief  Helper macro to convert a value from BCD format to 2 digit decimal format
-  * @param  __VALUE__ BCD value to be converted
-  * @retval Converted byte
-  */
-#define __LL_RTC_CONVERT_BCD2BIN(__VALUE__) (uint8_t)(((uint8_t)((__VALUE__) & (uint8_t)0xF0U) >> (uint8_t)0x4U) * 10U + ((__VALUE__) & (uint8_t)0x0FU))
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EM_Date Date helper Macros
-  * @{
-  */
-
-/**
-  * @brief  Helper macro to retrieve weekday.
-  * @param  __RTC_DATE__ Date returned by @ref  LL_RTC_DATE_Get function.
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_WEEKDAY_MONDAY
-  *         @arg @ref LL_RTC_WEEKDAY_TUESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_WEDNESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_THURSDAY
-  *         @arg @ref LL_RTC_WEEKDAY_FRIDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SATURDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SUNDAY
-  */
-#define __LL_RTC_GET_WEEKDAY(__RTC_DATE__) (((__RTC_DATE__) >> RTC_OFFSET_WEEKDAY) & 0x000000FFU)
-
-/**
-  * @brief  Helper macro to retrieve Year in BCD format
-  * @param  __RTC_DATE__ Value returned by @ref  LL_RTC_DATE_Get
-  * @retval Year in BCD format (0x00 . . . 0x99)
-  */
-#define __LL_RTC_GET_YEAR(__RTC_DATE__) ((__RTC_DATE__) & 0x000000FFU)
-
-/**
-  * @brief  Helper macro to retrieve Month in BCD format
-  * @param  __RTC_DATE__ Value returned by @ref  LL_RTC_DATE_Get
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_MONTH_JANUARY
-  *         @arg @ref LL_RTC_MONTH_FEBRUARY
-  *         @arg @ref LL_RTC_MONTH_MARCH
-  *         @arg @ref LL_RTC_MONTH_APRIL
-  *         @arg @ref LL_RTC_MONTH_MAY
-  *         @arg @ref LL_RTC_MONTH_JUNE
-  *         @arg @ref LL_RTC_MONTH_JULY
-  *         @arg @ref LL_RTC_MONTH_AUGUST
-  *         @arg @ref LL_RTC_MONTH_SEPTEMBER
-  *         @arg @ref LL_RTC_MONTH_OCTOBER
-  *         @arg @ref LL_RTC_MONTH_NOVEMBER
-  *         @arg @ref LL_RTC_MONTH_DECEMBER
-  */
-#define __LL_RTC_GET_MONTH(__RTC_DATE__) (((__RTC_DATE__) >>RTC_OFFSET_MONTH) & 0x000000FFU)
-
-/**
-  * @brief  Helper macro to retrieve Day in BCD format
-  * @param  __RTC_DATE__ Value returned by @ref  LL_RTC_DATE_Get
-  * @retval Day in BCD format (0x01 . . . 0x31)
-  */
-#define __LL_RTC_GET_DAY(__RTC_DATE__) (((__RTC_DATE__) >>RTC_OFFSET_DAY) & 0x000000FFU)
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EM_Time Time helper Macros
-  * @{
-  */
-
-/**
-  * @brief  Helper macro to retrieve hour in BCD format
-  * @param  __RTC_TIME__ RTC time returned by @ref LL_RTC_TIME_Get function
-  * @retval Hours in BCD format (0x01. . .0x12 or between Min_Data=0x00 and Max_Data=0x23)
-  */
-#define __LL_RTC_GET_HOUR(__RTC_TIME__) (((__RTC_TIME__) >> RTC_OFFSET_HOUR) & 0x000000FFU)
-
-/**
-  * @brief  Helper macro to retrieve minute in BCD format
-  * @param  __RTC_TIME__ RTC time returned by @ref LL_RTC_TIME_Get function
-  * @retval Minutes in BCD format (0x00. . .0x59)
-  */
-#define __LL_RTC_GET_MINUTE(__RTC_TIME__) (((__RTC_TIME__) >> RTC_OFFSET_MINUTE) & 0x000000FFU)
-
-/**
-  * @brief  Helper macro to retrieve second in BCD format
-  * @param  __RTC_TIME__ RTC time returned by @ref LL_RTC_TIME_Get function
-  * @retval Seconds in  format (0x00. . .0x59)
-  */
-#define __LL_RTC_GET_SECOND(__RTC_TIME__) ((__RTC_TIME__) & 0x000000FFU)
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup RTC_LL_Exported_Functions RTC Exported Functions
-  * @{
-  */
-
-/** @defgroup RTC_LL_EF_Configuration Configuration
-  * @{
-  */
-
-/**
-  * @brief  Set Hours format (24 hour/day or AM/PM hour format)
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @note   It can be written in initialization mode only (@ref LL_RTC_EnableInitMode function)
-  * @rmtoll CR           FMT           LL_RTC_SetHourFormat
-  * @param  RTCx RTC Instance
-  * @param  HourFormat This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_HOURFORMAT_24HOUR
-  *         @arg @ref LL_RTC_HOURFORMAT_AMPM
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_SetHourFormat(RTC_TypeDef *RTCx, uint32_t HourFormat)
-{
-  MODIFY_REG(RTCx->CR, RTC_CR_FMT, HourFormat);
-}
-
-/**
-  * @brief  Get Hours format (24 hour/day or AM/PM hour format)
-  * @rmtoll CR           FMT           LL_RTC_GetHourFormat
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_HOURFORMAT_24HOUR
-  *         @arg @ref LL_RTC_HOURFORMAT_AMPM
-  */
-__STATIC_INLINE uint32_t LL_RTC_GetHourFormat(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_FMT));
-}
-
-/**
-  * @brief  Select the flag to be routed to RTC_ALARM output
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           OSEL          LL_RTC_SetAlarmOutEvent
-  * @param  RTCx RTC Instance
-  * @param  AlarmOutput This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_ALARMOUT_DISABLE
-  *         @arg @ref LL_RTC_ALARMOUT_ALMA
-  *         @arg @ref LL_RTC_ALARMOUT_ALMB
-  *         @arg @ref LL_RTC_ALARMOUT_WAKEUP
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_SetAlarmOutEvent(RTC_TypeDef *RTCx, uint32_t AlarmOutput)
-{
-  MODIFY_REG(RTCx->CR, RTC_CR_OSEL, AlarmOutput);
-}
-
-/**
-  * @brief  Get the flag to be routed to RTC_ALARM output
-  * @rmtoll CR           OSEL          LL_RTC_GetAlarmOutEvent
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_ALARMOUT_DISABLE
-  *         @arg @ref LL_RTC_ALARMOUT_ALMA
-  *         @arg @ref LL_RTC_ALARMOUT_ALMB
-  *         @arg @ref LL_RTC_ALARMOUT_WAKEUP
-  */
-__STATIC_INLINE uint32_t LL_RTC_GetAlarmOutEvent(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_OSEL));
-}
-
-/**
-  * @brief  Set RTC_ALARM output type (ALARM in push-pull or open-drain output)
-  * @note   Used only when RTC_ALARM is mapped on PC13
-  * @rmtoll OR        ALARMOUTTYPE  LL_RTC_SetAlarmOutputType
-  * @param  RTCx RTC Instance
-  * @param  Output This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_ALARM_OUTPUTTYPE_OPENDRAIN
-  *         @arg @ref LL_RTC_ALARM_OUTPUTTYPE_PUSHPULL
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_SetAlarmOutputType(RTC_TypeDef *RTCx, uint32_t Output)
-{
-  MODIFY_REG(RTCx->OR, RTC_OR_ALARMOUTTYPE, Output);
-}
-
-/**
-  * @brief  Get RTC_ALARM output type (ALARM in push-pull or open-drain output)
-  * @note   used only when RTC_ALARM is mapped on PC13
-  * @rmtoll OR        ALARMOUTTYPE  LL_RTC_GetAlarmOutputType
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_ALARM_OUTPUTTYPE_OPENDRAIN
-  *         @arg @ref LL_RTC_ALARM_OUTPUTTYPE_PUSHPULL
-  */
-__STATIC_INLINE uint32_t LL_RTC_GetAlarmOutputType(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->OR, RTC_OR_ALARMOUTTYPE));
-}
-
-/**
-  * @brief  Enable initialization mode
-  * @note   Initialization mode is used to program time and date register (RTC_TR and RTC_DR)
-  *         and prescaler register (RTC_PRER).
-  *         Counters are stopped and start counting from the new value when INIT is reset.
-  * @rmtoll ISR          INIT          LL_RTC_EnableInitMode
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_EnableInitMode(RTC_TypeDef *RTCx)
-{
-  /* Set the Initialization mode */
-  WRITE_REG(RTCx->ISR, RTC_INIT_MASK);
-}
-
-/**
-  * @brief  Disable initialization mode (Free running mode)
-  * @rmtoll ISR          INIT          LL_RTC_DisableInitMode
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DisableInitMode(RTC_TypeDef *RTCx)
-{
-  /* Exit Initialization mode */
-  WRITE_REG(RTCx->ISR, (uint32_t)~RTC_ISR_INIT);
-}
-
-/**
-  * @brief  Set Output polarity (pin is low when ALRAF/ALRBF/WUTF is asserted)
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           POL           LL_RTC_SetOutputPolarity
-  * @param  RTCx RTC Instance
-  * @param  Polarity This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_OUTPUTPOLARITY_PIN_HIGH
-  *         @arg @ref LL_RTC_OUTPUTPOLARITY_PIN_LOW
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_SetOutputPolarity(RTC_TypeDef *RTCx, uint32_t Polarity)
-{
-  MODIFY_REG(RTCx->CR, RTC_CR_POL, Polarity);
-}
-
-/**
-  * @brief  Get Output polarity
-  * @rmtoll CR           POL           LL_RTC_GetOutputPolarity
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_OUTPUTPOLARITY_PIN_HIGH
-  *         @arg @ref LL_RTC_OUTPUTPOLARITY_PIN_LOW
-  */
-__STATIC_INLINE uint32_t LL_RTC_GetOutputPolarity(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_POL));
-}
-
-/**
-  * @brief  Enable Bypass the shadow registers
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           BYPSHAD       LL_RTC_EnableShadowRegBypass
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_EnableShadowRegBypass(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->CR, RTC_CR_BYPSHAD);
-}
-
-/**
-  * @brief  Disable Bypass the shadow registers
-  * @rmtoll CR           BYPSHAD       LL_RTC_DisableShadowRegBypass
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DisableShadowRegBypass(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->CR, RTC_CR_BYPSHAD);
-}
-
-/**
-  * @brief  Check if Shadow registers bypass is enabled or not.
-  * @rmtoll CR           BYPSHAD       LL_RTC_IsShadowRegBypassEnabled
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsShadowRegBypassEnabled(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->CR, RTC_CR_BYPSHAD) == (RTC_CR_BYPSHAD));
-}
-
-/**
-  * @brief  Enable RTC_REFIN reference clock detection (50 or 60 Hz)
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @note   It can be written in initialization mode only (@ref LL_RTC_EnableInitMode function)
-  * @rmtoll CR           REFCKON       LL_RTC_EnableRefClock
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_EnableRefClock(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->CR, RTC_CR_REFCKON);
-}
-
-/**
-  * @brief  Disable RTC_REFIN reference clock detection (50 or 60 Hz)
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @note   It can be written in initialization mode only (@ref LL_RTC_EnableInitMode function)
-  * @rmtoll CR           REFCKON       LL_RTC_DisableRefClock
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DisableRefClock(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->CR, RTC_CR_REFCKON);
-}
-
-/**
-  * @brief  Set Asynchronous prescaler factor
-  * @rmtoll PRER         PREDIV_A      LL_RTC_SetAsynchPrescaler
-  * @param  RTCx RTC Instance
-  * @param  AsynchPrescaler Value between Min_Data = 0 and Max_Data = 0x7F
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_SetAsynchPrescaler(RTC_TypeDef *RTCx, uint32_t AsynchPrescaler)
-{
-  MODIFY_REG(RTCx->PRER, RTC_PRER_PREDIV_A, AsynchPrescaler << RTC_POSITION_PRER_PREDIV_A);
-}
-
-/**
-  * @brief  Set Synchronous prescaler factor
-  * @rmtoll PRER         PREDIV_S      LL_RTC_SetSynchPrescaler
-  * @param  RTCx RTC Instance
-  * @param  SynchPrescaler Value between Min_Data = 0 and Max_Data = 0x7FFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_SetSynchPrescaler(RTC_TypeDef *RTCx, uint32_t SynchPrescaler)
-{
-  MODIFY_REG(RTCx->PRER, RTC_PRER_PREDIV_S, SynchPrescaler);
-}
-
-/**
-  * @brief  Get Asynchronous prescaler factor
-  * @rmtoll PRER         PREDIV_A      LL_RTC_GetAsynchPrescaler
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data = 0 and Max_Data = 0x7F
-  */
-__STATIC_INLINE uint32_t LL_RTC_GetAsynchPrescaler(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->PRER, RTC_PRER_PREDIV_A) >> RTC_POSITION_PRER_PREDIV_A);
-}
-
-/**
-  * @brief  Get Synchronous prescaler factor
-  * @rmtoll PRER         PREDIV_S      LL_RTC_GetSynchPrescaler
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data = 0 and Max_Data = 0x7FFF
-  */
-__STATIC_INLINE uint32_t LL_RTC_GetSynchPrescaler(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->PRER, RTC_PRER_PREDIV_S));
-}
-
-/**
-  * @brief  Enable the write protection for RTC registers.
-  * @rmtoll WPR          KEY           LL_RTC_EnableWriteProtection
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_EnableWriteProtection(RTC_TypeDef *RTCx)
-{
-  WRITE_REG(RTCx->WPR, RTC_WRITE_PROTECTION_DISABLE);
-}
-
-/**
-  * @brief  Disable the write protection for RTC registers.
-  * @rmtoll WPR          KEY           LL_RTC_DisableWriteProtection
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DisableWriteProtection(RTC_TypeDef *RTCx)
-{
-  WRITE_REG(RTCx->WPR, RTC_WRITE_PROTECTION_ENABLE_1);
-  WRITE_REG(RTCx->WPR, RTC_WRITE_PROTECTION_ENABLE_2);
-}
-
-/**
-  * @brief  Enable RTC_OUT remap
-  * @rmtoll OR           OUT_RMP       LL_RTC_EnableOutRemap
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_EnableOutRemap(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->OR, RTC_OR_OUT_RMP);
-}
-
-/**
-  * @brief  Disable RTC_OUT remap
-  * @rmtoll OR           OUT_RMP       LL_RTC_DisableOutRemap
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DisableOutRemap(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->OR, RTC_OR_OUT_RMP);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EF_Time Time
-  * @{
-  */
-
-/**
-  * @brief  Set time format (AM/24-hour or PM notation)
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @note   It can be written in initialization mode only (@ref LL_RTC_EnableInitMode function)
-  * @rmtoll TR           PM            LL_RTC_TIME_SetFormat
-  * @param  RTCx RTC Instance
-  * @param  TimeFormat This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_TIME_FORMAT_AM_OR_24
-  *         @arg @ref LL_RTC_TIME_FORMAT_PM
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TIME_SetFormat(RTC_TypeDef *RTCx, uint32_t TimeFormat)
-{
-  MODIFY_REG(RTCx->TR, RTC_TR_PM, TimeFormat);
-}
-
-/**
-  * @brief  Get time format (AM or PM notation)
-  * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
-  *       before reading this bit
-  * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar
-  *       shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)).
-  * @rmtoll TR           PM            LL_RTC_TIME_GetFormat
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_TIME_FORMAT_AM_OR_24
-  *         @arg @ref LL_RTC_TIME_FORMAT_PM
-  */
-__STATIC_INLINE uint32_t LL_RTC_TIME_GetFormat(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->TR, RTC_TR_PM));
-}
-
-/**
-  * @brief  Set Hours in BCD format
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @note   It can be written in initialization mode only (@ref LL_RTC_EnableInitMode function)
-  * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert hour from binary to BCD format
-  * @rmtoll TR           HT            LL_RTC_TIME_SetHour\n
-  *         TR           HU            LL_RTC_TIME_SetHour
-  * @param  RTCx RTC Instance
-  * @param  Hours Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TIME_SetHour(RTC_TypeDef *RTCx, uint32_t Hours)
-{
-  MODIFY_REG(RTCx->TR, (RTC_TR_HT | RTC_TR_HU),
-             (((Hours & 0xF0U) << (RTC_POSITION_TR_HT - 4U)) | ((Hours & 0x0FU) << RTC_POSITION_TR_HU)));
-}
-
-/**
-  * @brief  Get Hours in BCD format
-  * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
-  *       before reading this bit
-  * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar
-  *       shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)).
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert hour from BCD to
-  *       Binary format
-  * @rmtoll TR           HT            LL_RTC_TIME_GetHour\n
-  *         TR           HU            LL_RTC_TIME_GetHour
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23
-  */
-__STATIC_INLINE uint32_t LL_RTC_TIME_GetHour(RTC_TypeDef *RTCx)
-{
-  register uint32_t temp = 0U;
-
-  temp = READ_BIT(RTCx->TR, (RTC_TR_HT | RTC_TR_HU));
-  return (uint32_t)((((temp & RTC_TR_HT) >> RTC_POSITION_TR_HT) << 4U) | ((temp & RTC_TR_HU) >> RTC_POSITION_TR_HU));
-}
-
-/**
-  * @brief  Set Minutes in BCD format
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @note   It can be written in initialization mode only (@ref LL_RTC_EnableInitMode function)
-  * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Minutes from binary to BCD format
-  * @rmtoll TR           MNT           LL_RTC_TIME_SetMinute\n
-  *         TR           MNU           LL_RTC_TIME_SetMinute
-  * @param  RTCx RTC Instance
-  * @param  Minutes Value between Min_Data=0x00 and Max_Data=0x59
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TIME_SetMinute(RTC_TypeDef *RTCx, uint32_t Minutes)
-{
-  MODIFY_REG(RTCx->TR, (RTC_TR_MNT | RTC_TR_MNU),
-             (((Minutes & 0xF0U) << (RTC_POSITION_TR_MT - 4U)) | ((Minutes & 0x0FU) << RTC_POSITION_TR_MU)));
-}
-
-/**
-  * @brief  Get Minutes in BCD format
-  * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
-  *       before reading this bit
-  * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar
-  *       shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)).
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert minute from BCD
-  *       to Binary format
-  * @rmtoll TR           MNT           LL_RTC_TIME_GetMinute\n
-  *         TR           MNU           LL_RTC_TIME_GetMinute
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0x59
-  */
-__STATIC_INLINE uint32_t LL_RTC_TIME_GetMinute(RTC_TypeDef *RTCx)
-{
-  register uint32_t temp = 0U;
-
-  temp = READ_BIT(RTCx->TR, (RTC_TR_MNT | RTC_TR_MNU));
-  return (uint32_t)((((temp & RTC_TR_MNT) >> RTC_POSITION_TR_MT) << 4U) | ((temp & RTC_TR_MNU) >> RTC_POSITION_TR_MU));
-}
-
-/**
-  * @brief  Set Seconds in BCD format
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @note   It can be written in initialization mode only (@ref LL_RTC_EnableInitMode function)
-  * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Seconds from binary to BCD format
-  * @rmtoll TR           ST            LL_RTC_TIME_SetSecond\n
-  *         TR           SU            LL_RTC_TIME_SetSecond
-  * @param  RTCx RTC Instance
-  * @param  Seconds Value between Min_Data=0x00 and Max_Data=0x59
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TIME_SetSecond(RTC_TypeDef *RTCx, uint32_t Seconds)
-{
-  MODIFY_REG(RTCx->TR, (RTC_TR_ST | RTC_TR_SU),
-             (((Seconds & 0xF0U) << (RTC_POSITION_TR_ST - 4U)) | ((Seconds & 0x0FU) << RTC_POSITION_TR_SU)));
-}
-
-/**
-  * @brief  Get Seconds in BCD format
-  * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
-  *       before reading this bit
-  * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar
-  *       shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)).
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Seconds from BCD
-  *       to Binary format
-  * @rmtoll TR           ST            LL_RTC_TIME_GetSecond\n
-  *         TR           SU            LL_RTC_TIME_GetSecond
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0x59
-  */
-__STATIC_INLINE uint32_t LL_RTC_TIME_GetSecond(RTC_TypeDef *RTCx)
-{
-  register uint32_t temp = 0U;
-
-  temp = READ_BIT(RTCx->TR, (RTC_TR_ST | RTC_TR_SU));
-  return (uint32_t)((((temp & RTC_TR_ST) >> RTC_POSITION_TR_ST) << 4U) | ((temp & RTC_TR_SU) >> RTC_POSITION_TR_SU));
-}
-
-/**
-  * @brief  Set time (hour, minute and second) in BCD format
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @note   It can be written in initialization mode only (@ref LL_RTC_EnableInitMode function)
-  * @note TimeFormat and Hours should follow the same format
-  * @rmtoll TR           PM            LL_RTC_TIME_Config\n
-  *         TR           HT            LL_RTC_TIME_Config\n
-  *         TR           HU            LL_RTC_TIME_Config\n
-  *         TR           MNT           LL_RTC_TIME_Config\n
-  *         TR           MNU           LL_RTC_TIME_Config\n
-  *         TR           ST            LL_RTC_TIME_Config\n
-  *         TR           SU            LL_RTC_TIME_Config
-  * @param  RTCx RTC Instance
-  * @param  Format12_24 This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_TIME_FORMAT_AM_OR_24
-  *         @arg @ref LL_RTC_TIME_FORMAT_PM
-  * @param  Hours Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23
-  * @param  Minutes Value between Min_Data=0x00 and Max_Data=0x59
-  * @param  Seconds Value between Min_Data=0x00 and Max_Data=0x59
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TIME_Config(RTC_TypeDef *RTCx, uint32_t Format12_24, uint32_t Hours, uint32_t Minutes, uint32_t Seconds)
-{
-  register uint32_t temp = 0U;
-
-  temp = Format12_24                                                                                    | \
-         (((Hours & 0xF0U) << (RTC_POSITION_TR_HT - 4U)) | ((Hours & 0x0FU) << RTC_POSITION_TR_HU))     | \
-         (((Minutes & 0xF0U) << (RTC_POSITION_TR_MT - 4U)) | ((Minutes & 0x0FU) << RTC_POSITION_TR_MU)) | \
-         (((Seconds & 0xF0U) << (RTC_POSITION_TR_ST - 4U)) | ((Seconds & 0x0FU) << RTC_POSITION_TR_SU));
-  MODIFY_REG(RTCx->TR, (RTC_TR_PM | RTC_TR_HT | RTC_TR_HU | RTC_TR_MNT | RTC_TR_MNU | RTC_TR_ST | RTC_TR_SU), temp);
-}
-
-/**
-  * @brief  Get time (hour, minute and second) in BCD format
-  * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
-  *       before reading this bit
-  * @note Read either RTC_SSR or RTC_TR locks the values in the higher-order calendar
-  *       shadow registers until RTC_DR is read (LL_RTC_ReadReg(RTC, DR)).
-  * @note helper macros __LL_RTC_GET_HOUR, __LL_RTC_GET_MINUTE and __LL_RTC_GET_SECOND
-  *       are available to get independently each parameter.
-  * @rmtoll TR           HT            LL_RTC_TIME_Get\n
-  *         TR           HU            LL_RTC_TIME_Get\n
-  *         TR           MNT           LL_RTC_TIME_Get\n
-  *         TR           MNU           LL_RTC_TIME_Get\n
-  *         TR           ST            LL_RTC_TIME_Get\n
-  *         TR           SU            LL_RTC_TIME_Get
-  * @param  RTCx RTC Instance
-  * @retval Combination of hours, minutes and seconds (Format: 0x00HHMMSS).
-  */
-__STATIC_INLINE uint32_t LL_RTC_TIME_Get(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)((LL_RTC_TIME_GetHour(RTCx) << RTC_OFFSET_HOUR) | (LL_RTC_TIME_GetMinute(RTCx) << RTC_OFFSET_MINUTE) | LL_RTC_TIME_GetSecond(RTCx));
-}
-
-/**
-  * @brief  Memorize whether the daylight saving time change has been performed
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           BCK           LL_RTC_TIME_EnableDayLightStore
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TIME_EnableDayLightStore(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->CR, RTC_CR_BCK);
-}
-
-/**
-  * @brief  Disable memorization whether the daylight saving time change has been performed.
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           BCK           LL_RTC_TIME_DisableDayLightStore
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TIME_DisableDayLightStore(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->CR, RTC_CR_BCK);
-}
-
-/**
-  * @brief  Check if RTC Day Light Saving stored operation has been enabled or not
-  * @rmtoll CR           BCK           LL_RTC_TIME_IsDayLightStoreEnabled
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_TIME_IsDayLightStoreEnabled(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->CR, RTC_CR_BCK) == (RTC_CR_BCK));
-}
-
-/**
-  * @brief  Subtract 1 hour (winter time change)
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           SUB1H         LL_RTC_TIME_DecHour
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TIME_DecHour(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->CR, RTC_CR_SUB1H);
-}
-
-/**
-  * @brief  Add 1 hour (summer time change)
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           ADD1H         LL_RTC_TIME_IncHour
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TIME_IncHour(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->CR, RTC_CR_ADD1H);
-}
-
-/**
-  * @brief  Get Sub second value in the synchronous prescaler counter.
-  * @note  You can use both SubSeconds value and SecondFraction (PREDIV_S through
-  *        LL_RTC_GetSynchPrescaler function) terms returned to convert Calendar
-  *        SubSeconds value in second fraction ratio with time unit following
-  *        generic formula:
-  *          ==> Seconds fraction ratio * time_unit= [(SecondFraction-SubSeconds)/(SecondFraction+1)] * time_unit
-  *        This conversion can be performed only if no shift operation is pending
-  *        (ie. SHFP=0) when PREDIV_S >= SS.
-  * @rmtoll SSR          SS            LL_RTC_TIME_GetSubSecond
-  * @param  RTCx RTC Instance
-  * @retval Sub second value (number between 0 and 65535)
-  */
-__STATIC_INLINE uint32_t LL_RTC_TIME_GetSubSecond(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->SSR, RTC_SSR_SS));
-}
-
-/**
-  * @brief  Synchronize to a remote clock with a high degree of precision.
-  * @note   This operation effectively subtracts from (delays) or advance the clock of a fraction of a second.
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @note   When REFCKON is set, firmware must not write to Shift control register.
-  * @rmtoll SHIFTR       ADD1S         LL_RTC_TIME_Synchronize\n
-  *         SHIFTR       SUBFS         LL_RTC_TIME_Synchronize
-  * @param  RTCx RTC Instance
-  * @param  ShiftSecond This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_SHIFT_SECOND_DELAY
-  *         @arg @ref LL_RTC_SHIFT_SECOND_ADVANCE
-  * @param  Fraction Number of Seconds Fractions (any value from 0 to 0x7FFF)
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TIME_Synchronize(RTC_TypeDef *RTCx, uint32_t ShiftSecond, uint32_t Fraction)
-{
-  WRITE_REG(RTCx->SHIFTR, ShiftSecond | Fraction);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EF_Date Date
-  * @{
-  */
-
-/**
-  * @brief  Set Year in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Year from binary to BCD format
-  * @rmtoll DR           YT            LL_RTC_DATE_SetYear\n
-  *         DR           YU            LL_RTC_DATE_SetYear
-  * @param  RTCx RTC Instance
-  * @param  Year Value between Min_Data=0x00 and Max_Data=0x99
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DATE_SetYear(RTC_TypeDef *RTCx, uint32_t Year)
-{
-  MODIFY_REG(RTCx->DR, (RTC_DR_YT | RTC_DR_YU),
-             (((Year & 0xF0U) << (RTC_POSITION_DR_YT - 4U)) | ((Year & 0x0FU) << RTC_POSITION_DR_YU)));
-}
-
-/**
-  * @brief  Get Year in BCD format
-  * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
-  *       before reading this bit
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Year from BCD to Binary format
-  * @rmtoll DR           YT            LL_RTC_DATE_GetYear\n
-  *         DR           YU            LL_RTC_DATE_GetYear
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0x99
-  */
-__STATIC_INLINE uint32_t LL_RTC_DATE_GetYear(RTC_TypeDef *RTCx)
-{
-  register uint32_t temp = 0U;
-
-  temp = READ_BIT(RTCx->DR, (RTC_DR_YT | RTC_DR_YU));
-  return (uint32_t)((((temp & RTC_DR_YT) >> RTC_POSITION_DR_YT) << 4U) | ((temp & RTC_DR_YU) >> RTC_POSITION_DR_YU));
-}
-
-/**
-  * @brief  Set Week day
-  * @rmtoll DR           WDU           LL_RTC_DATE_SetWeekDay
-  * @param  RTCx RTC Instance
-  * @param  WeekDay This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_WEEKDAY_MONDAY
-  *         @arg @ref LL_RTC_WEEKDAY_TUESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_WEDNESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_THURSDAY
-  *         @arg @ref LL_RTC_WEEKDAY_FRIDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SATURDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SUNDAY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DATE_SetWeekDay(RTC_TypeDef *RTCx, uint32_t WeekDay)
-{
-  MODIFY_REG(RTCx->DR, RTC_DR_WDU, WeekDay << RTC_POSITION_DR_WDU);
-}
-
-/**
-  * @brief  Get Week day
-  * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
-  *       before reading this bit
-  * @rmtoll DR           WDU           LL_RTC_DATE_GetWeekDay
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_WEEKDAY_MONDAY
-  *         @arg @ref LL_RTC_WEEKDAY_TUESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_WEDNESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_THURSDAY
-  *         @arg @ref LL_RTC_WEEKDAY_FRIDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SATURDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SUNDAY
-  */
-__STATIC_INLINE uint32_t LL_RTC_DATE_GetWeekDay(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->DR, RTC_DR_WDU) >> RTC_POSITION_DR_WDU);
-}
-
-/**
-  * @brief  Set Month in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Month from binary to BCD format
-  * @rmtoll DR           MT            LL_RTC_DATE_SetMonth\n
-  *         DR           MU            LL_RTC_DATE_SetMonth
-  * @param  RTCx RTC Instance
-  * @param  Month This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_MONTH_JANUARY
-  *         @arg @ref LL_RTC_MONTH_FEBRUARY
-  *         @arg @ref LL_RTC_MONTH_MARCH
-  *         @arg @ref LL_RTC_MONTH_APRIL
-  *         @arg @ref LL_RTC_MONTH_MAY
-  *         @arg @ref LL_RTC_MONTH_JUNE
-  *         @arg @ref LL_RTC_MONTH_JULY
-  *         @arg @ref LL_RTC_MONTH_AUGUST
-  *         @arg @ref LL_RTC_MONTH_SEPTEMBER
-  *         @arg @ref LL_RTC_MONTH_OCTOBER
-  *         @arg @ref LL_RTC_MONTH_NOVEMBER
-  *         @arg @ref LL_RTC_MONTH_DECEMBER
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DATE_SetMonth(RTC_TypeDef *RTCx, uint32_t Month)
-{
-  MODIFY_REG(RTCx->DR, (RTC_DR_MT | RTC_DR_MU),
-             (((Month & 0xF0U) << (RTC_POSITION_DR_MT - 4U)) | ((Month & 0x0FU) << RTC_POSITION_DR_MU)));
-}
-
-/**
-  * @brief  Get Month in BCD format
-  * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
-  *       before reading this bit
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Month from BCD to Binary format
-  * @rmtoll DR           MT            LL_RTC_DATE_GetMonth\n
-  *         DR           MU            LL_RTC_DATE_GetMonth
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_MONTH_JANUARY
-  *         @arg @ref LL_RTC_MONTH_FEBRUARY
-  *         @arg @ref LL_RTC_MONTH_MARCH
-  *         @arg @ref LL_RTC_MONTH_APRIL
-  *         @arg @ref LL_RTC_MONTH_MAY
-  *         @arg @ref LL_RTC_MONTH_JUNE
-  *         @arg @ref LL_RTC_MONTH_JULY
-  *         @arg @ref LL_RTC_MONTH_AUGUST
-  *         @arg @ref LL_RTC_MONTH_SEPTEMBER
-  *         @arg @ref LL_RTC_MONTH_OCTOBER
-  *         @arg @ref LL_RTC_MONTH_NOVEMBER
-  *         @arg @ref LL_RTC_MONTH_DECEMBER
-  */
-__STATIC_INLINE uint32_t LL_RTC_DATE_GetMonth(RTC_TypeDef *RTCx)
-{
-  register uint32_t temp = 0U;
-
-  temp = READ_BIT(RTCx->DR, (RTC_DR_MT | RTC_DR_MU));
-  return (uint32_t)((((temp & RTC_DR_MT) >> RTC_POSITION_DR_MT) << 4U) | ((temp & RTC_DR_MU) >> RTC_POSITION_DR_MU));
-}
-
-/**
-  * @brief  Set Day in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Day from binary to BCD format
-  * @rmtoll DR           DT            LL_RTC_DATE_SetDay\n
-  *         DR           DU            LL_RTC_DATE_SetDay
-  * @param  RTCx RTC Instance
-  * @param  Day Value between Min_Data=0x01 and Max_Data=0x31
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DATE_SetDay(RTC_TypeDef *RTCx, uint32_t Day)
-{
-  MODIFY_REG(RTCx->DR, (RTC_DR_DT | RTC_DR_DU),
-             (((Day & 0xF0U) << (RTC_POSITION_DR_DT - 4U)) | ((Day & 0x0FU) << RTC_POSITION_DR_DU)));
-}
-
-/**
-  * @brief  Get Day in BCD format
-  * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
-  *       before reading this bit
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Day from BCD to Binary format
-  * @rmtoll DR           DT            LL_RTC_DATE_GetDay\n
-  *         DR           DU            LL_RTC_DATE_GetDay
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x01 and Max_Data=0x31
-  */
-__STATIC_INLINE uint32_t LL_RTC_DATE_GetDay(RTC_TypeDef *RTCx)
-{
-  register uint32_t temp = 0U;
-
-  temp = READ_BIT(RTCx->DR, (RTC_DR_DT | RTC_DR_DU));
-  return (uint32_t)((((temp & RTC_DR_DT) >> RTC_POSITION_DR_DT) << 4U) | ((temp & RTC_DR_DU) >> RTC_POSITION_DR_DU));
-}
-
-/**
-  * @brief  Set date (WeekDay, Day, Month and Year) in BCD format
-  * @rmtoll DR           WDU           LL_RTC_DATE_Config\n
-  *         DR           MT            LL_RTC_DATE_Config\n
-  *         DR           MU            LL_RTC_DATE_Config\n
-  *         DR           DT            LL_RTC_DATE_Config\n
-  *         DR           DU            LL_RTC_DATE_Config\n
-  *         DR           YT            LL_RTC_DATE_Config\n
-  *         DR           YU            LL_RTC_DATE_Config
-  * @param  RTCx RTC Instance
-  * @param  WeekDay This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_WEEKDAY_MONDAY
-  *         @arg @ref LL_RTC_WEEKDAY_TUESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_WEDNESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_THURSDAY
-  *         @arg @ref LL_RTC_WEEKDAY_FRIDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SATURDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SUNDAY
-  * @param  Day Value between Min_Data=0x01 and Max_Data=0x31
-  * @param  Month This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_MONTH_JANUARY
-  *         @arg @ref LL_RTC_MONTH_FEBRUARY
-  *         @arg @ref LL_RTC_MONTH_MARCH
-  *         @arg @ref LL_RTC_MONTH_APRIL
-  *         @arg @ref LL_RTC_MONTH_MAY
-  *         @arg @ref LL_RTC_MONTH_JUNE
-  *         @arg @ref LL_RTC_MONTH_JULY
-  *         @arg @ref LL_RTC_MONTH_AUGUST
-  *         @arg @ref LL_RTC_MONTH_SEPTEMBER
-  *         @arg @ref LL_RTC_MONTH_OCTOBER
-  *         @arg @ref LL_RTC_MONTH_NOVEMBER
-  *         @arg @ref LL_RTC_MONTH_DECEMBER
-  * @param  Year Value between Min_Data=0x00 and Max_Data=0x99
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DATE_Config(RTC_TypeDef *RTCx, uint32_t WeekDay, uint32_t Day, uint32_t Month, uint32_t Year)
-{
-  register uint32_t temp = 0U;
-
-  temp = (WeekDay << RTC_POSITION_DR_WDU)                                                        | \
-         (((Year & 0xF0U) << (RTC_POSITION_DR_YT - 4U)) | ((Year & 0x0FU) << RTC_POSITION_DR_YU))   | \
-         (((Month & 0xF0U) << (RTC_POSITION_DR_MT - 4U)) | ((Month & 0x0FU) << RTC_POSITION_DR_MU)) | \
-         (((Day & 0xF0U) << (RTC_POSITION_DR_DT - 4U)) | ((Day & 0x0FU) << RTC_POSITION_DR_DU));
-
-  MODIFY_REG(RTCx->DR, (RTC_DR_WDU | RTC_DR_MT | RTC_DR_MU | RTC_DR_DT | RTC_DR_DU | RTC_DR_YT | RTC_DR_YU), temp);
-}
-
-/**
-  * @brief  Get date (WeekDay, Day, Month and Year) in BCD format
-  * @note if shadow mode is disabled (BYPSHAD=0), need to check if RSF flag is set
-  *       before reading this bit
-  * @note helper macros __LL_RTC_GET_WEEKDAY, __LL_RTC_GET_YEAR, __LL_RTC_GET_MONTH,
-  * and __LL_RTC_GET_DAY are available to get independently each parameter.
-  * @rmtoll DR           WDU           LL_RTC_DATE_Get\n
-  *         DR           MT            LL_RTC_DATE_Get\n
-  *         DR           MU            LL_RTC_DATE_Get\n
-  *         DR           DT            LL_RTC_DATE_Get\n
-  *         DR           DU            LL_RTC_DATE_Get\n
-  *         DR           YT            LL_RTC_DATE_Get\n
-  *         DR           YU            LL_RTC_DATE_Get
-  * @param  RTCx RTC Instance
-  * @retval Combination of WeekDay, Day, Month and Year (Format: 0xWWDDMMYY).
-  */
-__STATIC_INLINE uint32_t LL_RTC_DATE_Get(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)((LL_RTC_DATE_GetWeekDay(RTCx) << RTC_OFFSET_WEEKDAY) | (LL_RTC_DATE_GetDay(RTCx) << RTC_OFFSET_DAY) | (LL_RTC_DATE_GetMonth(RTCx) << RTC_OFFSET_MONTH) | LL_RTC_DATE_GetYear(RTCx));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EF_ALARMA ALARMA
-  * @{
-  */
-
-/**
-  * @brief  Enable Alarm A
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           ALRAE         LL_RTC_ALMA_Enable
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMA_Enable(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->CR, RTC_CR_ALRAE);
-}
-
-/**
-  * @brief  Disable Alarm A
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           ALRAE         LL_RTC_ALMA_Disable
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMA_Disable(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->CR, RTC_CR_ALRAE);
-}
-
-/**
-  * @brief  Specify the Alarm A masks.
-  * @rmtoll ALRMAR       MSK4          LL_RTC_ALMA_SetMask\n
-  *         ALRMAR       MSK3          LL_RTC_ALMA_SetMask\n
-  *         ALRMAR       MSK2          LL_RTC_ALMA_SetMask\n
-  *         ALRMAR       MSK1          LL_RTC_ALMA_SetMask
-  * @param  RTCx RTC Instance
-  * @param  Mask This parameter can be a combination of the following values:
-  *         @arg @ref LL_RTC_ALMA_MASK_NONE
-  *         @arg @ref LL_RTC_ALMA_MASK_DATEWEEKDAY
-  *         @arg @ref LL_RTC_ALMA_MASK_HOURS
-  *         @arg @ref LL_RTC_ALMA_MASK_MINUTES
-  *         @arg @ref LL_RTC_ALMA_MASK_SECONDS
-  *         @arg @ref LL_RTC_ALMA_MASK_ALL
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMA_SetMask(RTC_TypeDef *RTCx, uint32_t Mask)
-{
-  MODIFY_REG(RTCx->ALRMAR, RTC_ALRMAR_MSK4 | RTC_ALRMAR_MSK3 | RTC_ALRMAR_MSK2 | RTC_ALRMAR_MSK1, Mask);
-}
-
-/**
-  * @brief  Get the Alarm A masks.
-  * @rmtoll ALRMAR       MSK4          LL_RTC_ALMA_GetMask\n
-  *         ALRMAR       MSK3          LL_RTC_ALMA_GetMask\n
-  *         ALRMAR       MSK2          LL_RTC_ALMA_GetMask\n
-  *         ALRMAR       MSK1          LL_RTC_ALMA_GetMask
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be can be a combination of the following values:
-  *         @arg @ref LL_RTC_ALMA_MASK_NONE
-  *         @arg @ref LL_RTC_ALMA_MASK_DATEWEEKDAY
-  *         @arg @ref LL_RTC_ALMA_MASK_HOURS
-  *         @arg @ref LL_RTC_ALMA_MASK_MINUTES
-  *         @arg @ref LL_RTC_ALMA_MASK_SECONDS
-  *         @arg @ref LL_RTC_ALMA_MASK_ALL
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetMask(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->ALRMAR, RTC_ALRMAR_MSK4 | RTC_ALRMAR_MSK3 | RTC_ALRMAR_MSK2 | RTC_ALRMAR_MSK1));
-}
-
-/**
-  * @brief  Enable AlarmA Week day selection (DU[3:0] represents the week day. DT[1:0] is do not care)
-  * @rmtoll ALRMAR       WDSEL         LL_RTC_ALMA_EnableWeekday
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMA_EnableWeekday(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->ALRMAR, RTC_ALRMAR_WDSEL);
-}
-
-/**
-  * @brief  Disable AlarmA Week day selection (DU[3:0] represents the date )
-  * @rmtoll ALRMAR       WDSEL         LL_RTC_ALMA_DisableWeekday
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMA_DisableWeekday(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->ALRMAR, RTC_ALRMAR_WDSEL);
-}
-
-/**
-  * @brief  Set ALARM A Day in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Day from binary to BCD format
-  * @rmtoll ALRMAR       DT            LL_RTC_ALMA_SetDay\n
-  *         ALRMAR       DU            LL_RTC_ALMA_SetDay
-  * @param  RTCx RTC Instance
-  * @param  Day Value between Min_Data=0x01 and Max_Data=0x31
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMA_SetDay(RTC_TypeDef *RTCx, uint32_t Day)
-{
-  MODIFY_REG(RTCx->ALRMAR, (RTC_ALRMAR_DT | RTC_ALRMAR_DU),
-             (((Day & 0xF0U) << (RTC_POSITION_ALMA_DT - 4U)) | ((Day & 0x0FU) << RTC_POSITION_ALMA_DU)));
-}
-
-/**
-  * @brief  Get ALARM A Day in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Day from BCD to Binary format
-  * @rmtoll ALRMAR       DT            LL_RTC_ALMA_GetDay\n
-  *         ALRMAR       DU            LL_RTC_ALMA_GetDay
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x01 and Max_Data=0x31
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetDay(RTC_TypeDef *RTCx)
-{
-  register uint32_t temp = 0U;
-
-  temp = READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_DT | RTC_ALRMAR_DU));
-  return (uint32_t)((((temp & RTC_ALRMAR_DT) >> RTC_POSITION_ALMA_DT) << 4U) | ((temp & RTC_ALRMAR_DU) >> RTC_POSITION_ALMA_DU));
-}
-
-/**
-  * @brief  Set ALARM A Weekday
-  * @rmtoll ALRMAR       DU            LL_RTC_ALMA_SetWeekDay
-  * @param  RTCx RTC Instance
-  * @param  WeekDay This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_WEEKDAY_MONDAY
-  *         @arg @ref LL_RTC_WEEKDAY_TUESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_WEDNESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_THURSDAY
-  *         @arg @ref LL_RTC_WEEKDAY_FRIDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SATURDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SUNDAY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMA_SetWeekDay(RTC_TypeDef *RTCx, uint32_t WeekDay)
-{
-  MODIFY_REG(RTCx->ALRMAR, RTC_ALRMAR_DU, WeekDay << RTC_POSITION_ALMA_DU);
-}
-
-/**
-  * @brief  Get ALARM A Weekday
-  * @rmtoll ALRMAR       DU            LL_RTC_ALMA_GetWeekDay
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_WEEKDAY_MONDAY
-  *         @arg @ref LL_RTC_WEEKDAY_TUESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_WEDNESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_THURSDAY
-  *         @arg @ref LL_RTC_WEEKDAY_FRIDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SATURDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SUNDAY
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetWeekDay(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->ALRMAR, RTC_ALRMAR_DU) >> RTC_POSITION_ALMA_DU);
-}
-
-/**
-  * @brief  Set Alarm A time format (AM/24-hour or PM notation)
-  * @rmtoll ALRMAR       PM            LL_RTC_ALMA_SetTimeFormat
-  * @param  RTCx RTC Instance
-  * @param  TimeFormat This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_ALMA_TIME_FORMAT_AM
-  *         @arg @ref LL_RTC_ALMA_TIME_FORMAT_PM
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMA_SetTimeFormat(RTC_TypeDef *RTCx, uint32_t TimeFormat)
-{
-  MODIFY_REG(RTCx->ALRMAR, RTC_ALRMAR_PM, TimeFormat);
-}
-
-/**
-  * @brief  Get Alarm A time format (AM or PM notation)
-  * @rmtoll ALRMAR       PM            LL_RTC_ALMA_GetTimeFormat
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_ALMA_TIME_FORMAT_AM
-  *         @arg @ref LL_RTC_ALMA_TIME_FORMAT_PM
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetTimeFormat(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->ALRMAR, RTC_ALRMAR_PM));
-}
-
-/**
-  * @brief  Set ALARM A Hours in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Hours from binary to BCD format
-  * @rmtoll ALRMAR       HT            LL_RTC_ALMA_SetHour\n
-  *         ALRMAR       HU            LL_RTC_ALMA_SetHour
-  * @param  RTCx RTC Instance
-  * @param  Hours Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMA_SetHour(RTC_TypeDef *RTCx, uint32_t Hours)
-{
-  MODIFY_REG(RTCx->ALRMAR, (RTC_ALRMAR_HT | RTC_ALRMAR_HU),
-             (((Hours & 0xF0U) << (RTC_POSITION_ALMA_HT - 4U)) | ((Hours & 0x0FU) << RTC_POSITION_ALMA_HU)));
-}
-
-/**
-  * @brief  Get ALARM A Hours in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Hours from BCD to Binary format
-  * @rmtoll ALRMAR       HT            LL_RTC_ALMA_GetHour\n
-  *         ALRMAR       HU            LL_RTC_ALMA_GetHour
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetHour(RTC_TypeDef *RTCx)
-{
-  register uint32_t temp = 0U;
-
-  temp = READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_HT | RTC_ALRMAR_HU));
-  return (uint32_t)((((temp & RTC_ALRMAR_HT) >> RTC_POSITION_ALMA_HT) << 4U) | ((temp & RTC_ALRMAR_HU) >> RTC_POSITION_ALMA_HU));
-}
-
-/**
-  * @brief  Set ALARM A Minutes in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Minutes from binary to BCD format
-  * @rmtoll ALRMAR       MNT           LL_RTC_ALMA_SetMinute\n
-  *         ALRMAR       MNU           LL_RTC_ALMA_SetMinute
-  * @param  RTCx RTC Instance
-  * @param  Minutes Value between Min_Data=0x00 and Max_Data=0x59
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMA_SetMinute(RTC_TypeDef *RTCx, uint32_t Minutes)
-{
-  MODIFY_REG(RTCx->ALRMAR, (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU),
-             (((Minutes & 0xF0U) << (RTC_POSITION_ALMA_MT - 4U)) | ((Minutes & 0x0FU) << RTC_POSITION_ALMA_MU)));
-}
-
-/**
-  * @brief  Get ALARM A Minutes in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Minutes from BCD to Binary format
-  * @rmtoll ALRMAR       MNT           LL_RTC_ALMA_GetMinute\n
-  *         ALRMAR       MNU           LL_RTC_ALMA_GetMinute
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0x59
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetMinute(RTC_TypeDef *RTCx)
-{
-  register uint32_t temp = 0U;
-
-  temp = READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU));
-  return (uint32_t)((((temp & RTC_ALRMAR_MNT) >> RTC_POSITION_ALMA_MT) << 4U) | ((temp & RTC_ALRMAR_MNU) >> RTC_POSITION_ALMA_MU));
-}
-
-/**
-  * @brief  Set ALARM A Seconds in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Seconds from binary to BCD format
-  * @rmtoll ALRMAR       ST            LL_RTC_ALMA_SetSecond\n
-  *         ALRMAR       SU            LL_RTC_ALMA_SetSecond
-  * @param  RTCx RTC Instance
-  * @param  Seconds Value between Min_Data=0x00 and Max_Data=0x59
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMA_SetSecond(RTC_TypeDef *RTCx, uint32_t Seconds)
-{
-  MODIFY_REG(RTCx->ALRMAR, (RTC_ALRMAR_ST | RTC_ALRMAR_SU),
-             (((Seconds & 0xF0U) << (RTC_POSITION_ALMA_ST - 4U)) | ((Seconds & 0x0FU) << RTC_POSITION_ALMA_SU)));
-}
-
-/**
-  * @brief  Get ALARM A Seconds in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Seconds from BCD to Binary format
-  * @rmtoll ALRMAR       ST            LL_RTC_ALMA_GetSecond\n
-  *         ALRMAR       SU            LL_RTC_ALMA_GetSecond
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0x59
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetSecond(RTC_TypeDef *RTCx)
-{
-  register uint32_t temp = 0U;
-
-  temp = READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_ST | RTC_ALRMAR_SU));
-  return (uint32_t)((((temp & RTC_ALRMAR_ST) >> RTC_POSITION_ALMA_ST) << 4U) | ((temp & RTC_ALRMAR_SU) >> RTC_POSITION_ALMA_SU));
-}
-
-/**
-  * @brief  Set Alarm A Time (hour, minute and second) in BCD format
-  * @rmtoll ALRMAR       PM            LL_RTC_ALMA_ConfigTime\n
-  *         ALRMAR       HT            LL_RTC_ALMA_ConfigTime\n
-  *         ALRMAR       HU            LL_RTC_ALMA_ConfigTime\n
-  *         ALRMAR       MNT           LL_RTC_ALMA_ConfigTime\n
-  *         ALRMAR       MNU           LL_RTC_ALMA_ConfigTime\n
-  *         ALRMAR       ST            LL_RTC_ALMA_ConfigTime\n
-  *         ALRMAR       SU            LL_RTC_ALMA_ConfigTime
-  * @param  RTCx RTC Instance
-  * @param  Format12_24 This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_ALMA_TIME_FORMAT_AM
-  *         @arg @ref LL_RTC_ALMA_TIME_FORMAT_PM
-  * @param  Hours Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23
-  * @param  Minutes Value between Min_Data=0x00 and Max_Data=0x59
-  * @param  Seconds Value between Min_Data=0x00 and Max_Data=0x59
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMA_ConfigTime(RTC_TypeDef *RTCx, uint32_t Format12_24, uint32_t Hours, uint32_t Minutes, uint32_t Seconds)
-{
-  register uint32_t temp = 0U;
-
-  temp = Format12_24 | (((Hours & 0xF0U) << (RTC_POSITION_ALMA_HT - 4U)) | ((Hours & 0x0FU) << RTC_POSITION_ALMA_HU))    | \
-         (((Minutes & 0xF0U) << (RTC_POSITION_ALMA_MT - 4U)) | ((Minutes & 0x0FU) << RTC_POSITION_ALMA_MU)) | \
-         (((Seconds & 0xF0U) << (RTC_POSITION_ALMA_ST - 4U)) | ((Seconds & 0x0FU) << RTC_POSITION_ALMA_SU));
-
-  MODIFY_REG(RTCx->ALRMAR, RTC_ALRMAR_PM | RTC_ALRMAR_HT | RTC_ALRMAR_HU | RTC_ALRMAR_MNT | RTC_ALRMAR_MNU | RTC_ALRMAR_ST | RTC_ALRMAR_SU, temp);
-}
-
-/**
-  * @brief  Get Alarm B Time (hour, minute and second) in BCD format
-  * @note helper macros __LL_RTC_GET_HOUR, __LL_RTC_GET_MINUTE and __LL_RTC_GET_SECOND
-  * are available to get independently each parameter.
-  * @rmtoll ALRMAR       HT            LL_RTC_ALMA_GetTime\n
-  *         ALRMAR       HU            LL_RTC_ALMA_GetTime\n
-  *         ALRMAR       MNT           LL_RTC_ALMA_GetTime\n
-  *         ALRMAR       MNU           LL_RTC_ALMA_GetTime\n
-  *         ALRMAR       ST            LL_RTC_ALMA_GetTime\n
-  *         ALRMAR       SU            LL_RTC_ALMA_GetTime
-  * @param  RTCx RTC Instance
-  * @retval Combination of hours, minutes and seconds.
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetTime(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)((LL_RTC_ALMA_GetHour(RTCx) << RTC_OFFSET_HOUR) | (LL_RTC_ALMA_GetMinute(RTCx) << RTC_OFFSET_MINUTE) | LL_RTC_ALMA_GetSecond(RTCx));
-}
-
-/**
-  * @brief  Set Alarm A Mask the most-significant bits starting at this bit
-  * @note This register can be written only when ALRAE is reset in RTC_CR register,
-  *       or in initialization mode.
-  * @rmtoll ALRMASSR     MASKSS        LL_RTC_ALMA_SetSubSecondMask
-  * @param  RTCx RTC Instance
-  * @param  Mask Value between Min_Data=0x00 and Max_Data=0xF
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMA_SetSubSecondMask(RTC_TypeDef *RTCx, uint32_t Mask)
-{
-  MODIFY_REG(RTCx->ALRMASSR, RTC_ALRMASSR_MASKSS, Mask << RTC_POSITION_ALMA_MASKSS);
-}
-
-/**
-  * @brief  Get Alarm A Mask the most-significant bits starting at this bit
-  * @rmtoll ALRMASSR     MASKSS        LL_RTC_ALMA_GetSubSecondMask
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0xF
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetSubSecondMask(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->ALRMASSR, RTC_ALRMASSR_MASKSS) >> RTC_POSITION_ALMA_MASKSS);
-}
-
-/**
-  * @brief  Set Alarm A Sub seconds value
-  * @rmtoll ALRMASSR     SS            LL_RTC_ALMA_SetSubSecond
-  * @param  RTCx RTC Instance
-  * @param  Subsecond Value between Min_Data=0x00 and Max_Data=0x7FFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMA_SetSubSecond(RTC_TypeDef *RTCx, uint32_t Subsecond)
-{
-  MODIFY_REG(RTCx->ALRMASSR, RTC_ALRMASSR_SS, Subsecond);
-}
-
-/**
-  * @brief  Get Alarm A Sub seconds value
-  * @rmtoll ALRMASSR     SS            LL_RTC_ALMA_GetSubSecond
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0x7FFF
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMA_GetSubSecond(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->ALRMASSR, RTC_ALRMASSR_SS));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EF_ALARMB ALARMB
-  * @{
-  */
-
-/**
-  * @brief  Enable Alarm B
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           ALRBE         LL_RTC_ALMB_Enable
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMB_Enable(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->CR, RTC_CR_ALRBE);
-}
-
-/**
-  * @brief  Disable Alarm B
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           ALRBE         LL_RTC_ALMB_Disable
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMB_Disable(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->CR, RTC_CR_ALRBE);
-}
-
-/**
-  * @brief  Specify the Alarm B masks.
-  * @rmtoll ALRMBR       MSK4          LL_RTC_ALMB_SetMask\n
-  *         ALRMBR       MSK3          LL_RTC_ALMB_SetMask\n
-  *         ALRMBR       MSK2          LL_RTC_ALMB_SetMask\n
-  *         ALRMBR       MSK1          LL_RTC_ALMB_SetMask
-  * @param  RTCx RTC Instance
-  * @param  Mask This parameter can be a combination of the following values:
-  *         @arg @ref LL_RTC_ALMB_MASK_NONE
-  *         @arg @ref LL_RTC_ALMB_MASK_DATEWEEKDAY
-  *         @arg @ref LL_RTC_ALMB_MASK_HOURS
-  *         @arg @ref LL_RTC_ALMB_MASK_MINUTES
-  *         @arg @ref LL_RTC_ALMB_MASK_SECONDS
-  *         @arg @ref LL_RTC_ALMB_MASK_ALL
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMB_SetMask(RTC_TypeDef *RTCx, uint32_t Mask)
-{
-  MODIFY_REG(RTCx->ALRMBR, RTC_ALRMBR_MSK4 | RTC_ALRMBR_MSK3 | RTC_ALRMBR_MSK2 | RTC_ALRMBR_MSK1, Mask);
-}
-
-/**
-  * @brief  Get the Alarm B masks.
-  * @rmtoll ALRMBR       MSK4          LL_RTC_ALMB_GetMask\n
-  *         ALRMBR       MSK3          LL_RTC_ALMB_GetMask\n
-  *         ALRMBR       MSK2          LL_RTC_ALMB_GetMask\n
-  *         ALRMBR       MSK1          LL_RTC_ALMB_GetMask
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be can be a combination of the following values:
-  *         @arg @ref LL_RTC_ALMB_MASK_NONE
-  *         @arg @ref LL_RTC_ALMB_MASK_DATEWEEKDAY
-  *         @arg @ref LL_RTC_ALMB_MASK_HOURS
-  *         @arg @ref LL_RTC_ALMB_MASK_MINUTES
-  *         @arg @ref LL_RTC_ALMB_MASK_SECONDS
-  *         @arg @ref LL_RTC_ALMB_MASK_ALL
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetMask(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->ALRMBR, RTC_ALRMBR_MSK4 | RTC_ALRMBR_MSK3 | RTC_ALRMBR_MSK2 | RTC_ALRMBR_MSK1));
-}
-
-/**
-  * @brief  Enable AlarmB Week day selection (DU[3:0] represents the week day. DT[1:0] is do not care)
-  * @rmtoll ALRMBR       WDSEL         LL_RTC_ALMB_EnableWeekday
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMB_EnableWeekday(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->ALRMBR, RTC_ALRMBR_WDSEL);
-}
-
-/**
-  * @brief  Disable AlarmB Week day selection (DU[3:0] represents the date )
-  * @rmtoll ALRMBR       WDSEL         LL_RTC_ALMB_DisableWeekday
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMB_DisableWeekday(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->ALRMBR, RTC_ALRMBR_WDSEL);
-}
-
-/**
-  * @brief  Set ALARM B Day in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Day from binary to BCD format
-  * @rmtoll ALRMBR       DT            LL_RTC_ALMB_SetDay\n
-  *         ALRMBR       DU            LL_RTC_ALMB_SetDay
-  * @param  RTCx RTC Instance
-  * @param  Day Value between Min_Data=0x01 and Max_Data=0x31
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMB_SetDay(RTC_TypeDef *RTCx, uint32_t Day)
-{
-  MODIFY_REG(RTC->ALRMBR, (RTC_ALRMBR_DT | RTC_ALRMBR_DU),
-             (((Day & 0xF0U) << (RTC_POSITION_ALMB_DT - 4U)) | ((Day & 0x0FU) << RTC_POSITION_ALMB_DU)));
-}
-
-/**
-  * @brief  Get ALARM B Day in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Day from BCD to Binary format
-  * @rmtoll ALRMBR       DT            LL_RTC_ALMB_GetDay\n
-  *         ALRMBR       DU            LL_RTC_ALMB_GetDay
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x01 and Max_Data=0x31
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetDay(RTC_TypeDef *RTCx)
-{
-  register uint32_t temp = 0U;
-
-  temp = READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_DT | RTC_ALRMBR_DU));
-  return (uint32_t)((((temp & RTC_ALRMBR_DT) >> RTC_POSITION_ALMB_DT) << 4U) | ((temp & RTC_ALRMBR_DU) >> RTC_POSITION_ALMB_DU));
-}
-
-/**
-  * @brief  Set ALARM B Weekday
-  * @rmtoll ALRMBR       DU            LL_RTC_ALMB_SetWeekDay
-  * @param  RTCx RTC Instance
-  * @param  WeekDay This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_WEEKDAY_MONDAY
-  *         @arg @ref LL_RTC_WEEKDAY_TUESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_WEDNESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_THURSDAY
-  *         @arg @ref LL_RTC_WEEKDAY_FRIDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SATURDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SUNDAY
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMB_SetWeekDay(RTC_TypeDef *RTCx, uint32_t WeekDay)
-{
-  MODIFY_REG(RTCx->ALRMBR, RTC_ALRMBR_DU, WeekDay << RTC_POSITION_ALMB_DU);
-}
-
-/**
-  * @brief  Get ALARM B Weekday
-  * @rmtoll ALRMBR       DU            LL_RTC_ALMB_GetWeekDay
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_WEEKDAY_MONDAY
-  *         @arg @ref LL_RTC_WEEKDAY_TUESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_WEDNESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_THURSDAY
-  *         @arg @ref LL_RTC_WEEKDAY_FRIDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SATURDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SUNDAY
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetWeekDay(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->ALRMBR, RTC_ALRMBR_DU) >> RTC_POSITION_ALMB_DU);
-}
-
-/**
-  * @brief  Set ALARM B time format (AM/24-hour or PM notation)
-  * @rmtoll ALRMBR       PM            LL_RTC_ALMB_SetTimeFormat
-  * @param  RTCx RTC Instance
-  * @param  TimeFormat This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_ALMB_TIME_FORMAT_AM
-  *         @arg @ref LL_RTC_ALMB_TIME_FORMAT_PM
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMB_SetTimeFormat(RTC_TypeDef *RTCx, uint32_t TimeFormat)
-{
-  MODIFY_REG(RTCx->ALRMBR, RTC_ALRMBR_PM, TimeFormat);
-}
-
-/**
-  * @brief  Get ALARM B time format (AM or PM notation)
-  * @rmtoll ALRMBR       PM            LL_RTC_ALMB_GetTimeFormat
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_ALMB_TIME_FORMAT_AM
-  *         @arg @ref LL_RTC_ALMB_TIME_FORMAT_PM
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetTimeFormat(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->ALRMBR, RTC_ALRMBR_PM));
-}
-
-/**
-  * @brief  Set ALARM B Hours in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Hours from binary to BCD format
-  * @rmtoll ALRMBR       HT            LL_RTC_ALMB_SetHour\n
-  *         ALRMBR       HU            LL_RTC_ALMB_SetHour
-  * @param  RTCx RTC Instance
-  * @param  Hours Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMB_SetHour(RTC_TypeDef *RTCx, uint32_t Hours)
-{
-  MODIFY_REG(RTCx->ALRMBR, (RTC_ALRMBR_HT | RTC_ALRMBR_HU),
-             (((Hours & 0xF0U) << (RTC_POSITION_ALMB_HT - 4U)) | ((Hours & 0x0FU) << RTC_POSITION_ALMB_HU)));
-}
-
-/**
-  * @brief  Get ALARM B Hours in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Hours from BCD to Binary format
-  * @rmtoll ALRMBR       HT            LL_RTC_ALMB_GetHour\n
-  *         ALRMBR       HU            LL_RTC_ALMB_GetHour
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetHour(RTC_TypeDef *RTCx)
-{
-  register uint32_t temp = 0U;
-
-  temp = READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_HT | RTC_ALRMBR_HU));
-  return (uint32_t)((((temp & RTC_ALRMBR_HT) >> RTC_POSITION_ALMB_HT) << 4U) | ((temp & RTC_ALRMBR_HU) >> RTC_POSITION_ALMB_HU));
-}
-
-/**
-  * @brief  Set ALARM B Minutes in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Minutes from binary to BCD format
-  * @rmtoll ALRMBR       MNT           LL_RTC_ALMB_SetMinute\n
-  *         ALRMBR       MNU           LL_RTC_ALMB_SetMinute
-  * @param  RTCx RTC Instance
-  * @param  Minutes between Min_Data=0x00 and Max_Data=0x59
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMB_SetMinute(RTC_TypeDef *RTCx, uint32_t Minutes)
-{
-  MODIFY_REG(RTCx->ALRMBR, (RTC_ALRMBR_MNT | RTC_ALRMBR_MNU),
-             (((Minutes & 0xF0U) << (RTC_POSITION_ALMB_MT - 4U)) | ((Minutes & 0x0FU) << RTC_POSITION_ALMB_MU)));
-}
-
-/**
-  * @brief  Get ALARM B Minutes in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Minutes from BCD to Binary format
-  * @rmtoll ALRMBR       MNT           LL_RTC_ALMB_GetMinute\n
-  *         ALRMBR       MNU           LL_RTC_ALMB_GetMinute
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0x59
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetMinute(RTC_TypeDef *RTCx)
-{
-  register uint32_t temp = 0U;
-
-  temp = READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_MNT | RTC_ALRMBR_MNU));
-  return (uint32_t)((((temp & RTC_ALRMBR_MNT) >> RTC_POSITION_ALMB_MT) << 4U) | ((temp & RTC_ALRMBR_MNU) >> RTC_POSITION_ALMB_MU));
-}
-
-/**
-  * @brief  Set ALARM B Seconds in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BIN2BCD is available to convert Seconds from binary to BCD format
-  * @rmtoll ALRMBR       ST            LL_RTC_ALMB_SetSecond\n
-  *         ALRMBR       SU            LL_RTC_ALMB_SetSecond
-  * @param  RTCx RTC Instance
-  * @param  Seconds Value between Min_Data=0x00 and Max_Data=0x59
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMB_SetSecond(RTC_TypeDef *RTCx, uint32_t Seconds)
-{
-  MODIFY_REG(RTCx->ALRMBR, (RTC_ALRMBR_ST | RTC_ALRMBR_SU),
-             (((Seconds & 0xF0U) << (RTC_POSITION_ALMB_ST - 4U)) | ((Seconds & 0x0FU) << RTC_POSITION_ALMB_SU)));
-}
-
-/**
-  * @brief  Get ALARM B Seconds in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Seconds from BCD to Binary format
-  * @rmtoll ALRMBR       ST            LL_RTC_ALMB_GetSecond\n
-  *         ALRMBR       SU            LL_RTC_ALMB_GetSecond
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0x59
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetSecond(RTC_TypeDef *RTCx)
-{
-  register uint32_t temp = 0U;
-
-  temp = READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_ST | RTC_ALRMBR_SU));
-  return (uint32_t)((((temp & RTC_ALRMBR_ST) >> RTC_POSITION_ALMB_ST) << 4U) | ((temp & RTC_ALRMBR_SU) >> RTC_POSITION_ALMB_SU));
-}
-
-/**
-  * @brief  Set Alarm B Time (hour, minute and second) in BCD format
-  * @rmtoll ALRMBR       PM            LL_RTC_ALMB_ConfigTime\n
-  *         ALRMBR       HT            LL_RTC_ALMB_ConfigTime\n
-  *         ALRMBR       HU            LL_RTC_ALMB_ConfigTime\n
-  *         ALRMBR       MNT           LL_RTC_ALMB_ConfigTime\n
-  *         ALRMBR       MNU           LL_RTC_ALMB_ConfigTime\n
-  *         ALRMBR       ST            LL_RTC_ALMB_ConfigTime\n
-  *         ALRMBR       SU            LL_RTC_ALMB_ConfigTime
-  * @param  RTCx RTC Instance
-  * @param  Format12_24 This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_ALMB_TIME_FORMAT_AM
-  *         @arg @ref LL_RTC_ALMB_TIME_FORMAT_PM
-  * @param  Hours Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23
-  * @param  Minutes Value between Min_Data=0x00 and Max_Data=0x59
-  * @param  Seconds Value between Min_Data=0x00 and Max_Data=0x59
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMB_ConfigTime(RTC_TypeDef *RTCx, uint32_t Format12_24, uint32_t Hours, uint32_t Minutes, uint32_t Seconds)
-{
-  register uint32_t temp = 0U;
-
-  temp = Format12_24 | (((Hours & 0xF0U) << (RTC_POSITION_ALMB_HT - 4U)) | ((Hours & 0x0FU) << RTC_POSITION_ALMB_HU))    | \
-         (((Minutes & 0xF0U) << (RTC_POSITION_ALMB_MT - 4U)) | ((Minutes & 0x0FU) << RTC_POSITION_ALMB_MU)) | \
-         (((Seconds & 0xF0U) << (RTC_POSITION_ALMB_ST - 4U)) | ((Seconds & 0x0FU) << RTC_POSITION_ALMB_SU));
-
-  MODIFY_REG(RTCx->ALRMBR, RTC_ALRMBR_PM| RTC_ALRMBR_HT | RTC_ALRMBR_HU | RTC_ALRMBR_MNT | RTC_ALRMBR_MNU | RTC_ALRMBR_ST | RTC_ALRMBR_SU, temp);
-}
-
-/**
-  * @brief  Get Alarm B Time (hour, minute and second) in BCD format
-  * @note helper macros __LL_RTC_GET_HOUR, __LL_RTC_GET_MINUTE and __LL_RTC_GET_SECOND
-  * are available to get independently each parameter.
-  * @rmtoll ALRMBR       HT            LL_RTC_ALMB_GetTime\n
-  *         ALRMBR       HU            LL_RTC_ALMB_GetTime\n
-  *         ALRMBR       MNT           LL_RTC_ALMB_GetTime\n
-  *         ALRMBR       MNU           LL_RTC_ALMB_GetTime\n
-  *         ALRMBR       ST            LL_RTC_ALMB_GetTime\n
-  *         ALRMBR       SU            LL_RTC_ALMB_GetTime
-  * @param  RTCx RTC Instance
-  * @retval Combination of hours, minutes and seconds.
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetTime(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)((LL_RTC_ALMB_GetHour(RTCx) << RTC_OFFSET_HOUR) | (LL_RTC_ALMB_GetMinute(RTCx) << RTC_OFFSET_MINUTE) | LL_RTC_ALMB_GetSecond(RTCx));
-}
-
-/**
-  * @brief  Set Alarm B Mask the most-significant bits starting at this bit
-  * @note This register can be written only when ALRBE is reset in RTC_CR register,
-  *       or in initialization mode.
-  * @rmtoll ALRMBSSR     MASKSS        LL_RTC_ALMB_SetSubSecondMask
-  * @param  RTCx RTC Instance
-  * @param  Mask Value between Min_Data=0x00 and Max_Data=0xF
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMB_SetSubSecondMask(RTC_TypeDef *RTCx, uint32_t Mask)
-{
-  MODIFY_REG(RTCx->ALRMBSSR, RTC_ALRMBSSR_MASKSS, Mask << RTC_POSITION_ALMB_MASKSS);
-}
-
-/**
-  * @brief  Get Alarm B Mask the most-significant bits starting at this bit
-  * @rmtoll ALRMBSSR     MASKSS        LL_RTC_ALMB_GetSubSecondMask
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0xF
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetSubSecondMask(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->ALRMBSSR, RTC_ALRMBSSR_MASKSS)  >> RTC_POSITION_ALMB_MASKSS);
-}
-
-/**
-  * @brief  Set Alarm B Sub seconds value
-  * @rmtoll ALRMBSSR     SS            LL_RTC_ALMB_SetSubSecond
-  * @param  RTCx RTC Instance
-  * @param  Subsecond Value between Min_Data=0x00 and Max_Data=0x7FFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ALMB_SetSubSecond(RTC_TypeDef *RTCx, uint32_t Subsecond)
-{
-  MODIFY_REG(RTCx->ALRMBSSR, RTC_ALRMBSSR_SS, Subsecond);
-}
-
-/**
-  * @brief  Get Alarm B Sub seconds value
-  * @rmtoll ALRMBSSR     SS            LL_RTC_ALMB_GetSubSecond
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0x7FFF
-  */
-__STATIC_INLINE uint32_t LL_RTC_ALMB_GetSubSecond(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->ALRMBSSR, RTC_ALRMBSSR_SS));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EF_Timestamp Timestamp
-  * @{
-  */
-
-/**
-  * @brief  Enable Timestamp
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           TSE           LL_RTC_TS_Enable
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TS_Enable(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->CR, RTC_CR_TSE);
-}
-
-/**
-  * @brief  Disable Timestamp
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           TSE           LL_RTC_TS_Disable
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TS_Disable(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->CR, RTC_CR_TSE);
-}
-
-/**
-  * @brief  Set Time-stamp event active edge
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @note TSE must be reset when TSEDGE is changed to avoid unwanted TSF setting
-  * @rmtoll CR           TSEDGE        LL_RTC_TS_SetActiveEdge
-  * @param  RTCx RTC Instance
-  * @param  Edge This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_TIMESTAMP_EDGE_RISING
-  *         @arg @ref LL_RTC_TIMESTAMP_EDGE_FALLING
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TS_SetActiveEdge(RTC_TypeDef *RTCx, uint32_t Edge)
-{
-  MODIFY_REG(RTCx->CR, RTC_CR_TSEDGE, Edge);
-}
-
-/**
-  * @brief  Get Time-stamp event active edge
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           TSEDGE        LL_RTC_TS_GetActiveEdge
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_TIMESTAMP_EDGE_RISING
-  *         @arg @ref LL_RTC_TIMESTAMP_EDGE_FALLING
-  */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetActiveEdge(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_TSEDGE));
-}
-
-/**
-  * @brief  Get Timestamp AM/PM notation (AM or 24-hour format)
-  * @rmtoll TSTR         PM            LL_RTC_TS_GetTimeFormat
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_TS_TIME_FORMAT_AM
-  *         @arg @ref LL_RTC_TS_TIME_FORMAT_PM
-  */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetTimeFormat(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->TSTR, RTC_TSTR_PM));
-}
-
-/**
-  * @brief  Get Timestamp Hours in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Hours from BCD to Binary format
-  * @rmtoll TSTR         HT            LL_RTC_TS_GetHour\n
-  *         TSTR         HU            LL_RTC_TS_GetHour
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x01 and Max_Data=0x12 or between Min_Data=0x00 and Max_Data=0x23
-  */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetHour(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->TSTR, RTC_TSTR_HT | RTC_TSTR_HU) >> RTC_POSITION_TS_HU);
-}
-
-/**
-  * @brief  Get Timestamp Minutes in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Minutes from BCD to Binary format
-  * @rmtoll TSTR         MNT           LL_RTC_TS_GetMinute\n
-  *         TSTR         MNU           LL_RTC_TS_GetMinute
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0x59
-  */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetMinute(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->TSTR, RTC_TSTR_MNT | RTC_TSTR_MNU) >> RTC_POSITION_TS_MNU);
-}
-
-/**
-  * @brief  Get Timestamp Seconds in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Seconds from BCD to Binary format
-  * @rmtoll TSTR         ST            LL_RTC_TS_GetSecond\n
-  *         TSTR         SU            LL_RTC_TS_GetSecond
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0x59
-  */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetSecond(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->TSTR, RTC_TSTR_ST | RTC_TSTR_SU));
-}
-
-/**
-  * @brief  Get Timestamp time (hour, minute and second) in BCD format
-  * @note helper macros __LL_RTC_GET_HOUR, __LL_RTC_GET_MINUTE and __LL_RTC_GET_SECOND
-  * are available to get independently each parameter.
-  * @rmtoll TSTR         HT            LL_RTC_TS_GetTime\n
-  *         TSTR         HU            LL_RTC_TS_GetTime\n
-  *         TSTR         MNT           LL_RTC_TS_GetTime\n
-  *         TSTR         MNU           LL_RTC_TS_GetTime\n
-  *         TSTR         ST            LL_RTC_TS_GetTime\n
-  *         TSTR         SU            LL_RTC_TS_GetTime
-  * @param  RTCx RTC Instance
-  * @retval Combination of hours, minutes and seconds.
-  */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetTime(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->TSTR,
-                             RTC_TSTR_HT | RTC_TSTR_HU | RTC_TSTR_MNT | RTC_TSTR_MNU | RTC_TSTR_ST | RTC_TSTR_SU));
-}
-
-/**
-  * @brief  Get Timestamp Week day
-  * @rmtoll TSDR         WDU           LL_RTC_TS_GetWeekDay
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_WEEKDAY_MONDAY
-  *         @arg @ref LL_RTC_WEEKDAY_TUESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_WEDNESDAY
-  *         @arg @ref LL_RTC_WEEKDAY_THURSDAY
-  *         @arg @ref LL_RTC_WEEKDAY_FRIDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SATURDAY
-  *         @arg @ref LL_RTC_WEEKDAY_SUNDAY
-  */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetWeekDay(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_WDU) >> RTC_POSITION_TS_WDU);
-}
-
-/**
-  * @brief  Get Timestamp Month in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Month from BCD to Binary format
-  * @rmtoll TSDR         MT            LL_RTC_TS_GetMonth\n
-  *         TSDR         MU            LL_RTC_TS_GetMonth
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_MONTH_JANUARY
-  *         @arg @ref LL_RTC_MONTH_FEBRUARY
-  *         @arg @ref LL_RTC_MONTH_MARCH
-  *         @arg @ref LL_RTC_MONTH_APRIL
-  *         @arg @ref LL_RTC_MONTH_MAY
-  *         @arg @ref LL_RTC_MONTH_JUNE
-  *         @arg @ref LL_RTC_MONTH_JULY
-  *         @arg @ref LL_RTC_MONTH_AUGUST
-  *         @arg @ref LL_RTC_MONTH_SEPTEMBER
-  *         @arg @ref LL_RTC_MONTH_OCTOBER
-  *         @arg @ref LL_RTC_MONTH_NOVEMBER
-  *         @arg @ref LL_RTC_MONTH_DECEMBER
-  */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetMonth(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_MT | RTC_TSDR_MU) >> RTC_POSITION_TS_MU);
-}
-
-/**
-  * @brief  Get Timestamp Day in BCD format
-  * @note helper macro __LL_RTC_CONVERT_BCD2BIN is available to convert Day from BCD to Binary format
-  * @rmtoll TSDR         DT            LL_RTC_TS_GetDay\n
-  *         TSDR         DU            LL_RTC_TS_GetDay
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x01 and Max_Data=0x31
-  */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetDay(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_DT | RTC_TSDR_DU));
-}
-
-/**
-  * @brief  Get Timestamp date (WeekDay, Day and Month) in BCD format
-  * @note helper macros __LL_RTC_GET_WEEKDAY, __LL_RTC_GET_MONTH,
-  * and __LL_RTC_GET_DAY are available to get independently each parameter.
-  * @rmtoll TSDR         WDU           LL_RTC_TS_GetDate\n
-  *         TSDR         MT            LL_RTC_TS_GetDate\n
-  *         TSDR         MU            LL_RTC_TS_GetDate\n
-  *         TSDR         DT            LL_RTC_TS_GetDate\n
-  *         TSDR         DU            LL_RTC_TS_GetDate
-  * @param  RTCx RTC Instance
-  * @retval Combination of Weekday, Day and Month
-  */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetDate(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->TSDR, RTC_TSDR_WDU | RTC_TSDR_MT | RTC_TSDR_MU | RTC_TSDR_DT | RTC_TSDR_DU));
-}
-
-/**
-  * @brief  Get time-stamp sub second value
-  * @rmtoll TSSSR        SS            LL_RTC_TS_GetSubSecond
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0xFFFF
-  */
-__STATIC_INLINE uint32_t LL_RTC_TS_GetSubSecond(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->TSSSR, RTC_TSSSR_SS));
-}
-
-#if defined(RTC_TAMPCR_TAMPTS)
-/**
-  * @brief  Activate timestamp on tamper detection event
-  * @rmtoll TAMPCR       TAMPTS        LL_RTC_TS_EnableOnTamper
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TS_EnableOnTamper(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPTS);
-}
-
-/**
-  * @brief  Disable timestamp on tamper detection event
-  * @rmtoll TAMPCR       TAMPTS        LL_RTC_TS_DisableOnTamper
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TS_DisableOnTamper(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPTS);
-}
-#endif /* RTC_TAMPCR_TAMPTS */
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EF_Tamper Tamper
-  * @{
-  */
-
-/**
-  * @brief  Enable RTC_TAMPx input detection
-  * @rmtoll TAMPCR       TAMP1E        LL_RTC_TAMPER_Enable\n
-  *         TAMPCR       TAMP2E        LL_RTC_TAMPER_Enable\n
-  *         TAMPCR       TAMP3E        LL_RTC_TAMPER_Enable
-  * @param  RTCx RTC Instance
-  * @param  Tamper This parameter can be a combination of the following values:
-  *         @arg @ref LL_RTC_TAMPER_1 (*)
-  *         @arg @ref LL_RTC_TAMPER_2 
-  *         @arg @ref LL_RTC_TAMPER_3 (*)
-  *         
-  *         (*) value not defined in all devices.
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TAMPER_Enable(RTC_TypeDef *RTCx, uint32_t Tamper)
-{
-  SET_BIT(RTCx->TAMPCR, Tamper);
-}
-
-/**
-  * @brief  Clear RTC_TAMPx input detection
-  * @rmtoll TAMPCR       TAMP1E        LL_RTC_TAMPER_Disable\n
-  *         TAMPCR       TAMP2E        LL_RTC_TAMPER_Disable\n
-  *         TAMPCR       TAMP3E        LL_RTC_TAMPER_Disable
-  * @param  RTCx RTC Instance
-  * @param  Tamper This parameter can be a combination of the following values:
-  *         @arg @ref LL_RTC_TAMPER_1 (*)
-  *         @arg @ref LL_RTC_TAMPER_2 
-  *         @arg @ref LL_RTC_TAMPER_3 (*)
-  *         
-  *         (*) value not defined in all devices.
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TAMPER_Disable(RTC_TypeDef *RTCx, uint32_t Tamper)
-{
-  CLEAR_BIT(RTCx->TAMPCR, Tamper);
-}
-
-/**
-  * @brief  Enable Tamper mask flag
-  * @note Associated Tamper IT must not enabled when tamper mask is set.
-  * @rmtoll TAMPCR       TAMP1MF       LL_RTC_TAMPER_EnableMask\n
-  *         TAMPCR       TAMP2MF       LL_RTC_TAMPER_EnableMask\n
-  *         TAMPCR       TAMP3MF       LL_RTC_TAMPER_EnableMask
-  * @param  RTCx RTC Instance
-  * @param  Mask This parameter can be a combination of the following values:
-  *         @arg @ref LL_RTC_TAMPER_MASK_TAMPER1 (*)
-  *         @arg @ref LL_RTC_TAMPER_MASK_TAMPER2 
-  *         @arg @ref LL_RTC_TAMPER_MASK_TAMPER3 (*)
-  *         
-  *         (*) value not defined in all devices.
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TAMPER_EnableMask(RTC_TypeDef *RTCx, uint32_t Mask)
-{
-  SET_BIT(RTCx->TAMPCR, Mask);
-}
-
-/**
-  * @brief  Disable Tamper mask flag
-  * @rmtoll TAMPCR       TAMP1MF       LL_RTC_TAMPER_DisableMask\n
-  *         TAMPCR       TAMP2MF       LL_RTC_TAMPER_DisableMask\n
-  *         TAMPCR       TAMP3MF       LL_RTC_TAMPER_DisableMask
-  * @param  RTCx RTC Instance
-  * @param  Mask This parameter can be a combination of the following values:
-  *         @arg @ref LL_RTC_TAMPER_MASK_TAMPER1 (*)
-  *         @arg @ref LL_RTC_TAMPER_MASK_TAMPER2 
-  *         @arg @ref LL_RTC_TAMPER_MASK_TAMPER3 (*)
-  *         
-  *         (*) value not defined in all devices.
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TAMPER_DisableMask(RTC_TypeDef *RTCx, uint32_t Mask)
-{
-  CLEAR_BIT(RTCx->TAMPCR, Mask);
-}
-
-/**
-  * @brief  Enable backup register erase after Tamper event detection
-  * @rmtoll TAMPCR       TAMP1NOERASE  LL_RTC_TAMPER_EnableEraseBKP\n
-  *         TAMPCR       TAMP2NOERASE  LL_RTC_TAMPER_EnableEraseBKP\n
-  *         TAMPCR       TAMP3NOERASE  LL_RTC_TAMPER_EnableEraseBKP
-  * @param  RTCx RTC Instance
-  * @param  Tamper This parameter can be a combination of the following values:
-  *         @arg @ref LL_RTC_TAMPER_NOERASE_TAMPER1 (*)
-  *         @arg @ref LL_RTC_TAMPER_NOERASE_TAMPER2 
-  *         @arg @ref LL_RTC_TAMPER_NOERASE_TAMPER3 (*)
-  *         
-  *         (*) value not defined in all devices.
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TAMPER_EnableEraseBKP(RTC_TypeDef *RTCx, uint32_t Tamper)
-{
-  CLEAR_BIT(RTCx->TAMPCR, Tamper);
-}
-
-/**
-  * @brief  Disable backup register erase after Tamper event detection
-  * @rmtoll TAMPCR       TAMP1NOERASE  LL_RTC_TAMPER_DisableEraseBKP\n
-  *         TAMPCR       TAMP2NOERASE  LL_RTC_TAMPER_DisableEraseBKP\n
-  *         TAMPCR       TAMP3NOERASE  LL_RTC_TAMPER_DisableEraseBKP
-  * @param  RTCx RTC Instance
-  * @param  Tamper This parameter can be a combination of the following values:
-  *         @arg @ref LL_RTC_TAMPER_NOERASE_TAMPER1 (*)
-  *         @arg @ref LL_RTC_TAMPER_NOERASE_TAMPER2 
-  *         @arg @ref LL_RTC_TAMPER_NOERASE_TAMPER3 (*)
-  *         
-  *         (*) value not defined in all devices.
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TAMPER_DisableEraseBKP(RTC_TypeDef *RTCx, uint32_t Tamper)
-{
-  SET_BIT(RTCx->TAMPCR, Tamper);
-}
-
-#if defined(RTC_TAMPCR_TAMPPUDIS)
-/**
-  * @brief  Disable RTC_TAMPx pull-up disable (Disable precharge of RTC_TAMPx pins)
-  * @rmtoll TAMPCR       TAMPPUDIS     LL_RTC_TAMPER_DisablePullUp
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TAMPER_DisablePullUp(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPPUDIS);
-}
-
-/**
-  * @brief  Enable RTC_TAMPx pull-up disable ( Precharge RTC_TAMPx pins before sampling)
-  * @rmtoll TAMPCR       TAMPPUDIS     LL_RTC_TAMPER_EnablePullUp
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TAMPER_EnablePullUp(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPPUDIS);
-}
-#endif /* RTC_TAMPCR_TAMPPUDIS */
-
-#if defined(RTC_TAMPCR_TAMPPRCH)
-/**
-  * @brief  Set RTC_TAMPx precharge duration
-  * @rmtoll TAMPCR       TAMPPRCH      LL_RTC_TAMPER_SetPrecharge
-  * @param  RTCx RTC Instance
-  * @param  Duration This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_TAMPER_DURATION_1RTCCLK
-  *         @arg @ref LL_RTC_TAMPER_DURATION_2RTCCLK
-  *         @arg @ref LL_RTC_TAMPER_DURATION_4RTCCLK
-  *         @arg @ref LL_RTC_TAMPER_DURATION_8RTCCLK
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TAMPER_SetPrecharge(RTC_TypeDef *RTCx, uint32_t Duration)
-{
-  MODIFY_REG(RTCx->TAMPCR, RTC_TAMPCR_TAMPPRCH, Duration);
-}
-
-/**
-  * @brief  Get RTC_TAMPx precharge duration
-  * @rmtoll TAMPCR       TAMPPRCH      LL_RTC_TAMPER_GetPrecharge
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_TAMPER_DURATION_1RTCCLK
-  *         @arg @ref LL_RTC_TAMPER_DURATION_2RTCCLK
-  *         @arg @ref LL_RTC_TAMPER_DURATION_4RTCCLK
-  *         @arg @ref LL_RTC_TAMPER_DURATION_8RTCCLK
-  */
-__STATIC_INLINE uint32_t LL_RTC_TAMPER_GetPrecharge(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPPRCH));
-}
-#endif /* RTC_TAMPCR_TAMPPRCH */
-
-#if defined(RTC_TAMPCR_TAMPFLT)
-/**
-  * @brief  Set RTC_TAMPx filter count
-  * @rmtoll TAMPCR       TAMPFLT       LL_RTC_TAMPER_SetFilterCount
-  * @param  RTCx RTC Instance
-  * @param  FilterCount This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_TAMPER_FILTER_DISABLE
-  *         @arg @ref LL_RTC_TAMPER_FILTER_2SAMPLE
-  *         @arg @ref LL_RTC_TAMPER_FILTER_4SAMPLE
-  *         @arg @ref LL_RTC_TAMPER_FILTER_8SAMPLE
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TAMPER_SetFilterCount(RTC_TypeDef *RTCx, uint32_t FilterCount)
-{
-  MODIFY_REG(RTCx->TAMPCR, RTC_TAMPCR_TAMPFLT, FilterCount);
-}
-
-/**
-  * @brief  Get RTC_TAMPx filter count
-  * @rmtoll TAMPCR       TAMPFLT       LL_RTC_TAMPER_GetFilterCount
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_TAMPER_FILTER_DISABLE
-  *         @arg @ref LL_RTC_TAMPER_FILTER_2SAMPLE
-  *         @arg @ref LL_RTC_TAMPER_FILTER_4SAMPLE
-  *         @arg @ref LL_RTC_TAMPER_FILTER_8SAMPLE
-  */
-__STATIC_INLINE uint32_t LL_RTC_TAMPER_GetFilterCount(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPFLT));
-}
-#endif /* RTC_TAMPCR_TAMPFLT */
-
-#if defined(RTC_TAMPCR_TAMPFREQ)
-/**
-  * @brief  Set Tamper sampling frequency
-  * @rmtoll TAMPCR       TAMPFREQ      LL_RTC_TAMPER_SetSamplingFreq
-  * @param  RTCx RTC Instance
-  * @param  SamplingFreq This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_32768
-  *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_16384
-  *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_8192
-  *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_4096
-  *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_2048
-  *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_1024
-  *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_512
-  *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_256
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TAMPER_SetSamplingFreq(RTC_TypeDef *RTCx, uint32_t SamplingFreq)
-{
-  MODIFY_REG(RTCx->TAMPCR, RTC_TAMPCR_TAMPFREQ, SamplingFreq);
-}
-
-/**
-  * @brief  Get Tamper sampling frequency
-  * @rmtoll TAMPCR       TAMPFREQ      LL_RTC_TAMPER_GetSamplingFreq
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_32768
-  *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_16384
-  *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_8192
-  *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_4096
-  *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_2048
-  *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_1024
-  *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_512
-  *         @arg @ref LL_RTC_TAMPER_SAMPLFREQDIV_256
-  */
-__STATIC_INLINE uint32_t LL_RTC_TAMPER_GetSamplingFreq(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPFREQ));
-}
-#endif /* RTC_TAMPCR_TAMPFREQ */
-
-/**
-  * @brief  Enable Active level for Tamper input
-  * @rmtoll TAMPCR       TAMP1TRG      LL_RTC_TAMPER_EnableActiveLevel\n
-  *         TAMPCR       TAMP2TRG      LL_RTC_TAMPER_EnableActiveLevel\n
-  *         TAMPCR       TAMP3TRG      LL_RTC_TAMPER_EnableActiveLevel
-  * @param  RTCx RTC Instance
-  * @param  Tamper This parameter can be a combination of the following values:
-  *         @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_TAMP1 (*)
-  *         @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_TAMP2 
-  *         @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_TAMP3 (*)
-  *         
-  *         (*) value not defined in all devices.
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TAMPER_EnableActiveLevel(RTC_TypeDef *RTCx, uint32_t Tamper)
-{
-  SET_BIT(RTCx->TAMPCR, Tamper);
-}
-
-/**
-  * @brief  Disable Active level for Tamper input
-  * @rmtoll TAMPCR       TAMP1TRG      LL_RTC_TAMPER_DisableActiveLevel\n
-  *         TAMPCR       TAMP2TRG      LL_RTC_TAMPER_DisableActiveLevel\n
-  *         TAMPCR       TAMP3TRG      LL_RTC_TAMPER_DisableActiveLevel
-  * @param  RTCx RTC Instance
-  * @param  Tamper This parameter can be a combination of the following values:
-  *         @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_TAMP1 (*)
-  *         @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_TAMP2 
-  *         @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_TAMP3 (*)
-  *         
-  *         (*) value not defined in all devices.
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_TAMPER_DisableActiveLevel(RTC_TypeDef *RTCx, uint32_t Tamper)
-{
-  CLEAR_BIT(RTCx->TAMPCR, Tamper);
-}
-
-/**
-  * @}
-  */
-
-#if defined(RTC_WAKEUP_SUPPORT)
-/** @defgroup RTC_LL_EF_Wakeup Wakeup
-  * @{
-  */
-
-/**
-  * @brief  Enable Wakeup timer
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           WUTE          LL_RTC_WAKEUP_Enable
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_WAKEUP_Enable(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->CR, RTC_CR_WUTE);
-}
-
-/**
-  * @brief  Disable Wakeup timer
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           WUTE          LL_RTC_WAKEUP_Disable
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_WAKEUP_Disable(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->CR, RTC_CR_WUTE);
-}
-
-/**
-  * @brief  Check if Wakeup timer is enabled or not
-  * @rmtoll CR           WUTE          LL_RTC_WAKEUP_IsEnabled
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_WAKEUP_IsEnabled(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->CR, RTC_CR_WUTE) == (RTC_CR_WUTE));
-}
-
-/**
-  * @brief  Select Wakeup clock
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @note Bit can be written only when RTC_CR WUTE bit = 0 and RTC_ISR WUTWF bit = 1
-  * @rmtoll CR           WUCKSEL       LL_RTC_WAKEUP_SetClock
-  * @param  RTCx RTC Instance
-  * @param  WakeupClock This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_WAKEUPCLOCK_DIV_16
-  *         @arg @ref LL_RTC_WAKEUPCLOCK_DIV_8
-  *         @arg @ref LL_RTC_WAKEUPCLOCK_DIV_4
-  *         @arg @ref LL_RTC_WAKEUPCLOCK_DIV_2
-  *         @arg @ref LL_RTC_WAKEUPCLOCK_CKSPRE
-  *         @arg @ref LL_RTC_WAKEUPCLOCK_CKSPRE_WUT
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_WAKEUP_SetClock(RTC_TypeDef *RTCx, uint32_t WakeupClock)
-{
-  MODIFY_REG(RTCx->CR, RTC_CR_WUCKSEL, WakeupClock);
-}
-
-/**
-  * @brief  Get Wakeup clock
-  * @rmtoll CR           WUCKSEL       LL_RTC_WAKEUP_GetClock
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_WAKEUPCLOCK_DIV_16
-  *         @arg @ref LL_RTC_WAKEUPCLOCK_DIV_8
-  *         @arg @ref LL_RTC_WAKEUPCLOCK_DIV_4
-  *         @arg @ref LL_RTC_WAKEUPCLOCK_DIV_2
-  *         @arg @ref LL_RTC_WAKEUPCLOCK_CKSPRE
-  *         @arg @ref LL_RTC_WAKEUPCLOCK_CKSPRE_WUT
-  */
-__STATIC_INLINE uint32_t LL_RTC_WAKEUP_GetClock(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_WUCKSEL));
-}
-
-/**
-  * @brief  Set Wakeup auto-reload value
-  * @note Bit can be written only when WUTWF is set to 1 in RTC_ISR
-  * @rmtoll WUTR         WUT           LL_RTC_WAKEUP_SetAutoReload
-  * @param  RTCx RTC Instance
-  * @param  Value Value between Min_Data=0x00 and Max_Data=0xFFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_WAKEUP_SetAutoReload(RTC_TypeDef *RTCx, uint32_t Value)
-{
-  MODIFY_REG(RTCx->WUTR, RTC_WUTR_WUT, Value);
-}
-
-/**
-  * @brief  Get Wakeup auto-reload value
-  * @rmtoll WUTR         WUT           LL_RTC_WAKEUP_GetAutoReload
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0xFFFF
-  */
-__STATIC_INLINE uint32_t LL_RTC_WAKEUP_GetAutoReload(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->WUTR, RTC_WUTR_WUT));
-}
-
-/**
-  * @}
-  */
-#endif /* RTC_WAKEUP_SUPPORT */
-
-#if defined(RTC_BACKUP_SUPPORT)
-/** @defgroup RTC_LL_EF_Backup_Registers Backup_Registers
-  * @{
-  */
-
-/**
-  * @brief  Writes a data in a specified RTC Backup data register.
-  * @rmtoll BKPxR        BKP           LL_RTC_BAK_SetRegister
-  * @param  RTCx RTC Instance
-  * @param  BackupRegister This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_BKP_DR0
-  *         @arg @ref LL_RTC_BKP_DR1
-  *         @arg @ref LL_RTC_BKP_DR2
-  *         @arg @ref LL_RTC_BKP_DR3
-  *         @arg @ref LL_RTC_BKP_DR4
-  * @param  Data Value between Min_Data=0x00 and Max_Data=0xFFFFFFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_BAK_SetRegister(RTC_TypeDef *RTCx, uint32_t BackupRegister, uint32_t Data)
-{
-  register uint32_t tmp = 0U;
-
-  tmp = (uint32_t)(&(RTCx->BKP0R));
-  tmp += (BackupRegister * 4U);
-
-  /* Write the specified register */
-  *(__IO uint32_t *)tmp = (uint32_t)Data;
-}
-
-/**
-  * @brief  Reads data from the specified RTC Backup data Register.
-  * @rmtoll BKPxR        BKP           LL_RTC_BAK_GetRegister
-  * @param  RTCx RTC Instance
-  * @param  BackupRegister This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_BKP_DR0
-  *         @arg @ref LL_RTC_BKP_DR1
-  *         @arg @ref LL_RTC_BKP_DR2
-  *         @arg @ref LL_RTC_BKP_DR3
-  *         @arg @ref LL_RTC_BKP_DR4
-  * @retval Value between Min_Data=0x00 and Max_Data=0xFFFFFFFF
-  */
-__STATIC_INLINE uint32_t LL_RTC_BAK_GetRegister(RTC_TypeDef *RTCx, uint32_t BackupRegister)
-{
-  register uint32_t tmp = 0U;
-
-  tmp = (uint32_t)(&(RTCx->BKP0R));
-  tmp += (BackupRegister * 4U);
-
-  /* Read the specified register */
-  return (*(__IO uint32_t *)tmp);
-}
-
-/**
-  * @}
-  */
-#endif /* RTC_BACKUP_SUPPORT */
-
-/** @defgroup RTC_LL_EF_Calibration Calibration
-  * @{
-  */
-
-/**
-  * @brief  Set Calibration output frequency (1 Hz or 512 Hz)
-  * @note Bits are write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           COE           LL_RTC_CAL_SetOutputFreq\n
-  *         CR           COSEL         LL_RTC_CAL_SetOutputFreq
-  * @param  RTCx RTC Instance
-  * @param  Frequency This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_CALIB_OUTPUT_NONE
-  *         @arg @ref LL_RTC_CALIB_OUTPUT_1HZ
-  *         @arg @ref LL_RTC_CALIB_OUTPUT_512HZ
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_CAL_SetOutputFreq(RTC_TypeDef *RTCx, uint32_t Frequency)
-{
-  MODIFY_REG(RTCx->CR, RTC_CR_COE | RTC_CR_COSEL, Frequency);
-}
-
-/**
-  * @brief  Get Calibration output frequency (1 Hz or 512 Hz)
-  * @rmtoll CR           COE           LL_RTC_CAL_GetOutputFreq\n
-  *         CR           COSEL         LL_RTC_CAL_GetOutputFreq
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_CALIB_OUTPUT_NONE
-  *         @arg @ref LL_RTC_CALIB_OUTPUT_1HZ
-  *         @arg @ref LL_RTC_CALIB_OUTPUT_512HZ
-  */
-__STATIC_INLINE uint32_t LL_RTC_CAL_GetOutputFreq(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_COE | RTC_CR_COSEL));
-}
-
-/**
-  * @brief  Insert or not One RTCCLK pulse every 2exp11 pulses (frequency increased by 488.5 ppm)
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @note Bit can be written only when RECALPF is set to 0 in RTC_ISR
-  * @rmtoll CALR         CALP          LL_RTC_CAL_SetPulse
-  * @param  RTCx RTC Instance
-  * @param  Pulse This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_CALIB_INSERTPULSE_NONE
-  *         @arg @ref LL_RTC_CALIB_INSERTPULSE_SET
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_CAL_SetPulse(RTC_TypeDef *RTCx, uint32_t Pulse)
-{
-  MODIFY_REG(RTCx->CALR, RTC_CALR_CALP, Pulse);
-}
-
-/**
-  * @brief  Check if one RTCCLK has been inserted or not every 2exp11 pulses (frequency increased by 488.5 ppm)
-  * @rmtoll CALR         CALP          LL_RTC_CAL_IsPulseInserted
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_CAL_IsPulseInserted(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->CALR, RTC_CALR_CALP) == (RTC_CALR_CALP));
-}
-
-/**
-  * @brief  Set the calibration cycle period
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @note   Bit can be written only when RECALPF is set to 0 in RTC_ISR
-  * @rmtoll CALR         CALW8         LL_RTC_CAL_SetPeriod\n
-  *         CALR         CALW16        LL_RTC_CAL_SetPeriod
-  * @param  RTCx RTC Instance
-  * @param  Period This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_CALIB_PERIOD_32SEC
-  *         @arg @ref LL_RTC_CALIB_PERIOD_16SEC
-  *         @arg @ref LL_RTC_CALIB_PERIOD_8SEC
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_CAL_SetPeriod(RTC_TypeDef *RTCx, uint32_t Period)
-{
-  MODIFY_REG(RTCx->CALR, RTC_CALR_CALW8 | RTC_CALR_CALW16, Period);
-}
-
-/**
-  * @brief  Get the calibration cycle period
-  * @rmtoll CALR         CALW8         LL_RTC_CAL_GetPeriod\n
-  *         CALR         CALW16        LL_RTC_CAL_GetPeriod
-  * @param  RTCx RTC Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_RTC_CALIB_PERIOD_32SEC
-  *         @arg @ref LL_RTC_CALIB_PERIOD_16SEC
-  *         @arg @ref LL_RTC_CALIB_PERIOD_8SEC
-  */
-__STATIC_INLINE uint32_t LL_RTC_CAL_GetPeriod(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->CALR, RTC_CALR_CALW8 | RTC_CALR_CALW16));
-}
-
-/**
-  * @brief  Set Calibration minus
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @note   Bit can be written only when RECALPF is set to 0 in RTC_ISR
-  * @rmtoll CALR         CALM          LL_RTC_CAL_SetMinus
-  * @param  RTCx RTC Instance
-  * @param  CalibMinus Value between Min_Data=0x00 and Max_Data=0x1FF
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_CAL_SetMinus(RTC_TypeDef *RTCx, uint32_t CalibMinus)
-{
-  MODIFY_REG(RTCx->CALR, RTC_CALR_CALM, CalibMinus);
-}
-
-/**
-  * @brief  Get Calibration minus
-  * @rmtoll CALR         CALM          LL_RTC_CAL_GetMinus
-  * @param  RTCx RTC Instance
-  * @retval Value between Min_Data=0x00 and Max_Data= 0x1FF
-  */
-__STATIC_INLINE uint32_t LL_RTC_CAL_GetMinus(RTC_TypeDef *RTCx)
-{
-  return (uint32_t)(READ_BIT(RTCx->CALR, RTC_CALR_CALM));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EF_FLAG_Management FLAG_Management
-  * @{
-  */
-
-/**
-  * @brief  Get Recalibration pending Flag
-  * @rmtoll ISR          RECALPF       LL_RTC_IsActiveFlag_RECALP
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RECALP(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->ISR, RTC_ISR_RECALPF) == (RTC_ISR_RECALPF));
-}
-
-#if defined(RTC_TAMPER3_SUPPORT)
-/**
-  * @brief  Get RTC_TAMP3 detection flag
-  * @rmtoll ISR          TAMP3F        LL_RTC_IsActiveFlag_TAMP3
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP3(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->ISR, RTC_ISR_TAMP3F) == (RTC_ISR_TAMP3F));
-}
-#endif /* RTC_TAMPER3_SUPPORT */
-
-#if defined(RTC_TAMPER2_SUPPORT)
-/**
-  * @brief  Get RTC_TAMP2 detection flag
-  * @rmtoll ISR          TAMP2F        LL_RTC_IsActiveFlag_TAMP2
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP2(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->ISR, RTC_ISR_TAMP2F) == (RTC_ISR_TAMP2F));
-}
-#endif /* RTC_TAMPER2_SUPPORT */
-
-#if defined(RTC_TAMPER1_SUPPORT)
-/**
-  * @brief  Get RTC_TAMP1 detection flag
-  * @rmtoll ISR          TAMP1F        LL_RTC_IsActiveFlag_TAMP1
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMP1(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->ISR, RTC_ISR_TAMP1F) == (RTC_ISR_TAMP1F));
-}
-#endif /* RTC_TAMPER1_SUPPORT */
-
-/**
-  * @brief  Get Time-stamp overflow flag
-  * @rmtoll ISR          TSOVF         LL_RTC_IsActiveFlag_TSOV
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TSOV(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->ISR, RTC_ISR_TSOVF) == (RTC_ISR_TSOVF));
-}
-
-/**
-  * @brief  Get Time-stamp flag
-  * @rmtoll ISR          TSF           LL_RTC_IsActiveFlag_TS
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TS(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->ISR, RTC_ISR_TSF) == (RTC_ISR_TSF));
-}
-
-#if defined(RTC_WAKEUP_SUPPORT)
-/**
-  * @brief  Get Wakeup timer flag
-  * @rmtoll ISR          WUTF          LL_RTC_IsActiveFlag_WUT
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUT(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->ISR, RTC_ISR_WUTF) == (RTC_ISR_WUTF));
-}
-#endif /* RTC_WAKEUP_SUPPORT */
-
-/**
-  * @brief  Get Alarm B flag
-  * @rmtoll ISR          ALRBF         LL_RTC_IsActiveFlag_ALRB
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRB(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->ISR, RTC_ISR_ALRBF) == (RTC_ISR_ALRBF));
-}
-
-/**
-  * @brief  Get Alarm A flag
-  * @rmtoll ISR          ALRAF         LL_RTC_IsActiveFlag_ALRA
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRA(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->ISR, RTC_ISR_ALRAF) == (RTC_ISR_ALRAF));
-}
-
-#if defined(RTC_TAMPER3_SUPPORT)
-/**
-  * @brief  Clear RTC_TAMP3 detection flag
-  * @rmtoll ISR          TAMP3F        LL_RTC_ClearFlag_TAMP3
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ClearFlag_TAMP3(RTC_TypeDef *RTCx)
-{
-  WRITE_REG(RTCx->ISR, (~((RTC_ISR_TAMP3F | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
-}
-#endif /* RTC_TAMPER3_SUPPORT */
-
-#if defined(RTC_TAMPER2_SUPPORT)
-/**
-  * @brief  Clear RTC_TAMP2 detection flag
-  * @rmtoll ISR          TAMP2F        LL_RTC_ClearFlag_TAMP2
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ClearFlag_TAMP2(RTC_TypeDef *RTCx)
-{
-  WRITE_REG(RTCx->ISR, (~((RTC_ISR_TAMP2F | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
-}
-#endif /* RTC_TAMPER2_SUPPORT */
-
-#if defined(RTC_TAMPER1_SUPPORT)
-/**
-  * @brief  Clear RTC_TAMP1 detection flag
-  * @rmtoll ISR          TAMP1F        LL_RTC_ClearFlag_TAMP1
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ClearFlag_TAMP1(RTC_TypeDef *RTCx)
-{
-  WRITE_REG(RTCx->ISR, (~((RTC_ISR_TAMP1F | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
-}
-#endif /* RTC_TAMPER1_SUPPORT */
-
-/**
-  * @brief  Clear Time-stamp overflow flag
-  * @rmtoll ISR          TSOVF         LL_RTC_ClearFlag_TSOV
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ClearFlag_TSOV(RTC_TypeDef *RTCx)
-{
-  WRITE_REG(RTCx->ISR, (~((RTC_ISR_TSOVF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
-}
-
-/**
-  * @brief  Clear Time-stamp flag
-  * @rmtoll ISR          TSF           LL_RTC_ClearFlag_TS
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ClearFlag_TS(RTC_TypeDef *RTCx)
-{
-  WRITE_REG(RTCx->ISR, (~((RTC_ISR_TSF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
-}
-
-#if defined(RTC_WAKEUP_SUPPORT)
-/**
-  * @brief  Clear Wakeup timer flag
-  * @rmtoll ISR          WUTF          LL_RTC_ClearFlag_WUT
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ClearFlag_WUT(RTC_TypeDef *RTCx)
-{
-  WRITE_REG(RTCx->ISR, (~((RTC_ISR_WUTF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
-}
-#endif /* RTC_WAKEUP_SUPPORT */
-
-/**
-  * @brief  Clear Alarm B flag
-  * @rmtoll ISR          ALRBF         LL_RTC_ClearFlag_ALRB
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ClearFlag_ALRB(RTC_TypeDef *RTCx)
-{
-  WRITE_REG(RTCx->ISR, (~((RTC_ISR_ALRBF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
-}
-
-/**
-  * @brief  Clear Alarm A flag
-  * @rmtoll ISR          ALRAF         LL_RTC_ClearFlag_ALRA
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ClearFlag_ALRA(RTC_TypeDef *RTCx)
-{
-  WRITE_REG(RTCx->ISR, (~((RTC_ISR_ALRAF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
-}
-
-/**
-  * @brief  Get Initialization flag
-  * @rmtoll ISR          INITF         LL_RTC_IsActiveFlag_INIT
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_INIT(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->ISR, RTC_ISR_INITF) == (RTC_ISR_INITF));
-}
-
-/**
-  * @brief  Get Registers synchronization flag
-  * @rmtoll ISR          RSF           LL_RTC_IsActiveFlag_RS
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RS(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->ISR, RTC_ISR_RSF) == (RTC_ISR_RSF));
-}
-
-/**
-  * @brief  Clear Registers synchronization flag
-  * @rmtoll ISR          RSF           LL_RTC_ClearFlag_RS
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_ClearFlag_RS(RTC_TypeDef *RTCx)
-{
-  WRITE_REG(RTCx->ISR, (~((RTC_ISR_RSF | RTC_ISR_INIT) & 0x0000FFFFU) | (RTCx->ISR & RTC_ISR_INIT)));
-}
-
-/**
-  * @brief  Get Initialization status flag
-  * @rmtoll ISR          INITS         LL_RTC_IsActiveFlag_INITS
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_INITS(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->ISR, RTC_ISR_INITS) == (RTC_ISR_INITS));
-}
-
-/**
-  * @brief  Get Shift operation pending flag
-  * @rmtoll ISR          SHPF          LL_RTC_IsActiveFlag_SHP
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_SHP(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->ISR, RTC_ISR_SHPF) == (RTC_ISR_SHPF));
-}
-
-#if defined(RTC_WAKEUP_SUPPORT)
-/**
-  * @brief  Get Wakeup timer write flag
-  * @rmtoll ISR          WUTWF         LL_RTC_IsActiveFlag_WUTW
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_WUTW(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->ISR, RTC_ISR_WUTWF) == (RTC_ISR_WUTWF));
-}
-#endif /* RTC_WAKEUP_SUPPORT */
-
-/**
-  * @brief  Get Alarm B write flag
-  * @rmtoll ISR          ALRBWF        LL_RTC_IsActiveFlag_ALRBW
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRBW(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->ISR, RTC_ISR_ALRBWF) == (RTC_ISR_ALRBWF));
-}
-
-/**
-  * @brief  Get Alarm A write flag
-  * @rmtoll ISR          ALRAWF        LL_RTC_IsActiveFlag_ALRAW
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALRAW(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->ISR, RTC_ISR_ALRAWF) == (RTC_ISR_ALRAWF));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RTC_LL_EF_IT_Management IT_Management
-  * @{
-  */
-
-/**
-  * @brief  Enable Time-stamp interrupt
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           TSIE          LL_RTC_EnableIT_TS
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_EnableIT_TS(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->CR, RTC_CR_TSIE);
-}
-
-/**
-  * @brief  Disable Time-stamp interrupt
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           TSIE          LL_RTC_DisableIT_TS
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DisableIT_TS(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->CR, RTC_CR_TSIE);
-}
-
-#if defined(RTC_WAKEUP_SUPPORT)
-/**
-  * @brief  Enable Wakeup timer interrupt
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           WUTIE         LL_RTC_EnableIT_WUT
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_EnableIT_WUT(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->CR, RTC_CR_WUTIE);
-}
-
-/**
-  * @brief  Disable Wakeup timer interrupt
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           WUTIE         LL_RTC_DisableIT_WUT
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DisableIT_WUT(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->CR, RTC_CR_WUTIE);
-}
-#endif /* RTC_WAKEUP_SUPPORT */
-
-/**
-  * @brief  Enable Alarm B interrupt
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           ALRBIE        LL_RTC_EnableIT_ALRB
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_EnableIT_ALRB(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->CR, RTC_CR_ALRBIE);
-}
-
-/**
-  * @brief  Disable Alarm B interrupt
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           ALRBIE        LL_RTC_DisableIT_ALRB
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DisableIT_ALRB(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->CR, RTC_CR_ALRBIE);
-}
-
-/**
-  * @brief  Enable Alarm A interrupt
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           ALRAIE        LL_RTC_EnableIT_ALRA
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_EnableIT_ALRA(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->CR, RTC_CR_ALRAIE);
-}
-
-/**
-  * @brief  Disable Alarm A interrupt
-  * @note   Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
-  * @rmtoll CR           ALRAIE        LL_RTC_DisableIT_ALRA
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DisableIT_ALRA(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->CR, RTC_CR_ALRAIE);
-}
-
-#if defined(RTC_TAMPER3_SUPPORT)
-/**
-  * @brief  Enable Tamper 3 interrupt
-  * @rmtoll TAMPCR       TAMP3IE       LL_RTC_EnableIT_TAMP3
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_EnableIT_TAMP3(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMP3IE);
-}
-
-/**
-  * @brief  Disable Tamper 3 interrupt
-  * @rmtoll TAMPCR       TAMP3IE       LL_RTC_DisableIT_TAMP3
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DisableIT_TAMP3(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMP3IE);
-}
-#endif /* RTC_TAMPER3_SUPPORT */
-
-#if defined(RTC_TAMPER2_SUPPORT)
-/**
-  * @brief  Enable Tamper 2 interrupt
-  * @rmtoll TAMPCR       TAMP2IE       LL_RTC_EnableIT_TAMP2
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_EnableIT_TAMP2(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMP2IE);
-}
-
-/**
-  * @brief  Disable Tamper 2 interrupt
-  * @rmtoll TAMPCR       TAMP2IE       LL_RTC_DisableIT_TAMP2
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DisableIT_TAMP2(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMP2IE);
-}
-#endif /* RTC_TAMPER2_SUPPORT */
-
-#if defined(RTC_TAMPER1_SUPPORT)
-/**
-  * @brief  Enable Tamper 1 interrupt
-  * @rmtoll TAMPCR       TAMP1IE       LL_RTC_EnableIT_TAMP1
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_EnableIT_TAMP1(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMP1IE);
-}
-
-/**
-  * @brief  Disable Tamper 1 interrupt
-  * @rmtoll TAMPCR       TAMP1IE       LL_RTC_DisableIT_TAMP1
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DisableIT_TAMP1(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMP1IE);
-}
-#endif /* RTC_TAMPER1_SUPPORT */
-
-/**
-  * @brief  Enable all Tamper Interrupt
-  * @rmtoll TAMPCR       TAMPIE        LL_RTC_EnableIT_TAMP
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_EnableIT_TAMP(RTC_TypeDef *RTCx)
-{
-  SET_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPIE);
-}
-
-/**
-  * @brief  Disable all Tamper Interrupt
-  * @rmtoll TAMPCR       TAMPIE        LL_RTC_DisableIT_TAMP
-  * @param  RTCx RTC Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_RTC_DisableIT_TAMP(RTC_TypeDef *RTCx)
-{
-  CLEAR_BIT(RTCx->TAMPCR, RTC_TAMPCR_TAMPIE);
-}
-
-/**
-  * @brief  Check if  Time-stamp interrupt is enabled or not
-  * @rmtoll CR           TSIE          LL_RTC_IsEnabledIT_TS
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TS(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->CR, RTC_CR_TSIE) == (RTC_CR_TSIE));
-}
-
-#if defined(RTC_WAKEUP_SUPPORT)
-/**
-  * @brief  Check if  Wakeup timer interrupt is enabled or not
-  * @rmtoll CR           WUTIE         LL_RTC_IsEnabledIT_WUT
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_WUT(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->CR, RTC_CR_WUTIE) == (RTC_CR_WUTIE));
-}
-#endif /* RTC_WAKEUP_SUPPORT */
-
-/**
-  * @brief  Check if  Alarm B interrupt is enabled or not
-  * @rmtoll CR           ALRBIE        LL_RTC_IsEnabledIT_ALRB
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALRB(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->CR, RTC_CR_ALRBIE) == (RTC_CR_ALRBIE));
-}
-
-/**
-  * @brief  Check if  Alarm A interrupt is enabled or not
-  * @rmtoll CR           ALRAIE        LL_RTC_IsEnabledIT_ALRA
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALRA(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->CR, RTC_CR_ALRAIE) == (RTC_CR_ALRAIE));
-}
-
-#if defined(RTC_TAMPER3_SUPPORT)
-/**
-  * @brief  Check if  Tamper 3 interrupt is enabled or not
-  * @rmtoll TAMPCR       TAMP3IE       LL_RTC_IsEnabledIT_TAMP3
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP3(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->TAMPCR,
-                   RTC_TAMPCR_TAMP3IE) == (RTC_TAMPCR_TAMP3IE));
-}
-#endif /* RTC_TAMPER3_SUPPORT */
-
-#if defined(RTC_TAMPER2_SUPPORT)
-/**
-  * @brief  Check if  Tamper 2 interrupt is enabled or not
-  * @rmtoll TAMPCR       TAMP2IE       LL_RTC_IsEnabledIT_TAMP2
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP2(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->TAMPCR,
-                   RTC_TAMPCR_TAMP2IE) == (RTC_TAMPCR_TAMP2IE));
-#endif /* RTC_TAMPER2_SUPPORT */
-}
-
-#if defined(RTC_TAMPER1_SUPPORT)
-/**
-  * @brief  Check if  Tamper 1 interrupt is enabled or not
-  * @rmtoll TAMPCR       TAMP1IE       LL_RTC_IsEnabledIT_TAMP1
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP1(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->TAMPCR,
-                   RTC_TAMPCR_TAMP1IE) == (RTC_TAMPCR_TAMP1IE));
-}
-#endif /* RTC_TAMPER1_SUPPORT */
-
-/**
-  * @brief  Check if all the TAMPER interrupts are enabled or not
-  * @rmtoll TAMPCR       TAMPIE        LL_RTC_IsEnabledIT_TAMP
-  * @param  RTCx RTC Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP(RTC_TypeDef *RTCx)
-{
-  return (READ_BIT(RTCx->TAMPCR,
-                   RTC_TAMPCR_TAMPIE) == (RTC_TAMPCR_TAMPIE));
-}
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup RTC_LL_EF_Init Initialization and de-initialization functions
-  * @{
-  */
-
-ErrorStatus LL_RTC_DeInit(RTC_TypeDef *RTCx);
-ErrorStatus LL_RTC_Init(RTC_TypeDef *RTCx, LL_RTC_InitTypeDef *RTC_InitStruct);
-void        LL_RTC_StructInit(LL_RTC_InitTypeDef *RTC_InitStruct);
-ErrorStatus LL_RTC_TIME_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_TimeTypeDef *RTC_TimeStruct);
-void        LL_RTC_TIME_StructInit(LL_RTC_TimeTypeDef *RTC_TimeStruct);
-ErrorStatus LL_RTC_DATE_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_DateTypeDef *RTC_DateStruct);
-void        LL_RTC_DATE_StructInit(LL_RTC_DateTypeDef *RTC_DateStruct);
-ErrorStatus LL_RTC_ALMA_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_AlarmTypeDef *RTC_AlarmStruct);
-ErrorStatus LL_RTC_ALMB_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_AlarmTypeDef *RTC_AlarmStruct);
-void        LL_RTC_ALMA_StructInit(LL_RTC_AlarmTypeDef *RTC_AlarmStruct);
-void        LL_RTC_ALMB_StructInit(LL_RTC_AlarmTypeDef *RTC_AlarmStruct);
-ErrorStatus LL_RTC_EnterInitMode(RTC_TypeDef *RTCx);
-ErrorStatus LL_RTC_ExitInitMode(RTC_TypeDef *RTCx);
-ErrorStatus LL_RTC_WaitForSynchro(RTC_TypeDef *RTCx);
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined(RTC) */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_RTC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_spi.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_spi.h
deleted file mode 100755
index f4c79a3f..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_spi.h
+++ /dev/null
@@ -1,2036 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_spi.h
-  * @author  MCD Application Team
-  * @brief   Header file of SPI LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_SPI_H
-#define __STM32L0xx_LL_SPI_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (SPI1) || defined (SPI2)
-
-/** @defgroup SPI_LL SPI
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup SPI_LL_ES_INIT SPI Exported Init structure
-  * @{
-  */
-
-/**
-  * @brief  SPI Init structures definition
-  */
-typedef struct
-{
-  uint32_t TransferDirection;       /*!< Specifies the SPI unidirectional or bidirectional data mode.
-                                         This parameter can be a value of @ref SPI_LL_EC_TRANSFER_MODE.
-
-                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferDirection().*/
-
-  uint32_t Mode;                    /*!< Specifies the SPI mode (Master/Slave).
-                                         This parameter can be a value of @ref SPI_LL_EC_MODE.
-
-                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetMode().*/
-
-  uint32_t DataWidth;               /*!< Specifies the SPI data width.
-                                         This parameter can be a value of @ref SPI_LL_EC_DATAWIDTH.
-
-                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetDataWidth().*/
-
-  uint32_t ClockPolarity;           /*!< Specifies the serial clock steady state.
-                                         This parameter can be a value of @ref SPI_LL_EC_POLARITY.
-
-                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPolarity().*/
-
-  uint32_t ClockPhase;              /*!< Specifies the clock active edge for the bit capture.
-                                         This parameter can be a value of @ref SPI_LL_EC_PHASE.
-
-                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPhase().*/
-
-  uint32_t NSS;                     /*!< Specifies whether the NSS signal is managed by hardware (NSS pin) or by software using the SSI bit.
-                                         This parameter can be a value of @ref SPI_LL_EC_NSS_MODE.
-
-                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetNSSMode().*/
-
-  uint32_t BaudRate;                /*!< Specifies the BaudRate prescaler value which will be used to configure the transmit and receive SCK clock.
-                                         This parameter can be a value of @ref SPI_LL_EC_BAUDRATEPRESCALER.
-                                         @note The communication clock is derived from the master clock. The slave clock does not need to be set.
-
-                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetBaudRatePrescaler().*/
-
-  uint32_t BitOrder;                /*!< Specifies whether data transfers start from MSB or LSB bit.
-                                         This parameter can be a value of @ref SPI_LL_EC_BIT_ORDER.
-
-                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferBitOrder().*/
-
-  uint32_t CRCCalculation;          /*!< Specifies if the CRC calculation is enabled or not.
-                                         This parameter can be a value of @ref SPI_LL_EC_CRC_CALCULATION.
-
-                                         This feature can be modified afterwards using unitary functions @ref LL_SPI_EnableCRC() and @ref LL_SPI_DisableCRC().*/
-
-  uint32_t CRCPoly;                 /*!< Specifies the polynomial used for the CRC calculation.
-                                         This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF.
-
-                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetCRCPolynomial().*/
-
-} LL_SPI_InitTypeDef;
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup SPI_LL_Exported_Constants SPI Exported Constants
-  * @{
-  */
-
-/** @defgroup SPI_LL_EC_GET_FLAG Get Flags Defines
-  * @brief    Flags defines which can be used with LL_SPI_ReadReg function
-  * @{
-  */
-#define LL_SPI_SR_RXNE                     SPI_SR_RXNE               /*!< Rx buffer not empty flag         */
-#define LL_SPI_SR_TXE                      SPI_SR_TXE                /*!< Tx buffer empty flag             */
-#define LL_SPI_SR_BSY                      SPI_SR_BSY                /*!< Busy flag                        */
-#define LL_SPI_SR_UDR                      SPI_SR_UDR                /*!< Underrun flag                    */
-#define LL_SPI_SR_CRCERR                   SPI_SR_CRCERR             /*!< CRC error flag                   */
-#define LL_SPI_SR_MODF                     SPI_SR_MODF               /*!< Mode fault flag                  */
-#define LL_SPI_SR_OVR                      SPI_SR_OVR                /*!< Overrun flag                     */
-#define LL_SPI_SR_FRE                      SPI_SR_FRE                /*!< TI mode frame format error flag  */
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EC_IT IT Defines
-  * @brief    IT defines which can be used with LL_SPI_ReadReg and  LL_SPI_WriteReg functions
-  * @{
-  */
-#define LL_SPI_CR2_RXNEIE                  SPI_CR2_RXNEIE            /*!< Rx buffer not empty interrupt enable */
-#define LL_SPI_CR2_TXEIE                   SPI_CR2_TXEIE             /*!< Tx buffer empty interrupt enable     */
-#define LL_SPI_CR2_ERRIE                   SPI_CR2_ERRIE             /*!< Error interrupt enable               */
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EC_MODE Operation Mode
-  * @{
-  */
-#define LL_SPI_MODE_MASTER                 (SPI_CR1_MSTR | SPI_CR1_SSI)    /*!< Master configuration  */
-#define LL_SPI_MODE_SLAVE                  ((uint32_t)0x00000000U)         /*!< Slave configuration   */
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EC_PROTOCOL Serial Protocol
-  * @{
-  */
-#define LL_SPI_PROTOCOL_MOTOROLA           ((uint32_t)0x00000000U)   /*!< Motorola mode. Used as default value */
-#define LL_SPI_PROTOCOL_TI                 (SPI_CR2_FRF)             /*!< TI mode                              */
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EC_PHASE Clock Phase
-  * @{
-  */
-#define LL_SPI_PHASE_1EDGE                 ((uint32_t)0x00000000U)   /*!< First clock transition is the first data capture edge  */
-#define LL_SPI_PHASE_2EDGE                 (SPI_CR1_CPHA)            /*!< Second clock transition is the first data capture edge */
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EC_POLARITY Clock Polarity
-  * @{
-  */
-#define LL_SPI_POLARITY_LOW                ((uint32_t)0x00000000U)   /*!< Clock to 0 when idle */
-#define LL_SPI_POLARITY_HIGH               (SPI_CR1_CPOL)            /*!< Clock to 1 when idle */
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EC_BAUDRATEPRESCALER Baud Rate Prescaler
-  * @{
-  */
-#define LL_SPI_BAUDRATEPRESCALER_DIV2      ((uint32_t)0x00000000U)                        /*!< BaudRate control equal to fPCLK/2   */
-#define LL_SPI_BAUDRATEPRESCALER_DIV4      (SPI_CR1_BR_0)                                 /*!< BaudRate control equal to fPCLK/4   */
-#define LL_SPI_BAUDRATEPRESCALER_DIV8      (SPI_CR1_BR_1)                                 /*!< BaudRate control equal to fPCLK/8   */
-#define LL_SPI_BAUDRATEPRESCALER_DIV16     (SPI_CR1_BR_1 | SPI_CR1_BR_0)                  /*!< BaudRate control equal to fPCLK/16  */
-#define LL_SPI_BAUDRATEPRESCALER_DIV32     (SPI_CR1_BR_2)                                 /*!< BaudRate control equal to fPCLK/32  */
-#define LL_SPI_BAUDRATEPRESCALER_DIV64     (SPI_CR1_BR_2 | SPI_CR1_BR_0)                  /*!< BaudRate control equal to fPCLK/64  */
-#define LL_SPI_BAUDRATEPRESCALER_DIV128    (SPI_CR1_BR_2 | SPI_CR1_BR_1)                  /*!< BaudRate control equal to fPCLK/128 */
-#define LL_SPI_BAUDRATEPRESCALER_DIV256    (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)   /*!< BaudRate control equal to fPCLK/256 */
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EC_BIT_ORDER Transmission Bit Order
-  * @{
-  */
-#define LL_SPI_LSB_FIRST                   (SPI_CR1_LSBFIRST)        /*!< Data is transmitted/received with the LSB first */
-#define LL_SPI_MSB_FIRST                   ((uint32_t)0x00000000U)   /*!< Data is transmitted/received with the MSB first */
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EC_TRANSFER_MODE Transfer Mode
-  * @{
-  */
-#define LL_SPI_FULL_DUPLEX                 ((uint32_t)0x00000000U)              /*!< Full-Duplex mode. Rx and Tx transfer on 2 lines */
-#define LL_SPI_SIMPLEX_RX                  (SPI_CR1_RXONLY)                     /*!< Simplex Rx mode.  Rx transfer only on 1 line    */
-#define LL_SPI_HALF_DUPLEX_RX              (SPI_CR1_BIDIMODE)                   /*!< Half-Duplex Rx mode. Rx transfer on 1 line      */
-#define LL_SPI_HALF_DUPLEX_TX              (SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE)  /*!< Half-Duplex Tx mode. Tx transfer on 1 line      */
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EC_NSS_MODE Slave Select Pin Mode
-  * @{
-  */
-#define LL_SPI_NSS_SOFT                    (SPI_CR1_SSM)                     /*!< NSS managed internally. NSS pin not used and free              */
-#define LL_SPI_NSS_HARD_INPUT              ((uint32_t)0x00000000U)           /*!< NSS pin used in Input. Only used in Master mode                */
-#define LL_SPI_NSS_HARD_OUTPUT             (((uint32_t)SPI_CR2_SSOE << 16U)) /*!< NSS pin used in Output. Only used in Slave mode as chip select */
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EC_DATAWIDTH Datawidth
-  * @{
-  */
-#define LL_SPI_DATAWIDTH_8BIT              ((uint32_t)0x00000000U)           /*!< Data length for SPI transfer:  8 bits */
-#define LL_SPI_DATAWIDTH_16BIT             (SPI_CR1_DFF)                     /*!< Data length for SPI transfer:  16 bits */
-/**
-  * @}
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/** @defgroup SPI_LL_EC_CRC_CALCULATION CRC Calculation
-  * @{
-  */
-#define LL_SPI_CRCCALCULATION_DISABLE      ((uint32_t)0x00000000U)           /*!< CRC calculation disabled */
-#define LL_SPI_CRCCALCULATION_ENABLE       (SPI_CR1_CRCEN)                   /*!< CRC calculation enabled  */
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup SPI_LL_Exported_Macros SPI Exported Macros
-  * @{
-  */
-
-/** @defgroup SPI_LL_EM_WRITE_READ Common Write and read registers Macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in SPI register
-  * @param  __INSTANCE__ SPI Instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_SPI_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in SPI register
-  * @param  __INSTANCE__ SPI Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_SPI_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup SPI_LL_Exported_Functions SPI Exported Functions
-  * @{
-  */
-
-/** @defgroup SPI_LL_EF_Configuration Configuration
-  * @{
-  */
-
-/**
-  * @brief  Enable SPI peripheral
-  * @rmtoll CR1          SPE           LL_SPI_Enable
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_Enable(SPI_TypeDef *SPIx)
-{
-  SET_BIT(SPIx->CR1, SPI_CR1_SPE);
-}
-
-/**
-  * @brief  Disable SPI peripheral
-  * @note   When disabling the SPI, follow the procedure described in the Reference Manual.
-  * @rmtoll CR1          SPE           LL_SPI_Disable
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_Disable(SPI_TypeDef *SPIx)
-{
-  CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE);
-}
-
-/**
-  * @brief  Check if SPI peripheral is enabled
-  * @rmtoll CR1          SPE           LL_SPI_IsEnabled
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SPI_IsEnabled(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE));
-}
-
-/**
-  * @brief  Set SPI operation mode to Master or Slave
-  * @note   This bit should not be changed when communication is ongoing.
-  * @rmtoll CR1          MSTR          LL_SPI_SetMode\n
-  *         CR1          SSI           LL_SPI_SetMode
-  * @param  SPIx SPI Instance
-  * @param  Mode This parameter can be one of the following values:
-  *         @arg @ref LL_SPI_MODE_MASTER
-  *         @arg @ref LL_SPI_MODE_SLAVE
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_SetMode(SPI_TypeDef *SPIx, uint32_t Mode)
-{
-  MODIFY_REG(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI, Mode);
-}
-
-/**
-  * @brief  Get SPI operation mode (Master or Slave)
-  * @rmtoll CR1          MSTR          LL_SPI_GetMode\n
-  *         CR1          SSI           LL_SPI_GetMode
-  * @param  SPIx SPI Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_SPI_MODE_MASTER
-  *         @arg @ref LL_SPI_MODE_SLAVE
-  */
-__STATIC_INLINE uint32_t LL_SPI_GetMode(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI));
-}
-
-/**
-  * @brief  Set serial protocol used
-  * @note   This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
-  * @rmtoll CR2          FRF           LL_SPI_SetStandard
-  * @param  SPIx SPI Instance
-  * @param  Standard This parameter can be one of the following values:
-  *         @arg @ref LL_SPI_PROTOCOL_MOTOROLA
-  *         @arg @ref LL_SPI_PROTOCOL_TI
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard)
-{
-  MODIFY_REG(SPIx->CR2, SPI_CR2_FRF, Standard);
-}
-
-/**
-  * @brief  Get serial protocol used
-  * @rmtoll CR2          FRF           LL_SPI_GetStandard
-  * @param  SPIx SPI Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_SPI_PROTOCOL_MOTOROLA
-  *         @arg @ref LL_SPI_PROTOCOL_TI
-  */
-__STATIC_INLINE uint32_t LL_SPI_GetStandard(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRF));
-}
-
-/**
-  * @brief  Set clock phase
-  * @note   This bit should not be changed when communication is ongoing.
-  *         This bit is not used in SPI TI mode.
-  * @rmtoll CR1          CPHA          LL_SPI_SetClockPhase
-  * @param  SPIx SPI Instance
-  * @param  ClockPhase This parameter can be one of the following values:
-  *         @arg @ref LL_SPI_PHASE_1EDGE
-  *         @arg @ref LL_SPI_PHASE_2EDGE
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_SetClockPhase(SPI_TypeDef *SPIx, uint32_t ClockPhase)
-{
-  MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase);
-}
-
-/**
-  * @brief  Get clock phase
-  * @rmtoll CR1          CPHA          LL_SPI_GetClockPhase
-  * @param  SPIx SPI Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_SPI_PHASE_1EDGE
-  *         @arg @ref LL_SPI_PHASE_2EDGE
-  */
-__STATIC_INLINE uint32_t LL_SPI_GetClockPhase(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA));
-}
-
-/**
-  * @brief  Set clock polarity
-  * @note   This bit should not be changed when communication is ongoing.
-  *         This bit is not used in SPI TI mode.
-  * @rmtoll CR1          CPOL          LL_SPI_SetClockPolarity
-  * @param  SPIx SPI Instance
-  * @param  ClockPolarity This parameter can be one of the following values:
-  *         @arg @ref LL_SPI_POLARITY_LOW
-  *         @arg @ref LL_SPI_POLARITY_HIGH
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity)
-{
-  MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity);
-}
-
-/**
-  * @brief  Get clock polarity
-  * @rmtoll CR1          CPOL          LL_SPI_GetClockPolarity
-  * @param  SPIx SPI Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_SPI_POLARITY_LOW
-  *         @arg @ref LL_SPI_POLARITY_HIGH
-  */
-__STATIC_INLINE uint32_t LL_SPI_GetClockPolarity(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPOL));
-}
-
-/**
-  * @brief  Set baud rate prescaler
-  * @note   These bits should not be changed when communication is ongoing. SPI BaudRate = fPCLK/Prescaler.
-  * @rmtoll CR1          BR            LL_SPI_SetBaudRatePrescaler
-  * @param  SPIx SPI Instance
-  * @param  BaudRate This parameter can be one of the following values:
-  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV2
-  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV4
-  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV8
-  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV16
-  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV32
-  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV64
-  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128
-  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_SetBaudRatePrescaler(SPI_TypeDef *SPIx, uint32_t BaudRate)
-{
-  MODIFY_REG(SPIx->CR1, SPI_CR1_BR, BaudRate);
-}
-
-/**
-  * @brief  Get baud rate prescaler
-  * @rmtoll CR1          BR            LL_SPI_GetBaudRatePrescaler
-  * @param  SPIx SPI Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV2
-  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV4
-  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV8
-  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV16
-  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV32
-  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV64
-  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128
-  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256
-  */
-__STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_BR));
-}
-
-/**
-  * @brief  Set transfer bit order
-  * @note   This bit should not be changed when communication is ongoing. This bit is not used in SPI TI mode.
-  * @rmtoll CR1          LSBFIRST      LL_SPI_SetTransferBitOrder
-  * @param  SPIx SPI Instance
-  * @param  BitOrder This parameter can be one of the following values:
-  *         @arg @ref LL_SPI_LSB_FIRST
-  *         @arg @ref LL_SPI_MSB_FIRST
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_SetTransferBitOrder(SPI_TypeDef *SPIx, uint32_t BitOrder)
-{
-  MODIFY_REG(SPIx->CR1, SPI_CR1_LSBFIRST, BitOrder);
-}
-
-/**
-  * @brief  Get transfer bit order
-  * @rmtoll CR1          LSBFIRST      LL_SPI_GetTransferBitOrder
-  * @param  SPIx SPI Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_SPI_LSB_FIRST
-  *         @arg @ref LL_SPI_MSB_FIRST
-  */
-__STATIC_INLINE uint32_t LL_SPI_GetTransferBitOrder(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_LSBFIRST));
-}
-
-/**
-  * @brief  Set transfer direction mode
-  * @note   For Half-Duplex mode, Rx Direction is set by default.
-  *         In master mode, the MOSI pin is used and in slave mode, the MISO pin is used for Half-Duplex.
-  * @rmtoll CR1          RXONLY        LL_SPI_SetTransferDirection\n
-  *         CR1          BIDIMODE      LL_SPI_SetTransferDirection\n
-  *         CR1          BIDIOE        LL_SPI_SetTransferDirection
-  * @param  SPIx SPI Instance
-  * @param  TransferDirection This parameter can be one of the following values:
-  *         @arg @ref LL_SPI_FULL_DUPLEX
-  *         @arg @ref LL_SPI_SIMPLEX_RX
-  *         @arg @ref LL_SPI_HALF_DUPLEX_RX
-  *         @arg @ref LL_SPI_HALF_DUPLEX_TX
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_SetTransferDirection(SPI_TypeDef *SPIx, uint32_t TransferDirection)
-{
-  MODIFY_REG(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE, TransferDirection);
-}
-
-/**
-  * @brief  Get transfer direction mode
-  * @rmtoll CR1          RXONLY        LL_SPI_GetTransferDirection\n
-  *         CR1          BIDIMODE      LL_SPI_GetTransferDirection\n
-  *         CR1          BIDIOE        LL_SPI_GetTransferDirection
-  * @param  SPIx SPI Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_SPI_FULL_DUPLEX
-  *         @arg @ref LL_SPI_SIMPLEX_RX
-  *         @arg @ref LL_SPI_HALF_DUPLEX_RX
-  *         @arg @ref LL_SPI_HALF_DUPLEX_TX
-  */
-__STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE));
-}
-
-/**
-  * @brief  Set frame data width
-  * @rmtoll CR1          DFF           LL_SPI_SetDataWidth
-  * @param  SPIx SPI Instance
-  * @param  DataWidth This parameter can be one of the following values:
-  *         @arg @ref LL_SPI_DATAWIDTH_8BIT
-  *         @arg @ref LL_SPI_DATAWIDTH_16BIT
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_SetDataWidth(SPI_TypeDef *SPIx, uint32_t DataWidth)
-{
-  MODIFY_REG(SPIx->CR1, SPI_CR1_DFF, DataWidth);
-}
-
-/**
-  * @brief  Get frame data width
-  * @rmtoll CR1          DFF           LL_SPI_GetDataWidth
-  * @param  SPIx SPI Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_SPI_DATAWIDTH_8BIT
-  *         @arg @ref LL_SPI_DATAWIDTH_16BIT
-  */
-__STATIC_INLINE uint32_t LL_SPI_GetDataWidth(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_DFF));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EF_CRC_Management CRC Management
-  * @{
-  */
-
-/**
-  * @brief  Enable CRC
-  * @note   This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
-  * @rmtoll CR1          CRCEN         LL_SPI_EnableCRC
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_EnableCRC(SPI_TypeDef *SPIx)
-{
-  SET_BIT(SPIx->CR1, SPI_CR1_CRCEN);
-}
-
-/**
-  * @brief  Disable CRC
-  * @note   This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
-  * @rmtoll CR1          CRCEN         LL_SPI_DisableCRC
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_DisableCRC(SPI_TypeDef *SPIx)
-{
-  CLEAR_BIT(SPIx->CR1, SPI_CR1_CRCEN);
-}
-
-/**
-  * @brief  Check if CRC is enabled
-  * @note   This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
-  * @rmtoll CR1          CRCEN         LL_SPI_IsEnabledCRC
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SPI_IsEnabledCRC(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->CR1, SPI_CR1_CRCEN) == (SPI_CR1_CRCEN));
-}
-
-/**
-  * @brief  Set CRCNext to transfer CRC on the line
-  * @note   This bit has to be written as soon as the last data is written in the SPIx_DR register.
-  * @rmtoll CR1          CRCNEXT       LL_SPI_SetCRCNext
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_SetCRCNext(SPI_TypeDef *SPIx)
-{
-  SET_BIT(SPIx->CR1, SPI_CR1_CRCNEXT);
-}
-
-/**
-  * @brief  Set polynomial for CRC calculation
-  * @rmtoll CRCPR        CRCPOLY       LL_SPI_SetCRCPolynomial
-  * @param  SPIx SPI Instance
-  * @param  CRCPoly This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_SetCRCPolynomial(SPI_TypeDef *SPIx, uint32_t CRCPoly)
-{
-  WRITE_REG(SPIx->CRCPR, (uint16_t)CRCPoly);
-}
-
-/**
-  * @brief  Get polynomial for CRC calculation
-  * @rmtoll CRCPR        CRCPOLY       LL_SPI_GetCRCPolynomial
-  * @param  SPIx SPI Instance
-  * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
-  */
-__STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_REG(SPIx->CRCPR));
-}
-
-/**
-  * @brief  Get Rx CRC
-  * @rmtoll RXCRCR       RXCRC         LL_SPI_GetRxCRC
-  * @param  SPIx SPI Instance
-  * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
-  */
-__STATIC_INLINE uint32_t LL_SPI_GetRxCRC(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_REG(SPIx->RXCRCR));
-}
-
-/**
-  * @brief  Get Tx CRC
-  * @rmtoll TXCRCR       TXCRC         LL_SPI_GetTxCRC
-  * @param  SPIx SPI Instance
-  * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
-  */
-__STATIC_INLINE uint32_t LL_SPI_GetTxCRC(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_REG(SPIx->TXCRCR));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EF_NSS_Management Slave Select Pin Management
-  * @{
-  */
-
-/**
-  * @brief  Set NSS mode
-  * @note   LL_SPI_NSS_SOFT Mode is not used in SPI TI mode.
-  * @rmtoll CR1          SSM           LL_SPI_SetNSSMode\n
-  * @rmtoll CR2          SSOE          LL_SPI_SetNSSMode
-  * @param  SPIx SPI Instance
-  * @param  NSS This parameter can be one of the following values:
-  *         @arg @ref LL_SPI_NSS_SOFT
-  *         @arg @ref LL_SPI_NSS_HARD_INPUT
-  *         @arg @ref LL_SPI_NSS_HARD_OUTPUT
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_SetNSSMode(SPI_TypeDef *SPIx, uint32_t NSS)
-{
-  MODIFY_REG(SPIx->CR1, SPI_CR1_SSM,  NSS);
-  MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, ((uint32_t)(NSS >> 16U)));
-}
-
-/**
-  * @brief  Get NSS mode
-  * @rmtoll CR1          SSM           LL_SPI_GetNSSMode\n
-  * @rmtoll CR2          SSOE          LL_SPI_GetNSSMode
-  * @param  SPIx SPI Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_SPI_NSS_SOFT
-  *         @arg @ref LL_SPI_NSS_HARD_INPUT
-  *         @arg @ref LL_SPI_NSS_HARD_OUTPUT
-  */
-__STATIC_INLINE uint32_t LL_SPI_GetNSSMode(SPI_TypeDef *SPIx)
-{
-  register uint32_t Ssm  = (READ_BIT(SPIx->CR1, SPI_CR1_SSM));
-  register uint32_t Ssoe = (READ_BIT(SPIx->CR2,  SPI_CR2_SSOE) << 16U);
-  return (Ssm | Ssoe);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EF_FLAG_Management FLAG Management
-  * @{
-  */
-
-/**
-  * @brief  Check if Rx buffer is not empty
-  * @rmtoll SR           RXNE          LL_SPI_IsActiveFlag_RXNE
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->SR, SPI_SR_RXNE) == (SPI_SR_RXNE));
-}
-
-/**
-  * @brief  Check if Tx buffer is empty
-  * @rmtoll SR           TXE           LL_SPI_IsActiveFlag_TXE
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE));
-}
-
-/**
-  * @brief  Get CRC error flag
-  * @rmtoll SR           CRCERR        LL_SPI_IsActiveFlag_CRCERR
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->SR, SPI_SR_CRCERR) == (SPI_SR_CRCERR));
-}
-
-/**
-  * @brief  Get mode fault error flag
-  * @rmtoll SR           MODF          LL_SPI_IsActiveFlag_MODF
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->SR, SPI_SR_MODF) == (SPI_SR_MODF));
-}
-
-/**
-  * @brief  Get overrun error flag
-  * @rmtoll SR           OVR           LL_SPI_IsActiveFlag_OVR
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->SR, SPI_SR_OVR) == (SPI_SR_OVR));
-}
-
-/**
-  * @brief  Get busy flag
-  * @note   The BSY flag is cleared under any one of the following conditions:
-  * -When the SPI is correctly disabled
-  * -When a fault is detected in Master mode (MODF bit set to 1)
-  * -In Master mode, when it finishes a data transmission and no new data is ready to be
-  * sent
-  * -In Slave mode, when the BSY flag is set to '0' for at least one SPI clock cycle between
-  * each data transfer.
-  * @rmtoll SR           BSY           LL_SPI_IsActiveFlag_BSY
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->SR, SPI_SR_BSY) == (SPI_SR_BSY));
-}
-
-/**
-  * @brief  Get frame format error flag
-  * @rmtoll SR           FRE           LL_SPI_IsActiveFlag_FRE
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_FRE(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->SR, SPI_SR_FRE) == (SPI_SR_FRE));
-}
-
-/**
-  * @brief  Clear CRC error flag
-  * @rmtoll SR           CRCERR        LL_SPI_ClearFlag_CRCERR
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_ClearFlag_CRCERR(SPI_TypeDef *SPIx)
-{
-  CLEAR_BIT(SPIx->SR, SPI_SR_CRCERR);
-}
-
-/**
-  * @brief  Clear mode fault error flag
-  * @note   Clearing this flag is done by a read access to the SPIx_SR
-  *         register followed by a write access to the SPIx_CR1 register
-  * @rmtoll SR           MODF          LL_SPI_ClearFlag_MODF
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_ClearFlag_MODF(SPI_TypeDef *SPIx)
-{
-  __IO uint32_t tmpreg;
-  tmpreg = SPIx->SR;
-  (void) tmpreg;
-  tmpreg = CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE);
-  (void) tmpreg;
-}
-
-/**
-  * @brief  Clear overrun error flag
-  * @note   Clearing this flag is done by a read access to the SPIx_DR
-  *         register followed by a read access to the SPIx_SR register
-  * @rmtoll SR           OVR           LL_SPI_ClearFlag_OVR
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_ClearFlag_OVR(SPI_TypeDef *SPIx)
-{
-  __IO uint32_t tmpreg;
-  tmpreg = SPIx->DR;
-  (void) tmpreg;
-  tmpreg = SPIx->SR;
-  (void) tmpreg;
-}
-
-/**
-  * @brief  Clear frame format error flag
-  * @note   Clearing this flag is done by reading SPIx_SR register
-  * @rmtoll SR           FRE           LL_SPI_ClearFlag_FRE
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_ClearFlag_FRE(SPI_TypeDef *SPIx)
-{
-  __IO uint32_t tmpreg;
-  tmpreg = SPIx->SR;
-  (void) tmpreg;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EF_IT_Management Interrupt Management
-  * @{
-  */
-
-/**
-  * @brief  Enable error interrupt
-  * @note   This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode).
-  * @rmtoll CR2          ERRIE         LL_SPI_EnableIT_ERR
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_EnableIT_ERR(SPI_TypeDef *SPIx)
-{
-  SET_BIT(SPIx->CR2, SPI_CR2_ERRIE);
-}
-
-/**
-  * @brief  Enable Rx buffer not empty interrupt
-  * @rmtoll CR2          RXNEIE        LL_SPI_EnableIT_RXNE
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_EnableIT_RXNE(SPI_TypeDef *SPIx)
-{
-  SET_BIT(SPIx->CR2, SPI_CR2_RXNEIE);
-}
-
-/**
-  * @brief  Enable Tx buffer empty interrupt
-  * @rmtoll CR2          TXEIE         LL_SPI_EnableIT_TXE
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_EnableIT_TXE(SPI_TypeDef *SPIx)
-{
-  SET_BIT(SPIx->CR2, SPI_CR2_TXEIE);
-}
-
-/**
-  * @brief  Disable error interrupt
-  * @note   This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode).
-  * @rmtoll CR2          ERRIE         LL_SPI_DisableIT_ERR
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_DisableIT_ERR(SPI_TypeDef *SPIx)
-{
-  CLEAR_BIT(SPIx->CR2, SPI_CR2_ERRIE);
-}
-
-/**
-  * @brief  Disable Rx buffer not empty interrupt
-  * @rmtoll CR2          RXNEIE        LL_SPI_DisableIT_RXNE
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_DisableIT_RXNE(SPI_TypeDef *SPIx)
-{
-  CLEAR_BIT(SPIx->CR2, SPI_CR2_RXNEIE);
-}
-
-/**
-  * @brief  Disable Tx buffer empty interrupt
-  * @rmtoll CR2          TXEIE         LL_SPI_DisableIT_TXE
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_DisableIT_TXE(SPI_TypeDef *SPIx)
-{
-  CLEAR_BIT(SPIx->CR2, SPI_CR2_TXEIE);
-}
-
-/**
-  * @brief  Check if error interrupt is enabled
-  * @rmtoll CR2          ERRIE         LL_SPI_IsEnabledIT_ERR
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->CR2, SPI_CR2_ERRIE) == (SPI_CR2_ERRIE));
-}
-
-/**
-  * @brief  Check if Rx buffer not empty interrupt is enabled
-  * @rmtoll CR2          RXNEIE        LL_SPI_IsEnabledIT_RXNE
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->CR2, SPI_CR2_RXNEIE) == (SPI_CR2_RXNEIE));
-}
-
-/**
-  * @brief  Check if Tx buffer empty interrupt
-  * @rmtoll CR2          TXEIE         LL_SPI_IsEnabledIT_TXE
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXE(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->CR2, SPI_CR2_TXEIE) == (SPI_CR2_TXEIE));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EF_DMA_Management DMA Management
-  * @{
-  */
-
-/**
-  * @brief  Enable DMA Rx
-  * @rmtoll CR2          RXDMAEN       LL_SPI_EnableDMAReq_RX
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_EnableDMAReq_RX(SPI_TypeDef *SPIx)
-{
-  SET_BIT(SPIx->CR2, SPI_CR2_RXDMAEN);
-}
-
-/**
-  * @brief  Disable DMA Rx
-  * @rmtoll CR2          RXDMAEN       LL_SPI_DisableDMAReq_RX
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_DisableDMAReq_RX(SPI_TypeDef *SPIx)
-{
-  CLEAR_BIT(SPIx->CR2, SPI_CR2_RXDMAEN);
-}
-
-/**
-  * @brief  Check if DMA Rx is enabled
-  * @rmtoll CR2          RXDMAEN       LL_SPI_IsEnabledDMAReq_RX
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->CR2, SPI_CR2_RXDMAEN) == (SPI_CR2_RXDMAEN));
-}
-
-/**
-  * @brief  Enable DMA Tx
-  * @rmtoll CR2          TXDMAEN       LL_SPI_EnableDMAReq_TX
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_EnableDMAReq_TX(SPI_TypeDef *SPIx)
-{
-  SET_BIT(SPIx->CR2, SPI_CR2_TXDMAEN);
-}
-
-/**
-  * @brief  Disable DMA Tx
-  * @rmtoll CR2          TXDMAEN       LL_SPI_DisableDMAReq_TX
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_DisableDMAReq_TX(SPI_TypeDef *SPIx)
-{
-  CLEAR_BIT(SPIx->CR2, SPI_CR2_TXDMAEN);
-}
-
-/**
-  * @brief  Check if DMA Tx is enabled
-  * @rmtoll CR2          TXDMAEN       LL_SPI_IsEnabledDMAReq_TX
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN));
-}
-
-/**
-  * @brief  Get the data register address used for DMA transfer
-  * @rmtoll DR           DR            LL_SPI_DMA_GetRegAddr
-  * @param  SPIx SPI Instance
-  * @retval Address of data register
-  */
-__STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(SPI_TypeDef *SPIx)
-{
-  return (uint32_t) & (SPIx->DR);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EF_DATA_Management DATA Management
-  * @{
-  */
-
-/**
-  * @brief  Read 8-Bits in the data register
-  * @rmtoll DR           DR            LL_SPI_ReceiveData8
-  * @param  SPIx SPI Instance
-  * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFF
-  */
-__STATIC_INLINE uint8_t LL_SPI_ReceiveData8(SPI_TypeDef *SPIx)
-{
-  return (uint8_t)(READ_REG(SPIx->DR));
-}
-
-/**
-  * @brief  Read 16-Bits in the data register
-  * @rmtoll DR           DR            LL_SPI_ReceiveData16
-  * @param  SPIx SPI Instance
-  * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFFFF
-  */
-__STATIC_INLINE uint16_t LL_SPI_ReceiveData16(SPI_TypeDef *SPIx)
-{
-  return (uint16_t)(READ_REG(SPIx->DR));
-}
-
-/**
-  * @brief  Write 8-Bits in the data register
-  * @rmtoll DR           DR            LL_SPI_TransmitData8
-  * @param  SPIx SPI Instance
-  * @param  TxData Value between Min_Data=0x00 and Max_Data=0xFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_TransmitData8(SPI_TypeDef *SPIx, uint8_t TxData)
-{
-  *((__IO uint8_t *)&SPIx->DR) = TxData;
-}
-
-/**
-  * @brief  Write 16-Bits in the data register
-  * @rmtoll DR           DR            LL_SPI_TransmitData16
-  * @param  SPIx SPI Instance
-  * @param  TxData Value between Min_Data=0x00 and Max_Data=0xFFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData)
-{
-  *((__IO uint16_t *)&SPIx->DR) = TxData;
-}
-
-/**
-  * @}
-  */
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup SPI_LL_EF_Init Initialization and de-initialization functions
-  * @{
-  */
-
-ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx);
-ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct);
-void        LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct);
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#if defined(SPI_I2S_SUPPORT)
-/** @defgroup I2S_LL I2S
-  * @{
-  */
-
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup I2S_LL_ES_INIT I2S Exported Init structure
-  * @{
-  */
-
-/**
-  * @brief  I2S Init structure definition
-  */
-
-typedef struct
-{
-  uint32_t Mode;                    /*!< Specifies the I2S operating mode.
-                                         This parameter can be a value of @ref I2S_LL_EC_MODE
-
-                                         This feature can be modified afterwards using unitary function @ref LL_I2S_SetTransferMode().*/
-
-  uint32_t Standard;                /*!< Specifies the standard used for the I2S communication.
-                                         This parameter can be a value of @ref I2S_LL_EC_STANDARD
-
-                                         This feature can be modified afterwards using unitary function @ref LL_I2S_SetStandard().*/
-
-
-  uint32_t DataFormat;              /*!< Specifies the data format for the I2S communication.
-                                         This parameter can be a value of @ref I2S_LL_EC_DATA_FORMAT
-
-                                         This feature can be modified afterwards using unitary function @ref LL_I2S_SetDataFormat().*/
-
-
-  uint32_t MCLKOutput;              /*!< Specifies whether the I2S MCLK output is enabled or not.
-                                         This parameter can be a value of @ref I2S_LL_EC_MCLK_OUTPUT
-
-                                         This feature can be modified afterwards using unitary functions @ref LL_I2S_EnableMasterClock() or @ref LL_I2S_DisableMasterClock.*/
-
-
-  uint32_t AudioFreq;               /*!< Specifies the frequency selected for the I2S communication.
-                                         This parameter can be a value of @ref I2S_LL_EC_AUDIO_FREQ
-
-                                         Audio Frequency can be modified afterwards using Reference manual formulas to calculate Prescaler Linear, Parity
-                                         and unitary functions @ref LL_I2S_SetPrescalerLinear() and @ref LL_I2S_SetPrescalerParity() to set it.*/
-
-
-  uint32_t ClockPolarity;           /*!< Specifies the idle state of the I2S clock.
-                                         This parameter can be a value of @ref I2S_LL_EC_POLARITY
-
-                                         This feature can be modified afterwards using unitary function @ref LL_I2S_SetClockPolarity().*/
-
-} LL_I2S_InitTypeDef;
-
-/**
-  * @}
-  */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup I2S_LL_Exported_Constants I2S Exported Constants
-  * @{
-  */
-
-/** @defgroup I2S_LL_EC_GET_FLAG Get Flags Defines
-  * @brief    Flags defines which can be used with LL_I2S_ReadReg function
-  * @{
-  */
-#define LL_I2S_SR_RXNE                     LL_SPI_SR_RXNE            /*!< Rx buffer not empty flag         */
-#define LL_I2S_SR_TXE                      LL_SPI_SR_TXE             /*!< Tx buffer empty flag             */
-#define LL_I2S_SR_BSY                      LL_SPI_SR_BSY             /*!< Busy flag                        */
-#define LL_I2S_SR_UDR                      LL_SPI_SR_UDR             /*!< Underrun flag                    */
-#define LL_I2S_SR_OVR                      LL_SPI_SR_OVR             /*!< Overrun flag                     */
-#define LL_I2S_SR_FRE                      LL_SPI_SR_FRE             /*!< TI mode frame format error flag  */
-/**
-  * @}
-  */
-
-/** @defgroup SPI_LL_EC_IT IT Defines
-  * @brief    IT defines which can be used with LL_SPI_ReadReg and  LL_SPI_WriteReg functions
-  * @{
-  */
-#define LL_I2S_CR2_RXNEIE                  LL_SPI_CR2_RXNEIE         /*!< Rx buffer not empty interrupt enable */
-#define LL_I2S_CR2_TXEIE                   LL_SPI_CR2_TXEIE          /*!< Tx buffer empty interrupt enable     */
-#define LL_I2S_CR2_ERRIE                   LL_SPI_CR2_ERRIE          /*!< Error interrupt enable               */
-/**
-  * @}
-  */
-
-/** @defgroup I2S_LL_EC_DATA_FORMAT Data format
-  * @{
-  */
-#define LL_I2S_DATAFORMAT_16B              ((uint32_t)0x00000000U)                       /*!< Data length 16 bits, Channel lenght 16bit */
-#define LL_I2S_DATAFORMAT_16B_EXTENDED     (SPI_I2SCFGR_CHLEN)                           /*!< Data length 16 bits, Channel lenght 32bit */
-#define LL_I2S_DATAFORMAT_24B              (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0)    /*!< Data length 24 bits, Channel lenght 32bit */
-#define LL_I2S_DATAFORMAT_32B              (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1)    /*!< Data length 16 bits, Channel lenght 32bit */
-/**
-  * @}
-  */
-
-/** @defgroup I2S_LL_EC_POLARITY Clock Polarity
-  * @{
-  */
-#define LL_I2S_POLARITY_LOW                ((uint32_t)0x00000000U)   /*!< Clock steady state is low level  */
-#define LL_I2S_POLARITY_HIGH               (SPI_I2SCFGR_CKPOL)       /*!< Clock steady state is high level */
-/**
-  * @}
-  */
-
-/** @defgroup I2S_LL_EC_STANDARD I2s Standard
-  * @{
-  */
-#define LL_I2S_STANDARD_PHILIPS            ((uint32_t)0x00000000U)                                             /*!< I2S standard philips                      */
-#define LL_I2S_STANDARD_MSB                (SPI_I2SCFGR_I2SSTD_0)                                              /*!< MSB justified standard (left justified)   */
-#define LL_I2S_STANDARD_LSB                (SPI_I2SCFGR_I2SSTD_1)                                              /*!< LSB justified standard (right justified)  */
-#define LL_I2S_STANDARD_PCM_SHORT          (SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1)                       /*!< PCM standard, short frame synchronization */
-#define LL_I2S_STANDARD_PCM_LONG           (SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC) /*!< PCM standard, long frame synchronization  */
-/**
-  * @}
-  */
-
-/** @defgroup I2S_LL_EC_MODE Operation Mode
-  * @{
-  */
-#define LL_I2S_MODE_SLAVE_TX               ((uint32_t)0x00000000U)                       /*!< Slave Tx configuration  */
-#define LL_I2S_MODE_SLAVE_RX               (SPI_I2SCFGR_I2SCFG_0)                        /*!< Slave Rx configuration  */
-#define LL_I2S_MODE_MASTER_TX              (SPI_I2SCFGR_I2SCFG_1)                        /*!< Master Tx configuration */
-#define LL_I2S_MODE_MASTER_RX              (SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1) /*!< Master Rx configuration */
-/**
-  * @}
-  */
-
-/** @defgroup I2S_LL_EC_PRESCALER_FACTOR Prescaler Factor
-  * @{
-  */
-#define LL_I2S_PRESCALER_PARITY_EVEN       ((uint32_t)0x00000000U)   /*!< Odd factor: Real divider value is =  I2SDIV * 2    */
-#define LL_I2S_PRESCALER_PARITY_ODD        (SPI_I2SPR_ODD >> 8U)     /*!< Odd factor: Real divider value is = (I2SDIV * 2)+1 */
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-
-/** @defgroup I2S_LL_EC_MCLK_OUTPUT MCLK Output
-  * @{
-  */
-#define LL_I2S_MCLK_OUTPUT_DISABLE         ((uint32_t)0x00000000U)   /*!< Master clock output is disabled */
-#define LL_I2S_MCLK_OUTPUT_ENABLE          (SPI_I2SPR_MCKOE)         /*!< Master clock output is enabled  */
-/**
-  * @}
-  */
-
-/** @defgroup I2S_LL_EC_AUDIO_FREQ Audio Frequency
-  * @{
-  */
-
-#define LL_I2S_AUDIOFREQ_192K              ((uint32_t)192000)        /*!< Audio Frequency configuration 192000 Hz       */
-#define LL_I2S_AUDIOFREQ_96K               ((uint32_t) 96000)        /*!< Audio Frequency configuration  96000 Hz       */
-#define LL_I2S_AUDIOFREQ_48K               ((uint32_t) 48000)        /*!< Audio Frequency configuration  48000 Hz       */
-#define LL_I2S_AUDIOFREQ_44K               ((uint32_t) 44100)        /*!< Audio Frequency configuration  44100 Hz       */
-#define LL_I2S_AUDIOFREQ_32K               ((uint32_t) 32000)        /*!< Audio Frequency configuration  32000 Hz       */
-#define LL_I2S_AUDIOFREQ_22K               ((uint32_t) 22050)        /*!< Audio Frequency configuration  22050 Hz       */
-#define LL_I2S_AUDIOFREQ_16K               ((uint32_t) 16000)        /*!< Audio Frequency configuration  16000 Hz       */
-#define LL_I2S_AUDIOFREQ_11K               ((uint32_t) 11025)        /*!< Audio Frequency configuration  11025 Hz       */
-#define LL_I2S_AUDIOFREQ_8K                ((uint32_t)  8000)        /*!< Audio Frequency configuration   8000 Hz       */
-#define LL_I2S_AUDIOFREQ_DEFAULT           ((uint32_t)     2)        /*!< Audio Freq not specified. Register I2SDIV = 2 */
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup I2S_LL_Exported_Macros I2S Exported Macros
-  * @{
-  */
-
-/** @defgroup I2S_LL_EM_WRITE_READ Common Write and read registers Macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in I2S register
-  * @param  __INSTANCE__ I2S Instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_I2S_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in I2S register
-  * @param  __INSTANCE__ I2S Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_I2S_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup I2S_LL_Exported_Functions I2S Exported Functions
-  * @{
-  */
-
-/** @defgroup I2S_LL_EF_Configuration Configuration
-  * @{
-  */
-
-/**
-  * @brief  Select I2S mode and Enable I2S peripheral
-  * @rmtoll I2SCFGR      I2SMOD        LL_I2S_Enable\n
-  *         I2SCFGR      I2SE          LL_I2S_Enable
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_Enable(SPI_TypeDef *SPIx)
-{
-  SET_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD | SPI_I2SCFGR_I2SE);
-}
-
-/**
-  * @brief  Disable I2S peripheral
-  * @rmtoll I2SCFGR      I2SE          LL_I2S_Disable
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_Disable(SPI_TypeDef *SPIx)
-{
-  CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD | SPI_I2SCFGR_I2SE);
-}
-
-/**
-  * @brief  Check if I2S peripheral is enabled
-  * @rmtoll I2SCFGR      I2SE          LL_I2S_IsEnabled
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2S_IsEnabled(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SE) == (SPI_I2SCFGR_I2SE));
-}
-
-/**
-  * @brief  Set I2S data frame length
-  * @rmtoll I2SCFGR      DATLEN        LL_I2S_SetDataFormat\n
-  *         I2SCFGR      CHLEN         LL_I2S_SetDataFormat
-  * @param  SPIx SPI Instance
-  * @param  DataFormat This parameter can be one of the following values:
-  *         @arg @ref LL_I2S_DATAFORMAT_16B
-  *         @arg @ref LL_I2S_DATAFORMAT_16B_EXTENDED
-  *         @arg @ref LL_I2S_DATAFORMAT_24B
-  *         @arg @ref LL_I2S_DATAFORMAT_32B
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_SetDataFormat(SPI_TypeDef *SPIx, uint32_t DataFormat)
-{
-  MODIFY_REG(SPIx->I2SCFGR, SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN, DataFormat);
-}
-
-/**
-  * @brief  Get I2S data frame length
-  * @rmtoll I2SCFGR      DATLEN        LL_I2S_GetDataFormat\n
-  *         I2SCFGR      CHLEN         LL_I2S_GetDataFormat
-  * @param  SPIx SPI Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_I2S_DATAFORMAT_16B
-  *         @arg @ref LL_I2S_DATAFORMAT_16B_EXTENDED
-  *         @arg @ref LL_I2S_DATAFORMAT_24B
-  *         @arg @ref LL_I2S_DATAFORMAT_32B
-  */
-__STATIC_INLINE uint32_t LL_I2S_GetDataFormat(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN));
-}
-
-/**
-  * @brief  Set I2S clock polarity
-  * @rmtoll I2SCFGR      CKPOL         LL_I2S_SetClockPolarity
-  * @param  SPIx SPI Instance
-  * @param  ClockPolarity This parameter can be one of the following values:
-  *         @arg @ref LL_I2S_POLARITY_LOW
-  *         @arg @ref LL_I2S_POLARITY_HIGH
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity)
-{
-  SET_BIT(SPIx->I2SCFGR, ClockPolarity);
-}
-
-/**
-  * @brief  Get I2S clock polarity
-  * @rmtoll I2SCFGR      CKPOL         LL_I2S_GetClockPolarity
-  * @param  SPIx SPI Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_I2S_POLARITY_LOW
-  *         @arg @ref LL_I2S_POLARITY_HIGH
-  */
-__STATIC_INLINE uint32_t LL_I2S_GetClockPolarity(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_CKPOL));
-}
-
-/**
-  * @brief  Set I2S standard protocol
-  * @rmtoll I2SCFGR      I2SSTD        LL_I2S_SetStandard\n
-  *         I2SCFGR      PCMSYNC       LL_I2S_SetStandard
-  * @param  SPIx SPI Instance
-  * @param  Standard This parameter can be one of the following values:
-  *         @arg @ref LL_I2S_STANDARD_PHILIPS
-  *         @arg @ref LL_I2S_STANDARD_MSB
-  *         @arg @ref LL_I2S_STANDARD_LSB
-  *         @arg @ref LL_I2S_STANDARD_PCM_SHORT
-  *         @arg @ref LL_I2S_STANDARD_PCM_LONG
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard)
-{
-  MODIFY_REG(SPIx->I2SCFGR, SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC, Standard);
-}
-
-/**
-  * @brief  Get I2S standard protocol
-  * @rmtoll I2SCFGR      I2SSTD        LL_I2S_GetStandard\n
-  *         I2SCFGR      PCMSYNC       LL_I2S_GetStandard
-  * @param  SPIx SPI Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_I2S_STANDARD_PHILIPS
-  *         @arg @ref LL_I2S_STANDARD_MSB
-  *         @arg @ref LL_I2S_STANDARD_LSB
-  *         @arg @ref LL_I2S_STANDARD_PCM_SHORT
-  *         @arg @ref LL_I2S_STANDARD_PCM_LONG
-  */
-__STATIC_INLINE uint32_t LL_I2S_GetStandard(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC));
-}
-
-/**
-  * @brief  Set I2S transfer mode
-  * @rmtoll I2SCFGR      I2SCFG        LL_I2S_SetTransferMode
-  * @param  SPIx SPI Instance
-  * @param  Mode This parameter can be one of the following values:
-  *         @arg @ref LL_I2S_MODE_SLAVE_TX
-  *         @arg @ref LL_I2S_MODE_SLAVE_RX
-  *         @arg @ref LL_I2S_MODE_MASTER_TX
-  *         @arg @ref LL_I2S_MODE_MASTER_RX
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_SetTransferMode(SPI_TypeDef *SPIx, uint32_t Mode)
-{
-  MODIFY_REG(SPIx->I2SCFGR, SPI_I2SCFGR_I2SCFG, Mode);
-}
-
-/**
-  * @brief  Get I2S transfer mode
-  * @rmtoll I2SCFGR      I2SCFG        LL_I2S_GetTransferMode
-  * @param  SPIx SPI Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_I2S_MODE_SLAVE_TX
-  *         @arg @ref LL_I2S_MODE_SLAVE_RX
-  *         @arg @ref LL_I2S_MODE_MASTER_TX
-  *         @arg @ref LL_I2S_MODE_MASTER_RX
-  */
-__STATIC_INLINE uint32_t LL_I2S_GetTransferMode(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SCFG));
-}
-
-/**
-  * @brief  Set I2S linear prescaler
-  * @rmtoll I2SPR        I2SDIV        LL_I2S_SetPrescalerLinear
-  * @param  SPIx SPI Instance
-  * @param  PrescalerLinear Value between Min_Data=0x02 and Max_Data=0xFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_SetPrescalerLinear(SPI_TypeDef *SPIx, uint8_t PrescalerLinear)
-{
-  MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_I2SDIV, PrescalerLinear);
-}
-
-/**
-  * @brief  Get I2S linear prescaler
-  * @rmtoll I2SPR        I2SDIV        LL_I2S_GetPrescalerLinear
-  * @param  SPIx SPI Instance
-  * @retval PrescalerLinear Value between Min_Data=0x02 and Max_Data=0xFF
-  */
-__STATIC_INLINE uint32_t LL_I2S_GetPrescalerLinear(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_BIT(SPIx->I2SPR, SPI_I2SPR_I2SDIV));
-}
-
-/**
-  * @brief  Set I2S parity prescaler
-  * @rmtoll I2SPR        ODD           LL_I2S_SetPrescalerParity
-  * @param  SPIx SPI Instance
-  * @param  PrescalerParity This parameter can be one of the following values:
-  *         @arg @ref LL_I2S_PRESCALER_PARITY_EVEN
-  *         @arg @ref LL_I2S_PRESCALER_PARITY_ODD
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_SetPrescalerParity(SPI_TypeDef *SPIx, uint32_t PrescalerParity)
-{
-  MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_ODD, PrescalerParity << 8U);
-}
-
-/**
-  * @brief  Get I2S parity prescaler
-  * @rmtoll I2SPR        ODD           LL_I2S_GetPrescalerParity
-  * @param  SPIx SPI Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_I2S_PRESCALER_PARITY_EVEN
-  *         @arg @ref LL_I2S_PRESCALER_PARITY_ODD
-  */
-__STATIC_INLINE uint32_t LL_I2S_GetPrescalerParity(SPI_TypeDef *SPIx)
-{
-  return (uint32_t)(READ_BIT(SPIx->I2SPR, SPI_I2SPR_ODD) >> 8U);
-}
-
-/**
-  * @brief  Enable the master clock ouput (Pin MCK)
-  * @rmtoll I2SPR        MCKOE         LL_I2S_EnableMasterClock
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_EnableMasterClock(SPI_TypeDef *SPIx)
-{
-  SET_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE);
-}
-
-/**
-  * @brief  Disable the master clock ouput (Pin MCK)
-  * @rmtoll I2SPR        MCKOE         LL_I2S_DisableMasterClock
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_DisableMasterClock(SPI_TypeDef *SPIx)
-{
-  CLEAR_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE);
-}
-
-/**
-  * @brief  Check if the master clock ouput (Pin MCK) is enabled
-  * @rmtoll I2SPR        MCKOE         LL_I2S_IsEnabledMasterClock
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2S_IsEnabledMasterClock(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE) == (SPI_I2SPR_MCKOE));
-}
-
-#if defined(SPI_I2SCFGR_ASTRTEN)
-/**
-  * @brief  Enable asynchronous start
-  * @rmtoll I2SCFGR      ASTRTEN       LL_I2S_EnableAsyncStart
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_EnableAsyncStart(SPI_TypeDef *SPIx)
-{
-  SET_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_ASTRTEN);
-}
-
-/**
-  * @brief  Disable  asynchronous start
-  * @rmtoll I2SCFGR      ASTRTEN       LL_I2S_DisableAsyncStart
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_DisableAsyncStart(SPI_TypeDef *SPIx)
-{
-  CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_ASTRTEN);
-}
-
-/**
-  * @brief  Check if asynchronous start is enabled
-  * @rmtoll I2SCFGR      ASTRTEN       LL_I2S_IsEnabledAsyncStart
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2S_IsEnabledAsyncStart(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_ASTRTEN) == (SPI_I2SCFGR_ASTRTEN));
-}
-#endif /* SPI_I2SCFGR_ASTRTEN */
-
-/**
-  * @}
-  */
-
-/** @defgroup I2S_LL_EF_FLAG FLAG Management
-  * @{
-  */
-
-/**
-  * @brief  Check if Rx buffer is not empty
-  * @rmtoll SR           RXNE          LL_I2S_IsActiveFlag_RXNE
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_RXNE(SPI_TypeDef *SPIx)
-{
-  return LL_SPI_IsActiveFlag_RXNE(SPIx);
-}
-
-/**
-  * @brief  Check if Tx buffer is empty
-  * @rmtoll SR           TXE           LL_I2S_IsActiveFlag_TXE
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_TXE(SPI_TypeDef *SPIx)
-{
-  return LL_SPI_IsActiveFlag_TXE(SPIx);
-}
-
-/**
-  * @brief  Get busy flag
-  * @rmtoll SR           BSY           LL_I2S_IsActiveFlag_BSY
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_BSY(SPI_TypeDef *SPIx)
-{
-  return LL_SPI_IsActiveFlag_BSY(SPIx);
-}
-
-/**
-  * @brief  Get overrun error flag
-  * @rmtoll SR           OVR           LL_I2S_IsActiveFlag_OVR
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_OVR(SPI_TypeDef *SPIx)
-{
-  return LL_SPI_IsActiveFlag_OVR(SPIx);
-}
-
-/**
-  * @brief  Get underrun error flag
-  * @rmtoll SR           UDR           LL_I2S_IsActiveFlag_UDR
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_UDR(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->SR, SPI_SR_UDR) == (SPI_SR_UDR));
-}
-
-/**
-  * @brief  Get frame format error flag
-  * @rmtoll SR           FRE           LL_I2S_IsActiveFlag_FRE
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_FRE(SPI_TypeDef *SPIx)
-{
-  return LL_SPI_IsActiveFlag_FRE(SPIx);
-}
-
-/**
-  * @brief  Get channel side flag.
-  * @note   0: Channel Left has to be transmitted or has been received\n
-  *         1: Channel Right has to be transmitted or has been received\n
-  *         It has no significance in PCM mode.
-  * @rmtoll SR           CHSIDE        LL_I2S_IsActiveFlag_CHSIDE
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_CHSIDE(SPI_TypeDef *SPIx)
-{
-  return (READ_BIT(SPIx->SR, SPI_SR_CHSIDE) == (SPI_SR_CHSIDE));
-}
-
-/**
-  * @brief  Clear overrun error flag
-  * @rmtoll SR           OVR           LL_I2S_ClearFlag_OVR
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_ClearFlag_OVR(SPI_TypeDef *SPIx)
-{
-  LL_SPI_ClearFlag_OVR(SPIx);
-}
-
-/**
-  * @brief  Clear underrun error flag
-  * @rmtoll SR           UDR           LL_I2S_ClearFlag_UDR
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_ClearFlag_UDR(SPI_TypeDef *SPIx)
-{
-  __IO uint32_t tmpreg;
-  tmpreg = SPIx->SR;
-  (void)tmpreg;
-}
-
-/**
-  * @brief  Clear frame format error flag
-  * @rmtoll SR           FRE           LL_I2S_ClearFlag_FRE
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_ClearFlag_FRE(SPI_TypeDef *SPIx)
-{
-  LL_SPI_ClearFlag_FRE(SPIx);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup I2S_LL_EF_IT Interrupt Management
-  * @{
-  */
-
-/**
-  * @brief  Enable error IT
-  * @note   This bit controls the generation of an interrupt when an error condition occurs (OVR, UDR and FRE in I2S mode).
-  * @rmtoll CR2          ERRIE         LL_I2S_EnableIT_ERR
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_EnableIT_ERR(SPI_TypeDef *SPIx)
-{
-  LL_SPI_EnableIT_ERR(SPIx);
-}
-
-/**
-  * @brief  Enable Rx buffer not empty IT
-  * @rmtoll CR2          RXNEIE        LL_I2S_EnableIT_RXNE
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_EnableIT_RXNE(SPI_TypeDef *SPIx)
-{
-  LL_SPI_EnableIT_RXNE(SPIx);
-}
-
-/**
-  * @brief  Enable Tx buffer empty IT
-  * @rmtoll CR2          TXEIE         LL_I2S_EnableIT_TXE
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_EnableIT_TXE(SPI_TypeDef *SPIx)
-{
-  LL_SPI_EnableIT_TXE(SPIx);
-}
-
-/**
-  * @brief  Disable error IT
-  * @note   This bit controls the generation of an interrupt when an error condition occurs (OVR, UDR and FRE in I2S mode).
-  * @rmtoll CR2          ERRIE         LL_I2S_DisableIT_ERR
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_DisableIT_ERR(SPI_TypeDef *SPIx)
-{
-  LL_SPI_DisableIT_ERR(SPIx);
-}
-
-/**
-  * @brief  Disable Rx buffer not empty IT
-  * @rmtoll CR2          RXNEIE        LL_I2S_DisableIT_RXNE
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_DisableIT_RXNE(SPI_TypeDef *SPIx)
-{
-  LL_SPI_DisableIT_RXNE(SPIx);
-}
-
-/**
-  * @brief  Disable Tx buffer empty IT
-  * @rmtoll CR2          TXEIE         LL_I2S_DisableIT_TXE
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_DisableIT_TXE(SPI_TypeDef *SPIx)
-{
-  LL_SPI_DisableIT_TXE(SPIx);
-}
-
-/**
-  * @brief  Check if ERR IT is enabled
-  * @rmtoll CR2          ERRIE         LL_I2S_IsEnabledIT_ERR
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_ERR(SPI_TypeDef *SPIx)
-{
-  return LL_SPI_IsEnabledIT_ERR(SPIx);
-}
-
-/**
-  * @brief  Check if RXNE IT is enabled
-  * @rmtoll CR2          RXNEIE        LL_I2S_IsEnabledIT_RXNE
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_RXNE(SPI_TypeDef *SPIx)
-{
-  return LL_SPI_IsEnabledIT_RXNE(SPIx);
-}
-
-/**
-  * @brief  Check if TXE IT is enabled
-  * @rmtoll CR2          TXEIE         LL_I2S_IsEnabledIT_TXE
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_TXE(SPI_TypeDef *SPIx)
-{
-  return LL_SPI_IsEnabledIT_TXE(SPIx);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup I2S_LL_EF_DMA DMA Management
-  * @{
-  */
-
-/**
-  * @brief  Enable DMA Rx
-  * @rmtoll CR2          RXDMAEN       LL_I2S_EnableDMAReq_RX
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_EnableDMAReq_RX(SPI_TypeDef *SPIx)
-{
-  LL_SPI_EnableDMAReq_RX(SPIx);
-}
-
-/**
-  * @brief  Disable DMA Rx
-  * @rmtoll CR2          RXDMAEN       LL_I2S_DisableDMAReq_RX
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_DisableDMAReq_RX(SPI_TypeDef *SPIx)
-{
-  LL_SPI_DisableDMAReq_RX(SPIx);
-}
-
-/**
-  * @brief  Check if DMA Rx is enabled
-  * @rmtoll CR2          RXDMAEN       LL_I2S_IsEnabledDMAReq_RX
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx)
-{
-  return LL_SPI_IsEnabledDMAReq_RX(SPIx);
-}
-
-/**
-  * @brief  Enable DMA Tx
-  * @rmtoll CR2          TXDMAEN       LL_I2S_EnableDMAReq_TX
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_EnableDMAReq_TX(SPI_TypeDef *SPIx)
-{
-  LL_SPI_EnableDMAReq_TX(SPIx);
-}
-
-/**
-  * @brief  Disable DMA Tx
-  * @rmtoll CR2          TXDMAEN       LL_I2S_DisableDMAReq_TX
-  * @param  SPIx SPI Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_DisableDMAReq_TX(SPI_TypeDef *SPIx)
-{
-  LL_SPI_DisableDMAReq_TX(SPIx);
-}
-
-/**
-  * @brief  Check if DMA Tx is enabled
-  * @rmtoll CR2          TXDMAEN       LL_I2S_IsEnabledDMAReq_TX
-  * @param  SPIx SPI Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx)
-{
-  return LL_SPI_IsEnabledDMAReq_TX(SPIx);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup I2S_LL_EF_DATA DATA Management
-  * @{
-  */
-
-/**
-  * @brief  Read 16-Bits in data register
-  * @rmtoll DR           DR            LL_I2S_ReceiveData16
-  * @param  SPIx SPI Instance
-  * @retval RxData Value between Min_Data=0x0000 and Max_Data=0xFFFF
-  */
-__STATIC_INLINE uint16_t LL_I2S_ReceiveData16(SPI_TypeDef *SPIx)
-{
-  return LL_SPI_ReceiveData16(SPIx);
-}
-
-/**
-  * @brief  Write 16-Bits in data register
-  * @rmtoll DR           DR            LL_I2S_TransmitData16
-  * @param  SPIx SPI Instance
-  * @param  TxData Value between Min_Data=0x0000 and Max_Data=0xFFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_I2S_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData)
-{
-  LL_SPI_TransmitData16(SPIx, TxData);
-}
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup I2S_LL_EF_Init Initialization and de-initialization functions
-  * @{
-  */
-
-ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx);
-ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct);
-void        LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct);
-void        LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity);
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* SPI_I2S_SUPPORT */
-
-#endif /* defined (SPI1) || defined (SPI2) */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_SPI_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h
deleted file mode 100755
index f9a02052..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h
+++ /dev/null
@@ -1,1108 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_system.h
-  * @author  MCD Application Team
-  * @brief   Header file of SYSTEM LL module.
-  @verbatim
-  ==============================================================================
-                     ##### How to use this driver #####
-  ==============================================================================
-    [..]
-    The LL SYSTEM driver contains a set of generic APIs that can be
-    used by user:
-      (+) Some of the FLASH features need to be handled in the SYSTEM file.
-      (+) Access to DBGCMU registers
-      (+) Access to SYSCFG registers
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_SYSTEM_H
-#define __STM32L0xx_LL_SYSTEM_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (FLASH) || defined (SYSCFG) || defined (DBGMCU)
-
-/** @defgroup SYSTEM_LL SYSTEM
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup SYSTEM_LL_Private_Constants SYSTEM Private Constants
-  * @{
-  */
-
-/* Defines used for position in the register */
-#define DBGMCU_REVID_POSITION         (uint32_t)16U
-
-/**
- * @brief Power-down in Run mode Flash key
- */
-#define FLASH_PDKEY1                  ((uint32_t)0x04152637U) /*!< Flash power down key1 */
-#define FLASH_PDKEY2                  ((uint32_t)0xFAFBFCFDU) /*!< Flash power down key2: used with FLASH_PDKEY1 
-                                                                   to unlock the RUN_PD bit in FLASH_ACR */
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup SYSTEM_LL_Exported_Constants SYSTEM Exported Constants
-  * @{
-  */
-
-/** @defgroup SYSTEM_LL_EC_REMAP SYSCFG Memory Remap
-* @{
-*/
-#define LL_SYSCFG_REMAP_FLASH              (uint32_t)0x00000000U                                 /*!< Main Flash memory mapped at 0x00000000              */
-#define LL_SYSCFG_REMAP_SYSTEMFLASH        SYSCFG_CFGR1_MEM_MODE_0                               /*!< System Flash memory mapped at 0x00000000            */
-#define LL_SYSCFG_REMAP_SRAM               (SYSCFG_CFGR1_MEM_MODE_1 | SYSCFG_CFGR1_MEM_MODE_0)   /*!< SRAM mapped at 0x00000000                           */
-
-/**
-  * @}
-  */
-
-#if defined(SYSCFG_CFGR1_UFB)
-/** @defgroup SYSTEM_LL_EC_BANKMODE SYSCFG Bank Mode
-  * @{
-  */
-#define LL_SYSCFG_BANKMODE_BANK1           (uint32_t)0x00000000U     /*!< Flash Bank1 mapped at 0x08000000 (and aliased at 0x00000000),
-                                                                          Flash Bank2 mapped at 0x08018000 (and aliased at 0x00018000),
-                                                                          Data EEPROM Bank1 mapped at 0x08080000 (and aliased at 0x00080000),
-                                                                          Data EEPROM Bank2 mapped at 0x08080C00 (and aliased at 0x00080C00) */
-#define LL_SYSCFG_BANKMODE_BANK2           SYSCFG_CFGR1_UFB          /*!< Flash Bank2 mapped at 0x08000000 (and aliased at 0x00000000),
-                                                                          Flash Bank1 mapped at 0x08018000 (and aliased at 0x00018000),
-                                                                          Data EEPROM Bank2 mapped at 0x08080000 (and aliased at 0x00080000),
-                                                                          Data EEPROM Bank1 mapped at 0x08080C00 (and aliased at 0x00080C00) */
-/**
-  * @}
-  */
-
-#endif /* SYSCFG_CFGR1_UFB */
-
-/** @defgroup SYSTEM_LL_EC_BOOTMODE SYSCFG Boot Mode
-* @{
-*/
-#define LL_SYSCFG_BOOTMODE_FLASH           (uint32_t)0x00000000U                                 /*!< Main Flash memory boot mode              */
-#define LL_SYSCFG_BOOTMODE_SYSTEMFLASH     SYSCFG_CFGR1_BOOT_MODE_0                              /*!< System Flash memory boot mode            */
-#define LL_SYSCFG_BOOTMODE_SRAM            (SYSCFG_CFGR1_BOOT_MODE_1 | SYSCFG_CFGR1_BOOT_MODE_0) /*!< SRAM boot mode                           */
-
-/**
-  * @}
-  */
-
-#if defined(SYSCFG_CFGR2_CAPA)
-/** @defgroup SYSTEM_LL_EC_CFGR2 SYSCFG VLCD Rail Connection
-  * @{
-  */
-
-#define LL_SYSCFG_CAPA_VLCD2_PB2           SYSCFG_CFGR2_CAPA_0       /*!< Connect PB2  pin to LCD_VLCD2 rails supply voltage  */
-#define LL_SYSCFG_CAPA_VLCD1_PB12          SYSCFG_CFGR2_CAPA_1       /*!< Connect PB12 pin to LCD_VLCD1 rails supply voltage  */
-#define LL_SYSCFG_CAPA_VLCD3_PB0           SYSCFG_CFGR2_CAPA_2       /*!< Connect PB0  pin to LCD_VLCD3 rails supply voltage  */
-#if defined (SYSCFG_CFGR2_CAPA_3)
-#define LL_SYSCFG_CAPA_VLCD1_PE11          SYSCFG_CFGR2_CAPA_3       /*!< Connect PE11 pin to LCD_VLCD1 rails supply voltage  */
-#endif /* SYSCFG_CFGR2_CAPA_3 */
-#if defined (SYSCFG_CFGR2_CAPA_4)
-#define LL_SYSCFG_CAPA_VLCD3_PE12          SYSCFG_CFGR2_CAPA_4       /*!< Connect PE12 pin to LCD_VLCD3 rails supply voltage  */
-#endif /* SYSCFG_CFGR2_CAPA_4 */
-/**
-  * @}
-  */
-#endif /* SYSCFG_CFGR2_CAPA */
-
-/** @defgroup SYSTEM_LL_EC_I2C_FASTMODEPLUS SYSCFG I2C FASTMODEPLUS
-  * @{
-  */
-#define LL_SYSCFG_I2C_FASTMODEPLUS_PB6     SYSCFG_CFGR2_I2C_PB6_FMP  /*!< Enable Fast Mode Plus on PB6       */
-#define LL_SYSCFG_I2C_FASTMODEPLUS_PB7     SYSCFG_CFGR2_I2C_PB7_FMP  /*!< Enable Fast Mode Plus on PB7       */
-#define LL_SYSCFG_I2C_FASTMODEPLUS_PB8     SYSCFG_CFGR2_I2C_PB8_FMP  /*!< Enable Fast Mode Plus on PB8       */
-#define LL_SYSCFG_I2C_FASTMODEPLUS_PB9     SYSCFG_CFGR2_I2C_PB9_FMP  /*!< Enable Fast Mode Plus on PB9       */
-#define LL_SYSCFG_I2C_FASTMODEPLUS_I2C1    SYSCFG_CFGR2_I2C1_FMP     /*!< Enable Fast Mode Plus on I2C1 pins */
-#if defined(SYSCFG_CFGR2_I2C2_FMP)
-#define LL_SYSCFG_I2C_FASTMODEPLUS_I2C2    SYSCFG_CFGR2_I2C2_FMP     /*!< Enable Fast Mode Plus on I2C2 pins */
-#endif /* SYSCFG_CFGR2_I2C2_FMP */
-#if defined(SYSCFG_CFGR2_I2C3_FMP)
-#define LL_SYSCFG_I2C_FASTMODEPLUS_I2C3    SYSCFG_CFGR2_I2C3_FMP     /*!< Enable Fast Mode Plus on I2C3 pins */
-#endif /* SYSCFG_CFGR2_I2C3_FMP */
-/**
-  * @}
-  */
-
-/** @defgroup SYSTEM_LL_VREFINT_CONTROL SYSCFG VREFINT Control
-  * @{
-  */
-#define LL_SYSCFG_VREFINT_CONNECT_NONE        (uint32_t)0x00000000U             /*!< No pad connected to VREFINT_ADC */
-#define LL_SYSCFG_VREFINT_CONNECT_IO1         SYSCFG_CFGR3_VREF_OUT_0           /*!< PB0 connected to VREFINT_ADC */
-#define LL_SYSCFG_VREFINT_CONNECT_IO2         SYSCFG_CFGR3_VREF_OUT_1           /*!< PB1 connected to VREFINT_ADC */
-#define LL_SYSCFG_VREFINT_CONNECT_IO1_IO2     (SYSCFG_CFGR3_VREF_OUT_0 | SYSCFG_CFGR3_VREF_OUT_1)   /*!< PB0 and PB1 connected to VREFINT_ADC */
-/**
-  * @}
-  */
-
-/** @defgroup SYSTEM_LL_EC_EXTI_PORT SYSCFG EXTI Port
-  * @{
-  */
-#define LL_SYSCFG_EXTI_PORTA               (uint32_t)0U              /*!< EXTI PORT A */
-#define LL_SYSCFG_EXTI_PORTB               (uint32_t)1U              /*!< EXTI PORT B */
-#define LL_SYSCFG_EXTI_PORTC               (uint32_t)2U              /*!< EXTI PORT C */
-#if defined(GPIOD_BASE)
-#define LL_SYSCFG_EXTI_PORTD               (uint32_t)3U              /*!< EXTI PORT D */
-#endif /*GPIOD_BASE*/
-#if defined(GPIOE_BASE)
-#define LL_SYSCFG_EXTI_PORTE               (uint32_t)4U              /*!< EXTI PORT E */
-#endif /*GPIOE_BASE*/
-#if defined(GPIOH_BASE)
-#define LL_SYSCFG_EXTI_PORTH               (uint32_t)5U              /*!< EXTI PORT H */
-#endif /*GPIOH_BASE*/
-/**
-  * @}
-  */
-
-/** @defgroup SYSTEM_LL_EC_EXTI_LINE SYSCFG EXTI Line
-  * @{
-  */
-#define LL_SYSCFG_EXTI_LINE0               (uint32_t)(0U  << 16U | 0U)  /*!< EXTI_POSITION_0  | EXTICR[0] */
-#define LL_SYSCFG_EXTI_LINE1               (uint32_t)(4U  << 16U | 0U)  /*!< EXTI_POSITION_4  | EXTICR[0] */
-#define LL_SYSCFG_EXTI_LINE2               (uint32_t)(8U  << 16U | 0U)  /*!< EXTI_POSITION_8  | EXTICR[0] */
-#define LL_SYSCFG_EXTI_LINE3               (uint32_t)(12U << 16U | 0U)  /*!< EXTI_POSITION_12 | EXTICR[0] */
-#define LL_SYSCFG_EXTI_LINE4               (uint32_t)(0U  << 16U | 1U)  /*!< EXTI_POSITION_0  | EXTICR[1] */
-#define LL_SYSCFG_EXTI_LINE5               (uint32_t)(4U  << 16U | 1U)  /*!< EXTI_POSITION_4  | EXTICR[1] */
-#define LL_SYSCFG_EXTI_LINE6               (uint32_t)(8U  << 16U | 1U)  /*!< EXTI_POSITION_8  | EXTICR[1] */
-#define LL_SYSCFG_EXTI_LINE7               (uint32_t)(12U << 16U | 1U)  /*!< EXTI_POSITION_12 | EXTICR[1] */
-#define LL_SYSCFG_EXTI_LINE8               (uint32_t)(0U  << 16U | 2U)  /*!< EXTI_POSITION_0  | EXTICR[2] */
-#define LL_SYSCFG_EXTI_LINE9               (uint32_t)(4U  << 16U | 2U)  /*!< EXTI_POSITION_4  | EXTICR[2] */
-#define LL_SYSCFG_EXTI_LINE10              (uint32_t)(8U  << 16U | 2U)  /*!< EXTI_POSITION_8  | EXTICR[2] */
-#define LL_SYSCFG_EXTI_LINE11              (uint32_t)(12U << 16U | 2U)  /*!< EXTI_POSITION_12 | EXTICR[2] */
-#define LL_SYSCFG_EXTI_LINE12              (uint32_t)(0U  << 16U | 3U)  /*!< EXTI_POSITION_0  | EXTICR[3] */
-#define LL_SYSCFG_EXTI_LINE13              (uint32_t)(4U  << 16U | 3U)  /*!< EXTI_POSITION_4  | EXTICR[3] */
-#define LL_SYSCFG_EXTI_LINE14              (uint32_t)(8U  << 16U | 3U)  /*!< EXTI_POSITION_8  | EXTICR[3] */
-#define LL_SYSCFG_EXTI_LINE15              (uint32_t)(12U << 16U | 3U)  /*!< EXTI_POSITION_12 | EXTICR[3] */
-/**
-  * @}
-  */
-
-
-
-/** @defgroup SYSTEM_LL_EC_APB1_GRP1_STOP_IP DBGMCU APB1 GRP1 STOP IP
-  * @{
-  */
-#define LL_DBGMCU_APB1_GRP1_TIM2_STOP      DBGMCU_APB1_FZ_DBG_TIM2_STOP    /*!< TIM2 counter stopped when core is halted */
-#if defined(TIM3)
-#define LL_DBGMCU_APB1_GRP1_TIM3_STOP      DBGMCU_APB1_FZ_DBG_TIM3_STOP    /*!< TIM3 counter stopped when core is halted */
-#endif /*TIM3*/
-#if defined(TIM6)
-#define LL_DBGMCU_APB1_GRP1_TIM6_STOP      DBGMCU_APB1_FZ_DBG_TIM6_STOP    /*!< TIM6 counter stopped when core is halted */
-#endif /*TIM6*/
-#if defined(TIM7)
-#define LL_DBGMCU_APB1_GRP1_TIM7_STOP      DBGMCU_APB1_FZ_DBG_TIM7_STOP    /*!< TIM7 counter stopped when core is halted */
-#endif /*TIM7*/
-#define LL_DBGMCU_APB1_GRP1_RTC_STOP       DBGMCU_APB1_FZ_DBG_RTC_STOP     /*!< RTC Calendar frozen when core is halted */
-#define LL_DBGMCU_APB1_GRP1_WWDG_STOP      DBGMCU_APB1_FZ_DBG_WWDG_STOP    /*!< Debug Window Watchdog stopped when Core is halted */
-#define LL_DBGMCU_APB1_GRP1_IWDG_STOP      DBGMCU_APB1_FZ_DBG_IWDG_STOP    /*!< Debug Independent Watchdog stopped when Core is halted */
-#define LL_DBGMCU_APB1_GRP1_I2C1_STOP      DBGMCU_APB1_FZ_DBG_I2C1_STOP    /*!< I2C1 SMBUS timeout mode stopped when Core is halted */
-#if defined(I2C2)
-#define LL_DBGMCU_APB1_GRP1_I2C2_STOP      DBGMCU_APB1_FZ_DBG_I2C2_STOP    /*!< I2C2 SMBUS timeout mode stopped when Core is halted */
-#endif /*I2C2*/
-#if defined(I2C3)
-#define LL_DBGMCU_APB1_GRP1_I2C3_STOP      DBGMCU_APB1_FZ_DBG_I2C3_STOP    /*!< I2C3 SMBUS timeout mode stopped when Core is halted */
-#endif /*I2C3*/
-#define LL_DBGMCU_APB1_GRP1_LPTIM1_STOP    DBGMCU_APB1_FZ_DBG_LPTIMER_STOP /*!< LPTIM1 counter stopped when core is halted */
-/**
-  * @}
-  */
-
-/** @defgroup SYSTEM_LL_EC_APB2_GRP1_STOP_IP DBGMCU APB2 GRP1 STOP IP
-  * @{
-  */
-#if defined(TIM22)
-#define LL_DBGMCU_APB2_GRP1_TIM22_STOP     DBGMCU_APB2_FZ_DBG_TIM22_STOP /*!< TIM22 counter stopped when core is halted */
-#endif /*TIM22*/
-#define LL_DBGMCU_APB2_GRP1_TIM21_STOP     DBGMCU_APB2_FZ_DBG_TIM21_STOP /*!< TIM21 counter stopped when core is halted */
-/**
-  * @}
-  */
-
-/** @defgroup SYSTEM_LL_EC_LATENCY FLASH LATENCY
-  * @{
-  */
-#define LL_FLASH_LATENCY_0                 ((uint32_t)0x00000000U) /*!< FLASH Zero Latency cycle */
-#define LL_FLASH_LATENCY_1                 FLASH_ACR_LATENCY       /*!< FLASH One Latency cycle */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup SYSTEM_LL_Exported_Functions SYSTEM Exported Functions
-  * @{
-  */
-
-/** @defgroup SYSTEM_LL_EF_SYSCFG SYSCFG
-  * @{
-  */
-
-/**
-  * @brief  Set memory mapping at address 0x00000000
-  * @rmtoll SYSCFG_CFGR1 MEM_MODE      LL_SYSCFG_SetRemapMemory
-  * @param  Memory This parameter can be one of the following values:
-  *         @arg @ref LL_SYSCFG_REMAP_FLASH
-  *         @arg @ref LL_SYSCFG_REMAP_SYSTEMFLASH
-  *         @arg @ref LL_SYSCFG_REMAP_SRAM
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_SetRemapMemory(uint32_t Memory)
-{
-  MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, Memory);
-}
-
-/**
-  * @brief  Get memory mapping at address 0x00000000
-  * @rmtoll SYSCFG_CFGR1 MEM_MODE      LL_SYSCFG_GetRemapMemory
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_SYSCFG_REMAP_FLASH
-  *         @arg @ref LL_SYSCFG_REMAP_SYSTEMFLASH
-  *         @arg @ref LL_SYSCFG_REMAP_SRAM
-  */
-__STATIC_INLINE uint32_t LL_SYSCFG_GetRemapMemory(void)
-{
-  return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE));
-}
-
-#if defined(SYSCFG_CFGR1_UFB)
-/**
-  * @brief  Select Flash bank mode (Bank flashed at 0x08000000)
-  * @rmtoll SYSCFG_CFGR1 UFB           LL_SYSCFG_SetFlashBankMode
-  * @param  Bank This parameter can be one of the following values:
-  *         @arg @ref LL_SYSCFG_BANKMODE_BANK1
-  *         @arg @ref LL_SYSCFG_BANKMODE_BANK2
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_SetFlashBankMode(uint32_t Bank)
-{
-  MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_UFB, Bank);
-}
-
-/**
-  * @brief  Get Flash bank mode (Bank flashed at 0x08000000)
-  * @rmtoll SYSCFG_CFGR1 UFB           LL_SYSCFG_GetFlashBankMode
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_SYSCFG_BANKMODE_BANK1
-  *         @arg @ref LL_SYSCFG_BANKMODE_BANK2
-  */
-__STATIC_INLINE uint32_t LL_SYSCFG_GetFlashBankMode(void)
-{
-  return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_UFB));
-}
-#endif /* SYSCFG_CFGR1_UFB */
-
-/**
-  * @brief  Get Boot mode selected by the boot pins status bits
-  * @note   It indicates the boot mode selected by the boot pins. Bit 9
-  *         corresponds to the complement of nBOOT1 bit in the FLASH_OPTR register.
-  *         Its value is defined in the option bytes. Bit 8 corresponds to the
-  *         value sampled on the BOOT0 pin.
-  * @rmtoll SYSCFG_CFGR1 BOOT_MODE      LL_SYSCFG_GetBootMode
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_SYSCFG_BOOTMODE_FLASH
-  *         @arg @ref LL_SYSCFG_BOOTMODE_SYSTEMFLASH
-  *         @arg @ref LL_SYSCFG_BOOTMODE_SRAM
-  */
-__STATIC_INLINE uint32_t LL_SYSCFG_GetBootMode(void)
-{
-  return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOT_MODE));
-}
-
-/**
-  * @brief  Firewall protection enabled
-  * @rmtoll SYSCFG_CFGR2 FWDIS         LL_SYSCFG_EnableFirewall
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_EnableFirewall(void)
-{
-  CLEAR_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_FWDISEN);
-}
-
-/**
-  * @brief  Check if Firewall protection is enabled or not
-  * @rmtoll SYSCFG_CFGR2 FWDIS         LL_SYSCFG_IsEnabledFirewall
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledFirewall(void)
-{
-  return !(READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_FWDISEN) == SYSCFG_CFGR2_FWDISEN);
-}
-
-#if defined(SYSCFG_CFGR2_CAPA)
-/**
-  * @brief  Set VLCD rail connection to optional external capacitor
-  * @note   One to three external capacitors can be connected to pads to do
-  *         VLCD biasing.
-  *         - LCD_VLCD1 rail can be connected to PB12 or PE11(*),
-  *         - LCD_VLCD2 rail can be connected to PB2,
-  *         - LCD_VLCD3 rail can be connected to PB0 or PE12(*)
-  * @rmtoll SYSCFG_CFGR2 CAPA      LL_SYSCFG_SetVLCDRailConnection
-  * @param  IoPinConnect This parameter can be a combination of the following values:
-  *         @arg @ref LL_SYSCFG_CAPA_VLCD1_PB12
-  *         @arg @ref LL_SYSCFG_CAPA_VLCD1_PE11(*)
-  *         @arg @ref LL_SYSCFG_CAPA_VLCD2_PB2
-  *         @arg @ref LL_SYSCFG_CAPA_VLCD3_PB0
-  *         @arg @ref LL_SYSCFG_CAPA_VLCD3_PE12(*)
-  *
-  *         (*) value not defined in all devices
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_SetVLCDRailConnection(uint32_t IoPinConnect)
-{
-  MODIFY_REG(SYSCFG->CFGR2, SYSCFG_CFGR2_CAPA, IoPinConnect);
-}
-
-
-/**
-  * @brief  Get VLCD rail connection configuration
-  * @note   One to three external capacitors can be connected to pads to do
-  *         VLCD biasing.
-  *         - LCD_VLCD1 rail can be connected to PB12 or PE11(*),
-  *         - LCD_VLCD2 rail can be connected to PB2,
-  *         - LCD_VLCD3 rail can be connected to PB0 or PE12(*)
-  * @rmtoll SYSCFG_CFGR2 CAPA      LL_SYSCFG_GetVLCDRailConnection
-  * @retval Returned value can be a combination of the following values:
-  *         @arg @ref LL_SYSCFG_CAPA_VLCD1_PB12
-  *         @arg @ref LL_SYSCFG_CAPA_VLCD1_PE11(*)
-  *         @arg @ref LL_SYSCFG_CAPA_VLCD2_PB2
-  *         @arg @ref LL_SYSCFG_CAPA_VLCD3_PB0
-  *         @arg @ref LL_SYSCFG_CAPA_VLCD3_PE12(*)
-  *
-  *         (*) value not defined in all devices
-  */
-__STATIC_INLINE uint32_t LL_SYSCFG_GetVLCDRailConnection(void)
-{
-  return (uint32_t)(READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_CAPA));
-}
-#endif
-
-/**
-  * @brief  Enable the I2C fast mode plus driving capability.
-  * @rmtoll SYSCFG_CFGR2 I2C_PBx_FMP   LL_SYSCFG_EnableFastModePlus\n
-  *         SYSCFG_CFGR2 I2Cx_FMP      LL_SYSCFG_EnableFastModePlus
-  * @param  ConfigFastModePlus This parameter can be a combination of the following values:
-  *         @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB6
-  *         @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB7
-  *         @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB8
-  *         @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB9
-  *         @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C1
-  *         @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 (*)
-  *         @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C3 (*)
-  *
-  *         (*) value not defined in all devices
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_EnableFastModePlus(uint32_t ConfigFastModePlus)
-{
-  SET_BIT(SYSCFG->CFGR2, ConfigFastModePlus);
-}
-
-/**
-  * @brief  Disable the I2C fast mode plus driving capability.
-  * @rmtoll SYSCFG_CFGR2 I2C_PBx_FMP   LL_SYSCFG_DisableFastModePlus\n
-  *         SYSCFG_CFGR2 I2Cx_FMP      LL_SYSCFG_DisableFastModePlus
-  * @param  ConfigFastModePlus This parameter can be a combination of the following values:
-  *         @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB6
-  *         @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB7
-  *         @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB8
-  *         @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB9
-  *         @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C1
-  *         @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 (*)
-  *         @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C3 (*)
-  *
-  *         (*) value not defined in all devices
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_DisableFastModePlus(uint32_t ConfigFastModePlus)
-{
-  CLEAR_BIT(SYSCFG->CFGR2, ConfigFastModePlus);
-}
-
-/**
-  * @brief  Select which pad is connected to VREFINT_ADC
-  * @rmtoll SYSCFG_CFGR3 SEL_VREF_OUT  LL_SYSCFG_VREFINT_SetConnection
-  * @param  IoPinConnect This parameter can be one of the following values:
-  *         @arg @ref LL_SYSCFG_VREFINT_CONNECT_NONE
-  *         @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO1
-  *         @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO2
-  *         @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO1_IO2
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_VREFINT_SetConnection(uint32_t IoPinConnect)
-{
-  MODIFY_REG(SYSCFG->CFGR3, SYSCFG_CFGR3_VREF_OUT, IoPinConnect);
-}
-
-/**
-  * @brief  Get pad connection to VREFINT_ADC
-  * @rmtoll SYSCFG_CFGR3 SEL_VREF_OUT  LL_SYSCFG_VREFINT_GetConnection
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_SYSCFG_VREFINT_CONNECT_NONE
-  *         @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO1
-  *         @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO2
-  *         @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO1_IO2
-  */
-__STATIC_INLINE uint32_t LL_SYSCFG_VREFINT_GetConnection(void)
-{
-  return (uint32_t)(READ_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_VREF_OUT));
-}
-
-/**
-  * @brief  Buffer used to generate VREFINT reference for ADC enable
-  * @note   The VrefInit buffer to ADC through internal path is also
-  *         enabled using function LL_ADC_SetCommonPathInternalCh()
-  *         with parameter LL_ADC_PATH_INTERNAL_VREFINT
-  * @rmtoll SYSCFG_CFGR3 ENBUF_VREFINT_ADC   LL_SYSCFG_VREFINT_EnableADC
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_VREFINT_EnableADC(void)
-{
-  SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_VREFINT_ADC);
-}
-
-/**
-  * @brief  Buffer used to generate VREFINT reference for ADC disable
-  * @rmtoll SYSCFG_CFGR3 ENBUF_VREFINT_ADC   LL_SYSCFG_VREFINT_DisableADC
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_VREFINT_DisableADC(void)
-{
-  CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_VREFINT_ADC);
-}
-
-/**
-  * @brief  Buffer used to generate temperature sensor reference for ADC enable
-  * @rmtoll SYSCFG_CFGR3 ENBUF_SENSOR_ADC    LL_SYSCFG_TEMPSENSOR_Enable
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_TEMPSENSOR_Enable(void)
-{
-  SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_SENSOR_ADC);
-}
-
-/**
-  * @brief  Buffer used to generate temperature sensor reference for ADC disable
-  * @rmtoll SYSCFG_CFGR3 ENBUF_SENSOR_ADC    LL_SYSCFG_TEMPSENSOR_Disable
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_TEMPSENSOR_Disable(void)
-{
-  CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_SENSOR_ADC);
-}
-
-/**
-  * @brief  Buffer used to generate VREFINT reference for comparator enable
-  * @rmtoll SYSCFG_CFGR3 ENBUF_VREFINT_COMP  LL_SYSCFG_VREFINT_EnableCOMP
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_VREFINT_EnableCOMP(void)
-{
-  SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP);
-}
-
-/**
-  * @brief  Buffer used to generate VREFINT reference for comparator disable
-  * @rmtoll SYSCFG_CFGR3 ENBUF_VREFINT_COMP  LL_SYSCFG_VREFINT_DisableCOMP
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_VREFINT_DisableCOMP(void)
-{
-  CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP);
-}
-
-#if defined (RCC_HSI48_SUPPORT)
-/**
-  * @brief  Buffer used to generate VREFINT reference for HSI48 oscillator enable
-  * @rmtoll SYSCFG_CFGR3 ENREF_HSI48         LL_SYSCFG_VREFINT_EnableHSI48
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_VREFINT_EnableHSI48(void)
-{
-  SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENREF_HSI48);
-}
-
-/**
-  * @brief  Buffer used to generate VREFINT reference for HSI48 oscillator disable
-  * @rmtoll SYSCFG_CFGR3 ENREF_HSI48         LL_SYSCFG_VREFINT_DisableHSI48
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_VREFINT_DisableHSI48(void)
-{
-  CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENREF_HSI48);
-}
-#endif
-
-/**
-  * @brief  Check if VREFINT is ready or not
-  * @note   When set, it indicates that VREFINT is available for BOR, PVD and LCD
-  * @rmtoll SYSCFG_CFGR3 VREFINT_RDYF        LL_SYSCFG_VREFINT_IsReady
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SYSCFG_VREFINT_IsReady(void)
-{
-  return (READ_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_VREFINT_RDYF) == SYSCFG_CFGR3_VREFINT_RDYF);
-}
-
-/**
-  * @brief  Lock the whole content of SYSCFG_CFGR3 register
-  * @note   After SYSCFG_CFGR3 register lock, only read access available.
-  *         Only system hardware reset unlocks SYSCFG_CFGR3 register.
-  * @rmtoll SYSCFG_CFGR3 REF_LOCK            LL_SYSCFG_VREFINT_Lock
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_VREFINT_Lock(void)
-{
-  SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_REF_LOCK);
-}
-
-/**
-  * @brief  Check if SYSCFG_CFGR3 register is locked (only read access) or not
-  * @note   When set, it indicates that SYSCFG_CFGR3 register is locked, only read access available
-  * @rmtoll SYSCFG_CFGR3 REF_LOCK              LL_SYSCFG_VREFINT_IsLocked
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_SYSCFG_VREFINT_IsLocked(void)
-{
-  return (READ_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_REF_LOCK) == SYSCFG_CFGR3_REF_LOCK);
-}
-
-/**
-  * @brief  Configure source input for the EXTI external interrupt.
-  * @rmtoll SYSCFG_EXTICR1 EXTI0         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR1 EXTI1         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR1 EXTI2         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR1 EXTI3         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR2 EXTI4         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR2 EXTI5         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR2 EXTI6         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR2 EXTI7         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR3 EXTI8         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR3 EXTI9         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR3 EXTI10        LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR3 EXTI11        LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR4 EXTI12        LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR4 EXTI13        LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR4 EXTI14        LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR4 EXTI15        LL_SYSCFG_SetEXTISource
-  * @param  Port This parameter can be one of the following values:
-  *         @arg @ref LL_SYSCFG_EXTI_PORTA
-  *         @arg @ref LL_SYSCFG_EXTI_PORTB
-  *         @arg @ref LL_SYSCFG_EXTI_PORTC
-  *         @arg @ref LL_SYSCFG_EXTI_PORTD (*)
-  *         @arg @ref LL_SYSCFG_EXTI_PORTE (*)
-  *         @arg @ref LL_SYSCFG_EXTI_PORTH (*)
-  *
-  *         (*) value not defined in all devices
-  * @param  Line This parameter can be one of the following values:
-  *         @arg @ref LL_SYSCFG_EXTI_LINE0
-  *         @arg @ref LL_SYSCFG_EXTI_LINE1
-  *         @arg @ref LL_SYSCFG_EXTI_LINE2
-  *         @arg @ref LL_SYSCFG_EXTI_LINE3
-  *         @arg @ref LL_SYSCFG_EXTI_LINE4
-  *         @arg @ref LL_SYSCFG_EXTI_LINE5
-  *         @arg @ref LL_SYSCFG_EXTI_LINE6
-  *         @arg @ref LL_SYSCFG_EXTI_LINE7
-  *         @arg @ref LL_SYSCFG_EXTI_LINE8
-  *         @arg @ref LL_SYSCFG_EXTI_LINE9
-  *         @arg @ref LL_SYSCFG_EXTI_LINE10
-  *         @arg @ref LL_SYSCFG_EXTI_LINE11
-  *         @arg @ref LL_SYSCFG_EXTI_LINE12
-  *         @arg @ref LL_SYSCFG_EXTI_LINE13
-  *         @arg @ref LL_SYSCFG_EXTI_LINE14
-  *         @arg @ref LL_SYSCFG_EXTI_LINE15
-  * @retval None
-  */
-__STATIC_INLINE void LL_SYSCFG_SetEXTISource(uint32_t Port, uint32_t Line)
-{
-  MODIFY_REG(SYSCFG->EXTICR[Line & 0xFFU], SYSCFG_EXTICR1_EXTI0 << (Line >> 16U), Port << (Line >> 16U));
-}
-
-/**
-  * @brief  Get the configured defined for specific EXTI Line
-  * @rmtoll SYSCFG_EXTICR1 EXTI0         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR1 EXTI1         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR1 EXTI2         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR1 EXTI3         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR2 EXTI4         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR2 EXTI5         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR2 EXTI6         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR2 EXTI7         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR3 EXTI8         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR3 EXTI9         LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR3 EXTI10        LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR3 EXTI11        LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR4 EXTI12        LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR4 EXTI13        LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR4 EXTI14        LL_SYSCFG_SetEXTISource\n
-  *         SYSCFG_EXTICR4 EXTI15        LL_SYSCFG_SetEXTISource
-  * @param  Line This parameter can be one of the following values:
-  *         @arg @ref LL_SYSCFG_EXTI_LINE0
-  *         @arg @ref LL_SYSCFG_EXTI_LINE1
-  *         @arg @ref LL_SYSCFG_EXTI_LINE2
-  *         @arg @ref LL_SYSCFG_EXTI_LINE3
-  *         @arg @ref LL_SYSCFG_EXTI_LINE4
-  *         @arg @ref LL_SYSCFG_EXTI_LINE5
-  *         @arg @ref LL_SYSCFG_EXTI_LINE6
-  *         @arg @ref LL_SYSCFG_EXTI_LINE7
-  *         @arg @ref LL_SYSCFG_EXTI_LINE8
-  *         @arg @ref LL_SYSCFG_EXTI_LINE9
-  *         @arg @ref LL_SYSCFG_EXTI_LINE10
-  *         @arg @ref LL_SYSCFG_EXTI_LINE11
-  *         @arg @ref LL_SYSCFG_EXTI_LINE12
-  *         @arg @ref LL_SYSCFG_EXTI_LINE13
-  *         @arg @ref LL_SYSCFG_EXTI_LINE14
-  *         @arg @ref LL_SYSCFG_EXTI_LINE15
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_SYSCFG_EXTI_PORTA
-  *         @arg @ref LL_SYSCFG_EXTI_PORTB
-  *         @arg @ref LL_SYSCFG_EXTI_PORTC
-  *         @arg @ref LL_SYSCFG_EXTI_PORTD (*)
-  *         @arg @ref LL_SYSCFG_EXTI_PORTE (*)
-  *         @arg @ref LL_SYSCFG_EXTI_PORTH (*)
-  *
-  *         (*) value not defined in all devices
-  */
-__STATIC_INLINE uint32_t LL_SYSCFG_GetEXTISource(uint32_t Line)
-{
-  return (uint32_t)(READ_BIT(SYSCFG->EXTICR[Line & 0xFFU], (SYSCFG_EXTICR1_EXTI0 << (Line >> 16U))) >> (Line >> 16U));
-}
-
-
-/**
-  * @}
-  */
-
-
-/** @defgroup SYSTEM_LL_EF_DBGMCU DBGMCU
-  * @{
-  */
-
-/**
-  * @brief  Return the device identifier
-  * @rmtoll DBGMCU_IDCODE DEV_ID        LL_DBGMCU_GetDeviceID
-  * @retval Values between Min_Data=0x00 and Max_Data=0x7FF (ex: L053 -> 0x417, L073 -> 0x447)
-  */
-__STATIC_INLINE uint32_t LL_DBGMCU_GetDeviceID(void)
-{
-  return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_DEV_ID));
-}
-
-/**
-  * @brief  Return the device revision identifier
-  * @note This field indicates the revision of the device.
-  * @rmtoll DBGMCU_IDCODE REV_ID        LL_DBGMCU_GetRevisionID
-  * @retval Values between Min_Data=0x00 and Max_Data=0xFFFF
-  */
-__STATIC_INLINE uint32_t LL_DBGMCU_GetRevisionID(void)
-{
-  return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_REV_ID) >> DBGMCU_REVID_POSITION);
-}
-
-/**
-  * @brief  Enable the Debug Module during SLEEP mode
-  * @rmtoll DBGMCU_CR    DBG_SLEEP     LL_DBGMCU_EnableDBGSleepMode
-  * @retval None
-  */
-__STATIC_INLINE void LL_DBGMCU_EnableDBGSleepMode(void)
-{
-  SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
-}
-
-/**
-  * @brief  Disable the Debug Module during SLEEP mode
-  * @rmtoll DBGMCU_CR    DBG_SLEEP     LL_DBGMCU_DisableDBGSleepMode
-  * @retval None
-  */
-__STATIC_INLINE void LL_DBGMCU_DisableDBGSleepMode(void)
-{
-  CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
-}
-
-/**
-  * @brief  Enable the Debug Module during STOP mode
-  * @rmtoll DBGMCU_CR    DBG_STOP      LL_DBGMCU_EnableDBGStopMode
-  * @retval None
-  */
-__STATIC_INLINE void LL_DBGMCU_EnableDBGStopMode(void)
-{
-  SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
-}
-
-/**
-  * @brief  Disable the Debug Module during STOP mode
-  * @rmtoll DBGMCU_CR    DBG_STOP      LL_DBGMCU_DisableDBGStopMode
-  * @retval None
-  */
-__STATIC_INLINE void LL_DBGMCU_DisableDBGStopMode(void)
-{
-  CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
-}
-
-/**
-  * @brief  Enable the Debug Module during STANDBY mode
-  * @rmtoll DBGMCU_CR    DBG_STANDBY   LL_DBGMCU_EnableDBGStandbyMode
-  * @retval None
-  */
-__STATIC_INLINE void LL_DBGMCU_EnableDBGStandbyMode(void)
-{
-  SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
-}
-
-/**
-  * @brief  Disable the Debug Module during STANDBY mode
-  * @rmtoll DBGMCU_CR    DBG_STANDBY   LL_DBGMCU_DisableDBGStandbyMode
-  * @retval None
-  */
-__STATIC_INLINE void LL_DBGMCU_DisableDBGStandbyMode(void)
-{
-  CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
-}
-
-/**
-  * @brief  Freeze APB1 peripherals (group1 peripherals)
-  * @rmtoll APB1FZ      DBG_TIM2_STOP     LL_DBGMCU_APB1_GRP1_FreezePeriph\n
-  *         APB1FZ      DBG_TIM3_STOP     LL_DBGMCU_APB1_GRP1_FreezePeriph\n
-  *         APB1FZ      DBG_TIM6_STOP     LL_DBGMCU_APB1_GRP1_FreezePeriph\n
-  *         APB1FZ      DBG_TIM7_STOP     LL_DBGMCU_APB1_GRP1_FreezePeriph\n
-  *         APB1FZ      DBG_RTC_STOP      LL_DBGMCU_APB1_GRP1_FreezePeriph\n
-  *         APB1FZ      DBG_WWDG_STOP     LL_DBGMCU_APB1_GRP1_FreezePeriph\n
-  *         APB1FZ      DBG_IWDG_STOP     LL_DBGMCU_APB1_GRP1_FreezePeriph\n
-  *         APB1FZ      DBG_I2C1_STOP     LL_DBGMCU_APB1_GRP1_FreezePeriph\n
-  *         APB1FZ      DBG_I2C2_STOP     LL_DBGMCU_APB1_GRP1_FreezePeriph\n
-  *         APB1FZ      DBG_I2C3_STOP     LL_DBGMCU_APB1_GRP1_FreezePeriph\n
-  *         APB1FZ      DBG_LPTIMER_STOP  LL_DBGMCU_APB1_GRP1_FreezePeriph
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP (*)
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP (*)
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP (*)
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP (*)
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_I2C3_STOP (*)
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_LPTIM1_STOP
-  *
-  *         (*) value not defined in all devices
-  * @retval None
-  */
-__STATIC_INLINE void LL_DBGMCU_APB1_GRP1_FreezePeriph(uint32_t Periphs)
-{
-  SET_BIT(DBGMCU->APB1FZ, Periphs);
-}
-
-/**
-  * @brief  Unfreeze APB1 peripherals (group1 peripherals)
-  * @rmtoll APB1FZ      DBG_TIM2_STOP     LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
-  *         APB1FZ      DBG_TIM3_STOP     LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
-  *         APB1FZ      DBG_TIM6_STOP     LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
-  *         APB1FZ      DBG_TIM7_STOP     LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
-  *         APB1FZ      DBG_RTC_STOP      LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
-  *         APB1FZ      DBG_WWDG_STOP     LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
-  *         APB1FZ      DBG_IWDG_STOP     LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
-  *         APB1FZ      DBG_I2C1_STOP     LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
-  *         APB1FZ      DBG_I2C2_STOP     LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
-  *         APB1FZ      DBG_I2C3_STOP     LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
-  *         APB1FZ      DBG_LPTIMER_STOP  LL_DBGMCU_APB1_GRP1_UnFreezePeriph
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP (*)
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP (*)
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP (*)
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP (*)
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_I2C3_STOP (*)
-  *         @arg @ref LL_DBGMCU_APB1_GRP1_LPTIM1_STOP
-  *
-  *         (*) value not defined in all devices
-  * @retval None
-  */
-__STATIC_INLINE void LL_DBGMCU_APB1_GRP1_UnFreezePeriph(uint32_t Periphs)
-{
-  CLEAR_BIT(DBGMCU->APB1FZ, Periphs);
-}
-
-/**
-  * @brief  Freeze APB2 peripherals
-  * @rmtoll APB2FZ      DBG_TIM22_STOP  LL_DBGMCU_APB2_GRP1_FreezePeriph\n
-  *         APB2FZ      DBG_TIM21_STOP  LL_DBGMCU_APB2_GRP1_FreezePeriph
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM22_STOP (*)
-  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM21_STOP
-  *
-  *         (*) value not defined in all devices
-  * @retval None
-  */
-__STATIC_INLINE void LL_DBGMCU_APB2_GRP1_FreezePeriph(uint32_t Periphs)
-{
-  SET_BIT(DBGMCU->APB2FZ, Periphs);
-}
-
-/**
-  * @brief  Unfreeze APB2 peripherals
-  * @rmtoll APB2FZ      DBG_TIM22_STOP  LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n
-  *         APB2FZ      DBG_TIM21_STOP  LL_DBGMCU_APB2_GRP1_UnFreezePeriph
-  * @param  Periphs This parameter can be a combination of the following values:
-  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM22_STOP (*)
-  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM21_STOP
-  *
-  *         (*) value not defined in all devices
-  * @retval None
-  */
-__STATIC_INLINE void LL_DBGMCU_APB2_GRP1_UnFreezePeriph(uint32_t Periphs)
-{
-  CLEAR_BIT(DBGMCU->APB2FZ, Periphs);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SYSTEM_LL_EF_FLASH FLASH
-  * @{
-  */
-
-/**
-  * @brief  Set FLASH Latency
-  * @rmtoll FLASH_ACR    LATENCY       LL_FLASH_SetLatency
-  * @param  Latency This parameter can be one of the following values:
-  *         @arg @ref LL_FLASH_LATENCY_0
-  *         @arg @ref LL_FLASH_LATENCY_1
-  * @retval None
-  */
-__STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency)
-{
-  MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, Latency);
-}
-
-/**
-  * @brief  Get FLASH Latency
-  * @rmtoll FLASH_ACR    LATENCY       LL_FLASH_GetLatency
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_FLASH_LATENCY_0
-  *         @arg @ref LL_FLASH_LATENCY_1
-  */
-__STATIC_INLINE uint32_t LL_FLASH_GetLatency(void)
-{
-  return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY));
-}
-
-/**
-  * @brief  Enable Prefetch
-  * @rmtoll FLASH_ACR    PRFTEN        LL_FLASH_EnablePrefetch
-  * @retval None
-  */
-__STATIC_INLINE void LL_FLASH_EnablePrefetch(void)
-{
-  SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN);
-}
-
-/**
-  * @brief  Disable Prefetch
-  * @rmtoll FLASH_ACR    PRFTEN        LL_FLASH_DisablePrefetch
-  * @retval None
-  */
-__STATIC_INLINE void LL_FLASH_DisablePrefetch(void)
-{
-  CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTEN);
-}
-
-/**
-  * @brief  Check if Prefetch buffer is enabled
-  * @rmtoll FLASH_ACR    PRFTEN        LL_FLASH_IsPrefetchEnabled
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_FLASH_IsPrefetchEnabled(void)
-{
-  return (READ_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) == (FLASH_ACR_PRFTEN));
-}
-
-
-/**
-  * @brief  Enable Flash Power-down mode during run mode or Low-power run mode
-  * @note Flash memory can be put in power-down mode only when the code is executed
-  *       from RAM
-  * @note Flash must not be accessed when power down is enabled
-  * @note Flash must not be put in power-down while a program or an erase operation
-  *       is on-going
-  * @rmtoll FLASH_ACR    RUN_PD        LL_FLASH_EnableRunPowerDown\n
-  *         FLASH_PDKEYR PDKEY1        LL_FLASH_EnableRunPowerDown\n
-  *         FLASH_PDKEYR PDKEY2        LL_FLASH_EnableRunPowerDown
-  * @retval None
-  */
-__STATIC_INLINE void LL_FLASH_EnableRunPowerDown(void)
-{
-  /* Following values must be written consecutively to unlock the RUN_PD bit in
-     FLASH_ACR */
-  WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1);
-  WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2);
-  SET_BIT(FLASH->ACR, FLASH_ACR_RUN_PD);
-}
-
-/**
-  * @brief  Disable Flash Power-down mode during run mode or Low-power run mode
-  * @rmtoll FLASH_ACR    RUN_PD        LL_FLASH_DisableRunPowerDown\n
-  *         FLASH_PDKEYR PDKEY1        LL_FLASH_DisableRunPowerDown\n
-  *         FLASH_PDKEYR PDKEY2        LL_FLASH_DisableRunPowerDown
-  * @retval None
-  */
-__STATIC_INLINE void LL_FLASH_DisableRunPowerDown(void)
-{
-  /* Following values must be written consecutively to unlock the RUN_PD bit in
-     FLASH_ACR */
-  WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1);
-  WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2);
-  CLEAR_BIT(FLASH->ACR, FLASH_ACR_RUN_PD);
-}
-
-/**
-  * @brief  Enable Flash Power-down mode during Sleep or Low-power sleep mode
-  * @note Flash must not be put in power-down while a program or an erase operation
-  *       is on-going
-  * @rmtoll FLASH_ACR    SLEEP_PD      LL_FLASH_EnableSleepPowerDown
-  * @retval None
-  */
-__STATIC_INLINE void LL_FLASH_EnableSleepPowerDown(void)
-{
-  SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD);
-}
-
-/**
-  * @brief  Disable Flash Power-down mode during Sleep or Low-power sleep mode
-  * @rmtoll FLASH_ACR    SLEEP_PD      LL_FLASH_DisableSleepPowerDown
-  * @retval None
-  */
-__STATIC_INLINE void LL_FLASH_DisableSleepPowerDown(void)
-{
-  CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD);
-}
-
-/**
-  * @brief  Enable buffers used as a cache during read access
-  * @rmtoll FLASH_ACR    DISAB_BUF     LL_FLASH_EnableBuffers
-  * @retval None
-  */
-__STATIC_INLINE void LL_FLASH_EnableBuffers(void)
-{
-  CLEAR_BIT(FLASH->ACR, FLASH_ACR_DISAB_BUF);
-}
-
-/**
-  * @brief  Disable buffers used as a cache during read access
-  * @note   When disabled, every read will access the NVM even for
-  *         an address already read (for example, the previous address).
-  * @rmtoll FLASH_ACR    DISAB_BUF     LL_FLASH_DisableBuffers
-  * @retval None
-  */
-__STATIC_INLINE void LL_FLASH_DisableBuffers(void)
-{
-  SET_BIT(FLASH->ACR, FLASH_ACR_DISAB_BUF);
-}
-
-/**
-  * @brief  Enable pre-read
-  * @note   When enabled, the memory interface stores the last address
-  *         read as data and tries to read the next one when no other
-  *         read or write or prefetch operation is ongoing.
-  *         It is automatically disabled every time the buffers are disabled.
-  * @rmtoll FLASH_ACR    PRE_READ      LL_FLASH_EnablePreRead
-  * @retval None
-  */
-__STATIC_INLINE void LL_FLASH_EnablePreRead(void)
-{
-  SET_BIT(FLASH->ACR, FLASH_ACR_PRE_READ);
-}
-
-/**
-  * @brief  Disable pre-read
-  * @rmtoll FLASH_ACR    PRE_READ      LL_FLASH_DisablePreRead
-  * @retval None
-  */
-__STATIC_INLINE void LL_FLASH_DisablePreRead(void)
-{
-  CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRE_READ);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined (FLASH) || defined (SYSCFG) || defined (DBGMCU) */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_SYSTEM_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h
deleted file mode 100755
index d33ab776..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h
+++ /dev/null
@@ -1,3340 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_tim.h
-  * @author  MCD Application Team
-  * @brief   Header file of TIM LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_TIM_H
-#define __STM32L0xx_LL_TIM_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (TIM2) || defined (TIM3) || defined (TIM21) || defined (TIM22) || defined (TIM6) || defined (TIM7)
-
-/** @defgroup TIM_LL TIM
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/** @defgroup TIM_LL_Private_Variables TIM Private Variables
-  * @{
-  */
-static const uint8_t OFFSET_TAB_CCMRx[] =
-{
-  0x00U,   /* 0: TIMx_CH1  */
-  0x00U,   /* 1: NA */
-  0x00U,   /* 2: TIMx_CH2  */
-  0x00U,   /* 3: NA */
-  0x04U,   /* 4: TIMx_CH3  */
-  0x00U,   /* 5: NA */
-  0x04U    /* 6: TIMx_CH4  */
-};
-
-static const uint8_t SHIFT_TAB_OCxx[] =
-{
-  0U,            /* 0: OC1M, OC1FE, OC1PE */
-  0U,            /* 1: - NA */
-  8U,            /* 2: OC2M, OC2FE, OC2PE */
-  0U,            /* 3: - NA */
-  0U,            /* 4: OC3M, OC3FE, OC3PE */
-  0U,            /* 5: - NA */
-  8U             /* 6: OC4M, OC4FE, OC4PE */
-};
-
-static const uint8_t SHIFT_TAB_ICxx[] =
-{
-  0U,            /* 0: CC1S, IC1PSC, IC1F */
-  0U,            /* 1: - NA */
-  8U,            /* 2: CC2S, IC2PSC, IC2F */
-  0U,            /* 3: - NA */
-  0U,            /* 4: CC3S, IC3PSC, IC3F */
-  0U,            /* 5: - NA */
-  8U             /* 6: CC4S, IC4PSC, IC4F */
-};
-
-static const uint8_t SHIFT_TAB_CCxP[] =
-{
-  0U,            /* 0: CC1P */
-  0U,            /* 1: NA */
-  4U,            /* 2: CC2P */
-  0U,            /* 3: NA */
-  8U,            /* 4: CC3P */
-  0U,            /* 5: NA */
-  12U            /* 6: CC4P */
-};
-
-/**
-  * @}
-  */
-
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup TIM_LL_Private_Constants TIM Private Constants
-  * @{
-  */
-
-
-/* Remap mask definitions */
-#define TIMx_OR_RMP_SHIFT  ((uint32_t)16U)
-#define TIMx_OR_RMP_MASK   ((uint32_t)0x0000FFFFU)
-#define TIM2_OR_RMP_MASK   ((uint32_t)((TIM2_OR_ETR_RMP | TIM2_OR_TI4_RMP ) << TIMx_OR_RMP_SHIFT))
-#define TIM21_OR_RMP_MASK  ((uint32_t)((TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP) << TIMx_OR_RMP_SHIFT))
-#define TIM22_OR_RMP_MASK  ((uint32_t)((TIM22_OR_ETR_RMP | TIM22_OR_TI1_RMP) << TIMx_OR_RMP_SHIFT))
-#if defined(TIM3)
-#define TIM3_OR_RMP_MASK   ((uint32_t)((TIM3_OR_ETR_RMP | TIM3_OR_TI1_RMP | TIM3_OR_TI2_RMP | TIM3_OR_TI4_RMP) << TIMx_OR_RMP_SHIFT))
-#endif /* TIM3 */
-
-
-
-/**
-  * @}
-  */
-
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup TIM_LL_Private_Macros TIM Private Macros
-  * @{
-  */
-/** @brief  Convert channel id into channel index.
-  * @param  __CHANNEL__ This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval none
-  */
-#define TIM_GET_CHANNEL_INDEX( __CHANNEL__) \
-(((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\
-((__CHANNEL__) == LL_TIM_CHANNEL_CH2) ? 2U :\
-((__CHANNEL__) == LL_TIM_CHANNEL_CH3) ? 4U : 6U)
-
-/**
-  * @}
-  */
-
-
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup TIM_LL_ES_INIT TIM Exported Init structure
-  * @{
-  */
-
-/**
-  * @brief  TIM Time Base configuration structure definition.
-  */
-typedef struct
-{
-  uint16_t Prescaler;         /*!< Specifies the prescaler value used to divide the TIM clock.
-                                   This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
-
-                                   This feature can be modified afterwards using unitary function @ref LL_TIM_SetPrescaler().*/
-
-  uint32_t CounterMode;       /*!< Specifies the counter mode.
-                                   This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE.
-
-                                   This feature can be modified afterwards using unitary function @ref LL_TIM_SetCounterMode().*/
-
-  uint32_t Autoreload;       /*!< Specifies the auto reload value to be loaded into the active
-                                   Auto-Reload Register at the next update event.
-                                   This parameter must be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
-                                   Some timer instances may support 32 bits counters. In that case this parameter must be a number between 0x0000 and 0xFFFFFFFF.
-
-                                   This feature can be modified afterwards using unitary function @ref LL_TIM_SetAutoReload().*/
-
-  uint32_t ClockDivision;     /*!< Specifies the clock division.
-                                   This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION.
-
-                                   This feature can be modified afterwards using unitary function @ref LL_TIM_SetClockDivision().*/
-} LL_TIM_InitTypeDef;
-
-/**
-  * @brief  TIM Output Compare configuration structure definition.
-  */
-typedef struct
-{
-  uint32_t OCMode;        /*!< Specifies the output mode.
-                               This parameter can be a value of @ref TIM_LL_EC_OCMODE.
-
-                               This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetMode().*/
-
-  uint32_t OCState;       /*!< Specifies the TIM Output Compare state.
-                               This parameter can be a value of @ref TIM_LL_EC_OCSTATE.
-
-                               This feature can be modified afterwards using unitary functions @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
-
-  uint32_t CompareValue;  /*!< Specifies the Compare value to be loaded into the Capture Compare Register.
-                               This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
-
-                               This feature can be modified afterwards using unitary function LL_TIM_OC_SetCompareCHx (x=1..6).*/
-
-  uint32_t OCPolarity;    /*!< Specifies the output polarity.
-                               This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
-
-                               This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetPolarity().*/
-
-} LL_TIM_OC_InitTypeDef;
-
-/**
-  * @brief  TIM Input Capture configuration structure definition.
-  */
-
-typedef struct
-{
-
-  uint32_t ICPolarity;    /*!< Specifies the active edge of the input signal.
-                               This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
-
-                               This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
-
-  uint32_t ICActiveInput; /*!< Specifies the input.
-                               This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
-
-                               This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
-
-  uint32_t ICPrescaler;   /*!< Specifies the Input Capture Prescaler.
-                               This parameter can be a value of @ref TIM_LL_EC_ICPSC.
-
-                               This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
-
-  uint32_t ICFilter;      /*!< Specifies the input capture filter.
-                               This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
-
-                               This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
-} LL_TIM_IC_InitTypeDef;
-
-
-/**
-  * @brief  TIM Encoder interface configuration structure definition.
-  */
-typedef struct
-{
-  uint32_t EncoderMode;     /*!< Specifies the encoder resolution (x2 or x4).
-                                 This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE.
-
-                                 This feature can be modified afterwards using unitary function @ref LL_TIM_SetEncoderMode().*/
-
-  uint32_t IC1Polarity;     /*!< Specifies the active edge of TI1 input.
-                                 This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
-
-                                 This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
-
-  uint32_t IC1ActiveInput;  /*!< Specifies the TI1 input source
-                                 This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
-
-                                 This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
-
-  uint32_t IC1Prescaler;    /*!< Specifies the TI1 input prescaler value.
-                                 This parameter can be a value of @ref TIM_LL_EC_ICPSC.
-
-                                 This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
-
-  uint32_t IC1Filter;       /*!< Specifies the TI1 input filter.
-                                 This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
-
-                                 This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
-
-  uint32_t IC2Polarity;      /*!< Specifies the active edge of TI2 input.
-                                 This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
-
-                                 This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
-
-  uint32_t IC2ActiveInput;  /*!< Specifies the TI2 input source
-                                 This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
-
-                                 This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
-
-  uint32_t IC2Prescaler;    /*!< Specifies the TI2 input prescaler value.
-                                 This parameter can be a value of @ref TIM_LL_EC_ICPSC.
-
-                                 This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
-
-  uint32_t IC2Filter;       /*!< Specifies the TI2 input filter.
-                                 This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
-
-                                 This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
-
-} LL_TIM_ENCODER_InitTypeDef;
-
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup TIM_LL_Exported_Constants TIM Exported Constants
-  * @{
-  */
-
-/** @defgroup TIM_LL_EC_GET_FLAG Get Flags Defines
-  * @brief    Flags defines which can be used with LL_TIM_ReadReg function.
-  * @{
-  */
-#define LL_TIM_SR_UIF                          TIM_SR_UIF           /*!< Update interrupt flag */
-#define LL_TIM_SR_CC1IF                        TIM_SR_CC1IF         /*!< Capture/compare 1 interrupt flag */
-#define LL_TIM_SR_CC2IF                        TIM_SR_CC2IF         /*!< Capture/compare 2 interrupt flag */
-#define LL_TIM_SR_CC3IF                        TIM_SR_CC3IF         /*!< Capture/compare 3 interrupt flag */
-#define LL_TIM_SR_CC4IF                        TIM_SR_CC4IF         /*!< Capture/compare 4 interrupt flag */
-#define LL_TIM_SR_TIF                          TIM_SR_TIF           /*!< Trigger interrupt flag */
-#define LL_TIM_SR_CC1OF                        TIM_SR_CC1OF         /*!< Capture/Compare 1 overcapture flag */
-#define LL_TIM_SR_CC2OF                        TIM_SR_CC2OF         /*!< Capture/Compare 2 overcapture flag */
-#define LL_TIM_SR_CC3OF                        TIM_SR_CC3OF         /*!< Capture/Compare 3 overcapture flag */
-#define LL_TIM_SR_CC4OF                        TIM_SR_CC4OF         /*!< Capture/Compare 4 overcapture flag */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_IT IT Defines
-  * @brief    IT defines which can be used with LL_TIM_ReadReg and  LL_TIM_WriteReg functions.
-  * @{
-  */
-#define LL_TIM_DIER_UIE                        TIM_DIER_UIE         /*!< Update interrupt enable */
-#define LL_TIM_DIER_CC1IE                      TIM_DIER_CC1IE       /*!< Capture/compare 1 interrupt enable */
-#define LL_TIM_DIER_CC2IE                      TIM_DIER_CC2IE       /*!< Capture/compare 2 interrupt enable */
-#define LL_TIM_DIER_CC3IE                      TIM_DIER_CC3IE       /*!< Capture/compare 3 interrupt enable */
-#define LL_TIM_DIER_CC4IE                      TIM_DIER_CC4IE       /*!< Capture/compare 4 interrupt enable */
-#define LL_TIM_DIER_TIE                        TIM_DIER_TIE         /*!< Trigger interrupt enable */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_UPDATESOURCE Update Source
-  * @{
-  */
-#define LL_TIM_UPDATESOURCE_REGULAR            ((uint32_t)0x00000000U) /*!< Counter overflow/underflow, Setting the UG bit or Update generation through the slave mode controller generates an update request */
-#define LL_TIM_UPDATESOURCE_COUNTER            TIM_CR1_URS            /*!< Only counter overflow/underflow generates an update request */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode
-  * @{
-  */
-#define LL_TIM_ONEPULSEMODE_SINGLE             TIM_CR1_OPM            /*!< Counter is not stopped at update event */
-#define LL_TIM_ONEPULSEMODE_REPETITIVE         ((uint32_t)0x00000000U) /*!< Counter stops counting at the next update event */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode
-  * @{
-  */
-#define LL_TIM_COUNTERMODE_UP                  ((uint32_t)0x00000000U) /*!TIMx_CCRy else active.*/
-#define LL_TIM_OCMODE_PWM2                     (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) /*!TIMx_CCRy else inactive*/
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_OCPOLARITY Output Configuration Polarity
-  * @{
-  */
-#define LL_TIM_OCPOLARITY_HIGH                 ((uint32_t)0x00000000U)     /*!< OCxactive high*/
-#define LL_TIM_OCPOLARITY_LOW                  TIM_CCER_CC1P               /*!< OCxactive low*/
-/**
-  * @}
-  */
-
-
-
-/** @defgroup TIM_LL_EC_ACTIVEINPUT Active Input Selection
-  * @{
-  */
-#define LL_TIM_ACTIVEINPUT_DIRECTTI            (uint32_t)(TIM_CCMR1_CC1S_0 << 16U) /*!< ICx is mapped on TIx */
-#define LL_TIM_ACTIVEINPUT_INDIRECTTI          (uint32_t)(TIM_CCMR1_CC1S_1 << 16U) /*!< ICx is mapped on TIy */
-#define LL_TIM_ACTIVEINPUT_TRC                 (uint32_t)(TIM_CCMR1_CC1S << 16U)   /*!< ICx is mapped on TRC */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_ICPSC Input Configuration Prescaler
-  * @{
-  */
-#define LL_TIM_ICPSC_DIV1                      ((uint32_t)0x00000000U) /*!< No prescaler, capture is done each time an edge is detected on the capture input */
-#define LL_TIM_ICPSC_DIV2                      (uint32_t)(TIM_CCMR1_IC1PSC_0 << 16U)    /*!< Capture is done once every 2 events */
-#define LL_TIM_ICPSC_DIV4                      (uint32_t)(TIM_CCMR1_IC1PSC_1 << 16U)    /*!< Capture is done once every 4 events */
-#define LL_TIM_ICPSC_DIV8                      (uint32_t)(TIM_CCMR1_IC1PSC << 16U)      /*!< Capture is done once every 8 events */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_IC_FILTER Input Configuration Filter
-  * @{
-  */
-#define LL_TIM_IC_FILTER_FDIV1                 ((uint32_t)0x00000000U)                                         /*!< No filter, sampling is done at fDTS */
-#define LL_TIM_IC_FILTER_FDIV1_N2              (uint32_t)(TIM_CCMR1_IC1F_0 << 16U)                                          /*!< fSAMPLING=fCK_INT, N=2 */
-#define LL_TIM_IC_FILTER_FDIV1_N4              (uint32_t)(TIM_CCMR1_IC1F_1 << 16U)                                          /*!< fSAMPLING=fCK_INT, N=4 */
-#define LL_TIM_IC_FILTER_FDIV1_N8              (uint32_t)((TIM_CCMR1_IC1F_1 | TIM_CCMR1_IC1F_0) << 16U)                     /*!< fSAMPLING=fCK_INT, N=8 */
-#define LL_TIM_IC_FILTER_FDIV2_N6              (uint32_t)(TIM_CCMR1_IC1F_2 << 16U)                                          /*!< fSAMPLING=fDTS/2, N=6 */
-#define LL_TIM_IC_FILTER_FDIV2_N8              (uint32_t)((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_0) << 16U)                     /*!< fSAMPLING=fDTS/2, N=8 */
-#define LL_TIM_IC_FILTER_FDIV4_N6              (uint32_t)((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_1) << 16U)                     /*!< fSAMPLING=fDTS/4, N=6 */
-#define LL_TIM_IC_FILTER_FDIV4_N8              (uint32_t)((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_1 | TIM_CCMR1_IC1F_0) << 16U)  /*!< fSAMPLING=fDTS/4, N=8 */
-#define LL_TIM_IC_FILTER_FDIV8_N6              (uint32_t)(TIM_CCMR1_IC1F_3 << 16U)                                          /*!< fSAMPLING=fDTS/8, N=6 */
-#define LL_TIM_IC_FILTER_FDIV8_N8              (uint32_t)((TIM_CCMR1_IC1F_3 | TIM_CCMR1_IC1F_0) << 16U)                     /*!< fSAMPLING=fDTS/8, N=8 */
-#define LL_TIM_IC_FILTER_FDIV16_N5             (uint32_t)((TIM_CCMR1_IC1F_3 | TIM_CCMR1_IC1F_1) << 16U)                     /*!< fSAMPLING=fDTS/16, N=5 */
-#define LL_TIM_IC_FILTER_FDIV16_N6             (uint32_t)((TIM_CCMR1_IC1F_3 | TIM_CCMR1_IC1F_1 | TIM_CCMR1_IC1F_0) << 16U)  /*!< fSAMPLING=fDTS/16, N=6 */
-#define LL_TIM_IC_FILTER_FDIV16_N8             (uint32_t)((TIM_CCMR1_IC1F_3 | TIM_CCMR1_IC1F_2) << 16U)                     /*!< fSAMPLING=fDTS/16, N=8 */
-#define LL_TIM_IC_FILTER_FDIV32_N5             (uint32_t)((TIM_CCMR1_IC1F_3 | TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_0) << 16U)  /*!< fSAMPLING=fDTS/32, N=5 */
-#define LL_TIM_IC_FILTER_FDIV32_N6             (uint32_t)((TIM_CCMR1_IC1F_3 | TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_1) << 16U)  /*!< fSAMPLING=fDTS/32, N=6 */
-#define LL_TIM_IC_FILTER_FDIV32_N8             (uint32_t)(TIM_CCMR1_IC1F << 16U)                                            /*!< fSAMPLING=fDTS/32, N=8 */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_IC_POLARITY Input Configuration Polarity
-  * @{
-  */
-#define LL_TIM_IC_POLARITY_RISING              ((uint32_t)0x00000000U)          /*!< The circuit is sensitive to TIxFP1 rising edge, TIxFP1 is not inverted */
-#define LL_TIM_IC_POLARITY_FALLING             TIM_CCER_CC1P                    /*!< The circuit is sensitive to TIxFP1 falling edge, TIxFP1 is inverted */
-#define LL_TIM_IC_POLARITY_BOTHEDGE            (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< The circuit is sensitive to both TIxFP1 rising and falling edges, TIxFP1 is not inverted */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_CLOCKSOURCE Clock Source
-  * @{
-  */
-#define LL_TIM_CLOCKSOURCE_INTERNAL            ((uint32_t)0x00000000U)                              /*!< The timer is clocked by the internal clock provided from the RCC */
-#define LL_TIM_CLOCKSOURCE_EXT_MODE1           (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0 ) /*!< Counter counts at each rising or falling edge on a selected inpu t*/
-#define LL_TIM_CLOCKSOURCE_EXT_MODE2           TIM_SMCR_ECE                                        /*!< Counter counts at each rising or falling edge on the external trigger input ETR */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_ENCODERMODE Encoder Mode
-  * @{
-  */
-#define LL_TIM_ENCODERMODE_X2_TI1              TIM_SMCR_SMS_0                    /*!< Encoder mode 1 - Counter counts up/down on TI2FP2 edge depending on TI1FP1 level */
-#define LL_TIM_ENCODERMODE_X2_TI2              TIM_SMCR_SMS_1                    /*!< Encoder mode 2 - Counter counts up/down on TI1FP1 edge depending on TI2FP2 level */
-#define LL_TIM_ENCODERMODE_X4_TI12             (TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0) /*!< Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges                                                                                                                                                                   depending on the level of the other input l */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_TRGO Trigger Output
-  * @{
-  */
-#define LL_TIM_TRGO_RESET                      ((uint32_t)0x00000000U)                         /*!< UG bit from the TIMx_EGR register is used as trigger output */
-#define LL_TIM_TRGO_ENABLE                     TIM_CR2_MMS_0                                   /*!< Counter Enable signal (CNT_EN) is used as trigger output */
-#define LL_TIM_TRGO_UPDATE                     TIM_CR2_MMS_1                                   /*!< Update event is used as trigger output */
-#define LL_TIM_TRGO_CC1IF                      (TIM_CR2_MMS_1 | TIM_CR2_MMS_0)                 /*!< CC1 capture or a compare match is used as trigger output */
-#define LL_TIM_TRGO_OC1REF                     TIM_CR2_MMS_2                                   /*!< OC1REF signal is used as trigger output */
-#define LL_TIM_TRGO_OC2REF                     (TIM_CR2_MMS_2 | TIM_CR2_MMS_0)                 /*!< OC2REF signal is used as trigger output */
-#define LL_TIM_TRGO_OC3REF                     (TIM_CR2_MMS_2 | TIM_CR2_MMS_1)                 /*!< OC3REF signal is used as trigger output */
-#define LL_TIM_TRGO_OC4REF                     (TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0) /*!< OC4REF signal is used as trigger output */
-/**
-  * @}
-  */
-
-
-/** @defgroup TIM_LL_EC_SLAVEMODE Slave Mode
-  * @{
-  */
-#define LL_TIM_SLAVEMODE_DISABLED              ((uint32_t)0x00000000U)             /*!< Slave mode disabled */
-#define LL_TIM_SLAVEMODE_RESET                 TIM_SMCR_SMS_2                      /*!< Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter */
-#define LL_TIM_SLAVEMODE_GATED                 (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0)   /*!< Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high */
-#define LL_TIM_SLAVEMODE_TRIGGER               (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1)   /*!< Trigger Mode - The counter starts at a rising edge of the trigger TRGI */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_TS Trigger Selection
-  * @{
-  */
-#define LL_TIM_TS_ITR0                         ((uint32_t)0x00000000U)                          /*!< Internal Trigger 0 (ITR0) is used as trigger input */
-#define LL_TIM_TS_ITR1                         TIM_SMCR_TS_0                                    /*!< Internal Trigger 1 (ITR1) is used as trigger input */
-#define LL_TIM_TS_ITR2                         TIM_SMCR_TS_1                                    /*!< Internal Trigger 2 (ITR2) is used as trigger input */
-#define LL_TIM_TS_ITR3                         (TIM_SMCR_TS_0 | TIM_SMCR_TS_1)                  /*!< Internal Trigger 3 (ITR3) is used as trigger input */
-#define LL_TIM_TS_TI1F_ED                      TIM_SMCR_TS_2                                    /*!< TI1 Edge Detector (TI1F_ED) is used as trigger input */
-#define LL_TIM_TS_TI1FP1                       (TIM_SMCR_TS_2 | TIM_SMCR_TS_0)                  /*!< Filtered Timer Input 1 (TI1FP1) is used as trigger input */
-#define LL_TIM_TS_TI2FP2                       (TIM_SMCR_TS_2 | TIM_SMCR_TS_1)                  /*!< Filtered Timer Input 2 (TI12P2) is used as trigger input */
-#define LL_TIM_TS_ETRF                         (TIM_SMCR_TS_2 | TIM_SMCR_TS_1 | TIM_SMCR_TS_0) /*!< Filtered external Trigger (ETRF) is used as trigger input */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_ETR_POLARITY External Trigger Polarity
-  * @{
-  */
-#define LL_TIM_ETR_POLARITY_NONINVERTED        ((uint32_t)0x00000000U) /*!< ETR is non-inverted, active at high level or rising edge */
-#define LL_TIM_ETR_POLARITY_INVERTED           TIM_SMCR_ETP            /*!< ETR is inverted, active at low level or falling edge */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_ETR_PRESCALER External Trigger Prescaler
-  * @{
-  */
-#define LL_TIM_ETR_PRESCALER_DIV1              ((uint32_t)0x00000000U) /*!< ETR prescaler OFF */
-#define LL_TIM_ETR_PRESCALER_DIV2              TIM_SMCR_ETPS_0         /*!< ETR frequency is divided by 2 */
-#define LL_TIM_ETR_PRESCALER_DIV4              TIM_SMCR_ETPS_1         /*!< ETR frequency is divided by 4 */
-#define LL_TIM_ETR_PRESCALER_DIV8              TIM_SMCR_ETPS           /*!< ETR frequency is divided by 8 */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_ETR_FILTER External Trigger Filter
-  * @{
-  */
-#define LL_TIM_ETR_FILTER_FDIV1                ((uint32_t)0x00000000U)                              /*!< No filter, sampling is done at fDTS */
-#define LL_TIM_ETR_FILTER_FDIV1_N2             TIM_SMCR_ETF_0                                       /*!< fSAMPLING=fCK_INT, N=2 */
-#define LL_TIM_ETR_FILTER_FDIV1_N4             TIM_SMCR_ETF_1                                       /*!< fSAMPLING=fCK_INT, N=4 */
-#define LL_TIM_ETR_FILTER_FDIV1_N8             (TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0)                    /*!< fSAMPLING=fCK_INT, N=8 */
-#define LL_TIM_ETR_FILTER_FDIV2_N6             TIM_SMCR_ETF_2                                       /*!< fSAMPLING=fDTS/2, N=6 */
-#define LL_TIM_ETR_FILTER_FDIV2_N8             (TIM_SMCR_ETF_2 | TIM_SMCR_ETF_0)                    /*!< fSAMPLING=fDTS/2, N=8 */
-#define LL_TIM_ETR_FILTER_FDIV4_N6             (TIM_SMCR_ETF_2 | TIM_SMCR_ETF_1 )                   /*!< fSAMPLING=fDTS/4, N=6 */
-#define LL_TIM_ETR_FILTER_FDIV4_N8             (TIM_SMCR_ETF_2 | TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0)   /*!< fSAMPLING=fDTS/4, N=8 */
-#define LL_TIM_ETR_FILTER_FDIV8_N6             TIM_SMCR_ETF_3                                       /*!< fSAMPLING=fDTS/8, N=8 */
-#define LL_TIM_ETR_FILTER_FDIV8_N8             (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_0)                    /*!< fSAMPLING=fDTS/16, N=5 */
-#define LL_TIM_ETR_FILTER_FDIV16_N5            (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1 )                   /*!< fSAMPLING=fDTS/16, N=6 */
-#define LL_TIM_ETR_FILTER_FDIV16_N6            (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0)   /*!< fSAMPLING=fDTS/16, N=8 */
-#define LL_TIM_ETR_FILTER_FDIV16_N8            (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2 )                   /*!< fSAMPLING=fDTS/16, N=5 */
-#define LL_TIM_ETR_FILTER_FDIV32_N5            (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2  | TIM_SMCR_ETF_0)  /*!< fSAMPLING=fDTS/32, N=5 */
-#define LL_TIM_ETR_FILTER_FDIV32_N6            (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2  | TIM_SMCR_ETF_1)  /*!< fSAMPLING=fDTS/32, N=6 */
-#define LL_TIM_ETR_FILTER_FDIV32_N8            TIM_SMCR_ETF                                         /*!< fSAMPLING=fDTS/32, N=8 */
-/**
-  * @}
-  */
-
-
-
-
-
-
-
-/** @defgroup TIM_LL_EC_DMABURST_BASEADDR DMA Burst Base Address
-  * @{
-  */
-#define LL_TIM_DMABURST_BASEADDR_CR1           ((uint32_t)0x00000000U)                                          /*!< TIMx_CR1 register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_CR2           TIM_DCR_DBA_0                                                    /*!< TIMx_CR2 register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_SMCR          TIM_DCR_DBA_1                                                    /*!< TIMx_SMCR register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_DIER          (TIM_DCR_DBA_1 |  TIM_DCR_DBA_0)                                 /*!< TIMx_DIER register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_SR            TIM_DCR_DBA_2                                                    /*!< TIMx_SR register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_EGR           (TIM_DCR_DBA_2 | TIM_DCR_DBA_0)                                  /*!< TIMx_EGR register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_CCMR1         (TIM_DCR_DBA_2 | TIM_DCR_DBA_1)                                  /*!< TIMx_CCMR1 register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_CCMR2         (TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0)                  /*!< TIMx_CCMR2 register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_CCER          TIM_DCR_DBA_3                                                    /*!< TIMx_CCER register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_CNT           (TIM_DCR_DBA_3 | TIM_DCR_DBA_0)                                  /*!< TIMx_CNT register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_PSC           (TIM_DCR_DBA_3 | TIM_DCR_DBA_1)                                  /*!< TIMx_PSC register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_ARR           (TIM_DCR_DBA_3 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0)                  /*!< TIMx_ARR register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_RCR           (TIM_DCR_DBA_3 | TIM_DCR_DBA_2)                                  /*!< TIMx_RCR register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_CCR1          (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0)                  /*!< TIMx_CCR1 register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_CCR2          (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1)                  /*!< TIMx_CCR2 register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_CCR3          (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0)  /*!< TIMx_CCR3 register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_CCR4          TIM_DCR_DBA_4                                                    /*!< TIMx_CCR4 register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_BDTR          (TIM_DCR_DBA_4 | TIM_DCR_DBA_0)                                  /*!< TIMx_BDTR register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_CCMR3         (TIM_DCR_DBA_4 | TIM_DCR_DBA_1)                                  /*!< TIMx_CCMR3 register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_CCR5          (TIM_DCR_DBA_4 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0)                  /*!< TIMx_CCR5 register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_CCR6          (TIM_DCR_DBA_4 | TIM_DCR_DBA_2)                                  /*!< TIMx_CCR6 register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_OR1           (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0)                  /*!< TIMx_OR1 register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_OR2           (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1)                  /*!< TIMx_OR2 register is the DMA base address for DMA burst */
-#define LL_TIM_DMABURST_BASEADDR_OR3           (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0)  /*!< TIMx_OR3 register is the DMA base address for DMA burst */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_DMABURST_LENGTH DMA Burst Length
-  * @{
-  */
-#define LL_TIM_DMABURST_LENGTH_1TRANSFER       ((uint32_t)0x00000000U)                                         /*!< Transfer is done to 1 register starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_2TRANSFERS      TIM_DCR_DBL_0                                                   /*!< Transfer is done to 2 registers starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_3TRANSFERS      TIM_DCR_DBL_1                                                   /*!< Transfer is done to 3 registers starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_4TRANSFERS      (TIM_DCR_DBL_1 |  TIM_DCR_DBL_0)                                /*!< Transfer is done to 4 registers starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_5TRANSFERS      TIM_DCR_DBL_2                                                   /*!< Transfer is done to 5 registers starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_6TRANSFERS      (TIM_DCR_DBL_2 | TIM_DCR_DBL_0)                                 /*!< Transfer is done to 6 registers starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_7TRANSFERS      (TIM_DCR_DBL_2 | TIM_DCR_DBL_1)                                 /*!< Transfer is done to 7 registers starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_8TRANSFERS      (TIM_DCR_DBL_2 | TIM_DCR_DBL_1 | TIM_DCR_DBL_0)                 /*!< Transfer is done to 1 registers starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_9TRANSFERS      TIM_DCR_DBL_3                                                   /*!< Transfer is done to 9 registers starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_10TRANSFERS     (TIM_DCR_DBL_3 | TIM_DCR_DBL_0)                                 /*!< Transfer is done to 10 registers starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_11TRANSFERS     (TIM_DCR_DBL_3 | TIM_DCR_DBL_1)                                 /*!< Transfer is done to 11 registers starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_12TRANSFERS     (TIM_DCR_DBL_3 | TIM_DCR_DBL_1 | TIM_DCR_DBL_0)                 /*!< Transfer is done to 12 registers starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_13TRANSFERS     (TIM_DCR_DBL_3 | TIM_DCR_DBL_2)                                 /*!< Transfer is done to 13 registers starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_14TRANSFERS     (TIM_DCR_DBL_3 | TIM_DCR_DBL_2 | TIM_DCR_DBL_0)                 /*!< Transfer is done to 14 registers starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_15TRANSFERS     (TIM_DCR_DBL_3 | TIM_DCR_DBL_2 | TIM_DCR_DBL_1)                 /*!< Transfer is done to 15 registers starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_16TRANSFERS     (TIM_DCR_DBL_3 | TIM_DCR_DBL_2 | TIM_DCR_DBL_1 | TIM_DCR_DBL_0) /*!< Transfer is done to 16 registers starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_17TRANSFERS     TIM_DCR_DBL_4                                                   /*!< Transfer is done to 17 registers starting from the DMA burst base address */
-#define LL_TIM_DMABURST_LENGTH_18TRANSFERS     (TIM_DCR_DBL_4 |  TIM_DCR_DBL_0)                                /*!< Transfer is done to 18 registers starting from the DMA burst base address */
-/**
-  * @}
-  */
-
-
-/** @defgroup TIM_LL_EC_TIM2_ETR_RMP  TIM2 External Trigger Remap
-* @{
-*/
-#define LL_TIM_TIM2_ETR_RMP_GPIO     ((uint32_t)0x00000000U | TIM2_OR_RMP_MASK)                   /*!< TIM2_ETR is connected to Ored GPIO */
-#if defined(TIM_TIM2_REMAP_HSI_SUPPORT)
-#define LL_TIM_TIM2_ETR_RMP_HSI      (TIM2_OR_ETR_RMP_1 | TIM2_OR_ETR_RMP_0 | TIM2_OR_RMP_MASK)   /*!< TIM2_ETR is connected to HSI */
-#endif /* defined(TIM_TIM2_REMAP_HSI_SUPPORT) */
-#if defined(TIM_TIM2_REMAP_HSI48_SUPPORT)
-#define LL_TIM_TIM2_ETR_RMP_HSI48    (TIM2_OR_ETR_RMP_2 | TIM2_OR_RMP_MASK)                       /*!< TIM2_ETR is connected to HSI48 */
-#endif /* defined(TIM_TIM2_REMAP_HSI48_SUPPORT) */
-#define LL_TIM_TIM2_ETR_RMP_LSE      (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_0 | TIM2_OR_RMP_MASK)   /*!< TIM2_ETR is connected to LSE */
-#define LL_TIM_TIM2_ETR_RMP_COMP2    (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_1 | TIM2_OR_RMP_MASK)   /*!< TIM2_ETR is connected to COMP2_OUT */
-#define LL_TIM_TIM2_ETR_RMP_COMP1    (TIM2_OR_ETR_RMP | TIM2_OR_RMP_MASK)                         /*!< TIM2_ETR is connected to COMP1_OUT */
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_TIM2_TI4_RMP  TIM2 Timer Input Ch4 Remap
-* @{
-*/
-#define LL_TIM_TIM2_TI4_RMP_GPIO      ((uint32_t)0x00000000U | TIM2_OR_RMP_MASK) /*!< TIM2 input capture 4 is connected to GPIO */
-#define LL_TIM_TIM2_TI4_RMP_COMP2     (TIM2_OR_TI4_RMP_0 | TIM2_OR_RMP_MASK)     /*!< TIM2 input capture 4 is connected to COMP2_OUT */
-#define LL_TIM_TIM2_TI4_RMP_COMP1     (TIM2_OR_TI4_RMP_1 | TIM2_OR_RMP_MASK)     /*!< TIM2 input capture 4 is connected to COMP1_OUT */
-/**
-  * @}
-  */
-
-#if defined(TIM3_OR_ETR_RMP)
-/** @defgroup TIM_LL_EC_TIM3_ETR_RMP  TIM3 External Trigger Remap
-* @{
-*/
-#define LL_TIM_TIM3_ETR_RMP_GPIO         ((uint32_t)0x00000000U | TIM3_OR_RMP_MASK)     /*!< TIM3_ETR is connected to GPIO */
-#define LL_TIM_TIM3_ETR_RMP_HSI48DIV6    (TIM3_OR_ETR_RMP_1 | TIM3_OR_RMP_MASK)         /*!< TIM3_ETR is connected to HSI48 divided by 6 */
-/**
-  * @}
-  */
-#endif /* defined(TIM3_OR_ETR_RMP) */
-
-#if defined(TIM3_OR_TI1_RMP) || defined(TIM3_OR_TI2_RMP) || defined(TIM3_OR_TI4_RMP)
-/** @defgroup TIM_LL_EC_TIM3_TI_RMP  TIM3 External Inputs Remap
-* @{
-*/
-#define LL_TIM_TIM3_TI_RMP_TI1_USB_SOF      ((uint32_t)0x00000000U | TIM3_OR_RMP_MASK) /*!< TIM3_TI1 input is connected to USB_SOF */
-#define LL_TIM_TIM3_TI_RMP_TI1_GPIO         (TIM3_OR_TI1_RMP | TIM3_OR_RMP_MASK)       /*!< TIM3_TI1 input is connected to PE3, PA6, PC6 or PB4 */
-
-#define LL_TIM_TIM3_TI_RMP_TI2_GPIO_DEF     ((uint32_t)0x00000000U | TIM3_OR_RMP_MASK) /*!< Mapping PB5 to TIM22_CH2 */
-#define LL_TIM_TIM3_TI_RMP_TI2_GPIOB5_AF4   (TIM3_OR_TI2_RMP | TIM3_OR_RMP_MASK)       /*!< Mapping PB5 to TIM3_CH2 */
-
-#define LL_TIM_TIM3_TI_RMP_TI4_GPIO_DEF     ((uint32_t)0x00000000U | TIM3_OR_RMP_MASK) /*!< Mapping PC9 to USB_OE */
-#define LL_TIM_TIM3_TI_RMP_TI4_GPIOC9_AF2   (TIM3_OR_TI4_RMP | TIM3_OR_RMP_MASK)       /*!< Mapping PC9 to TIM3_CH4 */
-/**
-  * @}
-  */
-#endif /*defined(TIM3_OR_TI1_RMP) or defined(TIM3_OR_TI2_RMP) or defined(TIM3_OR_TI4_RMP)*/
-
-/** @defgroup TIM_LL_EC_TIM21_ETR_RMP  TIM21 External Trigger Remap
-* @{
-*/
-#define LL_TIM_TIM21_ETR_RMP_GPIO  ((uint32_t)0x00000000U | TIM21_OR_RMP_MASK) /*!< TIM21_ETR is connected to Ored GPIO1 */
-#define LL_TIM_TIM21_ETR_RMP_COMP2 (TIM21_OR_ETR_RMP_0 | TIM21_OR_RMP_MASK)    /*!< TIM21_ETR is connected to COMP2_OUT */
-#define LL_TIM_TIM21_ETR_RMP_COMP1 (TIM21_OR_ETR_RMP_1 | TIM21_OR_RMP_MASK)    /*!< TIM21_ETR is connected to COMP1_OUT */
-#define LL_TIM_TIM21_ETR_RMP_LSE   (TIM21_OR_ETR_RMP | TIM21_OR_RMP_MASK)      /*!< TIM21_ETR is connected to LSE */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_TIM21_TI1_RMP  TIM21 External Input Ch1 Remap
-* @{
-*/
-#define LL_TIM_TIM21_TI1_RMP_GPIO    ((uint32_t)0x00000000U | TIM21_OR_RMP_MASK)    /*!< TIM21_TI1 is connected to Ored GPIO1 */
-#define LL_TIM_TIM21_TI1_RMP_RTC_WK  (TIM21_OR_TI1_RMP_0 | TIM21_OR_RMP_MASK)       /*!< TIM21_TI1 is connected to RTC_WAKEUP */
-#define LL_TIM_TIM21_TI1_RMP_HSE_RTC (TIM21_OR_TI1_RMP_1 | TIM21_OR_RMP_MASK)       /*!< TIM21_TI1 is connected to HSE_RTC */
-#define LL_TIM_TIM21_TI1_RMP_MSI     (TIM21_OR_TI1_RMP_1 | TIM21_OR_TI1_RMP_0 | TIM21_OR_RMP_MASK)  /*!< TIM21_TI1 is connected to MSI */
-#define LL_TIM_TIM21_TI1_RMP_LSE     (TIM21_OR_TI1_RMP_2 | TIM21_OR_RMP_MASK)                       /*!< TIM21_TI1 is connected to LSE */
-#define LL_TIM_TIM21_TI1_RMP_LSI     (TIM21_OR_TI1_RMP_2 | TIM21_OR_TI1_RMP_0 | TIM21_OR_RMP_MASK)  /*!< TIM21_TI1 is connected to LSI */
-#define LL_TIM_TIM21_TI1_RMP_COMP1   (TIM21_OR_TI1_RMP_2 | TIM21_OR_TI1_RMP_1 | TIM21_OR_RMP_MASK)  /*!< TIM21_TI1 is connected to COMP1_OUT */
-#define LL_TIM_TIM21_TI1_RMP_MCO     (TIM21_OR_TI1_RMP | TIM21_OR_RMP_MASK)                         /*!< TIM21_TI1 is connected to MCO */
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EC_TIM21_TI2_RMP  TIM21 External Input Ch2 Remap
-* @{
-*/
-#define LL_TIM_TIM21_TI2_RMP_GPIO    ((uint32_t)0x00000000U | TIM21_OR_RMP_MASK)  /*!< TIM21_TI2 is connected to Ored GPIO1 */
-#define LL_TIM_TIM21_TI2_RMP_COMP2   (TIM21_OR_TI2_RMP | TIM21_OR_RMP_MASK)       /*!< TIM21_TI2 is connected to COMP2_OUT */
-/**
-  * @}
-  */
-
-#if defined(TIM22_OR_ETR_RMP)
-
-/** @defgroup TIM_LL_EC_TIM22_ETR_RMP  TIM22 External Trigger Remap
-* @{
-*/
-#define LL_TIM_TIM22_ETR_RMP_GPIO  ((uint32_t)0x00000000U | TIM22_OR_RMP_MASK) /*!< TIM22_ETR is connected to GPIO */
-#define LL_TIM_TIM22_ETR_RMP_COMP2 (TIM22_OR_ETR_RMP_0 | TIM22_OR_RMP_MASK)    /*!< TIM22_ETR is connected to COMP2_OUT */
-#define LL_TIM_TIM22_ETR_RMP_COMP1 (TIM22_OR_ETR_RMP_1 | TIM22_OR_RMP_MASK)    /*!< TIM22_ETR is connected to COMP1_OUT */
-#define LL_TIM_TIM22_ETR_RMP_LSE   (TIM22_OR_ETR_RMP | TIM22_OR_RMP_MASK)      /*!< TIM22_ETR is connected to LSE */
-/**
-  * @}
-  */
-#endif /* defined(TIM22_OR_ETR_RMP) */
-
-#if defined(TIM22_OR_TI1_RMP)
-/** @defgroup TIM_LL_EC_TIM22_TI1_RMP  TIM22 External Input Ch1 Remap
-* @{
-*/
-#define LL_TIM_TIM22_TI1_RMP_GPIO1  ((uint32_t)0x00000000U | TIM22_OR_RMP_MASK)  /*!< TIM22_TI1 is connected to GPIO1 */
-#define LL_TIM_TIM22_TI1_RMP_COMP2  (TIM22_OR_TI1_RMP_0 | TIM22_OR_RMP_MASK)     /*!< TIM22_TI1 is connected to COMP2_OUT */
-#define LL_TIM_TIM22_TI1_RMP_COMP1  (TIM22_OR_TI1_RMP_1 | TIM22_OR_RMP_MASK)     /*!< TIM22_TI1 is connected to COMP1_OUT */
-#define LL_TIM_TIM22_TI1_RMP_GPIO2  (TIM22_OR_TI1_RMP | TIM22_OR_RMP_MASK)       /*!< TIM22_TI1 is connected to GPIO2 */
-/**
-  * @}
-  */
-#endif /* defined(TIM22_OR_TI1_RMP) */
-
-
-/** @defgroup TIM_LL_EC_OCREF_CLR_INT OCREF clear input selection
-  * @{
-  */
-#define LL_TIM_OCREF_CLR_INT_NC     ((uint32_t)0x00000000U ) /*!< OCREF_CLR_INT is not connected */
-#define LL_TIM_OCREF_CLR_INT_ETR    TIM_SMCR_OCCS            /*!< OCREF_CLR_INT is connected to ETRF */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup TIM_LL_Exported_Macros TIM Exported Macros
-  * @{
-  */
-
-/** @defgroup TIM_LL_EM_WRITE_READ Common Write and read registers Macros
-  * @{
-  */
-/**
-  * @brief  Write a value in TIM register.
-  * @param  __INSTANCE__ TIM Instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_TIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in TIM register.
-  * @param  __INSTANCE__ TIM Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_TIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EM_Exported_Macros Exported_Macros
-  * @{
-  */
-
-
-/**
-  * @brief  HELPER macro calculating the prescaler value to achieve the required counter clock frequency.
-  * @note ex: @ref __LL_TIM_CALC_PSC (80000000, 1000000);
-  * @param  __TIMCLK__ timer input clock frequency (in Hz)
-  * @param  __CNTCLK__ counter clock frequency (in Hz)
-  * @retval Prescaler value  (between Min_Data=0 and Max_Data=65535)
-  */
-#define __LL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__)   \
-   ((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((__TIMCLK__)/(__CNTCLK__) - 1U) : 0U
-
-/**
-  * @brief  HELPER macro calculating the auto-reload value to achieve the required output signal frequency.
-  * @note ex: @ref __LL_TIM_CALC_ARR (1000000, @ref LL_TIM_GetPrescaler (), 10000);
-  * @param  __TIMCLK__ timer input clock frequency (in Hz)
-  * @param  __PSC__ prescaler
-  * @param  __FREQ__ output signal frequency (in Hz)
-  * @retval  Auto-reload value  (between Min_Data=0 and Max_Data=65535)
-  */
-#define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \
-     (((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? ((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U)) - 1U) : 0U
-
-/**
-  * @brief  HELPER macro calculating the compare value required to achieve the required timer output compare active/inactive delay.
-  * @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10);
-  * @param  __TIMCLK__ timer input clock frequency (in Hz)
-  * @param  __PSC__ prescaler
-  * @param  __DELAY__ timer output compare active/inactive delay (in us)
-  * @retval Compare value  (between Min_Data=0 and Max_Data=65535)
-  */
-#define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__)  \
-((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \
-          / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U))))
-
-/**
-  * @brief  HELPER macro calculating the auto-reload value to achieve the required pulse duration (when the timer operates in one pulse mode).
-  * @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20);
-  * @param  __TIMCLK__ timer input clock frequency (in Hz)
-  * @param  __PSC__ prescaler
-  * @param  __DELAY__ timer output compare active/inactive delay (in us)
-  * @param  __PULSE__ pulse duration (in us)
-  * @retval Auto-reload value  (between Min_Data=0 and Max_Data=65535)
-  */
-#define __LL_TIM_CALC_PULSE(__TIMCLK__, __PSC__, __DELAY__, __PULSE__)  \
- ((uint32_t)(__LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__PULSE__)) \
-           + __LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__DELAY__))))
-
-/**
-  * @brief  HELPER macro retrieving the ratio of the input capture prescaler
-  * @note ex: @ref __LL_TIM_GET_ICPSC_RATIO (@ref LL_TIM_IC_GetPrescaler ());
-  * @param  __ICPSC__ This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_ICPSC_DIV1
-  *         @arg @ref LL_TIM_ICPSC_DIV2
-  *         @arg @ref LL_TIM_ICPSC_DIV4
-  *         @arg @ref LL_TIM_ICPSC_DIV8
-  * @retval Input capture prescaler ratio (1, 2, 4 or 8)
-  */
-#define __LL_TIM_GET_ICPSC_RATIO(__ICPSC__)  \
-   ((uint32_t)((uint32_t)0x01U << (((__ICPSC__) >> 16U) >> TIM_CCMR1_IC1PSC_Pos)))
-
-
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup TIM_LL_Exported_Functions TIM Exported Functions
-  * @{
-  */
-
-/** @defgroup TIM_LL_EF_Time_Base Time Base configuration
-  * @{
-  */
-/**
-  * @brief  Enable timer counter.
-  * @rmtoll CR1          CEN           LL_TIM_EnableCounter
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->CR1, TIM_CR1_CEN);
-}
-
-/**
-  * @brief  Disable timer counter.
-  * @rmtoll CR1          CEN           LL_TIM_DisableCounter
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN);
-}
-
-/**
-  * @brief  Indicates whether the timer counter is enabled.
-  * @rmtoll CR1          CEN           LL_TIM_IsEnabledCounter
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN));
-}
-
-/**
-  * @brief  Enable update event generation.
-  * @rmtoll CR1          UDIS          LL_TIM_EnableUpdateEvent
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->CR1, TIM_CR1_UDIS);
-}
-
-/**
-  * @brief  Disable update event generation.
-  * @rmtoll CR1          UDIS          LL_TIM_DisableUpdateEvent
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS);
-}
-
-/**
-  * @brief  Indicates whether update event generation is enabled.
-  * @rmtoll CR1          UDIS          LL_TIM_IsEnabledUpdateEvent
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (TIM_CR1_UDIS));
-}
-
-/**
-  * @brief  Set update event source
-  * @note Update event source set to LL_TIM_UPDATESOURCE_REGULAR: any of the following events
-  *       generate an update interrupt or DMA request if enabled:
-  *        - Counter overflow/underflow
-  *        - Setting the UG bit
-  *        - Update generation through the slave mode controller
-  * @note Update event source set to LL_TIM_UPDATESOURCE_COUNTER: only counter
-  *       overflow/underflow generates an update interrupt or DMA request if enabled.
-  * @rmtoll CR1          URS           LL_TIM_SetUpdateSource
-  * @param  TIMx Timer instance
-  * @param  UpdateSource This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_UPDATESOURCE_REGULAR
-  *         @arg @ref LL_TIM_UPDATESOURCE_COUNTER
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource)
-{
-  MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource);
-}
-
-/**
-  * @brief  Get actual event update source
-  * @rmtoll CR1          URS           LL_TIM_GetUpdateSource
-  * @param  TIMx Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_TIM_UPDATESOURCE_REGULAR
-  *         @arg @ref LL_TIM_UPDATESOURCE_COUNTER
-  */
-__STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS));
-}
-
-/**
-  * @brief  Set one pulse mode (one shot v.s. repetitive).
-  * @rmtoll CR1          OPM           LL_TIM_SetOnePulseMode
-  * @param  TIMx Timer instance
-  * @param  OnePulseMode This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
-  *         @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode)
-{
-  MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode);
-}
-
-/**
-  * @brief  Get actual one pulse mode.
-  * @rmtoll CR1          OPM           LL_TIM_GetOnePulseMode
-  * @param  TIMx Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
-  *         @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
-  */
-__STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM));
-}
-
-/**
-  * @brief  Set the timer counter counting mode.
-  * @note Macro @ref IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
-  *       check whether or not the counter mode selection feature is supported
-  *       by a timer instance.
-  * @rmtoll CR1          DIR           LL_TIM_SetCounterMode\n
-  *         CR1          CMS           LL_TIM_SetCounterMode
-  * @param  TIMx Timer instance
-  * @param  CounterMode This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_COUNTERMODE_UP
-  *         @arg @ref LL_TIM_COUNTERMODE_DOWN
-  *         @arg @ref LL_TIM_COUNTERMODE_CENTER_UP
-  *         @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
-  *         @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode)
-{
-  MODIFY_REG(TIMx->CR1, TIM_CR1_DIR | TIM_CR1_CMS, CounterMode);
-}
-
-/**
-  * @brief  Get actual counter mode.
-  * @note Macro @ref IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
-  *       check whether or not the counter mode selection feature is supported
-  *       by a timer instance.
-  * @rmtoll CR1          DIR           LL_TIM_GetCounterMode\n
-  *         CR1          CMS           LL_TIM_GetCounterMode
-  * @param  TIMx Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_TIM_COUNTERMODE_UP
-  *         @arg @ref LL_TIM_COUNTERMODE_DOWN
-  *         @arg @ref LL_TIM_COUNTERMODE_CENTER_UP
-  *         @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
-  *         @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
-  */
-__STATIC_INLINE uint32_t LL_TIM_GetCounterMode(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR | TIM_CR1_CMS));
-}
-
-/**
-  * @brief  Enable auto-reload (ARR) preload.
-  * @rmtoll CR1          ARPE          LL_TIM_EnableARRPreload
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->CR1, TIM_CR1_ARPE);
-}
-
-/**
-  * @brief  Disable auto-reload (ARR) preload.
-  * @rmtoll CR1          ARPE          LL_TIM_DisableARRPreload
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE);
-}
-
-/**
-  * @brief  Indicates whether auto-reload (ARR) preload is enabled.
-  * @rmtoll CR1          ARPE          LL_TIM_IsEnabledARRPreload
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE));
-}
-
-/**
-  * @brief  Set the division ratio between the timer clock  and the sampling clock used by the dead-time generators (when supported) and the digital filters.
-  * @note Macro @ref IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
-  *       whether or not the clock division feature is supported by the timer
-  *       instance.
-  * @rmtoll CR1          CKD           LL_TIM_SetClockDivision
-  * @param  TIMx Timer instance
-  * @param  ClockDivision This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV1
-  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV2
-  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV4
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision)
-{
-  MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision);
-}
-
-/**
-  * @brief  Get the actual division ratio between the timer clock  and the sampling clock used by the dead-time generators (when supported) and the digital filters.
-  * @note Macro @ref IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
-  *       whether or not the clock division feature is supported by the timer
-  *       instance.
-  * @rmtoll CR1          CKD           LL_TIM_GetClockDivision
-  * @param  TIMx Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV1
-  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV2
-  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV4
-  */
-__STATIC_INLINE uint32_t LL_TIM_GetClockDivision(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD));
-}
-
-/**
-  * @brief  Set the counter value.
-  * @rmtoll CNT          CNT           LL_TIM_SetCounter
-  * @param  TIMx Timer instance
-  * @param  Counter Counter value (between Min_Data=0 and Max_Data=0xFFFF)
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter)
-{
-  WRITE_REG(TIMx->CNT, Counter);
-}
-
-/**
-  * @brief  Get the counter value.
-  * @rmtoll CNT          CNT           LL_TIM_GetCounter
-  * @param  TIMx Timer instance
-  * @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF)
-  */
-__STATIC_INLINE uint32_t LL_TIM_GetCounter(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_REG(TIMx->CNT));
-}
-
-/**
-  * @brief  Get the current direction of the counter
-  * @rmtoll CR1          DIR           LL_TIM_GetDirection
-  * @param  TIMx Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_TIM_COUNTERDIRECTION_UP
-  *         @arg @ref LL_TIM_COUNTERDIRECTION_DOWN
-  */
-__STATIC_INLINE uint32_t LL_TIM_GetDirection(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));
-}
-
-/**
-  * @brief  Set the prescaler value.
-  * @note The counter clock frequency CK_CNT is equal to fCK_PSC / (PSC[15:0] + 1).
-  * @note The prescaler can be changed on the fly as this control register is buffered. The new
-  *       prescaler ratio is taken into account at the next update event.
-  * @note Helper macro @ref __LL_TIM_CALC_PSC can be used to calculate the Prescaler parameter
-  * @rmtoll PSC          PSC           LL_TIM_SetPrescaler
-  * @param  TIMx Timer instance
-  * @param  Prescaler between Min_Data=0 and Max_Data=65535
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler)
-{
-  WRITE_REG(TIMx->PSC, Prescaler);
-}
-
-/**
-  * @brief  Get the prescaler value.
-  * @rmtoll PSC          PSC           LL_TIM_GetPrescaler
-  * @param  TIMx Timer instance
-  * @retval  Prescaler value between Min_Data=0 and Max_Data=65535
-  */
-__STATIC_INLINE uint32_t LL_TIM_GetPrescaler(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_REG(TIMx->PSC));
-}
-
-/**
-  * @brief  Set the auto-reload value.
-  * @note The counter is blocked while the auto-reload value is null.
-  * @note Helper macro @ref __LL_TIM_CALC_ARR can be used to calculate the AutoReload parameter
-  * @rmtoll ARR          ARR           LL_TIM_SetAutoReload
-  * @param  TIMx Timer instance
-  * @param  AutoReload between Min_Data=0 and Max_Data=65535
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload)
-{
-  WRITE_REG(TIMx->ARR, AutoReload);
-}
-
-/**
-  * @brief  Get the auto-reload value.
-  * @rmtoll ARR          ARR           LL_TIM_GetAutoReload
-  * @param  TIMx Timer instance
-  * @retval Auto-reload value
-  */
-__STATIC_INLINE uint32_t LL_TIM_GetAutoReload(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_REG(TIMx->ARR));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EF_Capture_Compare Capture Compare configuration
-  * @{
-  */
-/**
-  * @brief  Set the trigger of the capture/compare DMA request.
-  * @rmtoll CR2          CCDS          LL_TIM_CC_SetDMAReqTrigger
-  * @param  TIMx Timer instance
-  * @param  DMAReqTrigger This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CCDMAREQUEST_CC
-  *         @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger)
-{
-  MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger);
-}
-
-/**
-  * @brief  Get actual trigger of the capture/compare DMA request.
-  * @rmtoll CR2          CCDS          LL_TIM_CC_GetDMAReqTrigger
-  * @param  TIMx Timer instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_TIM_CCDMAREQUEST_CC
-  *         @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
-  */
-__STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));
-}
-
-/**
-  * @brief  Enable capture/compare channels.
-  * @rmtoll CCER         CC1E          LL_TIM_CC_EnableChannel\n
-  *         CCER         CC2E          LL_TIM_CC_EnableChannel\n
-  *         CCER         CC3E          LL_TIM_CC_EnableChannel\n
-  *         CCER         CC4E          LL_TIM_CC_EnableChannel
-  * @param  TIMx Timer instance
-  * @param  Channels This parameter can be a combination of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels)
-{
-  SET_BIT(TIMx->CCER, Channels);
-}
-
-/**
-  * @brief  Disable capture/compare channels.
-  * @rmtoll CCER         CC1E          LL_TIM_CC_DisableChannel\n
-  *         CCER         CC2E          LL_TIM_CC_DisableChannel\n
-  *         CCER         CC3E          LL_TIM_CC_DisableChannel\n
-  *         CCER         CC4E          LL_TIM_CC_DisableChannel
-  * @param  TIMx Timer instance
-  * @param  Channels This parameter can be a combination of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels)
-{
-  CLEAR_BIT(TIMx->CCER, Channels);
-}
-
-/**
-  * @brief  Indicate whether channel(s) is(are) enabled.
-  * @rmtoll CCER         CC1E          LL_TIM_CC_IsEnabledChannel\n
-  *         CCER         CC2E          LL_TIM_CC_IsEnabledChannel\n
-  *         CCER         CC3E          LL_TIM_CC_IsEnabledChannel\n
-  *         CCER         CC4E          LL_TIM_CC_IsEnabledChannel
-  * @param  TIMx Timer instance
-  * @param  Channels This parameter can be a combination of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(TIM_TypeDef *TIMx, uint32_t Channels)
-{
-  return (READ_BIT(TIMx->CCER, Channels) == (Channels));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EF_Output_Channel Output channel configuration
-  * @{
-  */
-/**
-  * @brief  Configure an output channel.
-  * @rmtoll CCMR1        CC1S          LL_TIM_OC_ConfigOutput\n
-  *         CCMR1        CC2S          LL_TIM_OC_ConfigOutput\n
-  *         CCMR2        CC3S          LL_TIM_OC_ConfigOutput\n
-  *         CCMR2        CC4S          LL_TIM_OC_ConfigOutput\n
-  *         CCER         CC1P          LL_TIM_OC_ConfigOutput\n
-  *         CCER         CC2P          LL_TIM_OC_ConfigOutput\n
-  *         CCER         CC3P          LL_TIM_OC_ConfigOutput\n
-  *         CCER         CC4P          LL_TIM_OC_ConfigOutput\n
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @param  Configuration This parameter must be a combination of all the following values:
-  *         @arg @ref LL_TIM_OCPOLARITY_HIGH or @ref LL_TIM_OCPOLARITY_LOW
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel]));
-  MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),
-             (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]);
-}
-
-/**
-  * @brief  Define the behavior of the output reference signal OCxREF from which
-  *         OCx and OCxN (when relevant) are derived.
-  * @rmtoll CCMR1        OC1M          LL_TIM_OC_SetMode\n
-  *         CCMR1        OC2M          LL_TIM_OC_SetMode\n
-  *         CCMR2        OC3M          LL_TIM_OC_SetMode\n
-  *         CCMR2        OC4M          LL_TIM_OC_SetMode
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @param  Mode This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_OCMODE_FROZEN
-  *         @arg @ref LL_TIM_OCMODE_ACTIVE
-  *         @arg @ref LL_TIM_OCMODE_INACTIVE
-  *         @arg @ref LL_TIM_OCMODE_TOGGLE
-  *         @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
-  *         @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
-  *         @arg @ref LL_TIM_OCMODE_PWM1
-  *         @arg @ref LL_TIM_OCMODE_PWM2
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M  | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]),  Mode << SHIFT_TAB_OCxx[iChannel]);
-}
-
-/**
-  * @brief  Get the output compare mode of an output channel.
-  * @rmtoll CCMR1        OC1M          LL_TIM_OC_GetMode\n
-  *         CCMR1        OC2M          LL_TIM_OC_GetMode\n
-  *         CCMR2        OC3M          LL_TIM_OC_GetMode\n
-  *         CCMR2        OC4M          LL_TIM_OC_GetMode
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_TIM_OCMODE_FROZEN
-  *         @arg @ref LL_TIM_OCMODE_ACTIVE
-  *         @arg @ref LL_TIM_OCMODE_INACTIVE
-  *         @arg @ref LL_TIM_OCMODE_TOGGLE
-  *         @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
-  *         @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
-  *         @arg @ref LL_TIM_OCMODE_PWM1
-  *         @arg @ref LL_TIM_OCMODE_PWM2
-  */
-__STATIC_INLINE uint32_t LL_TIM_OC_GetMode(TIM_TypeDef *TIMx, uint32_t Channel)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M  | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]);
-}
-
-/**
-  * @brief  Set the polarity of an output channel.
-  * @rmtoll CCER         CC1P          LL_TIM_OC_SetPolarity\n
-  *         CCER         CC2P          LL_TIM_OC_SetPolarity\n
-  *         CCER         CC3P          LL_TIM_OC_SetPolarity\n
-  *         CCER         CC4P          LL_TIM_OC_SetPolarity
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @param  Polarity This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_OCPOLARITY_HIGH
-  *         @arg @ref LL_TIM_OCPOLARITY_LOW
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),  Polarity << SHIFT_TAB_CCxP[iChannel]);
-}
-
-/**
-  * @brief  Get the polarity of an output channel.
-  * @rmtoll CCER         CC1P          LL_TIM_OC_GetPolarity\n
-  *         CCER         CC2P          LL_TIM_OC_GetPolarity\n
-  *         CCER         CC3P          LL_TIM_OC_GetPolarity\n
-  *         CCER         CC4P          LL_TIM_OC_GetPolarity
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_TIM_OCPOLARITY_HIGH
-  *         @arg @ref LL_TIM_OCPOLARITY_LOW
-  */
-__STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChannel]);
-}
-
-/**
-  * @brief  Enable fast mode for the output channel.
-  * @note Acts only if the channel is configured in PWM1 or PWM2 mode.
-  * @rmtoll CCMR1        OC1FE          LL_TIM_OC_EnableFast\n
-  *         CCMR1        OC2FE          LL_TIM_OC_EnableFast\n
-  *         CCMR2        OC3FE          LL_TIM_OC_EnableFast\n
-  *         CCMR2        OC4FE          LL_TIM_OC_EnableFast
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  SET_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
-
-}
-
-/**
-  * @brief  Disable fast mode for the output channel.
-  * @rmtoll CCMR1        OC1FE          LL_TIM_OC_DisableFast\n
-  *         CCMR1        OC2FE          LL_TIM_OC_DisableFast\n
-  *         CCMR2        OC3FE          LL_TIM_OC_DisableFast\n
-  *         CCMR2        OC4FE          LL_TIM_OC_DisableFast
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  CLEAR_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
-
-}
-
-/**
-  * @brief  Indicates whether fast mode is enabled for the output channel.
-  * @rmtoll CCMR1        OC1FE          LL_TIM_OC_IsEnabledFast\n
-  *         CCMR1        OC2FE          LL_TIM_OC_IsEnabledFast\n
-  *         CCMR2        OC3FE          LL_TIM_OC_IsEnabledFast\n
-  *         CCMR2        OC4FE          LL_TIM_OC_IsEnabledFast\n
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(TIM_TypeDef *TIMx, uint32_t Channel)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  register uint32_t bitfield = TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel];
-  return (READ_BIT(*pReg, bitfield) == bitfield);
-}
-
-/**
-  * @brief  Enable compare register (TIMx_CCRx) preload for the output channel.
-  * @rmtoll CCMR1        OC1PE          LL_TIM_OC_EnablePreload\n
-  *         CCMR1        OC2PE          LL_TIM_OC_EnablePreload\n
-  *         CCMR2        OC3PE          LL_TIM_OC_EnablePreload\n
-  *         CCMR2        OC4PE          LL_TIM_OC_EnablePreload
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
-}
-
-/**
-  * @brief  Disable compare register (TIMx_CCRx) preload for the output channel.
-  * @rmtoll CCMR1        OC1PE          LL_TIM_OC_DisablePreload\n
-  *         CCMR1        OC2PE          LL_TIM_OC_DisablePreload\n
-  *         CCMR2        OC3PE          LL_TIM_OC_DisablePreload\n
-  *         CCMR2        OC4PE          LL_TIM_OC_DisablePreload
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
-}
-
-/**
-  * @brief  Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channel.
-  * @rmtoll CCMR1        OC1PE          LL_TIM_OC_IsEnabledPreload\n
-  *         CCMR1        OC2PE          LL_TIM_OC_IsEnabledPreload\n
-  *         CCMR2        OC3PE          LL_TIM_OC_IsEnabledPreload\n
-  *         CCMR2        OC4PE          LL_TIM_OC_IsEnabledPreload\n
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(TIM_TypeDef *TIMx, uint32_t Channel)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  register uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel];
-  return (READ_BIT(*pReg, bitfield) == bitfield);
-}
-
-/**
-  * @brief  Enable clearing the output channel on an external event.
-  * @note This function can only be used in Output compare and PWM modes. It does not work in Forced mode.
-  * @note Macro @ref IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
-  *       or not a timer instance can clear the OCxREF signal on an external event.
-  * @rmtoll CCMR1        OC1CE          LL_TIM_OC_EnableClear\n
-  *         CCMR1        OC2CE          LL_TIM_OC_EnableClear\n
-  *         CCMR2        OC3CE          LL_TIM_OC_EnableClear\n
-  *         CCMR2        OC4CE          LL_TIM_OC_EnableClear
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
-}
-
-/**
-  * @brief  Disable clearing the output channel on an external event.
-  * @note Macro @ref IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
-  *       or not a timer instance can clear the OCxREF signal on an external event.
-  * @rmtoll CCMR1        OC1CE          LL_TIM_OC_DisableClear\n
-  *         CCMR1        OC2CE          LL_TIM_OC_DisableClear\n
-  *         CCMR2        OC3CE          LL_TIM_OC_DisableClear\n
-  *         CCMR2        OC4CE          LL_TIM_OC_DisableClear
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
-}
-
-/**
-  * @brief  Indicates clearing the output channel on an external event is enabled for the output channel.
-  * @note This function enables clearing the output channel on an external event.
-  * @note This function can only be used in Output compare and PWM modes. It does not work in Forced mode.
-  * @note Macro @ref IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
-  *       or not a timer instance can clear the OCxREF signal on an external event.
-  * @rmtoll CCMR1        OC1CE          LL_TIM_OC_IsEnabledClear\n
-  *         CCMR1        OC2CE          LL_TIM_OC_IsEnabledClear\n
-  *         CCMR2        OC3CE          LL_TIM_OC_IsEnabledClear\n
-  *         CCMR2        OC4CE          LL_TIM_OC_IsEnabledClear\n
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(TIM_TypeDef *TIMx, uint32_t Channel)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  register uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel];
-  return (READ_BIT(*pReg, bitfield) == bitfield);
-}
-
-/**
-  * @brief  Set compare value for output channel 1 (TIMx_CCR1).
-  * @note Macro @ref IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
-  *       output channel 1 is supported by a timer instance.
-  * @rmtoll CCR1         CCR1          LL_TIM_OC_SetCompareCH1
-  * @param  TIMx Timer instance
-  * @param  CompareValue between Min_Data=0 and Max_Data=65535
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue)
-{
-  WRITE_REG(TIMx->CCR1, CompareValue);
-}
-
-/**
-  * @brief  Set compare value for output channel 2 (TIMx_CCR2).
-  * @note Macro @ref IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
-  *       output channel 2 is supported by a timer instance.
-  * @rmtoll CCR2         CCR2          LL_TIM_OC_SetCompareCH2
-  * @param  TIMx Timer instance
-  * @param  CompareValue between Min_Data=0 and Max_Data=65535
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue)
-{
-  WRITE_REG(TIMx->CCR2, CompareValue);
-}
-
-/**
-  * @brief  Set compare value for output channel 3 (TIMx_CCR3).
-  * @note Macro @ref IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
-  *       output channel is supported by a timer instance.
-  * @rmtoll CCR3         CCR3          LL_TIM_OC_SetCompareCH3
-  * @param  TIMx Timer instance
-  * @param  CompareValue between Min_Data=0 and Max_Data=65535
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue)
-{
-  WRITE_REG(TIMx->CCR3, CompareValue);
-}
-
-/**
-  * @brief  Set compare value for output channel 4 (TIMx_CCR4).
-  * @note Macro @ref IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
-  *       output channel 4 is supported by a timer instance.
-  * @rmtoll CCR4         CCR4          LL_TIM_OC_SetCompareCH4
-  * @param  TIMx Timer instance
-  * @param  CompareValue between Min_Data=0 and Max_Data=65535
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue)
-{
-  WRITE_REG(TIMx->CCR4, CompareValue);
-}
-
-/**
-  * @brief  Get compare value (TIMx_CCR1) set for  output channel 1.
-  * @note Macro @ref IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
-  *       output channel 1 is supported by a timer instance.
-  * @rmtoll CCR1         CCR1          LL_TIM_OC_GetCompareCH1
-  * @param  TIMx Timer instance
-  * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
-  */
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_REG(TIMx->CCR1));
-}
-
-/**
-  * @brief  Get compare value (TIMx_CCR2) set for  output channel 2.
-  * @note Macro @ref IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
-  *       output channel 2 is supported by a timer instance.
-  * @rmtoll CCR2         CCR2          LL_TIM_OC_GetCompareCH2
-  * @param  TIMx Timer instance
-  * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
-  */
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_REG(TIMx->CCR2));
-}
-
-/**
-  * @brief  Get compare value (TIMx_CCR3) set for  output channel 3.
-  * @note Macro @ref IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
-  *       output channel 3 is supported by a timer instance.
-  * @rmtoll CCR3         CCR3          LL_TIM_OC_GetCompareCH3
-  * @param  TIMx Timer instance
-  * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
-  */
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_REG(TIMx->CCR3));
-}
-
-/**
-  * @brief  Get compare value (TIMx_CCR4) set for  output channel 4.
-  * @note Macro @ref IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
-  *       output channel 4 is supported by a timer instance.
-  * @rmtoll CCR4         CCR4          LL_TIM_OC_GetCompareCH4
-  * @param  TIMx Timer instance
-  * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
-  */
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_REG(TIMx->CCR4));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EF_Input_Channel Input channel configuration
-  * @{
-  */
-/**
-  * @brief  Configure input channel.
-  * @rmtoll CCMR1        CC1S          LL_TIM_IC_Config\n
-  *         CCMR1        IC1PSC        LL_TIM_IC_Config\n
-  *         CCMR1        IC1F          LL_TIM_IC_Config\n
-  *         CCMR1        CC2S          LL_TIM_IC_Config\n
-  *         CCMR1        IC2PSC        LL_TIM_IC_Config\n
-  *         CCMR1        IC2F          LL_TIM_IC_Config\n
-  *         CCMR2        CC3S          LL_TIM_IC_Config\n
-  *         CCMR2        IC3PSC        LL_TIM_IC_Config\n
-  *         CCMR2        IC3F          LL_TIM_IC_Config\n
-  *         CCMR2        CC4S          LL_TIM_IC_Config\n
-  *         CCMR2        IC4PSC        LL_TIM_IC_Config\n
-  *         CCMR2        IC4F          LL_TIM_IC_Config\n
-  *         CCER         CC1P          LL_TIM_IC_Config\n
-  *         CCER         CC1NP         LL_TIM_IC_Config\n
-  *         CCER         CC2P          LL_TIM_IC_Config\n
-  *         CCER         CC2NP         LL_TIM_IC_Config\n
-  *         CCER         CC3P          LL_TIM_IC_Config\n
-  *         CCER         CC3NP         LL_TIM_IC_Config\n
-  *         CCER         CC4P          LL_TIM_IC_Config\n
-  *         CCER         CC4NP         LL_TIM_IC_Config
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @param  Configuration This parameter must be a combination of all the following values:
-  *         @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI or @ref LL_TIM_ACTIVEINPUT_INDIRECTTI or @ref LL_TIM_ACTIVEINPUT_TRC
-  *         @arg @ref LL_TIM_ICPSC_DIV1 or ... or @ref LL_TIM_ICPSC_DIV8
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV1 or ... or @ref LL_TIM_IC_FILTER_FDIV32_N8
-  *         @arg @ref LL_TIM_IC_POLARITY_RISING or @ref LL_TIM_IC_POLARITY_FALLING or @ref LL_TIM_IC_POLARITY_BOTHEDGE
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]),
-             ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S))  << SHIFT_TAB_ICxx[iChannel]);
-  MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
-             (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]);
-}
-
-/**
-  * @brief  Set the active input.
-  * @rmtoll CCMR1        CC1S          LL_TIM_IC_SetActiveInput\n
-  *         CCMR1        CC2S          LL_TIM_IC_SetActiveInput\n
-  *         CCMR2        CC3S          LL_TIM_IC_SetActiveInput\n
-  *         CCMR2        CC4S          LL_TIM_IC_SetActiveInput
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @param  ICActiveInput This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
-  *         @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
-  *         @arg @ref LL_TIM_ACTIVEINPUT_TRC
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiveInput)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT_TAB_ICxx[iChannel]);
-}
-
-/**
-  * @brief  Get the current active input.
-  * @rmtoll CCMR1        CC1S          LL_TIM_IC_GetActiveInput\n
-  *         CCMR1        CC2S          LL_TIM_IC_GetActiveInput\n
-  *         CCMR2        CC3S          LL_TIM_IC_GetActiveInput\n
-  *         CCMR2        CC4S          LL_TIM_IC_GetActiveInput
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
-  *         @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
-  *         @arg @ref LL_TIM_ACTIVEINPUT_TRC
-  */
-__STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
-}
-
-/**
-  * @brief  Set the prescaler of input channel.
-  * @rmtoll CCMR1        IC1PSC        LL_TIM_IC_SetPrescaler\n
-  *         CCMR1        IC2PSC        LL_TIM_IC_SetPrescaler\n
-  *         CCMR2        IC3PSC        LL_TIM_IC_SetPrescaler\n
-  *         CCMR2        IC4PSC        LL_TIM_IC_SetPrescaler
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @param  ICPrescaler This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_ICPSC_DIV1
-  *         @arg @ref LL_TIM_ICPSC_DIV2
-  *         @arg @ref LL_TIM_ICPSC_DIV4
-  *         @arg @ref LL_TIM_ICPSC_DIV8
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescaler)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  MODIFY_REG(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel]), (ICPrescaler >> 16U) << SHIFT_TAB_ICxx[iChannel]);
-}
-
-/**
-  * @brief  Get the current prescaler value acting on an  input channel.
-  * @rmtoll CCMR1        IC1PSC        LL_TIM_IC_GetPrescaler\n
-  *         CCMR1        IC2PSC        LL_TIM_IC_GetPrescaler\n
-  *         CCMR2        IC3PSC        LL_TIM_IC_GetPrescaler\n
-  *         CCMR2        IC4PSC        LL_TIM_IC_GetPrescaler
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_TIM_ICPSC_DIV1
-  *         @arg @ref LL_TIM_ICPSC_DIV2
-  *         @arg @ref LL_TIM_ICPSC_DIV4
-  *         @arg @ref LL_TIM_ICPSC_DIV8
-  */
-__STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
-}
-
-/**
-  * @brief  Set the input filter duration.
-  * @rmtoll CCMR1        IC1F          LL_TIM_IC_SetFilter\n
-  *         CCMR1        IC2F          LL_TIM_IC_SetFilter\n
-  *         CCMR2        IC3F          LL_TIM_IC_SetFilter\n
-  *         CCMR2        IC4F          LL_TIM_IC_SetFilter
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @param  ICFilter This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV1
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV4_N6
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV4_N8
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV8_N6
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV8_N8
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV16_N5
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV16_N6
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV16_N8
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV32_N5
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel]), (ICFilter >> 16U) << SHIFT_TAB_ICxx[iChannel]);
-}
-
-/**
-  * @brief  Get the input filter duration.
-  * @rmtoll CCMR1        IC1F          LL_TIM_IC_GetFilter\n
-  *         CCMR1        IC2F          LL_TIM_IC_GetFilter\n
-  *         CCMR2        IC3F          LL_TIM_IC_GetFilter\n
-  *         CCMR2        IC4F          LL_TIM_IC_GetFilter
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV1
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV4_N6
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV4_N8
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV8_N6
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV8_N8
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV16_N5
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV16_N6
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV16_N8
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV32_N5
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
-  *         @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
-  */
-__STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(TIM_TypeDef *TIMx, uint32_t Channel)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
-  return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
-}
-
-/**
-  * @brief  Set the input channel polarity.
-  * @rmtoll CCER         CC1P          LL_TIM_IC_SetPolarity\n
-  *         CCER         CC1NP         LL_TIM_IC_SetPolarity\n
-  *         CCER         CC2P          LL_TIM_IC_SetPolarity\n
-  *         CCER         CC2NP         LL_TIM_IC_SetPolarity\n
-  *         CCER         CC3P          LL_TIM_IC_SetPolarity\n
-  *         CCER         CC3NP         LL_TIM_IC_SetPolarity\n
-  *         CCER         CC4P          LL_TIM_IC_SetPolarity\n
-  *         CCER         CC4NP         LL_TIM_IC_SetPolarity
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @param  ICPolarity This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_IC_POLARITY_RISING
-  *         @arg @ref LL_TIM_IC_POLARITY_FALLING
-  *         @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
-             ICPolarity << SHIFT_TAB_CCxP[iChannel]);
-}
-
-/**
-  * @brief  Get the current input channel polarity.
-  * @rmtoll CCER         CC1P          LL_TIM_IC_GetPolarity\n
-  *         CCER         CC1NP         LL_TIM_IC_GetPolarity\n
-  *         CCER         CC2P          LL_TIM_IC_GetPolarity\n
-  *         CCER         CC2NP         LL_TIM_IC_GetPolarity\n
-  *         CCER         CC3P          LL_TIM_IC_GetPolarity\n
-  *         CCER         CC3NP         LL_TIM_IC_GetPolarity\n
-  *         CCER         CC4P          LL_TIM_IC_GetPolarity\n
-  *         CCER         CC4NP         LL_TIM_IC_GetPolarity
-  * @param  TIMx Timer instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_TIM_IC_POLARITY_RISING
-  *         @arg @ref LL_TIM_IC_POLARITY_FALLING
-  *         @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
-  */
-__STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel)
-{
-  register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-  return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >>
-          SHIFT_TAB_CCxP[iChannel]);
-}
-
-/**
-  * @brief  Connect the TIMx_CH1, CH2 and CH3 pins  to the TI1 input (XOR combination).
-  * @note Macro @ref IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
-  *       a timer instance provides an XOR input.
-  * @rmtoll CR2          TI1S          LL_TIM_IC_EnableXORCombination
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->CR2, TIM_CR2_TI1S);
-}
-
-/**
-  * @brief  Disconnect the TIMx_CH1, CH2 and CH3 pins  from the TI1 input.
-  * @note Macro @ref IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
-  *       a timer instance provides an XOR input.
-  * @rmtoll CR2          TI1S          LL_TIM_IC_DisableXORCombination
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S);
-}
-
-/**
-  * @brief  Indicates whether the TIMx_CH1, CH2 and CH3 pins are connectected to the TI1 input.
-  * @note Macro @ref IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
-  * a timer instance provides an XOR input.
-  * @rmtoll CR2          TI1S          LL_TIM_IC_IsEnabledXORCombination
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S));
-}
-
-/**
-  * @brief  Get captured value for input channel 1.
-  * @note Macro @ref IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
-  *       input channel 1 is supported by a timer instance.
-  * @rmtoll CCR1         CCR1          LL_TIM_IC_GetCaptureCH1
-  * @param  TIMx Timer instance
-  * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
-  */
-__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_REG(TIMx->CCR1));
-}
-
-/**
-  * @brief  Get captured value for input channel 2.
-  * @note Macro @ref IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
-  *       input channel 2 is supported by a timer instance.
-  * @rmtoll CCR2         CCR2          LL_TIM_IC_GetCaptureCH2
-  * @param  TIMx Timer instance
-  * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
-  */
-__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_REG(TIMx->CCR2));
-}
-
-/**
-  * @brief  Get captured value for input channel 3.
-  * @note Macro @ref IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
-  *       input channel 3 is supported by a timer instance.
-  * @rmtoll CCR3         CCR3          LL_TIM_IC_GetCaptureCH3
-  * @param  TIMx Timer instance
-  * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
-  */
-__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_REG(TIMx->CCR3));
-}
-
-/**
-  * @brief  Get captured value for input channel 4.
-  * @note Macro @ref IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
-  *       input channel 4 is supported by a timer instance.
-  * @rmtoll CCR4         CCR4          LL_TIM_IC_GetCaptureCH4
-  * @param  TIMx Timer instance
-  * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
-  */
-__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(TIM_TypeDef *TIMx)
-{
-  return (uint32_t)(READ_REG(TIMx->CCR4));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EF_Clock_Selection Counter clock selection
-  * @{
-  */
-/**
-  * @brief  Enable external clock mode 2.
-  * @note When external clock mode 2 is enabled the counter is clocked by any active edge on the ETRF signal.
-  * @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
-  *       whether or not a timer instance supports external clock mode2.
-  * @rmtoll SMCR         ECE           LL_TIM_EnableExternalClock
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->SMCR, TIM_SMCR_ECE);
-}
-
-/**
-  * @brief  Disable external clock mode 2.
-  * @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
-  *       whether or not a timer instance supports external clock mode2.
-  * @rmtoll SMCR         ECE           LL_TIM_DisableExternalClock
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE);
-}
-
-/**
-  * @brief  Indicate whether external clock mode 2 is enabled.
-  * @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
-  *       whether or not a timer instance supports external clock mode2.
-  * @rmtoll SMCR         ECE           LL_TIM_IsEnabledExternalClock
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE));
-}
-
-/**
-  * @brief  Set the clock source of the counter clock.
-  * @note when selected clock source is external clock mode 1, the timer input
-  *       the external clock is applied is selected by calling the @ref LL_TIM_SetTriggerInput()
-  *       function. This timer input must be configured by calling
-  *       the @ref LL_TIM_IC_Config() function.
-  * @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(TIMx) can be used to check
-  *       whether or not a timer instance supports external clock mode1.
-  * @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
-  *       whether or not a timer instance supports external clock mode2.
-  * @rmtoll SMCR         SMS           LL_TIM_SetClockSource\n
-  *         SMCR         ECE           LL_TIM_SetClockSource
-  * @param  TIMx Timer instance
-  * @param  ClockSource This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CLOCKSOURCE_INTERNAL
-  *         @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE1
-  *         @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE2
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource)
-{
-  MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource);
-}
-
-/**
-  * @brief  Set the encoder interface mode.
-  * @note Macro @ref IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx) can be used to check
-  *       whether or not a timer instance supports the encoder mode.
-  * @rmtoll SMCR         SMS           LL_TIM_SetEncoderMode
-  * @param  TIMx Timer instance
-  * @param  EncoderMode This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_ENCODERMODE_X2_TI1
-  *         @arg @ref LL_TIM_ENCODERMODE_X2_TI2
-  *         @arg @ref LL_TIM_ENCODERMODE_X4_TI12
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode)
-{
-  MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EF_Timer_Synchronization Timer synchronisation configuration
-  * @{
-  */
-/**
-  * @brief  Set the trigger output (TRGO) used for timer synchronization .
-  * @note Macro @ref IS_TIM_MASTER_INSTANCE(TIMx) can be used to check
-  *       whether or not a timer instance can operate as a master timer.
-  * @rmtoll CR2          MMS           LL_TIM_SetTriggerOutput
-  * @param  TIMx Timer instance
-  * @param  TimerSynchronization This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_TRGO_RESET
-  *         @arg @ref LL_TIM_TRGO_ENABLE
-  *         @arg @ref LL_TIM_TRGO_UPDATE
-  *         @arg @ref LL_TIM_TRGO_CC1IF
-  *         @arg @ref LL_TIM_TRGO_OC1REF
-  *         @arg @ref LL_TIM_TRGO_OC2REF
-  *         @arg @ref LL_TIM_TRGO_OC3REF
-  *         @arg @ref LL_TIM_TRGO_OC4REF
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization)
-{
-  MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);
-}
-
-/**
-  * @brief  Set the synchronization mode of a slave timer.
-  * @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
-  *       a timer instance can operate as a slave timer.
-  * @rmtoll SMCR         SMS           LL_TIM_SetSlaveMode
-  * @param  TIMx Timer instance
-  * @param  SlaveMode This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_SLAVEMODE_DISABLED
-  *         @arg @ref LL_TIM_SLAVEMODE_RESET
-  *         @arg @ref LL_TIM_SLAVEMODE_GATED
-  *         @arg @ref LL_TIM_SLAVEMODE_TRIGGER
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode)
-{
-  MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode);
-}
-
-/**
-  * @brief  Set the selects the trigger input to be used to synchronize the counter.
-  * @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
-  *       a timer instance can operate as a slave timer.
-  * @rmtoll SMCR         TS            LL_TIM_SetTriggerInput
-  * @param  TIMx Timer instance
-  * @param  TriggerInput This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_TS_ITR0
-  *         @arg @ref LL_TIM_TS_ITR1
-  *         @arg @ref LL_TIM_TS_ITR2
-  *         @arg @ref LL_TIM_TS_ITR3
-  *         @arg @ref LL_TIM_TS_TI1F_ED
-  *         @arg @ref LL_TIM_TS_TI1FP1
-  *         @arg @ref LL_TIM_TS_TI2FP2
-  *         @arg @ref LL_TIM_TS_ETRF
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput)
-{
-  MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput);
-}
-
-/**
-  * @brief  Enable the Master/Slave mode.
-  * @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
-  *       a timer instance can operate as a slave timer.
-  * @rmtoll SMCR         MSM           LL_TIM_EnableMasterSlaveMode
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->SMCR, TIM_SMCR_MSM);
-}
-
-/**
-  * @brief  Disable the Master/Slave mode.
-  * @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
-  *       a timer instance can operate as a slave timer.
-  * @rmtoll SMCR         MSM           LL_TIM_DisableMasterSlaveMode
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);
-}
-
-/**
-  * @brief Indicates whether the Master/Slave mode is enabled.
-  * @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
-  * a timer instance can operate as a slave timer.
-  * @rmtoll SMCR         MSM           LL_TIM_IsEnabledMasterSlaveMode
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM));
-}
-
-/**
-  * @brief  Configure the external trigger (ETR) input.
-  * @note Macro @ref IS_TIM_ETR_INSTANCE(TIMx) can be used to check whether or not
-  *       a timer instance provides an external trigger input.
-  * @rmtoll SMCR         ETP           LL_TIM_ConfigETR\n
-  *         SMCR         ETPS          LL_TIM_ConfigETR\n
-  *         SMCR         ETF           LL_TIM_ConfigETR
-  * @param  TIMx Timer instance
-  * @param  ETRPolarity This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_ETR_POLARITY_NONINVERTED
-  *         @arg @ref LL_TIM_ETR_POLARITY_INVERTED
-  * @param  ETRPrescaler This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_ETR_PRESCALER_DIV1
-  *         @arg @ref LL_TIM_ETR_PRESCALER_DIV2
-  *         @arg @ref LL_TIM_ETR_PRESCALER_DIV4
-  *         @arg @ref LL_TIM_ETR_PRESCALER_DIV8
-  * @param  ETRFilter This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_ETR_FILTER_FDIV1
-  *         @arg @ref LL_TIM_ETR_FILTER_FDIV1_N2
-  *         @arg @ref LL_TIM_ETR_FILTER_FDIV1_N4
-  *         @arg @ref LL_TIM_ETR_FILTER_FDIV1_N8
-  *         @arg @ref LL_TIM_ETR_FILTER_FDIV2_N6
-  *         @arg @ref LL_TIM_ETR_FILTER_FDIV2_N8
-  *         @arg @ref LL_TIM_ETR_FILTER_FDIV4_N6
-  *         @arg @ref LL_TIM_ETR_FILTER_FDIV4_N8
-  *         @arg @ref LL_TIM_ETR_FILTER_FDIV8_N6
-  *         @arg @ref LL_TIM_ETR_FILTER_FDIV8_N8
-  *         @arg @ref LL_TIM_ETR_FILTER_FDIV16_N5
-  *         @arg @ref LL_TIM_ETR_FILTER_FDIV16_N6
-  *         @arg @ref LL_TIM_ETR_FILTER_FDIV16_N8
-  *         @arg @ref LL_TIM_ETR_FILTER_FDIV32_N5
-  *         @arg @ref LL_TIM_ETR_FILTER_FDIV32_N6
-  *         @arg @ref LL_TIM_ETR_FILTER_FDIV32_N8
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescaler,
-                                      uint32_t ETRFilter)
-{
-  MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | ETRFilter);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EF_DMA_Burst_Mode DMA burst mode configuration
-  * @{
-  */
-/**
-  * @brief  Configures the timer DMA burst feature.
-  * @note Macro @ref IS_TIM_DMABURST_INSTANCE(TIMx) can be used to check whether or
-  *       not a timer instance supports the DMA burst mode.
-  * @rmtoll DCR          DBL           LL_TIM_ConfigDMABurst\n
-  *         DCR          DBA           LL_TIM_ConfigDMABurst
-  * @param  TIMx Timer instance
-  * @param  DMABurstBaseAddress This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CR1
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CR2
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_SMCR
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_DIER
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_SR
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_EGR
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR1
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR2
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCER
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CNT
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_PSC
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_ARR
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_RCR
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCR1
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCR2
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCR3
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCR4
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_BDTR
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR3
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCR5
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCR6
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_OR1
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_OR2
-  *         @arg @ref LL_TIM_DMABURST_BASEADDR_OR3
-  * @param  DMABurstLength This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_4TRANSFERS
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_5TRANSFERS
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_6TRANSFERS
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_7TRANSFERS
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_8TRANSFERS
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_9TRANSFERS
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_10TRANSFERS
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_11TRANSFERS
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_12TRANSFERS
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_13TRANSFERS
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_14TRANSFERS
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_15TRANSFERS
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_16TRANSFERS
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_17TRANSFERS
-  *         @arg @ref LL_TIM_DMABURST_LENGTH_18TRANSFERS
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_t DMABurstLength)
-{
-  MODIFY_REG(TIMx->DCR, TIM_DCR_DBL | TIM_DCR_DBA, DMABurstBaseAddress | DMABurstLength);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EF_Timer_Inputs_Remapping Timer input remapping
-  * @{
-  */
-/**
-  * @brief  Remap TIM inputs (input channel, internal/external triggers).
-  * @note Macro @ref IS_TIM_REMAP_INSTANCE(TIMx) can be used to check whether or not
-  *       a some timer inputs can be remapped.
-  * @rmtoll TIM2_OR     ETR_RMP      LL_TIM_SetRemap\n
-  *         TIM2_OR     TI4_RMP      LL_TIM_SetRemap\n
-  *         TIM21_OR    ETR_RMP      LL_TIM_SetRemap\n
-  *         TIM21_OR    TI1_RMP      LL_TIM_SetRemap\n
-  *         TIM21_OR    TI2_RMP      LL_TIM_SetRemap\n
-  *         TIM22_OR    ETR_RMP      LL_TIM_SetRemap\n
-  *         TIM22_OR    TI1_RMP      LL_TIM_SetRemap\n
-  *         TIM3_OR     ETR_RMP      LL_TIM_SetRemap\n
-  *         TIM3_OR     TI1_RMP      LL_TIM_SetRemap\n
-  *         TIM3_OR     TI2_RMP      LL_TIM_SetRemap\n
-  *         TIM3_OR     TI4_RMP      LL_TIM_SetRemap
-  * @param  TIMx Timer instance
-  * @param  Remap Remap params depends on the TIMx. Description available only
-  *         in CHM version of the User Manual (not in .pdf).
-  *         Otherwise see Reference Manual description of OR registers.
-  *
-  *         Below description summarizes "Timer Instance" and "Remap" param combinations:
-  *
-  *         TIM2: any combination of ETR_RMP, TI4_RMP where
-  *
-  *            . . ETR_RMP can be one of the following values
-  *            @arg @ref LL_TIM_TIM2_ETR_RMP_GPIO
-  *            @arg @ref LL_TIM_TIM2_ETR_RMP_HSI   (*)
-  *            @arg @ref LL_TIM_TIM2_ETR_RMP_HSI48 (*)
-  *            @arg @ref LL_TIM_TIM2_ETR_RMP_LSE
-  *            @arg @ref LL_TIM_TIM2_ETR_RMP_COMP2
-  *            @arg @ref LL_TIM_TIM2_ETR_RMP_COMP1
-  *
-  *            . . TI4_RMP can be one of the following values
-  *            @arg @ref LL_TIM_TIM2_TI4_RMP_GPIO
-  *            @arg @ref LL_TIM_TIM2_TI4_RMP_COMP1
-  *            @arg @ref LL_TIM_TIM2_TI4_RMP_COMP2
-  *
-  *         TIM3: any combination of the following values        (**)
-  *
-  *            . . ETR_RMP can be one of the following values    (**)
-  *            @arg @ref LL_TIM_TIM3_ETR_RMP_GPIO
-  *            @arg @ref LL_TIM_TIM3_ETR_RMP_HSI48DIV6
-  *
-  *            . . TI_RMP_TI1 can be one of the following values (**)
-  *            @arg @ref LL_TIM_TIM3_TI_RMP_TI1_USB_SOF
-  *            @arg @ref LL_TIM_TIM3_TI_RMP_TI1_GPIO
-  *
-  *            . . TI_RMP_TI2 can be one of the following values (**)
-  *            @arg @ref LL_TIM_TIM3_TI_RMP_TI2_GPIO_DEF
-  *            @arg @ref LL_TIM_TIM3_TI_RMP_TI2_GPIOB5_AF4
-  *
-  *            . . TI_RMP_TI4 can be one of the following values (**)
-  *            @arg @ref LL_TIM_TIM3_TI_RMP_TI4_GPIO_DEF
-  *            @arg @ref LL_TIM_TIM3_TI_RMP_TI4_GPIOC9_AF2
-  *
-  *         TIM21: any combination of ETR_RMP, TI1_RMP, TI2_RMP where
-  *
-  *            . . ETR_RMP can be one of the following values
-  *            @arg @ref LL_TIM_TIM21_ETR_RMP_GPIO
-  *            @arg @ref LL_TIM_TIM21_ETR_RMP_COMP2
-  *            @arg @ref LL_TIM_TIM21_ETR_RMP_COMP1
-  *            @arg @ref LL_TIM_TIM21_ETR_RMP_LSE
-  *
-  *            . . TI1_RMP can be one of the following values
-  *            @arg @ref LL_TIM_TIM21_TI1_RMP_GPIO
-  *            @arg @ref LL_TIM_TIM21_TI1_RMP_RTC_WK
-  *            @arg @ref LL_TIM_TIM21_TI1_RMP_HSE_RTC
-  *            @arg @ref LL_TIM_TIM21_TI1_RMP_MSI
-  *            @arg @ref LL_TIM_TIM21_TI1_RMP_LSE
-  *            @arg @ref LL_TIM_TIM21_TI1_RMP_LSI
-  *            @arg @ref LL_TIM_TIM21_TI1_RMP_COMP1
-  *            @arg @ref LL_TIM_TIM21_TI1_RMP_MCO
-  *
-  *            . . TI2_RMP can be one of the following values
-  *            @arg @ref LL_TIM_TIM21_TI2_RMP_GPIO
-  *            @arg @ref LL_TIM_TIM21_TI2_RMP_COMP2
-  *
-  *         TIM22: any combination of ETR_RMP, TI1_RMP where  (**)
-  *
-  *            . . ETR_RMP can be one of the following values (**)
-  *            @arg @ref LL_TIM_TIM22_ETR_RMP_GPIO
-  *            @arg @ref LL_TIM_TIM22_ETR_RMP_COMP2
-  *            @arg @ref LL_TIM_TIM22_ETR_RMP_COMP1
-  *            @arg @ref LL_TIM_TIM22_ETR_RMP_LSE
-  *
-  *            . . TI1_RMP can be one of the following values (**)
-  *            @arg @ref LL_TIM_TIM22_TI1_RMP_GPIO1
-  *            @arg @ref LL_TIM_TIM22_TI1_RMP_COMP2
-  *            @arg @ref LL_TIM_TIM22_TI1_RMP_COMP1
-  *            @arg @ref LL_TIM_TIM22_TI1_RMP_GPIO2
-  *
-  *         (*) Value not defined in all devices. \n
-  *         (*) Register not available in all devices.
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap)
-{
-  MODIFY_REG(TIMx->OR, (Remap >> TIMx_OR_RMP_SHIFT), (Remap & TIMx_OR_RMP_MASK));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EF_OCREF_Clear OCREF_Clear_Management
-  * @{
-  */
-/**
-  * @brief  Set the OCREF clear input source
-  * @note The OCxREF signal of a given channel can be cleared when a high level is applied on the OCREF_CLR_INPUT
-  * @note This function can only be used in Output compare and PWM modes.
-  * @rmtoll SMCR          OCCS                LL_TIM_SetOCRefClearInputSource
-  * @param  TIMx Timer instance
-  * @param  OCRefClearInputSource This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_OCREF_CLR_INT_NC
-  *         @arg @ref LL_TIM_OCREF_CLR_INT_ETR
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_SetOCRefClearInputSource(TIM_TypeDef *TIMx, uint32_t OCRefClearInputSource)
-{
-  MODIFY_REG(TIMx->SMCR, TIM_SMCR_OCCS, OCRefClearInputSource);
-}
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EF_FLAG_Management FLAG-Management
-  * @{
-  */
-/**
-  * @brief  Clear the update interrupt flag (UIF).
-  * @rmtoll SR           UIF           LL_TIM_ClearFlag_UPDATE
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx)
-{
-  WRITE_REG(TIMx->SR, ~(TIM_SR_UIF));
-}
-
-/**
-  * @brief  Indicate whether update interrupt flag (UIF) is set (update interrupt is pending).
-  * @rmtoll SR           UIF           LL_TIM_IsActiveFlag_UPDATE
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF));
-}
-
-/**
-  * @brief  Clear the Capture/Compare 1 interrupt flag (CC1F).
-  * @rmtoll SR           CC1IF         LL_TIM_ClearFlag_CC1
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx)
-{
-  WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF));
-}
-
-/**
-  * @brief  Indicate whether Capture/Compare 1 interrupt flag (CC1F) is set (Capture/Compare 1 interrupt is pending).
-  * @rmtoll SR           CC1IF         LL_TIM_IsActiveFlag_CC1
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF));
-}
-
-/**
-  * @brief  Clear the Capture/Compare 2 interrupt flag (CC2F).
-  * @rmtoll SR           CC2IF         LL_TIM_ClearFlag_CC2
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx)
-{
-  WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF));
-}
-
-/**
-  * @brief  Indicate whether Capture/Compare 2 interrupt flag (CC2F) is set (Capture/Compare 2 interrupt is pending).
-  * @rmtoll SR           CC2IF         LL_TIM_IsActiveFlag_CC2
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF));
-}
-
-/**
-  * @brief  Clear the Capture/Compare 3 interrupt flag (CC3F).
-  * @rmtoll SR           CC3IF         LL_TIM_ClearFlag_CC3
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx)
-{
-  WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF));
-}
-
-/**
-  * @brief  Indicate whether Capture/Compare 3 interrupt flag (CC3F) is set (Capture/Compare 3 interrupt is pending).
-  * @rmtoll SR           CC3IF         LL_TIM_IsActiveFlag_CC3
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF));
-}
-
-/**
-  * @brief  Clear the Capture/Compare 4 interrupt flag (CC4F).
-  * @rmtoll SR           CC4IF         LL_TIM_ClearFlag_CC4
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx)
-{
-  WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF));
-}
-
-/**
-  * @brief  Indicate whether Capture/Compare 4 interrupt flag (CC4F) is set (Capture/Compare 4 interrupt is pending).
-  * @rmtoll SR           CC4IF         LL_TIM_IsActiveFlag_CC4
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF));
-}
-
-/**
-  * @brief  Clear the trigger interrupt flag (TIF).
-  * @rmtoll SR           TIF           LL_TIM_ClearFlag_TRIG
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx)
-{
-  WRITE_REG(TIMx->SR, ~(TIM_SR_TIF));
-}
-
-/**
-  * @brief  Indicate whether trigger interrupt flag (TIF) is set (trigger interrupt is pending).
-  * @rmtoll SR           TIF           LL_TIM_IsActiveFlag_TRIG
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF));
-}
-
-/**
-  * @brief  Clear the Capture/Compare 1 over-capture interrupt flag (CC1OF).
-  * @rmtoll SR           CC1OF         LL_TIM_ClearFlag_CC1OVR
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx)
-{
-  WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF));
-}
-
-/**
-  * @brief  Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set (Capture/Compare 1 interrupt is pending).
-  * @rmtoll SR           CC1OF         LL_TIM_IsActiveFlag_CC1OVR
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF));
-}
-
-/**
-  * @brief  Clear the Capture/Compare 2 over-capture interrupt flag (CC2OF).
-  * @rmtoll SR           CC2OF         LL_TIM_ClearFlag_CC2OVR
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx)
-{
-  WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF));
-}
-
-/**
-  * @brief  Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set (Capture/Compare 2 over-capture interrupt is pending).
-  * @rmtoll SR           CC2OF         LL_TIM_IsActiveFlag_CC2OVR
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF));
-}
-
-/**
-  * @brief  Clear the Capture/Compare 3 over-capture interrupt flag (CC3OF).
-  * @rmtoll SR           CC3OF         LL_TIM_ClearFlag_CC3OVR
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx)
-{
-  WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF));
-}
-
-/**
-  * @brief  Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set (Capture/Compare 3 over-capture interrupt is pending).
-  * @rmtoll SR           CC3OF         LL_TIM_IsActiveFlag_CC3OVR
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF));
-}
-
-/**
-  * @brief  Clear the Capture/Compare 4 over-capture interrupt flag (CC4OF).
-  * @rmtoll SR           CC4OF         LL_TIM_ClearFlag_CC4OVR
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx)
-{
-  WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF));
-}
-
-/**
-  * @brief  Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set (Capture/Compare 4 over-capture interrupt is pending).
-  * @rmtoll SR           CC4OF         LL_TIM_IsActiveFlag_CC4OVR
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EF_IT_Management IT-Management
-  * @{
-  */
-/**
-  * @brief  Enable update interrupt (UIE).
-  * @rmtoll DIER         UIE           LL_TIM_EnableIT_UPDATE
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->DIER, TIM_DIER_UIE);
-}
-
-/**
-  * @brief  Disable update interrupt (UIE).
-  * @rmtoll DIER         UIE           LL_TIM_DisableIT_UPDATE
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE);
-}
-
-/**
-  * @brief  Indicates whether the update interrupt (UIE) is enabled.
-  * @rmtoll DIER         UIE           LL_TIM_IsEnabledIT_UPDATE
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE));
-}
-
-/**
-  * @brief  Enable capture/compare 1 interrupt (CC1IE).
-  * @rmtoll DIER         CC1IE         LL_TIM_EnableIT_CC1
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->DIER, TIM_DIER_CC1IE);
-}
-
-/**
-  * @brief  Disable capture/compare 1  interrupt (CC1IE).
-  * @rmtoll DIER         CC1IE         LL_TIM_DisableIT_CC1
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE);
-}
-
-/**
-  * @brief  Indicates whether the capture/compare 1 interrupt (CC1IE) is enabled.
-  * @rmtoll DIER         CC1IE         LL_TIM_IsEnabledIT_CC1
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE));
-}
-
-/**
-  * @brief  Enable capture/compare 2 interrupt (CC2IE).
-  * @rmtoll DIER         CC2IE         LL_TIM_EnableIT_CC2
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->DIER, TIM_DIER_CC2IE);
-}
-
-/**
-  * @brief  Disable capture/compare 2  interrupt (CC2IE).
-  * @rmtoll DIER         CC2IE         LL_TIM_DisableIT_CC2
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE);
-}
-
-/**
-  * @brief  Indicates whether the capture/compare 2 interrupt (CC2IE) is enabled.
-  * @rmtoll DIER         CC2IE         LL_TIM_IsEnabledIT_CC2
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE));
-}
-
-/**
-  * @brief  Enable capture/compare 3 interrupt (CC3IE).
-  * @rmtoll DIER         CC3IE         LL_TIM_EnableIT_CC3
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->DIER, TIM_DIER_CC3IE);
-}
-
-/**
-  * @brief  Disable capture/compare 3  interrupt (CC3IE).
-  * @rmtoll DIER         CC3IE         LL_TIM_DisableIT_CC3
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE);
-}
-
-/**
-  * @brief  Indicates whether the capture/compare 3 interrupt (CC3IE) is enabled.
-  * @rmtoll DIER         CC3IE         LL_TIM_IsEnabledIT_CC3
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE));
-}
-
-/**
-  * @brief  Enable capture/compare 4 interrupt (CC4IE).
-  * @rmtoll DIER         CC4IE         LL_TIM_EnableIT_CC4
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->DIER, TIM_DIER_CC4IE);
-}
-
-/**
-  * @brief  Disable capture/compare 4  interrupt (CC4IE).
-  * @rmtoll DIER         CC4IE         LL_TIM_DisableIT_CC4
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE);
-}
-
-/**
-  * @brief  Indicates whether the capture/compare 4 interrupt (CC4IE) is enabled.
-  * @rmtoll DIER         CC4IE         LL_TIM_IsEnabledIT_CC4
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE));
-}
-
-/**
-  * @brief  Enable trigger interrupt (TIE).
-  * @rmtoll DIER         TIE           LL_TIM_EnableIT_TRIG
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->DIER, TIM_DIER_TIE);
-}
-
-/**
-  * @brief  Disable trigger interrupt (TIE).
-  * @rmtoll DIER         TIE           LL_TIM_DisableIT_TRIG
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE);
-}
-
-/**
-  * @brief  Indicates whether the trigger interrupt (TIE) is enabled.
-  * @rmtoll DIER         TIE           LL_TIM_IsEnabledIT_TRIG
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EF_DMA_Management DMA-Management
-  * @{
-  */
-/**
-  * @brief  Enable update DMA request (UDE).
-  * @rmtoll DIER         UDE           LL_TIM_EnableDMAReq_UPDATE
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->DIER, TIM_DIER_UDE);
-}
-
-/**
-  * @brief  Disable update DMA request (UDE).
-  * @rmtoll DIER         UDE           LL_TIM_DisableDMAReq_UPDATE
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE);
-}
-
-/**
-  * @brief  Indicates whether the update DMA request  (UDE) is enabled.
-  * @rmtoll DIER         UDE           LL_TIM_IsEnabledDMAReq_UPDATE
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE));
-}
-
-/**
-  * @brief  Enable capture/compare 1 DMA request (CC1DE).
-  * @rmtoll DIER         CC1DE         LL_TIM_EnableDMAReq_CC1
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->DIER, TIM_DIER_CC1DE);
-}
-
-/**
-  * @brief  Disable capture/compare 1  DMA request (CC1DE).
-  * @rmtoll DIER         CC1DE         LL_TIM_DisableDMAReq_CC1
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE);
-}
-
-/**
-  * @brief  Indicates whether the capture/compare 1 DMA request (CC1DE) is enabled.
-  * @rmtoll DIER         CC1DE         LL_TIM_IsEnabledDMAReq_CC1
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE));
-}
-
-/**
-  * @brief  Enable capture/compare 2 DMA request (CC2DE).
-  * @rmtoll DIER         CC2DE         LL_TIM_EnableDMAReq_CC2
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->DIER, TIM_DIER_CC2DE);
-}
-
-/**
-  * @brief  Disable capture/compare 2  DMA request (CC2DE).
-  * @rmtoll DIER         CC2DE         LL_TIM_DisableDMAReq_CC2
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE);
-}
-
-/**
-  * @brief  Indicates whether the capture/compare 2 DMA request (CC2DE) is enabled.
-  * @rmtoll DIER         CC2DE         LL_TIM_IsEnabledDMAReq_CC2
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE));
-}
-
-/**
-  * @brief  Enable capture/compare 3 DMA request (CC3DE).
-  * @rmtoll DIER         CC3DE         LL_TIM_EnableDMAReq_CC3
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->DIER, TIM_DIER_CC3DE);
-}
-
-/**
-  * @brief  Disable capture/compare 3  DMA request (CC3DE).
-  * @rmtoll DIER         CC3DE         LL_TIM_DisableDMAReq_CC3
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE);
-}
-
-/**
-  * @brief  Indicates whether the capture/compare 3 DMA request (CC3DE) is enabled.
-  * @rmtoll DIER         CC3DE         LL_TIM_IsEnabledDMAReq_CC3
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE));
-}
-
-/**
-  * @brief  Enable capture/compare 4 DMA request (CC4DE).
-  * @rmtoll DIER         CC4DE         LL_TIM_EnableDMAReq_CC4
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->DIER, TIM_DIER_CC4DE);
-}
-
-/**
-  * @brief  Disable capture/compare 4  DMA request (CC4DE).
-  * @rmtoll DIER         CC4DE         LL_TIM_DisableDMAReq_CC4
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE);
-}
-
-/**
-  * @brief  Indicates whether the capture/compare 4 DMA request (CC4DE) is enabled.
-  * @rmtoll DIER         CC4DE         LL_TIM_IsEnabledDMAReq_CC4
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE));
-}
-
-/**
-  * @brief  Enable trigger interrupt (TDE).
-  * @rmtoll DIER         TDE           LL_TIM_EnableDMAReq_TRIG
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->DIER, TIM_DIER_TDE);
-}
-
-/**
-  * @brief  Disable trigger interrupt (TDE).
-  * @rmtoll DIER         TDE           LL_TIM_DisableDMAReq_TRIG
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx)
-{
-  CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE);
-}
-
-/**
-  * @brief  Indicates whether the trigger interrupt (TDE) is enabled.
-  * @rmtoll DIER         TDE           LL_TIM_IsEnabledDMAReq_TRIG
-  * @param  TIMx Timer instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(TIM_TypeDef *TIMx)
-{
-  return (READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_LL_EF_EVENT_Management EVENT-Management
-  * @{
-  */
-/**
-  * @brief  Generate an update event.
-  * @rmtoll EGR          UG            LL_TIM_GenerateEvent_UPDATE
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->EGR, TIM_EGR_UG);
-}
-
-/**
-  * @brief  Generate Capture/Compare 1 event.
-  * @rmtoll EGR          CC1G          LL_TIM_GenerateEvent_CC1
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_GenerateEvent_CC1(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->EGR, TIM_EGR_CC1G);
-}
-
-/**
-  * @brief  Generate Capture/Compare 2 event.
-  * @rmtoll EGR          CC2G          LL_TIM_GenerateEvent_CC2
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_GenerateEvent_CC2(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->EGR, TIM_EGR_CC2G);
-}
-
-/**
-  * @brief  Generate Capture/Compare 3 event.
-  * @rmtoll EGR          CC3G          LL_TIM_GenerateEvent_CC3
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_GenerateEvent_CC3(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->EGR, TIM_EGR_CC3G);
-}
-
-/**
-  * @brief  Generate Capture/Compare 4 event.
-  * @rmtoll EGR          CC4G          LL_TIM_GenerateEvent_CC4
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_GenerateEvent_CC4(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->EGR, TIM_EGR_CC4G);
-}
-
-/**
-  * @brief  Generate trigger event.
-  * @rmtoll EGR          TG            LL_TIM_GenerateEvent_TRIG
-  * @param  TIMx Timer instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef *TIMx)
-{
-  SET_BIT(TIMx->EGR, TIM_EGR_TG);
-}
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup TIM_LL_EF_Init Initialisation and deinitialisation functions
-  * @{
-  */
-
-ErrorStatus LL_TIM_DeInit(TIM_TypeDef *TIMx);
-void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct);
-ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct);
-void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct);
-ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct);
-void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
-ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef *TIM_IC_InitStruct);
-void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct);
-ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct);
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* TIM1 || TIM3 || TIM21 || TIM22 || TIM6 || TIM7 */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_TIM_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h
deleted file mode 100755
index 460dce24..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h
+++ /dev/null
@@ -1,3720 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_usart.h
-  * @author  MCD Application Team
-  * @brief   Header file of USART LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_USART_H
-#define __STM32L0xx_LL_USART_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (USART1) || defined (USART2) || defined (USART4) || defined (USART5)
-
-/** @defgroup USART_LL USART
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup USART_LL_Private_Constants USART Private Constants
-  * @{
-  */
-
-/* Defines used for the bit position in the register and perform offsets*/
-#define USART_POSITION_CR1_DEDT                 (uint32_t)16
-#define USART_POSITION_CR1_DEAT                 (uint32_t)21
-#define USART_POSITION_CR2_ADD                  (uint32_t)24
-#define USART_POSITION_CR3_SCARCNT              (uint32_t)17
-#define USART_POSITION_RTOR_BLEN                (uint32_t)24
-#define USART_POSITION_GTPR_GT                  (uint32_t)8
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup USART_LL_Private_Macros USART Private Macros
-  * @{
-  */
-/**
-  * @}
-  */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup USART_LL_ES_INIT USART Exported Init structures
-  * @{
-  */
-
-/**
-  * @brief LL USART Init Structure definition
-  */
-typedef struct
-{
-  uint32_t BaudRate;                  /*!< This field defines expected Usart communication baud rate.
-
-                                           This feature can be modified afterwards using unitary function @ref LL_USART_SetBaudRate().*/
-
-  uint32_t DataWidth;                 /*!< Specifies the number of data bits transmitted or received in a frame.
-                                           This parameter can be a value of @ref USART_LL_EC_DATAWIDTH.
-
-                                           This feature can be modified afterwards using unitary function @ref LL_USART_SetDataWidth().*/
-
-  uint32_t StopBits;                  /*!< Specifies the number of stop bits transmitted.
-                                           This parameter can be a value of @ref USART_LL_EC_STOPBITS.
-
-                                           This feature can be modified afterwards using unitary function @ref LL_USART_SetStopBitsLength().*/
-
-  uint32_t Parity;                    /*!< Specifies the parity mode.
-                                           This parameter can be a value of @ref USART_LL_EC_PARITY.
-
-                                           This feature can be modified afterwards using unitary function @ref LL_USART_SetParity().*/
-
-  uint32_t TransferDirection;         /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
-                                           This parameter can be a value of @ref USART_LL_EC_DIRECTION.
-
-                                           This feature can be modified afterwards using unitary function @ref LL_USART_SetTransferDirection().*/
-
-  uint32_t HardwareFlowControl;       /*!< Specifies whether the hardware flow control mode is enabled or disabled.
-                                           This parameter can be a value of @ref USART_LL_EC_HWCONTROL.
-
-                                           This feature can be modified afterwards using unitary function @ref LL_USART_SetHWFlowCtrl().*/
-
-  uint32_t OverSampling;              /*!< Specifies whether USART oversampling mode is 16 or 8.
-                                           This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING.
-
-                                           This feature can be modified afterwards using unitary function @ref LL_USART_SetOverSampling().*/
-
-} LL_USART_InitTypeDef;
-
-/**
-  * @brief LL USART Clock Init Structure definition
-  */
-typedef struct
-{
-  uint32_t ClockOutput;               /*!< Specifies whether the USART clock is enabled or disabled.
-                                           This parameter can be a value of @ref USART_LL_EC_CLOCK.
-
-                                           USART HW configuration can be modified afterwards using unitary functions
-                                           @ref LL_USART_EnableSCLKOutput() or @ref LL_USART_DisableSCLKOutput().
-                                           For more details, refer to description of this function. */
-
-  uint32_t ClockPolarity;             /*!< Specifies the steady state of the serial clock.
-                                           This parameter can be a value of @ref USART_LL_EC_POLARITY.
-
-                                           USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPolarity().
-                                           For more details, refer to description of this function. */
-
-  uint32_t ClockPhase;                /*!< Specifies the clock transition on which the bit capture is made.
-                                           This parameter can be a value of @ref USART_LL_EC_PHASE.
-
-                                           USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPhase().
-                                           For more details, refer to description of this function. */
-
-  uint32_t LastBitClockPulse;         /*!< Specifies whether the clock pulse corresponding to the last transmitted
-                                           data bit (MSB) has to be output on the SCLK pin in synchronous mode.
-                                           This parameter can be a value of @ref USART_LL_EC_LASTCLKPULSE.
-
-                                           USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetLastClkPulseOutput().
-                                           For more details, refer to description of this function. */
-
-} LL_USART_ClockInitTypeDef;
-
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup USART_LL_Exported_Constants USART Exported Constants
-  * @{
-  */
-
-/** @defgroup USART_LL_EC_CLEAR_FLAG Clear Flags Defines
-  * @brief    Flags defines which can be used with LL_USART_WriteReg function
-  * @{
-  */
-#define LL_USART_ICR_PECF                       USART_ICR_PECF                /*!< Parity error flag */
-#define LL_USART_ICR_FECF                       USART_ICR_FECF                /*!< Framing error flag */
-#define LL_USART_ICR_NCF                        USART_ICR_NCF                 /*!< Noise detected flag */
-#define LL_USART_ICR_ORECF                      USART_ICR_ORECF               /*!< Overrun error flag */
-#define LL_USART_ICR_IDLECF                     USART_ICR_IDLECF              /*!< Idle line detected flag */
-#define LL_USART_ICR_TCCF                       USART_ICR_TCCF                /*!< Transmission complete flag */
-#if defined(USART_TCBGT_SUPPORT)
-#define LL_USART_ICR_TCBGTCF                    USART_ICR_TCBGTCF             /*!< Transmission completed before guard time flag */
-#endif
-#define LL_USART_ICR_LBDCF                      USART_ICR_LBDCF               /*!< LIN break detection flag */
-#define LL_USART_ICR_CTSCF                      USART_ICR_CTSCF               /*!< CTS flag */
-#define LL_USART_ICR_RTOCF                      USART_ICR_RTOCF               /*!< Receiver timeout flag */
-#define LL_USART_ICR_EOBCF                      USART_ICR_EOBCF               /*!< End of block flag */
-#define LL_USART_ICR_CMCF                       USART_ICR_CMCF                /*!< Character match flag */
-#define LL_USART_ICR_WUCF                       USART_ICR_WUCF                /*!< Wakeup from Stop mode flag */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines
-  * @brief    Flags defines which can be used with LL_USART_ReadReg function
-  * @{
-  */
-#define LL_USART_ISR_PE                         USART_ISR_PE                  /*!< Parity error flag */
-#define LL_USART_ISR_FE                         USART_ISR_FE                  /*!< Framing error flag */
-#define LL_USART_ISR_NE                         USART_ISR_NE                  /*!< Noise detected flag */
-#define LL_USART_ISR_ORE                        USART_ISR_ORE                 /*!< Overrun error flag */
-#define LL_USART_ISR_IDLE                       USART_ISR_IDLE                /*!< Idle line detected flag */
-#define LL_USART_ISR_RXNE                       USART_ISR_RXNE                /*!< Read data register not empty flag */
-#define LL_USART_ISR_TC                         USART_ISR_TC                  /*!< Transmission complete flag */
-#define LL_USART_ISR_TXE                        USART_ISR_TXE                 /*!< Transmit data register empty flag */
-#define LL_USART_ISR_LBDF                       USART_ISR_LBDF                /*!< LIN break detection flag */
-#define LL_USART_ISR_CTSIF                      USART_ISR_CTSIF               /*!< CTS interrupt flag */
-#define LL_USART_ISR_CTS                        USART_ISR_CTS                 /*!< CTS flag */
-#define LL_USART_ISR_RTOF                       USART_ISR_RTOF                /*!< Receiver timeout flag */
-#define LL_USART_ISR_EOBF                       USART_ISR_EOBF                /*!< End of block flag */
-#define LL_USART_ISR_ABRE                       USART_ISR_ABRE                /*!< Auto baud rate error flag */
-#define LL_USART_ISR_ABRF                       USART_ISR_ABRF                /*!< Auto baud rate flag */
-#define LL_USART_ISR_BUSY                       USART_ISR_BUSY                /*!< Busy flag */
-#define LL_USART_ISR_CMF                        USART_ISR_CMF                 /*!< Character match flag */
-#define LL_USART_ISR_SBKF                       USART_ISR_SBKF                /*!< Send break flag */
-#define LL_USART_ISR_RWU                        USART_ISR_RWU                 /*!< Receiver wakeup from Mute mode flag */
-#define LL_USART_ISR_WUF                        USART_ISR_WUF                 /*!< Wakeup from Stop mode flag */
-#define LL_USART_ISR_TEACK                      USART_ISR_TEACK               /*!< Transmit enable acknowledge flag */
-#define LL_USART_ISR_REACK                      USART_ISR_REACK               /*!< Receive enable acknowledge flag */
-#if defined(USART_TCBGT_SUPPORT)
-#define LL_USART_ISR_TCBGT                      USART_ISR_TCBGT               /*!< Transmission complete before guard time completion flag */
-#endif
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_IT IT Defines
-  * @brief    IT defines which can be used with LL_USART_ReadReg and  LL_USART_WriteReg functions
-  * @{
-  */
-#define LL_USART_CR1_IDLEIE                     USART_CR1_IDLEIE              /*!< IDLE interrupt enable */
-#define LL_USART_CR1_RXNEIE                     USART_CR1_RXNEIE              /*!< Read data register not empty interrupt enable */
-#define LL_USART_CR1_TCIE                       USART_CR1_TCIE                /*!< Transmission complete interrupt enable */
-#define LL_USART_CR1_TXEIE                      USART_CR1_TXEIE               /*!< Transmit data register empty interrupt enable */
-#define LL_USART_CR1_PEIE                       USART_CR1_PEIE                /*!< Parity error */
-#define LL_USART_CR1_CMIE                       USART_CR1_CMIE                /*!< Character match interrupt enable */
-#define LL_USART_CR1_RTOIE                      USART_CR1_RTOIE               /*!< Receiver timeout interrupt enable */
-#define LL_USART_CR1_EOBIE                      USART_CR1_EOBIE               /*!< End of Block interrupt enable */
-#define LL_USART_CR2_LBDIE                      USART_CR2_LBDIE               /*!< LIN break detection interrupt enable */
-#define LL_USART_CR3_EIE                        USART_CR3_EIE                 /*!< Error interrupt enable */
-#define LL_USART_CR3_CTSIE                      USART_CR3_CTSIE               /*!< CTS interrupt enable */
-#define LL_USART_CR3_WUFIE                      USART_CR3_WUFIE               /*!< Wakeup from Stop mode interrupt enable */
-#if defined(USART_TCBGT_SUPPORT)
-#define LL_USART_CR3_TCBGTIE                    USART_CR3_TCBGTIE             /*!< Transmission complete before guard time interrupt enable */
-#endif
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_DIRECTION Communication Direction
-  * @{
-  */
-#define LL_USART_DIRECTION_NONE                 (uint32_t)0x00000000U              /*!< Transmitter and Receiver are disabled */
-#define LL_USART_DIRECTION_RX                   USART_CR1_RE                       /*!< Transmitter is disabled and Receiver is enabled */
-#define LL_USART_DIRECTION_TX                   USART_CR1_TE                       /*!< Transmitter is enabled and Receiver is disabled */
-#define LL_USART_DIRECTION_TX_RX                (USART_CR1_TE |USART_CR1_RE)       /*!< Transmitter and Receiver are enabled */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_PARITY Parity Control
-  * @{
-  */
-#define LL_USART_PARITY_NONE                    (uint32_t)0x00000000U                /*!< Parity control disabled */
-#define LL_USART_PARITY_EVEN                    USART_CR1_PCE                        /*!< Parity control enabled and Even Parity is selected */
-#define LL_USART_PARITY_ODD                     (USART_CR1_PCE | USART_CR1_PS)       /*!< Parity control enabled and Odd Parity is selected */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_WAKEUP Wakeup
-  * @{
-  */
-#define LL_USART_WAKEUP_IDLELINE                (uint32_t)0x00000000U /*!<  USART wake up from Mute mode on Idle Line */
-#define LL_USART_WAKEUP_ADDRESSMARK             USART_CR1_WAKE        /*!<  USART wake up from Mute mode on Address Mark */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_DATAWIDTH Datawidth
-  * @{
-  */
-#define LL_USART_DATAWIDTH_7B                   USART_CR1_M1            /*!< 7 bits word length : Start bit, 7 data bits, n stop bits */
-#define LL_USART_DATAWIDTH_8B                   (uint32_t)0x00000000U   /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */
-#define LL_USART_DATAWIDTH_9B                   USART_CR1_M0            /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_OVERSAMPLING Oversampling
-  * @{
-  */
-#define LL_USART_OVERSAMPLING_16                (uint32_t)0x00000000U  /*!< Oversampling by 16 */
-#define LL_USART_OVERSAMPLING_8                 USART_CR1_OVER8        /*!< Oversampling by 8 */
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup USART_LL_EC_CLOCK Clock Signal
-  * @{
-  */
-
-#define LL_USART_CLOCK_DISABLE                  (uint32_t)0x00000000U  /*!< Clock signal not provided */
-#define LL_USART_CLOCK_ENABLE                   USART_CR2_CLKEN        /*!< Clock signal provided */
-/**
-  * @}
-  */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse
-  * @{
-  */
-#define LL_USART_LASTCLKPULSE_NO_OUTPUT         (uint32_t)0x00000000U /*!< The clock pulse of the last data bit is not output to the SCLK pin */
-#define LL_USART_LASTCLKPULSE_OUTPUT            USART_CR2_LBCL        /*!< The clock pulse of the last data bit is output to the SCLK pin */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_PHASE Clock Phase
-  * @{
-  */
-#define LL_USART_PHASE_1EDGE                    (uint32_t)0x00000000U /*!< The first clock transition is the first data capture edge */
-#define LL_USART_PHASE_2EDGE                    USART_CR2_CPHA        /*!< The second clock transition is the first data capture edge */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_POLARITY Clock Polarity
-  * @{
-  */
-#define LL_USART_POLARITY_LOW                   (uint32_t)0x00000000U /*!< Steady low value on SCLK pin outside transmission window*/
-#define LL_USART_POLARITY_HIGH                  USART_CR2_CPOL        /*!< Steady high value on SCLK pin outside transmission window */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_STOPBITS Stop Bits
-  * @{
-  */
-#define LL_USART_STOPBITS_0_5                   USART_CR2_STOP_0                           /*!< 0.5 stop bit */
-#define LL_USART_STOPBITS_1                     (uint32_t)0x00000000U                      /*!< 1 stop bit */
-#define LL_USART_STOPBITS_1_5                   (USART_CR2_STOP_0 | USART_CR2_STOP_1)      /*!< 1.5 stop bits */
-#define LL_USART_STOPBITS_2                     USART_CR2_STOP_1                           /*!< 2 stop bits */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_TXRX TX RX Pins Swap
-  * @{
-  */
-#define LL_USART_TXRX_STANDARD                  (uint32_t)0x00000000U /*!< TX/RX pins are used as defined in standard pinout */
-#define LL_USART_TXRX_SWAPPED                   (USART_CR2_SWAP)      /*!< TX and RX pins functions are swapped.             */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_RXPIN_LEVEL RX Pin Active Level Inversion
-  * @{
-  */
-#define LL_USART_RXPIN_LEVEL_STANDARD           (uint32_t)0x00000000U /*!< RX pin signal works using the standard logic levels */
-#define LL_USART_RXPIN_LEVEL_INVERTED           (USART_CR2_RXINV)     /*!< RX pin signal values are inverted.                  */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion
-  * @{
-  */
-#define LL_USART_TXPIN_LEVEL_STANDARD           (uint32_t)0x00000000U /*!< TX pin signal works using the standard logic levels */
-#define LL_USART_TXPIN_LEVEL_INVERTED           (USART_CR2_TXINV)     /*!< TX pin signal values are inverted.                  */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_BINARY_LOGIC Binary Data Inversion
-  * @{
-  */
-#define LL_USART_BINARY_LOGIC_POSITIVE          (uint32_t)0x00000000U /*!< Logical data from the data register are send/received in positive/direct logic. (1=H, 0=L) */
-#define LL_USART_BINARY_LOGIC_NEGATIVE          USART_CR2_DATAINV     /*!< Logical data from the data register are send/received in negative/inverse logic. (1=L, 0=H). The parity bit is also inverted. */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_BITORDER Bit Order
-  * @{
-  */
-#define LL_USART_BITORDER_LSBFIRST              (uint32_t)0x00000000U /*!< data is transmitted/received with data bit 0 first, following the start bit */
-#define LL_USART_BITORDER_MSBFIRST              USART_CR2_MSBFIRST    /*!< data is transmitted/received with the MSB first, following the start bit */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_AUTOBAUD_DETECT_ON Autobaud Detection
-  * @{
-  */
-#define LL_USART_AUTOBAUD_DETECT_ON_STARTBIT    (uint32_t)0x00000000U                       /*!< Measurement of the start bit is used to detect the baud rate */
-#define LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE USART_CR2_ABRMODE_0                         /*!< Falling edge to falling edge measurement. Received frame must start with a single bit = 1 -> Frame = Start10xxxxxx */
-#define LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME    USART_CR2_ABRMODE_1                         /*!< 0x7F frame detection */
-#define LL_USART_AUTOBAUD_DETECT_ON_55_FRAME    (USART_CR2_ABRMODE_1 | USART_CR2_ABRMODE_0) /*!< 0x55 frame detection */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_ADDRESS_DETECT Address Length Detection
-  * @{
-  */
-#define LL_USART_ADDRESS_DETECT_4B              (uint32_t)0x00000000U /*!< 4-bit address detection method selected */
-#define LL_USART_ADDRESS_DETECT_7B              USART_CR2_ADDM7       /*!< 7-bit address detection (in 8-bit data mode) method selected */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_HWCONTROL Hardware Control
-  * @{
-  */
-#define LL_USART_HWCONTROL_NONE                 (uint32_t)0x00000000U                /*!< CTS and RTS hardware flow control disabled */
-#define LL_USART_HWCONTROL_RTS                  USART_CR3_RTSE                       /*!< RTS output enabled, data is only requested when there is space in the receive buffer */
-#define LL_USART_HWCONTROL_CTS                  USART_CR3_CTSE                       /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */
-#define LL_USART_HWCONTROL_RTS_CTS              (USART_CR3_RTSE | USART_CR3_CTSE)    /*!< CTS and RTS hardware flow control enabled */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_WAKEUP_ON Wakeup Activation
-  * @{
-  */
-#define LL_USART_WAKEUP_ON_ADDRESS              (uint32_t)0x00000000U                   /*!< Wake up active on address match */
-#define LL_USART_WAKEUP_ON_STARTBIT             USART_CR3_WUS_1                         /*!< Wake up active on Start bit detection */
-#define LL_USART_WAKEUP_ON_RXNE                 (USART_CR3_WUS_0 | USART_CR3_WUS_1)     /*!< Wake up active on RXNE */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_IRDA_POWER IrDA Power
-  * @{
-  */
-#define LL_USART_IRDA_POWER_NORMAL              (uint32_t)0x00000000U /*!< IrDA normal power mode */
-#define LL_USART_IRDA_POWER_LOW                 USART_CR3_IRLP        /*!< IrDA low power mode */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_LINBREAK_DETECT LIN Break Detection Length
-  * @{
-  */
-#define LL_USART_LINBREAK_DETECT_10B            (uint32_t)0x00000000U /*!< 10-bit break detection method selected */
-#define LL_USART_LINBREAK_DETECT_11B            USART_CR2_LBDL        /*!< 11-bit break detection method selected */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_DE_POLARITY Driver Enable Polarity
-  * @{
-  */
-#define LL_USART_DE_POLARITY_HIGH               (uint32_t)0x00000000U /*!< DE signal is active high */
-#define LL_USART_DE_POLARITY_LOW                USART_CR3_DEP         /*!< DE signal is active low */
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EC_DMA_REG_DATA DMA Register Data
-  * @{
-  */
-#define LL_USART_DMA_REG_DATA_TRANSMIT          (uint32_t)0U          /*!< Get address of data register used for transmission */
-#define LL_USART_DMA_REG_DATA_RECEIVE           (uint32_t)1U          /*!< Get address of data register used for reception */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup USART_LL_Exported_Macros USART Exported Macros
-  * @{
-  */
-
-/** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros
-  * @{
-  */
-
-/**
-  * @brief  Write a value in USART register
-  * @param  __INSTANCE__ USART Instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in USART register
-  * @param  __INSTANCE__ USART Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
-  * @{
-  */
-
-/**
-  * @brief  Compute USARTDIV value according to Peripheral Clock and
-  *         expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned)
-  * @param  __PERIPHCLK__ Peripheral Clock frequency used for USART instance
-  * @param  __BAUDRATE__ Baud rate value to achieve
-  * @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case
-  */
-#define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) ((((__PERIPHCLK__)*2) + ((__BAUDRATE__)/2))/(__BAUDRATE__))
-
-/**
-  * @brief  Compute USARTDIV value according to Peripheral Clock and
-  *         expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned)
-  * @param  __PERIPHCLK__ Peripheral Clock frequency used for USART instance
-  * @param  __BAUDRATE__ Baud rate value to achieve
-  * @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case
-  */
-#define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__) + ((__BAUDRATE__)/2))/(__BAUDRATE__))
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup USART_LL_Exported_Functions USART Exported Functions
-  * @{
-  */
-
-/** @defgroup USART_LL_EF_Configuration Configuration functions
-  * @{
-  */
-
-/**
-  * @brief  USART Enable
-  * @rmtoll CR1          UE            LL_USART_Enable
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR1, USART_CR1_UE);
-}
-
-/**
-  * @brief  USART Disable (all USART prescalers and outputs are disabled)
-  * @note   When USART is disabled, USART prescalers and outputs are stopped immediately,
-  *         and current operations are discarded. The configuration of the USART is kept, but all the status
-  *         flags, in the USARTx_ISR are set to their default values.
-  * @rmtoll CR1          UE            LL_USART_Disable
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR1, USART_CR1_UE);
-}
-
-/**
-  * @brief  Indicate if USART is enabled
-  * @rmtoll CR1          UE            LL_USART_IsEnabled
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
-}
-
-/**
-  * @brief  USART enabled in STOP Mode.
-  * @note   When this function is enabled, USART is able to wake up the MCU from Stop mode, provided that
-  *         USART clock selection is HSI or LSE in RCC.
-  * @note   Macro @ref IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-  *         Wake-up from Stop mode feature is supported by the USARTx instance.
-  * @rmtoll CR1          UESM          LL_USART_EnableInStopMode
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableInStopMode(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR1, USART_CR1_UESM);
-}
-
-/**
-  * @brief  USART disabled in STOP Mode.
-  * @note   When this function is disabled, USART is not able to wake up the MCU from Stop mode
-  * @note   Macro @ref IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-  *         Wake-up from Stop mode feature is supported by the USARTx instance.
-  * @rmtoll CR1          UESM          LL_USART_DisableInStopMode
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableInStopMode(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR1, USART_CR1_UESM);
-}
-
-/**
-  * @brief  Indicate if USART is enabled in STOP Mode (able to wake up MCU from Stop mode or not)
-  * @note   Macro @ref IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-  *         Wake-up from Stop mode feature is supported by the USARTx instance.
-  * @rmtoll CR1          UESM          LL_USART_IsEnabledInStopMode
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledInStopMode(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM));
-}
-
-/**
-  * @brief  Receiver Enable (Receiver is enabled and begins searching for a start bit)
-  * @rmtoll CR1          RE            LL_USART_EnableDirectionRx
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR1, USART_CR1_RE);
-}
-
-/**
-  * @brief  Receiver Disable
-  * @rmtoll CR1          RE            LL_USART_DisableDirectionRx
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR1, USART_CR1_RE);
-}
-
-/**
-  * @brief  Transmitter Enable
-  * @rmtoll CR1          TE            LL_USART_EnableDirectionTx
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR1, USART_CR1_TE);
-}
-
-/**
-  * @brief  Transmitter Disable
-  * @rmtoll CR1          TE            LL_USART_DisableDirectionTx
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
-}
-
-/**
-  * @brief  Configure simultaneously enabled/disabled states
-  *         of Transmitter and Receiver
-  * @rmtoll CR1          RE            LL_USART_SetTransferDirection\n
-  *         CR1          TE            LL_USART_SetTransferDirection
-  * @param  USARTx USART Instance
-  * @param  TransferDirection This parameter can be one of the following values:
-  *         @arg @ref LL_USART_DIRECTION_NONE
-  *         @arg @ref LL_USART_DIRECTION_RX
-  *         @arg @ref LL_USART_DIRECTION_TX
-  *         @arg @ref LL_USART_DIRECTION_TX_RX
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
-{
-  MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
-}
-
-/**
-  * @brief  Return enabled/disabled states of Transmitter and Receiver
-  * @rmtoll CR1          RE            LL_USART_GetTransferDirection\n
-  *         CR1          TE            LL_USART_GetTransferDirection
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_DIRECTION_NONE
-  *         @arg @ref LL_USART_DIRECTION_RX
-  *         @arg @ref LL_USART_DIRECTION_TX
-  *         @arg @ref LL_USART_DIRECTION_TX_RX
-  */
-__STATIC_INLINE uint32_t LL_USART_GetTransferDirection(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE));
-}
-
-/**
-  * @brief  Configure Parity (enabled/disabled and parity mode if enabled).
-  * @note   This function selects if hardware parity control (generation and detection) is enabled or disabled.
-  *         When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
-  *         (9th or 8th bit depending on data width) and parity is checked on the received data.
-  * @rmtoll CR1          PS            LL_USART_SetParity\n
-  *         CR1          PCE           LL_USART_SetParity
-  * @param  USARTx USART Instance
-  * @param  Parity This parameter can be one of the following values:
-  *         @arg @ref LL_USART_PARITY_NONE
-  *         @arg @ref LL_USART_PARITY_EVEN
-  *         @arg @ref LL_USART_PARITY_ODD
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
-{
-  MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
-}
-
-/**
-  * @brief  Return Parity configuration (enabled/disabled and parity mode if enabled)
-  * @rmtoll CR1          PS            LL_USART_GetParity\n
-  *         CR1          PCE           LL_USART_GetParity
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_PARITY_NONE
-  *         @arg @ref LL_USART_PARITY_EVEN
-  *         @arg @ref LL_USART_PARITY_ODD
-  */
-__STATIC_INLINE uint32_t LL_USART_GetParity(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
-}
-
-/**
-  * @brief  Set Receiver Wake Up method from Mute mode.
-  * @rmtoll CR1          WAKE          LL_USART_SetWakeUpMethod
-  * @param  USARTx USART Instance
-  * @param  Method This parameter can be one of the following values:
-  *         @arg @ref LL_USART_WAKEUP_IDLELINE
-  *         @arg @ref LL_USART_WAKEUP_ADDRESSMARK
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
-{
-  MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
-}
-
-/**
-  * @brief  Return Receiver Wake Up method from Mute mode
-  * @rmtoll CR1          WAKE          LL_USART_GetWakeUpMethod
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_WAKEUP_IDLELINE
-  *         @arg @ref LL_USART_WAKEUP_ADDRESSMARK
-  */
-__STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE));
-}
-
-/**
-  * @brief  Set Word length (i.e. nb of data bits, excluding start and stop bits)
-  * @rmtoll CR1          M0            LL_USART_SetDataWidth\n
-  *         CR1          M1            LL_USART_SetDataWidth
-  * @param  USARTx USART Instance
-  * @param  DataWidth This parameter can be one of the following values:
-  *         @arg @ref LL_USART_DATAWIDTH_7B
-  *         @arg @ref LL_USART_DATAWIDTH_8B
-  *         @arg @ref LL_USART_DATAWIDTH_9B
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
-{
-  MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth);
-}
-
-/**
-  * @brief  Return Word length (i.e. nb of data bits, excluding start and stop bits)
-  * @rmtoll CR1          M0            LL_USART_GetDataWidth\n
-  *         CR1          M1            LL_USART_GetDataWidth
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_DATAWIDTH_7B
-  *         @arg @ref LL_USART_DATAWIDTH_8B
-  *         @arg @ref LL_USART_DATAWIDTH_9B
-  */
-__STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
-}
-
-/**
-  * @brief  Allow switch between Mute Mode and Active mode
-  * @rmtoll CR1          MME           LL_USART_EnableMuteMode
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableMuteMode(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR1, USART_CR1_MME);
-}
-
-/**
-  * @brief  Prevent Mute Mode use. Set Receiver in active mode permanently.
-  * @rmtoll CR1          MME           LL_USART_DisableMuteMode
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableMuteMode(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR1, USART_CR1_MME);
-}
-
-/**
-  * @brief  Indicate if switch between Mute Mode and Active mode is allowed
-  * @rmtoll CR1          MME           LL_USART_IsEnabledMuteMode
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledMuteMode(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR1, USART_CR1_MME) == (USART_CR1_MME));
-}
-
-/**
-  * @brief  Set Oversampling to 8-bit or 16-bit mode
-  * @rmtoll CR1          OVER8         LL_USART_SetOverSampling
-  * @param  USARTx USART Instance
-  * @param  OverSampling This parameter can be one of the following values:
-  *         @arg @ref LL_USART_OVERSAMPLING_16
-  *         @arg @ref LL_USART_OVERSAMPLING_8
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
-{
-  MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
-}
-
-/**
-  * @brief  Return Oversampling mode
-  * @rmtoll CR1          OVER8         LL_USART_GetOverSampling
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_OVERSAMPLING_16
-  *         @arg @ref LL_USART_OVERSAMPLING_8
-  */
-__STATIC_INLINE uint32_t LL_USART_GetOverSampling(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
-}
-
-/**
-  * @brief  Configure if Clock pulse of the last data bit is output to the SCLK pin or not
-  * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
-  *         Synchronous mode is supported by the USARTx instance.
-  * @rmtoll CR2          LBCL          LL_USART_SetLastClkPulseOutput
-  * @param  USARTx USART Instance
-  * @param  LastBitClockPulse This parameter can be one of the following values:
-  *         @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
-  *         @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse)
-{
-  MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse);
-}
-
-/**
-  * @brief  Retrieve Clock pulse of the last data bit output configuration
-  *         (Last bit Clock pulse output to the SCLK pin or not)
-  * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
-  *         Synchronous mode is supported by the USARTx instance.
-  * @rmtoll CR2          LBCL          LL_USART_GetLastClkPulseOutput
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
-  *         @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
-  */
-__STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL));
-}
-
-/**
-  * @brief  Select the phase of the clock output on the SCLK pin in synchronous mode
-  * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
-  *         Synchronous mode is supported by the USARTx instance.
-  * @rmtoll CR2          CPHA          LL_USART_SetClockPhase
-  * @param  USARTx USART Instance
-  * @param  ClockPhase This parameter can be one of the following values:
-  *         @arg @ref LL_USART_PHASE_1EDGE
-  *         @arg @ref LL_USART_PHASE_2EDGE
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
-{
-  MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase);
-}
-
-/**
-  * @brief  Return phase of the clock output on the SCLK pin in synchronous mode
-  * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
-  *         Synchronous mode is supported by the USARTx instance.
-  * @rmtoll CR2          CPHA          LL_USART_GetClockPhase
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_PHASE_1EDGE
-  *         @arg @ref LL_USART_PHASE_2EDGE
-  */
-__STATIC_INLINE uint32_t LL_USART_GetClockPhase(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA));
-}
-
-/**
-  * @brief  Select the polarity of the clock output on the SCLK pin in synchronous mode
-  * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
-  *         Synchronous mode is supported by the USARTx instance.
-  * @rmtoll CR2          CPOL          LL_USART_SetClockPolarity
-  * @param  USARTx USART Instance
-  * @param  ClockPolarity This parameter can be one of the following values:
-  *         @arg @ref LL_USART_POLARITY_LOW
-  *         @arg @ref LL_USART_POLARITY_HIGH
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
-{
-  MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity);
-}
-
-/**
-  * @brief  Return polarity of the clock output on the SCLK pin in synchronous mode
-  * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
-  *         Synchronous mode is supported by the USARTx instance.
-  * @rmtoll CR2          CPOL          LL_USART_GetClockPolarity
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_POLARITY_LOW
-  *         @arg @ref LL_USART_POLARITY_HIGH
-  */
-__STATIC_INLINE uint32_t LL_USART_GetClockPolarity(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL));
-}
-
-/**
-  * @brief  Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse)
-  * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
-  *         Synchronous mode is supported by the USARTx instance.
-  * @note   Call of this function is equivalent to following function call sequence :
-  *         - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
-  *         - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function
-  *         - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutput() function
-  * @rmtoll CR2          CPHA          LL_USART_ConfigClock\n
-  *         CR2          CPOL          LL_USART_ConfigClock\n
-  *         CR2          LBCL          LL_USART_ConfigClock
-  * @param  USARTx USART Instance
-  * @param  Phase This parameter can be one of the following values:
-  *         @arg @ref LL_USART_PHASE_1EDGE
-  *         @arg @ref LL_USART_PHASE_2EDGE
-  * @param  Polarity This parameter can be one of the following values:
-  *         @arg @ref LL_USART_POLARITY_LOW
-  *         @arg @ref LL_USART_POLARITY_HIGH
-  * @param  LBCPOutput This parameter can be one of the following values:
-  *         @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
-  *         @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput)
-{
-  MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPOutput);
-}
-
-/**
-  * @brief  Enable Clock output on SCLK pin
-  * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
-  *         Synchronous mode is supported by the USARTx instance.
-  * @rmtoll CR2          CLKEN         LL_USART_EnableSCLKOutput
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
-}
-
-/**
-  * @brief  Disable Clock output on SCLK pin
-  * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
-  *         Synchronous mode is supported by the USARTx instance.
-  * @rmtoll CR2          CLKEN         LL_USART_DisableSCLKOutput
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
-}
-
-/**
-  * @brief  Indicate if Clock output on SCLK pin is enabled
-  * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
-  *         Synchronous mode is supported by the USARTx instance.
-  * @rmtoll CR2          CLKEN         LL_USART_IsEnabledSCLKOutput
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN));
-}
-
-/**
-  * @brief  Set the length of the stop bits
-  * @rmtoll CR2          STOP          LL_USART_SetStopBitsLength
-  * @param  USARTx USART Instance
-  * @param  StopBits This parameter can be one of the following values:
-  *         @arg @ref LL_USART_STOPBITS_0_5
-  *         @arg @ref LL_USART_STOPBITS_1
-  *         @arg @ref LL_USART_STOPBITS_1_5
-  *         @arg @ref LL_USART_STOPBITS_2
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
-{
-  MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
-}
-
-/**
-  * @brief  Retrieve the length of the stop bits
-  * @rmtoll CR2          STOP          LL_USART_GetStopBitsLength
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_STOPBITS_0_5
-  *         @arg @ref LL_USART_STOPBITS_1
-  *         @arg @ref LL_USART_STOPBITS_1_5
-  *         @arg @ref LL_USART_STOPBITS_2
-  */
-__STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP));
-}
-
-/**
-  * @brief  Configure Character frame format (Datawidth, Parity control, Stop Bits)
-  * @note   Call of this function is equivalent to following function call sequence :
-  *         - Data Width configuration using @ref LL_USART_SetDataWidth() function
-  *         - Parity Control and mode configuration using @ref LL_USART_SetParity() function
-  *         - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function
-  * @rmtoll CR1          PS            LL_USART_ConfigCharacter\n
-  *         CR1          PCE           LL_USART_ConfigCharacter\n
-  *         CR1          M0            LL_USART_ConfigCharacter\n
-  *         CR1          M1            LL_USART_ConfigCharacter\n
-  *         CR2          STOP          LL_USART_ConfigCharacter
-  * @param  USARTx USART Instance
-  * @param  DataWidth This parameter can be one of the following values:
-  *         @arg @ref LL_USART_DATAWIDTH_7B
-  *         @arg @ref LL_USART_DATAWIDTH_8B
-  *         @arg @ref LL_USART_DATAWIDTH_9B
-  * @param  Parity This parameter can be one of the following values:
-  *         @arg @ref LL_USART_PARITY_NONE
-  *         @arg @ref LL_USART_PARITY_EVEN
-  *         @arg @ref LL_USART_PARITY_ODD
-  * @param  StopBits This parameter can be one of the following values:
-  *         @arg @ref LL_USART_STOPBITS_0_5
-  *         @arg @ref LL_USART_STOPBITS_1
-  *         @arg @ref LL_USART_STOPBITS_1_5
-  *         @arg @ref LL_USART_STOPBITS_2
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity,
-                                              uint32_t StopBits)
-{
-  MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
-  MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
-}
-
-/**
-  * @brief  Configure TX/RX pins swapping setting.
-  * @rmtoll CR2          SWAP          LL_USART_SetTXRXSwap
-  * @param  USARTx USART Instance
-  * @param  SwapConfig This parameter can be one of the following values:
-  *         @arg @ref LL_USART_TXRX_STANDARD
-  *         @arg @ref LL_USART_TXRX_SWAPPED
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetTXRXSwap(USART_TypeDef *USARTx, uint32_t SwapConfig)
-{
-  MODIFY_REG(USARTx->CR2, USART_CR2_SWAP, SwapConfig);
-}
-
-/**
-  * @brief  Retrieve TX/RX pins swapping configuration.
-  * @rmtoll CR2          SWAP          LL_USART_GetTXRXSwap
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_TXRX_STANDARD
-  *         @arg @ref LL_USART_TXRX_SWAPPED
-  */
-__STATIC_INLINE uint32_t LL_USART_GetTXRXSwap(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_SWAP));
-}
-
-/**
-  * @brief  Configure RX pin active level logic
-  * @rmtoll CR2          RXINV         LL_USART_SetRXPinLevel
-  * @param  USARTx USART Instance
-  * @param  PinInvMethod This parameter can be one of the following values:
-  *         @arg @ref LL_USART_RXPIN_LEVEL_STANDARD
-  *         @arg @ref LL_USART_RXPIN_LEVEL_INVERTED
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetRXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
-{
-  MODIFY_REG(USARTx->CR2, USART_CR2_RXINV, PinInvMethod);
-}
-
-/**
-  * @brief  Retrieve RX pin active level logic configuration
-  * @rmtoll CR2          RXINV         LL_USART_GetRXPinLevel
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_RXPIN_LEVEL_STANDARD
-  *         @arg @ref LL_USART_RXPIN_LEVEL_INVERTED
-  */
-__STATIC_INLINE uint32_t LL_USART_GetRXPinLevel(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_RXINV));
-}
-
-/**
-  * @brief  Configure TX pin active level logic
-  * @rmtoll CR2          TXINV         LL_USART_SetTXPinLevel
-  * @param  USARTx USART Instance
-  * @param  PinInvMethod This parameter can be one of the following values:
-  *         @arg @ref LL_USART_TXPIN_LEVEL_STANDARD
-  *         @arg @ref LL_USART_TXPIN_LEVEL_INVERTED
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetTXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
-{
-  MODIFY_REG(USARTx->CR2, USART_CR2_TXINV, PinInvMethod);
-}
-
-/**
-  * @brief  Retrieve TX pin active level logic configuration
-  * @rmtoll CR2          TXINV         LL_USART_GetTXPinLevel
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_TXPIN_LEVEL_STANDARD
-  *         @arg @ref LL_USART_TXPIN_LEVEL_INVERTED
-  */
-__STATIC_INLINE uint32_t LL_USART_GetTXPinLevel(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_TXINV));
-}
-
-/**
-  * @brief  Configure Binary data logic.
-  * @note   Allow to define how Logical data from the data register are send/received :
-  *         either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H)
-  * @rmtoll CR2          DATAINV       LL_USART_SetBinaryDataLogic
-  * @param  USARTx USART Instance
-  * @param  DataLogic This parameter can be one of the following values:
-  *         @arg @ref LL_USART_BINARY_LOGIC_POSITIVE
-  *         @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetBinaryDataLogic(USART_TypeDef *USARTx, uint32_t DataLogic)
-{
-  MODIFY_REG(USARTx->CR2, USART_CR2_DATAINV, DataLogic);
-}
-
-/**
-  * @brief  Retrieve Binary data configuration
-  * @rmtoll CR2          DATAINV       LL_USART_GetBinaryDataLogic
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_BINARY_LOGIC_POSITIVE
-  *         @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE
-  */
-__STATIC_INLINE uint32_t LL_USART_GetBinaryDataLogic(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_DATAINV));
-}
-
-/**
-  * @brief  Configure transfer bit order (either Less or Most Significant Bit First)
-  * @note   MSB First means data is transmitted/received with the MSB first, following the start bit.
-  *         LSB First means data is transmitted/received with data bit 0 first, following the start bit.
-  * @rmtoll CR2          MSBFIRST      LL_USART_SetTransferBitOrder
-  * @param  USARTx USART Instance
-  * @param  BitOrder This parameter can be one of the following values:
-  *         @arg @ref LL_USART_BITORDER_LSBFIRST
-  *         @arg @ref LL_USART_BITORDER_MSBFIRST
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetTransferBitOrder(USART_TypeDef *USARTx, uint32_t BitOrder)
-{
-  MODIFY_REG(USARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
-}
-
-/**
-  * @brief  Return transfer bit order (either Less or Most Significant Bit First)
-  * @note   MSB First means data is transmitted/received with the MSB first, following the start bit.
-  *         LSB First means data is transmitted/received with data bit 0 first, following the start bit.
-  * @rmtoll CR2          MSBFIRST      LL_USART_GetTransferBitOrder
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_BITORDER_LSBFIRST
-  *         @arg @ref LL_USART_BITORDER_MSBFIRST
-  */
-__STATIC_INLINE uint32_t LL_USART_GetTransferBitOrder(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_MSBFIRST));
-}
-
-/**
-  * @brief  Enable Auto Baud-Rate Detection
-  * @note   Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
-  *         Auto Baud Rate detection feature is supported by the USARTx instance.
-  * @rmtoll CR2          ABREN         LL_USART_EnableAutoBaudRate
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableAutoBaudRate(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR2, USART_CR2_ABREN);
-}
-
-/**
-  * @brief  Disable Auto Baud-Rate Detection
-  * @note   Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
-  *         Auto Baud Rate detection feature is supported by the USARTx instance.
-  * @rmtoll CR2          ABREN         LL_USART_DisableAutoBaudRate
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableAutoBaudRate(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR2, USART_CR2_ABREN);
-}
-
-/**
-  * @brief  Indicate if Auto Baud-Rate Detection mechanism is enabled
-  * @note   Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
-  *         Auto Baud Rate detection feature is supported by the USARTx instance.
-  * @rmtoll CR2          ABREN         LL_USART_IsEnabledAutoBaud
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledAutoBaud(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR2, USART_CR2_ABREN) == (USART_CR2_ABREN));
-}
-
-/**
-  * @brief  Set Auto Baud-Rate mode bits
-  * @note   Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
-  *         Auto Baud Rate detection feature is supported by the USARTx instance.
-  * @rmtoll CR2          ABRMODE       LL_USART_SetAutoBaudRateMode
-  * @param  USARTx USART Instance
-  * @param  AutoBaudRateMode This parameter can be one of the following values:
-  *         @arg @ref LL_USART_AUTOBAUD_DETECT_ON_STARTBIT
-  *         @arg @ref LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE
-  *         @arg @ref LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME
-  *         @arg @ref LL_USART_AUTOBAUD_DETECT_ON_55_FRAME
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetAutoBaudRateMode(USART_TypeDef *USARTx, uint32_t AutoBaudRateMode)
-{
-  MODIFY_REG(USARTx->CR2, USART_CR2_ABRMODE, AutoBaudRateMode);
-}
-
-/**
-  * @brief  Return Auto Baud-Rate mode
-  * @note   Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
-  *         Auto Baud Rate detection feature is supported by the USARTx instance.
-  * @rmtoll CR2          ABRMODE       LL_USART_GetAutoBaudRateMode
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_AUTOBAUD_DETECT_ON_STARTBIT
-  *         @arg @ref LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE
-  *         @arg @ref LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME
-  *         @arg @ref LL_USART_AUTOBAUD_DETECT_ON_55_FRAME
-  */
-__STATIC_INLINE uint32_t LL_USART_GetAutoBaudRateMode(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ABRMODE));
-}
-
-/**
-  * @brief  Enable Receiver Timeout
-  * @rmtoll CR2          RTOEN         LL_USART_EnableRxTimeout
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableRxTimeout(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR2, USART_CR2_RTOEN);
-}
-
-/**
-  * @brief  Disable Receiver Timeout
-  * @rmtoll CR2          RTOEN         LL_USART_DisableRxTimeout
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableRxTimeout(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR2, USART_CR2_RTOEN);
-}
-
-/**
-  * @brief  Indicate if Receiver Timeout feature is enabled
-  * @rmtoll CR2          RTOEN         LL_USART_IsEnabledRxTimeout
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledRxTimeout(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR2, USART_CR2_RTOEN) == (USART_CR2_RTOEN));
-}
-
-/**
-  * @brief  Set Address of the USART node.
-  * @note   This is used in multiprocessor communication during Mute mode or Stop mode,
-  *         for wake up with address mark detection.
-  * @note   4bits address node is used when 4-bit Address Detection is selected in ADDM7.
-  *         (b7-b4 should be set to 0)
-  *         8bits address node is used when 7-bit Address Detection is selected in ADDM7.
-  *         (This is used in multiprocessor communication during Mute mode or Stop mode,
-  *         for wake up with 7-bit address mark detection.
-  *         The MSB of the character sent by the transmitter should be equal to 1.
-  *         It may also be used for character detection during normal reception,
-  *         Mute mode inactive (for example, end of block detection in ModBus protocol).
-  *         In this case, the whole received character (8-bit) is compared to the ADD[7:0]
-  *         value and CMF flag is set on match)
-  * @rmtoll CR2          ADD           LL_USART_ConfigNodeAddress\n
-  *         CR2          ADDM7         LL_USART_ConfigNodeAddress
-  * @param  USARTx USART Instance
-  * @param  AddressLen This parameter can be one of the following values:
-  *         @arg @ref LL_USART_ADDRESS_DETECT_4B
-  *         @arg @ref LL_USART_ADDRESS_DETECT_7B
-  * @param  NodeAddress 4 or 7 bit Address of the USART node.
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_t NodeAddress)
-{
-  MODIFY_REG(USARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7,
-             (uint32_t)(AddressLen | (NodeAddress << USART_POSITION_CR2_ADD)));
-}
-
-/**
-  * @brief  Return 8 bit Address of the USART node as set in ADD field of CR2.
-  * @note   If 4-bit Address Detection is selected in ADDM7,
-  *         only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
-  *         If 7-bit Address Detection is selected in ADDM7,
-  *         only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant)
-  * @rmtoll CR2          ADD           LL_USART_GetNodeAddress
-  * @param  USARTx USART Instance
-  * @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255)
-  */
-__STATIC_INLINE uint32_t LL_USART_GetNodeAddress(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD) >> USART_POSITION_CR2_ADD);
-}
-
-/**
-  * @brief  Return Length of Node Address used in Address Detection mode (7-bit or 4-bit)
-  * @rmtoll CR2          ADDM7         LL_USART_GetNodeAddressLen
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_ADDRESS_DETECT_4B
-  *         @arg @ref LL_USART_ADDRESS_DETECT_7B
-  */
-__STATIC_INLINE uint32_t LL_USART_GetNodeAddressLen(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADDM7));
-}
-
-/**
-  * @brief  Enable RTS HW Flow Control
-  * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-  *         Hardware Flow control feature is supported by the USARTx instance.
-  * @rmtoll CR3          RTSE          LL_USART_EnableRTSHWFlowCtrl
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR3, USART_CR3_RTSE);
-}
-
-/**
-  * @brief  Disable RTS HW Flow Control
-  * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-  *         Hardware Flow control feature is supported by the USARTx instance.
-  * @rmtoll CR3          RTSE          LL_USART_DisableRTSHWFlowCtrl
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
-}
-
-/**
-  * @brief  Enable CTS HW Flow Control
-  * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-  *         Hardware Flow control feature is supported by the USARTx instance.
-  * @rmtoll CR3          CTSE          LL_USART_EnableCTSHWFlowCtrl
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR3, USART_CR3_CTSE);
-}
-
-/**
-  * @brief  Disable CTS HW Flow Control
-  * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-  *         Hardware Flow control feature is supported by the USARTx instance.
-  * @rmtoll CR3          CTSE          LL_USART_DisableCTSHWFlowCtrl
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);
-}
-
-/**
-  * @brief  Configure HW Flow Control mode (both CTS and RTS)
-  * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-  *         Hardware Flow control feature is supported by the USARTx instance.
-  * @rmtoll CR3          RTSE          LL_USART_SetHWFlowCtrl\n
-  *         CR3          CTSE          LL_USART_SetHWFlowCtrl
-  * @param  USARTx USART Instance
-  * @param  HardwareFlowControl This parameter can be one of the following values:
-  *         @arg @ref LL_USART_HWCONTROL_NONE
-  *         @arg @ref LL_USART_HWCONTROL_RTS
-  *         @arg @ref LL_USART_HWCONTROL_CTS
-  *         @arg @ref LL_USART_HWCONTROL_RTS_CTS
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
-{
-  MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
-}
-
-/**
-  * @brief  Return HW Flow Control configuration (both CTS and RTS)
-  * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-  *         Hardware Flow control feature is supported by the USARTx instance.
-  * @rmtoll CR3          RTSE          LL_USART_GetHWFlowCtrl\n
-  *         CR3          CTSE          LL_USART_GetHWFlowCtrl
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_HWCONTROL_NONE
-  *         @arg @ref LL_USART_HWCONTROL_RTS
-  *         @arg @ref LL_USART_HWCONTROL_CTS
-  *         @arg @ref LL_USART_HWCONTROL_RTS_CTS
-  */
-__STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
-}
-
-/**
-  * @brief  Enable One bit sampling method
-  * @rmtoll CR3          ONEBIT        LL_USART_EnableOneBitSamp
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);
-}
-
-/**
-  * @brief  Disable One bit sampling method
-  * @rmtoll CR3          ONEBIT        LL_USART_DisableOneBitSamp
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);
-}
-
-/**
-  * @brief  Indicate if One bit sampling method is enabled
-  * @rmtoll CR3          ONEBIT        LL_USART_IsEnabledOneBitSamp
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT));
-}
-
-/**
-  * @brief  Enable Overrun detection
-  * @rmtoll CR3          OVRDIS        LL_USART_EnableOverrunDetect
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableOverrunDetect(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS);
-}
-
-/**
-  * @brief  Disable Overrun detection
-  * @rmtoll CR3          OVRDIS        LL_USART_DisableOverrunDetect
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableOverrunDetect(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR3, USART_CR3_OVRDIS);
-}
-
-/**
-  * @brief  Indicate if Overrun detection is enabled
-  * @rmtoll CR3          OVRDIS        LL_USART_IsEnabledOverrunDetect
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledOverrunDetect(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS);
-}
-
-/**
-  * @brief  Select event type for Wake UP Interrupt Flag (WUS[1:0] bits)
-  * @note   Macro @ref IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-  *         Wake-up from Stop mode feature is supported by the USARTx instance.
-  * @rmtoll CR3          WUS           LL_USART_SetWKUPType
-  * @param  USARTx USART Instance
-  * @param  Type This parameter can be one of the following values:
-  *         @arg @ref LL_USART_WAKEUP_ON_ADDRESS
-  *         @arg @ref LL_USART_WAKEUP_ON_STARTBIT
-  *         @arg @ref LL_USART_WAKEUP_ON_RXNE
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetWKUPType(USART_TypeDef *USARTx, uint32_t Type)
-{
-  MODIFY_REG(USARTx->CR3, USART_CR3_WUS, Type);
-}
-
-/**
-  * @brief  Return event type for Wake UP Interrupt Flag (WUS[1:0] bits)
-  * @note   Macro @ref IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-  *         Wake-up from Stop mode feature is supported by the USARTx instance.
-  * @rmtoll CR3          WUS           LL_USART_GetWKUPType
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_WAKEUP_ON_ADDRESS
-  *         @arg @ref LL_USART_WAKEUP_ON_STARTBIT
-  *         @arg @ref LL_USART_WAKEUP_ON_RXNE
-  */
-__STATIC_INLINE uint32_t LL_USART_GetWKUPType(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_WUS));
-}
-
-/**
-  * @brief  Configure USART BRR register for achieving expected Baud Rate value.
-  * @note   Compute and set USARTDIV value in BRR Register (full BRR content)
-  *         according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
-  * @note   Peripheral clock and Baud rate values provided as function parameters should be valid
-  *         (Baud rate value != 0)
-  * @rmtoll BRR          BRR           LL_USART_SetBaudRate
-  * @param  USARTx USART Instance
-  * @param  PeriphClk Peripheral Clock
-  * @param  OverSampling This parameter can be one of the following values:
-  *         @arg @ref LL_USART_OVERSAMPLING_16
-  *         @arg @ref LL_USART_OVERSAMPLING_8
-  * @param  BaudRate Baud Rate
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling,
-                                          uint32_t BaudRate)
-{
-  register uint32_t usartdiv = 0x0U;
-  register uint32_t brrtemp = 0x0U;
-
-  if (OverSampling == LL_USART_OVERSAMPLING_8)
-  {
-    usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
-    brrtemp = usartdiv & 0xFFF0U;
-    brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
-    USARTx->BRR = brrtemp;
-  }
-  else
-  {
-    USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
-  }
-}
-
-/**
-  * @brief  Return current Baud Rate value, according to USARTDIV present in BRR register
-  *         (full BRR content), and to used Peripheral Clock and Oversampling mode values
-  * @note   In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
-  * @rmtoll BRR          BRR           LL_USART_GetBaudRate
-  * @param  USARTx USART Instance
-  * @param  PeriphClk Peripheral Clock
-  * @param  OverSampling This parameter can be one of the following values:
-  *         @arg @ref LL_USART_OVERSAMPLING_16
-  *         @arg @ref LL_USART_OVERSAMPLING_8
-  * @retval Baud Rate
-  */
-__STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
-{
-  register uint32_t usartdiv = 0x0U;
-  register uint32_t brrresult = 0x0U;
-
-  usartdiv = USARTx->BRR;
-
-  if (OverSampling == LL_USART_OVERSAMPLING_8)
-  {
-    if ((usartdiv & 0xFFF7U) != 0U)
-    {
-      usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
-      brrresult = (PeriphClk * 2U) / usartdiv;
-    }
-  }
-  else
-  {
-    if ((usartdiv & 0xFFFFU) != 0U)
-    {
-      brrresult = PeriphClk / usartdiv;
-    }
-  }
-  return (brrresult);
-}
-
-/**
-  * @brief  Set Receiver Time Out Value (expressed in nb of bits duration)
-  * @rmtoll RTOR         RTO           LL_USART_SetRxTimeout
-  * @param  USARTx USART Instance
-  * @param  Timeout Value between Min_Data=0x00 and Max_Data=0x00FFFFFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetRxTimeout(USART_TypeDef *USARTx, uint32_t Timeout)
-{
-  MODIFY_REG(USARTx->RTOR, USART_RTOR_RTO, Timeout);
-}
-
-/**
-  * @brief  Get Receiver Time Out Value (expressed in nb of bits duration)
-  * @rmtoll RTOR         RTO           LL_USART_GetRxTimeout
-  * @param  USARTx USART Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0x00FFFFFF
-  */
-__STATIC_INLINE uint32_t LL_USART_GetRxTimeout(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_RTO));
-}
-
-/**
-  * @brief  Set Block Length value in reception
-  * @rmtoll RTOR         BLEN          LL_USART_SetBlockLength
-  * @param  USARTx USART Instance
-  * @param  BlockLength Value between Min_Data=0x00 and Max_Data=0xFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetBlockLength(USART_TypeDef *USARTx, uint32_t BlockLength)
-{
-  MODIFY_REG(USARTx->RTOR, USART_RTOR_BLEN, BlockLength << USART_POSITION_RTOR_BLEN);
-}
-
-/**
-  * @brief  Get Block Length value in reception
-  * @rmtoll RTOR         BLEN          LL_USART_GetBlockLength
-  * @param  USARTx USART Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0xFF
-  */
-__STATIC_INLINE uint32_t LL_USART_GetBlockLength(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_BLEN) >> USART_POSITION_RTOR_BLEN);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EF_Configuration_IRDA Configuration functions related to Irda feature
-  * @{
-  */
-
-/**
-  * @brief  Enable IrDA mode
-  * @note   Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
-  *         IrDA feature is supported by the USARTx instance.
-  * @rmtoll CR3          IREN          LL_USART_EnableIrda
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR3, USART_CR3_IREN);
-}
-
-/**
-  * @brief  Disable IrDA mode
-  * @note   Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
-  *         IrDA feature is supported by the USARTx instance.
-  * @rmtoll CR3          IREN          LL_USART_DisableIrda
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);
-}
-
-/**
-  * @brief  Indicate if IrDA mode is enabled
-  * @note   Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
-  *         IrDA feature is supported by the USARTx instance.
-  * @rmtoll CR3          IREN          LL_USART_IsEnabledIrda
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN));
-}
-
-/**
-  * @brief  Configure IrDA Power Mode (Normal or Low Power)
-  * @note   Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
-  *         IrDA feature is supported by the USARTx instance.
-  * @rmtoll CR3          IRLP          LL_USART_SetIrdaPowerMode
-  * @param  USARTx USART Instance
-  * @param  PowerMode This parameter can be one of the following values:
-  *         @arg @ref LL_USART_IRDA_POWER_NORMAL
-  *         @arg @ref LL_USART_IRDA_POWER_LOW
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode)
-{
-  MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);
-}
-
-/**
-  * @brief  Retrieve IrDA Power Mode configuration (Normal or Low Power)
-  * @note   Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
-  *         IrDA feature is supported by the USARTx instance.
-  * @rmtoll CR3          IRLP          LL_USART_GetIrdaPowerMode
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_IRDA_POWER_NORMAL
-  *         @arg @ref LL_USART_PHASE_2EDGE
-  */
-__STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));
-}
-
-/**
-  * @brief  Set Irda prescaler value, used for dividing the USART clock source
-  *         to achieve the Irda Low Power frequency (8 bits value)
-  * @note   Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
-  *         IrDA feature is supported by the USARTx instance.
-  * @rmtoll GTPR         PSC           LL_USART_SetIrdaPrescaler
-  * @param  USARTx USART Instance
-  * @param  PrescalerValue Value between Min_Data=0x00 and Max_Data=0xFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
-{
-  MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
-}
-
-/**
-  * @brief  Return Irda prescaler value, used for dividing the USART clock source
-  *         to achieve the Irda Low Power frequency (8 bits value)
-  * @note   Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
-  *         IrDA feature is supported by the USARTx instance.
-  * @rmtoll GTPR         PSC           LL_USART_GetIrdaPrescaler
-  * @param  USARTx USART Instance
-  * @retval Irda prescaler value (Value between Min_Data=0x00 and Max_Data=0xFF)
-  */
-__STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EF_Configuration_Smartcard Configuration functions related to Smartcard feature
-  * @{
-  */
-
-/**
-  * @brief  Enable Smartcard NACK transmission
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll CR3          NACK          LL_USART_EnableSmartcardNACK
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR3, USART_CR3_NACK);
-}
-
-/**
-  * @brief  Disable Smartcard NACK transmission
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll CR3          NACK          LL_USART_DisableSmartcardNACK
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);
-}
-
-/**
-  * @brief  Indicate if Smartcard NACK transmission is enabled
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll CR3          NACK          LL_USART_IsEnabledSmartcardNACK
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK));
-}
-
-/**
-  * @brief  Enable Smartcard mode
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll CR3          SCEN          LL_USART_EnableSmartcard
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR3, USART_CR3_SCEN);
-}
-
-/**
-  * @brief  Disable Smartcard mode
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll CR3          SCEN          LL_USART_DisableSmartcard
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);
-}
-
-/**
-  * @brief  Indicate if Smartcard mode is enabled
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll CR3          SCEN          LL_USART_IsEnabledSmartcard
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN));
-}
-
-/**
-  * @brief  Set Smartcard Auto-Retry Count value (SCARCNT[2:0] bits)
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @note   This bit-field specifies the number of retries in transmit and receive, in Smartcard mode.
-  *         In transmission mode, it specifies the number of automatic retransmission retries, before
-  *         generating a transmission error (FE bit set).
-  *         In reception mode, it specifies the number or erroneous reception trials, before generating a
-  *         reception error (RXNE and PE bits set)
-  * @rmtoll CR3          SCARCNT       LL_USART_SetSmartcardAutoRetryCount
-  * @param  USARTx USART Instance
-  * @param  AutoRetryCount Value between Min_Data=0 and Max_Data=7
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetSmartcardAutoRetryCount(USART_TypeDef *USARTx, uint32_t AutoRetryCount)
-{
-  MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_POSITION_CR3_SCARCNT);
-}
-
-/**
-  * @brief  Return Smartcard Auto-Retry Count value (SCARCNT[2:0] bits)
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll CR3          SCARCNT       LL_USART_GetSmartcardAutoRetryCount
-  * @param  USARTx USART Instance
-  * @retval Smartcard Auto-Retry Count value (Value between Min_Data=0 and Max_Data=7)
-  */
-__STATIC_INLINE uint32_t LL_USART_GetSmartcardAutoRetryCount(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_POSITION_CR3_SCARCNT);
-}
-
-/**
-  * @brief  Set Smartcard prescaler value, used for dividing the USART clock
-  *         source to provide the SMARTCARD Clock (5 bits value)
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll GTPR         PSC           LL_USART_SetSmartcardPrescaler
-  * @param  USARTx USART Instance
-  * @param  PrescalerValue Value between Min_Data=0 and Max_Data=31
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
-{
-  MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
-}
-
-/**
-  * @brief  Return Smartcard prescaler value, used for dividing the USART clock
-  *         source to provide the SMARTCARD Clock (5 bits value)
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll GTPR         PSC           LL_USART_GetSmartcardPrescaler
-  * @param  USARTx USART Instance
-  * @retval Smartcard prescaler value (Value between Min_Data=0 and Max_Data=31)
-  */
-__STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
-}
-
-/**
-  * @brief  Set Smartcard Guard time value, expressed in nb of baud clocks periods
-  *         (GT[7:0] bits : Guard time value)
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll GTPR         GT            LL_USART_SetSmartcardGuardTime
-  * @param  USARTx USART Instance
-  * @param  GuardTime Value between Min_Data=0x00 and Max_Data=0xFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime)
-{
-  MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, GuardTime << USART_POSITION_GTPR_GT);
-}
-
-/**
-  * @brief  Return Smartcard Guard time value, expressed in nb of baud clocks periods
-  *         (GT[7:0] bits : Guard time value)
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll GTPR         GT            LL_USART_GetSmartcardGuardTime
-  * @param  USARTx USART Instance
-  * @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF)
-  */
-__STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_POSITION_GTPR_GT);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
-  * @{
-  */
-
-/**
-  * @brief  Enable Single Wire Half-Duplex mode
-  * @note   Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
-  *         Half-Duplex mode is supported by the USARTx instance.
-  * @rmtoll CR3          HDSEL         LL_USART_EnableHalfDuplex
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
-}
-
-/**
-  * @brief  Disable Single Wire Half-Duplex mode
-  * @note   Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
-  *         Half-Duplex mode is supported by the USARTx instance.
-  * @rmtoll CR3          HDSEL         LL_USART_DisableHalfDuplex
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
-}
-
-/**
-  * @brief  Indicate if Single Wire Half-Duplex mode is enabled
-  * @note   Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
-  *         Half-Duplex mode is supported by the USARTx instance.
-  * @rmtoll CR3          HDSEL         LL_USART_IsEnabledHalfDuplex
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature
-  * @{
-  */
-
-/**
-  * @brief  Set LIN Break Detection Length
-  * @note   Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
-  *         LIN feature is supported by the USARTx instance.
-  * @rmtoll CR2          LBDL          LL_USART_SetLINBrkDetectionLen
-  * @param  USARTx USART Instance
-  * @param  LINBDLength This parameter can be one of the following values:
-  *         @arg @ref LL_USART_LINBREAK_DETECT_10B
-  *         @arg @ref LL_USART_LINBREAK_DETECT_11B
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength)
-{
-  MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength);
-}
-
-/**
-  * @brief  Return LIN Break Detection Length
-  * @note   Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
-  *         LIN feature is supported by the USARTx instance.
-  * @rmtoll CR2          LBDL          LL_USART_GetLINBrkDetectionLen
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_LINBREAK_DETECT_10B
-  *         @arg @ref LL_USART_LINBREAK_DETECT_11B
-  */
-__STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL));
-}
-
-/**
-  * @brief  Enable LIN mode
-  * @note   Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
-  *         LIN feature is supported by the USARTx instance.
-  * @rmtoll CR2          LINEN         LL_USART_EnableLIN
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR2, USART_CR2_LINEN);
-}
-
-/**
-  * @brief  Disable LIN mode
-  * @note   Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
-  *         LIN feature is supported by the USARTx instance.
-  * @rmtoll CR2          LINEN         LL_USART_DisableLIN
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN);
-}
-
-/**
-  * @brief  Indicate if LIN mode is enabled
-  * @note   Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
-  *         LIN feature is supported by the USARTx instance.
-  * @rmtoll CR2          LINEN         LL_USART_IsEnabledLIN
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature
-  * @{
-  */
-
-/**
-  * @brief  Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits).
-  * @note   Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
-  *         Driver Enable feature is supported by the USARTx instance.
-  * @rmtoll CR1          DEDT          LL_USART_SetDEDeassertionTime
-  * @param  USARTx USART Instance
-  * @param  Time Value between Min_Data=0 and Max_Data=31
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetDEDeassertionTime(USART_TypeDef *USARTx, uint32_t Time)
-{
-  MODIFY_REG(USARTx->CR1, USART_CR1_DEDT, Time << USART_POSITION_CR1_DEDT);
-}
-
-/**
-  * @brief  Return DEDT (Driver Enable De-Assertion Time)
-  * @note   Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
-  *         Driver Enable feature is supported by the USARTx instance.
-  * @rmtoll CR1          DEDT          LL_USART_GetDEDeassertionTime
-  * @param  USARTx USART Instance
-  * @retval Time value expressed on 5 bits ([4:0] bits) : Value between Min_Data=0 and Max_Data=31
-  */
-__STATIC_INLINE uint32_t LL_USART_GetDEDeassertionTime(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_DEDT) >> USART_POSITION_CR1_DEDT);
-}
-
-/**
-  * @brief  Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits).
-  * @note   Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
-  *         Driver Enable feature is supported by the USARTx instance.
-  * @rmtoll CR1          DEAT          LL_USART_SetDEAssertionTime
-  * @param  USARTx USART Instance
-  * @param  Time Value between Min_Data=0 and Max_Data=31
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetDEAssertionTime(USART_TypeDef *USARTx, uint32_t Time)
-{
-  MODIFY_REG(USARTx->CR1, USART_CR1_DEAT, Time << USART_POSITION_CR1_DEAT);
-}
-
-/**
-  * @brief  Return DEAT (Driver Enable Assertion Time)
-  * @note   Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
-  *         Driver Enable feature is supported by the USARTx instance.
-  * @rmtoll CR1          DEAT          LL_USART_GetDEAssertionTime
-  * @param  USARTx USART Instance
-  * @retval Time value expressed on 5 bits ([4:0] bits) : Value between Min_Data=0 and Max_Data=31
-  */
-__STATIC_INLINE uint32_t LL_USART_GetDEAssertionTime(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_DEAT) >> USART_POSITION_CR1_DEAT);
-}
-
-/**
-  * @brief  Enable Driver Enable (DE) Mode
-  * @note   Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
-  *         Driver Enable feature is supported by the USARTx instance.
-  * @rmtoll CR3          DEM           LL_USART_EnableDEMode
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableDEMode(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR3, USART_CR3_DEM);
-}
-
-/**
-  * @brief  Disable Driver Enable (DE) Mode
-  * @note   Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
-  *         Driver Enable feature is supported by the USARTx instance.
-  * @rmtoll CR3          DEM           LL_USART_DisableDEMode
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableDEMode(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR3, USART_CR3_DEM);
-}
-
-/**
-  * @brief  Indicate if Driver Enable (DE) Mode is enabled
-  * @note   Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
-  *         Driver Enable feature is supported by the USARTx instance.
-  * @rmtoll CR3          DEM           LL_USART_IsEnabledDEMode
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledDEMode(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM));
-}
-
-/**
-  * @brief  Select Driver Enable Polarity
-  * @note   Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
-  *         Driver Enable feature is supported by the USARTx instance.
-  * @rmtoll CR3          DEP           LL_USART_SetDESignalPolarity
-  * @param  USARTx USART Instance
-  * @param  Polarity This parameter can be one of the following values:
-  *         @arg @ref LL_USART_DE_POLARITY_HIGH
-  *         @arg @ref LL_USART_DE_POLARITY_LOW
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_SetDESignalPolarity(USART_TypeDef *USARTx, uint32_t Polarity)
-{
-  MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity);
-}
-
-/**
-  * @brief  Return Driver Enable Polarity
-  * @note   Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
-  *         Driver Enable feature is supported by the USARTx instance.
-  * @rmtoll CR3          DEP           LL_USART_GetDESignalPolarity
-  * @param  USARTx USART Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_USART_DE_POLARITY_HIGH
-  *         @arg @ref LL_USART_DE_POLARITY_LOW
-  */
-__STATIC_INLINE uint32_t LL_USART_GetDESignalPolarity(USART_TypeDef *USARTx)
-{
-  return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EF_AdvancedConfiguration Advanced Configurations services
-  * @{
-  */
-
-/**
-  * @brief  Perform basic configuration of USART for enabling use in Asynchronous Mode (UART)
-  * @note   In UART mode, the following bits must be kept cleared:
-  *           - LINEN bit in the USART_CR2 register,
-  *           - CLKEN bit in the USART_CR2 register,
-  *           - SCEN bit in the USART_CR3 register,
-  *           - IREN bit in the USART_CR3 register,
-  *           - HDSEL bit in the USART_CR3 register.
-  * @note   Call of this function is equivalent to following function call sequence :
-  *         - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
-  *         - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
-  *         - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
-  *         - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
-  *         - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
-  * @note   Other remaining configurations items related to Asynchronous Mode
-  *         (as Baud Rate, Word length, Parity, ...) should be set using
-  *         dedicated functions
-  * @rmtoll CR2          LINEN         LL_USART_ConfigAsyncMode\n
-  *         CR2          CLKEN         LL_USART_ConfigAsyncMode\n
-  *         CR3          SCEN          LL_USART_ConfigAsyncMode\n
-  *         CR3          IREN          LL_USART_ConfigAsyncMode\n
-  *         CR3          HDSEL         LL_USART_ConfigAsyncMode
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
-{
-  /* In Asynchronous mode, the following bits must be kept cleared:
-  - LINEN, CLKEN bits in the USART_CR2 register,
-  - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
-  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
-  CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
-}
-
-/**
-  * @brief  Perform basic configuration of USART for enabling use in Synchronous Mode
-  * @note   In Synchronous mode, the following bits must be kept cleared:
-  *           - LINEN bit in the USART_CR2 register,
-  *           - SCEN bit in the USART_CR3 register,
-  *           - IREN bit in the USART_CR3 register,
-  *           - HDSEL bit in the USART_CR3 register.
-  *         This function also sets the USART in Synchronous mode.
-  * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
-  *         Synchronous mode is supported by the USARTx instance.
-  * @note   Call of this function is equivalent to following function call sequence :
-  *         - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
-  *         - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
-  *         - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
-  *         - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
-  *         - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
-  * @note   Other remaining configurations items related to Synchronous Mode
-  *         (as Baud Rate, Word length, Parity, Clock Polarity, ...) should be set using
-  *         dedicated functions
-  * @rmtoll CR2          LINEN         LL_USART_ConfigSyncMode\n
-  *         CR2          CLKEN         LL_USART_ConfigSyncMode\n
-  *         CR3          SCEN          LL_USART_ConfigSyncMode\n
-  *         CR3          IREN          LL_USART_ConfigSyncMode\n
-  *         CR3          HDSEL         LL_USART_ConfigSyncMode
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
-{
-  /* In Synchronous mode, the following bits must be kept cleared:
-  - LINEN bit in the USART_CR2 register,
-  - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
-  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
-  CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
-  /* set the UART/USART in Synchronous mode */
-  SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
-}
-
-/**
-  * @brief  Perform basic configuration of USART for enabling use in LIN Mode
-  * @note   In LIN mode, the following bits must be kept cleared:
-  *           - STOP and CLKEN bits in the USART_CR2 register,
-  *           - SCEN bit in the USART_CR3 register,
-  *           - IREN bit in the USART_CR3 register,
-  *           - HDSEL bit in the USART_CR3 register.
-  *         This function also set the UART/USART in LIN mode.
-  * @note   Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
-  *         LIN feature is supported by the USARTx instance.
-  * @note   Call of this function is equivalent to following function call sequence :
-  *         - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
-  *         - Clear STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
-  *         - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
-  *         - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
-  *         - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
-  *         - Set LINEN in CR2 using @ref LL_USART_EnableLIN() function
-  * @note   Other remaining configurations items related to LIN Mode
-  *         (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using
-  *         dedicated functions
-  * @rmtoll CR2          CLKEN         LL_USART_ConfigLINMode\n
-  *         CR2          STOP          LL_USART_ConfigLINMode\n
-  *         CR2          LINEN         LL_USART_ConfigLINMode\n
-  *         CR3          IREN          LL_USART_ConfigLINMode\n
-  *         CR3          SCEN          LL_USART_ConfigLINMode\n
-  *         CR3          HDSEL         LL_USART_ConfigLINMode
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx)
-{
-  /* In LIN mode, the following bits must be kept cleared:
-  - STOP and CLKEN bits in the USART_CR2 register,
-  - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
-  CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN | USART_CR2_STOP));
-  CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));
-  /* Set the UART/USART in LIN mode */
-  SET_BIT(USARTx->CR2, USART_CR2_LINEN);
-}
-
-/**
-  * @brief  Perform basic configuration of USART for enabling use in Half Duplex Mode
-  * @note   In Half Duplex mode, the following bits must be kept cleared:
-  *           - LINEN bit in the USART_CR2 register,
-  *           - CLKEN bit in the USART_CR2 register,
-  *           - SCEN bit in the USART_CR3 register,
-  *           - IREN bit in the USART_CR3 register,
-  *         This function also sets the UART/USART in Half Duplex mode.
-  * @note   Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
-  *         Half-Duplex mode is supported by the USARTx instance.
-  * @note   Call of this function is equivalent to following function call sequence :
-  *         - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
-  *         - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
-  *         - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
-  *         - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
-  *         - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function
-  * @note   Other remaining configurations items related to Half Duplex Mode
-  *         (as Baud Rate, Word length, Parity, ...) should be set using
-  *         dedicated functions
-  * @rmtoll CR2          LINEN         LL_USART_ConfigHalfDuplexMode\n
-  *         CR2          CLKEN         LL_USART_ConfigHalfDuplexMode\n
-  *         CR3          HDSEL         LL_USART_ConfigHalfDuplexMode\n
-  *         CR3          SCEN          LL_USART_ConfigHalfDuplexMode\n
-  *         CR3          IREN          LL_USART_ConfigHalfDuplexMode
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
-{
-  /* In Half Duplex mode, the following bits must be kept cleared:
-  - LINEN and CLKEN bits in the USART_CR2 register,
-  - SCEN and IREN bits in the USART_CR3 register.*/
-  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
-  CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));
-  /* set the UART/USART in Half Duplex mode */
-  SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
-}
-
-/**
-  * @brief  Perform basic configuration of USART for enabling use in Smartcard Mode
-  * @note   In Smartcard mode, the following bits must be kept cleared:
-  *           - LINEN bit in the USART_CR2 register,
-  *           - IREN bit in the USART_CR3 register,
-  *           - HDSEL bit in the USART_CR3 register.
-  *         This function also configures Stop bits to 1.5 bits and
-  *         sets the USART in Smartcard mode (SCEN bit).
-  *         Clock Output is also enabled (CLKEN).
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @note   Call of this function is equivalent to following function call sequence :
-  *         - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
-  *         - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
-  *         - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
-  *         - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
-  *         - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
-  *         - Set SCEN in CR3 using @ref LL_USART_EnableSmartcard() function
-  * @note   Other remaining configurations items related to Smartcard Mode
-  *         (as Baud Rate, Word length, Parity, ...) should be set using
-  *         dedicated functions
-  * @rmtoll CR2          LINEN         LL_USART_ConfigSmartcardMode\n
-  *         CR2          STOP          LL_USART_ConfigSmartcardMode\n
-  *         CR2          CLKEN         LL_USART_ConfigSmartcardMode\n
-  *         CR3          HDSEL         LL_USART_ConfigSmartcardMode\n
-  *         CR3          SCEN          LL_USART_ConfigSmartcardMode
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
-{
-  /* In Smartcard mode, the following bits must be kept cleared:
-  - LINEN bit in the USART_CR2 register,
-  - IREN and HDSEL bits in the USART_CR3 register.*/
-  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
-  CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));
-  /* Configure Stop bits to 1.5 bits */
-  /* Synchronous mode is activated by default */
-  SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN));
-  /* set the UART/USART in Smartcard mode */
-  SET_BIT(USARTx->CR3, USART_CR3_SCEN);
-}
-
-/**
-  * @brief  Perform basic configuration of USART for enabling use in Irda Mode
-  * @note   In IRDA mode, the following bits must be kept cleared:
-  *           - LINEN bit in the USART_CR2 register,
-  *           - STOP and CLKEN bits in the USART_CR2 register,
-  *           - SCEN bit in the USART_CR3 register,
-  *           - HDSEL bit in the USART_CR3 register.
-  *         This function also sets the UART/USART in IRDA mode (IREN bit).
-  * @note   Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
-  *         IrDA feature is supported by the USARTx instance.
-  * @note   Call of this function is equivalent to following function call sequence :
-  *         - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
-  *         - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
-  *         - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
-  *         - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
-  *         - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
-  *         - Set IREN in CR3 using @ref LL_USART_EnableIrda() function
-  * @note   Other remaining configurations items related to Irda Mode
-  *         (as Baud Rate, Word length, Power mode, ...) should be set using
-  *         dedicated functions
-  * @rmtoll CR2          LINEN         LL_USART_ConfigIrdaMode\n
-  *         CR2          CLKEN         LL_USART_ConfigIrdaMode\n
-  *         CR2          STOP          LL_USART_ConfigIrdaMode\n
-  *         CR3          SCEN          LL_USART_ConfigIrdaMode\n
-  *         CR3          HDSEL         LL_USART_ConfigIrdaMode\n
-  *         CR3          IREN          LL_USART_ConfigIrdaMode
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx)
-{
-  /* In IRDA mode, the following bits must be kept cleared:
-  - LINEN, STOP and CLKEN bits in the USART_CR2 register,
-  - SCEN and HDSEL bits in the USART_CR3 register.*/
-  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
-  CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
-  /* set the UART/USART in IRDA mode */
-  SET_BIT(USARTx->CR3, USART_CR3_IREN);
-}
-
-/**
-  * @brief  Perform basic configuration of USART for enabling use in Multi processor Mode
-  *         (several USARTs connected in a network, one of the USARTs can be the master,
-  *         its TX output connected to the RX inputs of the other slaves USARTs).
-  * @note   In MultiProcessor mode, the following bits must be kept cleared:
-  *           - LINEN bit in the USART_CR2 register,
-  *           - CLKEN bit in the USART_CR2 register,
-  *           - SCEN bit in the USART_CR3 register,
-  *           - IREN bit in the USART_CR3 register,
-  *           - HDSEL bit in the USART_CR3 register.
-  * @note   Call of this function is equivalent to following function call sequence :
-  *         - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
-  *         - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
-  *         - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
-  *         - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
-  *         - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
-  * @note   Other remaining configurations items related to Multi processor Mode
-  *         (as Baud Rate, Wake Up Method, Node address, ...) should be set using
-  *         dedicated functions
-  * @rmtoll CR2          LINEN         LL_USART_ConfigMultiProcessMode\n
-  *         CR2          CLKEN         LL_USART_ConfigMultiProcessMode\n
-  *         CR3          SCEN          LL_USART_ConfigMultiProcessMode\n
-  *         CR3          HDSEL         LL_USART_ConfigMultiProcessMode\n
-  *         CR3          IREN          LL_USART_ConfigMultiProcessMode
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
-{
-  /* In Multi Processor mode, the following bits must be kept cleared:
-  - LINEN and CLKEN bits in the USART_CR2 register,
-  - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
-  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
-  CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EF_FLAG_Management FLAG_Management
-  * @{
-  */
-
-/**
-  * @brief  Check if the USART Parity Error Flag is set or not
-  * @rmtoll ISR          PE            LL_USART_IsActiveFlag_PE
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_PE) == (USART_ISR_PE));
-}
-
-/**
-  * @brief  Check if the USART Framing Error Flag is set or not
-  * @rmtoll ISR          FE            LL_USART_IsActiveFlag_FE
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_FE) == (USART_ISR_FE));
-}
-
-/**
-  * @brief  Check if the USART Noise error detected Flag is set or not
-  * @rmtoll ISR          NF            LL_USART_IsActiveFlag_NE
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_NE) == (USART_ISR_NE));
-}
-
-/**
-  * @brief  Check if the USART OverRun Error Flag is set or not
-  * @rmtoll ISR          ORE           LL_USART_IsActiveFlag_ORE
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE));
-}
-
-/**
-  * @brief  Check if the USART IDLE line detected Flag is set or not
-  * @rmtoll ISR          IDLE          LL_USART_IsActiveFlag_IDLE
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE));
-}
-
-/**
-  * @brief  Check if the USART Read Data Register Not Empty Flag is set or not
-  * @rmtoll ISR          RXNE          LL_USART_IsActiveFlag_RXNE
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE));
-}
-
-/**
-  * @brief  Check if the USART Transmission Complete Flag is set or not
-  * @rmtoll ISR          TC            LL_USART_IsActiveFlag_TC
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_TC) == (USART_ISR_TC));
-}
-
-/**
-  * @brief  Check if the USART Transmit Data Register Empty Flag is set or not
-  * @rmtoll ISR          TXE           LL_USART_IsActiveFlag_TXE
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE));
-}
-
-/**
-  * @brief  Check if the USART LIN Break Detection Flag is set or not
-  * @note   Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
-  *         LIN feature is supported by the USARTx instance.
-  * @rmtoll ISR          LBDF          LL_USART_IsActiveFlag_LBD
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_LBDF) == (USART_ISR_LBDF));
-}
-
-/**
-  * @brief  Check if the USART CTS interrupt Flag is set or not
-  * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-  *         Hardware Flow control feature is supported by the USARTx instance.
-  * @rmtoll ISR          CTSIF         LL_USART_IsActiveFlag_nCTS
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF));
-}
-
-/**
-  * @brief  Check if the USART CTS Flag is set or not
-  * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-  *         Hardware Flow control feature is supported by the USARTx instance.
-  * @rmtoll ISR          CTS           LL_USART_IsActiveFlag_CTS
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CTS(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS));
-}
-
-/**
-  * @brief  Check if the USART Receiver Time Out Flag is set or not
-  * @rmtoll ISR          RTOF          LL_USART_IsActiveFlag_RTO
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RTO(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_RTOF) == (USART_ISR_RTOF));
-}
-
-/**
-  * @brief  Check if the USART End Of Block Flag is set or not
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll ISR          EOBF          LL_USART_IsActiveFlag_EOB
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_EOB(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_EOBF) == (USART_ISR_EOBF));
-}
-
-/**
-  * @brief  Check if the USART Auto-Baud Rate Error Flag is set or not
-  * @note   Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
-  *         Auto Baud Rate detection feature is supported by the USARTx instance.
-  * @rmtoll ISR          ABRE          LL_USART_IsActiveFlag_ABRE
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABRE(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_ABRE) == (USART_ISR_ABRE));
-}
-
-/**
-  * @brief  Check if the USART Auto-Baud Rate Flag is set or not
-  * @note   Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
-  *         Auto Baud Rate detection feature is supported by the USARTx instance.
-  * @rmtoll ISR          ABRF          LL_USART_IsActiveFlag_ABR
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABR(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_ABRF) == (USART_ISR_ABRF));
-}
-
-/**
-  * @brief  Check if the USART Busy Flag is set or not
-  * @rmtoll ISR          BUSY          LL_USART_IsActiveFlag_BUSY
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_BUSY(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY));
-}
-
-/**
-  * @brief  Check if the USART Character Match Flag is set or not
-  * @rmtoll ISR          CMF           LL_USART_IsActiveFlag_CM
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CM(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF));
-}
-
-/**
-  * @brief  Check if the USART Send Break Flag is set or not
-  * @rmtoll ISR          SBKF          LL_USART_IsActiveFlag_SBK
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF));
-}
-
-/**
-  * @brief  Check if the USART Receive Wake Up from mute mode Flag is set or not
-  * @rmtoll ISR          RWU           LL_USART_IsActiveFlag_RWU
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU));
-}
-
-/**
-  * @brief  Check if the USART Wake Up from stop mode Flag is set or not
-  * @note   Macro @ref IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-  *         Wake-up from Stop mode feature is supported by the USARTx instance.
-  * @rmtoll ISR          WUF           LL_USART_IsActiveFlag_WKUP
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_WKUP(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF));
-}
-
-/**
-  * @brief  Check if the USART Transmit Enable Acknowledge Flag is set or not
-  * @rmtoll ISR          TEACK         LL_USART_IsActiveFlag_TEACK
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TEACK(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK));
-}
-
-/**
-  * @brief  Check if the USART Receive Enable Acknowledge Flag is set or not
-  * @rmtoll ISR          REACK         LL_USART_IsActiveFlag_REACK
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_REACK(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK));
-}
-
-#if defined(USART_TCBGT_SUPPORT)
-/* Function available only on devices supporting Transmit Complete before Guard Time feature */
-/**
-  * @brief  Check if the Smartcard Transmission Complete Before Guard Time Flag is set or not
-  * @rmtoll ISR          TCBGT         LL_USART_IsActiveFlag_TCBGT
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TCBGT(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->ISR, USART_ISR_TCBGT) == (USART_ISR_TCBGT));
-}
-#endif
-
-/**
-  * @brief  Clear Parity Error Flag
-  * @rmtoll ICR          PECF          LL_USART_ClearFlag_PE
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
-{
-  WRITE_REG(USARTx->ICR, USART_ICR_PECF);
-}
-
-/**
-  * @brief  Clear Framing Error Flag
-  * @rmtoll ICR          FECF          LL_USART_ClearFlag_FE
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
-{
-  WRITE_REG(USARTx->ICR, USART_ICR_FECF);
-}
-
-/**
-  * @brief  Clear Noise detected Flag
-  * @rmtoll ICR          NCF           LL_USART_ClearFlag_NE
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
-{
-  WRITE_REG(USARTx->ICR, USART_ICR_NCF);
-}
-
-/**
-  * @brief  Clear OverRun Error Flag
-  * @rmtoll ICR          ORECF         LL_USART_ClearFlag_ORE
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
-{
-  WRITE_REG(USARTx->ICR, USART_ICR_ORECF);
-}
-
-/**
-  * @brief  Clear IDLE line detected Flag
-  * @rmtoll ICR          IDLECF        LL_USART_ClearFlag_IDLE
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
-{
-  WRITE_REG(USARTx->ICR, USART_ICR_IDLECF);
-}
-
-/**
-  * @brief  Clear Transmission Complete Flag
-  * @rmtoll ICR          TCCF          LL_USART_ClearFlag_TC
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
-{
-  WRITE_REG(USARTx->ICR, USART_ICR_TCCF);
-}
-
-#if defined(USART_TCBGT_SUPPORT)
-/* Function available only on devices supporting Transmit Complete before Guard Time feature */
-/**
-  * @brief  Clear Smartcard Transmission Complete Before Guard Time Flag
-  * @rmtoll ICR          TCBGTCF       LL_USART_ClearFlag_TCBGT
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ClearFlag_TCBGT(USART_TypeDef *USARTx)
-{
-  WRITE_REG(USARTx->ICR, USART_ICR_TCBGTCF);
-}
-#endif
-
-/**
-  * @brief  Clear LIN Break Detection Flag
-  * @note   Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
-  *         LIN feature is supported by the USARTx instance.
-  * @rmtoll ICR          LBDCF         LL_USART_ClearFlag_LBD
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
-{
-  WRITE_REG(USARTx->ICR, USART_ICR_LBDCF);
-}
-
-/**
-  * @brief  Clear CTS Interrupt Flag
-  * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-  *         Hardware Flow control feature is supported by the USARTx instance.
-  * @rmtoll ICR          CTSCF         LL_USART_ClearFlag_nCTS
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
-{
-  WRITE_REG(USARTx->ICR, USART_ICR_CTSCF);
-}
-
-/**
-  * @brief  Clear Receiver Time Out Flag
-  * @rmtoll ICR          RTOCF         LL_USART_ClearFlag_RTO
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ClearFlag_RTO(USART_TypeDef *USARTx)
-{
-  WRITE_REG(USARTx->ICR, USART_ICR_RTOCF);
-}
-
-/**
-  * @brief  Clear End Of Block Flag
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll ICR          EOBCF         LL_USART_ClearFlag_EOB
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ClearFlag_EOB(USART_TypeDef *USARTx)
-{
-  WRITE_REG(USARTx->ICR, USART_ICR_EOBCF);
-}
-
-/**
-  * @brief  Clear Character Match Flag
-  * @rmtoll ICR          CMCF          LL_USART_ClearFlag_CM
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ClearFlag_CM(USART_TypeDef *USARTx)
-{
-  WRITE_REG(USARTx->ICR, USART_ICR_CMCF);
-}
-
-/**
-  * @brief  Clear Wake Up from stop mode Flag
-  * @note   Macro @ref IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-  *         Wake-up from Stop mode feature is supported by the USARTx instance.
-  * @rmtoll ICR          WUCF          LL_USART_ClearFlag_WKUP
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_ClearFlag_WKUP(USART_TypeDef *USARTx)
-{
-  WRITE_REG(USARTx->ICR, USART_ICR_WUCF);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EF_IT_Management IT_Management
-  * @{
-  */
-
-/**
-  * @brief  Enable IDLE Interrupt
-  * @rmtoll CR1          IDLEIE        LL_USART_EnableIT_IDLE
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
-}
-
-/**
-  * @brief  Enable RX Not Empty Interrupt
-  * @rmtoll CR1          RXNEIE        LL_USART_EnableIT_RXNE
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR1, USART_CR1_RXNEIE);
-}
-
-/**
-  * @brief  Enable Transmission Complete Interrupt
-  * @rmtoll CR1          TCIE          LL_USART_EnableIT_TC
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR1, USART_CR1_TCIE);
-}
-
-/**
-  * @brief  Enable TX Empty Interrupt
-  * @rmtoll CR1          TXEIE         LL_USART_EnableIT_TXE
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR1, USART_CR1_TXEIE);
-}
-
-/**
-  * @brief  Enable Parity Error Interrupt
-  * @rmtoll CR1          PEIE          LL_USART_EnableIT_PE
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR1, USART_CR1_PEIE);
-}
-
-/**
-  * @brief  Enable Character Match Interrupt
-  * @rmtoll CR1          CMIE          LL_USART_EnableIT_CM
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableIT_CM(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR1, USART_CR1_CMIE);
-}
-
-/**
-  * @brief  Enable Receiver Timeout Interrupt
-  * @rmtoll CR1          RTOIE         LL_USART_EnableIT_RTO
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableIT_RTO(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR1, USART_CR1_RTOIE);
-}
-
-/**
-  * @brief  Enable End Of Block Interrupt
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll CR1          EOBIE         LL_USART_EnableIT_EOB
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableIT_EOB(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR1, USART_CR1_EOBIE);
-}
-
-/**
-  * @brief  Enable LIN Break Detection Interrupt
-  * @note   Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
-  *         LIN feature is supported by the USARTx instance.
-  * @rmtoll CR2          LBDIE         LL_USART_EnableIT_LBD
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR2, USART_CR2_LBDIE);
-}
-
-/**
-  * @brief  Enable Error Interrupt
-  * @note   When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
-  *         error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_ISR register).
-  *           0: Interrupt is inhibited
-  *           1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register.
-  * @rmtoll CR3          EIE           LL_USART_EnableIT_ERROR
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR3, USART_CR3_EIE);
-}
-
-/**
-  * @brief  Enable CTS Interrupt
-  * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-  *         Hardware Flow control feature is supported by the USARTx instance.
-  * @rmtoll CR3          CTSIE         LL_USART_EnableIT_CTS
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR3, USART_CR3_CTSIE);
-}
-
-/**
-  * @brief  Enable Wake Up from Stop Mode Interrupt
-  * @note   Macro @ref IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-  *         Wake-up from Stop mode feature is supported by the USARTx instance.
-  * @rmtoll CR3          WUFIE         LL_USART_EnableIT_WKUP
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableIT_WKUP(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR3, USART_CR3_WUFIE);
-}
-
-#if defined(USART_TCBGT_SUPPORT)
-/* Function available only on devices supporting Transmit Complete before Guard Time feature */
-/**
-  * @brief  Enable Smartcard Transmission Complete Before Guard Time Interrupt
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll CR3          TCBGTIE       LL_USART_EnableIT_TCBGT
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableIT_TCBGT(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE);
-}
-#endif
-
-/**
-  * @brief  Disable IDLE Interrupt
-  * @rmtoll CR1          IDLEIE        LL_USART_DisableIT_IDLE
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
-}
-
-/**
-  * @brief  Disable RX Not Empty Interrupt
-  * @rmtoll CR1          RXNEIE        LL_USART_DisableIT_RXNE
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE);
-}
-
-/**
-  * @brief  Disable Transmission Complete Interrupt
-  * @rmtoll CR1          TCIE          LL_USART_DisableIT_TC
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE);
-}
-
-/**
-  * @brief  Disable TX Empty Interrupt
-  * @rmtoll CR1          TXEIE         LL_USART_DisableIT_TXE
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE);
-}
-
-/**
-  * @brief  Disable Parity Error Interrupt
-  * @rmtoll CR1          PEIE          LL_USART_DisableIT_PE
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
-}
-
-/**
-  * @brief  Disable Character Match Interrupt
-  * @rmtoll CR1          CMIE          LL_USART_DisableIT_CM
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableIT_CM(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR1, USART_CR1_CMIE);
-}
-
-/**
-  * @brief  Disable Receiver Timeout Interrupt
-  * @rmtoll CR1          RTOIE         LL_USART_DisableIT_RTO
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableIT_RTO(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR1, USART_CR1_RTOIE);
-}
-
-/**
-  * @brief  Disable End Of Block Interrupt
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll CR1          EOBIE         LL_USART_DisableIT_EOB
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableIT_EOB(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR1, USART_CR1_EOBIE);
-}
-
-/**
-  * @brief  Disable LIN Break Detection Interrupt
-  * @note   Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
-  *         LIN feature is supported by the USARTx instance.
-  * @rmtoll CR2          LBDIE         LL_USART_DisableIT_LBD
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE);
-}
-
-/**
-  * @brief  Disable Error Interrupt
-  * @note   When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
-  *         error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_ISR register).
-  *           0: Interrupt is inhibited
-  *           1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register.
-  * @rmtoll CR3          EIE           LL_USART_DisableIT_ERROR
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
-}
-
-/**
-  * @brief  Disable CTS Interrupt
-  * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-  *         Hardware Flow control feature is supported by the USARTx instance.
-  * @rmtoll CR3          CTSIE         LL_USART_DisableIT_CTS
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);
-}
-
-/**
-  * @brief  Disable Wake Up from Stop Mode Interrupt
-  * @note   Macro @ref IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-  *         Wake-up from Stop mode feature is supported by the USARTx instance.
-  * @rmtoll CR3          WUFIE         LL_USART_DisableIT_WKUP
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableIT_WKUP(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR3, USART_CR3_WUFIE);
-}
-
-#if defined(USART_TCBGT_SUPPORT)
-/* Function available only on devices supporting Transmit Complete before Guard Time feature */
-/**
-  * @brief  Disable Smartcard Transmission Complete Before Guard Time Interrupt
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll CR3          TCBGTIE       LL_USART_DisableIT_TCBGT
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableIT_TCBGT(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE);
-}
-#endif
-
-/**
-  * @brief  Check if the USART IDLE Interrupt  source is enabled or disabled.
-  * @rmtoll CR1          IDLEIE        LL_USART_IsEnabledIT_IDLE
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
-}
-
-/**
-  * @brief  Check if the USART RX Not Empty Interrupt is enabled or disabled.
-  * @rmtoll CR1          RXNEIE        LL_USART_IsEnabledIT_RXNE
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
-}
-
-/**
-  * @brief  Check if the USART Transmission Complete Interrupt is enabled or disabled.
-  * @rmtoll CR1          TCIE          LL_USART_IsEnabledIT_TC
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
-}
-
-/**
-  * @brief  Check if the USART TX Empty Interrupt is enabled or disabled.
-  * @rmtoll CR1          TXEIE         LL_USART_IsEnabledIT_TXE
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
-}
-
-/**
-  * @brief  Check if the USART Parity Error Interrupt is enabled or disabled.
-  * @rmtoll CR1          PEIE          LL_USART_IsEnabledIT_PE
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
-}
-
-/**
-  * @brief  Check if the USART Character Match Interrupt is enabled or disabled.
-  * @rmtoll CR1          CMIE          LL_USART_IsEnabledIT_CM
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CM(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE));
-}
-
-/**
-  * @brief  Check if the USART Receiver Timeout Interrupt is enabled or disabled.
-  * @rmtoll CR1          RTOIE         LL_USART_IsEnabledIT_RTO
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RTO(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR1, USART_CR1_RTOIE) == (USART_CR1_RTOIE));
-}
-
-/**
-  * @brief  Check if the USART End Of Block Interrupt is enabled or disabled.
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll CR1          EOBIE         LL_USART_IsEnabledIT_EOB
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_EOB(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR1, USART_CR1_EOBIE) == (USART_CR1_EOBIE));
-}
-
-/**
-  * @brief  Check if the USART LIN Break Detection Interrupt is enabled or disabled.
-  * @note   Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
-  *         LIN feature is supported by the USARTx instance.
-  * @rmtoll CR2          LBDIE         LL_USART_IsEnabledIT_LBD
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE));
-}
-
-/**
-  * @brief  Check if the USART Error Interrupt is enabled or disabled.
-  * @rmtoll CR3          EIE           LL_USART_IsEnabledIT_ERROR
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
-}
-
-/**
-  * @brief  Check if the USART CTS Interrupt is enabled or disabled.
-  * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-  *         Hardware Flow control feature is supported by the USARTx instance.
-  * @rmtoll CR3          CTSIE         LL_USART_IsEnabledIT_CTS
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
-}
-
-/**
-  * @brief  Check if the USART Wake Up from Stop Mode Interrupt is enabled or disabled.
-  * @note   Macro @ref IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-  *         Wake-up from Stop mode feature is supported by the USARTx instance.
-  * @rmtoll CR3          WUFIE         LL_USART_IsEnabledIT_WKUP
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_WKUP(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE));
-}
-
-#if defined(USART_TCBGT_SUPPORT)
-/* Function available only on devices supporting Transmit Complete before Guard Time feature */
-/**
-  * @brief  Check if the Smartcard Transmission Complete Before Guard Time Interrupt is enabled or disabled.
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll CR3          TCBGTIE       LL_USART_IsEnabledIT_TCBGT
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TCBGT(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE));
-}
-#endif
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EF_DMA_Management DMA_Management
-  * @{
-  */
-
-/**
-  * @brief  Enable DMA Mode for reception
-  * @rmtoll CR3          DMAR          LL_USART_EnableDMAReq_RX
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR3, USART_CR3_DMAR);
-}
-
-/**
-  * @brief  Disable DMA Mode for reception
-  * @rmtoll CR3          DMAR          LL_USART_DisableDMAReq_RX
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);
-}
-
-/**
-  * @brief  Check if DMA Mode is enabled for reception
-  * @rmtoll CR3          DMAR          LL_USART_IsEnabledDMAReq_RX
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
-}
-
-/**
-  * @brief  Enable DMA Mode for transmission
-  * @rmtoll CR3          DMAT          LL_USART_EnableDMAReq_TX
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR3, USART_CR3_DMAT);
-}
-
-/**
-  * @brief  Disable DMA Mode for transmission
-  * @rmtoll CR3          DMAT          LL_USART_DisableDMAReq_TX
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);
-}
-
-/**
-  * @brief  Check if DMA Mode is enabled for transmission
-  * @rmtoll CR3          DMAT          LL_USART_IsEnabledDMAReq_TX
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
-}
-
-/**
-  * @brief  Enable DMA Disabling on Reception Error
-  * @rmtoll CR3          DDRE          LL_USART_EnableDMADeactOnRxErr
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_EnableDMADeactOnRxErr(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->CR3, USART_CR3_DDRE);
-}
-
-/**
-  * @brief  Disable DMA Disabling on Reception Error
-  * @rmtoll CR3          DDRE          LL_USART_DisableDMADeactOnRxErr
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_DisableDMADeactOnRxErr(USART_TypeDef *USARTx)
-{
-  CLEAR_BIT(USARTx->CR3, USART_CR3_DDRE);
-}
-
-/**
-  * @brief  Indicate if DMA Disabling on Reception Error is disabled
-  * @rmtoll CR3          DDRE          LL_USART_IsEnabledDMADeactOnRxErr
-  * @param  USARTx USART Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledDMADeactOnRxErr(USART_TypeDef *USARTx)
-{
-  return (READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE));
-}
-
-/**
-  * @brief  Get the data register address used for DMA transfer
-  * @rmtoll RDR          RDR           LL_USART_DMA_GetRegAddr\n
-  * @rmtoll TDR          TDR           LL_USART_DMA_GetRegAddr
-  * @param  USARTx USART Instance
-  * @param  Direction This parameter can be one of the following values:
-  *         @arg @ref LL_USART_DMA_REG_DATA_TRANSMIT
-  *         @arg @ref LL_USART_DMA_REG_DATA_RECEIVE
-  * @retval Address of data register
-  */
-__STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx, uint32_t Direction)
-{
-  register uint32_t data_reg_addr = 0U;
-
-  if (Direction == LL_USART_DMA_REG_DATA_TRANSMIT)
-  {
-    /* return address of TDR register */
-    data_reg_addr = (uint32_t) &(USARTx->TDR);
-  }
-  else
-  {
-    /* return address of RDR register */
-    data_reg_addr = (uint32_t) &(USARTx->RDR);
-  }
-
-  return data_reg_addr;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EF_Data_Management Data_Management
-  * @{
-  */
-
-/**
-  * @brief  Read Receiver Data register (Receive Data value, 8 bits)
-  * @rmtoll RDR          RDR           LL_USART_ReceiveData8
-  * @param  USARTx USART Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0xFF
-  */
-__STATIC_INLINE uint8_t LL_USART_ReceiveData8(USART_TypeDef *USARTx)
-{
-  return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR));
-}
-
-/**
-  * @brief  Read Receiver Data register (Receive Data value, 9 bits)
-  * @rmtoll RDR          RDR           LL_USART_ReceiveData9
-  * @param  USARTx USART Instance
-  * @retval Value between Min_Data=0x00 and Max_Data=0x1FF
-  */
-__STATIC_INLINE uint16_t LL_USART_ReceiveData9(USART_TypeDef *USARTx)
-{
-  return (uint16_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR));
-}
-
-/**
-  * @brief  Write in Transmitter Data Register (Transmit Data value, 8 bits)
-  * @rmtoll TDR          TDR           LL_USART_TransmitData8
-  * @param  USARTx USART Instance
-  * @param  Value between Min_Data=0x00 and Max_Data=0xFF
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
-{
-  USARTx->TDR = Value;
-}
-
-/**
-  * @brief  Write in Transmitter Data Register (Transmit Data value, 9 bits)
-  * @rmtoll TDR          TDR           LL_USART_TransmitData9
-  * @param  USARTx USART Instance
-  * @param  Value between Min_Data=0x00 and Max_Data=0x1FF
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
-{
-  USARTx->TDR = Value & 0x1FFU;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_LL_EF_Execution Execution
-  * @{
-  */
-
-/**
-  * @brief  Request an Automatic Baud Rate measurement on next received data frame
-  * @note   Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
-  *         Auto Baud Rate detection feature is supported by the USARTx instance.
-  * @rmtoll RQR          ABRRQ         LL_USART_RequestAutoBaudRate
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_RequestAutoBaudRate(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->RQR, USART_RQR_ABRRQ);
-}
-
-/**
-  * @brief  Request Break sending
-  * @rmtoll RQR          SBKRQ         LL_USART_RequestBreakSending
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->RQR, USART_RQR_SBKRQ);
-}
-
-/**
-  * @brief  Put USART in mute mode and set the RWU flag
-  * @rmtoll RQR          MMRQ          LL_USART_RequestEnterMuteMode
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->RQR, USART_RQR_MMRQ);
-}
-
-/**
-  * @brief  Request a Receive Data flush
-  * @rmtoll RQR          RXFRQ         LL_USART_RequestRxDataFlush
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_RequestRxDataFlush(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->RQR, USART_RQR_RXFRQ);
-}
-
-/**
-  * @brief  Request a Transmit data flush
-  * @note   Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-  *         Smartcard feature is supported by the USARTx instance.
-  * @rmtoll RQR          TXFRQ         LL_USART_RequestTxDataFlush
-  * @param  USARTx USART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_USART_RequestTxDataFlush(USART_TypeDef *USARTx)
-{
-  SET_BIT(USARTx->RQR, USART_RQR_TXFRQ);
-}
-
-/**
-  * @}
-  */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup USART_LL_EF_Init Initialization and de-initialization functions
-  * @{
-  */
-ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx);
-ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct);
-void        LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct);
-ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
-void        LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
-/**
-  * @}
-  */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* USART1 || USART2 || USART4 || USART5 */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_USART_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h
deleted file mode 100755
index 398e8763..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h
+++ /dev/null
@@ -1,284 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_utils.h
-  * @author  MCD Application Team
-  * @brief   Header file of UTILS LL module.
-  @verbatim
-  ==============================================================================
-                     ##### How to use this driver #####
-  ==============================================================================
-    [..]
-    The LL UTILS driver contains a set of generic APIs that can be
-    used by user:
-      (+) Device electronic signature
-      (+) Timing functions
-      (+) PLL configuration functions
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_UTILS_H
-#define __STM32L0xx_LL_UTILS_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-/** @defgroup UTILS_LL UTILS
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
-  * @{
-  */
-
-/* Max delay can be used in LL_mDelay */
-#define LL_MAX_DELAY                  0xFFFFFFFFU
-
-/**
- * @brief Unique device ID register base address
- */
-#define UID_BASE_ADDRESS              UID_BASE
-
-/**
- * @brief Flash size data register base address
- */
-#define FLASHSIZE_BASE_ADDRESS        FLASHSIZE_BASE
-
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
-  * @{
-  */
-/**
-  * @}
-  */
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
-  * @{
-  */
-/**
-  * @brief  UTILS PLL structure definition
-  */
-typedef struct
-{
-  uint32_t PLLMul;   /*!< Multiplication factor for PLL VCO input clock.
-                          This parameter can be a value of @ref RCC_LL_EC_PLL_MUL
-
-                          This feature can be modified afterwards using unitary function
-                          @ref LL_RCC_PLL_ConfigDomain_SYS(). */
-
-  uint32_t PLLDiv;   /*!< Division factor for PLL VCO output clock.
-                          This parameter can be a value of @ref RCC_LL_EC_PLL_DIV 
-  
-                          This feature can be modified afterwards using unitary function
-                          @ref LL_RCC_PLL_ConfigDomain_SYS(). */
-} LL_UTILS_PLLInitTypeDef;
-
-/**
-  * @brief  UTILS System, AHB and APB buses clock configuration structure definition
-  */
-typedef struct
-{
-  uint32_t AHBCLKDivider;         /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
-                                       This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
-
-                                       This feature can be modified afterwards using unitary function
-                                       @ref LL_RCC_SetAHBPrescaler(). */
-
-  uint32_t APB1CLKDivider;        /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
-                                       This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
-
-                                       This feature can be modified afterwards using unitary function
-                                       @ref LL_RCC_SetAPB1Prescaler(). */
-
-  uint32_t APB2CLKDivider;        /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
-                                       This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
-
-                                       This feature can be modified afterwards using unitary function
-                                       @ref LL_RCC_SetAPB2Prescaler(). */
-
-} LL_UTILS_ClkInitTypeDef;
-
-/**
-  * @}
-  */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
-  * @{
-  */
-
-/** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
-  * @{
-  */
-#define LL_UTILS_HSEBYPASS_OFF        0x00000000U       /*!< HSE Bypass is not enabled                */
-#define LL_UTILS_HSEBYPASS_ON         0x00000001U       /*!< HSE Bypass is enabled                    */
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
-  * @{
-  */
-
-/** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
-  * @{
-  */
-
-/**
-  * @brief  Get Word0 of the unique device identifier (UID based on 96 bits)
-  * @retval UID[31:0]
-  */
-__STATIC_INLINE uint32_t LL_GetUID_Word0(void)
-{
-  return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
-}
-
-/**
-  * @brief  Get Word1 of the unique device identifier (UID based on 96 bits)
-  * @retval UID[63:32]
-  */
-__STATIC_INLINE uint32_t LL_GetUID_Word1(void)
-{
-  return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
-}
-
-/**
-  * @brief  Get Word2 of the unique device identifier (UID based on 96 bits)
-  * @retval UID[95:64]
-  */
-__STATIC_INLINE uint32_t LL_GetUID_Word2(void)
-{
-  return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
-}
-
-/**
-  * @brief  Get Flash memory size
-  * @note   This bitfield indicates the size of the device Flash memory expressed in
-  *         Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
-  * @retval FLASH_SIZE[15:0]: Flash memory size
-  */
-__STATIC_INLINE uint32_t LL_GetFlashSize(void)
-{
-  return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)));
-}
-
-
-/**
-  * @}
-  */
-
-/** @defgroup UTILS_LL_EF_DELAY DELAY
-  * @{
-  */
-
-/**
-  * @brief  This function configures the Cortex-M SysTick source of the time base.
-  * @param  HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
-  * @note   When a RTOS is used, it is recommended to avoid changing the SysTick 
-  *         configuration by calling this function, for a delay use rather osDelay RTOS service.
-  * @param  Ticks Number of ticks
-  * @retval None
-  */
-__STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
-{
-  /* Configure the SysTick to have interrupt in 1ms time base */
-  SysTick->LOAD  = (uint32_t)((HCLKFrequency / Ticks) - 1UL);  /* set reload register */
-  SysTick->VAL   = 0UL;                                       /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_ENABLE_Msk;                   /* Enable the Systick Timer */
-}
-
-void        LL_Init1msTick(uint32_t HCLKFrequency);
-void        LL_mDelay(uint32_t Delay);
-
-/**
-  * @}
-  */
-
-/** @defgroup UTILS_EF_SYSTEM SYSTEM
-  * @{
-  */
-
-void        LL_SetSystemCoreClock(uint32_t HCLKFrequency);
-ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
-                                         LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
-ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
-                                         LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_UTILS_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_wwdg.h b/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_wwdg.h
deleted file mode 100755
index 3e60ad58..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_wwdg.h
+++ /dev/null
@@ -1,340 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_wwdg.h
-  * @author  MCD Application Team
-  * @brief   Header file of WWDG LL module.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_LL_WWDG_H
-#define __STM32L0xx_LL_WWDG_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (WWDG)
-
-/** @defgroup WWDG_LL WWDG
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-
-/* Private macros ------------------------------------------------------------*/
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup WWDG_LL_Exported_Constants WWDG Exported Constants
-  * @{
-  */
-
-
-/** @defgroup WWDG_LL_EC_IT IT Defines
-  * @brief    IT defines which can be used with LL_WWDG_ReadReg and  LL_WWDG_WriteReg functions
-  * @{
-  */
-#define LL_WWDG_CFR_EWI                    WWDG_CFR_EWI
-/**
-  * @}
-  */
-
-/** @defgroup WWDG_LL_EC_PRESCALER  PRESCALER
-* @{
-*/
-#define LL_WWDG_PRESCALER_1                (uint32_t)0x00000000U                                   /*!< WWDG counter clock = (PCLK1/4096)/1 */
-#define LL_WWDG_PRESCALER_2                WWDG_CFR_WDGTB_0                                        /*!< WWDG counter clock = (PCLK1/4096)/2 */
-#define LL_WWDG_PRESCALER_4                WWDG_CFR_WDGTB_1                                        /*!< WWDG counter clock = (PCLK1/4096)/4 */
-#define LL_WWDG_PRESCALER_8                (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1)                   /*!< WWDG counter clock = (PCLK1/4096)/8 */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup WWDG_LL_Exported_Macros WWDG Exported Macros
-  * @{
-  */
-/** @defgroup WWDG_LL_EM_WRITE_READ Common Write and read registers macros
-  * @{
-  */
-/**
-  * @brief  Write a value in WWDG register
-  * @param  __INSTANCE__ WWDG Instance
-  * @param  __REG__ Register to be written
-  * @param  __VALUE__ Value to be written in the register
-  * @retval None
-  */
-#define LL_WWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
-  * @brief  Read a value in WWDG register
-  * @param  __INSTANCE__ WWDG Instance
-  * @param  __REG__ Register to be read
-  * @retval Register value
-  */
-#define LL_WWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup WWDG_LL_Exported_Functions WWDG Exported Functions
-  * @{
-  */
-
-/** @defgroup WWDG_LL_EF_Configuration Configuration
-  * @{
-  */
-/**
-  * @brief  Enable Window Watchdog. The watchdog is always disabled after a reset.
-  * @note   It is enabled by setting the WDGA bit in the WWDG_CR register,
-  *         then it cannot be disabled again except by a reset.
-  *         This bit is set by software and only cleared by hardware after a reset.
-  *         When WDGA = 1, the watchdog can generate a reset.
-  * @rmtoll CR           WDGA          LL_WWDG_Enable
-  * @param  WWDGx WWDG Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx)
-{
-  SET_BIT(WWDGx->CR, WWDG_CR_WDGA);
-}
-
-/**
-  * @brief  Checks if Window Watchdog is enabled
-  * @rmtoll CR           WDGA          LL_WWDG_IsEnabled
-  * @param  WWDGx WWDG Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx)
-{
-  return (READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA));
-}
-
-/**
-  * @brief  Set the Watchdog counter value to provided value (7-bits T[6:0])
-  * @note   When writing to the WWDG_CR register, always write 1 in the MSB b6 to avoid generating an immediate reset
-  *         This counter is decremented every (4096 x 2expWDGTB) PCLK cycles
-  *         A reset is produced when it rolls over from 0x40 to 0x3F (bit T6 becomes cleared)
-  *         Setting the counter lower then 0x40 causes an immediate reset (if WWDG enabled)
-  * @rmtoll CR           T             LL_WWDG_SetCounter
-  * @param  WWDGx WWDG Instance
-  * @param  Counter 0..0x7F (7 bit counter value)
-  * @retval None
-  */
-__STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter)
-{
-  MODIFY_REG(WWDGx->CR, WWDG_CR_T, Counter);
-}
-
-/**
-  * @brief  Return current Watchdog Counter Value (7 bits counter value)
-  * @rmtoll CR           T             LL_WWDG_GetCounter
-  * @param  WWDGx WWDG Instance
-  * @retval 7 bit Watchdog Counter value
-  */
-__STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx)
-{
-  return (uint32_t)(READ_BIT(WWDGx->CR, WWDG_CR_T));
-}
-
-/**
-  * @brief  Set the time base of the prescaler (WDGTB).
-  * @note   Prescaler is used to apply ratio on PCLK clock, so that Watchdog counter
-  *         is decremented every (4096 x 2expWDGTB) PCLK cycles
-  * @rmtoll CFR          WDGTB         LL_WWDG_SetPrescaler
-  * @param  WWDGx WWDG Instance
-  * @param  Prescaler This parameter can be one of the following values:
-  *         @arg @ref LL_WWDG_PRESCALER_1
-  *         @arg @ref LL_WWDG_PRESCALER_2
-  *         @arg @ref LL_WWDG_PRESCALER_4
-  *         @arg @ref LL_WWDG_PRESCALER_8
-  * @retval None
-  */
-__STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescaler)
-{
-  MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler);
-}
-
-/**
-  * @brief  Return current Watchdog Prescaler Value
-  * @rmtoll CFR          WDGTB         LL_WWDG_GetPrescaler
-  * @param  WWDGx WWDG Instance
-  * @retval Returned value can be one of the following values:
-  *         @arg @ref LL_WWDG_PRESCALER_1
-  *         @arg @ref LL_WWDG_PRESCALER_2
-  *         @arg @ref LL_WWDG_PRESCALER_4
-  *         @arg @ref LL_WWDG_PRESCALER_8
-  */
-__STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx)
-{
-  return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB));
-}
-
-/**
-  * @brief  Set the Watchdog Window value to be compared to the downcounter (7-bits W[6:0]).
-  * @note   This window value defines when write in the WWDG_CR register
-  *         to program Watchdog counter is allowed.
-  *         Watchdog counter value update must occur only when the counter value
-  *         is lower than the Watchdog window register value.
-  *         Otherwise, a MCU reset is generated if the 7-bit Watchdog counter value
-  *         (in the control register) is refreshed before the downcounter has reached
-  *         the watchdog window register value.
-  *         Physically is possible to set the Window lower then 0x40 but it is not recommended.
-  *         To generate an immediate reset, it is possible to set the Counter lower than 0x40.
-  * @rmtoll CFR          W             LL_WWDG_SetWindow
-  * @param  WWDGx WWDG Instance
-  * @param  Window 0x00..0x7F (7 bit Window value)
-  * @retval None
-  */
-__STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window)
-{
-  MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window);
-}
-
-/**
-  * @brief  Return current Watchdog Window Value (7 bits value)
-  * @rmtoll CFR          W             LL_WWDG_GetWindow
-  * @param  WWDGx WWDG Instance
-  * @retval 7 bit Watchdog Window value
-  */
-__STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx)
-{
-  return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_W));
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup WWDG_LL_EF_FLAG_Management FLAG_Management
-  * @{
-  */
-/**
-  * @brief  Indicates if the WWDG Early Wakeup Interrupt Flag is set or not.
-  * @note   This bit is set by hardware when the counter has reached the value 0x40.
-  *         It must be cleared by software by writing 0.
-  *         A write of 1 has no effect. This bit is also set if the interrupt is not enabled.
-  * @rmtoll SR           EWIF          LL_WWDG_IsActiveFlag_EWKUP
-  * @param  WWDGx WWDG Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx)
-{
-  return (READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF));
-}
-
-/**
-  * @brief  Clear WWDG Early Wakeup Interrupt Flag (EWIF)
-  * @rmtoll SR           EWIF          LL_WWDG_ClearFlag_EWKUP
-  * @param  WWDGx WWDG Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_WWDG_ClearFlag_EWKUP(WWDG_TypeDef *WWDGx)
-{
-  WRITE_REG(WWDGx->SR, ~WWDG_SR_EWIF);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup WWDG_LL_EF_IT_Management IT_Management
-  * @{
-  */
-/**
-  * @brief  Enable the Early Wakeup Interrupt.
-  * @note   When set, an interrupt occurs whenever the counter reaches value 0x40.
-  *         This interrupt is only cleared by hardware after a reset
-  * @rmtoll CFR          EWI           LL_WWDG_EnableIT_EWKUP
-  * @param  WWDGx WWDG Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx)
-{
-  SET_BIT(WWDGx->CFR, WWDG_CFR_EWI);
-}
-
-/**
-  * @brief  Check if Early Wakeup Interrupt is enabled
-  * @rmtoll CFR          EWI           LL_WWDG_IsEnabledIT_EWKUP
-  * @param  WWDGx WWDG Instance
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx)
-{
-  return (READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI));
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* WWDG */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_LL_WWDG_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c
deleted file mode 100755
index bd160f0c..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c
+++ /dev/null
@@ -1,560 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal.c
-  * @author  MCD Application Team
-  * @brief   HAL module driver.
-  *          This is the common part of the HAL initialization
-  *
-  @verbatim
-  ==============================================================================
-                     ##### How to use this driver #####
-  ==============================================================================
-    [..]
-    The common HAL driver contains a set of generic and common APIs that can be
-    used by the PPP peripheral drivers and the user to start using the HAL. 
-    [..]
-    The HAL contains two APIs categories: 
-         (+) Common HAL APIs
-         (+) Services HAL APIs
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_MODULE_ENABLED
-
-/** @addtogroup HAL 
-  * @brief HAL module driver.
-  * @{
-  */
-
-/** @addtogroup HAL_Exported_Constants
-  * @{
-  */
-
-
-/** @defgroup SysTick System Tick
-  * @{
-  */
-/**
- * @brief uwTick_variable uwTick variable
- */
-__IO uint32_t uwTick;
-
-/**
-  * @}
-  */
-
-/** @defgroup HAL_Version HAL Version
-  * @{
-  */
-
-/**
- * @brief STM32L0xx HAL Driver version number
- */
-#define __STM32L0xx_HAL_VERSION_MAIN   (0x01U) /*!< [31:24] main version */
-#define __STM32L0xx_HAL_VERSION_SUB1   (0x08U) /*!< [23:16] sub1 version */
-#define __STM32L0xx_HAL_VERSION_SUB2   (0x02U) /*!< [15:8]  sub2 version */
-#define __STM32L0xx_HAL_VERSION_RC     (0x00U) /*!< [7:0]  release candidate */
-#define __STM32L0xx_HAL_VERSION         ((__STM32L0xx_HAL_VERSION_MAIN << 24U)\
-                                        |(__STM32L0xx_HAL_VERSION_SUB1 << 16U)\
-                                        |(__STM32L0xx_HAL_VERSION_SUB2 << 8U )\
-                                        |(__STM32L0xx_HAL_VERSION_RC))
-
-#define IDCODE_DEVID_MASK    ((uint32_t)0x00000FFFU)
-
-/**
-  * @}
-  */ 
-  
-/**
-  * @}
-  */
-/** @defgroup HAL_Private HAL Private
-  * @{
-  */ 
-
-
-/**
-  * @}
-  */ 
-
-/** @addtogroup HAL_Exported_Functions HAL Exported Functions
-  * @{
-  */
-
-/** @addtogroup HAL_Exported_Functions_Group1
- *  @brief    Initialization and de-initialization functions
- *
-@verbatim
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-   [..]  This section provides functions allowing to:
-      (+) Initializes the Flash interface, the NVIC allocation and initial clock 
-          configuration. It initializes the source of time base also when timeout 
-          is needed and the backup domain when enabled.
-      (+) de-Initializes common part of the HAL.
-      (+) Configure The time base source to have 1ms time base with a dedicated 
-          Tick interrupt priority. 
-        (++) Systick timer is used by default as source of time base, but user 
-             can eventually implement his proper time base source (a general purpose 
-             timer for example or other time source), keeping in mind that Time base 
-             duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and 
-             handled in milliseconds basis.
-        (++) Time base configuration function (HAL_InitTick ()) is called automatically 
-             at the beginning of the program after reset by HAL_Init() or at any time 
-             when clock is configured, by HAL_RCC_ClockConfig(). 
-        (++) Source of time base is configured  to generate interrupts at regular 
-             time intervals. Care must be taken if HAL_Delay() is called from a 
-             peripheral ISR process, the Tick interrupt line must have higher priority 
-            (numerically lower) than the peripheral interrupt. Otherwise the caller 
-            ISR process will be blocked. 
-       (++) functions affecting time base configurations are declared as __weak  
-             to make  override possible  in case of other  implementations in user file.
- 
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief This function configures the Flash prefetch, Flash preread and Buffer cache,
-  *        Configures time base source, NVIC and Low level hardware
-  * @note This function is called at the beginning of program after reset and before 
-  *       the clock configuration
-  * @note The time base configuration is based on MSI clock when exiting from Reset.
-  *       Once done, time base tick start incrementing.
-  *        In the default implementation,Systick is used as source of time base.
-  *        the tick variable is incremented each 1ms in its ISR.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_Init(void)
-{
-  /* Configure Buffer cache, Flash prefetch,  Flash preread */ 
-#if (BUFFER_CACHE_DISABLE != 0)
-  __HAL_FLASH_BUFFER_CACHE_DISABLE();
-#endif /* BUFFER_CACHE_DISABLE */
-
-#if (PREREAD_ENABLE != 0)
-  __HAL_FLASH_PREREAD_BUFFER_ENABLE();
-#endif /* PREREAD_ENABLE */
-
-#if (PREFETCH_ENABLE != 0)
-  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
-#endif /* PREFETCH_ENABLE */
-
-  /* Use systick as time base source and configure 1ms tick (default clock after Reset is MSI) */
-
-  HAL_InitTick(TICK_INT_PRIORITY);
-
-  /* Init the low level hardware */
-  HAL_MspInit();
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief This function de-Initializes common part of the HAL and stops the source
-  *        of time base.
-  * @note This function is optional.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DeInit(void)
-{
-  /* Reset of all peripherals */
-  __HAL_RCC_APB1_FORCE_RESET();
-  __HAL_RCC_APB1_RELEASE_RESET();
-
-  __HAL_RCC_APB2_FORCE_RESET();
-  __HAL_RCC_APB2_RELEASE_RESET();
-
-  __HAL_RCC_AHB_FORCE_RESET();
-  __HAL_RCC_AHB_RELEASE_RESET();
-
-  __HAL_RCC_IOP_FORCE_RESET();
-  __HAL_RCC_IOP_RELEASE_RESET();
-
-  /* De-Init the low level hardware */
-  HAL_MspDeInit();
-    
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the MSP.
-  * @retval None
-  */
-__weak void HAL_MspInit(void)
-{
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes the MSP.
-  * @retval None
-  */
-__weak void HAL_MspDeInit(void)
-{
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_MspDeInit could be implemented in the user file
-   */
-}
-
-
-/**
-  * @brief This function configures the source of the time base. 
-  *        The time source is configured  to have 1ms time base with a dedicated 
-  *        Tick interrupt priority.
-  * @note This function is called  automatically at the beginning of program after
-  *       reset by HAL_Init() or at any time when clock is reconfigured  by HAL_RCC_ClockConfig(). 
-  * @note In the default implementation, SysTick timer is the source of time base. 
-  *       It is used to generate interrupts at regular time intervals. 
-  *       Care must be taken if HAL_Delay() is called from a peripheral ISR process, 
-  *       The the SysTick interrupt must have higher priority (numerically lower) 
-  *       than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
-  *       The function is declared as __Weak  to be overwritten  in case of other
-  *       implementation  in user file.
-  * @param TickPriority: Tick interrupt priority.
-  * @retval HAL status
-  */
-__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
-{
-  /*Configure the SysTick to have interrupt in 1ms time basis*/
-  HAL_SYSTICK_Config(SystemCoreClock/1000U);
-
-  /*Configure the SysTick IRQ priority */
-  HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority ,0U);
-
-   /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup HAL_Exported_Functions_Group2 
- *  @brief    Peripheral Control functions
- *
-@verbatim
- ===============================================================================
-                      ##### HAL Control functions #####
- ===============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Provide a tick value in millisecond
-      (+) Provide a blocking delay in millisecond
-      (+) Suspend the time base source interrupt
-      (+) Resume the time base source interrupt
-      (+) Get the HAL API driver version
-      (+) Get the device identifier
-      (+) Get the device revision identifier
-      (+) Configure low power mode behavior when the MCU is in Debug mode
-      (+) Manage the VEREFINT feature (activation, lock, output selection)
-      
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief This function is called to increment  a global variable "uwTick"
-  *        used as application time base.
-  * @note In the default implementation, this variable is incremented each 1ms
-  *       in Systick ISR.
- * @note This function is declared as __weak to be overwritten in case of other 
-  *      implementations in user file.
-  * @retval None
-  */
-__weak void HAL_IncTick(void)
-{
-  uwTick++;
-}
-
-/**
-  * @brief Provides a tick value in millisecond.
-  * @note This function is declared as __weak to be overwritten in case of other 
-  *       implementations in user file.
-  * @retval tick value
-  */
-__weak uint32_t HAL_GetTick(void)
-{
-  return uwTick;
-}
-
-/**
-  * @brief This function provides accurate delay (in ms) based on a variable incremented.
-  * @note In the default implementation , SysTick timer is the source of time base.
-  *       It is used to generate interrupts at regular time intervals where uwTick
-  *       is incremented.
-  * @note ThiS function is declared as __weak to be overwritten in case of other
-  *       implementations in user file.
-  * @param Delay: specifies the delay time length, in milliseconds.
-  * @retval None
-  */
-__weak void HAL_Delay(__IO uint32_t Delay)
-{
-  uint32_t tickstart = 0U;
-  tickstart = HAL_GetTick();
-  while((HAL_GetTick() - tickstart) < Delay)
-  {
-  }
-}
-
-/**
-  * @brief Suspends the Tick increment.
-  * @note In the default implementation , SysTick timer is the source of time base. It is
-  *       used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
-  *       is called, the the SysTick interrupt will be disabled and so Tick increment 
-  *       is suspended.
-  * @note This function is declared as __weak to be overwritten in case of other
-  *       implementations in user file.
-  * @retval None
-  */
-__weak void HAL_SuspendTick(void)
-{
-  /* Disable SysTick Interrupt */
-  SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
-}
-
-/**
-  * @brief Resumes the Tick increment.
-  * @note In the default implementation , SysTick timer is the source of time base. It is
-  *       used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
-  *       is called, the the SysTick interrupt will be enabled and so Tick increment 
-  *       is resumed.
-  * @note This function is declared as __weak to be overwritten in case of other
-  *       implementations in user file.
-  * @retval None
-  */
-__weak void HAL_ResumeTick(void)
-{
-  /* Enable SysTick Interrupt */
-  SysTick->CTRL  |= SysTick_CTRL_TICKINT_Msk;
-}
-
-/**
-  * @brief Returns the HAL revision
-  * @retval version: 0xXYZR (8bits for each decimal, R for RC)
-  */
-uint32_t HAL_GetHalVersion(void)
-{
-  return __STM32L0xx_HAL_VERSION;
-}
-
-/**
-  * @brief Returns the device revision identifier.
-  * @retval Device revision identifier
-  */
-uint32_t HAL_GetREVID(void)
-{
-  return((DBGMCU->IDCODE) >> 16U);
-}
-
-/**
-  * @brief  Returns the device identifier.
-  * @retval Device identifier
-  */
-uint32_t HAL_GetDEVID(void)
-{
-   return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK);
-}
-
-/**
-  * @brief  Enables the Debug Module during SLEEP mode
-  * @retval None
-  */
-void HAL_DBGMCU_EnableDBGSleepMode(void)
-{
-  SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
-}
-
-/**
-  * @brief  Disables the Debug Module during SLEEP mode
-  * @retval None
-  */
-void HAL_DBGMCU_DisableDBGSleepMode(void)
-{
-  CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
-}
-
-/**
-  * @brief  Enables the Debug Module during STOP mode
-  * @retval None
-  */
-void HAL_DBGMCU_EnableDBGStopMode(void)
-{
-  SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
-}
-
-/**
-  * @brief  Disables the Debug Module during STOP mode
-  * @retval None
-  */
-void HAL_DBGMCU_DisableDBGStopMode(void)
-{
-  CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
-}
-
-/**
-  * @brief  Enables the Debug Module during STANDBY mode
-  * @retval None
-  */
-void HAL_DBGMCU_EnableDBGStandbyMode(void)
-{
-  SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
-}
-
-/**
-  * @brief  Disables the Debug Module during STANDBY mode
-  * @retval None
-  */
-void HAL_DBGMCU_DisableDBGStandbyMode(void)
-{
-  CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
-}
-
-/**
-  * @brief  Enable low power mode behavior when the MCU is in Debug mode.
-  * @param Periph: specifies the low power mode.
-  *   This parameter can be any combination of the following values:
-  *     @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode
-  *     @arg DBGMCU_STOP: Keep debugger connection during STOP mode
-  *     @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode
-  * @retval None
-  */
-void HAL_DBGMCU_DBG_EnableLowPowerConfig(uint32_t Periph)
-{
-  /* Check the parameters */
-  assert_param(IS_DBGMCU_PERIPH(Periph));
-  
-  DBGMCU->CR |= Periph;
-
-}
-/**
-  * @brief  Disable low power mode behavior when the MCU is in Debug mode.
-  * @param Periph: specifies the low power mode.
-  *   This parameter can be any combination of the following values:
-  *     @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode
-  *     @arg DBGMCU_STOP: Keep debugger connection during STOP mode
-  *     @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode
-  * @retval None
-  */
-void HAL_DBGMCU_DBG_DisableLowPowerConfig(uint32_t Periph)
-{
-  /* Check the parameters */
-  assert_param(IS_DBGMCU_PERIPH(Periph));
-  {
-    DBGMCU->CR &= ~Periph;
-  }
-}
-
-/**
-  * @brief  Returns the boot mode as configured by user.
-  * @retval The boot mode as configured by user. The returned value can be one 
-  *         of the following values:
-  *              - 0x00000000 : Boot is configured in Main Flash memory 
-  *              - 0x00000100 : Boot is configured in System Flash memory 
-  *              - 0x00000300 : Boot is configured in Embedded SRAM memory 
-  */
-uint32_t  HAL_SYSCFG_GetBootMode(void)
-{
-  return (SYSCFG->CFGR1 & SYSCFG_CFGR1_BOOT_MODE);
-}
-
-/**
-  * @brief Selects the output of internal reference voltage (VREFINT).
-  *        The VREFINT output can be routed to(PB0) or
-  *        (PB1) or both.
-  * @param SYSCFG_Vrefint_OUTPUT: new state of the Vrefint output.
-  *        This parameter can be one of the following values:
-  *     @arg SYSCFG_VREFINT_OUT_NONE
-  *     @arg SYSCFG_VREFINT_OUT_PB0
-  *     @arg SYSCFG_VREFINT_OUT_PB1
-  *     @arg SYSCFG_VREFINT_OUT_PB0_PB1
-  * @retval None
-  */
-void HAL_SYSCFG_VREFINT_OutputSelect(uint32_t SYSCFG_Vrefint_OUTPUT)
-{
-  /* Check the parameters */
-  assert_param(IS_SYSCFG_VREFINT_OUT_SELECT(SYSCFG_Vrefint_OUTPUT));
-
-  /* Set the output Vrefint pin */
-  SYSCFG->CFGR3 &= ~(SYSCFG_CFGR3_VREF_OUT);
-  SYSCFG->CFGR3 |= (uint32_t)(SYSCFG_Vrefint_OUTPUT);
-}
-
-/**
-  * @brief  Lock the SYSCFG VREF register values
-  * @retval None
-  */
-void HAL_SYSCFG_Enable_Lock_VREFINT(void)
-{
-    /* Enable the LOCK by setting REF_LOCK bit in the CFGR3 register */
-    SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_REF_LOCK);
-}
-
-/**
-  * @brief  Unlock the overall SYSCFG VREF register values
-  * @retval None
-  */
-void HAL_SYSCFG_Disable_Lock_VREFINT(void)
-{
-    /* Disable the LOCK by setting REF_LOCK bit in the CFGR3 register */
-    CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_REF_LOCK);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* HAL_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c
deleted file mode 100755
index da7990a7..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c
+++ /dev/null
@@ -1,2196 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_adc.c
-  * @author  MCD Application Team
-  * @brief   This file provides firmware functions to manage the following 
-  *          functionalities of the Analog to Digital Convertor (ADC)
-  *          peripheral:
-  *           + Initialization and de-initialization functions
-  *             ++ Initialization and Configuration of ADC
-  *           + Operation functions
-  *             ++ Start, stop, get result of conversions of regular
-  *                group, using 3 possible modes: polling, interruption or DMA.
-  *           + Control functions
-  *             ++ Channels configuration on regular group
-  *             ++ Analog Watchdog configuration
-  *           + State functions
-  *             ++ ADC state machine management
-  *             ++ Interrupts and flags management
-  *          Other functions (extended functions) are available in file 
-  *          "stm32l0xx_hal_adc_ex.c".
-  *
-  @verbatim
-  ==============================================================================
-                     ##### ADC peripheral features #####
-  ==============================================================================
-  [..]
-  (+) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution.
-
-  (+) Interrupt generation at the end of regular conversion and in case of 
-      analog watchdog or overrun events.
-  
-  (+) Single and continuous conversion modes.
-  
-  (+) Scan mode for conversion of several channels sequentially.
-  
-  (+) Data alignment with in-built data coherency.
-  
-  (+) Programmable sampling time (common for all channels)
-  
-  (+) External trigger (timer or EXTI) with configurable polarity
-  
-  (+) DMA request generation for transfer of conversions data of regular group.
-
-  (+) ADC calibration
-  
-  (+) ADC conversion of regular group.
-  
-  (+) ADC supply requirements: 1.62 V to 3.6 V.
-  
-  (+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to 
-      Vdda or to an external voltage reference).
-
-
-                     ##### How to use this driver #####
-  ==============================================================================
-    [..]
-
-     *** Configuration of top level parameters related to ADC ***
-     ============================================================
-     [..]
-
-    (#) Enable the ADC interface
-        (++) As prerequisite, ADC clock must be configured at RCC top level.
-             Caution: On STM32L0, ADC clock frequency max is 16MHz (refer
-                      to device datasheet).
-                      Therefore, ADC clock prescaler must be configured in 
-                      function of ADC clock source frequency to remain below
-                      this maximum frequency.
-
-        (++) Two clock settings are mandatory: 
-             (+++) ADC clock (core clock, also possibly conversion clock).
-
-             (+++) ADC clock (conversions clock).
-                   Two possible clock sources: synchronous clock derived from APB clock
-                   or asynchronous clock derived from ADC dedicated HSI RC oscillator
-                   16MHz.
-                   If asynchronous clock is selected, parameter "HSIState" must be set either:
-                   - to "...HSIState = RCC_HSI_ON" to maintain the HSI16 oscillator
-                     always enabled: can be used to supply the main system clock.
-
-             (+++) Example:
-                   Into HAL_ADC_MspInit() (recommended code location) or with
-                   other device clock parameters configuration:
-               (+++) __HAL_RCC_ADC1_CLK_ENABLE();                 (mandatory)
-
-               HSI enable                                         (optional: if asynchronous clock selected)
-               (+++) RCC_OscInitTypeDef   RCC_OscInitStructure;
-               (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI;
-               (+++) RCC_OscInitStructure.HSI16CalibrationValue = RCC_HSICALIBRATION_DEFAULT;
-               (+++) RCC_OscInitStructure.HSIState = RCC_HSI_ON;
-               (+++) RCC_OscInitStructure.PLL...   (optional if used for system clock)
-               (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
-
-        (++) ADC clock source and clock prescaler are configured at ADC level with
-             parameter "ClockPrescaler" using function HAL_ADC_Init().
-
-    (#) ADC pins configuration
-         (++) Enable the clock for the ADC GPIOs
-              using macro __HAL_RCC_GPIOx_CLK_ENABLE()
-         (++) Configure these ADC pins in analog mode
-              using function HAL_GPIO_Init()
-
-    (#) Optionally, in case of usage of ADC with interruptions:
-         (++) Configure the NVIC for ADC
-              using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
-         (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler() 
-              into the function of corresponding ADC interruption vector 
-              ADCx_IRQHandler().
-
-    (#) Optionally, in case of usage of DMA:
-         (++) Configure the DMA (DMA channel, mode normal or circular, ...)
-              using function HAL_DMA_Init().
-         (++) Configure the NVIC for DMA
-              using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
-         (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler() 
-              into the function of corresponding DMA interruption vector 
-              DMAx_Channelx_IRQHandler().
-
-     *** Configuration of ADC, group regular, channels parameters ***
-     ================================================================
-     [..]
-
-    (#) Configure the ADC parameters (resolution, data alignment, ...)
-        and regular group parameters (conversion trigger, sequencer, ...)
-        using function HAL_ADC_Init().
-
-    (#) Configure the channels for regular group parameters (channel number, 
-        channel rank into sequencer, ..., into regular group)
-        using function HAL_ADC_ConfigChannel().
-
-    (#) Optionally, configure the analog watchdog parameters (channels
-        monitored, thresholds, ...)
-        using function HAL_ADC_AnalogWDGConfig().
-
-
-    (#) When device is in mode low-power (low-power run, low-power sleep or stop mode), 
-        function "HAL_ADCEx_EnableVREFINT()" must be called before function HAL_ADC_Init().
-        In case of internal temperature sensor to be measured:
-        function "HAL_ADCEx_EnableVREFINTTempSensor()" must be called similarilly
-
-     *** Execution of ADC conversions ***
-     ====================================
-     [..]
-
-    (#) Optionally, perform an automatic ADC calibration to improve the
-        conversion accuracy
-        using function HAL_ADCEx_Calibration_Start().
-
-    (#) ADC driver can be used among three modes: polling, interruption,
-        transfer by DMA.
-
-        (++) ADC conversion by polling:
-          (+++) Activate the ADC peripheral and start conversions
-                using function HAL_ADC_Start()
-          (+++) Wait for ADC conversion completion 
-                using function HAL_ADC_PollForConversion()
-          (+++) Retrieve conversion results 
-                using function HAL_ADC_GetValue()
-          (+++) Stop conversion and disable the ADC peripheral 
-                using function HAL_ADC_Stop()
-
-        (++) ADC conversion by interruption: 
-          (+++) Activate the ADC peripheral and start conversions
-                using function HAL_ADC_Start_IT()
-          (+++) Wait for ADC conversion completion by call of function
-                HAL_ADC_ConvCpltCallback()
-                (this function must be implemented in user program)
-          (+++) Retrieve conversion results 
-                using function HAL_ADC_GetValue()
-          (+++) Stop conversion and disable the ADC peripheral 
-                using function HAL_ADC_Stop_IT()
-
-        (++) ADC conversion with transfer by DMA:
-          (+++) Activate the ADC peripheral and start conversions
-                using function HAL_ADC_Start_DMA()
-          (+++) Wait for ADC conversion completion by call of function
-                HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()
-                (these functions must be implemented in user program)
-          (+++) Conversion results are automatically transferred by DMA into
-                destination variable address.
-          (+++) Stop conversion and disable the ADC peripheral 
-                using function HAL_ADC_Stop_DMA()
-
-     [..]
-
-    (@) Callback functions must be implemented in user program:
-      (+@) HAL_ADC_ErrorCallback()
-      (+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog)
-      (+@) HAL_ADC_ConvCpltCallback()
-      (+@) HAL_ADC_ConvHalfCpltCallback
-
-     *** Deinitialization of ADC ***
-     ============================================================
-     [..]
-
-    (#) Disable the ADC interface
-      (++) ADC clock can be hard reset and disabled at RCC top level.
-        (++) Hard reset of ADC peripherals
-             using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET().
-        (++) ADC clock disable
-             using the equivalent macro/functions as configuration step.
-             (+++) Example:
-                   Into HAL_ADC_MspDeInit() (recommended code location) or with
-                   other device clock parameters configuration:
-               (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI;
-               (+++) RCC_OscInitStructure.HSIState = RCC_HSI_OFF; (if not used for system clock)
-               (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
-
-    (#) ADC pins configuration
-         (++) Disable the clock for the ADC GPIOs
-              using macro __HAL_RCC_GPIOx_CLK_DISABLE()
-
-    (#) Optionally, in case of usage of ADC with interruptions:
-         (++) Disable the NVIC for ADC
-              using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
-
-    (#) Optionally, in case of usage of DMA:
-         (++) Deinitialize the DMA
-              using function HAL_DMA_Init().
-         (++) Disable the NVIC for DMA
-              using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
-
-    [..]
-  
-    @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup ADC ADC
-  * @brief ADC HAL module driver
-  * @{
-  */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-
-/** @defgroup ADC_Private_Constants ADC Private Constants
-  * @{
-  */
-
-/* Delay for ADC stabilization time.                                          */
-/* Maximum delay is 1us (refer to device datasheet, parameter tSTART). */
-/* Unit: us */
-#define ADC_STAB_DELAY_US       ((uint32_t) 1U)
-
-/* Delay for temperature sensor stabilization time. */
-/* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
-/* Unit: us */
-#define ADC_TEMPSENSOR_DELAY_US ((uint32_t) 10U) 
-/**
-  * @}
-  */
-
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup ADC_Private_Functions ADC Private Functions
-  * @{
-  */
-static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc);
-static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc);
-static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc);
-static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
-static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
-static void ADC_DMAError(DMA_HandleTypeDef *hdma);
-static void ADC_DelayMicroSecond(uint32_t microSecond);
-/**
-  * @}
-  */
-
-/* Exported functions ---------------------------------------------------------*/
-
-/** @defgroup ADC_Exported_Functions ADC Exported Functions
-  * @{
-  */
-
-/** @defgroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions
-  * @brief    ADC Initialization and Configuration functions
-  *
-@verbatim    
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Initialize and configure the ADC. 
-      (+) De-initialize the ADC.
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initialize the ADC peripheral and regular group according to  
-  *         parameters specified in structure "ADC_InitTypeDef".
-  * @note   As prerequisite, ADC clock must be configured at RCC top level
-  *         depending on possible clock sources: APB clock of HSI clock.
-  *         See commented example code below that can be copied and uncommented
-  *         into HAL_ADC_MspInit().
-  * @note   Possibility to update parameters on the fly:
-  *         This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
-  *         coming from ADC state reset. Following calls to this function can
-  *         be used to reconfigure some parameters of ADC_InitTypeDef  
-  *         structure on the fly, without modifying MSP configuration. If ADC  
-  *         MSP has to be modified again, HAL_ADC_DeInit() must be called
-  *         before HAL_ADC_Init().
-  *         The setting of these parameters is conditioned to ADC state.
-  *         For parameters constraints, see comments of structure 
-  *         "ADC_InitTypeDef".
-  * @note   This function configures the ADC within 2 scopes: scope of entire 
-  *         ADC and scope of regular group. For parameters details, see comments 
-  *         of structure "ADC_InitTypeDef".
-  * @note   When device is in mode low-power (low-power run, low-power sleep or stop mode), 
-  *         function "HAL_ADCEx_EnableVREFINT()" must be called before function HAL_ADC_Init() 
-  *         (in case of previous ADC operations: function HAL_ADC_DeInit() must be called first).
-  *         In case of internal temperature sensor to be measured:
-  *         function "HAL_ADCEx_EnableVREFINTTempSensor()" must be called similarilly.  
-  * @param  hadc: ADC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
-{
- 
-  /* Check ADC handle */
-  if(hadc == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
-  assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
-  assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
-  assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
-  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
-  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
-  assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
-  assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
-  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
-  assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
-  assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun));
-  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait));
-  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerFrequencyMode));
-  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff));
-  assert_param(IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTime));
-  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.OversamplingMode));
-
-  /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured    */
-  /* at RCC top level depending on both possible clock sources:               */
-  /* APB clock or HSI clock.                                                  */
-  /* Refer to header of this file for more details on clock enabling procedure*/
-  
-  /* Actions performed only if ADC is coming from state reset:                */
-  /* - Initialization of ADC MSP                                              */
-  /* - ADC voltage regulator enable                                           */
-  if(hadc->State == HAL_ADC_STATE_RESET)
-  {
-    /* Initialize ADC error code */
-    ADC_CLEAR_ERRORCODE(hadc);
-    
-    /* Allocate lock resource and initialize it */
-    hadc->Lock = HAL_UNLOCKED;
-    
-    /* Init the low level hardware */
-    HAL_ADC_MspInit(hadc);
-  }
-  
-  /* Configuration of ADC parameters if previous preliminary actions are      */ 
-  /* correctly completed.                                                     */
-  /* and if there is no conversion on going on regular group (ADC can be      */
-  /* enabled anyway, in case of call of this function to update a parameter   */
-  /* on the fly).                                                             */
-  if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) ||
-     (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) != RESET)  )
-  {
-    /* Update ADC state machine to error */
-    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
-        
-    /* Process unlocked */
-    __HAL_UNLOCK(hadc);
-    return HAL_ERROR;
-  }
-
-  /* Set ADC state */
-  ADC_STATE_CLR_SET(hadc->State,
-                    HAL_ADC_STATE_REG_BUSY,
-                    HAL_ADC_STATE_BUSY_INTERNAL);
-
-  /* Parameters update conditioned to ADC state:                            */
-  /* Parameters that can be updated only when ADC is disabled:              */
-  /*  - ADC clock mode                                                      */
-  /*  - ADC clock prescaler                                                 */
-  /*  - ADC Resolution                                                      */
-  if (ADC_IS_ENABLE(hadc) == RESET)
-  {
-    /* Some parameters of this register are not reset, since they are set   */
-    /* by other functions and must be kept in case of usage of this         */
-    /* function on the fly (update of a parameter of ADC_InitTypeDef        */
-    /* without needing to reconfigure all other ADC groups/channels         */
-    /* parameters):                                                         */
-    /*   - internal measurement paths: Vbat, temperature sensor, Vref       */
-    /*     (set into HAL_ADC_ConfigChannel() )                              */
-   
-    /* Configuration of ADC clock: clock source PCLK or asynchronous with 
-    selectable prescaler */
-    __HAL_ADC_CLOCK_PRESCALER(hadc);
-    
-    /* Configuration of ADC:                                                */
-    /*  - Resolution                                                        */
-    hadc->Instance->CFGR1 &= ~( ADC_CFGR1_RES);
-    hadc->Instance->CFGR1 |= hadc->Init.Resolution;    
-  }
-  
-  /* Set the Low Frequency mode */
-  ADC->CCR &= (uint32_t)~ADC_CCR_LFMEN;
-  ADC->CCR |=__HAL_ADC_CCR_LOWFREQUENCY(hadc->Init.LowPowerFrequencyMode);  
-   
-  /* Enable voltage regulator (if disabled at this step) */
-  if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN))
-  {
-    /* Set ADVREGEN bit */
-    hadc->Instance->CR |= ADC_CR_ADVREGEN;
-  }
-  
-  /* Configuration of ADC:                                                    */
-  /*  - Resolution                                                            */
-  /*  - Data alignment                                                        */
-  /*  - Scan direction                                                        */
-  /*  - External trigger to start conversion                                  */
-  /*  - External trigger polarity                                             */
-  /*  - Continuous conversion mode                                            */
-  /*  - DMA continuous request                                                */
-  /*  - Overrun                                                               */
-  /*  - AutoDelay feature                                                     */
-  /*  - Discontinuous mode                                                    */
-  hadc->Instance->CFGR1 &= ~(ADC_CFGR1_ALIGN   |
-                             ADC_CFGR1_SCANDIR |
-                             ADC_CFGR1_EXTSEL  |
-                             ADC_CFGR1_EXTEN   |
-                             ADC_CFGR1_CONT    |
-                             ADC_CFGR1_DMACFG  |
-                             ADC_CFGR1_OVRMOD  |
-                             ADC_CFGR1_AUTDLY  |
-                             ADC_CFGR1_AUTOFF  |
-                             ADC_CFGR1_DISCEN   );
-  
-  hadc->Instance->CFGR1 |= (hadc->Init.DataAlign                             |
-                            ADC_SCANDIR(hadc->Init.ScanConvMode)             |
-                            ADC_CONTINUOUS(hadc->Init.ContinuousConvMode)    |
-                            ADC_DMACONTREQ(hadc->Init.DMAContinuousRequests) |
-                            hadc->Init.Overrun                               |
-                            __HAL_ADC_CFGR1_AutoDelay(hadc->Init.LowPowerAutoWait) |
-                            __HAL_ADC_CFGR1_AUTOFF(hadc->Init.LowPowerAutoPowerOff));
-  
-  /* Enable external trigger if trigger selection is different of software  */
-  /* start.                                                                 */
-  /* Note: This configuration keeps the hardware feature of parameter       */
-  /*       ExternalTrigConvEdge "trigger edge none" equivalent to           */
-  /*       software start.                                                  */
-  if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
-  {
-    hadc->Instance->CFGR1 |= hadc->Init.ExternalTrigConv |
-                             hadc->Init.ExternalTrigConvEdge;
-  }
-  
-  /* Enable discontinuous mode only if continuous mode is disabled */
-  if (hadc->Init.DiscontinuousConvMode == ENABLE)
-  {
-    if (hadc->Init.ContinuousConvMode == DISABLE)
-    {
-      /* Enable the selected ADC group regular discontinuous mode */
-      hadc->Instance->CFGR1 |= (ADC_CFGR1_DISCEN);
-    }
-    else
-    {
-      /* ADC regular group discontinuous was intended to be enabled,        */
-      /* but ADC regular group modes continuous and sequencer discontinuous */
-      /* cannot be enabled simultaneously.                                  */
-      
-      /* Update ADC state machine to error */
-      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
-      
-      /* Set ADC error code to ADC IP internal error */
-      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-    }
-  }
-  
-  if (hadc->Init.OversamplingMode == ENABLE)
-  {
-    assert_param(IS_ADC_OVERSAMPLING_RATIO(hadc->Init.Oversample.Ratio));
-    assert_param(IS_ADC_RIGHT_BIT_SHIFT(hadc->Init.Oversample.RightBitShift));
-    assert_param(IS_ADC_TRIGGERED_OVERSAMPLING_MODE(hadc->Init.Oversample.TriggeredMode));
-
-    /* Configuration of Oversampler:                                          */
-    /*  - Oversampling Ratio                                                  */
-    /*  - Right bit shift                                                     */
-    /*  - Triggered mode                                                      */
-    
-    hadc->Instance->CFGR2 &= ~( ADC_CFGR2_OVSR |
-                                ADC_CFGR2_OVSS |
-                                ADC_CFGR2_TOVS );
-    
-    hadc->Instance->CFGR2 |= ( hadc->Init.Oversample.Ratio         |
-                               hadc->Init.Oversample.RightBitShift             |
-                               hadc->Init.Oversample.TriggeredMode );
-    
-    /* Enable OverSampling mode */
-     hadc->Instance->CFGR2 |= ADC_CFGR2_OVSE;
-  }
-  else
-  {
-    if(HAL_IS_BIT_SET(hadc->Instance->CFGR2, ADC_CFGR2_OVSE))
-    {
-      /* Disable OverSampling mode if needed */
-      hadc->Instance->CFGR2 &= ~ADC_CFGR2_OVSE;
-    }
-  }    
-  
-  /* Clear the old sampling time */
-  hadc->Instance->SMPR &= (uint32_t)(~ADC_SMPR_SMPR);
-  
-  /* Set the new sample time */
-  hadc->Instance->SMPR |= hadc->Init.SamplingTime;
-  
-  /* Clear ADC error code */
-  ADC_CLEAR_ERRORCODE(hadc);
-
-  /* Set the ADC state */
-  ADC_STATE_CLR_SET(hadc->State,
-                    HAL_ADC_STATE_BUSY_INTERNAL,
-                    HAL_ADC_STATE_READY);
-
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Deinitialize the ADC peripheral registers to their default reset
-  *         values, with deinitialization of the ADC MSP.
-  * @note   For devices with several ADCs: reset of ADC common registers is done 
-  *         only if all ADCs sharing the same common group are disabled.
-  *         If this is not the case, reset of these common parameters reset is  
-  *         bypassed without error reporting: it can be the intended behavior in
-  *         case of reset of a single ADC while the other ADCs sharing the same 
-  *         common group is still running.
-  * @param  hadc: ADC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  
-  /* Check ADC handle */
-  if(hadc == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  
-  /* Set ADC state */
-  SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
-  
-  /* Stop potential conversion on going, on regular group */
-  tmp_hal_status = ADC_ConversionStop(hadc);
-  
-  /* Disable ADC peripheral if conversions are effectively stopped */
-  if (tmp_hal_status == HAL_OK)
-  {   
-    /* Disable the ADC peripheral */
-    tmp_hal_status = ADC_Disable(hadc);
-    
-    /* Check if ADC is effectively disabled */
-    if (tmp_hal_status != HAL_ERROR)
-    {
-      /* Change ADC state */
-      hadc->State = HAL_ADC_STATE_READY;
-    }
-  }
-  
-  
-  /* Configuration of ADC parameters if previous preliminary actions are      */ 
-  /* correctly completed.                                                     */
-  if (tmp_hal_status != HAL_ERROR)
-  {
-    
-    /* ========== Reset ADC registers ========== */
-    /* Reset register IER */
-    __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD | ADC_IT_OVR | ADC_IT_EOCAL | ADC_IT_EOS |  \
-                                ADC_IT_EOC | ADC_IT_RDY | ADC_IT_EOSMP ));
-  
-        
-    /* Reset register ISR */
-    __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_EOCAL | ADC_FLAG_OVR | ADC_FLAG_EOS |  \
-                                ADC_FLAG_EOC | ADC_FLAG_EOSMP | ADC_FLAG_RDY));
-  
-    
-    /* Reset register CR */
-    /* Disable voltage regulator */
-    /* Note: Regulator disable useful for power saving */
-    /* Reset ADVREGEN bit */
-    hadc->Instance->CR &= ~ADC_CR_ADVREGEN;
-    
-    /* Bits ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode "read-set": no direct reset applicable */
-    /* No action */
-    
-    /* Reset register CFGR1 */
-    hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH  | ADC_CFGR1_AWDEN  | ADC_CFGR1_AWDSGL | \
-                               ADC_CFGR1_DISCEN | ADC_CFGR1_AUTOFF | ADC_CFGR1_AUTDLY | \
-                               ADC_CFGR1_CONT   | ADC_CFGR1_OVRMOD | ADC_CFGR1_EXTEN  | \
-                               ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN  | ADC_CFGR1_RES    | \
-                               ADC_CFGR1_SCANDIR| ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN);
-  
-    /* Reset register CFGR2 */
-    hadc->Instance->CFGR2 &= ~(ADC_CFGR2_TOVS  | ADC_CFGR2_OVSS  | ADC_CFGR2_OVSR | \
-                               ADC_CFGR2_OVSE  | ADC_CFGR2_CKMODE );
-  
-    
-    /* Reset register SMPR */
-    hadc->Instance->SMPR &= ~(ADC_SMPR_SMPR);
-    
-    /* Reset register TR */
-    hadc->Instance->TR &= ~(ADC_TR_LT | ADC_TR_HT);
-    
-    /* Reset register CALFACT */
-    hadc->Instance->CALFACT &= ~(ADC_CALFACT_CALFACT);
-  
-  
-  
-  
-    
-    /* Reset register DR */
-    /* bits in access mode read only, no direct reset applicable*/
-  
-    /* Reset register CALFACT */
-    hadc->Instance->CALFACT &= ~(ADC_CALFACT_CALFACT);
-  
-    /* ========== Hard reset ADC peripheral ========== */
-    /* Performs a global reset of the entire ADC peripheral: ADC state is     */
-    /* forced to a similar state after device power-on.                       */
-    /* If needed, copy-paste and uncomment the following reset code into      */
-    /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)":              */
-    /*                                                                        */
-    /*  __HAL_RCC_ADC1_FORCE_RESET()                                                  */
-    /*  __HAL_RCC_ADC1_RELEASE_RESET()                                                */
-  
-    /* DeInit the low level hardware */
-    HAL_ADC_MspDeInit(hadc);
-    
-    /* Set ADC error code to none */
-    ADC_CLEAR_ERRORCODE(hadc);
-    
-    /* Set ADC state */
-    hadc->State = HAL_ADC_STATE_RESET;
-  }
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hadc);
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-/**
-  * @brief  Initialize the ADC MSP.
-  * @param  hadc: ADC handle
-  * @retval None
-  */
-__weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hadc);
-
-  /* NOTE : This function should not be modified. When the callback is needed,
-            function HAL_ADC_MspInit must be implemented in the user file.
-   */ 
-}
-
-/**
-  * @brief  DeInitialize the ADC MSP.
-  * @param  hadc: ADC handle
-  * @retval None
-  */
-__weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hadc);
-
-  /* NOTE : This function should not be modified. When the callback is needed,
-            function HAL_ADC_MspDeInit must be implemented in the user file.
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup ADC_Exported_Functions_Group2 ADC Input and Output operation functions
- *  @brief    ADC IO operation functions 
- *
-@verbatim   
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Start conversion of regular group.
-      (+) Stop conversion of regular group.
-      (+) Poll for conversion complete on regular group.
-      (+) Poll for conversion event.
-      (+) Get result of regular channel conversion.
-      (+) Start conversion of regular group and enable interruptions.
-      (+) Stop conversion of regular group and disable interruptions.
-      (+) Handle ADC interrupt request
-      (+) Start conversion of regular group and enable DMA transfer.
-      (+) Stop conversion of regular group and disable ADC DMA transfer.
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Enable ADC, start conversion of regular group.
-  * @note   Interruptions enabled in this function: None.
-  * @param  hadc: ADC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  
-  /* Perform ADC enable and conversion start if no conversion is on going */
-  if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
-  {
-    /* Process locked */
-    __HAL_LOCK(hadc);
-    
-    /* Enable the ADC peripheral */
-    /* If low power mode AutoPowerOff is enabled, power-on/off phases are     */
-    /* performed automatically by hardware.                                   */
-    if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
-    {
-      tmp_hal_status = ADC_Enable(hadc);
-    }
-    
-    /* Start conversion if ADC is effectively enabled */
-    if (tmp_hal_status == HAL_OK)
-    {
-      /* Set ADC state                                                        */
-      /* - Clear state bitfield related to regular group conversion results   */
-      /* - Set state bitfield related to regular operation                    */
-      ADC_STATE_CLR_SET(hadc->State,
-                        HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
-                        HAL_ADC_STATE_REG_BUSY);
-      
-      /* Reset ADC all error code fields */
-      ADC_CLEAR_ERRORCODE(hadc);
-      
-      /* Process unlocked */
-      /* Unlock before starting ADC conversions: in case of potential         */
-      /* interruption, to let the process to ADC IRQ Handler.                 */
-      __HAL_UNLOCK(hadc);
-      
-      /* Clear regular group conversion flag and overrun flag */
-      /* (To ensure of no unknown state from potential previous ADC           */
-      /* operations)                                                          */
-      __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
-      
-      /* Enable conversion of regular group.                                  */
-      /* If software start has been selected, conversion starts immediately.  */
-      /* If external trigger has been selected, conversion will start at next */
-      /* trigger event.                                                       */
-      hadc->Instance->CR |= ADC_CR_ADSTART;
-    }
-  }
-  else
-  {
-    tmp_hal_status = HAL_BUSY;
-  }
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-/**
-  * @brief  Stop ADC conversion of regular group (and injected channels in 
-  *         case of auto_injection mode), disable ADC peripheral.
-  * @param  hadc: ADC handle
-  * @retval HAL status.
-  */
-HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  
-  /* Process locked */
-  __HAL_LOCK(hadc);
-  
-  /* 1. Stop potential conversion on going, on ADC group regular */
-  tmp_hal_status = ADC_ConversionStop(hadc);
-  
-  /* Disable ADC peripheral if conversions are effectively stopped */
-  if (tmp_hal_status == HAL_OK)
-  {
-    /* 2. Disable the ADC peripheral */
-    tmp_hal_status = ADC_Disable(hadc);
-    
-    /* Check if ADC is effectively disabled */
-    if (tmp_hal_status == HAL_OK)
-    {
-      /* Set ADC state */
-      ADC_STATE_CLR_SET(hadc->State,
-                        HAL_ADC_STATE_REG_BUSY,
-                        HAL_ADC_STATE_READY);
-    }
-  }
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hadc);
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-/**
-  * @brief  Wait for regular group conversion to be completed.
-  * @note   ADC conversion flags EOS (end of sequence) and EOC (end of
-  *         conversion) are cleared by this function, with an exception:
-  *         if low power feature "LowPowerAutoWait" is enabled, flags are 
-  *         not cleared to not interfere with this feature until data register
-  *         is read using function HAL_ADC_GetValue().
-  * @note   This function cannot be used in a particular setup: ADC configured 
-  *         in DMA mode and polling for end of each conversion (ADC init
-  *         parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV).
-  *         In this case, DMA resets the flag EOC and polling cannot be
-  *         performed on each conversion. Nevertheless, polling can still 
-  *         be performed on the complete sequence (ADC init
-  *         parameter "EOCSelection" set to ADC_EOC_SEQ_CONV).
-  * @param  hadc: ADC handle
-  * @param  Timeout: Timeout value in millisecond.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
-{
-  uint32_t tickstart = 0;
-  uint32_t tmp_Flag_EOC   = 0x00;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  
-  /* If end of conversion selected to end of sequence conversions */
-  if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
-  {
-    tmp_Flag_EOC = ADC_FLAG_EOS;
-  }
-  /* If end of conversion selected to end of unitary conversion */
-  else /* ADC_EOC_SINGLE_CONV */
-  {
-    /* Verification that ADC configuration is compliant with polling for      */
-    /* each conversion:                                                       */
-    /* Particular case is ADC configured in DMA mode and ADC sequencer with   */
-    /* several ranks and polling for end of each conversion.                  */
-    /* For code simplicity sake, this particular case is generalized to       */
-    /* ADC configured in DMA mode and and polling for end of each conversion. */
-    if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN))
-    {
-      /* Update ADC state machine to error */
-      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
-      
-      /* Process unlocked */
-      __HAL_UNLOCK(hadc);
-      
-      return HAL_ERROR;
-    }
-    else
-    {
-      tmp_Flag_EOC = (ADC_FLAG_EOC | ADC_FLAG_EOS);
-    }
-  }
-  
-  /* Get tick count */
-  tickstart = HAL_GetTick();
-  
-  /* Wait until End of unitary conversion or sequence conversions flag is raised */
-  while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
-  {
-    /* Check if timeout is disabled (set to infinite wait) */
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
-      {
-        /* Update ADC state machine to timeout */
-        SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
-        
-        /* Process unlocked */
-        __HAL_UNLOCK(hadc);
-        
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  
-  /* Update ADC state machine */
-  SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
-  
-  /* Determine whether any further conversion upcoming on group regular       */
-  /* by external trigger, continuous mode or scan sequence on going.          */
-  if(ADC_IS_SOFTWARE_START_REGULAR(hadc)        && 
-     (hadc->Init.ContinuousConvMode == DISABLE)   )
-  {
-    /* If End of Sequence is reached, disable interrupts */
-    if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
-    {
-      /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit             */
-      /* ADSTART==0 (no conversion on going)                                  */
-      if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
-      {
-        /* Disable ADC end of single conversion interrupt on group regular */
-        /* Note: Overrun interrupt was enabled with EOC interrupt in          */
-        /* HAL_Start_IT(), but is not disabled here because can be used       */
-        /* by overrun IRQ process below.                                      */
-        __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
-        
-        /* Set ADC state */
-        ADC_STATE_CLR_SET(hadc->State,
-                          HAL_ADC_STATE_REG_BUSY,
-                          HAL_ADC_STATE_READY);
-      }
-      else
-      {
-        /* Change ADC state to error state */
-        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
-        
-        /* Set ADC error code to ADC IP internal error */
-        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-      }
-    }
-  }
-  
-  /* Clear end of conversion flag of regular group if low power feature       */
-  /* "LowPowerAutoWait " is disabled, to not interfere with this feature      */
-  /* until data register is read using function HAL_ADC_GetValue().           */
-  if (hadc->Init.LowPowerAutoWait == DISABLE)
-  {
-    /* Clear regular group conversion flag */
-    __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS));
-  }
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Poll for ADC event.
-  * @param  hadc: ADC handle
-  * @param  EventType: the ADC event type.
-  *          This parameter can be one of the following values:
-  *            @arg ADC_AWD_EVENT: ADC Analog watchdog event
-  *            @arg ADC_OVR_EVENT: ADC Overrun event
-  * @param  Timeout: Timeout value in millisecond.
-  * @note   The relevant flag is cleared if found to be set, except for ADC_FLAG_OVR.
-  *         Indeed, the latter is reset only if hadc->Init.Overrun field is set  
-  *         to ADC_OVR_DATA_OVERWRITTEN. Otherwise, data register may be potentially overwritten 
-  *         by a new converted data as soon as OVR is cleared.
-  *         To reset OVR flag once the preserved data is retrieved, the user can resort
-  *         to macro __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); 
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U; 
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  assert_param(IS_ADC_EVENT_TYPE(EventType));
-  
-  /* Get tick count */
-  tickstart = HAL_GetTick();
-  
-  /* Check selected event flag */
-  while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
-  {
-    /* Check if timeout is disabled (set to infinite wait) */
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) ||((HAL_GetTick() - tickstart ) > Timeout))
-      {
-        /* Update ADC state machine to timeout */
-        SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
-        
-        /* Process unlocked */
-        __HAL_UNLOCK(hadc);
-        
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  
-  switch(EventType)
-  {
-  /* Analog watchdog (level out of window) event */
-  case ADC_AWD_EVENT:
-    /* Set ADC state */
-    SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
-    
-    /* Clear ADC analog watchdog flag */
-    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
-    break;
-    
-  /* Overrun event */
-  default: /* Case ADC_OVR_EVENT */
-    /* If overrun is set to overwrite previous data, overrun event is not     */
-    /* considered as an error.                                                */
-    /* (cf ref manual "Managing conversions without using the DMA and without */
-    /* overrun ")                                                             */
-    if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED)
-    {
-      /* Set ADC state */
-      SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR);
-        
-      /* Set ADC error code to overrun */
-      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
-    }
-    
-    /* Clear ADC Overrun flag */
-    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
-    break;
-  }
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enable ADC, start conversion of regular group with interruption.
-  * @note   Interruptions enabled in this function according to initialization
-  *         setting : EOC (end of conversion), EOS (end of sequence), 
-  *         OVR overrun.
-  *         Each of these interruptions has its dedicated callback function.
-  * @note   To guarantee a proper reset of all interruptions once all the needed
-  *         conversions are obtained, HAL_ADC_Stop_IT() must be called to ensure 
-  *         a correct stop of the IT-based conversions.
-  * @note   By default, HAL_ADC_Start_IT() doesn't enable the End Of Sampling 
-  *         interruption. If required (e.g. in case of oversampling with trigger
-  *         mode), the user must:
-  *          1. first clear the EOSMP flag if set with macro __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOSMP)             
-  *          2. then enable the EOSMP interrupt with macro __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOSMP)     
-  *          before calling HAL_ADC_Start_IT().
-  * @param  hadc: ADC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  
-  /* Perform ADC enable and conversion start if no conversion is on going */
-  if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
-  {
-    /* Process locked */
-    __HAL_LOCK(hadc);
-    
-    /* Enable the ADC peripheral */
-    /* If low power mode AutoPowerOff is enabled, power-on/off phases are     */
-    /* performed automatically by hardware.                                   */
-    if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
-    {
-      tmp_hal_status = ADC_Enable(hadc);
-    }
-    
-    /* Start conversion if ADC is effectively enabled */
-    if (tmp_hal_status == HAL_OK)
-    {
-      /* Set ADC state                                                        */
-      /* - Clear state bitfield related to regular group conversion results   */
-      /* - Set state bitfield related to regular operation                    */
-      ADC_STATE_CLR_SET(hadc->State,
-                        HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
-                        HAL_ADC_STATE_REG_BUSY);
-      
-      /* Reset ADC all error code fields */
-      ADC_CLEAR_ERRORCODE(hadc);
-      
-      /* Process unlocked */
-      /* Unlock before starting ADC conversions: in case of potential         */
-      /* interruption, to let the process to ADC IRQ Handler.                 */
-      __HAL_UNLOCK(hadc);
-      
-      /* Clear regular group conversion flag and overrun flag */
-      /* (To ensure of no unknown state from potential previous ADC           */
-      /* operations)                                                          */
-      __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
-      
-      /* Enable ADC end of conversion interrupt */
-      /* Enable ADC overrun interrupt */  
-      switch(hadc->Init.EOCSelection)
-      {
-        case ADC_EOC_SEQ_CONV: 
-          __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
-          __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR));
-          break;
-        /* case ADC_EOC_SINGLE_CONV */
-        default:
-          __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
-          break;
-      }
-      
-      /* Enable conversion of regular group.                                  */
-      /* If software start has been selected, conversion starts immediately.  */
-      /* If external trigger has been selected, conversion will start at next */
-      /* trigger event.                                                       */
-      hadc->Instance->CR |= ADC_CR_ADSTART;
-    }
-  }
-  else
-  {
-    tmp_hal_status = HAL_BUSY;
-  }
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-/**
-  * @brief  Stop ADC conversion of regular group (and injected group in 
-  *         case of auto_injection mode), disable interrution of 
-  *         end-of-conversion, disable ADC peripheral.
-  * @param  hadc: ADC handle
-  * @retval HAL status.
-  */
-HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  
-  /* Process locked */
-  __HAL_LOCK(hadc);
-  
-  /* 1. Stop potential conversion on going, on ADC group regular */
-  tmp_hal_status = ADC_ConversionStop(hadc);
-  
-  /* Disable ADC peripheral if conversions are effectively stopped */
-  if (tmp_hal_status == HAL_OK)
-  {
-    /* Disable ADC end of conversion interrupt for regular group */
-    /* Disable ADC overrun interrupt */
-    __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
-    
-    /* 2. Disable the ADC peripheral */
-    tmp_hal_status = ADC_Disable(hadc);
-    
-    /* Check if ADC is effectively disabled */
-    if (tmp_hal_status == HAL_OK)
-    {
-      /* Set ADC state */
-      ADC_STATE_CLR_SET(hadc->State,
-                        HAL_ADC_STATE_REG_BUSY,
-                        HAL_ADC_STATE_READY);
-    }
-  }
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hadc);
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-/**
-  * @brief  Enable ADC, start conversion of regular group and transfer result through DMA.
-  * @note   Interruptions enabled in this function:
-  *         overrun (if applicable), DMA half transfer, DMA transfer complete. 
-  *         Each of these interruptions has its dedicated callback function.
-  * @param  hadc: ADC handle
-  * @param  pData: Destination Buffer address.
-  * @param  Length: Length of data to be transferred from ADC peripheral to memory (in bytes)
-  * @retval HAL status.
-  */
-HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  
-  /* Perform ADC enable and conversion start if no conversion is on going */
-  if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
-  {
-    /* Process locked */
-    __HAL_LOCK(hadc);
-
-    /* Enable the ADC peripheral */
-    /* If low power mode AutoPowerOff is enabled, power-on/off phases are       */
-    /* performed automatically by hardware.                                     */
-    if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
-    {
-      tmp_hal_status = ADC_Enable(hadc);
-    }
-    
-    /* Start conversion if ADC is effectively enabled */
-    if (tmp_hal_status == HAL_OK)
-    {
-      /* Set ADC state                                                        */
-      /* - Clear state bitfield related to regular group conversion results   */
-      /* - Set state bitfield related to regular operation                    */
-      ADC_STATE_CLR_SET(hadc->State,
-                        HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
-                        HAL_ADC_STATE_REG_BUSY);
-      
-      /* Reset ADC all error code fields */
-      ADC_CLEAR_ERRORCODE(hadc);
-      
-      /* Process unlocked */
-      /* Unlock before starting ADC conversions: in case of potential         */
-      /* interruption, to let the process to ADC IRQ Handler.                 */
-      __HAL_UNLOCK(hadc);
-
-      /* Set the DMA transfer complete callback */
-      hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
-      
-      /* Set the DMA half transfer complete callback */
-      hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
-      
-      /* Set the DMA error callback */
-      hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
-      
-      
-      /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC   */
-      /* start (in case of SW start):                                         */
-      
-      /* Clear regular group conversion flag and overrun flag */
-      /* (To ensure of no unknown state from potential previous ADC           */
-      /* operations)                                                          */
-      __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
-      
-      /* Enable ADC overrun interrupt */
-      __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
-      
-      /* Enable ADC DMA mode */
-      hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN;
-      
-      /* Start the DMA channel */
-      HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
-      
-      /* Enable conversion of regular group.                                  */
-      /* If software start has been selected, conversion starts immediately.  */
-      /* If external trigger has been selected, conversion will start at next */
-      /* trigger event.                                                       */
-      hadc->Instance->CR |= ADC_CR_ADSTART;
-    }
-  }
-  else
-  {
-    tmp_hal_status = HAL_BUSY;
-  }
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-/**
-  * @brief  Stop ADC conversion of regular group (and injected group in 
-  *         case of auto_injection mode), disable ADC DMA transfer, disable 
-  *         ADC peripheral.
-  *         Each of these interruptions has its dedicated callback function.
-  * @param  hadc: ADC handle
-  * @retval HAL status.
-  */
-HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  
-  /* Process locked */
-  __HAL_LOCK(hadc);
-  
-  /* 1. Stop potential ADC group regular conversion on going */
-  tmp_hal_status = ADC_ConversionStop(hadc);
-  
-  /* Disable ADC peripheral if conversions are effectively stopped */
-  if (tmp_hal_status == HAL_OK)
-  {
-    /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
-    CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN);
-    
-    /* Disable the DMA channel (in case of DMA in circular mode or stop       */
-    /* while DMA transfer is on going)                                        */
-    tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
-    
-    /* Check if DMA channel effectively disabled */
-    if (tmp_hal_status != HAL_OK)
-    {
-      /* Update ADC state machine to error */
-      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
-    }
-    
-    /* Disable ADC overrun interrupt */
-    __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
-    
-    /* 2. Disable the ADC peripheral */
-    /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep  */
-    /* in memory a potential failing status.                                  */
-    if (tmp_hal_status == HAL_OK)
-    {
-      tmp_hal_status = ADC_Disable(hadc);
-    }
-    else
-    {
-      ADC_Disable(hadc);
-    }
-
-    /* Check if ADC is effectively disabled */
-    if (tmp_hal_status == HAL_OK)
-    {
-      /* Set ADC state */
-      ADC_STATE_CLR_SET(hadc->State,
-                        HAL_ADC_STATE_REG_BUSY,
-                        HAL_ADC_STATE_READY);
-    }
-    
-  }
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hadc);
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-/**
-  * @brief  Get ADC regular group conversion result.
-  * @note   Reading register DR automatically clears ADC flag EOC
-  *         (ADC group regular end of unitary conversion).
-  * @note   This function does not clear ADC flag EOS 
-  *         (ADC group regular end of sequence conversion).
-  *         Occurrence of flag EOS rising:
-  *          - If sequencer is composed of 1 rank, flag EOS is equivalent
-  *            to flag EOC.
-  *          - If sequencer is composed of several ranks, during the scan
-  *            sequence flag EOC only is raised, at the end of the scan sequence
-  *            both flags EOC and EOS are raised.
-  *         To clear this flag, either use function:
-  *         in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
-  *         model polling: @ref HAL_ADC_PollForConversion()
-  *         or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS).
-  * @param  hadc: ADC handle
-  * @retval ADC group regular conversion data
-  */
-uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
-{
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-
-  /* Note: EOC flag is not cleared here by software because automatically     */
-  /*       cleared by hardware when reading register DR.                      */
-  
-  /* Return ADC converted value */ 
-  return hadc->Instance->DR;
-}
-
-/**
-  * @brief  Handle ADC interrupt request.
-  * @param  hadc: ADC handle
-  * @retval None
-  */
-void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
-{
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
-  assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
-  
-  /* ========== Check End of Conversion flag for regular group ========== */
-  if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC)) || 
-      (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS))   )
-  {
-    /* Update state machine on conversion status if not in error state */
-    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
-    {
-      /* Set ADC state */
-      SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
-    }
-    
-    /* Determine whether any further conversion upcoming on group regular     */
-    /* by external trigger, continuous mode or scan sequence on going.        */
-    if(ADC_IS_SOFTWARE_START_REGULAR(hadc)        && 
-       (hadc->Init.ContinuousConvMode == DISABLE)   )
-    {
-      /* If End of Sequence is reached, disable interrupts */
-      if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
-      {
-        /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit           */
-        /* ADSTART==0 (no conversion on going)                                */
-        if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
-        {
-          /* Disable ADC end of single conversion interrupt on group regular */
-          /* Note: Overrun interrupt was enabled with EOC interrupt in        */
-          /* HAL_Start_IT(), but is not disabled here because can be used     */
-          /* by overrun IRQ process below.                                    */
-          __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
-          
-          /* Set ADC state */
-          ADC_STATE_CLR_SET(hadc->State,
-                            HAL_ADC_STATE_REG_BUSY,
-                            HAL_ADC_STATE_READY);
-        }
-        else
-        {
-          /* Change ADC state to error state */
-          SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
-          
-          /* Set ADC error code to ADC IP internal error */
-          SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-        }
-      }
-    }
-    
-    /* Conversion complete callback */
-    /* Note: into callback, to determine if conversion has been triggered     */
-    /*       from EOC or EOS, possibility to use:                             */
-    /*        " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) "                */
-    HAL_ADC_ConvCpltCallback(hadc);
-    
-    /* Clear regular group conversion flag */
-    /* Note: in case of overrun set to ADC_OVR_DATA_PRESERVED, end of         */
-    /*       conversion flags clear induces the release of the preserved data.*/
-    /*       Therefore, if the preserved data value is needed, it must be     */
-    /*       read preliminarily into HAL_ADC_ConvCpltCallback().              */
-    /* Note: Management of low power auto-wait enabled: flags must be cleared */
-    /*       by user when fetching ADC conversion data.                       */
-    /*       This case is managed in IRQ handler, but this low-power mode     */
-    /*       should not be used with programming model IT or DMA.             */
-    /*       Refer to comment of parameter "LowPowerAutoWait".                */
-    if (hadc->Init.LowPowerAutoWait != ENABLE)
-    {
-      __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS));
-    }
-  }
-  
-  /* ========== Check analog watchdog 1 flag ========== */
-  if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD))
-  {
-    /* Set ADC state */
-    SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
-    
-    /* Level out of window 1 callback */
-    HAL_ADC_LevelOutOfWindowCallback(hadc);
-    
-    /* Clear ADC Analog watchdog flag */
-    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
-   
-  }
-  
-  
-  /* ========== Check Overrun flag ========== */
-  if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR))
-  {
-    /* If overrun is set to overwrite previous data (default setting),        */
-    /* overrun event is not considered as an error.                           */
-    /* (cf ref manual "Managing conversions without using the DMA and without */
-    /* overrun ")                                                             */
-    /* Exception for usage with DMA overrun event always considered as an     */
-    /* error.                                                                 */
-    if ((hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED)            ||
-        HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN)  )
-    {
-      /* Set ADC error code to overrun */
-      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
-      
-      /* Clear ADC overrun flag */
-      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
-      
-      /* Error callback */ 
-      HAL_ADC_ErrorCallback(hadc);
-    }
-    
-    /* Clear the Overrun flag */
-    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
-  }
-  
-}
-
-/**
-  * @brief  Conversion complete callback in non-blocking mode.
-  * @param  hadc: ADC handle
-  * @retval None
-  */
-__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hadc);
-
-  /* NOTE : This function should not be modified. When the callback is needed,
-            function HAL_ADC_ConvCpltCallback must be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Conversion DMA half-transfer callback in non-blocking mode.
-  * @param  hadc: ADC handle
-  * @retval None
-  */
-__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hadc);
-
-  /* NOTE : This function should not be modified. When the callback is needed,
-            function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
-  */
-}
-
-/**
-  * @brief  Analog watchdog 1 callback in non-blocking mode.
-  * @param  hadc: ADC handle
-  * @retval None
-  */
-__weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hadc);
-
-  /* NOTE : This function should not be modified. When the callback is needed,
-            function HAL_ADC_LevelOutOfWindowCallback must be implemented in the user file.
-  */
-}
-
-/**
-  * @brief  ADC error callback in non-blocking mode
-  *         (ADC conversion with interruption or transfer by DMA).
-  * @note   In case of error due to overrun when using ADC with DMA transfer 
-  *         (HAL ADC handle paramater "ErrorCode" to state "HAL_ADC_ERROR_OVR"):
-  *         - Reinitialize the DMA using function "HAL_ADC_Stop_DMA()".
-  *         - If needed, restart a new ADC conversion using function
-  *           "HAL_ADC_Start_DMA()"
-  *           (this function is also clearing overrun flag)
-  * @param  hadc: ADC handle
-  * @retval None
-  */
-__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hadc);
-
-  /* NOTE : This function should not be modified. When the callback is needed,
-            function HAL_ADC_ErrorCallback must be implemented in the user file.
-  */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
- *  @brief    Peripheral Control functions 
- *
-@verbatim   
- ===============================================================================
-             ##### Peripheral Control functions #####
- ===============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Configure channels on regular group
-      (+) Configure the analog watchdog
-      
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Configure a channel to be assigned to ADC group regular.
-  * @note   In case of usage of internal measurement channels:
-  *         VrefInt/Vlcd(STM32L0x3xx only)/TempSensor.
-  *         Sampling time constraints must be respected (sampling time can be 
-  *         adjusted in function of ADC clock frequency and sampling time 
-  *         setting).
-  *         Refer to device datasheet for timings values, parameters TS_vrefint,
-  *         TS_vlcd (STM32L0x3xx only), TS_temp (values rough order: 5us to 17us).
-  *         These internal paths can be be disabled using function 
-  *         HAL_ADC_DeInit().
-  * @note   Possibility to update parameters on the fly:
-  *         This function initializes channel into ADC group regular,
-  *         following calls to this function can be used to reconfigure
-  *         some parameters of structure "ADC_ChannelConfTypeDef" on the fly,
-  *         without resetting the ADC.
-  *         The setting of these parameters is conditioned to ADC state:
-  *         Refer to comments of structure "ADC_ChannelConfTypeDef".
-  * @param  hadc: ADC handle
-  * @param  sConfig: Structure of ADC channel assigned to ADC group regular.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
-{
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  assert_param(IS_ADC_CHANNEL(sConfig->Channel));
-  assert_param(IS_ADC_RANK(sConfig->Rank));
-  
-  /* Process locked */
-  __HAL_LOCK(hadc);
-  
-  /* Parameters update conditioned to ADC state:                              */
-  /* Parameters that can be updated when ADC is disabled or enabled without   */
-  /* conversion on going on regular group:                                    */
-  /*  - Channel number                                                        */
-  /*  - Management of internal measurement channels: Vbat/VrefInt/TempSensor  */
-  if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) != RESET)
-  {
-    /* Update ADC state machine to error */
-    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
-    /* Process unlocked */
-    __HAL_UNLOCK(hadc);
-    return HAL_ERROR;
-  }
-  
-  if (sConfig->Rank != ADC_RANK_NONE)
-  {
-    /* Enable selected channels */
-    hadc->Instance->CHSELR |= (uint32_t)(sConfig->Channel & ADC_CHANNEL_MASK);
-    
-    /* Management of internal measurement channels: Vlcd (STM32L0x3xx only)/VrefInt/TempSensor */
-    /* internal measurement paths enable: If internal channel selected, enable  */
-    /* dedicated internal buffers and path.                                     */
-    
-    /* If Temperature sensor channel is selected, then enable the internal      */
-    /* buffers and path  */
-    if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_TEMPSENSOR ) == (ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_MASK))
-    {
-      ADC->CCR |= ADC_CCR_TSEN;   
-      
-      /* Delay for temperature sensor stabilization time */
-      ADC_DelayMicroSecond(ADC_TEMPSENSOR_DELAY_US);
-    }
-    
-    /* If VRefInt channel is selected, then enable the internal buffers and path   */
-    if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VREFINT) == (ADC_CHANNEL_VREFINT & ADC_CHANNEL_MASK))
-    {
-      ADC->CCR |= ADC_CCR_VREFEN;   
-    }
-    
-#if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx)
-    /* If Vlcd channel is selected, then enable the internal buffers and path   */
-    if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VLCD) == (ADC_CHANNEL_VLCD & ADC_CHANNEL_MASK))
-    {
-      ADC->CCR |= ADC_CCR_VLCDEN;   
-    }
-#endif
-  }
-  else
-  {
-    /* Regular sequence configuration */
-    /* Reset the channel selection register from the selected channel */
-    hadc->Instance->CHSELR &= ~((uint32_t)(sConfig->Channel & ADC_CHANNEL_MASK));
-    
-    /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */
-    /* internal measurement paths disable: If internal channel selected,    */
-    /* disable dedicated internal buffers and path.                         */
-    if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_TEMPSENSOR ) == (ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_MASK))
-    {
-      ADC->CCR &= ~ADC_CCR_TSEN;   
-    }
-    
-    /* If VRefInt channel is selected, then enable the internal buffers and path   */
-    if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VREFINT) == (ADC_CHANNEL_VREFINT & ADC_CHANNEL_MASK))
-    {
-      ADC->CCR &= ~ADC_CCR_VREFEN;   
-    }
-    
-#if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx)
-    /* If Vlcd channel is selected, then enable the internal buffers and path   */
-    if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VLCD) == (ADC_CHANNEL_VLCD & ADC_CHANNEL_MASK))
-    {
-      ADC->CCR &= ~ADC_CCR_VLCDEN;   
-    }
-#endif
-  }
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hadc);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Configure the analog watchdog.
-  * @note   Possibility to update parameters on the fly:
-  *         This function initializes the selected analog watchdog, successive  
-  *         calls to this function can be used to reconfigure some parameters 
-  *         of structure "ADC_AnalogWDGConfTypeDef" on the fly, without resetting 
-  *         the ADC.
-  *         The setting of these parameters is conditioned to ADC state.
-  *         For parameters constraints, see comments of structure 
-  *         "ADC_AnalogWDGConfTypeDef".
-  * @note   Analog watchdog thresholds can be modified while ADC conversion
-  *         is on going.
-  *         In this case, some constraints must be taken into account:
-  *         the programmed threshold values are effective from the next
-  *         ADC EOC (end of unitary conversion).
-  *         Considering that registers write delay may happen due to
-  *         bus activity, this might cause an uncertainty on the
-  *         effective timing of the new programmed threshold values.
-  * @param  hadc: ADC handle
-  * @param  AnalogWDGConfig: Structure of ADC analog watchdog configuration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  
-  uint32_t tmpAWDHighThresholdShifted;
-  uint32_t tmpAWDLowThresholdShifted;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
-  assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
-  
-  if(AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG)
-  {
-    assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
-  }
-
-  /* Verify if threshold is within the selected ADC resolution */
-  assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold));
-  assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold));
-
-  /* Process locked */
-  __HAL_LOCK(hadc);
-  
-  /* Parameters update conditioned to ADC state:                              */
-  /* Parameters that can be updated when ADC is disabled or enabled without   */
-  /* conversion on going on regular group:                                    */
-  /*  - Analog watchdog channels                                              */
-  /*  - Analog watchdog thresholds                                            */
-  if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
-  {
-    /* Configure ADC Analog watchdog interrupt */
-    if(AnalogWDGConfig->ITMode == ENABLE)
-    {
-      /* Enable the ADC Analog watchdog interrupt */
-      __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
-    }
-    else
-    {
-      /* Disable the ADC Analog watchdog interrupt */
-      __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
-    }
-    
-    /* Configuration of analog watchdog:                                        */
-    /*  - Set the analog watchdog mode                                          */
-    /*  - Set the Analog watchdog channel (is not used if watchdog              */
-    /*    mode "all channels": ADC_CFGR1_AWD1SGL=0)                             */
-    hadc->Instance->CFGR1 &= ~( ADC_CFGR1_AWDSGL |
-                               ADC_CFGR1_AWDEN  |
-                               ADC_CFGR1_AWDCH);
-    
-    hadc->Instance->CFGR1 |= ( AnalogWDGConfig->WatchdogMode |
-                              (AnalogWDGConfig->Channel & ADC_CHANNEL_AWD_MASK));
-    
-    
-    /* Shift the offset in function of the selected ADC resolution: Thresholds  */
-    /* have to be left-aligned on bit 11, the LSB (right bits) are set to 0     */
-    tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold);
-    tmpAWDLowThresholdShifted  = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold);
-    
-    /* Clear High & Low high thresholds */
-    hadc->Instance->TR &= (uint32_t) ~ (ADC_TR_HT | ADC_TR_LT);
-    
-    /* Set the high threshold */
-    hadc->Instance->TR = ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted);
-    /* Set the low threshold */
-    hadc->Instance->TR |= tmpAWDLowThresholdShifted;
-  }
-  /* If a conversion is on going on regular group, no update could be done    */
-  /* on neither of the AWD configuration structure parameters.                */
-  else
-  {
-    /* Update ADC state machine to error */
-    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
-    
-    tmp_hal_status = HAL_ERROR;
-  }
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hadc);
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-
-/**
-  * @}
-  */
-
-/** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions
- *  @brief    ADC Peripheral State functions
- *
-@verbatim
- ===============================================================================
-            ##### Peripheral state and errors functions #####
- ===============================================================================
-    [..]
-    This subsection provides functions to get in run-time the status of the  
-    peripheral.
-      (+) Check the ADC state
-      (+) Check the ADC error code
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the ADC handle state.
-  * @note   ADC state machine is managed by bitfields, ADC status must be 
-  *         compared with states bits.
-  *         For example:                                                         
-  *           " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_REG_BUSY)) "
-  *           " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_AWD1)    ) "
-  * @param  hadc: ADC handle
-  * @retval ADC handle state (bitfield on 32 bits)
-  */
-uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
-{
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  
-  /* Return ADC handle state */
-  return hadc->State;
-}
-
-/**
-  * @brief  Return the ADC error code.
-  * @param  hadc: ADC handle
-  * @retval ADC error code (bitfield on 32 bits)
-  */
-uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
-{
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  
-  return hadc->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup ADC_Private_Functions ADC Private Functions
-  * @{
-  */
-
-/**
-  * @brief  Enable the selected ADC.
-  * @note   Prerequisite condition to use this function: ADC must be disabled
-  *         and voltage regulator must be enabled (done into HAL_ADC_Init()).
-  * @note   If low power mode AutoPowerOff is enabled, power-on/off phases are
-  *         performed automatically by hardware.
-  *         In this mode, this function is useless and must not be called because 
-  *         flag ADC_FLAG_RDY is not usable.
-  *         Therefore, this function must be called under condition of
-  *         "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)".
-  * @param  hadc: ADC handle
-  * @retval HAL status.
-  */
-static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
-{
-  uint32_t tickstart = 0U;
-
-  /* ADC enable and wait for ADC ready (in case of ADC is disabled or         */
-  /* enabling phase not yet completed: flag ADC ready not yet set).           */
-  /* Timeout implemented to not be stuck if ADC cannot be enabled (possible   */
-  /* causes: ADC clock not running, ...).                                     */
-  if (ADC_IS_ENABLE(hadc) == RESET)
-  {
-    /* Check if conditions to enable the ADC are fulfilled */
-    if (ADC_ENABLING_CONDITIONS(hadc) == RESET)
-    {
-      /* Update ADC state machine to error */
-      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
-      
-      /* Set ADC error code to ADC IP internal error */
-      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-      
-      return HAL_ERROR;
-    }
-    
-    /* Enable the ADC peripheral */
-    __HAL_ADC_ENABLE(hadc);
-    
-    /* Delay for ADC stabilization time. */
-    ADC_DelayMicroSecond(ADC_STAB_DELAY_US);
-
-    /* Get tick count */
-    tickstart = HAL_GetTick();
-    
-    /* Wait for ADC effectively enabled */
-    while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET)
-    {
-      if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
-      {
-        /* Update ADC state machine to error */
-        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
-        
-        /* Set ADC error code to ADC IP internal error */
-        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-        
-        return HAL_ERROR;
-      }
-    }
-  }
-   
-  /* Return HAL status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Disable the selected ADC.
-  * @note   Prerequisite condition to use this function: ADC conversions must be
-  *         stopped.
-  * @param  hadc: ADC handle
-  * @retval HAL status.
-  */
-static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc)
-{
-  uint32_t tickstart = 0U;
-  
-  /* Verification if ADC is not already disabled:                             */
-  /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already  */
-  /*       disabled.                                                          */
-  if (ADC_IS_ENABLE(hadc) != RESET)
-  {
-    /* Check if conditions to disable the ADC are fulfilled */
-    if (ADC_DISABLING_CONDITIONS(hadc) != RESET)
-    {
-      /* Disable the ADC peripheral */
-      __HAL_ADC_DISABLE(hadc);
-    }
-    else
-    {
-      /* Update ADC state machine to error */
-      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
-      
-      /* Set ADC error code to ADC IP internal error */
-      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-      
-      return HAL_ERROR;
-    }
-     
-    /* Wait for ADC effectively disabled */
-    /* Get tick count */
-    tickstart = HAL_GetTick();
-    
-    while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
-    {
-      if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
-      {
-        /* Update ADC state machine to error */
-        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
-        
-        /* Set ADC error code to ADC IP internal error */
-        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-        
-        return HAL_ERROR;
-      }
-    }
-  }
-  
-  /* Return HAL status */
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  Stop ADC conversion.
-  * @note   Prerequisite condition to use this function: ADC conversions must be
-  *         stopped to disable the ADC.
-  * @param  hadc: ADC handle
-  * @retval HAL status.
-  */
-static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-    
-  /* Verification if ADC is not already stopped on regular group to bypass    */
-  /* this function if not needed.                                             */
-  if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc))
-  {
-    
-    /* Stop potential conversion on going on regular group */
-    /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */
-    if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) && 
-        HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS)                  )
-    {
-      /* Stop conversions on regular group */
-      hadc->Instance->CR |= ADC_CR_ADSTP;
-    }
-    
-    /* Wait for conversion effectively stopped */
-    /* Get tick count */
-    tickstart = HAL_GetTick();
-      
-    while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET)
-    {
-      if((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
-      {
-        /* Update ADC state machine to error */
-        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
-      
-        /* Set ADC error code to ADC IP internal error */
-        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-        
-        return HAL_ERROR;
-      }
-    }
-    
-  }
-   
-  /* Return HAL status */
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  DMA transfer complete callback. 
-  * @param  hdma: pointer to DMA handle.
-  * @retval None
-  */
-static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
-{
-  /* Retrieve ADC handle corresponding to current DMA handle */
-  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  
-  /* Update state machine on conversion status if not in error state */
-  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
-  {
-    /* Set ADC state */
-    SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
-    
-    /* Determine whether any further conversion upcoming on group regular     */
-    /* by external trigger, continuous mode or scan sequence on going.        */
-    if(ADC_IS_SOFTWARE_START_REGULAR(hadc)        && 
-       (hadc->Init.ContinuousConvMode == DISABLE)   )
-    {
-      /* If End of Sequence is reached, disable interrupts */
-      if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
-      {
-        /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit           */
-        /* ADSTART==0 (no conversion on going)                                */
-        if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
-        {
-          /* Disable ADC end of single conversion interrupt on group regular */
-          /* Note: Overrun interrupt was enabled with EOC interrupt in        */
-          /* HAL_Start_IT(), but is not disabled here because can be used     */
-          /* by overrun IRQ process below.                                    */
-          __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
-          
-          /* Set ADC state */
-          ADC_STATE_CLR_SET(hadc->State,
-                            HAL_ADC_STATE_REG_BUSY,
-                            HAL_ADC_STATE_READY);
-        }
-        else
-        {
-          /* Change ADC state to error state */
-          SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
-          
-          /* Set ADC error code to ADC IP internal error */
-          SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-        }
-      }
-    }
-
-    /* Conversion complete callback */
-    HAL_ADC_ConvCpltCallback(hadc);
-  }
-  else
-  {
-    /* Call DMA error callback */
-    hadc->DMA_Handle->XferErrorCallback(hdma);
-  }
-}
-
-/**
-  * @brief  DMA half transfer complete callback. 
-  * @param  hdma: pointer to DMA handle.
-  * @retval None
-  */
-static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
-{
-  /* Retrieve ADC handle corresponding to current DMA handle */
-  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  
-  /* Half conversion callback */
-  HAL_ADC_ConvHalfCpltCallback(hadc); 
-}
-
-/**
-  * @brief  DMA error callback.
-  * @param  hdma: pointer to DMA handle.
-  * @retval None
-  */
-static void ADC_DMAError(DMA_HandleTypeDef *hdma)
-{
-  /* Retrieve ADC handle corresponding to current DMA handle */
-  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  
-  /* Set ADC state */
-  SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
-  
-  /* Set ADC error code to DMA error */
-  SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
-  
-  /* Error callback */
-  HAL_ADC_ErrorCallback(hadc); 
-}
-
-/**
-  * @brief  Delay micro seconds 
-  * @param  microSecond : delay
-  * @retval None
-  */
-static void ADC_DelayMicroSecond(uint32_t microSecond)
-{
-  /* Compute number of CPU cycles to wait for */
-  __IO uint32_t waitLoopIndex = (microSecond * (SystemCoreClock / 1000000U));
-
-  while(waitLoopIndex != 0U)
-  {
-    waitLoopIndex--;
-  } 
-}
-
-#endif /* HAL_ADC_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c
deleted file mode 100755
index 1f260e14..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c
+++ /dev/null
@@ -1,361 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_adc_ex.c
-  * @author  MCD Application Team
-  * @brief   This file provides firmware functions to manage the following 
-  *          functionalities of the Analog to Digital Convertor (ADC)
-  *          peripheral:
-  *           + Operation functions
-  *             ++ Calibration
-  *               +++ ADC automatic self-calibration
-  *               +++ Calibration factors get or set
-  *          Other functions (generic functions) are available in file 
-  *          "stm32l0xx_hal_adc.c".
-  *
-  @verbatim
-  [..] 
-  (@) Sections "ADC peripheral features" and "How to use this driver" are
-      available in file of generic functions "stm32l0xx_hal_adc.c".
-  [..]
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup ADCEx ADCEx
-  * @brief ADC Extended HAL module driver
-  * @{
-  */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-
-/** @defgroup ADCEx_Private_Constants ADC Extended Private Constants
-  * @{
-  */
-
-  /* Fixed timeout values for ADC calibration, enable settling time, disable  */
-  /* settling time.                                                           */
-  /* Values defined to be higher than worst cases: low clock frequency,       */
-  /* maximum prescaler.                                                       */
-  /* Unit: ms                                                                 */
-  #define ADC_CALIBRATION_TIMEOUT      10U      
-
-/* Delay for VREFINT stabilization time. */
-/* Internal reference startup time max value is 3ms  (refer to device datasheet, parameter TVREFINT). */
-/* Unit: ms */
-#define SYSCFG_BUF_VREFINT_ENABLE_TIMEOUT       ((uint32_t) 3U)
-
-/* Delay for TEMPSENSOR stabilization time. */
-/* Temperature sensor startup time max value is 10us  (refer to device datasheet, parameter tSTART). */
-/* Unit: ms */
-#define SYSCFG_BUF_TEMPSENSOR_ENABLE_TIMEOUT    ((uint32_t) 1U)
-
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions
-  * @{
-  */
-
-/** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions
-  * @brief    Extended IO operation functions
-  *
-@verbatim
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Perform the ADC calibration.
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Perform an ADC automatic self-calibration
-  *         Calibration prerequisite: ADC must be disabled (execute this
-  *         function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
-  * @note   Calibration factor can be read after calibration, using function
-  *         HAL_ADC_GetValue() (value on 7 bits: from DR[6;0]).
-  * @param  hadc       ADC handle
-  * @param  SingleDiff: Selection of single-ended or differential input
-  *          This parameter can be only of the following values:
-  *            @arg ADC_SINGLE_ENDED: Channel in mode input single ended
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  uint32_t tickstart = 0U;
-  uint32_t backup_setting_adc_dma_transfer = 0U; /* Note: Variable not declared as volatile because register read is already declared as volatile */
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-
-  /* Process locked */
-  __HAL_LOCK(hadc);
-  
-  /* Calibration prerequisite: ADC must be disabled. */
-  if (ADC_IS_ENABLE(hadc) == RESET)
-  {
-    /* Set ADC state */
-    ADC_STATE_CLR_SET(hadc->State, 
-                      HAL_ADC_STATE_REG_BUSY,
-                      HAL_ADC_STATE_BUSY_INTERNAL);
-    
-    /* Disable ADC DMA transfer request during calibration */
-    /* Note: Specificity of this STM32 serie: Calibration factor is           */
-    /*       available in data register and also transfered by DMA.           */
-    /*       To not insert ADC calibration factor among ADC conversion data   */
-    /*       in array variable, DMA transfer must be disabled during          */
-    /*       calibration.                                                     */
-    backup_setting_adc_dma_transfer = READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG);
-    CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG);
-    
-    /* Start ADC calibration */
-    hadc->Instance->CR |= ADC_CR_ADCAL;
-    
-    tickstart = HAL_GetTick();  
-    
-    /* Wait for calibration completion */
-    while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL))
-    {
-      if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
-      {
-        /* Update ADC state machine to error */
-        ADC_STATE_CLR_SET(hadc->State,
-                          HAL_ADC_STATE_BUSY_INTERNAL,
-                          HAL_ADC_STATE_ERROR_INTERNAL);
-        
-        /* Process unlocked */
-        __HAL_UNLOCK(hadc);
-        
-        return HAL_ERROR;
-      }
-    }
-    
-    /* Restore ADC DMA transfer request after calibration */
-    SET_BIT(hadc->Instance->CFGR1, backup_setting_adc_dma_transfer);
-    
-    /* Set ADC state */
-    ADC_STATE_CLR_SET(hadc->State,
-                      HAL_ADC_STATE_BUSY_INTERNAL,
-                      HAL_ADC_STATE_READY);
-  }
-  else
-  {
-    /* Update ADC state machine to error */
-    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
-    
-    tmp_hal_status = HAL_ERROR;
-  }
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hadc);
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-/**
-  * @brief  Get the calibration factor.
-  * @param  hadc: ADC handle.
-  * @param  SingleDiff: This parameter can be only:
-  *           @arg ADC_SINGLE_ENDED: Channel in mode input single ended.
-  * @retval Calibration value.
-  */
-uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff)
-{
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); 
-  
-  /* Return the ADC calibration value */ 
-  return ((hadc->Instance->CALFACT) & 0x0000007FU);
-}
-
-/**
-  * @brief  Set the calibration factor to overwrite automatic conversion result.
-  *         ADC must be enabled and no conversion is ongoing.
-  * @param  hadc: ADC handle
-  * @param  SingleDiff: This parameter can be only:
-  *           @arg ADC_SINGLE_ENDED: Channel in mode input single ended.
-  * @param  CalibrationFactor: Calibration factor (coded on 7 bits maximum)
-  * @retval HAL state
-  */
-HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff, uint32_t CalibrationFactor)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); 
-  assert_param(IS_ADC_CALFACT(CalibrationFactor)); 
-  
-  /* Process locked */
-  __HAL_LOCK(hadc);
-  
-  /* Verification of hardware constraints before modifying the calibration    */
-  /* factors register: ADC must be enabled, no conversion on going.           */
-  if ( (ADC_IS_ENABLE(hadc) != RESET)                            &&
-       (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)  )
-  {
-    /* Set the selected ADC calibration value */ 
-    hadc->Instance->CALFACT &= ~ADC_CALFACT_CALFACT;
-    hadc->Instance->CALFACT |= CalibrationFactor;
-  }
-  else
-  {
-    /* Update ADC state machine to error */
-    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
-    /* Update ADC state machine to error */
-    SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-    
-    /* Update ADC state machine to error */
-    tmp_hal_status = HAL_ERROR;
-  }
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hadc);
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-/**
-  * @brief  Enables the buffer of Vrefint for the ADC, required when device is in mode low-power (low-power run, low-power sleep or stop mode)
-  *         This function must be called before function HAL_ADC_Init() 
-  *         (in case of previous ADC operations: function HAL_ADC_DeInit() must be called first)
-  *         For more details on procedure and buffer current consumption, refer to device reference manual.
-  * @note   This is functional only if the LOCK is not set.
-  * @retval None
-*/
-HAL_StatusTypeDef HAL_ADCEx_EnableVREFINT(void)
-{
-  uint32_t tickstart = 0U;
-  
-  /* Enable the Buffer for the ADC by setting ENBUF_SENSOR_ADC bit in the CFGR3 register */
-  SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_VREFINT_ADC);
-  
-  /* Wait for Vrefint buffer effectively enabled */
-  /* Get tick count */
-  tickstart = HAL_GetTick();
-  
-  while(HAL_IS_BIT_CLR(SYSCFG->CFGR3, SYSCFG_CFGR3_VREFINT_RDYF))
-  {
-    if((HAL_GetTick() - tickstart) > SYSCFG_BUF_VREFINT_ENABLE_TIMEOUT)
-    { 
-      return HAL_ERROR;
-    }
-  }
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief Disables the Buffer Vrefint for the ADC.
-  * @note This is functional only if the LOCK is not set.
-  * @retval None
-  */
-void HAL_ADCEx_DisableVREFINT(void)
-{
-  /* Disable the Vrefint by resetting ENBUF_SENSOR_ADC bit in the CFGR3 register */
-  CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_VREFINT_ADC);
-}
-
-/**
-* @brief  Enables the buffer of temperature sensor for the ADC, required when device is in mode low-power (low-power run, low-power sleep or stop mode)
-*         This function must be called before function HAL_ADC_Init()
-*         (in case of previous ADC operations: function HAL_ADC_DeInit() must be called first)
-*         For more details on procedure and buffer current consumption, refer to device reference manual.
-* @note   This is functional only if the LOCK is not set.
-* @retval None
-*/
-HAL_StatusTypeDef HAL_ADCEx_EnableVREFINTTempSensor(void)
-{
-  uint32_t tickstart = 0U;
-  
-  /* Enable the Buffer for the ADC by setting ENBUF_SENSOR_ADC bit in the CFGR3 register */
-  SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_SENSOR_ADC);
-  
-  /* Wait for Vrefint buffer effectively enabled */
-  /* Get tick count */
-  tickstart = HAL_GetTick();
-  
-  while(HAL_IS_BIT_CLR(SYSCFG->CFGR3, SYSCFG_CFGR3_VREFINT_RDYF))
-  {
-    if((HAL_GetTick() - tickstart) > SYSCFG_BUF_TEMPSENSOR_ENABLE_TIMEOUT)
-    { 
-      return HAL_ERROR;
-    }
-  }
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief Disables the VREFINT and Sensor for the ADC.
-  * @note This is functional only if the LOCK is not set.
-  * @retval None
-  */
-void HAL_ADCEx_DisableVREFINTTempSensor(void)
-{
-  /* Disable the Vrefint by resetting ENBUF_SENSOR_ADC bit in the CFGR3 register */
-  CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_SENSOR_ADC);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_ADC_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp.c
deleted file mode 100755
index a72be7d4..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp.c
+++ /dev/null
@@ -1,824 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_comp.c
-  * @author  MCD Application Team
-  * @brief   COMP HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the COMP peripheral:
-  *           + Initialization and de-initialization functions
-  *           + Start/Stop operation functions in polling mode
-  *           + Start/Stop operation functions in interrupt mode (through EXTI interrupt)
-  *           + Peripheral control functions
-  *           + Peripheral state functions
-  *         
-  @verbatim
-================================================================================
-          ##### COMP Peripheral features #####
-================================================================================
-           
-  [..]       
-      The STM32L0xx device family integrates two analog comparators instances
-      COMP1 and COMP2:
-      (#) The COMP input minus (inverting input) and input plus (non inverting input)
-          can be set to internal references or to GPIO pins
-          (refer to GPIO list in reference manual).
-  
-      (#) The COMP output level is available using HAL_COMP_GetOutputLevel()
-          and can be redirected to other peripherals: GPIO pins (in mode
-          alternate functions for comparator), timers.
-          (refer to GPIO list in reference manual).
-  
-      (#) Pairs of comparators instances can be combined in window mode
-          (2 consecutive instances odd and even COMP and COMP).
-  
-      (#) The comparators have interrupt capability through the EXTI controller
-          with wake-up from sleep and stop modes:
-          (++) COMP1 is internally connected to EXTI Line 21
-          (++) COMP2 is internally connected to EXTI Line 22
-
-          From the corresponding IRQ handler, the right interrupt source can be retrieved
-          using macro __HAL_COMP_COMP1_EXTI_GET_FLAG() and __HAL_COMP_COMP2_EXTI_GET_FLAG().
-
-            ##### How to use this driver #####
-================================================================================
-  [..]
-      This driver provides functions to configure and program the comparator instances
-      of STM32L0xx devices.
-
-      To use the comparator, perform the following steps:
-      
-      (#)  Initialize the COMP low level resources by implementing the HAL_COMP_MspInit():
-      (++) Configure the GPIO connected to comparator inputs plus and minus in analog mode
-           using HAL_GPIO_Init().
-      (++) If needed, configure the GPIO connected to comparator output in alternate function mode
-           using HAL_GPIO_Init().
-      (++) If required enable the COMP interrupt by configuring and enabling EXTI line in Interrupt mode and 
-           selecting the desired sensitivity level using HAL_GPIO_Init() function. After that enable the comparator
-           interrupt vector using HAL_NVIC_EnableIRQ() function.
-      
-      (#) Configure the comparator using HAL_COMP_Init() function:
-      (++) Select the input minus (inverting input)
-      (++) Select the input plus (non-inverting input)
-      (++) Select the output polarity  
-      (++) Select the power mode
-      (++) Select the window mode
-      
-      -@@- HAL_COMP_Init() calls internally __HAL_RCC_SYSCFG_CLK_ENABLE()
-          to enable internal control clock of the comparators.
-          However, this is a legacy strategy. In future STM32 families,
-          COMP clock enable must be implemented by user in "HAL_COMP_MspInit()".
-          Therefore, for compatibility anticipation, it is recommended to 
-          implement __HAL_RCC_SYSCFG_CLK_ENABLE() in "HAL_COMP_MspInit()".
-      
-      (#) Reconfiguration on-the-fly of comparator can be done by calling again
-          function HAL_COMP_Init() with new input structure parameters values.
-      
-      (#) Enable the comparator using HAL_COMP_Start() function.
-      
-      (#) Use HAL_COMP_TriggerCallback() or HAL_COMP_GetOutputLevel() functions
-          to manage comparator outputs (events and output level).
-      
-      (#) Disable the comparator using HAL_COMP_Stop() function.
-      
-      (#) De-initialize the comparator using HAL_COMP_DeInit() function.
-      
-      (#) For safety purpose, comparator configuration can be locked using HAL_COMP_Lock() function.
-          The only way to unlock the comparator is a device hardware reset.
-  
-  @endverbatim
-  ******************************************************************************
-
-  Table 1. COMP inputs and output for STM32L0xx devices
-  +---------------------------------------------------------+
-  |                |                |   COMP1   |   COMP2   |
-  |----------------|----------------|-----------|-----------|
-  |                | IO1            |    PA1    |    PA3    |
-  | Input plus     | IO2            |    ---    |    PA4    |
-  |                | IO3            |    ---    |    PB5    |
-  |                | IO4            |    ---    |    PB6    |
-  |                | IO5            |    ---    |    PB7    |
-  |----------------|----------------|-----------------------|
-  |                | 1/4 VrefInt    |    ---    | Available |
-  |                | 1/2 VrefInt    |    ---    | Available |
-  |                | 3/4 VrefInt    |    ---    | Available |
-  | Input minus    | VrefInt        | Available | Available |
-  |                | DAC1 channel 1 | Available | Available |
-  |                | DAC1 channel 2 | Available | Available |
-  |                | IO1            |    PA0    |    PA2    |
-  |                | IO2            |    PA5    |    PA5    |
-  |                | IO3            |    ---    |    PB3    |
-  +---------------------------------------------------------+
-  | Output         |                |  PA0  (1) |  PA2  (1) |
-  |                |                |  PA6  (1) |  PA7  (1) |
-  |                |                |  PA11 (1) |  PA12 (1) |
-  |                |                |  LPTIM    |  LPTIM    |
-  |                |                |  TIM  (2) |  TIM  (2) |
-  +-----------------------------------------------------------+
-  (1) GPIO must be set to alternate function for comparator
-  (2) Comparators output to timers is set in timers instances.
-
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup COMP COMP
-  * @brief COMP HAL module driver
-  * @{
-  */
-
-#ifdef HAL_COMP_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @addtogroup COMP_Private_Constants
-  * @{
-  */
-
-/* Delay for COMP startup time.                                               */
-/* Note: Delay required to reach propagation delay specification.             */
-/* Literal set to maximum value (refer to device datasheet,                   */
-/* parameter "tSTART").                                                       */
-/* Unit: us                                                                   */
-#define COMP_DELAY_STARTUP_US             ((uint32_t) 25U)  /*!< Delay for COMP startup time */
-
-/* Delay for COMP voltage scaler stabilization time (voltage from VrefInt,    */
-/* delay based on VrefInt startup time).                                      */
-/* Literal set to maximum value (refer to device datasheet,                   */
-/* parameter "TVREFINT").                                                     */
-/* Unit: us                                                                   */
-#define COMP_DELAY_VOLTAGE_SCALER_STAB_US ((uint32_t)3000U)  /*!< Delay for COMP voltage scaler stabilization time */
-
-#define COMP_OUTPUT_LEVEL_BITOFFSET_POS  ((uint32_t)  30U)
-
-#define C_REV_ID_A              0x1000U /* Cut1.0 */
-#define C_REV_ID_Z              0x1008U /* Cut1.1 */
-#define C_REV_ID_Y              0x1003U /* Cut1.2 */
-
-#define C_DEV_ID_L073           0x447U
-#define C_DEV_ID_L053           0x417U
-
-/**
-  * @}
-  */
-
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup COMP_Exported_Functions COMP Exported Functions
-  * @{
-  */
-
-/** @defgroup COMP_Exported_Functions_Group1 Initialization/de-initialization functions 
- *  @brief    Initialization and de-initialization functions. 
- *
-@verbatim    
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This section provides functions to initialize and de-initialize comparators 
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initialize the COMP according to the specified
-  *         parameters in the COMP_InitTypeDef and initialize the associated handle.
-  * @note   If the selected comparator is locked, initialization can't be performed.
-  *         To unlock the configuration, perform a system reset.
-  * @note   When the LPTIM connection is enabled, the following pins LPTIM_IN1(PB5, PC0)
-            and LPTIM_IN2(PB7, PC2) should not be configured in alternate function.
-  * @param  hcomp  COMP handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
-{
-  uint32_t tmp_csr = 0U;
-  uint32_t exti_line = 0U;
-  uint32_t comp_voltage_scaler_not_initialized = 0U;
-  __IO uint32_t wait_loop_index = 0U;
-  HAL_StatusTypeDef status = HAL_OK;
-  
-  /* Check the COMP handle allocation and lock status */
-  if((hcomp == NULL) || (__HAL_COMP_IS_LOCKED(hcomp)))
-  {
-    status = HAL_ERROR;
-  }
-  else
-  {
-    /* Check the parameters */
-    assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
-    assert_param(IS_COMP_INPUT_PLUS(hcomp->Instance, hcomp->Init.NonInvertingInput));
-    assert_param(IS_COMP_INPUT_MINUS(hcomp->Instance, hcomp->Init.InvertingInput));
-    assert_param(IS_COMP_OUTPUTPOL(hcomp->Init.OutputPol));
-    assert_param(IS_COMP_POWERMODE(hcomp->Init.Mode));
-    assert_param(IS_COMP_TRIGGERMODE(hcomp->Init.TriggerMode));
-    assert_param(IS_COMP_WINDOWMODE(hcomp->Init.WindowMode));
-    
-    if(hcomp->State == HAL_COMP_STATE_RESET)
-    {
-      /* Allocate lock resource and initialize it */
-      hcomp->Lock = HAL_UNLOCKED;
-      
-      /* Init SYSCFG and the low level hardware to access comparators */
-      /* Note: HAL_COMP_Init() calls __HAL_RCC_SYSCFG_CLK_ENABLE()            */
-      /*       to enable internal control clock of the comparators.           */
-      /*       However, this is a legacy strategy. In future STM32 families,  */
-      /*       COMP clock enable must be implemented by user                  */
-      /*       in "HAL_COMP_MspInit()".                                       */
-      /*       Therefore, for compatibility anticipation, it is recommended   */
-      /*       to implement __HAL_RCC_SYSCFG_CLK_ENABLE()                     */
-      /*       in "HAL_COMP_MspInit()".                                       */
-      __HAL_RCC_SYSCFG_CLK_ENABLE();
-      
-      /* Init the low level hardware */
-      HAL_COMP_MspInit(hcomp);
-    }
-    
-    /* Set COMP parameters */
-    tmp_csr = (hcomp->Init.InvertingInput   |
-               hcomp->Init.OutputPol         );
-    
-    /* Configuration specific to comparator instance: COMP2 */
-    if ((hcomp->Instance) == COMP2)
-    {
-      /* Comparator input plus configuration is available on COMP2 only */
-      /* Comparator power mode configuration is available on COMP2 only */
-      tmp_csr |= (hcomp->Init.NonInvertingInput |
-                  hcomp->Init.Mode               );
-      
-      /* COMP2 specificity: when using VrefInt or subdivision of VrefInt,     */
-      /* specific path must be enabled.                                       */
-      if((hcomp->Init.InvertingInput == COMP_INPUT_MINUS_VREFINT)    ||
-         (hcomp->Init.InvertingInput == COMP_INPUT_MINUS_1_4VREFINT) ||
-         (hcomp->Init.InvertingInput == COMP_INPUT_MINUS_1_2VREFINT) ||
-         (hcomp->Init.InvertingInput == COMP_INPUT_MINUS_3_4VREFINT)   )
-      {
-        /* Memorize voltage scaler state before initialization */
-        comp_voltage_scaler_not_initialized = (READ_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP) == 0U);
-        
-        SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP  );
-        
-        /* Delay for COMP scaler bridge voltage stabilization */
-        /* Apply the delay if voltage scaler bridge is enabled for the first time */
-        if (comp_voltage_scaler_not_initialized != 0U)
-        {
-          /* Wait loop initialization and execution */
-          /* Note: Variable divided by 2 to compensate partially              */
-          /*       CPU processing cycles.                                     */
-          wait_loop_index = (COMP_DELAY_VOLTAGE_SCALER_STAB_US * (SystemCoreClock / (1000000U * 2U)));
-          while(wait_loop_index != 0U)
-          {
-            wait_loop_index--;
-          }
-        }
-      }
-    }
-    
-    /* Set comparator output connection to LPTIM */
-    if (hcomp->Init.LPTIMConnection != COMP_LPTIMCONNECTION_DISABLED)
-    {
-      /* LPTIM connexion requested on COMP1 */
-      if ((hcomp->Instance) == COMP1)
-      {
-        /* Note : COMP1 can be connected to the input 1 of LPTIM if requested */
-        assert_param(IS_COMP1_LPTIMCONNECTION(hcomp->Init.LPTIMConnection));
-        
-        /* Note: Compatibility with previous driver version using             */
-        /* generic literal COMP_LPTIMCONNECTION_ENABLED corresponding         */
-        /* to LPTIM input 1 for COMP1.                                        */
-          tmp_csr |= (COMP_CSR_COMP1LPTIM1IN1);
-        }
-      else
-      {
-        /* Note : COMP2 can be connected to input 1 or input 2 of LPTIM if requested */
-        assert_param(IS_COMP2_LPTIMCONNECTION(hcomp->Init.LPTIMConnection));
-        
-        switch (hcomp->Init.LPTIMConnection)
-        {
-        case  COMP_LPTIMCONNECTION_IN1_ENABLED :
-          tmp_csr |= (COMP_CSR_COMP2LPTIM1IN1);
-          break;
-        case  COMP_LPTIMCONNECTION_IN2_ENABLED :
-        default :
-          /* Note: Default case for compatibility with previous driver version*/
-          /* using generic literal COMP_LPTIMCONNECTION_ENABLED corresponding */
-          /* to LPTIM input 2 for COMP2.                                      */
-          
-          /* Check the MCU_ID in order to allow or not the COMP2 connection to LPTIM input 2 */
-          if (((HAL_GetDEVID() == C_DEV_ID_L073) && (HAL_GetREVID() == C_REV_ID_A))
-                            ||
-              ((HAL_GetDEVID() == C_DEV_ID_L053) && (HAL_GetREVID() == C_REV_ID_A))
-                            ||
-              ((HAL_GetDEVID() == C_DEV_ID_L053) && (HAL_GetREVID() == C_REV_ID_Z)))
-          {
-            assert_param(IS_COMP2_LPTIMCONNECTION_RESTRICTED(hcomp->Init.LPTIMConnection));
-            
-            /* Error: On the selected device, COMP2 cannot be connected to LPTIM input 2 */
-            status = HAL_ERROR;
-          }
-          else
-          {
-            tmp_csr |= (COMP_CSR_COMP2LPTIM1IN2);
-          }
-          break;
-        }
-      }
-    }
-    
-    /* Update comparator register */
-    if ((hcomp->Instance) == COMP1)
-    {
-      MODIFY_REG(hcomp->Instance->CSR,
-                 COMP_CSR_COMP1INNSEL     | COMP_CSR_COMP1WM       |
-                 COMP_CSR_COMP1LPTIM1IN1  | COMP_CSR_COMP1POLARITY  ,
-                 tmp_csr
-                );
-    }
-    else /* Instance == COMP2 */
-    {
-      MODIFY_REG(hcomp->Instance->CSR,
-                 COMP_CSR_COMP2SPEED     | COMP_CSR_COMP2INNSEL    |
-                 COMP_CSR_COMP2INPSEL    | COMP_CSR_COMP2POLARITY  |
-                 COMP_CSR_COMP2LPTIM1IN2 | COMP_CSR_COMP2LPTIM1IN1  ,
-                 tmp_csr
-                );
-    }
-    
-    /* Set window mode */
-    /* Note: Window mode bit is located into 1 out of the 2 pairs of COMP     */
-    /*       instances. Therefore, this function can update another COMP      */
-    /*       instance that the one currently selected.                        */
-    if(hcomp->Init.WindowMode == COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON)
-    {
-      SET_BIT(COMP12_COMMON->CSR, COMP_CSR_WINMODE);
-    }
-    else
-    {
-      CLEAR_BIT(COMP12_COMMON->CSR, COMP_CSR_WINMODE);
-    }
-    
-    /* Get the EXTI line corresponding to the selected COMP instance */
-    exti_line = COMP_GET_EXTI_LINE(hcomp->Instance);
-    
-    /* Manage EXTI settings */
-    if((hcomp->Init.TriggerMode & (COMP_EXTI_IT | COMP_EXTI_EVENT)) != RESET)
-    {
-      /* Configure EXTI rising edge */
-      if((hcomp->Init.TriggerMode & COMP_EXTI_RISING) != RESET)
-      {
-        SET_BIT(EXTI->RTSR, exti_line);
-      }
-      else
-      {
-        CLEAR_BIT(EXTI->RTSR, exti_line);
-      }
-      
-      /* Configure EXTI falling edge */
-      if((hcomp->Init.TriggerMode & COMP_EXTI_FALLING) != RESET)
-      {
-        SET_BIT(EXTI->FTSR, exti_line);
-      }
-      else
-      {
-        CLEAR_BIT(EXTI->FTSR, exti_line);
-      }
-      
-      /* Clear COMP EXTI pending bit (if any) */
-      WRITE_REG(EXTI->PR, exti_line);
-      
-      /* Configure EXTI event mode */
-      if((hcomp->Init.TriggerMode & COMP_EXTI_EVENT) != RESET)
-      {
-        SET_BIT(EXTI->EMR, exti_line);
-      }
-      else
-      {
-        CLEAR_BIT(EXTI->EMR, exti_line);
-      }
-      
-      /* Configure EXTI interrupt mode */
-      if((hcomp->Init.TriggerMode & COMP_EXTI_IT) != RESET)
-      {
-        SET_BIT(EXTI->IMR, exti_line);
-      }
-      else
-      {
-        CLEAR_BIT(EXTI->IMR, exti_line);
-      }
-    }
-    else
-    {
-      /* Disable EXTI event mode */
-      CLEAR_BIT(EXTI->EMR, exti_line);
-      
-      /* Disable EXTI interrupt mode */
-      CLEAR_BIT(EXTI->IMR, exti_line);
-    }
-    
-    /* Set HAL COMP handle state */
-    /* Note: Transition from state reset to state ready,                      */
-    /*       otherwise (coming from state ready or busy) no state update.     */
-    if (hcomp->State == HAL_COMP_STATE_RESET)
-    {
-      hcomp->State = HAL_COMP_STATE_READY;
-    }
-  }
-  
-  return status;
-}
-
-/**
-  * @brief  DeInitialize the COMP peripheral.
-  * @note   Deinitialization cannot be performed if the COMP configuration is locked.
-  *         To unlock the configuration, perform a system reset.
-  * @param  hcomp  COMP handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_COMP_DeInit(COMP_HandleTypeDef *hcomp)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  
-  /* Check the COMP handle allocation and lock status */
-  if((hcomp == NULL) || (__HAL_COMP_IS_LOCKED(hcomp)))
-  {
-    status = HAL_ERROR;
-  }
-  else
-  {
-    /* Check the parameter */
-    assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
-    
-    /* Set COMP_CSR register to reset value */
-    WRITE_REG(hcomp->Instance->CSR, 0x00000000U);
-    
-    /* DeInit the low level hardware: SYSCFG, GPIO, CLOCK and NVIC */
-    HAL_COMP_MspDeInit(hcomp);
-    
-    /* Set HAL COMP handle state */
-    hcomp->State = HAL_COMP_STATE_RESET;
-    
-    /* Release Lock */
-    __HAL_UNLOCK(hcomp);
-  }
-  
-  return status;
-}
-
-/**
-  * @brief  Initialize the COMP MSP.
-  * @param  hcomp  COMP handle
-  * @retval None
-  */
-__weak void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcomp);
-  
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_COMP_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitialize the COMP MSP.
-  * @param  hcomp  COMP handle
-  * @retval None
-  */
-__weak void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcomp);
-  
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_COMP_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup COMP_Exported_Functions_Group2 Start-Stop operation functions 
- *  @brief   Start-Stop operation functions. 
- *
-@verbatim   
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Start a comparator instance.
-      (+) Stop a comparator instance.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Start the comparator.
-  * @param  hcomp  COMP handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp)
-{
-  __IO uint32_t wait_loop_index = 0U;
-  HAL_StatusTypeDef status = HAL_OK;
-  
-  /* Check the COMP handle allocation and lock status */
-  if((hcomp == NULL) || (__HAL_COMP_IS_LOCKED(hcomp)))
-  {
-    status = HAL_ERROR;
-  }
-  else
-  {
-    /* Check the parameter */
-    assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
-
-    if(hcomp->State == HAL_COMP_STATE_READY)
-    {
-      /* Enable the selected comparator */
-      SET_BIT(hcomp->Instance->CSR, COMP_CSR_COMPxEN);
-      
-      /* Set HAL COMP handle state */
-      hcomp->State = HAL_COMP_STATE_BUSY;
-      
-      /* Delay for COMP startup time */
-      /* Wait loop initialization and execution */
-      /* Note: Variable divided by 2 to compensate partially                  */
-      /*       CPU processing cycles.                                         */
-      wait_loop_index = (COMP_DELAY_STARTUP_US * (SystemCoreClock / (1000000U * 2U)));
-      while(wait_loop_index != 0U)
-      {
-        wait_loop_index--;
-      }
-    }
-    else
-    {
-      status = HAL_ERROR;
-    }
-  }
-
-  return status;
-}
-
-/**
-  * @brief  Stop the comparator.
-  * @param  hcomp  COMP handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  
-  /* Check the COMP handle allocation and lock status */
-  if((hcomp == NULL) || (__HAL_COMP_IS_LOCKED(hcomp)))
-  {
-    status = HAL_ERROR;
-  }
-  else
-  {
-    /* Check the parameter */
-    assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
-    
-    if((hcomp->State == HAL_COMP_STATE_BUSY)  ||
-       (hcomp->State == HAL_COMP_STATE_READY)   )
-    {
-      /* Disable the selected comparator */
-      CLEAR_BIT(hcomp->Instance->CSR, COMP_CSR_COMPxEN);
-
-      /* Set HAL COMP handle state */
-      hcomp->State = HAL_COMP_STATE_READY;
-    }
-    else
-    {
-      status = HAL_ERROR;
-    }
-  }
-  
-  return status;
-}
-
-/**
-  * @brief  Comparator IRQ handler.
-  * @param  hcomp  COMP handle
-  * @retval None
-  */
-void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp)
-{
-  /* Get the EXTI line corresponding to the selected COMP instance */
-  uint32_t exti_line = COMP_GET_EXTI_LINE(hcomp->Instance);
-  
-  /* Check COMP EXTI flag */
-  if(READ_BIT(EXTI->PR, exti_line) != RESET)
-  {
-    /* Check whether comparator is in independent or window mode */
-    if(READ_BIT(COMP12_COMMON->CSR, COMP_CSR_WINMODE) != 0)
-    {
-      /* Clear COMP EXTI line pending bit of the pair of comparators          */
-      /* in window mode.                                                      */
-      /* Note: Pair of comparators in window mode can both trig IRQ when      */
-      /*       input voltage is changing from "out of window" area            */
-      /*       (low or high ) to the other "out of window" area (high or low).*/
-      /*       Both flags must be cleared to call comparator trigger          */
-      /*       callback is called once.                                       */
-      WRITE_REG(EXTI->PR, (COMP_EXTI_LINE_COMP1 | COMP_EXTI_LINE_COMP2));
-    }
-    else
-    {
-      /* Clear COMP EXTI line pending bit */
-      WRITE_REG(EXTI->PR, exti_line);
-    }
-    
-    /* COMP trigger user callback */
-    HAL_COMP_TriggerCallback(hcomp);
-  }
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup COMP_Exported_Functions_Group3 Peripheral Control functions 
- *  @brief   Management functions.
- *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral Control functions #####
- ===============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to control the comparators. 
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Lock the selected comparator configuration.
-  * @note   A system reset is required to unlock the comparator configuration.
-  * @note   Locking the comparator from reset state is possible
-  *         if __HAL_RCC_SYSCFG_CLK_ENABLE() is being called before.
-  * @param  hcomp  COMP handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  
-  /* Check the COMP handle allocation and lock status */
-  if((hcomp == NULL) || (__HAL_COMP_IS_LOCKED(hcomp)))
-  {
-    status = HAL_ERROR;
-  }
-  else
-  {
-    /* Check the parameter */
-    assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
-    
-    /* Set HAL COMP handle state */
-    hcomp->State = ((HAL_COMP_StateTypeDef)(hcomp->State | COMP_STATE_BITFIELD_LOCK));
-  }
-  
-  if(status == HAL_OK)
-  {
-    /* Set the lock bit corresponding to selected comparator */
-    __HAL_COMP_LOCK(hcomp);
-  }
-  
-  return status; 
-}
-
-/**
-  * @brief  Return the output level (high or low) of the selected comparator. 
-  *         The output level depends on the selected polarity.
-  *         If the polarity is not inverted:
-  *           - Comparator output is low when the input plus is at a lower
-  *             voltage than the input minus
-  *           - Comparator output is high when the input plus is at a higher
-  *             voltage than the input minus
-  *         If the polarity is inverted:
-  *           - Comparator output is high when the input plus is at a lower
-  *             voltage than the input minus
-  *           - Comparator output is low when the input plus is at a higher
-  *             voltage than the input minus
-  * @param  hcomp  COMP handle
-  * @retval Returns the selected comparator output level: 
-  *         @arg @ref COMP_OUTPUT_LEVEL_LOW
-  *         @arg @ref COMP_OUTPUT_LEVEL_HIGH
-  *       
-  */
-uint32_t HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp)
-{
-  /* Check the parameter */
-  assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
-  
-  return (uint32_t)(READ_BIT(hcomp->Instance->CSR, COMP_CSR_COMPxOUTVALUE)
-                    >> COMP_OUTPUT_LEVEL_BITOFFSET_POS);
-}
-
-/**
-  * @brief  Comparator callback.
-  * @param  hcomp  COMP handle
-  * @retval None
-  */
-__weak void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcomp);
-  
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_COMP_TriggerCallback should be implemented in the user file
-   */
-}
-
-
-/**
-  * @}
-  */
-
-/** @defgroup COMP_Exported_Functions_Group4 Peripheral State functions 
- *  @brief   Peripheral State functions. 
- *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral State functions #####
- ===============================================================================  
-    [..]
-    This subsection permit to get in run-time the status of the peripheral.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the COMP handle state.
-  * @param  hcomp  COMP handle
-  * @retval HAL state
-  */
-HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp)
-{
-  /* Check the COMP handle allocation */
-  if(hcomp == NULL)
-  {
-    return HAL_COMP_STATE_RESET;
-  }
-
-  /* Check the parameter */
-  assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
-
-  /* Return HAL COMP handle state */
-  return hcomp->State;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_COMP_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp_ex.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp_ex.c
deleted file mode 100755
index eb966bf4..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp_ex.c
+++ /dev/null
@@ -1,149 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_comp_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended COMP HAL module driver.
-  * @brief   This file provides firmware functions to manage voltage reference
-  *          VrefInt that must be specifically controled for comparator
-  *          instance COMP2.
-  @verbatim 
-  ==============================================================================
-               ##### COMP peripheral Extended features  #####
-  ==============================================================================
-
-  [..] Comparing to other previous devices, the COMP interface for STM32L0XX
-       devices contains the following additional features
-
-       (+) Possibility to enable or disable the VREFINT which is used as input
-           to the comparator.
-
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_COMP_MODULE_ENABLED
-
-/** @addtogroup COMPEx
-  * @brief Extended COMP HAL module driver
-  * @{
-  */
-
-/* Private define ------------------------------------------------------------*/
-/** @addtogroup COMP_Private_Constants
-  * @{
-  */
-
-/* Delay for COMP voltage scaler stabilization time (voltage from VrefInt,    */
-/* delay based on VrefInt startup time).                                      */
-/* Literal set to maximum value (refer to device datasheet,                   */
-/* parameter "TVREFINT").                                                     */
-/* Unit: us                                                                   */
-#define COMP_DELAY_VOLTAGE_SCALER_STAB_US ((uint32_t)3000U)  /*!< Delay for COMP voltage scaler stabilization time */
-
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup COMPEx_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup COMPEx_Exported_Functions_Group1
-  * @brief  Extended functions to manage VREFINT for the comparator
-  *
-  * @{
-  */
-
-/**
-  * @brief  Enable Vrefint and path to comparator, used by comparator
-  *         instance COMP2 input based on VrefInt or subdivision of VrefInt.
-  * @note   The equivalent of this function is managed automatically when
-  *         using function "HAL_COMP_Init()".
-  * @note   VrefInt requires a startup time
-  *         (refer to device datasheet, parameter "TVREFINT").
-  *         This function waits for the startup time
-  *         (alternative solution: poll for bit SYSCFG_CFGR3_VREFINT_RDYF set).
-  * @retval None
-  */
-void HAL_COMPEx_EnableVREFINT(void)
-{
-  __IO uint32_t wait_loop_index = 0U;
-  
-  /* Enable the Buffer for the COMP by setting ENBUFLP_VREFINT_COMP bit in the CFGR3 register */
-  SYSCFG->CFGR3 |= (SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP);
-  
-  /* Wait loop initialization and execution */
-  /* Note: Variable divided by 2 to compensate partially              */
-  /*       CPU processing cycles.                                     */
-  wait_loop_index = (COMP_DELAY_VOLTAGE_SCALER_STAB_US * (SystemCoreClock / (1000000U * 2U)));
-  while(wait_loop_index != 0U)
-  {
-    wait_loop_index--;
-  }
-}
-
-/**
-  * @brief  Disable Vrefint and path to comparator, used by comparator
-  *         instance COMP2 input based on VrefInt or subdivision of VrefInt.
-  * @retval None
-  */
-void HAL_COMPEx_DisableVREFINT(void)
-{
-  /* Disable the Vrefint by resetting ENBUFLP_VREFINT_COMP bit in the CFGR3 register */
-  SYSCFG->CFGR3 &= (uint32_t)~((uint32_t)(SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP));
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */ 
-
-#endif /* HAL_COMP_MODULE_ENABLED */
-
-/**
-  * @}
-  */ 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c
deleted file mode 100755
index 047d0bc6..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c
+++ /dev/null
@@ -1,396 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_cortex.c
-  * @author  MCD Application Team
-  * @brief   CORTEX HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the CORTEX:
-  *           + Initialization and de-initialization functions
-  *           + Peripheral Control functions 
-  *
-  @verbatim  
-  ==============================================================================
-                        ##### How to use this driver #####
-  ==============================================================================
-
-    [..]  
-    *** How to configure Interrupts using CORTEX HAL driver ***
-    ===========================================================
-    [..]     
-    This section provide functions allowing to configure the NVIC interrupts (IRQ).
-    The Cortex-M0+ exceptions are managed by CMSIS functions.
-      (#) Enable and Configure the priority of the selected IRQ Channels. 
-             The priority can be 0..3. 
-
-        -@- Lower priority values gives higher priority.
-        -@- Priority Order:
-            (#@) Lowest priority.
-            (#@) Lowest hardware priority (IRQn position).  
-    
-     (#)  Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority() 
-
-     (#)  Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ() 
-      
-    [..]  
-    *** How to configure Systick using CORTEX HAL driver ***
-    ========================================================
-    [..]
-    Setup SysTick Timer for time base 
-           
-   (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which
-       is a CMSIS function that:
-        (++) Configures the SysTick Reload register with value passed as function parameter.
-        (++) Configures the SysTick IRQ priority to the lowest value (0x03).
-        (++) Resets the SysTick Counter register.
-        (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
-        (++) Enables the SysTick Interrupt.
-        (++) Starts the SysTick Counter.
-	
-   (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the function
-       HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
-       HAL_SYSTICK_Config() function call. The HAL_SYSTICK_CLKSourceConfig() function is defined
-       inside the stm32l0xx_hal_cortex.c file.
-
-   (+) You can change the SysTick IRQ priority by calling the
-       HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function 
-       call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
-
-   (+) To adjust the SysTick time base, use the following formula:
-                            
-       Reload Value = SysTick Counter Clock (Hz) x  Desired Time base (s)
-       (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
-       (++) Reload Value should not exceed 0xFFFFFF
-   
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-
-/** @addtogroup CORTEX
-  * @brief CORTEX HAL module driver
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/** @addtogroup CORTEX_Exported_Functions
-  * @{
-  */
-
-
-/** @addtogroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions 
- *  @brief    Initialization and Configuration functions 
- *
-@verbatim    
-  ==============================================================================
-              ##### Initialization and de-initialization functions #####
-  ==============================================================================
-    [..]
-      This section provides the CORTEX HAL driver functions allowing to configure Interrupts
-      Systick functionalities 
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Sets the priority of an interrupt.
-  * @param  IRQn: External interrupt number .
-  *         This parameter can be an enumerator of  IRQn_Type enumeration
-  *         (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)
-  * @param  PreemptPriority: The pre-emption priority for the IRQn channel.
-  *         This parameter can be a value between 0 and 3.
-  *         A lower priority value indicates a higher priority 
-  * @param  SubPriority: The subpriority level for the IRQ channel.
-  *         with stm32l0xx devices, this parameter is a dummy value and it is ignored, because 
-  *         no subpriority supported in Cortex M0+ based products.   
-  * @retval None
-  */
-void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
-{ 
-    /* Check the parameters */
-  assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
-  NVIC_SetPriority(IRQn,PreemptPriority);
-}
-
-/**
-  * @brief  Enables a device specific interrupt in the NVIC interrupt controller.
-  * @note   To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
-  *         function should be called before. 
-  * @param  IRQn External interrupt number .
-  *         This parameter can be an enumerator of  IRQn_Type enumeration
-  *         (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)  
-  * @retval None
-  */
-void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  /* Check the parameters */
-  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
-  
-  /* Enable interrupt */
-  NVIC_EnableIRQ(IRQn);
-}
-
-/**
-  * @brief  Disables a device specific interrupt in the NVIC interrupt controller.
-  * @param  IRQn External interrupt number .
-  *         This parameter can be an enumerator of IRQn_Type enumeration
-  *         (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)  
-  * @retval None
-  */
-void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-    /* Check the parameters */
-  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
-  
-  /* Disable interrupt */
-  NVIC_DisableIRQ(IRQn);
-}
-
-/**
-  * @brief  Initiates a system reset request to reset the MCU.
-  * @retval None
-  */
-void HAL_NVIC_SystemReset(void)
-{
-  /* System Reset */
-  NVIC_SystemReset();
-}
-
-/**
-  * @brief  Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-  *         Counter is in free running mode to generate periodic interrupts.
-  * @param  TicksNumb: Specifies the ticks Number of ticks between two interrupts.
-  * @retval status:  - 0  Function succeeded.
-  *                  - 1  Function failed.
-  */
-uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
-{
-   return SysTick_Config(TicksNumb);
-}
-/**
-  * @}
-  */
-
-/** @addtogroup CORTEX_Exported_Functions_Group2 Peripheral Control functions 
- *  @brief   Cortex control functions 
- *
-@verbatim   
-  ==============================================================================
-                      ##### Peripheral Control functions #####
-  ==============================================================================  
-    [..]
-      This subsection provides a set of functions allowing to control the CORTEX
-      (NVIC, SYSTICK) functionalities. 
- 
-      
-@endverbatim
-  * @{
-  */
-
-
-/**
-  * @brief  Gets the priority of an interrupt.
-  * @param  IRQn: External interrupt number.
-  *         This parameter can be an enumerator of IRQn_Type enumeration
-  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l0xxxx.h))
-  * @retval None
-  */
-uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn)
-{
-  /* Get priority for Cortex-M system or device specific interrupts */
-  return NVIC_GetPriority(IRQn);
-}
-
-/**
-  * @brief  Sets Pending bit of an external interrupt.
-  * @param  IRQn: External interrupt number
-  *         This parameter can be an enumerator of IRQn_Type enumeration
-  *         (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)  
-  * @retval None
-  */
-void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{ 
-  /* Set interrupt pending */
-  NVIC_SetPendingIRQ(IRQn);
-}
-
-/**
-  * @brief  Gets Pending Interrupt (reads the pending register in the NVIC 
-  *         and returns the pending bit for the specified interrupt).
-  * @param  IRQn: External interrupt number .
-  *          This parameter can be an enumerator of  IRQn_Type enumeration
-  *          (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)  
-  * @retval status: - 0  Interrupt status is not pending.
-  *                 - 1  Interrupt status is pending.
-  */
-uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{ 
-  /* Return 1 if pending else 0 */
-  return NVIC_GetPendingIRQ(IRQn);
-}
-
-/**
-  * @brief  Clears the pending bit of an external interrupt.
-  * @param  IRQn: External interrupt number .
-  *         This parameter can be an enumerator of IRQn_Type enumeration
-  *         (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)  
-  * @retval None
-  */
-void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{ 
-  /* Clear pending interrupt */
-  NVIC_ClearPendingIRQ(IRQn);
-}
-
-
-/**
-  * @brief  Configures the SysTick clock source.
-  * @param  CLKSource: specifies the SysTick clock source.
-  *          This parameter can be one of the following values:
-  *             @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
-  *             @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
-  * @retval None
-  */
-void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
-{
-  /* Check the parameters */
-  assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
-  if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
-  {
-    SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
-  }
-  else
-  {
-    SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
-  }
-}
-
-/**
-  * @brief  This function handles SYSTICK interrupt request.
-  * @retval None
-  */
-void HAL_SYSTICK_IRQHandler(void)
-{
-  HAL_SYSTICK_Callback();
-}
-
-/**
-  * @brief  SYSTICK callback.
-  * @retval None
-  */
-__weak void HAL_SYSTICK_Callback(void)
-{
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_SYSTICK_Callback could be implemented in the user file
-   */
-}
-
-#if (__MPU_PRESENT == 1)
-/**
-  * @brief  Initialize and configure the Region and the memory to be protected.
-  * @param  MPU_Init: Pointer to a MPU_Region_InitTypeDef structure that contains
-  *                the initialization and configuration information.
-  * @retval None
-  */
-void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
-{
-  /* Check the parameters */
-  assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number));
-  assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable));
-
-  /* Set the Region number */
-  MPU->RNR = MPU_Init->Number;
-
-  if ((MPU_Init->Enable) == MPU_REGION_ENABLE)
-  {
-    /* Check the parameters */
-    assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec));
-    assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission));
-    assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable));
-    assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable));
-    assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
-    assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
-    assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));
-
-    /* Set the base adsress and set the 4 LSB to 0 */
-    MPU->RBAR = (MPU_Init->BaseAddress) & 0xfffffff0U;
-
-    /* Fill the field RASR */
-    MPU->RASR = ((uint32_t)MPU_Init->DisableExec        << MPU_RASR_XN_Pos)   |
-                ((uint32_t)MPU_Init->AccessPermission   << MPU_RASR_AP_Pos)   |
-                ((uint32_t)MPU_Init->IsShareable        << MPU_RASR_S_Pos)    |
-                ((uint32_t)MPU_Init->IsCacheable        << MPU_RASR_C_Pos)    |
-                ((uint32_t)MPU_Init->IsBufferable       << MPU_RASR_B_Pos)    |
-                ((uint32_t)MPU_Init->SubRegionDisable   << MPU_RASR_SRD_Pos)  |
-                ((uint32_t)MPU_Init->Size               << MPU_RASR_SIZE_Pos) |
-                ((uint32_t)MPU_Init->Enable             << MPU_RASR_ENABLE_Pos);
-  }
-  else
-  {
-    MPU->RBAR = 0x00U;
-    MPU->RASR = 0x00U;
-  }
-}
-#endif /* __MPU_PRESENT */
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc.c
deleted file mode 100755
index e43a4231..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc.c
+++ /dev/null
@@ -1,550 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_crc.c
-  * @author  MCD Application Team
-  * @brief   CRC HAL module driver.
-  *    
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the CRC peripheral:
-  *           + Initialization and de-initialization functions
-  *           + Peripheral Control functions 
-  *           + Peripheral State functions
-  *         
-  @verbatim
- ===============================================================================
-                     ##### CRC How to use this driver #####
- ===============================================================================
-    [..]
-
-    (#) Enable CRC AHB clock using __HAL_RCC_CRC_CLK_ENABLE();
-
-    (#) Initialize CRC calculator
-         (++) specify generating polynomial (IP default or non-default one)
-         (++) specify initialization value (IP default or non-default one)
-         (++) specify input data format
-         (++) specify input or output data inversion mode if any
-
-    (#) Use HAL_CRC_Accumulate() function to compute the CRC value of the 
-        input data buffer starting with the previously computed CRC as 
-        initialization value
-
-    (#) Use HAL_CRC_Calculate() function to compute the CRC value of the 
-        input data buffer starting with the defined initialization value 
-        (default or non-default) to initiate CRC calculation
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-
-/** @addtogroup CRC
-  * @brief CRC HAL module driver
-  * @{
-  */
-
-/** @addtogroup CRC_Private
-  * @{
-  */
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength);
-static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup CRC_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup CRC_Exported_Functions_Group1
- *  @brief    Initialization and Configuration functions. 
- *
-@verbatim    
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  
-      This section provides functions allowing to:
-
-      (#) Initialize the CRC according to the specified parameters 
-          in the CRC_InitTypeDef and create the associated handle
-
-      (#) DeInitialize the CRC peripheral
-
-      (#) Initialize the CRC MSP
-
-      (#) DeInitialize CRC MSP 
- 
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the CRC according to the specified
-  *         parameters in the CRC_InitTypeDef and creates the associated handle.
-  * @param  hcrc: CRC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
-{
-  /* Check the CRC handle allocation */
-  if(hcrc == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
-   
-  if(hcrc->State == HAL_CRC_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hcrc->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware */
-    HAL_CRC_MspInit(hcrc);
-  }
-  
-  /* Change CRC peripheral state */
-  hcrc->State = HAL_CRC_STATE_BUSY;
-  
-  /* check whether or not non-default generating polynomial has been 
-   * picked up by user */
-  assert_param(IS_DEFAULT_POLYNOMIAL(hcrc->Init.DefaultPolynomialUse)); 
-  if (hcrc->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_ENABLE)
-  {
-    /* initialize IP with default generating polynomial */
-    WRITE_REG(hcrc->Instance->POL, DEFAULT_CRC32_POLY);  
-    MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, CRC_POLYLENGTH_32B);
-  }
-  else
-  {
-    /* initialize CRC IP with generating polynomial defined by user */
-    assert_param(IS_CRC_POL_LENGTH(hcrc->Init.CRCLength));
-    if (HAL_CRCEx_Polynomial_Set(hcrc, hcrc->Init.GeneratingPolynomial, hcrc->Init.CRCLength) != HAL_OK)
-    {
-      return HAL_ERROR;
-    }
-  }
-  
-  /* check whether or not non-default CRC initial value has been 
-   * picked up by user */
-  assert_param(IS_DEFAULT_INIT_VALUE(hcrc->Init.DefaultInitValueUse));
-  if (hcrc->Init.DefaultInitValueUse == DEFAULT_INIT_VALUE_ENABLE)
-  {
-    WRITE_REG(hcrc->Instance->INIT, DEFAULT_CRC_INITVALUE);  
-  }
-  else
-  {
-    WRITE_REG(hcrc->Instance->INIT, hcrc->Init.InitValue);
-  }
-  
-
-  /* set input data inversion mode */
-  assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(hcrc->Init.InputDataInversionMode)); 
-  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, hcrc->Init.InputDataInversionMode); 
-  
-  /* set output data inversion mode */
-  assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(hcrc->Init.OutputDataInversionMode)); 
-  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, hcrc->Init.OutputDataInversionMode);  
-  
-  /* makes sure the input data format (bytes, halfwords or words stream)
-   * is properly specified by user */
-  assert_param(IS_CRC_INPUTDATA_FORMAT(hcrc->InputDataFormat));
-  
-  /* Change CRC peripheral state */
-  hcrc->State = HAL_CRC_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the CRC peripheral. 
-  * @param  hcrc: CRC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc)
-{ 
-  /* Check the CRC handle allocation */
-  if(hcrc == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
-  
-  /* Check the CRC peripheral state */
-  if(hcrc->State == HAL_CRC_STATE_BUSY)
-  {
-    return HAL_BUSY;
-  }
-  
-  /* Change CRC peripheral state */
-  hcrc->State = HAL_CRC_STATE_BUSY;
-  
-  /* Reset CRC calculation unit */
-  __HAL_CRC_DR_RESET(hcrc);
-  
-  /* Reset IDR register content */
-  CLEAR_BIT(hcrc->Instance->IDR, CRC_IDR_IDR) ;
-
-  /* DeInit the low level hardware */
-  HAL_CRC_MspDeInit(hcrc);
-
-  /* Change CRC peripheral state */
-  hcrc->State = HAL_CRC_STATE_RESET;
-
-  /* Process unlocked */
-  __HAL_UNLOCK(hcrc);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the CRC MSP.
-  * @param  hcrc: CRC handle
-  * @retval None
-  */
-__weak void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcrc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_CRC_MspInit can be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes the CRC MSP.
-  * @param  hcrc: CRC handle
-  * @retval None
-  */
-__weak void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcrc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_CRC_MspDeInit can be implemented in the user file
-   */
-}
-  
-
-/**
-  * @}
-  */
-
-/** @addtogroup CRC_Exported_Functions_Group2
- *  @brief    management functions. 
- *
-@verbatim   
- ===============================================================================
-             ##### Peripheral Control functions #####
- ===============================================================================  
-    [..]  This section provides functions allowing to:
-
-      (#) Compute the 7, 8, 16 or 32-bit CRC value of an 8, 16 or 32-bit data buffer
-          using combination of the previous CRC value and the new one.
-          
-          or
-          
-      (#) Compute the 7, 8, 16 or 32-bit CRC value of an 8, 16 or 32-bit data buffer
-          independently of the previous CRC value.
-
-@endverbatim
-  * @{
-  */
-
-/**                  
-  * @brief  Compute the 7, 8, 16 or 32-bit CRC value of an 8, 16 or 32-bit data buffer
-  *         starting with the previously computed CRC as initialization value.
-  * @param  hcrc: CRC handle
-  * @param  pBuffer: pointer to the input data buffer, exact input data format is
-  *         provided by hcrc->InputDataFormat.  
-  * @param  BufferLength: input data buffer length (number of bytes if pBuffer
-  *         type is * uint8_t, number of half-words if pBuffer type is * uint16_t,
-  *         number of words if pBuffer type is * uint32_t).
-  * @note  By default, the API expects a uint32_t pointer as input buffer parameter.
-  *        Input buffer pointers with other types simply need to be cast in uint32_t
-  *        and the API will internally adjust its input data processing based on the  
-  *        handle field hcrc->InputDataFormat.              
-  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
-  */
-uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
-{
-  uint32_t index = 0U; /* CRC input data buffer index */
-  uint32_t temp = 0U;  /* CRC output (read from hcrc->Instance->DR register) */
-  
-  /* Process locked */
-  __HAL_LOCK(hcrc); 
-    
-  /* Change CRC peripheral state */  
-  hcrc->State = HAL_CRC_STATE_BUSY;
-  
-  switch (hcrc->InputDataFormat)
-  {
-    case CRC_INPUTDATA_FORMAT_WORDS:  
-      /* Enter Data to the CRC calculator */
-      for(index = 0U; index < BufferLength; index++)
-      {
-        hcrc->Instance->DR = pBuffer[index];
-      }
-      temp = hcrc->Instance->DR;
-      break;
-      
-    case CRC_INPUTDATA_FORMAT_BYTES: 
-      temp = CRC_Handle_8(hcrc, (uint8_t*)pBuffer, BufferLength);
-      break;
-      
-    case CRC_INPUTDATA_FORMAT_HALFWORDS: 
-      temp = CRC_Handle_16(hcrc, (uint16_t*)pBuffer, BufferLength);
-      break;
-    default:
-      break;  
-  }
-  
-  /* Change CRC peripheral state */    
-  hcrc->State = HAL_CRC_STATE_READY; 
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hcrc);
-  
-  /* Return the CRC computed value */ 
-  return temp;
-}
-
-
-/**                  
-  * @brief  Compute the 7, 8, 16 or 32-bit CRC value of an 8, 16 or 32-bit data buffer
-  *         starting with hcrc->Instance->INIT as initialization value.
-  * @param  hcrc: CRC handle
-  * @param  pBuffer: pointer to the input data buffer, exact input data format is
-  *         provided by hcrc->InputDataFormat.  
-  * @param  BufferLength: input data buffer length (number of bytes if pBuffer
-  *         type is * uint8_t, number of half-words if pBuffer type is * uint16_t,
-  *         number of words if pBuffer type is * uint32_t).
-  * @note  By default, the API expects a uint32_t pointer as input buffer parameter.
-  *        Input buffer pointers with other types simply need to be cast in uint32_t
-  *        and the API will internally adjust its input data processing based on the  
-  *        handle field hcrc->InputDataFormat. 
-  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
-  */  
-uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
-{
-  uint32_t index = 0U; /* CRC input data buffer index */
-  uint32_t temp = 0U;  /* CRC output (read from hcrc->Instance->DR register) */
-    
-  /* Process locked */
-  __HAL_LOCK(hcrc); 
-  
-  /* Change CRC peripheral state */  
-  hcrc->State = HAL_CRC_STATE_BUSY;
-  
-  /* Reset CRC Calculation Unit (hcrc->Instance->INIT is 
-  *  written in hcrc->Instance->DR) */
-  __HAL_CRC_DR_RESET(hcrc);
-  
-  switch (hcrc->InputDataFormat)
-  {
-    case CRC_INPUTDATA_FORMAT_WORDS:  
-      /* Enter 32-bit input data to the CRC calculator */
-      for(index = 0U; index < BufferLength; index++)
-      {
-        hcrc->Instance->DR = pBuffer[index];
-      }
-      temp = hcrc->Instance->DR;
-      break;
-      
-    case CRC_INPUTDATA_FORMAT_BYTES: 
-      /* Specific 8-bit input data handling  */
-      temp = CRC_Handle_8(hcrc, (uint8_t*)pBuffer, BufferLength);
-      break;
-      
-    case CRC_INPUTDATA_FORMAT_HALFWORDS: 
-      /* Specific 16-bit input data handling  */
-      temp = CRC_Handle_16(hcrc, (uint16_t*)pBuffer, BufferLength);
-      break;
-    default:
-      break;
-  }
-
-  /* Change CRC peripheral state */    
-  hcrc->State = HAL_CRC_STATE_READY; 
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hcrc);
-  
-  /* Return the CRC computed value */ 
-  return temp;
-}
-
-
-
-/**
-  * @}
-  */
-
-/** @addtogroup CRC_Exported_Functions_Group3
- *  @brief    Peripheral State functions.
- *
-@verbatim
- ===============================================================================
-                      ##### Peripheral State functions #####
- ===============================================================================
-    [..]
-    This subsection permits to get in run-time the status of the peripheral.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Returns the CRC state.
-  * @param  hcrc: CRC handle
-  * @retval HAL state
-  */
-HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc)
-{
-  return hcrc->State;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup CRC_Private
-  * @{
-  */
-/**             
-  * @brief  Enter 8-bit input data to the CRC calculator.
-  *         Specific data handling to optimize processing time.  
-  * @param  hcrc: CRC handle
-  * @param  pBuffer: pointer to the input data buffer
-  * @param  BufferLength: input data buffer length
-  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
-  */
-static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength)
-{
- uint32_t i = 0U; /* input data buffer index */
-  
-   /* Processing time optimization: 4 bytes are entered in a row with a single word write,
-    * last bytes must be carefully fed to the CRC calculator to ensure a correct type
-    * handling by the IP */
-   for(i = 0U; i < (BufferLength/4U); i++)
-   {
-      hcrc->Instance->DR = ((uint32_t)pBuffer[4U*i]<<24U) | ((uint32_t)pBuffer[4U*i+1U]<<16U) | ((uint32_t)pBuffer[4U*i+2U]<<8U) | (uint32_t)pBuffer[4U*i+3U];
-   }
-   /* last bytes specific handling */
-   if ((BufferLength%4U) != 0U)
-   {
-     if  (BufferLength%4U == 1U)
-     {
-       *(uint8_t volatile*) (&hcrc->Instance->DR) = pBuffer[4U*i];
-     }
-     if  (BufferLength%4U == 2U)
-     {
-       *(uint16_t volatile*) (&hcrc->Instance->DR) = ((uint32_t)pBuffer[4U*i]<<8U) | (uint32_t)pBuffer[4U*i+1U];
-     }
-     if  (BufferLength%4U == 3U)
-     {
-       *(uint16_t volatile*) (&hcrc->Instance->DR) = ((uint32_t)pBuffer[4U*i]<<8U) | (uint32_t)pBuffer[4U*i+1U];
-       *(uint8_t volatile*) (&hcrc->Instance->DR) = pBuffer[4U*i+2U];
-     }
-   }
-  
-  /* Return the CRC computed value */ 
-  return hcrc->Instance->DR;
-}
-
-/**             
-  * @brief  Enter 16-bit input data to the CRC calculator.
-  *         Specific data handling to optimize processing time.  
-  * @param  hcrc: CRC handle
-  * @param  pBuffer: pointer to the input data buffer
-  * @param  BufferLength: input data buffer length
-  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
-  */  
-static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength)
-{
-   uint32_t i = 0U;  /* input data buffer index */
-  
-  /* Processing time optimization: 2 HalfWords are entered in a row with a single word write,
-   * in case of odd length, last HalfWord must be carefully fed to the CRC calculator to ensure 
-   * a correct type handling by the IP */
-  for(i = 0U; i < (BufferLength/2U); i++)
-  {
-    hcrc->Instance->DR = ((uint32_t)pBuffer[2U*i]<<16U) | (uint32_t)pBuffer[2U*i+1U];
-  }
-  if ((BufferLength%2U) != 0U)
-  {
-       *(uint16_t volatile*) (&hcrc->Instance->DR) = pBuffer[2U*i];
-  }
-   
-  /* Return the CRC computed value */ 
-  return hcrc->Instance->DR;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc_ex.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc_ex.c
deleted file mode 100755
index 1f291600..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc_ex.c
+++ /dev/null
@@ -1,238 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_crc_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended CRC HAL module driver.
-  *    
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the CRC peripheral:
-  *           + Initialization/de-initialization functions
-  *         
-  @verbatim
-  ==============================================================================
-                    ##### CRC specific features #####
-  ==============================================================================
-  [..] 
-  (#) Polynomial configuration.
-  (#) Input data reverse mode.
-  (#) Output data reverse mode.
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup CRCEx
-  * @brief CRC Extended HAL module driver
-  * @{
-  */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @addtogroup CRCEx_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup CRCEx_Exported_Functions_Group1
- *  @brief    Extended CRC features functions
- *
-@verbatim   
- ===============================================================================
-            ##### CRC Extended features functions #####
- ===============================================================================  
-    [..]
-This subsection provides function allowing to:
-      (+) Set CRC polynomial if different from default one.
- 
-@endverbatim
-  * @{
-  */
-
-
-/**
-  * @brief  Initializes the CRC polynomial if different from default one.
-  * @param  hcrc: CRC handle
-  * @param  Pol: CRC generating polynomial (7, 8, 16 or 32-bit long)
-  *         This parameter is written in normal representation, e.g.
-  *         for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65 
-  *         for a polynomial of degree 16, X^16 + X^12 + X^5 + 1 is written 0x1021     
-  * @param  PolyLength: CRC polynomial length 
-  *         This parameter can be one of the following values:
-  *          @arg CRC_POLYLENGTH_7B: 7-bit long CRC (generating polynomial of degree 7)
-  *          @arg CRC_POLYLENGTH_8B: 8-bit long CRC (generating polynomial of degree 8)
-  *          @arg CRC_POLYLENGTH_16B: 16-bit long CRC (generating polynomial of degree 16)
-  *          @arg CRC_POLYLENGTH_32B: 32-bit long CRC (generating polynomial of degree 32)                
-  * @retval HAL status
-  */                                   
-HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength)
-{
-  uint32_t msb = 31U; /* polynomial degree is 32 at most, so msb is initialized to max value */
-
-  /* Check the parameters */
-  assert_param(IS_CRC_POL_LENGTH(PolyLength));
-  
-  /* check polynomial definition vs polynomial size:
-   * polynomial length must be aligned with polynomial
-   * definition. HAL_ERROR is reported if Pol degree is 
-   * larger than that indicated by PolyLength.
-   * Look for MSB position: msb will contain the degree of
-   *  the second to the largest polynomial member. E.g., for
-   *  X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */
-  while (((Pol & (1U << msb)) == 0) && (msb-- > 0)){}
-
-  switch (PolyLength)
-  {
-    case CRC_POLYLENGTH_7B:
-      if (msb >= HAL_CRC_LENGTH_7B) 
-      {
-        return  HAL_ERROR;
-      }
-      break;
-    case CRC_POLYLENGTH_8B:
-      if (msb >= HAL_CRC_LENGTH_8B)
-      {
-        return  HAL_ERROR;
-      }      
-      break;
-    case CRC_POLYLENGTH_16B:
-      if (msb >= HAL_CRC_LENGTH_16B)
-      {
-        return  HAL_ERROR;
-      }      
-      break;
-    case CRC_POLYLENGTH_32B:
-      /* no polynomial definition vs. polynomial length issue possible */
-      break; 
-    default:
-      break;                  
-  }
-
-  /* set generating polynomial */
-  WRITE_REG(hcrc->Instance->POL, Pol);
-  
-  /* set generating polynomial size */
-  MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength);  
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set the Reverse Input data mode.
-  * @param  hcrc: CRC handle
-  * @param  InputReverseMode: Input Data inversion mode
-  *         This parameter can be one of the following values:
-  *          @arg CRC_INPUTDATA_INVERSION_NONE: no change in bit order (default value)
-  *          @arg CRC_INPUTDATA_INVERSION_BYTE: Byte-wise bit reversal
-  *          @arg CRC_INPUTDATA_INVERSION_HALFWORD: HalfWord-wise bit reversal
-  *          @arg CRC_INPUTDATA_INVERSION_WORD: Word-wise bit reversal              
-  * @retval HAL status
-  */                                   
-HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode)
-{  
-  /* Check the parameters */
-  assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(InputReverseMode));
-  
-  /* Change CRC peripheral state */
-  hcrc->State = HAL_CRC_STATE_BUSY;
-
-  /* set input data inversion mode */
-  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, InputReverseMode);    
-  /* Change CRC peripheral state */
-  hcrc->State = HAL_CRC_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set the Reverse Output data mode.
-  * @param  hcrc: CRC handle
-  * @param  OutputReverseMode: Output Data inversion mode
-  *         This parameter can be one of the following values:
-  *          @arg CRC_OUTPUTDATA_INVERSION_DISABLE: no CRC inversion (default value)
-  *          @arg CRC_OUTPUTDATA_INVERSION_ENABLE: bit-level inversion (e.g for a 8-bit CRC: 0xB5 becomes 0xAD)
-  * @retval HAL status
-  */                                   
-HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode)
-{
-  /* Check the parameters */
-  assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(OutputReverseMode));
-  
-  /* Change CRC peripheral state */
-  hcrc->State = HAL_CRC_STATE_BUSY;
-
-  /* set output data inversion mode */
-  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, OutputReverseMode); 
-      
-  /* Change CRC peripheral state */
-  hcrc->State = HAL_CRC_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-
-
-
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-
-#endif /* HAL_CRC_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp.c
deleted file mode 100755
index 2e23f51b..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp.c
+++ /dev/null
@@ -1,2177 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_cryp.c
-  * @author  MCD Application Team
-  * @brief   CRYP HAL module driver.
-  *    
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Cryptography (CRYP) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + Processing functions by algorithm using polling mode
-  *           + Processing functions by algorithm using interrupt mode
-  *           + Processing functions by algorithm using DMA mode
-  *           + Peripheral State functions
-  *         
-  @verbatim
-  ==============================================================================
-                     ##### How to use this driver #####
-  ==============================================================================
-    [..]
-      The CRYP HAL driver can be used as follows:
-
-      (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
-         (##) Enable the CRYP interface clock using __HAL_RCC_AES_CLK_ENABLE()
-         (##) In case of using interrupts (e.g. HAL_CRYP_AESECB_Encrypt_IT())
-             (+) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
-             (+) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
-             (+) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
-         (##) In case of using DMA to control data transfer (e.g. HAL_CRYP_AESECB_Encrypt_DMA())
-             (+) Enable the DMA1 interface clock using 
-                 (++) __HAL_RCC_DMA1_CLK_ENABLE()
-             (+) Configure and enable two DMA Channels one for managing data transfer from
-                 memory to peripheral (input channel) and another channel for managing data
-                 transfer from peripheral to memory (output channel)
-             (+) Associate the initialized DMA handle to the CRYP DMA handle
-                 using  __HAL_LINKDMA()
-             (+) Configure the priority and enable the NVIC for the transfer complete
-                 interrupt on the two DMA Streams. The output stream should have higher
-                 priority than the input stream.
-                 (++) HAL_NVIC_SetPriority()
-                 (++) HAL_NVIC_EnableIRQ()
-    
-      (#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly:
-         (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit
-         (##) The encryption/decryption key.
-         (##) The initialization vector (counter). It is not used ECB mode.
-    
-      (#)Three processing (encryption/decryption) functions are available:
-         (##) Polling mode: encryption and decryption APIs are blocking functions
-              i.e. they process the data and wait till the processing is finished
-              e.g. HAL_CRYP_AESCBC_Encrypt()
-         (##) Interrupt mode: encryption and decryption APIs are not blocking functions
-              i.e. they process the data under interrupt
-              e.g. HAL_CRYP_AESCBC_Encrypt_IT()
-         (##) DMA mode: encryption and decryption APIs are not blocking functions
-              i.e. the data transfer is ensured by DMA
-              e.g. HAL_CRYP_AESCBC_Encrypt_DMA()
-    
-      (#)When the processing function is called for the first time after HAL_CRYP_Init()
-         the CRYP peripheral is initialized and processes the buffer in input.
-         At second call, the processing function performs an append of the already
-         processed buffer.
-         When a new data block is to be processed, call HAL_CRYP_Init() then the
-         processing function.
-         
-      (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */ 
-
-#if defined (STM32L021xx) || defined (STM32L041xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup CRYP
-  * @brief CRYP HAL module driver.
-  * @{
-  */
-
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-
-/** @addtogroup CRYP_Private CRYP Private
-  * @{
-  */
-
-#define  CRYP_ALGO_CHAIN_MASK         (AES_CR_MODE | AES_CR_CHMOD)
-
-/**
-  * @}
-  */
-
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/** @addtogroup CRYP_Private
-  * @{
-  */
-
-static HAL_StatusTypeDef  CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp);
-static void               CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector);
-static void               CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key);
-static HAL_StatusTypeDef  CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
-static void               CRYP_DMAInCplt(DMA_HandleTypeDef *hdma);
-static void               CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma);
-static void               CRYP_DMAError(DMA_HandleTypeDef *hdma);
-static void               CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
-
-/**
-  * @}
-  */
-
-/* Private functions ---------------------------------------------------------*/
-
-/** @addtogroup CRYP_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions
- *  @brief    Initialization and Configuration functions. 
- *
-@verbatim    
-  ==============================================================================
-              ##### Initialization and de-initialization functions #####
-  ==============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Initialize the CRYP according to the specified parameters 
-          in the CRYP_InitTypeDef and creates the associated handle
-      (+) DeInitialize the CRYP peripheral
-      (+) Initialize the CRYP MSP
-      (+) DeInitialize CRYP MSP 
- 
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the CRYP according to the specified
-  *         parameters in the CRYP_InitTypeDef and creates the associated handle.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
-{ 
-  /* Check the CRYP handle allocation */
-  if(hcryp == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_AES_ALL_INSTANCE(hcryp->Instance));
-  assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType));
-  
-  if(hcryp->State == HAL_CRYP_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hcryp->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware */
-    HAL_CRYP_MspInit(hcryp);
-  }
-  
-  /* Check if AES already enabled */
-  if (HAL_IS_BIT_CLR(hcryp->Instance->CR, AES_CR_EN))
-  {
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;  
-
-    /* Set the data type*/
-    MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE, hcryp->Init.DataType);
-    
-    /* Reset CrypInCount and CrypOutCount */
-    hcryp->CrypInCount = 0U;
-    hcryp->CrypOutCount = 0U;
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_READY;
-    
-    /* Set the default CRYP phase */
-    hcryp->Phase = HAL_CRYP_PHASE_READY;
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* The Datatype selection must be changed if the AES is disabled. Writing these bits while the AES is */
-    /* enabled is forbidden to avoid unpredictable AES behavior.*/
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-
-}
-
-/**
-  * @brief  DeInitializes the CRYP peripheral. 
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
-{
-  /* Check the CRYP handle allocation */
-  if(hcryp == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Change the CRYP state */
-  hcryp->State = HAL_CRYP_STATE_BUSY;
-  
-  /* Set the default CRYP phase */
-  hcryp->Phase = HAL_CRYP_PHASE_READY;
-  
-  /* Reset CrypInCount and CrypOutCount */
-  hcryp->CrypInCount = 0U;
-  hcryp->CrypOutCount = 0U;
-  
-  /* Disable the CRYP Peripheral Clock */
-  __HAL_CRYP_DISABLE(hcryp);
-  
-  /* DeInit the low level hardware: CLOCK, NVIC.*/
-  HAL_CRYP_MspDeInit(hcryp);
-  
-  /* Change the CRYP state */
-  hcryp->State = HAL_CRYP_STATE_RESET;
-  
-  /* Release Lock */
-  __HAL_UNLOCK(hcryp);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the CRYP MSP.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @retval None
-  */
-__weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcryp);
-
-  /* NOTE : This function should not be modified; when the callback is needed, 
-            the HAL_CRYP_MspInit can be implemented in the user file */
-}
-
-/**
-  * @brief  DeInitializes CRYP MSP.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @retval None
-  */
-__weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcryp);
-
-  /* NOTE : This function should not be modified; when the callback is needed, 
-            the HAL_CRYP_MspDeInit can be implemented in the user file */
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup CRYP_Exported_Functions_Group2
- *  @brief   processing functions. 
- *
-@verbatim   
-  ==============================================================================
-                      ##### AES processing functions #####
-  ==============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Encrypt plaintext using AES algorithm in different chaining modes
-      (+) Decrypt cyphertext using AES algorithm in different chaining modes
-    [..]  Three processing functions are available:
-      (+) Polling mode
-      (+) Interrupt mode
-      (+) DMA mode
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES ECB encryption mode
-  *         then encrypt pPlainData. The cypher data are available in pCypherData
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Timeout: Specify Timeout value 
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
-{
-  /* Process Locked */
-  __HAL_LOCK(hcryp);
-
-  /* Check that data aligned on u32 and Size multiple of 16*/
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  /* Check if HAL_CRYP_Init has been called */
-  if(hcryp->State != HAL_CRYP_STATE_RESET)
-  {
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Reset the CHMOD & MODE bits */
-      CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
-      
-      /* Set the CRYP peripheral in AES ECB mode */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
-      
-      /* Enable CRYP */
-      __HAL_CRYP_ENABLE(hcryp);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    
-    /* Write Plain Data and Get Cypher Data */
-    if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_READY;
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hcryp);
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-	
-    /* Return function status */
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES CBC encryption mode
-  *         then encrypt pPlainData. The cypher data are available in pCypherData
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Timeout: Specify Timeout value  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
-{
-  /* Process Locked */
-  __HAL_LOCK(hcryp);
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  /* Check if HAL_CRYP_Init has been called */
-  if(hcryp->State != HAL_CRYP_STATE_RESET)
-  {
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Reset the CHMOD & MODE bits */
-      CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
-      
-      /* Set the CRYP peripheral in AES CBC mode */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
-      
-      /* Set the Initialization Vector */
-      CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-      
-      /* Enable CRYP */
-      __HAL_CRYP_ENABLE(hcryp);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    
-    /* Write Plain Data and Get Cypher Data */
-    if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_READY;
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hcryp);
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES CTR encryption mode
-  *         then encrypt pPlainData. The cypher data are available in pCypherData
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Timeout: Specify Timeout value  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
-{  
-  /* Process Locked */
-  __HAL_LOCK(hcryp);
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  /* Check if HAL_CRYP_Init has been called */
-  if(hcryp->State != HAL_CRYP_STATE_RESET)
-  {
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Reset the CHMOD & MODE bits */
-      CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
-      
-      /* Set the CRYP peripheral in AES CTR mode */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
-      
-      /* Set the Initialization Vector */
-      CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-      
-      /* Enable CRYP */
-      __HAL_CRYP_ENABLE(hcryp);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    
-    /* Write Plain Data and Get Cypher Data */
-    if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_READY;
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hcryp);
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Release Lock */
-    __HAL_UNLOCK(hcryp);
-  
-    /* Return function status */
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES ECB decryption mode
-  *         then decrypted pCypherData. The cypher data are available in pPlainData
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @param  Timeout: Specify Timeout value  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
-{
-  /* Process Locked */
-  __HAL_LOCK(hcryp);
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  /* Check if HAL_CRYP_Init has been called */
-  if(hcryp->State != HAL_CRYP_STATE_RESET)
-  {
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Reset the CHMOD & MODE bits */
-      CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
-      
-      /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
-      
-      /* Enable CRYP */
-      __HAL_CRYP_ENABLE(hcryp);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    
-    /* Write Cypher Data and Get Plain Data */
-    if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_READY;
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hcryp);
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Release Lock */
-    __HAL_UNLOCK(hcryp);
-  
-    /* Return function status */
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES ECB decryption mode
-  *         then decrypted pCypherData. The cypher data are available in pPlainData
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @param  Timeout: Specify Timeout value  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
-{
-  /* Process Locked */
-  __HAL_LOCK(hcryp);
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  /* Check if HAL_CRYP_Init has been called */
-  if(hcryp->State != HAL_CRYP_STATE_RESET)
-  {
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Reset the CHMOD & MODE bits */
-      CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
-      
-      /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
-      
-      /* Set the Initialization Vector */
-      CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-      
-      /* Enable CRYP */
-      __HAL_CRYP_ENABLE(hcryp);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    
-    /* Write Cypher Data and Get Plain Data */
-    if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_READY;
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hcryp);
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Release Lock */
-    __HAL_UNLOCK(hcryp);
-  
-    /* Return function status */
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES CTR decryption mode
-  *         then decrypted pCypherData. The cypher data are available in pPlainData
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @param  Timeout: Specify Timeout value   
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
-{  
-  /* Process Locked */
-  __HAL_LOCK(hcryp);
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  /* Check if initialization phase has already been performed */
-  if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->Phase == HAL_CRYP_PHASE_READY))
-  {
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Set the key */
-    CRYP_SetKey(hcryp, hcryp->Init.pKey);
-    
-    /* Reset the CHMOD & MODE bits */
-    CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
-    
-    /* Set the CRYP peripheral in AES CTR decryption mode */
-    __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
-    
-    /* Set the Initialization Vector */
-    CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-    
-    /* Enable CRYP */
-    __HAL_CRYP_ENABLE(hcryp);
-    
-    /* Set the phase */
-    hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-  }
-  
-  /* Write Cypher Data and Get Plain Data */
-  if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
-  {
-    return HAL_TIMEOUT;
-  }
-  
-  /* Change the CRYP state */
-  hcryp->State = HAL_CRYP_STATE_READY;
-  
-  /* Process Unlocked */
-  __HAL_UNLOCK(hcryp);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES ECB encryption mode using Interrupt.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16 bytes
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
-{
-  uint32_t inputaddr = 0U;
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
-  {
-    /* Process Locked */
-    __HAL_LOCK(hcryp);
-    
-    /* Get the buffer addresses and sizes */
-    hcryp->CrypInCount = Size;
-    hcryp->pCrypInBuffPtr = pPlainData;
-    hcryp->pCrypOutBuffPtr = pCypherData;
-    hcryp->CrypOutCount = Size;
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Reset the CHMOD & MODE bits */
-      CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
-      
-      /* Set the CRYP peripheral in AES ECB mode */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    
-    /* Enable Interrupts */
-    __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
-    
-    /* Enable CRYP */
-    __HAL_CRYP_ENABLE(hcryp);
-    
-    /* Get the last input data adress */
-    inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
-    
-    /* Write the Input block in the Data Input register */
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR  = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    hcryp->pCrypInBuffPtr += 16U;
-    hcryp->CrypInCount -= 16U;
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Release Lock */
-    __HAL_UNLOCK(hcryp);
-  
-    /* Return function status */
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES CBC encryption mode using Interrupt.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16 bytes
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
-{
-  uint32_t inputaddr = 0U;
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
-  {
-    /* Process Locked */
-    __HAL_LOCK(hcryp);
-    
-    /* Get the buffer addresses and sizes */
-    hcryp->CrypInCount = Size;
-    hcryp->pCrypInBuffPtr = pPlainData;
-    hcryp->pCrypOutBuffPtr = pCypherData;
-    hcryp->CrypOutCount = Size;
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Reset the CHMOD & MODE bits */
-      CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
-      
-      /* Set the CRYP peripheral in AES CBC mode */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
-      
-      /* Set the Initialization Vector */
-      CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    
-    /* Enable Interrupts */
-    __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
-    
-    /* Enable CRYP */
-    __HAL_CRYP_ENABLE(hcryp);
-    
-    /* Get the last input data adress */
-    inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
-    
-    /* Write the Input block in the Data Input register */
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR  = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    hcryp->pCrypInBuffPtr += 16U;
-    hcryp->CrypInCount -= 16U;
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Release Lock */
-    __HAL_UNLOCK(hcryp);
-   
-    /* Return function status */
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES CTR encryption mode using Interrupt.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16 bytes
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
-{
-  uint32_t inputaddr = 0U;
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
-  {
-    /* Process Locked */
-    __HAL_LOCK(hcryp);
-    
-    /* Get the buffer addresses and sizes */
-    hcryp->CrypInCount = Size;
-    hcryp->pCrypInBuffPtr = pPlainData;
-    hcryp->pCrypOutBuffPtr = pCypherData;
-    hcryp->CrypOutCount = Size;
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Reset the CHMOD & MODE bits */
-      CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
-      
-      /* Set the CRYP peripheral in AES CTR mode */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
-      
-      /* Set the Initialization Vector */
-      CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    
-    /* Enable Interrupts */
-    __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
-    
-    /* Enable CRYP */
-    __HAL_CRYP_ENABLE(hcryp);
-    
-    /* Get the last input data adress */
-    inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
-    
-    /* Write the Input block in the Data Input register */
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR  = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    hcryp->pCrypInBuffPtr += 16U;
-    hcryp->CrypInCount -= 16U;
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Release Lock */
-    __HAL_UNLOCK(hcryp);
-  
-    /* Return function status */
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES ECB decryption mode using Interrupt.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
-{
-  uint32_t inputaddr = 0U;
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
-  {
-    /* Process Locked */
-    __HAL_LOCK(hcryp);
-    
-    /* Get the buffer addresses and sizes */
-    hcryp->CrypInCount = Size;
-    hcryp->pCrypInBuffPtr = pCypherData;
-    hcryp->pCrypOutBuffPtr = pPlainData;
-    hcryp->CrypOutCount = Size;
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Reset the CHMOD & MODE bits */
-      CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
-      
-      /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    
-    /* Enable Interrupts */
-    __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
-    
-    /* Enable CRYP */
-    __HAL_CRYP_ENABLE(hcryp);
-    
-    /* Get the last input data adress */
-    inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
-    
-    /* Write the Input block in the Data Input register */
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR  = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    hcryp->pCrypInBuffPtr += 16U;
-    hcryp->CrypInCount -= 16U;    
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Release Lock */
-    __HAL_UNLOCK(hcryp);
-  
-    /* Return function status */
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES CBC decryption mode using IT.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
-{
-  uint32_t inputaddr = 0U;
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
-  {
-    /* Process Locked */
-    __HAL_LOCK(hcryp);
-    
-    /* Get the buffer addresses and sizes */
-    hcryp->CrypInCount = Size;
-    hcryp->pCrypInBuffPtr = pCypherData;
-    hcryp->pCrypOutBuffPtr = pPlainData;
-    hcryp->CrypOutCount = Size;
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Reset the CHMOD & MODE bits */
-      CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
-      
-      /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
-      
-      /* Set the Initialization Vector */
-      CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    
-    /* Enable Interrupts */
-    __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
-    
-    /* Enable CRYP */
-    __HAL_CRYP_ENABLE(hcryp);
-    
-    /* Get the last input data adress */
-    inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
-    
-    /* Write the Input block in the Data Input register */
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR  = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    hcryp->pCrypInBuffPtr += 16U;
-    hcryp->CrypInCount -= 16U;    
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Release Lock */
-    __HAL_UNLOCK(hcryp);
-  
-    /* Return function status */
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES CTR decryption mode using Interrupt.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
-{
-  uint32_t inputaddr = 0U;
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
-  {
-    /* Process Locked */
-    __HAL_LOCK(hcryp);
-    
-    /* Get the buffer addresses and sizes */
-    hcryp->CrypInCount = Size;
-    hcryp->pCrypInBuffPtr = pCypherData;
-    hcryp->pCrypOutBuffPtr = pPlainData;
-    hcryp->CrypOutCount = Size;
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Reset the CHMOD & MODE bits */
-      CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
-      
-      /* Set the CRYP peripheral in AES CTR decryption mode */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
-      
-      /* Set the Initialization Vector */
-      CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    
-    /* Enable Interrupts */
-    __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
-    
-    /* Enable CRYP */
-    __HAL_CRYP_ENABLE(hcryp);
-    
-    /* Get the last input data adress */
-    inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
-    
-    /* Write the Input block in the Data Input register */
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR  = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    hcryp->pCrypInBuffPtr += 16U;
-    hcryp->CrypInCount -= 16U;    
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Release Lock */
-    __HAL_UNLOCK(hcryp);
-  
-    /* Return function status */
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES ECB encryption mode using DMA.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16 bytes
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
-{
-  uint32_t inputaddr = 0U, outputaddr = 0U;
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  /* Check if HAL_CRYP_Init has been called */
-  if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
-  {
-    /* Process Locked */
-    __HAL_LOCK(hcryp);
-    
-    inputaddr  = (uint32_t)pPlainData;
-    outputaddr = (uint32_t)pCypherData;
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Set the CRYP peripheral in AES ECB mode */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    /* Set the input and output addresses and start DMA transfer */ 
-    CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hcryp);
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {  
-    /* Release Lock */
-    __HAL_UNLOCK(hcryp);
-  
-    return HAL_ERROR;   
-  }
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
-{
-  uint32_t inputaddr = 0U, outputaddr = 0U;
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  /* Check if HAL_CRYP_Init has been called */
-  if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
-  {
-    /* Process Locked */
-    __HAL_LOCK(hcryp);
-    
-    inputaddr  = (uint32_t)pPlainData;
-    outputaddr = (uint32_t)pCypherData;
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Set the CRYP peripheral in AES CBC mode */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
-      
-      /* Set the Initialization Vector */
-      CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    /* Set the input and output addresses and start DMA transfer */ 
-    CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hcryp);
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Release Lock */
-    __HAL_UNLOCK(hcryp);
-  
-    return HAL_ERROR;   
-  }
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES CTR encryption mode using DMA.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
-{
-  uint32_t inputaddr = 0U, outputaddr = 0U;
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  /* Check if HAL_CRYP_Init has been called */
-  if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
-  {
-    /* Process Locked */
-    __HAL_LOCK(hcryp);
-    
-    inputaddr  = (uint32_t)pPlainData;
-    outputaddr = (uint32_t)pCypherData;
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Set the CRYP peripheral in AES CTR mode */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
-      
-      /* Set the Initialization Vector */
-      CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    
-    /* Set the input and output addresses and start DMA transfer */ 
-    CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hcryp);
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Release Lock */
-    __HAL_UNLOCK(hcryp);
-  
-    return HAL_ERROR;   
-  }
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES ECB decryption mode using DMA.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16 bytes
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
-{  
-  uint32_t inputaddr = 0U, outputaddr = 0U;
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  /* Check if HAL_CRYP_Init has been called */
-  if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
-  {
-    /* Process Locked */
-    __HAL_LOCK(hcryp);
-    
-    inputaddr  = (uint32_t)pCypherData;
-    outputaddr = (uint32_t)pPlainData;
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Reset the CHMOD & MODE bits */
-      CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
-      
-      /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    
-    /* Set the input and output addresses and start DMA transfer */ 
-    CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hcryp);
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Release Lock */
-    __HAL_UNLOCK(hcryp);
-  
-    return HAL_ERROR;   
-  }
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16 bytes
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
-{
-  uint32_t inputaddr = 0U, outputaddr = 0U;
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  /* Check if HAL_CRYP_Init has been called */
-  if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
-  {
-    /* Process Locked */
-    __HAL_LOCK(hcryp);
-    
-    inputaddr  = (uint32_t)pCypherData;
-    outputaddr = (uint32_t)pPlainData;
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Reset the CHMOD & MODE bits */
-      CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
-      
-      /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
-      
-      /* Set the Initialization Vector */
-      CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    
-    /* Set the input and output addresses and start DMA transfer */ 
-    CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hcryp);
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Release Lock */
-    __HAL_UNLOCK(hcryp);
-  
-    return HAL_ERROR;   
-  }
-}
-
-/**
-  * @brief  Initializes the CRYP peripheral in AES CTR decryption mode using DMA.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
-{  
-  uint32_t inputaddr = 0U, outputaddr = 0U;
-  
-  /* Check that data aligned on u32 */
-  if((((uint32_t)pPlainData & (uint32_t)0x00000003U) != 0U) || (((uint32_t)pCypherData & (uint32_t)0x00000003U) != 0U) || ((Size & (uint16_t)0x000FU) != 0U))
-  {
-    /* Process Locked */
-    __HAL_UNLOCK(hcryp);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  /* Check if HAL_CRYP_Init has been called */
-  if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
-  {
-    /* Process Locked */
-    __HAL_LOCK(hcryp);
-    
-    inputaddr  = (uint32_t)pCypherData;
-    outputaddr = (uint32_t)pPlainData;
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_BUSY;
-    
-    /* Check if initialization phase has already been performed */
-    if(hcryp->Phase == HAL_CRYP_PHASE_READY)
-    {
-      /* Set the key */
-      CRYP_SetKey(hcryp, hcryp->Init.pKey);
-      
-      /* Set the CRYP peripheral in AES CTR mode */
-      __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
-      
-      /* Set the Initialization Vector */
-      CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-      
-      /* Set the phase */
-      hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
-    }
-    
-    /* Set the input and output addresses and start DMA transfer */ 
-    CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hcryp);
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Release Lock */
-    __HAL_UNLOCK(hcryp);
-  
-    return HAL_ERROR;   
-  }
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup CRYP_Exported_Functions_Group3
- *  @brief   DMA callback functions. 
- *
-@verbatim   
-  ==============================================================================
-                      ##### DMA callback functions  #####
-  ==============================================================================  
-    [..]  This section provides DMA callback functions:
-      (+) DMA Input data transfer complete
-      (+) DMA Output data transfer complete
-      (+) DMA error
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  CRYP error callback.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @retval None
-  */
- __weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcryp);
-
-  /* NOTE : This function should not be modified; when the callback is needed, 
-            the HAL_CRYP_ErrorCallback can be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  Input transfer completed callback.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @retval None
-  */
-__weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcryp);
-
-  /* NOTE : This function should not be modified; when the callback is needed, 
-            the HAL_CRYP_InCpltCallback can be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  Output transfer completed callback.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @retval None
-  */
-__weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcryp);
-
-  /* NOTE : This function should not be modified; when the callback is needed, 
-            the HAL_CRYP_OutCpltCallback can be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup CRYP_Exported_Functions_Group4
- *  @brief   CRYP IRQ handler.
- *
-@verbatim   
-  ==============================================================================
-                ##### CRYP IRQ handler management #####
-  ==============================================================================  
-[..]  This section provides CRYP IRQ handler function.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  This function handles CRYP interrupt request.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @retval None
-  */
-void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
-{
-  /* Check if error occurred*/
-  if (__HAL_CRYP_GET_IT_SOURCE(hcryp, CRYP_IT_ERR) != RESET)
-  {
-    if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_RDERR) != RESET)
-    {
-      __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_RDERR);
-    }
-    
-    if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_WRERR) != RESET)
-    {
-      __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_WRERR);
-    }
-    
-    if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_CCF) != RESET)
-    {
-      __HAL_CRYP_CLEAR_FLAG(hcryp,CRYP_CLEARFLAG_CCF);
-    }
-    
-    hcryp->State= HAL_CRYP_STATE_ERROR;
-    /* Disable Computation Complete Interrupt */
-    __HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_CC);
-    __HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_ERR);
-    
-    HAL_CRYP_ErrorCallback(hcryp);
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hcryp);
-    
-    return;
-  }
-  
-  /* Check if computation complete interrupt was enabled*/
-  if (__HAL_CRYP_GET_IT_SOURCE(hcryp, CRYP_IT_CC) != RESET)
-  {
-    /* Clear CCF Flag */
-    __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
-  
-    CRYP_EncryptDecrypt_IT(hcryp);
-  }
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup CRYP_Exported_Functions_Group5
- *  @brief   Peripheral State functions. 
- *
-@verbatim   
-  ==============================================================================
-                      ##### Peripheral State functions #####
-  ==============================================================================  
-    [..]
-    This subsection permits to get in run-time the status of the peripheral.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Returns the CRYP state.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @retval HAL state
-  */
-HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
-{
-  return hcryp->State;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup CRYP_Private
-  * @{
-  */
-
-/**
-  * @brief  IT function called under interruption context to continue encryption or decryption
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp)
-{
-  uint32_t inputaddr = 0U, outputaddr = 0U;
-
-  /* Get the last Output data adress */
-  outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
-  
-  /* Read the Output block from the Output Register */
-  *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
-  outputaddr+=4U;
-  *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
-  outputaddr+=4U;
-  *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
-  outputaddr+=4U;
-  *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
-  
-  hcryp->pCrypOutBuffPtr += 16U;
-  hcryp->CrypOutCount -= 16U;
-  
-  /* Check if all input text is encrypted or decrypted */
-  if(hcryp->CrypOutCount == 0U)
-  {
-    /* Disable Computation Complete Interrupt */
-    __HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_CC);
-    __HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_ERR);
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hcryp);
-    
-    /* Change the CRYP state */
-    hcryp->State = HAL_CRYP_STATE_READY;
-    
-    /* Call computation complete callback */
-    HAL_CRYPEx_ComputationCpltCallback(hcryp);
-  }
-  else /* Process the rest of input text */
-  {
-    /* Get the last Intput data adress */
-    inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
-    
-    /* Write the Input block in the Data Input register */
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR  = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    hcryp->pCrypInBuffPtr += 16U;
-    hcryp->CrypInCount -= 16U;      
-  }
-  return HAL_OK;
-}
-/**
-  * @brief  DMA CRYP Input Data process complete callback.
-  * @param  hdma: DMA handle
-  * @retval None
-  */
-static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)  
-{
-  CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
-  
-  /* Disable the DMA transfer for input request  */
-  CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAINEN);
-  
-  /* Call input data transfer complete callback */
-  HAL_CRYP_InCpltCallback(hcryp);
-}
-
-/**
-  * @brief  DMA CRYP Output Data process complete callback.
-  * @param  hdma: DMA handle
-  * @retval None
-  */
-static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
-{
-  CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
-  
-  /* Disable the DMA transfer for output request by resetting the DMAOUTEN bit
-     in the DMACR register */
-  CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAOUTEN);
-
-  /* Clear CCF Flag */
-  __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
-
-  /* Disable CRYP */
-  __HAL_CRYP_DISABLE(hcryp);
-  
-  /* Change the CRYP state to ready */
-  hcryp->State = HAL_CRYP_STATE_READY;
-  
-  /* Call output data transfer complete callback */
-  HAL_CRYP_OutCpltCallback(hcryp);
-}
-
-/**
-  * @brief  DMA CRYP communication error callback. 
-  * @param  hdma: DMA handle
-  * @retval None
-  */
-static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
-{
-  CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
-  hcryp->State= HAL_CRYP_STATE_ERROR;
-  HAL_CRYP_ErrorCallback(hcryp);
-}
-
-/**
-  * @brief  Writes the Key in Key registers. 
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  Key: Pointer to Key buffer
-  * @note Key must be written as little endian.
-  *         If Key pointer points at address n, 
-  *         n[15:0] contains key[96:127], 
-  *         (n+4)[15:0] contains key[64:95], 
-  *         (n+8)[15:0] contains key[32:63] and 
-  *         (n+12)[15:0] contains key[0:31]
-  * @retval None
-  */
-static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key)
-{  
-  uint32_t keyaddr = (uint32_t)Key;
-  
-  hcryp->Instance->KEYR3 = __REV(*(uint32_t*)(keyaddr));
-  keyaddr+=4U;
-  hcryp->Instance->KEYR2 = __REV(*(uint32_t*)(keyaddr));
-  keyaddr+=4U;
-  hcryp->Instance->KEYR1 = __REV(*(uint32_t*)(keyaddr));
-  keyaddr+=4U;
-  hcryp->Instance->KEYR0 = __REV(*(uint32_t*)(keyaddr));
-}
-
-/**
-  * @brief  Writes the InitVector/InitCounter in IV registers. 
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  InitVector: Pointer to InitVector/InitCounter buffer
-  * @note Init Vector must be written as little endian.
-  *         If Init Vector pointer points at address n, 
-  *         n[15:0] contains Vector[96:127], 
-  *         (n+4)[15:0] contains Vector[64:95], 
-  *         (n+8)[15:0] contains Vector[32:63] and 
-  *         (n+12)[15:0] contains Vector[0:31]
-  * @retval None
-  */
-static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector)
-{
-  uint32_t ivaddr = (uint32_t)InitVector;
-  
-  hcryp->Instance->IVR3 = __REV(*(uint32_t*)(ivaddr));
-  ivaddr+=4U;
-  hcryp->Instance->IVR2 = __REV(*(uint32_t*)(ivaddr));
-  ivaddr+=4U;
-  hcryp->Instance->IVR1 = __REV(*(uint32_t*)(ivaddr));
-  ivaddr+=4U;
-  hcryp->Instance->IVR0 = __REV(*(uint32_t*)(ivaddr));
-}
-
-/**
-  * @brief  Process Data: Writes Input data in polling mode and reads the output data
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  Input: Pointer to the Input buffer
-  * @param  Ilength: Length of the Input buffer, must be a multiple of 16.
-  * @param  Output: Pointer to the returned buffer
-  * @param  Timeout: Specify Timeout value  
-  * @retval None
-  */
-static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-  
-  uint32_t index = 0U;
-  uint32_t inputaddr  = (uint32_t)Input;
-  uint32_t outputaddr = (uint32_t)Output;
-  
-  for(index=0U; (index < Ilength); index += 16U)
-  {
-    /* Write the Input block in the Data Input register */
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR  = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
-    inputaddr+=4U;
-    
-    /* Get timeout */
-    tickstart = HAL_GetTick();
-    
-    while(HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF))
-    {    
-      /* Check for the Timeout */
-      if(Timeout != HAL_MAX_DELAY)
-      {
-        if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
-        {
-          /* Change state */
-          hcryp->State = HAL_CRYP_STATE_TIMEOUT;
-          
-          /* Process Unlocked */          
-          __HAL_UNLOCK(hcryp);
-          
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-    /* Clear CCF Flag */
-    __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
-    
-    /* Read the Output block from the Data Output Register */
-    *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
-    outputaddr+=4U;
-    *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
-    outputaddr+=4U;
-    *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
-    outputaddr+=4U;
-    *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
-    outputaddr+=4U;
-  }
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set the DMA configuration and start the DMA transfer
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @param  inputaddr: address of the Input buffer
-  * @param  Size: Size of the Input buffer, must be a multiple of 16.
-  * @param  outputaddr: address of the Output buffer
-  * @retval None
-  */
-static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
-{
-  /* Set the CRYP DMA transfer complete callback */
-  hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt;
-  /* Set the DMA error callback */
-  hcryp->hdmain->XferErrorCallback = CRYP_DMAError;
-  
-  /* Set the CRYP DMA transfer complete callback */
-  hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt;
-  /* Set the DMA error callback */
-  hcryp->hdmaout->XferErrorCallback = CRYP_DMAError;
-
-  /* Enable the DMA In DMA Stream */
-  HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DINR, Size/4);
-
-  /* Enable the DMA Out DMA Stream */
-  HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUTR, outputaddr, Size/4);
-
-  /* Enable In and Out DMA requests */
-  SET_BIT(hcryp->Instance->CR, (AES_CR_DMAINEN | AES_CR_DMAOUTEN));
-
-  /* Enable CRYP */
-  __HAL_CRYP_ENABLE(hcryp);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_CRYP_MODULE_ENABLED */
-#endif /* STM32L021xx || STM32L041xx || STM32L061xx || STM32L062xx || STM32L063xx || STM32L081xx || STM32L082xx || STM32L083xx */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp_ex.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp_ex.c
deleted file mode 100755
index 4ff7316a..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp_ex.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_cryp_ex.c
-  * @author  MCD Application Team
-  * @brief   CRYPEx HAL module driver.
-  *    
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Cryptography (CRYP) extension peripheral:
-  *           + Computation completed callback.
-  *         
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */ 
-
-#if defined (STM32L021xx) ||defined (STM32L041xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-#ifdef HAL_CRYP_MODULE_ENABLED
-
-
-/** @addtogroup CRYPEx
-  * @brief CRYP HAL Extended module driver.
-  * @{
-  */
-
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @addtogroup CRYPEx_Exported_Functions
-  * @{
-  */
-
-
-/** @addtogroup CRYPEx_Exported_Functions_Group1
- *  @brief    Extended features functions. 
- *
-@verbatim   
- ===============================================================================
-                 ##### Extended features functions #####
- =============================================================================== 
-    [..]  This section provides callback functions:
-      (+) Computation completed.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Computation completed callbacks.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
-  *         the configuration information for CRYP module
-  * @retval None
-  */
-__weak void HAL_CRYPEx_ComputationCpltCallback(CRYP_HandleTypeDef *hcryp)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcryp);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_CRYP_ComputationCpltCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-/**
-  * @}
-  */
-
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-#endif /* STM32L021xx || STM32L041xx || STM32L061xx || STM32L062xx || STM32L063xx || STM32L081xx || STM32L082xx || STM32L083xx */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac.c
deleted file mode 100755
index 80e62523..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac.c
+++ /dev/null
@@ -1,726 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_dac.c
-  * @author  MCD Application Team
-  * @brief   DAC HAL module driver.
-  *         This file provides firmware functions to manage the following
-  *         functionalities of the Digital to Analog Converter (DAC) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral Control functions
-  *           + Peripheral State and Errors functions      
-  *     
-  *
-  @verbatim
-  ==============================================================================
-                      ##### DAC Peripheral features #####
-  ==============================================================================
-    [..]        
-      *** DAC Channels ***
-      ====================
-    [..]  
-    STM32F0 devices integrates no, one or two 12-bit Digital Analog Converters.
-    STM32L05x & STM32L06x devices have one converter (channel1)
-    STM32L07x & STM32L08x devices have two converters (i.e. channel1 & channel2)
-
-    When 2 converters are present (i.e. channel1 & channel2)  they 
-    can be used independently or simultaneously (dual mode):
-      (#) DAC channel1 with DAC_OUT1 (PA4) as output
-      (#) DAC channel2 with DAC_OUT2 (PA5) as output (STM32L07x/STM32L08x only)
-      (#) Channel1 & channel2 can be used independently or simultaneously in dual mode (STM32L07x/STM32L08x only)
-  
-      *** DAC Triggers ***
-      ====================
-    [..]
-    Digital to Analog conversion can be non-triggered using DAC_Trigger_None
-    and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
-    [..]
-    Digital to Analog conversion can be triggered by:
-      (#) External event: EXTI Line 9 (any GPIOx_Pin9) using DAC_Trigger_Ext_IT9.
-          The used pin (GPIOx_Pin9) must be configured in input mode.
-
-      (#) Timers TRGO: 
-          STM32L05x/STM32L06x : TIM2, TIM6 and TIM21
-          STM32L07x/STM32L08x : TIM2, TIM3, TIM6, TIM7 and TIM21
-          (DAC_Trigger_T2_TRGO, DAC_Trigger_T6_TRGO...)
-
-      (#) Software using DAC_Trigger_Software
-
-      *** DAC Buffer mode feature ***
-      ===============================
-      [..] 
-      Each DAC channel integrates an output buffer that can be used to
-      reduce the output impedance, and to drive external loads directly
-      without having to add an external operational amplifier.
-      To enable, the output buffer use
-      sConfig.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
-      [..]
-      (@) Refer to the device datasheet for more details about output
-          impedance value with and without output buffer.
-
-       *** DAC wave generation feature ***
-       ===================================
-       [..]
-       Both DAC channels can be used to generate
-         (#) Noise wave using HAL_DACEx_NoiseWaveGenerate()
-         (#) Triangle wave using HAL_DACEx_TriangleWaveGenerate()
-
-       *** DAC data format ***
-       =======================
-       [..]
-       The DAC data format can be:
-         (#) 8-bit right alignment using DAC_ALIGN_8B_R
-         (#) 12-bit left alignment using DAC_ALIGN_12B_L
-         (#) 12-bit right alignment using DAC_ALIGN_12B_R
-
-       *** DAC data value to voltage correspondence ***
-       ================================================
-       [..]
-       The analog output voltage on each DAC channel pin is determined
-       by the following equation: 
-       DAC_OUTx = VREF+ * DOR / 4095
-       with  DOR is the Data Output Register
-          VEF+ is the input voltage reference (refer to the device datasheet)
-        e.g. To set DAC_OUT1 to 0.7V, use
-          Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
-
-       *** DMA requests  ***
-       =====================
-       [..]
-       A DMA1 request can be generated when an external trigger (but not
-       a software trigger) occurs if DMA1 requests are enabled using
-       HAL_DAC_Start_DMA()
-       [..]
-       DMA1 requests are mapped as following:
-         (#) DAC channel1 : mapped on DMA1 Request9 channel2 which must be
-             already configured
-         (#) DAC channel2 : mapped on DMA1 Request15 channel4 which must be 
-             already configured (STM32L07x/STM32L08x only)
-       
-    -@- For Dual mode (STM32L07x/STM32L08x only) and specific signal Triangle and noise generation please 
-        refer to Extension Features Driver description        
-
-
-                      ##### How to use this driver #####
-  ==============================================================================
-    [..]
-      (+) DAC APB clock must be enabled to get write access to DAC
-          registers using HAL_DAC_Init()
-      (+) Configure DAC_OUT1: PA4 in analog mode.
-      (+) Configure DAC_OUT2: PA5 in analog mode (STM32L07x/STM32L08x only).
-      (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
-      (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA functions
-
-     *** Polling mode IO operation ***
-     =================================
-     [..]    
-       (+) Start the DAC peripheral using HAL_DAC_Start() 
-       (+) To read the DAC last data output value value, use the HAL_DAC_GetValue() function.
-       (+) Stop the DAC peripheral using HAL_DAC_Stop()
-       
-     *** DMA mode IO operation ***    
-     ==============================
-     [..]    
-       (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length 
-           of data to be transferred at each end of conversion
-       (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1()or HAL_DAC_ConvHalfCpltCallbackCh2()  
-           function is executed and user can add his own code by customization of function pointer 
-           HAL_DAC_ConvHalfCpltCallbackCh1 or HAL_DAC_ConvHalfCpltCallbackCh2
-       (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1()or HAL_DAC_ConvCpltCallbackCh2()  
-           function is executed and user can add his own code by customization of function pointer 
-           HAL_DAC_ConvCpltCallbackCh1 or HAL_DAC_ConvCpltCallbackCh2
-       (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can 
-           add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
-       (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
-           HAL_DAC_DMAUnderrunCallbackCh1()or HAL_DAC_DMAUnderrunCallbackCh2()  
-           function is executed and user can add his own code by customization of function pointer 
-           HAL_DAC_DMAUnderrunCallbackCh1 or HAL_DAC_DMAUnderrunCallbackCh2
-           add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
-       (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
-
-     *** DAC HAL driver macros list ***
-     ============================================= 
-     [..]
-       Below the list of most used macros in DAC HAL driver.
-       
-      (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
-      (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
-      (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
-      (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
-      
-     [..]
-      (@) You can refer to the DAC HAL driver header file for more useful macros  
-   
- @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-
-#if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx)
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-#ifdef HAL_DAC_MODULE_ENABLED
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup DAC
-  * @brief DAC driver modules
-  * @{
-  */
-
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/* Private functions ---------------------------------------------------------*/
-
-/** @addtogroup DAC_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup DAC_Exported_Functions_Group1
- *  @brief    Initialization and Configuration functions
- *
-@verbatim
-  ==============================================================================
-              ##### Initialization and de-initialization functions #####
-  ==============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Initialize and configure the DAC.
-      (+) De-initialize the DAC.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the DAC peripheral according to the specified parameters
-  *         in the DAC_InitStruct.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
-{
-  /* Check DAC handle */
-  if(hdac == NULL)
-  {
-     return HAL_ERROR;
-  }
-  /* Check the parameters */
-  assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
-
-  if(hdac->State == HAL_DAC_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hdac->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware */
-    HAL_DAC_MspInit(hdac);
-  }
-
-  /* Initialize the DAC state*/
-  hdac->State = HAL_DAC_STATE_BUSY;
-
-  /* Set DAC error code to none */
-  hdac->ErrorCode = HAL_DAC_ERROR_NONE;
-
-  /* Initialize the DAC state*/
-  hdac->State = HAL_DAC_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Deinitializes the DAC peripheral registers to their default reset values.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
-{
-  /* Check DAC handle */
-  if(hdac == NULL)
-  {
-     return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
-
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-
-  /* DeInit the low level hardware */
-  HAL_DAC_MspDeInit(hdac);
-
-  /* Set DAC error code to none */
-  hdac->ErrorCode = HAL_DAC_ERROR_NONE;
-
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_RESET;
-  
-  /* Release Lock */
-  __HAL_UNLOCK(hdac);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the DAC MSP.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_DAC_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes the DAC MSP.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.  
-  * @retval None
-  */
-__weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_DAC_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup DAC_Exported_Functions_Group2
- *  @brief    IO operation functions 
- *
-@verbatim
-  ==============================================================================
-             ##### IO operation functions #####
-  ==============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Start conversion.
-      (+) Stop conversion.
-      (+) Start conversion and enable DMA transfer.
-      (+) Stop conversion and disable DMA transfer.
-      (+) Get result of conversion.
-      (+) Get result of dual mode conversion (STM32L07xx/STM32L08xx only)
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Enables DAC and starts conversion of channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
-  * @retval HAL status
-  */
-__weak HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-  UNUSED(Channel);
-
-  /* Note : This function is defined into this file for library reference. */
-  /*        Function content is located into file stm32l0xx_hal_dac_ex.c   */
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Disables DAC and stop conversion of channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected (STM32L07x/STM32L08x only)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  
-  /* Disable the Peripheral */
-  __HAL_DAC_DISABLE(hdac, Channel);
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enables DAC and starts conversion of channel using DMA.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected (STM32L07x/STM32L08x only)
-  * @param  pData: The destination peripheral Buffer address.
-  * @param  Length: The length of data to be transferred from memory to DAC peripheral
-  * @param  Alignment: Specifies the data alignment for DAC channel.
-  *          This parameter can be one of the following values:
-  *            @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
-  *            @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
-  *            @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
-  * @retval HAL status
-  */
-__weak HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-  UNUSED(Channel);
-  UNUSED(pData);
-  UNUSED(Length);
-  UNUSED(Alignment);
-
-  /* Note : This function is defined into this file for library reference. */
-  /*        Function content is located into file stm32l0xx_hal_dac_ex.c   */
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Disables DAC and stop conversion of channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected (STM32L07x/STM32L08x only)
-  * @retval HAL status
-  */
-__weak HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-  UNUSED(Channel);
-
-  /* Note : This function is defined into this file for library reference. */
-  /*        Function content is located into file stm32l0xx_hal_dac_ex.c   */
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Returns the last data output value of the selected DAC channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected (STM32L07x/STM32L08x only)
-  * @retval The selected DAC channel data output value.
-  */
-__weak uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-  UNUSED(Channel);
-
-  /* Note : This function is defined into this file for library reference. */
-  /*        Function content is located into file stm32l0xx_hal_dac_ex.c   */
-
-  /* Return function status */
-  return 0U;
-}
-
-/**
-  * @brief  Handles DAC interrupt request
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* Note : This function is defined into this file for library reference. */
-  /*        Function content is located into file stm32l0xx_hal_dac_ex.c   */
-
-}
-
-/**
-  * @brief  Conversion complete callback in non blocking mode for Channel1 
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Conversion half DMA transfer callback in non blocking mode for Channel1 
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Error DAC callback for Channel1.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DMA underrun DAC callback for channel1.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-  
-/** @addtogroup DAC_Exported_Functions_Group3
- *  @brief    Peripheral Control functions 
- *
-@verbatim
-  ==============================================================================
-             ##### Peripheral Control functions #####
-  ==============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Configure channels.
-      (+) Set the specified data holding register value for DAC channel.
-      
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Configures the selected DAC channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  sConfig: DAC configuration structure.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected (STM32L07x/STM32L08x only)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
-{
-  uint32_t tmpreg1 = 0U, tmpreg2 = 0U;
-
-  /* Check the DAC parameters */
-  assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
-  assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
-  assert_param(IS_DAC_CHANNEL(Channel));
-
-  /* Process locked */
-  __HAL_LOCK(hdac);
-
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-
-  /* Get the DAC CR value */
-  tmpreg1 = hdac->Instance->CR;
-  /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
-  tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel);
-  /* Configure for the selected DAC channel: buffer output, trigger */
-  /* Set TSELx and TENx bits according to DAC_Trigger value */
-  /* Set BOFFx bit according to DAC_OutputBuffer value */   
-  tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer);
-  /* Calculate CR register value depending on DAC_Channel */
-  tmpreg1 |= tmpreg2 << Channel;
-  /* Write to DAC CR */
-  hdac->Instance->CR = tmpreg1;
-  /* Disable wave generation */
-  CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << Channel));
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_READY;
-
-  /* Process unlocked */
-  __HAL_UNLOCK(hdac);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup DAC_Exported_Functions_Group4
- *  @brief   Peripheral State and Errors functions 
- *
-@verbatim
-  ==============================================================================
-            ##### Peripheral State and Errors functions #####
-  ==============================================================================
-    [..]
-    This subsection provides functions allowing to
-      (+) Check the DAC state.
-      (+) Check the DAC Errors.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  return the DAC state
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval HAL state
-  */
-HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac)
-{
-  /* Return DAC state */
-  return hdac->State;
-}
-
-
-/**
-  * @brief  Return the DAC error code
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval DAC Error Code
-  */
-uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
-{
-  return hdac->ErrorCode;
-}
-
-/**
-  * @brief  Set the specified data holding register value for DAC channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel.
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected (STM32L07x/STM32L08x only)
-  * @param  Alignment: Specifies the data alignment.
-  *          This parameter can be one of the following values:
-  *            @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
-  *            @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
-  *            @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
-  * @param  Data: Data to be loaded in the selected data holding register.
-  * @retval HAL status
-  */
-__weak HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-  UNUSED(Channel);
-  UNUSED(Alignment);
-  UNUSED(Data);
-  /* Note : This function is defined into this file for library reference. */
-  /*        Function content is located into file stm32l0xx_hal_dac_ex.c   */
-
-  /* Return function status */
-  return HAL_OK;
-}
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* HAL_DAC_MODULE_ENABLED */
-#endif /* !STM32L011xx && STM32L021xx && !STM32L031xx && !STM32L041xx && !STM32L051xx && !STM32L061xx&& !STM32L071xx&& !STM32L081xx*/
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac_ex.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac_ex.c
deleted file mode 100755
index bbf782fc..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac_ex.c
+++ /dev/null
@@ -1,1049 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_dac_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended DAC HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of DAC extension peripheral:
-  *           + Extended features functions
-  *     
-  *     
-  @verbatim
-  ==============================================================================
-                      ##### How to use this driver #####
-  ==============================================================================
-    [..]          
-      (+) When Dual mode is enabled (i.e DAC Channel1 and Channel2 are used simultaneously) :
-          Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
-          HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2.  
-      (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
-      (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
-  
- @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-
-#if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx)
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-#ifdef HAL_DAC_MODULE_ENABLED
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup DACEx DACEx
-  * @brief DAC driver modules
-  * @{
-  */
-
-/** @addtogroup DACEx_Private
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
-static void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma);
-static void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma);
-static void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma); 
-#endif
-static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
-static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
-static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
-/**
-  * @}
-  */
-
-/** @addtogroup DACEx_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup DACEx_Exported_Functions_Group1
- *  @brief    Extended features functions 
- *
-
-  * @{
-  */
-
-#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
-/**
-  * @brief  Returns the last data output value of the selected DAC channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval The selected DAC channel data output value.
-  */
-uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
-{
-  uint32_t tmp = 0U;
-  
-  tmp |= hdac->Instance->DOR1;
-  
-  tmp |= hdac->Instance->DOR2 << 16U;
-  
-  /* Returns the DAC channel data output register value */
-  return tmp;
-}
-#endif
-
-/**
-  * @brief  Enables or disables the selected DAC channel wave generation.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected (STM32L07x/STM32L08x only)
-  * @param  Amplitude: Select max triangle amplitude. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
-  *            @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
-  *            @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
-  *            @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
-  *            @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
-  *            @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
-  *            @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
-  *            @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
-  *            @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
-  *            @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
-  *            @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
-  *            @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
-{
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
-
-  /* Process locked */
-  __HAL_LOCK(hdac);
-
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-
-  /* Enable the triangle wave generation for the selected DAC channel */
-  MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<State = HAL_DAC_STATE_READY;
-
-  /* Process unlocked */
-  __HAL_UNLOCK(hdac);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enables or disables the selected DAC channel wave generation.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC. 
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected (STM32L07x/STM32L08x only)
-  * @param  Amplitude: Unmask DAC channel LFSR for noise wave generation.
-  *          This parameter can be one of the following values:
-  *            @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
-  *            @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
-  *            @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
-  *            @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
-  *            @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
-  *            @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
-  *            @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
-  *            @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
-  *            @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
-  *            @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
-  *            @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
-  *            @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
-{
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
-
-  /* Process locked */
-  __HAL_LOCK(hdac);
-
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-
-/* Enable the noise wave generation for the selected DAC channel */
-  MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<State = HAL_DAC_STATE_READY;
-
-  /* Process unlocked */
-  __HAL_UNLOCK(hdac);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
-/**
-  * @brief  Set the specified data holding register value for dual DAC channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *               the configuration information for the specified DAC.
-  * @param  Alignment: Specifies the data alignment for dual channel DAC.
-  *          This parameter can be one of the following values:
-  *            DAC_ALIGN_8B_R: 8bit right data alignment selected
-  *            DAC_ALIGN_12B_L: 12bit left data alignment selected
-  *            DAC_ALIGN_12B_R: 12bit right data alignment selected
-  * @param  Data1: Data for DAC Channel2 to be loaded in the selected data holding register.
-  * @param  Data2: Data for DAC Channel1 to be loaded in the selected data  holding register.
-  * @note   In dual mode, a unique register access is required to write in both
-  *          DAC channels at the same time.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
-{  
-  uint32_t data = 0U, tmp = 0U;
-  
-  /* Check the parameters */
-  assert_param(IS_DAC_ALIGN(Alignment));
-  assert_param(IS_DAC_DATA(Data1));
-  assert_param(IS_DAC_DATA(Data2));
-  
-  /* Calculate and set dual DAC data holding register value */
-  if (Alignment == DAC_ALIGN_8B_R)
-  {
-    data = ((uint32_t)Data2 << 8U) | Data1; 
-  }
-  else
-  {
-    data = ((uint32_t)Data2 << 16U) | Data1;
-  }
-  
-  tmp = (uint32_t)hdac->Instance;
-  tmp += DAC_DHR12RD_ALIGNEMENT(Alignment);
-
-  /* Set the dual DAC selected data holding register */
-  *(__IO uint32_t *)tmp = data;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  Conversion complete callback in non blocking mode for Channel2 
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Conversion half DMA transfer callback in non blocking mode for Channel2 
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Error DAC callback for Channel2.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DMA underrun DAC callback for channel2.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_DAC_DMAUnderrunCallbackCh2 could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Enables DAC and starts conversion of channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  uint32_t tmp1 = 0U, tmp2 = 0U;
-  
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-
-  /* Process locked */
-  __HAL_LOCK(hdac);
-
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-
-  /* Enable the Peripharal */
-  __HAL_DAC_ENABLE(hdac, Channel);
-
-  if(Channel == DAC_CHANNEL_1)
-  {
-    tmp1 = hdac->Instance->CR & DAC_CR_TEN1;
-    tmp2 = hdac->Instance->CR & DAC_CR_TSEL1;
-    /* Check if software trigger enabled */
-    if((tmp1 ==  DAC_CR_TEN1) && (tmp2 ==  DAC_CR_TSEL1))
-    {
-      /* Enable the selected DAC software conversion */
-      SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
-    }
-  }
-  else
-  {
-    tmp1 = hdac->Instance->CR & DAC_CR_TEN2;
-    tmp2 = hdac->Instance->CR & DAC_CR_TSEL2;
-    /* Check if software trigger enabled */
-    if((tmp1 == DAC_CR_TEN2) && (tmp2 == DAC_CR_TSEL2))
-    {
-      /* Enable the selected DAC software conversion*/
-      SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
-    }
-  }
-
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_READY;
-
-  /* Process unlocked */
-  __HAL_UNLOCK(hdac);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enables DAC and starts conversion of channel using DMA.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
-  * @param  pData: The destination peripheral Buffer address.
-  * @param  Length: The length of data to be transferred from memory to DAC peripheral
-  * @param  Alignment: Specifies the data alignment for DAC channel.
-  *          This parameter can be one of the following values:
-  *            @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
-  *            @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
-  *            @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  assert_param(IS_DAC_ALIGN(Alignment));
-
-  /* Process locked */
-  __HAL_LOCK(hdac);
-
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-
-  if(Channel == DAC_CHANNEL_1)
-  {
-    /* Set the DMA transfer complete callback for channel1 */
-    hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
-
-    /* Set the DMA half transfer complete callback for channel1 */
-    hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
-
-    /* Set the DMA error callback for channel1 */
-    hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
-
-    /* Enable the selected DAC channel1 DMA request */
-    SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
-       
-    /* Case of use of channel 1 */
-    switch(Alignment)
-    {
-      case DAC_ALIGN_12B_R:
-        /* Get DHR12R1 address */
-        tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
-        break;
-      case DAC_ALIGN_12B_L:
-        /* Get DHR12L1 address */
-        tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
-        break;
-      case DAC_ALIGN_8B_R:
-        /* Get DHR8R1 address */
-        tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
-        break;
-      default:
-        break;
-    }
-    UNUSED(tmpreg);		/* avoid warning on tmpreg affectation with stupid compiler */
-  }
-  else
-  {
-    /* Set the DMA transfer complete callback for channel2 */
-    hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
-
-    /* Set the DMA half transfer complete callback for channel2 */
-    hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
-    
-    /* Set the DMA error callback for channel2 */
-    hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
-
-    /* Enable the selected DAC channel2 DMA request */
-    SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
-
-    /* Case of use of channel 2 */
-    switch(Alignment)
-    {
-      case DAC_ALIGN_12B_R:
-        /* Get DHR12R2 address */
-        tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
-        break;
-      case DAC_ALIGN_12B_L:
-        /* Get DHR12L2 address */
-        tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
-        break;
-      case DAC_ALIGN_8B_R:
-        /* Get DHR8R2 address */
-        tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
-        break;
-      default:
-        break;
-    }
-  }
-  
-  /* Enable the DMA Stream */
-  if(Channel == DAC_CHANNEL_1)
-  {
-    /* Enable the DAC DMA underrun interrupt */
-    __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
-    
-    /* Enable the DMA Stream */
-    HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
-  } 
-  else
-  {
-    /* Enable the DAC DMA underrun interrupt */
-    __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
-    
-    /* Enable the DMA Stream */
-    HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
-  }
-  
-  /* Enable the Peripharal */
-  __HAL_DAC_ENABLE(hdac, Channel);
-  
-  /* Process Unlocked */
-  __HAL_UNLOCK(hdac);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Disables DAC and stop conversion of channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-
-  /* Disable the selected DAC channel DMA request */
-  CLEAR_BIT(hdac->Instance->CR, (DAC_CR_DMAEN1 << Channel));
-
-  /* Disable the Peripharal */
-  __HAL_DAC_DISABLE(hdac, Channel);
-
-  /* Disable the DMA Channel */
-  /* Channel1 is used */
-  if(Channel == DAC_CHANNEL_1)
-  { 
-    status = HAL_DMA_Abort(hdac->DMA_Handle1);
-  }
-  else /* Channel2 is used for */
-  { 
-    status = HAL_DMA_Abort(hdac->DMA_Handle2); 
-  }
-
-  /* Check if DMA Channel effectively disabled */
-  if(status != HAL_OK)
-  {
-    /* Update DAC state machine to error */
-    hdac->State = HAL_DAC_STATE_ERROR;
-  }
-  else
-  {
-    /* Change DAC state */
-    hdac->State = HAL_DAC_STATE_READY;
-  }
-
-  /* Return function status */
-  return status;
-}
-
-/**
-  * @brief  Returns the last data output value of the selected DAC channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
-  * @retval The selected DAC channel data output value.
-  */
-uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  
-  /* Returns the DAC channel data output register value */
-  if(Channel == DAC_CHANNEL_1)
-  {
-    return hdac->Instance->DOR1;
-  }
-  else
-  {
-    return hdac->Instance->DOR2;
-  }
-}
-
-/**
-  * @brief  Handles DAC interrupt request
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
-{
-  /* Check underrun flag of DAC channel 1 */
-  if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
-  {
-    /* Change DAC state to error state */
-    hdac->State = HAL_DAC_STATE_ERROR;
-
-    /* Set DAC error code to chanel1 DMA underrun error */
-    hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
-
-    /* Clear the underrun flag */
-    __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
-
-    /* Disable the selected DAC channel1 DMA request */
-    CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
-
-    /* Error callback */
-    HAL_DAC_DMAUnderrunCallbackCh1(hdac);
-  }
-  
-  /* Check underrun flag of DAC channel 2 */
-  if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
-  {
-    /* Change DAC state to error state */
-    hdac->State = HAL_DAC_STATE_ERROR;
-    
-    /* Set DAC error code to channel2 DMA underrun error */
-    hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH2;
-    
-    /* Clear the underrun flag */
-    __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
-    
-    /* Disable the selected DAC channel1 DMA request */
-    CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
-      
-    /* Error callback */ 
-    HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
-  }  
-}
-
-
-/**
-  * @brief  Set the specified data holding register value for DAC channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
-  * @param  Alignment: Specifies the data alignment.
-  *          This parameter can be one of the following values:
-  *            @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
-  *            @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
-  *            @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
-  * @param  Data: Data to be loaded in the selected data holding register.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
-{
-  __IO uint32_t tmp = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  assert_param(IS_DAC_ALIGN(Alignment));
-  assert_param(IS_DAC_DATA(Data));
-
-  tmp = (uint32_t)hdac->Instance; 
-  if(Channel == DAC_CHANNEL_1)
-  {
-    tmp += DAC_DHR12R1_ALIGNEMENT(Alignment);
-  }
-  else
-  {
-    tmp += DAC_DHR12R2_ALIGNEMENT(Alignment);
-  }
-
-  /* Set the DAC channel selected data holding register */
-  *(__IO uint32_t *) tmp = Data;
-
-  /* Return function status */
-  return HAL_OK;
-}
-#else /* All products with only one channel */
-
-/**
-  * @brief  Enables DAC and starts conversion of channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  uint32_t tmp1 = 0U, tmp2 = 0U;
-  
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-
-  /* Process locked */
-  __HAL_LOCK(hdac);
-
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-
-  /* Enable the Peripharal */
-  __HAL_DAC_ENABLE(hdac, Channel);
-
-  tmp1 = hdac->Instance->CR & DAC_CR_TEN1;
-  tmp2 = hdac->Instance->CR & DAC_CR_TSEL1;
-  /* Check if software trigger enabled */
-  if((tmp1 ==  DAC_CR_TEN1) && (tmp2 ==  DAC_CR_TSEL1))
-  {
-    /* Enable the selected DAC software conversion */
-    SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
-  }
-
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_READY;
-
-  /* Process unlocked */
-  __HAL_UNLOCK(hdac);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enables DAC and starts conversion of channel using DMA.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  * @param  pData: The destination peripheral Buffer address.
-  * @param  Length: The length of data to be transferred from memory to DAC peripheral
-  * @param  Alignment: Specifies the data alignment for DAC channel.
-  *          This parameter can be one of the following values:
-  *            @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
-  *            @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
-  *            @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  assert_param(IS_DAC_ALIGN(Alignment));
-
-  /* Process locked */
-  __HAL_LOCK(hdac);
-
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-
-  /* Set the DMA transfer complete callback for channel1 */
-  hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
-
-  /* Set the DMA half transfer complete callback for channel1 */
-  hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
-
-  /* Set the DMA error callback for channel1 */
-  hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
-
-  /* Enable the selected DAC channel1 DMA request */
-  SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
-     
-  /* Case of use of channel 1 */
-  switch(Alignment)
-  {
-    case DAC_ALIGN_12B_R:
-      /* Get DHR12R1 address */
-      tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
-      break;
-    case DAC_ALIGN_12B_L:
-      /* Get DHR12L1 address */
-      tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
-      break;
-    case DAC_ALIGN_8B_R:
-      /* Get DHR8R1 address */
-      tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
-      break;
-    default:
-      break;
-  }
-  UNUSED(tmpreg);		/* avoid warning on tmpreg affectation with stupid compiler */
-  
-  /* Enable the DMA Stream */
-  /* Enable the DAC DMA underrun interrupt */
-  __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
-  
-  /* Enable the DMA Stream */
-  HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
-  
-  /* Enable the Peripharal */
-  __HAL_DAC_ENABLE(hdac, Channel);
-  
-  /* Process Unlocked */
-  __HAL_UNLOCK(hdac);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Disables DAC and stop conversion of channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-
-  /* Disable the selected DAC channel DMA request */
-  CLEAR_BIT(hdac->Instance->CR, (DAC_CR_DMAEN1 << Channel));
-
-  /* Disable the Peripharal */
-  __HAL_DAC_DISABLE(hdac, Channel);
-
-  /* Disable the DMA Channel */
-  status = HAL_DMA_Abort(hdac->DMA_Handle1);
-
-  /* Check if DMA Channel effectively disabled */
-  if(status != HAL_OK)
-  {
-    /* Update DAC state machine to error */
-    hdac->State = HAL_DAC_STATE_ERROR;
-  }
-  else
-  {
-    /* Change DAC state */
-    hdac->State = HAL_DAC_STATE_READY;
-  }
-
-  /* Return function status */
-  return status;
-}
-
-/**
-  * @brief  Returns the last data output value of the selected DAC channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  * @retval The selected DAC channel data output value.
-  */
-uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  
-  /* Returns the DAC channel data output register value */
-  return hdac->Instance->DOR1;
-}
-
-/**
-  * @brief  Handles DAC interrupt request
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
-{
-  /* Check underrun flag of DAC channel 1 */
-  if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
-  {
-    /* Change DAC state to error state */
-    hdac->State = HAL_DAC_STATE_ERROR;
-
-    /* Set DAC error code to chanel1 DMA underrun error */
-    hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
-
-    /* Clear the underrun flag */
-    __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
-
-    /* Disable the selected DAC channel1 DMA request */
-    CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
-
-    /* Error callback */
-    HAL_DAC_DMAUnderrunCallbackCh1(hdac);
-  }
-}
-
-/**
-  * @brief  Set the specified data holding register value for DAC channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  * @param  Alignment: Specifies the data alignment.
-  *          This parameter can be one of the following values:
-  *            @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
-  *            @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
-  *            @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
-  * @param  Data: Data to be loaded in the selected data holding register.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
-{
-  __IO uint32_t tmp = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  assert_param(IS_DAC_ALIGN(Alignment));
-  assert_param(IS_DAC_DATA(Data));
-
-  tmp = (uint32_t)hdac->Instance; 
-  tmp += DAC_DHR12R1_ALIGNEMENT(Alignment);
-
-  /* Set the DAC channel selected data holding register */
-  *(__IO uint32_t *) tmp = Data;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-#endif  /* #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup DACEx_Private
-  * @{
-  */
-#if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx)
-/**
-  * @brief  DMA conversion complete callback. 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)   
-{
-  DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  
-  HAL_DACEx_ConvCpltCallbackCh2(hdac); 
-  
-  hdac->State= HAL_DAC_STATE_READY;
-}
-
-/**
-  * @brief  DMA half transfer complete callback. 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)   
-{
-    DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-    /* Conversion complete callback */
-    HAL_DACEx_ConvHalfCpltCallbackCh2(hdac); 
-}
-
-/**
-  * @brief  DMA error callback 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)   
-{
-  DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-    
-  /* Set DAC error code to DMA error */
-  hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
-    
-  HAL_DACEx_ErrorCallbackCh2(hdac); 
-    
-  hdac->State= HAL_DAC_STATE_READY;
-}
-#endif /* STM32L072xx || STM32L073xx || STM32L082xx || STM32L083xx */
-
-/**
-  * @brief  DMA conversion complete callback. 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)   
-{
-  DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  
-  HAL_DAC_ConvCpltCallbackCh1(hdac); 
-  
-  hdac->State= HAL_DAC_STATE_READY;
-}
-
-/**
-  * @brief  DMA half transfer complete callback.
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
-{
-  DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  /* Conversion complete callback */
-  HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
-}
-
-/**
-  * @brief  DMA error callback
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
-{
-  DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-  /* Set DAC error code to DMA error */
-  hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
-
-  HAL_DAC_ErrorCallbackCh1(hdac);
-
-  hdac->State= HAL_DAC_STATE_READY;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* HAL_DAC_MODULE_ENABLED */
-#endif /* #if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c
deleted file mode 100755
index aae8a075..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c
+++ /dev/null
@@ -1,813 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_dma.c
-  * @author  MCD Application Team
-  * @brief   DMA HAL module driver.
-  *    
-  *         This file provides firmware functions to manage the following 
-  *         functionalities of the Direct Memory Access (DMA) peripheral:
-  *           + Initialization/de-initialization functions
-  *           + I/O operation functions
-  *           + Peripheral State functions
-  *  
-  *           
-  @verbatim     
-  ==============================================================================      
-                        ##### How to use this driver #####
-  ============================================================================== 
-  [..]
-   (#) Enable and configure the peripheral to be connected to the DMA Channel
-       (except for internal SRAM / FLASH memories: no initialization is 
-       necessary). 
-          
-   (#) For a given Channel, program the required configuration through the following parameters:   
-       Channel request, Transfer Direction, Source and Destination data formats, 
-       Circular, Normal or peripheral flow control mode, Channel Priority level, 
-       Source and Destination Increment mode using HAL_DMA_Init() function.
-   
-     *** Polling mode IO operation ***
-     =================================   
-    [..] 
-          (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source 
-              address and destination address and the Length of data to be transferred
-          (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this  
-              case a fixed Timeout can be configured by User depending from his application.
-               
-     *** Interrupt mode IO operation ***    
-     =================================== 
-    [..]     
-          (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
-          (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ() 
-          (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of  
-              Source address and destination address and the Length of data to be transferred. In this 
-              case the DMA interrupt is configured 
-          (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
-          (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can 
-              add his own function by customization of function pointer XferCpltCallback and 
-              XferErrorCallback (i.e a member of DMA handle structure). 
-                
-   (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error 
-       detection.
-         
-   (#) Use HAL_DMA_Abort() function to abort the current transfer              
-                   
-   -@-   In Memory-to-Memory transfer mode, Circular mode is not allowed.          
-  
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-#ifdef HAL_DMA_MODULE_ENABLED
-
-/** @addtogroup DMA DMA
-  * @brief DMA HAL module driver
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/  
-/** @addtogroup DMA_Private
-  *
-  * @{
-  */
-#define HAL_TIMEOUT_DMA_ABORT    ((uint32_t)1000U)  /* 1s  */
-
-
-static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
-/**
-  * @}
-  */
-
-/** @addtogroup DMA_Exported_Functions DMA Exported Functions
-  * @{
-  */
-
-/** @addtogroup DMA_Exported_Functions_Group1 
- *  @brief   Initialization/de-initialization functions 
- *
-@verbatim   
- ===============================================================================
-             ##### Initialization and de-initialization functions  #####
- ===============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Initialize and configure the DMA
-      (+) De-Initialize the DMA 
-
-@endverbatim
-  * @{
-  */
-  
-/**
-  * @brief  Initializes the DMA according to the specified
-  *         parameters in the DMA_InitTypeDef and create the associated handle.
-  * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA Channel.  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
-{ 
-  uint32_t tmp = 0U;
-  
-  /* Check the DMA peripheral state */
-  if(hdma == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
-  assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request));
-  assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
-  assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
-  assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
-  assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
-  assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
-  assert_param(IS_DMA_MODE(hdma->Init.Mode));
-  assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
-  
-  if(hdma->State == HAL_DMA_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hdma->Lock = HAL_UNLOCKED;
-  }
-
-  /* Change DMA peripheral state */
-  hdma->State = HAL_DMA_STATE_BUSY;
-
-  /* Get the CR register value */
-  tmp = hdma->Instance->CCR;
-  
-  /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */
-  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
-                      DMA_CCR_MINC  | DMA_CCR_PINC   | DMA_CCR_CIRC   | \
-                      DMA_CCR_DIR));
-  
-  /* Prepare the DMA Channel configuration */
-  tmp |=  hdma->Init.Direction        |
-          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
-          hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
-          hdma->Init.Mode                | hdma->Init.Priority;
-
-  /* Write to DMA Channel CR register */
-  hdma->Instance->CCR = tmp;  
-  
-  /* Write to DMA channel selection register */
-  if (hdma->Instance == DMA1_Channel1)
-  {
-    /*Reset request selection for DMA1 Channel1*/
-    DMA1_CSELR->CSELR &= ~DMA_CSELR_C1S;
-    
-    /* Configure request selection for DMA1 Channel1 */
-    DMA1_CSELR->CSELR |= hdma->Init.Request;
-  }
-  else if (hdma->Instance == DMA1_Channel2)
-  {
-    /*Reset request selection for DMA1 Channel2*/
-    DMA1_CSELR->CSELR &= ~DMA_CSELR_C2S;
-    
-    /* Configure request selection for DMA1 Channel2 */
-    DMA1_CSELR->CSELR |= (uint32_t)(hdma->Init.Request << 4U);
-  }
-  else if (hdma->Instance == DMA1_Channel3)
-  {
-    /*Reset request selection for DMA1 Channel3*/
-    DMA1_CSELR->CSELR &= ~DMA_CSELR_C3S;
-    
-    /* Configure request selection for DMA1 Channel3 */
-    DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 8U);
-  }
-  else if (hdma->Instance == DMA1_Channel4)
-  {
-    /*Reset request selection for DMA1 Channel4*/
-    DMA1_CSELR->CSELR &= ~DMA_CSELR_C4S;
-    
-    /* Configure request selection for DMA1 Channel4 */
-    DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 12U);
-  }
-  else if (hdma->Instance == DMA1_Channel5)
-  {
-    /*Reset request selection for DMA1 Channel5*/
-    DMA1_CSELR->CSELR &= ~DMA_CSELR_C5S;
-    
-    /* Configure request selection for DMA1 Channel5 */
-    DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 16U);
-  }
-#if !defined (STM32L011xx) && !defined (STM32L021xx)
-  else if (hdma->Instance == DMA1_Channel6)
-  {
-    /*Reset request selection for DMA1 Channel6*/
-    DMA1_CSELR->CSELR &= ~DMA_CSELR_C6S;
-    
-    /* Configure request selection for DMA1 Channel6 */
-    DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 20U);
-  }
-  else if (hdma->Instance == DMA1_Channel7)
-  {
-    /*Reset request selection for DMA1 Channel7*/
-    DMA1_CSELR->CSELR &= ~DMA_CSELR_C7S;
-    
-    /* Configure request selection for DMA1 Channel7 */
-    DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 24U);
-  }
-#endif   
-  /* Initialize the DMA state*/
-  hdma->State  = HAL_DMA_STATE_READY;
-  
-  return HAL_OK;
-}  
-  
-/**
-  * @brief  DeInitializes the DMA peripheral 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA Channel.  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
-{
-  /* Check the DMA peripheral state */
-  if(hdma == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the DMA peripheral state */
-  if(hdma->State == HAL_DMA_STATE_BUSY)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Disable the selected DMA Channelx */
-  __HAL_DMA_DISABLE(hdma);
-  
-  /* Reset DMA Channel control register */
-  hdma->Instance->CCR  = 0U;
-  
-  /* Reset DMA Channel Number of Data to Transfer register */
-  hdma->Instance->CNDTR = 0U;
-  
-  /* Reset DMA Channel peripheral address register */
-  hdma->Instance->CPAR  = 0U;
-  
-  /* Reset DMA Channel memory address register */
-  hdma->Instance->CMAR = 0U;
-
-  /* Clear all flags */
-  __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
-  __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
-  __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
-  __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
-  
-  /* Reset DMA channel selection register */
-  if (hdma->Instance == DMA1_Channel1)
-  {
-    /*Reset DMA request*/
-    DMA1_CSELR->CSELR &= ~DMA_CSELR_C1S;
-  }
-  else if (hdma->Instance == DMA1_Channel2)
-  {
-    /*Reset DMA request*/
-    DMA1_CSELR->CSELR &= ~DMA_CSELR_C2S;
-  }
-  else if (hdma->Instance == DMA1_Channel3)
-  {
-    /*Reset DMA request*/
-    DMA1_CSELR->CSELR &= ~DMA_CSELR_C3S;
-  }
-  else if (hdma->Instance == DMA1_Channel4)
-  {
-    /*Reset DMA request*/
-    DMA1_CSELR->CSELR &= ~DMA_CSELR_C4S;
-  }
-  else if (hdma->Instance == DMA1_Channel5)
-  {
-    /*Reset DMA request*/
-    DMA1_CSELR->CSELR &= ~DMA_CSELR_C5S;
-  }
-#if !defined (STM32L011xx) && !defined (STM32L021xx)
-  else if (hdma->Instance == DMA1_Channel6)
-  {
-    /*Reset DMA request*/
-    DMA1_CSELR->CSELR &= ~DMA_CSELR_C6S;
-  }
-  else if (hdma->Instance == DMA1_Channel7)
-  {
-    /*Reset DMA request*/
-    DMA1_CSELR->CSELR &= ~DMA_CSELR_C7S;
-  }
-#endif  
-  /* Initialise the error code */
-  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
-
-  /* Initialize the DMA state */
-  hdma->State = HAL_DMA_STATE_RESET;
-  
-  /* Release Lock */
-  __HAL_UNLOCK(hdma);
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup DMA_Exported_Functions_Group2  
- *  @brief   I/O operation functions  
- *
-@verbatim   
- ===============================================================================
-                      #####  IO operation functions  #####
- ===============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Configure the source, destination address and data length and Start DMA transfer
-      (+) Configure the source, destination address and data length and 
-          Start DMA transfer with interrupt
-      (+) Abort DMA transfer
-      (+) Poll for transfer complete
-      (+) Handle DMA interrupt request  
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Starts the DMA Transfer.
-  * @param  hdma      : pointer to a DMA_HandleTypeDef structure that contains
-  *                     the configuration information for the specified DMA Channel.  
-  * @param  SrcAddress: The source memory Buffer address
-  * @param  DstAddress: The destination memory Buffer address
-  * @param  DataLength: The length of data to be transferred from source to destination
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
-{ 
-  /* Process locked */
-  __HAL_LOCK(hdma);  
-
-  /* Change DMA peripheral state */  
-  hdma->State = HAL_DMA_STATE_BUSY;  
-
-   /* Check the parameters */
-  assert_param(IS_DMA_BUFFER_SIZE(DataLength));
-  
-  /* Disable the peripheral */
-  __HAL_DMA_DISABLE(hdma);  
-  
-  /* Configure the source, destination address and the data length */
-  DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
-
-  /* Enable the Peripheral */
-  __HAL_DMA_ENABLE(hdma);  
-
-  return HAL_OK; 
-} 
-
-/**
-  * @brief  Start the DMA Transfer with interrupt enabled.
-  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
-  *                     the configuration information for the specified DMA Channel.  
-  * @param  SrcAddress: The source memory Buffer address
-  * @param  DstAddress: The destination memory Buffer address
-  * @param  DataLength: The length of data to be transferred from source to destination
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
-{
-  /* Process locked */
-  __HAL_LOCK(hdma);
-
-  /* Change DMA peripheral state */  
-  hdma->State = HAL_DMA_STATE_BUSY;  
-
-   /* Check the parameters */
-  assert_param(IS_DMA_BUFFER_SIZE(DataLength));
-  
-  /* Disable the peripheral */
-  __HAL_DMA_DISABLE(hdma);
-  
-  /* Configure the source, destination address and the data length */  
-  DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
-  
-  /* Enable the transfer complete interrupt */
-  __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC);
-
-  /* Enable the Half transfer complete interrupt */
-  __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT);  
-
-  /* Enable the transfer Error interrupt */
-  __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE);
-  
-   /* Enable the Peripheral */
-  __HAL_DMA_ENABLE(hdma);   
-  
-  return HAL_OK;    
-} 
-
-/**
-  * @brief  Aborts the DMA Transfer.
-  * @param  hdma  : pointer to a DMA_HandleTypeDef structure that contains
-  *                 the configuration information for the specified DMA Channel.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
-{
-  uint32_t tickstart = 0U;
-  
-  /* Disable the channel */
-  __HAL_DMA_DISABLE(hdma);
-  
-  /* Get timeout */
-  tickstart = HAL_GetTick();
-  
-  /* Check if the DMA Channel is effectively disabled */
-  while((hdma->Instance->CCR & DMA_CCR_EN) != 0U) 
-  {
-    /* Check for the Timeout */
-    if( (HAL_GetTick()  - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
-    {
-      /* Update error code */
-      hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT;
-      
-      /* Process Unlocked */
-      __HAL_UNLOCK(hdma);
-      
-      /* Change the DMA state */
-      hdma->State = HAL_DMA_STATE_TIMEOUT;
-      
-      return HAL_TIMEOUT;
-    }
-  }
-  /* Process Unlocked */
-  __HAL_UNLOCK(hdma);
-  
-  /* Change the DMA state*/
-  hdma->State = HAL_DMA_STATE_READY; 
-  
-  return HAL_OK; 
-}
-
-/**
-  * @brief  Aborts the DMA Transfer in Interrupt mode.
-  * @param  hdma  : pointer to a DMA_HandleTypeDef structure that contains
-  *                 the configuration information for the specified DMA Stream.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
-{  
-  HAL_StatusTypeDef status = HAL_OK;
-  
-  if(HAL_DMA_STATE_BUSY != hdma->State)
-  {
-    /* no transfer ongoing */
-    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
-        
-    status = HAL_ERROR;
-  }
-  else
-  { 
-    /* Disable DMA IT */
-    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
-    
-    /* Disable the channel */
-    __HAL_DMA_DISABLE(hdma);
-    
-    /* Clear all flags */
-    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
-    
-    /* Change the DMA state */
-    hdma->State = HAL_DMA_STATE_READY;
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hdma);
-    
-    /* Call User Abort callback */ 
-    if(hdma->XferAbortCallback != NULL)
-    {
-      hdma->XferAbortCallback(hdma);
-    } 
-  }
-  return status;
-}
-
-/**
-  * @brief  Polling for transfer complete.
-  * @param  hdma:    pointer to a DMA_HandleTypeDef structure that contains
-  *                  the configuration information for the specified DMA Channel.
-  * @param  CompleteLevel: Specifies the DMA level complete.  
-  * @param  Timeout:       Timeout duration.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
-{
-  uint32_t temp;
-  uint32_t tickstart = 0U;
-  
-  /* Get the level transfer complete flag */
-  if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
-  {
-    /* Transfer Complete flag */
-    temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma);
-  }
-  else
-  {
-    /* Half Transfer Complete flag */
-    temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma);
-  }
-
-  /* Get timeout */
-  tickstart = HAL_GetTick();
-
-  while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET)
-  {
-    if((__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET))
-    {      
-      /* Clear the transfer error flags */
-      __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
-      
-      /* Update error code */
-      SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TE);
-      
-      /* Change the DMA state */
-      hdma->State= HAL_DMA_STATE_ERROR;       
-      
-      /* Process Unlocked */
-      __HAL_UNLOCK(hdma);
-      
-      return HAL_ERROR;      
-    }      
-    /* Check for the Timeout */
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
-      {
-        /* Update error code */
-        SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TIMEOUT);
-        
-        /* Change the DMA state */
-        hdma->State= HAL_DMA_STATE_TIMEOUT;
-        
-        /* Process Unlocked */
-        __HAL_UNLOCK(hdma);
-      
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
-  {
-    /* Clear the transfer complete flag */
-    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
-
-    /* The selected Channelx EN bit is cleared (DMA is disabled and 
-    all transfers are complete) */
-    hdma->State = HAL_DMA_STATE_READY;
-
-    /* Process unlocked */
-    __HAL_UNLOCK(hdma);  
-  }
-  else
-  { 
-    /* Clear the half transfer complete flag */
-    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
-
-    /* The selected Channelx EN bit is cleared (DMA is disabled and 
-    all transfers are complete) */
-    hdma->State = HAL_DMA_STATE_READY_HALF;
-    
-    /* Process unlocked */
-    __HAL_UNLOCK(hdma); 
-  }
-  
-  return HAL_OK;
-}
-/**
-  * @brief  Handles DMA interrupt request.
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA Channel.  
-  * @retval None
-  */
-void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
-{        
-  /* Transfer Error Interrupt management ***************************************/
-  if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET)
-  {
-    if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET)
-    {
-      /* Disable the transfer error interrupt */
-      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE);
-    
-      /* Clear the transfer error flag */
-      __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
-    
-      /* Update error code */
-      hdma->ErrorCode |= HAL_DMA_ERROR_TE;
-
-      /* Change the DMA state */
-      hdma->State = HAL_DMA_STATE_ERROR;    
-    
-      /* Process Unlocked */
-      __HAL_UNLOCK(hdma); 
-    
-      if (hdma->XferErrorCallback != NULL)
-      {
-        /* Transfer error callback */
-        hdma->XferErrorCallback(hdma);
-      }
-    }
-  }
-
-  /* Half Transfer Complete Interrupt management ******************************/
-  if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)) != RESET)
-  {
-    if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET)
-    { 
-      /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
-      if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
-      {
-        /* Disable the half transfer interrupt */
-        __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
-      }
-      /* Clear the half transfer complete flag */
-      __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
-
-      /* Change DMA peripheral state */
-      hdma->State = HAL_DMA_STATE_READY_HALF;
-
-      if(hdma->XferHalfCpltCallback != NULL)
-      {
-        /* Half transfer callback */
-        hdma->XferHalfCpltCallback(hdma);
-      }
-    }
-  }
-  
-  /* Transfer Complete Interrupt management ***********************************/
-  if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)) != RESET)
-  {
-    if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET)
-    {
-      if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
-      {
-        /* Disable the transfer complete interrupt */
-        __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TC);
-      }
-      /* Clear the transfer complete flag */
-      __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
-    
-      /* Update error code */
-      hdma->ErrorCode |= HAL_DMA_ERROR_NONE;
-
-      /* Change the DMA state */
-      hdma->State = HAL_DMA_STATE_READY;    
-    
-      /* Process Unlocked */
-      __HAL_UNLOCK(hdma);
-    
-      if(hdma->XferCpltCallback != NULL)
-      {       
-        /* Transfer complete callback */
-        hdma->XferCpltCallback(hdma);
-      }
-    }
-  }
-}  
-
-/**
-  * @}
-  */
-
-/** @addtogroup DMA_Exported_Functions_Group3 
- *  @brief    Peripheral State functions 
- *
-@verbatim   
- ===============================================================================
-                        ##### Peripheral State functions #####
- ===============================================================================  
-    [..]
-    This subsection provides functions allowing to
-      (+) Check the DMA state
-      (+) Get error code
-
-@endverbatim
-  * @{
-  */  
-
-/**
-  * @brief  Returns the DMA state.
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA Channel.  
-  * @retval HAL state
-  */
-HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
-{
-  return hdma->State;
-}
-
-/**
-  * @brief  Return the DMA error code
-  * @param  hdma : pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA Channel.
-  * @retval DMA Error Code
-  */
-uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
-{
-  return hdma->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-
-/* Private function prototypes -----------------------------------------------*/  
-/** @addtogroup DMA_Private
-  * @{
-  */
-  
-  /*
-  * @brief  Sets the DMA Transfer parameter.
-  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
-  *                     the configuration information for the specified DMA Channel.  
-  * @param  SrcAddress: The source memory Buffer address
-  * @param  DstAddress: The destination memory Buffer address
-  * @param  DataLength: The length of data to be transferred from source to destination
-  * @retval HAL status
-  */
-static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
-{  
-  /* Configure DMA Channel data length */
-  hdma->Instance->CNDTR = DataLength;
-  
-  /* Peripheral to Memory */
-  if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
-  {   
-    /* Configure DMA Channel destination address */
-    hdma->Instance->CPAR = DstAddress;
-    
-    /* Configure DMA Channel source address */
-    hdma->Instance->CMAR = SrcAddress;
-  }
-  /* Memory to Peripheral */
-  else
-  {
-    /* Configure DMA Channel source address */
-    hdma->Instance->CPAR = SrcAddress;
-    
-    /* Configure DMA Channel destination address */
-    hdma->Instance->CMAR = DstAddress;
-  }
-}
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_DMA_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_firewall.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_firewall.c
deleted file mode 100755
index fccaf00e..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_firewall.c
+++ /dev/null
@@ -1,305 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_firewall.c
-  * @author  MCD Application Team
-  * @brief   FIREWALL HAL module driver.
-  *          This file provides firmware functions to manage the Firewall
-  *          Peripheral initialization and enabling.
-  *
-  *
-  @verbatim
- ===============================================================================
-                        ##### How to use this driver ##### 
- ===============================================================================
-  [..]
-    The FIREWALL HAL driver can be used as follows:
-              
-    (#) Declare a FIREWALL_InitTypeDef initialization structure.
-  
-    (#) Resort to HAL_FIREWALL_Config() API to initialize the Firewall
-
-    (#) Enable the FIREWALL in calling HAL_FIREWALL_EnableFirewall() API
-    
-    (#) To ensure that any code executed outside the protected segment closes the
-        FIREWALL, the user must set the flag FIREWALL_PRE_ARM_SET in calling 
-        __HAL_FIREWALL_PREARM_ENABLE() macro if called within a protected code segment
-        or
-        HAL_FIREWALL_EnablePreArmFlag() API if called outside of protected code segment
-        after HAL_FIREWALL_Config() call.
-
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-#if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_FIREWALL_MODULE_ENABLED
-
-/** @addtogroup FIREWALL
-  * @brief HAL FIREWALL module driver
-  * @{
-  */
-
-    
-
-/** @addtogroup FIREWALL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup FIREWALL_Exported_Functions_Group1
-  * @brief    Initialization and Configuration Functions 
-  *
-@verbatim    
-===============================================================================
-            ##### Initialization and Configuration functions #####
- ===============================================================================
-    [..]
-    This subsection provides the functions allowing to initialize the Firewall.
-    Initialization is done by HAL_FIREWALL_Config(): 
-
-      (+) Enable the Firewall clock thru __HAL_RCC_FIREWALL_CLK_ENABLE() macro.
-           
-      (+) Set the protected code segment address start and length.
-          
-      (+) Set the protected non-volatile and/or volatile data segments 
-          address starts and lengths if applicable.          
-          
-      (+) Set the volatile data segment execution and sharing status.
-      
-      (+) Length must be set to 0 for an unprotected segment.      
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Initialize the Firewall according to the FIREWALL_InitTypeDef structure parameters.
-  * @param fw_init: Firewall initialization structure
-  * @note  The API returns HAL_ERROR if the Firewall is already enabled.     
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_FIREWALL_Config(FIREWALL_InitTypeDef * fw_init)
-{
-  /* Check the Firewall initialization structure allocation */
-  if(fw_init == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Enable Firewall clock */
-  __HAL_RCC_FIREWALL_CLK_ENABLE();
-
-  /* Make sure that Firewall is not enabled already */
-  if (__HAL_FIREWALL_IS_ENABLED() != RESET)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check Firewall configuration addresses and lengths when segment is protected */
-  /* Code segment */
-  if (fw_init->CodeSegmentLength != 0U)
-  {
-    assert_param(IS_FIREWALL_CODE_SEGMENT_ADDRESS(fw_init->CodeSegmentStartAddress));
-    assert_param(IS_FIREWALL_CODE_SEGMENT_LENGTH(fw_init->CodeSegmentStartAddress, fw_init->CodeSegmentLength));  
-  }
-  /* Non volatile data segment */
-  if (fw_init->NonVDataSegmentLength != 0U)
-  {
-    assert_param(IS_FIREWALL_NONVOLATILEDATA_SEGMENT_ADDRESS(fw_init->NonVDataSegmentStartAddress));
-    assert_param(IS_FIREWALL_NONVOLATILEDATA_SEGMENT_LENGTH(fw_init->NonVDataSegmentStartAddress, fw_init->NonVDataSegmentLength));  
-  }
-  /* Volatile data segment */
-  if (fw_init->VDataSegmentLength != 0U)
-  {
-    assert_param(IS_FIREWALL_VOLATILEDATA_SEGMENT_ADDRESS(fw_init->VDataSegmentStartAddress));
-    assert_param(IS_FIREWALL_VOLATILEDATA_SEGMENT_LENGTH(fw_init->VDataSegmentStartAddress, fw_init->VDataSegmentLength));  
-  }
-  
-  /* Check Firewall Configuration Register parameters */
-  assert_param(IS_FIREWALL_VOLATILEDATA_EXECUTE(fw_init->VolatileDataExecution));
-  assert_param(IS_FIREWALL_VOLATILEDATA_SHARE(fw_init->VolatileDataShared));
-  
-  
-   /* Configuration */
-  
-  /* Protected code segment start address configuration */
-  WRITE_REG(FIREWALL->CSSA, (FW_CSSA_ADD & fw_init->CodeSegmentStartAddress));
-	/* Protected code segment length configuration */
-  WRITE_REG(FIREWALL->CSL, (FW_CSL_LENG & fw_init->CodeSegmentLength));
-  
-  /* Protected non volatile data segment start address configuration */
-  WRITE_REG(FIREWALL->NVDSSA, (FW_NVDSSA_ADD & fw_init->NonVDataSegmentStartAddress));
-	/* Protected non volatile data segment length configuration */
-  WRITE_REG(FIREWALL->NVDSL, (FW_NVDSL_LENG & fw_init->NonVDataSegmentLength));
-  
-  /* Protected volatile data segment start address configuration */
-  WRITE_REG(FIREWALL->VDSSA, (FW_VDSSA_ADD & fw_init->VDataSegmentStartAddress));
-	/* Protected volatile data segment length configuration */
-  WRITE_REG(FIREWALL->VDSL, (FW_VDSL_LENG & fw_init->VDataSegmentLength));  
-  
-  /* Set Firewall Configuration Register VDE and VDS bits
-     (volatile data execution and shared configuration) */  
-  MODIFY_REG(FIREWALL->CR, FW_CR_VDS|FW_CR_VDE, fw_init->VolatileDataExecution|fw_init->VolatileDataShared);
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief Retrieve the Firewall configuration.
-  * @param fw_config: Firewall configuration, type is same as initialization structure
-  * @note This API can't be executed inside a code area protected by the Firewall
-  *       when the Firewall is enabled
-  * @note If NVDSL register is different from 0, that is, if the non volatile data segment 
-  *       is defined, this API can't be executed when the Firewall is enabled.      
-  * @note User should resort to __HAL_FIREWALL_GET_PREARM() macro to retrieve FPA bit status            
-  * @retval None
-  */
-void HAL_FIREWALL_GetConfig(FIREWALL_InitTypeDef * fw_config)
-{
-
-  /* Enable Firewall clock, in case no Firewall configuration has been carried 
-     out up to this point */
-  __HAL_RCC_FIREWALL_CLK_ENABLE();
-
-  /* Retrieve code segment protection setting */
-  fw_config->CodeSegmentStartAddress = (READ_REG(FIREWALL->CSSA) & FW_CSSA_ADD);
-  fw_config->CodeSegmentLength = (READ_REG(FIREWALL->CSL) & FW_CSL_LENG);
-  
-  /* Retrieve non volatile data segment protection setting */
-  fw_config->NonVDataSegmentStartAddress = (READ_REG(FIREWALL->NVDSSA) & FW_NVDSSA_ADD);
-  fw_config->NonVDataSegmentLength = (READ_REG(FIREWALL->NVDSL) & FW_NVDSL_LENG);
-  
-  /* Retrieve volatile data segment protection setting */
-  fw_config->VDataSegmentStartAddress = (READ_REG(FIREWALL->VDSSA) & FW_VDSSA_ADD);
-  fw_config->VDataSegmentLength = (READ_REG(FIREWALL->VDSL) & FW_VDSL_LENG);     
-  
-  /* Retrieve volatile data execution setting */
-  fw_config->VolatileDataExecution = (READ_REG(FIREWALL->CR) & FW_CR_VDE);
-  
-  /* Retrieve volatile data shared setting */
-  fw_config->VolatileDataShared = (READ_REG(FIREWALL->CR) & FW_CR_VDS);
-  
-  return;
-}
-
-
-
-/**
-  * @brief Enable FIREWALL. 
-  * @note Firewall is enabled in clearing FWDIS bit of SYSCFG CFGR1 register.
-  *       Once enabled, the Firewall cannot be disabled by software. Only a 
-  *       system reset can set again FWDIS bit.           
-  * @retval None
-  */
-void HAL_FIREWALL_EnableFirewall(void)
-{
-  /* Clears FWDIS bit of SYSCFG CFGR1 register */
-  CLEAR_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_FWDISEN);
-  
-}
-
-/**
-  * @brief Enable FIREWALL pre arm. 
-  * @note When FPA bit is set, any code executed outside the protected segment 
-  *       will close the Firewall. 
-  * @note This API provides the same service as __HAL_FIREWALL_PREARM_ENABLE() macro
-  *       but can't be executed inside a code area protected by the Firewall. 
-  * @note When the Firewall is disabled, user can resort to HAL_FIREWALL_EnablePreArmFlag() API any time.   
-  * @note When the Firewall is enabled and NVDSL register is equal to 0 (that is, 
-  *          when the non volatile data segment is not defined),
-  *          **  this API can be executed when the Firewall is closed
-  *          **  when the Firewall is opened, user should resort to 
-  *              __HAL_FIREWALL_PREARM_ENABLE() macro instead
-  * @note When the Firewall is enabled and  NVDSL register is different from 0
-  *          (that is, when the non volatile data segment is defined)
-  *          **  FW_CR register can be accessed only when the Firewall is opened: 
-  *              user should resort to  __HAL_FIREWALL_PREARM_ENABLE() macro instead.               
-  * @retval None
-  */
-void HAL_FIREWALL_EnablePreArmFlag(void)
-{
-  /* Set FPA bit */
-  SET_BIT(FIREWALL->CR, FW_CR_FPA);
-}
-
-
-/**
-  * @brief Disable FIREWALL pre arm.
-  * @note When FPA bit is reset, any code executed outside the protected segment 
-  *       when the Firewall is opened will generate a system reset.
-  * @note This API provides the same service as __HAL_FIREWALL_PREARM_DISABLE() macro
-  *       but can't be executed inside a code area protected by the Firewall.
-  * @note When the Firewall is disabled, user can resort to HAL_FIREWALL_EnablePreArmFlag() API any time.   
-  * @note When the Firewall is enabled and NVDSL register is equal to 0 (that is, 
-  *          when the non volatile data segment is not defined),
-  *          **  this API can be executed when the Firewall is closed
-  *          **  when the Firewall is opened, user should resort to 
-  *              __HAL_FIREWALL_PREARM_DISABLE() macro instead
-  * @note When the Firewall is enabled and  NVDSL register is different from 0
-  *          (that is, when the non volatile data segment is defined)
-  *          **  FW_CR register can be accessed only when the Firewall is opened: 
-  *              user should resort to  __HAL_FIREWALL_PREARM_DISABLE() macro instead.               
-          
-  * @retval None
-  */
-void HAL_FIREWALL_DisablePreArmFlag(void)
-{
-  /* Clear FPA bit */
-  CLEAR_BIT(FIREWALL->CR, FW_CR_FPA);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_FIREWALL_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-#endif /* #if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c
deleted file mode 100755
index 5d8dbfe7..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c
+++ /dev/null
@@ -1,751 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_flash.c
-  * @author  MCD Application Team
-  * @brief   FLASH HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the internal FLASH memory:
-  *           + Program operations functions
-  *           + Memory Control functions 
-  *           + Peripheral State functions
-  *         
-  @verbatim
-  ==============================================================================
-                        ##### FLASH peripheral features #####
-  ==============================================================================
-  [..] The Flash memory interface manages CPU AHB I-Code and D-Code accesses 
-       to the Flash memory. It implements the erase and program Flash memory operations 
-       and the read and write protection mechanisms.
-
-  [..] The Flash memory interface accelerates code execution with a system of instruction
-      prefetch. 
-
-  [..] The FLASH main features are:
-      (+) Flash memory read operations
-      (+) Flash memory program/erase operations
-      (+) Read / write protections
-      (+) Prefetch on I-Code
-      (+) Option Bytes programming
-
-
-                     ##### How to use this driver #####
-  ==============================================================================
-  [..]                             
-      This driver provides functions and macros to configure and program the FLASH 
-      memory of all STM32L0xx devices.
-    
-      (#) FLASH Memory I/O Programming functions: this group includes all needed
-          functions to erase and program the main memory:
-        (++) Lock and Unlock the FLASH interface
-        (++) Erase function: Erase page
-        (++) Program functions: Fast Word and Half Page(should be 
-        executed from internal SRAM).
-  
-      (#) DATA EEPROM Programming functions: this group includes all 
-          needed functions to erase and program the DATA EEPROM memory:
-        (++) Lock and Unlock the DATA EEPROM interface.
-        (++) Erase function: Erase Byte, erase HalfWord, erase Word, erase 
-             Double Word (should be executed from internal SRAM).
-        (++) Program functions: Fast Program Byte, Fast Program Half-Word, 
-             FastProgramWord, Program Byte, Program Half-Word, 
-             Program Word and Program Double-Word (should be executed 
-             from internal SRAM).
-
-      (#) FLASH Option Bytes Programming functions: this group includes all needed
-          functions to manage the Option Bytes:
-        (++) Lock and Unlock the Option Bytes
-        (++) Set/Reset the write protection
-        (++) Set the Read protection Level
-        (++) Program the user Option Bytes
-        (++) Launch the Option Bytes loader
-        (++) Set/Get the Read protection Level.
-        (++) Set/Get the BOR level.
-        (++) Get the Write protection.
-        (++) Get the user option bytes.
-    
-      (#) Interrupts and flags management functions : this group 
-          includes all needed functions to:
-        (++) Handle FLASH interrupts
-        (++) Wait for last FLASH operation according to its status
-        (++) Get error flag status
-
-    (#) FLASH Interface configuration functions: this group includes 
-      the management of following features:
-      (++) Enable/Disable the RUN PowerDown mode.
-      (++) Enable/Disable the SLEEP PowerDown mode.  
-  
-    (#) FLASH Peripheral State methods: this group includes 
-      the management of following features:
-      (++) Wait for the FLASH operation
-      (++)  Get the specific FLASH error flag
-    
-  [..] In addition to these function, this driver includes a set of macros allowing
-       to handle the following operations:
-      
-      (+) Set/Get the latency
-      (+) Enable/Disable the prefetch buffer
-      (+) Enable/Disable the preread buffer
-      (+) Enable/Disable the Flash power-down
-      (+) Enable/Disable the FLASH interrupts
-      (+) Monitor the FLASH flags status
-          
-                 ##### Programming operation functions #####
-  ===============================================================================  
-     [..]
-     This subsection provides a set of functions allowing to manage the FLASH 
-     program operations.
-  
-    [..] The FLASH Memory Programming functions, includes the following functions:
-     (+) HAL_FLASH_Unlock(void);
-     (+) HAL_FLASH_Lock(void);
-     (+) HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data)
-     (+) HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint32_t Data)
-    
-     [..] Any operation of erase or program should follow these steps:
-     (#) Call the HAL_FLASH_Unlock() function to enable the flash control register and 
-         program memory access.
-     (#) Call the desired function to erase page or program data.
-     (#) Call the HAL_FLASH_Lock() to disable the flash program memory access 
-        (recommended to protect the FLASH memory against possible unwanted operation).
-  
-               ##### Option Bytes Programming functions ##### 
-   ==============================================================================  
-  
-     [..] The FLASH_Option Bytes Programming_functions, includes the following functions:
-     (+) HAL_FLASH_OB_Unlock(void);
-     (+) HAL_FLASH_OB_Lock(void);
-     (+) HAL_FLASH_OB_Launch(void);
-     (+) HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
-     (+) HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
-    
-     [..] Any operation of erase or program should follow these steps:
-     (#) Call the HAL_FLASH_OB_Unlock() function to enable the Flash option control 
-         register access.
-     (#) Call the following functions to program the desired option bytes.
-         (++) HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);      
-     (#) Once all needed option bytes to be programmed are correctly written, call the
-         HAL_FLASH_OB_Launch(void) function to launch the Option Bytes programming process.
-     (#) Call the HAL_FLASH_OB_Lock() to disable the Flash option control register access (recommended
-         to protect the option Bytes against possible unwanted operations).
-  
-    [..] Proprietary code Read Out Protection (PcROP):    
-    (#) The PcROP sector is selected by using the same option bytes as the Write
-        protection. As a result, these 2 options are exclusive each other.
-    (#) To activate PCROP mode for Flash sectors(s), you need to follow the sequence below:
-        (++) Use this function HAL_FLASHEx_AdvOBProgram with PCROPState = OB_PCROP_STATE_ENABLE.
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-
-/** @defgroup FLASH FLASH
-  * @brief FLASH HAL module driver
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup FLASH_Private_Constants FLASH Private Constants
-  * @{
-  */
-/**
-  * @}
-  */
-
-/* Private macro ---------------------------- ---------------------------------*/
-/** @defgroup FLASH_Private_Macros FLASH Private Macros
-  * @{
-  */
- 
-/**
-  * @}
-  */
-
-/* Private variables ---------------------------------------------------------*/
-/** @defgroup FLASH_Private_Variables FLASH Private Variables
-  * @{
-  */
-/* Variables used for Erase pages under interruption*/
-FLASH_ProcessTypeDef pFlash;
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup FLASH_Private_Functions FLASH Private Functions
-  * @{
-  */
-static  void   FLASH_SetErrorCode(void);
-extern void    FLASH_PageErase(uint32_t PageAddress);
-/**
-  * @}
-  */
-
-/* Exported functions ---------------------------------------------------------*/
-/** @defgroup FLASH_Exported_Functions FLASH Exported Functions
-  * @{
-  */
-  
-/** @defgroup FLASH_Exported_Functions_Group1 Programming operation functions 
-  *  @brief   Programming operation functions 
-  *
-@verbatim   
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Program word at a specified address
-  * @note   To correctly run this function, the HAL_FLASH_Unlock() function
-  *         must be called before.
-  *         Call the HAL_FLASH_Lock() to disable the flash memory access
-  *         (recommended to protect the FLASH memory against possible unwanted operation).
-  *
-  * @param  TypeProgram   Indicate the way to program at a specified address.
-  *                       This parameter can be a value of @ref FLASH_Type_Program
-  * @param  Address       Specifie the address to be programmed.
-  * @param  Data          Specifie the data to be programmed
-  * 
-  * @retval HAL_StatusTypeDef HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data)
-{
-  HAL_StatusTypeDef status = HAL_ERROR;
-  
-  /* Process Locked */
-  __HAL_LOCK(&pFlash);
-
-  /* Check the parameters */
-  assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram));
-  assert_param(IS_FLASH_PROGRAM_ADDRESS(Address));
-
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  
-  if(status == HAL_OK)
-  {
-    /* Clean the error context */
-    pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-    /*Program word (32-bit) at a specified address.*/
-    *(__IO uint32_t *)Address = Data;
-
-    /* Wait for last operation to be completed */
-    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(&pFlash);
-
-  return status;
-}
-
-/**
-  * @brief   Program word at a specified address  with interrupt enabled.
-  *
-  * @param  TypeProgram  Indicate the way to program at a specified address.
-  *                      This parameter can be a value of @ref FLASH_Type_Program
-  * @param  Address      Specifie the address to be programmed.
-  * @param  Data         Specifie the data to be programmed
-  * 
-  * @retval HAL_StatusTypeDef HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint32_t Data)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  
-  /* Process Locked */
-  __HAL_LOCK(&pFlash);
-
-  /* Check the parameters */
-  assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram));
-  assert_param(IS_FLASH_PROGRAM_ADDRESS(Address));
-
-  /* Enable End of FLASH Operation and Error source interrupts */
-  __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR);
-  
-  pFlash.Address = Address;
-  pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAM;
-  /* Clean the error context */
-  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-  if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
-  {
-    /* Program word (32-bit) at a specified address. */
-    *(__IO uint32_t *)Address = Data;
-  }
-  return status;
-}
-
-/**
-  * @brief This function handles FLASH interrupt request.
-  * @retval None
-  */
-void HAL_FLASH_IRQHandler(void)
-{
-  uint32_t addresstmp = 0;
-  
-  /* Check FLASH operation error flags */
-
-  /* WARNING : On the first cut of STM32L031xx and STM32L041xx devices,
-   *           (RefID = 0x1000) the FLASH_FLAG_OPTVERR bit was not behaving
-   *           as expected. If the user run an application using the first
-   *           cut of the STM32L031xx device or the first cut of the STM32L041xx
-   *           device, the check on the FLASH_FLAG_OPTVERR bit should be ignored.
-   *
-   *           Note :The revId of the device can be retrieved via the HAL_GetREVID()
-   *           function.
-   *
-   */
-
-  if( __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)     || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)     || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR)     || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)    || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)      || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR)     || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR) )
-  {
-    if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGEERASE)
-    {
-      /* Return the faulty sector */
-      addresstmp = pFlash.Page;
-      pFlash.Page = 0xFFFFFFFFU;
-    }
-    else
-    {
-      /* Return the faulty address */
-      addresstmp = pFlash.Address;
-    }
-    /* Save the Error code */
-    FLASH_SetErrorCode();
-    
-    /* FLASH error interrupt user callback */
-    HAL_FLASH_OperationErrorCallback(addresstmp);
-
-    /* Stop the procedure ongoing */
-    pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
-  }
-
-  /* Check FLASH End of Operation flag  */
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
-  {
-    /* Clear FLASH End of Operation pending bit */
-    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
-    
-    /* Process can continue only if no error detected */
-    if(pFlash.ProcedureOnGoing != FLASH_PROC_NONE)
-    {
-      if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGEERASE)
-      {
-        /* Nb of pages to erased can be decreased */
-        pFlash.NbPagesToErase--;
-
-        /* Check if there are still pages to erase */
-        if(pFlash.NbPagesToErase != 0U)
-        {
-          addresstmp = pFlash.Page;
-          /*Indicate user which sector has been erased */
-          HAL_FLASH_EndOfOperationCallback(addresstmp);
-
-          /*Increment sector number*/
-          addresstmp = pFlash.Page + FLASH_PAGE_SIZE;
-          pFlash.Page = addresstmp;
-
-          /* If the erase operation is completed, disable the ERASE Bit */
-          CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE);
-
-          FLASH_PageErase(addresstmp);
-        }
-        else
-        {
-          /* No more pages to Erase, user callback can be called. */
-          /* Reset Sector and stop Erase pages procedure */
-          pFlash.Page = addresstmp = 0xFFFFFFFFU;
-          pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
-          /* FLASH EOP interrupt user callback */
-          HAL_FLASH_EndOfOperationCallback(addresstmp);
-        }
-      }
-      else
-      {
-          /* If the program operation is completed, disable the PROG Bit */
-          CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG);
-
-          /* Program ended. Return the selected address */
-          /* FLASH EOP interrupt user callback */
-          HAL_FLASH_EndOfOperationCallback(pFlash.Address);
-        
-          /* Reset Address and stop Program procedure */
-          pFlash.Address = 0xFFFFFFFFU;
-          pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
-      }
-    }
-  }
-  
-
-  if(pFlash.ProcedureOnGoing == FLASH_PROC_NONE)
-  {
-    /* Operation is completed, disable the PROG and ERASE */
-    CLEAR_BIT(FLASH->PECR, (FLASH_PECR_ERASE | FLASH_PECR_PROG));
-
-    /* Disable End of FLASH Operation and Error source interrupts */
-    __HAL_FLASH_DISABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(&pFlash);
-  }
-}
-
-/**
-  * @brief  FLASH end of operation interrupt callback
-  * @param  ReturnValue: The value saved in this parameter depends on the ongoing procedure
-  *                 - Pages Erase: Address of the page which has been erased 
-  *                    (if 0xFFFFFFFF, it means that all the selected pages have been erased)
-  *                 - Program: Address which was selected for data program
-  * @retval none
-  */
-__weak void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(ReturnValue);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_FLASH_EndOfOperationCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  FLASH operation error interrupt callback
-  * @param  ReturnValue: The value saved in this parameter depends on the ongoing procedure
-  *                 - Pages Erase: Address of the page which returned an error
-  *                 - Program: Address which was selected for data program
-  * @retval none
-  */
-__weak void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(ReturnValue);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_FLASH_OperationErrorCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup FLASH_Exported_Functions_Group2 Peripheral Control functions 
- *  @brief   management functions 
- *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral Control functions #####
- ===============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to control the FLASH 
-    memory operations.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Unlock the FLASH control register access
-  * @retval HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASH_Unlock(void)
-{
-  if (HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PRGLOCK))
-  {
-    /* Unlocking FLASH_PECR register access*/
-    if(HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PELOCK))
-    {  
-      WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY1);
-      WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY2);
-    }
-    
-    /* Unlocking the program memory access */
-    WRITE_REG(FLASH->PRGKEYR, FLASH_PRGKEY1);
-    WRITE_REG(FLASH->PRGKEYR, FLASH_PRGKEY2);  
-  }
-  else
-  {
-    return HAL_ERROR;
-  }
-
-  return HAL_OK; 
-}
-
-/**
-  * @brief  Locks the FLASH control register access
-  * @retval HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASH_Lock(void)
-{
-  /* Set the PRGLOCK Bit to lock the FLASH Registers access */
-  SET_BIT(FLASH->PECR, FLASH_PECR_PRGLOCK);
-  
-  return HAL_OK;  
-}
-
-/**
-  * @brief  Unlock the FLASH Option Control Registers access.
-  * @retval HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void)
-{
-  if(HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_OPTLOCK))
-  {
-    /* Unlocking FLASH_PECR register access*/
-    if(HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PELOCK))
-    {  
-      /* Unlocking FLASH_PECR register access*/
-      WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY1);
-      WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY2);
-    }
-
-    /* Unlocking the option bytes block access */
-    WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY1);
-    WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2);
-  }
-  else
-  {
-    return HAL_ERROR;
-  }  
-  
-  return HAL_OK;  
-}
-
-/**
-  * @brief  Lock the FLASH Option Control Registers access.
-  * @retval HAL Status 
-  */
-HAL_StatusTypeDef HAL_FLASH_OB_Lock(void)
-{
-  /* Set the OPTLOCK Bit to lock the option bytes block access */
-  SET_BIT(FLASH->PECR, FLASH_PECR_OPTLOCK);
-  
-  return HAL_OK;  
-}
-  
-/**
-  * @brief  Launch the option byte loading.
-  * @note   This function will reset automatically the MCU.
-  * @retval HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASH_OB_Launch(void)
-{
-  /* Set the OBL_Launch bit to launch the option byte loading */
-  SET_BIT(FLASH->PECR, FLASH_PECR_OBL_LAUNCH);
-  
-  /* Wait for last operation to be completed */
-  return(FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE));
-}
-
-/**
-  * @}
-  */  
-
-/** @defgroup FLASH_Exported_Functions_Group3 Peripheral errors functions 
- *  @brief    Peripheral errors functions 
- *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral Errors functions #####
- ===============================================================================  
-    [..]
-    This subsection permit to get in run-time errors of  the FLASH peripheral.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Get the specific FLASH error flag.
-  * @retval FLASH_ErrorCode The returned value can be:
-  *            @ref FLASH_Error_Codes
-  */
-uint32_t HAL_FLASH_GetError(void)
-{
-   return pFlash.ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup FLASH_Private_Functions
- * @{
- */
-
-/**
-  * @brief  Wait for a FLASH operation to complete.
-  * @param  Timeout  maximum flash operation timeout
-  * @retval HAL Status
-  */
-HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
-{
-  /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
-     Even if the FLASH operation fails, the BUSY flag will be reset and an error
-     flag will be set */
-     
-  uint32_t tickstart = HAL_GetTick();
-     
-  while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 
-  { 
-    if (Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  
-  /* Check FLASH End of Operation flag  */
-  if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
-  {
-    /* Clear FLASH End of Operation pending bit */
-    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
-  }
-  
-  if( __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)     || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)     || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR)     || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)    || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)      || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR)     || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR) )
-  {
-    /*Save the error code*/
-
-    /* WARNING : On the first cut of STM32L031xx and STM32L041xx devices,
-     *           (RefID = 0x1000) the FLASH_FLAG_OPTVERR bit was not behaving
-     *           as expected. If the user run an application using the first
-     *           cut of the STM32L031xx device or the first cut of the STM32L041xx
-     *           device, this error should be ignored. The revId of the device
-     *           can be retrieved via the HAL_GetREVID() function.
-     *
-     */
-    FLASH_SetErrorCode();
-    return HAL_ERROR;
-  }
-
-  /* There is no error flag set */
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  Set the specific FLASH error flag.
-  * @retval None
-  */
-static void FLASH_SetErrorCode(void)
-{
-  uint32_t flags = 0;
-  
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
-  {
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
-    flags |= FLASH_FLAG_WRPERR;
-  }
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR))
-  {
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_PGA;
-    flags |= FLASH_FLAG_PGAERR;
-  }
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR))
-  { 
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_SIZE;
-    flags |= FLASH_FLAG_SIZERR;
-  }
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
-  {
-    /* WARNING : On the first cut of STM32L031xx and STM32L041xx devices,
-     *           (RefID = 0x1000) the FLASH_FLAG_OPTVERR bit was not behaving
-     *           as expected. If the user run an application using the first
-     *           cut of the STM32L031xx device or the first cut of the STM32L041xx
-     *           device, this error should be ignored. The revId of the device
-     *           can be retrieved via the HAL_GetREVID() function.
-     *
-     */
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
-    flags |= FLASH_FLAG_OPTVERR;
-  }
-
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR))
-  {
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_RD;
-    flags |= FLASH_FLAG_RDERR;
-  }
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR))
-  { 
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_FWWERR;
-    flags |= HAL_FLASH_ERROR_FWWERR;
-  }
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR))
-  { 
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_NOTZERO;
-    flags |= FLASH_FLAG_NOTZEROERR;
-  }
-
-  /* Clear FLASH error pending bits */
-  __HAL_FLASH_CLEAR_FLAG(flags);
-}  
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c
deleted file mode 100755
index 413eaad7..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c
+++ /dev/null
@@ -1,1270 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_flash_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended FLASH HAL module driver.
-  *    
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the internal FLASH memory:
-  *            + FLASH Interface configuration
-  *            + FLASH Memory Erasing
-  *            + DATA EEPROM Programming/Erasing
-  *            + Option Bytes Programming
-  *            + Interrupts management
-  *    
-  @verbatim
-  ==============================================================================
-               ##### Flash peripheral Extended features  #####
-  ==============================================================================
-           
-  [..] Comparing to other products, the FLASH interface for STM32L0xx
-       devices contains the following additional features        
-       (+) Erase functions
-       (+) DATA_EEPROM memory management
-       (+) BOOT option bit configuration       
-       (+) PCROP protection for all sectors
-   
-                      ##### How to use this driver #####
-  ==============================================================================
-  [..] This driver provides functions to configure and program the FLASH memory 
-       of all STM32L0xx. It includes:
-       (+) Full DATA_EEPROM erase and program management
-       (+) Boot activation
-       (+) PCROP protection configuration and control for all pages
-  
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-#ifdef HAL_FLASH_MODULE_ENABLED
-
-/** @addtogroup FLASH
-  * @{
-  */
-/** @addtogroup FLASH_Private_Variables
- * @{
- */
-/* Variables used for Erase pages under interruption*/
-extern FLASH_ProcessTypeDef pFlash;
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-/** @defgroup FLASHEx FLASHEx
-  * @brief FLASH HAL Extension module driver
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup FLASHEx_Private_Constants FLASHEx Private Constants
- * @{
- */
-/**
-  * @}
-  */
-
-/* Private macro -------------------------------------------------------------*/
-/** @defgroup FLASHEx_Private_Macros FLASHEx Private Macros
-  * @{
-  */
-/**
-  * @}
-  */ 
-
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions
- * @{
- */
-void                      FLASH_PageErase(uint32_t PageAddress);
-#if defined(FLASH_OPTR_BFB2)
-static HAL_StatusTypeDef  FLASH_OB_BootConfig(uint8_t OB_BOOT);
-#endif /* FLASH_OPTR_BFB2 */
-static HAL_StatusTypeDef  FLASH_OB_RDPConfig(uint8_t OB_RDP);
-static HAL_StatusTypeDef  FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY);
-static HAL_StatusTypeDef  FLASH_OB_BORConfig(uint8_t OB_BOR);
-static uint8_t            FLASH_OB_GetRDP(void);
-static uint8_t            FLASH_OB_GetUser(void);
-static uint8_t            FLASH_OB_GetBOR(void);
-static uint8_t            FLASH_OB_GetBOOTBit1(void);
-static HAL_StatusTypeDef  FLASH_OB_BOOTBit1Config(uint8_t OB_BootBit1);
-#if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || defined(STM32L082xx) || defined(STM32L083xx)  
-static HAL_StatusTypeDef  FLASH_OB_ProtectedSectorsConfig(uint32_t Sector, uint32_t Sector2, uint32_t NewState);
-#else
-static HAL_StatusTypeDef  FLASH_OB_ProtectedSectorsConfig(uint32_t Sector, uint32_t NewState);
-#endif
-static uint32_t           FLASH_OB_GetWRP(void);
-#if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || defined(STM32L082xx) || defined(STM32L083xx)  
-static uint32_t           FLASH_OB_GetWRP2(void);
-#endif
-
-/**
-  * @}
-  */
-
-/* Exported functions ---------------------------------------------------------*/
-/** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
-  * @{
-  */
-
-/** @defgroup FLASHEx_Exported_Functions_Group1 FLASHEx Memory Erasing functions
- *  @brief   FLASH Memory Erasing functions
- *
-@verbatim   
-  ==============================================================================
-                ##### FLASH Erasing Programming functions ##### 
-  ==============================================================================
-
-    [..] The FLASH Memory Erasing functions, includes the following functions:
-    (+) @ref HAL_FLASHEx_Erase: return only when erase has been done
-    (+) @ref HAL_FLASHEx_Erase_IT: end of erase is done when @ref HAL_FLASH_EndOfOperationCallback 
-        is called with parameter 0xFFFFFFFF
-
-    [..] Any operation of erase should follow these steps:
-    (#) Call the @ref HAL_FLASH_Unlock() function to enable the flash control register and 
-        program memory access.
-    (#) Call the desired function to erase page.
-    (#) Call the @ref HAL_FLASH_Lock() to disable the flash program memory access 
-       (recommended to protect the FLASH memory against possible unwanted operation).
-
-@endverbatim
-  * @{
-  */
-  
-/**
-  * @brief  Erase the specified FLASH memory Pages 
-  * @note   To correctly run this function, the @ref HAL_FLASH_Unlock() function
-  *         must be called before.
-  *         Call the @ref HAL_FLASH_Lock() to disable the flash memory access 
-  *         (recommended to protect the FLASH memory against possible unwanted operation)
-  * @param[in]  pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
-  *         contains the configuration information for the erasing.
-  * 
-  * @param[out]  PageError pointer to variable  that
-  *         contains the configuration information on faulty page in case of error
-  *         (0xFFFFFFFF means that all the pages have been correctly erased)
-  * 
-  * @retval HAL_StatusTypeDef HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
-{
-  HAL_StatusTypeDef status = HAL_ERROR;
-  uint32_t address = 0U;
-  
-  /* Process Locked */
-  __HAL_LOCK(&pFlash);
-
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-
-  if (status == HAL_OK)
-  {
-    /*Initialization of PageError variable*/
-    *PageError = 0xFFFFFFFFU;
-
-    /* Check the parameters */
-    assert_param(IS_NBPAGES(pEraseInit->NbPages));
-    assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
-    assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress));
-    assert_param(IS_FLASH_PROGRAM_ADDRESS((pEraseInit->PageAddress & ~(FLASH_PAGE_SIZE - 1U)) + pEraseInit->NbPages * FLASH_PAGE_SIZE - 1U));
-
-    /* Erase page by page to be done*/
-    for(address = pEraseInit->PageAddress; 
-        address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
-        address += FLASH_PAGE_SIZE)
-    {
-      FLASH_PageErase(address);
-
-      /* Wait for last operation to be completed */
-      status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-
-      /* If the erase operation is completed, disable the ERASE Bit */
-      CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG);
-      CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE);
-
-      if (status != HAL_OK) 
-      {
-        /* In case of error, stop erase procedure and return the faulty address */
-        *PageError = address;
-        break;
-      }
-    }
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(&pFlash);
-
-  return status;
-}
-
-/**
-  * @brief  Perform a page erase of the specified FLASH memory pages  with interrupt enabled
-  * @note   To correctly run this function, the @ref HAL_FLASH_Unlock() function
-  *         must be called before.
-  *         Call the @ref HAL_FLASH_Lock() to disable the flash memory access 
-  *         (recommended to protect the FLASH memory against possible unwanted operation)
-  *          End of erase is done when @ref HAL_FLASH_EndOfOperationCallback is called with parameter
-  *          0xFFFFFFFF
-  * @param  pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
-  *         contains the configuration information for the erasing.
-  * 
-  * @retval HAL_StatusTypeDef HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
-{
-  HAL_StatusTypeDef status = HAL_ERROR;
-
-  /* If procedure already ongoing, reject the next one */
-  if (pFlash.ProcedureOnGoing != FLASH_PROC_NONE)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_NBPAGES(pEraseInit->NbPages));
-  assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
-  assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress));
-  assert_param(IS_FLASH_PROGRAM_ADDRESS((pEraseInit->PageAddress & ~(FLASH_PAGE_SIZE - 1)) + pEraseInit->NbPages * FLASH_PAGE_SIZE - 1));
-
-  /* Process Locked */
-  __HAL_LOCK(&pFlash);
-
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  
-  if (status == HAL_OK)
-  {
-    /* Enable End of FLASH Operation and Error source interrupts */
-    __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR);
-    
-    pFlash.ProcedureOnGoing = FLASH_PROC_PAGEERASE;
-    pFlash.NbPagesToErase = pEraseInit->NbPages;
-    pFlash.Page = pEraseInit->PageAddress;
-
-    /*Erase 1st page and wait for IT*/
-    FLASH_PageErase(pEraseInit->PageAddress);
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(&pFlash);
-  }
-
-  return status;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup FLASHEx_Exported_Functions_Group2 Option Bytes Programming functions
- *  @brief   Option Bytes Programming functions
- *
-@verbatim   
-  ==============================================================================
-                ##### Option Bytes Programming functions ##### 
-  ==============================================================================  
-
-    [..] Any operation of erase or program should follow these steps:
-    (#) Call the @ref HAL_FLASH_OB_Unlock() function to enable the Flash option control 
-        register access.
-    (#) Call following function to program the desired option bytes.
-        (++) @ref HAL_FLASHEx_OBProgram:
-         - To Enable/Disable the desired sector write protection.
-         - To set the desired read Protection Level.
-         - To configure the user option Bytes: IWDG, STOP and the Standby.
-         - To Set the BOR level.
-    (#) Once all needed option bytes to be programmed are correctly written, call the
-        @ref HAL_FLASH_OB_Launch(void) function to launch the Option Bytes programming process.
-    (#) Call the @ref HAL_FLASH_OB_Lock() to disable the Flash option control register access (recommended
-        to protect the option Bytes against possible unwanted operations).
-
-    [..] Proprietary code Read Out Protection (PcROP):
-    (#) The PcROP sector is selected by using the same option bytes as the Write
-        protection (nWRPi bits). As a result, these 2 options are exclusive each other.
-    (#) In order to activate the PcROP (change the function of the nWRPi option bits), 
-        the WPRMOD option bit must be activated.
-    (#) The active value of nWRPi bits is inverted when PCROP mode is active, this
-        means: if WPRMOD = 1 and nWRPi = 1 (default value), then the user sector "i"
-        is read/write protected.
-    (#) To activate PCROP mode for Flash sector(s), you need to call the following function:
-        (++) @ref HAL_FLASHEx_AdvOBProgram in selecting sectors to be read/write protected
-        (++) @ref HAL_FLASHEx_OB_SelectPCROP to enable the read/write protection
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Program option bytes
-  * @param  pOBInit pointer to an FLASH_OBInitStruct structure that
-  *         contains the configuration information for the programming.
-  * 
-  * @retval HAL_StatusTypeDef HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
-{
-  HAL_StatusTypeDef status = HAL_ERROR;
-  
-  /* Process Locked */
-  __HAL_LOCK(&pFlash);
-
-  /* Check the parameters */
-  assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
-
-  /*Write protection configuration*/
-  if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
-  {
-    assert_param(IS_WRPSTATE(pOBInit->WRPState));
-#if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || defined(STM32L082xx) || defined(STM32L083xx)  
-    status = FLASH_OB_ProtectedSectorsConfig(pOBInit->WRPSector, pOBInit->WRPSector2, pOBInit->WRPState);
-#else
-    status = FLASH_OB_ProtectedSectorsConfig(pOBInit->WRPSector, pOBInit->WRPState);
-#endif
-    if (status != HAL_OK)
-    {
-      /* Process Unlocked */
-      __HAL_UNLOCK(&pFlash);
-      return status;
-    }
-  }
-  
-  /* Read protection configuration*/
-  if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
-  {
-    status = FLASH_OB_RDPConfig(pOBInit->RDPLevel);
-    if (status != HAL_OK)
-    {
-      /* Process Unlocked */
-      __HAL_UNLOCK(&pFlash);
-      return status;
-    }
-  }
-  
-  /* USER  configuration*/
-  if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
-  {
-    status = FLASH_OB_UserConfig(pOBInit->USERConfig & OB_IWDG_SW, 
-                                 pOBInit->USERConfig & OB_STOP_NORST,
-                                 pOBInit->USERConfig & OB_STDBY_NORST);
-    if (status != HAL_OK)
-    {
-      /* Process Unlocked */
-      __HAL_UNLOCK(&pFlash);
-      return status;
-    }
-  }
-
-  /* BOR Level  configuration*/
-  if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
-  {
-    status = FLASH_OB_BORConfig(pOBInit->BORLevel);
-    if (status != HAL_OK)
-    {
-      /* Process Unlocked */
-      __HAL_UNLOCK(&pFlash);
-      return status;
-    }
-  }
-
-  /* Program BOOT Bit1 config option byte */
-  if ((pOBInit->OptionType & OPTIONBYTE_BOOT_BIT1) == OPTIONBYTE_BOOT_BIT1)
-  {
-    status = FLASH_OB_BOOTBit1Config(pOBInit->BOOTBit1Config);
-  }
-  /* Process Unlocked */
-  __HAL_UNLOCK(&pFlash);
-
-  return status;
-}
-
-/**
-  * @brief   Get the Option byte configuration
-  * @param  pOBInit pointer to an FLASH_OBInitStruct structure that
-  *         contains the configuration information for the programming.
-  * 
-  * @retval None
-  */
-void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
-{
-  pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR;
-
-  /* Get WRP sector */
-  pOBInit->WRPSector = FLASH_OB_GetWRP();
-
-#if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || defined(STM32L082xx) || defined(STM32L083xx)  
-  pOBInit->WRPSector2 = FLASH_OB_GetWRP2();
-#endif
-
-  /*Get RDP Level*/
-  pOBInit->RDPLevel   = FLASH_OB_GetRDP();
-
-  /*Get USER*/
-  pOBInit->USERConfig = FLASH_OB_GetUser();
-
-  /*Get BOR Level*/
-  pOBInit->BORLevel   = FLASH_OB_GetBOR();
-
-  /* Get BOOT bit 1 config OB */
-  pOBInit->BOOTBit1Config = FLASH_OB_GetBOOTBit1();
-}
-
-#if defined(FLASH_OPTR_WPRMOD) || defined(FLASH_OPTR_BFB2)
-    
-/**
-  * @brief  Program option bytes
-  * @param  pAdvOBInit pointer to an FLASH_AdvOBProgramInitTypeDef structure that
-  *         contains the configuration information for the programming.
-  * 
-  * @retval HAL_StatusTypeDef HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
-{
-  HAL_StatusTypeDef status = HAL_ERROR;
-  
-  /* Check the parameters */
-  assert_param(IS_OBEX(pAdvOBInit->OptionType));
-
-#if defined(FLASH_OPTR_WPRMOD)
-    
-  /* Program PCROP option byte*/
-  if ((pAdvOBInit->OptionType & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP)
-  {
-    /* Check the parameters */
-    assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState));
-#if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || defined(STM32L082xx) || defined(STM32L083xx)  
-    status = FLASH_OB_ProtectedSectorsConfig(pAdvOBInit->PCROPSector, pAdvOBInit->PCROPSector2, pAdvOBInit->PCROPState);
-#else
-    status = FLASH_OB_ProtectedSectorsConfig(pAdvOBInit->PCROPSector, pAdvOBInit->PCROPState);
-#endif
-  }
-  
-#endif /* FLASH_OPTR_WPRMOD */
-
-#if defined(FLASH_OPTR_BFB2)
-    
-  /* Program BOOT config option byte */
-  if ((pAdvOBInit->OptionType & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG)
-  {
-    status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
-  }
-  
-#endif /* FLASH_OPTR_BFB2 */
-
-  return status;
-}
-
-/**
-  * @brief  Get the OBEX byte configuration
-  * @param  pAdvOBInit pointer to an FLASH_AdvOBProgramInitTypeDef structure that
-  *         contains the configuration information for the programming.
-  * 
-  * @retval None
-  */
-void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
-{
-  pAdvOBInit->OptionType = 0;
-  
-#if defined(FLASH_OPTR_WPRMOD)
-      
-  pAdvOBInit->OptionType |= OPTIONBYTE_PCROP;
-
-
-  /* Get PCROP state */
-  pAdvOBInit->PCROPState = (FLASH->OPTR & FLASH_OPTR_WPRMOD) >> FLASH_OPTR_WPRMOD_Pos;
-  /* Get PCROP protected sector */
-  pAdvOBInit->PCROPSector = FLASH->WRPR;
-
-#if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || defined(STM32L082xx) || defined(STM32L083xx)  
-  /* Get PCROP protected sector */
-  pAdvOBInit->PCROPSector2 = FLASH->WRPR2;
-#endif
-#endif /* FLASH_OPTR_WPRMOD */
-
-#if defined(FLASH_OPTR_BFB2)
-      
-  pAdvOBInit->OptionType |= OPTIONBYTE_BOOTCONFIG;
-
-  /* Get Boot config OB */
-  pAdvOBInit->BootConfig = (FLASH->OPTR & FLASH_OPTR_BFB2) >> 16U;
-
-#endif /* FLASH_OPTR_BFB2 */
-}
-
-#endif /* FLASH_OPTR_WPRMOD || FLASH_OPTR_BFB2 */
-
-#if defined(FLASH_OPTR_WPRMOD)
-
-/**
-  * @brief  Select the Protection Mode (WPRMOD).
-  * @note   Once WPRMOD bit is active, unprotection of a protected sector is not possible 
-  * @note   Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  uint16_t tmp1 = 0;
-  uint32_t tmp2 = 0;
-  uint8_t optiontmp = 0;
-  uint16_t optiontmp2 = 0;
-  
-  status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  
-  /* Mask RDP Byte */
-  optiontmp =  (uint8_t)(*(__IO uint8_t *)(OB_BASE)); 
-  
-  /* Update Option Byte */
-  optiontmp2 = (uint16_t)(OB_PCROP_SELECTED | optiontmp); 
-  
-  /* calculate the option byte to write */
-  tmp1 = (uint16_t)(~(optiontmp2 ));
-  tmp2 = (uint32_t)(((uint32_t)((uint32_t)(tmp1) << 16U)) | ((uint32_t)optiontmp2));
-  
-  if(status == HAL_OK)
-  {         
-    /* Clean the error context */
-    pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-    /* program PCRop */
-    OB->RDP = tmp2;
-    
-    /* Wait for last operation to be completed */
-    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  }
-  
-  /* Return the Read protection operation Status */
-  return status;            
-}
-
-/**
-  * @brief  Deselect the Protection Mode (WPRMOD).
-  * @note   Once WPRMOD bit is active, unprotection of a protected sector is not possible 
-  * @note   Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  uint16_t tmp1 = 0;
-  uint32_t tmp2 = 0;
-  uint8_t optiontmp = 0;
-  uint16_t optiontmp2 = 0;
-  
-  status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  
-  /* Mask RDP Byte */
-  optiontmp =  (uint8_t)(*(__IO uint8_t *)(OB_BASE)); 
-  
-  /* Update Option Byte */
-  optiontmp2 = (uint16_t)(OB_PCROP_DESELECTED | optiontmp); 
-  
-  /* calculate the option byte to write */
-  tmp1 = (uint16_t)(~(optiontmp2 ));
-  tmp2 = (uint32_t)(((uint32_t)((uint32_t)(tmp1) << 16U)) | ((uint32_t)optiontmp2));
-  
-  if(status == HAL_OK)
-  {         
-    /* Clean the error context */
-    pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-    /* program PCRop */
-    OB->RDP = tmp2;
-    
-    /* Wait for last operation to be completed */
-    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  }
-  
-  /* Return the Read protection operation Status */
-  return status;            
-}
-
-#endif /* FLASH_OPTR_WPRMOD */
-
-/**
-  * @}
-  */
-
-/** @defgroup FLASHEx_Exported_Functions_Group3 DATA EEPROM Programming functions
- *  @brief   DATA EEPROM Programming functions
- *
-@verbatim   
- ===============================================================================
-                     ##### DATA EEPROM Programming functions ##### 
- ===============================================================================  
- 
-    [..] Any operation of erase or program should follow these steps:
-    (#) Call the @ref HAL_FLASHEx_DATAEEPROM_Unlock() function to enable the data EEPROM access
-        and Flash program erase control register access.
-    (#) Call the desired function to erase or program data.
-    (#) Call the @ref HAL_FLASHEx_DATAEEPROM_Lock() to disable the data EEPROM access
-        and Flash program erase control register access(recommended
-        to protect the DATA_EEPROM against possible unwanted operation).
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Unlocks the data memory and FLASH_PECR register access.
-  * @retval HAL_StatusTypeDef HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Unlock(void)
-{
-  if((FLASH->PECR & FLASH_PECR_PELOCK) != RESET)
-  {  
-    /* Unlocking the Data memory and FLASH_PECR register access*/
-    FLASH->PEKEYR = FLASH_PEKEY1;
-    FLASH->PEKEYR = FLASH_PEKEY2;
-  }
-  else
-  {
-    return HAL_ERROR;
-  }
-  return HAL_OK;  
-}
-
-/**
-  * @brief  Locks the Data memory and FLASH_PECR register access.
-  * @retval HAL_StatusTypeDef HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Lock(void)
-{
-  /* Set the PELOCK Bit to lock the data memory and FLASH_PECR register access */
-  SET_BIT(FLASH->PECR, FLASH_PECR_PELOCK);
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Erase a word in data memory.
-  * @param  Address specifies the address to be erased.
-  * @note   To correctly run this function, the @ref HAL_FLASHEx_DATAEEPROM_Unlock() function
-  *         must be called before.
-  *         Call the @ref HAL_FLASHEx_DATAEEPROM_Lock() to the data EEPROM access
-  *         and Flash program erase control register access(recommended to protect 
-  *         the DATA_EEPROM against possible unwanted operation).
-  * @retval HAL_StatusTypeDef HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Erase(uint32_t Address)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  
-  /* Check the parameters */
-  assert_param(IS_FLASH_DATA_ADDRESS(Address));
-  
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  
-  if(status == HAL_OK)
-  {
-    /* Clean the error context */
-    pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-      /* Write 00000000h to valid address in the data memory */
-      *(__IO uint32_t *) Address = 0x00000000U;
-
-    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  }
-   
-  /* Return the erase status */
-  return status;
-}  
-
-/**
-  * @brief  Program word at a specified address
-  * @note   To correctly run this function, the @ref HAL_FLASHEx_DATAEEPROM_Unlock() function
-  *         must be called before.
-  *         Call the @ref HAL_FLASHEx_DATAEEPROM_Unlock() to he data EEPROM access
-  *         and Flash program erase control register access(recommended to protect 
-  *         the DATA_EEPROM against possible unwanted operation).
-  * @note   The function @ref HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram() can be called before 
-  *         this function to configure the Fixed Time Programming.
-  * @param  TypeProgram  Indicate the way to program at a specified address.
-  *         This parameter can be a value of @ref FLASHEx_Type_Program_Data
-  * @param  Address  specifie the address to be programmed.
-  * @param  Data     specifie the data to be programmed
-  * 
-  * @retval HAL_StatusTypeDef HAL Status
-  */
-
-HAL_StatusTypeDef   HAL_FLASHEx_DATAEEPROM_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data)
-{
-  HAL_StatusTypeDef status = HAL_ERROR;
-  
-  /* Process Locked */
-  __HAL_LOCK(&pFlash);
-
-  /* Check the parameters */
-  assert_param(IS_TYPEPROGRAMDATA(TypeProgram));
-  assert_param(IS_FLASH_DATA_ADDRESS(Address));
-
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  
-  if(status == HAL_OK)
-  {
-    /* Clean the error context */
-    pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-    if(TypeProgram == FLASH_TYPEPROGRAMDATA_WORD)
-    {
-      /* Program word (32-bit) at a specified address.*/
-      *(__IO uint32_t *)Address = Data;
-    }
-    else if(TypeProgram == FLASH_TYPEPROGRAMDATA_HALFWORD)
-    {
-      /* Program halfword (16-bit) at a specified address.*/
-      *(__IO uint16_t *)Address = (uint16_t) Data;
-    }
-    else if(TypeProgram == FLASH_TYPEPROGRAMDATA_BYTE)
-    {
-      /* Program byte (8-bit) at a specified address.*/
-      *(__IO uint8_t *)Address = (uint8_t) Data;
-    }
-    else
-    {
-      status = HAL_ERROR;
-    }
-
-    if (status != HAL_OK)
-    {
-      /* Wait for last operation to be completed */
-      status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-    }
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(&pFlash);
-
-  return status;
-}
-
-/**
-  * @brief  Enable DATA EEPROM fixed Time programming (2*Tprog).
-  * @retval None
-  */
-void HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram(void)
-{
-  SET_BIT(FLASH->PECR, FLASH_PECR_FIX);
-}
-
-/**
-  * @brief  Disables DATA EEPROM fixed Time programming (2*Tprog).
-  * @retval None
-  */
-void HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram(void)
-{
-  CLEAR_BIT(FLASH->PECR, FLASH_PECR_FIX);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup FLASHEx_Private_Functions
- * @{
- */
-
-/*
-==============================================================================
-              OPTIONS BYTES
-==============================================================================
-*/
-/**
-  * @brief  Enables or disables the read out protection.
-  * @note   To correctly run this function, the @ref HAL_FLASH_OB_Unlock() function
-  *         must be called before.
-  * @param  OB_RDP specifies the read protection level. 
-  *   This parameter can be:
-  *     @arg @ref OB_RDP_LEVEL_0 No protection
-  *     @arg @ref OB_RDP_LEVEL_1 Read protection of the memory
-  *     @arg @ref OB_RDP_LEVEL_2 Chip protection
-  * 
-  *  !!!Warning!!! When enabling OB_RDP_LEVEL_2 it's no more possible to go back to level 1 or 0
-  *   
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef FLASH_OB_RDPConfig(uint8_t OB_RDP)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U;
-  
-  /* Check the parameters */
-  assert_param(IS_OB_RDP(OB_RDP));
-  
-  tmp1 = (uint32_t)(OB->RDP & FLASH_OPTR_RDPROT);
-  
-#if defined(FLASH_OPTR_WPRMOD)
-    /* Mask WPRMOD bit */
-    tmp3 = (uint32_t)(OB->RDP & FLASH_OPTR_WPRMOD);
-#endif
-
-    /* calculate the option byte to write */
-    tmp1 = (~((uint32_t)(OB_RDP | tmp3)));
-    tmp2 = (uint32_t)(((uint32_t)((uint32_t)(tmp1) << 16U)) | ((uint32_t)(OB_RDP | tmp3)));
-
-    /* Wait for last operation to be completed */
-    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-
-    if(status == HAL_OK)
-    {
-      /* Clean the error context */
-      pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-      /* program read protection level */
-      OB->RDP = tmp2;
-
-      /* Wait for last operation to be completed */
-      status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-    }
-
-  /* Return the Read protection operation Status */
-  return status;
-}
-
-/**
-  * @brief  Programs the FLASH brownout reset threshold level Option Byte.
-  * @param  OB_BOR Selects the brownout reset threshold level.
-  *   This parameter can be one of the following values:
-  *     @arg @ref OB_BOR_OFF BOR is disabled at power down, the reset is asserted when the VDD 
-  *                      power supply reaches the PDR(Power Down Reset) threshold (1.5V)
-  *     @arg @ref OB_BOR_LEVEL1 BOR Reset threshold levels for 1.7V - 1.8V VDD power supply
-  *     @arg @ref OB_BOR_LEVEL2 BOR Reset threshold levels for 1.9V - 2.0V VDD power supply
-  *     @arg @ref OB_BOR_LEVEL3 BOR Reset threshold levels for 2.3V - 2.4V VDD power supply
-  *     @arg @ref OB_BOR_LEVEL4 BOR Reset threshold levels for 2.55V - 2.65V VDD power supply
-  *     @arg @ref OB_BOR_LEVEL5 BOR Reset threshold levels for 2.8V - 2.9V VDD power supply
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef FLASH_OB_BORConfig(uint8_t OB_BOR)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  uint32_t tmp = 0, tmp1 = 0;
-
-  /* Check the parameters */
-  assert_param(IS_OB_BOR_LEVEL(OB_BOR));
-
-  /* Get the User Option byte register */
-  tmp1 = OB->USER & ((~FLASH_OPTR_BOR_LEV) >> 16U);
-
-  /* Calculate the option byte to write - [0xFF | nUSER | 0x00 | USER]*/
-  tmp = (uint32_t)~((OB_BOR | tmp1)) << 16U;
-  tmp |= (OB_BOR | tmp1);
-    
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  
-  if(status == HAL_OK)
-  {  
-    /* Clean the error context */
-    pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-    /* Write the BOR Option Byte */            
-    OB->USER = tmp;
-
-    /* Wait for last operation to be completed */
-    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  }
-  
-  /* Return the Option Byte BOR programmation Status */
-  return status;
-}
-
-/**
-  * @brief  Sets or resets the BOOT bit1 option bit.
-  * @param  OB_BootBit1 Set or Reset the BOOT bit1 option bit.
-  *          This parameter can be one of the following values:
-  *             @arg @ref OB_BOOT_BIT1_RESET BOOT1 option bit reset
-  *             @arg @ref OB_BOOT_BIT1_SET BOOT1 option bit set
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef  FLASH_OB_BOOTBit1Config(uint8_t OB_BootBit1)
-{
-  HAL_StatusTypeDef status = HAL_OK; 
-  uint32_t tmp = 0, tmp1 = 0, OB_Bits = ((uint32_t) OB_BootBit1) << 15;
-
-  /* Check the parameters */
-  assert_param(IS_OB_BOOT1(OB_BootBit1));
-
-  /* Get the User Option byte register */
-  tmp1 = OB->USER & ((~FLASH_OPTR_BOOT1) >> 16U);
-
-  /* Calculate the user option byte to write */ 
-  tmp = (~(OB_Bits | tmp1)) << 16U;
-  tmp |= OB_Bits | tmp1;
-    
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  
-  if(status == HAL_OK)
-  {  
-    /* Clean the error context */
-    pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-    /* Program OB */
-    OB->USER = tmp; 
-    /* Wait for last operation to be completed */
-    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  }
-
-  return status;
-}
-
-/**
-  * @brief  Returns the FLASH User Option Bytes values.
-  * @retval The FLASH User Option Bytes.
-  */
-static uint8_t FLASH_OB_GetUser(void)
-{
-  /* Return the User Option Byte */
-  return (uint8_t)((FLASH->OPTR & FLASH_OPTR_USER) >> 16U);
-}
-
-/**
-  * @brief  Returns the FLASH Read Protection level.
-  * @retval FLASH RDP level
-  *         This parameter can be one of the following values:
-  *            @arg @ref OB_RDP_LEVEL_0 No protection
-  *            @arg @ref OB_RDP_LEVEL_1 Read protection of the memory
-  *            @arg @ref OB_RDP_LEVEL_2 Full chip protection
-  */
-static uint8_t FLASH_OB_GetRDP(void)
-{
-  return (uint8_t)(FLASH->OPTR & FLASH_OPTR_RDPROT);
-}
-
-/**
-  * @brief  Returns the FLASH BOR level.
-  * @retval The BOR level Option Bytes.
-  */
-static uint8_t FLASH_OB_GetBOR(void)
-{
-  /* Return the BOR level */
-  return (uint8_t)((FLASH->OPTR & (uint32_t)FLASH_OPTR_BOR_LEV) >> 16U);
-}
-
-/**
-  * @brief  Returns the FLASH BOOT bit1 value.
-  * @retval The BOOT bit 1 value Option Bytes.
-  */
-static uint8_t FLASH_OB_GetBOOTBit1(void)
-{
-  /* Return the BOR level */
-  return (FLASH->OPTR & FLASH_OPTR_BOOT1) >> FLASH_OPTR_BOOT1_Pos;
-
-}
-
-/**
-  * @brief  Returns the FLASH Write Protection Option Bytes value.
-  * @retval The FLASH Write Protection Option Bytes value.
-  */
-static uint32_t FLASH_OB_GetWRP(void)
-{
-  /* Return the FLASH write protection Register value */
-  return (uint32_t)(FLASH->WRPR);
-}
-
-#if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || defined(STM32L082xx) || defined(STM32L083xx)  
-/**
-  * @brief  Returns the FLASH Write Protection Option Bytes value.
-  * @retval The FLASH Write Protection Option Bytes value.
-  */
-static uint32_t FLASH_OB_GetWRP2(void)
-{
-  /* Return the FLASH write protection Register value */
-  return (uint32_t)(FLASH->WRPR2);
-}
-#endif /* STM32L071xx || STM32L072xx || STM32L073xx || STM32L081xx || STM32L082xx || STM32L083xx */
-
-#if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || defined(STM32L082xx) || defined(STM32L083xx)
-/**
-  * @brief  Write Option Byte of the desired pages of the Flash.
-  * @param  Sector specifies the sectors to be write protected.
-  * @param  Sector2 specifies the sectors to be write protected (only stm32l07xxx and stm32l08xxx devices)
-  * @param  NewState new state of the specified FLASH Pages Write protection.
-  *   This parameter can be: 
-  *        @arg @ref OB_WRPSTATE_ENABLE
-  *        @arg @ref OB_WRPSTATE_DISABLE
-  * @retval HAL_StatusTypeDef
-  */
-static HAL_StatusTypeDef FLASH_OB_ProtectedSectorsConfig(uint32_t Sector, uint32_t Sector2, uint32_t NewState)
-#else
-/**
-  * @brief  Write Option Byte of the desired pages of the Flash.
-  * @param  Sector specifies the sectors to be write protected.
-  * @param  NewState new state of the specified FLASH Pages Write protection.
-  *   This parameter can be: 
-  *        @arg @ref OB_WRPSTATE_ENABLE
-  *        @arg @ref OB_WRPSTATE_DISABLE
-  * @retval HAL_StatusTypeDef
-  */
-static HAL_StatusTypeDef FLASH_OB_ProtectedSectorsConfig(uint32_t Sector, uint32_t NewState)
-#endif
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  uint32_t WRP_Data = 0;
-  uint32_t OB_WRP = Sector;
-  
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
- 
-  if(status == HAL_OK)
-  {
-    /* Clean the error context */
-    pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-    /* Update WRP only if at least 1 selected sector */
-    if (OB_WRP != 0x00000000U)
-    {
-      if ((OB_WRP & WRP_MASK_LOW) != 0x00000000U)
-      {
-        if (NewState != OB_WRPSTATE_DISABLE)
-        {
-          WRP_Data = (uint16_t)(((OB_WRP & WRP_MASK_LOW) | OB->WRP01));
-          OB->WRP01 = (uint32_t)(~(WRP_Data) << 16U) | (WRP_Data);
-        }             
-        else
-        {
-          WRP_Data = (uint16_t)(~OB_WRP & (WRP_MASK_LOW & OB->WRP01));
-          OB->WRP01 =  (uint32_t)((~WRP_Data) << 16U) | (WRP_Data);
-        }
-      }
-    }
-#if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || defined(STM32L082xx) || defined(STM32L083xx)  
-    /* Update WRP only if at least 1 selected sector */
-    if (OB_WRP != 0x00000000U)
-    {
-      if ((OB_WRP & WRP_MASK_HIGH) != 0x00000000U)
-      {
-        if (NewState != OB_WRPSTATE_DISABLE)
-        {
-          WRP_Data = (uint16_t)((((OB_WRP & WRP_MASK_HIGH) >> 16U | OB->WRP23))); 
-          OB->WRP23 = (uint32_t)(~(WRP_Data) << 16U) | (WRP_Data);
-        }             
-        else
-        {
-          WRP_Data = (uint16_t)((((~OB_WRP & WRP_MASK_HIGH) >> 16U & OB->WRP23))); 
-          OB->WRP23 = (uint32_t)((~WRP_Data) << 16U) | (WRP_Data);
-        } 
-      }
-    }
-
-    OB_WRP = Sector2;
-    /* Update WRP only if at least 1 selected sector */
-    if (OB_WRP != 0x00000000U)
-    {
-      if ((OB_WRP & WRP_MASK_LOW) != 0x00000000U)
-      {
-        if (NewState != OB_WRPSTATE_DISABLE)
-        {
-          WRP_Data = (uint16_t)(((OB_WRP & WRP_MASK_LOW) | OB->WRP45));
-          OB->WRP45 =(uint32_t)(~(WRP_Data) << 16U) | (WRP_Data);
-        }             
-        else
-        {
-          WRP_Data = (uint16_t)(~OB_WRP & (WRP_MASK_LOW & OB->WRP45));
-          OB->WRP45 = (uint32_t)((~WRP_Data) << 16U) | (WRP_Data);
-        }
-      }
-    }
-#endif /* STM32L071xx || STM32L072xx || STM32L073xx || STM32L081xx || STM32L082xx || STM32L083xx */
-  }
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-
-  /* Return the write protection operation Status */
-  return status;      
-}
-
-/**
-  * @brief  Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
-  * @param  OB_IWDG Selects the WDG mode.
-  *   This parameter can be one of the following values:
-  *     @arg @ref OB_IWDG_SW Software WDG selected
-  *     @arg @ref OB_IWDG_HW Hardware WDG selected
-  * @param  OB_STOP Reset event when entering STOP mode.
-  *   This parameter can be one of the following values:
-  *     @arg @ref OB_STOP_NORST No reset generated when entering in STOP
-  *     @arg @ref OB_STOP_RST Reset generated when entering in STOP
-  * @param  OB_STDBY Reset event when entering Standby mode.
-  *   This parameter can be one of the following values:
-  *     @arg @ref OB_STDBY_NORST No reset generated when entering in STANDBY
-  *     @arg @ref OB_STDBY_RST Reset generated when entering in STANDBY
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY)
-{
-  HAL_StatusTypeDef status = HAL_OK; 
-  uint32_t tmp = 0, tmp1 = 0;
-
-  /* Check the parameters */
-  assert_param(IS_OB_IWDG_SOURCE(OB_IWDG));
-  assert_param(IS_OB_STOP_SOURCE(OB_STOP));
-  assert_param(IS_OB_STDBY_SOURCE(OB_STDBY));
-
-  /* Get the User Option byte register */
-  tmp1 = OB->USER & ((~FLASH_OPTR_USER) >> 16U);
-
-  /* Calculate the user option byte to write */ 
-  tmp = (uint32_t)(((uint32_t)~((uint32_t)((uint32_t)(OB_IWDG) | (uint32_t)(OB_STOP) | (uint32_t)(OB_STDBY) | tmp1))) << 16U);
-  tmp |= ((uint32_t)(OB_IWDG) | ((uint32_t)OB_STOP) | (uint32_t)(OB_STDBY) | tmp1);
-  
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  
-  if(status == HAL_OK)
-  {  
-    /* Clean the error context */
-    pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-    /* Write the User Option Byte */
-    OB->USER = tmp;
-    
-    /* Wait for last operation to be completed */
-    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  }
-
-  /* Return the Option Byte program Status */
-  return status;
-}
-
-#if defined(FLASH_OPTR_BFB2)
-/**
-  * @brief  Configures to boot from Bank1 or Bank2.
-  * @param  OB_BOOT select the FLASH Bank to boot from.
-  *   This parameter can be one of the following values:
-  *          This parameter can be one of the following values:
-  *             @arg @ref OB_BOOT_BANK1 BFB2 option bit reset
-  *             @arg @ref OB_BOOT_BANK2 BFB2 option bit set
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t OB_BOOT)
-{
-  HAL_StatusTypeDef status = HAL_OK; 
-  uint32_t tmp = 0U, tmp1 = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_OB_BOOT_BANK(OB_BOOT));
-
-  /* Get the User Option byte register  and BOR Level*/
-  tmp1 = OB->USER & ((~FLASH_OPTR_BFB2) >> 16U);
-
-  /* Calculate the option byte to write */
-  tmp = (uint32_t)~(OB_BOOT | tmp1) << 16U;
-  tmp |= (OB_BOOT | tmp1);
-
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-
-  if(status == HAL_OK)
-  {  
-    /* Clean the error context */
-    pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-    /* Write the BOOT Option Byte */
-    OB->USER = tmp;
-    
-    /* Wait for last operation to be completed */
-    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  }
-
-  /* Return the Option Byte program Status */
-  return status;
-}
-
-#endif /* FLASH_OPTR_BFB2 */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup FLASH
-  * @{
-  */
-
-
-/** @addtogroup FLASH_Private_Functions
- * @{
- */
-
-/**
-  * @brief  Erases a specified page in program memory.
-  * @param  PageAddress The page address in program memory to be erased.
-  * @note   A Page is erased in the Program memory only if the address to load 
-  *         is the start address of a page (multiple of @ref FLASH_PAGE_SIZE bytes).
-  * @retval None
-  */
-void FLASH_PageErase(uint32_t PageAddress)
-{
-  /* Clean the error context */
-  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-  /* Set the ERASE bit */
-  SET_BIT(FLASH->PECR, FLASH_PECR_ERASE);
-
-  /* Set PROG bit */
-  SET_BIT(FLASH->PECR, FLASH_PECR_PROG);
-
-  /* Write 00000000h to the first word of the program page to erase */
-  *(__IO uint32_t *)(uint32_t)(PageAddress & ~(FLASH_PAGE_SIZE - 1)) = 0x00000000;
-}
-  
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_FLASH_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c
deleted file mode 100755
index 1c0be0de..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c
+++ /dev/null
@@ -1,537 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_flash_ramfunc.c
-  * @author  MCD Application Team
-  * @brief   FLASH RAMFUNC driver.
-  *          This file provides a Flash firmware functions which should be 
-  *          executed from internal SRAM
-  *
-  *  @verbatim
-
-    *** ARM Compiler ***
-    --------------------
-    [..] RAM functions are defined using the toolchain options. 
-         Functions that are be executed in RAM should reside in a separate
-         source module. Using the 'Options for File' dialog you can simply change
-         the 'Code / Const' area of a module to a memory space in physical RAM.
-         Available memory areas are declared in the 'Target' tab of the 
-         Options for Target' dialog.
-
-    *** ICCARM Compiler ***
-    -----------------------
-    [..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
-
-    *** GNU Compiler ***
-    --------------------
-    [..] RAM functions are defined using a specific toolchain attribute
-         "__attribute__((section(".RamFunc")))".
-
-@endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-
-/** @addtogroup FLASH
-  * @{
-  */
-/** @addtogroup FLASH_Private_Variables
- * @{
- */
-extern FLASH_ProcessTypeDef pFlash;
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-/** @defgroup FLASH_RAMFUNC FLASH_RAMFUNC
-  * @brief FLASH functions executed from RAM
-  * @{
-  */ 
-
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup FLASH_RAMFUNC_Private_Functions FLASH RAM Private Functions
- * @{
- */
-
-static __RAM_FUNC FLASHRAM_WaitForLastOperation(uint32_t Timeout);
-static __RAM_FUNC FLASHRAM_SetErrorCode(void);
-
-/**
-  * @}
-  */
-
-/* Private functions ---------------------------------------------------------*/
- 
-/** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH RAM Exported Functions
- *
-@verbatim  
- ===============================================================================
-                      ##### ramfunc functions #####
- ===============================================================================  
-    [..]
-    This subsection provides a set of functions that should be executed from RAM 
-    transfers.
-
-@endverbatim
-  * @{
-  */ 
-
-/** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions 
-  * @{
-  */  
-
-/**
-  * @brief  Enable  the power down mode during RUN mode.
-  * @note  This function can be used only when the user code is running from Internal SRAM.
-  * @retval HAL status
-  */
-__RAM_FUNC HAL_FLASHEx_EnableRunPowerDown(void)
-{
-  /* Enable the Power Down in Run mode*/
-  __HAL_FLASH_POWER_DOWN_ENABLE();
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Disable the power down mode during RUN mode.
-  * @note  This function can be used only when the user code is running from Internal SRAM.
-  * @retval HAL status
-  */
-__RAM_FUNC HAL_FLASHEx_DisableRunPowerDown(void)
-{
-  /* Disable the Power Down in Run mode*/
-  __HAL_FLASH_POWER_DOWN_DISABLE();
-
-  return HAL_OK;  
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup FLASH_RAMFUNC_Exported_Functions_Group2 Programming and erasing operation functions 
- *
-@verbatim  
-@endverbatim
-  * @{
-  */
-
-#if defined(FLASH_PECR_PARALLBANK)
-/**
-  * @brief  Erases a specified 2 pages in program memory in parallel.
-  * @note   This function can be used only for STM32L07xxx/STM32L08xxx  devices.
-  *         To correctly run this function, the @ref HAL_FLASH_Unlock() function
-  *         must be called before.
-  *         Call the @ref HAL_FLASH_Lock() to disable the flash memory access 
-  *        (recommended to protect the FLASH memory against possible unwanted operation).
-  * @param  Page_Address1: The page address in program memory to be erased in 
-  *         the first Bank (BANK1). This parameter should be between FLASH_BASE
-  *         and FLASH_BANK1_END.
-  * @param  Page_Address2: The page address in program memory to be erased in 
-  *         the second Bank (BANK2). This parameter should be between FLASH_BANK2_BASE
-  *         and FLASH_BANK2_END.
-  * @note   A Page is erased in the Program memory only if the address to load 
-  *         is the start address of a page (multiple of @ref FLASH_PAGE_SIZE bytes).
-  * @retval HAL status
-  */
-__RAM_FUNC HAL_FLASHEx_EraseParallelPage(uint32_t Page_Address1, uint32_t Page_Address2)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-
-  /* Wait for last operation to be completed */
-  status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  
-  if(status == HAL_OK)
-  {
-    /* Proceed to erase the page */
-    SET_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK);
-    SET_BIT(FLASH->PECR, FLASH_PECR_ERASE);
-    SET_BIT(FLASH->PECR, FLASH_PECR_PROG);
-  
-    /* Write 00000000h to the first word of the first program page to erase */
-    *(__IO uint32_t *)Page_Address1 = 0x00000000U;
-    /* Write 00000000h to the first word of the second program page to erase */    
-    *(__IO uint32_t *)Page_Address2 = 0x00000000U;
- 
-    /* Wait for last operation to be completed */
-    status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-
-    /* If the erase operation is completed, disable the ERASE, PROG and PARALLBANK bits */
-    CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG);
-    CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE);
-    CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK);
-  }     
-  /* Return the Erase Status */
-  return status;
-}
-
-/**
-  * @brief  Program 2 half pages in program memory in parallel (half page size is 16 Words).
-  * @note   This function can be used only for STM32L07xxx/STM32L08xxx  devices.
-  * @param  Address1: specifies the first address to be written in the first bank 
-  *        (BANK1). This parameter should be between FLASH_BASE and (FLASH_BANK1_END - FLASH_PAGE_SIZE).
-  * @param  pBuffer1: pointer to the buffer  containing the data to be  written 
-  *         to the first half page in the first bank.
-  * @param  Address2: specifies the second address to be written in the second bank
-  *        (BANK2). This parameter should be between FLASH_BANK2_BASE and (FLASH_BANK2_END - FLASH_PAGE_SIZE).
-  * @param  pBuffer2: pointer to the buffer containing the data to be  written 
-  *         to the second half page in the second bank.
-  * @note   To correctly run this function, the @ref HAL_FLASH_Unlock() function
-  *         must be called before.
-  *         Call the @ref HAL_FLASH_Lock() to disable the flash memory access  
-  *         (recommended to protect the FLASH memory against possible unwanted operation).
-  * @note   Half page write is possible only from SRAM.
-  * @note   A half page is written to the program memory only if the first 
-  *         address to load is the start address of a half page (multiple of 64 
-  *         bytes) and the 15 remaining words to load are in the same half page.
-  * @note   During the Program memory half page write all read operations are 
-  *         forbidden (this includes DMA read operations and debugger read 
-  *         operations such as breakpoints, periodic updates, etc.).
-  * @note   If a PGAERR is set during a Program memory half page write, the 
-  *         complete write operation is aborted. Software should then reset the 
-  *         FPRG and PROG/DATA bits and restart the write operation from the 
-  *         beginning.
-  * @retval HAL status
-  */
-__RAM_FUNC HAL_FLASHEx_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuffer1, uint32_t Address2, uint32_t* pBuffer2)
-{
-  uint32_t count = 0U; 
-  HAL_StatusTypeDef status = HAL_OK;
-
-  /* Wait for last operation to be completed */
-  status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  
-  if(status == HAL_OK)
-  {
-    /* Proceed to program the new half page */
-    SET_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK);
-    SET_BIT(FLASH->PECR, FLASH_PECR_FPRG);
-    SET_BIT(FLASH->PECR, FLASH_PECR_PROG);
-
-    /* Wait for last operation to be completed */
-    status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-    if(status == HAL_OK)
-    {
-      /* Disable all IRQs */
-      __disable_irq();
-
-      /* Write the first half page directly with 16 different words */
-      while(count < 16U)
-      {
-        /* Address1 doesn't need to be increased */ 
-        *(__IO uint32_t*) Address1 = *pBuffer1;
-        pBuffer1++;
-        count ++;  
-      }
-
-      /* Write the second half page directly with 16 different words */
-      count = 0U;
-      while(count < 16U)
-      {
-        /* Address2 doesn't need to be increased */ 
-        *(__IO uint32_t*) Address2 = *pBuffer2;
-        pBuffer2++;
-        count ++;  
-      }
-
-      /* Enable IRQs */
-      __enable_irq();
-
-      /* Wait for last operation to be completed */
-      status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-    }
-
-    /* if the write operation is completed, disable the PROG, FPRG and PARALLBANK bits */
-    CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG);
-    CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG);
-    CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK);
-  }
-
-  /* Return the Write Status */
-  return status;
-}
-#endif /* FLASH_PECR_PARALLBANK */
-
-/**
-  * @brief  Program a half page in program memory.
-  * @param  Address: specifies the address to be written.
-  * @param  pBuffer: pointer to the buffer  containing the data to be  written to 
-  *         the half page.
-  * @note   To correctly run this function, the @ref HAL_FLASH_Unlock() function
-  *         must be called before.
-  *         Call the @ref HAL_FLASH_Lock() to disable the flash memory access  
-  *         (recommended to protect the FLASH memory against possible unwanted operation)
-  * @note   Half page write is possible only from SRAM.
-  * @note   A half page is written to the program memory only if the first 
-  *         address to load is the start address of a half page (multiple of 64 
-  *         bytes) and the 15 remaining words to load are in the same half page.
-  * @note   During the Program memory half page write all read operations are 
-  *         forbidden (this includes DMA read operations and debugger read 
-  *         operations such as breakpoints, periodic updates, etc.).
-  * @note   If a PGAERR is set during a Program memory half page write, the 
-  *         complete write operation is aborted. Software should then reset the 
-  *         FPRG and PROG/DATA bits and restart the write operation from the 
-  *         beginning.
-  * @retval HAL status
-  */
-__RAM_FUNC HAL_FLASHEx_HalfPageProgram(uint32_t Address, uint32_t* pBuffer)
-{
-  uint32_t count = 0U; 
-  HAL_StatusTypeDef status = HAL_OK;
-
-  /* Wait for last operation to be completed */
-  status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  
-  if(status == HAL_OK)
-  {
-    /* Proceed to program the new half page */
-    SET_BIT(FLASH->PECR, FLASH_PECR_FPRG);
-    SET_BIT(FLASH->PECR, FLASH_PECR_PROG);
-    
-    /* Disable all IRQs */
-    __disable_irq();
-
-    /* Write one half page directly with 16 different words */
-    while(count < 16U)
-    {
-      /* Address doesn't need to be increased */ 
-      *(__IO uint32_t*) Address = *pBuffer;
-      pBuffer++;
-      count ++;  
-    }
-
-    /* Enable IRQs */
-    __enable_irq();
-
-    /* Wait for last operation to be completed */
-    status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
- 
-    /* If the write operation is completed, disable the PROG and FPRG bits */
-    CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG);
-    CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG);
-  }
-
-  /* Return the Write Status */
-  return status;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup FLASH_RAMFUNC_Exported_Functions_Group3 Peripheral errors functions 
- *  @brief    Peripheral errors functions 
- *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral errors functions #####
- ===============================================================================  
-    [..]
-    This subsection permit to get in run-time errors of  the FLASH peripheral.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Get the specific FLASH errors flag.
-  * @param  Error pointer is the error value. It can be a mixed of:
-  *            @arg @ref HAL_FLASH_ERROR_RD      FLASH Read Protection error flag (PCROP)
-  *            @arg @ref HAL_FLASH_ERROR_SIZE    FLASH Programming Parallelism error flag  
-  *            @arg @ref HAL_FLASH_ERROR_PGA     FLASH Programming Alignment error flag
-  *            @arg @ref HAL_FLASH_ERROR_WRP     FLASH Write protected error flag
-  *            @arg @ref HAL_FLASH_ERROR_OPTV    FLASH Option valid error flag 
-  *            @arg @ref HAL_FLASH_ERROR_FWWERR  FLASH Write or Erase operation aborted
-  *            @arg @ref HAL_FLASH_ERROR_NOTZERO FLASH Write operation is done in a not-erased region
-  * @retval HAL Status
-  */
-__RAM_FUNC HAL_FLASHEx_GetError(uint32_t * Error)
-{ 
-  *Error = pFlash.ErrorCode;
-  return HAL_OK;  
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup FLASH_RAMFUNC_Private_Functions
-  * @{
-  */ 
-
-/**
-  * @brief  Set the specific FLASH error flag.
-  * @retval HAL Status
-  */
-static __RAM_FUNC FLASHRAM_SetErrorCode(void)
-{
-  uint32_t flags = 0;
-  
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
-  {
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
-    flags |= FLASH_FLAG_WRPERR;
-  }
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR))
-  {
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_PGA;
-    flags |= FLASH_FLAG_PGAERR;
-  }
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR))
-  { 
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_SIZE;
-    flags |= FLASH_FLAG_SIZERR;
-  }
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
-  {
-    /* WARNING : On the first cut of STM32L031xx and STM32L041xx devices,
-     *           (RefID = 0x1000) the FLASH_FLAG_OPTVERR bit was not behaving
-     *           as expected. If the user run an application using the first
-     *           cut of the STM32L031xx device or the first cut of the STM32L041xx
-     *           device, this error should be ignored. The revId of the device
-     *           can be retrieved via the HAL_GetREVID() function.
-     *
-     */
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
-    flags |= FLASH_FLAG_OPTVERR;
-  }
-
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR))
-  {
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_RD;
-    flags |= FLASH_FLAG_RDERR;
-  }
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR))
-  { 
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_FWWERR;
-    flags |= HAL_FLASH_ERROR_FWWERR;
-  }
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR))
-  { 
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_NOTZERO;
-    flags |= FLASH_FLAG_NOTZEROERR;
-  }
-
-  /* Clear FLASH error pending bits */
-  __HAL_FLASH_CLEAR_FLAG(flags);
-
-  return HAL_OK;
-}  
-
-/**
-  * @brief  Wait for a FLASH operation to complete.
-  * @param  Timeout: maximum flash operationtimeout
-  * @retval HAL status
-  */
-static __RAM_FUNC  FLASHRAM_WaitForLastOperation(uint32_t Timeout)
-{ 
-    /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
-       Even if the FLASH operation fails, the BUSY flag will be reset and an error
-       flag will be set */
-       
-    while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) && (Timeout != 0x00U)) 
-    { 
-      Timeout--;
-    }
-    
-    if(Timeout == 0x00U)
-    {
-      return HAL_TIMEOUT;
-    }
-    
-  /* Check FLASH End of Operation flag  */
-  if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
-  {
-    /* Clear FLASH End of Operation pending bit */
-    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
-  }
-  
-  if( __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)     || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)     || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR)     || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)    || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)      || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR)     || 
-      __HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR) )
-  {
-    /*Save the error code*/
-
-    /* WARNING : On the first cut of STM32L031xx and STM32L041xx devices,
-     *           (RefID = 0x1000) the FLASH_FLAG_OPTVERR bit was not behaving
-     *           as expected. If the user run an application using the first
-     *           cut of the STM32L031xx device or the first cut of the STM32L041xx
-     *           device, this error should be ignored. The revId of the device
-     *           can be retrieved via the HAL_GetREVID() function.
-     *
-     */
-    FLASHRAM_SetErrorCode();
-    return HAL_ERROR;
-  }
-
-  /* There is no error flag set */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_FLASH_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-     
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c
deleted file mode 100755
index 563e0866..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c
+++ /dev/null
@@ -1,545 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_gpio.c
-  * @author  MCD Application Team
-  * @brief   GPIO HAL module driver.  
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the General Purpose Input/Output (GPIO) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *         
-  @verbatim
-  ==============================================================================
-                    ##### GPIO Peripheral features #####
-  ==============================================================================
-  [..] 
-    (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually 
-  configured by software in several modes:
-        (++) Input mode 
-        (++) Analog mode
-        (++) Output mode
-        (++) Alternate function mode
-        (++) External interrupt/event lines
- 
-    (+) During and just after reset, the alternate functions and external interrupt  
-  lines are not active and the I/O ports are configured in input floating mode.
-  
-    (+) All GPIO pins have weak internal pull-up and pull-down resistors, which can be 
-  activated or not.
-
-    (+) In Output or Alternate mode, each IO can be configured on open-drain or push-pull
-  type and the IO speed can be selected depending on the VDD value.
-  
-    (+) The microcontroller IO pins are connected to onboard peripherals/modules through a 
-        multiplexer that allows only one peripheral alternate function (AF) connected 
-  to an IO pin at a time. In this way, there can be no conflict between peripherals 
-  sharing the same IO pin. 
-
-    (+) All ports have external interrupt/event capability. To use external interrupt 
-  lines, the port must be configured in input mode. All available GPIO pins are 
-  connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
-  
-    (+) The external interrupt/event controller consists of up to 28 edge detectors
-  (16 lines are connected to GPIO) for generating event/interrupt requests (each 
-  input line can be independently configured to select the type (interrupt or event) 
-  and the corresponding trigger event (rising or falling or both). Each line can 
-  also be masked independently. 
-  
-                     ##### How to use this driver #####
-  ==============================================================================  
-  [..]             
-    (#) Enable the GPIO IOPORT clock using the following function: __HAL_RCC_GPIOx_CLK_ENABLE(). 
-
-    (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
-        (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
-        (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef 
-             structure.
-        (++) In case of Output or alternate function mode selection: the speed is 
-             configured through "Speed" member from GPIO_InitTypeDef structure.
-        (++) In alternate mode is selection, the alternate function connected to the IO
-             is configured through "Alternate" member from GPIO_InitTypeDef structure.
-        (++) Analog mode is required when a pin is to be used as ADC channel 
-             or DAC output.
-        (++) In case of external interrupt/event selection the "Mode" member from 
-             GPIO_InitTypeDef structure select the type (interrupt or event) and 
-             the corresponding trigger event (rising or falling or both).
-   
-    (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority 
-        mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
-        HAL_NVIC_EnableIRQ().
-         
-   (#) HAL_GPIO_DeInit allows to set register values to their reset value. This function
-       is also to be used when unconfiguring pin which was used as an external interrupt
-       or in event mode. That is the only way to reset the corresponding bit in
-       EXTI & SYSCFG registers.
-
-    (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
-            
-    (#) To set/reset the level of a pin configured in output mode use 
-        HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
-
-    (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
-
-    (#) During and just after reset, the alternate functions are not 
-        active and the GPIO pins are configured in input floating mode (except JTAG
-        pins).
-  
-    (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose 
-        (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has 
-        priority over the GPIO function.
-  
-    (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as 
-        general purpose PH0 and PH1, respectively, when the HSE oscillator is off. 
-        The HSE has priority over the GPIO function.
-  
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-
-/** @addtogroup GPIO
-  * @brief GPIO HAL module driver
-  * @{
-  */
-
-/** @addtogroup GPIO_Private
-  * @{
-  */
-/* Private define ------------------------------------------------------------*/
-
- 
-#define GPIO_MODE             ((uint32_t)0x00000003U)
-#define EXTI_MODE             ((uint32_t)0x10000000U)
-#define GPIO_MODE_IT          ((uint32_t)0x00010000U)
-#define GPIO_MODE_EVT         ((uint32_t)0x00020000U)
-#define RISING_EDGE           ((uint32_t)0x00100000U) 
-#define FALLING_EDGE          ((uint32_t)0x00200000U) 
-#define GPIO_OUTPUT_TYPE      ((uint32_t)0x00000010U)
-
-#define GPIO_NUMBER           ((uint32_t)16U)
-
-/**
-  * @}
-  */
-/** @addtogroup GPIO_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup GPIO_Exported_Functions_Group1
- *  @brief    Initialization and de-initialization functions
- *
-@verbatim
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
- 
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init.
-  * @param  GPIOx: where x can be (A..E and H) to select the GPIO peripheral for STM32L0XX family devices.
-  *                Note that GPIOE is not available on all devices.
-  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
-  *                    the configuration information for the specified GPIO peripheral.
-  * @retval None
-  */
-void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
-{
-  uint32_t position = 0x00U;
-  uint32_t iocurrent = 0x00U;
-  uint32_t temp = 0x00U;
- 
-  /* Check the parameters */
-  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
-  assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
-  assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,(GPIO_Init->Pin)));
-
-  /* Configure the port pins */
-  while (((GPIO_Init->Pin) >> position) != 0)
-  {
-    /* Get the IO position */
-    iocurrent = (GPIO_Init->Pin) & (1U << position);
-    
-    if(iocurrent)
-    {
-      /*--------------------- GPIO Mode Configuration ------------------------*/
-      /* In case of Alternate function mode selection */
-      if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) 
-      {
-        /* Check if the Alternate function is compliant with the GPIO in use */
-        assert_param(IS_GPIO_AF_AVAILABLE(GPIOx,(GPIO_Init->Alternate)));
-        /* Configure Alternate function mapped with the current IO */ 
-        temp = GPIOx->AFR[position >> 3U];
-        temp &= ~((uint32_t)0xFU << ((uint32_t)(position & (uint32_t)0x07U) * 4U)) ;
-        temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07U) * 4U)) ;
-        GPIOx->AFR[position >> 3U] = temp;
-      } 
-
-      /* In case of Output or Alternate function mode selection */
-      if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
-         (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
-      {
-        /* Check the Speed parameter */
-        assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
-        /* Configure the IO Speed */
-        temp = GPIOx->OSPEEDR;
-        temp &= ~(GPIO_OSPEEDER_OSPEED0 << (position * 2U));
-        temp |= (GPIO_Init->Speed << (position * 2U));
-        GPIOx->OSPEEDR = temp;
-
-        /* Configure the IO Output Type */
-        temp= GPIOx->OTYPER;
-        temp &= ~(GPIO_OTYPER_OT_0 << position) ;
-        temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
-        GPIOx->OTYPER = temp;
-      }
-
-      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
-      temp = GPIOx->MODER;
-      temp &= ~(GPIO_MODER_MODE0 << (position * 2U));
-      temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
-      GPIOx->MODER = temp;
-
-      /* Activate the Pull-up or Pull down resistor for the current IO */
-      temp = GPIOx->PUPDR;
-      temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U));
-      temp |= ((GPIO_Init->Pull) << (position * 2U)); 
-      GPIOx->PUPDR = temp;
-
-      /*--------------------- EXTI Mode Configuration ------------------------*/
-      /* Configure the External Interrupt or event for the current IO */
-      if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 
-      {
-        /* Enable SYSCFG Clock */
-        __HAL_RCC_SYSCFG_CLK_ENABLE();
-        
-        temp = SYSCFG->EXTICR[position >> 2U];
-        CLEAR_BIT(temp, ((uint32_t)0x0FU) << (4U * (position & 0x03U)));
-        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03U)));
-        SYSCFG->EXTICR[position >> 2U] = temp;
-                  
-        /* Clear EXTI line configuration */
-        temp = EXTI->IMR;
-        temp &= ~((uint32_t)iocurrent);
-        if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
-        {
-          temp |= iocurrent;
-        }
-        EXTI->IMR = temp;
-
-        temp = EXTI->EMR;
-        temp &= ~((uint32_t)iocurrent);
-        if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
-        {
-          temp |= iocurrent;
-        }
-        EXTI->EMR = temp;
-
-        /* Clear Rising Falling edge configuration */
-        temp = EXTI->RTSR;
-        temp &= ~((uint32_t)iocurrent);
-        if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
-        {
-          temp |= iocurrent;
-        }
-        EXTI->RTSR = temp;
-
-        temp = EXTI->FTSR;
-        temp &= ~((uint32_t)iocurrent);
-        if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
-        {
-          temp |= iocurrent;
-        }
-        EXTI->FTSR = temp;
-      }
-    }
-    position++;
-  }
-}
-
-/**
-  * @brief  De-initializes the GPIOx peripheral registers to their default reset values.
-  * @param  GPIOx: where x can be (A..E and H) to select the GPIO peripheral for STM32L0XX family devices.
-  *                Note that GPIOE is not available on all devices.
-  * @param  GPIO_Pin: specifies the port bit to be written.
-  *                   This parameter can be one of GPIO_PIN_x where x can be (0..15).
-  *                   All port bits are not necessarily available on all GPIOs.
-  * @retval None
-  */
-void HAL_GPIO_DeInit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin)
-{ 
-  uint32_t position = 0x00U;
-  uint32_t iocurrent = 0x00U;
-  uint32_t tmp = 0x00U;
-
-  /* Check the parameters */
-  assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,GPIO_Pin));
-
-  /* Configure the port pins */
-  while ((GPIO_Pin >> position) != 0)
-  {
-    /* Get the IO position */
-    iocurrent = (GPIO_Pin) & (1U << position);
-
-    if(iocurrent)
-    {
-      /*------------------------- GPIO Mode Configuration --------------------*/
-      /* Configure IO Direction in Input Floting Mode */
-      GPIOx->MODER |= (GPIO_MODER_MODE0 << (position * 2U));
-           
-      /* Configure the default Alternate Function in current IO */ 
-      GPIOx->AFR[position >> 3U] &= ~((uint32_t)0xFU << ((uint32_t)(position & (uint32_t)0x07U) * 4U)) ;
-      
-      /* Configure the default value for IO Speed */
-      GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEED0 << (position * 2U));
-      
-      /* Configure the default value IO Output Type */
-      GPIOx->OTYPER  &= ~(GPIO_OTYPER_OT_0 << position) ;
-      
-      /* Deactivate the Pull-up oand Pull-down resistor for the current IO */
-      GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPD0 << (position * 2U));
-      
-      /*------------------------- EXTI Mode Configuration --------------------*/
-      /* Clear the External Interrupt or Event for the current IO */
-      
-      tmp = SYSCFG->EXTICR[position >> 2U];
-      tmp &= (((uint32_t)0x0FU) << (4U * (position & 0x03U)));
-      if(tmp == (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U))))
-      {
-        tmp = ((uint32_t)0x0FU) << (4U * (position & 0x03U));
-        SYSCFG->EXTICR[position >> 2U] &= ~tmp;
-
-        /* Clear EXTI line configuration */
-        EXTI->IMR &= ~((uint32_t)iocurrent);
-        EXTI->EMR &= ~((uint32_t)iocurrent);
-
-        /* Clear Rising Falling edge configuration */
-        EXTI->RTSR &= ~((uint32_t)iocurrent);
-        EXTI->FTSR &= ~((uint32_t)iocurrent);
-      }
-    }
-     position++;
-  }
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup GPIO_Exported_Functions_Group2
- *  @brief   GPIO Read and Write
- *
-@verbatim
- ===============================================================================
-                       ##### IO operation functions #####
- ===============================================================================
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Reads the specified input port pin.
-  * @param  GPIOx: where x can be (A..E and H) to select the GPIO peripheral for STM32L0xx family devices.
-  *                Note that GPIOE is not available on all devices.
-  * @param  GPIO_Pin: specifies the port bit to read.
-  *                   This parameter can be GPIO_PIN_x where x can be (0..15).
-  *                   All port bits are not necessarily available on all GPIOs.
-  * @retval The input port pin value.
-  */
-GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
-{
-  GPIO_PinState bitstatus;
-  
-  /* Check the parameters */
-  assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,GPIO_Pin));
-  
-  if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
-  {
-    bitstatus = GPIO_PIN_SET;
-  }
-  else
-  {
-    bitstatus = GPIO_PIN_RESET;
-  }
-  return bitstatus;
-}
-
-/**
-  * @brief  Sets or clears the selected data port bit.
-  * 
-  * @note   This function uses GPIOx_BSRR register to allow atomic read/modify 
-  *         accesses. In this way, there is no risk of an IRQ occurring between
-  *         the read and the modify access.
-  *               
-  * @param  GPIOx: where x can be (A..E and H) to select the GPIO peripheral for STM32L0xx family devices.
-  *                Note that GPIOE is not available on all devices.
-  * @param  GPIO_Pin: specifies the port bit to be written.
-  *                   This parameter can be one of GPIO_PIN_x where x can be (0..15).
-  *                   All port bits are not necessarily available on all GPIOs.
-  * @param  PinState: specifies the value to be written to the selected bit.
-  *                   This parameter can be one of the GPIO_PinState enum values:
-  *                        GPIO_PIN_RESET: to clear the port pin
-  *                        GPIO_PIN_SET: to set the port pin
-  * @retval None
-  */
-void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
-{
-  /* Check the parameters */
-  assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,GPIO_Pin));
-  assert_param(IS_GPIO_PIN_ACTION(PinState));
-  
-  if(PinState != GPIO_PIN_RESET)
-  {
-    GPIOx->BSRR = GPIO_Pin;
-  }
-  else
-  {
-    GPIOx->BRR = GPIO_Pin ;
-  }
-}
-
-/**
-  * @brief  Toggles the specified GPIO pins.
-  * @param  GPIOx: Where x can be (A..E and H) to select the GPIO peripheral for STM32L0xx family devices.
-  *                Note that GPIOE is not available on all devices.
-  *                All port bits are not necessarily available on all GPIOs.
-  * @param  GPIO_Pin: Specifies the pins to be toggled.
-  * @retval None
-  */
-void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
-{
-  /* Check the parameters */
-  assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,GPIO_Pin));
-
-  GPIOx->ODR ^= GPIO_Pin;
-}
-
-/**
-* @brief  Locks GPIO Pins configuration registers.
-* @note   The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
-*         GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
-* @note   The configuration of the locked GPIO pins can no longer be modified
-*         until the next reset.
-* @param  GPIOx: where x can be (A..E and H) to select the GPIO peripheral for STM32L0xx family.
-*                Note that GPIOE is not available on all devices.
-* @param  GPIO_Pin: specifies the port bit to be locked.
-*         This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
-*         All port bits are not necessarily available on all GPIOs.
-* @retval None
-*/
-HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
-{
-  __IO uint32_t tmp = GPIO_LCKR_LCKK;
-
-  /* Check the parameters */
-  assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,GPIO_Pin));
-
-  /* Apply lock key write sequence */
-  tmp |= GPIO_Pin;
-  /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
-  GPIOx->LCKR = tmp;
-  /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
-  GPIOx->LCKR = GPIO_Pin;
-  /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
-  GPIOx->LCKR = tmp;
-  /* Read LCKK bit*/
-  tmp = GPIOx->LCKR;
-
-  if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET)
-  {
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_ERROR;
-  }
-}
-/**
-  * @brief  This function handles EXTI interrupt request.
-  * @param  GPIO_Pin: Specifies the pins connected to the EXTI line.
-  * @retval None
-  */
-void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
-{
-  /* EXTI line interrupt detected */
-  if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) 
-  { 
-    __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
-    HAL_GPIO_EXTI_Callback(GPIO_Pin);
-  }
-}
-
-/**
-  * @brief  EXTI line detection callbacks.
-  * @param  GPIO_Pin: Specifies the pins connected to the EXTI line.
-  * @retval None
-  */
-__weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(GPIO_Pin);
-
-  /* NOTE: This function Should not be modified, when the callback is needed,
-           the HAL_GPIO_EXTI_Callback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c
deleted file mode 100755
index 2d1ccc8a..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c
+++ /dev/null
@@ -1,4857 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_i2c.c
-  * @author  MCD Application Team
-  * @brief   I2C HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the Inter Integrated Circuit (I2C) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral State and Errors functions
-  *
-  @verbatim
-  ==============================================================================
-                        ##### How to use this driver #####
-  ==============================================================================
-    [..]
-    The I2C HAL driver can be used as follows:
-
-    (#) Declare a I2C_HandleTypeDef handle structure, for example:
-        I2C_HandleTypeDef  hi2c;
-
-    (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
-        (##) Enable the I2Cx interface clock
-        (##) I2C pins configuration
-            (+++) Enable the clock for the I2C GPIOs
-            (+++) Configure I2C pins as alternate function open-drain
-        (##) NVIC configuration if you need to use interrupt process
-            (+++) Configure the I2Cx interrupt priority
-            (+++) Enable the NVIC I2C IRQ Channel
-        (##) DMA Configuration if you need to use DMA process
-            (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
-            (+++) Enable the DMAx interface clock using
-            (+++) Configure the DMA handle parameters
-            (+++) Configure the DMA Tx or Rx channel
-            (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
-            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
-                  the DMA Tx or Rx channel
-
-    (#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addressing mode,
-        Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure.
-
-    (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
-        (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
-
-    (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
-
-    (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
-
-    *** Polling mode IO operation ***
-    =================================
-    [..]
-      (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
-      (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
-      (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
-      (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
-
-    *** Polling mode IO MEM operation ***
-    =====================================
-    [..]
-      (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
-      (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
-
-
-    *** Interrupt mode IO operation ***
-    ===================================
-    [..]
-      (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Transmit_IT()
-      (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
-      (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receive_IT()
-      (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
-      (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmit_IT()
-      (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
-      (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_IT()
-      (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
-      (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
-           add his own code by customization of function pointer HAL_I2C_ErrorCallback()
-      (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
-      (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
-      (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
-           This action will inform Master to generate a Stop condition to discard the communication.
-
-
-    *** Interrupt mode IO sequential operation ***
-    ==============================================
-    [..]
-      (@) These interfaces allow to manage a sequential transfer with a repeated start condition
-          when a direction change during transfer
-    [..]
-      (+) A specific option field manage the different steps of a sequential transfer
-      (+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below:
-      (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
-      (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
-                            and data to transfer without a final stop condition
-      (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with start condition, address
-                            and data to transfer without a final stop condition, an then permit a call the same master sequential interface
-                            several times (like HAL_I2C_Master_Sequential_Transmit_IT() then HAL_I2C_Master_Sequential_Transmit_IT())
-      (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
-                            and with new data to transfer if the direction change or manage only the new data to transfer
-                            if no direction change and without a final stop condition in both cases
-      (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
-                            and with new data to transfer if the direction change or manage only the new data to transfer
-                            if no direction change and with a final stop condition in both cases
-
-      (+) Differents sequential I2C interfaces are listed below:
-      (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT()
-      (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
-      (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT()
-      (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
-      (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
-      (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
-      (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
-      (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
-           add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
-      (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
-      (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT()
-      (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
-      (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT()
-      (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
-      (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
-           add his own code by customization of function pointer HAL_I2C_ErrorCallback()
-      (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
-      (++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
-      (++) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
-           This action will inform Master to generate a Stop condition to discard the communication.
-
-    *** Interrupt mode IO MEM operation ***
-    =======================================
-    [..]
-      (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using
-          HAL_I2C_Mem_Write_IT()
-      (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
-      (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using
-          HAL_I2C_Mem_Read_IT()
-      (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
-      (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
-           add his own code by customization of function pointer HAL_I2C_ErrorCallback()
-
-    *** DMA mode IO operation ***
-    ==============================
-    [..]
-      (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using
-          HAL_I2C_Master_Transmit_DMA()
-      (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
-      (+) Receive in master mode an amount of data in non-blocking mode (DMA) using
-          HAL_I2C_Master_Receive_DMA()
-      (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
-      (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using
-          HAL_I2C_Slave_Transmit_DMA()
-      (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
-      (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using
-          HAL_I2C_Slave_Receive_DMA()
-      (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
-      (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
-           add his own code by customization of function pointer HAL_I2C_ErrorCallback()
-      (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
-      (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
-      (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
-           This action will inform Master to generate a Stop condition to discard the communication.
-
-    *** DMA mode IO MEM operation ***
-    =================================
-    [..]
-      (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using
-          HAL_I2C_Mem_Write_DMA()
-      (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
-      (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using
-          HAL_I2C_Mem_Read_DMA()
-      (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
-      (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
-           add his own code by customization of function pointer HAL_I2C_ErrorCallback()
-
-
-     *** I2C HAL driver macros list ***
-     ==================================
-     [..]
-       Below the list of most used macros in I2C HAL driver.
-
-      (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
-      (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
-      (+) __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode
-      (+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not
-      (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
-      (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
-      (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
-
-     [..]
-       (@) You can refer to the I2C HAL driver header file for more useful macros
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup I2C I2C
-  * @brief I2C HAL module driver
-  * @{
-  */
-
-#ifdef HAL_I2C_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-
-/** @defgroup I2C_Private_Define I2C Private Define
-  * @{
-  */
-#define TIMING_CLEAR_MASK   (0xF0FFFFFFU)  /*!< I2C TIMING clear register Mask */
-#define I2C_TIMEOUT_ADDR    (10000U)       /*!< 10 s  */
-#define I2C_TIMEOUT_BUSY    (25U)          /*!< 25 ms */
-#define I2C_TIMEOUT_DIR     (25U)          /*!< 25 ms */
-#define I2C_TIMEOUT_RXNE    (25U)          /*!< 25 ms */
-#define I2C_TIMEOUT_STOPF   (25U)          /*!< 25 ms */
-#define I2C_TIMEOUT_TC      (25U)          /*!< 25 ms */
-#define I2C_TIMEOUT_TCR     (25U)          /*!< 25 ms */
-#define I2C_TIMEOUT_TXIS    (25U)          /*!< 25 ms */
-#define I2C_TIMEOUT_FLAG    (25U)          /*!< 25 ms */
-
-#define MAX_NBYTE_SIZE      255U
-#define SlaveAddr_SHIFT     7U
-#define SlaveAddr_MSK       0x06U
-
-/* Private define for @ref PreviousState usage */
-#define I2C_STATE_MSK             ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~((uint32_t)HAL_I2C_STATE_READY)))) /*!< Mask State define, keep only RX and TX bits            */
-#define I2C_STATE_NONE            ((uint32_t)(HAL_I2C_MODE_NONE))                                                        /*!< Default Value                                          */
-#define I2C_STATE_MASTER_BUSY_TX  ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER))            /*!< Master Busy TX, combinaison of State LSB and Mode enum */
-#define I2C_STATE_MASTER_BUSY_RX  ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER))            /*!< Master Busy RX, combinaison of State LSB and Mode enum */
-#define I2C_STATE_SLAVE_BUSY_TX   ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE))             /*!< Slave Busy TX, combinaison of State LSB and Mode enum  */
-#define I2C_STATE_SLAVE_BUSY_RX   ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE))             /*!< Slave Busy RX, combinaison of State LSB and Mode enum  */
-#define I2C_STATE_MEM_BUSY_TX     ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MEM))               /*!< Memory Busy TX, combinaison of State LSB and Mode enum */
-#define I2C_STATE_MEM_BUSY_RX     ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MEM))               /*!< Memory Busy RX, combinaison of State LSB and Mode enum */
-
-
-/* Private define to centralize the enable/disable of Interrupts */
-#define I2C_XFER_TX_IT          (0x00000001U)
-#define I2C_XFER_RX_IT          (0x00000002U)
-#define I2C_XFER_LISTEN_IT      (0x00000004U)
-
-#define I2C_XFER_ERROR_IT       (0x00000011U)
-#define I2C_XFER_CPLT_IT        (0x00000012U)
-#define I2C_XFER_RELOAD_IT      (0x00000012U)
-
-/* Private define Sequential Transfer Options default/reset value */
-#define I2C_NO_OPTION_FRAME     (0xFFFF0000U)
-/**
-  * @}
-  */
-
-/* Private macro -------------------------------------------------------------*/
-#define I2C_GET_DMA_REMAIN_DATA(__HANDLE__) ((((__HANDLE__)->State) == HAL_I2C_STATE_BUSY_TX)   ? \
-                                            ((uint32_t)((__HANDLE__)->hdmatx->Instance->CNDTR)) : \
-                                            ((uint32_t)((__HANDLE__)->hdmarx->Instance->CNDTR)))
-
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/** @defgroup I2C_Private_Functions I2C Private Functions
-  * @{
-  */
-/* Private functions to handle DMA transfer */
-static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
-static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
-static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
-static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
-static void I2C_DMAError(DMA_HandleTypeDef *hdma);
-static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
-
-/* Private functions to handle IT transfer */
-static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
-static void I2C_ITMasterSequentialCplt(I2C_HandleTypeDef *hi2c);
-static void I2C_ITSlaveSequentialCplt(I2C_HandleTypeDef *hi2c);
-static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
-static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
-static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
-static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode);
-
-/* Private functions to handle IT transfer */
-static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
-
-/* Private functions for I2C transfer IRQ handler */
-static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
-static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
-static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
-static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
-
-/* Private functions to handle flags during polling transfer */
-static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
-
-/* Private functions to centralize the enable/disable of Interrupts */
-static HAL_StatusTypeDef I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest);
-static HAL_StatusTypeDef I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest);
-
-/* Private functions to flush TXDR register */
-static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c);
-
-/* Private functions to handle  start, restart or stop a transfer */
-static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c,  uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup I2C_Exported_Functions I2C Exported Functions
-  * @{
-  */
-
-/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
- *  @brief    Initialization and Configuration functions
- *
-@verbatim
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This subsection provides a set of functions allowing to initialize and
-          deinitialize the I2Cx peripheral:
-
-      (+) User must Implement HAL_I2C_MspInit() function in which he configures
-          all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
-
-      (+) Call the function HAL_I2C_Init() to configure the selected device with
-          the selected configuration:
-        (++) Clock Timing
-        (++) Own Address 1
-        (++) Addressing mode (Master, Slave)
-        (++) Dual Addressing mode
-        (++) Own Address 2
-        (++) Own Address 2 Mask
-        (++) General call mode
-        (++) Nostretch mode
-
-      (+) Call the function HAL_I2C_DeInit() to restore the default configuration
-          of the selected I2Cx peripheral.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the I2C according to the specified parameters
-  *         in the I2C_InitTypeDef and initialize the associated handle.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
-{
-  /* Check the I2C handle allocation */
-  if (hi2c == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
-  assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
-  assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
-  assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
-  assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
-  assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks));
-  assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
-  assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
-
-  if (hi2c->State == HAL_I2C_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hi2c->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
-    HAL_I2C_MspInit(hi2c);
-  }
-
-  hi2c->State = HAL_I2C_STATE_BUSY;
-
-  /* Disable the selected I2C peripheral */
-  __HAL_I2C_DISABLE(hi2c);
-
-  /*---------------------------- I2Cx TIMINGR Configuration ------------------*/
-  /* Configure I2Cx: Frequency range */
-  hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK;
-
-  /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
-  /* Disable Own Address1 before set the Own Address1 configuration */
-  hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
-
-  /* Configure I2Cx: Own Address1 and ack own address1 mode */
-  if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
-  {
-    hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1);
-  }
-  else /* I2C_ADDRESSINGMODE_10BIT */
-  {
-    hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1);
-  }
-
-  /*---------------------------- I2Cx CR2 Configuration ----------------------*/
-  /* Configure I2Cx: Addressing Master mode */
-  if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
-  {
-    hi2c->Instance->CR2 = (I2C_CR2_ADD10);
-  }
-  /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */
-  hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);
-
-  /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
-  /* Disable Own Address2 before set the Own Address2 configuration */
-  hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE;
-
-  /* Configure I2Cx: Dual mode and Own Address2 */
-  hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddress2Masks << 8));
-
-  /*---------------------------- I2Cx CR1 Configuration ----------------------*/
-  /* Configure I2Cx: Generalcall and NoStretch mode */
-  hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
-
-  /* Enable the selected I2C peripheral */
-  __HAL_I2C_ENABLE(hi2c);
-
-  hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-  hi2c->State = HAL_I2C_STATE_READY;
-  hi2c->PreviousState = I2C_STATE_NONE;
-  hi2c->Mode = HAL_I2C_MODE_NONE;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitialize the I2C peripheral.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
-{
-  /* Check the I2C handle allocation */
-  if (hi2c == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
-
-  hi2c->State = HAL_I2C_STATE_BUSY;
-
-  /* Disable the I2C Peripheral Clock */
-  __HAL_I2C_DISABLE(hi2c);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
-  HAL_I2C_MspDeInit(hi2c);
-
-  hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-  hi2c->State = HAL_I2C_STATE_RESET;
-  hi2c->PreviousState = I2C_STATE_NONE;
-  hi2c->Mode = HAL_I2C_MODE_NONE;
-
-  /* Release Lock */
-  __HAL_UNLOCK(hi2c);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Initialize the I2C MSP.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief DeInitialize the I2C MSP.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
- *  @brief   Data transfers functions
- *
-@verbatim
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
-    [..]
-    This subsection provides a set of functions allowing to manage the I2C data
-    transfers.
-
-    (#) There are two modes of transfer:
-       (++) Blocking mode : The communication is performed in the polling mode.
-            The status of all data processing is returned by the same function
-            after finishing transfer.
-       (++) No-Blocking mode : The communication is performed using Interrupts
-            or DMA. These functions return the status of the transfer startup.
-            The end of the data processing will be indicated through the
-            dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
-            using DMA mode.
-
-    (#) Blocking mode functions are :
-        (++) HAL_I2C_Master_Transmit()
-        (++) HAL_I2C_Master_Receive()
-        (++) HAL_I2C_Slave_Transmit()
-        (++) HAL_I2C_Slave_Receive()
-        (++) HAL_I2C_Mem_Write()
-        (++) HAL_I2C_Mem_Read()
-        (++) HAL_I2C_IsDeviceReady()
-
-    (#) No-Blocking mode functions with Interrupt are :
-        (++) HAL_I2C_Master_Transmit_IT()
-        (++) HAL_I2C_Master_Receive_IT()
-        (++) HAL_I2C_Slave_Transmit_IT()
-        (++) HAL_I2C_Slave_Receive_IT()
-        (++) HAL_I2C_Mem_Write_IT()
-        (++) HAL_I2C_Mem_Read_IT()
-
-    (#) No-Blocking mode functions with DMA are :
-        (++) HAL_I2C_Master_Transmit_DMA()
-        (++) HAL_I2C_Master_Receive_DMA()
-        (++) HAL_I2C_Slave_Transmit_DMA()
-        (++) HAL_I2C_Slave_Receive_DMA()
-        (++) HAL_I2C_Mem_Write_DMA()
-        (++) HAL_I2C_Mem_Read_DMA()
-
-    (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
-        (++) HAL_I2C_MemTxCpltCallback()
-        (++) HAL_I2C_MemRxCpltCallback()
-        (++) HAL_I2C_MasterTxCpltCallback()
-        (++) HAL_I2C_MasterRxCpltCallback()
-        (++) HAL_I2C_SlaveTxCpltCallback()
-        (++) HAL_I2C_SlaveRxCpltCallback()
-        (++) HAL_I2C_ErrorCallback()
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Transmits in master mode an amount of data in blocking mode.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode      = HAL_I2C_MODE_MASTER;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr  = pData;
-    hi2c->XferCount = Size;
-    hi2c->XferISR   = NULL;
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
-    }
-
-    while (hi2c->XferCount > 0U)
-    {
-      /* Wait until TXIS flag is set */
-      if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-      {
-        if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-        {
-          return HAL_ERROR;
-        }
-        else
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-      /* Write data to TXDR */
-      hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
-      hi2c->XferCount--;
-      hi2c->XferSize--;
-
-      if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U))
-      {
-        /* Wait until TCR flag is set */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        if (hi2c->XferCount > MAX_NBYTE_SIZE)
-        {
-          hi2c->XferSize = MAX_NBYTE_SIZE;
-          I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
-        }
-        else
-        {
-          hi2c->XferSize = hi2c->XferCount;
-          I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
-        }
-      }
-    }
-
-    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
-    /* Wait until STOPF flag is set */
-    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        return HAL_ERROR;
-      }
-      else
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Clear STOP Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-    /* Clear Configuration Register 2 */
-    I2C_RESET_CR2(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-    hi2c->Mode  = HAL_I2C_MODE_NONE;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receives in master mode an amount of data in blocking mode.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode      = HAL_I2C_MODE_MASTER;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr  = pData;
-    hi2c->XferCount = Size;
-    hi2c->XferISR   = NULL;
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
-    }
-
-    while (hi2c->XferCount > 0U)
-    {
-      /* Wait until RXNE flag is set */
-      if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-      {
-        if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-        {
-          return HAL_ERROR;
-        }
-        else
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-
-      /* Read data from RXDR */
-      (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
-      hi2c->XferSize--;
-      hi2c->XferCount--;
-
-      if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U))
-      {
-        /* Wait until TCR flag is set */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        if (hi2c->XferCount > MAX_NBYTE_SIZE)
-        {
-          hi2c->XferSize = MAX_NBYTE_SIZE;
-          I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
-        }
-        else
-        {
-          hi2c->XferSize = hi2c->XferCount;
-          I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
-        }
-      }
-    }
-
-    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
-    /* Wait until STOPF flag is set */
-    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        return HAL_ERROR;
-      }
-      else
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Clear STOP Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-    /* Clear Configuration Register 2 */
-    I2C_RESET_CR2(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-    hi2c->Mode  = HAL_I2C_MODE_NONE;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Transmits in slave mode an amount of data in blocking mode.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode      = HAL_I2C_MODE_SLAVE;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr  = pData;
-    hi2c->XferCount = Size;
-    hi2c->XferISR   = NULL;
-
-    /* Enable Address Acknowledge */
-    hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Wait until ADDR flag is set */
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
-    {
-      /* Disable Address Acknowledge */
-      hi2c->Instance->CR2 |= I2C_CR2_NACK;
-      return HAL_TIMEOUT;
-    }
-
-    /* Clear ADDR flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-
-    /* If 10bit addressing mode is selected */
-    if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
-    {
-      /* Wait until ADDR flag is set */
-      if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
-      {
-        /* Disable Address Acknowledge */
-        hi2c->Instance->CR2 |= I2C_CR2_NACK;
-        return HAL_TIMEOUT;
-      }
-
-      /* Clear ADDR flag */
-      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-    }
-
-    /* Wait until DIR flag is set Transmitter mode */
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout, tickstart) != HAL_OK)
-    {
-      /* Disable Address Acknowledge */
-      hi2c->Instance->CR2 |= I2C_CR2_NACK;
-      return HAL_TIMEOUT;
-    }
-
-    while (hi2c->XferCount > 0U)
-    {
-      /* Wait until TXIS flag is set */
-      if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-      {
-        /* Disable Address Acknowledge */
-        hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-        if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-        {
-          return HAL_ERROR;
-        }
-        else
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-
-      /* Write data to TXDR */
-      hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
-      hi2c->XferCount--;
-    }
-
-    /* Wait until STOP flag is set */
-    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-    {
-      /* Disable Address Acknowledge */
-      hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        /* Normal use case for Transmitter mode */
-        /* A NACK is generated to confirm the end of transfer */
-        hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-      }
-      else
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Clear STOP flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-    /* Wait until BUSY flag is reset */
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK)
-    {
-      /* Disable Address Acknowledge */
-      hi2c->Instance->CR2 |= I2C_CR2_NACK;
-      return HAL_TIMEOUT;
-    }
-
-    /* Disable Address Acknowledge */
-    hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-    hi2c->State = HAL_I2C_STATE_READY;
-    hi2c->Mode  = HAL_I2C_MODE_NONE;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive in slave mode an amount of data in blocking mode
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode      = HAL_I2C_MODE_SLAVE;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr  = pData;
-    hi2c->XferCount = Size;
-    hi2c->XferISR   = NULL;
-
-    /* Enable Address Acknowledge */
-    hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Wait until ADDR flag is set */
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
-    {
-      /* Disable Address Acknowledge */
-      hi2c->Instance->CR2 |= I2C_CR2_NACK;
-      return HAL_TIMEOUT;
-    }
-
-    /* Clear ADDR flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-
-    /* Wait until DIR flag is reset Receiver mode */
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout, tickstart) != HAL_OK)
-    {
-      /* Disable Address Acknowledge */
-      hi2c->Instance->CR2 |= I2C_CR2_NACK;
-      return HAL_TIMEOUT;
-    }
-
-    while (hi2c->XferCount > 0U)
-    {
-      /* Wait until RXNE flag is set */
-      if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-      {
-        /* Disable Address Acknowledge */
-        hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-        /* Store Last receive data if any */
-        if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
-        {
-          /* Read data from RXDR */
-          (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
-          hi2c->XferCount--;
-        }
-
-        if (hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
-        {
-          return HAL_TIMEOUT;
-        }
-        else
-        {
-          return HAL_ERROR;
-        }
-      }
-
-      /* Read data from RXDR */
-      (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
-      hi2c->XferCount--;
-    }
-
-    /* Wait until STOP flag is set */
-    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-    {
-      /* Disable Address Acknowledge */
-      hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        return HAL_ERROR;
-      }
-      else
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Clear STOP flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-    /* Wait until BUSY flag is reset */
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK)
-    {
-      /* Disable Address Acknowledge */
-      hi2c->Instance->CR2 |= I2C_CR2_NACK;
-      return HAL_TIMEOUT;
-    }
-
-    /* Disable Address Acknowledge */
-    hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-    hi2c->State = HAL_I2C_STATE_READY;
-    hi2c->Mode  = HAL_I2C_MODE_NONE;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Transmit in master mode an amount of data in non-blocking mode with Interrupt
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
-{
-  uint32_t xfermode = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode        = HAL_I2C_MODE_MASTER;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Master_ISR_IT;
-
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = I2C_AUTOEND_MODE;
-    }
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */
-    I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-
-    /* Enable ERR, TC, STOP, NACK, TXI interrupt */
-    /* possible to enable all of these */
-    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive in master mode an amount of data in non-blocking mode with Interrupt
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
-{
-  uint32_t xfermode = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode        = HAL_I2C_MODE_MASTER;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Master_ISR_IT;
-
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = I2C_AUTOEND_MODE;
-    }
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */
-    I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-
-    /* Enable ERR, TC, STOP, NACK, RXI interrupt */
-    /* possible to enable all of these */
-    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Transmit in slave mode an amount of data in non-blocking mode with Interrupt
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
-{
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode        = HAL_I2C_MODE_SLAVE;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Enable Address Acknowledge */
-    hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferSize    = hi2c->XferCount;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Slave_ISR_IT;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-
-    /* Enable ERR, TC, STOP, NACK, TXI interrupt */
-    /* possible to enable all of these */
-    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive in slave mode an amount of data in non-blocking mode with Interrupt
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
-{
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode        = HAL_I2C_MODE_SLAVE;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Enable Address Acknowledge */
-    hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferSize    = hi2c->XferCount;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Slave_ISR_IT;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-
-    /* Enable ERR, TC, STOP, NACK, RXI interrupt */
-    /* possible to enable all of these */
-    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Transmit in master mode an amount of data in non-blocking mode with DMA
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
-{
-  uint32_t xfermode = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode        = HAL_I2C_MODE_MASTER;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Master_ISR_DMA;
-
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = I2C_AUTOEND_MODE;
-    }
-
-    if (hi2c->XferSize > 0U)
-    {
-      /* Set the I2C DMA transfer complete callback */
-      hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
-
-      /* Set the DMA error callback */
-      hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
-
-      /* Set the unused DMA callbacks to NULL */
-      hi2c->hdmatx->XferHalfCpltCallback = NULL;
-      hi2c->hdmatx->XferAbortCallback = NULL;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
-
-      /* Send Slave Address */
-      /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE);
-
-      /* Update XferCount value */
-      hi2c->XferCount -= hi2c->XferSize;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      /* Note : The I2C interrupts must be enabled after unlocking current process
-                to avoid the risk of I2C interrupt handle execution before current
-                process unlock */
-      /* Enable ERR and NACK interrupts */
-      I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);
-
-      /* Enable DMA Request */
-      hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
-    }
-    else
-    {
-      /* Update Transfer ISR function pointer */
-      hi2c->XferISR = I2C_Master_ISR_IT;
-
-      /* Send Slave Address */
-      /* Set NBYTES to write and generate START condition */
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      /* Note : The I2C interrupts must be enabled after unlocking current process
-                to avoid the risk of I2C interrupt handle execution before current
-                process unlock */
-      /* Enable ERR, TC, STOP, NACK, TXI interrupt */
-      /* possible to enable all of these */
-      /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
-      I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive in master mode an amount of data in non-blocking mode with DMA
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
-{
-  uint32_t xfermode = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode        = HAL_I2C_MODE_MASTER;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Master_ISR_DMA;
-
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = I2C_AUTOEND_MODE;
-    }
-
-    if (hi2c->XferSize > 0U)
-    {
-      /* Set the I2C DMA transfer complete callback */
-      hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
-
-      /* Set the DMA error callback */
-      hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
-
-      /* Set the unused DMA callbacks to NULL */
-      hi2c->hdmarx->XferHalfCpltCallback = NULL;
-      hi2c->hdmarx->XferAbortCallback = NULL;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
-
-      /* Send Slave Address */
-      /* Set NBYTES to read and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ);
-
-      /* Update XferCount value */
-      hi2c->XferCount -= hi2c->XferSize;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      /* Note : The I2C interrupts must be enabled after unlocking current process
-                to avoid the risk of I2C interrupt handle execution before current
-                process unlock */
-      /* Enable ERR and NACK interrupts */
-      I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);
-
-      /* Enable DMA Request */
-      hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
-    }
-    else
-    {
-      /* Update Transfer ISR function pointer */
-      hi2c->XferISR = I2C_Master_ISR_IT;
-
-      /* Send Slave Address */
-      /* Set NBYTES to read and generate START condition */
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      /* Note : The I2C interrupts must be enabled after unlocking current process
-                to avoid the risk of I2C interrupt handle execution before current
-                process unlock */
-      /* Enable ERR, TC, STOP, NACK, TXI interrupt */
-      /* possible to enable all of these */
-      /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
-      I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
-    }
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Transmit in slave mode an amount of data in non-blocking mode with DMA
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
-{
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode        = HAL_I2C_MODE_SLAVE;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferSize    = hi2c->XferCount;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Slave_ISR_DMA;
-
-    /* Set the I2C DMA transfer complete callback */
-    hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;
-
-    /* Set the DMA error callback */
-    hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
-
-    /* Set the unused DMA callbacks to NULL */
-    hi2c->hdmatx->XferHalfCpltCallback = NULL;
-    hi2c->hdmatx->XferAbortCallback = NULL;
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
-
-    /* Enable Address Acknowledge */
-    hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-    /* Enable ERR, STOP, NACK, ADDR interrupts */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
-
-    /* Enable DMA Request */
-    hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive in slave mode an amount of data in non-blocking mode with DMA
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
-{
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode        = HAL_I2C_MODE_SLAVE;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferSize    = hi2c->XferCount;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Slave_ISR_DMA;
-
-    /* Set the I2C DMA transfer complete callback */
-    hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;
-
-    /* Set the DMA error callback */
-    hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
-
-    /* Set the unused DMA callbacks to NULL */
-    hi2c->hdmarx->XferHalfCpltCallback = NULL;
-    hi2c->hdmarx->XferAbortCallback = NULL;
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
-
-    /* Enable Address Acknowledge */
-    hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-    /* Enable ERR, STOP, NACK, ADDR interrupts */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
-
-    /* Enable DMA Request */
-    hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-/**
-  * @brief  Write an amount of data in blocking mode to a specific memory address
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  MemAddress Internal memory address
-  * @param  MemAddSize Size of internal memory address
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode      = HAL_I2C_MODE_MEM;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr  = pData;
-    hi2c->XferCount = Size;
-    hi2c->XferISR   = NULL;
-
-    /* Send Slave Address and Memory Address */
-    if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_ERROR;
-      }
-      else
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
-    }
-
-    do
-    {
-      /* Wait until TXIS flag is set */
-      if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-      {
-        if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-        {
-          return HAL_ERROR;
-        }
-        else
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-
-      /* Write data to TXDR */
-      hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
-      hi2c->XferCount--;
-      hi2c->XferSize--;
-
-      if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U))
-      {
-        /* Wait until TCR flag is set */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        if (hi2c->XferCount > MAX_NBYTE_SIZE)
-        {
-          hi2c->XferSize = MAX_NBYTE_SIZE;
-          I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
-        }
-        else
-        {
-          hi2c->XferSize = hi2c->XferCount;
-          I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
-        }
-      }
-
-    }
-    while (hi2c->XferCount > 0U);
-
-    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
-    /* Wait until STOPF flag is reset */
-    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        return HAL_ERROR;
-      }
-      else
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Clear STOP Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-    /* Clear Configuration Register 2 */
-    I2C_RESET_CR2(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-    hi2c->Mode  = HAL_I2C_MODE_NONE;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Read an amount of data in blocking mode from a specific memory address
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  MemAddress Internal memory address
-  * @param  MemAddSize Size of internal memory address
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode      = HAL_I2C_MODE_MEM;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr  = pData;
-    hi2c->XferCount = Size;
-    hi2c->XferISR   = NULL;
-
-    /* Send Slave Address and Memory Address */
-    if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_ERROR;
-      }
-      else
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
-    }
-
-    do
-    {
-      /* Wait until RXNE flag is set */
-      if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-
-      /* Read data from RXDR */
-      (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
-      hi2c->XferSize--;
-      hi2c->XferCount--;
-
-      if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U))
-      {
-        /* Wait until TCR flag is set */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        if (hi2c->XferCount > MAX_NBYTE_SIZE)
-        {
-          hi2c->XferSize = MAX_NBYTE_SIZE;
-          I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
-        }
-        else
-        {
-          hi2c->XferSize = hi2c->XferCount;
-          I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
-        }
-      }
-    }
-    while (hi2c->XferCount > 0U);
-
-    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
-    /* Wait until STOPF flag is reset */
-    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        return HAL_ERROR;
-      }
-      else
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Clear STOP Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-    /* Clear Configuration Register 2 */
-    I2C_RESET_CR2(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-    hi2c->Mode  = HAL_I2C_MODE_NONE;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-/**
-  * @brief  Write an amount of data in non-blocking mode with Interrupt to a specific memory address
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  MemAddress Internal memory address
-  * @param  MemAddSize Size of internal memory address
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
-{
-  uint32_t tickstart = 0U;
-  uint32_t xfermode = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode        = HAL_I2C_MODE_MEM;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Master_ISR_IT;
-
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = I2C_AUTOEND_MODE;
-    }
-
-    /* Send Slave Address and Memory Address */
-    if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_ERROR;
-      }
-      else
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-    I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-
-    /* Enable ERR, TC, STOP, NACK, TXI interrupt */
-    /* possible to enable all of these */
-    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Read an amount of data in non-blocking mode with Interrupt from a specific memory address
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  MemAddress Internal memory address
-  * @param  MemAddSize Size of internal memory address
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
-{
-  uint32_t tickstart = 0U;
-  uint32_t xfermode = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode        = HAL_I2C_MODE_MEM;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Master_ISR_IT;
-
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = I2C_AUTOEND_MODE;
-    }
-
-    /* Send Slave Address and Memory Address */
-    if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_ERROR;
-      }
-      else
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-    I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-
-    /* Enable ERR, TC, STOP, NACK, RXI interrupt */
-    /* possible to enable all of these */
-    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-/**
-  * @brief  Write an amount of data in non-blocking mode with DMA to a specific memory address
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  MemAddress Internal memory address
-  * @param  MemAddSize Size of internal memory address
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
-{
-  uint32_t tickstart = 0U;
-  uint32_t xfermode = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode        = HAL_I2C_MODE_MEM;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Master_ISR_DMA;
-
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = I2C_AUTOEND_MODE;
-    }
-
-    /* Send Slave Address and Memory Address */
-    if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_ERROR;
-      }
-      else
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Set the I2C DMA transfer complete callback */
-    hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
-
-    /* Set the DMA error callback */
-    hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
-
-    /* Set the unused DMA callbacks to NULL */
-    hi2c->hdmatx->XferHalfCpltCallback = NULL;
-    hi2c->hdmatx->XferAbortCallback = NULL;
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-    I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP);
-
-    /* Update XferCount value */
-    hi2c->XferCount -= hi2c->XferSize;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-    /* Enable ERR and NACK interrupts */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);
-
-    /* Enable DMA Request */
-    hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Reads an amount of data in non-blocking mode with DMA from a specific memory address.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  MemAddress Internal memory address
-  * @param  MemAddSize Size of internal memory address
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be read
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
-{
-  uint32_t tickstart = 0U;
-  uint32_t xfermode = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode        = HAL_I2C_MODE_MEM;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Master_ISR_DMA;
-
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = I2C_AUTOEND_MODE;
-    }
-
-    /* Send Slave Address and Memory Address */
-    if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_ERROR;
-      }
-      else
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Set the I2C DMA transfer complete callback */
-    hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
-
-    /* Set the DMA error callback */
-    hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
-
-    /* Set the unused DMA callbacks to NULL */
-    hi2c->hdmarx->XferHalfCpltCallback = NULL;
-    hi2c->hdmarx->XferAbortCallback = NULL;
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
-
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-    I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ);
-
-    /* Update XferCount value */
-    hi2c->XferCount -= hi2c->XferSize;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Enable DMA Request */
-    hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-    /* Enable ERR and NACK interrupts */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Checks if target device is ready for communication.
-  * @note   This function is used with Memory devices
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  Trials Number of trials
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  __IO uint32_t I2C_Trials = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_BUSY;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    do
-    {
-      /* Generate Start */
-      hi2c->Instance->CR2 = I2C_GENERATE_START(hi2c->Init.AddressingMode, DevAddress);
-
-      /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
-      /* Wait until STOPF flag is set or a NACK flag is set*/
-      tickstart = HAL_GetTick();
-      while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) && (hi2c->State != HAL_I2C_STATE_TIMEOUT))
-      {
-        if (Timeout != HAL_MAX_DELAY)
-        {
-          if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-          {
-            /* Device is ready */
-            hi2c->State = HAL_I2C_STATE_READY;
-            /* Process Unlocked */
-            __HAL_UNLOCK(hi2c);
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-
-      /* Check if the NACKF flag has not been set */
-      if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET)
-      {
-        /* Wait until STOPF flag is reset */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        /* Clear STOP Flag */
-        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-        /* Device is ready */
-        hi2c->State = HAL_I2C_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-
-        return HAL_OK;
-      }
-      else
-      {
-        /* Wait until STOPF flag is reset */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        /* Clear NACK Flag */
-        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-        /* Clear STOP Flag, auto generated with autoend*/
-        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-      }
-
-      /* Check if the maximum allowed number of trials has been reached */
-      if (I2C_Trials++ == Trials)
-      {
-        /* Generate Stop */
-        hi2c->Instance->CR2 |= I2C_CR2_STOP;
-
-        /* Wait until STOPF flag is reset */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        /* Clear STOP Flag */
-        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-      }
-    }
-    while (I2C_Trials < Trials);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_TIMEOUT;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Sequential transmit in master I2C mode an amount of data in non-blocking mode with Interrupt.
-  * @note   This interface allow to manage repeated start condition when a direction change during transfer
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
-  uint32_t xfermode = 0U;
-  uint32_t xferrequest = I2C_GENERATE_START_WRITE;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode      = HAL_I2C_MODE_MASTER;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = XferOptions;
-    hi2c->XferISR     = I2C_Master_ISR_IT;
-
-    /* If size > MAX_NBYTE_SIZE, use reload mode */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = hi2c->XferOptions;
-    }
-
-    /* If transfer direction not change, do not generate Restart Condition */
-    /* Mean Previous state is same as current state */
-    if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
-    {
-      xferrequest = I2C_NO_STARTSTOP;
-    }
-
-    /* Send Slave Address and set NBYTES to write */
-    I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, xferrequest);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Sequential receive in master I2C mode an amount of data in non-blocking mode with Interrupt
-  * @note   This interface allow to manage repeated start condition when a direction change during transfer
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
-  uint32_t xfermode = 0U;
-  uint32_t xferrequest = I2C_GENERATE_START_READ;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode      = HAL_I2C_MODE_MASTER;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = XferOptions;
-    hi2c->XferISR     = I2C_Master_ISR_IT;
-
-    /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = hi2c->XferOptions;
-    }
-
-    /* If transfer direction not change, do not generate Restart Condition */
-    /* Mean Previous state is same as current state */
-    if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
-    {
-      xferrequest = I2C_NO_STARTSTOP;
-    }
-
-    /* Send Slave Address and set NBYTES to read */
-    I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, xferrequest);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode with Interrupt
-  * @note   This interface allow to manage repeated start condition when a direction change during transfer
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
-  /* Check the parameters */
-  assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
-  if ((hi2c->State & HAL_I2C_STATE_LISTEN) == HAL_I2C_STATE_LISTEN)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT);
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */
-    /* and then toggle the HAL slave RX state to TX state */
-    if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)
-    {
-      /* Disable associated Interrupts */
-      I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);
-    }
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_TX_LISTEN;
-    hi2c->Mode      = HAL_I2C_MODE_SLAVE;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Enable Address Acknowledge */
-    hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferSize    = hi2c->XferCount;
-    hi2c->XferOptions = XferOptions;
-    hi2c->XferISR     = I2C_Slave_ISR_IT;
-
-    if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE)
-    {
-      /* Clear ADDR flag after prepare the transfer parameters */
-      /* This action will generate an acknowledge to the Master */
-      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-    to avoid the risk of I2C interrupt handle execution before current
-    process unlock */
-    /* REnable ADDR interrupt */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with Interrupt
-  * @note   This interface allow to manage repeated start condition when a direction change during transfer
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
-  /* Check the parameters */
-  assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
-  if ((hi2c->State & HAL_I2C_STATE_LISTEN) == HAL_I2C_STATE_LISTEN)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT);
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */
-    /* and then toggle the HAL slave TX state to RX state */
-    if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)
-    {
-      /* Disable associated Interrupts */
-      I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);
-    }
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_RX_LISTEN;
-    hi2c->Mode      = HAL_I2C_MODE_SLAVE;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Enable Address Acknowledge */
-    hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferSize    = hi2c->XferCount;
-    hi2c->XferOptions = XferOptions;
-    hi2c->XferISR     = I2C_Slave_ISR_IT;
-
-    if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT)
-    {
-      /* Clear ADDR flag after prepare the transfer parameters */
-      /* This action will generate an acknowledge to the Master */
-      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-    to avoid the risk of I2C interrupt handle execution before current
-    process unlock */
-    /* REnable ADDR interrupt */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Enable the Address listen mode with Interrupt.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
-{
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    hi2c->State = HAL_I2C_STATE_LISTEN;
-    hi2c->XferISR = I2C_Slave_ISR_IT;
-
-    /* Enable the Address Match interrupt */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Disable the Address listen mode with Interrupt.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
-{
-  /* Declaration of tmp to prevent undefined behavior of volatile usage */
-  uint32_t tmp;
-
-  /* Disable Address listen mode only if a transfer is not ongoing */
-  if (hi2c->State == HAL_I2C_STATE_LISTEN)
-  {
-    tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
-    hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
-    hi2c->State = HAL_I2C_STATE_READY;
-    hi2c->Mode = HAL_I2C_MODE_NONE;
-    hi2c->XferISR = NULL;
-
-    /* Disable the Address Match interrupt */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Abort a master I2C IT or DMA process communication with Interrupt.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
-{
-  if (hi2c->Mode == HAL_I2C_MODE_MASTER)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Disable Interrupts */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);
-    I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);
-
-    /* Set State at HAL_I2C_STATE_ABORT */
-    hi2c->State = HAL_I2C_STATE_ABORT;
-
-    /* Set NBYTES to 1 to generate a dummy read on I2C peripheral */
-    /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */
-    I2C_TransferConfig(hi2c, DevAddress, 1, I2C_AUTOEND_MODE, I2C_GENERATE_STOP);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    /* Wrong usage of abort function */
-    /* This function should be used only in case of abort monitored by master device */
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
- * @{
- */
-
-/**
-  * @brief  This function handles I2C event interrupt request.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
-{
-  /* Get current IT Flags and IT sources value */
-  uint32_t itflags   = READ_REG(hi2c->Instance->ISR);
-  uint32_t itsources = READ_REG(hi2c->Instance->CR1);
-
-  /* I2C events treatment -------------------------------------*/
-  if (hi2c->XferISR != NULL)
-  {
-    hi2c->XferISR(hi2c, itflags, itsources);
-  }
-}
-
-/**
-  * @brief  This function handles I2C error interrupt request.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
-{
-  uint32_t itflags   = READ_REG(hi2c->Instance->ISR);
-  uint32_t itsources = READ_REG(hi2c->Instance->CR1);
-
-  /* I2C Bus error interrupt occurred ------------------------------------*/
-  if (((itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERRI) != RESET))
-  {
-    hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
-
-    /* Clear BERR flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
-  }
-
-  /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/
-  if (((itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERRI) != RESET))
-  {
-    hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
-
-    /* Clear OVR flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
-  }
-
-  /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/
-  if (((itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERRI) != RESET))
-  {
-    hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
-
-    /* Clear ARLO flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
-  }
-
-  /* Call the Error Callback in case of Error detected */
-  if ((hi2c->ErrorCode & (HAL_I2C_ERROR_BERR | HAL_I2C_ERROR_OVR | HAL_I2C_ERROR_ARLO)) !=  HAL_I2C_ERROR_NONE)
-  {
-    I2C_ITError(hi2c, hi2c->ErrorCode);
-  }
-}
-
-/**
-  * @brief  Master Tx Transfer completed callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_MasterTxCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Master Rx Transfer completed callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_MasterRxCpltCallback could be implemented in the user file
-   */
-}
-
-/** @brief  Slave Tx Transfer completed callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Slave Rx Transfer completed callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Slave Address Match callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XFERDIRECTION
-  * @param  AddrMatchCode Address Match Code
-  * @retval None
-  */
-__weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-  UNUSED(TransferDirection);
-  UNUSED(AddrMatchCode);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_AddrCallback() could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Listen Complete callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_ListenCpltCallback() could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Memory Tx Transfer completed callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_MemTxCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Memory Rx Transfer completed callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_MemRxCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  I2C error callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_ErrorCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  I2C abort callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_AbortCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
- *  @brief   Peripheral State, Mode and Error functions
- *
-@verbatim
- ===============================================================================
-            ##### Peripheral State, Mode and Error functions #####
- ===============================================================================
-    [..]
-    This subsection permit to get in run-time the status of the peripheral
-    and the data flow.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the I2C handle state.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval HAL state
-  */
-HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
-{
-  /* Return I2C handle state */
-  return hi2c->State;
-}
-
-/**
-  * @brief  Returns the I2C Master, Slave, Memory or no mode.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *         the configuration information for I2C module
-  * @retval HAL mode
-  */
-HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
-{
-  return hi2c->Mode;
-}
-
-/**
-* @brief  Return the I2C error code.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *              the configuration information for the specified I2C.
-* @retval I2C Error Code
-*/
-uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
-{
-  return hi2c->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup I2C_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with Interrupt.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  ITFlags Interrupt flags to handle.
-  * @param  ITSources Interrupt sources enabled.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
-{
-  uint16_t devaddress = 0U;
-
-  /* Process Locked */
-  __HAL_LOCK(hi2c);
-
-  if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET))
-  {
-    /* Clear NACK Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-    /* Set corresponding Error Code */
-    /* No need to generate STOP, it is automatically done */
-    /* Error callback will be send during stop flag treatment */
-    hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-
-    /* Flush TX register */
-    I2C_Flush_TXDR(hi2c);
-  }
-  else if (((ITFlags & I2C_FLAG_RXNE) != RESET) && ((ITSources & I2C_IT_RXI) != RESET))
-  {
-    /* Read data from RXDR */
-    (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
-    hi2c->XferSize--;
-    hi2c->XferCount--;
-  }
-  else if (((ITFlags & I2C_FLAG_TXIS) != RESET) && ((ITSources & I2C_IT_TXI) != RESET))
-  {
-    /* Write data to TXDR */
-    hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
-    hi2c->XferSize--;
-    hi2c->XferCount--;
-  }
-  else if (((ITFlags & I2C_FLAG_TCR) != RESET) && ((ITSources & I2C_IT_TCI) != RESET))
-  {
-    if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U))
-    {
-      devaddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
-
-      if (hi2c->XferCount > MAX_NBYTE_SIZE)
-      {
-        hi2c->XferSize = MAX_NBYTE_SIZE;
-        I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
-      }
-      else
-      {
-        hi2c->XferSize = hi2c->XferCount;
-        if (hi2c->XferOptions != I2C_NO_OPTION_FRAME)
-        {
-          I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, hi2c->XferOptions, I2C_NO_STARTSTOP);
-        }
-        else
-        {
-          I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
-        }
-      }
-    }
-    else
-    {
-      /* Call TxCpltCallback() if no stop mode is set */
-      if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE)
-      {
-        /* Call I2C Master Sequential complete process */
-        I2C_ITMasterSequentialCplt(hi2c);
-      }
-      else
-      {
-        /* Wrong size Status regarding TCR flag event */
-        /* Call the corresponding callback to inform upper layer of End of Transfer */
-        I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);
-      }
-    }
-  }
-  else if (((ITFlags & I2C_FLAG_TC) != RESET) && ((ITSources & I2C_IT_TCI) != RESET))
-  {
-    if (hi2c->XferCount == 0U)
-    {
-      if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE)
-      {
-        /* Generate a stop condition in case of no transfer option */
-        if (hi2c->XferOptions == I2C_NO_OPTION_FRAME)
-        {
-          /* Generate Stop */
-          hi2c->Instance->CR2 |= I2C_CR2_STOP;
-        }
-        else
-        {
-          /* Call I2C Master Sequential complete process */
-          I2C_ITMasterSequentialCplt(hi2c);
-        }
-      }
-    }
-    else
-    {
-      /* Wrong size Status regarding TC flag event */
-      /* Call the corresponding callback to inform upper layer of End of Transfer */
-      I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);
-    }
-  }
-
-  if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET))
-  {
-    /* Call I2C Master complete process */
-    I2C_ITMasterCplt(hi2c, ITFlags);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hi2c);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with Interrupt.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  ITFlags Interrupt flags to handle.
-  * @param  ITSources Interrupt sources enabled.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
-{
-  /* Process locked */
-  __HAL_LOCK(hi2c);
-
-  if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET))
-  {
-    /* Check that I2C transfer finished */
-    /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
-    /* Mean XferCount == 0*/
-    /* So clear Flag NACKF only */
-    if (hi2c->XferCount == 0U)
-    {
-      if (((hi2c->XferOptions == I2C_FIRST_AND_LAST_FRAME) || (hi2c->XferOptions == I2C_LAST_FRAME)) && \
-          (hi2c->State == HAL_I2C_STATE_LISTEN))
-      {
-        /* Call I2C Listen complete process */
-        I2C_ITListenCplt(hi2c, ITFlags);
-      }
-      else if ((hi2c->XferOptions != I2C_NO_OPTION_FRAME) && (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN))
-      {
-        /* Clear NACK Flag */
-        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-        /* Flush TX register */
-        I2C_Flush_TXDR(hi2c);
-
-        /* Last Byte is Transmitted */
-        /* Call I2C Slave Sequential complete process */
-        I2C_ITSlaveSequentialCplt(hi2c);
-      }
-      else
-      {
-        /* Clear NACK Flag */
-        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-      }
-    }
-    else
-    {
-      /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/
-      /* Clear NACK Flag */
-      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-      /* Set ErrorCode corresponding to a Non-Acknowledge */
-      hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-    }
-  }
-  else if (((ITFlags & I2C_FLAG_RXNE) != RESET) && ((ITSources & I2C_IT_RXI) != RESET))
-  {
-    if (hi2c->XferCount > 0U)
-    {
-      /* Read data from RXDR */
-      (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
-      hi2c->XferSize--;
-      hi2c->XferCount--;
-    }
-
-    if ((hi2c->XferCount == 0U) && \
-        (hi2c->XferOptions != I2C_NO_OPTION_FRAME))
-    {
-      /* Call I2C Slave Sequential complete process */
-      I2C_ITSlaveSequentialCplt(hi2c);
-    }
-  }
-  else if (((ITFlags & I2C_FLAG_ADDR) != RESET) && ((ITSources & I2C_IT_ADDRI) != RESET))
-  {
-    I2C_ITAddrCplt(hi2c, ITFlags);
-  }
-  else if (((ITFlags & I2C_FLAG_TXIS) != RESET) && ((ITSources & I2C_IT_TXI) != RESET))
-  {
-    /* Write data to TXDR only if XferCount not reach "0" */
-    /* A TXIS flag can be set, during STOP treatment      */
-    /* Check if all Datas have already been sent */
-    /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
-    if (hi2c->XferCount > 0U)
-    {
-      /* Write data to TXDR */
-      hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
-      hi2c->XferCount--;
-      hi2c->XferSize--;
-    }
-    else
-    {
-      if ((hi2c->XferOptions == I2C_NEXT_FRAME) || (hi2c->XferOptions == I2C_FIRST_FRAME))
-      {
-        /* Last Byte is Transmitted */
-        /* Call I2C Slave Sequential complete process */
-        I2C_ITSlaveSequentialCplt(hi2c);
-      }
-    }
-  }
-
-  /* Check if STOPF is set */
-  if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET))
-  {
-    /* Call I2C Slave complete process */
-    I2C_ITSlaveCplt(hi2c, ITFlags);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hi2c);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with DMA.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  ITFlags Interrupt flags to handle.
-  * @param  ITSources Interrupt sources enabled.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
-{
-  uint16_t devaddress = 0U;
-  uint32_t xfermode = 0U;
-
-  /* Process Locked */
-  __HAL_LOCK(hi2c);
-
-  if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET))
-  {
-    /* Clear NACK Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-    /* Set corresponding Error Code */
-    hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-
-    /* No need to generate STOP, it is automatically done */
-    /* But enable STOP interrupt, to treat it */
-    /* Error callback will be send during stop flag treatment */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);
-
-    /* Flush TX register */
-    I2C_Flush_TXDR(hi2c);
-  }
-  else if (((ITFlags & I2C_FLAG_TCR) != RESET) && ((ITSources & I2C_IT_TCI) != RESET))
-  {
-    /* Disable TC interrupt */
-    __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_TCI);
-
-    if (hi2c->XferCount != 0U)
-    {
-      /* Recover Slave address */
-      devaddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
-
-      /* Prepare the new XferSize to transfer */
-      if (hi2c->XferCount > MAX_NBYTE_SIZE)
-      {
-        hi2c->XferSize = MAX_NBYTE_SIZE;
-        xfermode = I2C_RELOAD_MODE;
-      }
-      else
-      {
-        hi2c->XferSize = hi2c->XferCount;
-        xfermode = I2C_AUTOEND_MODE;
-      }
-
-      /* Set the new XferSize in Nbytes register */
-      I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP);
-
-      /* Update XferCount value */
-      hi2c->XferCount -= hi2c->XferSize;
-
-      /* Enable DMA Request */
-      if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
-      {
-        hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
-      }
-      else
-      {
-        hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
-      }
-    }
-    else
-    {
-      /* Wrong size Status regarding TCR flag event */
-      /* Call the corresponding callback to inform upper layer of End of Transfer */
-      I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);
-    }
-  }
-  else if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET))
-  {
-    /* Call I2C Master complete process */
-    I2C_ITMasterCplt(hi2c, ITFlags);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hi2c);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with DMA.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  ITFlags Interrupt flags to handle.
-  * @param  ITSources Interrupt sources enabled.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
-{
-  /* Process locked */
-  __HAL_LOCK(hi2c);
-
-  if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET))
-  {
-    /* Check that I2C transfer finished */
-    /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
-    /* Mean XferCount == 0 */
-    /* So clear Flag NACKF only */
-    if (I2C_GET_DMA_REMAIN_DATA(hi2c) == 0U)
-    {
-      /* Clear NACK Flag */
-      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-    }
-    else
-    {
-      /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/
-      /* Clear NACK Flag */
-      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-      /* Set ErrorCode corresponding to a Non-Acknowledge */
-      hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-    }
-  }
-  else if (((ITFlags & I2C_FLAG_ADDR) != RESET) && ((ITSources & I2C_IT_ADDRI) != RESET))
-  {
-    /* Clear ADDR flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-  }
-  else if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET))
-  {
-    /* Call I2C Slave complete process */
-    I2C_ITSlaveCplt(hi2c, ITFlags);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hi2c);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Master sends target device address followed by internal memory address for write request.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  MemAddress Internal memory address
-  * @param  MemAddSize Size of internal memory address
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
-{
-  I2C_TransferConfig(hi2c, DevAddress, MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
-
-  /* Wait until TXIS flag is set */
-  if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
-  {
-    if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* If Memory address size is 8Bit */
-  if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
-  {
-    /* Send Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
-  }
-  /* If Memory address size is 16Bit */
-  else
-  {
-    /* Send MSB of Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
-
-    /* Wait until TXIS flag is set */
-    if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        return HAL_ERROR;
-      }
-      else
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Send LSB of Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
-  }
-
-  /* Wait until TCR flag is set */
-  if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK)
-  {
-    return HAL_TIMEOUT;
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Master sends target device address followed by internal memory address for read request.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  MemAddress Internal memory address
-  * @param  MemAddSize Size of internal memory address
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
-{
-  I2C_TransferConfig(hi2c, DevAddress, MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE);
-
-  /* Wait until TXIS flag is set */
-  if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
-  {
-    if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* If Memory address size is 8Bit */
-  if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
-  {
-    /* Send Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
-  }
-  /* If Memory address size is 16Bit */
-  else
-  {
-    /* Send MSB of Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
-
-    /* Wait until TXIS flag is set */
-    if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        return HAL_ERROR;
-      }
-      else
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Send LSB of Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
-  }
-
-  /* Wait until TC flag is set */
-  if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK)
-  {
-    return HAL_TIMEOUT;
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  I2C Address complete process callback.
-  * @param  hi2c I2C handle.
-  * @param  ITFlags Interrupt flags to handle.
-  * @retval None
-  */
-static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
-{
-  uint8_t transferdirection = 0U;
-  uint16_t slaveaddrcode = 0U;
-  uint16_t ownadd1code = 0U;
-  uint16_t ownadd2code = 0U;
-
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(ITFlags);
-
-  /* In case of Listen state, need to inform upper layer of address match code event */
-  if ((hi2c->State & HAL_I2C_STATE_LISTEN) == HAL_I2C_STATE_LISTEN)
-  {
-    transferdirection = I2C_GET_DIR(hi2c);
-    slaveaddrcode     = I2C_GET_ADDR_MATCH(hi2c);
-    ownadd1code       = I2C_GET_OWN_ADDRESS1(hi2c);
-    ownadd2code       = I2C_GET_OWN_ADDRESS2(hi2c);
-
-    /* If 10bits addressing mode is selected */
-    if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
-    {
-      if ((slaveaddrcode & SlaveAddr_MSK) == ((ownadd1code >> SlaveAddr_SHIFT) & SlaveAddr_MSK))
-      {
-        slaveaddrcode = ownadd1code;
-        hi2c->AddrEventCount++;
-        if (hi2c->AddrEventCount == 2U)
-        {
-          /* Reset Address Event counter */
-          hi2c->AddrEventCount = 0U;
-
-          /* Clear ADDR flag */
-          __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hi2c);
-
-          /* Call Slave Addr callback */
-          HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode);
-        }
-      }
-      else
-      {
-        slaveaddrcode = ownadd2code;
-
-        /* Disable ADDR Interrupts */
-        I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-
-        /* Call Slave Addr callback */
-        HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode);
-      }
-    }
-    /* else 7 bits addressing mode is selected */
-    else
-    {
-      /* Disable ADDR Interrupts */
-      I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      /* Call Slave Addr callback */
-      HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode);
-    }
-  }
-  /* Else clear address flag only */
-  else
-  {
-    /* Clear ADDR flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-  }
-}
-
-/**
-  * @brief  I2C Master sequential complete process.
-  * @param  hi2c I2C handle.
-  * @retval None
-  */
-static void I2C_ITMasterSequentialCplt(I2C_HandleTypeDef *hi2c)
-{
-  /* Reset I2C handle mode */
-  hi2c->Mode = HAL_I2C_MODE_NONE;
-
-  /* No Generate Stop, to permit restart mode */
-  /* The stop will be done at the end of transfer, when I2C_AUTOEND_MODE enable */
-  if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
-  {
-    hi2c->State         = HAL_I2C_STATE_READY;
-    hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
-    hi2c->XferISR       = NULL;
-
-    /* Disable Interrupts */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    HAL_I2C_MasterTxCpltCallback(hi2c);
-  }
-  /* hi2c->State == HAL_I2C_STATE_BUSY_RX */
-  else
-  {
-    hi2c->State         = HAL_I2C_STATE_READY;
-    hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
-    hi2c->XferISR       = NULL;
-
-    /* Disable Interrupts */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    HAL_I2C_MasterRxCpltCallback(hi2c);
-  }
-}
-
-/**
-  * @brief  I2C Slave sequential complete process.
-  * @param  hi2c I2C handle.
-  * @retval None
-  */
-static void I2C_ITSlaveSequentialCplt(I2C_HandleTypeDef *hi2c)
-{
-  /* Reset I2C handle mode */
-  hi2c->Mode = HAL_I2C_MODE_NONE;
-
-  if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)
-  {
-    /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */
-    hi2c->State         = HAL_I2C_STATE_LISTEN;
-    hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
-
-    /* Disable Interrupts */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the Tx complete callback to inform upper layer of the end of transmit process */
-    HAL_I2C_SlaveTxCpltCallback(hi2c);
-  }
-
-  else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)
-  {
-    /* Remove HAL_I2C_STATE_SLAVE_BUSY_RX, keep only HAL_I2C_STATE_LISTEN */
-    hi2c->State         = HAL_I2C_STATE_LISTEN;
-    hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
-
-    /* Disable Interrupts */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the Rx complete callback to inform upper layer of the end of receive process */
-    HAL_I2C_SlaveRxCpltCallback(hi2c);
-  }
-}
-
-/**
-  * @brief  I2C Master complete process.
-  * @param  hi2c I2C handle.
-  * @param  ITFlags Interrupt flags to handle.
-  * @retval None
-  */
-static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
-{
-  /* Clear STOP Flag */
-  __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-  /* Clear Configuration Register 2 */
-  I2C_RESET_CR2(hi2c);
-
-  /* Reset handle parameters */
-  hi2c->PreviousState = I2C_STATE_NONE;
-  hi2c->XferISR       = NULL;
-  hi2c->XferOptions   = I2C_NO_OPTION_FRAME;
-
-  if ((ITFlags & I2C_FLAG_AF) != RESET)
-  {
-    /* Clear NACK Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-    /* Set acknowledge error code */
-    hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-  }
-
-  /* Flush TX register */
-  I2C_Flush_TXDR(hi2c);
-
-  /* Disable Interrupts */
-  I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_RX_IT);
-
-  /* Call the corresponding callback to inform upper layer of End of Transfer */
-  if ((hi2c->ErrorCode != HAL_I2C_ERROR_NONE) || (hi2c->State == HAL_I2C_STATE_ABORT))
-  {
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    I2C_ITError(hi2c, hi2c->ErrorCode);
-  }
-  /* hi2c->State == HAL_I2C_STATE_BUSY_TX */
-  else if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
-  {
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    if (hi2c->Mode == HAL_I2C_MODE_MEM)
-    {
-      hi2c->Mode = HAL_I2C_MODE_NONE;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      /* Call the corresponding callback to inform upper layer of End of Transfer */
-      HAL_I2C_MemTxCpltCallback(hi2c);
-    }
-    else
-    {
-      hi2c->Mode = HAL_I2C_MODE_NONE;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      /* Call the corresponding callback to inform upper layer of End of Transfer */
-      HAL_I2C_MasterTxCpltCallback(hi2c);
-    }
-  }
-  /* hi2c->State == HAL_I2C_STATE_BUSY_RX */
-  else if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
-  {
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    if (hi2c->Mode == HAL_I2C_MODE_MEM)
-    {
-      hi2c->Mode = HAL_I2C_MODE_NONE;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      HAL_I2C_MemRxCpltCallback(hi2c);
-    }
-    else
-    {
-      hi2c->Mode = HAL_I2C_MODE_NONE;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      HAL_I2C_MasterRxCpltCallback(hi2c);
-    }
-  }
-}
-
-/**
-  * @brief  I2C Slave complete process.
-  * @param  hi2c I2C handle.
-  * @param  ITFlags Interrupt flags to handle.
-  * @retval None
-  */
-static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
-{
-  /* Clear STOP Flag */
-  __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-  /* Clear ADDR flag */
-  __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-
-  /* Disable all interrupts */
-  I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT | I2C_XFER_RX_IT);
-
-  /* Disable Address Acknowledge */
-  hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-  /* Clear Configuration Register 2 */
-  I2C_RESET_CR2(hi2c);
-
-  /* Flush TX register */
-  I2C_Flush_TXDR(hi2c);
-
-  /* If a DMA is ongoing, Update handle size context */
-  if (((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) ||
-      ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN))
-  {
-    hi2c->XferCount = I2C_GET_DMA_REMAIN_DATA(hi2c);
-  }
-
-  /* All data are not transferred, so set error code accordingly */
-  if (hi2c->XferCount != 0U)
-  {
-    /* Set ErrorCode corresponding to a Non-Acknowledge */
-    hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-  }
-
-  /* Store Last receive data if any */
-  if (((ITFlags & I2C_FLAG_RXNE) != RESET))
-  {
-    /* Read data from RXDR */
-    (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
-
-    if ((hi2c->XferSize > 0U))
-    {
-      hi2c->XferSize--;
-      hi2c->XferCount--;
-
-      /* Set ErrorCode corresponding to a Non-Acknowledge */
-      hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-    }
-  }
-
-  hi2c->PreviousState = I2C_STATE_NONE;
-  hi2c->Mode = HAL_I2C_MODE_NONE;
-  hi2c->XferISR = NULL;
-
-  if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
-  {
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    I2C_ITError(hi2c, hi2c->ErrorCode);
-
-    /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
-    if (hi2c->State == HAL_I2C_STATE_LISTEN)
-    {
-      /* Call I2C Listen complete process */
-      I2C_ITListenCplt(hi2c, ITFlags);
-    }
-  }
-  else if (hi2c->XferOptions != I2C_NO_OPTION_FRAME)
-  {
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
-    HAL_I2C_ListenCpltCallback(hi2c);
-  }
-  /* Call the corresponding callback to inform upper layer of End of Transfer */
-  else if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
-  {
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the Slave Rx Complete callback */
-    HAL_I2C_SlaveRxCpltCallback(hi2c);
-  }
-  else
-  {
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the Slave Tx Complete callback */
-    HAL_I2C_SlaveTxCpltCallback(hi2c);
-  }
-}
-
-/**
-  * @brief  I2C Listen complete process.
-  * @param  hi2c I2C handle.
-  * @param  ITFlags Interrupt flags to handle.
-  * @retval None
-  */
-static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
-{
-  /* Reset handle parameters */
-  hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-  hi2c->PreviousState = I2C_STATE_NONE;
-  hi2c->State = HAL_I2C_STATE_READY;
-  hi2c->Mode = HAL_I2C_MODE_NONE;
-  hi2c->XferISR = NULL;
-
-  /* Store Last receive data if any */
-  if (((ITFlags & I2C_FLAG_RXNE) != RESET))
-  {
-    /* Read data from RXDR */
-    (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
-
-    if ((hi2c->XferSize > 0U))
-    {
-      hi2c->XferSize--;
-      hi2c->XferCount--;
-
-      /* Set ErrorCode corresponding to a Non-Acknowledge */
-      hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-    }
-  }
-
-  /* Disable all Interrupts*/
-  I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT);
-
-  /* Clear NACK Flag */
-  __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hi2c);
-
-  /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
-  HAL_I2C_ListenCpltCallback(hi2c);
-}
-
-/**
-  * @brief  I2C interrupts error process.
-  * @param  hi2c I2C handle.
-  * @param  ErrorCode Error code to handle.
-  * @retval None
-  */
-static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode)
-{
-  /* Reset handle parameters */
-  hi2c->Mode          = HAL_I2C_MODE_NONE;
-  hi2c->XferOptions   = I2C_NO_OPTION_FRAME;
-  hi2c->XferCount     = 0U;
-
-  /* Set new error code */
-  hi2c->ErrorCode |= ErrorCode;
-
-  /* Disable Interrupts */
-  if ((hi2c->State == HAL_I2C_STATE_LISTEN)         ||
-      (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) ||
-      (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN))
-  {
-    /* Disable all interrupts, except interrupts related to LISTEN state */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_TX_IT);
-
-    /* keep HAL_I2C_STATE_LISTEN if set */
-    hi2c->State         = HAL_I2C_STATE_LISTEN;
-    hi2c->PreviousState = I2C_STATE_NONE;
-    hi2c->XferISR       = I2C_Slave_ISR_IT;
-  }
-  else
-  {
-    /* Disable all interrupts */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT);
-
-    /* If state is an abort treatment on goind, don't change state */
-    /* This change will be do later */
-    if (hi2c->State != HAL_I2C_STATE_ABORT)
-    {
-      /* Set HAL_I2C_STATE_READY */
-      hi2c->State         = HAL_I2C_STATE_READY;
-    }
-    hi2c->PreviousState = I2C_STATE_NONE;
-    hi2c->XferISR       = NULL;
-  }
-
-  /* Abort DMA TX transfer if any */
-  if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN)
-  {
-    hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
-
-    /* Set the I2C DMA Abort callback :
-       will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
-    hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Abort DMA TX */
-    if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
-    {
-      /* Call Directly XferAbortCallback function in case of error */
-      hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
-    }
-  }
-  /* Abort DMA RX transfer if any */
-  else if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN)
-  {
-    hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
-
-    /* Set the I2C DMA Abort callback :
-       will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
-    hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Abort DMA RX */
-    if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
-    {
-      /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
-      hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
-    }
-  }
-  else if (hi2c->State == HAL_I2C_STATE_ABORT)
-  {
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    HAL_I2C_AbortCpltCallback(hi2c);
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    HAL_I2C_ErrorCallback(hi2c);
-  }
-}
-
-/**
-  * @brief  I2C Tx data register flush process.
-  * @param  hi2c I2C handle.
-  * @retval None
-  */
-static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c)
-{
-  /* If a pending TXIS flag is set */
-  /* Write a dummy data in TXDR to clear it */
-  if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET)
-  {
-    hi2c->Instance->TXDR = 0x00U;
-  }
-
-  /* Flush TX register if not empty */
-  if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
-  {
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE);
-  }
-}
-
-/**
-  * @brief  DMA I2C master transmit process complete callback.
-  * @param  hdma DMA handle
-  * @retval None
-  */
-static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
-{
-  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-  /* Disable DMA Request */
-  hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
-
-  /* If last transfer, enable STOP interrupt */
-  if (hi2c->XferCount == 0U)
-  {
-    /* Enable STOP interrupt */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);
-  }
-  /* else prepare a new DMA transfer and enable TCReload interrupt */
-  else
-  {
-    /* Update Buffer pointer */
-    hi2c->pBuffPtr += hi2c->XferSize;
-
-    /* Set the XferSize to transfer */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-    }
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
-
-    /* Enable TC interrupts */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT);
-  }
-}
-
-/**
-  * @brief  DMA I2C slave transmit process complete callback.
-  * @param  hdma DMA handle
-  * @retval None
-  */
-static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdma);
-
-  /* No specific action, Master fully manage the generation of STOP condition */
-  /* Mean that this generation can arrive at any time, at the end or during DMA process */
-  /* So STOP condition should be manage through Interrupt treatment */
-}
-
-/**
-  * @brief DMA I2C master receive process complete callback.
-  * @param  hdma DMA handle
-  * @retval None
-  */
-static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-  /* Disable DMA Request */
-  hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
-
-  /* If last transfer, enable STOP interrupt */
-  if (hi2c->XferCount == 0U)
-  {
-    /* Enable STOP interrupt */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);
-  }
-  /* else prepare a new DMA transfer and enable TCReload interrupt */
-  else
-  {
-    /* Update Buffer pointer */
-    hi2c->pBuffPtr += hi2c->XferSize;
-
-    /* Set the XferSize to transfer */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-    }
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
-
-    /* Enable TC interrupts */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT);
-  }
-}
-
-/**
-  * @brief  DMA I2C slave receive process complete callback.
-  * @param  hdma DMA handle
-  * @retval None
-  */
-static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdma);
-
-  /* No specific action, Master fully manage the generation of STOP condition */
-  /* Mean that this generation can arrive at any time, at the end or during DMA process */
-  /* So STOP condition should be manage through Interrupt treatment */
-}
-
-/**
-  * @brief  DMA I2C communication error callback.
-  * @param hdma DMA handle
-  * @retval None
-  */
-static void I2C_DMAError(DMA_HandleTypeDef *hdma)
-{
-  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-  /* Disable Acknowledge */
-  hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-  /* Call the corresponding callback to inform upper layer of End of Transfer */
-  I2C_ITError(hi2c, HAL_I2C_ERROR_DMA);
-}
-
-/**
-  * @brief DMA I2C communication abort callback
-  *        (To be called at end of DMA Abort procedure).
-  * @param hdma DMA handle.
-  * @retval None
-  */
-static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
-{
-  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-  /* Disable Acknowledge */
-  hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-  /* Reset AbortCpltCallback */
-  hi2c->hdmatx->XferAbortCallback = NULL;
-  hi2c->hdmarx->XferAbortCallback = NULL;
-
-  /* Check if come from abort from user */
-  if (hi2c->State == HAL_I2C_STATE_ABORT)
-  {
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    HAL_I2C_AbortCpltCallback(hi2c);
-  }
-  else
-  {
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    HAL_I2C_ErrorCallback(hi2c);
-  }
-}
-
-/**
-  * @brief  This function handles I2C Communication Timeout.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  Flag Specifies the I2C flag to check.
-  * @param  Status The new Flag status (SET or RESET).
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
-{
-  while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
-  {
-    /* Check for the Timeout */
-    if (Timeout != HAL_MAX_DELAY)
-    {
-      if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
-      {
-        hi2c->State = HAL_I2C_STATE_READY;
-        hi2c->Mode = HAL_I2C_MODE_NONE;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @brief  This function handles I2C Communication Timeout for specific usage of TXIS flag.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
-  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
-  {
-    /* Check if a NACK is detected */
-    if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
-    {
-      return HAL_ERROR;
-    }
-
-    /* Check for the Timeout */
-    if (Timeout != HAL_MAX_DELAY)
-    {
-      if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
-      {
-        hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-        hi2c->State = HAL_I2C_STATE_READY;
-        hi2c->Mode = HAL_I2C_MODE_NONE;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @brief  This function handles I2C Communication Timeout for specific usage of STOP flag.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
-  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
-  {
-    /* Check if a NACK is detected */
-    if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
-    {
-      return HAL_ERROR;
-    }
-
-    /* Check for the Timeout */
-    if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
-    {
-      hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-      hi2c->State = HAL_I2C_STATE_READY;
-      hi2c->Mode = HAL_I2C_MODE_NONE;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      return HAL_TIMEOUT;
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @brief  This function handles I2C Communication Timeout for specific usage of RXNE flag.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
-  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
-  {
-    /* Check if a NACK is detected */
-    if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
-    {
-      return HAL_ERROR;
-    }
-
-    /* Check if a STOPF is detected */
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
-    {
-      /* Clear STOP Flag */
-      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-      /* Clear Configuration Register 2 */
-      I2C_RESET_CR2(hi2c);
-
-      hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-      hi2c->State = HAL_I2C_STATE_READY;
-      hi2c->Mode = HAL_I2C_MODE_NONE;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      return HAL_ERROR;
-    }
-
-    /* Check for the Timeout */
-    if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
-    {
-      hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-      hi2c->State = HAL_I2C_STATE_READY;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      return HAL_TIMEOUT;
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @brief  This function handles Acknowledge failed detection during an I2C Communication.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
-  if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
-  {
-    /* Wait until STOP Flag is reset */
-    /* AutoEnd should be initiate after AF */
-    while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
-    {
-      /* Check for the Timeout */
-      if (Timeout != HAL_MAX_DELAY)
-      {
-        if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
-        {
-          hi2c->State = HAL_I2C_STATE_READY;
-          hi2c->Mode = HAL_I2C_MODE_NONE;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hi2c);
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-
-    /* Clear NACKF Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-    /* Clear STOP Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-    /* Flush TX register */
-    I2C_Flush_TXDR(hi2c);
-
-    /* Clear Configuration Register 2 */
-    I2C_RESET_CR2(hi2c);
-
-    hi2c->ErrorCode = HAL_I2C_ERROR_AF;
-    hi2c->State = HAL_I2C_STATE_READY;
-    hi2c->Mode = HAL_I2C_MODE_NONE;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_ERROR;
-  }
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
-  * @param  hi2c I2C handle.
-  * @param  DevAddress Specifies the slave address to be programmed.
-  * @param  Size Specifies the number of bytes to be programmed.
-  *   This parameter must be a value between 0 and 255.
-  * @param  Mode New state of the I2C START condition generation.
-  *   This parameter can be one of the following values:
-  *     @arg @ref I2C_RELOAD_MODE Enable Reload mode .
-  *     @arg @ref I2C_AUTOEND_MODE Enable Automatic end mode.
-  *     @arg @ref I2C_SOFTEND_MODE Enable Software end mode.
-  * @param  Request New state of the I2C START condition generation.
-  *   This parameter can be one of the following values:
-  *     @arg @ref I2C_NO_STARTSTOP Don't Generate stop and start condition.
-  *     @arg @ref I2C_GENERATE_STOP Generate stop condition (Size should be set to 0).
-  *     @arg @ref I2C_GENERATE_START_READ Generate Restart for read request.
-  *     @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request.
-  * @retval None
-  */
-static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c,  uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
-{
-  /* Check the parameters */
-  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
-  assert_param(IS_TRANSFER_MODE(Mode));
-  assert_param(IS_TRANSFER_REQUEST(Request));
-
-  /* update CR2 register */
-  MODIFY_REG(hi2c->Instance->CR2, ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP)), \
-             (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | (uint32_t)Mode | (uint32_t)Request));
-}
-
-/**
-  * @brief  Manage the enabling of Interrupts.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  InterruptRequest Value of @ref I2C_Interrupt_configuration_definition.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest)
-{
-  uint32_t tmpisr = 0U;
-
-  if ((hi2c->XferISR == I2C_Master_ISR_DMA) || \
-      (hi2c->XferISR == I2C_Slave_ISR_DMA))
-  {
-    if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT)
-    {
-      /* Enable ERR, STOP, NACK and ADDR interrupts */
-      tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;
-    }
-
-    if ((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT)
-    {
-      /* Enable ERR and NACK interrupts */
-      tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI;
-    }
-
-    if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT)
-    {
-      /* Enable STOP interrupts */
-      tmpisr |= I2C_IT_STOPI;
-    }
-
-    if ((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT)
-    {
-      /* Enable TC interrupts */
-      tmpisr |= I2C_IT_TCI;
-    }
-  }
-  else
-  {
-    if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT)
-    {
-      /* Enable ERR, STOP, NACK, and ADDR interrupts */
-      tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;
-    }
-
-    if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT)
-    {
-      /* Enable ERR, TC, STOP, NACK and RXI interrupts */
-      tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI;
-    }
-
-    if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT)
-    {
-      /* Enable ERR, TC, STOP, NACK and TXI interrupts */
-      tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI;
-    }
-
-    if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT)
-    {
-      /* Enable STOP interrupts */
-      tmpisr |= I2C_IT_STOPI;
-    }
-  }
-
-  /* Enable interrupts only at the end */
-  /* to avoid the risk of I2C interrupt handle execution before */
-  /* all interrupts requested done */
-  __HAL_I2C_ENABLE_IT(hi2c, tmpisr);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Manage the disabling of Interrupts.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  InterruptRequest Value of @ref I2C_Interrupt_configuration_definition.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest)
-{
-  uint32_t tmpisr = 0U;
-
-  if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT)
-  {
-    /* Disable TC and TXI interrupts */
-    tmpisr |= I2C_IT_TCI | I2C_IT_TXI;
-
-    if ((hi2c->State & HAL_I2C_STATE_LISTEN) != HAL_I2C_STATE_LISTEN)
-    {
-      /* Disable NACK and STOP interrupts */
-      tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;
-    }
-  }
-
-  if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT)
-  {
-    /* Disable TC and RXI interrupts */
-    tmpisr |= I2C_IT_TCI | I2C_IT_RXI;
-
-    if ((hi2c->State & HAL_I2C_STATE_LISTEN) != HAL_I2C_STATE_LISTEN)
-    {
-      /* Disable NACK and STOP interrupts */
-      tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;
-    }
-  }
-
-  if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT)
-  {
-    /* Disable ADDR, NACK and STOP interrupts */
-    tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;
-  }
-
-  if ((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT)
-  {
-    /* Enable ERR and NACK interrupts */
-    tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI;
-  }
-
-  if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT)
-  {
-    /* Enable STOP interrupts */
-    tmpisr |= I2C_IT_STOPI;
-  }
-
-  if ((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT)
-  {
-    /* Enable TC interrupts */
-    tmpisr |= I2C_IT_TCI;
-  }
-
-  /* Disable interrupts only at the end */
-  /* to avoid a breaking situation like at "t" time */
-  /* all disable interrupts request are not done */
-  __HAL_I2C_DISABLE_IT(hi2c, tmpisr);
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-#endif /* HAL_I2C_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c
deleted file mode 100755
index ae9c569f..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c
+++ /dev/null
@@ -1,351 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_i2c_ex.c
-  * @author  MCD Application Team
-  * @brief   I2C Extended HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of I2C Extended peripheral:
-  *           + Extended features functions
-  *
-  @verbatim
-  ==============================================================================
-               ##### I2C peripheral Extended features  #####
-  ==============================================================================
-
-  [..] Comparing to other previous devices, the I2C interface for STM32L0xx
-       devices contains the following additional features
-
-       (+) Possibility to disable or enable Analog Noise Filter
-       (+) Use of a configured Digital Noise Filter
-       (+) Disable or enable wakeup from Stop mode(s)
-       (+) Disable or enable Fast Mode Plus
-
-                     ##### How to use this driver #####
-  ==============================================================================
-  [..] This driver provides functions to configure Noise Filter and Wake Up Feature
-    (#) Configure I2C Analog noise filter using the function HAL_I2CEx_ConfigAnalogFilter()
-    (#) Configure I2C Digital noise filter using the function HAL_I2CEx_ConfigDigitalFilter()
-    (#) Configure the enable or disable of I2C Wake Up Mode using the functions :
-          (++) HAL_I2CEx_EnableWakeUp()
-          (++) HAL_I2CEx_DisableWakeUp()
-    (#) Configure the enable or disable of fast mode plus driving capability using the functions :
-          (++) HAL_I2CEx_EnableFastModePlus()
-          (++) HAL_I2CEx_DisableFastModePlus()
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup I2CEx I2CEx
-  * @brief I2C Extended HAL module driver
-  * @{
-  */
-
-#ifdef HAL_I2C_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @defgroup I2CEx_Exported_Functions I2C Extended Exported Functions
-  * @{
-  */
-
-/** @defgroup I2CEx_Exported_Functions_Group1 Extended features functions
-  * @brief    Extended features functions
- *
-@verbatim
- ===============================================================================
-                      ##### Extended features functions #####
- ===============================================================================
-    [..] This section provides functions allowing to:
-      (+) Configure Noise Filters
-      (+) Configure Wake Up Feature
-      (+) Configure Fast Mode Plus
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Configure I2C Analog noise filter.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2Cx peripheral.
-  * @param  AnalogFilter New state of the Analog filter.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter)
-{
-  /* Check the parameters */
-  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
-  assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_BUSY;
-
-    /* Disable the selected I2C peripheral */
-    __HAL_I2C_DISABLE(hi2c);
-
-    /* Reset I2Cx ANOFF bit */
-    hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF);
-
-    /* Set analog filter bit*/
-    hi2c->Instance->CR1 |= AnalogFilter;
-
-    __HAL_I2C_ENABLE(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Configure I2C Digital noise filter.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2Cx peripheral.
-  * @param  DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
-  assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_BUSY;
-
-    /* Disable the selected I2C peripheral */
-    __HAL_I2C_DISABLE(hi2c);
-
-    /* Get the old register value */
-    tmpreg = hi2c->Instance->CR1;
-
-    /* Reset I2Cx DNF bits [11:8] */
-    tmpreg &= ~(I2C_CR1_DNF);
-
-    /* Set I2Cx DNF coefficient */
-    tmpreg |= DigitalFilter << 8U;
-
-    /* Store the new register value */
-    hi2c->Instance->CR1 = tmpreg;
-
-    __HAL_I2C_ENABLE(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Enable I2C wakeup from Stop mode(s).
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2Cx peripheral.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c)
-{
-  /* Check the parameters */
-  assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_BUSY;
-
-    /* Disable the selected I2C peripheral */
-    __HAL_I2C_DISABLE(hi2c);
-
-    /* Enable wakeup from stop mode */
-    hi2c->Instance->CR1 |= I2C_CR1_WUPEN;
-
-    __HAL_I2C_ENABLE(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Disable I2C wakeup from Stop mode(s).
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2Cx peripheral.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c)
-{
-  /* Check the parameters */
-  assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_BUSY;
-
-    /* Disable the selected I2C peripheral */
-    __HAL_I2C_DISABLE(hi2c);
-
-    /* Enable wakeup from stop mode */
-    hi2c->Instance->CR1 &= ~(I2C_CR1_WUPEN);
-
-    __HAL_I2C_ENABLE(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Enable the I2C fast mode plus driving capability.
-  * @param ConfigFastModePlus Selects the pin.
-  *   This parameter can be one of the @ref I2CEx_FastModePlus values
-  * @note  For I2C1, fast mode plus driving capability can be enabled on all selected
-  *        I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
-  *        on each one of the following pins PB6, PB7, PB8 and PB9.
-  * @note  For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability
-  *        can be enabled only by using I2C_FASTMODEPLUS_I2C1 parameter.
-  * @note  For all I2C2 pins fast mode plus driving capability can be enabled
-  *        only by using I2C_FASTMODEPLUS_I2C2 parameter.
-  * @note  For all I2C3 pins fast mode plus driving capability can be enabled
-  *        only by using I2C_FASTMODEPLUS_I2C3 parameter.
-  * @retval None
-  */
-void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus)
-{
-  /* Check the parameter */
-  assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
-
-  /* Enable SYSCFG clock */
-  __HAL_RCC_SYSCFG_CLK_ENABLE();
-
-  /* Enable fast mode plus driving capability for selected pin */
-  SET_BIT(SYSCFG->CFGR2, (uint32_t)ConfigFastModePlus);
-}
-
-/**
-  * @brief Disable the I2C fast mode plus driving capability.
-  * @param ConfigFastModePlus Selects the pin.
-  *   This parameter can be one of the @ref I2CEx_FastModePlus values
-  * @note  For I2C1, fast mode plus driving capability can be disabled on all selected
-  *        I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
-  *        on each one of the following pins PB6, PB7, PB8 and PB9.
-  * @note  For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability
-  *        can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter.
-  * @note  For all I2C2 pins fast mode plus driving capability can be disabled
-  *        only by using I2C_FASTMODEPLUS_I2C2 parameter.
-  * @note  For all I2C3 pins fast mode plus driving capability can be disabled
-  *        only by using I2C_FASTMODEPLUS_I2C3 parameter.
-  * @retval None
-  */
-void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus)
-{
-  /* Check the parameter */
-  assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
-
-  /* Enable SYSCFG clock */
-  __HAL_RCC_SYSCFG_CLK_ENABLE();
-
-  /* Disable fast mode plus driving capability for selected pin */
-  CLEAR_BIT(SYSCFG->CFGR2, (uint32_t)ConfigFastModePlus);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_I2C_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2s.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2s.c
deleted file mode 100755
index 57a11c94..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2s.c
+++ /dev/null
@@ -1,1436 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_i2s.c
-  * @author  MCD Application Team
-  * @brief   I2S HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Integrated Interchip Sound (I2S) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral State and Errors functions
-  @verbatim
- ===============================================================================
-                  ##### How to use this driver #####
- ===============================================================================
- [..]
-    The I2S HAL driver can be used as follow:
-    
-    (#) Declare a I2S_HandleTypeDef handle structure.
-    (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
-        (##) Enable the SPIx interface clock.                      
-        (##) I2S pins configuration:
-            (+++) Enable the clock for the I2S GPIOs.
-            (+++) Configure these I2S pins as alternate function.
-        (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
-             and HAL_I2S_Receive_IT() APIs).
-            (+++) Configure the I2Sx interrupt priority.
-            (+++) Enable the NVIC I2S IRQ handle.
-        (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
-             and HAL_I2S_Receive_DMA() APIs:
-            (+++) Declare a DMA handle structure for the Tx/Rx Channel.
-            (+++) Enable the DMAx interface clock.
-            (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.                
-            (+++) Configure the DMA Tx/Rx Channel.
-            (+++) Associate the initilalized DMA handle to the I2S DMA Tx/Rx handle.
-            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the 
-                  DMA Tx/Rx Channel.
-
-   (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
-       using HAL_I2S_Init() function.
-
-   -@- The specific I2S interrupts (Transmission complete interrupt, 
-       RXNE interrupt and Error Interrupts) will be managed using the macros
-       __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process.
-   -@- Make sure that either:
-       (+@) External clock source is configured after setting correctly 
-            the define constant HSE_VALUE in the stm32l0xx_hal_conf.h file. 
-
-    (#) Three mode of operations are available within this driver :     
-
-   *** Polling mode IO operation ***
-   =================================
-   [..]
-     (+) Send an amount of data in blocking mode using HAL_I2S_Transmit() 
-     (+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
-
-   *** Interrupt mode IO operation ***
-   ===================================
-   [..]
-     (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT() 
-     (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback 
-     (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_TxCpltCallback
-     (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT() 
-     (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback 
-     (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_RxCpltCallback
-     (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_ErrorCallback
-
-   *** DMA mode IO operation ***
-   ==============================
-   [..]
-     (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA() 
-     (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback 
-     (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_TxCpltCallback
-     (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA() 
-     (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback 
-     (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_RxCpltCallback
-     (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_ErrorCallback
-     (+) Pause the DMA Transfer using HAL_I2S_DMAPause()
-     (+) Resume the DMA Transfer using HAL_I2S_DMAResume()
-     (+) Stop the DMA Transfer using HAL_I2S_DMAStop()
-
-   *** I2S HAL driver macros list ***
-   ===================================
-   [..]
-     Below the list of most used macros in USART HAL driver.
-       
-      (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode) 
-      (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
-      (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
-      (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
-      (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
-
-    [..]
-      (@) You can refer to the I2S HAL driver header file for more useful macros
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-#if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined(STM32L031xx) && !defined(STM32L041xx)
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_I2S_MODULE_ENABLED
-
-/** @addtogroup I2S I2S
-  * @brief I2S HAL module driver
-  * @{
-  */
-
-
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup I2S_Private
-  * @{
-  */
-static void               I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
-static void               I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma); 
-static void               I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
-static void               I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
-static void               I2S_DMAError(DMA_HandleTypeDef *hdma);
-static void               I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
-static void               I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
-static HAL_StatusTypeDef  I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout);
-/**
-  * @}
-  */
-  
-/* Exported functions ---------------------------------------------------------*/
-/** @addtogroup I2S_Exported_Functions I2S Exported Functions
-  * @{
-  */
-
-/** @addtogroup  I2S_Exported_Functions_Group1
-  *  @brief    Initialization and Configuration functions 
-  *
-@verbatim    
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This subsection provides a set of functions allowing to initialize and 
-          de-initialiaze the I2Sx peripheral in simplex mode:
-
-      (+) User must Implement HAL_I2S_MspInit() function in which he configures 
-          all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
-
-      (+) Call the function HAL_I2S_Init() to configure the selected device with 
-          the selected configuration:
-        (++) Mode
-        (++) Standard 
-        (++) Data Format
-        (++) MCLK Output
-        (++) Audio frequency
-        (++) Polarity
-
-     (+) Call the function HAL_I2S_DeInit() to restore the default configuration 
-         of the selected I2Sx periperal. 
-  @endverbatim
-  * @{
-  */
-
-/**
-  * @brief Initializes the I2S according to the specified parameters 
-  *         in the I2S_InitTypeDef and create the associated handle.
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
-{
-  uint32_t i2sdiv = 2U, i2sodd = 0U, packetlength = 1U;
-  uint32_t tmp = 0U, i2sclk = 0U, tmpreg = 0U;
-  
-  /* Check the I2S handle allocation */
-  if(hi2s == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the I2S parameters */
-  assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
-  assert_param(IS_I2S_MODE(hi2s->Init.Mode));
-  assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
-  assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
-  assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
-  assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
-  assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));  
-  
-  if(hi2s->State == HAL_I2S_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hi2s->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
-    HAL_I2S_MspInit(hi2s);
-  }
-  
-  hi2s->State = HAL_I2S_STATE_BUSY;
-
-  /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
-  if(hi2s->Init.AudioFreq == I2S_AUDIOFREQ_DEFAULT)
-  {
-    i2sodd = (uint32_t)0U;
-    i2sdiv = (uint32_t)2U;   
-  }
-  /* If the requested audio frequency is not the default, compute the prescaler */
-  else
-  {
-    /* Check the frame length (For the Prescaler computing) *******************/
-    if(hi2s->Init.DataFormat == I2S_DATAFORMAT_16B)
-    {
-      /* Packet length is 16 bits */
-      packetlength = 1U;
-    }
-    else
-    {
-      /* Packet length is 32 bits */
-      packetlength = 2U;
-    }
-
-    /* Get the source clock value: based on System Clock value */
-    i2sclk = HAL_RCC_GetSysClockFreq();    
-
-    /* Compute the Real divider depending on the MCLK output state, with a floating point */
-    if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
-    {
-      /* MCLK output is enabled */
-      tmp = (uint32_t)(((((i2sclk / 256U) * 10U) / hi2s->Init.AudioFreq)) + 5U);
-    }
-    else
-    {
-      /* MCLK output is disabled */
-      tmp = (uint32_t)(((((i2sclk / (32U * packetlength)) *10U ) / hi2s->Init.AudioFreq)) + 5U);
-    }
-
-    /* Remove the flatting point */
-    tmp = tmp / 10U;  
-
-    /* Check the parity of the divider */
-    i2sodd = (uint32_t)(tmp & (uint32_t)1U);
-
-    /* Compute the i2sdiv prescaler */
-    i2sdiv = (uint32_t)((tmp - i2sodd) / 2U);
-
-    /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
-    i2sodd = (uint32_t) (i2sodd << 8U);
-  }
-
-  /* Test if the divider is 1 or 0 or greater than 0xFF */
-  if((i2sdiv < 2U) || (i2sdiv > 0xFFU))
-  {
-    /* Set the default values */
-    i2sdiv = 2U;
-    i2sodd = 0U;
-  }
-
-  /*----------------------- SPIx I2SCFGR & I2SPR Configuration ----------------*/
-
-  /* Write to SPIx I2SPR register the computed value */
-  hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput));
-  
-  /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
-  /* And configure the I2S with the I2S_InitStruct values                      */
-  MODIFY_REG( hi2s->Instance->I2SCFGR, (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN |\
-                                        SPI_I2SCFGR_CKPOL | SPI_I2SCFGR_I2SSTD |\
-                                        SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG |\
-                                        SPI_I2SCFGR_I2SE  | SPI_I2SCFGR_I2SMOD),\
-                                       (SPI_I2SCFGR_I2SMOD | hi2s->Init.Mode |\
-                                        hi2s->Init.Standard | hi2s->Init.DataFormat |\
-                                        hi2s->Init.CPOL));
-										
-  /* Get the I2SCFGR register value */
-  tmpreg = hi2s->Instance->I2SCFGR;
-  
-#if defined(SPI_I2SCFGR_ASTRTEN)
-  if (hi2s->Init.Standard == I2S_STANDARD_PCM_SHORT) 
-  {
-  /* Write to SPIx I2SCFGR */  
-  hi2s->Instance->I2SCFGR = tmpreg | SPI_I2SCFGR_ASTRTEN;
-  }
-  else
-  {
-  /* Write to SPIx I2SCFGR */  
-  hi2s->Instance->I2SCFGR = tmpreg;    
-  }
-#else
-  /* Write to SPIx I2SCFGR */  
-  hi2s->Instance->I2SCFGR = tmpreg;
-#endif
-									
-  hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
-  hi2s->State= HAL_I2S_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief DeInitializes the I2S peripheral 
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
-{
-  /* Check the I2S handle allocation */
-  if(hi2s == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  hi2s->State = HAL_I2S_STATE_BUSY;
-  
-  /* Disable the I2S Peripheral Clock */
-  __HAL_I2S_DISABLE(hi2s);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
-  HAL_I2S_MspDeInit(hi2s);
-
-  hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
-  hi2s->State = HAL_I2S_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(hi2s);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief I2S MSP Init
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
- __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2s);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_I2S_MspInit could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief I2S MSP DeInit
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
- __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2s);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_I2S_MspDeInit could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup I2S_Exported_Functions_Group2
-  *  @brief Data transfers functions 
-  *
-@verbatim   
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
-    [..]
-    This subsection provides a set of functions allowing to manage the I2S data 
-    transfers.
-
-    (#) There are two modes of transfer:
-       (++) Blocking mode : The communication is performed in the polling mode. 
-            The status of all data processing is returned by the same function 
-            after finishing transfer.  
-       (++) No-Blocking mode : The communication is performed using Interrupts 
-            or DMA. These functions return the status of the transfer startup.
-            The end of the data processing will be indicated through the 
-            dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when 
-            using DMA mode.
-
-    (#) Blocking mode functions are :
-        (++) HAL_I2S_Transmit()
-        (++) HAL_I2S_Receive()
-        
-    (#) No-Blocking mode functions with Interrupt are :
-        (++) HAL_I2S_Transmit_IT()
-        (++) HAL_I2S_Receive_IT()
-
-    (#) No-Blocking mode functions with DMA are :
-        (++) HAL_I2S_Transmit_DMA()
-        (++) HAL_I2S_Receive_DMA()
-
-    (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
-        (++) HAL_I2S_TxCpltCallback()
-        (++) HAL_I2S_RxCpltCallback()
-        (++) HAL_I2S_ErrorCallback()
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Transmit an amount of data in blocking mode
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @param pData: a 16-bit pointer to data buffer.
-  * @param Size: number of data sample to be sent:
-  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
-  *       configuration phase, the Size parameter means the number of 16-bit data length 
-  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected 
-  *       the Size parameter means the number of 16-bit data length. 
-  * @param  Timeout: Timeout duration
-  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization 
-  *       between Master and Slave(example: audio streaming).
-  * @note This function can use an Audio Frequency up to 48KHz when I2S Clock Source is 32MHz
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  if((pData == NULL ) || (Size == 0U)) 
-  {
-    return  HAL_ERROR;                                    
-  }
-  
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-
-  if(hi2s->State == HAL_I2S_STATE_READY)
-  { 
-    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
-      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
-    {
-      hi2s->TxXferSize = (Size << 1U);
-      hi2s->TxXferCount = (Size << 1U);
-    }
-    else
-    {
-      hi2s->TxXferSize = Size;
-      hi2s->TxXferCount = Size;
-    }
-     
-    /* Set state and reset error code */
-    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
-    hi2s->State = HAL_I2S_STATE_BUSY_TX;
-    hi2s->pTxBuffPtr = pData;
-      
-    /* Check if the I2S is already enabled */ 
-    if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
-    {
-      /* Enable I2S peripheral */
-      __HAL_I2S_ENABLE(hi2s);
-    }
-    
-    while(hi2s->TxXferCount > 0U)
-    {
-      /* Wait until TXE flag is set */
-      if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
-      hi2s->TxXferCount--;   
-    } 
-
-    /* Wait until TXE flag is set, to confirm the end of the transaction */
-    if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    } 
-
-    /* Check if Slave mode is selected */
-    if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_RX))
-    {	
-      /* Wait until Busy flag is reset */
-      if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-    hi2s->State = HAL_I2S_STATE_READY; 
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    
-    return HAL_OK;
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Receive an amount of data in blocking mode 
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @param pData: a 16-bit pointer to data buffer.
-  * @param Size: number of data sample to be sent:
-  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
-  *       configuration phase, the Size parameter means the number of 16-bit data length 
-  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected 
-  *       the Size parameter means the number of 16-bit data length. 
-  * @param Timeout: Timeout duration
-  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization 
-  *       between Master and Slave(example: audio streaming).
-  * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
-  *       in continouse way and as the I2S is not disabled at the end of the I2S transaction.
-  * @note This function can use an Audio Frequency up to 44KHz when I2S Clock Source is 32MHz  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  if((pData == NULL ) || (Size == 0U)) 
-  {
-    return  HAL_ERROR;
-  }
-  
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-  
-  if(hi2s->State == HAL_I2S_STATE_READY)
-  { 
-    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
-      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
-    {
-      hi2s->RxXferSize = (Size << 1U);
-      hi2s->RxXferCount = (Size << 1U);
-    }
-    else
-    {
-      hi2s->RxXferSize = Size;
-      hi2s->RxXferCount = Size;
-    }
-        
-    /* Set state and reset error code */
-    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
-    hi2s->State = HAL_I2S_STATE_BUSY_RX;
-    hi2s->pRxBuffPtr = pData;
-    
-    /* Check if the I2S is already enabled */ 
-    if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
-    {
-      /* Enable I2S peripheral */
-      __HAL_I2S_ENABLE(hi2s);
-    }
-
-    /* Check if Master Receiver mode is selected */
-    if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
-    {
-      /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read
-      access to the SPI_SR register. */ 
-      __HAL_I2S_CLEAR_OVRFLAG(hi2s);
-    }
-
-    /* Receive data */
-    while(hi2s->RxXferCount > 0U)
-    {
-      /* Wait until RXNE flag is set */
-      if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, RESET, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      
-      (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
-      hi2s->RxXferCount--;
-    }
-    
-    hi2s->State = HAL_I2S_STATE_READY; 
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    
-    return HAL_OK;
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Transmit an amount of data in non-blocking mode with Interrupt
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @param pData: a 16-bit pointer to data buffer.
-  * @param Size: number of data sample to be sent:
-  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
-  *       configuration phase, the Size parameter means the number of 16-bit data length 
-  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected 
-  *       the Size parameter means the number of 16-bit data length. 
-  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization 
-  *       between Master and Slave(example: audio streaming).
-  * @note This function can use an Audio Frequency up to 48KHz when I2S Clock Source is 32MHz  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
-{
-  if((pData == NULL) || (Size == 0U)) 
-  {
-    return  HAL_ERROR;
-  }
-  
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-    
-  if(hi2s->State == HAL_I2S_STATE_READY)
-  {
-    hi2s->pTxBuffPtr = pData;
-    hi2s->State = HAL_I2S_STATE_BUSY_TX;
-    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
-
-    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
-      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
-    {
-      hi2s->TxXferSize = (Size << 1U);
-      hi2s->TxXferCount = (Size << 1U);
-    }
-    else
-    {
-      hi2s->TxXferSize = Size;
-      hi2s->TxXferCount = Size;
-    }
-
-    /* Enable TXE and ERR interrupt */
-    __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
-
-    /* Check if the I2S is already enabled */ 
-    if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
-    {
-      /* Enable I2S peripheral */
-      __HAL_I2S_ENABLE(hi2s);
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    
-    return HAL_OK;
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Receive an amount of data in non-blocking mode with Interrupt
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @param pData: a 16-bit pointer to the Receive data buffer.
-  * @param Size: number of data sample to be sent:
-  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
-  *       configuration phase, the Size parameter means the number of 16-bit data length 
-  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected 
-  *       the Size parameter means the number of 16-bit data length. 
-  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization 
-  *       between Master and Slave(example: audio streaming).
-  * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation 
-  * between Master and Slave otherwise the I2S interrupt should be optimized. 
-  * @note This function can use an Audio Frequency up to 48KHz when I2S Clock Source is 32MHz  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
-{
-    if((pData == NULL) || (Size == 0U)) 
-    {
-      return  HAL_ERROR;
-    }
-
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-
-  if(hi2s->State == HAL_I2S_STATE_READY)
-  {
-    hi2s->pRxBuffPtr = pData;
-    hi2s->State = HAL_I2S_STATE_BUSY_RX;
-    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
-
-    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
-      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
-    {
-      hi2s->RxXferSize = (Size << 1U);
-      hi2s->RxXferCount = (Size << 1U);
-    }  
-    else
-    {
-      hi2s->RxXferSize = Size;
-      hi2s->RxXferCount = Size;
-    }
-    
-    /* Enable RXNE and ERR interrupt */
-    __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
-    
-    /* Check if the I2S is already enabled */ 
-    if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
-    {
-      /* Enable I2S peripheral */
-      __HAL_I2S_ENABLE(hi2s);
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-
-    return HAL_OK;
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    return HAL_BUSY; 
-  } 
-}
-
-/**
-  * @brief Transmit an amount of data in non-blocking mode with DMA
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @param pData: a 16-bit pointer to the Transmit data buffer.
-  * @param Size: number of data sample to be sent:
-  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
-  *       configuration phase, the Size parameter means the number of 16-bit data length 
-  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected 
-  *       the Size parameter means the number of 16-bit data length. 
-  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization 
-  *       between Master and Slave(example: audio streaming).
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
-{
-  if((pData == NULL) || (Size == 0U)) 
-  {
-    return  HAL_ERROR;
-  }
-
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-
-  if(hi2s->State == HAL_I2S_STATE_READY)
-  {  
-    hi2s->pTxBuffPtr = pData;
-    hi2s->State = HAL_I2S_STATE_BUSY_TX;
-    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
-
-    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
-      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
-    {
-      hi2s->TxXferSize = (Size << 1U);
-      hi2s->TxXferCount = (Size << 1U);
-    }
-    else
-    {
-      hi2s->TxXferSize = Size;
-      hi2s->TxXferCount = Size;
-    }
-
-    /* Set the I2S Tx DMA Half transfert complete callback */
-    hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
-
-    /* Set the I2S Tx DMA transfert complete callback */
-    hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
-
-    /* Set the DMA error callback */
-    hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
-
-    /* Enable the Tx DMA Channel */
-    HAL_DMA_Start_IT(hi2s->hdmatx, (uint32_t)hi2s->pTxBuffPtr, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
-
-    /* Check if the I2S is already enabled */ 
-    if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
-    {
-      /* Enable I2S peripheral */
-      __HAL_I2S_ENABLE(hi2s);
-    }
-
-    /* Check if the I2S Tx request is already enabled */ 
-    if(HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_TXDMAEN))
-    {
-      /* Enable Tx DMA Request */  
-      SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    
-    return HAL_OK;
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Receive an amount of data in non-blocking mode with DMA 
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @param pData: a 16-bit pointer to the Receive data buffer.
-  * @param Size: number of data sample to be sent:
-  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
-  *       configuration phase, the Size parameter means the number of 16-bit data length 
-  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected 
-  *       the Size parameter means the number of 16-bit data length. 
-  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization 
-  *       between Master and Slave(example: audio streaming).
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
-{
-  if((pData == NULL) || (Size == 0U))
-  {
-    return  HAL_ERROR;
-  }
-
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-
-  if(hi2s->State == HAL_I2S_STATE_READY)
-  {
-    hi2s->pRxBuffPtr = pData;
-    hi2s->State = HAL_I2S_STATE_BUSY_RX;
-    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
-
-    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
-      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
-    {
-      hi2s->RxXferSize = (Size << 1U);
-      hi2s->RxXferCount = (Size << 1U);
-    }
-    else
-    {
-      hi2s->RxXferSize = Size;
-      hi2s->RxXferCount = Size;
-    }
-    
-    
-    /* Set the I2S Rx DMA Half transfert complete callback */
-    hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
-    
-    /* Set the I2S Rx DMA transfert complete callback */
-    hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
-    
-    /* Set the DMA error callback */
-    hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
-    
-    /* Check if Master Receiver mode is selected */
-    if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
-    {
-      /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
-      access to the SPI_SR register. */ 
-      __HAL_I2S_CLEAR_OVRFLAG(hi2s);
-    }
-    
-    /* Enable the Rx DMA Channel */
-    HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, (uint32_t)hi2s->pRxBuffPtr, hi2s->RxXferSize);
-    
-    /* Check if the I2S is already enabled */ 
-    if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
-    {
-      /* Enable I2S peripheral */
-      __HAL_I2S_ENABLE(hi2s);
-    }
-
-     /* Check if the I2S Rx request is already enabled */ 
-    if(HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_RXDMAEN))
-    {
-      /* Enable Rx DMA Request */  
-      SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-
-    return HAL_OK;
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Pauses the audio stream playing from the Media.
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
-{
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-  
-  if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
-  {
-    /* Disable the I2S DMA Tx request */
-    CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
-  }
-  else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
-  {
-    /* Disable the I2S DMA Rx request */
-    CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
-  }
-  
-  /* Process Unlocked */
-  __HAL_UNLOCK(hi2s);
-  
-  return HAL_OK; 
-}
-
-/**
-  * @brief Resumes the audio stream playing from the Media.
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
-{
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-  
-  if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
-  {
-    /* Enable the I2S DMA Tx request */
-    SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
-  }
-  else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
-  {
-    /* Enable the I2S DMA Rx request */
-    SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
-  }
-  
-  /* If the I2S peripheral is still not enabled, enable it */
-  if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
-  {
-    /* Enable I2S peripheral */    
-    __HAL_I2S_ENABLE(hi2s);
-  }
-  
-  /* Process Unlocked */
-  __HAL_UNLOCK(hi2s);
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief Stops the audio stream playing from the Media.
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
-{
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-  
-  /* Disable the I2S Tx/Rx DMA requests */
-  CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
-  CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
-  
-  /* Abort the I2S DMA Channel tx */
-  if(hi2s->hdmatx != NULL)
-  {
-    /* Disable the I2S DMA channel */
-    __HAL_DMA_DISABLE(hi2s->hdmatx);
-    HAL_DMA_Abort(hi2s->hdmatx);
-  }
-  /* Abort the I2S DMA Channel rx */
-  if(hi2s->hdmarx != NULL)
-  {
-    /* Disable the I2S DMA channel */
-    __HAL_DMA_DISABLE(hi2s->hdmarx);
-    HAL_DMA_Abort(hi2s->hdmarx);
-  }
-
-  /* Disable I2S peripheral */
-  __HAL_I2S_DISABLE(hi2s);
-  
-  hi2s->State = HAL_I2S_STATE_READY;
-  
-  /* Process Unlocked */
-  __HAL_UNLOCK(hi2s);
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  This function handles I2S interrupt request.
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
-void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
-{  
-  uint32_t i2ssr = hi2s->Instance->SR;
-  
-  /* I2S in mode Receiver ------------------------------------------------*/
-  if(((i2ssr & I2S_FLAG_OVR) != I2S_FLAG_OVR) &&
-     ((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
-  {
-    I2S_Receive_IT(hi2s);
-    return;
-  }
-
-  /* I2S in mode Tramitter -----------------------------------------------*/
-  if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
-  {     
-    I2S_Transmit_IT(hi2s);
-    return;
-  } 
-
-  /* I2S interrupt error -------------------------------------------------*/
-  if(__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)
-  {
-    /* I2S Overrun error interrupt occured ---------------------------------*/
-    if((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR)
-    {
-      /* Disable RXNE and ERR interrupt */
-      __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
-      
-      /* Set the error code and execute error callback*/
-      SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
-    } 
-    
-    /* I2S Underrun error interrupt occured --------------------------------*/
-    if((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR)
-    {
-      /* Disable TXE and ERR interrupt */
-      __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
-      
-      /* Set the error code and execute error callback*/
-      SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
-    }
-    
-    /* Set the I2S State ready */
-    hi2s->State = HAL_I2S_STATE_READY; 
-    /* Call the Error Callback */
-    HAL_I2S_ErrorCallback(hi2s);
-  }
-}
-
-/**
-  * @brief Tx Transfer Half completed callbacks
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
- __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2s);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief Tx Transfer completed callbacks
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
- __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2s);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_I2S_TxCpltCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief Rx Transfer half completed callbacks
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
-__weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2s);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_I2S_RxHalfCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief Rx Transfer completed callbacks
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
-__weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2s);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_I2S_RxCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief I2S error callbacks
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
- __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2s);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_I2S_ErrorCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup I2S_Exported_Functions_Group3
-  *  @brief   Peripheral State functions 
-  *
-@verbatim
- ===============================================================================
-                      ##### Peripheral State and Errors functions #####
- ===============================================================================
-    [..]
-    This subsection permits to get in run-time the status of the peripheral 
-    and the data flow.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the I2S state
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval HAL state
-  */
-HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
-{
-  return hi2s->State;
-}
-
-/**
-  * @brief  Return the I2S error code
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval I2S Error Code
-  */
-uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
-{
-  return hi2s->ErrorCode;
-}
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Private functions ---------------------------------------------------------*/
-/** @addtogroup I2S_Private
-  * @{
-  */
-/**
-  * @brief DMA I2S transmit process complete callback 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
-{
-  I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
-  
-  if(HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
-  {
-    /* Disable Tx DMA Request */
-    CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
-
-    hi2s->TxXferCount = 0U;
-    hi2s->State = HAL_I2S_STATE_READY;
-  }
-  HAL_I2S_TxCpltCallback(hi2s);
-}
-
-/**
-  * @brief DMA I2S transmit process half complete callback 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
-{
-  I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
-
-  HAL_I2S_TxHalfCpltCallback(hi2s);
-}
-
-/**
-  * @brief DMA I2S receive process complete callback 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
-{
-  I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
-
-  if(HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
-  {
-    /* Disable Rx DMA Request */
-    CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
-    hi2s->RxXferCount = 0U;
-    hi2s->State = HAL_I2S_STATE_READY;
-  }
-  HAL_I2S_RxCpltCallback(hi2s); 
-}
-
-/**
-  * @brief DMA I2S receive process half complete callback 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
-{
-  I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
-
-  HAL_I2S_RxHalfCpltCallback(hi2s); 
-}
-
-/**
-  * @brief DMA I2S communication error callback 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void I2S_DMAError(DMA_HandleTypeDef *hdma)
-{
-  I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
-
-  /* Disable Rx and Tx DMA Request */
-  CLEAR_BIT(hi2s->Instance->CR2, (SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
-  hi2s->TxXferCount = 0U;
-  hi2s->RxXferCount = 0U;
-
-  hi2s->State= HAL_I2S_STATE_READY;
-
-  /* Set the error code and execute error callback*/
-  SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA);
-  HAL_I2S_ErrorCallback(hi2s);
-}
-
-/**
-  * @brief Transmit an amount of data in non-blocking mode with Interrupt
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
-static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
-{
-  /* Transmit data */
-  hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
-  hi2s->TxXferCount--;
-    
-  if(hi2s->TxXferCount == 0U)
-  {
-    /* Disable TXE and ERR interrupt */
-    __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
-
-    hi2s->State = HAL_I2S_STATE_READY;
-    HAL_I2S_TxCpltCallback(hi2s);
-  }
-}
-
-/**
-  * @brief Receive an amount of data in non-blocking mode with Interrupt
-  * @param hi2s: I2S handle
-  * @retval None
-  */
-static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
-{
-  /* Receive data */    
-  (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
-  hi2s->RxXferCount--;
-  
-  if(hi2s->RxXferCount == 0U)
-  {
-    /* Disable RXNE and ERR interrupt */
-    __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
-
-    hi2s->State = HAL_I2S_STATE_READY;     
-    HAL_I2S_RxCpltCallback(hi2s); 
-  }
-}
-
-
-/**
-  * @brief This function handles I2S Communication Timeout.
-  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @param Flag: Flag checked
-  * @param Status: Value of the flag expected
-  * @param Timeout: Duration of the timeout
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-  
-  /* Get tick */
-  tickstart = HAL_GetTick();
-  
-  /* Wait until flag is set */
-  if(Status == RESET)
-  {
-    while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET)
-    {
-      if(Timeout != HAL_MAX_DELAY)
-      {
-        if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
-        {
-          /* Set the I2S State ready */
-          hi2s->State= HAL_I2S_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hi2s);
-
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-  }
-  else
-  {
-    while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET)
-    {
-      if(Timeout != HAL_MAX_DELAY)
-      {
-        if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
-        {
-          /* Set the I2S State ready */
-          hi2s->State= HAL_I2S_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hi2s);
-
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-  
-/**
-  * @}
-  */
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-#endif /* #if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined(STM32L031xx) && !defined(STM32L041xx) */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_irda.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_irda.c
deleted file mode 100755
index ecf973c8..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_irda.c
+++ /dev/null
@@ -1,2357 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_irda.c
-  * @author  MCD Application Team
-  * @brief   IRDA HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the IrDA (Infrared Data Association) Peripheral
-  *          (IRDA)
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral State and Errors functions
-  *           + Peripheral Control functions
-  *
-  @verbatim
-  ==============================================================================
-                        ##### How to use this driver #####
-  ==============================================================================
-  [..]
-    The IRDA HAL driver can be used as follows:
-
-    (#) Declare a IRDA_HandleTypeDef handle structure (eg. IRDA_HandleTypeDef hirda).
-    (#) Initialize the IRDA low level resources by implementing the HAL_IRDA_MspInit() API
-        in setting the associated USART or UART in IRDA mode:
-        (++) Enable the USARTx/UARTx interface clock.
-        (++) USARTx/UARTx pins configuration:
-            (+++) Enable the clock for the USARTx/UARTx GPIOs.
-            (+++) Configure these USARTx/UARTx pins (TX as alternate function pull-up, RX as alternate function Input).
-        (++) NVIC configuration if you need to use interrupt process (HAL_IRDA_Transmit_IT()
-             and HAL_IRDA_Receive_IT() APIs): 
-            (+++) Configure the USARTx/UARTx interrupt priority.
-            (+++) Enable the NVIC USARTx/UARTx IRQ handle.            
-            (+++) The specific IRDA interrupts (Transmission complete interrupt,
-                  RXNE interrupt and Error Interrupts) will be managed using the macros
-                  __HAL_IRDA_ENABLE_IT() and __HAL_IRDA_DISABLE_IT() inside the transmit and receive process.
-                
-        (++) DMA Configuration if you need to use DMA process (HAL_IRDA_Transmit_DMA()
-             and HAL_IRDA_Receive_DMA() APIs):
-            (+++) Declare a DMA handle structure for the Tx/Rx channel.
-            (+++) Enable the DMAx interface clock.
-            (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
-            (+++) Configure the DMA Tx/Rx channel.
-            (+++) Associate the initialized DMA handle to the IRDA DMA Tx/Rx handle.
-            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
-
-    (#) Program the Baud Rate, Word Length and Parity and Mode(Receiver/Transmitter),
-        the normal or low power mode and the clock prescaler in the hirda handle Init structure.
-
-    (#) Initialize the IRDA registers by calling the HAL_IRDA_Init() API:
-        (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
-             by calling the customized HAL_IRDA_MspInit() API.
-        
-         -@@- The specific IRDA interrupts (Transmission complete interrupt,
-             RXNE interrupt and Error Interrupts) will be managed using the macros
-             __HAL_IRDA_ENABLE_IT() and __HAL_IRDA_DISABLE_IT() inside the transmit and receive process.
-     
-    (#) Three operation modes are available within this driver :
-
-     *** Polling mode IO operation ***
-     =================================
-     [..]
-       (+) Send an amount of data in blocking mode using HAL_IRDA_Transmit()
-       (+) Receive an amount of data in blocking mode using HAL_IRDA_Receive()
-
-     *** Interrupt mode IO operation ***
-     ===================================
-     [..]
-       (+) Send an amount of data in non-blocking mode using HAL_IRDA_Transmit_IT()
-       (+) At transmission end of transfer HAL_IRDA_TxCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_IRDA_TxCpltCallback()
-       (+) Receive an amount of data in non-blocking mode using HAL_IRDA_Receive_IT()
-       (+) At reception end of transfer HAL_IRDA_RxCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_IRDA_RxCpltCallback()
-       (+) In case of transfer Error, HAL_IRDA_ErrorCallback() function is executed and user can
-            add his own code by customization of function pointer HAL_IRDA_ErrorCallback()
-
-     *** DMA mode IO operation ***
-     ==============================
-     [..]
-       (+) Send an amount of data in non-blocking mode (DMA) using HAL_IRDA_Transmit_DMA()
-       (+) At transmission half of transfer HAL_IRDA_TxHalfCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_IRDA_TxHalfCpltCallback()
-       (+) At transmission end of transfer HAL_IRDA_TxCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_IRDA_TxCpltCallback()
-       (+) Receive an amount of data in non-blocking mode (DMA) using HAL_IRDA_Receive_DMA()
-       (+) At reception half of transfer HAL_IRDA_RxHalfCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_IRDA_RxHalfCpltCallback()
-       (+) At reception end of transfer HAL_IRDA_RxCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_IRDA_RxCpltCallback()
-       (+) In case of transfer Error, HAL_IRDA_ErrorCallback() function is executed and user can
-            add his own code by customization of function pointer HAL_IRDA_ErrorCallback()
-
-     *** IRDA HAL driver macros list ***
-     ====================================
-     [..]
-       Below the list of most used macros in IRDA HAL driver.
-
-       (+) __HAL_IRDA_ENABLE: Enable the IRDA peripheral
-       (+) __HAL_IRDA_DISABLE: Disable the IRDA peripheral
-       (+) __HAL_IRDA_GET_FLAG : Check whether the specified IRDA flag is set or not
-       (+) __HAL_IRDA_CLEAR_FLAG : Clear the specified IRDA pending flag
-       (+) __HAL_IRDA_ENABLE_IT: Enable the specified IRDA interrupt
-       (+) __HAL_IRDA_DISABLE_IT: Disable the specified IRDA interrupt
-       (+) __HAL_IRDA_GET_IT_SOURCE: Check whether or not the specified IRDA interrupt is enabled
-
-     [..]
-       (@) You can refer to the IRDA HAL driver header file for more useful macros
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup IRDA IRDA
-  * @brief HAL IRDA module driver
-  * @{
-  */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup IRDA_Private_Constants IRDA Private Constants
-  * @{
-  */
-#define IRDA_TEACK_REACK_TIMEOUT            1000U                                   /*!< IRDA TX or RX enable acknowledge time-out value  */
-#define IRDA_CR1_FIELDS  ((uint32_t)(USART_CR1_M | USART_CR1_PCE \
-                                   | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE))  /*!< UART or USART CR1 fields of parameters set by IRDA_SetConfig API */
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup IRDA_Private_Functions
-  * @{
-  */
-static HAL_StatusTypeDef IRDA_SetConfig(IRDA_HandleTypeDef *hirda);
-static HAL_StatusTypeDef IRDA_CheckIdleState(IRDA_HandleTypeDef *hirda);
-static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
-static void IRDA_EndTxTransfer(IRDA_HandleTypeDef *hirda);
-static void IRDA_EndRxTransfer(IRDA_HandleTypeDef *hirda);
-static void IRDA_DMATransmitCplt(DMA_HandleTypeDef *hdma);
-static void IRDA_DMATransmitHalfCplt(DMA_HandleTypeDef *hdma);
-static void IRDA_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
-static void IRDA_DMAReceiveHalfCplt(DMA_HandleTypeDef *hdma);
-static void IRDA_DMAError(DMA_HandleTypeDef *hdma);
-static void IRDA_DMAAbortOnError(DMA_HandleTypeDef *hdma);
-static void IRDA_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
-static void IRDA_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
-static void IRDA_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
-static void IRDA_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
-static HAL_StatusTypeDef IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda);
-static HAL_StatusTypeDef IRDA_EndTransmit_IT(IRDA_HandleTypeDef *hirda);
-static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup IRDA_Exported_Functions IRDA Exported Functions
-  * @{
-  */
-
-/** @defgroup IRDA_Exported_Functions_Group1 Initialization and de-initialization functions
-  *  @brief    Initialization and Configuration functions
-  *
-@verbatim
-  ==============================================================================
-              ##### Initialization and Configuration functions #####
-  ==============================================================================
-  [..]
-  This subsection provides a set of functions allowing to initialize the USARTx
-  in asynchronous IRDA mode.
-  (+) For the asynchronous mode only these parameters can be configured:
-      (++) Baud Rate
-      (++) Word Length
-      (++) Parity: If the parity is enabled, then the MSB bit of the data written
-           in the data register is transmitted but is changed by the parity bit.
-      (++) Power mode
-      (++) Prescaler setting
-      (++) Receiver/transmitter modes
-
-  [..]
-  The HAL_IRDA_Init() API follows the USART asynchronous configuration procedures
-  (details for the procedures are available in reference manual).
-
-@endverbatim
-
-  Depending on the frame length defined by the M1 and M0 bits (7-bit, 
-  8-bit or 9-bit), the possible IRDA frame formats are listed in the 
-  following table.
-  
-    Table 1. IRDA frame format.
-    +-----------------------------------------------------------------------+
-    |  M1 bit |  M0 bit |  PCE bit  |             IRDA frame                |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    0    |    0      |    | SB |    8 bit data   | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    0    |    1      |    | SB | 7 bit data | PB | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    1    |    0      |    | SB |    9 bit data   | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    1    |    1      |    | SB | 8 bit data | PB | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    1    |    0    |    0      |    | SB |    7 bit data   | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    1    |    0    |    1      |    | SB | 6 bit data | PB | STB |     |
-    +-----------------------------------------------------------------------+
-
-  * @{
-  */
-
-/**
-  * @brief Initialize the IRDA mode according to the specified
-  *        parameters in the IRDA_InitTypeDef and initialize the associated handle.
-  * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda)
-{
-  /* Check the IRDA handle allocation */
-  if(hirda == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the USART/UART associated to the IRDA handle */
-  assert_param(IS_IRDA_INSTANCE(hirda->Instance));
-
-  if(hirda->gState == HAL_IRDA_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hirda->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK */
-    HAL_IRDA_MspInit(hirda);
-  }
-
-  hirda->gState = HAL_IRDA_STATE_BUSY;
-
-  /* Disable the Peripheral to update the configuration registers */
-  __HAL_IRDA_DISABLE(hirda);
-
-  /* Set the IRDA Communication parameters */
-  if (IRDA_SetConfig(hirda) == HAL_ERROR)
-  {
-    return HAL_ERROR;
-  }
-
-  /* In IRDA mode, the following bits must be kept cleared:
-  - LINEN, STOP and CLKEN bits in the USART_CR2 register,
-  - SCEN and HDSEL bits in the USART_CR3 register.*/
-  CLEAR_BIT(hirda->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
-  CLEAR_BIT(hirda->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
-
-  /* set the UART/USART in IRDA mode */
-  hirda->Instance->CR3 |= USART_CR3_IREN;
-
-  /* Enable the Peripheral */
-  __HAL_IRDA_ENABLE(hirda);
-
-  /* TEACK and/or REACK to check before moving hirda->gState and hirda->RxState to Ready */
-  return (IRDA_CheckIdleState(hirda));
-}
-
-/**
-  * @brief DeInitialize the IRDA peripheral.
-  * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda)
-{
-  /* Check the IRDA handle allocation */
-  if(hirda == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the USART/UART associated to the IRDA handle */
-  assert_param(IS_IRDA_INSTANCE(hirda->Instance));
-
-  hirda->gState = HAL_IRDA_STATE_BUSY;
-
-  /* DeInit the low level hardware */
-  HAL_IRDA_MspDeInit(hirda);
-  /* Disable the Peripheral */
-  __HAL_IRDA_DISABLE(hirda);
-
-  hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-  hirda->gState    = HAL_IRDA_STATE_RESET;
-  hirda->RxState   = HAL_IRDA_STATE_RESET;
-
-  /* Process Unlock */
-  __HAL_UNLOCK(hirda);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Initialize the IRDA MSP.
-  * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-           the HAL_IRDA_MspInit can be implemented in the user file
-   */
-}
-
-/**
-  * @brief DeInitialize the IRDA MSP.
-  * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-           the HAL_IRDA_MspDeInit can be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_Exported_Functions_Group2 IO operation functions
-  *  @brief   IRDA Transmit and Receive functions
-  *
-@verbatim
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
-  [..]
-    This subsection provides a set of functions allowing to manage the IRDA data transfers.
-
-  [..]
-    IrDA is a half duplex communication protocol. If the Transmitter is busy, any data
-    on the IrDA receive line will be ignored by the IrDA decoder and if the Receiver
-    is busy, data on the TX from the USART to IrDA will not be encoded by IrDA.
-    While receiving data, transmission should be avoided as the data to be transmitted
-    could be corrupted.
-
-    (#) There are two mode of transfer:
-        (++) Blocking mode: the communication is performed in polling mode.
-             The HAL status of all data processing is returned by the same function
-             after finishing transfer.
-        (++) Non-Blocking mode: the communication is performed using Interrupts
-             or DMA, these API's return the HAL status.
-             The end of the data processing will be indicated through the
-             dedicated IRDA IRQ when using Interrupt mode or the DMA IRQ when
-             using DMA mode.
-             The HAL_IRDA_TxCpltCallback(), HAL_IRDA_RxCpltCallback() user callbacks
-             will be executed respectively at the end of the Transmit or Receive process
-             The HAL_IRDA_ErrorCallback() user callback will be executed when a communication error is detected
-
-    (#) Blocking mode APIs are :
-        (++) HAL_IRDA_Transmit()
-        (++) HAL_IRDA_Receive()
-
-    (#) Non Blocking mode APIs with Interrupt are :
-        (++) HAL_IRDA_Transmit_IT()
-        (++) HAL_IRDA_Receive_IT()
-        (++) HAL_IRDA_IRQHandler()
-
-    (#) Non Blocking mode functions with DMA are :
-        (++) HAL_IRDA_Transmit_DMA()
-        (++) HAL_IRDA_Receive_DMA()
-        (++) HAL_IRDA_DMAPause()
-        (++) HAL_IRDA_DMAResume()
-        (++) HAL_IRDA_DMAStop()
-
-    (#) A set of Transfer Complete Callbacks are provided in Non Blocking mode:
-        (++) HAL_IRDA_TxHalfCpltCallback()
-        (++) HAL_IRDA_TxCpltCallback()
-        (++) HAL_IRDA_RxHalfCpltCallback()
-        (++) HAL_IRDA_RxCpltCallback()
-        (++) HAL_IRDA_ErrorCallback()
-
-    (#) Non-Blocking mode transfers could be aborted using Abort API's :
-        (+) HAL_IRDA_Abort()
-        (+) HAL_IRDA_AbortTransmit()
-        (+) HAL_IRDA_AbortReceive()
-        (+) HAL_IRDA_Abort_IT()
-        (+) HAL_IRDA_AbortTransmit_IT()
-        (+) HAL_IRDA_AbortReceive_IT()
-
-    (#) For Abort services based on interrupts (HAL_IRDA_Abortxxx_IT), a set of Abort Complete Callbacks are provided:
-        (+) HAL_IRDA_AbortCpltCallback()
-        (+) HAL_IRDA_AbortTransmitCpltCallback()
-        (+) HAL_IRDA_AbortReceiveCpltCallback()
-
-    (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
-        Errors are handled as follows :
-       (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is 
-           to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception .
-           Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type,
-           and HAL_IRDA_ErrorCallback() user callback is executed. Transfer is kept ongoing on IRDA side.
-           If user wants to abort it, Abort services should be called by user.
-       (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
-           This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
-           Error code is set to allow user to identify error type, and HAL_IRDA_ErrorCallback() user callback is executed.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Send an amount of data in blocking mode.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @param  pData Pointer to data buffer.
-  * @param  Size Amount of data to be sent.
-  * @param  Timeout Specify timeout value.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint16_t* tmp;
-  uint32_t tickstart = 0;
-
-  /* Check that a Tx process is not already ongoing */
-  if(hirda->gState == HAL_IRDA_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((hirda->Init.WordLength == UART_WORDLENGTH_9B) && (hirda->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hirda);
-
-    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-    hirda->gState = HAL_IRDA_STATE_BUSY_TX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    hirda->TxXferSize = Size;
-    hirda->TxXferCount = Size;
-    while(hirda->TxXferCount > 0U)
-    {
-      hirda->TxXferCount--;
-
-      if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
-      {
-        tmp = (uint16_t*) pData;
-        hirda->Instance->TDR = (*tmp & (uint16_t)0x01FFU);
-        pData += 2;
-      }
-      else
-      {
-        hirda->Instance->TDR = (*pData++ & (uint8_t)0xFFU);
-      }
-    }
-
-    if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    /* At end of Tx process, restore hirda->gState to Ready */
-    hirda->gState = HAL_IRDA_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hirda);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in blocking mode.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @param  pData Pointer to data buffer.
-  * @param  Size Amount of data to be received.
-  * @param  Timeout Specify timeout value.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint16_t* tmp;
-  uint16_t uhMask;
-  uint32_t tickstart = 0;
-
-  /* Check that a Rx process is not already ongoing */
-  if(hirda->RxState == HAL_IRDA_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be received from RDR will be 
-       handled through a u16 cast. */
-    if ((hirda->Init.WordLength == UART_WORDLENGTH_9B) && (hirda->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hirda);
-
-    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-    hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    hirda->RxXferSize = Size;
-    hirda->RxXferCount = Size;
-
-    /* Computation of the mask to apply to RDR register
-       of the UART associated to the IRDA */
-    IRDA_MASK_COMPUTATION(hirda);
-    uhMask = hirda->Mask;
-
-    /* Check data remaining to be received */
-    while(hirda->RxXferCount > 0U)
-    {
-      hirda->RxXferCount--;
-
-      if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
-      {
-        tmp = (uint16_t*) pData ;
-        *tmp = (uint16_t)(hirda->Instance->RDR & uhMask);
-        pData +=2U;
-      }
-      else
-      {
-        *pData++ = (uint8_t)(hirda->Instance->RDR & (uint8_t)uhMask);
-      }
-    }
-
-    /* At end of Rx process, restore hirda->RxState to Ready */
-    hirda->RxState = HAL_IRDA_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hirda);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Send an amount of data in interrupt mode.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @param  pData Pointer to data buffer.
-  * @param  Size Amount of data to be sent.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Tx process is not already ongoing */
-  if(hirda->gState == HAL_IRDA_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((hirda->Init.WordLength == UART_WORDLENGTH_9B) && (hirda->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hirda);
-
-    hirda->pTxBuffPtr = pData;
-    hirda->TxXferSize = Size;
-    hirda->TxXferCount = Size;
-
-    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-    hirda->gState = HAL_IRDA_STATE_BUSY_TX;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hirda);
-
-    /* Enable the IRDA Transmit Data Register Empty Interrupt */
-    SET_BIT(hirda->Instance->CR1, USART_CR1_TXEIE);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in interrupt mode.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @param  pData Pointer to data buffer.
-  * @param  Size Amount of data to be received.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Rx process is not already ongoing */
-  if(hirda->RxState == HAL_IRDA_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hirda);
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((hirda->Init.WordLength == UART_WORDLENGTH_9B) && (hirda->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    hirda->pRxBuffPtr = pData;
-    hirda->RxXferSize = Size;
-    hirda->RxXferCount = Size;
-
-    /* Computation of the mask to apply to the RDR register
-       of the UART associated to the IRDA */
-    IRDA_MASK_COMPUTATION(hirda);
-
-    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-    hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hirda);
-
-    /* Enable the IRDA Parity Error and Data Register not empty Interrupts */
-    SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE| USART_CR1_RXNEIE);
-
-    /* Enable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Send an amount of data in DMA mode.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @param  pData pointer to data buffer.
-  * @param  Size amount of data to be sent.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Tx process is not already ongoing */
-  if(hirda->gState == HAL_IRDA_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((hirda->Init.WordLength == UART_WORDLENGTH_9B) && (hirda->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hirda);
-
-    hirda->pTxBuffPtr = pData;
-    hirda->TxXferSize = Size;
-    hirda->TxXferCount = Size;
-
-    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-    hirda->gState = HAL_IRDA_STATE_BUSY_TX;
-
-    /* Set the IRDA DMA transfer complete callback */
-    hirda->hdmatx->XferCpltCallback = IRDA_DMATransmitCplt;
-
-    /* Set the IRDA DMA half transfer complete callback */
-    hirda->hdmatx->XferHalfCpltCallback = IRDA_DMATransmitHalfCplt;
-
-    /* Set the DMA error callback */
-    hirda->hdmatx->XferErrorCallback = IRDA_DMAError;
-
-    /* Set the DMA abort callback */
-    hirda->hdmatx->XferAbortCallback = NULL;
-
-    /* Enable the IRDA transmit DMA channel */
-    HAL_DMA_Start_IT(hirda->hdmatx, (uint32_t)hirda->pTxBuffPtr, (uint32_t)&hirda->Instance->TDR, Size);
-
-    /* Clear the TC flag in the ICR register */
-    __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_TCF);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hirda);
-
-    /* Enable the DMA transfer for transmit request by setting the DMAT bit
-       in the USART CR3 register */
-    SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in DMA mode.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @param  pData Pointer to data buffer.
-  * @param  Size Amount of data to be received.
-  * @note   When the IRDA parity is enabled (PCE = 1), the received data contains
-  *         the parity bit (MSB position).
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Rx process is not already ongoing */
-  if(hirda->RxState == HAL_IRDA_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((hirda->Init.WordLength == UART_WORDLENGTH_9B) && (hirda->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hirda);
-
-    hirda->pRxBuffPtr = pData;
-    hirda->RxXferSize = Size;
-
-    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-    hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
-
-    /* Set the IRDA DMA transfer complete callback */
-    hirda->hdmarx->XferCpltCallback = IRDA_DMAReceiveCplt;
-
-    /* Set the IRDA DMA half transfer complete callback */
-    hirda->hdmarx->XferHalfCpltCallback = IRDA_DMAReceiveHalfCplt;
-
-    /* Set the DMA error callback */
-    hirda->hdmarx->XferErrorCallback = IRDA_DMAError;
-
-    /* Set the DMA abort callback */
-    hirda->hdmarx->XferAbortCallback = NULL;
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hirda->hdmarx, (uint32_t)&hirda->Instance->RDR, (uint32_t)hirda->pRxBuffPtr, Size);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hirda);
-
-    /* Enable the UART Parity Error Interrupt */
-    SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
-
-    /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the DMA transfer for the receiver request by setting the DMAR bit
-       in the USART CR3 register */
-    SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-
-/**
-  * @brief  Pause the DMA Transfer.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda)
-{
-  /* Process Locked */
-  __HAL_LOCK(hirda);
-
-  if ((hirda->gState == HAL_IRDA_STATE_BUSY_TX) &&
-      (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)))
-  {
-    /* Disable the IRDA DMA Tx request */
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-  }
-  if ((hirda->RxState == HAL_IRDA_STATE_BUSY_RX) &&
-      (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
-  {
-    /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-    CLEAR_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-    /* Disable the IRDA DMA Rx request */
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hirda);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Resume the DMA Transfer.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda)
-{
-  /* Process Locked */
-  __HAL_LOCK(hirda);
-
-  if(hirda->gState == HAL_IRDA_STATE_BUSY_TX)
-  {
-    /* Enable the IRDA DMA Tx request */
-    SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-  }
-  if(hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
-  {
-    /* Clear the Overrun flag before resuming the Rx transfer*/
-    __HAL_IRDA_CLEAR_OREFLAG(hirda);
-
-    /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
-    SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
-    SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the IRDA DMA Rx request */
-    SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hirda);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stop the DMA Transfer.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda)
-{
-  /* The Lock is not implemented on this API to allow the user application
-     to call the HAL IRDA API under callbacks HAL_IRDA_TxCpltCallback() / HAL_IRDA_RxCpltCallback() /
-     HAL_IRDA_TxHalfCpltCallback / HAL_IRDA_RxHalfCpltCallback: 
-     indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete  
-     interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of 
-     the stream and the corresponding call back is executed. */
-
-  /* Stop IRDA DMA Tx request if ongoing */
-  if ((hirda->gState == HAL_IRDA_STATE_BUSY_TX) &&
-      (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the IRDA DMA Tx channel */
-    if(hirda->hdmatx != NULL)
-    {
-      HAL_DMA_Abort(hirda->hdmatx);
-    }
-
-    IRDA_EndTxTransfer(hirda);
-  }
-
-  /* Stop IRDA DMA Rx request if ongoing */
-  if ((hirda->RxState == HAL_IRDA_STATE_BUSY_RX) &&
-      (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the IRDA DMA Rx channel */
-    if(hirda->hdmarx != NULL)
-    {
-      HAL_DMA_Abort(hirda->hdmarx);
-    }
-
-    IRDA_EndRxTransfer(hirda);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing transfers (blocking mode).
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable IRDA Interrupts (Tx and Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_IRDA_Abort(IRDA_HandleTypeDef *hirda)
-{
-  /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
-  CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the IRDA DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the IRDA DMA Tx channel : use blocking DMA Abort API (no callback) */
-    if(hirda->hdmatx != NULL)
-    {
-      /* Set the IRDA DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      hirda->hdmatx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(hirda->hdmatx);
-    }
-  }
-
-  /* Disable the IRDA DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the IRDA DMA Rx channel : use blocking DMA Abort API (no callback) */
-    if(hirda->hdmarx != NULL)
-    {
-      /* Set the IRDA DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      hirda->hdmarx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(hirda->hdmarx);
-    }
-  }
-
-  /* Reset Tx and Rx transfer counters */
-  hirda->TxXferCount = 0; 
-  hirda->RxXferCount = 0; 
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
-
-  /* Restore hirda->gState and hirda->RxState to Ready */
-  hirda->gState  = HAL_IRDA_STATE_READY;
-  hirda->RxState = HAL_IRDA_STATE_READY;
-
-  /* Reset Handle ErrorCode to No Error */
-  hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Transmit transfer (blocking mode).
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @note   This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable IRDA Interrupts (Tx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_IRDA_AbortTransmit(IRDA_HandleTypeDef *hirda)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-  /* Disable the IRDA DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the IRDA DMA Tx channel : use blocking DMA Abort API (no callback) */
-    if(hirda->hdmatx != NULL)
-    {
-      /* Set the IRDA DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      hirda->hdmatx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(hirda->hdmatx);
-    }
-  }
-
-  /* Reset Tx transfer counter */
-  hirda->TxXferCount = 0; 
-
-  /* Restore hirda->gState to Ready */
-  hirda->gState = HAL_IRDA_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Receive transfer (blocking mode).
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @note   This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable IRDA Interrupts (Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_IRDA_AbortReceive(IRDA_HandleTypeDef *hirda)
-{
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the IRDA DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the IRDA DMA Rx channel : use blocking DMA Abort API (no callback) */
-    if(hirda->hdmarx != NULL)
-    {
-      /* Set the IRDA DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      hirda->hdmarx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(hirda->hdmarx);
-    }
-  }
-
-  /* Reset Rx transfer counter */
-  hirda->RxXferCount = 0; 
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
-
-  /* Restore hirda->RxState to Ready */
-  hirda->RxState = HAL_IRDA_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing transfers (Interrupt mode).
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable IRDA Interrupts (Tx and Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_IRDA_Abort_IT(IRDA_HandleTypeDef *hirda)
-{
-  uint32_t abortcplt = 1;
-  
-  /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
-  CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-  /* If DMA Tx and/or DMA Rx Handles are associated to IRDA Handle, DMA Abort complete callbacks should be initialised
-     before any call to DMA Abort functions */
-  /* DMA Tx Handle is valid */
-  if(hirda->hdmatx != NULL)
-  {
-    /* Set DMA Abort Complete callback if IRDA DMA Tx request if enabled.
-       Otherwise, set it to NULL */
-    if(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
-    {
-      hirda->hdmatx->XferAbortCallback = IRDA_DMATxAbortCallback;
-    }
-    else
-    {
-      hirda->hdmatx->XferAbortCallback = NULL;
-    }
-  }
-  /* DMA Rx Handle is valid */
-  if(hirda->hdmarx != NULL)
-  {
-    /* Set DMA Abort Complete callback if IRDA DMA Rx request if enabled.
-       Otherwise, set it to NULL */
-    if(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
-    {
-      hirda->hdmarx->XferAbortCallback = IRDA_DMARxAbortCallback;
-    }
-    else
-    {
-      hirda->hdmarx->XferAbortCallback = NULL;
-    }
-  }
-  
-  /* Disable the IRDA DMA Tx request if enabled */
-  if(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
-  {
-    /* Disable DMA Tx at UART level */
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the IRDA DMA Tx channel : use non blocking DMA Abort API (callback) */
-    if(hirda->hdmatx != NULL)
-    {
-      /* IRDA Tx DMA Abort callback has already been initialised : 
-         will lead to call HAL_IRDA_AbortCpltCallback() at end of DMA abort procedure */
-
-      /* Abort DMA TX */
-      if(HAL_DMA_Abort_IT(hirda->hdmatx) != HAL_OK)
-      {
-        hirda->hdmatx->XferAbortCallback = NULL;
-      }
-      else
-      {
-        abortcplt = 0;
-      }
-    }
-  }
-
-  /* Disable the IRDA DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the IRDA DMA Rx channel : use non blocking DMA Abort API (callback) */
-    if(hirda->hdmarx != NULL)
-    {
-      /* IRDA Rx DMA Abort callback has already been initialised : 
-         will lead to call HAL_IRDA_AbortCpltCallback() at end of DMA abort procedure */
-
-      /* Abort DMA RX */
-      if(HAL_DMA_Abort_IT(hirda->hdmarx) != HAL_OK)
-      {
-        hirda->hdmarx->XferAbortCallback = NULL;
-        abortcplt = 1;
-      }
-      else
-      {
-        abortcplt = 0;
-      }
-    }
-  }
-
-  /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
-  if (abortcplt == 1)
-  {
-    /* Reset Tx and Rx transfer counters */
-    hirda->TxXferCount = 0; 
-    hirda->RxXferCount = 0;
-
-    /* Reset errorCode */
-    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-
-    /* Clear the Error flags in the ICR register */
-    __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
-
-    /* Restore hirda->gState and hirda->RxState to Ready */
-    hirda->gState  = HAL_IRDA_STATE_READY;
-    hirda->RxState = HAL_IRDA_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_IRDA_AbortCpltCallback(hirda);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Transmit transfer (Interrupt mode).
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @note   This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable IRDA Interrupts (Tx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_IRDA_AbortTransmit_IT(IRDA_HandleTypeDef *hirda)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-  /* Disable the IRDA DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the IRDA DMA Tx channel : use non blocking DMA Abort API (callback) */
-    if(hirda->hdmatx != NULL)
-    {
-      /* Set the IRDA DMA Abort callback : 
-         will lead to call HAL_IRDA_AbortCpltCallback() at end of DMA abort procedure */
-      hirda->hdmatx->XferAbortCallback = IRDA_DMATxOnlyAbortCallback;
-
-      /* Abort DMA TX */
-      if(HAL_DMA_Abort_IT(hirda->hdmatx) != HAL_OK)
-      {
-        /* Call Directly hirda->hdmatx->XferAbortCallback function in case of error */
-        hirda->hdmatx->XferAbortCallback(hirda->hdmatx);
-      }
-    }
-    else
-    {
-      /* Reset Tx transfer counter */
-      hirda->TxXferCount = 0; 
-
-      /* Restore hirda->gState to Ready */
-      hirda->gState = HAL_IRDA_STATE_READY;
-
-      /* As no DMA to be aborted, call directly user Abort complete callback */
-      HAL_IRDA_AbortTransmitCpltCallback(hirda);
-    }
-  }
-  else
-  {
-    /* Reset Tx transfer counter */
-    hirda->TxXferCount = 0; 
-
-    /* Restore hirda->gState to Ready */
-    hirda->gState = HAL_IRDA_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_IRDA_AbortTransmitCpltCallback(hirda);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Receive transfer (Interrupt mode).
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @note   This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable IRDA Interrupts (Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_IRDA_AbortReceive_IT(IRDA_HandleTypeDef *hirda)
-{
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the IRDA DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the IRDA DMA Rx channel : use non blocking DMA Abort API (callback) */
-    if(hirda->hdmarx != NULL)
-    {
-      /* Set the IRDA DMA Abort callback : 
-         will lead to call HAL_IRDA_AbortCpltCallback() at end of DMA abort procedure */
-      hirda->hdmarx->XferAbortCallback = IRDA_DMARxOnlyAbortCallback;
-
-      /* Abort DMA RX */
-      if(HAL_DMA_Abort_IT(hirda->hdmarx) != HAL_OK)
-      {
-        /* Call Directly hirda->hdmarx->XferAbortCallback function in case of error */
-        hirda->hdmarx->XferAbortCallback(hirda->hdmarx);
-      }
-    }
-    else
-    {
-      /* Reset Rx transfer counter */
-      hirda->RxXferCount = 0; 
-
-      /* Clear the Error flags in the ICR register */
-      __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
-
-      /* Restore hirda->RxState to Ready */
-      hirda->RxState = HAL_IRDA_STATE_READY;
-
-      /* As no DMA to be aborted, call directly user Abort complete callback */
-      HAL_IRDA_AbortReceiveCpltCallback(hirda);
-    }
-  }
-  else
-  {
-    /* Reset Rx transfer counter */
-    hirda->RxXferCount = 0; 
-
-    /* Clear the Error flags in the ICR register */
-    __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
-
-    /* Restore hirda->RxState to Ready */
-    hirda->RxState = HAL_IRDA_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_IRDA_AbortReceiveCpltCallback(hirda);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle IRDA interrupt request.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda)
-{
-  uint32_t isrflags   = READ_REG(hirda->Instance->ISR);
-  uint32_t cr1its     = READ_REG(hirda->Instance->CR1);
-  uint32_t cr3its;
-  uint32_t errorflags;
-
-  /* If no error occurs */
-  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
-  if (errorflags == RESET)
-  {
-    /* IRDA in mode Receiver ---------------------------------------------------*/
-    if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-    {
-      IRDA_Receive_IT(hirda);
-      return;
-    }
-  }  
-
-  /* If some errors occur */
-  cr3its = READ_REG(hirda->Instance->CR3);
-  if(   (errorflags != RESET) 
-     && (    ((cr3its & USART_CR3_EIE) != RESET)
-          || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)) )
-  {
-    /* IRDA parity error interrupt occurred -------------------------------------*/
-    if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
-    {
-      __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_PEF);
-
-      hirda->ErrorCode |= HAL_IRDA_ERROR_PE;
-    }
-
-    /* IRDA frame error interrupt occurred --------------------------------------*/
-    if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    {
-      __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_FEF);
-
-      hirda->ErrorCode |= HAL_IRDA_ERROR_FE;
-    }
-
-    /* IRDA noise error interrupt occurred --------------------------------------*/
-    if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    {
-      __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_NEF);
-
-      hirda->ErrorCode |= HAL_IRDA_ERROR_NE;
-    }
-
-    /* IRDA Over-Run interrupt occurred -----------------------------------------*/
-    if(((isrflags & USART_ISR_ORE) != RESET) &&
-       (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET)))
-    {
-      __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_OREF);
-
-      hirda->ErrorCode |= HAL_IRDA_ERROR_ORE;
-    }
-
-    /* Call IRDA Error Call back function if need be --------------------------*/
-    if(hirda->ErrorCode != HAL_IRDA_ERROR_NONE)
-    {
-      /* IRDA in mode Receiver ---------------------------------------------------*/
-      if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-      {
-        IRDA_Receive_IT(hirda);
-      }
-
-      /* If Overrun error occurs, or if any error occurs in DMA mode reception,
-         consider error as blocking */
-      if (((hirda->ErrorCode & HAL_IRDA_ERROR_ORE) != RESET) ||
-          (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
-      {  
-        /* Blocking error : transfer is aborted
-           Set the IRDA state ready to be able to start again the process,
-           Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
-        IRDA_EndRxTransfer(hirda);
-
-        /* Disable the IRDA DMA Rx request if enabled */
-        if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
-        {
-          CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-          /* Abort the IRDA DMA Rx channel */
-          if(hirda->hdmarx != NULL)
-          {
-            /* Set the IRDA DMA Abort callback : 
-               will lead to call HAL_IRDA_ErrorCallback() at end of DMA abort procedure */
-            hirda->hdmarx->XferAbortCallback = IRDA_DMAAbortOnError;
-
-            /* Abort DMA RX */
-            if(HAL_DMA_Abort_IT(hirda->hdmarx) != HAL_OK)
-            {
-              /* Call Directly hirda->hdmarx->XferAbortCallback function in case of error */
-              hirda->hdmarx->XferAbortCallback(hirda->hdmarx);
-            }
-          }
-          else
-          {
-            /* Call user error callback */
-            HAL_IRDA_ErrorCallback(hirda);
-          }
-        }
-        else
-        {
-          /* Call user error callback */
-          HAL_IRDA_ErrorCallback(hirda);
-        }
-      }
-      else
-      {
-        /* Non Blocking error : transfer could go on. 
-           Error is notified to user through user error callback */
-        HAL_IRDA_ErrorCallback(hirda);
-        hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-      }
-    }
-    return;
-
-  } /* End if some error occurs */
-
-  /* IRDA in mode Transmitter ------------------------------------------------*/
-  if(((isrflags & USART_ISR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
-  {
-    IRDA_Transmit_IT(hirda);
-    return;
-  }
-
-  /* IRDA in mode Transmitter (transmission end) -----------------------------*/
-  if(((isrflags & USART_ISR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
-  {
-    IRDA_EndTransmit_IT(hirda);
-    return;
-  }
-
-}
-
-/**
-  * @brief  Tx Transfer completed callback.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_IRDA_TxCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Tx Half Transfer completed callback.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified USART module.
-  * @retval None
-  */
-__weak void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_IRDA_TxHalfCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Rx Transfer completed callback.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_IRDA_RxCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Rx Half Transfer complete callback.
-  * @param  hirda: Pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_IRDA_RxHalfCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  IRDA error callback.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_IRDA_ErrorCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  IRDA Abort Complete callback.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_AbortCpltCallback (IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_IRDA_AbortCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  IRDA Abort Complete callback.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_AbortTransmitCpltCallback (IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_IRDA_AbortTransmitCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  IRDA Abort Receive Complete callback.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_AbortReceiveCpltCallback (IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_IRDA_AbortReceiveCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_Exported_Functions_Group4 Peripheral State and Error functions
-  *  @brief   IRDA State and Errors functions
-  *
-@verbatim
-  ==============================================================================
-            ##### Peripheral State and Error functions #####
-  ==============================================================================
-  [..]
-    This subsection provides a set of functions allowing to return the State of IrDA
-    communication process and also return Peripheral Errors occurred during communication process
-     (+) HAL_IRDA_GetState() API can be helpful to check in run-time the state
-         of the IRDA peripheral handle.
-     (+) HAL_IRDA_GetError() checks in run-time errors that could occur during
-         communication.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the IRDA handle state.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL state
-  */
-HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda)
-{
-  /* Return IRDA handle state */
-  uint32_t temp1= 0x00, temp2 = 0x00;
-  temp1 = hirda->gState;
-  temp2 = hirda->RxState;
-
-  return (HAL_IRDA_StateTypeDef)(temp1 | temp2);
-}
-
-/**
-  * @brief  Return the IRDA handle error code.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval IRDA Error Code
-  */
-uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda)
-{
-  return hirda->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_Private_Functions IRDA Private Functions
-  * @{
-  */
-
-/**
-  * @brief  Configure the IRDA peripheral.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef IRDA_SetConfig(IRDA_HandleTypeDef *hirda)
-{
-  uint32_t tmpreg                     = 0x00000000U;
-  IRDA_ClockSourceTypeDef clocksource = IRDA_CLOCKSOURCE_UNDEFINED;
-  HAL_StatusTypeDef ret               = HAL_OK;
-
-  /* Check the communication parameters */
-  assert_param(IS_IRDA_BAUDRATE(hirda->Init.BaudRate));
-  assert_param(IS_IRDA_WORD_LENGTH(hirda->Init.WordLength));
-  assert_param(IS_IRDA_PARITY(hirda->Init.Parity));
-  assert_param(IS_IRDA_TX_RX_MODE(hirda->Init.Mode));
-  assert_param(IS_IRDA_PRESCALER(hirda->Init.Prescaler));
-  assert_param(IS_IRDA_POWERMODE(hirda->Init.PowerMode));
-
-  /*-------------------------- USART CR1 Configuration -----------------------*/
-  /* Configure the IRDA Word Length, Parity and transfer Mode:
-     Set the M bits according to hirda->Init.WordLength value
-     Set PCE and PS bits according to hirda->Init.Parity value
-     Set TE and RE bits according to hirda->Init.Mode value */
-  tmpreg = (uint32_t)hirda->Init.WordLength | hirda->Init.Parity | hirda->Init.Mode ;
-
-  MODIFY_REG(hirda->Instance->CR1, IRDA_CR1_FIELDS, tmpreg);
-
-  /*-------------------------- USART CR3 Configuration -----------------------*/
-  MODIFY_REG(hirda->Instance->CR3, USART_CR3_IRLP, hirda->Init.PowerMode);
-
-  /*-------------------------- USART GTPR Configuration ----------------------*/
-  MODIFY_REG(hirda->Instance->GTPR, USART_GTPR_PSC, hirda->Init.Prescaler);
-
-  /*-------------------------- USART BRR Configuration -----------------------*/
-  IRDA_GETCLOCKSOURCE(hirda, clocksource);
-  switch (clocksource)
-  {
-    case IRDA_CLOCKSOURCE_PCLK1:
-      hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK1Freq() + (hirda->Init.BaudRate/2U)) / hirda->Init.BaudRate);
-      break;
-    case IRDA_CLOCKSOURCE_PCLK2:
-      hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK2Freq() + (hirda->Init.BaudRate/2U)) / hirda->Init.BaudRate);
-      break;
-    case IRDA_CLOCKSOURCE_HSI:
-      hirda->Instance->BRR = (uint16_t)((HSI_VALUE + (hirda->Init.BaudRate/2U)) / hirda->Init.BaudRate);
-      break;
-    case IRDA_CLOCKSOURCE_SYSCLK:
-      hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetSysClockFreq() + (hirda->Init.BaudRate/2U)) / hirda->Init.BaudRate);
-      break;
-    case IRDA_CLOCKSOURCE_LSE:
-      hirda->Instance->BRR = (uint16_t)((LSE_VALUE + (hirda->Init.BaudRate/2U)) / hirda->Init.BaudRate);
-      break;
-    case IRDA_CLOCKSOURCE_UNDEFINED:
-    default:
-      ret = HAL_ERROR;
-      break;
-  }
-
-  return ret;
-}
-
-/**
-  * @brief  Check the IRDA Idle State.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef IRDA_CheckIdleState(IRDA_HandleTypeDef *hirda)
-{
-  uint32_t tickstart = 0;
-
-  /* Initialize the IRDA ErrorCode */
-  hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-
-  /* Init tickstart for timeout managment*/
-  tickstart = HAL_GetTick();
-
-  /* Check if the Transmitter is enabled */
-  if((hirda->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
-  {
-    /* Wait until TEACK flag is set */
-    if(IRDA_WaitOnFlagUntilTimeout(hirda, USART_ISR_TEACK, RESET, tickstart, IRDA_TEACK_REACK_TIMEOUT) != HAL_OK)
-    {
-      /* Timeout occurred */
-      return HAL_TIMEOUT;
-    }
-  }
-  /* Check if the Receiver is enabled */
-  if((hirda->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
-  {
-    /* Wait until REACK flag is set */
-    if(IRDA_WaitOnFlagUntilTimeout(hirda, USART_ISR_REACK, RESET, tickstart, IRDA_TEACK_REACK_TIMEOUT) != HAL_OK)
-    {
-      /* Timeout occurred */
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* Initialize the IRDA state*/
-  hirda->gState  = HAL_IRDA_STATE_READY;
-  hirda->RxState = HAL_IRDA_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hirda);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle IRDA Communication Timeout.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @param  Flag Specifies the IRDA flag to check.
-  * @param  Status Flag status (SET or RESET)
-  * @param  Tickstart Tick start value
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
-{
-  /* Wait until flag is set */
-  while((__HAL_IRDA_GET_FLAG(hirda, Flag) ? SET : RESET) == Status)
-  {
-    /* Check for the Timeout */
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0) || ((HAL_GetTick()-Tickstart) > Timeout))
-      {
-        /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
-        CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
-        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-        hirda->gState  = HAL_IRDA_STATE_READY;
-        hirda->RxState = HAL_IRDA_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hirda);
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  End ongoing Tx transfer on IRDA peripheral (following error detection or Transmit completion).
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-static void IRDA_EndTxTransfer(IRDA_HandleTypeDef *hirda)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-  /* At end of Tx process, restore hirda->gState to Ready */
-  hirda->gState = HAL_IRDA_STATE_READY;
-}
-
-
-/**
-  * @brief  End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-static void IRDA_EndRxTransfer(IRDA_HandleTypeDef *hirda)
-{
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-  /* At end of Rx process, restore hirda->RxState to Ready */
-  hirda->RxState = HAL_IRDA_STATE_READY;
-}
-
-
-/**
-  * @brief  DMA IRDA transmit process complete callback.
-  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void IRDA_DMATransmitCplt(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
-
-  /* DMA Normal mode */
-  if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
-  {
-    hirda->TxXferCount = 0U;
-
-    /* Disable the DMA transfer for transmit request by resetting the DMAT bit
-       in the IRDA CR3 register */
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-
-    /* Enable the IRDA Transmit Complete Interrupt */
-    SET_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
-  }
-  /* DMA Circular mode */
-  else
-  {
-    HAL_IRDA_TxCpltCallback(hirda);
-  }
-
-}
-
-/**
-  * @brief  DMA IRDA transmit process half complete callback.
-  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void IRDA_DMATransmitHalfCplt(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
-
-  HAL_IRDA_TxHalfCpltCallback(hirda);
-}
-
-/**
-  * @brief  DMA IRDA receive process complete callback.
-  * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void IRDA_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
-
-  /* DMA Normal mode */
-  if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
-  {
-    hirda->RxXferCount = 0;
-
-    /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-    CLEAR_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-    /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
-       in the IRDA CR3 register */
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-    /* At end of Rx process, restore hirda->RxState to Ready */
-    hirda->RxState = HAL_IRDA_STATE_READY;
-  }
-
-  HAL_IRDA_RxCpltCallback(hirda);
-}
-
-/**
-  * @brief DMA IRDA receive process half complete callback.
-  * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void IRDA_DMAReceiveHalfCplt(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
-
-  HAL_IRDA_RxHalfCpltCallback(hirda);
-}
-
-/**
-  * @brief  DMA IRDA communication error callback.
-  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void IRDA_DMAError(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
-
-  /* Stop IRDA DMA Tx request if ongoing */
-  if (  (hirda->gState == HAL_IRDA_STATE_BUSY_TX)
-      &&(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)) )
-  {
-    hirda->TxXferCount = 0;
-    IRDA_EndTxTransfer(hirda);
-  }
-
-  /* Stop IRDA DMA Rx request if ongoing */
-  if (  (hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
-      &&(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)) )
-  {
-    hirda->RxXferCount = 0;
-    IRDA_EndRxTransfer(hirda);
-  }
-
-  hirda->ErrorCode |= HAL_IRDA_ERROR_DMA;
-  HAL_IRDA_ErrorCallback(hirda);
-}
-
-/**
-  * @brief  DMA IRDA communication abort callback, when initiated by HAL services on Error
-  *         (To be called at end of DMA Abort procedure following error occurrence).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void IRDA_DMAAbortOnError(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
-  hirda->RxXferCount = 0;
-  hirda->TxXferCount = 0;
-
-  HAL_IRDA_ErrorCallback(hirda);
-}
-
-/**
-  * @brief  DMA IRDA Tx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Tx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Rx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void IRDA_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef* )(hdma->Parent);
-  
-  hirda->hdmatx->XferAbortCallback = NULL;
-
-  /* Check if an Abort process is still ongoing */
-  if(hirda->hdmarx != NULL)
-  {
-    if(hirda->hdmarx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-  
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  hirda->TxXferCount = 0;
-  hirda->RxXferCount = 0;
-
-  /* Reset errorCode */
-  hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
-
-  /* Restore hirda->gState and hirda->RxState to Ready */
-  hirda->gState  = HAL_IRDA_STATE_READY;
-  hirda->RxState = HAL_IRDA_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_IRDA_AbortCpltCallback(hirda);
-}
-
-
-/**
-  * @brief  DMA IRDA Rx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Rx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Tx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void IRDA_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef* )(hdma->Parent);
-  
-  hirda->hdmarx->XferAbortCallback = NULL;
-
-  /* Check if an Abort process is still ongoing */
-  if(hirda->hdmatx != NULL)
-  {
-    if(hirda->hdmatx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-  
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  hirda->TxXferCount = 0;
-  hirda->RxXferCount = 0;
-
-  /* Reset errorCode */
-  hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
-
-  /* Restore hirda->gState and hirda->RxState to Ready */
-  hirda->gState  = HAL_IRDA_STATE_READY;
-  hirda->RxState = HAL_IRDA_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_IRDA_AbortCpltCallback(hirda);
-}
-
-
-/**
-  * @brief  DMA IRDA Tx communication abort callback, when initiated by user by a call to
-  *         HAL_IRDA_AbortTransmit_IT API (Abort only Tx transfer)
-  *         (This callback is executed at end of DMA Tx Abort procedure following user abort request,
-  *         and leads to user Tx Abort Complete callback execution).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void IRDA_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
-
-  hirda->TxXferCount = 0;
-
-  /* Restore hirda->gState to Ready */
-  hirda->gState = HAL_IRDA_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_IRDA_AbortTransmitCpltCallback(hirda);
-}
-
-/**
-  * @brief  DMA IRDA Rx communication abort callback, when initiated by user by a call to
-  *         HAL_IRDA_AbortReceive_IT API (Abort only Rx transfer)
-  *         (This callback is executed at end of DMA Rx Abort procedure following user abort request,
-  *         and leads to user Rx Abort Complete callback execution).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void IRDA_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-  hirda->RxXferCount = 0;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
-
-  /* Restore hirda->RxState to Ready */
-  hirda->RxState = HAL_IRDA_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_IRDA_AbortReceiveCpltCallback(hirda);
-}
-
-/**
-  * @brief  Send an amount of data in interrupt mode.
-  * @note   Function is called under interruption only, once
-  *         interruptions have been enabled by HAL_IRDA_Transmit_IT().
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda)
-{
-  uint16_t* tmp;
-
-  /* Check that a Tx process is ongoing */
-  if(hirda->gState == HAL_IRDA_STATE_BUSY_TX)
-  {
-    if(hirda->TxXferCount == 0U)
-    {
-      /* Disable the IRDA Transmit Data Register Empty Interrupt */
-      CLEAR_BIT(hirda->Instance->CR1, USART_CR1_TXEIE);
-
-      /* Enable the IRDA Transmit Complete Interrupt */
-      SET_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
-
-      return HAL_OK;
-    }
-    else
-    {
-      if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
-      {
-        tmp = (uint16_t*) hirda->pTxBuffPtr;
-        hirda->Instance->TDR = (*tmp & (uint16_t)0x01FFU);
-        hirda->pTxBuffPtr += 2U;
-      }
-      else
-      {
-        hirda->Instance->TDR = (uint8_t)(*hirda->pTxBuffPtr++ & (uint8_t)0xFFU);
-      }
-      hirda->TxXferCount--;
-
-      return HAL_OK;
-    }
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Wrap up transmission in non-blocking mode.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef IRDA_EndTransmit_IT(IRDA_HandleTypeDef *hirda)
-{
-  /* Disable the IRDA Transmit Complete Interrupt */
-  CLEAR_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
-
-  /* Tx process is ended, restore hirda->gState to Ready */
-  hirda->gState = HAL_IRDA_STATE_READY;
-
-  HAL_IRDA_TxCpltCallback(hirda);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Receive an amount of data in interrupt mode.
-  * @note   Function is called under interruption only, once
-  *         interruptions have been enabled by HAL_IRDA_Receive_IT()
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda)
-{
-  uint16_t* tmp;
-  uint16_t  uhMask = hirda->Mask;
-  uint16_t  uhdata;
-
-  /* Check that a Rx process is ongoing */
-  if (hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
-  {
-    uhdata = (uint16_t) READ_REG(hirda->Instance->RDR);
-    if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
-    {
-      tmp = (uint16_t*) hirda->pRxBuffPtr ;
-      *tmp = (uint16_t)(uhdata & uhMask);
-      hirda->pRxBuffPtr +=2U;
-    }
-    else
-    {
-      *hirda->pRxBuffPtr++ = (uint8_t)(uhdata & (uint8_t)uhMask);
-    }
-
-    if(--hirda->RxXferCount == 0U)
-    {
-      /* Disable the IRDA Parity Error Interrupt and RXNE interrupt */
-      CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-
-      /* Disable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
-      CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-      /* Rx process is completed, restore hirda->RxState to Ready */
-      hirda->RxState = HAL_IRDA_STATE_READY;
-
-      HAL_IRDA_RxCpltCallback(hirda);
-
-      return HAL_OK;
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    /* Clear RXNE interrupt flag */
-    __HAL_IRDA_SEND_REQ(hirda, IRDA_RXDATA_FLUSH_REQUEST);
-
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @}
-  */
-
-#endif /* HAL_IRDA_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c
deleted file mode 100755
index 6310686c..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c
+++ /dev/null
@@ -1,280 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_iwdg.c
-  * @author  MCD Application Team
-  * @brief   IWDG HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Independent Watchdog (IWDG) peripheral:
-  *           + Initialization and Start functions
-  *           + IO operation functions
-  *
-  @verbatim
-  ==============================================================================
-                    ##### IWDG Generic features #####
-  ==============================================================================
-  [..]
-    (+) The IWDG can be started by either software or hardware (configurable
-        through option byte).
-
-    (+) The IWDG is clocked by Low-Speed clock (LSI) and thus stays active even
-        if the main clock fails.
-
-    (+) Once the IWDG is started, the LSI is forced ON and both can not be 
-        disabled. The counter starts counting down from the reset value (0xFFF).
-        When it reaches the end of count value (0x000) a reset signal is 
-        generated (IWDG reset).
-
-    (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register, 
-        the IWDG_RLR value is reloaded in the counter and the watchdog reset is
-        prevented.
-
-    (+) The IWDG is implemented in the VDD voltage domain that is still functional
-        in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
-        IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
-        reset occurs.
-
-    (+) Debug mode : When the microcontroller enters debug mode (core halted),
-        the IWDG counter either continues to work normally or stops, depending 
-        on DBG_IWDG_STOP configuration bit in DBG module, accessible through
-        __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros
-
-    [..] Min-max timeout value @32KHz (LSI): ~0.512ms / ~32.0s
-         The IWDG timeout may vary due to LSI frequency dispersion. STM32L0xx
-         devices provide the capability to measure the LSI frequency (LSI clock
-         connected internally to TIM5 CH4 input capture). The measured value
-         can be used to have an IWDG timeout with an acceptable accuracy.
-
-                     ##### How to use this driver #####
-  ==============================================================================
-  [..]
-    (#) Use IWDG using HAL_IWDG_Init() function to :
-      (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI 
-           clock is forced ON and IWDG counter starts downcounting.
-      (++) Enable write access to configuration register: IWDG_PR, IWDG_RLR & 
-           IWDG_WINR.
-      (++) Configure the IWDG prescaler and counter reload value. This reload 
-           value will be loaded in the IWDG counter each time the watchdog is 
-           reloaded, then the IWDG will start counting down from this value.
-      (++) Wait for status flags to be reset
-      (++) Depending on window parameter:
-        (+++) If Window Init parameter is same as Window register value, 
-             nothing more is done but reload counter value in order to exit 
-             function withy exact time base.
-        (+++) Else modify Window register. This will automatically reload
-             watchdog counter.
-
-    (#) Then the application program must refresh the IWDG counter at regular
-        intervals during normal operation to prevent an MCU reset, using
-        HAL_IWDG_Refresh() function.
-
-     *** IWDG HAL driver macros list ***
-     ====================================
-     [..]
-       Below the list of most used macros in IWDG HAL driver:
-      (+) __HAL_IWDG_START: Enable the IWDG peripheral
-      (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
-          the reload register
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
-/** @addtogroup IWDG
-  * @brief IWDG HAL module driver.
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup IWDG_Private_Defines IWDG Private Defines
-  * @{
-  */
-/* Status register need 5 RC LSI divided by prescaler clock to be updated. With 
-   higher prescaler (256), and according to LSI variation, we need to wait at 
-   least 6 cycles so 48 ms. */
-#define HAL_IWDG_DEFAULT_TIMEOUT            48U
-/**
-  * @}
-  */
-
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/** @addtogroup IWDG_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup IWDG_Exported_Functions_Group1
- *  @brief    Initialization and Start functions.
- *
-@verbatim
- ===============================================================================
-          ##### Initialization and Start functions #####
- ===============================================================================
- [..]  This section provides functions allowing to:
-      (+) Initialize the IWDG according to the specified parameters in the 
-          IWDG_InitTypeDef of associated handle.
-      (+) Manage Window option.
-      (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog 
-          is reloaded in order to exit function with correct time base.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initialize the IWDG according to the specified parameters in the 
-  *         IWDG_InitTypeDef and start watchdog. Before exiting function, 
-  *         watchdog is refreshed in order to have correct time base.
-  * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
-  *                the configuration information for the specified IWDG module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
-{
-  uint32_t tickstart;
-
-  /* Check the IWDG handle allocation */
-  if(hiwdg == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
-  assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
-  assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
-  assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));
-
-  /* Enable IWDG. LSI is turned on automaticaly */
-  __HAL_IWDG_START(hiwdg);
-
-  /* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
-  0x5555 in KR */
-  IWDG_ENABLE_WRITE_ACCESS(hiwdg);
-
-  /* Write to IWDG registers the Prescaler & Reload values to work with */
-  hiwdg->Instance->PR = hiwdg->Init.Prescaler;
-  hiwdg->Instance->RLR = hiwdg->Init.Reload;
-
-  /* Check pending flag, if previous update not done, return timeout */
-  tickstart = HAL_GetTick();
-
-   /* Wait for register to be updated */
-  while(hiwdg->Instance->SR != RESET)
-  {
-    if((HAL_GetTick() - tickstart ) > HAL_IWDG_DEFAULT_TIMEOUT)
-    {
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* If window parameter is different than current value, modify window 
-  register */
-  if(hiwdg->Instance->WINR != hiwdg->Init.Window)
-  {
-    /* Write to IWDG WINR the IWDG_Window value to compare with. In any case,
-    even if window feature is disabled, Watchdog will be reloaded by writing 
-    windows register */
-    hiwdg->Instance->WINR = hiwdg->Init.Window;
-  }
-  else
-  {
-    /* Reload IWDG counter with value defined in the reload register */
-    __HAL_IWDG_RELOAD_COUNTER(hiwdg);
-  }
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-
-/** @addtogroup IWDG_Exported_Functions_Group2
- *  @brief   IO operation functions
- *
-@verbatim
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
- [..]  This section provides functions allowing to:
-      (+) Refresh the IWDG.
-
-@endverbatim
-  * @{
-  */
-
-
-/**
-  * @brief  Refresh the IWDG.
-  * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
-  *                the configuration information for the specified IWDG module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
-{
-  /* Reload IWDG counter with value defined in the reload register */
-  __HAL_IWDG_RELOAD_COUNTER(hiwdg);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_IWDG_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lcd.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lcd.c
deleted file mode 100755
index dac4d8cc..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lcd.c
+++ /dev/null
@@ -1,625 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_lcd.c
-  * @author  MCD Application Team
-  * @brief   LCD Controller HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the LCD Controller (LCD) peripheral:
-  *           + Initialization/de-initialization methods
-  *           + I/O operation methods
-  *           + Peripheral State methods
-  *           
-  @verbatim
-  ==============================================================================
-                        ##### How to use this driver #####
-  ==============================================================================   
-      [..] The LCD HAL driver can be used as follow:
-    
-      (#) Declare a LCD_HandleTypeDef handle structure.
-
-      (#) Prepare the initialization of the LCD low level resources by implementing your HAL_LCD_MspInit() API:
-          (##) Enable the LCDCLK (same as RTCCLK): to configure the RTCCLK/LCDCLK, use the RCC function 
-               HAL_RCCEx_PeriphCLKConfig, indicating here RCC_PERIPHCLK_LCD and the selected clock 
-               source (HSE, LSI or LSE)
-          (##) The frequency generator allows you to achieve various LCD frame rates starting from an 
-               LCD input clock frequency (LCDCLK) which can vary from 32 kHz up to 1 MHz.
-          (##) LCD pins configuration:
-              - Enable the clock for the LCD GPIOs
-              - Configure these LCD pins as alternate function no-pull.
-          (##) Enable the LCD interface clock.
-
-      (#) Set the Prescaler, Divider, Blink mode, Blink Frequency Duty, Bias, Voltage Source, 
-          Dead Time, Pulse On Duration and Contrast in the hlcd Init structure.
-
-      (#) Initialize the LCD registers by calling the HAL_LCD_Init() API.
-          (##) The HAL_LCD_Init() API configures the low level Hardware (GPIO, CLOCK, ...etc)
-               by calling the user customized HAL_LCD_MspInit() API.
-      (#) After calling the HAL_LCD_Init() the LCD RAM memory is cleared
-
-      (#) Optionally you can update the LCD configuration using these macros:
-           (##) LCD High Drive using the __HAL_LCD_HIGHDRIVER_ENABLE() and __HAL_LCD_HIGHDRIVER_DISABLE() macros
-           (##) LCD Pulse ON Duration using the __HAL_LCD_PULSEONDURATION_CONFIG() macro
-           (##) LCD Dead Time using the __HAL_LCD_DEADTIME_CONFIG() macro  
-           (##) The LCD Blink mode and frequency using the __HAL_LCD_BLINK_CONFIG() macro
-           (##) The LCD Contrast using the __HAL_LCD_CONTRAST_CONFIG() macro  
-
-      (#) Write to the LCD RAM memory using the HAL_LCD_Write() API, this API can be called
-          several times to update the different LCD RAM registers before calling 
-          HAL_LCD_UpdateDisplayRequest() API.
-
-      (#) The HAL_LCD_Clear() API can be used to clear the LCD RAM memory.
-
-      (#) When the LCD RAM memory is updated, enable the update display request calling
-          the HAL_LCD_UpdateDisplayRequest() API.
-
-      [..] LCD and low power modes: The LCD remain active during STOP mode.
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-#if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx)
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_LCD_MODULE_ENABLED
-
-/** @addtogroup LCD
-  * @brief LCD HAL module driver
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @addtogroup LCD_Private
-  * @{
-  */
-#define LCD_TIMEOUT_VALUE             1000U
-/**
-  * @}
-  */
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @addtogroup LCD_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup LCD_Exported_Functions_Group1
-  *  @brief    Initialization and Configuration functions 
-  *
-@verbatim    
-===============================================================================
-            ##### Initialization and Configuration functions #####
- ===============================================================================  
-    [..]
-
-@endverbatim
-  * @{
-  */
- 
-/**
-  * @brief  DeInitializes the LCD peripheral. 
-  * @param  hlcd: LCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd)
-{
-  /* Check the LCD handle allocation */
-  if(hlcd == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_LCD_ALL_INSTANCE(hlcd->Instance));
-
-  /* Check the LCD peripheral state */
-  if(hlcd->State == HAL_LCD_STATE_BUSY)
-  {
-    return HAL_BUSY;
-  }
-
-  hlcd->State = HAL_LCD_STATE_BUSY;
-  
-  /* Disable the peripheral */
-  __HAL_LCD_DISABLE(hlcd);
-
-  /*Disable Highdrive by default*/
-  __HAL_LCD_HIGHDRIVER_DISABLE(hlcd);
-
-  /* DeInit the low level hardware */
-  HAL_LCD_MspDeInit(hlcd);
-  
-  hlcd->ErrorCode = HAL_LCD_ERROR_NONE;
-  hlcd->State = HAL_LCD_STATE_RESET;
-    
-  /* Release Lock */
-  __HAL_UNLOCK(hlcd);
-  
-  return HAL_OK;  
-}
-
-/**
-  * @brief  Initializes the LCD peripheral according to the specified parameters 
-  *         in the LCD_InitStruct.
-  * @note   This function can be used only when the LCD is disabled.
-  *         The LCD HighDrive can be enabled/disabled using related macros up to user.
-  * @param  hlcd: LCD handle
-  * @retval None
-  */
-HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd)
-{
-  uint32_t tickstart = 0x00U;
-  uint8_t counter = 0U;
-    
-  /* Check the LCD handle allocation */
-  if(hlcd == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check function parameters */
-  assert_param(IS_LCD_ALL_INSTANCE(hlcd->Instance));
-  assert_param(IS_LCD_PRESCALER(hlcd->Init.Prescaler));
-  assert_param(IS_LCD_DIVIDER(hlcd->Init.Divider));
-  assert_param(IS_LCD_DUTY(hlcd->Init.Duty));
-  assert_param(IS_LCD_BIAS(hlcd->Init.Bias));  
-  assert_param(IS_LCD_VOLTAGE_SOURCE(hlcd->Init.VoltageSource));
-  assert_param(IS_LCD_PULSE_ON_DURATION(hlcd->Init.PulseOnDuration));
-  assert_param(IS_LCD_HIGHDRIVE(hlcd->Init.HighDrive));
-  assert_param(IS_LCD_DEAD_TIME(hlcd->Init.DeadTime));
-  assert_param(IS_LCD_CONTRAST(hlcd->Init.Contrast)); 
-  assert_param(IS_LCD_BLINK_FREQUENCY(hlcd->Init.BlinkFrequency)); 
-  assert_param(IS_LCD_BLINK_MODE(hlcd->Init.BlinkMode)); 
-  assert_param(IS_LCD_MUXSEGMENT(hlcd->Init.MuxSegment));
-  
-  if(hlcd->State == HAL_LCD_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    __HAL_UNLOCK(hlcd);
-
-    /* Initialize the low level hardware (MSP) */
-    HAL_LCD_MspInit(hlcd);
-  }
-  
-  hlcd->State = HAL_LCD_STATE_BUSY;
-  
-  /* Disable the peripheral */
-  __HAL_LCD_DISABLE(hlcd);
-  
-  /* Clear the LCD_RAM registers and enable the display request by setting the UDR bit
-     in the LCD_SR register */
-  for(counter = LCD_RAM_REGISTER0; counter <= LCD_RAM_REGISTER15; counter++)
-  {
-    hlcd->Instance->RAM[counter] = 0U;
-  }
-  /* Enable the display request */
-  SET_BIT(hlcd->Instance->SR, LCD_SR_UDR);
-  
-  /* Configure the LCD Prescaler, Divider, Blink mode and Blink Frequency: 
-  Set PS[3:0] bits according to hlcd->Init.Prescaler value 
-     Set DIV[3:0] bits according to hlcd->Init.Divider value
-     Set BLINK[1:0] bits according to hlcd->Init.BlinkMode value
-     Set BLINKF[2:0] bits according to hlcd->Init.BlinkFrequency value
-     Set DEAD[2:0] bits according to hlcd->Init.DeadTime value
-     Set PON[2:0] bits according to hlcd->Init.PulseOnDuration value 
-     Set CC[2:0] bits according to hlcd->Init.Contrast value
-     Set HD[0] bit according to hlcd->Init.HighDrive value*/
-
-  MODIFY_REG(hlcd->Instance->FCR, \
-             (LCD_FCR_PS | LCD_FCR_DIV | LCD_FCR_BLINK| LCD_FCR_BLINKF | \
-             LCD_FCR_DEAD | LCD_FCR_PON | LCD_FCR_CC), \
-             (hlcd->Init.Prescaler | hlcd->Init.Divider | hlcd->Init.BlinkMode | hlcd->Init.BlinkFrequency | \
-             hlcd->Init.DeadTime | hlcd->Init.PulseOnDuration | hlcd->Init.Contrast | hlcd->Init.HighDrive));
-
-  /* Wait until LCD Frame Control Register Synchronization flag (FCRSF) is set in the LCD_SR register 
-     This bit is set by hardware each time the LCD_FCR register is updated in the LCDCLK
-     domain. It is cleared by hardware when writing to the LCD_FCR register.*/
-  LCD_WaitForSynchro(hlcd);
-  
-  /* Configure the LCD Duty, Bias, Voltage Source, Dead Time:
-     Set DUTY[2:0] bits according to hlcd->Init.Duty value 
-     Set BIAS[1:0] bits according to hlcd->Init.Bias value
-     Set VSEL bit according to hlcd->Init.VoltageSource value
-     Set MUX_SEG bit according to hlcd->Init.MuxSegment value */
-  MODIFY_REG(hlcd->Instance->CR, \
-             (LCD_CR_DUTY | LCD_CR_BIAS | LCD_CR_VSEL | LCD_CR_MUX_SEG), \
-             (hlcd->Init.Duty | hlcd->Init.Bias | hlcd->Init.VoltageSource | hlcd->Init.MuxSegment));
-  
-  /* Enable the peripheral */
-  __HAL_LCD_ENABLE(hlcd);
-  
-  /* Get timeout */
-  tickstart = HAL_GetTick();
-      
-  /* Wait Until the LCD is enabled */
-  while(__HAL_LCD_GET_FLAG(hlcd, LCD_FLAG_ENS) == RESET)
-  {
-    if((HAL_GetTick() - tickstart ) > LCD_TIMEOUT_VALUE)
-    { 
-      hlcd->ErrorCode = HAL_LCD_ERROR_ENS;
-      return HAL_TIMEOUT;
-    } 
-  }
-  
-  /* Get timeout */
-  tickstart = HAL_GetTick();
-  
-  /*!< Wait Until the LCD Booster is ready */
-  while(__HAL_LCD_GET_FLAG(hlcd, LCD_FLAG_RDY) == RESET)
-  {
-    if((HAL_GetTick() - tickstart ) > LCD_TIMEOUT_VALUE)
-    {   
-      hlcd->ErrorCode = HAL_LCD_ERROR_RDY;
-      return HAL_TIMEOUT;
-    } 
-  }
- 
-  /* Initialize the LCD state */
-  hlcd->ErrorCode = HAL_LCD_ERROR_NONE;
-  hlcd->State= HAL_LCD_STATE_READY;
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  LCD MSP DeInit.
-  * @param  hlcd: LCD handle
-  * @retval None
-  */
- __weak void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hlcd);
-
-  /* NOTE: This function Should not be modified, when the callback is needed,
-           the HAL_LCD_MspDeInit could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  LCD MSP Init.
-  * @param  hlcd: LCD handle
-  * @retval None
-  */
- __weak void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hlcd);
-
-  /* NOTE: This function Should not be modified, when the callback is needed,
-           the HAL_LCD_MspInit could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup LCD_Exported_Functions_Group2
-  *  @brief LCD RAM functions 
-  *
-@verbatim   
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================  
- [..] Using its double buffer memory the LCD controller ensures the coherency of the 
- displayed information without having to use interrupts to control LCD_RAM 
- modification.
- The application software can access the first buffer level (LCD_RAM) through 
- the APB interface. Once it has modified the LCD_RAM using the HAL_LCD_Write() API,
- it sets the UDR flag in the LCD_SR register using the HAL_LCD_UpdateDisplayRequest() API.
- This UDR flag (update display request) requests the updated information to be 
- moved into the second buffer level (LCD_DISPLAY).
- This operation is done synchronously with the frame (at the beginning of the 
- next frame), until the update is completed, the LCD_RAM is write protected and 
- the UDR flag stays high.
- Once the update is completed another flag (UDD - Update Display Done) is set and
- generates an interrupt if the UDDIE bit in the LCD_FCR register is set.
- The time it takes to update LCD_DISPLAY is, in the worst case, one odd and one 
- even frame.
- The update will not occur (UDR = 1 and UDD = 0) until the display is 
- enabled (LCDEN = 1).
-      
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Writes a word in the specific LCD RAM.
-  * @param  hlcd: LCD handle
-  * @param  RAMRegisterIndex: specifies the LCD RAM Register.
-  *   This parameter can be one of the following values:
-  *     @arg LCD_RAM_REGISTER0: LCD RAM Register 0
-  *     @arg LCD_RAM_REGISTER1: LCD RAM Register 1
-  *     @arg LCD_RAM_REGISTER2: LCD RAM Register 2
-  *     @arg LCD_RAM_REGISTER3: LCD RAM Register 3
-  *     @arg LCD_RAM_REGISTER4: LCD RAM Register 4
-  *     @arg LCD_RAM_REGISTER5: LCD RAM Register 5
-  *     @arg LCD_RAM_REGISTER6: LCD RAM Register 6 
-  *     @arg LCD_RAM_REGISTER7: LCD RAM Register 7  
-  *     @arg LCD_RAM_REGISTER8: LCD RAM Register 8
-  *     @arg LCD_RAM_REGISTER9: LCD RAM Register 9
-  *     @arg LCD_RAM_REGISTER10: LCD RAM Register 10
-  *     @arg LCD_RAM_REGISTER11: LCD RAM Register 11
-  *     @arg LCD_RAM_REGISTER12: LCD RAM Register 12 
-  *     @arg LCD_RAM_REGISTER13: LCD RAM Register 13 
-  *     @arg LCD_RAM_REGISTER14: LCD RAM Register 14 
-  *     @arg LCD_RAM_REGISTER15: LCD RAM Register 15
-  * @param  RAMRegisterMask: specifies the LCD RAM Register Data Mask.
-  * @param  Data: specifies LCD Data Value to be written.
-  * @note   For LCD glass COM*SEG as 8*40 for example, the LCD common terminals COM[0,7]
-  *         are mapped on 32bits LCD_RAM_REGISTER[0,14] according to rules: COM(n) spread
-  *  	    on LCD_RAM_REGISTER(2*n) and  LCD_RAM_REGISTER(2*n+1).The segment terminals 
-  *		    SEG[0,39] of COM(n) correspond to LSB bits of related LCD_RAM_REGISTER(2*n)[0,31]
-  *		    and LCD_RAM_REGISTER(2*n+1)[0,7] 
-  * @retval None
-  */
-HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data)
-{
-  uint32_t tickstart = 0x00U; 
-  
-  if((hlcd->State == HAL_LCD_STATE_READY) || (hlcd->State == HAL_LCD_STATE_BUSY))
-  {
-    /* Check the parameters */
-    assert_param(IS_LCD_RAM_REGISTER(RAMRegisterIndex));
-    
-    if(hlcd->State == HAL_LCD_STATE_READY)
-    {
-      /* Process Locked */
-      __HAL_LOCK(hlcd);
-      hlcd->State = HAL_LCD_STATE_BUSY;
-      
-      /* Get timeout */
-      tickstart = HAL_GetTick();
-      
-      /*!< Wait Until the LCD is ready */
-  while(__HAL_LCD_GET_FLAG(hlcd, LCD_FLAG_UDR) != RESET)
-      {
-        if((HAL_GetTick() - tickstart) > LCD_TIMEOUT_VALUE)
-        { 
-          hlcd->ErrorCode = HAL_LCD_ERROR_UDR;      
-          /* Process Unlocked */
-          __HAL_UNLOCK(hlcd);
-          return HAL_TIMEOUT;
-        } 
-      }
-    }
-/* Copy the new Data bytes to LCD RAM register */
-    MODIFY_REG(hlcd->Instance->RAM[RAMRegisterIndex], ~(RAMRegisterMask), Data);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief Clears the LCD RAM registers.
-  * @param hlcd: LCD handle
-  * @retval None
-  */
-HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd)
-{
-  uint32_t tickstart = 0x00U; 
-  uint32_t counter = 0U;
-
-  if((hlcd->State == HAL_LCD_STATE_READY) || (hlcd->State == HAL_LCD_STATE_BUSY))
-  {
-    /* Process Locked */
-    __HAL_LOCK(hlcd);
-    
-    hlcd->State = HAL_LCD_STATE_BUSY;
-    
-    /* Get timeout */
-    tickstart = HAL_GetTick();
-    
-    /*!< Wait Until the LCD is ready */
-    while(__HAL_LCD_GET_FLAG(hlcd, LCD_FLAG_UDR) != RESET)
-    {
-      if( (HAL_GetTick() - tickstart) > LCD_TIMEOUT_VALUE)
-      { 
-        hlcd->ErrorCode = HAL_LCD_ERROR_UDR;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hlcd);
-
-        return HAL_TIMEOUT;
-      } 
-    }
-    /* Clear the LCD_RAM registers */
-    for(counter = LCD_RAM_REGISTER0; counter <= LCD_RAM_REGISTER15; counter++)
-    {
-      hlcd->Instance->RAM[counter] = 0U;
-    }
-    
-    /* Update the LCD display */
-    HAL_LCD_UpdateDisplayRequest(hlcd);     
-    
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Enables the Update Display Request.
-  * @param  hlcd: LCD handle
-  * @note   Each time software modifies the LCD_RAM it must set the UDR bit to 
-  *         transfer the updated data to the second level buffer. 
-  *         The UDR bit stays set until the end of the update and during this 
-  *         time the LCD_RAM is write protected. 
-  * @note   When the display is disabled, the update is performed for all 
-  *         LCD_DISPLAY locations.
-  *         When the display is enabled, the update is performed only for locations 
-  *         for which commons are active (depending on DUTY). For example if 
-  *         DUTY = 1/2, only the LCD_DISPLAY of COM0 and COM1 will be updated.    
-  * @retval None
-  */
-HAL_StatusTypeDef HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd)
-{
-  uint32_t tickstart = 0x00U;
-  
-  /* Clear the Update Display Done flag before starting the update display request */
-  __HAL_LCD_CLEAR_FLAG(hlcd, LCD_FLAG_UDD);
-  
-  /* Enable the display request */
-  hlcd->Instance->SR |= LCD_SR_UDR;
-  
-  /* Get timeout */
-  tickstart = HAL_GetTick();
-  
-  /*!< Wait Until the LCD display is done */
-  while(__HAL_LCD_GET_FLAG(hlcd, LCD_FLAG_UDD) == RESET)
-  {
-    if((HAL_GetTick() - tickstart ) > LCD_TIMEOUT_VALUE)
-    { 
-      hlcd->ErrorCode = HAL_LCD_ERROR_UDD;
-      
-      /* Process Unlocked */
-      __HAL_UNLOCK(hlcd);
-  
-      return HAL_TIMEOUT;
-    }
-  }
-
-  hlcd->State = HAL_LCD_STATE_READY;
-  
-  /* Process Unlocked */
-  __HAL_UNLOCK(hlcd);
-  
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup LCD_Exported_Functions_Group3
-  *  @brief   LCD State functions 
-  *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral State functions #####
- ===============================================================================  
-    [..]
-     This subsection provides a set of functions allowing to control the LCD:
-      (+) HAL_LCD_GetState() API can be helpful to check in run-time the state of the LCD peripheral State. 
-      (+) HAL_LCD_GetError() API to return the LCD error code. 
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Returns the LCD state.
-  * @param hlcd: LCD handle
-  * @retval HAL state
-  */
-HAL_LCD_StateTypeDef HAL_LCD_GetState(LCD_HandleTypeDef *hlcd)
-{
-  return hlcd->State;
-}
-
-/**
-  * @brief Return the LCD error code
-  * @param hlcd: LCD handle
-  * @retval LCD Error Code
-  */
-uint32_t HAL_LCD_GetError(LCD_HandleTypeDef *hlcd)
-{
-  return hlcd->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-/** @addtogroup LCD_Private
-  * @{
-  */
-
-/**
-  * @brief  Waits until the LCD FCR register is synchronized in the LCDCLK domain.
-  *   This function must be called after any write operation to LCD_FCR register.
-  * @param  hlcd: LCD handle
-  * @retval None
-  */
-HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd)
-{
-  uint32_t tickstart = 0x00U; 
-  
-  /* Get timeout */
-  tickstart = HAL_GetTick();
-
-  /* Loop until FCRSF flag is set */
-  while(__HAL_LCD_GET_FLAG(hlcd, LCD_FLAG_FCRSF) == RESET)
-  {
-    if((HAL_GetTick() - tickstart) > LCD_TIMEOUT_VALUE)
-    {       
-      hlcd->ErrorCode = HAL_LCD_ERROR_FCRSF;
-      return HAL_TIMEOUT;
-    } 
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-#endif /* HAL_LCD_MODULE_ENABLED */
-/**
-  * @}
-  */
-#endif /* #if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx) */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lptim.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lptim.c
deleted file mode 100755
index 43c712ed..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lptim.c
+++ /dev/null
@@ -1,1654 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_lptim.c
-  * @author  MCD Application Team
-  * @brief   LPTIM HAL module driver.
-  *    
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Low Power Timer (LPTIM) peripheral:
-  *           + Initialization and de-initialization functions.
-  *           + Start/Stop operation functions in polling mode.
-  *           + Start/Stop operation functions in interrupt mode.
-  *           + Reading operation functions.
-  *           + Peripheral State functions.
-  *         
-  @verbatim
-  ==============================================================================
-                     ##### How to use this driver #####
-  ==============================================================================
-    [..]
-      The LPTIM HAL driver can be used as follows:
-
-      (#)Initialize the LPTIM low level resources by implementing the
-        HAL_LPTIM_MspInit():
-         (##) Enable the LPTIM interface clock using __HAL_RCC_LPTIM1_CLK_ENABLE().
-         (##) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
-             (+) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
-             (+) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
-             (+) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
-    
-      (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
-         configures mainly:
-         (##) The instance: Only LPTIM1 is present in STM32L053xx.
-         (##) Clock: the counter clock.
-                 - Source   : it can be either the ULPTIM input (IN1) or one of
-                              the internal clock; (APB, LSE, LSI or MSI).
-                 - Prescaler: select the clock divider.
-         (##)  UltraLowPowerClock : To be used only if the ULPTIM is selected
-               as counter clock source.
-                 - Polarity:   polarity of the active edge for the counter unit
-                               if the ULPTIM input is selected.
-                 - SampleTime: clock sampling time to configure the clock glitch
-                               filter.              
-         (##) Trigger: How the counter start.
-                 - Source: trigger can be software or one of the hardware triggers.
-                 - ActiveEdge : only for hardware trigger.
-                 - SampleTime : trigger sampling time to configure the trigger
-                                glitch filter.
-         (##) OutputPolarity : 2 opposite polarities are possibles.
-         (##) UpdateMode: specifies whether the update of the autoreload and
-              the compare values is done immediately or after the end of current
-              period.   
-    
-      (#)Six modes are available:
-      
-         (##) PWM Mode: To generate a PWM signal with specified period and pulse,
-         call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
-         mode.
-         
-         (##) One Pulse Mode: To generate pulse with specified width in response
-         to a stimulus, call HAL_LPTIM_OnePulse_Start() or
-         HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
-         
-         (##) Set once Mode: In this mode, the output changes the level (from
-         low level to high level if the output polarity is configured high, else
-         the opposite) when a compare match occurs. To start this mode, call 
-         HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
-         interruption mode.
-         
-         (##) Encoder Mode: To use the encoder interface call
-         HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for 
-         interruption mode.
-         
-         (##) Time out Mode: an active edge on one selected trigger input rests
-         the counter. The first trigger event will start the timer, any
-         successive trigger event will reset the counter and the timer will
-         restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or 
-         HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
-         
-         (##) Counter Mode: counter can be used to count external events on
-         the LPTIM Input1 or it can be used to count internal clock cycles.
-         To start this mode, call HAL_LPTIM_Counter_Start() or 
-         HAL_LPTIM_Counter_Start_IT() for interruption mode.             
-
-    
-      (#) User can stop any process by calling the corresponding API:
-          HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
-          already started in interruption mode.
-         
-       (#)Call HAL_LPTIM_DeInit() to deinitialize the LPTIM peripheral.
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
-
-/** @addtogroup LPTIM
-  * @brief LPTIM HAL module driver.
-  * @{
-  */
-
-/** @addtogroup LPTIM_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup LPTIM_Exported_Functions_Group1
- *  @brief    Initialization and Configuration functions. 
- *
-@verbatim    
-  ==============================================================================
-              ##### Initialization and de-initialization functions #####
-  ==============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Initialize the LPTIM according to the specified parameters in the
-          LPTIM_InitTypeDef and creates the associated handle.
-      (+) DeInitialize the LPTIM peripheral.
-      (+) Initialize the LPTIM MSP.
-      (+) DeInitialize LPTIM MSP. 
- 
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the LPTIM according to the specified parameters in the
-  *         LPTIM_InitTypeDef and creates the associated handle.
-  * @param  hlptim : LPTIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
-{
-  uint32_t tmpcfgr = 0U;
-  
-  /* Check the LPTIM handle allocation */
-  if(hlptim == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  
-  assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
-  assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));  
-  if((hlptim->Init.Clock.Source) ==  LPTIM_CLOCKSOURCE_ULPTIM)
-  {
-    assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
-    assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
-  }  
-  assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
-  if ((hlptim->Init.Trigger.Source) !=  LPTIM_TRIGSOURCE_SOFTWARE)
-  {
-    assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
-    assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
-  }  
-  assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));  
-  assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
-  assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
-  
-  if(hlptim->State == HAL_LPTIM_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hlptim->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware */
-    HAL_LPTIM_MspInit(hlptim);
-  }
-  
-  /* Change the LPTIM state */
-  hlptim->State = HAL_LPTIM_STATE_BUSY;
-  
-  /* Get the LPTIMx CFGR value */
-  tmpcfgr = hlptim->Instance->CFGR;
-  
-  if ((hlptim->Init.Clock.Source) ==  LPTIM_CLOCKSOURCE_ULPTIM)
-  {
-    tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
-  }
-  if ((hlptim->Init.Trigger.Source) !=  LPTIM_TRIGSOURCE_SOFTWARE)
-  {
-    tmpcfgr &= (uint32_t)(~ (LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
-  }
-    
-  /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
-  tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
-                          LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE ));
-  
-  /* Set initialization parameters */
-  tmpcfgr |= (hlptim->Init.Clock.Source    |
-              hlptim->Init.Clock.Prescaler |
-              hlptim->Init.OutputPolarity  |
-              hlptim->Init.UpdateMode      |
-              hlptim->Init.CounterSource);
-  
-  if ((hlptim->Init.Clock.Source) ==  LPTIM_CLOCKSOURCE_ULPTIM)
-  {
-    tmpcfgr |=  (hlptim->Init.UltraLowPowerClock.Polarity |
-                hlptim->Init.UltraLowPowerClock.SampleTime);
-  } 
-  
-  if ((hlptim->Init.Trigger.Source) !=  LPTIM_TRIGSOURCE_SOFTWARE)
-  {
-    /* Enable External trigger and set the trigger source */
-    tmpcfgr |= (hlptim->Init.Trigger.Source     |
-                hlptim->Init.Trigger.ActiveEdge |
-                hlptim->Init.Trigger.SampleTime);
-  }
-  
-  /* Write to LPTIMx CFGR */
-  hlptim->Instance->CFGR = tmpcfgr;
-
-  /* Change the LPTIM state */
-  hlptim->State = HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the LPTIM peripheral. 
-  * @param  hlptim : LPTIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Check the LPTIM handle allocation */
-  if(hlptim == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Change the LPTIM state */
-  hlptim->State = HAL_LPTIM_STATE_BUSY;
-  
-  /* Disable the LPTIM Peripheral Clock */
-  __HAL_LPTIM_DISABLE(hlptim);
-  
-  /* DeInit the low level hardware: CLOCK, NVIC.*/
-  HAL_LPTIM_MspDeInit(hlptim);
-  
-  /* Change the LPTIM state */
-  hlptim->State = HAL_LPTIM_STATE_RESET;
-  
-  /* Release Lock */
-  __HAL_UNLOCK(hlptim);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the LPTIM MSP.
-  * @param  hlptim : LPTIM handle
-  * @retval None
-  */
-__weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hlptim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_LPTIM_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes LPTIM MSP.
-  * @param  hlptim : LPTIM handle
-  * @retval None
-  */
-__weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hlptim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_LPTIM_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup LPTIM_Exported_Functions_Group2
- *  @brief   Start-Stop operation functions. 
- *
-@verbatim   
-  ==============================================================================
-                ##### LPTIM Start Stop operation functions #####
-  ==============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Start the PWM mode.
-      (+) Stop the PWM mode.
-      (+) Start the One pulse mode.
-      (+) Stop the One pulse mode.
-      (+) Start the Set once mode.
-      (+) Stop the Set once mode.
-      (+) Start the Encoder mode.
-      (+) Stop the Encoder mode.
-      (+) Start the Timeout mode.
-      (+) Stop the Timeout mode.      
-      (+) Start the Counter mode.
-      (+) Stop the Counter mode.
-      
-
-@endverbatim
-  * @{
-  */
-    
-/**
-  * @brief  Starts the LPTIM PWM generation.
-  * @param  hlptim : LPTIM handle
-  * @param  Period : Specifies the Autoreload value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @param  Pulse : Specifies the compare value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  assert_param(IS_LPTIM_PERIOD(Period));
-  assert_param(IS_LPTIM_PULSE(Pulse));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
- 
-  /* Reset WAVE bit to set PWM mode */
-  hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
-  
-  /* Enable the Peripheral */
-  __HAL_LPTIM_ENABLE(hlptim);
-  
-  /* Load the period value in the autoreload register */
-  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
-  
-  /* Load the pulse value in the compare register */
-  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
-  
-  /* Start timer in continuous mode */
-  __HAL_LPTIM_START_CONTINUOUS(hlptim);
-    
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the LPTIM PWM generation.
-  * @param  hlptim : LPTIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Disable the Peripheral */
-  __HAL_LPTIM_DISABLE(hlptim);
-
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the LPTIM PWM generation in interrupt mode.
-  * @param  hlptim : LPTIM handle
-  * @param  Period : Specifies the Autoreload value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF
-  * @param  Pulse : Specifies the compare value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  assert_param(IS_LPTIM_PERIOD(Period));
-  assert_param(IS_LPTIM_PULSE(Pulse));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
- 
-  /* Reset WAVE bit to set PWM mode */
-  hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
-  
-  /* Enable Autoreload write complete interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
-  
-  /* Enable Compare write complete interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
-  
-  /* Enable Autoreload match interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
-  
-  /* Enable Compare match interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
-  
-  /* If external trigger source is used, then enable external trigger interrupt */
-  if ((hlptim->Init.Trigger.Source) !=  LPTIM_TRIGSOURCE_SOFTWARE)
-  {
-    /* Enable external trigger interrupt */
-    __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
-  }  
-  
-  /* Enable the Peripheral */
-  __HAL_LPTIM_ENABLE(hlptim);
-  
-  /* Load the period value in the autoreload register */
-  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
-  
-  /* Load the pulse value in the compare register */
-  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
-  
-  /* Start timer in continuous mode */
-  __HAL_LPTIM_START_CONTINUOUS(hlptim);
-    
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the LPTIM PWM generation in interrupt mode.
-  * @param  hlptim : LPTIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Disable the Peripheral */
-  __HAL_LPTIM_DISABLE(hlptim);
-  
-    /* Disable Autoreload write complete interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
-  
-  /* Disable Compare write complete interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
-  
-  /* Disable Autoreload match interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
-  
-  /* Disable Compare match interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
-  
-  /* If external trigger source is used, then disable external trigger interrupt */
-  if ((hlptim->Init.Trigger.Source) !=  LPTIM_TRIGSOURCE_SOFTWARE)
-  {
-    /* Disable external trigger interrupt */
-    __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
-  }  
-
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the LPTIM One pulse generation.
-  * @param  hlptim : LPTIM handle
-  * @param  Period : Specifies the Autoreload value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @param  Pulse : Specifies the compare value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  assert_param(IS_LPTIM_PERIOD(Period));
-  assert_param(IS_LPTIM_PULSE(Pulse));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Reset WAVE bit to set one pulse mode */
-  hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
-  
-  /* Enable the Peripheral */
-  __HAL_LPTIM_ENABLE(hlptim);
-  
-  /* Load the period value in the autoreload register */
-  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
-  
-  /* Load the pulse value in the compare register */
-  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
-  
-  /* Start timer in single mode */
-  __HAL_LPTIM_START_SINGLE(hlptim);
-    
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the LPTIM One pulse generation.
-  * @param  hlptim : LPTIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Disable the Peripheral */
-  __HAL_LPTIM_DISABLE(hlptim);
-
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the LPTIM One pulse generation in interrupt mode.
-  * @param  hlptim : LPTIM handle
-  * @param  Period : Specifies the Autoreload value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @param  Pulse : Specifies the compare value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  assert_param(IS_LPTIM_PERIOD(Period));
-  assert_param(IS_LPTIM_PULSE(Pulse));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Reset WAVE bit to set one pulse mode */
-  hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
-  
-  /* Enable Autoreload write complete interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
-  
-  /* Enable Compare write complete interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
-  
-  /* Enable Autoreload match interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
-  
-  /* Enable Compare match interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
-  
-  /* If external trigger source is used, then enable external trigger interrupt */
-  if ((hlptim->Init.Trigger.Source) !=  LPTIM_TRIGSOURCE_SOFTWARE)
-  {
-    /* Enable external trigger interrupt */
-    __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
-  }
-  
-  /* Enable the Peripheral */
-  __HAL_LPTIM_ENABLE(hlptim);
-  
-  /* Load the period value in the autoreload register */
-  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
-  
-  /* Load the pulse value in the compare register */
-  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
-  
-  /* Start timer in continuous mode */
-  __HAL_LPTIM_START_SINGLE(hlptim);
-    
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the LPTIM One pulse generation in interrupt mode.
-  * @param  hlptim : LPTIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Disable the Peripheral */
-  __HAL_LPTIM_DISABLE(hlptim);
-  
-  /* Disable Autoreload write complete interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
-  
-  /* Disable Compare write complete interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
-  
-  /* Disable Autoreload match interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
-  
-  /* Disable Compare match interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
-  
-  /* If external trigger source is used, then disable external trigger interrupt */
-  if ((hlptim->Init.Trigger.Source) !=  LPTIM_TRIGSOURCE_SOFTWARE)
-  {
-    /* Disable external trigger interrupt */
-    __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
-  }
-  
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the LPTIM in Set once mode.
-  * @param  hlptim : LPTIM handle
-  * @param  Period : Specifies the Autoreload value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @param  Pulse : Specifies the compare value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  assert_param(IS_LPTIM_PERIOD(Period));
-  assert_param(IS_LPTIM_PULSE(Pulse));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Set WAVE bit to enable the set once mode */
-  hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
-  
-  /* Enable the Peripheral */
-  __HAL_LPTIM_ENABLE(hlptim);
-  
-  /* Load the period value in the autoreload register */
-  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
-  
-  /* Load the pulse value in the compare register */
-  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
-  
-  /* Start timer in continuous mode */
-  __HAL_LPTIM_START_SINGLE(hlptim);
-    
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the LPTIM Set once mode.
-  * @param  hlptim : LPTIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Disable the Peripheral */
-  __HAL_LPTIM_DISABLE(hlptim);
-
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the LPTIM Set once mode in interrupt mode.
-  * @param  hlptim : LPTIM handle
-  * @param  Period : Specifies the Autoreload value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @param  Pulse : Specifies the compare value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  assert_param(IS_LPTIM_PERIOD(Period));
-  assert_param(IS_LPTIM_PULSE(Pulse));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Set WAVE bit to enable the set once mode */
-  hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
-  
-  /* Enable Autoreload write complete interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
-  
-  /* Enable Compare write complete interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
-  
-  /* Enable Autoreload match interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
-  
-  /* Enable Compare match interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
-  
-  /* If external trigger source is used, then enable external trigger interrupt */
-  if ((hlptim->Init.Trigger.Source) !=  LPTIM_TRIGSOURCE_SOFTWARE)
-  {
-    /* Enable external trigger interrupt */
-    __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
-  }  
-  
-  /* Enable the Peripheral */
-  __HAL_LPTIM_ENABLE(hlptim);
-  
-  /* Load the period value in the autoreload register */
-  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
-  
-  /* Load the pulse value in the compare register */
-  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
-  
-  /* Start timer in continuous mode */
-  __HAL_LPTIM_START_SINGLE(hlptim);
-    
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the LPTIM Set once mode in interrupt mode.
-  * @param  hlptim : LPTIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Disable the Peripheral */
-  __HAL_LPTIM_DISABLE(hlptim);
-
-  /* Disable Autoreload write complete interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
-  
-  /* Disable Compare write complete interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
-  
-  /* Disable Autoreload match interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
-  
-  /* Disable Compare match interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
-  
-  /* If external trigger source is used, then disable external trigger interrupt */
-  if ((hlptim->Init.Trigger.Source) !=  LPTIM_TRIGSOURCE_SOFTWARE)
-  {
-    /* Disable external trigger interrupt */
-    __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
-  } 
-  
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the Encoder interface.
-  * @param  hlptim : LPTIM handle
-  * @param  Period : Specifies the Autoreload value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
-{
-  uint32_t tmpcfgr = 0U;
-   
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  assert_param(IS_LPTIM_PERIOD(Period));
-  assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
-  assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
-  assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
-  
-  /* Configure edge sensitivity for encoder mode */
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Get the LPTIMx CFGR value */
-  tmpcfgr = hlptim->Instance->CFGR;
-  
-  /* Clear CKPOL bits */
-  tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
-  
-  /* Set Input polarity */
-  tmpcfgr |=  hlptim->Init.UltraLowPowerClock.Polarity;
-  
-  /* Write to LPTIMx CFGR */
-  hlptim->Instance->CFGR = tmpcfgr;
- 
-  /* Set ENC bit to enable the encoder interface */
-  hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
-  
-  /* Enable the Peripheral */
-  __HAL_LPTIM_ENABLE(hlptim);
-  
-  /* Load the period value in the autoreload register */
-  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
-  
-  /* Start timer in continuous mode */
-  __HAL_LPTIM_START_CONTINUOUS(hlptim);
-    
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the Encoder interface.
-  * @param  hlptim : LPTIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Disable the Peripheral */
-  __HAL_LPTIM_DISABLE(hlptim);
-  
-  /* Reset ENC bit to disable the encoder interface */
-  hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
-  
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the Encoder interface in interrupt mode.
-  * @param  hlptim : LPTIM handle
-  * @param  Period : Specifies the Autoreload value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
-{
-  uint32_t tmpcfgr = 0U;
-  
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  assert_param(IS_LPTIM_PERIOD(Period));
-  assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
-  assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
-  assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
-  
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Configure edge sensitivity for encoder mode */
-  /* Get the LPTIMx CFGR value */
-  tmpcfgr = hlptim->Instance->CFGR;
-  
-  /* Clear CKPOL bits */
-  tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
-  
-  /* Set Input polarity */
-  tmpcfgr |=  hlptim->Init.UltraLowPowerClock.Polarity;
-  
-  /* Write to LPTIMx CFGR */
-  hlptim->Instance->CFGR = tmpcfgr;
- 
-  /* Set ENC bit to enable the encoder interface */
-  hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
-  
-  /* Enable "switch to down direction" interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
-  
-  /* Enable "switch to up direction" interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);  
-
-  /* Enable the Peripheral */
-  __HAL_LPTIM_ENABLE(hlptim);
-  
-  /* Load the period value in the autoreload register */
-  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
-  
-  /* Start timer in continuous mode */
-  __HAL_LPTIM_START_CONTINUOUS(hlptim);
-    
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the Encoder interface in nterrupt mode.
-  * @param  hlptim : LPTIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Disable the Peripheral */
-  __HAL_LPTIM_DISABLE(hlptim);
-  
-  /* Reset ENC bit to disable the encoder interface */
-  hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
-  
-  /* Disable "switch to down direction" interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
-  
-  /* Disable "switch to up direction" interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP); 
-  
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the Timeout function. The first trigger event will start the
-  *         timer, any successive trigger event will reset the counter and
-  *         the timer restarts.
-  * @param  hlptim : LPTIM handle
-  * @param  Period : Specifies the Autoreload value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @param  Timeout : Specifies the TimeOut value to rest the counter.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  assert_param(IS_LPTIM_PERIOD(Period));
-  assert_param(IS_LPTIM_PULSE(Timeout));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Set TIMOUT bit to enable the timeout function */
-  hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
-  
-  /* Enable the Peripheral */
-  __HAL_LPTIM_ENABLE(hlptim);
-  
-  /* Load the period value in the autoreload register */
-  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
-  
-  /* Load the Timeout value in the compare register */
-  __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
-  
-  /* Start timer in continuous mode */
-  __HAL_LPTIM_START_CONTINUOUS(hlptim);
-    
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the Timeout function.
-  * @param  hlptim : LPTIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Disable the Peripheral */
-  __HAL_LPTIM_DISABLE(hlptim);
-  
-  /* Reset TIMOUT bit to enable the timeout function */
-  hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
-  
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the Timeout function in interrupt mode. The first trigger 
-  *         event will start the timer, any successive trigger event will reset
-  *         the counter and the timer restarts.
-  * @param  hlptim : LPTIM handle
-  * @param  Period : Specifies the Autoreload value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @param  Timeout : Specifies the TimeOut value to rest the counter.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  assert_param(IS_LPTIM_PERIOD(Period));
-  assert_param(IS_LPTIM_PULSE(Timeout));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
-  __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
-
-  /* Enable rising edge trigger on the LPTIM Wake-up Timer Exti line */
-  __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
-
-  /* Set TIMOUT bit to enable the timeout function */
-  hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;  
-  
-  /* Enable Compare match interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
-  
-  /* Enable the Peripheral */
-  __HAL_LPTIM_ENABLE(hlptim);
-  
-  /* Load the period value in the autoreload register */
-  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
-  
-  /* Load the Timeout value in the compare register */
-  __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
-  
-  /* Start timer in continuous mode */
-  __HAL_LPTIM_START_CONTINUOUS(hlptim);
-    
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the Timeout function in interrupt mode.
-  * @param  hlptim : LPTIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Disable rising edge trigger on the LPTIM Wake-up Timer Exti line */
-  __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();
-
-  /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
-  __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
-
-  /* Disable the Peripheral */
-  __HAL_LPTIM_DISABLE(hlptim);
-  
-  /* Reset TIMOUT bit to enable the timeout function */
-  hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
-  
-  /* Disable Compare match interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
-  
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the Counter mode.
-  * @param  hlptim : LPTIM handle
-  * @param  Period : Specifies the Autoreload value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  assert_param(IS_LPTIM_PERIOD(Period));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
-  if((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
-  {
-    /* Check if clock is prescaled */
-    assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
-    /* Set clock prescaler to 0 */
-    hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
-  }
-
-  /* Enable the Peripheral */
-  __HAL_LPTIM_ENABLE(hlptim);
-  
-  /* Load the period value in the autoreload register */
-  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
-  
-  /* Start timer in continuous mode */
-  __HAL_LPTIM_START_CONTINUOUS(hlptim);
-    
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the Counter mode.
-  * @param  hlptim : LPTIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Disable the Peripheral */
-  __HAL_LPTIM_DISABLE(hlptim);
-  
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the Counter mode in interrupt mode.
-  * @param  hlptim : LPTIM handle
-  * @param  Period : Specifies the Autoreload value.
-  *         This parameter must be a value between 0x0000 and 0xFFFF.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  assert_param(IS_LPTIM_PERIOD(Period));
-               
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
-  __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
-
-  /* Enable rising edge trigger on the LPTIM Wake-up Timer Exti line */
-  __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
-
-  /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
-  if((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
-  {
-    /* Check if clock is prescaled */
-    assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
-    /* Set clock prescaler to 0 */
-    hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
-  }
-  
-  /* Enable Autoreload write complete interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
-  
-  /* Enable Autoreload match interrupt */
-  __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
-  
-  /* Enable the Peripheral */
-  __HAL_LPTIM_ENABLE(hlptim);
-  
-  /* Load the period value in the autoreload register */
-  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
-  
-  /* Start timer in continuous mode */
-  __HAL_LPTIM_START_CONTINUOUS(hlptim);
-    
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the Counter mode in interrupt mode.
-  * @param  hlptim : LPTIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  
-  /* Set the LPTIM state */
-  hlptim->State= HAL_LPTIM_STATE_BUSY;
-  
-  /* Disable rising edge trigger on the LPTIM Wake-up Timer Exti line */
-  __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();
-
-  /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
-  __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
-
-  /* Disable the Peripheral */
-  __HAL_LPTIM_DISABLE(hlptim);
-  
-  /* Disable Autoreload write complete interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
-  
-  /* Disable Autoreload match interrupt */
-  __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
-  
-  /* Change the TIM state*/
-  hlptim->State= HAL_LPTIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup LPTIM_Exported_Functions_Group3
- *  @brief  Read operation functions.
- *
-@verbatim   
-  ==============================================================================
-                  ##### LPTIM Read operation functions #####
-  ==============================================================================  
-[..]  This section provides LPTIM Reading functions.
-      (+) Read the counter value.
-      (+) Read the period (Auto-reload) value.
-      (+) Read the pulse (Compare)value.
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  This function returns the current counter value.
-  * @param  hlptim: LPTIM handle
-  * @retval Counter value.
-  */
-uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
-{
-    /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  
-  return (hlptim->Instance->CNT);
-}
-
-/**
-  * @brief  This function return the current Autoreload (Period) value.
-  * @param  hlptim: LPTIM handle
-  * @retval Autoreload value.
-  */
-uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
-{
-    /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  
-  return (hlptim->Instance->ARR);
-}
-
-/**
-  * @brief  This function return the current Compare (Pulse) value.
-  * @param  hlptim: LPTIM handle
-  * @retval Compare value.
-  */
-uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
-{
-    /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
-  
-  return (hlptim->Instance->CMP);
-}
-
-/**
-  * @}
-  */
-
-
-
-/** @addtogroup LPTIM_Exported_Functions_Group4
- *  @brief  LPTIM  IRQ handler.
- *
-@verbatim   
-  ==============================================================================
-                      ##### LPTIM IRQ handler  #####
-  ==============================================================================  
-[..]  This section provides LPTIM IRQ handler function.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  This function handles LPTIM interrupt request.
-  * @param  hlptim: LPTIM handle
-  * @retval None
-  */
-void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Compare match interrupt */
-  if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
-  {
-    if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) !=RESET)
-    {
-      /* Clear Compare match flag */
-      __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
-      
-      /* Compare match Callback */
-      HAL_LPTIM_CompareMatchCallback(hlptim);      
-    }
-  }
-  
-  /* Autoreload match interrupt */
-  if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
-  {
-    if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) !=RESET)
-    {
-      /* Clear Autoreload match flag */
-      __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
-      
-      /* Autoreload match Callback */
-      HAL_LPTIM_AutoReloadMatchCallback(hlptim);      
-    }
-  }
-  
-  /* Trigger detected interrupt */
-  if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
-  {
-    if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) !=RESET)
-    {
-      /* Clear Trigger detected flag */
-      __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
-      
-      /* Trigger detected callback */
-      HAL_LPTIM_TriggerCallback(hlptim);      
-    }
-  }
-  
-  /* Compare write interrupt */
-  if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
-  {
-    if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) !=RESET)
-    {
-      /* Clear Compare write flag */
-      __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
-      
-      /* Compare write Callback */
-      HAL_LPTIM_CompareWriteCallback(hlptim);      
-    }
-  }
-  
-  /* Autoreload write interrupt */
-  if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
-  {
-    if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) !=RESET)
-    {
-      /* Clear Autoreload write flag */
-      __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
-      
-      /* Autoreload write Callback */
-      HAL_LPTIM_AutoReloadWriteCallback(hlptim);      
-    }
-  }
-  
-  /* Direction counter changed from Down to Up interrupt */
-  if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
-  {
-    if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) !=RESET)
-    {
-      /* Clear Direction counter changed from Down to Up flag */
-      __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
-      
-      /* Direction counter changed from Down to Up Callback */
-      HAL_LPTIM_DirectionUpCallback(hlptim);      
-    }
-  }
-  
-  /* Direction counter changed from Up to Down interrupt */
-  if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
-  {
-    if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) !=RESET)
-    {
-      /* Clear Direction counter changed from Up to Down flag */
-      __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
-      
-      /* Direction counter changed from Up to Down Callback */
-      HAL_LPTIM_DirectionDownCallback(hlptim);      
-    }
-  }
-
-  __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG();
-}
-
-/**
-  * @brief  Compare match callback in non blocking mode 
-  * @param  hlptim : LPTIM handle
-  * @retval None
-  */
-__weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hlptim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
-   */  
-}
-
-/**
-  * @brief  Autoreload match callback in non blocking mode 
-  * @param  hlptim : LPTIM handle
-  * @retval None
-  */
-__weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hlptim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
-   */  
-}
-
-/**
-  * @brief  Trigger detected callback in non blocking mode 
-  * @param  hlptim : LPTIM handle
-  * @retval None
-  */
-__weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hlptim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_LPTIM_TriggerCallback could be implemented in the user file
-   */  
-}
-
-/**
-  * @brief  Compare write callback in non blocking mode 
-  * @param  hlptim : LPTIM handle
-  * @retval None
-  */
-__weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hlptim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
-   */  
-}
-
-/**
-  * @brief  Autoreload write callback in non blocking mode 
-  * @param  hlptim : LPTIM handle
-  * @retval None
-  */
-__weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hlptim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
-   */  
-}
-
-/**
-  * @brief  Direction counter changed from Down to Up callback in non blocking mode 
-  * @param  hlptim : LPTIM handle
-  * @retval None
-  */
-__weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hlptim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
-   */  
-}
-
-/**
-  * @brief  Direction counter changed from Up to Down callback in non blocking mode 
-  * @param  hlptim : LPTIM handle
-  * @retval None
-  */
-__weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hlptim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
-   */  
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup LPTIM_Exported_Functions_Group5
- *  @brief   Peripheral State functions. 
- *
-@verbatim   
-  ==============================================================================
-                      ##### Peripheral State functions #####
-  ==============================================================================  
-    [..]
-    This subsection permits to get in run-time the status of the peripheral.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Returns the LPTIM state.
-  * @param  hlptim: LPTIM handle
-  * @retval HAL state
-  */
-HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
-{
-  return hlptim->State;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_msp_template.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_msp_template.c
deleted file mode 100755
index 0308a1b4..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_msp_template.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_msp_template.c
-  * @author  MCD Application Team
-  * @brief   HAL MSP module.
-  *          This file template is located in the HAL folder and should be copied 
-  *          to the user folder.
-  *         
-  @verbatim
- ===============================================================================
-                     ##### How to use this driver #####
- ===============================================================================
-    [..]
-    This file is eventually modified by the user.
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup HAL_MSP
-  * @brief HAL MSP module.
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @defgroup HAL_MSP_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  Initializes the Global BSP.
-  * @param  None
-  * @retval None
-  */
-void HAL_MspInit(void)
-{
-  /* NOTE : This function is eventually modified by the user */ 
-}
-
-/**
-  * @brief  DeInitializes the Global MSP.
-  * @param  None  
-  * @retval None
-  */
-void HAL_MspDeInit(void)
-{
-  /* NOTE : This function is eventually modified by the user */
-}
-
-/**
-  * @brief  Initializes the PPP MSP.
-  * @param  None
-  * @retval None
-  */
-void HAL_PPP_MspInit(void)
-{
-  /* NOTE : This function is eventually modified by the user */ 
-}
-
-/**
-  * @brief  DeInitializes the PPP MSP.
-  * @param  None  
-  * @retval None
-  */
-void HAL_PPP_MspDeInit(void)
-{
-  /* NOTE : This function is eventually modified by the user */
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd.c
deleted file mode 100755
index 9cf95a75..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd.c
+++ /dev/null
@@ -1,1431 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_pcd.c
-  * @author  MCD Application Team
-  * @brief   PCD HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the USB Peripheral Controller:
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral Control functions 
-  *           + Peripheral State functions
-  *         
-  @verbatim
-  ==============================================================================
-                    ##### How to use this driver #####
-  ==============================================================================
-    [..]
-      The PCD HAL driver can be used as follows:
-
-     (#) Declare a PCD_HandleTypeDef handle structure, for example:
-         PCD_HandleTypeDef  hpcd;
-        
-     (#) Fill parameters of Init structure in HCD handle
-  
-     (#) Call HAL_PCD_Init() API to initialize the HCD peripheral (Core, Device core, ...) 
-
-     (#) Initialize the PCD low level resources through the HAL_PCD_MspInit() API:
-         (##) Enable the PCD/USB Low Level interface clock using 
-              (+++) __HAL_RCC_USB_CLK_ENABLE();
-           
-         (##) Initialize the related GPIO clocks
-         (##) Configure PCD pin-out
-         (##) Configure PCD NVIC interrupt
-    
-     (#)Associate the Upper USB device stack to the HAL PCD Driver:
-         (##) hpcd.pData = pdev;
-
-     (#)Enable HCD transmission and reception:
-         (##) HAL_PCD_Start();
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-#if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx)
-#ifdef HAL_PCD_MODULE_ENABLED
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup PCD
-  * @brief PCD HAL module driver
-  * @{
-  */
-
-/** @addtogroup PCD_Private
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-#define BTABLE_ADDRESS                  (0x000U)  
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd);
-void PCD_WritePMA(USB_TypeDef  *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
-void PCD_ReadPMA(USB_TypeDef  *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
-
-/**
-  * @}
-  */
-/* Private functions ---------------------------------------------------------*/
-
-
-/** @addtogroup PCD_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup PCD_Exported_Functions_Group1
- *  @brief    Initialization and Configuration functions 
- *
-@verbatim    
- ===============================================================================
-            ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This section provides functions allowing to:
- 
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the PCD according to the specified
-  *         parameters in the PCD_InitTypeDef and create the associated handle.
-  * @param  hpcd: PCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
-{ 
-  uint32_t i = 0U;
-
-  uint32_t wInterrupt_Mask = 0U;
-  
-  /* Check the PCD handle allocation */
-  if(hpcd == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
-
-  if(hpcd->State == HAL_PCD_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hpcd->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC... */
-    HAL_PCD_MspInit(hpcd);
-  }
-
-  hpcd->State = HAL_PCD_STATE_BUSY;
-  
- /* Init endpoints structures */
- for (i = 0U; i < hpcd->Init.dev_endpoints ; i++)
- {
-   /* Init ep structure */
-   hpcd->IN_ep[i].is_in = 1U;
-   hpcd->IN_ep[i].num = i;
-   /* Control until ep is actvated */
-   hpcd->IN_ep[i].type = PCD_EP_TYPE_CTRL;
-   hpcd->IN_ep[i].maxpacket =  0U;
-   hpcd->IN_ep[i].xfer_buff = 0U;
-   hpcd->IN_ep[i].xfer_len = 0U;
- }
- 
- for (i = 0U; i < hpcd->Init.dev_endpoints ; i++)
- {
-   hpcd->OUT_ep[i].is_in = 0U;
-   hpcd->OUT_ep[i].num = i;
-   /* Control until ep is activated */
-   hpcd->OUT_ep[i].type = PCD_EP_TYPE_CTRL;
-   hpcd->OUT_ep[i].maxpacket = 0U;
-   hpcd->OUT_ep[i].xfer_buff = 0U;
-   hpcd->OUT_ep[i].xfer_len = 0U;
- }
-  
- /* Init Device */
- /*CNTR_FRES = 1*/
- hpcd->Instance->CNTR = USB_CNTR_FRES;
- 
- /*CNTR_FRES = 0*/
- hpcd->Instance->CNTR = 0U;
- 
- /*Clear pending interrupts*/
- hpcd->Instance->ISTR = 0U;
- 
-  /*Set Btable Adress*/
- hpcd->Instance->BTABLE = BTABLE_ADDRESS;
- 
- /*set wInterrupt_Mask global variable*/
- wInterrupt_Mask = USB_CNTR_CTRM  | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM \
-   | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM;
- 
-  /*Set interrupt mask*/
- hpcd->Instance->CNTR = wInterrupt_Mask;
- 
- hpcd->USB_Address = 0U;
- hpcd->State= HAL_PCD_STATE_READY;
-  
- /* Activate LPM */
- if (hpcd->Init.lpm_enable ==1)
- {
-   HAL_PCDEx_ActivateLPM(hpcd);
- }  
- /* Activate Battery charging */
- if (hpcd->Init.battery_charging_enable ==1)
- {
-   HAL_PCDEx_ActivateBCD(hpcd);
-  }
- 
- return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the PCD peripheral 
-  * @param  hpcd: PCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd)
-{
-  /* Check the PCD handle allocation */
-  if(hpcd == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  hpcd->State = HAL_PCD_STATE_BUSY;
-  
-  /* Stop Device */
-  HAL_PCD_Stop(hpcd);
-    
-  /* DeInit the low level hardware */
-  HAL_PCD_MspDeInit(hpcd);
-  
-  hpcd->State = HAL_PCD_STATE_RESET;
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the PCD MSP.
-  * @param  hpcd: PCD handle
-  * @retval None
-  */
-__weak void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes PCD MSP.
-  * @param  hpcd: PCD handle
-  * @retval None
-  */
-__weak void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup PCD_Exported_Functions_Group2
- *  @brief   Data transfers functions 
- *
-@verbatim   
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to manage the PCD data 
-    transfers.
-
-@endverbatim
-  * @{
-  */
-  
-/**
-  * @brief  Start The USB OTG Device.
-  * @param  hpcd: PCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
-{ 
-  /* Enabling DP Pull-Down bit to Connect internal pull-up on USB DP line */
-  hpcd->Instance->BCDR |= USB_BCDR_DPPU;
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stop The USB OTG Device.
-  * @param  hpcd: PCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd)
-{ 
-  __HAL_LOCK(hpcd); 
-  
-    /* disable all interrupts and force USB reset */
-  hpcd->Instance->CNTR = USB_CNTR_FRES;
-  
-  /* clear interrupt status register */
-  hpcd->Instance->ISTR = 0U;
-  
-  /* switch-off device */
-  hpcd->Instance->CNTR = (USB_CNTR_FRES | USB_CNTR_PDWN);
-  
-  __HAL_UNLOCK(hpcd); 
-  return HAL_OK;
-}
-
-/**
-  * @brief  This function handles PCD interrupt request.
-  * @param  hpcd: PCD handle
-  * @retval HAL status
-  */
-void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
-{
-  uint32_t wInterrupt_Mask = 0U;
-  
-  if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_CTR))
-  {
-    /* servicing of the endpoint correct transfer interrupt */
-    /* clear of the CTR flag into the sub */
-    PCD_EP_ISR_Handler(hpcd);
-  }
-
-  if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_RESET))
-  {
-    __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
-    HAL_PCD_ResetCallback(hpcd);
-    HAL_PCD_SetAddress(hpcd, 0U);
-  }
-
-  if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_PMAOVR))
-  {
-    __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);    
-  }
-
-  if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_ERR))
-  {
-    __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR); 
-  }
-
-  if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_WKUP))
-  {
-    
-    hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LPMODE);
-    
-    /*set wInterrupt_Mask global variable*/
-    wInterrupt_Mask = USB_CNTR_CTRM  | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM \
-      | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM;
-
-    /*Set interrupt mask*/
-    hpcd->Instance->CNTR = wInterrupt_Mask;
-
-    /* enable L1REQ interrupt */ 
-    if (hpcd->Init.lpm_enable ==1)
-    {
-      wInterrupt_Mask |= USB_CNTR_L1REQM;
-      
-      /* Enable LPM support and enable ACK answer to LPM request*/
-      USB_TypeDef *USBx = hpcd->Instance;
-      hpcd->lpm_active = ENABLE;
-      hpcd->LPM_State = LPM_L0;
-      
-      USBx->LPMCSR |= (USB_LPMCSR_LMPEN);
-      USBx->LPMCSR |= (USB_LPMCSR_LPMACK);
-    } 
-    
-    HAL_PCD_ResumeCallback(hpcd);
-    
-    __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);     
-  }
-  
-  if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_SUSP))
-  {    
-    /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
-    __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);  
-    
-    /* Force low-power mode in the macrocell */
-    hpcd->Instance->CNTR |= USB_CNTR_FSUSP;
-    hpcd->Instance->CNTR |= USB_CNTR_LPMODE;
-    
-    if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_WKUP) == 0U)
-    {
-      HAL_PCD_SuspendCallback(hpcd);
-    }
-  }
-  
-    /* Handle LPM Interrupt */ 
-  if(__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_L1REQ))
-  {
-    __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_L1REQ);      
-    if( hpcd->LPM_State == LPM_L0)
-    {   
-      /* Force suspend and low-power mode before going to L1 state*/
-      hpcd->Instance->CNTR |= USB_CNTR_LPMODE;
-      hpcd->Instance->CNTR |= USB_CNTR_FSUSP;
-      
-      hpcd->LPM_State = LPM_L1;
-      hpcd->BESL = (hpcd->Instance->LPMCSR & USB_LPMCSR_BESL) >>2 ;  
-      HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L1_ACTIVE);
-    }
-    else
-    {
-      HAL_PCD_SuspendCallback(hpcd);
-    }
-  }
-
-  if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_SOF))
-  {
-    __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF); 
-    HAL_PCD_SOFCallback(hpcd);
-  }
-
-  if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_ESOF))
-  {
-    /* clear ESOF flag in ISTR */
-    __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF); 
-  }
-}
-
-/**
-  * @brief  Data out stage callbacks
-  * @param  hpcd: PCD handle
-  * @param  epnum: endpoint number
-  * @retval None
-  */
- __weak void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-  UNUSED(epnum);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_DataOutStageCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  Data IN stage callbacks
-  * @param  hpcd: PCD handle
-  * @param  epnum: endpoint number
-  * @retval None
-  */
- __weak void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-  UNUSED(epnum);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_DataOutStageCallback could be implemented in the user file
-   */ 
-}
-/**
-  * @brief  Setup stage callback
-  * @param  hpcd: PCD handle
-  * @retval None
-  */
- __weak void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_DataOutStageCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  USB Start Of Frame callbacks
-  * @param  hpcd: PCD handle
-  * @retval None
-  */
- __weak void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_DataOutStageCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  USB Reset callbacks
-  * @param  hpcd: PCD handle
-  * @retval None
-  */
- __weak void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_DataOutStageCallback could be implemented in the user file
-   */ 
-}
-
-
-/**
-  * @brief  Suspend event callbacks
-  * @param  hpcd: PCD handle
-  * @retval None
-  */
- __weak void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_DataOutStageCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  Resume event callbacks
-  * @param  hpcd: PCD handle
-  * @retval None
-  */
- __weak void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_DataOutStageCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  Incomplete ISO OUT callbacks
-  * @param  hpcd: PCD handle
-  * @param  epnum: endpoint number
-  * @retval None
-  */
- __weak void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-  UNUSED(epnum);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_DataOutStageCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  Incomplete ISO IN  callbacks
-  * @param  hpcd: PCD handle
-  * @param  epnum: endpoint number
-  * @retval None
-  */
- __weak void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-  UNUSED(epnum);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_DataOutStageCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  Connection event callbacks
-  * @param  hpcd: PCD handle
-  * @retval None
-  */
- __weak void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_DataOutStageCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  Disconnection event callbacks
-  * @param  hpcd: PCD handle
-  * @retval None
-  */
- __weak void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_DataOutStageCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-  
-
-/** @addtogroup PCD_Exported_Functions_Group3
- *  @brief   management functions 
- *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral Control functions #####
- ===============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to control the PCD data 
-    transfers.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Connect the USB device
-  * @param  hpcd: PCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd)
-{
-  __HAL_LOCK(hpcd); 
-  
-  /* Enabling DP Pull-Down bit to Connect internal pull-up on USB DP line */
-  hpcd->Instance->BCDR |= USB_BCDR_DPPU;
-  
-  __HAL_UNLOCK(hpcd); 
-  return HAL_OK;
-}
-
-/**
-  * @brief  Disconnect the USB device
-  * @param  hpcd: PCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd)
-{
-  __HAL_LOCK(hpcd); 
-  
-  /* Disable DP Pull-Down bit*/
-   hpcd->Instance->BCDR &= ((uint16_t) ~(USB_BCDR_DPPU));
-  
-  __HAL_UNLOCK(hpcd); 
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set the USB Device address 
-  * @param  hpcd: PCD handle
-  * @param  address: new device address
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
-{
-   __HAL_LOCK(hpcd); 
-
-   if(address == 0U) 
-   {
-     /* set device address and enable function */
-     hpcd->Instance->DADDR = USB_DADDR_EF;
-   }
-   else /* USB Address will be applied later */
-   {
-     hpcd->USB_Address = address;
-   }
-
-  __HAL_UNLOCK(hpcd);   
-  return HAL_OK;
-}
-/**
-  * @brief  Open and configure an endpoint
-  * @param  hpcd: PCD handle
-  * @param  ep_addr: endpoint address
-  * @param  ep_mps: endpoint max packert size
-  * @param  ep_type: endpoint type   
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type)
-{
-  HAL_StatusTypeDef  ret = HAL_OK;
-  PCD_EPTypeDef *ep;
-  
-  if ((ep_addr & 0x80U) == 0x80U)
-  {
-    ep = &hpcd->IN_ep[ep_addr & 0x7FU];
-  }
-  else
-  {
-    ep = &hpcd->OUT_ep[ep_addr & 0x7FU];
-  }
-  ep->num   = ep_addr & 0x7FU;
-  
-  ep->is_in = (0x80U & ep_addr) != 0U;
-  ep->maxpacket = ep_mps;
-  ep->type = ep_type;
-  
-  __HAL_LOCK(hpcd); 
-
-/* initialize Endpoint */
-  switch (ep->type)
-  {
-  case PCD_EP_TYPE_CTRL:
-    PCD_SET_EPTYPE(hpcd->Instance, ep->num, USB_EP_CONTROL);
-    break;
-  case PCD_EP_TYPE_BULK:
-    PCD_SET_EPTYPE(hpcd->Instance, ep->num, USB_EP_BULK);
-    break;
-  case PCD_EP_TYPE_INTR:
-    PCD_SET_EPTYPE(hpcd->Instance, ep->num, USB_EP_INTERRUPT);
-    break;
-  case PCD_EP_TYPE_ISOC:
-    PCD_SET_EPTYPE(hpcd->Instance, ep->num, USB_EP_ISOCHRONOUS);
-    break;
-  } 
-  
-  PCD_SET_EP_ADDRESS(hpcd->Instance, ep->num, ep->num);
-  
-  if (ep->doublebuffer == 0U) 
-  {
-    if (ep->is_in)
-    {
-      /*Set the endpoint Transmit buffer address */
-      PCD_SET_EP_TX_ADDRESS(hpcd->Instance, ep->num, ep->pmaadress);
-      PCD_CLEAR_TX_DTOG(hpcd->Instance, ep->num);
-      /* Configure NAK status for the Endpoint*/
-      PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_NAK); 
-    }
-    else
-    {
-      /*Set the endpoint Receive buffer address */
-      PCD_SET_EP_RX_ADDRESS(hpcd->Instance, ep->num, ep->pmaadress);
-      /*Set the endpoint Receive buffer counter*/
-      PCD_SET_EP_RX_CNT(hpcd->Instance, ep->num, ep->maxpacket);
-      PCD_CLEAR_RX_DTOG(hpcd->Instance, ep->num);
-      /* Configure VALID status for the Endpoint*/
-      PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_VALID);
-    }
-  }
-  /*Double Buffer*/
-  else
-  {
-    /*Set the endpoint as double buffered*/
-    PCD_SET_EP_DBUF(hpcd->Instance, ep->num);
-    /*Set buffer address for double buffered mode*/
-    PCD_SET_EP_DBUF_ADDR(hpcd->Instance, ep->num,ep->pmaaddr0, ep->pmaaddr1);
-    
-    if (ep->is_in==0U)
-    {
-      /* Clear the data toggle bits for the endpoint IN/OUT*/
-      PCD_CLEAR_RX_DTOG(hpcd->Instance, ep->num);
-      PCD_CLEAR_TX_DTOG(hpcd->Instance, ep->num);
-      
-      /* Reset value of the data toggle bits for the endpoint out*/
-      PCD_TX_DTOG(hpcd->Instance, ep->num);
-      
-      PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_VALID);
-      PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_DIS);
-    }
-    else
-    {
-      /* Clear the data toggle bits for the endpoint IN/OUT*/
-      PCD_CLEAR_RX_DTOG(hpcd->Instance, ep->num);
-      PCD_CLEAR_TX_DTOG(hpcd->Instance, ep->num);
-      PCD_RX_DTOG(hpcd->Instance, ep->num);
-      /* Configure DISABLE status for the Endpoint*/
-      PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_DIS);
-      PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_DIS);
-    }
-  } 
-  
-  __HAL_UNLOCK(hpcd);   
-  return ret;
-}
-
-
-/**
-  * @brief  Deactivate an endpoint
-  * @param  hpcd: PCD handle
-  * @param  ep_addr: endpoint address
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
-{  
-  PCD_EPTypeDef *ep;
-  
-  if ((ep_addr & 0x80U) == 0x80U)
-  {
-    ep = &hpcd->IN_ep[ep_addr & 0x7FU];
-  }
-  else
-  {
-    ep = &hpcd->OUT_ep[ep_addr & 0x7FU];
-  }
-  ep->num   = ep_addr & 0x7FU;
-  
-  ep->is_in = (0x80U & ep_addr) != 0U;
-  
-  __HAL_LOCK(hpcd); 
-
-  if (ep->doublebuffer == 0U) 
-  {
-    if (ep->is_in)
-    {
-      PCD_CLEAR_TX_DTOG(hpcd->Instance, ep->num);
-      /* Configure DISABLE status for the Endpoint*/
-      PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_DIS); 
-    }
-    else
-    {
-      PCD_CLEAR_RX_DTOG(hpcd->Instance, ep->num);
-      /* Configure DISABLE status for the Endpoint*/
-      PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_DIS);
-    }
-  }
-  /*Double Buffer*/
-  else
-  { 
-    if (ep->is_in==0U)
-    {
-      /* Clear the data toggle bits for the endpoint IN/OUT*/
-      PCD_CLEAR_RX_DTOG(hpcd->Instance, ep->num);
-      PCD_CLEAR_TX_DTOG(hpcd->Instance, ep->num);
-      
-      /* Reset value of the data toggle bits for the endpoint out*/
-      PCD_TX_DTOG(hpcd->Instance, ep->num);
-      
-      PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_DIS);
-      PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_DIS);
-    }
-    else
-    {
-      /* Clear the data toggle bits for the endpoint IN/OUT*/
-      PCD_CLEAR_RX_DTOG(hpcd->Instance, ep->num);
-      PCD_CLEAR_TX_DTOG(hpcd->Instance, ep->num);
-      PCD_RX_DTOG(hpcd->Instance, ep->num);
-      /* Configure DISABLE status for the Endpoint*/
-      PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_DIS);
-      PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_DIS);
-    }
-  } 
-  
-  __HAL_UNLOCK(hpcd);   
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  Receive an amount of data  
-  * @param  hpcd: PCD handle
-  * @param  ep_addr: endpoint address
-  * @param  pBuf: pointer to the reception buffer   
-  * @param  len: amount of data to be received
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
-{
-  
- PCD_EPTypeDef *ep;
-  
-  ep = &hpcd->OUT_ep[ep_addr & 0x7FU];
-  
-  /*setup and start the Xfer */
-  ep->xfer_buff = pBuf;  
-  ep->xfer_len = len;
-  ep->xfer_count = 0U;
-  ep->is_in = 0U;
-  ep->num = ep_addr & 0x7FU;
-
-  /* Multi packet transfer*/
-  if (ep->xfer_len > ep->maxpacket)
-  {
-    len=ep->maxpacket;
-    ep->xfer_len-=len; 
-  }
-  else
-  {
-    len=ep->xfer_len;
-    ep->xfer_len =0U;
-  }
-  
-  /* configure and validate Rx endpoint */
-  if (ep->doublebuffer == 0U) 
-  {
-    /*Set RX buffer count*/
-    PCD_SET_EP_RX_CNT(hpcd->Instance, ep->num, len);
-  }
-  else
-  {
-    /*Set the Double buffer counter*/
-    PCD_SET_EP_DBUF_CNT(hpcd->Instance, ep->num, ep->is_in, len);
-  } 
-  
-  PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_VALID);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Get Received Data Size
-  * @param  hpcd: PCD handle
-  * @param  ep_addr: endpoint address
-  * @retval Data Size
-  */
-uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
-{
-  return hpcd->OUT_ep[ep_addr & 0x7FU].xfer_count;
-}
-/**
-  * @brief  Send an amount of data  
-  * @param  hpcd: PCD handle
-  * @param  ep_addr: endpoint address
-  * @param  pBuf: pointer to the transmission buffer   
-  * @param  len: amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
-{
-  PCD_EPTypeDef *ep;
-  uint16_t pmabuffer = 0U;
-    
-  ep = &hpcd->IN_ep[ep_addr & 0x7FU];
-  
-  /*setup and start the Xfer */
-  ep->xfer_buff = pBuf;  
-  ep->xfer_len = len;
-  ep->xfer_count = 0U;
-  ep->is_in = 1U;
-  ep->num = ep_addr & 0x7FU;
-
-  /*Multi packet transfer*/
-  if (ep->xfer_len > ep->maxpacket)
-  {
-    len=ep->maxpacket;
-    ep->xfer_len-=len; 
-  }
-  else
-  {  
-    len=ep->xfer_len;
-    ep->xfer_len =0U;
-  }
-  
-  /* configure and validate Tx endpoint */
-  if (ep->doublebuffer == 0U) 
-  {
-    PCD_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, len);
-    PCD_SET_EP_TX_CNT(hpcd->Instance, ep->num, len);
-  }
-  else
-  {
-    /*Set the Double buffer counter */
-    PCD_SET_EP_DBUF_CNT(hpcd->Instance, ep->num, ep->is_in, len);
-    
-    /*Write the data to the USB endpoint*/
-    if (PCD_GET_ENDPOINT(hpcd->Instance, ep->num)& USB_EP_DTOG_TX)
-    {
-      pmabuffer = ep->pmaaddr1;
-    }
-    else
-    {
-      pmabuffer = ep->pmaaddr0;
-    }
-    
-    PCD_WritePMA(hpcd->Instance, ep->xfer_buff, pmabuffer, len);
-    PCD_FreeUserBuffer(hpcd->Instance, ep->num, ep->is_in);
-  }
-
-  PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set a STALL condition over an endpoint
-  * @param  hpcd: PCD handle
-  * @param  ep_addr: endpoint address
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
-{
-  PCD_EPTypeDef *ep;
-   
-  __HAL_LOCK(hpcd); 
-   
-  if ((0x80U & ep_addr) == 0x80U)
-  {
-    ep = &hpcd->IN_ep[ep_addr & 0x7FU];
-  }
-  else
-  {
-    ep = &hpcd->OUT_ep[ep_addr];
-  }
-  
-  ep->is_stall = 1U;
-  ep->num   = ep_addr & 0x7FU;
-  ep->is_in = ((ep_addr & 0x80U) == 0x80U);
-  
-  if (ep->num == 0U)
-  {
-    /* This macro sets STALL status for RX & TX*/ 
-    PCD_SET_EP_TXRX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_STALL, USB_EP_TX_STALL); 
-  }
-  else
-  {
-    if (ep->is_in)
-    {
-      PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num , USB_EP_TX_STALL); 
-    }
-    else
-    {
-      PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num , USB_EP_RX_STALL);
-    }
-  }
-  __HAL_UNLOCK(hpcd); 
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Clear a STALL condition over in an endpoint
-  * @param  hpcd: PCD handle
-  * @param  ep_addr: endpoint address
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
-{
-  PCD_EPTypeDef *ep;
-  
-  if ((0x80U & ep_addr) == 0x80U)
-  {
-    ep = &hpcd->IN_ep[ep_addr & 0x7FU];
-  }
-  else
-  {
-    ep = &hpcd->OUT_ep[ep_addr];
-  }
-  
-  ep->is_stall = 0U;
-  ep->num   = ep_addr & 0x7FU;
-  ep->is_in = ((ep_addr & 0x80U) == 0x80U);
-  
-  __HAL_LOCK(hpcd); 
-  
-  if (ep->is_in)
-  {
-    PCD_CLEAR_TX_DTOG(hpcd->Instance, ep->num);
-    PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
-  }
-  else
-  {
-    PCD_CLEAR_RX_DTOG(hpcd->Instance, ep->num);
-    PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_VALID);
-  }
-  __HAL_UNLOCK(hpcd); 
-    
-  return HAL_OK;
-}
-
-/**
-  * @brief  Flush an endpoint
-  * @param  hpcd: PCD handle
-  * @param  ep_addr: endpoint address
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
-{ 
-  return HAL_OK;
-}
-
-/**
-  * @brief  HAL_PCD_ActivateRemoteWakeup : active remote wakeup signalling
-  * @param  hpcd: PCD handle
-  * @retval status
-*/
-HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd)
-{
-  if (hpcd->Init.lpm_enable ==1)
-  {
-    /* Apply L1 Resume */
-    hpcd->Instance->CNTR |= USB_CNTR_L1RESUME;
-  }
-  else
-  {
-    /* Apply L2 Resume */
-    hpcd->Instance->CNTR |= USB_CNTR_RESUME;
-  }
-  return (HAL_OK);
-}
-
-/**
-  * @brief  HAL_PCD_DeActivateRemoteWakeup : de-active remote wakeup signalling
-  * @param  hpcd: PCD handle
-  * @retval status
-  */
-HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd)
-{
-  if (hpcd->Init.lpm_enable ==1)
-  {
-    /* Release L1 Resume */
-    hpcd->Instance->CNTR &= ~ USB_CNTR_L1RESUME;
-  }
-  else
-  {
-    /* Release L2 Resume */
-    hpcd->Instance->CNTR &= ~ USB_CNTR_RESUME;
-  }
-  return (HAL_OK);
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup PCD_Exported_Functions_Group4
- *  @brief   Peripheral State functions
- *
-@verbatim
- ===============================================================================
-                      ##### Peripheral State functions #####
- ===============================================================================
-    [..]
-    This subsection permit to get in run-time the status of the peripheral
-    and the data flow.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the PCD state
-  * @param  hpcd: PCD handle
-  * @retval HAL state
-  */
-PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd)
-{
-  return hpcd->State;
-}
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup PCD_Private
-  * @{
-  */
-
-
-/**
-  * @brief Copy a buffer from user memory area to packet memory area (PMA)
-  * @param   USBx: USB device
-  * @param   pbUsrBuf: pointer to user memory area.
-  * @param   wPMABufAddr: address into PMA.
-  * @param   wNBytes: no. of bytes to be copied.
-  * @retval None
-  */
-void PCD_WritePMA(USB_TypeDef  *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
-{
-  uint32_t n = (wNBytes + 1U) >> 1U;
-  uint32_t i;
-  uint16_t temp1, temp2;
-  uint16_t *pdwVal;
-  pdwVal = (uint16_t *)(wPMABufAddr + (uint32_t)USBx + 0x400U);
-
-  for (i = n; i != 0U; i--)
-  {
-    temp1 = (uint16_t) * pbUsrBuf;
-    pbUsrBuf++;
-    temp2 = temp1 | (uint16_t) * pbUsrBuf << 8U;
-    *pdwVal++ = temp2;
-    pbUsrBuf++;
-  }
-}
-
-/**
-  * @brief Copy a buffer from user memory area to packet memory area (PMA)
-  * @param   USBx: USB device
-  * @param   pbUsrBuf: pointer to user memory area.
-  * @param   wPMABufAddr: address into PMA.
-  * @param   wNBytes: no. of bytes to be copied.
-  * @retval None
-  */
-void PCD_ReadPMA(USB_TypeDef  *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
-{
-  uint32_t n = (wNBytes + 1U) >> 1U;
-  uint32_t i;
-  uint16_t *pdwVal;
-  pdwVal = (uint16_t *)(wPMABufAddr + (uint32_t)USBx + 0x400U);
-  for (i = n; i != 0U; i--)
-  {
-    *(uint16_t*)pbUsrBuf++ = *pdwVal++;
-    pbUsrBuf++;
-  }
-}
-/**
-  * @brief  This function handles PCD Endpoint interrupt request.
-  * @param  hpcd: PCD handle
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
-{
-  PCD_EPTypeDef *ep;
-  uint16_t count=0U;
-  uint8_t EPindex;
-  __IO uint16_t wIstr;  
-  __IO uint16_t wEPVal = 0U;
-  
-  /* stay in loop while pending interrupts */
-  while (((wIstr = hpcd->Instance->ISTR) & USB_ISTR_CTR) != 0U)
-  {
-    /* extract highest priority endpoint number */
-    EPindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
-    
-    if (EPindex == 0U)
-    {
-      /* Decode and service control endpoint interrupt */
-      
-      /* DIR bit = origin of the interrupt */   
-      if ((wIstr & USB_ISTR_DIR) == 0U)
-      {
-        /* DIR = 0 */
-        
-        /* DIR = 0      => IN  int */
-        /* DIR = 0 implies that (EP_CTR_TX = 1) always  */
-        PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
-        ep = &hpcd->IN_ep[0];
-        
-        ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
-        ep->xfer_buff += ep->xfer_count;
- 
-        /* TX COMPLETE */
-        HAL_PCD_DataInStageCallback(hpcd, 0U);
-        
-        
-        if((hpcd->USB_Address > 0U)&& ( ep->xfer_len == 0U))
-        {
-          hpcd->Instance->DADDR = (hpcd->USB_Address | USB_DADDR_EF);
-          hpcd->USB_Address = 0U;
-        }
-        
-      }
-      else
-      {
-        /* DIR = 1 */
-        
-        /* DIR = 1 & CTR_RX       => SETUP or OUT int */
-        /* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
-        ep = &hpcd->OUT_ep[0];
-        wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
-        
-        if ((wEPVal & USB_EP_SETUP) != 0U)
-        {
-          /* Get SETUP Packet*/
-          ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
-          PCD_ReadPMA(hpcd->Instance, (uint8_t*)hpcd->Setup ,ep->pmaadress , ep->xfer_count);       
-          /* SETUP bit kept frozen while CTR_RX = 1*/ 
-          PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); 
-          
-          /* Process SETUP Packet*/
-          HAL_PCD_SetupStageCallback(hpcd);
-        }
-        
-        else if ((wEPVal & USB_EP_CTR_RX) != 0U)
-        {
-          PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
-          /* Get Control Data OUT Packet*/
-          ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
-          
-          if (ep->xfer_count != 0U)
-          {
-            PCD_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, ep->xfer_count);
-            ep->xfer_buff+=ep->xfer_count;
-          }
-          
-          /* Process Control Data OUT Packet*/
-           HAL_PCD_DataOutStageCallback(hpcd, 0U);
-          
-          PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
-          PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
-        }
-      }
-    }
-    else
-    {
-      
-      /* Decode and service non control endpoints interrupt  */
-      
-      /* process related endpoint register */
-      wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, EPindex);
-      if ((wEPVal & USB_EP_CTR_RX) != 0U)
-      {  
-        /* clear int flag */
-        PCD_CLEAR_RX_EP_CTR(hpcd->Instance, EPindex);
-        ep = &hpcd->OUT_ep[EPindex];
-        
-        /* OUT double Buffering*/
-        if (ep->doublebuffer == 0U)
-        {
-          count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
-          if (count != 0U)
-          {
-            PCD_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
-          }
-        }
-        else
-        {
-          if (PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX)
-          {
-            /*read from endpoint BUF0Addr buffer*/
-            count = PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
-            if (count != 0U)
-            {
-              PCD_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
-            }
-          }
-          else
-          {
-            /*read from endpoint BUF1Addr buffer*/
-            count = PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
-            if (count != 0U)
-            {
-              PCD_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
-            }
-          }
-          PCD_FreeUserBuffer(hpcd->Instance, ep->num, PCD_EP_DBUF_OUT);  
-        }
-        /*multi-packet on the NON control OUT endpoint*/
-        ep->xfer_count+=count;
-        ep->xfer_buff+=count;
-       
-        if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
-        {
-          /* RX COMPLETE */
-          HAL_PCD_DataOutStageCallback(hpcd, ep->num);
-        }
-        else
-        {
-          HAL_PCD_EP_Receive(hpcd, ep->num, ep->xfer_buff, ep->xfer_len);
-        }
-        
-      } /* if((wEPVal & EP_CTR_RX) */
-      
-      if ((wEPVal & USB_EP_CTR_TX) != 0U)
-      {
-        ep = &hpcd->IN_ep[EPindex];
-        
-        /* clear int flag */
-        PCD_CLEAR_TX_EP_CTR(hpcd->Instance, EPindex);
-        
-        /* IN double Buffering*/
-        if (ep->doublebuffer == 0U)
-        {
-          ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
-          if (ep->xfer_count != 0U)
-          {
-            PCD_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, ep->xfer_count);
-          }
-        }
-        else
-        {
-          if (PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_TX)
-          {
-            /*read from endpoint BUF0Addr buffer*/
-            ep->xfer_count = PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
-            if (ep->xfer_count != 0U)
-            {
-              PCD_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, ep->xfer_count);
-            }
-          }
-          else
-          {
-            /*read from endpoint BUF1Addr buffer*/
-            ep->xfer_count = PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
-            if (ep->xfer_count != 0U)
-            {
-              PCD_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, ep->xfer_count);
-            }
-          }
-          PCD_FreeUserBuffer(hpcd->Instance, ep->num, PCD_EP_DBUF_IN);  
-        }
-        /*multi-packet on the NON control IN endpoint*/
-        ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
-        ep->xfer_buff+=ep->xfer_count;
-       
-        /* Zero Length Packet? */
-        if (ep->xfer_len == 0U)
-        {
-          /* TX COMPLETE */
-          HAL_PCD_DataInStageCallback(hpcd, ep->num);
-        }
-        else
-        {
-          HAL_PCD_EP_Transmit(hpcd, ep->num, ep->xfer_buff, ep->xfer_len);
-        }
-      } 
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* HAL_PCD_MODULE_ENABLED */
-#endif /* #if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd_ex.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd_ex.c
deleted file mode 100755
index 99036a75..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd_ex.c
+++ /dev/null
@@ -1,318 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_pcd_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended PCD HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the USB Peripheral Controller:
-  *           + Configururation of the PMA for EP
-  *         
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-#if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx)
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-#ifdef HAL_PCD_MODULE_ENABLED
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup PCDEx
-  * @brief PCDEx HAL module driver
-  * @{
-  */
-
-
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-
-/** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions
-  * @{
-  */
-
-/** @addtogroup PCDEx__Exported_Functions_Group1
- *  @brief    Initialization and Configuration functions 
- *
-@verbatim    
- ===============================================================================
-                 ##### Peripheral extended features functions #####
- ===============================================================================
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Configure PMA for EP
-  * @param  hpcd : Device instance
-  * @param  ep_addr: endpoint address
-  * @param  ep_kind: endpoint Kind
-  *                  USB_SNG_BUF: Single Buffer used
-  *                  USB_DBL_BUF: Double Buffer used
-  * @param  pmaadress: EP address in The PMA: In case of single buffer endpoint
-  *                   this parameter is 16-bit value providing the address
-  *                   in PMA allocated to endpoint.
-  *                   In case of double buffer endpoint this parameter
-  *                   is a 32-bit value providing the endpoint buffer 0 address
-  *                   in the LSB part of 32-bit value and endpoint buffer 1 address
-  *                   in the MSB part of 32-bit value.
-  * @retval : status
-  */
-
-
-HAL_StatusTypeDef  HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, 
-                        uint16_t ep_addr,
-                        uint16_t ep_kind,
-                        uint32_t pmaadress)
-
-{
-  PCD_EPTypeDef *ep;
-  
-  /* initialize ep structure*/
-  if ((0x80U & ep_addr) == 0x80U)
-  {
-    ep = &hpcd->IN_ep[ep_addr & 0x7FU];
-  }
-  else
-  {
-    ep = &hpcd->OUT_ep[ep_addr];
-  }
-  
-  /* Here we check if the endpoint is single or double Buffer*/
-  if (ep_kind == PCD_SNG_BUF)
-  {
-    /*Single Buffer*/
-    ep->doublebuffer = 0U;
-    /*Configure te PMA*/
-    ep->pmaadress = (uint16_t)pmaadress;
-  }
-  else /*USB_DBL_BUF*/
-  {
-    /*Double Buffer Endpoint*/
-    ep->doublebuffer = 1U;
-    /*Configure the PMA*/
-    ep->pmaaddr0 =  pmaadress & 0xFFFFU;
-    ep->pmaaddr1 =  (pmaadress & 0xFFFF0000U) >> 16U;
-  }
-  
-  return HAL_OK; 
-}
-
-/**
-  * @brief  Activate BatteryCharging feature.
-  * @param  hpcd: PCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd)
-{
-  USB_TypeDef *USBx = hpcd->Instance;
-  hpcd->battery_charging_active = ENABLE;
-  
-  USBx->BCDR |= (USB_BCDR_BCDEN);
-  /* Enable DCD : Data Contact Detect */
-  USBx->BCDR |= (USB_BCDR_DCDEN);
-  
-  return HAL_OK;  
-}
-
-/**
-  * @brief  Deactivate BatteryCharging feature.
-  * @param  hpcd: PCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd)
-{
-  USB_TypeDef *USBx = hpcd->Instance;
-  hpcd->battery_charging_active = DISABLE;
-  
-  USBx->BCDR &= ~(USB_BCDR_BCDEN);
-  return HAL_OK;  
-}
-
-/**
-  * @brief  Handle BatteryCharging Process.
-  * @param  hpcd: PCD handle
-  * @retval HAL status
-  */
-void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd)
-{
-  USB_TypeDef *USBx = hpcd->Instance;
-  uint32_t tickstart = HAL_GetTick();
-   
-  /* Wait Detect flag or a timeout is happen*/
-  while ((USBx->BCDR & USB_BCDR_DCDET) == 0)
-  {
-    /* Check for the Timeout */
-    if((HAL_GetTick() - tickstart ) > 1000)
-    {
-      HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_ERROR);
-      return;
-    }
-  }
-
-  HAL_Delay(300);
-  
-  /* Data Pin Contact ? Check Detect flag */
-  if (USBx->BCDR & USB_BCDR_DCDET)
-  {
-    HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION);
-  }   
-  /* Primary detection: checks if connected to Standard Downstream Port  
-  (without charging capability) */
-  USBx->BCDR &= ~(USB_BCDR_DCDEN);
-  USBx->BCDR |= (USB_BCDR_PDEN);
-  HAL_Delay(300);
-  
-  /* If Charger detect ? */
-  if (USBx->BCDR & USB_BCDR_PDET)
-  {
-    /* Start secondary detection to check connection to Charging Downstream 
-    Port or Dedicated Charging Port */
-    USBx->BCDR &= ~(USB_BCDR_PDEN);
-    USBx->BCDR |= (USB_BCDR_SDEN);
-    HAL_Delay(300);
-    
-    /* If CDP ? */
-    if (USBx->BCDR & USB_BCDR_SDET)
-    {
-      /* Dedicated Downstream Port DCP */
-      HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT);
-    }
-    else
-    {
-      /* Charging Downstream Port CDP */
-      HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT);
-    }
-  }
-  else
-  {
-    /* Standard Downstream Port */
-    HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT);
-  }
-  /* Battery Charging capability discovery finished 
-  Start Enumeration*/
-  HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DISCOVERY_COMPLETED);
-}
-
-/**
-  * @brief  Activate LPM feature.
-  * @param  hpcd: PCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd)
-{
-
-  USB_TypeDef *USBx = hpcd->Instance;
-  hpcd->lpm_active = ENABLE;
-  hpcd->LPM_State = LPM_L0;
-  
-  USBx->LPMCSR |= (USB_LPMCSR_LMPEN);
-  USBx->LPMCSR |= (USB_LPMCSR_LPMACK);
-    
- 
-  return HAL_OK;  
-}
-
-/**
-  * @brief  Deactivate LPM feature.
-  * @param  hpcd: PCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd)
-{
-  USB_TypeDef *USBx = hpcd->Instance; 
-  
-  hpcd->lpm_active = DISABLE;
-  
-  USBx->LPMCSR &= ~ (USB_LPMCSR_LMPEN);
-  USBx->LPMCSR &= ~ (USB_LPMCSR_LPMACK);
-  
-  return HAL_OK;  
-}
-
-/**
-  * @brief  Send LPM message to user layer callback.
-  * @param  hpcd: PCD handle
-  * @param  msg: LPM message
-  * @retval HAL status
-  */
-__weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg)
-{ 
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-  UNUSED(msg);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_PCDEx_LPM_Callback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  Send BatteryCharging message to user layer callback.
-  * @param  hpcd: PCD handle
-  * @param  msg: LPM message
-  * @retval HAL status
-  */
-__weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-  UNUSED(msg);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_PCDEx_BCD_Callback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* HAL_PCD_MODULE_ENABLED */
-#endif /* #if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr.c
deleted file mode 100755
index cb0c8859..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr.c
+++ /dev/null
@@ -1,708 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_pwr.c
-  * @author  MCD Application Team
-  * @brief   PWR HAL module driver.
-  *
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the Power Controller (PWR) peripheral:
-  *           + Initialization/de-initialization functions
-  *           + Peripheral Control functions 
-  *
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-#ifdef HAL_PWR_MODULE_ENABLED
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup PWR
-  * @{
-  */
-
-/** @addtogroup PWR_Private
-  * @{
-  */
-  
-/** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
-  * @{
-  */ 
-#define PVD_MODE_IT               ((uint32_t)0x00010000U)
-#define PVD_MODE_EVT              ((uint32_t)0x00020000U)
-#define PVD_RISING_EDGE           ((uint32_t)0x00000001U)
-#define PVD_FALLING_EDGE          ((uint32_t)0x00000002U)
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */  
-  
-
-/** @addtogroup PWR_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup PWR_Exported_Functions_Group1
-  * @brief      Initialization and de-initialization functions
-  *
-@verbatim
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Deinitializes the HAL PWR peripheral registers to their default reset values.
-  * @retval None
-  */
-void HAL_PWR_DeInit(void)
-{
-  __HAL_RCC_PWR_FORCE_RESET();
-  __HAL_RCC_PWR_RELEASE_RESET();
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup PWR_Exported_Functions_Group2
-  * @brief      Low Power modes configuration functions
-  *
-@verbatim
-
- ===============================================================================
-                 ##### Peripheral Control functions #####
- ===============================================================================
-     
-    *** Backup domain ***
-    =========================
-    [..]
-      After reset, the backup domain (RTC registers, RTC backup data
-      registers) is protected against possible unwanted
-      write accesses.
-      To enable access to the RTC Domain and RTC registers, proceed as follows:
-        (+) Enable the Power Controller (PWR) APB1 interface clock using the
-            __HAL_RCC_PWR_CLK_ENABLE() macro.
-        (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
-
-    *** PVD configuration ***
-    =========================
-    [..]
-      (+) The PVD is used to monitor the VDD power supply by comparing it to a
-          threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
-      (+) The PVD can use an external input analog voltage (PVD_IN) which is compared 
-      internally to VREFINT. The PVD_IN (PB7) has to be configured in Analog mode 
-      when PWR_PVDLevel_7 is selected (PLS[2:0] = 111).
-
-      (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
-          than the PVD threshold. This event is internally connected to the EXTI
-          line16 and can generate an interrupt if enabled. This is done through
-          __HAL_PWR_PVD_EXTI_ENABLE_IT() macro.
-      (+) The PVD is stopped in Standby mode.
-
-    *** WakeUp pin configuration ***
-    ================================
-    [..]
-      (+) WakeUp pin is used to wake up the system from Standby mode. This pin is
-          forced in input pull-down configuration and is active on rising edges.
-      (+) There are two WakeUp pins:
-          WakeUp Pin 1 on PA.00.
-          WakeUp Pin 2 on PC.13.
-          WakeUp Pin 3 on PE.06 .
-          
-
-    [..]
-    *** Main and Backup Regulators configuration ***
-    ================================================
-
-      (+) The main internal regulator can be configured to have a tradeoff between
-          performance and power consumption when the device does not operate at
-          the maximum frequency. This is done through __HAL_PWR_VOLTAGESCALING_CONFIG()
-          macro which configures the two VOS bits in PWR_CR register:
-        (++) PWR_REGULATOR_VOLTAGE_SCALE1 (VOS bits = 01), the regulator voltage output Scale 1 mode selected and
-             the System frequency can go up to 32 MHz.
-        (++) PWR_REGULATOR_VOLTAGE_SCALE2 (VOS bits = 10), the regulator voltage output Scale 2 mode selected and
-             the System frequency can go up to 16 MHz.
-        (++) PWR_REGULATOR_VOLTAGE_SCALE3 (VOS bits = 11), the regulator voltage output Scale 3 mode selected and
-             the System frequency can go up to 4.2 MHz.
-              
-        Refer to the datasheets for more details.
-
-    *** Low Power modes configuration ***
-    =====================================
-     [..]
-      The device features 5 low-power modes:
-      (+) Low power run mode: regulator in low power mode, limited clock frequency, 
-        limited number of peripherals running.
-      (+) Sleep mode: Cortex-M0+ core stopped, peripherals kept running.
-      (+) Low power sleep mode: Cortex-M0+ core stopped, limited clock frequency, 
-         limited number of peripherals running, regulator in low power mode.
-      (+) Stop mode: All clocks are stopped, regulator running, regulator in low power mode.
-      (+) Standby mode: VCORE domain powered off
-  
-   *** Low power run mode ***
-   =========================
-    [..]
-       To further reduce the consumption when the system is in Run mode, the regulator can be
-        configured in low power mode. In this mode, the system frequency should not exceed
-        MSI frequency range1.
-        In Low power run mode, all I/O pins keep the same state as in Run mode.
-  
-      (+) Entry:
-        (++) VCORE in range2
-        (++) Decrease the system frequency not to exceed the frequency of MSI frequency range1.
-        (++) The regulator is forced in low power mode using the HAL_PWREx_EnableLowPowerRunMode()
-             function.
-      (+) Exit:
-        (++) The regulator is forced in Main regulator mode using the HAL_PWREx_DisableLowPowerRunMode()
-              function.
-        (++) Increase the system frequency if needed.
-  
-   *** Sleep mode ***
-   ==================
-    [..]
-      (+) Entry:
-          The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx)
-              functions with
-          (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
-          (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
-     
-      (+) Exit:
-        (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
-              controller (NVIC) can wake up the device from Sleep mode. If the WFE instruction was used to enter sleep mode,
-              the MCU exits Sleep mode as soon as an event occurs. 
-
-   *** Low power sleep mode ***
-   ============================
-    [..]
-      (+) Entry:
-          The Low power sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFx)
-              functions with
-          (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
-          (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
-       (+) The Flash memory can be switched off by using the control bits (SLEEP_PD in the FLASH_ACR register. 
-             This reduces power consumption but increases the wake-up time.
-         
-      (+) Exit:
-        (++) If the WFI instruction was used to enter Low power sleep mode, any peripheral interrupt
-              acknowledged by the nested vectored interrupt controller (NVIC) can wake up the device
-              from Low power sleep mode. If the WFE instruction was used to enter Low power sleep mode,
-              the MCU exits Sleep mode as soon as an event occurs. 
-                
-   *** Stop mode ***
-   =================
-    [..]
-      The Stop mode is based on the Cortex-M0+ deepsleep mode combined with peripheral
-      clock gating. The voltage regulator can be configured either in normal or low-power mode.
-      In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the MSI, the HSI and
-      the HSE RC oscillators are disabled. Internal SRAM and register contents are preserved.
-      To get the lowest consumption in Stop mode, the internal Flash memory also enters low
-      power mode. When the Flash memory is in power-down mode, an additional startup delay is
-      incurred when waking up from Stop mode.
-      To minimize the consumption In Stop mode, VREFINT, the BOR, PVD, and temperature
-      sensor can be switched off before entering Stop mode. They can be switched on again by
-      software after exiting Stop mode using the ULP bit in the PWR_CR register.
-      In Stop mode, all I/O pins keep the same state as in Run mode.
-
-      (+) Entry:
-           The Stop mode is entered using the HAL_PWR_EnterSTOPMode
-             function with:
-          (++) Main regulator ON.
-          (++) Low Power regulator ON.
-          (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
-          (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
-      (+) Exit:
-        (++) By issuing an interrupt or a wakeup event, the MSI or HSI16 RC
-             oscillator is selected as system clock depending the bit STOPWUCK in the RCC_CFGR
-             register
-
-   *** Standby mode ***
-   ====================
-     [..]
-      The Standby mode allows to achieve the lowest power consumption. It is based on the
-      Cortex-M0+ deepsleep mode, with the voltage regulator disabled. The VCORE domain is
-      consequently powered off. The PLL, the MSI, the HSI oscillator and the HSE oscillator are
-      also switched off. SRAM and register contents are lost except for the RTC registers, RTC
-      backup registers and Standby circuitry.
-      
-      To minimize the consumption In Standby mode, VREFINT, the BOR, PVD, and temperature
-       sensor can be switched off before entering the Standby mode. They can be switched 
-       on again by software after exiting the Standby mode.
-       function.
-      
-      (+) Entry:
-        (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
-      (+) Exit:
-        (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
-             tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
-
-   *** Auto-wakeup (AWU) from low-power mode ***
-   =============================================
-    [..]
-      The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC 
-      Wakeup event, a tamper event, a time-stamp event, or a comparator event, 
-      without depending on an external interrupt (Auto-wakeup mode).
-
-    (+) RTC auto-wakeup (AWU) from the Stop mode
-        (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to:
-             (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt 
-                   or Event modes) using the EXTI_Init() function.
-             (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function
-             (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm() 
-                   and RTC_AlarmCmd() functions.
-        (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it 
-             is necessary to:
-             (+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt 
-                   or Event modes) using the EXTI_Init() function.
-             (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig() 
-                   function.
-             (+++) Configure the RTC to detect the tamper or time stamp event using the
-                   RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
-                   functions.
-        (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to:
-             (+++) Configure the EXTI Line 20 to be sensitive to rising edges (Interrupt 
-                   or Event modes) using the EXTI_Init() function.
-             (+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function.
-             (+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(), 
-                   RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions.
-
-    (+) RTC auto-wakeup (AWU) from the Standby mode
-        (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to:
-             (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function.
-             (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm() 
-                   and RTC_AlarmCmd() functions.
-        (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it 
-             is necessary to:
-             (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig() 
-                   function.
-             (+++) Configure the RTC to detect the tamper or time stamp event using the
-                   RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
-                   functions.
-        (++) To wake up from the Standby mode with an RTC WakeUp event, it is necessary to:
-             (+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function
-             (+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(), 
-                   RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions.
-
-    (+) Comparator auto-wakeup (AWU) from the Stop mode
-        (++) To wake up from the Stop mode with an comparator 1 or comparator 2 wakeup
-             event, it is necessary to:
-             (+++) Configure the EXTI Line 21 for comparator 1 or EXTI Line 22 for comparator 2 
-                   to be sensitive to to the selected edges (falling, rising or falling 
-                   and rising) (Interrupt or Event modes) using the EXTI_Init() function.
-             (+++) Configure the comparator to generate the event.      
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Enables access to the backup domain (RTC registers, RTC
-  *         backup data registers ).
-  * @note   If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
-  *         Backup Domain Access should be kept enabled.
-  * @retval None
-  */
-void HAL_PWR_EnableBkUpAccess(void)
-{
-  /* Enable access to RTC and backup registers */
-  SET_BIT(PWR->CR, PWR_CR_DBP);
-}
-
-/**
-  * @brief  Disables access to the backup domain 
-  * @note   Applies to RTC registers, RTC backup data registers.
-  * @note   If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
-  *         Backup Domain Access should be kept enabled.
-  * @retval None
-  */
-void HAL_PWR_DisableBkUpAccess(void)
-{
-  /* Disable access to RTC and backup registers */
-  CLEAR_BIT(PWR->CR, PWR_CR_DBP);
-}
-
-/**
-  * @brief  Configures the voltage threshold detected by the Power Voltage Detector(PVD).
-  * @param  sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration
-  *         information for the PVD.
-  * @note   Refer to the electrical characteristics of your device datasheet for
-  *         more details about the voltage threshold corresponding to each
-  *         detection level.
-  * @retval None
-  */
-void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
-{
-  /* Check the parameters */
-  assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
-  assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
-
-  /* Set PLS[7:5] bits according to PVDLevel value */
-  MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
-  
-  /* Clear any previous config. Keep it clear if no event or IT mode is selected */
-  __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
-  __HAL_PWR_PVD_EXTI_DISABLE_IT();
-  __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); 
-  __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
-
-  /* Configure interrupt mode */
-  if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
-  {
-    __HAL_PWR_PVD_EXTI_ENABLE_IT();
-  }
-  
-  /* Configure event mode */
-  if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
-  {
-    __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
-  }
-  
-  /* Configure the edge */
-  if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
-  {
-    __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
-  }
-  
-  if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
-  {
-    __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
-  }
-}
-
-/**
-  * @brief Enables the Power Voltage Detector(PVD).
-  * @retval None
-  */
-void HAL_PWR_EnablePVD(void)
-{
-  /* Enable the power voltage detector */
-  SET_BIT(PWR->CR, PWR_CR_PVDE);
-}
-
-/**
-  * @brief Disables the Power Voltage Detector(PVD).
-  * @retval None
-  */
-void HAL_PWR_DisablePVD(void)
-{
-  /* Disable the power voltage detector */
-  CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
-}
-
-/**
-  * @brief Enables the WakeUp PINx functionality.
-  * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable.
-  *         This parameter can be one of the following values:
-  *           @arg PWR_WAKEUP_PIN1
-  *           @arg PWR_WAKEUP_PIN2
-  *           @arg PWR_WAKEUP_PIN3 for stm32l07xxx and stm32l08xxx devices only.
-  * @retval None
-  */
-void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
-{
-  /* Check the parameter */
-  assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
-  /* Enable the EWUPx pin */
-  SET_BIT(PWR->CSR, WakeUpPinx);
-}
-
-/**
-  * @brief Disables the WakeUp PINx functionality.
-  * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
-  *         This parameter can be one of the following values:
-  *           @arg PWR_WAKEUP_PIN1
-  *           @arg PWR_WAKEUP_PIN2  
-  *           @arg PWR_WAKEUP_PIN3  for stm32l07xxx and stm32l08xxx devices only.
-  * @retval None
-  */
-void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
-{
-  /* Check the parameter */
-  assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
-  /* Disable the EWUPx pin */
-  CLEAR_BIT(PWR->CSR, WakeUpPinx);
-}
-
-/**
-  * @brief Enters Sleep mode.
-  * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
-  * @param Regulator: Specifies the regulator state in SLEEP mode.
-  *          This parameter can be one of the following values:
-  *            @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
-  *            @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
-  * @param SLEEPEntry: Specifies if SLEEP mode is entered with WFI or WFE instruction.
-  *           When WFI entry is used, tick interrupt have to be disabled if not desired as 
-  *           the interrupt wake up source.
-  *           This parameter can be one of the following values:
-  *            @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
-  *            @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
-  * @retval None
-  */
-void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
-{
-   uint32_t tmpreg = 0U;
-  /* Check the parameters */
-  assert_param(IS_PWR_REGULATOR(Regulator));
-  assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
-
-  /* Select the regulator state in Sleep mode ---------------------------------*/
-  tmpreg = PWR->CR;
-
-  /* Clear PDDS and LPDS bits */
-  CLEAR_BIT(tmpreg, (PWR_CR_PDDS | PWR_CR_LPSDSR));
-
- /* Set LPSDSR bit according to PWR_Regulator value */
-  SET_BIT(tmpreg, Regulator);
-
-  /* Store the new value */
-  PWR->CR = tmpreg;
-  
-  /* Clear SLEEPDEEP bit of Cortex System Control Register */
-  CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
-
-  /* Select SLEEP mode entry -------------------------------------------------*/
-  if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
-  {
-    /* Request Wait For Interrupt */
-    __WFI();
-  }
-  else
-  {
-    /* Request Wait For Event */
-    __SEV();
-    __WFE();
-    __WFE();
-  }
-}
-
-/**
-  * @brief Enters Stop mode. 
-  * @note In Stop mode, all I/O pins keep the same state as in Run mode.
-  * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
-  *        MSI or HSI16 RCoscillator is selected as system clock depending 
-  *        the bit STOPWUCK in the RCC_CFGR register.
-  * @note When the voltage regulator operates in low power mode, an additional
-  *         startup delay is incurred when waking up from Stop mode. 
-  *         By keeping the internal regulator ON during Stop mode, the consumption
-  *         is higher although the startup time is reduced.
-  * @note Before entering in this function, it is important to ensure that the WUF
-  *       wakeup flag is cleared. To perform this action, it is possible to call the
-  *       following macro : __HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU)
-  *
-  * @param Regulator: Specifies the regulator state in Stop mode.
-  *          This parameter can be one of the following values:
-  *            @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
-  *            @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
-  * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
-  *          This parameter can be one of the following values:
-  *            @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
-  *            @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction   
-  * @retval None
-  */
-void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_PWR_REGULATOR(Regulator));
-  assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
-
-  /* Select the regulator state in Stop mode ---------------------------------*/
-  tmpreg = PWR->CR;
-  
-  /* Clear PDDS and LPDS bits */
-  CLEAR_BIT(tmpreg, (PWR_CR_PDDS | PWR_CR_LPSDSR));
-
- /* Set LPSDSR bit according to PWR_Regulator value */
-  SET_BIT(tmpreg, Regulator);
-
-  /* Store the new value */
-  PWR->CR = tmpreg;
-
-  /* Set SLEEPDEEP bit of Cortex System Control Register */
-  SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
-
-  /* Select Stop mode entry --------------------------------------------------*/
-  if(STOPEntry == PWR_STOPENTRY_WFI)
-  {
-    /* Request Wait For Interrupt */
-    __WFI();
-  }
-  else
-  {
-    /* Request Wait For Event */
-    __SEV();
-    __WFE();
-    __WFE();
-  }
- 
-  /* Reset SLEEPDEEP bit of Cortex System Control Register */
-  CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
-
-}
-
-/**
-  * @brief Enters Standby mode.
-  * @note In Standby mode, all I/O pins are high impedance except for:
-  *          - Reset pad (still available) 
-  *          - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
-  *            Alarm out, or RTC clock calibration out.
-  *          - RTC_AF2 pin (PC13) if configured for tamper.
-  *          - WKUP pin 1 (PA00) if enabled.
-  *          - WKUP pin 2 (PC13) if enabled.
-  *          - WKUP pin 3 (PE06) if enabled, for stm32l07xxx and stm32l08xxx devices only.
-  *          - WKUP pin 3 (PA02) if enabled, for stm32l031xx devices only.
-  * @retval None
-  */
-void HAL_PWR_EnterSTANDBYMode(void)
-{
-  /* Select Standby mode */
-  SET_BIT(PWR->CR, PWR_CR_PDDS);
-
-  /* Set SLEEPDEEP bit of Cortex System Control Register */
-  SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
-
-  /* This option is used to ensure that store operations are completed */
-#if defined ( __CC_ARM)
-  __force_stores();
-#endif
-  /* Request Wait For Interrupt */
-  __WFI();
-}
-
-/**
-  * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode. 
-  * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor 
-  *       re-enters SLEEP mode when an interruption handling is over.
-  *       Setting this bit is useful when the processor is expected to run only on
-  *       interruptions handling.         
-  * @retval None
-  */
-void HAL_PWR_EnableSleepOnExit(void)
-{
-  /* Set SLEEPONEXIT bit of Cortex System Control Register */
-  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
-}
-
-
-/**
-  * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode. 
-  * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor 
-  *       re-enters SLEEP mode when an interruption handling is over.          
-  * @retval None
-  */
-void HAL_PWR_DisableSleepOnExit(void)
-{
-  /* Clear SLEEPONEXIT bit of Cortex System Control Register */
-  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
-}
-
-
-/**
-  * @brief Enables CORTEX M0+ SEVONPEND bit. 
-  * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes 
-  *       WFE to wake up when an interrupt moves from inactive to pended.
-  * @retval None
-  */
-void HAL_PWR_EnableSEVOnPend(void)
-{
-  /* Set SEVONPEND bit of Cortex System Control Register */
-  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
-}
-
-
-/**
-  * @brief Disables CORTEX M0+ SEVONPEND bit. 
-  * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes 
-  *       WFE to wake up when an interrupt moves from inactive to pended.         
-  * @retval None
-  */
-void HAL_PWR_DisableSEVOnPend(void)
-{
-  /* Clear SEVONPEND bit of Cortex System Control Register */
-  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
-}
-
-/**
-  * @brief This function handles the PWR PVD interrupt request.
-  * @note This API should be called under the PVD_IRQHandler().
-  * @retval None
-  */
-void HAL_PWR_PVD_IRQHandler(void)
-{
-  /* Check PWR exti flag */
-  if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
-  {
-    /* PWR PVD interrupt user callback */
-    HAL_PWR_PVDCallback();
-
-    /* Clear PWR Exti pending bit */
-    __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
-  }
-}
-
-/**
-  * @brief  PWR PVD interrupt callback
-  * @retval None
-  */
-__weak void HAL_PWR_PVDCallback(void)
-{
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PWR_PVDCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_PWR_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr_ex.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr_ex.c
deleted file mode 100755
index 76991ca9..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr_ex.c
+++ /dev/null
@@ -1,200 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_pwr_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended PWR HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the Power Controller (PWR) peripheral:
-  *           + Extended Initialization and de-initialization functions
-  *           + Extended Peripheral Control functions
-  *         
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-#ifdef HAL_PWR_MODULE_ENABLED
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup PWREx 
-  * @{
-  */
-
-/** @addtogroup PWREx_Private
-  * @{
-  */
-
-/** @defgroup PWR_Extended_TimeOut_Value PWREx Flag Setting Time Out Value
-  * @{
-  */ 
-#define PWR_FLAG_SETTING_DELAY_US 50U
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-/** @addtogroup PWREx_Exported_Functions
-  * @brief      Low Power modes configuration functions 
-  *
-@verbatim
-
- ===============================================================================
-                 ##### Peripheral extended features functions #####
- ===============================================================================
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Return Voltage Scaling Range.   
-  * @retval VOS bit field (PWR_REGULATOR_VOLTAGE_SCALE1, PWR_REGULATOR_VOLTAGE_SCALE2 or PWR_REGULATOR_VOLTAGE_SCALE3)
-  */  
-uint32_t HAL_PWREx_GetVoltageRange(void)
-{
-  return  (PWR->CR & PWR_CR_VOS);
-}
-
-
-/**
-  * @brief  Enables the Fast WakeUp from Ultra Low Power mode.
-  * @note This bit works in conjunction with ULP bit. 
-  *        Means, when ULP = 1 and FWU = 1 :VREFINT startup time is ignored when 
-  *        exiting from low power mode.
-  * @retval None
-  */
-void HAL_PWREx_EnableFastWakeUp(void)
-{
-  /* Enable the fast wake up */
-  SET_BIT(PWR->CR, PWR_CR_FWU);
-}
-
-/**
-  * @brief  Disables the Fast WakeUp from Ultra Low Power mode.
-  * @retval None
-  */
-void HAL_PWREx_DisableFastWakeUp(void)
-{
-  /* Disable the fast wake up */
-  CLEAR_BIT(PWR->CR, PWR_CR_FWU);
-}
-
-/**
-  * @brief  Enables the Ultra Low Power mode
-  * @retval None
-  */
-void HAL_PWREx_EnableUltraLowPower(void)
-{
-  /* Enable the Ultra Low Power mode */
-  SET_BIT(PWR->CR, PWR_CR_ULP);
-}
-
-/**
-  * @brief  Disables the Ultra Low Power mode
-  * @retval None
-  */
-void HAL_PWREx_DisableUltraLowPower(void)
-{
-  /* Disable the Ultra Low Power mode */
-  CLEAR_BIT(PWR->CR, PWR_CR_ULP);
-}
-
-/**
-  * @brief  Enable the Low Power Run mode.
-  * @note   Low power run mode can only be entered when VCORE is in range 2.
-  *         In addition, the dynamic voltage scaling must not be used when Low
-  *         power run mode is selected. Only Stop and Sleep modes with regulator
-  *         configured in Low power mode is allowed when Low power run mode is 
-  *         selected.
-  * @note   The frequency of the system clock must be decreased to not exceed the
-  *         frequency of RCC_MSIRANGE_1.
-  * @note   In Low power run mode, all I/O pins keep the same state as in Run mode.
-  * @retval None
-  */
-void HAL_PWREx_EnableLowPowerRunMode(void)
-{
-  /* Enters the Low Power Run mode */
-  SET_BIT(PWR->CR, PWR_CR_LPSDSR);
-  SET_BIT(PWR->CR, PWR_CR_LPRUN);
-}
-
-/**
-  * @brief  Disable the Low Power Run mode.
-  * @note  Before HAL_PWREx_DisableLowPowerRunMode() completion, the function checks that 
-  *        REGLPF has been properly reset (otherwise, HAL_PWREx_DisableLowPowerRunMode 
-  *        returns HAL_TIMEOUT status). The system clock frequency can then be
-  *        increased above 2 MHz.   
-  * @retval HAL_StatusTypeDef
-  */
-HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void)
-{
-  uint32_t wait_loop_index = 0U;
-  
-  /* Exit the Low Power Run mode */
-  CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);
-  CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR);
-  
-  /* Wait until REGLPF is reset */
-  wait_loop_index = (PWR_FLAG_SETTING_DELAY_US * (SystemCoreClock / 1000000U));
-
-  while ((wait_loop_index != 0U) && (HAL_IS_BIT_SET(PWR->CSR, PWR_CSR_REGLPF)))
-  {
-    wait_loop_index--;
-  }
-
-  if (HAL_IS_BIT_SET(PWR->CSR, PWR_CSR_REGLPF))
-  {
-    return HAL_TIMEOUT;
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c
deleted file mode 100755
index d846f73c..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c
+++ /dev/null
@@ -1,1488 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_rcc.c
-  * @author  MCD Application Team
-  * @brief   RCC HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Reset and Clock Control (RCC) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + Peripheral Control functions
-  *       
-  @verbatim                
-  ==============================================================================
-                      ##### RCC specific features #####
-  ==============================================================================
-    [..]  
-      After reset the device is running from multispeed internal oscillator clock 
-      (MSI 2.097MHz) with Flash 0 wait state and Flash prefetch buffer is disabled, 
-      and all peripherals are off except internal SRAM, Flash and JTAG.
-      (+) There is no prescaler on High speed (AHB) and Low speed (APB) buses;
-          all peripherals mapped on these buses are running at MSI speed.
-      (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
-      (+) All GPIOs are in input floating state, except the JTAG pins which
-          are assigned to be used for debug purpose.
-    [..] Once the device started from reset, the user application has to:
-      (+) Configure the clock source to be used to drive the System clock
-          (if the application needs higher frequency/performance)
-      (+) Configure the System clock frequency and Flash settings  
-      (+) Configure the AHB and APB buses prescalers
-      (+) Enable the clock for the peripheral(s) to be used
-      (+) Configure the clock source(s) for peripherals whose clocks are not
-          derived from the System clock (I2S, RTC, ADC, USB OTG FS/SDIO/RNG) 
-          (*) SDIO only for STM32L0xxxD devices
-
-                      ##### RCC Limitations #####
-  ==============================================================================
-    [..]  
-      A delay between an RCC peripheral clock enable and the effective peripheral 
-      enabling should be taken into account in order to manage the peripheral read/write 
-      from/to registers.
-      (+) This delay depends on the peripheral mapping.
-        (++) AHB & APB peripherals, 1 dummy read is necessary
-
-    [..]  
-      Workarounds:
-      (#) For AHB & APB peripherals, a dummy read to the peripheral register has been
-          inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro.
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-*/
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup RCC RCC
-* @brief RCC HAL module driver
-  * @{
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup RCC_Private_Constants RCC Private Constants
- * @{
- */
-/* Bits position in  in the CFGR register */
-#define RCC_CFGR_PLLMUL_BITNUMBER         RCC_CFGR_PLLMUL_Pos
-#define RCC_CFGR_PLLDIV_BITNUMBER         RCC_CFGR_PLLDIV_Pos
-#define RCC_CFGR_HPRE_BITNUMBER           RCC_CFGR_HPRE_Pos
-#define RCC_CFGR_PPRE1_BITNUMBER          RCC_CFGR_PPRE1_Pos
-#define RCC_CFGR_PPRE2_BITNUMBER          RCC_CFGR_PPRE2_Pos
-/* Bits position in  in the ICSCR register */
-#define RCC_ICSCR_MSIRANGE_BITNUMBER      RCC_ICSCR_MSIRANGE_Pos
-#define RCC_ICSCR_MSITRIM_BITNUMBER       RCC_ICSCR_MSITRIM_Pos
-/**
-  * @}
-  */
-/* Private macro -------------------------------------------------------------*/
-/** @defgroup RCC_Private_Macros RCC Private Macros
-  * @{
-  */
-
-#define MCO1_CLK_ENABLE()     __HAL_RCC_GPIOA_CLK_ENABLE()
-#define MCO1_GPIO_PORT        GPIOA
-#define MCO1_PIN              GPIO_PIN_8
-
-#define MCO2_CLK_ENABLE()     __HAL_RCC_GPIOA_CLK_ENABLE()
-#define MCO2_GPIO_PORT        GPIOA
-#define MCO2_PIN              GPIO_PIN_9
-
-#if  defined(STM32L031xx) || defined(STM32L041xx) || defined(STM32L073xx) || defined(STM32L083xx) \
-  || defined(STM32L072xx) || defined(STM32L082xx) || defined(STM32L071xx) || defined(STM32L081xx) 
-#define MCO3_CLK_ENABLE()     __HAL_RCC_GPIOB_CLK_ENABLE()
-#define MCO3_GPIO_PORT        GPIOB
-#define MCO3_PIN              GPIO_PIN_13
-#endif
-
-/**
-  * @}
-  */
-
-/* Private variables ---------------------------------------------------------*/
-/** @defgroup RCC_Private_Variables RCC Private Variables
-  * @{
-  */
-extern const uint8_t PLLMulTable[];          /* Defined in CMSIS (system_stm32l0xx.c)*/
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup RCC_Private_Functions RCC Private Functions
-  * @{
-  */
-static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t MSIrange);
-/**
-  * @}
-  */
-
-/* Exported functions ---------------------------------------------------------*/
-
-/** @defgroup RCC_Exported_Functions RCC Exported Functions
-  * @{
-  */
-
-/** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions 
-  *  @brief    Initialization and Configuration functions 
-  *
-  @verbatim    
-  ===============================================================================
-           ##### Initialization and de-initialization functions #####
-  ===============================================================================
-    [..]
-      This section provides functions allowing to configure the internal/external oscillators
-      (MSI, HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System buses clocks (SYSCLK, AHB, APB1 
-      and APB2).
-
-    [..] Internal/external clock and PLL configuration
-      (#) MSI (Multispeed internal), Seven frequency ranges are available: 65.536 kHz, 
-          131.072 kHz, 262.144 kHz, 524.288 kHz, 1.048 MHz, 2.097 MHz (default value) and 4.194 MHz.
-
-      (#) HSI (high-speed internal), 16 MHz factory-trimmed RC used directly or through
-          the PLL as System clock source.
-      (#) LSI (low-speed internal), ~37 KHz low consumption RC used as IWDG and/or RTC
-          clock source.
-
-      (#) HSE (high-speed external), 1 to 24 MHz crystal oscillator used directly or
-          through the PLL as System clock source. Can be used also as RTC clock source.
-
-      (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.   
-
-      (#) PLL (clocked by HSI or HSE), featuring different output clocks:
-        (++) The first output is used to generate the high speed system clock (up to 32 MHz)
-        (++) The second output is used to generate the clock for the USB OTG FS (48 MHz)
-
-      (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE()
-          and if a HSE clock failure occurs(HSE used directly or through PLL as System 
-          clock source), the System clocks automatically switched to MSI and an interrupt
-          is generated if enabled. The interrupt is linked to the Cortex-M0+ NMI 
-          (Non-Maskable Interrupt) exception vector.   
-
-      (#) MCO1/MCO2/MCO3 (microcontroller clock output), used to output SYSCLK, HSI, LSI, MSI, LSE, 
-          HSE, HSI48 or PLL clock (through a configurable prescaler) on PA8/PA9/PB13 pins.
-
-    [..] System, AHB and APB buses clocks configuration
-      (#) Several clock sources can be used to drive the System clock (SYSCLK): MSI, HSI,
-          HSE and PLL.
-          The AHB clock (HCLK) is derived from System clock through configurable
-          prescaler and used to clock the CPU, memory and peripherals mapped
-          on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived
-          from AHB clock through configurable prescalers and used to clock
-          the peripherals mapped on these buses. You can use
-          "@ref HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
-
-      -@- All the peripheral clocks are derived from the System clock (SYSCLK) except:
-          (+@) RTC: RTC clock can be derived either from the LSI, LSE or HSE clock
-              divided by 2 to 16. You have to use @ref __HAL_RCC_RTC_CONFIG() and @ref __HAL_RCC_RTC_ENABLE()
-              macros to configure this clock. 
-          (+@) LCD: LCD clock can be derived either from the LSI, LSE or HSE clock
-              divided by 2 to 16. You have to use @ref __HAL_RCC_LCD_CONFIG()
-              macros to configure this clock. 
-          (+@) USB FS and RNG: USB FS require a frequency equal to 48 MHz to work correctly. 
-               This clock is derived of the main PLL through PLL Multiplier or HSI48 RC oscillator.
-
-          (+@) IWDG clock which is always the LSI clock.
-
-      (#) The maximum frequency of the SYSCLK and HCLK is 32 MHz, PCLK2 32 MHz 
-          and PCLK1 32 MHz. Depending on the device voltage range, the maximum 
-          frequency should be adapted accordingly.
-  @endverbatim
-  * @{
-  */
-  
-/*
-  Additional consideration on the HCLK based on Latency settings:
-  +----------------------------------------------------------------------+     
-  | Latency       |                HCLK clock frequency (MHz)            |
-  |               |------------------------------------------------------|     
-  |               | voltage range 1  | voltage range 2 | voltage range 3 |
-  |               |      1.8 V       |     1.5 V       |      1.2 V      |
-  |---------------|------------------|-----------------|-----------------|              
-  |0WS(1CPU cycle)| 0 < HCLK <= 16   | 0 < HCLK <= 8   | 0 < HCLK <= 2   |
-  |---------------|------------------|-----------------|-----------------| 
-  |1WS(2CPU cycle)| 16 < HCLK <= 32  | 8 < HCLK <= 16  | 2 < HCLK <= 4   | 
-  +----------------------------------------------------------------------+     
-
-  The following table gives the different clock source frequencies depending on the product
-  voltage range:
-  +------------------------------------------------------------------------------------------+     
-  | Product voltage |                    Clock frequency                                     |
-  |                 |------------------|-----------------------------|-----------------------|              
-  |      range      |   MSI   |   HSI  |              HSE            |          PLL          |
-  |-----------------|---------|--------|-----------------------------|-----------------------|              
-  | Range 1 (1.8 V) | 4.2 MHz | 16 MHz | HSE 32 MHz (external clock) |         32 MHz        |
-  |                 |         |        |      or 24 MHz (crystal)    | (PLLVCO max = 96 MHz) |
-  |-----------------|---------|--------|-----------------------------|-----------------------|              
-  | Range 2 (1.5 V) | 4.2 MHz | 16 MHz |         16 MHz              |         16 MHz        |
-  |                 |         |        |                             | (PLLVCO max = 48 MHz) |
-  |-----------------|---------|--------|-----------------------------|-----------------------|              
-  | Range 3 (1.2 V) | 4.2 MHz |   NA   |         8 MHz               |           4 MHz       |
-  |                 |         |        |                             | (PLLVCO max = 24 MHz) |
-  +------------------------------------------------------------------------------------------+     
-  */
-
-/**
-  * @brief  Resets the RCC clock configuration to the default reset state.
-  * @note   The default reset state of the clock configuration is given below:
-  *            - MSI ON and used as system clock source
-  *            - HSI, HSE and PLL  OFF
-  *            - AHB, APB1 and APB2 prescaler set to 1.
-  *            - CSS and MCO1/MCO2/MCO3 OFF
-  *            - All interrupts disabled
-  * @note   This function does not modify the configuration of the
-  *            - Peripheral clocks
-  *            - LSI, LSE and RTC clocks
-  *            - HSI48 clock
-  * @retval None
-  */
-void HAL_RCC_DeInit(void)
-{
-  __IO uint32_t tmpreg;
-
-  /* Set MSION bit */
-  SET_BIT(RCC->CR, RCC_CR_MSION);
-  
-  /* Switch SYSCLK to MSI*/
-  CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW);
-
-  /* Reset HSE, HSI, CSS, PLL */
-#if defined(RCC_CR_CSSHSEON) && defined(RCC_CR_HSIOUTEN)
-  CLEAR_BIT(RCC->CR, RCC_CR_HSION| RCC_CR_HSIKERON| RCC_CR_HSIDIVEN | RCC_CR_HSIOUTEN | \
-                     RCC_CR_HSEON | RCC_CR_CSSHSEON | RCC_CR_PLLON); 
-#elif !defined(RCC_CR_CSSHSEON) && defined(RCC_CR_HSIOUTEN)
-  CLEAR_BIT(RCC->CR, RCC_CR_HSION| RCC_CR_HSIKERON| RCC_CR_HSIDIVEN | RCC_CR_HSIOUTEN | \
-                     RCC_CR_HSEON | RCC_CR_PLLON);    
-#elif defined(RCC_CR_CSSHSEON) && !defined(RCC_CR_HSIOUTEN)
-  CLEAR_BIT(RCC->CR, RCC_CR_HSION| RCC_CR_HSIKERON| RCC_CR_HSIDIVEN | \
-                     RCC_CR_HSEON | RCC_CR_CSSHSEON | RCC_CR_PLLON); 
-#endif
-
-  /* Delay after an RCC peripheral clock */ \
-  tmpreg = READ_BIT(RCC->CR, RCC_CR_HSEON);      \
-  UNUSED(tmpreg); 
-
-  /* Reset HSEBYP bit */
-  CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
-  
-  /* Reset CFGR register */
-  CLEAR_REG(RCC->CFGR);
-  
-  /* Set MSIClockRange & MSITRIM[4:0] bits to the reset value */
-  MODIFY_REG(RCC->ICSCR, (RCC_ICSCR_MSIRANGE | RCC_ICSCR_MSITRIM), (((uint32_t)0 << RCC_ICSCR_MSITRIM_BITNUMBER) | RCC_ICSCR_MSIRANGE_5));
-  
-  /* Set HSITRIM bits to the reset value */
-  MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, ((uint32_t)0x10 << 8));
-  
-  /* Disable all interrupts */
-  CLEAR_REG(RCC->CIER); 
-
-  /* Update the SystemCoreClock global variable */
-  SystemCoreClock = MSI_VALUE;
-}
-
-/**
-  * @brief  Initializes the RCC Oscillators according to the specified parameters in the
-  *         RCC_OscInitTypeDef.
-  * @param  RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
-  *         contains the configuration information for the RCC Oscillators.
-  * @note   The PLL is not disabled when used as system clock.
-  * @note   Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not
-  *         supported by this macro. User should request a transition to LSE Off
-  *         first and then LSE On or LSE Bypass.
-  * @note   Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not
-  *         supported by this macro. User should request a transition to HSE Off
-  *         first and then HSE On or HSE Bypass.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
-{
-   uint32_t tickstart = 0U;
-  
-  /* Check the parameters */
-  assert_param(RCC_OscInitStruct != NULL);
-  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
-
-  /*------------------------------- HSE Configuration ------------------------*/ 
-  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
-
-    /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
-    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 
-       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
-    {
-      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
-      {
-        return HAL_ERROR;
-      }
-    }
-    else
-    {
-      /* Set the new HSE configuration ---------------------------------------*/
-      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
-      
-
-       /* Check the HSE State */
-      if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
-      {
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-        
-        /* Wait till HSE is ready */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-      else
-      {
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-        
-        /* Wait till HSE is disabled */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
-        {
-           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-    }
-  }
-  /*----------------------------- HSI Configuration --------------------------*/ 
-  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
-    assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
-    
-    /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ 
-    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 
-       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)))
-    {
-      /* When HSI is used as system clock it will not disabled */
-      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
-      {
-        return HAL_ERROR;
-      }
-      /* Otherwise, just the calibration is allowed */
-      else
-      {
-        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
-        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
-      }
-    }
-    else
-    {
-      /* Check the HSI State */
-      if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
-      {
-        /* Enable the Internal High Speed oscillator (HSI or HSIdiv4) */
-        __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
-        
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-        
-        /* Wait till HSI is ready */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-                
-        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
-        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
-      }
-      else
-      {
-        /* Disable the Internal High Speed oscillator (HSI). */
-        __HAL_RCC_HSI_DISABLE();
-        
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-        
-        /* Wait till HSI is disabled */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-    }
-  }
-  /*----------------------------- MSI Configuration --------------------------*/ 
-  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI)
-  {
-    /* When the MSI is used as system clock it will not be disabled */
-    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_MSI) )
-    {
-      if((__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != RESET) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF))
-      {
-        return HAL_ERROR;
-      }
-      /* Otherwise, just the calibration and MSI range change are allowed */
-      else
-      {
-       /* Check MSICalibrationValue and MSIClockRange input parameters */
-        assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue));
-        assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange));
-
-        /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
-           must be correctly programmed according to the frequency of the CPU clock
-           (HCLK) and the supply voltage of the device. */
-        if(RCC_OscInitStruct->MSIClockRange > __HAL_RCC_GET_MSI_RANGE())
-        {
-          /* First increase number of wait states update if necessary */
-          if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK)
-          {
-            return HAL_ERROR;
-          }
-
-          /* Selects the Multiple Speed oscillator (MSI) clock range .*/
-          __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
-          /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
-          __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
-        }
-        else
-        {
-          /* Else, keep current flash latency while decreasing applies */
-          /* Selects the Multiple Speed oscillator (MSI) clock range .*/
-          __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
-          /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
-          __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
-
-          /* Decrease number of wait states update if necessary */
-          if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK)
-          {
-            return HAL_ERROR;
-          }          
-        }
-
-        /* Update the SystemCoreClock global variable */
-        SystemCoreClock =  (32768U * (1U << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_BITNUMBER) + 1U))) 
-                           >> AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_BITNUMBER)];
-
-        /* Configure the source of time base considering new system clocks settings*/
-        HAL_InitTick (TICK_INT_PRIORITY);
-      }
-    }
-    else
-    {
-      /* Check MSI State */
-      assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState));
-
-      /* Check the MSI State */
-      if(RCC_OscInitStruct->MSIState != RCC_MSI_OFF)
-      {
-        /* Enable the Multi Speed oscillator (MSI). */
-        __HAL_RCC_MSI_ENABLE();
-
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-
-        /* Wait till MSI is ready */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == RESET)
-        {
-          if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-        /* Check MSICalibrationValue and MSIClockRange input parameters */
-        assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue));
-        assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange));
-
-        /* Selects the Multiple Speed oscillator (MSI) clock range .*/
-        __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
-         /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
-        __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
-
-      }
-      else
-      {
-        /* Disable the Multi Speed oscillator (MSI). */
-        __HAL_RCC_MSI_DISABLE();
-
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-
-        /* Wait till MSI is ready */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != RESET)
-        {
-          if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-    }
-  }  
-  /*------------------------------ LSI Configuration -------------------------*/ 
-  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
-    
-    /* Check the LSI State */
-    if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
-    {
-      /* Enable the Internal Low Speed oscillator (LSI). */
-      __HAL_RCC_LSI_ENABLE();
-      
-      /* Get Start Tick */
-      tickstart = HAL_GetTick();
-      
-      /* Wait till LSI is ready */  
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
-      {
-        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-    else
-    {
-      /* Disable the Internal Low Speed oscillator (LSI). */
-      __HAL_RCC_LSI_DISABLE();
-      
-      /* Get Start Tick */
-      tickstart = HAL_GetTick();
-      
-      /* Wait till LSI is disabled */  
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
-      {
-        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-  }
-  /*------------------------------ LSE Configuration -------------------------*/ 
-  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
-  {
-    FlagStatus       pwrclkchanged = RESET;
-    
-    /* Check the parameters */
-    assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
-
-    /* Update LSE configuration in Backup Domain control register    */
-    /* Requires to enable write access to Backup Domain of necessary */
-    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
-    {
-      __HAL_RCC_PWR_CLK_ENABLE();
-      pwrclkchanged = SET;
-    }
-    
-    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
-    {
-      /* Enable write access to Backup domain */
-      SET_BIT(PWR->CR, PWR_CR_DBP);
-      
-      /* Wait for Backup domain Write protection disable */
-      tickstart = HAL_GetTick();
-
-      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
-      {
-        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-
-    /* Set the new LSE configuration -----------------------------------------*/
-    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
-    /* Check the LSE State */
-    if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
-    {
-      /* Get Start Tick */
-      tickstart = HAL_GetTick();
-      
-      /* Wait till LSE is ready */  
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
-      {
-        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-    else
-    {
-      /* Get Start Tick */
-      tickstart = HAL_GetTick();
-      
-      /* Wait till LSE is disabled */  
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
-      {
-        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-
-    /* Require to disable power clock if necessary */
-    if(pwrclkchanged == SET)
-    {
-      __HAL_RCC_PWR_CLK_DISABLE();
-    }
-  }
-
-#if defined(RCC_HSI48_SUPPORT)
-  /*----------------------------- HSI48 Configuration --------------------------*/
-  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));
-
-      /* Check the HSI48 State */
-      if(RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF)
-      {
-        /* Enable the Internal High Speed oscillator (HSI48). */
-        __HAL_RCC_HSI48_ENABLE();
-
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-      
-        /* Wait till HSI48 is ready */  
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
-        {
-          if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        } 
-      }
-      else
-      {
-        /* Disable the Internal High Speed oscillator (HSI48). */
-        __HAL_RCC_HSI48_DISABLE();
-
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-      
-        /* Wait till HSI48 is ready */  
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET)
-        {
-          if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-  }
-#endif /* RCC_HSI48_SUPPORT */
-       
-  /*-------------------------------- PLL Configuration -----------------------*/
-  /* Check the parameters */
-  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
-  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
-  {
-    /* Check if the PLL is used as system clock or not */
-    if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
-    { 
-      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
-      {
-        /* Check the parameters */
-        assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
-        assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
-        assert_param(IS_RCC_PLL_DIV(RCC_OscInitStruct->PLL.PLLDIV));
-  
-        /* Disable the main PLL. */
-        __HAL_RCC_PLL_DISABLE();
-        
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-        
-        /* Wait till PLL is disabled */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-
-        /* Configure the main PLL clock source, multiplication and division factors. */
-        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
-                             RCC_OscInitStruct->PLL.PLLMUL,
-                             RCC_OscInitStruct->PLL.PLLDIV);
-        /* Enable the main PLL. */
-        __HAL_RCC_PLL_ENABLE();
-        
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-        
-        /* Wait till PLL is ready */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-      else
-      {
-        /* Disable the main PLL. */
-        __HAL_RCC_PLL_DISABLE();
- 
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-        
-        /* Wait till PLL is disabled */  
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-    }
-    else
-    {
-      return HAL_ERROR;
-    }
-  }
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the CPU, AHB and APB buses clocks according to the specified 
-  *         parameters in the RCC_ClkInitStruct.
-  * @param  RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that
-  *         contains the configuration information for the RCC peripheral.
-  * @param  FLatency FLASH Latency                   
-  *          The value of this parameter depend on device used within the same series
-  * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency 
-  *         and updated by @ref HAL_RCC_GetHCLKFreq() function called within this function
-  *
-  * @note   The MSI is used (enabled by hardware) as system clock source after
-  *         start-up from Reset, wake-up from STOP and STANDBY mode, or in case
-  *         of failure of the HSE used directly or indirectly as system clock
-  *         (if the Clock Security System CSS is enabled).
-  *           
-  * @note   A switch from one clock source to another occurs only if the target
-  *         clock source is ready (clock stable after start-up delay or PLL locked). 
-  *         If a clock source which is not yet ready is selected, the switch will
-  *         occur when the clock source will be ready. 
-  *         You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
-  *         currently used as system clock source.
-  * @note   Depending on the device voltage range, the software has to set correctly
-  *         HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
-  *         (for more details refer to section above "Initialization/de-initialization functions")
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
-{
-  uint32_t tickstart = 0U;
-  
-  /* Check the parameters */
-  assert_param(RCC_ClkInitStruct != NULL);
-  assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
-  assert_param(IS_FLASH_LATENCY(FLatency));
-
-  /* To correctly read data from FLASH memory, the number of wait states (LATENCY) 
-  must be correctly programmed according to the frequency of the CPU clock 
-  (HCLK) and the supply voltage of the device. */
-
-  /* Increasing the number of wait states because of higher CPU frequency */
-  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
-  {    
-    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
-    __HAL_FLASH_SET_LATENCY(FLatency);
-    
-    /* Check that the new number of wait states is taken into account to access the Flash
-    memory by reading the FLASH_ACR register */
-    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
-    {
-      return HAL_ERROR;
-    }
-  }
-
-  /*-------------------------- HCLK Configuration --------------------------*/
-  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
-  {
-    assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
-    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
-  }
-
-  /*------------------------- SYSCLK Configuration ---------------------------*/ 
-  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
-  {    
-    assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
-    
-    /* HSE is selected as System Clock Source */
-    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
-    {
-      /* Check the HSE ready flag */  
-      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
-      {
-        return HAL_ERROR;
-      }
-    }
-    /* PLL is selected as System Clock Source */
-    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
-    {
-      /* Check the PLL ready flag */  
-      if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
-      {
-        return HAL_ERROR;
-      }
-    }
-    /* HSI is selected as System Clock Source */
-    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI)
-    {
-      /* Check the HSI ready flag */  
-      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
-      {
-        return HAL_ERROR;
-      }
-    }
-    /* MSI is selected as System Clock Source */
-    else
-    {
-      /* Check the MSI ready flag */  
-      if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == RESET)
-      {
-        return HAL_ERROR;
-      }
-    }
-    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
-
-    /* Get Start Tick */
-    tickstart = HAL_GetTick();
-    
-    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
-    {
-      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
-      {
-        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
-    {
-      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
-      {
-        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI)
-    {
-      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
-      {
-        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }      
-    else
-    {
-      while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI)
-      {
-        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-  }    
-  /* Decreasing the number of wait states because of lower CPU frequency */
-  if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY))
-  {    
-    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
-    __HAL_FLASH_SET_LATENCY(FLatency);
-    
-    /* Check that the new number of wait states is taken into account to access the Flash
-    memory by reading the FLASH_ACR register */
-    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
-    {
-      return HAL_ERROR;
-    }
-  }    
-
-  /*-------------------------- PCLK1 Configuration ---------------------------*/ 
-  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
-  {
-    assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
-    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
-  }
-  
-  /*-------------------------- PCLK2 Configuration ---------------------------*/ 
-  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
-  {
-    assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
-    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
-  }
- 
-  /* Update the SystemCoreClock global variable */
-  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER];
-
-  /* Configure the source of time base considering new system clocks settings*/
-  HAL_InitTick (TICK_INT_PRIORITY);
-  
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions
-  *  @brief   RCC clocks control functions
-  *
-  @verbatim   
-  ===============================================================================
-                  ##### Peripheral Control functions #####
-  ===============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to control the RCC Clocks 
-    frequencies.
-
-  @endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Selects the clock source to output on MCO pin.
-  * @note   MCO pin should be configured in alternate function mode.
-  * @param  RCC_MCOx specifies the output direction for the clock source.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8).
-  *            @arg @ref RCC_MCO2 Clock source to output on MCO2 pin(PA9).
-  @if STM32L031xx
-  *            @arg @ref RCC_MCO3 Clock source to output on MCO3 pin(PB13)
-  @elseif STM32L041xx
-  *            @arg @ref RCC_MCO3 Clock source to output on MCO3 pin(PB13)
-  @elseif STM32L073xx
-  *            @arg @ref RCC_MCO3 Clock source to output on MCO3 pin(PB13)
-  @elseif STM32L083xx
-  *            @arg @ref RCC_MCO3 Clock source to output on MCO3 pin(PB13)
-  @elseif STM32L072xx
-  *            @arg @ref RCC_MCO3 Clock source to output on MCO3 pin(PB13)
-  @elseif STM32L082xx
-  *            @arg @ref RCC_MCO3 Clock source to output on MCO3 pin(PB13)
-  @elseif STM32L071xx
-  *            @arg @ref RCC_MCO3 Clock source to output on MCO3 pin(PB13)
-  @elseif STM32L081xx
-  *            @arg @ref RCC_MCO3 Clock source to output on MCO3 pin(PB13)
-  @endif
-  * @param  RCC_MCOSource specifies the clock source to output.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_MCO1SOURCE_NOCLOCK     No clock selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_SYSCLK      System clock selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_HSI         HSI selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_HSE         HSE selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_MSI         MSI oscillator clock selected as MCO clock 
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLL clock selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_LSI         LSI clock selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_LSE         LSE clock selected as MCO clock
-  @if STM32L052xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 clock selected as MCO clock
-  @elseif STM32L053xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 clock selected as MCO clock
-  @elseif STM32L062xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 clock selected as MCO clock
-  @elseif STM32L063xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 clock selected as MCO clock
-  @elseif STM32L072xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 clock selected as MCO clock
-  @elseif STM32L073xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 clock selected as MCO clock
-  @elseif STM32L082xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 clock selected as MCO clock
-  @elseif STM32L083xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 clock selected as MCO clock
-  @endif
-  * @param  RCC_MCODiv specifies the MCO DIV.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_MCODIV_1 no division applied to MCO clock
-  *            @arg @ref RCC_MCODIV_2  division by 2 applied to MCO clock
-  *            @arg @ref RCC_MCODIV_4  division by 4 applied to MCO clock
-  *            @arg @ref RCC_MCODIV_8  division by 8 applied to MCO clock
-  *            @arg @ref RCC_MCODIV_16 division by 16 applied to MCO clock
-  * @retval None
-  */
-void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
-{
-  GPIO_InitTypeDef gpio = {0};
-
-  /* Check the parameters */
-  assert_param(IS_RCC_MCO(RCC_MCOx));
-  assert_param(IS_RCC_MCODIV(RCC_MCODiv));
-  assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
-  
-  /* Configure the MCO1 pin in alternate function mode */
-  gpio.Mode      = GPIO_MODE_AF_PP;
-  gpio.Speed     = GPIO_SPEED_FREQ_HIGH;
-  gpio.Pull      = GPIO_NOPULL;
-  if(RCC_MCOx == RCC_MCO1)
-  {    
-    gpio.Pin       = MCO1_PIN;
-    gpio.Alternate = GPIO_AF0_MCO;
-    
-    /* MCO1 Clock Enable */
-    MCO1_CLK_ENABLE();
-    HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio);
-  }
-#if  defined(STM32L031xx) || defined(STM32L041xx) || defined(STM32L073xx) || defined(STM32L083xx) \
-  || defined(STM32L072xx) || defined(STM32L082xx) || defined(STM32L071xx) || defined(STM32L081xx) 
-  else if (RCC_MCOx == RCC_MCO3)
-  {
-    gpio.Pin       = MCO3_PIN;
-    gpio.Alternate = GPIO_AF2_MCO;
-    
-    /* MCO3 Clock Enable */
-    MCO3_CLK_ENABLE();    
-    HAL_GPIO_Init(MCO3_GPIO_PORT, &gpio);
-  }
-#endif
-  else
-  {    
-    gpio.Pin       = MCO2_PIN;
-    gpio.Alternate = GPIO_AF0_MCO;
-    
-    /* MCO2 Clock Enable */
-    MCO2_CLK_ENABLE();
-    HAL_GPIO_Init(MCO2_GPIO_PORT, &gpio);
-  }    
-  
-  /* Configure the MCO clock source */
-  __HAL_RCC_MCO1_CONFIG(RCC_MCOSource, RCC_MCODiv);
-}
-
-#if defined(RCC_HSECSS_SUPPORT)
-/**
-  * @brief  Enables the Clock Security System.
-  * @note   If a failure is detected on the HSE oscillator clock, this oscillator
-  *         is automatically disabled and an interrupt is generated to inform the
-  *         software about the failure (Clock Security System Interrupt, CSSI),
-  *         allowing the MCU to perform rescue operations. The CSSI is linked to 
-  *         the Cortex-M0+ NMI (Non-Maskable Interrupt) exception vector.  
-  * @retval None
-  */
-void HAL_RCC_EnableCSS(void)
-{
-  SET_BIT(RCC->CR, RCC_CR_CSSON) ;
-}
-
-#endif /* RCC_HSECSS_SUPPORT */
-/**
-  * @brief  Returns the SYSCLK frequency     
-  * @note   The system frequency computed by this function is not the real 
-  *         frequency in the chip. It is calculated based on the predefined 
-  *         constant and the selected clock source:
-  * @note     If SYSCLK source is MSI, function returns a value based on MSI
-  *             Value as defined by the MSI range.
-  * @note     If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
-  * @note     If SYSCLK source is HSE, function returns a value based on HSE_VALUE(**)
-  * @note     If SYSCLK source is PLL, function returns a value based on HSE_VALUE(**) 
-  *           or HSI_VALUE(*) multiplied/divided by the PLL factors.         
-  * @note     (*) HSI_VALUE is a constant defined in stm32l0xx_hal_conf.h file (default value
-  *               16 MHz) but the real value may vary depending on the variations
-  *               in voltage and temperature.
-  * @note     (**) HSE_VALUE is a constant defined in stm32l0xx_hal_conf.h file (default value
-  *                8 MHz), user has to ensure that HSE_VALUE is same as the real
-  *                frequency of the crystal used. Otherwise, this function may
-  *                have wrong result.
-  *                  
-  * @note   The result of this function could be not correct when using fractional
-  *         value for HSE crystal.
-  *           
-  * @note   This function can be used by the user application to compute the 
-  *         baud-rate for the communication peripherals or configure other parameters.
-  *           
-  * @note   Each time SYSCLK changes, this function must be called to update the
-  *         right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
-  *         
-  * @retval SYSCLK frequency
-  */
-uint32_t HAL_RCC_GetSysClockFreq(void)
-{
-  uint32_t tmpreg = 0, pllm = 0, plld = 0, pllvco = 0, msiclkrange = 0;
-  uint32_t sysclockfreq = 0;
-  
-  tmpreg = RCC->CFGR;
-  
-  /* Get SYSCLK source -------------------------------------------------------*/
-  switch (tmpreg & RCC_CFGR_SWS)
-  {
-    case RCC_SYSCLKSOURCE_STATUS_HSI:  /* HSI used as system clock source */
-    {
-      if ((RCC->CR & RCC_CR_HSIDIVF) != 0)
-      {
-        sysclockfreq =  (HSI_VALUE >> 2);
-      }
-      else 
-      {
-        sysclockfreq =  HSI_VALUE;
-      }
-      break;
-    }
-    case RCC_SYSCLKSOURCE_STATUS_HSE:  /* HSE used as system clock */
-    {
-      sysclockfreq = HSE_VALUE;
-      break;
-    }
-    case RCC_SYSCLKSOURCE_STATUS_PLLCLK:  /* PLL used as system clock */
-    {
-      pllm = PLLMulTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER];
-      plld = ((uint32_t)(tmpreg & RCC_CFGR_PLLDIV) >> RCC_CFGR_PLLDIV_BITNUMBER) + 1;
-      if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
-      {
-        /* HSE used as PLL clock source */
-        pllvco = (HSE_VALUE * pllm) / plld;
-      }
-      else
-      {
-        if ((RCC->CR & RCC_CR_HSIDIVF) != 0)
-        {
-          pllvco = ((HSI_VALUE >> 2) * pllm) / plld;
-        }
-        else 
-        {
-         pllvco = (HSI_VALUE * pllm) / plld;
-        }
-      }
-      sysclockfreq = pllvco;
-      break;
-    }
-    case RCC_SYSCLKSOURCE_STATUS_MSI:  /* MSI used as system clock source */
-    default: /* MSI used as system clock */
-    {
-      msiclkrange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE ) >> RCC_ICSCR_MSIRANGE_BITNUMBER;
-      sysclockfreq = (32768 * (1 << (msiclkrange + 1)));
-      break;
-    }
-  }
-  return sysclockfreq;
-}
-
-/**
-  * @brief  Returns the HCLK frequency     
-  * @note   Each time HCLK changes, this function must be called to update the
-  *         right HCLK value. Otherwise, any configuration based on this function will be incorrect.
-  * 
-  * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency 
-  *         and updated within this function
-  * @retval HCLK frequency
-  */
-uint32_t HAL_RCC_GetHCLKFreq(void)
-{
-  return SystemCoreClock;
-}
-
-/**
-  * @brief  Returns the PCLK1 frequency     
-  * @note   Each time PCLK1 changes, this function must be called to update the
-  *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
-  * @retval PCLK1 frequency
-  */
-uint32_t HAL_RCC_GetPCLK1Freq(void)
-{
-  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
-  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_BITNUMBER]);
-}    
-
-/**
-  * @brief  Returns the PCLK2 frequency     
-  * @note   Each time PCLK2 changes, this function must be called to update the
-  *         right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
-  * @retval PCLK2 frequency
-  */
-uint32_t HAL_RCC_GetPCLK2Freq(void)
-{
-  /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
-  return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_BITNUMBER]);
-} 
-
-/**
-  * @brief  Configures the RCC_OscInitStruct according to the internal 
-  * RCC configuration registers.
-  * @param  RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that 
-  * will be configured.
-  * @retval None
-  */
-void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
-{
-  /* Check the parameters */
-  assert_param(RCC_OscInitStruct != NULL);
-
-  /* Set all possible values for the Oscillator type parameter ---------------*/
-  RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI  \
-                  | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_MSI;
-#if defined(RCC_HSI48_SUPPORT)
-  RCC_OscInitStruct->OscillatorType |= RCC_OSCILLATORTYPE_HSI48;
-#endif /* RCC_HSI48_SUPPORT */
-
-
-  /* Get the HSE configuration -----------------------------------------------*/
-  if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
-  {
-    RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
-  }
-  else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON)
-  {
-    RCC_OscInitStruct->HSEState = RCC_HSE_ON;
-  }
-  else
-  {
-    RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
-  }
-
-  /* Get the HSI configuration -----------------------------------------------*/
-  if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION)
-  {
-    RCC_OscInitStruct->HSIState = RCC_HSI_ON;
-  }
-  else
-  {
-    RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
-  }
-  
-  RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->ICSCR & RCC_ICSCR_HSITRIM) >> 8);
-  
-  /* Get the MSI configuration -----------------------------------------------*/
-  if((RCC->CR &RCC_CR_MSION) == RCC_CR_MSION)
-  {
-    RCC_OscInitStruct->MSIState = RCC_MSI_ON;
-  }
-  else
-  {
-    RCC_OscInitStruct->MSIState = RCC_MSI_OFF;
-  }
-  
-  RCC_OscInitStruct->MSICalibrationValue = (uint32_t)((RCC->ICSCR & RCC_ICSCR_MSITRIM) >> RCC_ICSCR_MSITRIM_BITNUMBER);
-  RCC_OscInitStruct->MSIClockRange = (uint32_t)((RCC->ICSCR & RCC_ICSCR_MSIRANGE));
-  
-  /* Get the LSE configuration -----------------------------------------------*/
-  if((RCC->CSR &RCC_CSR_LSEBYP) == RCC_CSR_LSEBYP)
-  {
-    RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
-  }
-  else if((RCC->CSR &RCC_CSR_LSEON) == RCC_CSR_LSEON)
-  {
-    RCC_OscInitStruct->LSEState = RCC_LSE_ON;
-  }
-  else
-  {
-    RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
-  }
-  
-  /* Get the LSI configuration -----------------------------------------------*/
-  if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION)
-  {
-    RCC_OscInitStruct->LSIState = RCC_LSI_ON;
-  }
-  else
-  {
-    RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
-  }
-  
-#if defined(RCC_HSI48_SUPPORT)
-  /* Get the HSI48 configuration if any-----------------------------------------*/
-  RCC_OscInitStruct->HSI48State = __HAL_RCC_GET_HSI48_STATE();
-#endif /* RCC_HSI48_SUPPORT */
-
-  /* Get the PLL configuration -----------------------------------------------*/
-  if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON)
-  {
-    RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
-  }
-  else
-  {
-    RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
-  }
-  RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC);
-  RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL);
-  RCC_OscInitStruct->PLL.PLLDIV = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLDIV);
-}
-
-/**
-  * @brief  Get the RCC_ClkInitStruct according to the internal 
-  * RCC configuration registers.
-  * @param  RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that 
-  * contains the current clock configuration.
-  * @param  pFLatency Pointer on the Flash Latency.
-  * @retval None
-  */
-void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
-{
-  /* Check the parameters */
-  assert_param(RCC_ClkInitStruct != NULL);
-  assert_param(pFLatency != NULL);
-
-  /* Set all possible values for the Clock type parameter --------------------*/
-  RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
-  
-  /* Get the SYSCLK configuration --------------------------------------------*/ 
-  RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
-  
-  /* Get the HCLK configuration ----------------------------------------------*/ 
-  RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); 
-  
-  /* Get the APB1 configuration ----------------------------------------------*/ 
-  RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);   
-  
-  /* Get the APB2 configuration ----------------------------------------------*/ 
-  RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3);
-  
-  /* Get the Flash Wait State (Latency) configuration ------------------------*/   
-  *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY); 
-}
-
-#if defined(RCC_HSECSS_SUPPORT)
-/**
-  * @brief This function handles the RCC CSS interrupt request.
-  * @note This API should be called under the NMI_Handler().
-  * @retval None
-  */
-void HAL_RCC_NMI_IRQHandler(void)
-{
-  /* Check RCC CSSF flag  */
-  if(__HAL_RCC_GET_IT(RCC_IT_CSS))
-  {
-    /* RCC Clock Security System interrupt user callback */
-    HAL_RCC_CSSCallback();
-    
-    /* Clear RCC CSS pending bit */
-    __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
-  }
-}
-
-/**
-  * @brief  RCC Clock Security System interrupt callback
-  * @retval none
-  */
-__weak void HAL_RCC_CSSCallback(void)
-{
-  /* NOTE : This function Should not be modified, when the callback is needed,
-    the HAL_RCC_CSSCallback could be implemented in the user file
-    */ 
-}
-
-#endif /* RCC_HSECSS_SUPPORT */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup RCC_Private_Functions
-  * @{
-  */
-/**
-  * @brief  Update number of Flash wait states in line with MSI range and current 
-            voltage range
-  * @param  MSIrange  MSI range value from RCC_MSIRANGE_0 to RCC_MSIRANGE_6
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t MSIrange)
-{
-  uint32_t vos = 0;
-  uint32_t latency = FLASH_LATENCY_0;  /* default value 0WS */
-
-  /* HCLK can reach 4 MHz only if AHB prescaler = 1 */
-  if (READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) == RCC_SYSCLK_DIV1)
-  {
-    if(__HAL_RCC_PWR_IS_CLK_ENABLED())
-    {
-      vos = READ_BIT(PWR->CR, PWR_CR_VOS);
-    }
-    else
-    {
-      __HAL_RCC_PWR_CLK_ENABLE();
-      vos = READ_BIT(PWR->CR, PWR_CR_VOS);
-      __HAL_RCC_PWR_CLK_DISABLE();
-    }
-    
-    /* Check if need to set latency 1 only for Range 3 & HCLK = 4MHz */
-    if((vos == PWR_REGULATOR_VOLTAGE_SCALE3) && (MSIrange == RCC_MSIRANGE_6))
-    {
-      latency = FLASH_LATENCY_1; /* 1WS */
-    }
-  }
-  
-  __HAL_FLASH_SET_LATENCY(latency);
-  
-  /* Check that the new number of wait states is taken into account to access the Flash
-     memory by reading the FLASH_ACR register */
-  if((FLASH->ACR & FLASH_ACR_LATENCY) != latency)
-  {
-    return HAL_ERROR;
-  }
-  
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-  
-#endif /* HAL_RCC_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c
deleted file mode 100755
index c65dd93c..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c
+++ /dev/null
@@ -1,1165 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_rcc_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended RCC HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities RCC extension peripheral:
-  *           + Extended Peripheral Control functions
-  *           + Extended Clock Recovery System Control functions
-  *
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-
-/** @defgroup RCCEx RCCEx
-  * @brief RCC Extension HAL module driver
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup RCCEx_Private_Constants RCCEx Private Constants
-  * @{
-  */
-#if defined (CRS)
-/* Bit position in register */
-#define CRS_CFGR_FELIM_BITNUMBER    CRS_CFGR_FELIM_Pos
-#define CRS_CR_TRIM_BITNUMBER       CRS_CR_TRIM_Pos
-#define CRS_ISR_FECAP_BITNUMBER     CRS_ISR_FECAP_Pos
-#endif /* CRS   */
-
-#if defined(USB)
-extern const uint8_t PLLMulTable[];
-#endif /* USB */
-/**
-  * @}
-  */
-  
-/* Private macro -------------------------------------------------------------*/
-/** @defgroup RCCEx_Private_Macros RCCEx Private Macros
-  * @{
-  */
-/**
-  * @}
-  */
-
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions
-  * @{
-  */
-
-/** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions 
- *  @brief  Extended Peripheral Control functions  
- *
-@verbatim   
- ===============================================================================
-                ##### Extended Peripheral Control functions  #####
- ===============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to control the RCC Clocks 
-    frequencies.
-    [..] 
-    (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to
-        select the RTC clock source; in this case the Backup domain will be reset in  
-        order to modify the RTC Clock source, as consequence RTC registers (including 
-        the backup registers) are set to their reset values.
-      
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the RCC extended peripherals clocks according to the specified
-  *         parameters in the RCC_PeriphCLKInitTypeDef.
-  * @param  PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
-  *         contains the configuration information for the Extended Peripherals clocks(USART1,USART2, LPUART1, 
-  *         I2C1, I2C3, RTC, USB/RNG  and LPTIM1 clocks).
-  * @retval HAL status
-  * @note   If HAL_ERROR returned, first switch-OFF HSE clock oscillator with @ref HAL_RCC_OscConfig()
-  *         to possibly update HSE divider.
-  */
-HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
-{
-  uint32_t tickstart = 0U;
-  uint32_t temp_reg = 0U;
-  
-  /* Check the parameters */
-  assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
-  
-  /*------------------------------- RTC/LCD Configuration ------------------------*/ 
-  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) 
-#if defined(LCD)
-   || (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LCD) == RCC_PERIPHCLK_LCD)
-#endif /* LCD */
-     )
-  {
-    /* check for RTC Parameters used to output RTCCLK */
-    if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)
-    {
-      assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
-    }
-
-#if defined(LCD)
-    if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LCD) == RCC_PERIPHCLK_LCD)
-    {
-      assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->LCDClockSelection));
-    }
-#endif /* LCD */
-
-    FlagStatus       pwrclkchanged = RESET;
-
-    /* As soon as function is called to change RTC clock source, activation of the 
-       power domain is done. */
-    /* Requires to enable write access to Backup Domain of necessary */
-    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
-    {
-      __HAL_RCC_PWR_CLK_ENABLE();
-      pwrclkchanged = SET;
-    }
-    
-    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
-    {
-      /* Enable write access to Backup domain */
-      SET_BIT(PWR->CR, PWR_CR_DBP);
-      
-      /* Wait for Backup domain Write protection disable */
-      tickstart = HAL_GetTick();
-
-      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
-      {
-        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-
-    /* Check if user wants to change HSE RTC prescaler whereas HSE is enabled */ 
-    temp_reg = (RCC->CR & RCC_CR_RTCPRE);
-    if ((temp_reg != (PeriphClkInit->RTCClockSelection & RCC_CR_RTCPRE))
-#if defined (LCD)
-     || (temp_reg != (PeriphClkInit->LCDClockSelection & RCC_CR_RTCPRE))
-#endif /* LCD */
-       )
-    { /* Check HSE State */
-      if (((PeriphClkInit->RTCClockSelection & RCC_CSR_RTCSEL) == RCC_CSR_RTCSEL_HSE) && HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))
-      {
-        /* To update HSE divider, first switch-OFF HSE clock oscillator*/
-        return HAL_ERROR; 
-      }
-    }
-    
-    /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ 
-    temp_reg = (RCC->CSR & RCC_CSR_RTCSEL);
-    
-    if((temp_reg != 0x00000000U) && (((temp_reg != (PeriphClkInit->RTCClockSelection & RCC_CSR_RTCSEL)) \
-      && (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
-#if defined(LCD)
-      || ((temp_reg != (PeriphClkInit->LCDClockSelection & RCC_CSR_RTCSEL)) \
-       && (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LCD) == RCC_PERIPHCLK_LCD))
-#endif /* LCD */
-     ))
-    {
-      /* Store the content of CSR register before the reset of Backup Domain */
-      temp_reg = (RCC->CSR & ~(RCC_CSR_RTCSEL));
-      
-      /* RTC Clock selection can be changed only if the Backup Domain is reset */
-      __HAL_RCC_BACKUPRESET_FORCE();
-      __HAL_RCC_BACKUPRESET_RELEASE();
-      
-      /* Restore the Content of CSR register */
-      RCC->CSR = temp_reg;
-      
-       /* Wait for LSERDY if LSE was enabled */
-      if (HAL_IS_BIT_SET(temp_reg, RCC_CSR_LSEON))
-      {
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-        
-        /* Wait till LSE is ready */  
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-    }
-    __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
-
-    /* Require to disable power clock if necessary */
-    if(pwrclkchanged == SET)
-    {
-      __HAL_RCC_PWR_CLK_DISABLE();
-    }
-  }
-  
-#if defined (RCC_CCIPR_USART1SEL)
-  /*------------------------------- USART1 Configuration ------------------------*/ 
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
-    
-    /* Configure the USART1 clock source */
-    __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
-  }
-#endif /* RCC_CCIPR_USART1SEL */
-  
-  /*----------------------------- USART2 Configuration --------------------------*/ 
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
-    
-    /* Configure the USART2 clock source */
-    __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
-  }
-  
-  /*------------------------------ LPUART1 Configuration ------------------------*/ 
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_LPUART1CLKSOURCE(PeriphClkInit->Lpuart1ClockSelection));
-    
-    /* Configure the LPUAR1 clock source */
-    __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection);
-  }
-
-  /*------------------------------ I2C1 Configuration ------------------------*/ 
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
-    
-    /* Configure the I2C1 clock source */
-    __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
-  }
-
-#if defined (RCC_CCIPR_I2C3SEL)
-    /*------------------------------ I2C3 Configuration ------------------------*/ 
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection));
-    
-    /* Configure the I2C3 clock source */
-    __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection);
-  }  
-#endif /* RCC_CCIPR_I2C3SEL */
-
-#if defined(USB)
- /*---------------------------- USB and RNG configuration --------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == (RCC_PERIPHCLK_USB))
-  {
-    assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection));
-    __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
-  }
-#endif /* USB */
-  
-  /*---------------------------- LPTIM1 configuration ------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == (RCC_PERIPHCLK_LPTIM1))
-  {
-    assert_param(IS_RCC_LPTIMCLK(PeriphClkInit->LptimClockSelection));
-    __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->LptimClockSelection);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Get the PeriphClkInit according to the internal RCC configuration registers.
-  * @param  PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that 
-  *         returns the configuration information for the Extended Peripherals clocks(USART1,USART2, LPUART1, 
-  *         I2C1, I2C3, RTC, USB/RNG  and LPTIM1 clocks).
-  * @retval None
-  */
-void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
-{
-  uint32_t srcclk = 0;
-  
-   /* Set all possible values for the extended clock type parameter -----------*/
-  /* Common part first */
-  PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_LPUART1 | \
-                                        RCC_PERIPHCLK_I2C1   | RCC_PERIPHCLK_RTC     | \
-                                        RCC_PERIPHCLK_LPTIM1;
-#if defined(RCC_CCIPR_USART1SEL)
-  PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USART1;
-#endif /* RCC_CCIPR_USART1SEL */
-#if  defined(RCC_CCIPR_I2C3SEL)
-  PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_I2C3;
-#endif /* RCC_CCIPR_I2C3SEL */
-#if defined(USB)
-  PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USB;
-#endif /* USB */
-#if defined(LCD)   
-  PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_LCD;
-#endif /* LCD */
-
-  /* Get the RTC/LCD configuration -----------------------------------------------*/
-  srcclk = __HAL_RCC_GET_RTC_SOURCE();
-  if (srcclk != RCC_RTCCLKSOURCE_HSE_DIV2)
-  {
-    /* Source clock is LSE or LSI*/
-    PeriphClkInit->RTCClockSelection = srcclk;
-  }
-  else
-  {
-    /* Source clock is HSE. Need to get the prescaler value*/
-    PeriphClkInit->RTCClockSelection = srcclk | (READ_BIT(RCC->CR, RCC_CR_RTCPRE));
-  }
-#if defined(LCD)
-  PeriphClkInit->LCDClockSelection = PeriphClkInit->RTCClockSelection;
-#endif /* LCD */
-#if defined(RCC_CCIPR_USART1SEL)
-  /* Get the USART1 configuration --------------------------------------------*/
-  PeriphClkInit->Usart1ClockSelection  = __HAL_RCC_GET_USART1_SOURCE();
-#endif /* RCC_CCIPR_USART1SEL */
-  /* Get the USART2 clock source ---------------------------------------------*/
-  PeriphClkInit->Usart2ClockSelection  = __HAL_RCC_GET_USART2_SOURCE();
-  /* Get the LPUART1 clock source ---------------------------------------------*/
-  PeriphClkInit->Lpuart1ClockSelection = __HAL_RCC_GET_LPUART1_SOURCE();
-  /* Get the I2C1 clock source -----------------------------------------------*/
-  PeriphClkInit->I2c1ClockSelection    = __HAL_RCC_GET_I2C1_SOURCE();
-#if defined(RCC_CCIPR_I2C3SEL)
-/* Get the I2C3 clock source -----------------------------------------------*/
-  PeriphClkInit->I2c3ClockSelection    = __HAL_RCC_GET_I2C3_SOURCE();
-#endif /* RCC_CCIPR_I2C3SEL */
-  /* Get the LPTIM1 clock source -----------------------------------------------*/
-  PeriphClkInit->LptimClockSelection   = __HAL_RCC_GET_LPTIM1_SOURCE();
-  /* Get the RTC clock source -----------------------------------------------*/
-  PeriphClkInit->RTCClockSelection     = __HAL_RCC_GET_RTC_SOURCE();
-#if defined(USB)
-  /* Get the USB/RNG clock source -----------------------------------------------*/
-  PeriphClkInit->UsbClockSelection     = __HAL_RCC_GET_USB_SOURCE();
-#endif /* USB */
-}
-
-/**
-  * @brief  Return the peripheral clock frequency
-  * @note   Return 0 if peripheral clock is unknown
-  * @param  PeriphClk Peripheral clock identifier
-  *         This parameter can be one of the following values:
-  *            @arg @ref RCC_PERIPHCLK_RTC      RTC peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_LCD      LCD peripheral clock (*)
-  *            @arg @ref RCC_PERIPHCLK_USB      USB or RNG peripheral clock (*)
-  *            @arg @ref RCC_PERIPHCLK_USART1   USART1 peripheral clock (*)
-  *            @arg @ref RCC_PERIPHCLK_USART2   USART2 peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_LPUART1  LPUART1 peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_I2C1     I2C1 peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_I2C2     I2C2 peripheral clock (*)
-  *            @arg @ref RCC_PERIPHCLK_I2C3     I2C3 peripheral clock (*)
-  * @note   (*) means that this peripheral is not present on all the devices
-  * @retval Frequency in Hz (0: means that no available frequency for the peripheral)
-  */
-uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
-{
-  uint32_t temp_reg = 0U, clkprediv = 0U, frequency = 0U;
-  uint32_t srcclk = 0U;
-#if defined(USB)
-    uint32_t pllmul = 0U, plldiv = 0U, pllvco = 0U;
-#endif /* USB */
-
-  /* Check the parameters */
-  assert_param(IS_RCC_PERIPHCLOCK(PeriphClk));
-  
-  switch (PeriphClk)
-  {
-  case RCC_PERIPHCLK_RTC:
-#if defined(LCD)
-  case RCC_PERIPHCLK_LCD:
-#endif /* LCD */
-    {
-      /* Get RCC CSR configuration ------------------------------------------------------*/
-      temp_reg = RCC->CSR;
-
-      /* Get the current RTC source */
-      srcclk = __HAL_RCC_GET_RTC_SOURCE();
-
-      /* Check if LSE is ready if RTC clock selection is LSE */
-      if ((srcclk == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_CSR_LSERDY)))
-      {
-        frequency = LSE_VALUE;
-      }
-      /* Check if LSI is ready if RTC clock selection is LSI */
-      else if ((srcclk == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(temp_reg, RCC_CSR_LSIRDY)))
-      {
-        frequency = LSI_VALUE;
-      }
-      /* Check if HSE is ready and if RTC clock selection is HSE */
-      else if ((srcclk == RCC_RTCCLKSOURCE_HSE_DIVX) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)))
-      {
-        /* Get the current HSE clock divider */
-        clkprediv = __HAL_RCC_GET_RTC_HSE_PRESCALER();
-
-        switch (clkprediv)
-        {
-          case RCC_RTC_HSE_DIV_16:  /* HSE DIV16 has been selected */
-          {
-            frequency = HSE_VALUE / 16U;
-            break;
-          }
-          case RCC_RTC_HSE_DIV_8:   /* HSE DIV8 has been selected  */
-          {
-            frequency = HSE_VALUE / 8U;
-            break;
-          }
-          case RCC_RTC_HSE_DIV_4:   /* HSE DIV4 has been selected  */
-          {
-            frequency = HSE_VALUE / 4U;
-            break;
-          }
-          default:                  /* HSE DIV2 has been selected  */
-          {
-            frequency = HSE_VALUE / 2U;
-            break;
-          }
-        }
-      }
-      /* Clock not enabled for RTC */
-      else
-      {
-        frequency = 0U;
-      }
-      break;
-    }
-#if defined(USB)
-   case RCC_PERIPHCLK_USB:
-    {  
-        /* Get the current USB source */
-        srcclk = __HAL_RCC_GET_USB_SOURCE();
-        
-        if((srcclk == RCC_USBCLKSOURCE_PLL) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)))
-        {
-            /* Get PLL clock source and multiplication factor ----------------------*/
-            pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
-            plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
-            pllmul = PLLMulTable[(pllmul >> RCC_CFGR_PLLMUL_Pos)];
-            plldiv = (plldiv >> RCC_CFGR_PLLDIV_Pos) + 1U;   
-            
-            /* Compute PLL clock input */
-            if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)
-            {
-                if (READ_BIT(RCC->CR, RCC_CR_HSIDIVF) != 0U)
-                {
-                    pllvco =  (HSI_VALUE >> 2U);
-                }
-                else 
-                {
-                    pllvco =  HSI_VALUE;
-                }
-            }
-            else /* HSE source */
-            {
-                pllvco = HSE_VALUE;
-            }
-            /* pllvco * pllmul / plldiv */
-            pllvco = (pllvco * pllmul);
-            frequency = (pllvco/ plldiv);
-            
-        }
-        else if((srcclk == RCC_USBCLKSOURCE_HSI48) && (HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY)))
-        {
-            frequency = HSI48_VALUE;
-        }
-        else /* RCC_USBCLKSOURCE_NONE */
-        {
-            frequency = 0U;
-        }
-        break;
-    }
-#endif /* USB */
-#if defined(RCC_CCIPR_USART1SEL)
-  case RCC_PERIPHCLK_USART1:
-    {
-      /* Get the current USART1 source */
-      srcclk = __HAL_RCC_GET_USART1_SOURCE();
-
-      /* Check if USART1 clock selection is PCLK2 */
-      if (srcclk == RCC_USART1CLKSOURCE_PCLK2)
-      {
-        frequency = HAL_RCC_GetPCLK2Freq();
-      }
-      /* Check if HSI is ready and if USART1 clock selection is HSI */
-      else if ((srcclk == RCC_USART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
-      {
-        frequency = HSI_VALUE;
-      }
-      /* Check if USART1 clock selection is SYSCLK */
-      else if (srcclk == RCC_USART1CLKSOURCE_SYSCLK)
-      {
-        frequency = HAL_RCC_GetSysClockFreq();
-      }
-      /* Check if LSE is ready  and if USART1 clock selection is LSE */
-      else if ((srcclk == RCC_USART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSERDY)))
-      {
-        frequency = LSE_VALUE;
-      }
-      /* Clock not enabled for USART1*/
-      else
-      {
-        frequency = 0U;
-      }
-      break;
-    }
-#endif /* RCC_CCIPR_USART1SEL */
-  case RCC_PERIPHCLK_USART2:
-    {
-      /* Get the current USART2 source */
-      srcclk = __HAL_RCC_GET_USART2_SOURCE();
-
-      /* Check if USART2 clock selection is PCLK1 */
-      if (srcclk == RCC_USART2CLKSOURCE_PCLK1)
-      {
-        frequency = HAL_RCC_GetPCLK1Freq();
-      }
-      /* Check if HSI is ready and if USART2 clock selection is HSI */
-      else if ((srcclk == RCC_USART2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
-      {
-        frequency = HSI_VALUE;
-      }
-      /* Check if USART2 clock selection is SYSCLK */
-      else if (srcclk == RCC_USART2CLKSOURCE_SYSCLK)
-      {
-        frequency = HAL_RCC_GetSysClockFreq();
-      }
-      /* Check if LSE is ready  and if USART2 clock selection is LSE */
-      else if ((srcclk == RCC_USART2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSERDY)))
-      {
-        frequency = LSE_VALUE;
-      }
-      /* Clock not enabled for USART2*/
-      else
-      {
-        frequency = 0U;
-      }
-      break;
-    }
-  case RCC_PERIPHCLK_LPUART1:
-    {
-      /* Get the current LPUART1 source */
-      srcclk = __HAL_RCC_GET_LPUART1_SOURCE();
-
-      /* Check if LPUART1 clock selection is PCLK1 */
-      if (srcclk == RCC_LPUART1CLKSOURCE_PCLK1)
-      {
-        frequency = HAL_RCC_GetPCLK1Freq();
-      }
-      /* Check if HSI is ready and if LPUART1 clock selection is HSI */
-      else if ((srcclk == RCC_LPUART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
-      {
-        frequency = HSI_VALUE;
-      }
-      /* Check if LPUART1 clock selection is SYSCLK */
-      else if (srcclk == RCC_LPUART1CLKSOURCE_SYSCLK)
-      {
-        frequency = HAL_RCC_GetSysClockFreq();
-      }
-      /* Check if LSE is ready  and if LPUART1 clock selection is LSE */
-      else if ((srcclk == RCC_LPUART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSERDY)))
-      {
-        frequency = LSE_VALUE;
-      }
-      /* Clock not enabled for LPUART1*/
-      else
-      {
-        frequency = 0U;
-      }
-      break;
-    }    
-  case RCC_PERIPHCLK_I2C1:
-    {
-      /* Get the current I2C1 source */
-      srcclk = __HAL_RCC_GET_I2C1_SOURCE();
-
-      /* Check if I2C1 clock selection is PCLK1 */
-      if (srcclk == RCC_I2C1CLKSOURCE_PCLK1)
-      {
-        frequency = HAL_RCC_GetPCLK1Freq();
-      }
-      /* Check if HSI is ready and if I2C1 clock selection is HSI */
-      else if ((srcclk == RCC_I2C1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
-      {
-        frequency = HSI_VALUE;
-      }
-      /* Check if I2C1 clock selection is SYSCLK */
-      else if (srcclk == RCC_I2C1CLKSOURCE_SYSCLK)
-      {
-        frequency = HAL_RCC_GetSysClockFreq();
-      }
-      /* Clock not enabled for I2C1*/
-      else
-      {
-        frequency = 0U;
-      }
-      break;
-    } 
-#if defined(I2C2)
-  case RCC_PERIPHCLK_I2C2:
-    {
-
-      /* Check if I2C2 on APB1 clock enabled*/
-      if (READ_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C2EN))==RCC_APB1ENR_I2C2EN)
-      {
-        frequency = HAL_RCC_GetPCLK1Freq();
-      }
-      else
-      {
-        frequency = 0U;
-      }
-      break;
-    } 
-#endif /* I2C2 */
-
-#if defined(RCC_CCIPR_I2C3SEL)
-  case RCC_PERIPHCLK_I2C3:
-    {
-      /* Get the current I2C1 source */
-      srcclk = __HAL_RCC_GET_I2C3_SOURCE();
-
-      /* Check if I2C3 clock selection is PCLK1 */
-      if (srcclk == RCC_I2C3CLKSOURCE_PCLK1)
-      {
-        frequency = HAL_RCC_GetPCLK1Freq();
-      }
-      /* Check if HSI is ready and if I2C3 clock selection is HSI */
-      else if ((srcclk == RCC_I2C3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
-      {
-        frequency = HSI_VALUE;
-      }
-      /* Check if I2C3 clock selection is SYSCLK */
-      else if (srcclk == RCC_I2C3CLKSOURCE_SYSCLK)
-      {
-        frequency = HAL_RCC_GetSysClockFreq();
-      }
-      /* Clock not enabled for I2C3*/
-      else
-      {
-        frequency = 0U;
-      }
-      break;
-    } 
-#endif /* RCC_CCIPR_I2C3SEL */
-  default: 
-    {
-      break;
-    }
-  }
-  return(frequency);
-}
-
-/**
-  * @brief  Enables the LSE Clock Security System.
-  * @retval None
-  */
-void HAL_RCCEx_EnableLSECSS(void)
-{
-  SET_BIT(RCC->CSR, RCC_CSR_LSECSSON) ;
-}
-
-/**
-  * @brief  Disables the LSE Clock Security System.
-  * @note   Once enabled this bit cannot be disabled, except after an LSE failure detection 
-  *         (LSECSSD=1). In that case the software MUST disable the LSECSSON bit.
-  *         Reset by power on reset and RTC software reset (RTCRST bit).
-  * @retval None
-  */
-void HAL_RCCEx_DisableLSECSS(void)
-{
-  /* Disable LSE CSS */
-   CLEAR_BIT(RCC->CSR, RCC_CSR_LSECSSON) ;
-
-  /* Disable LSE CSS IT */
-  __HAL_RCC_DISABLE_IT(RCC_IT_LSECSS);
-}
-
-/**
-  * @brief  Enable the LSE Clock Security System IT & corresponding EXTI line.
-  * @note   LSE Clock Security System IT is mapped on RTC EXTI line 19
-  * @retval None
-  */
-void HAL_RCCEx_EnableLSECSS_IT(void)
-{
-  /* Enable LSE CSS */
-   SET_BIT(RCC->CSR, RCC_CSR_LSECSSON) ;
-
-  /* Enable LSE CSS IT */
-  __HAL_RCC_ENABLE_IT(RCC_IT_LSECSS);
-  
-  /* Enable IT on EXTI Line 19 */
-  __HAL_RCC_LSECSS_EXTI_ENABLE_IT();
-  __HAL_RCC_LSECSS_EXTI_ENABLE_RISING_EDGE();
-}
-
-/**
-  * @brief Handle the RCC LSE Clock Security System interrupt request.
-  * @retval None
-  */
-void HAL_RCCEx_LSECSS_IRQHandler(void)
-{
-  /* Check RCC LSE CSSF flag  */
-  if(__HAL_RCC_GET_IT(RCC_IT_LSECSS))
-  {
-    /* RCC LSE Clock Security System interrupt user callback */
-    HAL_RCCEx_LSECSS_Callback();
-
-    /* Clear RCC LSE CSS pending bit */
-    __HAL_RCC_CLEAR_IT(RCC_IT_LSECSS);
-  }
-}                                                                            
-
-/**
-  * @brief  RCCEx LSE Clock Security System interrupt callback.
-  * @retval none
-  */
-__weak void HAL_RCCEx_LSECSS_Callback(void)
-{
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the @ref HAL_RCCEx_LSECSS_Callback should be implemented in the user file
-   */
-}
-  
-#if defined(SYSCFG_CFGR3_ENREF_HSI48)
-/**
-  * @brief Enables Vrefint for the HSI48.
-  * @note  This is functional only if the LOCK is not set  
-  * @retval None
-  */
-void HAL_RCCEx_EnableHSI48_VREFINT(void)
-{
-  /* Enable the Buffer for the ADC by setting SYSCFG_CFGR3_ENREF_HSI48 bit in SYSCFG_CFGR3 register   */
-  SET_BIT (SYSCFG->CFGR3, SYSCFG_CFGR3_ENREF_HSI48);
-}
-
-/**
-  * @brief Disables the Vrefint for the HSI48.
-  * @note  This is functional only if the LOCK is not set  
-  * @retval None
-  */
-void HAL_RCCEx_DisableHSI48_VREFINT(void)
-{
-  /* Disable the Vrefint by resetting SYSCFG_CFGR3_ENREF_HSI48 bit in SYSCFG_CFGR3 register */
-  CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENREF_HSI48);
-}
-
-#endif /* SYSCFG_CFGR3_ENREF_HSI48 */
-
-/**
-  * @}
-  */
-
-#if defined (CRS)
-
-/** @defgroup RCCEx_Exported_Functions_Group3 Extended Clock Recovery System Control functions 
- *  @brief  Extended Clock Recovery System Control functions
- *
-@verbatim
- ===============================================================================
-                ##### Extended Clock Recovery System Control functions  #####
- ===============================================================================
-    [..]
-      For devices with Clock Recovery System feature (CRS), RCC Extention HAL driver can be used as follows:
-
-      (#) In System clock config, HSI48 needs to be enabled
-
-      (#) Enable CRS clock in IP MSP init which will use CRS functions
-
-      (#) Call CRS functions as follows:
-          (##) Prepare synchronization configuration necessary for HSI48 calibration
-              (+++) Default values can be set for frequency Error Measurement (reload and error limit)
-                        and also HSI48 oscillator smooth trimming.
-              (+++) Macro @ref __HAL_RCC_CRS_RELOADVALUE_CALCULATE can be also used to calculate 
-                        directly reload value with target and synchronization frequencies values
-          (##) Call function @ref HAL_RCCEx_CRSConfig which
-              (+++) Reset CRS registers to their default values.
-              (+++) Configure CRS registers with synchronization configuration 
-              (+++) Enable automatic calibration and frequency error counter feature
-           Note: When using USB LPM (Link Power Management) and the device is in Sleep mode, the
-           periodic USB SOF will not be generated by the host. No SYNC signal will therefore be
-           provided to the CRS to calibrate the HSI48 on the run. To guarantee the required clock
-           precision after waking up from Sleep mode, the LSE or reference clock on the GPIOs
-           should be used as SYNC signal.
-
-          (##) A polling function is provided to wait for complete synchronization
-              (+++) Call function @ref HAL_RCCEx_CRSWaitSynchronization()
-              (+++) According to CRS status, user can decide to adjust again the calibration or continue
-                        application if synchronization is OK
-              
-      (#) User can retrieve information related to synchronization in calling function
-            @ref HAL_RCCEx_CRSGetSynchronizationInfo()
-
-      (#) Regarding synchronization status and synchronization information, user can try a new calibration
-           in changing synchronization configuration and call again HAL_RCCEx_CRSConfig.
-           Note: When the SYNC event is detected during the downcounting phase (before reaching the zero value), 
-           it means that the actual frequency is lower than the target (and so, that the TRIM value should be 
-           incremented), while when it is detected during the upcounting phase it means that the actual frequency 
-           is higher (and that the TRIM value should be decremented).
-
-      (#) In interrupt mode, user can resort to the available macros (__HAL_RCC_CRS_XXX_IT). Interrupts will go 
-          through CRS Handler (RCC_IRQn/RCC_IRQHandler)
-              (++) Call function @ref HAL_RCCEx_CRSConfig()
-              (++) Enable RCC_IRQn (thanks to NVIC functions)
-              (++) Enable CRS interrupt (@ref __HAL_RCC_CRS_ENABLE_IT)
-              (++) Implement CRS status management in the following user callbacks called from 
-                   HAL_RCCEx_CRS_IRQHandler():
-                   (+++) @ref HAL_RCCEx_CRS_SyncOkCallback()
-                   (+++) @ref HAL_RCCEx_CRS_SyncWarnCallback()
-                   (+++) @ref HAL_RCCEx_CRS_ExpectedSyncCallback()
-                   (+++) @ref HAL_RCCEx_CRS_ErrorCallback()
-
-      (#) To force a SYNC EVENT, user can use the function @ref HAL_RCCEx_CRSSoftwareSynchronizationGenerate().
-          This function can be called before calling @ref HAL_RCCEx_CRSConfig (for instance in Systick handler)
-            
-@endverbatim
- * @{
- */
-
-/**
-  * @brief  Start automatic synchronization for polling mode
-  * @param  pInit Pointer on RCC_CRSInitTypeDef structure
-  * @retval None
-  */
-void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit)
-{
-  uint32_t value = 0;
-  
-  /* Check the parameters */
-  assert_param(IS_RCC_CRS_SYNC_DIV(pInit->Prescaler));
-  assert_param(IS_RCC_CRS_SYNC_SOURCE(pInit->Source));
-  assert_param(IS_RCC_CRS_SYNC_POLARITY(pInit->Polarity));
-  assert_param(IS_RCC_CRS_RELOADVALUE(pInit->ReloadValue));
-  assert_param(IS_RCC_CRS_ERRORLIMIT(pInit->ErrorLimitValue));
-  assert_param(IS_RCC_CRS_HSI48CALIBRATION(pInit->HSI48CalibrationValue));
-
-  /* CONFIGURATION */
-
-  /* Before configuration, reset CRS registers to their default values*/
-  __HAL_RCC_CRS_FORCE_RESET();
-  __HAL_RCC_CRS_RELEASE_RESET();
-
-  /* Set the SYNCDIV[2:0] bits according to Prescaler value */
-  /* Set the SYNCSRC[1:0] bits according to Source value */
-  /* Set the SYNCSPOL bit according to Polarity value */
-  value = (pInit->Prescaler | pInit->Source | pInit->Polarity);
-  /* Set the RELOAD[15:0] bits according to ReloadValue value */
-  value |= pInit->ReloadValue;
-  /* Set the FELIM[7:0] bits according to ErrorLimitValue value */
-  value |= (pInit->ErrorLimitValue << CRS_CFGR_FELIM_BITNUMBER);
-  WRITE_REG(CRS->CFGR, value);
-
-  /* Adjust HSI48 oscillator smooth trimming */
-  /* Set the TRIM[5:0] bits according to RCC_CRS_HSI48CalibrationValue value */
-  MODIFY_REG(CRS->CR, CRS_CR_TRIM, (pInit->HSI48CalibrationValue << CRS_CR_TRIM_BITNUMBER));
-  
-  /* START AUTOMATIC SYNCHRONIZATION*/
-  
-  /* Enable Automatic trimming & Frequency error counter */
-  SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN | CRS_CR_CEN);
-}
-
-/**
-  * @brief  Generate the software synchronization event
-  * @retval None
-  */
-void HAL_RCCEx_CRSSoftwareSynchronizationGenerate(void)
-{
-  SET_BIT(CRS->CR, CRS_CR_SWSYNC);
-}
-
-/**
-  * @brief  Return synchronization info 
-  * @param  pSynchroInfo Pointer on RCC_CRSSynchroInfoTypeDef structure
-  * @retval None
-  */
-void HAL_RCCEx_CRSGetSynchronizationInfo(RCC_CRSSynchroInfoTypeDef *pSynchroInfo)
-{
-  /* Check the parameter */
-  assert_param(pSynchroInfo != NULL);
-  
-  /* Get the reload value */
-  pSynchroInfo->ReloadValue = (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD));
-  
-  /* Get HSI48 oscillator smooth trimming */
-  pSynchroInfo->HSI48CalibrationValue = (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_BITNUMBER);
-
-  /* Get Frequency error capture */
-  pSynchroInfo->FreqErrorCapture = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_BITNUMBER);
-
-  /* Get Frequency error direction */
-  pSynchroInfo->FreqErrorDirection = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FEDIR));
-}
-
-/**
-* @brief Wait for CRS Synchronization status.
-* @param Timeout  Duration of the timeout
-* @note  Timeout is based on the maximum time to receive a SYNC event based on synchronization
-*        frequency.
-* @note    If Timeout set to HAL_MAX_DELAY, HAL_TIMEOUT will be never returned.
-* @retval Combination of Synchronization status
-*          This parameter can be a combination of the following values:
-*            @arg @ref RCC_CRS_TIMEOUT
-*            @arg @ref RCC_CRS_SYNCOK
-*            @arg @ref RCC_CRS_SYNCWARN
-*            @arg @ref RCC_CRS_SYNCERR
-*            @arg @ref RCC_CRS_SYNCMISS
-*            @arg @ref RCC_CRS_TRIMOVF
-*/
-uint32_t HAL_RCCEx_CRSWaitSynchronization(uint32_t Timeout)
-{
-  uint32_t crsstatus = RCC_CRS_NONE;
-  uint32_t tickstart = 0U;
-  
-  /* Get timeout */
-  tickstart = HAL_GetTick();
-  
-  /* Wait for CRS flag or timeout detection */
-  do
-  {
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-      {
-        crsstatus = RCC_CRS_TIMEOUT;
-      }
-    }
-    /* Check CRS SYNCOK flag  */
-    if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCOK))
-    {
-      /* CRS SYNC event OK */
-      crsstatus |= RCC_CRS_SYNCOK;
-    
-      /* Clear CRS SYNC event OK bit */
-      __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCOK);
-    }
-    
-    /* Check CRS SYNCWARN flag  */
-    if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCWARN))
-    {
-      /* CRS SYNC warning */
-      crsstatus |= RCC_CRS_SYNCWARN;
-    
-      /* Clear CRS SYNCWARN bit */
-      __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCWARN);
-    }
-    
-    /* Check CRS TRIM overflow flag  */
-    if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_TRIMOVF))
-    {
-      /* CRS SYNC Error */
-      crsstatus |= RCC_CRS_TRIMOVF;
-    
-      /* Clear CRS Error bit */
-      __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_TRIMOVF);
-    }
-    
-    /* Check CRS Error flag  */
-    if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCERR))
-    {
-      /* CRS SYNC Error */
-      crsstatus |= RCC_CRS_SYNCERR;
-    
-      /* Clear CRS Error bit */
-      __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCERR);
-    }
-    
-    /* Check CRS SYNC Missed flag  */
-    if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCMISS))
-    {
-      /* CRS SYNC Missed */
-      crsstatus |= RCC_CRS_SYNCMISS;
-    
-      /* Clear CRS SYNC Missed bit */
-      __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCMISS);
-    }
-    
-    /* Check CRS Expected SYNC flag  */
-    if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_ESYNC))
-    {
-      /* frequency error counter reached a zero value */
-      __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_ESYNC);
-    }
-  } while(RCC_CRS_NONE == crsstatus);
-
-  return crsstatus;
-}
-
-/**
-  * @brief Handle the Clock Recovery System interrupt request.
-  * @retval None
-  */
-void HAL_RCCEx_CRS_IRQHandler(void)
-{
-  uint32_t crserror = RCC_CRS_NONE;
-  /* Get current IT flags and IT sources values */
-  uint32_t itflags = READ_REG(CRS->ISR);
-  uint32_t itsources = READ_REG(CRS->CR);
-
-  /* Check CRS SYNCOK flag  */
-  if(((itflags & RCC_CRS_FLAG_SYNCOK) != RESET) && ((itsources & RCC_CRS_IT_SYNCOK) != RESET))
-  {
-    /* Clear CRS SYNC event OK flag */
-    WRITE_REG(CRS->ICR, CRS_ICR_SYNCOKC);
-
-    /* user callback */
-    HAL_RCCEx_CRS_SyncOkCallback();
-  }
-  /* Check CRS SYNCWARN flag  */
-  else if(((itflags & RCC_CRS_FLAG_SYNCWARN) != RESET) && ((itsources & RCC_CRS_IT_SYNCWARN) != RESET))
-  {
-    /* Clear CRS SYNCWARN flag */
-    WRITE_REG(CRS->ICR, CRS_ICR_SYNCWARNC);
-
-    /* user callback */
-    HAL_RCCEx_CRS_SyncWarnCallback();
-  }
-  /* Check CRS Expected SYNC flag  */
-  else if(((itflags & RCC_CRS_FLAG_ESYNC) != RESET) && ((itsources & RCC_CRS_IT_ESYNC) != RESET))
-  {
-    /* frequency error counter reached a zero value */
-    WRITE_REG(CRS->ICR, CRS_ICR_ESYNCC);
-
-    /* user callback */
-    HAL_RCCEx_CRS_ExpectedSyncCallback();
-  }
-  /* Check CRS Error flags  */
-  else
-  {
-    if(((itflags & RCC_CRS_FLAG_ERR) != RESET) && ((itsources & RCC_CRS_IT_ERR) != RESET))
-    {
-      if((itflags & RCC_CRS_FLAG_SYNCERR) != RESET)
-      {
-        crserror |= RCC_CRS_SYNCERR;
-      }
-      if((itflags & RCC_CRS_FLAG_SYNCMISS) != RESET)
-      {
-        crserror |= RCC_CRS_SYNCMISS;
-      }
-      if((itflags & RCC_CRS_FLAG_TRIMOVF) != RESET)
-      {
-        crserror |= RCC_CRS_TRIMOVF;
-      }
-
-      /* Clear CRS Error flags */
-      WRITE_REG(CRS->ICR, CRS_ICR_ERRC);
-    
-      /* user error callback */
-      HAL_RCCEx_CRS_ErrorCallback(crserror);
-    }
-  }
-}
-
-/**
-  * @brief  RCCEx Clock Recovery System SYNCOK interrupt callback.
-  * @retval none
-  */
-__weak void HAL_RCCEx_CRS_SyncOkCallback(void)
-{
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the @ref HAL_RCCEx_CRS_SyncOkCallback should be implemented in the user file
-   */
-}
-
-/**
-  * @brief  RCCEx Clock Recovery System SYNCWARN interrupt callback.
-  * @retval none
-  */
-__weak void HAL_RCCEx_CRS_SyncWarnCallback(void)
-{
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the @ref HAL_RCCEx_CRS_SyncWarnCallback should be implemented in the user file
-   */
-}
-
-/**
-  * @brief  RCCEx Clock Recovery System Expected SYNC interrupt callback.
-  * @retval none
-  */
-__weak void HAL_RCCEx_CRS_ExpectedSyncCallback(void)
-{
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the @ref HAL_RCCEx_CRS_ExpectedSyncCallback should be implemented in the user file
-   */
-}
-
-/**
-  * @brief  RCCEx Clock Recovery System Error interrupt callback.
-  * @param  Error Combination of Error status. 
-  *         This parameter can be a combination of the following values:
-  *           @arg @ref RCC_CRS_SYNCERR
-  *           @arg @ref RCC_CRS_SYNCMISS
-  *           @arg @ref RCC_CRS_TRIMOVF
-  * @retval none
-  */
-__weak void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(Error);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the @ref HAL_RCCEx_CRS_ErrorCallback should be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-#endif /* CRS */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_RCC_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rng.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rng.c
deleted file mode 100755
index d368aed7..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rng.c
+++ /dev/null
@@ -1,523 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_rng.c
-  * @author  MCD Application Team
-  * @brief   RNG HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Random Number Generator (RNG) peripheral:
-  *           + Initialization/de-initialization functions
-  *           + Peripheral Control functions 
-  *           + Peripheral State functions
-  *         
-  @verbatim
-  ==============================================================================
-                     ##### How to use this driver #####
-  ==============================================================================
-  [..]
-      The RNG HAL driver can be used as follows:
-    
-      (#) Enable the RNG controller clock using __HAL_RCC_RNG_CLK_ENABLE() macro.  
-          in HAL_RNG_MspInit().
-      (#) Activate the RNG peripheral using HAL_RNG_Init() function.
-      (#) Wait until the 32 bit Random Number Generator contains a valid 
-          random data using (polling/interrupt) mode.   
-      (#) Get the 32 bit random number using HAL_RNG_GenerateRandomNumber() function.
-  
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_RNG_MODULE_ENABLED
-
-
-#if defined (STM32L052xx) || defined (STM32L053xx) || defined (STM32L062xx) ||  defined (STM32L063xx) || \
-    defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) ||  defined (STM32L083xx)
-
-/** @addtogroup RNG
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private Defines -----------------------------------------------------------*/
-/** @addtogroup RNG_Private
-  * @{
-  */
-#define RNG_TIMEOUT_VALUE     1000U
-/**
-  * @}
-  */ 
-
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private functions prototypes ----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/** @addtogroup RNG_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup RNG_Exported_Functions_Group1
- *  @brief   Initialization and de-initialization functions 
- *
-@verbatim    
- ===============================================================================
-          ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Initialize the RNG according to the specified parameters 
-          in the RNG_InitTypeDef and create the associated handle
-      (+) DeInitialize the RNG peripheral
-      (+) Initialize the RNG MSP
-      (+) DeInitialize RNG MSP 
-
-@endverbatim
-  * @{
-  */
-  
-/**
-  * @brief  Initializes the RNG peripheral and creates the associated handle.
-  * @param  hrng: pointer to a RNG_HandleTypeDef structure.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng)
-{ 
-  /* Check the RNG handle allocation */
-  if(hrng == NULL)
-  {
-    return HAL_ERROR;
-  }
-  assert_param(IS_RNG_ALL_INSTANCE(hrng->Instance));
-  
-  __HAL_LOCK(hrng);
-  
-  if(hrng->State == HAL_RNG_STATE_RESET)
-  {  
-    /* Allocate lock resource and initialize it */
-    hrng->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware */
-    HAL_RNG_MspInit(hrng);
-  }
-  
-  /* Change RNG peripheral state */
-  hrng->State = HAL_RNG_STATE_BUSY;
-
-  /* Enable the RNG Peripheral */
-  __HAL_RNG_ENABLE(hrng);
-
-  /* Initialize the RNG state */
-  hrng->State = HAL_RNG_STATE_READY;
-  
-  __HAL_UNLOCK(hrng);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the RNG peripheral. 
-  * @param  hrng: pointer to a RNG_HandleTypeDef structure.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RNG_DeInit(RNG_HandleTypeDef *hrng)
-{ 
-  /* Check the RNG handle allocation */
-  if(hrng == NULL)
-  {
-    return HAL_ERROR;
-  }
-  /* Disable the RNG Peripheral */
-  CLEAR_BIT(hrng->Instance->CR, RNG_CR_IE | RNG_CR_RNGEN);
-  
-  /* Clear RNG interrupt status flags */
-  CLEAR_BIT(hrng->Instance->SR, RNG_SR_CEIS | RNG_SR_SEIS);
-  
-  /* DeInit the low level hardware */
-  HAL_RNG_MspDeInit(hrng);
-  
-  /* Update the RNG state */
-  hrng->State = HAL_RNG_STATE_RESET; 
-
-  /* Release Lock */
-  __HAL_UNLOCK(hrng);
-  
-  /* Return the function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the RNG MSP.
-  * @param  hrng: pointer to a RNG_HandleTypeDef structure.
-  * @retval None
-  */
-__weak void HAL_RNG_MspInit(RNG_HandleTypeDef *hrng)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrng);
-
-  /* NOTE : This function should not be modified. When the callback is needed,
-            function HAL_RNG_MspInit must be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  DeInitializes the RNG MSP.
-  * @param  hrng: pointer to a RNG_HandleTypeDef structure.
-  * @retval None
-  */
-__weak void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrng);
-
-  /* NOTE : This function should not be modified. When the callback is needed,
-            function HAL_RNG_MspDeInit must be implemented in the user file.
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup RNG_Exported_Functions_Group2
- *  @brief   Peripheral Control functions 
- *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral Control functions #####
- ===============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Get the 32 bit Random number
-      (+) Get the 32 bit Random number with interrupt enabled
-      (+) Handle RNG interrupt request 
-
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Generates a 32-bit random number.
-  * @note   Each time the random number data is read the RNG_FLAG_DRDY flag 
-  *         is automatically cleared.
-  * @param  hrng: pointer to a RNG_HandleTypeDef structure.
-  * @param  random32bit: pointer to generated random number variable if successful.
-  * @retval HAL status
-  */
-
-HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit)
-{
-  uint32_t tickstart = 0U;    
-  HAL_StatusTypeDef status = HAL_OK;
-
-  /* Process Locked */
-  __HAL_LOCK(hrng); 
-  
-  /* Check RNG peripheral state */
-  if(hrng->State == HAL_RNG_STATE_READY)
-  {
-    /* Change RNG peripheral state */  
-    hrng->State = HAL_RNG_STATE_BUSY;  
-
-    /* Get tick */
-    tickstart = HAL_GetTick();
-  
-    /* Check if data register contains valid random data */
-    while(__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
-    {
-      if((HAL_GetTick() - tickstart ) > RNG_TIMEOUT_VALUE)
-      {    
-        hrng->State = HAL_RNG_STATE_ERROR;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hrng);
-      
-        return HAL_TIMEOUT;
-      } 
-    }
-  
-    /* Get a 32bit Random number */
-    hrng->RandomNumber = hrng->Instance->DR;
-    *random32bit = hrng->RandomNumber;
-  
-    hrng->State = HAL_RNG_STATE_READY;
-  }
-  else
-  {
-    status = HAL_ERROR;
-  }
-  
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrng);
-
-  return status;
-}
-
-/**
-  * @brief  Generates a 32-bit random number in interrupt mode.
-  * @param  hrng: pointer to a RNG_HandleTypeDef structure.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber_IT(RNG_HandleTypeDef *hrng)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  
-  /* Process Locked */
-  __HAL_LOCK(hrng);
-  
-  /* Check RNG peripheral state */
-  if(hrng->State == HAL_RNG_STATE_READY)
-  {
-    /* Change RNG peripheral state */  
-    hrng->State = HAL_RNG_STATE_BUSY;  
-  
-    /* Process Unlocked */
-    __HAL_UNLOCK(hrng);
-    
-    /* Enable the RNG Interrupts: Data Ready, Clock error, Seed error */ 
-    __HAL_RNG_ENABLE_IT(hrng);
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hrng);
-    
-    status = HAL_ERROR;
-  }
-  
-  return status;
-}
-
-/**
-  * @brief  Handles RNG interrupt request.
-  * @note   In the case of a clock error, the RNG is no more able to generate 
-  *         random numbers because the PLL48CLK clock is not correct. User has 
-  *         to check that the clock controller is correctly configured to provide
-  *         the RNG clock and clear the CEIS bit using __HAL_RNG_CLEAR_IT(). 
-  *         The clock error has no impact on the previously generated 
-  *         random numbers, and the RNG_DR register contents can be used.
-  * @note   In the case of a seed error, the generation of random numbers is 
-  *         interrupted as long as the SECS bit is '1'. If a number is 
-  *         available in the RNG_DR register, it must not be used because it may 
-  *         not have enough entropy. In this case, it is recommended to clear the 
-  *         SEIS bit using __HAL_RNG_CLEAR_IT(), then disable and enable 
-  *         the RNG peripheral to reinitialize and restart the RNG.
-  * @note   User-written HAL_RNG_ErrorCallback() API is called once whether SEIS
-  *         or CEIS are set.  
-  * @param  hrng: pointer to a RNG_HandleTypeDef structure.
-  * @retval None
-
-  */
-void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng)
-{
-  /* RNG clock error interrupt occurred */
-  if((__HAL_RNG_GET_IT(hrng, RNG_IT_CEI) != RESET) ||  (__HAL_RNG_GET_IT(hrng, RNG_IT_SEI) != RESET))
-  { 
-    /* Change RNG peripheral state */
-    hrng->State = HAL_RNG_STATE_ERROR;
-  
-    HAL_RNG_ErrorCallback(hrng);
-    
-    /* Clear the clock error flag */
-    __HAL_RNG_CLEAR_IT(hrng, RNG_IT_CEI|RNG_IT_SEI);
-    
-  }
-  
-  /* Check RNG data ready interrupt occurred */    
-  if(__HAL_RNG_GET_IT(hrng, RNG_IT_DRDY) != RESET)
-  {
-    /* Generate random number once, so disable the IT */
-    __HAL_RNG_DISABLE_IT(hrng);
-    
-    /* Get the 32bit Random number (DRDY flag automatically cleared) */ 
-    hrng->RandomNumber = hrng->Instance->DR;
-    
-    if(hrng->State != HAL_RNG_STATE_ERROR)
-    {
-      /* Change RNG peripheral state */
-      hrng->State = HAL_RNG_STATE_READY; 
-      
-      /* Data Ready callback */ 
-      HAL_RNG_ReadyDataCallback(hrng, hrng->RandomNumber);
-    } 
-  }
-} 
-
-/**
-  * @brief  return generated random number in polling mode (Obsolete).
-  *         Use HAL_RNG_GenerateRandomNumber() API instead.
-  * @param  hrng: pointer to a RNG_HandleTypeDef structure that contains
-  *                the configuration information for RNG.
-  * @retval random value
-  */
-uint32_t HAL_RNG_GetRandomNumber(RNG_HandleTypeDef *hrng)
-{
-  if(HAL_RNG_GenerateRandomNumber(hrng, &(hrng->RandomNumber)) == HAL_OK)
-  {
-    return hrng->RandomNumber; 
-  }
-  else
-  {
-    return 0U;
-  }
-}
-
-
-/**
-  * @brief  Returns a 32-bit random number with interrupt enabled (Obsolete),
-  *         Use HAL_RNG_GenerateRandomNumber_IT() API instead.
-  * @param  hrng: RNG handle
-  * @retval 32-bit random number
-  */
-uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng)
-{
-  uint32_t random32bit = 0U;
-  
-  /* Process locked */
-  __HAL_LOCK(hrng);
-  
-  /* Change RNG peripheral state */  
-  hrng->State = HAL_RNG_STATE_BUSY;  
-  
-  /* Get a 32bit Random number */ 
-  random32bit = hrng->Instance->DR;
-  
-  /* Enable the RNG Interrupts: Data Ready, Clock error, Seed error */ 
-  __HAL_RNG_ENABLE_IT(hrng); 
-  
-  /* Return the 32 bit random number */   
-  return random32bit;
-}
-
-
-
-/**
-  * @brief  Read latest generated random number. 
-  * @param  hrng: pointer to a RNG_HandleTypeDef structure.
-  * @retval random value
-  */
-uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng)
-{
-  return(hrng->RandomNumber);
-}
-
-/**
-  * @brief  Data Ready callback in non-blocking mode. 
-  * @param  hrng: pointer to a RNG_HandleTypeDef structure..
-  * @param  random32bit: generated random value
-  * @retval None
-  */
-__weak void HAL_RNG_ReadyDataCallback(RNG_HandleTypeDef *hrng, uint32_t random32bit)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrng);
-
-  /* NOTE : This function should not be modified. When the callback is needed,
-            function HAL_RNG_ReadyDataCallback must be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  RNG error callbacks.
-  * @param  hrng: pointer to a RNG_HandleTypeDef structure.
-  * @retval None
-  */
-__weak void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrng);
-
-  /* NOTE : This function should not be modified. When the callback is needed,
-            function HAL_RNG_ErrorCallback must be implemented in the user file.
-   */
-}
- 
-/**
-  * @}
-  */
-
-/** @addtogroup RNG_Exported_Functions_Group3
- *  @brief    Peripheral State functions. 
- *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral State functions #####
- ===============================================================================  
-    [..]
-    This subsection permits to get in run-time the status of the peripheral.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Returns the RNG state.
-  * @param  hrng: pointer to a RNG_HandleTypeDef structure.
-  * @retval HAL state
-  */
-HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng)
-{
-  return hrng->State;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /*  if defined (STM32L052xx) || defined (STM32L053xx) || defined (STM32L062xx) ||  defined (STM32L063xx) || \
-           defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) ||  defined (STM32L083xx)         */
-
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc.c
deleted file mode 100755
index ca8490a4..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc.c
+++ /dev/null
@@ -1,1529 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_rtc.c
-  * @author  MCD Application Team
-  * @brief   RTC HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the Real Time Clock (RTC) peripheral:
-  *           + Initialization/de-initialization functions
-  *           + I/O operation functions
-  *           + Peripheral Control functions
-  *           + Peripheral State functions
-  *         
-  @verbatim
-  ==============================================================================
-              ##### Backup Domain Operating Condition #####
-  ==============================================================================
-  [..] As long as the supply voltage remains in the operating range, 
-       the RTC never stops, regardless of the device status (Run mode, 
-       low power modes or under reset).
-
-                   ##### Backup Domain Reset #####
-  ==================================================================
-  [..] The backup domain reset sets all RTC registers and the RCC_CSR register 
-       to their reset values.
-  [..] A backup domain reset is generated when one of the following events occurs:
-    (+) Software reset, triggered by setting the RTCRST bit in the 
-        RCC Control Status register (RCC_CSR).
-    (+) Power reset (BOR/POR/PDR).
-
-                   ##### Backup Domain Access #####
-  ==================================================================
-  [..] After reset, the backup domain (RTC registers and RTC backup data registers) 
-       is protected against possible unwanted write accesses. 
-  [..] To enable access to the RTC Domain and RTC registers, proceed as follows:
-    (+) Enable the Power Controller (PWR) APB1 interface clock using the
-        __HAL_RCC_PWR_CLK_ENABLE() function.
-    (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
-    (+) Select the RTC clock source using the __HAL_RCC_RTC_CONFIG() function.
-    (+) Enable RTC Clock using the __HAL_RCC_RTC_ENABLE() function.
-
-
-                  ##### How to use RTC Driver #####
- ===================================================================
-  [..]
-    (+) Enable the RTC domain access (see description in the section above).
-    (+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour
-        format using the HAL_RTC_Init() function.
-
-  *** Time and Date configuration ***
-  ===================================
-  [..] 
-    (+) To configure the RTC Calendar (Time and Date) use the HAL_RTC_SetTime()
-        and HAL_RTC_SetDate() functions.
-    (+) To read the RTC Calendar, use the HAL_RTC_GetTime() and HAL_RTC_GetDate() functions.
-
-  *** Alarm configuration ***
-  ===========================
-  [..]
-    (+) To configure the RTC Alarm use the HAL_RTC_SetAlarm() function.
-            You can also configure the RTC Alarm with interrupt mode using the 
-            HAL_RTC_SetAlarm_IT() function.
-    (+) To read the RTC Alarm, use the HAL_RTC_GetAlarm() function.
-
-                  ##### RTC and low power modes #####
-  ==================================================================
-  [..] The MCU can be woken up from a low power mode by an RTC alternate
-       function.
-  [..] The RTC alternate functions are the RTC alarms (Alarm A and Alarm B),
-       RTC wakeup, RTC tamper event detection and RTC time stamp event detection.
-       These RTC alternate functions can wake up the system from the Stop and 
-       Standby low power modes.
-  [..] The system can also wake up from low power modes without depending
-       on an external interrupt (Auto-wakeup mode), by using the RTC alarm
-       or the RTC wakeup events.
-  [..] The RTC provides a programmable time base for waking up from the
-       Stop or Standby mode at regular intervals.
-       Wakeup from STOP and STANDBY modes is possible only when the RTC clock source
-       is LSE or LSI.
-
-   @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-
-/** @addtogroup RTC
-  * @brief RTC HAL module driver
-  * @{
-  */
-
-#ifdef HAL_RTC_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/** @addtogroup RTC_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup RTC_Exported_Functions_Group1
- *  @brief    Initialization and Configuration functions 
- *
-@verbatim
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-   [..] This section provides functions allowing to initialize and configure the 
-         RTC Prescaler (Synchronous and Asynchronous), RTC Hour format, disable 
-         RTC registers Write protection, enter and exit the RTC initialization mode,
-         RTC registers synchronization check and reference clock detection enable.
-         (#) The RTC Prescaler is programmed to generate the RTC 1Hz time base.
-             It is split into 2 programmable prescalers to minimize power consumption.
-             (++) A 7-bit asynchronous prescaler and a 15-bit synchronous prescaler.
-             (++) When both prescalers are used, it is recommended to configure the 
-                 asynchronous prescaler to a high value to minimize power consumption.
-         (#) All RTC registers are Write protected. Writing to the RTC registers
-             is enabled by writing a key into the Write Protection register, RTC_WPR.
-         (#) To configure the RTC Calendar, user application should enter 
-             initialization mode. In this mode, the calendar counter is stopped
-             and its value can be updated. When the initialization sequence is 
-             complete, the calendar restarts counting after 4 RTCCLK cycles.
-         (#) To read the calendar through the shadow registers after Calendar 
-             initialization, calendar update or after wakeup from low power modes
-             the software must first clear the RSF flag. The software must then
-             wait until it is set again before reading the calendar, which means
-             that the calendar registers have been correctly copied into the
-             RTC_TR and RTC_DR shadow registers.The HAL_RTC_WaitForSynchro() function 
-             implements the above software sequence (RSF clear and RSF check).
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initialize the RTC peripheral
-  * @param  hrtc: RTC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc)
-{
-  /* Check the RTC peripheral state */
-  if(hrtc == NULL)
-  {
-     return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance));
-  assert_param(IS_RTC_HOUR_FORMAT(hrtc->Init.HourFormat));
-  assert_param(IS_RTC_ASYNCH_PREDIV(hrtc->Init.AsynchPrediv));
-  assert_param(IS_RTC_SYNCH_PREDIV(hrtc->Init.SynchPrediv));
-  assert_param(IS_RTC_OUTPUT(hrtc->Init.OutPut));
-  assert_param(IS_RTC_OUTPUT_REMAP(hrtc->Init.OutPutRemap));
-  assert_param(IS_RTC_OUTPUT_POL(hrtc->Init.OutPutPolarity));
-  assert_param(IS_RTC_OUTPUT_TYPE(hrtc->Init.OutPutType));
-  
-  if(hrtc->State == HAL_RTC_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hrtc->Lock = HAL_UNLOCKED;
-
-    /* Initialize RTC MSP */
-    HAL_RTC_MspInit(hrtc);
-  }
-
-  /* Set RTC state */
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Set Initialization mode */
-  if(RTC_EnterInitMode(hrtc) != HAL_OK)
-  {
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-    /* Set RTC state */
-    hrtc->State = HAL_RTC_STATE_ERROR;
-
-    return HAL_ERROR;
-  }
-  else
-  {
-    /* Clear RTC_CR FMT, OSEL and POL Bits */
-    hrtc->Instance->CR &= ((uint32_t)~(RTC_CR_FMT | RTC_CR_OSEL | RTC_CR_POL));
-    /* Set RTC_CR register */
-    hrtc->Instance->CR |= (uint32_t)(hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity);
-
-    /* Configure the RTC PRER */
-    hrtc->Instance->PRER = (uint32_t)(hrtc->Init.SynchPrediv);
-    hrtc->Instance->PRER |= (uint32_t)(hrtc->Init.AsynchPrediv << 16U);
-
-    /* Exit Initialization mode */
-    hrtc->Instance->ISR &= ((uint32_t)~RTC_ISR_INIT);
-
-    hrtc->Instance->OR &= (uint32_t)~(RTC_OR_ALARMOUTTYPE | RTC_OR_OUT_RMP);
-    hrtc->Instance->OR |= (uint32_t)(hrtc->Init.OutPutType | hrtc->Init.OutPutRemap);
-
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-    /* Set RTC state */
-    hrtc->State = HAL_RTC_STATE_READY;
-
-    return HAL_OK;
-  }
-}
-
-/**
-  * @brief  DeInitialize the RTC peripheral.
-  * @param  hrtc: RTC handle
-  * @note   This function doesn't reset the RTC Backup Data registers.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance));
-
-  /* Set RTC state */
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Set Initialization mode */
-  if(RTC_EnterInitMode(hrtc) != HAL_OK)
-  {
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-    /* Set RTC state */
-    hrtc->State = HAL_RTC_STATE_ERROR;
-
-    return HAL_ERROR;
-  }
-  else
-  {
-    /* Reset TR, DR and CR registers */
-    hrtc->Instance->TR = (uint32_t)0x00000000U;
-    hrtc->Instance->DR = ((uint32_t)(RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0));
-    /* Reset All CR bits except CR[2:0] */
-    hrtc->Instance->CR &= RTC_CR_WUCKSEL;
-
-    tickstart = HAL_GetTick();
-
-    /* Wait till WUTWF flag is set and if Time out is reached exit */
-    while(((hrtc->Instance->ISR) & RTC_ISR_WUTWF) == (uint32_t)RESET)
-    {
-      if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-        /* Set RTC state */
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Reset all RTC CR register bits */
-    hrtc->Instance->CR &= (uint32_t)0x00000000U;
-    hrtc->Instance->WUTR = RTC_WUTR_WUT;
-    hrtc->Instance->PRER = ((uint32_t)(RTC_PRER_PREDIV_A | 0x000000FFU));
-    hrtc->Instance->ALRMAR = (uint32_t)0x00000000U;
-    hrtc->Instance->ALRMBR = (uint32_t)0x00000000U;
-    hrtc->Instance->SHIFTR = (uint32_t)0x00000000U;
-    hrtc->Instance->CALR = (uint32_t)0x00000000U;
-    hrtc->Instance->ALRMASSR = (uint32_t)0x00000000U;
-    hrtc->Instance->ALRMBSSR = (uint32_t)0x00000000U;
-
-    /* Reset ISR register and exit initialization mode */
-    hrtc->Instance->ISR = (uint32_t)0x00000000U;
-
-    /* Reset Tamper configuration register */
-    hrtc->Instance->TAMPCR = 0x00000000U;
-
-    /* Reset Option register */
-    hrtc->Instance->OR = 0x00000000U;
-
-    /* If  RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
-    if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
-    {
-      if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);  
-
-        hrtc->State = HAL_RTC_STATE_ERROR;
-
-        return HAL_ERROR;
-      }
-    }
-  }
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* De-Initialize RTC MSP */
-  HAL_RTC_MspDeInit(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_RESET;
-  
-  /* Release Lock */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initialize the RTC MSP.
-  * @param  hrtc: RTC handle  
-  * @retval None
-  */
-__weak void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTC_MspInit could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  DeInitialize the RTC MSP.
-  * @param  hrtc: RTC handle 
-  * @retval None
-  */
-__weak void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTC_MspDeInit could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup RTC_Exported_Functions_Group2
- *  @brief   RTC Time and Date functions
- *
-@verbatim
- ===============================================================================
-                 ##### RTC Time and Date functions #####
- ===============================================================================
- 
- [..] This section provides functions allowing to configure Time and Date features
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Set RTC current time.
-  * @param  hrtc: RTC handle
-  * @param  sTime: Pointer to Time structure
-  * @param  Format: Specifies the format of the entered parameters.
-  *          This parameter can be one of the following values:
-  *            @arg RTC_FORMAT_BIN: Binary data format 
-  *            @arg RTC_FORMAT_BCD: BCD data format
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
-{
-  uint32_t tmpreg = 0U;
-
- /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-  assert_param(IS_RTC_DAYLIGHT_SAVING(sTime->DayLightSaving));
-  assert_param(IS_RTC_STORE_OPERATION(sTime->StoreOperation));
-
-  /* Process Locked */ 
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  if(Format == RTC_FORMAT_BIN)
-  {
-    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
-    {
-      assert_param(IS_RTC_HOUR12(sTime->Hours));
-      assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
-    }
-    else
-    {
-      sTime->TimeFormat = 0x00U;
-      assert_param(IS_RTC_HOUR24(sTime->Hours));
-    }
-    assert_param(IS_RTC_MINUTES(sTime->Minutes));
-    assert_param(IS_RTC_SECONDS(sTime->Seconds));
-
-    tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(sTime->Hours) << 16U) | \
-                        ((uint32_t)RTC_ByteToBcd2(sTime->Minutes) << 8U) | \
-                        ((uint32_t)RTC_ByteToBcd2(sTime->Seconds)) | \
-                        (((uint32_t)sTime->TimeFormat) << 16U));
-  }
-  else
-  {
-    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
-    {
-      tmpreg = RTC_Bcd2ToByte(sTime->Hours);
-      assert_param(IS_RTC_HOUR12(tmpreg));
-      assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
-    }
-    else
-    {
-      sTime->TimeFormat = 0x00U;
-      assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sTime->Hours)));
-    }
-    assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sTime->Minutes)));
-    assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sTime->Seconds)));
-    tmpreg = (((uint32_t)(sTime->Hours) << 16U) | \
-              ((uint32_t)(sTime->Minutes) << 8U) | \
-              ((uint32_t)sTime->Seconds) | \
-              ((uint32_t)(sTime->TimeFormat) << 16U));
-  }
-  UNUSED(tmpreg);
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Set Initialization mode */
-  if(RTC_EnterInitMode(hrtc) != HAL_OK)
-  {
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-    /* Set RTC state */
-    hrtc->State = HAL_RTC_STATE_ERROR;
-
-    /* Process Unlocked */ 
-    __HAL_UNLOCK(hrtc);
-
-    return HAL_ERROR;
-  }
-  else
-  {
-    /* Set the RTC_TR register */
-    hrtc->Instance->TR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK);
-
-    /* Clear the bits to be configured */
-    hrtc->Instance->CR &= ((uint32_t)~RTC_CR_BCK);
-
-    /* Configure the RTC_CR register */
-    hrtc->Instance->CR |= (uint32_t)(sTime->DayLightSaving | sTime->StoreOperation);
-
-    /* Exit Initialization mode */
-    hrtc->Instance->ISR &= ((uint32_t)~RTC_ISR_INIT);
-
-    /* If  CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
-    if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
-    {
-      if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-        hrtc->State = HAL_RTC_STATE_ERROR;
-
-        /* Process Unlocked */ 
-        __HAL_UNLOCK(hrtc);
-
-        return HAL_ERROR;
-      }
-    }
-
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-    
-   hrtc->State = HAL_RTC_STATE_READY;
-
-   __HAL_UNLOCK(hrtc); 
-
-   return HAL_OK;
-  }
-}
-
-/**
-  * @brief  Get RTC current time.
-  * @param  hrtc: RTC handle
-  * @param  sTime: Pointer to Time structure with Hours, Minutes and Seconds fields returned 
-  *                with input format (BIN or BCD), also SubSeconds field returning the
-  *                RTC_SSR register content and SecondFraction field the Synchronous pre-scaler
-  *                factor to be used for second fraction ratio computation.
-  * @param  Format: Specifies the format of the entered parameters.
-  *          This parameter can be one of the following values:
-  *            @arg RTC_FORMAT_BIN: Binary data format 
-  *            @arg RTC_FORMAT_BCD: BCD data format
-  * @note  You can use SubSeconds and SecondFraction (sTime structure fields returned) to convert SubSeconds
-  *        value in second fraction ratio with time unit following generic formula:
-  *        Second fraction ratio * time_unit= [(SecondFraction-SubSeconds)/(SecondFraction+1)] * time_unit
-  *        This conversion can be performed only if no shift operation is pending (ie. SHFP=0) when PREDIV_S >= SS
-  * @note  You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values 
-  *        in the higher-order calendar shadow registers to ensure consistency between the time and date values.
-  *        Reading RTC current time locks the values in calendar shadow registers until Current date is read
-  *        to ensure consistency between the time and date values.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-
-  /* Get subseconds structure field from the corresponding register*/
-  sTime->SubSeconds = (uint32_t)(hrtc->Instance->SSR);
-
-  /* Get SecondFraction structure field from the corresponding register field*/
-  sTime->SecondFraction = (uint32_t)(hrtc->Instance->PRER & RTC_PRER_PREDIV_S);
-  
-  /* Get the TR register */
-  tmpreg = (uint32_t)(hrtc->Instance->TR & RTC_TR_RESERVED_MASK);
-
-  /* Fill the structure fields with the read parameters */
-  sTime->Hours = (uint8_t)((tmpreg & (RTC_TR_HT | RTC_TR_HU)) >> 16U);
-  sTime->Minutes = (uint8_t)((tmpreg & (RTC_TR_MNT | RTC_TR_MNU)) >>8U);
-  sTime->Seconds = (uint8_t)(tmpreg & (RTC_TR_ST | RTC_TR_SU));
-  sTime->TimeFormat = (uint8_t)((tmpreg & (RTC_TR_PM)) >> 16U);
-
-  /* Check the input parameters format */
-  if(Format == RTC_FORMAT_BIN)
-  {
-    /* Convert the time structure parameters to Binary format */
-    sTime->Hours = (uint8_t)RTC_Bcd2ToByte(sTime->Hours);
-    sTime->Minutes = (uint8_t)RTC_Bcd2ToByte(sTime->Minutes);
-    sTime->Seconds = (uint8_t)RTC_Bcd2ToByte(sTime->Seconds);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set RTC current date.
-  * @param  hrtc: RTC handle
-  * @param  sDate: Pointer to date structure
-  * @param  Format: specifies the format of the entered parameters.
-  *          This parameter can be one of the following values:
-  *            @arg RTC_FORMAT_BIN: Binary data format 
-  *            @arg RTC_FORMAT_BCD: BCD data format
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format)
-{
-  uint32_t datetmpreg = 0U;
-
- /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-
- /* Process Locked */
- __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  if((Format == RTC_FORMAT_BIN) && ((sDate->Month & 0x10U) == 0x10U))
-  {
-    sDate->Month = (uint8_t)((sDate->Month & (uint8_t)~(0x10U)) + (uint8_t)0x0AU);
-  }
-
-  assert_param(IS_RTC_WEEKDAY(sDate->WeekDay));
-
-  if(Format == RTC_FORMAT_BIN)
-  {
-    assert_param(IS_RTC_YEAR(sDate->Year));
-    assert_param(IS_RTC_MONTH(sDate->Month));
-    assert_param(IS_RTC_DATE(sDate->Date));
-
-   datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << 16U) | \
-                 ((uint32_t)RTC_ByteToBcd2(sDate->Month) << 8U) | \
-                 ((uint32_t)RTC_ByteToBcd2(sDate->Date)) | \
-                 ((uint32_t)sDate->WeekDay << 13U));
-  }
-  else
-  {
-    assert_param(IS_RTC_YEAR(RTC_Bcd2ToByte(sDate->Year)));
-    datetmpreg = RTC_Bcd2ToByte(sDate->Month);
-    assert_param(IS_RTC_MONTH(datetmpreg));
-    datetmpreg = RTC_Bcd2ToByte(sDate->Date);
-    assert_param(IS_RTC_DATE(datetmpreg));
-
-    datetmpreg = ((((uint32_t)sDate->Year) << 16U) | \
-                  (((uint32_t)sDate->Month) << 8U) | \
-                  ((uint32_t)sDate->Date) | \
-                  (((uint32_t)sDate->WeekDay) << 13U));
-  }
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Set Initialization mode */
-  if(RTC_EnterInitMode(hrtc) != HAL_OK)
-  {
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-    /* Set RTC state*/
-    hrtc->State = HAL_RTC_STATE_ERROR;
-
-    /* Process Unlocked */ 
-    __HAL_UNLOCK(hrtc);
-
-    return HAL_ERROR;
-  }
-  else
-  {
-    /* Set the RTC_DR register */
-    hrtc->Instance->DR = (uint32_t)(datetmpreg & RTC_DR_RESERVED_MASK);
-
-    /* Exit Initialization mode */
-    hrtc->Instance->ISR &= ((uint32_t)~RTC_ISR_INIT);
-
-    /* If  CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
-    if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
-    {
-      if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);  
-
-        hrtc->State = HAL_RTC_STATE_ERROR;
-
-        /* Process Unlocked */ 
-        __HAL_UNLOCK(hrtc);
-
-        return HAL_ERROR;
-      }
-    }
-
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-    hrtc->State = HAL_RTC_STATE_READY ;
-
-    /* Process Unlocked */ 
-    __HAL_UNLOCK(hrtc);
-
-    return HAL_OK;
-  }
-}
-
-/**
-  * @brief  Get RTC current date.
-  * @param  hrtc: RTC handle
-  * @param  sDate: Pointer to Date structure
-  * @param  Format: Specifies the format of the entered parameters.
-  *          This parameter can be one of the following values:
-  *            @arg RTC_FORMAT_BIN:  Binary data format 
-  *            @arg RTC_FORMAT_BCD:  BCD data format
-  * @note  You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values 
-  *        in the higher-order calendar shadow registers to ensure consistency between the time and date values.
-  *        Reading RTC current time locks the values in calendar shadow registers until Current date is read.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format)
-{
-  uint32_t datetmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-
-  /* Get the DR register */
-  datetmpreg = (uint32_t)(hrtc->Instance->DR & RTC_DR_RESERVED_MASK);
-
-  /* Fill the structure fields with the read parameters */
-  sDate->Year = (uint8_t)((datetmpreg & (RTC_DR_YT | RTC_DR_YU)) >> 16U);
-  sDate->Month = (uint8_t)((datetmpreg & (RTC_DR_MT | RTC_DR_MU)) >> 8U);
-  sDate->Date = (uint8_t)(datetmpreg & (RTC_DR_DT | RTC_DR_DU));
-  sDate->WeekDay = (uint8_t)((datetmpreg & (RTC_DR_WDU)) >> 13U); 
-
-  /* Check the input parameters format */
-  if(Format == RTC_FORMAT_BIN)
-  {
-    /* Convert the date structure parameters to Binary format */
-    sDate->Year = (uint8_t)RTC_Bcd2ToByte(sDate->Year);
-    sDate->Month = (uint8_t)RTC_Bcd2ToByte(sDate->Month);
-    sDate->Date = (uint8_t)RTC_Bcd2ToByte(sDate->Date);
-  }
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup RTC_Exported_Functions_Group3
- *  @brief   RTC Alarm functions
- *
-@verbatim   
- ===============================================================================
-                 ##### RTC Alarm functions #####
- ===============================================================================  
- 
- [..] This section provides functions allowing to configure Alarm feature
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Set the specified RTC Alarm.
-  * @param  hrtc: RTC handle
-  * @param  sAlarm: Pointer to Alarm structure
-  * @param  Format: Specifies the format of the entered parameters.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_FORMAT_BIN: Binary data format 
-  *             @arg RTC_FORMAT_BCD: BCD data format
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format)
-{
-  uint32_t tickstart = 0U;
-  uint32_t tmpreg = 0U, subsecondtmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-  assert_param(IS_RTC_ALARM(sAlarm->Alarm));
-  assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask));
-  assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel));
-  assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds));
-  assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  if(Format == RTC_FORMAT_BIN)
-  {
-    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
-    {
-      assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours));
-      assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
-    }
-    else
-    {
-      sAlarm->AlarmTime.TimeFormat = 0x00U;
-      assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours));
-    }
-    assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes));
-    assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds));
-
-    if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
-    {
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay));
-    }
-    else
-    {
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay));
-    }
-
-    tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16U) | \
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8U) | \
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
-              ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24U) | \
-              ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
-              ((uint32_t)sAlarm->AlarmMask));
-  }
-  else
-  {
-    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
-    {
-      tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
-      assert_param(IS_RTC_HOUR12(tmpreg));
-      assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
-    }
-    else
-    {
-      sAlarm->AlarmTime.TimeFormat = 0x00U;
-      assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
-    }
-
-    assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes)));
-    assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds)));
-
-    if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
-    {
-      tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg));
-    }
-    else
-    {
-      tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg));
-    }
-
-    tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16U) | \
-              ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8U) | \
-              ((uint32_t) sAlarm->AlarmTime.Seconds) | \
-              ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
-              ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24U) | \
-              ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
-              ((uint32_t)sAlarm->AlarmMask));   
-  }
-
-  /* Configure the Alarm A or Alarm B Sub Second registers */
-  subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask));
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Configure the Alarm register */
-  if(sAlarm->Alarm == RTC_ALARM_A)
-  {
-    /* Disable the Alarm A interrupt */
-    __HAL_RTC_ALARMA_DISABLE(hrtc);
-
-    /* In case of interrupt mode is used, the interrupt source must disabled */
-    __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA);
-
-    tickstart = HAL_GetTick();
-    /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
-    while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
-    {
-      if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-        
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-        /* Process Unlocked */ 
-        __HAL_UNLOCK(hrtc);
-
-        return HAL_TIMEOUT;
-      }
-    }
-
-    hrtc->Instance->ALRMAR = (uint32_t)tmpreg;
-    /* Configure the Alarm A Sub Second register */
-    hrtc->Instance->ALRMASSR = subsecondtmpreg;
-    /* Configure the Alarm state: Enable Alarm */
-    __HAL_RTC_ALARMA_ENABLE(hrtc);
-  }
-  else
-  {
-    /* Disable the Alarm B interrupt */
-    __HAL_RTC_ALARMB_DISABLE(hrtc);
-
-    /* In case of interrupt mode is used, the interrupt source must disabled */
-    __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRB);
-
-    tickstart = HAL_GetTick();
-    /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */
-    while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET)
-    {
-      if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hrtc);
-
-        return HAL_TIMEOUT;
-      }
-    }
-
-    hrtc->Instance->ALRMBR = (uint32_t)tmpreg;
-    /* Configure the Alarm B Sub Second register */
-    hrtc->Instance->ALRMBSSR = subsecondtmpreg;
-    /* Configure the Alarm state: Enable Alarm */
-    __HAL_RTC_ALARMB_ENABLE(hrtc);
-  }
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set the specified RTC Alarm with Interrupt.
-  * @param  hrtc: RTC handle
-  * @param  sAlarm: Pointer to Alarm structure
-  * @param  Format: Specifies the format of the entered parameters.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_FORMAT_BIN: Binary data format 
-  *             @arg RTC_FORMAT_BCD: BCD data format
-  * @note   The Alarm register can only be written when the corresponding Alarm
-  *         is disabled (Use the HAL_RTC_DeactivateAlarm()).   
-  * @note   The HAL_RTC_SetTime() must be called before enabling the Alarm feature.   
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format)
-{
-  uint32_t tickstart = 0U;
-  uint32_t tmpreg = 0U, subsecondtmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-  assert_param(IS_RTC_ALARM(sAlarm->Alarm));
-  assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask));
-  assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel));
-  assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds));
-  assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask));
-
-  /* Process Locked */ 
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  if(Format == RTC_FORMAT_BIN)
-  {
-    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
-    {
-      assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours));
-      assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
-    }
-    else
-    {
-      sAlarm->AlarmTime.TimeFormat = 0x00U;
-      assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours));
-    }
-    assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes));
-    assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds));
-
-    if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
-    {
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay));
-    }
-    else
-    {
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay));
-    }
-    tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16U) | \
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8U) | \
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
-              ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24U) | \
-              ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
-              ((uint32_t)sAlarm->AlarmMask));
-  }
-  else
-  {
-    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
-    {
-      tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
-      assert_param(IS_RTC_HOUR12(tmpreg));
-      assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
-    } 
-    else
-    {
-      sAlarm->AlarmTime.TimeFormat = 0x00U;
-      assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
-    }
-
-    assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes)));
-    assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds)));
-    
-    if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
-    {
-      tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg));
-    }
-    else
-    {
-      tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg));
-    }
-    tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16U) | \
-              ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8U) | \
-              ((uint32_t) sAlarm->AlarmTime.Seconds) | \
-              ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
-              ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24U) | \
-              ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
-              ((uint32_t)sAlarm->AlarmMask));     
-  }
-  /* Configure the Alarm A or Alarm B Sub Second registers */
-  subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask));
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Configure the Alarm register */
-  if(sAlarm->Alarm == RTC_ALARM_A)
-  {
-    /* Disable the Alarm A interrupt */
-    __HAL_RTC_ALARMA_DISABLE(hrtc);
-    
-    /* Clear flag alarm A */
-    __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
-
-    tickstart = HAL_GetTick();
-    /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
-    while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
-    {
-      if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-        hrtc->State = HAL_RTC_STATE_TIMEOUT; 
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hrtc);
-
-        return HAL_TIMEOUT;
-      }
-    }
-
-    hrtc->Instance->ALRMAR = (uint32_t)tmpreg;
-    /* Configure the Alarm A Sub Second register */
-    hrtc->Instance->ALRMASSR = subsecondtmpreg;
-    /* Configure the Alarm state: Enable Alarm */
-    __HAL_RTC_ALARMA_ENABLE(hrtc);
-    /* Configure the Alarm interrupt */
-    __HAL_RTC_ALARM_ENABLE_IT(hrtc,RTC_IT_ALRA);
-  }
-  else
-  {
-    /* Disable the Alarm B interrupt */
-    __HAL_RTC_ALARMB_DISABLE(hrtc);
-    
-    /* Clear flag alarm B */
-    __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
-
-    tickstart = HAL_GetTick();
-    /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */
-    while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET)
-    {
-      if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hrtc);
-
-        return HAL_TIMEOUT;
-      }
-    }
-
-    hrtc->Instance->ALRMBR = (uint32_t)tmpreg;
-    /* Configure the Alarm B Sub Second register */
-    hrtc->Instance->ALRMBSSR = subsecondtmpreg;
-    /* Configure the Alarm state: Enable Alarm */
-    __HAL_RTC_ALARMB_ENABLE(hrtc);
-    /* Configure the Alarm interrupt */
-    __HAL_RTC_ALARM_ENABLE_IT(hrtc, RTC_IT_ALRB);
-  }
-
-  /* RTC Alarm Interrupt Configuration: EXTI configuration */
-  __HAL_RTC_ALARM_EXTI_ENABLE_IT();
-
-  __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE();
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_READY; 
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Deactivate the specified RTC Alarm.
-  * @param  hrtc: RTC handle
-  * @param  Alarm: Specifies the Alarm.
-  *          This parameter can be one of the following values:
-  *            @arg RTC_ALARM_A:  AlarmA
-  *            @arg RTC_ALARM_B:  AlarmB
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_ALARM(Alarm));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  if(Alarm == RTC_ALARM_A)
-  {
-    /* AlarmA */
-    __HAL_RTC_ALARMA_DISABLE(hrtc);
-
-    /* In case of interrupt mode is used, the interrupt source must disabled */
-    __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA);
-
-    tickstart = HAL_GetTick();
-
-    /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */
-    while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
-    {
-      if( (HAL_GetTick()  - tickstart ) > RTC_TIMEOUT_VALUE)
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hrtc);
-
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  else
-  {
-    /* AlarmB */
-    __HAL_RTC_ALARMB_DISABLE(hrtc);
-
-    /* In case of interrupt mode is used, the interrupt source must disabled */
-    __HAL_RTC_ALARM_DISABLE_IT(hrtc,RTC_IT_ALRB);
-
-    tickstart = HAL_GetTick();
-
-    /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */
-    while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET)
-    {
-      if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hrtc);
-
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK; 
-}
-
-/**
-  * @brief  Get the RTC Alarm value and masks.
-  * @param  hrtc: RTC handle
-  * @param  sAlarm: Pointer to Date structure
-  * @param  Alarm: Specifies the Alarm.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_ALARM_A: AlarmA
-  *             @arg RTC_ALARM_B: AlarmB  
-  * @param  Format: Specifies the format of the entered parameters.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_FORMAT_BIN: Binary data format 
-  *             @arg RTC_FORMAT_BCD: BCD data format
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format)
-{
-  uint32_t tmpreg = 0U, subsecondtmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-  assert_param(IS_RTC_ALARM(Alarm));
-
-  if(Alarm == RTC_ALARM_A)
-  {
-    /* AlarmA */
-    sAlarm->Alarm = RTC_ALARM_A;
-
-    tmpreg = (uint32_t)(hrtc->Instance->ALRMAR);
-    subsecondtmpreg = (uint32_t)((hrtc->Instance->ALRMASSR ) & RTC_ALRMASSR_SS);
-
-/* Fill the structure with the read parameters */
-  sAlarm->AlarmTime.Hours = (uint32_t)((tmpreg & (RTC_ALRMAR_HT | RTC_ALRMAR_HU)) >> 16U);
-  sAlarm->AlarmTime.Minutes = (uint32_t)((tmpreg & (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU)) >> 8U);
-  sAlarm->AlarmTime.Seconds = (uint32_t)(tmpreg & (RTC_ALRMAR_ST | RTC_ALRMAR_SU));
-  sAlarm->AlarmTime.TimeFormat = (uint32_t)((tmpreg & RTC_ALRMAR_PM) >> 16U);
-  sAlarm->AlarmTime.SubSeconds = (uint32_t) subsecondtmpreg;
-  sAlarm->AlarmDateWeekDay = (uint32_t)((tmpreg & (RTC_ALRMAR_DT | RTC_ALRMAR_DU)) >> 24U);
-  sAlarm->AlarmDateWeekDaySel = (uint32_t)(tmpreg & RTC_ALRMAR_WDSEL);
-  sAlarm->AlarmMask = (uint32_t)(tmpreg & RTC_ALARMMASK_ALL);
-  }
-  else
-  {
-    sAlarm->Alarm = RTC_ALARM_B;
-
-    tmpreg = (uint32_t)(hrtc->Instance->ALRMBR);
-    subsecondtmpreg = (uint32_t)((hrtc->Instance->ALRMBSSR) & RTC_ALRMBSSR_SS);
- 
-  /* Fill the structure with the read parameters */
-  sAlarm->AlarmTime.Hours = (uint32_t)((tmpreg & (RTC_ALRMBR_HT | RTC_ALRMBR_HU)) >> 16U);
-  sAlarm->AlarmTime.Minutes = (uint32_t)((tmpreg & (RTC_ALRMBR_MNT | RTC_ALRMBR_MNU)) >> 8U);
-  sAlarm->AlarmTime.Seconds = (uint32_t)(tmpreg & (RTC_ALRMBR_ST | RTC_ALRMBR_SU));
-  sAlarm->AlarmTime.TimeFormat = (uint32_t)((tmpreg & RTC_ALRMBR_PM) >> 16U);
-  sAlarm->AlarmTime.SubSeconds = (uint32_t) subsecondtmpreg;
-  sAlarm->AlarmDateWeekDay = (uint32_t)((tmpreg & (RTC_ALRMBR_DT | RTC_ALRMBR_DU)) >> 24U);
-  sAlarm->AlarmDateWeekDaySel = (uint32_t)(tmpreg & RTC_ALRMBR_WDSEL);
-  sAlarm->AlarmMask = (uint32_t)(tmpreg & RTC_ALARMMASK_ALL);
- }
- 
-  if(Format == RTC_FORMAT_BIN)
-  {
-    sAlarm->AlarmTime.Hours = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
-    sAlarm->AlarmTime.Minutes = RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes);
-    sAlarm->AlarmTime.Seconds = RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds);
-    sAlarm->AlarmDateWeekDay = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle Alarm interrupt request.
-  * @param  hrtc: RTC handle
-  * @retval None
-  */
-void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef* hrtc)
-{
-  /* Get the AlarmA interrupt source enable status */
-  if(__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRA) != RESET)
-  {
-    /* Get the pending status of the AlarmA Interrupt */
-    if(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) != RESET)
-    {
-      /* AlarmA callback */
-      HAL_RTC_AlarmAEventCallback(hrtc);
-
-      /* Clear the AlarmA interrupt pending bit */
-      __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
-    }
-  }
-
-  /* Get the AlarmB interrupt source enable status */
-  if(__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRB) != RESET)
-  {
-    /* Get the pending status of the AlarmB Interrupt */
-    if(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBF) != RESET)
-    {
-      /* AlarmB callback */
-      HAL_RTCEx_AlarmBEventCallback(hrtc);
-
-      /* Clear the AlarmB interrupt pending bit */
-      __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
-    }
-  }
-
-  /* Clear the EXTI's line Flag for RTC Alarm */
-  __HAL_RTC_ALARM_EXTI_CLEAR_FLAG();
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-}
-
-/**
-  * @brief  Alarm A callback.
-  * @param  hrtc: RTC handle
-  * @retval None
-  */
-__weak void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTC_AlarmAEventCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Handle AlarmA Polling request.
-  * @param  hrtc: RTC handle
-  * @param  Timeout: Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
-{
-
-  uint32_t tickstart = HAL_GetTick();   
-  
-  while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) == RESET)
-  {
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
-      {
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  /* Clear the Alarm interrupt pending bit */
-  __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup RTC_Exported_Functions_Group4
- *  @brief   Peripheral Control functions 
- *
-@verbatim
- ===============================================================================
-                     ##### Peripheral Control functions #####
- ===============================================================================
-    [..]
-    This subsection provides functions allowing to
-      (+) Wait for RTC Time and Date Synchronization
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Wait until the RTC Time and Date registers (RTC_TR and RTC_DR) are
-  *         synchronized with RTC APB clock.
-  * @note   The RTC Resynchronization mode is write protected, use the 
-  *         __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function.
-  * @note   To read the calendar through the shadow registers after Calendar 
-  *         initialization, calendar update or after wakeup from low power modes
-  *         the software must first clear the RSF flag.
-  *         The software must then wait until it is set again before reading
-  *         the calendar, which means that the calendar registers have been
-  *         correctly copied into the RTC_TR and RTC_DR shadow registers.
-  * @param  hrtc: RTC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc)
-{
-  uint32_t tickstart = 0U;
-
-  /* Clear RSF flag */
-  hrtc->Instance->ISR &= (uint32_t)RTC_RSF_MASK;
-
-  tickstart = HAL_GetTick();
-
-  /* Wait the registers to be synchronised */
-  while((hrtc->Instance->ISR & RTC_ISR_RSF) == (uint32_t)RESET)
-  {
-    if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
-    {
-      return HAL_TIMEOUT;
-    }
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup RTC_Exported_Functions_Group5
- *  @brief   Peripheral State functions 
- *
-@verbatim   
- ===============================================================================
-                     ##### Peripheral State functions #####
- ===============================================================================  
-    [..]
-    This subsection provides functions allowing to
-      (+) Get RTC state
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Return the RTC handle state.
-  * @param  hrtc: RTC handle
-  * @retval HAL state
-  */
-HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef* hrtc)
-{
-  /* Return RTC handle state */
-  return hrtc->State;
-}
-
-/**
-  * @}
-  */
-/**
-  * @}
-  */
-
-/** @addtogroup RTC_Private_Functions
-  * @{
-  */
-/**
-  * @brief  Enter the RTC Initialization mode.
-  * @note   The RTC Initialization mode is write protected, use the
-  *         __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function.
-  * @param  hrtc: RTC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef* hrtc)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check if the Initialization mode is set */
-  if((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
-  {
-    /* Set the Initialization mode */
-    hrtc->Instance->ISR = (uint32_t)RTC_INIT_MASK;
-
-    tickstart = HAL_GetTick();
-    /* Wait till RTC is in INIT state and if Time out is reached exit */
-    while((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
-    {
-      if((HAL_GetTick()  - tickstart ) > RTC_TIMEOUT_VALUE)
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  Convert a 2 digit decimal to BCD format.
-  * @param  Value: Byte to be converted
-  * @retval Converted byte
-  */
-uint8_t RTC_ByteToBcd2(uint8_t Value)
-{
-  uint32_t bcdhigh = 0U;
-
-  while(Value >= 10U)
-  {
-    bcdhigh++;
-    Value -= 10U;
-  }
-
-  return  ((uint8_t)(bcdhigh << 4U) | Value);
-}
-
-/**
-  * @brief  Convert from 2 digit BCD to Binary.
-  * @param  Value: BCD value to be converted
-  * @retval Converted word
-  */
-uint8_t RTC_Bcd2ToByte(uint8_t Value)
-{
-  uint32_t tmp = 0U;
-  tmp = ((uint8_t)(Value & (uint8_t)0xF0U) >> (uint8_t)0x4U) * 10U;
-  return (tmp + (Value & (uint8_t)0x0FU));
-}
-
-/**
-  * @}
-  */
-
-#endif /* HAL_RTC_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc_ex.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc_ex.c
deleted file mode 100755
index 766f500c..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc_ex.c
+++ /dev/null
@@ -1,1962 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_rtc_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended RTC HAL module driver.
-  *
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Real Time Clock (RTC) Extended peripheral:
-  *           + RTC Time Stamp functions
-  *           + RTC Tamper functions 
-  *           + RTC Wake-up functions
-  *           + Extended Control functions
-  *           + Extended RTC features functions    
-  *
-  @verbatim
-  ==============================================================================
-                  ##### How to use this driver #####
-  ==============================================================================
-  [..]
-    (+) Enable the RTC domain access.
-    (+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour
-        format using the HAL_RTC_Init() function.
-
-  *** RTC Wakeup configuration ***
-  ================================
-  [..] 
-    (+) To configure the RTC Wakeup Clock source and Counter use the HAL_RTCEx_SetWakeUpTimer()
-        function. You can also configure the RTC Wakeup timer with interrupt mode 
-        using the HAL_RTCEx_SetWakeUpTimer_IT() function.
-    (+) To read the RTC WakeUp Counter register, use the HAL_RTCEx_GetWakeUpTimer()
-        function.
-        
-  *** Outputs configuration ***
-  =============================
-  [..] The RTC has 2 different outputs:
-    (+) RTC_ALARM: this output is used to manage the RTC Alarm A, Alarm B
-        and WaKeUp signals.
-        To output the selected RTC signal, use the HAL_RTC_Init() function.             
-    (+) RTC_CALIB: this output is 512Hz signal or 1Hz.
-        To enable the RTC_CALIB, use the HAL_RTCEx_SetCalibrationOutPut() function.
-    (+) Two pins can be used as RTC_ALARM or RTC_CALIB (PC13, PB14) for STM32L05x/6x/7x/8x 
-	    and (PA2, PB14) for STM32L03x/4x managed on the RTC_OR register.
-    (+) When the RTC_CALIB or RTC_ALARM output is selected, the RTC_OUT pin is
-        automatically configured in output alternate function. 
-        
-  *** Smooth digital Calibration configuration ***
-  ================================================
-  [..]
-    (+) Configure the RTC Original Digital Calibration Value and the corresponding
-        calibration cycle period (32s,16s and 8s) using the HAL_RTCEx_SetSmoothCalib() 
-        function.
-
-  *** TimeStamp configuration ***
-  ===============================
-  [..]
-        (+) Configure the RTC_AF trigger and enable the RTC TimeStamp using the 
-            HAL_RTCEx_SetTimeStamp() function. You can also configure the RTC TimeStamp with 
-            interrupt mode using the HAL_RTCEx_SetTimeStamp_IT() function.
-        (+) To read the RTC TimeStamp Time and Date register, use the HAL_RTCEx_GetTimeStamp()
-            function.
-
-  *** Tamper configuration ***
-  ============================
-  [..]
-        (+) Enable the RTC Tamper and configure the Tamper filter count, trigger Edge 
-        or Level according to the Tamper filter (if equal to 0 Edge else Level) 
-        value, sampling frequency, NoErase, MaskFlag,  precharge or discharge and
-        Pull-UP using the HAL_RTCEx_SetTamper() function. You can configure RTC Tamper
-        with interrupt mode using HAL_RTCEx_SetTamper_IT() function.
-    (+) The default configuration of the Tamper erases the backup registers. To avoid
-        erase, enable the NoErase field on the RTC_TAMPCR register.
-
-  *** Backup Data Registers configuration ***
-  ===========================================
-  [..]
-    (+) To write to the RTC Backup Data registers, use the HAL_RTCEx_BKUPWrite()
-        function.
-    (+) To read the RTC Backup Data registers, use the HAL_RTCEx_BKUPRead()
-        function.
-
-   @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup RTCEx
-  * @brief RTC Extended HAL module driver
-  * @{
-  */
-
-#ifdef HAL_RTC_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/** @addtogroup RTCEx_Exported_Functions
-  * @{
-  */
-
-
-/** @addtogroup RTCEx_Exported_Functions_Group1
- *  @brief   RTC TimeStamp and Tamper functions
-  *
-@verbatim
- ===============================================================================
-                 ##### RTC TimeStamp and Tamper functions #####
- ===============================================================================
- 
- [..] This section provides functions allowing to configure TimeStamp feature
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Set TimeStamp.
-  * @note   This API must be called before enabling the TimeStamp feature.
-  * @param  hrtc: RTC handle
-  * @param  TimeStampEdge: Specifies the pin edge on which the TimeStamp is
-  *         activated.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the  
-  *                                        rising edge of the related pin.
-  *             @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the 
-  *                                         falling edge of the related pin.
-  * @param  RTC_TimeStampPin: specifies the RTC TimeStamp Pin.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin on STM32L05x/6x/7x/8x 
-  *                                            and PA2 on STM32L03x/4x/2x/1x.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge));
-  assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Get the RTC_CR register and clear the bits to be configured */
-  tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
-
-  tmpreg|= TimeStampEdge;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Configure the Time Stamp TSEDGE and Enable bits */
-  hrtc->Instance->CR = (uint32_t)tmpreg;
-
-  __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY; 
-
-  /* Process Unlocked */ 
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set TimeStamp with Interrupt.
-  * @param  hrtc: RTC handle
-  * @note   This API must be called before enabling the TimeStamp feature.
-  * @param  TimeStampEdge: Specifies the pin edge on which the TimeStamp is
-  *         activated.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the  
-  *                                        rising edge of the related pin.
-  *             @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the 
-  *                                         falling edge of the related pin.
-  * @param  RTC_TimeStampPin: Specifies the RTC TimeStamp Pin.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin on STM32L05x/6x/7x/8x 
-  *                                            and PA2 on STM32L03x/4x/2x/1x.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge));
-  assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
-
-  /* Process Locked */ 
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Get the RTC_CR register and clear the bits to be configured */
-  tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
-
-  tmpreg |= TimeStampEdge;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Configure the Time Stamp TSEDGE and Enable bits */
-  hrtc->Instance->CR = (uint32_t)tmpreg;
-
-  __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
-
-  /* Enable IT timestamp */
-  __HAL_RTC_TIMESTAMP_ENABLE_IT(hrtc,RTC_IT_TS);
-
-  /* RTC timestamp Interrupt Configuration: EXTI configuration */
-  __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
-
-  __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Deactivate TimeStamp.
-  * @param  hrtc: RTC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* In case of interrupt mode is used, the interrupt source must disabled */
-  __HAL_RTC_TIMESTAMP_DISABLE_IT(hrtc, RTC_IT_TS);
-
-  /* Get the RTC_CR register and clear the bits to be configured */
-  tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
-
-  /* Configure the Time Stamp TSEDGE and Enable bits */
-  hrtc->Instance->CR = (uint32_t)tmpreg;
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Get the RTC TimeStamp value.
-  * @param  hrtc: RTC handle
-
-  * @param  sTimeStamp: Pointer to Time structure
-  * @param  sTimeStampDate: Pointer to Date structure  
-  * @param  Format: specifies the format of the entered parameters.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_FORMAT_BIN: Binary data format 
-  *             @arg RTC_FORMAT_BCD: BCD data format
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef* sTimeStamp, RTC_DateTypeDef* sTimeStampDate, uint32_t Format)
-{
-  uint32_t tmptime = 0U, tmpdate = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-
-  /* Get the TimeStamp time and date registers values */
-  tmptime = (uint32_t)(hrtc->Instance->TSTR & RTC_TR_RESERVED_MASK);
-  tmpdate = (uint32_t)(hrtc->Instance->TSDR & RTC_DR_RESERVED_MASK);
-
-  /* Fill the Time structure fields with the read parameters */
-  sTimeStamp->Hours = (uint8_t)((tmptime & (RTC_TR_HT | RTC_TR_HU)) >> 16U);
-  sTimeStamp->Minutes = (uint8_t)((tmptime & (RTC_TR_MNT | RTC_TR_MNU)) >> 8U);
-  sTimeStamp->Seconds = (uint8_t)(tmptime & (RTC_TR_ST | RTC_TR_SU));
-  sTimeStamp->TimeFormat = (uint8_t)((tmptime & (RTC_TR_PM)) >> 16U);
-  sTimeStamp->SubSeconds = (uint32_t) hrtc->Instance->TSSSR;
-
-  /* Fill the Date structure fields with the read parameters */
-  sTimeStampDate->Year = 0U;
-  sTimeStampDate->Month = (uint8_t)((tmpdate & (RTC_DR_MT | RTC_DR_MU)) >> 8U);
-  sTimeStampDate->Date = (uint8_t)(tmpdate & (RTC_DR_DT | RTC_DR_DU));
-  sTimeStampDate->WeekDay = (uint8_t)((tmpdate & (RTC_DR_WDU)) >> 13U);
-
-  /* Check the input parameters format */
-  if(Format == RTC_FORMAT_BIN)
-  {
-    /* Convert the TimeStamp structure parameters to Binary format */
-    sTimeStamp->Hours = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Hours);
-    sTimeStamp->Minutes = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Minutes);
-    sTimeStamp->Seconds = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Seconds);
-
-    /* Convert the DateTimeStamp structure parameters to Binary format */
-    sTimeStampDate->Month = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Month);
-    sTimeStampDate->Date = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Date);
-    sTimeStampDate->WeekDay = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->WeekDay);
-  }
-
-  /* Clear the TIMESTAMP Flag */
-  __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set Tamper
-  * @note   By calling this API we disable the tamper interrupt for all tampers.
-  * @param  hrtc: RTC handle
-  * @param  sTamper: Pointer to Tamper Structure.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param( IS_RTC_TAMPER(sTamper->Tamper));
-  assert_param( IS_RTC_TAMPER_TRIGGER(sTamper->Trigger));
-  assert_param(IS_RTC_TAMPER_ERASE_MODE(sTamper->NoErase));
-  assert_param(IS_RTC_TAMPER_MASKFLAG_STATE(sTamper->MaskFlag));
-  assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter));
-  assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency));
-  assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration));
-  assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp));
-  assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Configure the tamper trigger */
-  if(sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE)
-  { 
-    sTamper->Trigger = (uint32_t)(sTamper->Tamper << 1U); 
-  }
-
-  if(sTamper->NoErase != RTC_TAMPER_ERASE_BACKUP_ENABLE)
-  { 
-    sTamper->NoErase = 0U;
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
-    defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx)
-
-    if((sTamper->Tamper & RTC_TAMPER_1) != 0U)
-    {
-      sTamper->NoErase |= RTC_TAMPCR_TAMP1NOERASE;
-    }
-#endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
-        * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
-        * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || 
-        * (STM32L031xx) || (STM32L041xx)
-        */
-
-    if((sTamper->Tamper & RTC_TAMPER_2) != 0U)
-    {
-      sTamper->NoErase |= RTC_TAMPCR_TAMP2NOERASE;
-    }
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx) 
-
-    if((sTamper->Tamper & RTC_TAMPER_3) != 0U)
-    {
-      sTamper->NoErase |= RTC_TAMPCR_TAMP3NOERASE;
-    }
-
-#endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
-        */
-  }
-
-  if(sTamper->MaskFlag != RTC_TAMPERMASK_FLAG_DISABLE)
-  {
-    sTamper->MaskFlag = 0U;
-    
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
-    defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx)
-
-    if((sTamper->Tamper & RTC_TAMPER_1) != 0U)
-    {
-      sTamper->MaskFlag |= RTC_TAMPCR_TAMP1MF;
-    }
-#endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
-        * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
-        * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || 
-        * (STM32L031xx) || (STM32L041xx)
-        */
-  
-    if((sTamper->Tamper & RTC_TAMPER_2) != 0U)
-    {
-      sTamper->MaskFlag |= RTC_TAMPCR_TAMP2MF;
-    }
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx) 
-
-    if((sTamper->Tamper & RTC_TAMPER_3) != 0U)
-    {
-      sTamper->MaskFlag |= RTC_TAMPCR_TAMP3MF;
-    }
-#endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) || 
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx)|| (STM32L011xx) || (STM32L021xx)
-        */
-  }
-
-  /* Configure the RTC_TAMPCR register */
-  tmpreg = (uint32_t)((uint32_t)sTamper->Tamper | (uint32_t)sTamper->Trigger  | (uint32_t)sTamper->NoErase |\
-            (uint32_t)sTamper->MaskFlag | (uint32_t)sTamper->Filter | (uint32_t)sTamper->SamplingFrequency |\
-            (uint32_t)sTamper->PrechargeDuration | (uint32_t)sTamper->TamperPullUp | (uint32_t)sTamper->TimeStampOnTamperDetection);
-
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx)
-  hrtc->Instance->TAMPCR &= ((uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | RTC_TAMPCR_TAMPTS |\
-                                         RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH        |\
-                                         RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE | RTC_TAMPCR_TAMP1IE         |\
-                                         RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP1NOERASE | RTC_TAMPCR_TAMP2NOERASE|\
-                                         RTC_TAMPCR_TAMP1MF | RTC_TAMPCR_TAMP2MF));
-
-#elif defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-      defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-      defined (STM32L031xx) || defined (STM32L041xx)      
-  hrtc->Instance->TAMPCR &= ((uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | RTC_TAMPCR_TAMPTS |\
-                                        RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH         |\
-                                        RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE | RTC_TAMPCR_TAMP1IE          |\
-                                        RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP3IE | RTC_TAMPCR_TAMP1NOERASE      |\
-                                        RTC_TAMPCR_TAMP2NOERASE | RTC_TAMPCR_TAMP3NOERASE | RTC_TAMPCR_TAMP1MF |\
-                                        RTC_TAMPCR_TAMP2MF | RTC_TAMPCR_TAMP3MF));
-                                        
-#elif defined (STM32L011xx) || defined (STM32L021xx)
-  hrtc->Instance->TAMPCR &= ((uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | RTC_TAMPCR_TAMPTS |\
-                                        RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH         |\
-                                        RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE                               |\
-                                        RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP3IE                                |\
-                                        RTC_TAMPCR_TAMP2NOERASE | RTC_TAMPCR_TAMP3NOERASE                      |\
-                                        RTC_TAMPCR_TAMP2MF | RTC_TAMPCR_TAMP3MF));
-                                        
-#endif /* (STM32L011xx) || (STM32L021xx) 
-        */
- 
-  hrtc->Instance->TAMPCR |= tmpreg;
-
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set Tamper with interrupt.
-  * @note   By calling this API we force the tamper interrupt for all tampers.
-  * @param  hrtc: RTC handle
-  * @param  sTamper: Pointer to RTC Tamper.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param( IS_RTC_TAMPER(sTamper->Tamper));
-  assert_param(IS_RTC_TAMPER_INTERRUPT(sTamper->Interrupt));
-  assert_param( IS_RTC_TAMPER_TRIGGER(sTamper->Trigger));
-  assert_param(IS_RTC_TAMPER_ERASE_MODE(sTamper->NoErase));
-  assert_param(IS_RTC_TAMPER_MASKFLAG_STATE(sTamper->MaskFlag));
-  assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter));
-  assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency));
-  assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration));
-  assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp));
-  assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Configure the tamper trigger */
-  if(sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE)
-  {
-    sTamper->Trigger = (uint32_t)(sTamper->Tamper << 1U);
-  }
-
-  if(sTamper->NoErase != RTC_TAMPER_ERASE_BACKUP_ENABLE)
-  { 
-    sTamper->NoErase = 0U;
-    
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
-    defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx)
-
-    if((sTamper->Tamper & RTC_TAMPER_1) != 0U)
-    {
-      sTamper->NoErase |= RTC_TAMPCR_TAMP1NOERASE;
-    }
-#endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
-        * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
-        * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || 
-        * (STM32L031xx) || (STM32L041xx)
-        */
-
-        
-    if((sTamper->Tamper & RTC_TAMPER_2) != 0U)
-    {
-      sTamper->NoErase |= RTC_TAMPCR_TAMP2NOERASE;
-    }
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx) 
-
-    if((sTamper->Tamper & RTC_TAMPER_3) != 0U)
-    {
-      sTamper->NoErase |= RTC_TAMPCR_TAMP3NOERASE;
-    }
-#endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
-        */
-  }
-
-  if(sTamper->MaskFlag != RTC_TAMPERMASK_FLAG_DISABLE)
-  {
-    sTamper->MaskFlag = 0U;
-    
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
-    defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx)
-    if((sTamper->Tamper & RTC_TAMPER_1) != 0U)
-    {
-      sTamper->MaskFlag |= RTC_TAMPCR_TAMP1MF;
-    }
-#endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
-        * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
-        * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || 
-        * (STM32L031xx) || (STM32L041xx)
-        */
-
-    if((sTamper->Tamper & RTC_TAMPER_2) != 0U)
-    {
-      sTamper->MaskFlag |= RTC_TAMPCR_TAMP2MF;
-    }
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx) 
-
-    if((sTamper->Tamper & RTC_TAMPER_3) != 0U)
-    {
-      sTamper->MaskFlag |= RTC_TAMPCR_TAMP3MF;
-    }
-#endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
-        */
-  }
-
-  /* Configure the RTC_TAMPCR register */    
-  tmpreg = (uint32_t)((uint32_t)sTamper->Tamper | (uint32_t)sTamper->Interrupt | (uint32_t)sTamper->Trigger  | (uint32_t)sTamper->NoErase |\
-            (uint32_t)sTamper->MaskFlag | (uint32_t)sTamper->Filter | (uint32_t)sTamper->SamplingFrequency                                |\
-            (uint32_t)sTamper->PrechargeDuration | (uint32_t)sTamper->TamperPullUp | (uint32_t)sTamper->TimeStampOnTamperDetection);
-  
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx)
-  hrtc->Instance->TAMPCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | RTC_TAMPCR_TAMPTS |\
-                                       RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH         |\
-                                       RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE | RTC_TAMPCR_TAMP1IE          |\
-                                       RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP1NOERASE | RTC_TAMPCR_TAMP2NOERASE |\
-                                       RTC_TAMPCR_TAMP1MF | RTC_TAMPCR_TAMP2MF);
-
-#elif defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-      defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-      defined (STM32L031xx) || defined (STM32L041xx)    
-  hrtc->Instance->TAMPCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | RTC_TAMPCR_TAMPTS |\
-                                       RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH    |\
-                                       RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE | RTC_TAMPCR_TAMP1IE     |\
-                                       RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP3IE | RTC_TAMPCR_TAMP1NOERASE |\
-                                       RTC_TAMPCR_TAMP2NOERASE | RTC_TAMPCR_TAMP3NOERASE | RTC_TAMPCR_TAMP1MF |\
-                                       RTC_TAMPCR_TAMP2MF | RTC_TAMPCR_TAMP3MF);
-
-#elif defined (STM32L011xx) || defined (STM32L021xx)
-  hrtc->Instance->TAMPCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | RTC_TAMPCR_TAMPTS |\
-                                       RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH    |\
-                                       RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE                          |\
-                                       RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP3IE                           |\
-                                       RTC_TAMPCR_TAMP2NOERASE | RTC_TAMPCR_TAMP3NOERASE                 |\
-                                       RTC_TAMPCR_TAMP2MF | RTC_TAMPCR_TAMP3MF);
-
-#endif /* (STM32L011xx) || (STM32L021xx) 
-        */
-
-  hrtc->Instance->TAMPCR |= tmpreg;
-
-  /* RTC Tamper Interrupt Configuration: EXTI configuration */
-  __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
-
-  __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();
-
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Deactivate Tamper.
-  * @param  hrtc: RTC handle
-  * @param  Tamper: Selected tamper pin.
-  *          This parameter can be RTC_Tamper_1 and/or RTC_TAMPER_2 for STM32L05x/6x.
-  *          This parameter can be any combination of RTC_TAMPER_1, RTC_TAMPER_2 and RTC_TAMPER_3 for STM32L01x/2x/3x/7x/8x.        
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper)
-{
-  assert_param( IS_RTC_TAMPER(Tamper));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the selected Tamper pin */
-  hrtc->Instance->TAMPCR &= ((uint32_t)~Tamper);
-  
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
-    defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx)
-  if ((Tamper & RTC_TAMPER_1) != 0U)
-  {
-    /* Disable the Tamper1 interrupt */
-    hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP1));
-  }
-  
-#endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
-        * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
-        * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || 
-        * (STM32L031xx) || (STM32L041xx)
-        */
-  
-  if ((Tamper & RTC_TAMPER_2) != 0U)
-  {
-    /* Disable the Tamper2 interrupt */
-    hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP2));
-  }
-
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx) 
-    
-    if ((Tamper & RTC_TAMPER_3) != 0U)
-  {
-    /* Disable the Tamper3 interrupt */
-    hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP3));
-  }
-  
-#endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-    * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
-    */
-    
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle TimeStamp interrupt request.
-  * @param  hrtc: RTC handle
-  * @retval None
-  */
-void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc)
-{ 
-  /* Get the TimeStamp interrupt source enable status */
-  if(__HAL_RTC_TIMESTAMP_GET_IT_SOURCE(hrtc, RTC_IT_TS) != RESET)
-  {
-    /* Get the pending status of the TIMESTAMP Interrupt */
-    if(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) != RESET)
-    {
-      /* TIMESTAMP callback */ 
-      HAL_RTCEx_TimeStampEventCallback(hrtc);
-      
-      /* Clear the TIMESTAMP interrupt pending bit */
-      __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
-    }
-  }
-
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
-    defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx)
-
-  /* Get the Tamper1 interrupts source enable status */
-  if(__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP1) != RESET)
-  {
-    /* Get the pending status of the Tamper1 Interrupt */
-    if(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F) != RESET)
-    {
-      /* Tamper1 callback */
-      HAL_RTCEx_Tamper1EventCallback(hrtc);
-
-      /* Clear the Tamper1 interrupt pending bit */
-      __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP1F);
-    }
-  }
-#endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
-        * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
-        * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || 
-        * (STM32L031xx) || (STM32L041xx)
-        */
-
-  /* Get the Tamper2 interrupts source enable status */
-  if(__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP2) != RESET)
-  {
-    /* Get the pending status of the Tamper2 Interrupt */
-    if(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) != RESET)
-    {
-      /* Tamper2 callback */
-      HAL_RTCEx_Tamper2EventCallback(hrtc);
-
-      /* Clear the Tamper2 interrupt pending bit */
-      __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP2F);
-    }
-  }
-
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx) 
-    
-  /* Get the Tamper3 interrupts source enable status */
-  if(__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP3) != RESET)
-  {
-    /* Get the pending status of the Tamper3 Interrupt */
-    if(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP3F) != RESET)
-    {
-      /* Tamper3 callback */
-      HAL_RTCEx_Tamper3EventCallback(hrtc);
-
-      /* Clear the Tamper3 interrupt pending bit */
-      __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP3F);
-    }
-  }
-  
-#endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) ||
-	    * (STM32L011xx) || (STM32L021xx)
-        */
-
-  /* Clear the EXTI's Flag for RTC TimeStamp and Tamper */
-  __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG();
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-}
-
-/**
-  * @brief  TimeStamp callback. 
-  * @param  hrtc: RTC handle
-  * @retval None
-  */
-__weak void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTCEx_TimeStampEventCallback could be implemented in the user file
-  */
-}
-
-/**
-  * @brief  Tamper 1 callback.
-  * @param  hrtc: RTC handle
-  * @retval None
-  */
-__weak void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTCEx_Tamper1EventCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Tamper 2 callback. 
-  * @param  hrtc: RTC handle
-  * @retval None
-  */
-__weak void HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef *hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTCEx_Tamper2EventCallback could be implemented in the user file
-   */
-}
-
-
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx) 
-    
-/**
-  * @brief  Tamper 3 callback. 
-  * @param  hrtc: RTC handle
-  * @retval None
-  */
-__weak void HAL_RTCEx_Tamper3EventCallback(RTC_HandleTypeDef *hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTCEx_Tamper3EventCallback could be implemented in the user file
-   */
-}
-
-#endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-    * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
-    */
-
-
-/**
-  * @brief  Handle TimeStamp polling request.
-  * @param  hrtc: RTC handle
-  * @param  Timeout: Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
-{ 
-  uint32_t tickstart = HAL_GetTick();
-
-  while(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) == RESET)
-  {
-    if(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSOVF) != RESET)
-    {
-      /* Clear the TIMESTAMP OverRun Flag */
-      __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSOVF);
-
-      /* Change TIMESTAMP state */
-      hrtc->State = HAL_RTC_STATE_ERROR; 
-
-      return HAL_ERROR; 
-    }
-
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
-      {
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-  
-  return HAL_OK;
-}
-
-#if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
-    defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
-    defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx)
-/**
-  * @brief  Handle Tamper 1 Polling.
-  * @param  hrtc: RTC handle
-  * @param  Timeout: Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
-{
-  uint32_t tickstart = HAL_GetTick();
-
-  /* Get the status of the Interrupt */
-  while(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F)== RESET)
-  {
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
-      {
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  /* Clear the Tamper Flag */
-  __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP1F);
-  
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-  
-  return HAL_OK; 
-}
-#endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
-        * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
-        * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-        * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || 
-        * (STM32L031xx) || (STM32L041xx)
-        */
-
-/**
-  * @brief  Handle Tamper 2 Polling.
-  * @param  hrtc: RTC handle
-  * @param  Timeout: Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
-{
-  uint32_t tickstart = HAL_GetTick();
-
-  /* Get the status of the Interrupt */
-  while(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) == RESET)
-  {
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
-      {
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  /* Clear the Tamper Flag */
-  __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP2F);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  return HAL_OK;
-}
-
-
-#if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
-    defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
-    defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx) 
-    
-/**
-  * @brief  Handle Tamper 3 Polling.
-  * @param  hrtc: RTC handle
-  * @param  Timeout: Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
-{  
-  uint32_t tickstart = HAL_GetTick();
-
-  /* Get the status of the Interrupt */
-  while(__HAL_RTC_TAMPER_GET_FLAG(hrtc,RTC_FLAG_TAMP3F) == RESET)
-  {
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
-      {
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  /* Clear the Tamper Flag */
-  __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP3F);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  return HAL_OK;
-}
-#endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
-    * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
-    */
-
-/**
-  * @}
-  */
-  
-/** @addtogroup RTCEx_Exported_Functions_Group2
-  * @brief    RTC Wake-up functions
-  *
-@verbatim   
- ===============================================================================
-                        ##### RTC Wake-up functions #####
- ===============================================================================  
- 
- [..] This section provides functions allowing to configure Wake-up feature
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Set wake up timer.
-  * @param  hrtc: RTC handle
-  * @param  WakeUpCounter: Wake up counter
-  * @param  WakeUpClock: Wake up clock
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock));
-  assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter));
-
-  /* Process Locked */ 
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- 
-  /*Check RTC WUTWF flag is reset only when wake up timer enabled*/
-  if((hrtc->Instance->CR & RTC_CR_WUTE) != RESET){
-    tickstart = HAL_GetTick();
-
-   /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */
-   while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET)
-   {
-    if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
-      {
-       /* Enable the write protection for RTC registers */
-       __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-       hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-       /* Process Unlocked */ 
-       __HAL_UNLOCK(hrtc);
-
-       return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
-
-  tickstart = HAL_GetTick();
-
-  /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
-  while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET)
-  {
-    if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
-    {
-      /* Enable the write protection for RTC registers */
-      __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-      hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-      /* Process Unlocked */ 
-      __HAL_UNLOCK(hrtc);
-
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* Clear the Wakeup Timer clock source bits in CR register */
-  hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL;
-
-  /* Configure the clock source */
-  hrtc->Instance->CR |= (uint32_t)WakeUpClock;
-
-  /* Configure the Wakeup Timer counter */
-  hrtc->Instance->WUTR = (uint32_t)WakeUpCounter;
-
-   /* Enable the Wakeup Timer */
-  __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc);
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set wake up timer with interrupt.
-  * @param  hrtc: RTC handle
-  * @param  WakeUpCounter: Wake up counter
-  * @param  WakeUpClock: Wake up clock  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock));
-  assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter));
-
-  /* Process Locked */ 
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /*Check RTC WUTWF flag is reset only when wake up timer enabled*/
-  if((hrtc->Instance->CR & RTC_CR_WUTE) != RESET){
-    tickstart = HAL_GetTick();
- 
-   /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */
-   while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET)
-   {
-    if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
-      {
-       /* Enable the write protection for RTC registers */
-       __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-       hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-       /* Process Unlocked */ 
-       __HAL_UNLOCK(hrtc);
-
-       return HAL_TIMEOUT;
-      }
-    }
-  }
-  /* Disable the Wake-Up timer */
-  __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
-
-  /* Clear flag Wake-Up */
-  __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
-
-  tickstart = HAL_GetTick();
-
-  /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
-  while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET)
-  {
-    if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
-    {
-      /* Enable the write protection for RTC registers */
-      __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-      hrtc->State = HAL_RTC_STATE_TIMEOUT; 
-
-      /* Process Unlocked */ 
-      __HAL_UNLOCK(hrtc);
-
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* Configure the Wakeup Timer counter */
-  hrtc->Instance->WUTR = (uint32_t)WakeUpCounter;
-
-  /* Clear the Wakeup Timer clock source bits in CR register */
-  hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL;
-
-  /* Configure the clock source */
-  hrtc->Instance->CR |= (uint32_t)WakeUpClock;
-
-  /* RTC WakeUpTimer Interrupt Configuration: EXTI configuration */
-  __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT();
-
-  __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
-
-  /* Configure the Interrupt in the RTC_CR register */
-  __HAL_RTC_WAKEUPTIMER_ENABLE_IT(hrtc,RTC_IT_WUT);
-  
-  /* Enable the Wakeup Timer */
-  __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc);
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_READY; 
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Deactivate wake up timer counter.
-  * @param  hrtc: RTC handle 
-  * @retval HAL status
-  */
-uint32_t HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc)
-{
-  uint32_t tickstart = 0U;
-
-  /* Process Locked */ 
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Disable the Wakeup Timer */
-  __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
-
-  /* In case of interrupt mode is used, the interrupt source must disabled */
-  __HAL_RTC_WAKEUPTIMER_DISABLE_IT(hrtc,RTC_IT_WUT);
-
-  tickstart = HAL_GetTick();
-  /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
-  while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET)
-  {
-    if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
-    {
-      /* Enable the write protection for RTC registers */
-      __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-      hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hrtc);
-
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Get wake up timer counter.
-  * @param  hrtc: RTC handle 
-  * @retval Counter value
-  */
-uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc)
-{
-  /* Get the counter value */
-  return ((uint32_t)(hrtc->Instance->WUTR & RTC_WUTR_WUT));
-}
-
-/**
-  * @brief  Handle Wake Up Timer interrupt request.
-  * @param  hrtc: RTC handle
-  * @retval None
-  */
-void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc)
-{  
-    /* Get the pending status of the WAKEUPTIMER Interrupt */
-    if(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) != RESET)
-    {
-      /* WAKEUPTIMER callback */ 
-      HAL_RTCEx_WakeUpTimerEventCallback(hrtc);
-      
-      /* Clear the WAKEUPTIMER interrupt pending bit */
-      __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
-    }
-
-
-  /* Clear the EXTI's line Flag for RTC WakeUpTimer */
-  __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG();
-  
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-}
-
-/**
-  * @brief  Wake Up Timer callback.
-  * @param  hrtc: RTC handle
-  * @retval None
-  */
-__weak void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTCEx_WakeUpTimerEventCallback could be implemented in the user file
-   */
-}
-
-
-/**
-  * @brief  Handle Wake Up Timer Polling.
-  * @param  hrtc: RTC handle
-  * @param  Timeout: Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
-{
-  uint32_t tickstart = HAL_GetTick();
-
-  while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) == RESET)
-  {
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
-      {
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-      
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  /* Clear the WAKEUPTIMER Flag */
-  __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
-  
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-
-/** @addtogroup RTCEx_Exported_Functions_Group3
-  * @brief    Extended Peripheral Control functions
-  *
-@verbatim   
- ===============================================================================
-              ##### Extended Peripheral Control functions #####
- ===============================================================================  
-    [..]
-    This subsection provides functions allowing to
-      (+) Write a data in a specified RTC Backup data register
-      (+) Read a data in a specified RTC Backup data register
-      (+) Set the Coarse calibration parameters.
-      (+) Deactivate the Coarse calibration parameters
-      (+) Set the Smooth calibration parameters.
-      (+) Configure the Synchronization Shift Control Settings.
-      (+) Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
-      (+) Deactivate the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
-      (+) Enable the RTC reference clock detection.
-      (+) Disable the RTC reference clock detection.
-      (+) Enable the Bypass Shadow feature.
-      (+) Disable the Bypass Shadow feature.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Write a data in a specified RTC Backup data register.
-  * @param  hrtc: RTC handle 
-  * @param  BackupRegister: RTC Backup data Register number.
-  *          This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to 
-  *                                 specify the register.
-  * @param  Data: Data to be written in the specified RTC Backup data register.
-  * @retval None
-  */
-void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data)
-{
-  uint32_t tmp = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_BKP(BackupRegister));
-
-  tmp = (uint32_t)&(hrtc->Instance->BKP0R);
-  tmp += (BackupRegister * 4U);
-
-  /* Write the specified register */
-  *(__IO uint32_t *)tmp = (uint32_t)Data;
-}
-
-/**
-  * @brief  Reads data from the specified RTC Backup data Register.
-  * @param  hrtc: RTC handle 
-  * @param  BackupRegister: RTC Backup data Register number.
-  *          This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to 
-  *                                 specify the register.
-  * @retval Read value
-  */
-uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister)
-{
-  uint32_t tmp = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_BKP(BackupRegister));
-
-  tmp = (uint32_t)&(hrtc->Instance->BKP0R);
-  tmp += (BackupRegister * 4U);
-  
-  /* Read the specified register */
-  return (*(__IO uint32_t *)tmp);
-}
-
-/**
-  * @brief  Set the Smooth calibration parameters.
-  * @param  hrtc: RTC handle  
-  * @param  SmoothCalibPeriod: Select the Smooth Calibration Period.
-  *          This parameter can be can be one of the following values :
-  *             @arg RTC_SMOOTHCALIB_PERIOD_32SEC: The smooth calibration period is 32s.
-  *             @arg RTC_SMOOTHCALIB_PERIOD_16SEC: The smooth calibration period is 16s.
-  *             @arg RTC_SMOOTHCALIB_PERIOD_8SEC: The smooth calibration period is 8s.
-  * @param  SmoothCalibPlusPulses: Select to Set or reset the CALP bit.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_SMOOTHCALIB_PLUSPULSES_SET: Add one RTCCLK pulse every 2*11 pulses.
-  *             @arg RTC_SMOOTHCALIB_PLUSPULSES_RESET: No RTCCLK pulses are added.
-  * @param  SmoothCalibMinusPulsesValue: Select the value of CALM[8:0] bits.
-  *          This parameter can be one any value from 0 to 0x000001FF.
-  * @note   To deactivate the smooth calibration, the field SmoothCalibPlusPulses 
-  *         must be equal to SMOOTHCALIB_PLUSPULSES_RESET and the field
-  *         SmoothCalibMinusPulsesValue mut be equal to 0.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef* hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmoothCalibMinusPulsesValue)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_SMOOTH_CALIB_PERIOD(SmoothCalibPeriod));
-  assert_param(IS_RTC_SMOOTH_CALIB_PLUS(SmoothCalibPlusPulses));
-  assert_param(IS_RTC_SMOOTH_CALIB_MINUS(SmoothCalibMinusPulsesValue));
-
-  /* Process Locked */ 
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* check if a calibration is pending*/
-  if((hrtc->Instance->ISR & RTC_ISR_RECALPF) != RESET)
-  {
-    tickstart = HAL_GetTick();
-
-    /* check if a calibration is pending*/
-    while((hrtc->Instance->ISR & RTC_ISR_RECALPF) != RESET)
-    {
-      if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-        /* Change RTC state */
-        hrtc->State = HAL_RTC_STATE_TIMEOUT; 
-        
-        /* Process Unlocked */
-        __HAL_UNLOCK(hrtc);
-
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  /* Configure the Smooth calibration settings */
-  hrtc->Instance->CALR = (uint32_t)((uint32_t)SmoothCalibPeriod | (uint32_t)SmoothCalibPlusPulses | (uint32_t)SmoothCalibMinusPulsesValue);
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY; 
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Configure the Synchronization Shift Control Settings.
-  * @note   When REFCKON is set, firmware must not write to Shift control register. 
-  * @param  hrtc: RTC handle    
-  * @param  ShiftAdd1S: Select to add or not 1 second to the time calendar.
-  *          This parameter can be one of the following values :
-  *             @arg RTC_SHIFTADD1S_SET: Add one second to the clock calendar. 
-  *             @arg RTC_SHIFTADD1S_RESET: No effect.
-  * @param  ShiftSubFS: Select the number of Second Fractions to substitute.
-  *          This parameter can be one any value from 0 to 0x7FFF.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef* hrtc, uint32_t ShiftAdd1S, uint32_t ShiftSubFS)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_SHIFT_ADD1S(ShiftAdd1S));
-  assert_param(IS_RTC_SHIFT_SUBFS(ShiftSubFS));
-
-  /* Process Locked */ 
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-    tickstart = HAL_GetTick();
-
-    /* Wait until the shift is completed*/
-    while((hrtc->Instance->ISR & RTC_ISR_SHPF) != RESET)
-    {
-      if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-        /* Process Unlocked */ 
-        __HAL_UNLOCK(hrtc);
-
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Check if the reference clock detection is disabled */
-    if((hrtc->Instance->CR & RTC_CR_REFCKON) == RESET)
-    {
-      /* Configure the Shift settings */
-      hrtc->Instance->SHIFTR = (uint32_t)(uint32_t)(ShiftSubFS) | (uint32_t)(ShiftAdd1S);
-
-      /* If  RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
-      if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
-      {
-        if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
-        {
-          /* Enable the write protection for RTC registers */
-          __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-          hrtc->State = HAL_RTC_STATE_ERROR;
-
-          /* Process Unlocked */ 
-          __HAL_UNLOCK(hrtc);
-
-          return HAL_ERROR;
-        }
-      }
-    }
-    else
-    {
-      /* Enable the write protection for RTC registers */
-      __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-      
-      /* Change RTC state */
-      hrtc->State = HAL_RTC_STATE_ERROR;
-      
-      /* Process Unlocked */ 
-      __HAL_UNLOCK(hrtc);
-
-      return HAL_ERROR;
-    }
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
-  * @param  hrtc: RTC handle
-  * @param  CalibOutput : Select the Calibration output Selection .
-  *          This parameter can be one of the following values:
-  *             @arg RTC_CALIBOUTPUT_512HZ: A signal has a regular waveform at 512Hz.
-  *             @arg RTC_CALIBOUTPUT_1HZ: A signal has a regular waveform at 1Hz.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef* hrtc, uint32_t CalibOutput)
-{
-  /* Check the parameters */
-  assert_param(IS_RTC_CALIB_OUTPUT(CalibOutput));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Clear flags before config */
-  hrtc->Instance->CR &= (uint32_t)~RTC_CR_COSEL;
-
-  /* Configure the RTC_CR register */
-  hrtc->Instance->CR |= (uint32_t)CalibOutput;
-
-  __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(hrtc);
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Deactivate the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
-  * @param  hrtc: RTC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef* hrtc)
-{
-  /* Process Locked */ 
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(hrtc);
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enable the RTC reference clock detection.
-  * @param  hrtc: RTC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef* hrtc)
-{
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Set Initialization mode */
-  if(RTC_EnterInitMode(hrtc) != HAL_OK)
-  {
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-    /* Set RTC state*/
-    hrtc->State = HAL_RTC_STATE_ERROR;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hrtc);
-
-    return HAL_ERROR;
-  }
-  else
-  {
-    __HAL_RTC_CLOCKREF_DETECTION_ENABLE(hrtc);
-
-    /* Exit Initialization mode */
-    hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
-  }
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-   /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Disable the RTC reference clock detection.
-  * @param  hrtc: RTC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef* hrtc)
-{
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-  
-  /* Set Initialization mode */
-  if(RTC_EnterInitMode(hrtc) != HAL_OK)
-  {
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-    /* Set RTC state*/
-    hrtc->State = HAL_RTC_STATE_ERROR;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hrtc);
-
-    return HAL_ERROR;
-  }
-  else
-  {
-    __HAL_RTC_CLOCKREF_DETECTION_DISABLE(hrtc);
-
-    /* Exit Initialization mode */
-    hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
-  }
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enable the Bypass Shadow feature.
-  * @param  hrtc: RTC handle
-  * @note   When the Bypass Shadow is enabled the calendar value are taken
-  *         directly from the Calendar counter.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef* hrtc)
-{
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Set the BYPSHAD bit */
-  hrtc->Instance->CR |= (uint8_t)RTC_CR_BYPSHAD;
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Disable the Bypass Shadow feature.
-  * @param  hrtc: RTC handle
-  * @note   When the Bypass Shadow is enabled the calendar value are taken
-  *         directly from the Calendar counter.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef* hrtc)
-{
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Reset the BYPSHAD bit */
-  hrtc->Instance->CR &= ((uint8_t)~RTC_CR_BYPSHAD);
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup RTCEx_Exported_Functions_Group4
-  * @brief    Extended features functions
-  *
-@verbatim   
- ===============================================================================
-                 ##### Extended features functions #####
- ===============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) RTC Alram B callback
-      (+) RTC Poll for Alarm B request
-               
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Alarm B callback.
-  * @param  hrtc: RTC handle
-  * @retval None
-  */
-__weak void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTCEx_AlarmBEventCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Handle Alarm B Polling request.
-  * @param  hrtc: RTC handle
-  * @param  Timeout: Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
-{ 
-  uint32_t tickstart = HAL_GetTick();
-  
-  while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBF) == RESET)
-  {
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
-      {
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  /* Clear the Alarm Flag */
-  __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-#endif /* HAL_RTC_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard.c
deleted file mode 100755
index 9df3f37b..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard.c
+++ /dev/null
@@ -1,2291 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_smartcard.c
-  * @author  MCD Application Team
-  * @brief   SMARTCARD HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the SMARTCARD peripheral:
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral Control functions
-  *           + Peripheral State and Error functions
-  *
-  @verbatim
-  ==============================================================================
-                        ##### How to use this driver #####
-  ==============================================================================
-  [..]
-    The SMARTCARD HAL driver can be used as follows:
-
-    (#) Declare a SMARTCARD_HandleTypeDef handle structure (eg. SMARTCARD_HandleTypeDef hsmartcard).
-    (#) Associate a USART to the SMARTCARD handle hsmartcard.
-    (#) Initialize the SMARTCARD low level resources by implementing the HAL_SMARTCARD_MspInit() API:
-        (++) Enable the USARTx interface clock.
-        (++) USART pins configuration:
-            (+++) Enable the clock for the USART GPIOs.
-            (+++) Configure the USART pins (TX as alternate function pull-up, RX as alternate function Input).
-        (++) NVIC configuration if you need to use interrupt process (HAL_SMARTCARD_Transmit_IT()
-             and HAL_SMARTCARD_Receive_IT() APIs):
-            (+++) Configure the USARTx interrupt priority.
-            (+++) Enable the NVIC USART IRQ handle.
-        (++) DMA Configuration if you need to use DMA process (HAL_SMARTCARD_Transmit_DMA()
-             and HAL_SMARTCARD_Receive_DMA() APIs):
-            (+++) Declare a DMA handle structure for the Tx/Rx channel.
-            (+++) Enable the DMAx interface clock.
-            (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
-            (+++) Configure the DMA Tx/Rx channel.
-            (+++) Associate the initialized DMA handle to the SMARTCARD DMA Tx/Rx handle.
-            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
-
-    (#) Program the Baud Rate, Parity, Mode(Receiver/Transmitter), clock enabling/disabling and accordingly,
-        the clock parameters (parity, phase, last bit), prescaler value, guard time and NACK on transmission
-        error enabling or disabling in the hsmartcard handle Init structure.
-
-    (#) If required, program SMARTCARD advanced features (TX/RX pins swap, TimeOut, auto-retry counter,...)
-        in the hsmartcard handle AdvancedInit structure.
-
-    (#) Initialize the SMARTCARD registers by calling the HAL_SMARTCARD_Init() API:
-        (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
-             by calling the customized HAL_SMARTCARD_MspInit() API.
-        [..]
-        (@) The specific SMARTCARD interrupts (Transmission complete interrupt,
-             RXNE interrupt and Error Interrupts) will be managed using the macros
-             __HAL_SMARTCARD_ENABLE_IT() and __HAL_SMARTCARD_DISABLE_IT() inside the transmit and receive process.
-
-    [..]
-    [..] Three operation modes are available within this driver :
-
-     *** Polling mode IO operation ***
-     =================================
-     [..]
-       (+) Send an amount of data in blocking mode using HAL_SMARTCARD_Transmit()
-       (+) Receive an amount of data in blocking mode using HAL_SMARTCARD_Receive()
-
-     *** Interrupt mode IO operation ***
-     ===================================
-     [..]
-       (+) Send an amount of data in non-blocking mode using HAL_SMARTCARD_Transmit_IT()
-       (+) At transmission end of transfer HAL_SMARTCARD_TxCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_SMARTCARD_TxCpltCallback()
-       (+) Receive an amount of data in non-blocking mode using HAL_SMARTCARD_Receive_IT()
-       (+) At reception end of transfer HAL_SMARTCARD_RxCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_SMARTCARD_RxCpltCallback()
-       (+) In case of transfer Error, HAL_SMARTCARD_ErrorCallback() function is executed and user can
-            add his own code by customization of function pointer HAL_SMARTCARD_ErrorCallback()
-
-     *** DMA mode IO operation ***
-     ==============================
-     [..]
-       (+) Send an amount of data in non-blocking mode (DMA) using HAL_SMARTCARD_Transmit_DMA()
-       (+) At transmission end of transfer HAL_SMARTCARD_TxCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_SMARTCARD_TxCpltCallback()
-       (+) Receive an amount of data in non-blocking mode (DMA) using HAL_SMARTCARD_Receive_DMA()
-       (+) At reception end of transfer HAL_SMARTCARD_RxCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_SMARTCARD_RxCpltCallback()
-       (+) In case of transfer Error, HAL_SMARTCARD_ErrorCallback() function is executed and user can
-            add his own code by customization of function pointer HAL_SMARTCARD_ErrorCallback()
-
-     *** SMARTCARD HAL driver macros list ***
-     ========================================
-     [..]
-       Below the list of most used macros in SMARTCARD HAL driver.
-
-       (+) __HAL_SMARTCARD_GET_FLAG : Check whether or not the specified SMARTCARD flag is set
-       (+) __HAL_SMARTCARD_CLEAR_FLAG : Clear the specified SMARTCARD pending flag
-       (+) __HAL_SMARTCARD_ENABLE_IT: Enable the specified SMARTCARD interrupt
-       (+) __HAL_SMARTCARD_DISABLE_IT: Disable the specified SMARTCARD interrupt
-       (+) __HAL_SMARTCARD_GET_IT_SOURCE: Check whether or not the specified SMARTCARD interrupt is enabled
-
-     [..]
-       (@) You can refer to the SMARTCARD HAL driver header file for more useful macros
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup SMARTCARD SMARTCARD
-  * @brief HAL SMARTCARD module driver
-  * @{
-  */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup SMARTCARD_Private_Constants SMARTCARD Private Constants
- * @{
- */
-#define SMARTCARD_TEACK_REACK_TIMEOUT               1000U     /*!< SMARTCARD TX or RX enable acknowledge time-out value  */
-
-#define USART_CR1_FIELDS      ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \
-                                     USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8))       /*!< USART CR1 fields of parameters set by SMARTCARD_SetConfig API */
-#define USART_CR2_CLK_FIELDS  ((uint32_t)(USART_CR2_CLKEN|USART_CR2_CPOL|USART_CR2_CPHA|USART_CR2_LBCL)) /*!< SMARTCARD clock-related USART CR2 fields of parameters */
-#define USART_CR2_FIELDS      ((uint32_t)(USART_CR2_RTOEN|USART_CR2_CLK_FIELDS|USART_CR2_STOP)) /*!< USART CR2 fields of parameters set by SMARTCARD_SetConfig API */
-#define USART_CR3_FIELDS      ((uint32_t)(USART_CR3_ONEBIT|USART_CR3_NACK|USART_CR3_SCARCNT))   /*!< USART CR3 fields of parameters set by SMARTCARD_SetConfig API */
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup SMARTCARD_Private_Functions
-  * @{
-  */
-static HAL_StatusTypeDef SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsmartcard);
-static void SMARTCARD_AdvFeatureConfig(SMARTCARD_HandleTypeDef *hsmartcard);
-static HAL_StatusTypeDef SMARTCARD_CheckIdleState(SMARTCARD_HandleTypeDef *hsmartcard);
-static HAL_StatusTypeDef SMARTCARD_WaitOnFlagUntilTimeout(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
-static void SMARTCARD_EndTxTransfer(SMARTCARD_HandleTypeDef *hsmartcard);
-static void SMARTCARD_EndRxTransfer(SMARTCARD_HandleTypeDef *hsmartcard);
-static void SMARTCARD_DMATransmitCplt(DMA_HandleTypeDef *hdma);
-static void SMARTCARD_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
-static void SMARTCARD_DMAError(DMA_HandleTypeDef *hdma);
-static void SMARTCARD_DMAAbortOnError(DMA_HandleTypeDef *hdma);
-static void SMARTCARD_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
-static void SMARTCARD_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
-static void SMARTCARD_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
-static void SMARTCARD_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
-static HAL_StatusTypeDef SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard);
-static HAL_StatusTypeDef SMARTCARD_EndTransmit_IT(SMARTCARD_HandleTypeDef *hsmartcard);
-static HAL_StatusTypeDef SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup SMARTCARD_Exported_Functions SMARTCARD Exported Functions
-  * @{
-  */
-
-/** @defgroup SMARTCARD_Exported_Functions_Group1 Initialization and de-initialization functions
-  *  @brief    Initialization and Configuration functions
-  *
-@verbatim
-  ==============================================================================
-              ##### Initialization and Configuration functions #####
-  ==============================================================================
-  [..]
-  This subsection provides a set of functions allowing to initialize the USARTx
-  associated to the SmartCard.
-  (+) These parameters can be configured:
-      (++) Baud Rate
-      (++) Parity: parity should be enabled, frame Length is fixed to 8 bits plus parity
-      (++) Receiver/transmitter modes
-      (++) Synchronous mode (and if enabled, phase, polarity and last bit parameters)
-      (++) Prescaler value
-      (++) Guard bit time
-      (++) NACK enabling or disabling on transmission error
-
-  (+) The following advanced features can be configured as well:
-      (++) TX and/or RX pin level inversion
-      (++) data logical level inversion
-      (++) RX and TX pins swap
-      (++) RX overrun detection disabling
-      (++) DMA disabling on RX error
-      (++) MSB first on communication line
-      (++) Time out enabling (and if activated, timeout value)
-      (++) Block length
-      (++) Auto-retry counter
-  [..]
-  The HAL_SMARTCARD_Init() API follows the USART synchronous configuration procedures
-  (details for the procedures are available in reference manual).
-
-@endverbatim
-
-  The USART frame format is given in the following table:
-
-    Table 1. USART frame format.
-    +---------------------------------------------------------------+        
-    | M1M0 bits |  PCE bit  |            USART frame                |        
-    |-----------------------|---------------------------------------|        
-    |     01    |    1      |    | SB | 8 bit data | PB | STB |     |        
-    +---------------------------------------------------------------+        
-
-
-  * @{
-  */
-
-/**
-  * @brief  Initialize the SMARTCARD mode according to the specified
-  *         parameters in the SMARTCARD_HandleTypeDef and initialize the associated handle.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_Init(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Check the SMARTCARD handle allocation */
-  if(hsmartcard == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the USART associated to the SMARTCARD handle */
-  assert_param(IS_SMARTCARD_INSTANCE(hsmartcard->Instance));
-
-  if(hsmartcard->gState == HAL_SMARTCARD_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hsmartcard->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK */
-    HAL_SMARTCARD_MspInit(hsmartcard);
-  }
-
-  hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY;
-
-  /* Disable the Peripheral to set smartcard mode */
-  CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-  /* In SmartCard mode, the following bits must be kept cleared:
-  - LINEN in the USART_CR2 register,
-  - HDSEL and IREN  bits in the USART_CR3 register.*/
-  CLEAR_BIT(hsmartcard->Instance->CR2, USART_CR2_LINEN);
-  CLEAR_BIT(hsmartcard->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN));
-
-  /* set the USART in SMARTCARD mode */
-  SET_BIT(hsmartcard->Instance->CR3, USART_CR3_SCEN);
-
-  /* Set the SMARTCARD Communication parameters */
-  if (hsmartcard->AdvancedInit.AdvFeatureInit != SMARTCARD_ADVFEATURE_NO_INIT)
-  {
-    SMARTCARD_AdvFeatureConfig(hsmartcard);
-  }
-
-  if (SMARTCARD_SetConfig(hsmartcard) == HAL_ERROR)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Enable the Peripheral */
-  SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-  /* TEACK and/or REACK to check before moving hsmartcard->gState and hsmartcard->RxState to Ready */
-  return (SMARTCARD_CheckIdleState(hsmartcard));
-}
-
-/**
-  * @brief  DeInitialize the SMARTCARD peripheral.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_DeInit(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Check the SMARTCARD handle allocation */
-  if(hsmartcard == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the USART/UART associated to the SMARTCARD handle */
-  assert_param(IS_SMARTCARD_INSTANCE(hsmartcard->Instance));
-
-  hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-  WRITE_REG(hsmartcard->Instance->CR1, 0x0);
-  WRITE_REG(hsmartcard->Instance->CR2, 0x0);
-  WRITE_REG(hsmartcard->Instance->CR3, 0x0);
-  WRITE_REG(hsmartcard->Instance->RTOR, 0x0);
-  WRITE_REG(hsmartcard->Instance->GTPR, 0x0);
-
-  /* DeInit the low level hardware */
-  HAL_SMARTCARD_MspDeInit(hsmartcard);
-
-  hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-  hsmartcard->gState    = HAL_SMARTCARD_STATE_RESET;
-  hsmartcard->RxState   = HAL_SMARTCARD_STATE_RESET;
-
-  /* Process Unlock */
-  __HAL_UNLOCK(hsmartcard);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initialize the SMARTCARD MSP.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_MspInit(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmartcard);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_MspInit can be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitialize the SMARTCARD MSP.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_MspDeInit(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmartcard);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_MspDeInit can be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Exported_Functions_Group2 IO operation functions
-  *  @brief   SMARTCARD Transmit and Receive functions
-  *
-@verbatim
-  ==============================================================================
-                         ##### IO operation functions #####
-  ==============================================================================
-  [..]
-    This subsection provides a set of functions allowing to manage the SMARTCARD data transfers.
-
-  [..]
-    Smartcard is a single wire half duplex communication protocol.
-    The Smartcard interface is designed to support asynchronous protocol Smartcards as
-    defined in the ISO 7816-3 standard. The USART should be configured as:
-    (+) 8 bits plus parity: where M=1 and PCE=1 in the USART_CR1 register
-    (+) 1.5 stop bits when transmitting and receiving: where STOP=11 in the USART_CR2 register.
-
-  [..]
-    (+) There are two modes of transfer:
-        (++) Blocking mode: The communication is performed in polling mode.
-             The HAL status of all data processing is returned by the same function
-             after finishing transfer.
-        (++) Non-Blocking mode: The communication is performed using Interrupts
-             or DMA, the relevant API's return the HAL status.
-             The end of the data processing will be indicated through the
-             dedicated SMARTCARD IRQ when using Interrupt mode or the DMA IRQ when
-             using DMA mode.
-        (++) The HAL_SMARTCARD_TxCpltCallback(), HAL_SMARTCARD_RxCpltCallback() user callbacks
-             will be executed respectively at the end of the Transmit or Receive process
-             The HAL_SMARTCARD_ErrorCallback() user callback will be executed when a communication
-             error is detected.
-
-    (+) Blocking mode APIs are :
-        (++) HAL_SMARTCARD_Transmit()
-        (++) HAL_SMARTCARD_Receive()
-
-    (+) Non Blocking mode APIs with Interrupt are :
-        (++) HAL_SMARTCARD_Transmit_IT()
-        (++) HAL_SMARTCARD_Receive_IT()
-        (++) HAL_SMARTCARD_IRQHandler()
-
-    (+) Non Blocking mode functions with DMA are :
-        (++) HAL_SMARTCARD_Transmit_DMA()
-        (++) HAL_SMARTCARD_Receive_DMA()
-
-    (+) A set of Transfer Complete Callbacks are provided in non Blocking mode:
-        (++) HAL_SMARTCARD_TxCpltCallback()
-        (++) HAL_SMARTCARD_RxCpltCallback()
-        (++) HAL_SMARTCARD_ErrorCallback()
-
-    (#) Non-Blocking mode transfers could be aborted using Abort API's :
-        (+) HAL_SMARTCARD_Abort()
-        (+) HAL_SMARTCARD_AbortTransmit()
-        (+) HAL_SMARTCARD_AbortReceive()
-        (+) HAL_SMARTCARD_Abort_IT()
-        (+) HAL_SMARTCARD_AbortTransmit_IT()
-        (+) HAL_SMARTCARD_AbortReceive_IT()
-
-    (#) For Abort services based on interrupts (HAL_SMARTCARD_Abortxxx_IT), a set of Abort Complete Callbacks are provided:
-        (+) HAL_SMARTCARD_AbortCpltCallback()
-        (+) HAL_SMARTCARD_AbortTransmitCpltCallback()
-        (+) HAL_SMARTCARD_AbortReceiveCpltCallback()
-
-    (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
-        Errors are handled as follows :
-       (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is 
-           to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception .
-           Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type,
-           and HAL_SMARTCARD_ErrorCallback() user callback is executed. Transfer is kept ongoing on SMARTCARD side.
-           If user wants to abort it, Abort services should be called by user.
-       (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
-           This concerns Frame Error in Interrupt mode tranmission, Overrun Error in Interrupt mode reception and all errors in DMA mode.
-           Error code is set to allow user to identify error type, and HAL_SMARTCARD_ErrorCallback() user callback is executed.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Send an amount of data in blocking mode.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param  pData pointer to data buffer.
-  * @param  Size amount of data to be sent.
-  * @param  Timeout  Timeout duration.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0;
-
-  /* Check that a Tx process is not already ongoing */
-  if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hsmartcard);
-
-    hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY_TX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-    
-    /* Disable the Peripheral first to update mode for TX master */
-    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-    /* Disable Rx, enable Tx */
-    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_RE);
-    SET_BIT(hsmartcard->Instance->RQR, SMARTCARD_RXDATA_FLUSH_REQUEST);
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_TE);
-    
-    /* Enable the Peripheral */
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsmartcard->TxXferSize = Size;
-    hsmartcard->TxXferCount = Size;
-    while(hsmartcard->TxXferCount > 0U)
-    {
-      hsmartcard->TxXferCount--;
-      if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, SMARTCARD_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      hsmartcard->Instance->TDR = (*pData++ & (uint8_t)0xFFU);
-    }
-    if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, SMARTCARD_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-    /* Re-enable Rx at end of transmission if initial mode is Rx/Tx */
-    if(hsmartcard->Init.Mode == SMARTCARD_MODE_TX_RX)
-    {
-      /* Disable the Peripheral first to update modes */
-      CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-      SET_BIT(hsmartcard->Instance->CR1, USART_CR1_RE);
-      /* Enable the Peripheral */
-      SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-    }
-    
-    /* At end of Tx process, restore hsmartcard->gState to Ready */
-    hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmartcard);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in blocking mode.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param  pData pointer to data buffer.
-  * @param  Size amount of data to be received.
-  * @param  Timeout Timeout duration.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0;
-
-  /* Check that a Rx process is not already ongoing */
-  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hsmartcard);
-
-    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsmartcard->RxState   = HAL_SMARTCARD_STATE_BUSY_RX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    hsmartcard->RxXferSize = Size;
-    hsmartcard->RxXferCount = Size;
-
-    /* Check the remain data to be received */
-    while(hsmartcard->RxXferCount > 0U)
-    {
-      hsmartcard->RxXferCount--;
-
-      if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, SMARTCARD_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      *pData++ = (uint8_t)(hsmartcard->Instance->RDR & (uint8_t)0x00FFU);
-    }
-
-    /* At end of Rx process, restore hsmartcard->RxState to Ready */
-    hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmartcard);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Send an amount of data in interrupt mode.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param  pData pointer to data buffer.
-  * @param  Size amount of data to be sent.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Tx process is not already ongoing */
-  if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hsmartcard);
-
-    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY_TX;
-
-    hsmartcard->pTxBuffPtr = pData;
-    hsmartcard->TxXferSize = Size;
-    hsmartcard->TxXferCount = Size;
-
-    /* Disable the Peripheral first to update mode for TX master */
-    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-    /* Disable Rx, enable Tx */
-    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_RE);
-    SET_BIT(hsmartcard->Instance->RQR, SMARTCARD_RXDATA_FLUSH_REQUEST);
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_TE);
-    
-    /* Enable the Peripheral */
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmartcard);
-
-    /* Enable the SMARTCARD Error Interrupt: (Frame error) */
-    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the SMARTCARD Transmit Data Register Empty Interrupt */
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_TXEIE);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in interrupt mode.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param  pData pointer to data buffer.
-  * @param  Size amount of data to be received.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Rx process is not already ongoing */
-  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hsmartcard);
-
-    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsmartcard->RxState   = HAL_SMARTCARD_STATE_BUSY_RX;
-
-    hsmartcard->pRxBuffPtr = pData;
-    hsmartcard->RxXferSize = Size;
-    hsmartcard->RxXferCount = Size;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmartcard);
-
-    /* Enable the SMARTCARD Parity Error and Data Register not empty Interrupts */
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_PEIE| USART_CR1_RXNEIE);
-
-    /* Enable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Send an amount of data in DMA mode.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param  pData pointer to data buffer.
-  * @param  Size amount of data to be sent.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Tx process is not already ongoing */
-  if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hsmartcard);
-
-    hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY_TX;
-
-    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsmartcard->pTxBuffPtr = pData;
-    hsmartcard->TxXferSize = Size;
-    hsmartcard->TxXferCount = Size;
-
-    /* Disable the Peripheral first to update mode for TX master */
-    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-    /* Disable Rx, enable Tx */
-    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_RE);
-    SET_BIT(hsmartcard->Instance->RQR, SMARTCARD_RXDATA_FLUSH_REQUEST);
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_TE);
-    
-    /* Enable the Peripheral */
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-    /* Set the SMARTCARD DMA transfer complete callback */
-    hsmartcard->hdmatx->XferCpltCallback = SMARTCARD_DMATransmitCplt;
-
-    /* Set the SMARTCARD error callback */
-    hsmartcard->hdmatx->XferErrorCallback = SMARTCARD_DMAError;
-
-    /* Set the DMA abort callback */
-    hsmartcard->hdmatx->XferAbortCallback = NULL;
-
-    /* Enable the SMARTCARD transmit DMA channel */
-    HAL_DMA_Start_IT(hsmartcard->hdmatx, (uint32_t)hsmartcard->pTxBuffPtr, (uint32_t)&hsmartcard->Instance->TDR, Size);
-
-    /* Clear the TC flag in the ICR register */
-    CLEAR_BIT(hsmartcard->Instance->ICR, USART_ICR_TCCF);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmartcard);
-
-    /* Enable the UART Error Interrupt: (Frame error) */
-    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the DMA transfer for transmit request by setting the DMAT bit
-       in the SMARTCARD associated USART CR3 register */
-    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in DMA mode.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param  pData pointer to data buffer.
-  * @param  Size amount of data to be received.
-  * @note   The SMARTCARD-associated USART parity is enabled (PCE = 1),
-  *         the received data contain the parity bit (MSB position).
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Rx process is not already ongoing */
-  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hsmartcard);
-
-    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsmartcard->RxState   = HAL_SMARTCARD_STATE_BUSY_RX;
-
-    hsmartcard->pRxBuffPtr = pData;
-    hsmartcard->RxXferSize = Size;
-
-    /* Set the SMARTCARD DMA transfer complete callback */
-    hsmartcard->hdmarx->XferCpltCallback = SMARTCARD_DMAReceiveCplt;
-
-    /* Set the SMARTCARD DMA error callback */
-    hsmartcard->hdmarx->XferErrorCallback = SMARTCARD_DMAError;
-
-    /* Set the DMA abort callback */
-    hsmartcard->hdmarx->XferAbortCallback = NULL;
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hsmartcard->hdmarx, (uint32_t)&hsmartcard->Instance->RDR, (uint32_t)hsmartcard->pRxBuffPtr, Size);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmartcard);
-
-    /* Enable the UART Parity Error Interrupt */
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_PEIE);
-
-    /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the DMA transfer for the receiver request by setting the DMAR bit
-       in the SMARTCARD associated USART CR3 register */
-    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Abort ongoing transfers (blocking mode).
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable SMARTCARD Interrupts (Tx and Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_SMARTCARD_Abort(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Disable RTOIE, EOBIE, TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RTOIE | USART_CR1_EOBIE));
-  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the SMARTCARD DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the SMARTCARD DMA Tx channel : use blocking DMA Abort API (no callback) */
-    if(hsmartcard->hdmatx != NULL)
-    {
-      /* Set the SMARTCARD DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      hsmartcard->hdmatx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(hsmartcard->hdmatx);
-    }
-  }
-
-  /* Disable the SMARTCARD DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the SMARTCARD DMA Rx channel : use blocking DMA Abort API (no callback) */
-    if(hsmartcard->hdmarx != NULL)
-    {
-      /* Set the SMARTCARD DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      hsmartcard->hdmarx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(hsmartcard->hdmarx);
-    }
-  }
-
-  /* Reset Tx and Rx transfer counters */
-  hsmartcard->TxXferCount = 0; 
-  hsmartcard->RxXferCount = 0; 
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
-
-  /* Restore hsmartcard->gState and hsmartcard->RxState to Ready */
-  hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
-  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-  /* Reset Handle ErrorCode to No Error */
-  hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Transmit transfer (blocking mode).
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @note   This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable SMARTCARD Interrupts (Tx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_SMARTCARD_AbortTransmit(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-  /* Check if a receive process is ongoing or not. If not disable ERR IT */
-  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
-  {
-    /* Disable the SMARTCARD Error Interrupt: (Frame error) */
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-  }
-
-  /* Disable the SMARTCARD DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the SMARTCARD DMA Tx channel : use blocking DMA Abort API (no callback) */
-    if(hsmartcard->hdmatx != NULL)
-    {
-      /* Set the SMARTCARD DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      hsmartcard->hdmatx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(hsmartcard->hdmatx);
-    }
-  }
-
-  /* Reset Tx transfer counter */
-  hsmartcard->TxXferCount = 0; 
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_FEF);
-
-  /* Restore hsmartcard->gState to Ready */
-  hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Receive transfer (blocking mode).
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @note   This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable SMARTCARD Interrupts (Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_SMARTCARD_AbortReceive(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Disable RTOIE, EOBIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE | USART_CR1_EOBIE));
-
-  /* Check if a Transmit process is ongoing or not. If not disable ERR IT */
-  if(hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
-  {
-    /* Disable the SMARTCARD Error Interrupt: (Frame error) */
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-  }
-
-  /* Disable the SMARTCARD DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the SMARTCARD DMA Rx channel : use blocking DMA Abort API (no callback) */
-    if(hsmartcard->hdmarx != NULL)
-    {
-      /* Set the SMARTCARD DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      hsmartcard->hdmarx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(hsmartcard->hdmarx);
-    }
-  }
-
-  /* Reset Rx transfer counter */
-  hsmartcard->RxXferCount = 0; 
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
-
-  /* Restore hsmartcard->RxState to Ready */
-  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing transfers (Interrupt mode).
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable SMARTCARD Interrupts (Tx and Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_SMARTCARD_Abort_IT(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  uint32_t abortcplt = 1;
-  
-  /* Disable RTOIE, EOBIE, TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RTOIE | USART_CR1_EOBIE));
-  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-  /* If DMA Tx and/or DMA Rx Handles are associated to SMARTCARD Handle, DMA Abort complete callbacks should be initialised
-     before any call to DMA Abort functions */
-  /* DMA Tx Handle is valid */
-  if(hsmartcard->hdmatx != NULL)
-  {
-    /* Set DMA Abort Complete callback if SMARTCARD DMA Tx request if enabled.
-       Otherwise, set it to NULL */
-    if(HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
-    {
-      hsmartcard->hdmatx->XferAbortCallback = SMARTCARD_DMATxAbortCallback;
-    }
-    else
-    {
-      hsmartcard->hdmatx->XferAbortCallback = NULL;
-    }
-  }
-  /* DMA Rx Handle is valid */
-  if(hsmartcard->hdmarx != NULL)
-  {
-    /* Set DMA Abort Complete callback if SMARTCARD DMA Rx request if enabled.
-       Otherwise, set it to NULL */
-    if(HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
-    {
-      hsmartcard->hdmarx->XferAbortCallback = SMARTCARD_DMARxAbortCallback;
-    }
-    else
-    {
-      hsmartcard->hdmarx->XferAbortCallback = NULL;
-    }
-  }
-  
-  /* Disable the SMARTCARD DMA Tx request if enabled */
-  if(HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
-  {
-    /* Disable DMA Tx at UART level */
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the SMARTCARD DMA Tx channel : use non blocking DMA Abort API (callback) */
-    if(hsmartcard->hdmatx != NULL)
-    {
-      /* SMARTCARD Tx DMA Abort callback has already been initialised : 
-         will lead to call HAL_SMARTCARD_AbortCpltCallback() at end of DMA abort procedure */
-
-      /* Abort DMA TX */
-      if(HAL_DMA_Abort_IT(hsmartcard->hdmatx) != HAL_OK)
-      {
-        hsmartcard->hdmatx->XferAbortCallback = NULL;
-      }
-      else
-      {
-        abortcplt = 0;
-      }
-    }
-  }
-
-  /* Disable the SMARTCARD DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the SMARTCARD DMA Rx channel : use non blocking DMA Abort API (callback) */
-    if(hsmartcard->hdmarx != NULL)
-    {
-      /* SMARTCARD Rx DMA Abort callback has already been initialised : 
-         will lead to call HAL_SMARTCARD_AbortCpltCallback() at end of DMA abort procedure */
-
-      /* Abort DMA RX */
-      if(HAL_DMA_Abort_IT(hsmartcard->hdmarx) != HAL_OK)
-      {
-        hsmartcard->hdmarx->XferAbortCallback = NULL;
-        abortcplt = 1;
-      }
-      else
-      {
-        abortcplt = 0;
-      }
-    }
-  }
-
-  /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
-  if (abortcplt == 1)
-  {
-    /* Reset Tx and Rx transfer counters */
-    hsmartcard->TxXferCount = 0; 
-    hsmartcard->RxXferCount = 0;
-
-    /* Reset errorCode */
-    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-
-    /* Clear the Error flags in the ICR register */
-    __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
-
-    /* Restore hsmartcard->gState and hsmartcard->RxState to Ready */
-    hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
-    hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_SMARTCARD_AbortCpltCallback(hsmartcard);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Transmit transfer (Interrupt mode).
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @note   This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable SMARTCARD Interrupts (Tx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_SMARTCARD_AbortTransmit_IT(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-  /* Check if a receive process is ongoing or not. If not disable ERR IT */
-  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
-  {
-    /* Disable the SMARTCARD Error Interrupt: (Frame error) */
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-  }
-
-  /* Disable the SMARTCARD DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the SMARTCARD DMA Tx channel : use non blocking DMA Abort API (callback) */
-    if(hsmartcard->hdmatx != NULL)
-    {
-      /* Set the SMARTCARD DMA Abort callback : 
-         will lead to call HAL_SMARTCARD_AbortCpltCallback() at end of DMA abort procedure */
-      hsmartcard->hdmatx->XferAbortCallback = SMARTCARD_DMATxOnlyAbortCallback;
-
-      /* Abort DMA TX */
-      if(HAL_DMA_Abort_IT(hsmartcard->hdmatx) != HAL_OK)
-      {
-        /* Call Directly hsmartcard->hdmatx->XferAbortCallback function in case of error */
-        hsmartcard->hdmatx->XferAbortCallback(hsmartcard->hdmatx);
-      }
-    }
-    else
-    {
-      /* Reset Tx transfer counter */
-      hsmartcard->TxXferCount = 0; 
-
-      /* Restore hsmartcard->gState to Ready */
-      hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-
-      /* As no DMA to be aborted, call directly user Abort complete callback */
-      HAL_SMARTCARD_AbortTransmitCpltCallback(hsmartcard);
-    }
-  }
-  else
-  {
-    /* Reset Tx transfer counter */
-    hsmartcard->TxXferCount = 0; 
-
-    /* Clear the Error flags in the ICR register */
-    __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_FEF);
-
-    /* Restore hsmartcard->gState to Ready */
-    hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_SMARTCARD_AbortTransmitCpltCallback(hsmartcard);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Receive transfer (Interrupt mode).
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @note   This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable SMARTCARD Interrupts (Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_SMARTCARD_AbortReceive_IT(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Disable RTOIE, EOBIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE | USART_CR1_EOBIE));
-
-  /* Check if a Transmit process is ongoing or not. If not disable ERR IT */
-  if(hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
-  {
-    /* Disable the SMARTCARD Error Interrupt: (Frame error) */
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-  }
-
-  /* Disable the SMARTCARD DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the SMARTCARD DMA Rx channel : use non blocking DMA Abort API (callback) */
-    if(hsmartcard->hdmarx != NULL)
-    {
-      /* Set the SMARTCARD DMA Abort callback : 
-         will lead to call HAL_SMARTCARD_AbortCpltCallback() at end of DMA abort procedure */
-      hsmartcard->hdmarx->XferAbortCallback = SMARTCARD_DMARxOnlyAbortCallback;
-
-      /* Abort DMA RX */
-      if(HAL_DMA_Abort_IT(hsmartcard->hdmarx) != HAL_OK)
-      {
-        /* Call Directly hsmartcard->hdmarx->XferAbortCallback function in case of error */
-        hsmartcard->hdmarx->XferAbortCallback(hsmartcard->hdmarx);
-      }
-    }
-    else
-    {
-      /* Reset Rx transfer counter */
-      hsmartcard->RxXferCount = 0; 
-
-      /* Clear the Error flags in the ICR register */
-      __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
-
-      /* Restore hsmartcard->RxState to Ready */
-      hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-      /* As no DMA to be aborted, call directly user Abort complete callback */
-      HAL_SMARTCARD_AbortReceiveCpltCallback(hsmartcard);
-    }
-  }
-  else
-  {
-    /* Reset Rx transfer counter */
-    hsmartcard->RxXferCount = 0; 
-
-    /* Clear the Error flags in the ICR register */
-    __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
-
-    /* Restore hsmartcard->RxState to Ready */
-    hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_SMARTCARD_AbortReceiveCpltCallback(hsmartcard);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Handle SMARTCARD interrupt requests.
-  * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-void HAL_SMARTCARD_IRQHandler(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  uint32_t isrflags   = READ_REG(hsmartcard->Instance->ISR);
-  uint32_t cr1its     = READ_REG(hsmartcard->Instance->CR1);
-  uint32_t cr3its;
-  uint32_t errorflags;
-
-  /* If no error occurs */
-  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
-  if (errorflags == RESET)
-  {
-    /* SMARTCARD in mode Receiver ---------------------------------------------------*/
-    if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-    {
-      SMARTCARD_Receive_IT(hsmartcard);
-      /* Clear RXNE interrupt flag done by reading RDR in SMARTCARD_Receive_IT() */
-      return;
-    }
-  }  
-
-  /* If some errors occur */
-  cr3its = READ_REG(hsmartcard->Instance->CR3);
-  if(   (errorflags != RESET) 
-     && (    ((cr3its & USART_CR3_EIE) != RESET)
-          || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != RESET)) )
-  {
-    /* SMARTCARD parity error interrupt occurred -------------------------------------*/
-    if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
-    {
-      __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_PEF);
-
-      hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_PE;
-    }
-
-    /* SMARTCARD frame error interrupt occurred --------------------------------------*/
-    if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    {
-      __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_FEF);
-
-      hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_FE;
-    }
-
-    /* SMARTCARD noise error interrupt occurred --------------------------------------*/
-    if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    {
-      __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_NEF);
-
-      hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_NE;
-    }
-
-    /* SMARTCARD Over-Run interrupt occurred -----------------------------------------*/
-    if(((isrflags & USART_ISR_ORE) != RESET) &&
-       (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET)))
-    {
-      __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_OREF);
-
-      hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_ORE;
-    }
-
-    /* SMARTCARD receiver timeout interrupt occurred -----------------------------------------*/
-    if(((isrflags & USART_ISR_RTOF) != RESET) && ((cr1its & USART_CR1_RTOIE) != RESET))
-    {
-      __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_RTOF);
-
-      hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_RTO;
-    }
-
-    /* Call SMARTCARD Error Call back function if need be --------------------------*/
-    if(hsmartcard->ErrorCode != HAL_SMARTCARD_ERROR_NONE)
-    {
-      /* SMARTCARD in mode Receiver ---------------------------------------------------*/
-      if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-      {
-        SMARTCARD_Receive_IT(hsmartcard);
-      }
-
-      /* If Error is to be considered as blocking :
-          - Receiver Timeout error in Reception
-          - Overrun error in Reception
-          - any error occurs in DMA mode reception
-      */
-      if (   ((hsmartcard->ErrorCode & (HAL_SMARTCARD_ERROR_RTO | HAL_SMARTCARD_ERROR_ORE)) != RESET)
-          || (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR)))
-      {  
-        /* Blocking error : transfer is aborted
-           Set the SMARTCARD state ready to be able to start again the process,
-           Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
-        SMARTCARD_EndRxTransfer(hsmartcard);
-
-        /* Disable the SMARTCARD DMA Rx request if enabled */
-        if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
-        {
-          CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
-
-          /* Abort the SMARTCARD DMA Rx channel */
-          if(hsmartcard->hdmarx != NULL)
-          {
-            /* Set the SMARTCARD DMA Abort callback : 
-               will lead to call HAL_SMARTCARD_ErrorCallback() at end of DMA abort procedure */
-            hsmartcard->hdmarx->XferAbortCallback = SMARTCARD_DMAAbortOnError;
-
-            /* Abort DMA RX */
-            if(HAL_DMA_Abort_IT(hsmartcard->hdmarx) != HAL_OK)
-            {
-              /* Call Directly hsmartcard->hdmarx->XferAbortCallback function in case of error */
-              hsmartcard->hdmarx->XferAbortCallback(hsmartcard->hdmarx);
-            }
-          }
-          else
-          {
-            /* Call user error callback */
-            HAL_SMARTCARD_ErrorCallback(hsmartcard);
-          }
-        }
-        else
-        {
-          /* Call user error callback */
-          HAL_SMARTCARD_ErrorCallback(hsmartcard);
-        }
-      }
-      /* other error type to be considered as blocking :
-          - Frame error in Transmission
-      */
-      else if ((hsmartcard->gState == HAL_SMARTCARD_STATE_BUSY_TX) && ((hsmartcard->ErrorCode & HAL_SMARTCARD_ERROR_FE) != RESET))
-      {
-        /* Blocking error : transfer is aborted
-           Set the SMARTCARD state ready to be able to start again the process,
-           Disable Tx Interrupts, and disable Tx DMA request, if ongoing */
-        SMARTCARD_EndTxTransfer(hsmartcard);
-
-        /* Disable the SMARTCARD DMA Tx request if enabled */
-        if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
-        {
-          CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
-
-          /* Abort the SMARTCARD DMA Tx channel */
-          if(hsmartcard->hdmatx != NULL)
-          {
-            /* Set the SMARTCARD DMA Abort callback : 
-               will lead to call HAL_SMARTCARD_ErrorCallback() at end of DMA abort procedure */
-            hsmartcard->hdmatx->XferAbortCallback = SMARTCARD_DMAAbortOnError;
-
-            /* Abort DMA TX */
-            if(HAL_DMA_Abort_IT(hsmartcard->hdmatx) != HAL_OK)
-            {
-              /* Call Directly hsmartcard->hdmatx->XferAbortCallback function in case of error */
-              hsmartcard->hdmatx->XferAbortCallback(hsmartcard->hdmatx);
-            }
-          }
-          else
-          {
-            /* Call user error callback */
-            HAL_SMARTCARD_ErrorCallback(hsmartcard);
-          }
-        }
-        else
-        {
-          /* Call user error callback */
-          HAL_SMARTCARD_ErrorCallback(hsmartcard);
-        }
-      }
-      else
-      {
-        /* Non Blocking error : transfer could go on. 
-           Error is notified to user through user error callback */
-        HAL_SMARTCARD_ErrorCallback(hsmartcard);
-        hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-      }
-    }
-    return;
-
-  } /* End if some error occurs */
-
-  /* SMARTCARD in mode Receiver, end of block interruption ------------------------*/
-  if(((isrflags & USART_ISR_EOBF) != RESET) && ((cr1its & USART_CR1_EOBIE) != RESET))
-  {
-    hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-    __HAL_UNLOCK(hsmartcard);
-    HAL_SMARTCARD_RxCpltCallback(hsmartcard);
-    /* Clear EOBF interrupt after HAL_SMARTCARD_RxCpltCallback() call for the End of Block information
-     * to be available during HAL_SMARTCARD_RxCpltCallback() processing */
-    __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_EOBF);
-    return;
-  }
-
-  /* SMARTCARD in mode Transmitter ------------------------------------------------*/
-  if(((isrflags & USART_ISR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
-  {
-    SMARTCARD_Transmit_IT(hsmartcard);
-    return;
-  }
-
-  /* SMARTCARD in mode Transmitter (transmission end) ------------------------*/
-  if((__HAL_SMARTCARD_GET_IT(hsmartcard, SMARTCARD_IT_TC) != RESET) &&(__HAL_SMARTCARD_GET_IT_SOURCE(hsmartcard, SMARTCARD_IT_TC) != RESET))
-  {
-    SMARTCARD_EndTransmit_IT(hsmartcard);
-    return;
-  }
-}
-
-/**
-  * @brief  Tx Transfer completed callback.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_TxCpltCallback(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmartcard);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_TxCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Rx Transfer completed callback.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_RxCpltCallback(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmartcard);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_RxCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  SMARTCARD error callback.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_ErrorCallback(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmartcard);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_ErrorCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  SMARTCARD Abort Complete callback.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_AbortCpltCallback (SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmartcard);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_AbortCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  SMARTCARD Abort Complete callback.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_AbortTransmitCpltCallback (SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmartcard);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_AbortTransmitCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  SMARTCARD Abort Receive Complete callback.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_AbortReceiveCpltCallback (SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmartcard);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_AbortReceiveCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Exported_Functions_Group4 Peripheral State and Errors functions
-  *  @brief   SMARTCARD State and Errors functions
-  *
-@verbatim
-  ==============================================================================
-                  ##### Peripheral State and Errors functions #####
-  ==============================================================================
-  [..]
-    This subsection provides a set of functions allowing to return the State of SmartCard
-    handle and also return Peripheral Errors occurred during communication process
-     (+) HAL_SMARTCARD_GetState() API can be helpful to check in run-time the state
-         of the SMARTCARD peripheral.
-     (+) HAL_SMARTCARD_GetError() checks in run-time errors that could occur during
-         communication.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the SMARTCARD handle state.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval SMARTCARD handle state
-  */
-HAL_SMARTCARD_StateTypeDef HAL_SMARTCARD_GetState(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Return SMARTCARD handle state */
-  uint32_t temp1= 0x00, temp2 = 0x00;
-  temp1 = hsmartcard->gState;
-  temp2 = hsmartcard->RxState;
-
-  return (HAL_SMARTCARD_StateTypeDef)(temp1 | temp2);
-}
-
-/**
-  * @brief  Return the SMARTCARD handle error code.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval SMARTCARD handle Error Code
-*/
-uint32_t HAL_SMARTCARD_GetError(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  return hsmartcard->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Private_Functions SMARTCARD Private Functions
-  * @{
-  */
-
-/**
-  * @brief Configure the SMARTCARD associated USART peripheral.
-  * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-static HAL_StatusTypeDef SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  uint32_t tmpreg                          = 0x00000000U;
-  SMARTCARD_ClockSourceTypeDef clocksource = SMARTCARD_CLOCKSOURCE_UNDEFINED;
-  HAL_StatusTypeDef ret                    = HAL_OK;
-
-  /* Check the parameters */
-  assert_param(IS_SMARTCARD_INSTANCE(hsmartcard->Instance));
-  assert_param(IS_SMARTCARD_BAUDRATE(hsmartcard->Init.BaudRate));
-  assert_param(IS_SMARTCARD_WORD_LENGTH(hsmartcard->Init.WordLength));
-  assert_param(IS_SMARTCARD_STOPBITS(hsmartcard->Init.StopBits));
-  assert_param(IS_SMARTCARD_PARITY(hsmartcard->Init.Parity));
-  assert_param(IS_SMARTCARD_MODE(hsmartcard->Init.Mode));
-  assert_param(IS_SMARTCARD_POLARITY(hsmartcard->Init.CLKPolarity));
-  assert_param(IS_SMARTCARD_PHASE(hsmartcard->Init.CLKPhase));
-  assert_param(IS_SMARTCARD_LASTBIT(hsmartcard->Init.CLKLastBit));
-  assert_param(IS_SMARTCARD_ONE_BIT_SAMPLE(hsmartcard->Init.OneBitSampling));
-  assert_param(IS_SMARTCARD_NACK(hsmartcard->Init.NACKEnable));
-  assert_param(IS_SMARTCARD_TIMEOUT(hsmartcard->Init.TimeOutEnable));
-  assert_param(IS_SMARTCARD_AUTORETRY_COUNT(hsmartcard->Init.AutoRetryCount));
-
-  /*-------------------------- USART CR1 Configuration -----------------------*/
-  /* In SmartCard mode, M and PCE are forced to 1 (8 bits + parity).
-   * Oversampling is forced to 16 (OVER8 = 0).
-   * Configure the Parity and Mode:
-   *  set PS bit according to hsmartcard->Init.Parity value
-   *  set TE and RE bits according to hsmartcard->Init.Mode value */
-  tmpreg = (uint32_t) hsmartcard->Init.Parity | hsmartcard->Init.Mode;
-  /* in case of TX-only mode, if NACK is enabled, the USART must be able to monitor 
-     the bidirectional line to detect a NACK signal in case of parity error. 
-     Therefore, the receiver block must be enabled as well (RE bit must be set). */
-  if((hsmartcard->Init.Mode == SMARTCARD_MODE_TX) && (hsmartcard->Init.NACKEnable == SMARTCARD_NACK_ENABLE))
-  {
-    tmpreg |= USART_CR1_RE;   
-  }
-  tmpreg |= (uint32_t) hsmartcard->Init.WordLength;
-  MODIFY_REG(hsmartcard->Instance->CR1, USART_CR1_FIELDS, tmpreg);
-
-  /*-------------------------- USART CR2 Configuration -----------------------*/
-  tmpreg = hsmartcard->Init.StopBits;
-  /* Synchronous mode is activated by default */
-  tmpreg |= (uint32_t) USART_CR2_CLKEN | hsmartcard->Init.CLKPolarity;
-  tmpreg |= (uint32_t) hsmartcard->Init.CLKPhase | hsmartcard->Init.CLKLastBit;
-  tmpreg |= (uint32_t) hsmartcard->Init.TimeOutEnable;
-  MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_FIELDS, tmpreg);
-
-  /*-------------------------- USART CR3 Configuration -----------------------*/
-  /* Configure
-   * - one-bit sampling method versus three samples' majority rule
-   *   according to hsmartcard->Init.OneBitSampling
-   * - NACK transmission in case of parity error according
-   *   to hsmartcard->Init.NACKEnable
-   * - autoretry counter according to hsmartcard->Init.AutoRetryCount     */
-  tmpreg =  (uint32_t) hsmartcard->Init.OneBitSampling | hsmartcard->Init.NACKEnable;
-  tmpreg |= ((uint32_t)hsmartcard->Init.AutoRetryCount << SMARTCARD_CR3_SCARCNT_LSB_POS);
-  MODIFY_REG(hsmartcard->Instance-> CR3,USART_CR3_FIELDS, tmpreg);
-
-  /*-------------------------- USART GTPR Configuration ----------------------*/
-  tmpreg = (hsmartcard->Init.Prescaler | ((uint32_t)hsmartcard->Init.GuardTime << SMARTCARD_GTPR_GT_LSB_POS));
-  MODIFY_REG(hsmartcard->Instance->GTPR, (USART_GTPR_GT|USART_GTPR_PSC), tmpreg);
-
-  /*-------------------------- USART RTOR Configuration ----------------------*/
-  tmpreg =   ((uint32_t)hsmartcard->Init.BlockLength << SMARTCARD_RTOR_BLEN_LSB_POS);
-  if (hsmartcard->Init.TimeOutEnable == SMARTCARD_TIMEOUT_ENABLE)
-  {
-    assert_param(IS_SMARTCARD_TIMEOUT_VALUE(hsmartcard->Init.TimeOutValue));
-    tmpreg |=  (uint32_t) hsmartcard->Init.TimeOutValue;
-  }
-  MODIFY_REG(hsmartcard->Instance->RTOR, (USART_RTOR_RTO|USART_RTOR_BLEN), tmpreg);
-
-  /*-------------------------- USART BRR Configuration -----------------------*/
-  SMARTCARD_GETCLOCKSOURCE(hsmartcard, clocksource);
-  switch (clocksource)
-  {
-    case SMARTCARD_CLOCKSOURCE_PCLK1:
-      hsmartcard->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK1Freq() + (hsmartcard->Init.BaudRate/2U)) / hsmartcard->Init.BaudRate);
-      break;
-    case SMARTCARD_CLOCKSOURCE_PCLK2:
-      hsmartcard->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK2Freq() + (hsmartcard->Init.BaudRate/2U)) / hsmartcard->Init.BaudRate);
-      break;
-    case SMARTCARD_CLOCKSOURCE_HSI:
-      hsmartcard->Instance->BRR = (uint16_t)((HSI_VALUE + (hsmartcard->Init.BaudRate/2U)) / hsmartcard->Init.BaudRate);
-      break;
-    case SMARTCARD_CLOCKSOURCE_SYSCLK:
-      hsmartcard->Instance->BRR = (uint16_t)((HAL_RCC_GetSysClockFreq() + (hsmartcard->Init.BaudRate/2U)) / hsmartcard->Init.BaudRate);
-      break;
-    case SMARTCARD_CLOCKSOURCE_LSE:
-      hsmartcard->Instance->BRR = (uint16_t)((LSE_VALUE + (hsmartcard->Init.BaudRate/2U)) / hsmartcard->Init.BaudRate);
-      break;
-    case SMARTCARD_CLOCKSOURCE_UNDEFINED:
-    default:
-      ret = HAL_ERROR;
-      break;
-  }
-
-  return ret;
-}
-
-
-/**
-  * @brief Configure the SMARTCARD associated USART peripheral advanced features.
-  * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-static void SMARTCARD_AdvFeatureConfig(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Check whether the set of advanced features to configure is properly set */
-  assert_param(IS_SMARTCARD_ADVFEATURE_INIT(hsmartcard->AdvancedInit.AdvFeatureInit));
-
-  /* if required, configure TX pin active level inversion */
-  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_TXINVERT_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_TXINV(hsmartcard->AdvancedInit.TxPinLevelInvert));
-    MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_TXINV, hsmartcard->AdvancedInit.TxPinLevelInvert);
-  }
-
-  /* if required, configure RX pin active level inversion */
-  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_RXINVERT_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_RXINV(hsmartcard->AdvancedInit.RxPinLevelInvert));
-    MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_RXINV, hsmartcard->AdvancedInit.RxPinLevelInvert);
-  }
-
-  /* if required, configure data inversion */
-  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_DATAINVERT_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_DATAINV(hsmartcard->AdvancedInit.DataInvert));
-    MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_DATAINV, hsmartcard->AdvancedInit.DataInvert);
-  }
-
-  /* if required, configure RX/TX pins swap */
-  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_SWAP_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_SWAP(hsmartcard->AdvancedInit.Swap));
-    MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_SWAP, hsmartcard->AdvancedInit.Swap);
-  }
-
-  /* if required, configure RX overrun detection disabling */
-  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_RXOVERRUNDISABLE_INIT))
-  {
-    assert_param(IS_SMARTCARD_OVERRUN(hsmartcard->AdvancedInit.OverrunDisable));
-    MODIFY_REG(hsmartcard->Instance->CR3, USART_CR3_OVRDIS, hsmartcard->AdvancedInit.OverrunDisable);
-  }
-
-  /* if required, configure DMA disabling on reception error */
-  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_DMADISABLEONERROR_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_DMAONRXERROR(hsmartcard->AdvancedInit.DMADisableonRxError));
-    MODIFY_REG(hsmartcard->Instance->CR3, USART_CR3_DDRE, hsmartcard->AdvancedInit.DMADisableonRxError);
-  }
-
-  /* if required, configure MSB first on communication line */
-  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_MSBFIRST_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_MSBFIRST(hsmartcard->AdvancedInit.MSBFirst));
-    MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_MSBFIRST, hsmartcard->AdvancedInit.MSBFirst);
-  }
-
-}
-
-/**
-  * @brief Check the SMARTCARD Idle State.
-  * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMARTCARD_CheckIdleState(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  uint32_t tickstart = 0;
-
-  /* Initialize the SMARTCARD ErrorCode */
-  hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-
-  /* Init tickstart for timeout managment*/
-  tickstart = HAL_GetTick();
-
-  /* Check if the Transmitter is enabled */
-  if((hsmartcard->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
-  {
-    /* Wait until TEACK flag is set */
-    if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, USART_ISR_TEACK, RESET, tickstart, SMARTCARD_TEACK_REACK_TIMEOUT) != HAL_OK)
-    {
-      /* Timeout occurred */
-      return HAL_TIMEOUT;
-    }
-  }
-  /* Check if the Receiver is enabled */
-  if((hsmartcard->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
-  {
-    /* Wait until REACK flag is set */
-    if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, USART_ISR_REACK, RESET, tickstart, SMARTCARD_TEACK_REACK_TIMEOUT) != HAL_OK)
-    {
-      /* Timeout occurred */
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* Initialize the SMARTCARD states */
-  hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
-  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hsmartcard);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle SMARTCARD Communication Timeout.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param  Flag Specifies the SMARTCARD flag to check.
-  * @param  Status The new Flag status (SET or RESET).
-  * @param  Tickstart Tick start value
-  * @param  Timeout Timeout duration.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMARTCARD_WaitOnFlagUntilTimeout(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
-{
-  /* Wait until flag is set */
-  while((__HAL_SMARTCARD_GET_FLAG(hsmartcard, Flag) ? SET : RESET) == Status)
-  {
-    /* Check for the Timeout */
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0) || ((HAL_GetTick()-Tickstart) > Timeout))
-      {
-        /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
-        CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
-        CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-        hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
-        hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hsmartcard);
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  End ongoing Tx transfer on SMARTCARD peripheral (following error detection or Transmit completion).
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *               the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-static void SMARTCARD_EndTxTransfer(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Disable TXEIE, TCIE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-  /* At end of Tx process, restore hsmartcard->gState to Ready */
-  hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-}
-
-
-/**
-  * @brief  End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *               the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-static void SMARTCARD_EndRxTransfer(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-  /* At end of Rx process, restore hsmartcard->RxState to Ready */
-  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-}
-
-
-/**
-  * @brief  DMA SMARTCARD transmit process complete callback.
-  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SMARTCARD_DMATransmitCplt(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef*)(hdma->Parent);
-  hsmartcard->TxXferCount = 0;
-
-  /* Disable the DMA transfer for transmit request by resetting the DMAT bit
-  in the SMARTCARD associated USART CR3 register */
-  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
-
-  /* Enable the SMARTCARD Transmit Complete Interrupt */
-  __HAL_SMARTCARD_ENABLE_IT(hsmartcard, SMARTCARD_IT_TC);
-}
-
-/**
-  * @brief  DMA SMARTCARD receive process complete callback.
-  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SMARTCARD_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef*)(hdma->Parent);
-  hsmartcard->RxXferCount = 0;
-
-  /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_PEIE);
-  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
-     in the SMARTCARD associated USART CR3 register */
-  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
-
-  /* At end of Rx process, restore hsmartcard->RxState to Ready */
-  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-  HAL_SMARTCARD_RxCpltCallback(hsmartcard);
-}
-
-/**
-  * @brief  DMA SMARTCARD communication error callback.
-  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SMARTCARD_DMAError(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef*)(hdma->Parent);
-
-  /* Stop SMARTCARD DMA Tx request if ongoing */
-  if (  (hsmartcard->gState == HAL_SMARTCARD_STATE_BUSY_TX)
-      &&(HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT)) )
-  {
-    hsmartcard->TxXferCount = 0;
-    SMARTCARD_EndTxTransfer(hsmartcard);
-  }
-
-  /* Stop SMARTCARD DMA Rx request if ongoing */
-  if (  (hsmartcard->RxState == HAL_SMARTCARD_STATE_BUSY_RX)
-      &&(HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR)) )
-  {
-    hsmartcard->RxXferCount = 0;
-    SMARTCARD_EndRxTransfer(hsmartcard);
-  }
-
-  hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_DMA;
-  HAL_SMARTCARD_ErrorCallback(hsmartcard);
-}
-
-/**
-  * @brief  DMA SMARTCARD communication abort callback, when initiated by HAL services on Error
-  *         (To be called at end of DMA Abort procedure following error occurrence).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void SMARTCARD_DMAAbortOnError(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef*)(hdma->Parent);
-  hsmartcard->RxXferCount = 0;
-  hsmartcard->TxXferCount = 0;
-
-  HAL_SMARTCARD_ErrorCallback(hsmartcard);
-}
-
-/**
-  * @brief  DMA SMARTCARD Tx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Tx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Rx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void SMARTCARD_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef* )(hdma->Parent);
-  
-  hsmartcard->hdmatx->XferAbortCallback = NULL;
-
-  /* Check if an Abort process is still ongoing */
-  if(hsmartcard->hdmarx != NULL)
-  {
-    if(hsmartcard->hdmarx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-  
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  hsmartcard->TxXferCount = 0;
-  hsmartcard->RxXferCount = 0;
-
-  /* Reset errorCode */
-  hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
-
-  /* Restore hsmartcard->gState and hsmartcard->RxState to Ready */
-  hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
-  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_SMARTCARD_AbortCpltCallback(hsmartcard);
-}
-
-
-/**
-  * @brief  DMA SMARTCARD Rx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Rx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Tx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void SMARTCARD_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef* )(hdma->Parent);
-  
-  hsmartcard->hdmarx->XferAbortCallback = NULL;
-
-  /* Check if an Abort process is still ongoing */
-  if(hsmartcard->hdmatx != NULL)
-  {
-    if(hsmartcard->hdmatx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-  
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  hsmartcard->TxXferCount = 0;
-  hsmartcard->RxXferCount = 0;
-
-  /* Reset errorCode */
-  hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
-
-  /* Restore hsmartcard->gState and hsmartcard->RxState to Ready */
-  hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
-  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_SMARTCARD_AbortCpltCallback(hsmartcard);
-}
-
-
-/**
-  * @brief  DMA SMARTCARD Tx communication abort callback, when initiated by user by a call to
-  *         HAL_SMARTCARD_AbortTransmit_IT API (Abort only Tx transfer)
-  *         (This callback is executed at end of DMA Tx Abort procedure following user abort request,
-  *         and leads to user Tx Abort Complete callback execution).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void SMARTCARD_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef*)(hdma->Parent);
-
-  hsmartcard->TxXferCount = 0;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_FEF);
-
-  /* Restore hsmartcard->gState to Ready */
-  hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_SMARTCARD_AbortTransmitCpltCallback(hsmartcard);
-}
-
-/**
-  * @brief  DMA SMARTCARD Rx communication abort callback, when initiated by user by a call to
-  *         HAL_SMARTCARD_AbortReceive_IT API (Abort only Rx transfer)
-  *         (This callback is executed at end of DMA Rx Abort procedure following user abort request,
-  *         and leads to user Rx Abort Complete callback execution).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void SMARTCARD_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsmartcard = ( SMARTCARD_HandleTypeDef* )(hdma->Parent);
-
-  hsmartcard->RxXferCount = 0;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
-
-  /* Restore hsmartcard->RxState to Ready */
-  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_SMARTCARD_AbortReceiveCpltCallback(hsmartcard);
-}
-
-/**
-  * @brief Send an amount of data in non-blocking mode.
-  * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMARTCARD module.
-  *         Function called under interruption only, once
-  *         interruptions have been enabled by HAL_SMARTCARD_Transmit_IT()
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Check that a Tx process is ongoing */
-  if (hsmartcard->gState == HAL_SMARTCARD_STATE_BUSY_TX)
-  {
-    if(hsmartcard->TxXferCount == 0U)
-    {
-      /* Disable the SMARTCARD Transmit Data Register Empty Interrupt */
-      CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_TXEIE);
-
-      /* Enable the SMARTCARD Transmit Complete Interrupt */
-      SET_BIT(hsmartcard->Instance->CR1, USART_CR1_TCIE);
-
-      return HAL_OK;
-    }
-    else
-    {
-      hsmartcard->Instance->TDR = (*hsmartcard->pTxBuffPtr++ & (uint8_t)0xFFU);
-      hsmartcard->TxXferCount--;
-
-      return HAL_OK;
-    }
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Wrap up transmission in non-blocking mode.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMARTCARD_EndTransmit_IT(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Disable the SMARTCARD Transmit Complete Interrupt */
-  CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_TCIE);
-
-  /* Check if a receive process is ongoing or not. If not disable ERR IT */
-  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
-  {
-    /* Disable the SMARTCARD Error Interrupt: (Frame error) */
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-  }
-
-  /* Re-enable Rx at end of transmission if initial mode is Rx/Tx */
-  if(hsmartcard->Init.Mode == SMARTCARD_MODE_TX_RX)
-  {
-    /* Disable the Peripheral first to update modes */
-    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_RE);
-    /* Enable the Peripheral */
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-  }
-  
-  /* Tx process is ended, restore hsmartcard->gState to Ready */
-  hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-
-  HAL_SMARTCARD_TxCpltCallback(hsmartcard);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Receive an amount of data in non-blocking mode.
-  * @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMARTCARD module.
-  *         Function called under interruption only, once
-  *         interruptions have been enabled by HAL_SMARTCARD_Receive_IT().
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Check that a Rx process is ongoing */
-  if (hsmartcard->RxState == HAL_SMARTCARD_STATE_BUSY_RX)
-  {
-    *hsmartcard->pRxBuffPtr++ = (uint8_t)(hsmartcard->Instance->RDR & (uint8_t)0xFFU);
-
-    if(--hsmartcard->RxXferCount == 0U)
-    {
-      CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_RXNEIE);
-
-      /* Check if a transmit process is ongoing or not. If not disable ERR IT */
-      if(hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
-      {
-        /* Disable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */
-        CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-      }
-
-      /* Disable the SMARTCARD Parity Error Interrupt */
-      CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_PEIE);
-
-      hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-      HAL_SMARTCARD_RxCpltCallback(hsmartcard);
-
-      return HAL_OK;
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    /* Clear RXNE interrupt flag */
-    __HAL_SMARTCARD_SEND_REQ(hsmartcard, SMARTCARD_RXDATA_FLUSH_REQUEST);
-
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @}
-  */
-
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard_ex.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard_ex.c
deleted file mode 100755
index 14b99f3c..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard_ex.c
+++ /dev/null
@@ -1,207 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_smartcard_ex.c
-  * @author  MCD Application Team
-  * @brief   SMARTCARD HAL module driver.
-  *          This file provides extended firmware functions to manage the following
-  *          functionalities of the SmartCard.
-  *           + Initialization and de-initialization functions
-  *           + Peripheral Control functions
-  *
-  *
-  @verbatim
-  =============================================================================
-               ##### SMARTCARD peripheral extended features  #####
-  =============================================================================
-  [..]
-  The Extended SMARTCARD HAL driver can be used as follows:
-
-    (#) After having configured the SMARTCARD basic features with HAL_SMARTCARD_Init(),
-        then program SMARTCARD advanced features if required (TX/RX pins swap, TimeOut,
-        auto-retry counter,...) in the hsmartcard AdvancedInit structure.
-
-
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup SMARTCARDEx SMARTCARDEx
-  * @brief SMARTCARD Extended HAL module driver
-  * @{
-  */
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup SMARTCARDEx_Exported_Functions  SMARTCARD Extended Exported Functions
-  * @{
-  */
-
-/** @defgroup SMARTCARDEx_Exported_Functions_Group1 Extended Peripheral Control functions
-  * @brief    Extended control functions
-  *
-@verbatim
-  ===============================================================================
-                      ##### Peripheral Control functions #####
-  ===============================================================================
-  [..]
-  This subsection provides a set of functions allowing to initialize the SMARTCARD.
-     (+) HAL_SMARTCARDEx_BlockLength_Config() API allows to configure the Block Length on the fly
-     (+) HAL_SMARTCARDEx_TimeOut_Config() API allows to configure the receiver timeout value on the fly
-     (+) HAL_SMARTCARDEx_EnableReceiverTimeOut() API enables the receiver timeout feature
-     (+) HAL_SMARTCARDEx_DisableReceiverTimeOut() API disables the receiver timeout feature
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Update on the fly the SMARTCARD block length in RTOR register.
-  * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param BlockLength: SMARTCARD block length (8-bit long at most)
-  * @retval None
-  */
-void HAL_SMARTCARDEx_BlockLength_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t BlockLength)
-{
-  MODIFY_REG(hsmartcard->Instance->RTOR, USART_RTOR_BLEN, ((uint32_t)BlockLength << SMARTCARD_RTOR_BLEN_LSB_POS));
-}
-
-/**
-  * @brief Update on the fly the receiver timeout value in RTOR register.
-  * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param TimeOutValue: receiver timeout value in number of baud blocks. The timeout
-  *                     value must be less or equal to 0x0FFFFFFFF.
-  * @retval None
-  */
-void HAL_SMARTCARDEx_TimeOut_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t TimeOutValue)
-{
-  assert_param(IS_SMARTCARD_TIMEOUT_VALUE(hsmartcard->Init.TimeOutValue));
-  MODIFY_REG(hsmartcard->Instance->RTOR, USART_RTOR_RTO, TimeOutValue);
-}
-
-/**
-  * @brief Enable the SMARTCARD receiver timeout feature.
-  * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARDEx_EnableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-
-  if(hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hsmartcard);
-
-    hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY;
-
-    /* Set the USART RTOEN bit */
-    SET_BIT(hsmartcard->Instance->CR2, USART_CR2_RTOEN);
-
-    hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmartcard);
-    
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Disable the SMARTCARD receiver timeout feature.
-  * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARDEx_DisableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-
-  if(hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hsmartcard);
-
-    hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY;
-
-    /* Clear the USART RTOEN bit */
-    CLEAR_BIT(hsmartcard->Instance->CR2, USART_CR2_RTOEN);
-
-    hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmartcard);
-    
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smbus.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smbus.c
deleted file mode 100755
index 0ad8200b..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smbus.c
+++ /dev/null
@@ -1,2161 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_smbus.c
-  * @author  MCD Application Team
-  * @brief   SMBUS HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the System Management Bus (SMBus) peripheral,
-  *          based on I2C principles of operation :
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral State and Errors functions
-  *
-  @verbatim
-  ==============================================================================
-                        ##### How to use this driver #####
-  ==============================================================================
-    [..]
-    The SMBUS HAL driver can be used as follows:
-
-    (#) Declare a SMBUS_HandleTypeDef handle structure, for example:
-        SMBUS_HandleTypeDef  hsmbus;
-
-    (#)Initialize the SMBUS low level resources by implementing the HAL_SMBUS_MspInit() API:
-        (##) Enable the SMBUSx interface clock
-        (##) SMBUS pins configuration
-            (+++) Enable the clock for the SMBUS GPIOs
-            (+++) Configure SMBUS pins as alternate function open-drain
-        (##) NVIC configuration if you need to use interrupt process
-            (+++) Configure the SMBUSx interrupt priority
-            (+++) Enable the NVIC SMBUS IRQ Channel
-
-    (#) Configure the Communication Clock Timing, Bus Timeout, Own Address1, Master Addressing mode,
-        Dual Addressing mode, Own Address2, Own Address2 Mask, General call, Nostretch mode,
-        Peripheral mode and Packet Error Check mode in the hsmbus Init structure.
-
-    (#) Initialize the SMBUS registers by calling the HAL_SMBUS_Init() API:
-        (++) These API's configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
-             by calling the customized HAL_SMBUS_MspInit(&hsmbus) API.
-
-    (#) To check if target device is ready for communication, use the function HAL_SMBUS_IsDeviceReady()
-
-    (#) For SMBUS IO operations, only one mode of operations is available within this driver
-
-    *** Interrupt mode IO operation ***
-    ===================================
-    [..]
-      (+) Transmit in master/host SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Master_Transmit_IT()
-      (++) At transmission end of transfer HAL_SMBUS_MasterTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_SMBUS_MasterTxCpltCallback()
-      (+) Receive in master/host SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Master_Receive_IT()
-      (++) At reception end of transfer HAL_SMBUS_MasterRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_SMBUS_MasterRxCpltCallback()
-      (+) Abort a master/host SMBUS process communication with Interrupt using HAL_SMBUS_Master_Abort_IT()
-      (++) The associated previous transfer callback is called at the end of abort process
-      (++) mean HAL_SMBUS_MasterTxCpltCallback() in case of previous state was master transmit
-      (++) mean HAL_SMBUS_MasterRxCpltCallback() in case of previous state was master receive
-      (+) Enable/disable the Address listen mode in slave/device or host/slave SMBUS mode
-           using HAL_SMBUS_EnableListen_IT() HAL_SMBUS_DisableListen_IT()
-      (++) When address slave/device SMBUS match, HAL_SMBUS_AddrCallback() is executed and user can
-           add his own code to check the Address Match Code and the transmission direction request by master/host (Write/Read).
-      (++) At Listen mode end HAL_SMBUS_ListenCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_SMBUS_ListenCpltCallback()
-      (+) Transmit in slave/device SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Slave_Transmit_IT()
-      (++) At transmission end of transfer HAL_SMBUS_SlaveTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_SMBUS_SlaveTxCpltCallback()
-      (+) Receive in slave/device SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Slave_Receive_IT()
-      (++) At reception end of transfer HAL_SMBUS_SlaveRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_SMBUS_SlaveRxCpltCallback()
-      (+) Enable/Disable the SMBUS alert mode using HAL_SMBUS_EnableAlert_IT() HAL_SMBUS_DisableAlert_IT()
-      (++) When SMBUS Alert is generated HAL_SMBUS_ErrorCallback() is executed and user can
-           add his own code by customization of function pointer HAL_SMBUS_ErrorCallback()
-           to check the Alert Error Code using function HAL_SMBUS_GetError()
-      (+) Get HAL state machine or error values using HAL_SMBUS_GetState() or HAL_SMBUS_GetError()
-      (+) In case of transfer Error, HAL_SMBUS_ErrorCallback() function is executed and user can
-           add his own code by customization of function pointer HAL_SMBUS_ErrorCallback()
-           to check the Error Code using function HAL_SMBUS_GetError()
-
-     *** SMBUS HAL driver macros list ***
-     ==================================
-     [..]
-       Below the list of most used macros in SMBUS HAL driver.
-
-      (+) __HAL_SMBUS_ENABLE:      Enable the SMBUS peripheral
-      (+) __HAL_SMBUS_DISABLE:     Disable the SMBUS peripheral
-      (+) __HAL_SMBUS_GET_FLAG:    Check whether the specified SMBUS flag is set or not
-      (+) __HAL_SMBUS_CLEAR_FLAG:  Clear the specified SMBUS pending flag
-      (+) __HAL_SMBUS_ENABLE_IT:   Enable the specified SMBUS interrupt
-      (+) __HAL_SMBUS_DISABLE_IT:  Disable the specified SMBUS interrupt
-
-     [..]
-       (@) You can refer to the SMBUS HAL driver header file for more useful macros
-
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup SMBUS SMBUS
-  * @brief SMBUS HAL module driver
-  * @{
-  */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup SMBUS_Private_Define SMBUS Private Constants
-  * @{
-  */
-#define TIMING_CLEAR_MASK   (0xF0FFFFFFU)      /*!< SMBUS TIMING clear register Mask */
-#define HAL_TIMEOUT_ADDR    (10000U)           /*!< 10 s  */
-#define HAL_TIMEOUT_BUSY    (25U)              /*!< 25 ms */
-#define HAL_TIMEOUT_DIR     (25U)              /*!< 25 ms */
-#define HAL_TIMEOUT_RXNE    (25U)              /*!< 25 ms */
-#define HAL_TIMEOUT_STOPF   (25U)              /*!< 25 ms */
-#define HAL_TIMEOUT_TC      (25U)              /*!< 25 ms */
-#define HAL_TIMEOUT_TCR     (25U)              /*!< 25 ms */
-#define HAL_TIMEOUT_TXIS    (25U)              /*!< 25 ms */
-#define MAX_NBYTE_SIZE      255U
-/**
-  * @}
-  */
-
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup SMBUS_Private_Functions SMBUS Private Functions
-  * @{
-  */
-static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
-
-static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest);
-static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest);
-static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus);
-static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus);
-
-static void SMBUS_ConvertOtherXferOptions(SMBUS_HandleTypeDef *hsmbus);
-
-static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus);
-
-static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus,  uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup SMBUS_Exported_Functions SMBUS Exported Functions
-  * @{
-  */
-
-/** @defgroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
- *  @brief    Initialization and Configuration functions
- *
-@verbatim
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This subsection provides a set of functions allowing to initialize and
-          deinitialize the SMBUSx peripheral:
-
-      (+) User must Implement HAL_SMBUS_MspInit() function in which he configures
-          all related peripherals resources (CLOCK, GPIO, IT and NVIC ).
-
-      (+) Call the function HAL_SMBUS_Init() to configure the selected device with
-          the selected configuration:
-        (++) Clock Timing
-        (++) Bus Timeout
-        (++) Analog Filer mode
-        (++) Own Address 1
-        (++) Addressing mode (Master, Slave)
-        (++) Dual Addressing mode
-        (++) Own Address 2
-        (++) Own Address 2 Mask
-        (++) General call mode
-        (++) Nostretch mode
-        (++) Packet Error Check mode
-        (++) Peripheral mode
-
-
-      (+) Call the function HAL_SMBUS_DeInit() to restore the default configuration
-          of the selected SMBUSx peripheral.
-
-      (+) Enable/Disable Analog/Digital filters with HAL_SMBUS_ConfigAnalogFilter() and
-          HAL_SMBUS_ConfigDigitalFilter().
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initialize the SMBUS according to the specified parameters
-  *         in the SMBUS_InitTypeDef and initialize the associated handle.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Check the SMBUS handle allocation */
-  if (hsmbus == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_SMBUS_INSTANCE(hsmbus->Instance));
-  assert_param(IS_SMBUS_ANALOG_FILTER(hsmbus->Init.AnalogFilter));
-  assert_param(IS_SMBUS_OWN_ADDRESS1(hsmbus->Init.OwnAddress1));
-  assert_param(IS_SMBUS_ADDRESSING_MODE(hsmbus->Init.AddressingMode));
-  assert_param(IS_SMBUS_DUAL_ADDRESS(hsmbus->Init.DualAddressMode));
-  assert_param(IS_SMBUS_OWN_ADDRESS2(hsmbus->Init.OwnAddress2));
-  assert_param(IS_SMBUS_OWN_ADDRESS2_MASK(hsmbus->Init.OwnAddress2Masks));
-  assert_param(IS_SMBUS_GENERAL_CALL(hsmbus->Init.GeneralCallMode));
-  assert_param(IS_SMBUS_NO_STRETCH(hsmbus->Init.NoStretchMode));
-  assert_param(IS_SMBUS_PEC(hsmbus->Init.PacketErrorCheckMode));
-  assert_param(IS_SMBUS_PERIPHERAL_MODE(hsmbus->Init.PeripheralMode));
-
-  if (hsmbus->State == HAL_SMBUS_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hsmbus->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC */
-    HAL_SMBUS_MspInit(hsmbus);
-  }
-
-  hsmbus->State = HAL_SMBUS_STATE_BUSY;
-
-  /* Disable the selected SMBUS peripheral */
-  __HAL_SMBUS_DISABLE(hsmbus);
-
-  /*---------------------------- SMBUSx TIMINGR Configuration ------------------------*/
-  /* Configure SMBUSx: Frequency range */
-  hsmbus->Instance->TIMINGR = hsmbus->Init.Timing & TIMING_CLEAR_MASK;
-
-  /*---------------------------- SMBUSx TIMEOUTR Configuration ------------------------*/
-  /* Configure SMBUSx: Bus Timeout  */
-  hsmbus->Instance->TIMEOUTR &= ~I2C_TIMEOUTR_TIMOUTEN;
-  hsmbus->Instance->TIMEOUTR &= ~I2C_TIMEOUTR_TEXTEN;
-  hsmbus->Instance->TIMEOUTR = hsmbus->Init.SMBusTimeout;
-
-  /*---------------------------- SMBUSx OAR1 Configuration -----------------------*/
-  /* Configure SMBUSx: Own Address1 and ack own address1 mode */
-  hsmbus->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
-
-  if (hsmbus->Init.OwnAddress1 != 0U)
-  {
-    if (hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_7BIT)
-    {
-      hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | hsmbus->Init.OwnAddress1);
-    }
-    else /* SMBUS_ADDRESSINGMODE_10BIT */
-    {
-      hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hsmbus->Init.OwnAddress1);
-    }
-  }
-
-  /*---------------------------- SMBUSx CR2 Configuration ------------------------*/
-  /* Configure SMBUSx: Addressing Master mode */
-  if (hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_10BIT)
-  {
-    hsmbus->Instance->CR2 = (I2C_CR2_ADD10);
-  }
-  /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process) */
-  /* AUTOEND and NACK bit will be manage during Transfer process */
-  hsmbus->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);
-
-  /*---------------------------- SMBUSx OAR2 Configuration -----------------------*/
-  /* Configure SMBUSx: Dual mode and Own Address2 */
-  hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | (hsmbus->Init.OwnAddress2Masks << 8U));
-
-  /*---------------------------- SMBUSx CR1 Configuration ------------------------*/
-  /* Configure SMBUSx: Generalcall and NoStretch mode */
-  hsmbus->Instance->CR1 = (hsmbus->Init.GeneralCallMode | hsmbus->Init.NoStretchMode | hsmbus->Init.PacketErrorCheckMode | hsmbus->Init.PeripheralMode | hsmbus->Init.AnalogFilter);
-
-  /* Enable Slave Byte Control only in case of Packet Error Check is enabled and SMBUS Peripheral is set in Slave mode */
-  if ((hsmbus->Init.PacketErrorCheckMode == SMBUS_PEC_ENABLE)
-      && ((hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP)))
-  {
-    hsmbus->Instance->CR1 |= I2C_CR1_SBC;
-  }
-
-  /* Enable the selected SMBUS peripheral */
-  __HAL_SMBUS_ENABLE(hsmbus);
-
-  hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-  hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
-  hsmbus->State = HAL_SMBUS_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitialize the SMBUS peripheral.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Check the SMBUS handle allocation */
-  if (hsmbus == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_SMBUS_INSTANCE(hsmbus->Instance));
-
-  hsmbus->State = HAL_SMBUS_STATE_BUSY;
-
-  /* Disable the SMBUS Peripheral Clock */
-  __HAL_SMBUS_DISABLE(hsmbus);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
-  HAL_SMBUS_MspDeInit(hsmbus);
-
-  hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-  hsmbus->PreviousState =  HAL_SMBUS_STATE_RESET;
-  hsmbus->State = HAL_SMBUS_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(hsmbus);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Initialize the SMBUS MSP.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-__weak void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief DeInitialize the SMBUS MSP.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-__weak void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Configure Analog noise filter.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  AnalogFilter This parameter can be one of the following values:
-  *         @arg @ref SMBUS_ANALOGFILTER_ENABLE
-  *         @arg @ref SMBUS_ANALOGFILTER_DISABLE
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_ConfigAnalogFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter)
-{
-  /* Check the parameters */
-  assert_param(IS_SMBUS_INSTANCE(hsmbus->Instance));
-  assert_param(IS_SMBUS_ANALOG_FILTER(AnalogFilter));
-
-  if (hsmbus->State == HAL_SMBUS_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hsmbus);
-
-    hsmbus->State = HAL_SMBUS_STATE_BUSY;
-
-    /* Disable the selected SMBUS peripheral */
-    __HAL_SMBUS_DISABLE(hsmbus);
-
-    /* Reset ANOFF bit */
-    hsmbus->Instance->CR1 &= ~(I2C_CR1_ANFOFF);
-
-    /* Set analog filter bit*/
-    hsmbus->Instance->CR1 |= AnalogFilter;
-
-    __HAL_SMBUS_ENABLE(hsmbus);
-
-    hsmbus->State = HAL_SMBUS_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Configure Digital noise filter.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_SMBUS_INSTANCE(hsmbus->Instance));
-  assert_param(IS_SMBUS_DIGITAL_FILTER(DigitalFilter));
-
-  if (hsmbus->State == HAL_SMBUS_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hsmbus);
-
-    hsmbus->State = HAL_SMBUS_STATE_BUSY;
-
-    /* Disable the selected SMBUS peripheral */
-    __HAL_SMBUS_DISABLE(hsmbus);
-
-    /* Get the old register value */
-    tmpreg = hsmbus->Instance->CR1;
-
-    /* Reset I2C DNF bits [11:8] */
-    tmpreg &= ~(I2C_CR1_DNF);
-
-    /* Set I2Cx DNF coefficient */
-    tmpreg |= DigitalFilter << I2C_CR1_DNF_Pos;
-
-    /* Store the new register value */
-    hsmbus->Instance->CR1 = tmpreg;
-
-    __HAL_SMBUS_ENABLE(hsmbus);
-
-    hsmbus->State = HAL_SMBUS_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_Exported_Functions_Group2 Input and Output operation functions
- *  @brief   Data transfers functions
- *
-@verbatim
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
-    [..]
-    This subsection provides a set of functions allowing to manage the SMBUS data
-    transfers.
-
-    (#) Blocking mode function to check if device is ready for usage is :
-        (++) HAL_SMBUS_IsDeviceReady()
-
-    (#) There is only one mode of transfer:
-       (++) Non-Blocking mode : The communication is performed using Interrupts.
-            These functions return the status of the transfer startup.
-            The end of the data processing will be indicated through the
-            dedicated SMBUS IRQ when using Interrupt mode.
-
-    (#) Non-Blocking mode functions with Interrupt are :
-        (++) HAL_SMBUS_Master_Transmit_IT()
-        (++) HAL_SMBUS_Master_Receive_IT()
-        (++) HAL_SMBUS_Slave_Transmit_IT()
-        (++) HAL_SMBUS_Slave_Receive_IT()
-        (++) HAL_SMBUS_EnableListen_IT() or alias HAL_SMBUS_EnableListen_IT()
-        (++) HAL_SMBUS_DisableListen_IT()
-        (++) HAL_SMBUS_EnableAlert_IT()
-        (++) HAL_SMBUS_DisableAlert_IT()
-
-    (#) A set of Transfer Complete Callbacks are provided in non-Blocking mode:
-        (++) HAL_SMBUS_MasterTxCpltCallback()
-        (++) HAL_SMBUS_MasterRxCpltCallback()
-        (++) HAL_SMBUS_SlaveTxCpltCallback()
-        (++) HAL_SMBUS_SlaveRxCpltCallback()
-        (++) HAL_SMBUS_AddrCallback()
-        (++) HAL_SMBUS_ListenCpltCallback()
-        (++) HAL_SMBUS_ErrorCallback()
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Transmit in master/host SMBUS mode an amount of data in non-blocking mode with Interrupt.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
-  /* Check the parameters */
-  assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
-  if (hsmbus->State == HAL_SMBUS_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hsmbus);
-
-    hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX;
-    hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-    /* Prepare transfer parameters */
-    hsmbus->pBuffPtr = pData;
-    hsmbus->XferCount = Size;
-    hsmbus->XferOptions = XferOptions;
-
-    /* In case of Quick command, remove autoend mode */
-    /* Manage the stop generation by software */
-    if (hsmbus->pBuffPtr == NULL)
-    {
-      hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE;
-    }
-
-    if (Size > MAX_NBYTE_SIZE)
-    {
-      hsmbus->XferSize = MAX_NBYTE_SIZE;
-    }
-    else
-    {
-      hsmbus->XferSize = Size;
-    }
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
-    if ((hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount))
-    {
-      SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_WRITE);
-    }
-    else
-    {
-      /* If transfer direction not change, do not generate Restart Condition */
-      /* Mean Previous state is same as current state */
-      if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX) && (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(hsmbus->XferOptions) == 0))
-      {
-        SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
-      }
-      /* Else transfer direction change, so generate Restart with new transfer direction */
-      else
-      {
-        /* Convert OTHER_xxx XferOptions if any */
-        SMBUS_ConvertOtherXferOptions(hsmbus);
-
-        /* Handle Transfer */
-        SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_WRITE);
-      }
-
-      /* If PEC mode is enable, size to transmit manage by SW part should be Size-1 byte, corresponding to PEC byte */
-      /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
-      if (SMBUS_GET_PEC_MODE(hsmbus) != RESET)
-      {
-        hsmbus->XferSize--;
-        hsmbus->XferCount--;
-      }
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    /* Note : The SMBUS interrupts must be enabled after unlocking current process
-              to avoid the risk of SMBUS interrupt handle execution before current
-              process unlock */
-    SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive in master/host SMBUS mode an amount of data in non-blocking mode with Interrupt.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
-  /* Check the parameters */
-  assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
-  if (hsmbus->State == HAL_SMBUS_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hsmbus);
-
-    hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX;
-    hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hsmbus->pBuffPtr = pData;
-    hsmbus->XferCount = Size;
-    hsmbus->XferOptions = XferOptions;
-
-    /* In case of Quick command, remove autoend mode */
-    /* Manage the stop generation by software */
-    if (hsmbus->pBuffPtr == NULL)
-    {
-      hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE;
-    }
-
-    if (Size > MAX_NBYTE_SIZE)
-    {
-      hsmbus->XferSize = MAX_NBYTE_SIZE;
-    }
-    else
-    {
-      hsmbus->XferSize = Size;
-    }
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
-    if ((hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount))
-    {
-      SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, SMBUS_RELOAD_MODE  | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_READ);
-    }
-    else
-    {
-      /* If transfer direction not change, do not generate Restart Condition */
-      /* Mean Previous state is same as current state */
-      if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX) && (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(hsmbus->XferOptions) == 0))
-      {
-        SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
-      }
-      /* Else transfer direction change, so generate Restart with new transfer direction */
-      else
-      {
-        /* Convert OTHER_xxx XferOptions if any */
-        SMBUS_ConvertOtherXferOptions(hsmbus);
-
-        /* Handle Transfer */
-        SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_READ);
-      }
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    /* Note : The SMBUS interrupts must be enabled after unlocking current process
-              to avoid the risk of SMBUS interrupt handle execution before current
-              process unlock */
-    SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Abort a master/host SMBUS process communication with Interrupt.
-  * @note   This abort can be called only if state is ready
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress)
-{
-  if (hsmbus->State == HAL_SMBUS_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hsmbus);
-
-    /* Keep the same state as previous */
-    /* to perform as well the call of the corresponding end of transfer callback */
-    if (hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX)
-    {
-      hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX;
-    }
-    else if (hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX)
-    {
-      hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX;
-    }
-    else
-    {
-      /* Wrong usage of abort function */
-      /* This function should be used only in case of abort monitored by master device */
-      return HAL_ERROR;
-    }
-    hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-
-    /* Set NBYTES to 1 to generate a dummy read on SMBUS peripheral */
-    /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */
-    SMBUS_TransferConfig(hsmbus, DevAddress, 1U, SMBUS_AUTOEND_MODE, SMBUS_NO_STARTSTOP);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    /* Note : The SMBUS interrupts must be enabled after unlocking current process
-              to avoid the risk of SMBUS interrupt handle execution before current
-              process unlock */
-    if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
-    {
-      SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX);
-    }
-    else if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
-    {
-      SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX);
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Transmit in slave/device SMBUS mode an amount of data in non-blocking mode with Interrupt.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
-  /* Check the parameters */
-  assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
-  if (hsmbus->State == HAL_SMBUS_STATE_LISTEN)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
-    SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_TX);
-
-    /* Process Locked */
-    __HAL_LOCK(hsmbus);
-
-    hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_TX;
-    hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-
-    /* Set SBC bit to manage Acknowledge at each bit */
-    hsmbus->Instance->CR1 |= I2C_CR1_SBC;
-
-    /* Enable Address Acknowledge */
-    hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Prepare transfer parameters */
-    hsmbus->pBuffPtr = pData;
-    hsmbus->XferCount = Size;
-    hsmbus->XferOptions = XferOptions;
-
-    /* Convert OTHER_xxx XferOptions if any */
-    SMBUS_ConvertOtherXferOptions(hsmbus);
-
-    if (Size > MAX_NBYTE_SIZE)
-    {
-      hsmbus->XferSize = MAX_NBYTE_SIZE;
-    }
-    else
-    {
-      hsmbus->XferSize = Size;
-    }
-
-    /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
-    if ((hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount))
-    {
-      SMBUS_TransferConfig(hsmbus, 0U, hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
-    }
-    else
-    {
-      /* Set NBYTE to transmit */
-      SMBUS_TransferConfig(hsmbus, 0U, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
-
-      /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
-      /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
-      if (SMBUS_GET_PEC_MODE(hsmbus) != RESET)
-      {
-        hsmbus->XferSize--;
-        hsmbus->XferCount--;
-      }
-    }
-
-    /* Clear ADDR flag after prepare the transfer parameters */
-    /* This action will generate an acknowledge to the HOST */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ADDR);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    /* Note : The SMBUS interrupts must be enabled after unlocking current process
-              to avoid the risk of SMBUS interrupt handle execution before current
-              process unlock */
-    /* REnable ADDR interrupt */
-    SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX | SMBUS_IT_ADDR);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Receive in slave/device SMBUS mode an amount of data in non-blocking mode with Interrupt.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
-  /* Check the parameters */
-  assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
-  if (hsmbus->State == HAL_SMBUS_STATE_LISTEN)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
-    SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_RX);
-
-    /* Process Locked */
-    __HAL_LOCK(hsmbus);
-
-    hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_RX;
-    hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-
-    /* Set SBC bit to manage Acknowledge at each bit */
-    hsmbus->Instance->CR1 |= I2C_CR1_SBC;
-
-    /* Enable Address Acknowledge */
-    hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Prepare transfer parameters */
-    hsmbus->pBuffPtr = pData;
-    hsmbus->XferSize = Size;
-    hsmbus->XferCount = Size;
-    hsmbus->XferOptions = XferOptions;
-
-    /* Convert OTHER_xxx XferOptions if any */
-    SMBUS_ConvertOtherXferOptions(hsmbus);
-
-    /* Set NBYTE to receive */
-    /* If XferSize equal "1", or XferSize equal "2" with PEC requested (mean 1 data byte + 1 PEC byte */
-    /* no need to set RELOAD bit mode, a ACK will be automatically generated in that case */
-    /* else need to set RELOAD bit mode to generate an automatic ACK at each byte Received */
-    /* This RELOAD bit will be reset for last BYTE to be receive in SMBUS_Slave_ISR */
-    if ((hsmbus->XferSize == 1U) || ((hsmbus->XferSize == 2U) && (SMBUS_GET_PEC_MODE(hsmbus) != RESET)))
-    {
-      SMBUS_TransferConfig(hsmbus, 0U, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
-    }
-    else
-    {
-      SMBUS_TransferConfig(hsmbus, 0U, 1U, hsmbus->XferOptions | SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP);
-    }
-
-    /* Clear ADDR flag after prepare the transfer parameters */
-    /* This action will generate an acknowledge to the HOST */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ADDR);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    /* Note : The SMBUS interrupts must be enabled after unlocking current process
-              to avoid the risk of SMBUS interrupt handle execution before current
-              process unlock */
-    /* REnable ADDR interrupt */
-    SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_ADDR);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Enable the Address listen mode with Interrupt.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus)
-{
-  hsmbus->State = HAL_SMBUS_STATE_LISTEN;
-
-  /* Enable the Address Match interrupt */
-  SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ADDR);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Disable the Address listen mode with Interrupt.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Disable Address listen mode only if a transfer is not ongoing */
-  if (hsmbus->State == HAL_SMBUS_STATE_LISTEN)
-  {
-    hsmbus->State = HAL_SMBUS_STATE_READY;
-
-    /* Disable the Address Match interrupt */
-    SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Enable the SMBUS alert mode with Interrupt.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUSx peripheral.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Enable SMBus alert */
-  hsmbus->Instance->CR1 |= I2C_CR1_ALERTEN;
-
-  /* Clear ALERT flag */
-  __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT);
-
-  /* Enable Alert Interrupt */
-  SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ALERT);
-
-  return HAL_OK;
-}
-/**
-  * @brief  Disable the SMBUS alert mode with Interrupt.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUSx peripheral.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Enable SMBus alert */
-  hsmbus->Instance->CR1 &= ~I2C_CR1_ALERTEN;
-
-  /* Disable Alert Interrupt */
-  SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ALERT);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Check if target device is ready for communication.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  Trials Number of trials
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  __IO uint32_t SMBUS_Trials = 0U;
-
-  if (hsmbus->State == HAL_SMBUS_STATE_READY)
-  {
-    if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BUSY) != RESET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hsmbus);
-
-    hsmbus->State = HAL_SMBUS_STATE_BUSY;
-    hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-
-    do
-    {
-      /* Generate Start */
-      hsmbus->Instance->CR2 = SMBUS_GENERATE_START(hsmbus->Init.AddressingMode, DevAddress);
-
-      /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
-      /* Wait until STOPF flag is set or a NACK flag is set*/
-      tickstart = HAL_GetTick();
-      while ((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) == RESET) && (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET) && (hsmbus->State != HAL_SMBUS_STATE_TIMEOUT))
-      {
-        if (Timeout != HAL_MAX_DELAY)
-        {
-          if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-          {
-            /* Device is ready */
-            hsmbus->State = HAL_SMBUS_STATE_READY;
-
-            /* Process Unlocked */
-            __HAL_UNLOCK(hsmbus);
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-
-      /* Check if the NACKF flag has not been set */
-      if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET)
-      {
-        /* Wait until STOPF flag is reset */
-        if (SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        /* Clear STOP Flag */
-        __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
-
-        /* Device is ready */
-        hsmbus->State = HAL_SMBUS_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hsmbus);
-
-        return HAL_OK;
-      }
-      else
-      {
-        /* Wait until STOPF flag is reset */
-        if (SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        /* Clear NACK Flag */
-        __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
-
-        /* Clear STOP Flag, auto generated with autoend*/
-        __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
-      }
-
-      /* Check if the maximum allowed number of trials has been reached */
-      if (SMBUS_Trials++ == Trials)
-      {
-        /* Generate Stop */
-        hsmbus->Instance->CR2 |= I2C_CR2_STOP;
-
-        /* Wait until STOPF flag is reset */
-        if (SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        /* Clear STOP Flag */
-        __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
-      }
-    }
-    while (SMBUS_Trials < Trials);
-
-    hsmbus->State = HAL_SMBUS_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    return HAL_TIMEOUT;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
- * @{
- */
-
-/**
-  * @brief  Handle SMBUS event interrupt request.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
-{
-  uint32_t tmpisrvalue = 0U;
-
-  /* Use a local variable to store the current ISR flags */
-  /* This action will avoid a wrong treatment due to ISR flags change during interrupt handler */
-  tmpisrvalue = SMBUS_GET_ISR_REG(hsmbus);
-
-  /* SMBUS in mode Transmitter ---------------------------------------------------*/
-  if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TXIS) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET))
-  {
-    /* Slave mode selected */
-    if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
-    {
-      SMBUS_Slave_ISR(hsmbus);
-    }
-    /* Master mode selected */
-    else if ((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_TX) == HAL_SMBUS_STATE_MASTER_BUSY_TX)
-    {
-      SMBUS_Master_ISR(hsmbus);
-    }
-  }
-
-  /* SMBUS in mode Receiver ----------------------------------------------------*/
-  if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_RXNE) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_RXI)) != RESET))
-  {
-    /* Slave mode selected */
-    if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX)
-    {
-      SMBUS_Slave_ISR(hsmbus);
-    }
-    /* Master mode selected */
-    else if ((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_RX) == HAL_SMBUS_STATE_MASTER_BUSY_RX)
-    {
-      SMBUS_Master_ISR(hsmbus);
-    }
-  }
-
-  /* SMBUS in mode Listener Only --------------------------------------------------*/
-  if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_ADDR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET))
-      && ((__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ADDRI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_STOPI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_NACKI) != RESET)))
-  {
-    if (hsmbus->State == HAL_SMBUS_STATE_LISTEN)
-    {
-      SMBUS_Slave_ISR(hsmbus);
-    }
-  }
-}
-
-/**
-  * @brief  Handle SMBUS error interrupt request.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
-{
-  SMBUS_ITErrorHandler(hsmbus);
-}
-
-/**
-  * @brief  Master Tx Transfer completed callback.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-__weak void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_MasterTxCpltCallback() could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Master Rx Transfer completed callback.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-__weak void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_MasterRxCpltCallback() could be implemented in the user file
-   */
-}
-
-/** @brief  Slave Tx Transfer completed callback.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-__weak void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_SlaveTxCpltCallback() could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Slave Rx Transfer completed callback.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-__weak void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_SlaveRxCpltCallback() could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Slave Address Match callback.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  TransferDirection Master request Transfer Direction (Write/Read)
-  * @param  AddrMatchCode Address Match Code
-  * @retval None
-  */
-__weak void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-  UNUSED(TransferDirection);
-  UNUSED(AddrMatchCode);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_AddrCallback() could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Listen Complete callback.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-__weak void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_ListenCpltCallback() could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  SMBUS error callback.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-__weak void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_ErrorCallback() could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions
- *  @brief   Peripheral State and Errors functions
- *
-@verbatim
- ===============================================================================
-            ##### Peripheral State and Errors functions #####
- ===============================================================================
-    [..]
-    This subsection permits to get in run-time the status of the peripheral
-    and the data flow.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the SMBUS handle state.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval HAL state
-  */
-uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Return SMBUS handle state */
-  return hsmbus->State;
-}
-
-/**
-* @brief  Return the SMBUS error code.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *              the configuration information for the specified SMBUS.
-* @retval SMBUS Error Code
-*/
-uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus)
-{
-  return hsmbus->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup SMBUS_Private_Functions SMBUS Private Functions
- *  @brief   Data transfers Private functions
-  * @{
-  */
-
-/**
-  * @brief  Interrupt Sub-Routine which handle the Interrupt Flags Master Mode.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus)
-{
-  uint16_t DevAddress;
-
-  /* Process Locked */
-  __HAL_LOCK(hsmbus);
-
-  if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET)
-  {
-    /* Clear NACK Flag */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
-
-    /* Set corresponding Error Code */
-    /* No need to generate STOP, it is automatically done */
-    hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    /* Call the Error callback to inform upper layer */
-    HAL_SMBUS_ErrorCallback(hsmbus);
-  }
-  else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
-  {
-    /* Check and treat errors if errors occurs during STOP process */
-    SMBUS_ITErrorHandler(hsmbus);
-
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
-    {
-      /* Disable Interrupt */
-      SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
-
-      /* Clear STOP Flag */
-      __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
-
-      /* Clear Configuration Register 2 */
-      SMBUS_RESET_CR2(hsmbus);
-
-      /* Flush remaining data in Fifo register in case of error occurs before TXEmpty */
-      /* Disable the selected SMBUS peripheral */
-      __HAL_SMBUS_DISABLE(hsmbus);
-
-      hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
-      hsmbus->State = HAL_SMBUS_STATE_READY;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hsmbus);
-
-      /* REenable the selected SMBUS peripheral */
-      __HAL_SMBUS_ENABLE(hsmbus);
-
-      HAL_SMBUS_MasterTxCpltCallback(hsmbus);
-    }
-    else if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
-    {
-      /* Store Last receive data if any */
-      if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
-      {
-        /* Read data from RXDR */
-        (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
-
-        if ((hsmbus->XferSize > 0U))
-        {
-          hsmbus->XferSize--;
-          hsmbus->XferCount--;
-        }
-      }
-
-      /* Disable Interrupt */
-      SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
-
-      /* Clear STOP Flag */
-      __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
-
-      /* Clear Configuration Register 2 */
-      SMBUS_RESET_CR2(hsmbus);
-
-      hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
-      hsmbus->State = HAL_SMBUS_STATE_READY;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hsmbus);
-
-      HAL_SMBUS_MasterRxCpltCallback(hsmbus);
-    }
-  }
-  else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
-  {
-    /* Read data from RXDR */
-    (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
-    hsmbus->XferSize--;
-    hsmbus->XferCount--;
-  }
-  else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
-  {
-    /* Write data to TXDR */
-    hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++);
-    hsmbus->XferSize--;
-    hsmbus->XferCount--;
-  }
-  else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET)
-  {
-    if ((hsmbus->XferSize == 0U) && (hsmbus->XferCount != 0U))
-    {
-      DevAddress = (hsmbus->Instance->CR2 & I2C_CR2_SADD);
-
-      if (hsmbus->XferCount > MAX_NBYTE_SIZE)
-      {
-        SMBUS_TransferConfig(hsmbus, DevAddress, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
-        hsmbus->XferSize = MAX_NBYTE_SIZE;
-      }
-      else
-      {
-        hsmbus->XferSize = hsmbus->XferCount;
-        SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
-        /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
-        /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
-        if (SMBUS_GET_PEC_MODE(hsmbus) != RESET)
-        {
-          hsmbus->XferSize--;
-          hsmbus->XferCount--;
-        }
-      }
-    }
-    else if ((hsmbus->XferSize == 0U) && (hsmbus->XferCount == 0U))
-    {
-      /* Call TxCpltCallback() if no stop mode is set */
-      if (SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
-      {
-        /* Call the corresponding callback to inform upper layer of End of Transfer */
-        if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
-        {
-          /* Disable Interrupt */
-          SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
-          hsmbus->PreviousState = hsmbus->State;
-          hsmbus->State = HAL_SMBUS_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hsmbus);
-
-          HAL_SMBUS_MasterTxCpltCallback(hsmbus);
-        }
-        else if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
-        {
-          SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
-          hsmbus->PreviousState = hsmbus->State;
-          hsmbus->State = HAL_SMBUS_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hsmbus);
-
-          HAL_SMBUS_MasterRxCpltCallback(hsmbus);
-        }
-      }
-    }
-  }
-  else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TC) != RESET)
-  {
-    if (hsmbus->XferCount == 0U)
-    {
-      /* Specific use case for Quick command */
-      if (hsmbus->pBuffPtr == NULL)
-      {
-        /* Generate a Stop command */
-        hsmbus->Instance->CR2 |= I2C_CR2_STOP;
-      }
-      /* Call TxCpltCallback() if no stop mode is set */
-      else if (SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
-      {
-        /* No Generate Stop, to permit restart mode */
-        /* The stop will be done at the end of transfer, when SMBUS_AUTOEND_MODE enable */
-
-        /* Call the corresponding callback to inform upper layer of End of Transfer */
-        if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
-        {
-          /* Disable Interrupt */
-          SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
-          hsmbus->PreviousState = hsmbus->State;
-          hsmbus->State = HAL_SMBUS_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hsmbus);
-
-          HAL_SMBUS_MasterTxCpltCallback(hsmbus);
-        }
-        else if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
-        {
-          SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
-          hsmbus->PreviousState = hsmbus->State;
-          hsmbus->State = HAL_SMBUS_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hsmbus);
-
-          HAL_SMBUS_MasterRxCpltCallback(hsmbus);
-        }
-      }
-    }
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hsmbus);
-
-  return HAL_OK;
-}
-/**
-  * @brief  Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus)
-{
-  uint8_t TransferDirection = 0U;
-  uint16_t SlaveAddrCode = 0U;
-
-  /* Process Locked */
-  __HAL_LOCK(hsmbus);
-
-  if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET)
-  {
-    /* Check that SMBUS transfer finished */
-    /* if yes, normal usecase, a NACK is sent by the HOST when Transfer is finished */
-    /* Mean XferCount == 0*/
-    /* So clear Flag NACKF only */
-    if (hsmbus->XferCount == 0U)
-    {
-      /* Clear NACK Flag */
-      __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hsmbus);
-    }
-    else
-    {
-      /* if no, error usecase, a Non-Acknowledge of last Data is generated by the HOST*/
-      /* Clear NACK Flag */
-      __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
-
-      /* Set HAL State to "Idle" State, mean to LISTEN state */
-      /* So reset Slave Busy state */
-      hsmbus->PreviousState = hsmbus->State;
-      hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_TX);
-      hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX);
-
-      /* Disable RX/TX Interrupts, keep only ADDR Interrupt */
-      SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX);
-
-      /* Set ErrorCode corresponding to a Non-Acknowledge */
-      hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hsmbus);
-
-      /* Call the Error callback to inform upper layer */
-      HAL_SMBUS_ErrorCallback(hsmbus);
-    }
-  }
-  else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ADDR) != RESET)
-  {
-    TransferDirection = SMBUS_GET_DIR(hsmbus);
-    SlaveAddrCode = SMBUS_GET_ADDR_MATCH(hsmbus);
-
-    /* Disable ADDR interrupt to prevent multiple ADDRInterrupt*/
-    /* Other ADDRInterrupt will be treat in next Listen usecase */
-    __HAL_SMBUS_DISABLE_IT(hsmbus, SMBUS_IT_ADDRI);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    /* Call Slave Addr callback */
-    HAL_SMBUS_AddrCallback(hsmbus, TransferDirection, SlaveAddrCode);
-  }
-  else if ((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET) || (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET))
-  {
-    if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX)
-    {
-      /* Read data from RXDR */
-      (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
-      hsmbus->XferSize--;
-      hsmbus->XferCount--;
-
-      if (hsmbus->XferCount == 1U)
-      {
-        /* Receive last Byte, can be PEC byte in case of PEC BYTE enabled */
-        /* or only the last Byte of Transfer */
-        /* So reset the RELOAD bit mode */
-        hsmbus->XferOptions &= ~SMBUS_RELOAD_MODE;
-        SMBUS_TransferConfig(hsmbus, 0U, 1U, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
-      }
-      else if (hsmbus->XferCount == 0U)
-      {
-        /* Last Byte is received, disable Interrupt */
-        SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
-
-        /* Remove HAL_SMBUS_STATE_SLAVE_BUSY_RX, keep only HAL_SMBUS_STATE_LISTEN */
-        hsmbus->PreviousState = hsmbus->State;
-        hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX);
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hsmbus);
-
-        /* Call the Rx complete callback to inform upper layer of the end of receive process */
-        HAL_SMBUS_SlaveRxCpltCallback(hsmbus);
-      }
-      else
-      {
-        /* Set Reload for next Bytes */
-        SMBUS_TransferConfig(hsmbus, 0U, 1U, SMBUS_RELOAD_MODE  | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
-
-        /* Ack last Byte Read */
-        hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
-      }
-    }
-    else if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
-    {
-      if ((hsmbus->XferSize == 0U) && (hsmbus->XferCount != 0U))
-      {
-        if (hsmbus->XferCount > MAX_NBYTE_SIZE)
-        {
-          SMBUS_TransferConfig(hsmbus, 0U, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
-          hsmbus->XferSize = MAX_NBYTE_SIZE;
-        }
-        else
-        {
-          hsmbus->XferSize = hsmbus->XferCount;
-          SMBUS_TransferConfig(hsmbus, 0U, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
-          /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
-          /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
-          if (SMBUS_GET_PEC_MODE(hsmbus) != RESET)
-          {
-            hsmbus->XferSize--;
-            hsmbus->XferCount--;
-          }
-        }
-      }
-    }
-  }
-  else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
-  {
-    /* Write data to TXDR only if XferCount not reach "0" */
-    /* A TXIS flag can be set, during STOP treatment      */
-    /* Check if all Data have already been sent */
-    /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
-    if (hsmbus->XferCount > 0U)
-    {
-      /* Write data to TXDR */
-      hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++);
-      hsmbus->XferCount--;
-      hsmbus->XferSize--;
-    }
-
-    if (hsmbus->XferCount == 0U)
-    {
-      /* Last Byte is Transmitted */
-      /* Remove HAL_SMBUS_STATE_SLAVE_BUSY_TX, keep only HAL_SMBUS_STATE_LISTEN */
-      SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
-      hsmbus->PreviousState = hsmbus->State;
-      hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_TX);
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hsmbus);
-
-      /* Call the Tx complete callback to inform upper layer of the end of transmit process */
-      HAL_SMBUS_SlaveTxCpltCallback(hsmbus);
-    }
-  }
-
-  /* Check if STOPF is set */
-  if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
-  {
-    if ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) == HAL_SMBUS_STATE_LISTEN)
-    {
-      /* Store Last receive data if any */
-      if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
-      {
-        /* Read data from RXDR */
-        (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
-
-        if ((hsmbus->XferSize > 0U))
-        {
-          hsmbus->XferSize--;
-          hsmbus->XferCount--;
-        }
-      }
-
-      /* Disable RX and TX Interrupts */
-      SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX);
-
-      /* Disable ADDR Interrupt */
-      SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR);
-
-      /* Disable Address Acknowledge */
-      hsmbus->Instance->CR2 |= I2C_CR2_NACK;
-
-      /* Clear Configuration Register 2 */
-      SMBUS_RESET_CR2(hsmbus);
-
-      /* Clear STOP Flag */
-      __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
-
-      /* Clear ADDR flag */
-      __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ADDR);
-
-      hsmbus->XferOptions = 0U;
-      hsmbus->PreviousState = hsmbus->State;
-      hsmbus->State = HAL_SMBUS_STATE_READY;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hsmbus);
-
-      /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
-      HAL_SMBUS_ListenCpltCallback(hsmbus);
-    }
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hsmbus);
-
-  return HAL_OK;
-}
-/**
-  * @brief  Manage the enabling of Interrupts.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  InterruptRequest Value of @ref SMBUS_Interrupt_configuration_definition.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
-{
-  uint32_t tmpisr = 0U;
-
-  if ((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT)
-  {
-    /* Enable ERR interrupt */
-    tmpisr |= SMBUS_IT_ERRI;
-  }
-
-  if ((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR)
-  {
-    /* Enable ADDR, STOP interrupt */
-    tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_ERRI;
-  }
-
-  if ((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX)
-  {
-    /* Enable ERR, TC, STOP, NACK, RXI interrupt */
-    tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI;
-  }
-
-  if ((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX)
-  {
-    /* Enable ERR, TC, STOP, NACK, TXI interrupt */
-    tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_RXI;
-  }
-
-  /* Enable interrupts only at the end */
-  /* to avoid the risk of SMBUS interrupt handle execution before */
-  /* all interrupts requested done */
-  __HAL_SMBUS_ENABLE_IT(hsmbus, tmpisr);
-
-  return HAL_OK;
-}
-/**
-  * @brief  Manage the disabling of Interrupts.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  InterruptRequest Value of @ref SMBUS_Interrupt_configuration_definition.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
-{
-  uint32_t tmpisr = 0U;
-
-  if (((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT) && (hsmbus->State == HAL_SMBUS_STATE_READY))
-  {
-    /* Disable ERR interrupt */
-    tmpisr |= SMBUS_IT_ERRI;
-  }
-
-  if ((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX)
-  {
-    /* Disable TC, STOP, NACK, TXI interrupt */
-    tmpisr |= SMBUS_IT_TCI | SMBUS_IT_TXI;
-
-    if ((SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
-        && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN))
-    {
-      /* Disable ERR interrupt */
-      tmpisr |= SMBUS_IT_ERRI;
-    }
-
-    if ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)
-    {
-      /* Disable STOPI, NACKI */
-      tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI;
-    }
-  }
-
-  if ((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX)
-  {
-    /* Disable TC, STOP, NACK, RXI interrupt */
-    tmpisr |= SMBUS_IT_TCI | SMBUS_IT_RXI;
-
-    if ((SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
-        && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN))
-    {
-      /* Disable ERR interrupt */
-      tmpisr |= SMBUS_IT_ERRI;
-    }
-
-    if ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)
-    {
-      /* Disable STOPI, NACKI */
-      tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI;
-    }
-  }
-
-  if ((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR)
-  {
-    /* Enable ADDR, STOP interrupt */
-    tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI;
-
-    if (SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
-    {
-      /* Disable ERR interrupt */
-      tmpisr |= SMBUS_IT_ERRI;
-    }
-  }
-
-  /* Disable interrupts only at the end */
-  /* to avoid a breaking situation like at "t" time */
-  /* all disable interrupts request are not done */
-  __HAL_SMBUS_DISABLE_IT(hsmbus, tmpisr);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  SMBUS interrupts error handler.
-  * @param  hsmbus SMBUS handle.
-  * @retval None
-  */
-static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus)
-{
-  uint32_t itflags   = READ_REG(hsmbus->Instance->ISR);
-  uint32_t itsources = READ_REG(hsmbus->Instance->CR1);
-
-  /* SMBUS Bus error interrupt occurred ------------------------------------*/
-  if (((itflags & SMBUS_FLAG_BERR) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
-  {
-    hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BERR;
-
-    /* Clear BERR flag */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_BERR);
-  }
-
-  /* SMBUS Over-Run/Under-Run interrupt occurred ----------------------------------------*/
-  if (((itflags & SMBUS_FLAG_OVR) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
-  {
-    hsmbus->ErrorCode |= HAL_SMBUS_ERROR_OVR;
-
-    /* Clear OVR flag */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_OVR);
-  }
-
-  /* SMBUS Arbitration Loss error interrupt occurred ------------------------------------*/
-  if (((itflags & SMBUS_FLAG_ARLO) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
-  {
-    hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ARLO;
-
-    /* Clear ARLO flag */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ARLO);
-  }
-
-  /* SMBUS Timeout error interrupt occurred ---------------------------------------------*/
-  if (((itflags & SMBUS_FLAG_TIMEOUT) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
-  {
-    hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BUSTIMEOUT;
-
-    /* Clear TIMEOUT flag */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT);
-  }
-
-  /* SMBUS Alert error interrupt occurred -----------------------------------------------*/
-  if (((itflags & SMBUS_FLAG_ALERT) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
-  {
-    hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ALERT;
-
-    /* Clear ALERT flag */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT);
-  }
-
-  /* SMBUS Packet Error Check error interrupt occurred ----------------------------------*/
-  if (((itflags & SMBUS_FLAG_PECERR) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
-  {
-    hsmbus->ErrorCode |= HAL_SMBUS_ERROR_PECERR;
-
-    /* Clear PEC error flag */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR);
-  }
-
-  /* Call the Error Callback in case of Error detected */
-  if ((hsmbus->ErrorCode != HAL_SMBUS_ERROR_NONE) && (hsmbus->ErrorCode != HAL_SMBUS_ERROR_ACKF))
-  {
-    /* Do not Reset the HAL state in case of ALERT error */
-    if ((hsmbus->ErrorCode & HAL_SMBUS_ERROR_ALERT) != HAL_SMBUS_ERROR_ALERT)
-    {
-      if (((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
-          || ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX))
-      {
-        /* Reset only HAL_SMBUS_STATE_SLAVE_BUSY_XX */
-        /* keep HAL_SMBUS_STATE_LISTEN if set */
-        hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
-        hsmbus->State = HAL_SMBUS_STATE_LISTEN;
-      }
-    }
-
-    /* Call the Error callback to inform upper layer */
-    HAL_SMBUS_ErrorCallback(hsmbus);
-  }
-}
-
-/**
-  * @brief  Handle SMBUS Communication Timeout.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  Flag Specifies the SMBUS flag to check.
-  * @param  Status The new Flag status (SET or RESET).
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
-{
-  uint32_t tickstart = HAL_GetTick();
-
-  /* Wait until flag is set */
-  if (Status == RESET)
-  {
-    while (__HAL_SMBUS_GET_FLAG(hsmbus, Flag) == RESET)
-    {
-      /* Check for the Timeout */
-      if (Timeout != HAL_MAX_DELAY)
-      {
-        if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-        {
-          hsmbus->PreviousState = hsmbus->State;
-          hsmbus->State = HAL_SMBUS_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hsmbus);
-
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-  }
-  else
-  {
-    while (__HAL_SMBUS_GET_FLAG(hsmbus, Flag) != RESET)
-    {
-      /* Check for the Timeout */
-      if (Timeout != HAL_MAX_DELAY)
-      {
-        if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-        {
-          hsmbus->PreviousState = hsmbus->State;
-          hsmbus->State = HAL_SMBUS_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hsmbus);
-
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set).
-  * @param  hsmbus SMBUS handle.
-  * @param  DevAddress specifies the slave address to be programmed.
-  * @param  Size specifies the number of bytes to be programmed.
-  *   This parameter must be a value between 0 and 255.
-  * @param  Mode New state of the SMBUS START condition generation.
-  *   This parameter can be one or a combination  of the following values:
-  *     @arg @ref SMBUS_RELOAD_MODE Enable Reload mode.
-  *     @arg @ref SMBUS_AUTOEND_MODE Enable Automatic end mode.
-  *     @arg @ref SMBUS_SOFTEND_MODE Enable Software end mode and Reload mode.
-  *     @arg @ref SMBUS_SENDPEC_MODE Enable Packet Error Calculation mode.
-  * @param  Request New state of the SMBUS START condition generation.
-  *   This parameter can be one of the following values:
-  *     @arg @ref SMBUS_NO_STARTSTOP Don't Generate stop and start condition.
-  *     @arg @ref SMBUS_GENERATE_STOP Generate stop condition (Size should be set to 0).
-  *     @arg @ref SMBUS_GENERATE_START_READ Generate Restart for read request.
-  *     @arg @ref SMBUS_GENERATE_START_WRITE Generate Restart for write request.
-  * @retval None
-  */
-static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus,  uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
-{
-  /* Check the parameters */
-  assert_param(IS_SMBUS_INSTANCE(hsmbus->Instance));
-  assert_param(IS_SMBUS_TRANSFER_MODE(Mode));
-  assert_param(IS_SMBUS_TRANSFER_REQUEST(Request));
-
-  /* update CR2 register */
-  MODIFY_REG(hsmbus->Instance->CR2, ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP  | I2C_CR2_PECBYTE)), \
-             (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | (uint32_t)Mode | (uint32_t)Request));
-}
-
-/**
-  * @brief  Convert SMBUSx OTHER_xxx XferOptions to functionnal XferOptions.
-  * @param  hsmbus SMBUS handle.
-  * @retval None
-  */
-static void SMBUS_ConvertOtherXferOptions(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* if user set XferOptions to SMBUS_OTHER_FRAME_NO_PEC   */
-  /* it request implicitly to generate a restart condition */
-  /* set XferOptions to SMBUS_FIRST_FRAME                  */
-  if (hsmbus->XferOptions == SMBUS_OTHER_FRAME_NO_PEC)
-  {
-    hsmbus->XferOptions = SMBUS_FIRST_FRAME;
-  }
-  /* else if user set XferOptions to SMBUS_OTHER_FRAME_WITH_PEC */
-  /* it request implicitly to generate a restart condition      */
-  /* set XferOptions to SMBUS_FIRST_FRAME | SMBUS_SENDPEC_MODE  */
-  else if (hsmbus->XferOptions == SMBUS_OTHER_FRAME_WITH_PEC)
-  {
-    hsmbus->XferOptions = SMBUS_FIRST_FRAME | SMBUS_SENDPEC_MODE;
-  }
-  /* else if user set XferOptions to SMBUS_OTHER_AND_LAST_FRAME_NO_PEC */
-  /* it request implicitly to generate a restart condition             */
-  /* then generate a stop condition at the end of transfer             */
-  /* set XferOptions to SMBUS_FIRST_AND_LAST_FRAME_NO_PEC              */
-  else if (hsmbus->XferOptions == SMBUS_OTHER_AND_LAST_FRAME_NO_PEC)
-  {
-    hsmbus->XferOptions = SMBUS_FIRST_AND_LAST_FRAME_NO_PEC;
-  }
-  /* else if user set XferOptions to SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC */
-  /* it request implicitly to generate a restart condition               */
-  /* then generate a stop condition at the end of transfer               */
-  /* set XferOptions to SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC              */
-  else if (hsmbus->XferOptions == SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC)
-  {
-    hsmbus->XferOptions = SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC;
-  }
-}
-/**
-  * @}
-  */
-
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c
deleted file mode 100755
index 45615e2f..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c
+++ /dev/null
@@ -1,2419 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_spi.c
-  * @author  MCD Application Team
-  * @brief   SPI HAL module driver.
-  *    
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Serial Peripheral Interface (SPI) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral Control functions 
-  *           + Peripheral State functions
-  @verbatim
-  ==============================================================================
-                        ##### How to use this driver #####
-  ==============================================================================
-    [..]
-      The SPI HAL driver can be used as follows:
-
-      (#) Declare a SPI_HandleTypeDef handle structure, for example:
-          SPI_HandleTypeDef  hspi; 
-
-      (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit ()API:
-          (##) Enable the SPIx interface clock 
-          (##) SPI pins configuration
-              (+++) Enable the clock for the SPI GPIOs 
-              (+++) Configure these SPI pins as alternate function push-pull
-          (##) NVIC configuration if you need to use interrupt process
-              (+++) Configure the SPIx interrupt priority
-              (+++) Enable the NVIC SPI IRQ handle
-          (##) DMA Configuration if you need to use DMA process
-              (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive Channel
-              (+++) Enable the DMAx clock
-              (+++) Configure the DMA handle parameters 
-              (+++) Configure the DMA Tx or Rx Channel
-              (+++) Associate the initilalized hdma_tx(or _rx) handle to the hspi DMA Tx (or Rx) handle
-              (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Channel
-
-      (#) Program the Mode, Direction , Data size, Baudrate Prescaler, NSS 
-          management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
-
-      (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
-          (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
-              by calling the customed HAL_SPI_MspInit() API.
-     [..]
-       Circular mode restriction:
-      (#) The DMA circular mode cannot be used when the SPI is configured in these modes:
-          (##) Master 2Lines RxOnly
-          (##) Master 1Line Rx
-      (#) The CRC feature is not managed when the DMA circular mode is enabled
-      (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs 
-          the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
-
-  @note
-   (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA()
-   (#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA()
-   (#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA()
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/*
-  Additional Table:
-
-    Using the HAL it is not possible to reach all supported SPI frequency with the differents SPI Modes,
-    the following table resume the max SPI frequency reached with data size 8bits/16bits, 
-    according to frequency used on APBx Peripheral Clock (fPCLK) used by the SPI instance :
-
-	DataSize = SPI_DATASIZE_8BIT:
-   +----------------------------------------------------------------------------------------------+
-   |         |                | 2Lines Fullduplex   |     2Lines RxOnly    |         1Line        |
-   | Process | Tranfert mode  |---------------------|----------------------|----------------------|
-   |         |                |  Master  |  Slave   |  Master   |  Slave   |  Master   |  Slave   |
-   |==============================================================================================|
-   |    T    |     Polling    |  Fpclk/4 | Fpclk/8  |    NA     |    NA    |    NA     |   NA     |
-   |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
-   |    /    |     Interrupt  | Fpclk/64 | Fpclk/64 |    NA     |    NA    |    NA     |   NA     |
-   |    R    |----------------|----------|----------|-----------|----------|-----------|----------|
-   |    X    |       DMA      | Fpclk/2  | Fpclk/4  |    NA     |    NA    |    NA     |   NA     |
-   |=========|================|==========|==========|===========|==========|===========|==========|
-   |         |     Polling    | Fpclk/2  | Fpclk/8  | Fpclk/8   | Fpclk/8  | Fpclk/8   | Fpclk/8  |
-   |         |----------------|----------|----------|-----------|----------|-----------|----------|
-   |    R    |     Interrupt  | Fpclk/64 | Fpclk/32 | Fpclk/32  | Fpclk/16 | Fpclk/32  | Fpclk/32 |
-   |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
-   |         |       DMA      | Fpclk/2  | Fpclk/2  | Fpclk/16  | Fpclk/2  | Fpclk/16  | Fpclk/2  |
-   |=========|================|==========|==========|===========|==========|===========|==========|
-   |         |     Polling    | Fpclk/8  | Fpclk/8  |     NA    |    NA    | Fpclk/4   | Fpclk/16 |
-   |         |----------------|----------|----------|-----------|----------|-----------|----------|
-   |    T    |     Interrupt  | Fpclk/8  | Fpclk/32 |     NA    |    NA    | Fpclk/8   | Fpclk/16 |
-   |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
-   |         |       DMA      | Fpclk/2  | Fpclk/4  |     NA    |    NA    | Fpclk/2   | Fpclk/2  |
-   +----------------------------------------------------------------------------------------------+
-   
-   DataSize = SPI_DATASIZE_16BIT:
-    +----------------------------------------------------------------------------------------------+
-   |         |                | 2Lines Fullduplex   |     2Lines RxOnly    |         1Line        |
-   | Process | Tranfert mode  |---------------------|----------------------|----------------------|
-   |         |                |  Master  |  Slave   |  Master   |  Slave   |  Master   |  Slave   |
-   |==============================================================================================|
-   |    T    |     Polling    |  Fpclk/4 | Fpclk/8  |    NA     |    NA    |    NA     |   NA     |
-   |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
-   |    /    |     Interrupt  | Fpclk/32 | Fpclk/16 |    NA     |    NA    |    NA     |   NA     |
-   |    R    |----------------|----------|----------|-----------|----------|-----------|----------|
-   |    X    |       DMA      | Fpclk/2  | Fpclk/4  |    NA     |    NA    |    NA     |   NA     |
-   |=========|================|==========|==========|===========|==========|===========|==========|
-   |         |     Polling    | Fpclk/2  | Fpclk/4  | Fpclk/8   | Fpclk/4  | Fpclk/2   | Fpclk/8  |
-   |         |----------------|----------|----------|-----------|----------|-----------|----------|
-   |    R    |     Interrupt  | Fpclk/32 | Fpclk/8  | Fpclk/16  | Fpclk/16 | Fpclk/16  | Fpclk/8  |
-   |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
-   |         |       DMA      | Fpclk/2  | Fpclk/2  | Fpclk/8  |  Fpclk/2  | Fpclk/8   | Fpclk/2  |
-   |=========|================|==========|==========|===========|==========|===========|==========|
-   |         |     Polling    | Fpclk/4  | Fpclk/4  |    NA     |    NA    | Fpclk/4   | Fpclk/8  |
-   |         |----------------|----------|----------|-----------|----------|-----------|----------|
-   |    T    |     Interrupt  | Fpclk/4  | Fpclk/16 |    NA     |    NA    | Fpclk/8   | Fpclk/8  |
-   |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
-   |         |       DMA      | Fpclk/2  | Fpclk/4  |    NA     |    NA    | Fpclk/2   | Fpclk/2  |
-   +----------------------------------------------------------------------------------------------+
-    @note The max SPI frequency depend on SPI data size (8bits, 16bits),
-        SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA).
-*/
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_SPI_MODULE_ENABLED
-
-/** @addtogroup SPI
-  * @brief SPI HAL module driver
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @addtogroup SPI_Private
-  * @{
-  */
-#define SPI_TIMEOUT_VALUE  10U
-
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi);
-static void SPI_TxISR(SPI_HandleTypeDef *hspi);
-static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi);
-static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi);
-static void SPI_RxISR(SPI_HandleTypeDef *hspi);
-static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
-static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
-static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma);
-static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma);
-static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma);
-static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma);
-static void SPI_DMAError(DMA_HandleTypeDef *hdma);
-static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
-/**
-  * @}
-  */
-
-/* Exported functions ---------------------------------------------------------*/
-
-/** @addtogroup SPI_Exported_Functions SPI Exported Functions
-  * @{
-  */
-
-/** @addtogroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
- *  @brief    Initialization and Configuration functions 
- *
-@verbatim
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This subsection provides a set of functions allowing to initialize and 
-          de-initialiaze the SPIx peripheral:
-
-      (+) User must implement HAL_SPI_MspInit() function in which he configures 
-          all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
-
-      (+) Call the function HAL_SPI_Init() to configure the selected device with 
-          the selected configuration:
-        (++) Mode
-        (++) Direction 
-        (++) Data Size
-        (++) Clock Polarity and Phase
-        (++) NSS Management
-        (++) BaudRate Prescaler
-        (++) FirstBit
-        (++) TIMode
-        (++) CRC Calculation
-        (++) CRC Polynomial if CRC enabled
-
-      (+) Call the function HAL_SPI_DeInit() to restore the default configuration 
-          of the selected SPIx periperal.       
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the SPI according to the specified parameters 
-  *         in the SPI_InitTypeDef and create the associated handle.
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
-{
-  /* Check the SPI handle allocation */
-  if(hspi == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
-  assert_param(IS_SPI_MODE(hspi->Init.Mode));
-  assert_param(IS_SPI_DIRECTION_MODE(hspi->Init.Direction));
-  assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
-  assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
-  assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
-  assert_param(IS_SPI_NSS(hspi->Init.NSS));
-  assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
-  assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
-  assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
-  assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
-  assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
-
-  if(hspi->State == HAL_SPI_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hspi->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC... */
-    HAL_SPI_MspInit(hspi);
-  }
-  
-  hspi->State = HAL_SPI_STATE_BUSY;
-
-  /* Disble the selected SPI peripheral */
-  __HAL_SPI_DISABLE(hspi);
-
-  /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
-  /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
-  Communication speed, First bit and CRC calculation state */
-  WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
-                                  hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
-                                  hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit  | hspi->Init.CRCCalculation) );
-
-  /* Configure : NSS management */
-  WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | hspi->Init.TIMode));
-
-  /*---------------------------- SPIx CRCPOLY Configuration ------------------*/
-  /* Configure : CRC Polynomial */
-  WRITE_REG(hspi->Instance->CRCPR, hspi->Init.CRCPolynomial);
-  
-#if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined(STM32L031xx) && !defined(STM32L041xx)
-  /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
-  CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
-#endif
-  
-  hspi->ErrorCode = HAL_SPI_ERROR_NONE;
-  hspi->State = HAL_SPI_STATE_READY;
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the SPI peripheral 
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
-{
-  /* Check the SPI handle allocation */
-  if(hspi == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  hspi->State = HAL_SPI_STATE_BUSY;
-
-  /* Disable the SPI Peripheral Clock */
-  __HAL_SPI_DISABLE(hspi);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
-  HAL_SPI_MspDeInit(hspi);
-
-  hspi->ErrorCode = HAL_SPI_ERROR_NONE;
-  hspi->State = HAL_SPI_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(hspi);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief SPI MSP Init
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
- __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
- {
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-             the HAL_SPI_MspInit could be implenetd in the user file
-  */
-}
-
-/**
-  * @brief SPI MSP DeInit
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
- __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_SPI_MspDeInit could be implenetd in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup SPI_Exported_Functions_Group2
- *  @brief   Data transfers functions
- *
-@verbatim
-  ==============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
-    This subsection provides a set of functions allowing to manage the SPI
-    data transfers.
-
-    [..] The SPI supports master and slave mode :
-
-    (#) There are two modes of transfer:
-       (++) Blocking mode: The communication is performed in polling mode.
-            The HAL status of all data processing is returned by the same function
-            after finishing transfer.
-       (++) No-Blocking mode: The communication is performed using Interrupts
-           or DMA, These APIs return the HAL status.
-           The end of the data processing will be indicated through the 
-           dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when 
-           using DMA mode.
-           The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks 
-           will be executed respectivelly at the end of the transmit or Receive process
-           The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
-
-    (#) Blocking mode APIs are :
-        (++) HAL_SPI_Transmit()in 1Line (simplex) and 2Lines (full duplex) mode
-        (++) HAL_SPI_Receive() in 1Line (simplex) and 2Lines (full duplex) mode
-        (++) HAL_SPI_TransmitReceive() in full duplex mode
-
-    (#) Non Blocking mode API's with Interrupt are :
-        (++) HAL_SPI_Transmit_IT()in 1Line (simplex) and 2Lines (full duplex) mode
-        (++) HAL_SPI_Receive_IT() in 1Line (simplex) and 2Lines (full duplex) mode
-        (++) HAL_SPI_TransmitReceive_IT()in full duplex mode
-        (++) HAL_SPI_IRQHandler()
-
-    (#) Non Blocking mode functions with DMA are :
-        (++) HAL_SPI_Transmit_DMA()in 1Line (simplex) and 2Lines (full duplex) mode
-        (++) HAL_SPI_Receive_DMA() in 1Line (simplex) and 2Lines (full duplex) mode
-        (++) HAL_SPI_TransmitReceive_DMA() in full duplex mode
-
-    (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
-        (++) HAL_SPI_TxCpltCallback()
-        (++) HAL_SPI_RxCpltCallback()
-        (++) HAL_SPI_TxRxCpltCallback()
-        (++) HAL_SPI_TxHalfCpltCallback()
-        (++) HAL_SPI_RxHalfCpltCallback()
-        (++) HAL_SPI_TxRxHalfCpltCallback()
-        (++) HAL_SPI_ErrorCallback()
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Transmit an amount of data in blocking mode
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @param  pData: pointer to data buffer
-  * @param  Size: amount of data to be sent
-  * @param  Timeout: Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-
-  if(hspi->State == HAL_SPI_STATE_READY)
-  {
-    if((pData == NULL ) || (Size == 0U)) 
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Check the parameters */
-    assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
-
-    /* Process Locked */
-    __HAL_LOCK(hspi);
-
-    /* Configure communication */
-    hspi->State = HAL_SPI_STATE_BUSY_TX;
-    hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-
-    hspi->pTxBuffPtr  = pData;
-    hspi->TxXferSize  = Size;
-    hspi->TxXferCount = Size;
-
-    /*Init field not used in handle to zero */
-    hspi->TxISR = 0U;
-    hspi->RxISR = 0U;
-    hspi->pRxBuffPtr  = NULL;
-    hspi->RxXferSize  = 0U;
-    hspi->RxXferCount = 0U;
-
-    /* Reset CRC Calculation */
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      SPI_RESET_CRC(hspi);
-    }
-
-    if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
-    {
-      /* Configure communication direction : 1Line */
-      SPI_1LINE_TX(hspi);
-    }
-
-    /* Check if the SPI is already enabled */ 
-    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
-    {
-      /* Enable SPI peripheral */
-      __HAL_SPI_ENABLE(hspi);
-    }
-
-    /* Transmit data in 8 Bit mode */
-    if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
-    {
-      if((hspi->Init.Mode == SPI_MODE_SLAVE)|| (hspi->TxXferCount == 0x01U))
-      {
-        hspi->Instance->DR = (*hspi->pTxBuffPtr++);
-        hspi->TxXferCount--;
-      }
-
-      while(hspi->TxXferCount > 0U)
-      {
-        /* Wait until TXE flag is set to send data */
-        if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
-        { 
-          return HAL_TIMEOUT;
-        }
-        hspi->Instance->DR = (*hspi->pTxBuffPtr++);
-        hspi->TxXferCount--;
-      }
-      /* Enable CRC Transmission */
-      if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) 
-      {
-        SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-      }
-    }
-    /* Transmit data in 16 Bit mode */
-    else
-    {
-      if((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01U))
-      {
-        hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
-        hspi->pTxBuffPtr+=2U;
-        hspi->TxXferCount--;
-      }
-
-      while(hspi->TxXferCount > 0U)
-      {
-        /* Wait until TXE flag is set to send data */
-        if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
-        { 
-          return HAL_TIMEOUT;
-        }
-        hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
-        hspi->pTxBuffPtr+=2U;
-        hspi->TxXferCount--;
-      }
-      /* Enable CRC Transmission */
-      if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) 
-      {
-        SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-      }
-    }
-
-    /* Wait until TXE flag is set to send data */
-    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-      return HAL_TIMEOUT;
-    }
-
-    /* Wait until Busy flag is reset before disabling SPI */
-    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
-    { 
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-      return HAL_TIMEOUT;
-    }
- 
-    /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
-    if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
-    {
-      __HAL_SPI_CLEAR_OVRFLAG(hspi);
-    }
-
-    hspi->State = HAL_SPI_STATE_READY; 
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hspi);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in blocking mode 
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @param  pData: pointer to data buffer
-  * @param  Size: amount of data to be sent
-  * @param  Timeout: Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  __IO uint16_t tmpreg = 0U;
-
-  if(hspi->State == HAL_SPI_STATE_READY)
-  {
-    if((pData == NULL ) || (Size == 0U)) 
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hspi);
-
-    /* Configure communication */
-    hspi->State       = HAL_SPI_STATE_BUSY_RX;
-    hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-
-    hspi->pRxBuffPtr  = pData;
-    hspi->RxXferSize  = Size;
-    hspi->RxXferCount = Size;
-
-    /*Init field not used in handle to zero */
-    hspi->RxISR = 0U;
-    hspi->TxISR = 0U;
-    hspi->pTxBuffPtr  = NULL;
-    hspi->TxXferSize  = 0U;
-    hspi->TxXferCount = 0U;
-
-    /* Configure communication direction : 1Line */
-    if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
-    {
-      SPI_1LINE_RX(hspi);
-    }
-
-    /* Reset CRC Calculation */
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      SPI_RESET_CRC(hspi);
-    }
-    
-    if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
-    {
-      /* Process Unlocked */
-      __HAL_UNLOCK(hspi);
-
-      /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
-      return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
-    }
-
-    /* Check if the SPI is already enabled */ 
-    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
-    {
-      /* Enable SPI peripheral */
-      __HAL_SPI_ENABLE(hspi);
-    }
-
-    /* Receive data in 8 Bit mode */
-    if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
-    {
-      while(hspi->RxXferCount > 1U)
-      {
-        /* Wait until RXNE flag is set */
-        if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
-        { 
-          return HAL_TIMEOUT;
-        }
-
-        (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
-        hspi->RxXferCount--;
-      }
-      /* Enable CRC Reception */
-      if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) 
-      {
-        SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-      }
-    }
-    /* Receive data in 16 Bit mode */
-    else
-    {
-      while(hspi->RxXferCount > 1U)
-      {
-        /* Wait until RXNE flag is set to read data */
-        if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
-        { 
-          return HAL_TIMEOUT;
-        }
-
-        *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
-        hspi->pRxBuffPtr+=2U;
-        hspi->RxXferCount--;
-      }
-      /* Enable CRC Reception */
-      if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) 
-      {
-        SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-      }
-    }
-
-    /* Wait until RXNE flag is set */
-    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
-    { 
-      return HAL_TIMEOUT;
-    }
-
-    /* Receive last data in 8 Bit mode */
-    if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
-    {
-      (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
-    }
-    /* Receive last data in 16 Bit mode */
-    else
-    {
-      *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
-      hspi->pRxBuffPtr+=2U;
-    }
-    hspi->RxXferCount--;
-
-    /* If CRC computation is enabled */
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      /* Wait until RXNE flag is set: CRC Received */
-      if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
-      {
-        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-        return HAL_TIMEOUT;
-      }
-
-      /* Read CRC to clear RXNE flag */
-      tmpreg = hspi->Instance->DR;
-      UNUSED(tmpreg);		/* avoid warning on tmpreg affectation with stupid compiler */
-    }
-    
-    if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
-    {
-      /* Disable SPI peripheral */
-      __HAL_SPI_DISABLE(hspi);
-    }
-
-    hspi->State = HAL_SPI_STATE_READY;
-
-    /* Check if CRC error occurred */
-    if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
-    {  
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-
-      /* Reset CRC Calculation */
-      SPI_RESET_CRC(hspi);
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hspi);
-
-      return HAL_ERROR; 
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hspi);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Transmit and Receive an amount of data in blocking mode 
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @param  pTxData: pointer to transmission data buffer
-  * @param  pRxData: pointer to reception data buffer to be
-  * @param  Size: amount of data to be sent
-  * @param  Timeout: Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
-{
-  __IO uint16_t tmpreg = 0U;
-
-  if((hspi->State == HAL_SPI_STATE_READY) || (hspi->State == HAL_SPI_STATE_BUSY_RX))
-  {
-    if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Check the parameters */
-    assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
-
-    /* Process Locked */
-    __HAL_LOCK(hspi);
- 
-    /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
-    if(hspi->State == HAL_SPI_STATE_READY)
-    {
-      hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
-    }
-
-     /* Configure communication */   
-    hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-
-    hspi->pRxBuffPtr  = pRxData;
-    hspi->RxXferSize  = Size;
-    hspi->RxXferCount = Size;  
-    
-    hspi->pTxBuffPtr  = pTxData;
-    hspi->TxXferSize  = Size; 
-    hspi->TxXferCount = Size;
-
-    /*Init field not used in handle to zero */
-    hspi->RxISR = 0U;
-    hspi->TxISR = 0U;
-
-    /* Reset CRC Calculation */
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      SPI_RESET_CRC(hspi);
-    }
-
-    /* Check if the SPI is already enabled */ 
-    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
-    {
-      /* Enable SPI peripheral */
-      __HAL_SPI_ENABLE(hspi);
-    }
-
-    /* Transmit and Receive data in 16 Bit mode */
-    if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
-    {
-      if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01U)))
-      {
-        hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
-        hspi->pTxBuffPtr+=2U;
-        hspi->TxXferCount--;
-      }
-      if(hspi->TxXferCount == 0U)
-      {
-        /* Enable CRC Transmission */
-        if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-        {
-          SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-        }
-
-        /* Wait until RXNE flag is set */
-        if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
-        { 
-          return HAL_TIMEOUT;
-        }
-
-        *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
-        hspi->pRxBuffPtr+=2U;
-        hspi->RxXferCount--;
-      }
-      else
-      {
-        while(hspi->TxXferCount > 0U)
-        {
-          /* Wait until TXE flag is set to send data */
-          if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
-          { 
-            return HAL_TIMEOUT;
-          }
-
-          hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
-          hspi->pTxBuffPtr+=2U;
-          hspi->TxXferCount--;
-
-          /* Enable CRC Transmission */
-          if((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
-          {
-            SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-          }
-
-          /* Wait until RXNE flag is set */
-          if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
-          { 
-            return HAL_TIMEOUT;
-          }
-
-          *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
-          hspi->pRxBuffPtr+=2U;
-          hspi->RxXferCount--;
-        }
-        /* Receive the last byte */
-        if(hspi->Init.Mode == SPI_MODE_SLAVE)
-        {
-          /* Wait until RXNE flag is set */
-          if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
-          {
-            return HAL_TIMEOUT;
-          }
-          
-          *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
-          hspi->pRxBuffPtr+=2U;
-          hspi->RxXferCount--;
-        }
-      }
-    }
-    /* Transmit and Receive data in 8 Bit mode */
-    else
-    {
-      if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01U)))
-      {
-        hspi->Instance->DR = (*hspi->pTxBuffPtr++);
-        hspi->TxXferCount--;
-      }
-      if(hspi->TxXferCount == 0U)
-      {
-        /* Enable CRC Transmission */
-        if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-        {
-          SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-        }
-
-        /* Wait until RXNE flag is set */
-        if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        (*hspi->pRxBuffPtr) = hspi->Instance->DR;
-        hspi->RxXferCount--;
-      }
-      else
-      {
-        while(hspi->TxXferCount > 0U)
-        {
-          /* Wait until TXE flag is set to send data */
-          if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
-          {
-            return HAL_TIMEOUT;
-          }
-
-          hspi->Instance->DR = (*hspi->pTxBuffPtr++);
-          hspi->TxXferCount--;
-
-          /* Enable CRC Transmission */
-          if((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
-          {
-            SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-          }
-
-          /* Wait until RXNE flag is set */
-          if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
-          {
-            return HAL_TIMEOUT;
-          }
-
-          (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
-          hspi->RxXferCount--;
-        }
-        if(hspi->Init.Mode == SPI_MODE_SLAVE)
-        {
-          /* Wait until RXNE flag is set */
-          if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
-          {
-            return HAL_TIMEOUT;
-          }
-          
-          (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
-          hspi->RxXferCount--;
-        }
-      }
-    }
-
-    /* Read CRC from DR to close CRC calculation process */
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      /* Wait until RXNE flag is set */
-      if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
-      {
-        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-        return HAL_TIMEOUT;
-      }
-      /* Read CRC */
-      tmpreg = hspi->Instance->DR;
-      UNUSED(tmpreg);		/* avoid warning on tmpreg affectation with stupid compiler */
-    }
-
-    /* Wait until Busy flag is reset before disabling SPI */
-    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-      return HAL_TIMEOUT;
-    }
-    
-    hspi->State = HAL_SPI_STATE_READY;
-
-    /* Check if CRC error occurred */
-    if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-
-      SPI_RESET_CRC(hspi);
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hspi);
-      
-      return HAL_ERROR; 
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hspi);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Transmit an amount of data in no-blocking mode with Interrupt
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @param  pData: pointer to data buffer
-  * @param  Size: amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
-{
-  if(hspi->State == HAL_SPI_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Check the parameters */
-    assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
-
-    /* Process Locked */
-    __HAL_LOCK(hspi);
-
-    /* Configure communication */
-    hspi->State        = HAL_SPI_STATE_BUSY_TX;
-    hspi->ErrorCode    = HAL_SPI_ERROR_NONE;
-
-    hspi->TxISR        = &SPI_TxISR;
-    hspi->pTxBuffPtr   = pData;
-    hspi->TxXferSize   = Size;
-    hspi->TxXferCount  = Size;
-
-    /*Init field not used in handle to zero */
-    hspi->RxISR        = 0U;
-    hspi->pRxBuffPtr   = NULL;
-    hspi->RxXferSize   = 0U;
-    hspi->RxXferCount  = 0U;
-
-    /* Configure communication direction : 1Line */
-    if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
-    {
-      SPI_1LINE_TX(hspi);
-    }
-
-    /* Reset CRC Calculation */
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      SPI_RESET_CRC(hspi);
-    }
-
-    if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
-    {
-      __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE));
-    }
-    else
-    {
-      /* Enable TXE and ERR interrupt */
-      __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
-    }
-    /* Process Unlocked */
-    __HAL_UNLOCK(hspi);
-
-    /* Check if the SPI is already enabled */ 
-    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
-    {
-      /* Enable SPI peripheral */
-      __HAL_SPI_ENABLE(hspi);
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in no-blocking mode with Interrupt
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @param  pData: pointer to data buffer
-  * @param  Size: amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
-{
-  if(hspi->State == HAL_SPI_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U)) 
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hspi);
-
-    /* Configure communication */
-    hspi->State        = HAL_SPI_STATE_BUSY_RX;
-    hspi->ErrorCode    = HAL_SPI_ERROR_NONE;
-
-    hspi->RxISR        = &SPI_RxISR;
-    hspi->pRxBuffPtr   = pData;
-    hspi->RxXferSize   = Size;
-    hspi->RxXferCount  = Size ; 
-
-   /*Init field not used in handle to zero */
-    hspi->TxISR        = 0U;
-    hspi->pTxBuffPtr   = NULL;
-    hspi->TxXferSize   = 0U;
-    hspi->TxXferCount  = 0U;
-
-    /* Configure communication direction : 1Line */
-    if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
-    {
-      SPI_1LINE_RX(hspi);
-    }
-    else if((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
-    {
-      /* Process Unlocked */
-      __HAL_UNLOCK(hspi);
-
-      /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
-      return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
-    }
-
-    /* Reset CRC Calculation */
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      SPI_RESET_CRC(hspi);
-    }
-
-    /* Enable TXE and ERR interrupt */
-    __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hspi);
-
-    /* Note : The SPI must be enabled after unlocking current process 
-              to avoid the risk of SPI interrupt handle execution before current
-              process unlock */
-
-    /* Check if the SPI is already enabled */ 
-    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
-    {
-      /* Enable SPI peripheral */
-      __HAL_SPI_ENABLE(hspi);
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY; 
-  }
-}
-
-/**
-  * @brief  Transmit and Receive an amount of data in no-blocking mode with Interrupt 
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @param  pTxData: pointer to transmission data buffer
-  * @param  pRxData: pointer to reception data buffer to be
-  * @param  Size: amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
-{
-
-  if((hspi->State == HAL_SPI_STATE_READY) || \
-     ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
-  {
-    if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0U)) 
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Check the parameters */
-    assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
-
-    /* Process locked */
-    __HAL_LOCK(hspi);
-
-    /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
-    if(hspi->State != HAL_SPI_STATE_BUSY_RX)
-    {
-      hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
-    }
-
-    /* Configure communication */
-    hspi->ErrorCode    = HAL_SPI_ERROR_NONE;
-
-    hspi->TxISR = &SPI_TxISR;
-    hspi->pTxBuffPtr   = pTxData;
-    hspi->TxXferSize   = Size;
-    hspi->TxXferCount  = Size;
-
-    hspi->RxISR = &SPI_2LinesRxISR;
-    hspi->pRxBuffPtr   = pRxData;
-    hspi->RxXferSize   = Size;
-    hspi->RxXferCount  = Size;
-
-    /* Reset CRC Calculation */
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      SPI_RESET_CRC(hspi);
-    }
-
-    /* Enable TXE, RXNE and ERR interrupt */
-    __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hspi);
-
-    /* Check if the SPI is already enabled */ 
-    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
-    {
-      /* Enable SPI peripheral */
-      __HAL_SPI_ENABLE(hspi);
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY; 
-  }
-}
-
-/**
-  * @brief  Transmit an amount of data in no-blocking mode with DMA
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @param  pData: pointer to data buffer
-  * @param  Size: amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
-{
-  if(hspi->State == HAL_SPI_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-	  /* Process Unlocked */
-      __HAL_UNLOCK(hspi);
-      return  HAL_ERROR;
-    }
-
-    /* Check the parameters */
-    assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
-
-    /* Process Locked */
-    __HAL_LOCK(hspi);
-
-    /* Configure communication */
-    hspi->State       = HAL_SPI_STATE_BUSY_TX;
-    hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-
-    hspi->pTxBuffPtr  = (uint8_t*)pData;
-    hspi->TxXferSize  = Size;
-    hspi->TxXferCount = Size;
-
-    /*Init field not used in handle to zero */
-    hspi->TxISR       = 0U;
-    hspi->RxISR       = 0U;
-	
-    hspi->pRxBuffPtr  = NULL;
-    hspi->RxXferSize  = 0U;
-    hspi->RxXferCount = 0U;
-
-    /* Configure communication direction : 1Line */
-    if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
-    {
-      SPI_1LINE_TX(hspi);
-    }
-
-    /* Reset CRC Calculation */
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      SPI_RESET_CRC(hspi);
-    }
-
-    /* Set the SPI TxDMA Half transfer complete callback */
-    hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
-
-    /* Set the SPI TxDMA transfer complete callback */
-    hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
-
-    /* Set the DMA error callback */
-    hspi->hdmatx->XferErrorCallback = SPI_DMAError;
-
-    /* Reset content of SPI RxDMA descriptor */
-	hspi->hdmarx->XferHalfCpltCallback = (void (*)(DMA_HandleTypeDef *))NULL;
-    hspi->hdmarx->XferCpltCallback     = (void (*)(DMA_HandleTypeDef *))NULL;
-    hspi->hdmarx->XferErrorCallback    = (void (*)(DMA_HandleTypeDef *))NULL;
-
-    /* Enable the Tx DMA Channel */
-    HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
-
-    /* Enable Tx DMA Request */
-    SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hspi);
-
-    /* Check if the SPI is already enabled */ 
-    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
-    {
-      /* Enable SPI peripheral */
-      __HAL_SPI_ENABLE(hspi);
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hspi);
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in no-blocking mode with DMA 
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @param  pData: pointer to data buffer
-  * @note  When the CRC feature is enabled the pData Length must be Size + 1. 
-  * @param  Size: amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
-{
-  if(hspi->State == HAL_SPI_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-	  /* Process Unlocked */
-      __HAL_UNLOCK(hspi);
-      return  HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hspi);
-
-    /* Configure communication */
-    hspi->State       = HAL_SPI_STATE_BUSY_RX;
-    hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-
-    hspi->pRxBuffPtr  = (uint8_t*)pData;
-    hspi->RxXferSize  = Size;
-    hspi->RxXferCount = Size;
-
-    /*Init field not used in handle to zero */
-    hspi->RxISR       = 0U;
-    hspi->TxISR       = 0U;
-	
-    hspi->pTxBuffPtr  = NULL;
-    hspi->TxXferSize  = 0U;
-    hspi->TxXferCount = 0U;
-
-    /* Configure communication direction : 1Line */
-    if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
-    {
-      SPI_1LINE_RX(hspi);
-    }
-    else if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER))
-    {
-      /* Process Unlocked */
-      __HAL_UNLOCK(hspi);
-
-      /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
-      return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
-    }
-
-    /* Reset CRC Calculation */
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      SPI_RESET_CRC(hspi);
-    }
-
-    /* Set the SPI RxDMA Half transfer complete callback */
-    hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
-
-    /* Set the SPI Rx DMA transfer complete callback */
-    hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
-
-    /* Set the DMA error callback */
-    hspi->hdmarx->XferErrorCallback = SPI_DMAError;
-
-    /* Reset content of SPI TxDMA descriptor */
-    hspi->hdmatx->XferHalfCpltCallback = (void (*)(DMA_HandleTypeDef *))NULL;
-    hspi->hdmatx->XferCpltCallback     = (void (*)(DMA_HandleTypeDef *))NULL;
-    hspi->hdmatx->XferErrorCallback    = (void (*)(DMA_HandleTypeDef *))NULL;
-
-    /* Enable the Rx DMA Channel */
-    HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
-
-    /* Enable Rx DMA Request */  
-    SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hspi);
-
-    /* Check if the SPI is already enabled */ 
-    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
-    {
-      /* Enable SPI peripheral */
-      __HAL_SPI_ENABLE(hspi);
-    }
-
-    return HAL_OK;
-  }
-  else
-  {  
-    /* Process Unlocked */
-    __HAL_UNLOCK(hspi);
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Transmit and Receive an amount of data in no-blocking mode with DMA 
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @param  pTxData: pointer to transmission data buffer
-  * @param  pRxData: pointer to reception data buffer
-  * @note  When the CRC feature is enabled the pRxData Length must be Size + 1 
-  * @param  Size: amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
-{
-  if((hspi->State == HAL_SPI_STATE_READY) || \
-     ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
-  {
-    if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Check the parameters */
-    assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
-    
-    /* Process locked */
-    __HAL_LOCK(hspi);
-
-    /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
-    if(hspi->State != HAL_SPI_STATE_BUSY_RX)
-    {
-      hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
-    }
-
-    /* Configure communication */
-    hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-
-    hspi->pTxBuffPtr  = (uint8_t*)pTxData;
-    hspi->TxXferSize  = Size;
-    hspi->TxXferCount = Size;
-
-    hspi->pRxBuffPtr  = (uint8_t*)pRxData;
-    hspi->RxXferSize  = Size;
-    hspi->RxXferCount = Size;
-
-    /*Init field not used in handle to zero */
-    hspi->RxISR = 0U;
-    hspi->TxISR = 0U;
-
-    /* Reset CRC Calculation */
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      SPI_RESET_CRC(hspi);
-    }
-
-    /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
-    if(hspi->State == HAL_SPI_STATE_BUSY_RX)
-    {
-      /* Set the SPI Rx DMA Half transfer complete callback */
-      hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
-      
-      hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
-    }
-    else
-    {
-      /* Set the SPI Tx/Rx DMA Half transfer complete callback */
-      hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
-  
-      hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
-    }
-
-    /* Set the DMA error callback */
-    hspi->hdmarx->XferErrorCallback = SPI_DMAError;
-
-    /* Enable the Rx DMA Channel */
-    HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
-
-    /* Enable Rx DMA Request */  
-    SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
-
-    /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
-    is performed in DMA reception complete callback  */
-    hspi->hdmatx->XferHalfCpltCallback = (void (*)(DMA_HandleTypeDef *))NULL;
-    hspi->hdmatx->XferCpltCallback     = (void (*)(DMA_HandleTypeDef *))NULL;
-
-    /* Set the DMA error callback */
-    hspi->hdmatx->XferErrorCallback    = SPI_DMAError;
-    
-    /* Enable the Tx DMA Channel */
-    HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
-
-    /* Check if the SPI is already enabled */ 
-    if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
-    {
-      /* Enable SPI peripheral */
-      __HAL_SPI_ENABLE(hspi);
-    }
-
-    /* Enable Tx DMA Request */  
-    SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hspi);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-
-/**
-  * @brief Pauses the DMA Transfer.
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for the specified SPI module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
-{
-  /* Process Locked */
-  __HAL_LOCK(hspi);
-  
-  /* Disable the SPI DMA Tx & Rx requests */
-  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
-  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
-  
-  /* Process Unlocked */
-  __HAL_UNLOCK(hspi);
-  
-  return HAL_OK; 
-}
-
-/**
-  * @brief Resumes the DMA Transfer.
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for the specified SPI module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
-{
-  /* Process Locked */
-  __HAL_LOCK(hspi);
-  
-  /* Enable the SPI DMA Tx & Rx requests */
-  SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
-  SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
-  
-  /* Process Unlocked */
-  __HAL_UNLOCK(hspi);
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief Stops the DMA Transfer.
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for the specified SPI module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
-{
-  /* The Lock is not implemented on this API to allow the user application
-     to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
-     when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
-     and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
-     */
-  
-  /* Abort the SPI DMA tx Channel */
-  if(hspi->hdmatx != NULL)
-  {
-    HAL_DMA_Abort(hspi->hdmatx);
-  }
-  /* Abort the SPI DMA rx Channel */
-  if(hspi->hdmarx != NULL)
-  {
-    HAL_DMA_Abort(hspi->hdmarx);
-  }
-  
-  /* Disable the SPI DMA Tx & Rx requests */
-  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
-  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
-  
-  hspi->State = HAL_SPI_STATE_READY;
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  This function handles SPI interrupt request.
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval HAL status
-  */
-void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
-{
-  /* SPI in mode Receiver and Overrun not occurred ---------------------------*/
-  if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) == RESET))
-  {
-    hspi->RxISR(hspi);
-    return;
-  }
-
-  /* SPI in mode Tramitter ---------------------------------------------------*/
-  if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE) != RESET))
-  {
-    hspi->TxISR(hspi);
-    return;
-  }
-
-  if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_ERR) != RESET)
-  {
-    /* SPI CRC error interrupt occurred ---------------------------------------*/
-    if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-      __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
-    }
-    /* SPI Mode Fault error interrupt occurred --------------------------------*/
-    if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_MODF) != RESET)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
-      __HAL_SPI_CLEAR_MODFFLAG(hspi);
-    }
-    
-    /* SPI Overrun error interrupt occurred -----------------------------------*/
-    if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) != RESET)
-    {
-      if(hspi->State != HAL_SPI_STATE_BUSY_TX)
-      {
-        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
-        __HAL_SPI_CLEAR_OVRFLAG(hspi);      
-      }
-    }
-
-    /* SPI Frame error interrupt occurred -------------------------------------*/
-    if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_FRE) != RESET)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
-      __HAL_SPI_CLEAR_FREFLAG(hspi);
-    }
-
-    /* Call the Error call Back in case of Errors */
-    if(hspi->ErrorCode!=HAL_SPI_ERROR_NONE)
-    {
-      __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
-      hspi->State = HAL_SPI_STATE_READY;
-      HAL_SPI_ErrorCallback(hspi);
-    }
-  }
-}
-
-/**
-  * @brief Tx Transfer completed callbacks
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval None
-  */
-__weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_SPI_TxCpltCallback could be implenetd in the user file
-   */
-}
-
-/**
-  * @brief Rx Transfer completed callbacks
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval None
-  */
-__weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_SPI_RxCpltCallback() could be implenetd in the user file
-   */
-}
-
-/**
-  * @brief Tx and Rx Transfer completed callbacks
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval None
-  */
-__weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_SPI_TxRxCpltCallback() could be implenetd in the user file
-   */
-}
-
-/**
-  * @brief Tx Half Transfer completed callbacks
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval None
-  */
-__weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_SPI_TxHalfCpltCallback could be implenetd in the user file
-   */
-}
-
-/**
-  * @brief Rx Half Transfer completed callbacks
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval None
-  */
-__weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_SPI_RxHalfCpltCallback() could be implenetd in the user file
-   */
-}
-
-/**
-  * @brief Tx and Rx Transfer completed callbacks
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval None
-  */
-__weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_SPI_TxRxHalfCpltCallback() could be implenetd in the user file
-   */
-}
-
-/**
-  * @brief SPI error callbacks
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval None
-  */
- __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : - This function Should not be modified, when the callback is needed,
-            the HAL_SPI_ErrorCallback() could be implenetd in the user file.
-            - The ErrorCode parameter in the hspi handle is updated by the SPI processes
-            and user can use HAL_SPI_GetError() API to check the latest error occurred.
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
-  *  @brief   SPI control functions 
-  *
-@verbatim
- ===============================================================================
-                      ##### Peripheral State and Errors functions #####
- ===============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to control the SPI.
-     (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
-     (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the SPI state
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval SPI state
-  */
-HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
-{
-  return hspi->State;
-}
-
-/**
-  * @brief  Return the SPI error code
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval SPI Error Code
-  */
-uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
-{
-  return hspi->ErrorCode;
-}
-
-/**
-  * @}
-  */
-  
-/**
-    * @}
-    */
-
-
-
-/** @addtogroup SPI_Private
-    * @{
-    */
-
-
-  /**
-  * @brief  Interrupt Handler to close Tx transfer 
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval void
-  */
-static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi)
-{
-  /* Wait until TXE flag is set to send data */
-  if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
-  {
-    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-  }
-
-  /* Disable TXE interrupt */
-  __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE));
-
-  /* Disable ERR interrupt if Receive process is finished */
-  if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) == RESET)
-  {
-    __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
-
-    /* Wait until Busy flag is reset before disabling SPI */
-    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-    }
-
-    /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
-    if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
-    {
-      __HAL_SPI_CLEAR_OVRFLAG(hspi);
-    }
-    
-    /* Check if Errors has been detected during transfer */
-    if(hspi->ErrorCode ==  HAL_SPI_ERROR_NONE)
-    {
-      /* Check if we are in Tx or in Rx/Tx Mode */
-      if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
-      {
-        /* Set state to READY before run the Callback Complete */
-        hspi->State = HAL_SPI_STATE_READY;
-        HAL_SPI_TxRxCpltCallback(hspi);
-      }
-      else
-      {
-        /* Set state to READY before run the Callback Complete */
-        hspi->State = HAL_SPI_STATE_READY;
-        HAL_SPI_TxCpltCallback(hspi);
-      }
-    }
-    else
-    {
-      /* Set state to READY before run the Callback Complete */
-      hspi->State = HAL_SPI_STATE_READY;
-      /* Call Error call back in case of Error */
-      HAL_SPI_ErrorCallback(hspi);
-    }
-  }
-}
-
-/**
-  * @brief  Interrupt Handler to transmit amount of data in no-blocking mode 
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval void
-  */
-static void SPI_TxISR(SPI_HandleTypeDef *hspi)
-{
-  /* Transmit data in 8 Bit mode */
-  if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
-  {
-    hspi->Instance->DR = (*hspi->pTxBuffPtr++);
-  }
-  /* Transmit data in 16 Bit mode */
-  else
-  {
-    hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
-    hspi->pTxBuffPtr+=2U;
-  }
-  hspi->TxXferCount--;
-
-  if(hspi->TxXferCount == 0U)
-  {
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      /* calculate and transfer CRC on Tx line */
-      SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-    }
-    SPI_TxCloseIRQHandler(hspi);
-  }
-}
-
-/**
-  * @brief  Interrupt Handler to close Rx transfer 
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval void
-  */
-static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi)
-{
-  __IO uint16_t tmpreg = 0U;
-
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    /* Wait until RXNE flag is set to read CRC data */
-    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-    }
-
-    /* Read CRC to reset RXNE flag */
-    tmpreg = hspi->Instance->DR;
-    UNUSED(tmpreg);		/* avoid warning on tmpreg affectation with some compiler */
-
-    /* Wait until RXNE flag is reset */
-    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-    }
-
-    /* Check if CRC error occurred */
-    if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-
-      /* Reset CRC Calculation */
-      SPI_RESET_CRC(hspi);
-    }
-  }
-
-  /* Disable RXNE interrupt */
-  __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE));
-
-  /* if Transmit process is finished */
-  if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) == RESET)
-  {
-    /* Disable ERR interrupt */
-    __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
-
-    if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
-    {
-      /* Disable SPI peripheral */
-      __HAL_SPI_DISABLE(hspi);
-    }
-    
-    /* Check if Errors has been detected during transfer */
-    if(hspi->ErrorCode ==  HAL_SPI_ERROR_NONE)
-    {
-      /* Check if we are in Rx or in Rx/Tx Mode */
-      if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
-      {
-        /* Set state to READY before run the Callback Complete */
-        hspi->State = HAL_SPI_STATE_READY;
-        HAL_SPI_TxRxCpltCallback(hspi);
-      }
-      else
-      {
-        /* Set state to READY before run the Callback Complete */
-        hspi->State = HAL_SPI_STATE_READY;
-        HAL_SPI_RxCpltCallback(hspi);
-      }
-    }
-    else
-    {
-      /* Set state to READY before run the Callback Complete */
-      hspi->State = HAL_SPI_STATE_READY;
-      /* Call Error call back in case of Error */
-      HAL_SPI_ErrorCallback(hspi);
-    }
-  }
-}
-
-/**
-  * @brief  Interrupt Handler to receive amount of data in 2Lines mode 
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval void
-  */
-static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi)
-{
-  /* Receive data in 8 Bit mode */
-  if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
-  {
-    (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
-  }
-  /* Receive data in 16 Bit mode */
-  else
-  {
-    *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
-    hspi->pRxBuffPtr+=2U;
-  }
-  hspi->RxXferCount--;
-
-  if(hspi->RxXferCount==0U)
-  {
-    SPI_RxCloseIRQHandler(hspi);
-  }
-}
-
-/**
-  * @brief  Interrupt Handler to receive amount of data in no-blocking mode 
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @retval void
-  */
-static void SPI_RxISR(SPI_HandleTypeDef *hspi)
-{
-  /* Receive data in 8 Bit mode */
-  if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
-  {
-    (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
-  }
-  /* Receive data in 16 Bit mode */
-  else
-  {
-    *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
-    hspi->pRxBuffPtr+=2U;
-  }
-    hspi->RxXferCount--;
-
-  /* Enable CRC Transmission */
-  if((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
-  {
-    /* Set CRC Next to calculate CRC on Rx side */
-    SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-  }
-
-  if(hspi->RxXferCount == 0U)
-  {
-    SPI_RxCloseIRQHandler(hspi);
-  }
-}
-
-/**
-  * @brief DMA SPI transmit process complete callback 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
-{
-  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-
-  /* DMA Normal Mode */
-  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
-  {
-    /* Wait until TXE flag is set to send data */
-    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-    }
-
-    /* Disable Tx DMA Request */
-    CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
-
-    /* Wait until Busy flag is reset before disabling SPI */
-    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-    }
-
-    hspi->TxXferCount = 0U;
-    hspi->State = HAL_SPI_STATE_READY;
-  }
-
-  /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
-  if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
-  {
-    __HAL_SPI_CLEAR_OVRFLAG(hspi);
-  }
-
-  /* Check if Errors has been detected during transfer */
-  if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
-  {
-    HAL_SPI_ErrorCallback(hspi);
-  }
-  else
-  {
-    HAL_SPI_TxCpltCallback(hspi);
-  }
-}
-
-/**
-  * @brief DMA SPI receive process complete callback 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  __IO uint16_t tmpreg = 0U;
-
-  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-  /* DMA Normal mode */
-  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
-  {
-    /* Disable Rx DMA Request */
-    CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
-
-    /* Disable Tx DMA Request (done by default to handle the case Master RX direction 2 lines) */
-    CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
-
-    /* CRC Calculation handling */
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      /* Wait until RXNE flag is set (CRC ready) */
-      if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
-      {
-        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-      }
-
-      /* Read CRC */
-      tmpreg = hspi->Instance->DR;
-      UNUSED(tmpreg);		/* avoid warning on tmpreg affectation with some compiler */
-
-      /* Wait until RXNE flag is reset */
-      if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
-      {
-        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-      }
-
-      /* Check if CRC error occurred */
-      if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
-      {
-        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-        __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
-      }
-    }
-
-    if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
-    {
-      /* Disable SPI peripheral */
-      __HAL_SPI_DISABLE(hspi);
-    }
-
-    hspi->RxXferCount = 0U;
-    hspi->State = HAL_SPI_STATE_READY;
-
-    /* Check if Errors has been detected during transfer */
-    if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
-    {
-      HAL_SPI_ErrorCallback(hspi);
-    }
-    else
-    {
-      HAL_SPI_RxCpltCallback(hspi);
-    }
-  }
-  else
-  {
-    HAL_SPI_RxCpltCallback(hspi);
-  }
-}
-
-/**
-  * @brief DMA SPI transmit receive process complete callback 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)   
-{
-  __IO uint16_t tmpreg = 0U;
-
-  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
-  {
-    /* CRC Calculation handling */
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      /* Check if CRC is done on going (RXNE flag set) */
-      if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK)
-      {
-        /* Wait until RXNE flag is set to send data */
-        if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
-        {
-          SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-        }
-      }
-      /* Read CRC */
-      tmpreg = hspi->Instance->DR;
-      UNUSED(tmpreg);		/* avoid warning on tmpreg affectation with some compiler */
-
-      /* Check if CRC error occurred */
-      if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
-      {
-        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-        __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
-      }
-    }
-
-    /* Wait until TXE flag is set to send data */
-    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-    }
-  
-    /* Disable Tx DMA Request */
-    CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
-
-    /* Wait until Busy flag is reset before disabling SPI */
-    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-    }
-
-    /* Disable Rx DMA Request */
-    CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
-
-    hspi->TxXferCount = 0U;
-    hspi->RxXferCount = 0U;
-
-    hspi->State = HAL_SPI_STATE_READY;
-
-    /* Check if Errors has been detected during transfer */
-    if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
-    {
-      HAL_SPI_ErrorCallback(hspi);
-    }
-    else
-    {
-      HAL_SPI_TxRxCpltCallback(hspi);
-    }
-  }
-  else
-  {
-    HAL_SPI_TxRxCpltCallback(hspi);
-  }
-}
-
-/**
-  * @brief DMA SPI half transmit process complete callback 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
-{
-  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-  HAL_SPI_TxHalfCpltCallback(hspi);
-}
-
-/**
-  * @brief DMA SPI half receive process complete callback 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-  HAL_SPI_RxHalfCpltCallback(hspi);
-}
-
-/**
-  * @brief DMA SPI Half transmit receive process complete callback 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)   
-{
-  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-  HAL_SPI_TxRxHalfCpltCallback(hspi);
-}
-
-/**
-  * @brief DMA SPI communication error callback 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SPI_DMAError(DMA_HandleTypeDef *hdma)
-{
-  SPI_HandleTypeDef* hspi = (SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  hspi->TxXferCount = 0U;
-  hspi->RxXferCount = 0U;
-  hspi->State= HAL_SPI_STATE_READY;
-  SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
-  HAL_SPI_ErrorCallback(hspi);
-}
-
-/**
-  * @brief  This function handles SPI Communication Timeout.
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *                the configuration information for SPI module.
-  * @param  Flag: SPI flag to check
-  * @param  Status: Flag status to check: RESET or set
-  * @param  Timeout: Timeout duration
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout)  
-{
-  uint32_t tickstart = 0U;
-
-  /* Get tick */ 
-  tickstart = HAL_GetTick();
-
-  /* Wait until flag is set */
-  if(Status == RESET)
-  {
-    while(__HAL_SPI_GET_FLAG(hspi, Flag) == RESET)
-    {
-      if(Timeout != HAL_MAX_DELAY)
-      {
-        if((Timeout == 0U) || ((HAL_GetTick() - tickstart ) > Timeout))
-        {
-          /* Disable the SPI and reset the CRC: the CRC value should be cleared
-             on both master and slave sides in order to resynchronize the master
-             and slave for their respective CRC calculation */
-
-          /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
-          __HAL_SPI_DISABLE_IT(hspi, (uint32_t)(SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
-
-          /* Disable SPI peripheral */
-          __HAL_SPI_DISABLE(hspi);
-
-          /* Reset CRC Calculation */
-          if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-          {
-            SPI_RESET_CRC(hspi);
-          }
-
-          hspi->State= HAL_SPI_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hspi);
-
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-  }
-  else
-  {
-    while(__HAL_SPI_GET_FLAG(hspi, Flag) != RESET)
-    {
-      if(Timeout != HAL_MAX_DELAY)
-      {
-        if((Timeout == 0U) || ((HAL_GetTick() - tickstart ) > Timeout))
-        {
-          /* Disable the SPI and reset the CRC: the CRC value should be cleared
-             on both master and slave sides in order to resynchronize the master
-             and slave for their respective CRC calculation */
-
-          /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
-          __HAL_SPI_DISABLE_IT(hspi, (uint32_t)(SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
-
-          /* Disable SPI peripheral */
-          __HAL_SPI_DISABLE(hspi);
-
-          /* Reset CRC Calculation */
-          if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-          {
-            SPI_RESET_CRC(hspi);
-          }
-
-          hspi->State= HAL_SPI_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hspi);
-
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-  }
-  return HAL_OK;
-}
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c
deleted file mode 100755
index a431331d..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c
+++ /dev/null
@@ -1,5110 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_tim.c
-  * @author  MCD Application Team
-  * @brief   TIM HAL module driver.
-  * @brief   This file provides firmware functions to manage the following 
-  *          functionalities of the Timer (TIM) peripheral:
-  *           + Timer Base Initialization
-  *           + Timer Base Start
-  *           + Timer Base Start Interruption
-  *           + Timer Base Start DMA
-  *           + Timer Output Compare/PWM Initialization
-  *           + Timer Output Compare/PWM Channel Configuration
-  *           + Timer Output Compare/PWM  Start
-  *           + Timer Output Compare/PWM  Start Interruption
-  *           + Timer Output Compare/PWM Start DMA
-  *           + Timer Input Capture Initialization
-  *           + Timer Input Capture Channel Configuration
-  *           + Timer Input Capture Start
-  *           + Timer Input Capture Start Interruption
-  *           + Timer Input Capture Start DMA
-  *           + Timer One Pulse Initialization
-  *           + Timer One Pulse Channel Configuration
-  *           + Timer One Pulse Start
-  *           + Timer Encoder Interface Initialization
-  *           + Timer Encoder Interface Start
-  *           + Timer Encoder Interface Start Interruption
-  *           + Timer Encoder Interface Start DMA
-  *           + Timer OCRef clear configuration
-  *           + Timer External Clock configuration
-  *           + Timer Complementary signal bread and dead time configuration
-  *           + Timer Master and Slave synchronization configuration
-  @verbatim
-  ==============================================================================
-                      ##### TIMER Generic features #####
-  ==============================================================================
-    [..] The Timer features include: 
-         (#) 16-bit up, down, up/down auto-reload counter.
-         (#) 16-bit programmable prescaler allowing dividing (also on the fly) the counter clock
-             frequency either by any factor between 1 and 65536.
-         (#) Up to 4 independent channels for:
-           (++) Input Capture
-           (++) Output Compare
-           (++) PWM generation (Edge and Center-aligned Mode)
-           (++) One-pulse mode output
-         (#) Synchronization circuit to control the timer with external signals and to interconnect
-            several timers together.
-         (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for positioning
-           purposes                
-   
-            ##### How to use this driver #####
-================================================================================
-    [..]
-     (#) Initialize the TIM low level resources by implementing the following functions 
-         depending from feature used :
-           (++) Time Base : HAL_TIM_Base_MspInit() 
-           (++) Input Capture : HAL_TIM_IC_MspInit()
-           (++) Output Compare : HAL_TIM_OC_MspInit()
-           (++) PWM generation : HAL_TIM_PWM_MspInit()
-           (++) One-pulse mode output : HAL_TIM_OnePulse_MspInit()
-           (++) Encoder mode output : HAL_TIM_Encoder_MspInit()
-           
-     (#) Initialize the TIM low level resources :
-        (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); 
-        (##) TIM pins configuration
-            (+++) Enable the clock for the TIM GPIOs using the following function:
-             __HAL_RCC_GPIOx_CLK_ENABLE();   
-            (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();  
-
-     (#) The external Clock can be configured, if needed (the default clock is the internal clock from the APBx), 
-         using the following function:
-         HAL_TIM_ConfigClockSource, the clock configuration should be done before any start function.
-  
-     (#) Configure the TIM in the desired functioning mode using one of the 
-         initialization function of this driver:
-         (++) HAL_TIM_Base_Init: to use the Timer to generate a simple time base
-         (++) HAL_TIM_OC_Init and HAL_TIM_OC_ConfigChannel: to use the Timer to generate an 
-              Output Compare signal.
-         (++) HAL_TIM_PWM_Init and HAL_TIM_PWM_ConfigChannel: to use the Timer to generate a 
-              PWM signal.
-         (++) HAL_TIM_IC_Init and HAL_TIM_IC_ConfigChannel: to use the Timer to measure an 
-              external signal.
-         (++) HAL_TIM_OnePulse_Init and HAL_TIM_OnePulse_ConfigChannel: to use the Timer in One Pulse Mode.
-         (++) HAL_TIM_Encoder_Init: to use the Timer Encoder Interface.
-
-     (#) Activate the TIM peripheral using one of the start functions: 
-         HAL_TIM_Base_Start(), HAL_TIM_Base_Start_DMA(), HAL_TIM_Base_Start_IT(),
-         HAL_TIM_OC_Start(), HAL_TIM_OC_Start_DMA(), HAL_TIM_OC_Start_IT(),
-         HAL_TIM_IC_Start(), HAL_TIM_IC_Start_DMA(), HAL_TIM_IC_Start_IT(),
-         HAL_TIM_PWM_Start(), HAL_TIM_PWM_Start_DMA(), HAL_TIM_PWM_Start_IT(),
-         HAL_TIM_OnePulse_Start(), HAL_TIM_OnePulse_Start_IT(),
-         HAL_TIM_Encoder_Start(), HAL_TIM_Encoder_Start_DMA() or HAL_TIM_Encoder_Start_IT()
-
-     (#) The DMA Burst is managed with the two following functions:
-         HAL_TIM_DMABurst_WriteStart
-         HAL_TIM_DMABurst_ReadStart
-  
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_TIM_MODULE_ENABLED
-
-/** @addtogroup TIM
-  * @brief TIM HAL module driver
-  * @{
-  */
-
-/** @addtogroup TIM_Private
-  * @{
-  */
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-static void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure);
-static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
-static void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
-static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
-static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
-static void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
-static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
-static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
-static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
-static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
-static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
-static void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter);
-static void TIM_ITRx_SetConfig(TIM_TypeDef* TIMx, uint16_t InputTriggerSource);
-static void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState);
-static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma);
-static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma);
-static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,TIM_SlaveConfigTypeDef * sSlaveConfig);
-/**
-  * @}
-  */
-
-/*******************************************************************************/
-/* Exported functions ---------------------------------------------------------*/
-/*******************************************************************************/
-
-/** @addtogroup TIM_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup TIM_Exported_Functions_Group1
- *  @brief    Time Base functions
- *
-@verbatim
-  ==============================================================================
-              ##### Timer Base functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to:
-    (+) Initialize and configure the TIM base.
-    (+) De-initialize the TIM base.
-    (+) Start the Timer Base.
-    (+) Stop the Timer Base.
-    (+) Start the Timer Base and enable interrupt.
-    (+) Stop the Timer Base and disable interrupt.
-    (+) Start the Timer Base and enable DMA transfer.
-    (+) Stop the Timer Base and disable DMA transfer.
- 
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Initializes the TIM Time base Unit according to the specified
-  *         parameters in the TIM_HandleTypeDef and create the associated handle.
-  * @param  htim : TIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
-{ 
-  /* Check the TIM handle allocation */
-  if(htim == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance)); 
-  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
-  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
-  assert_param(IS_TIM_PERIOD(htim->Init.Period));
-  assert_param(IS_TIM_PRESCALER(htim->Init.Prescaler));
-  
-  if(htim->State == HAL_TIM_STATE_RESET)
-  {  
-    /* Allocate lock resource and initialize it */
-    htim->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC */
-    HAL_TIM_Base_MspInit(htim);
-  }
-    
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-  
-  /* Set the Time Base configuration */
-  TIM_Base_SetConfig(htim->Instance, &htim->Init); 
-  
-  /* Initialize the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the TIM Base peripheral
-  * @param  htim : TIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Disable the TIM Peripheral Clock */
-  __HAL_TIM_DISABLE(htim);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
-  HAL_TIM_Base_MspDeInit(htim);
-  
-  /* Change TIM state */
-  htim->State = HAL_TIM_STATE_RESET;
-  
-  /* Release Lock */
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM Base MSP.
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_Base_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes TIM Base MSP.
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_Base_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Starts the TIM Base generation.
-  * @param  htim : TIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-  
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Change the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Base generation.
-  * @param  htim : TIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-  
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Change the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Base generation in interrupt mode.
-  * @param  htim : TIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  
-  /* Enable the TIM Update interrupt */
-  __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Base generation in interrupt mode.
-  * @param  htim : TIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  /* Disable the TIM Update interrupt */
-  __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Base generation in DMA mode.
-  * @param  htim : TIM handle
-  * @param  pData: The source Buffer address.
-  * @param  Length: The length of data to be transferred from memory to peripheral.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
-  
-  if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if((pData == 0U ) && (Length > 0U))
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }
-  /* Set the DMA Period elapsed callback */
-  htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
-
-  /* Set the DMA error callback */
-  htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ;
-  
-  /* Enable the DMA Stream */
-  HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->ARR, Length);
-  
-  /* Enable the TIM Update DMA request */
-  __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Base generation in DMA mode.
-  * @param  htim : TIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
-
-  /* Disable the TIM Update DMA request */
-  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_UPDATE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-    
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-
-/** @addtogroup TIM_Exported_Functions_Group2
- *  @brief    Time Output Compare functions
- *
-@verbatim
-  ==============================================================================
-                  ##### Timer Output Compare functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to:
-    (+) Initialize and configure the TIM Output Compare.
-    (+) De-initialize the TIM Output Compare.
-    (+) Start the Timer Output Compare.
-    (+) Stop the Timer Output Compare.
-    (+) Start the Timer Output Compare and enable interrupt.
-    (+) Stop the Timer Output Compare and disable interrupt.
-    (+) Start the Timer Output Compare and enable DMA transfer.
-    (+) Stop the Timer Output Compare and disable DMA transfer.
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Initializes the TIM Output Compare according to the specified
-  *         parameters in the TIM_HandleTypeDef and create the associated handle.
-  * @param  htim: TIM Output Compare handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef* htim)
-{
-  /* Check the TIM handle allocation */
-  if(htim == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
-  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
-  assert_param(IS_TIM_PERIOD(htim->Init.Period));
-  assert_param(IS_TIM_PRESCALER(htim->Init.Prescaler));
-
-  if(htim->State == HAL_TIM_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    htim->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA*/
-    HAL_TIM_OC_MspInit(htim);
-  }
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-
-  /* Init the base time for the Output Compare */
-  TIM_Base_SetConfig(htim->Instance, &htim->Init);
-  
-  /* Initialize the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the TIM peripheral
-  * @param  htim: TIM Output Compare handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-
-   htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Disable the TIM Peripheral Clock */
-  __HAL_TIM_DISABLE(htim);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
-  HAL_TIM_OC_MspDeInit(htim);
-
-  /* Change TIM state */
-  htim->State = HAL_TIM_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM Output Compare MSP.
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_OC_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes TIM Output Compare MSP.
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_OC_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Starts the TIM Output Compare signal generation.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channel to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  /* Enable the Output compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-  
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Output Compare signal generation.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channel to be disabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-  
-  /* Disable the Output compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-  
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Output Compare signal generation in interrupt mode.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channel to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Enable the TIM Capture/Compare 1 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Enable the TIM Capture/Compare 2 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Enable the TIM Capture/Compare 3 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Enable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Enable the Output compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Output Compare signal generation in interrupt mode.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channel to be disabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Disable the TIM Capture/Compare 1 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Disable the TIM Capture/Compare 2 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Disable the TIM Capture/Compare 3 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Disable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Disable the Output compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Output Compare signal generation in DMA mode.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channel to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @param  pData: The source Buffer address.
-  * @param  Length: The length of data to be transferred from memory to TIM peripheral
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if(((uint32_t)pData == 0U ) && (Length > 0U))
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
-
-      /* Enable the TIM Capture/Compare 1 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
-
-      /* Enable the TIM Capture/Compare 2 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
-
-      /* Enable the TIM Capture/Compare 3 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-     /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
-
-      /* Enable the TIM Capture/Compare 4 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Enable the Output compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Output Compare signal generation in DMA mode.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channel to be disabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Disable the TIM Capture/Compare 1 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Disable the TIM Capture/Compare 2 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Disable the TIM Capture/Compare 3 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Disable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Disable the Output compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup TIM_Exported_Functions_Group3
- *  @brief    Time PWM functions
- *
-@verbatim
-  ==============================================================================
-                          ##### Timer PWM functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to:
-    (+) Initialize and configure the TIM OPWM.
-    (+) De-initialize the TIM PWM.
-    (+) Start the Timer PWM.
-    (+) Stop the Timer PWM.
-    (+) Start the Timer PWM and enable interrupt.
-    (+) Stop the Timer PWM and disable interrupt.
-    (+) Start the Timer PWM and enable DMA transfer.
-    (+) Stop the Timer PWM and disable DMA transfer.
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Initializes the TIM PWM Time Base according to the specified
-  *         parameters in the TIM_HandleTypeDef and create the associated handle.
-  * @param  htim : TIM handle
-  * @retval HAL status
-  */
-
-
-HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
-{
-  /* Check the TIM handle allocation */
-  if(htim == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
-  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
-  assert_param(IS_TIM_PERIOD(htim->Init.Period));
-  assert_param(IS_TIM_PRESCALER(htim->Init.Prescaler));
-
-  if(htim->State == HAL_TIM_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    htim->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
-    HAL_TIM_PWM_MspInit(htim);
-  }
-
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-
-  /* Init the base time for the PWM */
-  TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
-  /* Initialize the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the TIM peripheral
-  * @param  htim : TIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Disable the TIM Peripheral Clock */
-  __HAL_TIM_DISABLE(htim);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
-  HAL_TIM_PWM_MspDeInit(htim);
-
-  /* Change TIM state */
-  htim->State = HAL_TIM_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM PWM MSP.
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_PWM_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes TIM PWM MSP.
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_PWM_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Starts the PWM signal generation.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channels to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  /* Enable the Capture compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the PWM signal generation.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channels to be disabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  /* Disable the Capture compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the PWM signal generation in interrupt mode.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channel to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Enable the TIM Capture/Compare 1 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Enable the TIM Capture/Compare 2 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Enable the TIM Capture/Compare 3 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Enable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Enable the Capture compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the PWM signal generation in interrupt mode.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channels to be disabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Disable the TIM Capture/Compare 1 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Disable the TIM Capture/Compare 2 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Disable the TIM Capture/Compare 3 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Disable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Disable the Capture compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM PWM signal generation in DMA mode.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channels to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @param  pData: The source Buffer address. This buffer contains the values
-  *                which will be loaded inside the capture/compare registers.
-  * @param  Length: The length of data to be transferred from memory to TIM peripheral
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if(((uint32_t)pData == 0U ) && (Length > 0U))
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
-
-      /* Enable the TIM Capture/Compare 1 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
-
-      /* Enable the TIM Capture/Compare 2 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
-
-      /* Enable the TIM Output Capture/Compare 3 request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-     /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
-
-      /* Enable the TIM Capture/Compare 4 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Enable the Capture compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM PWM signal generation in DMA mode.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channels to be disabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Disable the TIM Capture/Compare 1 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Disable the TIM Capture/Compare 2 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Disable the TIM Capture/Compare 3 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Disable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Disable the Capture compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup TIM_Exported_Functions_Group4
- *  @brief    Time Input Capture functions
- *
-@verbatim
-  ==============================================================================
-              ##### Timer Input Capture functions #####
-  ==============================================================================
- [..]
-   This section provides functions allowing to:
-   (+) Initialize and configure the TIM Input Capture.
-   (+) De-initialize the TIM Input Capture.
-   (+) Start the Timer Input Capture.
-   (+) Stop the Timer Input Capture.
-   (+) Start the Timer Input Capture and enable interrupt.
-   (+) Stop the Timer Input Capture and disable interrupt.
-   (+) Start the Timer Input Capture and enable DMA transfer.
-   (+) Stop the Timer Input Capture and disable DMA transfer.
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Initializes the TIM Input Capture Time base according to the specified
-  *         parameters in the TIM_HandleTypeDef and create the associated handle.
-  * @param  htim: TIM Input Capture handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim)
-{
-  /* Check the TIM handle allocation */
-  if(htim == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
-  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
-  assert_param(IS_TIM_PERIOD(htim->Init.Period));
-  assert_param(IS_TIM_PRESCALER(htim->Init.Prescaler));
-
-  if(htim->State == HAL_TIM_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    htim->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
-    HAL_TIM_IC_MspInit(htim);
-  }
-
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-
-  /* Init the base time for the input capture */
-  TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
-  /* Initialize the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the TIM peripheral
-  * @param  htim: TIM Input Capture handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Disable the TIM Peripheral Clock */
-  __HAL_TIM_DISABLE(htim);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
-  HAL_TIM_IC_MspDeInit(htim);
-
-  /* Change TIM state */
-  htim->State = HAL_TIM_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM INput Capture MSP.
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_IC_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes TIM Input Capture MSP.
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_IC_MspDeInit could be implemented in the user file
-   */
-}
-/**
-  * @brief  Starts the TIM Input Capture measurement.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channels to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_IC_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  /* Enable the Input Capture channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Input Capture measurement.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channels to be disabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  /* Disable the Input Capture channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Input Capture measurement in interrupt mode.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channels to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_IC_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Enable the TIM Capture/Compare 1 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Enable the TIM Capture/Compare 2 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Enable the TIM Capture/Compare 3 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Enable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-  /* Enable the Input Capture channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Input Capture measurement in interrupt mode.
-  * @param  htim : TIM handle
-  * @param  Channel : TIM Channels to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Disable the TIM Capture/Compare 1 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Disable the TIM Capture/Compare 2 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Disable the TIM Capture/Compare 3 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Disable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Disable the Input Capture channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Input Capture measurement on in DMA mode.
-  * @param  htim : TIM handle
-  * @param  Channel : TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @param  pData: The destination Buffer address.
-  * @param  Length: The length of data to be transferred from TIM peripheral to memory.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-  assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
-
-  if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if((pData == 0U ) && (Length > 0U))
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
-
-      /* Enable the TIM Capture/Compare 1 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData, Length);
-
-      /* Enable the TIM Capture/Compare 2  DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)pData, Length);
-
-      /* Enable the TIM Capture/Compare 3  DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)pData, Length);
-
-      /* Enable the TIM Capture/Compare 4  DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Enable the Input Capture channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Input Capture measurement on in DMA mode.
-  * @param  htim : TIM handle
-  * @param  Channel : TIM Channels to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-  assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Disable the TIM Capture/Compare 1 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Disable the TIM Capture/Compare 2 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Disable the TIM Capture/Compare 3  DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Disable the TIM Capture/Compare 4  DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Disable the Input Capture channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup TIM_Exported_Functions_Group5
- *  @brief    Time One Pulse functions
- *
-@verbatim
-  ==============================================================================
-                        ##### Timer One Pulse functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to:
-    (+) Initialize and configure the TIM One Pulse.
-    (+) De-initialize the TIM One Pulse.
-    (+) Start the Timer One Pulse.
-    (+) Stop the Timer One Pulse.
-    (+) Start the Timer One Pulse and enable interrupt.
-    (+) Stop the Timer One Pulse and disable interrupt.
-    (+) Start the Timer One Pulse and enable DMA transfer.
-    (+) Stop the Timer One Pulse and disable DMA transfer.
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Initializes the TIM One Pulse Time Base according to the specified
-  *         parameters in the TIM_HandleTypeDef and create the associated handle.
-  * @param  htim: TIM OnePulse handle
-  * @param  OnePulseMode: Select the One pulse mode.
-  *         This parameter can be one of the following values:
-  *            @arg TIM_OPMODE_SINGLE: Only one pulse will be generated.
-  *            @arg TIM_OPMODE_REPETITIVE: Repetitive pulses will be generated.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode)
-{
-  /* Check the TIM handle allocation */
-  if(htim == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
-  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
-  assert_param(IS_TIM_OPM_MODE(OnePulseMode));
-  assert_param(IS_TIM_PERIOD(htim->Init.Period));
-  assert_param(IS_TIM_PRESCALER(htim->Init.Prescaler));
-
-  if(htim->State == HAL_TIM_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    htim->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
-    HAL_TIM_OnePulse_MspInit(htim);
-  }
-
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-
-  /* Configure the Time base in the One Pulse Mode */
-  TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
-  /* Reset the OPM Bit */
-  htim->Instance->CR1 &= ~TIM_CR1_OPM;
-
-  /* Configure the OPM Mode */
-  htim->Instance->CR1 |= OnePulseMode;
-
-  /* Initialize the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the TIM One Pulse
-  * @param  htim: TIM One Pulse handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Disable the TIM Peripheral Clock */
-  __HAL_TIM_DISABLE(htim);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
-  HAL_TIM_OnePulse_MspDeInit(htim);
-
-  /* Change TIM state */
-  htim->State = HAL_TIM_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM One Pulse MSP.
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_OnePulse_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes TIM One Pulse MSP.
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_OnePulse_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Starts the TIM One Pulse signal generation.
-  * @param  htim : TIM handle
-  * @param  OutputChannel : TIM Channels to be enabled.
-  *          This parameter is not used since both channels TIM_CHANNEL_1 and
-  *          TIM_CHANNEL_2 are automatically selected.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
-  /* Enable the Capture compare and the Input Capture channels
-    (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
-    if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
-    if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
-    in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together
-
-    No need to enable the counter, it's enabled automatically by hardware
-    (the counter starts in response to a stimulus and generate a pulse */
-
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM One Pulse signal generation.
-  * @param  htim : TIM handle
-  * @param  OutputChannel : TIM Channels to be disable.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
-  /* Disable the Capture compare and the Input Capture channels
-  (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
-  if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
-  if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
-  in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
-
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM One Pulse signal generation in interrupt mode.
-  * @param  htim : TIM handle
-  * @param  OutputChannel: TIM Channels to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
-  /* Enable the Capture compare and the Input Capture channels
-    (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
-    if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
-    if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
-    in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together
-
-    No need to enable the counter, it's enabled automatically by hardware
-    (the counter starts in response to a stimulus and generate a pulse */
-
-  /* Enable the TIM Capture/Compare 1 interrupt */
-  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-
-  /* Enable the TIM Capture/Compare 2 interrupt */
-  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
-
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM One Pulse signal generation in interrupt mode.
-  * @param  htim : TIM handle
-  * @param  OutputChannel: TIM Channels to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
-  /* Disable the TIM Capture/Compare 1 interrupt */
-  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-
-  /* Disable the TIM Capture/Compare 2 interrupt */
-  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-
-  /* Disable the Capture compare and the Input Capture channels
-  (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
-  if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
-  if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
-  in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-
-  /* Disable the Peripheral */
-   __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup TIM_Exported_Functions_Group6
- *  @brief    Time Encoder functions
- *
-@verbatim
-  ==============================================================================
-                          ##### Timer Encoder functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to:
-    (+) Initialize and configure the TIM Encoder.
-    (+) De-initialize the TIM Encoder.
-    (+) Start the Timer Encoder.
-    (+) Stop the Timer Encoder.
-    (+) Start the Timer Encoder and enable interrupt.
-    (+) Stop the Timer Encoder and disable interrupt.
-    (+) Start the Timer Encoder and enable DMA transfer.
-    (+) Stop the Timer Encoder and disable DMA transfer.
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Initializes the TIM Encoder Interface and create the associated handle.
-  * @param  htim: TIM Encoder Interface handle
-  * @param  sConfig: TIM Encoder Interface configuration structure
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim,  TIM_Encoder_InitTypeDef* sConfig)
-{
-  uint32_t tmpsmcr = 0U;
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-
-  /* Check the TIM handle allocation */
-  if(htim == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode));
-  assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection));
-  assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection));
-  assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
-  assert_param(IS_TIM_IC_POLARITY(sConfig->IC2Polarity));
-  assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
-  assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler));
-  assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
-  assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter));
-  assert_param(IS_TIM_PERIOD(htim->Init.Period));
-  assert_param(IS_TIM_PRESCALER(htim->Init.Prescaler));
-
-  if(htim->State == HAL_TIM_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    htim->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
-    HAL_TIM_Encoder_MspInit(htim);
-  }
-
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-
-  /* Reset the SMS bits */
-  htim->Instance->SMCR &= ~TIM_SMCR_SMS;
-
-  /* Configure the Time base in the Encoder Mode */
-  TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
-  /* Get the TIMx SMCR register value */
-  tmpsmcr = htim->Instance->SMCR;
-
-  /* Get the TIMx CCMR1 register value */
-  tmpccmr1 = htim->Instance->CCMR1;
-
-  /* Get the TIMx CCER register value */
-  tmpccer = htim->Instance->CCER;
-
-  /* Set the encoder Mode */
-  tmpsmcr |= sConfig->EncoderMode;
-
-  /* Select the Capture Compare 1 and the Capture Compare 2 as input */
-  tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S);
-  tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U));
-
-  /* Set the the Capture Compare 1 and the Capture Compare 2 prescalers and filters */
-  tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC);
-  tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F);
-  tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U);
-  tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U);
-
-  /* Set the TI1 and the TI2 Polarities */
-  tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P);
-  tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP);
-  tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U);
-
-  /* Write to TIMx SMCR */
-  htim->Instance->SMCR = tmpsmcr;
-
-  /* Write to TIMx CCMR1 */
-  htim->Instance->CCMR1 = tmpccmr1;
-
-  /* Write to TIMx CCER */
-  htim->Instance->CCER = tmpccer;
-
-  /* Initialize the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the TIM Encoder interface
-  * @param  htim: TIM Encoder handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Disable the TIM Peripheral Clock */
-  __HAL_TIM_DISABLE(htim);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
-  HAL_TIM_Encoder_MspDeInit(htim);
-
-  /* Change TIM state */
-  htim->State = HAL_TIM_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  Initializes the TIM Encoder Interface MSP.
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_Encoder_MspInit could be implemented in the user file
-   */
-}
-
-
-/**
-  * @brief  DeInitializes TIM Encoder Interface MSP.
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_Encoder_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Starts the TIM Encoder Interface.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channels to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-  
-  /* Enable the encoder interface channels */
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-      break; 
-    }
-    case TIM_CHANNEL_2:
-    { 
-      TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); 
-      break;
-    }  
-    default :
-    {
-     TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-     TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-     break; 
-    }
-  }  
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Encoder Interface.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channels to be disabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-    assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-    
-   /* Disable the Input Capture channels 1 and 2
-    (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */ 
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-      break; 
-    }
-    case TIM_CHANNEL_2:
-    { 
-      TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); 
-      break;
-    }  
-    default :
-    {
-     TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-     TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-     break; 
-    }
-  }  
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Encoder Interface in interrupt mode.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channels to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-  
-  /* Enable the encoder interface channels */
-  /* Enable the capture compare Interrupts 1 and/or 2 */
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-      break; 
-    }
-    case TIM_CHANNEL_2:
-    { 
-      TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); 
-      break;
-    }  
-    default :
-    {
-     TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-     TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-     __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-     __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
-     break; 
-    }
-  }
-  
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Encoder Interface in interrupt mode.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channels to be disabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-    
-  /* Disable the Input Capture channels 1 and 2
-    (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */ 
-  if(Channel == TIM_CHANNEL_1)
-  {
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); 
-    
-    /* Disable the capture compare Interrupts 1 */
-  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-  }  
-  else if(Channel == TIM_CHANNEL_2)
-  {  
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); 
-    
-    /* Disable the capture compare Interrupts 2 */
-  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-  }  
-  else
-  {
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); 
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); 
-    
-    /* Disable the capture compare Interrupts 1 and 2 */
-    __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-    __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-  }
-    
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-  
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Encoder Interface in DMA mode.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channels to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_ALL : TIM Channel 1 and 2 selected
-  * @param  pData1: The destination Buffer address for IC1.
-  * @param  pData2: The destination Buffer address for IC2.
-  * @param  Length: The length of data to be transferred from TIM peripheral to memory.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1, uint32_t *pData2, uint16_t Length)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
-  
-  if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if((((pData1 == 0U) || (pData2 == 0U) )) && (Length > 0U)) 
-    {
-      return HAL_ERROR;                                    
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }  
-   
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
-     
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-      
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t )pData1, Length); 
-      
-      /* Enable the TIM Input Capture DMA request */      
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
-            
-      /* Enable the Peripheral */
-      __HAL_TIM_ENABLE(htim);
-      
-      /* Enable the Capture compare channel */
-      TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-    }
-    break;
-    
-    case TIM_CHANNEL_2:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt;
-     
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError;
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length);
-      
-      /* Enable the TIM Input Capture  DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
-     
-      /* Enable the Peripheral */
-      __HAL_TIM_ENABLE(htim);
-      
-      /* Enable the Capture compare channel */
-      TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-    }
-    break;
-    
-    case TIM_CHANNEL_ALL:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
-     
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-      
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1, Length);
-      
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt;
-     
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-      
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length);
-          
-     /* Enable the Peripheral */
-      __HAL_TIM_ENABLE(htim);
-      
-      /* Enable the Capture compare channel */
-      TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-      TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-      
-      /* Enable the TIM Input Capture  DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
-      /* Enable the TIM Input Capture  DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-    
-    default:
-    break;
-  }  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Encoder Interface in DMA mode.
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channels to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
-  
-  /* Disable the Input Capture channels 1 and 2
-    (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */ 
-  if(Channel == TIM_CHANNEL_1)
-  {
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); 
-    
-    /* Disable the capture compare DMA Request 1 */
-    __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
-  }  
-  else if(Channel == TIM_CHANNEL_2)
-  {  
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); 
-    
-    /* Disable the capture compare DMA Request 2 */
-    __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
-  }  
-  else
-  {
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); 
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); 
-    
-    /* Disable the capture compare DMA Request 1 and 2 */
-    __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
-    __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
-  }
-  
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-  
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup TIM_Exported_Functions_Group7
- *  @brief    IRQ handler management
- *
-@verbatim
-  ==============================================================================
-                        ##### IRQ handler management #####
-  ==============================================================================
-  [..]
-    This section provides Timer IRQ handler function.
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  This function handles TIM interrupts requests.
-  * @param  htim: TIM  handle
-  * @retval None
-  */
-void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
-{
-  /* Capture compare 1 event */
-  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
-  {
-    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET)
-    {
-      {
-        __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
-        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
-
-        /* Input capture event */
-        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
-        {
-          HAL_TIM_IC_CaptureCallback(htim);
-        }
-        /* Output compare event */
-        else
-        {
-          HAL_TIM_OC_DelayElapsedCallback(htim);
-          HAL_TIM_PWM_PulseFinishedCallback(htim);
-        }
-        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-      }
-    }
-  }
-  /* Capture compare 2 event */
-  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
-  {
-    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET)
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
-      /* Input capture event */
-      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
-      {
-        HAL_TIM_IC_CaptureCallback(htim);
-      }
-      /* Output compare event */
-      else
-      {
-        HAL_TIM_OC_DelayElapsedCallback(htim);
-        HAL_TIM_PWM_PulseFinishedCallback(htim);
-      }
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-    }
-  }
-  /* Capture compare 3 event */
-  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
-  {
-    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET)
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
-      /* Input capture event */
-      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
-      {
-        HAL_TIM_IC_CaptureCallback(htim);
-      }
-      /* Output compare event */
-      else
-      {
-        HAL_TIM_OC_DelayElapsedCallback(htim);
-        HAL_TIM_PWM_PulseFinishedCallback(htim);
-      }
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-    }
-  }
-  /* Capture compare 4 event */
-  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
-  {
-    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET)
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
-      /* Input capture event */
-      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
-      {
-        HAL_TIM_IC_CaptureCallback(htim);
-      }
-      /* Output compare event */
-      else
-      {
-        HAL_TIM_OC_DelayElapsedCallback(htim);
-        HAL_TIM_PWM_PulseFinishedCallback(htim);
-      }
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-    }
-  }
-  /* TIM Update event */
-  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
-  {
-    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET)
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
-      HAL_TIM_PeriodElapsedCallback(htim);
-    }
-  }
-  /* TIM Trigger detection event */
-  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
-  {
-    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET)
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
-      HAL_TIM_TriggerCallback(htim);
-    }
-  }
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup TIM_Exported_Functions_Group8
- *  @brief    Peripheral Control functions
- *
-@verbatim
-  ==============================================================================
-             ##### Peripheral Control functions #####
-  ==============================================================================
- [..]
-   This section provides functions allowing to:
-      (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode.
-      (+) Configure External Clock source.
-      (+) Configure Master and the Slave synchronization.
-      (+) Configure the DMA Burst Mode.
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Initializes the TIM Output Compare Channels according to the specified
-  *         parameters in the TIM_OC_InitTypeDef.
-  * @param  htim : TIM handle
-  * @param  sConfig: TIM Output Compare configuration structure
-  * @param  Channel: TIM Channel to be configure.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel)
-{
-  /* Check the parameters */ 
-  assert_param(IS_TIM_CHANNELS(Channel)); 
-  assert_param(IS_TIM_OC_MODE(sConfig->OCMode));
-  assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
-  
-  /* Process lock */
-  __HAL_LOCK(htim);
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-      /* Configure the TIM Channel 1 in Output Compare */
-      TIM_OC1_SetConfig(htim->Instance, sConfig);
-    }
-    break;
-    
-    case TIM_CHANNEL_2:
-    {
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-      /* Configure the TIM Channel 2 in Output Compare */
-      TIM_OC2_SetConfig(htim->Instance, sConfig);
-    }
-    break;
-    
-    case TIM_CHANNEL_3:
-    {
-       assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
-      /* Configure the TIM Channel 3 in Output Compare */
-      TIM_OC3_SetConfig(htim->Instance, sConfig);
-    }
-    break;
-    
-    case TIM_CHANNEL_4:
-    {
-      assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
-      /* Configure the TIM Channel 4 in Output Compare */
-      TIM_OC4_SetConfig(htim->Instance, sConfig);
-    }
-    break;
-    
-    default:
-    break;    
-  }
-  htim->State = HAL_TIM_STATE_READY;
-  
-  __HAL_UNLOCK(htim);
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM Input Capture Channels according to the specified
-  *         parameters in the TIM_IC_InitTypeDef.
-  * @param  htim : TIM handle
-  * @param  sConfig: TIM Input Capture configuration structure
-  * @param  Channel: TIM Channels to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef* sConfig, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity));
-  assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection));
-  assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler));
-  assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter));
-
-  __HAL_LOCK(htim);
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  if (Channel == TIM_CHANNEL_1)
-  {
-    /* TI1 Configuration */
-    TIM_TI1_SetConfig(htim->Instance,
-               sConfig->ICPolarity,
-               sConfig->ICSelection,
-               sConfig->ICFilter);
-
-    /* Reset the IC1PSC Bits */
-    htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
-
-    /* Set the IC1PSC value */
-    htim->Instance->CCMR1 |= sConfig->ICPrescaler;
-  }
-  else if (Channel == TIM_CHANNEL_2)
-  {
-    /* TI2 Configuration */
-    assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-    
-    TIM_TI2_SetConfig(htim->Instance,
-                      sConfig->ICPolarity,
-                      sConfig->ICSelection,
-                      sConfig->ICFilter);
-               
-    /* Reset the IC2PSC Bits */
-    htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
-
-    /* Set the IC2PSC value */
-    htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8U);
-  }
-  else if (Channel == TIM_CHANNEL_3)
-  {
-    /* TI3 Configuration */
-    assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
-
-    TIM_TI3_SetConfig(htim->Instance,
-               sConfig->ICPolarity,
-               sConfig->ICSelection,
-               sConfig->ICFilter);
-               
-    /* Reset the IC3PSC Bits */
-    htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC;
-
-    /* Set the IC3PSC value */
-    htim->Instance->CCMR2 |= sConfig->ICPrescaler;
-  }
-  else
-  {
-    /* TI4 Configuration */
-    assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
-
-    TIM_TI4_SetConfig(htim->Instance,
-               sConfig->ICPolarity,
-               sConfig->ICSelection,
-               sConfig->ICFilter);
-
-    /* Reset the IC4PSC Bits */
-    htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC;
-
-    /* Set the IC4PSC value */
-    htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8U);
-  }
-
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM PWM  channels according to the specified
-  *         parameters in the TIM_OC_InitTypeDef.
-  * @param  htim : TIM handle
-  * @param  sConfig: TIM PWM configuration structure
-  * @param  Channel: TIM Channel to be configured.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel)
-{
-  __HAL_LOCK(htim);
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CHANNELS(Channel));
-  assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
-  assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
-  assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
-  
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-      /* Configure the Channel 1 in PWM mode */
-      TIM_OC1_SetConfig(htim->Instance, sConfig);
-
-      /* Set the Preload enable bit for channel1 */
-      htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
-
-      /* Configure the Output Fast mode */
-      htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
-      htim->Instance->CCMR1 |= sConfig->OCFastMode;
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-      /* Configure the Channel 2 in PWM mode */
-      TIM_OC2_SetConfig(htim->Instance, sConfig);
-
-      /* Set the Preload enable bit for channel2 */
-      htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
-
-      /* Configure the Output Fast mode */
-      htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
-      htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
-      /* Configure the Channel 3 in PWM mode */
-      TIM_OC3_SetConfig(htim->Instance, sConfig);
-
-      /* Set the Preload enable bit for channel3 */
-      htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
-
-     /* Configure the Output Fast mode */
-      htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
-      htim->Instance->CCMR2 |= sConfig->OCFastMode;
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
-      /* Configure the Channel 4 in PWM mode */
-      TIM_OC4_SetConfig(htim->Instance, sConfig);
-
-      /* Set the Preload enable bit for channel4 */
-      htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
-
-     /* Configure the Output Fast mode */
-      htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
-      htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
-    }
-    break;
-
-    default:
-    break;
-  }
-  
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM One Pulse Channels according to the specified
-  *         parameters in the TIM_OnePulse_InitTypeDef.
-  * @param  htim : TIM handle
-  * @param  sConfig: TIM One Pulse configuration structure
-  * @param  OutputChannel: TIM Channels to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  * @param  InputChannel: TIM Channels to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim,  TIM_OnePulse_InitTypeDef* sConfig, uint32_t OutputChannel,  uint32_t InputChannel)
-{
-  TIM_OC_InitTypeDef temp1;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_OPM_CHANNELS(OutputChannel));
-  assert_param(IS_TIM_OPM_CHANNELS(InputChannel));
-
-  if(OutputChannel != InputChannel)
-  {
-    __HAL_LOCK(htim);
-  
-    htim->State = HAL_TIM_STATE_BUSY;
-
-    /* Extract the Ouput compare configuration from sConfig structure */
-    temp1.OCMode = sConfig->OCMode;
-    temp1.Pulse = sConfig->Pulse;
-    temp1.OCPolarity = sConfig->OCPolarity;
-
-    switch (OutputChannel)
-    {
-      case TIM_CHANNEL_1:
-      {
-        assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-
-        TIM_OC1_SetConfig(htim->Instance, &temp1);
-      }
-      break;
-      case TIM_CHANNEL_2:
-      {
-        assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
-        TIM_OC2_SetConfig(htim->Instance, &temp1);
-      }
-      break;
-      default:
-      break;
-    }
-    switch (InputChannel)
-    {
-      case TIM_CHANNEL_1:
-      {
-        assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-      
-        TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity,
-                        sConfig->ICSelection, sConfig->ICFilter);
-
-        /* Reset the IC1PSC Bits */
-        htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
-
-        /* Select the Trigger source */
-        htim->Instance->SMCR &= ~TIM_SMCR_TS;
-        htim->Instance->SMCR |= TIM_TS_TI1FP1;
-
-        /* Select the Slave Mode */
-        htim->Instance->SMCR &= ~TIM_SMCR_SMS;
-        htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
-      }
-      break;
-      case TIM_CHANNEL_2:
-      {
-        assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
-        TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity,
-                 sConfig->ICSelection, sConfig->ICFilter);
-
-        /* Reset the IC2PSC Bits */
-        htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
-
-        /* Select the Trigger source */
-        htim->Instance->SMCR &= ~TIM_SMCR_TS;
-        htim->Instance->SMCR |= TIM_TS_TI2FP2;
-
-        /* Select the Slave Mode */
-        htim->Instance->SMCR &= ~TIM_SMCR_SMS;
-        htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
-      }
-      break;
-
-      default:
-      break;
-    }
-
-    htim->State = HAL_TIM_STATE_READY;
-
-    __HAL_UNLOCK(htim);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Configure the DMA Burst to transfer Data from the memory to the TIM peripheral
-  * @param  htim : TIM handle
-  * @param  BurstBaseAddress: TIM Base address from when the DMA will starts the Data write.
-  *         This parameters can be on of the following values:
-  *            @arg TIM_DMABASE_CR1  
-  *            @arg TIM_DMABASE_CR2
-  *            @arg TIM_DMABASE_SMCR
-  *            @arg TIM_DMABASE_DIER
-  *            @arg TIM_DMABASE_SR
-  *            @arg TIM_DMABASE_EGR
-  *            @arg TIM_DMABASE_CCMR1
-  *            @arg TIM_DMABASE_CCMR2  
-  *            @arg TIM_DMABASE_CCER
-  *            @arg TIM_DMABASE_CNT   
-  *            @arg TIM_DMABASE_PSC  
-  *            @arg TIM_DMABASE_ARR
-  *            @arg TIM_DMABASE_CCR1
-  *            @arg TIM_DMABASE_CCR2
-  *            @arg TIM_DMABASE_CCR3 
-  *            @arg TIM_DMABASE_CCR4
-  *            @arg TIM_DMABASE_DCR
-  * @param  BurstRequestSrc: TIM DMA Request sources.
-  *         This parameters can be on of the following values:
-  *            @arg TIM_DMA_UPDATE: TIM update Interrupt source
-  *            @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
-  *            @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
-  *            @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
-  *            @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
-  *            @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
-  * @param  BurstBuffer: The Buffer address.
-  * @param  BurstLength: DMA Burst length. This parameter can be one value
-  *         between TIM_DMABURSTLENGTH_1TRANSFER   and TIM_DMABURSTLENGTH_18TRANSFERS  .
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
-                                              uint32_t* BurstBuffer, uint32_t  BurstLength)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
-  assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
-  assert_param(IS_TIM_DMA_LENGTH(BurstLength));
-  
-  if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if((BurstBuffer == 0U ) && (BurstLength > 0U)) 
-    {
-      return HAL_ERROR;                                    
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }
-  switch(BurstRequestSrc)
-  {
-    case TIM_DMA_UPDATE:
-    {  
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
-     
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ;
-  
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
-    }
-    break;
-    case TIM_DMA_CC1:
-    {  
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
-     
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-  
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8U) + 1U);
-    }
-    break;
-    case TIM_DMA_CC2:
-    {  
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
-     
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-  
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8U) + 1U);
-    }
-    break;
-    case TIM_DMA_CC3:
-    {  
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
-     
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-  
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8U) + 1U);
-    }
-    break;
-    case TIM_DMA_CC4:
-    {  
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
-     
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-  
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8U) + 1U);
-    }
-    break;
-    case TIM_DMA_TRIGGER:
-    {  
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
-     
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ;
-  
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8U) + 1U);
-    }
-    break;
-    default:
-    break;  
-  }
-   /* configure the DMA Burst Mode */
-   htim->Instance->DCR = BurstBaseAddress | BurstLength;
-
-   /* Enable the TIM DMA Request */
-   __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
-
-   htim->State = HAL_TIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM DMA Burst mode
-  * @param  htim : TIM handle
-  * @param  BurstRequestSrc: TIM DMA Request sources to disable
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
-  
-  /* Abort the DMA transfer (at least disable the DMA channel) */
-  switch(BurstRequestSrc)
-  {
-    case TIM_DMA_UPDATE:
-    {  
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]); 
-    }
-    break;
-    case TIM_DMA_CC1:
-    {  
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]);     
-    }
-    break;
-    case TIM_DMA_CC2:
-    {  
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]);     
-    }
-    break;
-    case TIM_DMA_CC3:
-    {  
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]);     
-    }
-    break;
-    case TIM_DMA_CC4:
-    {  
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]);     
-    }
-    break;
-    case TIM_DMA_TRIGGER:
-    {  
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]);     
-    }
-    break;
-    default:
-    break;  
-  }
-  /* Disable the TIM Update DMA request */
-  __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
-      
-  /* Return function status */
-  return HAL_OK;  
-}
-
-/**
-  * @brief  Configure the DMA Burst to transfer Data from the TIM peripheral to the memory
-  * @param  htim : TIM handle
-  * @param  BurstBaseAddress: TIM Base address from when the DMA will starts the Data read.
-  *         This parameters can be on of the following values:
-  *            @arg TIM_DMABASE_CR1
-  *            @arg TIM_DMABASE_CR2
-  *            @arg TIM_DMABASE_SMCR
-  *            @arg TIM_DMABASE_DIER
-  *            @arg TIM_DMABASE_SR
-  *            @arg TIM_DMABASE_EGR
-  *            @arg TIM_DMABASE_CCMR1
-  *            @arg TIM_DMABASE_CCMR2  
-  *            @arg TIM_DMABASE_CCER
-  *            @arg TIM_DMABASE_CNT
-  *            @arg TIM_DMABASE_PSC
-  *            @arg TIM_DMABASE_ARR
-  *            @arg TIM_DMABASE_CCR1
-  *            @arg TIM_DMABASE_CCR2
-  *            @arg TIM_DMABASE_CCR3
-  *            @arg TIM_DMABASE_CCR4
-  *            @arg TIM_DMABASE_DCR
-  * @param  BurstRequestSrc: TIM DMA Request sources.
-  *         This parameters can be on of the following values:
-  *            @arg TIM_DMA_UPDATE: TIM update Interrupt source
-  *            @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
-  *            @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
-  *            @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
-  *            @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
-  *            @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
-  * @param  BurstBuffer: The Buffer address.
-  * @param  BurstLength: DMA Burst length. This parameter can be one value
-  *         between TIM_DMABURSTLENGTH_1TRANSFER   and TIM_DMABURSTLENGTH_18TRANSFERS  .
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
-                                             uint32_t  *BurstBuffer, uint32_t  BurstLength)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
-  assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
-  assert_param(IS_TIM_DMA_LENGTH(BurstLength));
-  
-  if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if((BurstBuffer == 0U ) && (BurstLength > 0U))
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }
-  switch(BurstRequestSrc)
-  {
-    case TIM_DMA_UPDATE:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ;
-  
-      /* Enable the DMA Stream */
-       HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8U) + 1U);
-    }
-    break;
-    case TIM_DMA_CC1:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-  
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8U) + 1U);
-    }
-    break;
-    case TIM_DMA_CC2:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-  
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8U) + 1U);
-    }
-    break;
-    case TIM_DMA_CC3:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-  
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8U) + 1U);
-    }
-    break;
-    case TIM_DMA_CC4:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8U) + 1U);
-    }
-    break;
-    case TIM_DMA_TRIGGER:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA Stream */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8U) + 1U);
-    }
-    break;
-    default:
-    break;
-  }
-
-  /* configure the DMA Burst Mode */
-  htim->Instance->DCR = BurstBaseAddress | BurstLength;
-
-  /* Enable the TIM DMA Request */
-  __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
-
-  htim->State = HAL_TIM_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stop the DMA burst reading
-  * @param  htim : TIM handle
-  * @param  BurstRequestSrc: TIM DMA Request sources to disable.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
-  
-  /* Abort the DMA transfer (at least disable the DMA channel) */
-  switch(BurstRequestSrc)
-  {
-    case TIM_DMA_UPDATE:
-    {  
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]); 
-    }
-    break;
-    case TIM_DMA_CC1:
-    {  
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]);     
-    }
-    break;
-    case TIM_DMA_CC2:
-    {  
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]);     
-    }
-    break;
-    case TIM_DMA_CC3:
-    {  
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]);     
-    }
-    break;
-    case TIM_DMA_CC4:
-    {  
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]);     
-    }
-    break;
-    case TIM_DMA_TRIGGER:
-    {  
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]);     
-    }
-    break;
-    default:
-    break;  
-  }
-
-  /* Disable the TIM Update DMA request */
-  __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Generate a software event
-  * @param  htim : TIM handle
-  * @param  EventSource: specifies the event source.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_EventSource_Update: Timer update Event source
-  *            @arg TIM_EVENTSOURCE_CC1: Timer Capture Compare 1 Event source
-  *            @arg TIM_EventSource_CC2: Timer Capture Compare 2 Event source
-  *            @arg TIM_EventSource_CC3: Timer Capture Compare 3 Event source
-  *            @arg TIM_EventSource_CC4: Timer Capture Compare 4 Event source
-  *            @arg TIM_EVENTSOURCE_TRIGGER  : Timer Trigger Event source
-  * @note   TIM6 can only generate an update event.
-  * @retval HAL status
-  */
-
-HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_EVENT_SOURCE(EventSource));
-
-  /* Process Locked */
-  __HAL_LOCK(htim);
-
-  /* Change the TIM state */
-  htim->State = HAL_TIM_STATE_BUSY;
-  
-  /* Set the event sources */
-  htim->Instance->EGR = EventSource;
-
-  /* Change the TIM state */
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Configures the OCRef clear feature
-  * @param  htim : TIM handle
-  * @param  sClearInputConfig: pointer to a TIM_ClearInputConfigTypeDef structure that
-  *         contains the OCREF clear feature and parameters for the TIM peripheral.
-  * @param  Channel: specifies the TIM Channel.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef * sClearInputConfig, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_CHANNELS(Channel));
-  assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource));
-  assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity));
-  assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler));
-  assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter));
-
-  /* Process Locked */
-  __HAL_LOCK(htim);
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  if(sClearInputConfig->ClearInputSource == TIM_CLEARINPUTSOURCE_ETR)
-  {
-    TIM_ETR_SetConfig(htim->Instance,
-                      sClearInputConfig->ClearInputPrescaler,
-                      sClearInputConfig->ClearInputPolarity,
-                      sClearInputConfig->ClearInputFilter);
-
-      /* Set the OCREF clear selection bit */
-      htim->Instance->SMCR |= TIM_SMCR_OCCS;
-  }
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      if(sClearInputConfig->ClearInputState != RESET)
-      {
-        /* Enable the Ocref clear feature for Channel 1 */
-        htim->Instance->CCMR1 |= TIM_CCMR1_OC1CE;
-      }
-      else
-      {
-        /* Disable the Ocref clear feature for Channel 1 */
-        htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE;
-      }
-    }    
-    break;
-    case TIM_CHANNEL_2:    
-    { 
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); 
-      if(sClearInputConfig->ClearInputState != RESET)  
-      {
-        /* Enable the Ocref clear feature for Channel 2 */
-        htim->Instance->CCMR1 |= TIM_CCMR1_OC2CE;
-      }
-      else
-      {
-        /* Disable the Ocref clear feature for Channel 2 */
-        htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE;      
-      }
-    } 
-    break;
-    case TIM_CHANNEL_3:   
-    {  
-      assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
-      if(sClearInputConfig->ClearInputState != RESET)  
-      {
-        /* Enable the Ocref clear feature for Channel 3 */
-        htim->Instance->CCMR2 |= TIM_CCMR2_OC3CE;
-      }
-      else
-      {
-        /* Disable the Ocref clear feature for Channel 3 */
-        htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE;      
-      }
-    } 
-    break;
-    case TIM_CHANNEL_4:    
-    {  
-      assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
-      if(sClearInputConfig->ClearInputState != RESET)  
-      {
-        /* Enable the Ocref clear feature for Channel 4 */
-        htim->Instance->CCMR2 |= TIM_CCMR2_OC4CE;
-      }
-      else
-      {
-        /* Disable the Ocref clear feature for Channel 4 */
-        htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE;      
-      }
-    } 
-    break;
-    default:  
-    break;
-  } 
-
-  htim->State = HAL_TIM_STATE_READY;
-  
-  __HAL_UNLOCK(htim);
-  
-  return HAL_OK;  
-}  
-
-/**
-  * @brief   Configures the clock source to be used
-  * @param  htim : TIM handle
-  * @param  sClockSourceConfig: pointer to a TIM_ClockConfigTypeDef structure that
-  *         contains the clock source information for the TIM peripheral. 
-  * @retval HAL status
-  */ 
-HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef * sClockSourceConfig)    
-{
-  uint32_t tmpsmcr = 0U;
-    
-  /* Process Locked */
-  __HAL_LOCK(htim);
-  
-  htim->State = HAL_TIM_STATE_BUSY;
-  
-  /* Check the clock source */
-  assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
-  
-  /* Reset the SMS, TS, ECE, ETPS and ETRF bits */
-  tmpsmcr = htim->Instance->SMCR;
-  tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
-  tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
-  htim->Instance->SMCR = tmpsmcr;
-  
-  switch (sClockSourceConfig->ClockSource)
-  {
-    case TIM_CLOCKSOURCE_INTERNAL:
-    { 
-      assert_param(IS_TIM_INSTANCE(htim->Instance));      
-      /* Disable slave mode to clock the prescaler directly with the internal clock */
-      htim->Instance->SMCR &= ~TIM_SMCR_SMS;
-    }
-    break;
-    
-    case TIM_CLOCKSOURCE_ETRMODE1:
-    {
-      assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
-      assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
-      assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
-      assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
-      /* Configure the ETR Clock source */
-      TIM_ETR_SetConfig(htim->Instance, 
-                        sClockSourceConfig->ClockPrescaler, 
-                        sClockSourceConfig->ClockPolarity, 
-                        sClockSourceConfig->ClockFilter);
-      /* Get the TIMx SMCR register value */
-      tmpsmcr = htim->Instance->SMCR;
-      /* Reset the SMS and TS Bits */
-      tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
-      /* Select the External clock mode1 and the ETRF trigger */
-      tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
-      /* Write to TIMx SMCR */
-      htim->Instance->SMCR = tmpsmcr;
-    }
-    break;
-    
-    case TIM_CLOCKSOURCE_ETRMODE2:
-    {
-      assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
-      assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
-      assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
-      assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
-      /* Configure the ETR Clock source */
-      TIM_ETR_SetConfig(htim->Instance, 
-                        sClockSourceConfig->ClockPrescaler, 
-                        sClockSourceConfig->ClockPolarity,
-                        sClockSourceConfig->ClockFilter);
-      /* Enable the External clock mode2 */
-      htim->Instance->SMCR |= TIM_SMCR_ECE;
-    }
-    break;
-    
-    case TIM_CLOCKSOURCE_TI1:
-    {
-      assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-      assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
-      assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
-      TIM_TI1_ConfigInputStage(htim->Instance, 
-                        sClockSourceConfig->ClockPolarity, 
-                        sClockSourceConfig->ClockFilter);
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
-    }
-    break;
-    case TIM_CLOCKSOURCE_TI2:
-    {
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-      assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
-      assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
-      TIM_TI2_ConfigInputStage(htim->Instance, 
-                        sClockSourceConfig->ClockPolarity, 
-                        sClockSourceConfig->ClockFilter);
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
-    }
-    break;
-    case TIM_CLOCKSOURCE_TI1ED:
-    {
-      assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-      assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
-      assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
-      TIM_TI1_ConfigInputStage(htim->Instance, 
-                        sClockSourceConfig->ClockPolarity,
-                        sClockSourceConfig->ClockFilter);
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
-    }
-    break;
-    case TIM_CLOCKSOURCE_ITR0:
-    {
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR0);
-    }
-    break;
-    case TIM_CLOCKSOURCE_ITR1:
-    {
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR1);
-    }
-    break;
-    case TIM_CLOCKSOURCE_ITR2:
-    {
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR2);
-    }
-    break;
-    case TIM_CLOCKSOURCE_ITR3:
-    {
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR3);
-    }
-    break;
-    
-    default:
-    break;    
-  }
-  htim->State = HAL_TIM_STATE_READY;
-  
-  __HAL_UNLOCK(htim);
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Selects the signal connected to the TI1 input: direct from CH1_input
-  *         or a XOR combination between CH1_input, CH2_input & CH3_input
-  * @param  htim : TIM handle
-  * @param  TI1_Selection: Indicate whether or not channel 1 is connected to the
-  *         output of a XOR gate.
-  *         This parameter can be one of the following values:
-  *            @arg TIM_TI1SELECTION_CH1: The TIMx_CH1 pin is connected to TI1 input
-  *            @arg TIM_TI1SELECTION_XORCOMBINATION: The TIMx_CH1, CH2 and CH3
-  *            pins are connected to the TI1 input (XOR combination)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection)
-{
-  uint32_t tmpcr2 = 0U;
-  
-  /* Check the parameters */
-  assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); 
-  assert_param(IS_TIM_TI1SELECTION(TI1_Selection));
-
-  /* Get the TIMx CR2 register value */
-  tmpcr2 = htim->Instance->CR2;
-
-  /* Reset the TI1 selection */
-  tmpcr2 &= ~TIM_CR2_TI1S;
-
-  /* Set the the TI1 selection */
-  tmpcr2 |= TI1_Selection;
-  
-  /* Write to TIMxCR2 */
-  htim->Instance->CR2 = tmpcr2;
-
-  return HAL_OK;
-}
-                                                
-/**
-  * @brief  Configures the TIM in Slave mode
-  * @param  htim : TIM handle
-  * @param  sSlaveConfig: pointer to a TIM_SlaveConfigTypeDef structure that
-  *         contains the selected trigger (internal trigger input, filtered
-  *         timer input or external trigger input) and the ) and the Slave 
-  *         mode (Disable, Reset, Gated, Trigger, External clock mode 1). 
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
-  assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
-   
-  __HAL_LOCK(htim);
-  
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Configuration in slave mode */
-  TIM_SlaveTimer_SetConfig(htim, sSlaveConfig);
-
-  /* Disable Trigger Interrupt */
-  __HAL_TIM_DISABLE_IT(htim, TIM_IT_TRIGGER);
-  
-  /* Disable Trigger DMA request */
-  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER);
-
-  /* Set the new state */
-  htim->State = HAL_TIM_STATE_READY;
-     
-  __HAL_UNLOCK(htim);  
-  
-  return HAL_OK;
-} 
-
-/**
-  * @brief  Configures the TIM in Slave mode in interrupt mode
-  * @param  htim : TIM handle.
-  * @param  sSlaveConfig: pointer to a TIM_SlaveConfigTypeDef structure that
-  *         contains the selected trigger (internal trigger input, filtered
-  *         timer input or external trigger input) and the ) and the Slave
-  *         mode (Disable, Reset, Gated, Trigger, External clock mode 1).
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef *htim,
-                                                        TIM_SlaveConfigTypeDef * sSlaveConfig)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
-  assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
-
-  __HAL_LOCK(htim);
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  TIM_SlaveTimer_SetConfig(htim, sSlaveConfig);
-
-  /* Enable Trigger Interrupt */
-  __HAL_TIM_ENABLE_IT(htim, TIM_IT_TRIGGER);
-
-  /* Disable Trigger DMA request */
-  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER);
-
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Read the captured value from Capture Compare unit
-  * @param  htim : TIM handle
-  * @param  Channel: TIM Channels to be enabled.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval Captured value
-  */
-uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  uint32_t tmpreg = 0U;
-  
-  __HAL_LOCK(htim);
-  
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-      
-      /* Return the capture 1 value */
-      tmpreg = htim->Instance->CCR1;
-      
-      break;
-    }
-    case TIM_CHANNEL_2:
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-      
-      /* Return the capture 2 value */
-      tmpreg = htim->Instance->CCR2;
-      
-      break;
-    }
-    
-    case TIM_CHANNEL_3:
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
-      
-      /* Return the capture 3 value */
-      tmpreg = htim->Instance->CCR3;
-      
-      break;
-    }
-    
-    case TIM_CHANNEL_4:
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
-      
-      /* Return the capture 4 value */
-      tmpreg = htim->Instance->CCR4;
-      
-      break;
-    }
-    
-    default:
-    break;  
-  }
-     
-  __HAL_UNLOCK(htim);  
-  return tmpreg;
-}
-
-/**
-  * @}
-  */
-  
-/** @addtogroup TIM_Exported_Functions_Group9
- *  @brief    TIM Callbacks functions 
- *
-@verbatim
-  ==============================================================================
-                        ##### TIM Callbacks functions #####
-  ==============================================================================  
- [..]  
-   This section provides TIM callback functions:
-   (+) Timer Period elapsed callback
-   (+) Timer Output Compare callback
-   (+) Timer Input capture callback
-   (+) Timer Trigger callback
-   (+) Timer Error callback
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Period elapsed callback in non blocking mode 
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the __HAL_TIM_PeriodElapsedCallback could be implemented in the user file
-   */
-  
-}
-/**
-  * @brief  Output Compare callback in non blocking mode 
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the __HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
-   */
-}
-/**
-  * @brief  Input Capture callback in non blocking mode 
-  * @param  htim: TIM IC handle
-  * @retval None
-  */
-__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the __HAL_TIM_IC_CaptureCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  PWM Pulse finished callback in non blocking mode 
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the __HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Hall Trigger detection callback in non blocking mode 
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_TriggerCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Timer error callback in non blocking mode 
-  * @param  htim : TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_ErrorCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup TIM_Exported_Functions_Group10
- *  @brief   Peripheral State functions 
- *
-@verbatim   
-  ==============================================================================
-                      ##### Peripheral State functions #####
-  ==============================================================================  
-  [..]
-    This subsection permits to get in run-time the status of the peripheral 
-    and the data flow.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the TIM Base state
-  * @param  htim : TIM handle
-  * @retval HAL state
-  */
-HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim)
-{
-  return htim->State;
-}
-
-/**
-  * @brief  Return the TIM OC state
-  * @param  htim: TIM Ouput Compare handle
-  * @retval HAL state
-  */
-HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim)
-{
-  return htim->State;
-}
-
-/**
-  * @brief  Return the TIM PWM state
-  * @param  htim : TIM handle
-  * @retval HAL state
-  */
-HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim)
-{
-  return htim->State;
-}
-
-/**
-  * @brief  Return the TIM Input Capture state
-  * @param  htim : TIM handle
-  * @retval HAL state
-  */
-HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim)
-{
-  return htim->State;
-}
-
-/**
-  * @brief  Return the TIM One Pulse Mode state
-  * @param  htim: TIM OPM handle
-  * @retval HAL state
-  */
-HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim)
-{
-  return htim->State;
-}
-
-/**
-  * @brief  Return the TIM Encoder Mode state
-  * @param  htim : TIM handle
-  * @retval HAL state
-  */
-HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim)
-{
-  return htim->State;
-}
-
-
-
-/**
-  * @brief  TIM DMA error callback 
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-void TIM_DMAError(DMA_HandleTypeDef *hdma)
-{
-  TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  
-  htim->State= HAL_TIM_STATE_READY;
-   
-  HAL_TIM_ErrorCallback(htim);
-}
-
-/**
-  * @brief  TIM DMA Delay Pulse complete callback. 
-  * @param  hdma : pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma)
-{
-  TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  
-  htim->State= HAL_TIM_STATE_READY; 
-  
-  if (hdma == htim->hdma[TIM_DMA_ID_CC1])
-  {
-    htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
-  }
-  else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
-  {
-    htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
-  }
-  else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
-  {
-    htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
-  }
-  else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
-  {
-    htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
-  }
-  HAL_TIM_PWM_PulseFinishedCallback(htim);
-
-  htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-}
-/**
-  * @brief  TIM DMA Capture complete callback. 
-  * @param  hdma : pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma)
-{
-  TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  
-  htim->State= HAL_TIM_STATE_READY;
-  
-  if (hdma == htim->hdma[TIM_DMA_ID_CC1])
-  {
-    htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
-  }
-  else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
-  {
-    htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
-  }
-  else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
-  {
-    htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
-  }
-  else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
-  {
-    htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
-  }
-  
-  HAL_TIM_IC_CaptureCallback(htim); 
-  
-  htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-}
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-/*************************************************************/
-/* Private functions                                         */
-/*************************************************************/
-
-/** @addtogroup TIM_Private TIM Private
-  * @{
-  */
-/**
-  * @brief  TIM DMA Period Elapse complete callback. 
-  * @param  hdma : pointer to DMA handle.
-  * @retval None
-  */
-static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma)
-{
-  TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  
-  htim->State= HAL_TIM_STATE_READY;
-  
-  HAL_TIM_PeriodElapsedCallback(htim);
-}
-
-
-/**
-  * @brief  TIM DMA Trigger callback. 
-  * @param  hdma : pointer to DMA handle.
-  * @retval None
-  */
-static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma)
-{
-  TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;  
-  
-  htim->State= HAL_TIM_STATE_READY; 
-  
-  HAL_TIM_TriggerCallback(htim);
-}
-
-/**
-  * @brief  Time Base configuration
-  * @param  TIMx : TIM peripheral
-  * @param   Structure : TIM Base configuration structure
-  * @retval None
-  */
-static void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
-{
-  uint32_t tmpcr1 = 0U;
-  tmpcr1 = TIMx->CR1;
-  
-  /* Set TIM Time Base Unit parameters ---------------------------------------*/
-  if(IS_TIM_CC1_INSTANCE(TIMx) != RESET)
-  {
-    /* Select the Counter Mode */
-    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
-    tmpcr1 |= Structure->CounterMode;
-  }
- 
-  if(IS_TIM_CC1_INSTANCE(TIMx) != RESET)  
-  {
-    /* Set the clock division */
-    tmpcr1 &= ~TIM_CR1_CKD;
-    tmpcr1 |= (uint32_t)Structure->ClockDivision;
-  }
-
-  TIMx->CR1 = tmpcr1;
-
-  /* Set the Autoreload value */
-  TIMx->ARR = (uint32_t)Structure->Period ;
- 
-  /* Set the Prescaler value */
-  TIMx->PSC = (uint32_t)Structure->Prescaler;
-
-  /* Generate an update event to reload the Prescaler value immediatly */
-  TIMx->EGR = TIM_EGR_UG;
-}
-
-/**
-  * @brief  Time Ouput Compare 1 configuration
-  * @param  TIMx to select the TIM peripheral
-  * @param  OC_Config: The ouput configuration structure
-  * @retval None
-  */
-static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
-  uint32_t tmpccmrx = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpcr2 = 0U;  
-
-  /* Disable the Channel 1: Reset the CC1E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC1E;
-  
-  /* Get the TIMx CCER register value */
-  tmpccer = TIMx->CCER;
-  /* Get the TIMx CR2 register value */
-  tmpcr2 = TIMx->CR2;
-  
-  /* Get the TIMx CCMR1 register value */
-  tmpccmrx = TIMx->CCMR1;
-    
-  /* Reset the Output Compare Mode Bits */
-  tmpccmrx &= ~TIM_CCMR1_OC1M;
-  tmpccmrx &= ~TIM_CCMR1_CC1S;
-  /* Select the Output Compare Mode */
-  tmpccmrx |= OC_Config->OCMode;
-  
-  /* Reset the Output Polarity level */
-  tmpccer &= ~TIM_CCER_CC1P;
-  /* Set the Output Compare Polarity */
-  tmpccer |= OC_Config->OCPolarity;
-
-  /* Write to TIMx CR2 */
-  TIMx->CR2 = tmpcr2;
-  
-  /* Write to TIMx CCMR1 */
-  TIMx->CCMR1 = tmpccmrx;
-  
-  /* Set the Capture Compare Register value */
-  TIMx->CCR1 = OC_Config->Pulse;
-  
-  /* Write to TIMx CCER */
-  TIMx->CCER = tmpccer;  
-} 
-
-/**
-  * @brief  Time Ouput Compare 2 configuration
-  * @param  TIMx to select the TIM peripheral
-  * @param  OC_Config: The ouput configuration structure
-  * @retval None
-  */
-static void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
-  uint32_t tmpccmrx = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpcr2 = 0U;
-   
-  /* Disable the Channel 2: Reset the CC2E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC2E;
-  
-  /* Get the TIMx CCER register value */  
-  tmpccer = TIMx->CCER;
-  /* Get the TIMx CR2 register value */
-  tmpcr2 = TIMx->CR2;
-  
-  /* Get the TIMx CCMR1 register value */
-  tmpccmrx = TIMx->CCMR1;
-    
-  /* Reset the Output Compare mode and Capture/Compare selection Bits */
-  tmpccmrx &= ~TIM_CCMR1_OC2M;
-  tmpccmrx &= ~TIM_CCMR1_CC2S;
-  
-  /* Select the Output Compare Mode */
-  tmpccmrx |= (OC_Config->OCMode << 8U);
-  
-  /* Reset the Output Polarity level */
-  tmpccer &= ~TIM_CCER_CC2P;
-  /* Set the Output Compare Polarity */
-  tmpccer |= (OC_Config->OCPolarity << 4U);
-    
-  /* Write to TIMx CR2 */
-  TIMx->CR2 = tmpcr2;
-  
-  /* Write to TIMx CCMR1 */
-  TIMx->CCMR1 = tmpccmrx;
-  
-  /* Set the Capture Compare Register value */
-  TIMx->CCR2 = OC_Config->Pulse;
-  
-  /* Write to TIMx CCER */
-  TIMx->CCER = tmpccer;
-}
-
-/**
-  * @brief  Time Ouput Compare 3 configuration
-  * @param  TIMx to select the TIM peripheral
-  * @param  OC_Config: The ouput configuration structure
-  * @retval None
-  */
-static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
-  uint32_t tmpccmrx = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpcr2 = 0U;   
-
-  /* Disable the Channel 3: Reset the CC2E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC3E;
-  
-  /* Get the TIMx CCER register value */
-  tmpccer = TIMx->CCER;
-  /* Get the TIMx CR2 register value */
-  tmpcr2 = TIMx->CR2;
-  
-  /* Get the TIMx CCMR2 register value */
-  tmpccmrx = TIMx->CCMR2;
-    
-  /* Reset the Output Compare mode and Capture/Compare selection Bits */
-  tmpccmrx &= ~TIM_CCMR2_OC3M;
-  tmpccmrx &= ~TIM_CCMR2_CC3S;  
-  /* Select the Output Compare Mode */
-  tmpccmrx |= OC_Config->OCMode;
-  
-  /* Reset the Output Polarity level */
-  tmpccer &= ~TIM_CCER_CC3P;
-  /* Set the Output Compare Polarity */
-  tmpccer |= (OC_Config->OCPolarity << 8U);
-    
-  /* Write to TIMx CR2 */
-  TIMx->CR2 = tmpcr2;
-  
-  /* Write to TIMx CCMR2 */
-  TIMx->CCMR2 = tmpccmrx;
-  
-  /* Set the Capture Compare Register value */
-  TIMx->CCR3 = OC_Config->Pulse;
-  
-  /* Write to TIMx CCER */
-  TIMx->CCER = tmpccer;
-}
-
-/**
-  * @brief  Time Ouput Compare 4 configuration
-  * @param  TIMx to select the TIM peripheral
-  * @param  OC_Config: The ouput configuration structure
-  * @retval None
-  */
-static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
-  uint32_t tmpccmrx = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpcr2 = 0U;
-
-  /* Disable the Channel 4: Reset the CC4E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC4E;
-  
-  /* Get the TIMx CCER register value */
-  tmpccer = TIMx->CCER;
-  /* Get the TIMx CR2 register value */
-  tmpcr2 = TIMx->CR2;
-  
-  /* Get the TIMx CCMR2 register value */
-  tmpccmrx = TIMx->CCMR2;
-    
-  /* Reset the Output Compare mode and Capture/Compare selection Bits */
-  tmpccmrx &= ~TIM_CCMR2_OC4M;
-  tmpccmrx &= ~TIM_CCMR2_CC4S;
-  
-  /* Select the Output Compare Mode */
-  tmpccmrx |= (OC_Config->OCMode << 8U);
-  
-  /* Reset the Output Polarity level */
-  tmpccer &= ~TIM_CCER_CC4P;
-  /* Set the Output Compare Polarity */
-  tmpccer |= (OC_Config->OCPolarity << 12U);
-   
-  /* Write to TIMx CR2 */
-  TIMx->CR2 = tmpcr2;
-  
-  /* Write to TIMx CCMR2 */  
-  TIMx->CCMR2 = tmpccmrx;
-    
-  /* Set the Capture Compare Register value */
-  TIMx->CCR4 = OC_Config->Pulse;
-  
-  /* Write to TIMx CCER */
-  TIMx->CCER = tmpccer;
-}
-
-/**
-  * @brief  Configure the TI1 as Input.
-  * @param  TIMx to select the TIM peripheral.
-  * @param  TIM_ICPolarity : The Input Polarity.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICPolarity_Rising
-  *            @arg TIM_ICPolarity_Falling
-  *            @arg TIM_ICPolarity_BothEdge  
-  * @param  TIM_ICSelection: specifies the input to be used.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1.
-  *            @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2.
-  *            @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC.
-  * @param  TIM_ICFilter: Specifies the Input Capture Filter.
-  *          This parameter must be a value between 0x00 and 0x0F.
-  * @retval None
-  */
-static void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
-                       uint32_t TIM_ICFilter)
-{
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-  
-  /* Disable the Channel 1: Reset the CC1E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC1E;
-  tmpccmr1 = TIMx->CCMR1;
-  tmpccer = TIMx->CCER;
-
-  /* Select the Input */
-  if(IS_TIM_CC2_INSTANCE(TIMx) != RESET)
-  {
-    tmpccmr1 &= ~TIM_CCMR1_CC1S;
-    tmpccmr1 |= TIM_ICSelection;
-  } 
-  else
-  {
-    tmpccmr1 &= ~TIM_CCMR1_CC1S;
-    tmpccmr1 |= TIM_CCMR1_CC1S_0;
-  }
- 
-  /* Set the filter */
-  tmpccmr1 &= ~TIM_CCMR1_IC1F;
-  tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F);
-
-  /* Select the Polarity and set the CC1E Bit */
-  tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
-  tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP));
-
-  /* Write to TIMx CCMR1 and CCER registers */
-  TIMx->CCMR1 = tmpccmr1;
-  TIMx->CCER = tmpccer;
-}
-
-/**
-  * @brief  Configure the Polarity and Filter for TI1.
-  * @param  TIMx to select the TIM peripheral.
-  * @param  TIM_ICPolarity : The Input Polarity.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICPolarity_Rising
-  *            @arg TIM_ICPolarity_Falling
-  *            @arg TIM_ICPolarity_BothEdge
-  * @param  TIM_ICFilter: Specifies the Input Capture Filter.
-  *          This parameter must be a value between 0x00 and 0x0F.
-  * @retval None
-  */
-static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
-{
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-  
-  /* Disable the Channel 1: Reset the CC1E Bit */
-  tmpccer = TIMx->CCER;
-  TIMx->CCER &= ~TIM_CCER_CC1E;
-  tmpccmr1 = TIMx->CCMR1;    
-  
-  /* Set the filter */
-  tmpccmr1 &= ~TIM_CCMR1_IC1F;
-  tmpccmr1 |= (TIM_ICFilter << 4U);
-  
-  /* Select the Polarity and set the CC1E Bit */
-  tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
-  tmpccer |= TIM_ICPolarity;
-  
-  /* Write to TIMx CCMR1 and CCER registers */
-  TIMx->CCMR1 = tmpccmr1;
-  TIMx->CCER = tmpccer;
-}
-
-/**
-  * @brief  Configure the TI2 as Input.
-  * @param  TIMx to select the TIM peripheral
-  * @param  TIM_ICPolarity : The Input Polarity.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICPolarity_Rising
-  *            @arg TIM_ICPolarity_Falling
-  *            @arg TIM_ICPolarity_BothEdge   
-  * @param  TIM_ICSelection: specifies the input to be used.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2.
-  *            @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1.
-  *            @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC.
-  * @param  TIM_ICFilter: Specifies the Input Capture Filter.
-  *          This parameter must be a value between 0x00 and 0x0F.
-  * @retval None
-  */
-static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
-                       uint32_t TIM_ICFilter)
-{
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-
-  /* Disable the Channel 2: Reset the CC2E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC2E;
-  tmpccmr1 = TIMx->CCMR1;
-  tmpccer = TIMx->CCER;
-  
-  /* Select the Input */
-  tmpccmr1 &= ~TIM_CCMR1_CC2S;
-  tmpccmr1 |= (TIM_ICSelection << 8U);
-  
-  /* Set the filter */
-  tmpccmr1 &= ~TIM_CCMR1_IC2F;
-  tmpccmr1 |= ((TIM_ICFilter << 12U) & TIM_CCMR1_IC2F);
-
-  /* Select the Polarity and set the CC2E Bit */
-  tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
-  tmpccer |= ((TIM_ICPolarity << 4U) & (TIM_CCER_CC2P | TIM_CCER_CC2NP));
-
-  /* Write to TIMx CCMR1 and CCER registers */
-  TIMx->CCMR1 = tmpccmr1 ;
-  TIMx->CCER = tmpccer;
-}
-
-/**
-  * @brief  Configure the Polarity and Filter for TI2.
-  * @param  TIMx to select the TIM peripheral.
-  * @param  TIM_ICPolarity : The Input Polarity.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICPolarity_Rising
-  *            @arg TIM_ICPolarity_Falling
-  *            @arg TIM_ICPolarity_BothEdge
-  * @param  TIM_ICFilter: Specifies the Input Capture Filter.
-  *          This parameter must be a value between 0x00 and 0x0F.
-  * @retval None
-  */
-static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
-{
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-  
-  /* Disable the Channel 2: Reset the CC2E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC2E;
-  tmpccmr1 = TIMx->CCMR1;
-  tmpccer = TIMx->CCER;
-  
-  /* Set the filter */
-  tmpccmr1 &= ~TIM_CCMR1_IC2F;
-  tmpccmr1 |= (TIM_ICFilter << 12U);
-
-  /* Select the Polarity and set the CC2E Bit */
-  tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
-  tmpccer |= (TIM_ICPolarity << 4U);
-
-  /* Write to TIMx CCMR1 and CCER registers */
-  TIMx->CCMR1 = tmpccmr1 ;
-  TIMx->CCER = tmpccer;
-}
-
-/**
-  * @brief  Configure the TI3 as Input.
-  * @param  TIMx to select the TIM peripheral
-  * @param  TIM_ICPolarity : The Input Polarity.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICPolarity_Rising
-  *            @arg TIM_ICPolarity_Falling
-  *            @arg TIM_ICPolarity_BothEdge         
-  * @param  TIM_ICSelection: specifies the input to be used.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3.
-  *            @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4.
-  *            @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC.
-  * @param  TIM_ICFilter: Specifies the Input Capture Filter.
-  *          This parameter must be a value between 0x00 and 0x0F.
-  * @retval None
-  */
-static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
-                       uint32_t TIM_ICFilter)
-{
-  uint32_t tmpccmr2 = 0U;
-  uint32_t tmpccer = 0U;
-
-  /* Disable the Channel 3: Reset the CC3E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC3E;
-  tmpccmr2 = TIMx->CCMR2;
-  tmpccer = TIMx->CCER;
-
-  /* Select the Input */
-  tmpccmr2 &= ~TIM_CCMR2_CC3S;
-  tmpccmr2 |= TIM_ICSelection;
-
-  /* Set the filter */
-  tmpccmr2 &= ~TIM_CCMR2_IC3F;
-  tmpccmr2 |= ((TIM_ICFilter << 4U) & TIM_CCMR2_IC3F);
-
-  /* Select the Polarity and set the CC3E Bit */
-  tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP);
-  tmpccer |= ((TIM_ICPolarity << 8U) & (TIM_CCER_CC3P | TIM_CCER_CC3NP));
-
-  /* Write to TIMx CCMR2 and CCER registers */
-  TIMx->CCMR2 = tmpccmr2;
-  TIMx->CCER = tmpccer;
-}
-
-/**
-  * @brief  Configure the TI4 as Input.
-  * @param  TIMx to select the TIM peripheral
-  * @param  TIM_ICPolarity : The Input Polarity.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICPolarity_Rising
-  *            @arg TIM_ICPolarity_Falling
-  *            @arg TIM_ICPolarity_BothEdge     
-  * @param  TIM_ICSelection: specifies the input to be used.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4.
-  *            @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3.
-  *            @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC.
-  * @param  TIM_ICFilter: Specifies the Input Capture Filter.
-  *          This parameter must be a value between 0x00 and 0x0F.
-  * @retval None
-  */
-static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
-                       uint32_t TIM_ICFilter)
-{
-  uint32_t tmpccmr2 = 0U;
-  uint32_t tmpccer = 0U;
-
-  /* Disable the Channel 4: Reset the CC4E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC4E;
-  tmpccmr2 = TIMx->CCMR2;
-  tmpccer = TIMx->CCER;
-
-  /* Select the Input */
-  tmpccmr2 &= ~TIM_CCMR2_CC4S;
-  tmpccmr2 |= (TIM_ICSelection << 8U);
-
-  /* Set the filter */
-  tmpccmr2 &= ~TIM_CCMR2_IC4F;
-  tmpccmr2 |= ((TIM_ICFilter << 12U) & TIM_CCMR2_IC4F);
-
-  /* Select the Polarity and set the CC4E Bit */
-  tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP);
-  tmpccer |= ((TIM_ICPolarity << 12U) & (TIM_CCER_CC4P | TIM_CCER_CC4NP));
-
-  /* Write to TIMx CCMR2 and CCER registers */
-  TIMx->CCMR2 = tmpccmr2;
-  TIMx->CCER = tmpccer ;
-}
-
-/**
-  * @brief  Selects the Input Trigger source
-  * @param  TIMx to select the TIM peripheral
-  * @param  InputTriggerSource: The Input Trigger source.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_TS_ITR0: Internal Trigger 0
-  *            @arg TIM_TS_ITR1: Internal Trigger 1
-  *            @arg TIM_TS_ITR2: Internal Trigger 2
-  *            @arg TIM_TS_ITR3: Internal Trigger 3
-  *            @arg TIM_TS_TI1F_ED: TI1 Edge Detector
-  *            @arg TIM_TS_TI1FP1: Filtered Timer Input 1
-  *            @arg TIM_TS_TI2FP2: Filtered Timer Input 2
-  *            @arg TIM_TS_ETRF: External Trigger input
-  * @retval None
-  */
-static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint16_t InputTriggerSource)
-{
-  uint32_t tmpsmcr = 0U;
-  
-   /* Get the TIMx SMCR register value */
-   tmpsmcr = TIMx->SMCR;
-   /* Reset the TS Bits */
-   tmpsmcr &= ~TIM_SMCR_TS;
-   /* Set the Input Trigger source and the slave mode*/
-   tmpsmcr |= InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1;
-   /* Write to TIMx SMCR */
-   TIMx->SMCR = tmpsmcr;
-}
-/**
-  * @brief  Configures the TIMx External Trigger (ETR).
-  * @param  TIMx to select the TIM peripheral
-  * @param  TIM_ExtTRGPrescaler: The external Trigger Prescaler.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ExtTRGPSC_DIV1: ETRP Prescaler OFF.
-  *            @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
-  *            @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
-  *            @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
-  * @param  TIM_ExtTRGPolarity: The external Trigger Polarity.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
-  *            @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
-  * @param  ExtTRGFilter: External Trigger Filter.
-  *          This parameter must be a value between 0x00 and 0x0F
-  * @retval None
-  */
-static void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler,
-                       uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
-{
-  uint32_t tmpsmcr = 0U;
-
-  tmpsmcr = TIMx->SMCR;
-
-  /* Reset the ETR Bits */
-  tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
-
-  /* Set the Prescaler, the Filter value and the Polarity */
-  tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8)));
-
-  /* Write to TIMx SMCR */
-  TIMx->SMCR = tmpsmcr;
-} 
-
-/**
-  * @brief  Enables or disables the TIM Capture Compare Channel x.
-  * @param  TIMx to select the TIM peripheral
-  * @param  Channel: specifies the TIM Channel
-  *          This parameter can be one of the following values:
-  *            @arg TIM_Channel_1: TIM Channel 1
-  *            @arg TIM_Channel_2: TIM Channel 2
-  *            @arg TIM_Channel_3: TIM Channel 3
-  *            @arg TIM_Channel_4: TIM Channel 4
-  * @param  ChannelState: specifies the TIM Channel CCxE bit new state.
-  *          This parameter can be: TIM_CCx_ENABLE or TIM_CCx_Disable. 
-  * @retval None
-  */
-static void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState)
-{
-  uint32_t tmp = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(TIMx,Channel));
-
-  tmp = TIM_CCER_CC1E << Channel;
-
-  /* Reset the CCxE Bit */
-  TIMx->CCER &= ~tmp;
-
-  /* Set or reset the CCxE Bit */ 
-  TIMx->CCER |= (uint32_t)(ChannelState << Channel);
-}
-/**
-  * @brief  Set the slave timer configuration.
-  * @param  htim : TIM handle
-  * @param  sSlaveConfig: pointer to a TIM_SlaveConfigTypeDef structure that
-  *         contains the selected trigger (internal trigger input, filtered
-  *         timer input or external trigger input) and the ) and the Slave
-  *         mode (Disable, Reset, Gated, Trigger, External clock mode 1).
-  * @retval None
-  */
-static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
-                                     TIM_SlaveConfigTypeDef * sSlaveConfig)
-{
-  uint32_t tmpsmcr = 0U;
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-
-  /* Get the TIMx SMCR register value */
-  tmpsmcr = htim->Instance->SMCR;
-
-  /* Reset the Trigger Selection Bits */
-  tmpsmcr &= ~TIM_SMCR_TS;
-  /* Set the Input Trigger source */
-  tmpsmcr |= sSlaveConfig->InputTrigger;
-
-  /* Reset the slave mode Bits */
-  tmpsmcr &= ~TIM_SMCR_SMS;
-  /* Set the slave mode */
-  tmpsmcr |= sSlaveConfig->SlaveMode;
-
-  /* Write to TIMx SMCR */
-  htim->Instance->SMCR = tmpsmcr;
-
-  /* Configure the trigger prescaler, filter, and polarity */
-  switch (sSlaveConfig->InputTrigger)
-  {
-  case TIM_TS_ETRF:
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
-      assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler));
-      assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
-      assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
-      /* Configure the ETR Trigger source */
-      TIM_ETR_SetConfig(htim->Instance,
-                        sSlaveConfig->TriggerPrescaler,
-                        sSlaveConfig->TriggerPolarity,
-                        sSlaveConfig->TriggerFilter);
-    }
-    break;
-
-  case TIM_TS_TI1F_ED:
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-      assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
-
-      /* Disable the Channel 1: Reset the CC1E Bit */
-      tmpccer = htim->Instance->CCER;
-      htim->Instance->CCER &= ~TIM_CCER_CC1E;
-      tmpccmr1 = htim->Instance->CCMR1;
-
-      /* Set the filter */
-      tmpccmr1 &= ~TIM_CCMR1_IC1F;
-      tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4U);
-
-      /* Write to TIMx CCMR1 and CCER registers */
-      htim->Instance->CCMR1 = tmpccmr1;
-      htim->Instance->CCER = tmpccer;
-
-    }
-    break;
-
-  case TIM_TS_TI1FP1:
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-      assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
-      assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
-
-      /* Configure TI1 Filter and Polarity */
-      TIM_TI1_ConfigInputStage(htim->Instance,
-                               sSlaveConfig->TriggerPolarity,
-                               sSlaveConfig->TriggerFilter);
-    }
-    break;
-
-  case TIM_TS_TI2FP2:
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-      assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
-      assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
-
-      /* Configure TI2 Filter and Polarity */
-      TIM_TI2_ConfigInputStage(htim->Instance,
-                                sSlaveConfig->TriggerPolarity,
-                                sSlaveConfig->TriggerFilter);
-    }
-    break;
-
-  case TIM_TS_ITR0:
-    {
-      /* Check the parameter */
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-    }
-    break;
-
-  case TIM_TS_ITR1:
-    {
-      /* Check the parameter */
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-    }
-    break;
-
-  case TIM_TS_ITR2:
-    {
-      /* Check the parameter */
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-    }
-    break;
-
-  case TIM_TS_ITR3:
-    {
-      /* Check the parameter */
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-    }
-    break;
-
-  default:
-    break;
-  }
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */ 
-
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-/**
-  * @}
-  */ 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.c
deleted file mode 100755
index 10a2b332..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.c
+++ /dev/null
@@ -1,464 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_tim_ex.c
-  * @author  MCD Application Team
-  * @brief   TIM HAL module driver.
-  * @brief   This file provides firmware functions to manage the following 
-  *          functionalities of the Timer (TIM) peripheral:
-  *           + Time Hall Sensor Interface Initialization
-  *           + Time Hall Sensor Interface Start
-  *           + Time Master and Slave synchronization configuration
-  @verbatim 
-================================================================================
-          ##### TIM specific features integration #####
-================================================================================
-           
-    [..] The Timer features include: 
-         (#) 16-bit up, down, up/down auto-reload counter.
-         (#) 16-bit programmable prescaler allowing dividing (also on the fly) the counter clock
-             frequency either by any factor between 1 and 65536.
-         (#) Up to 4 independent channels for:
-           Input Capture
-           Output Compare
-           PWM generation (Edge and Center-aligned Mode)
-           One-pulse mode output
-         (#) Synchronization circuit to control the timer with external signals and to interconnect
-            several timers together.
-         (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for positioning
-           purposes               
-   
-            ##### How to use this driver #####
-================================================================================
-    [..]
-     (#) Enable the TIM interface clock using 
-         __HAL_RCC_TIMx_CLK_ENABLE(); 
-       
-     (#) TIM pins configuration
-          (++) Enable the clock for the TIM GPIOs using the following function:
-              __HAL_RCC_GPIOx_CLK_ENABLE();   
-          (++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();  
-
-     (#) The external Clock can be configured, if needed (the default clock is the internal clock from the APBx), 
-         using the following function:
-         HAL_TIM_ConfigClockSource, the clock configuration should be done before any start function.
-  
-     (#) Configure the TIM in the desired operating mode using one of the 
-         configuration function of this driver:
-          (++) HAL_TIMEx_MasterConfigSynchronization() to configure the peripheral in master mode.
-
-     (#) Remap the Timer I/O using HAL_TIMEx_RemapConfig() API.
-
-  
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup TIMEx
-  * @brief TIMEx HAL module driver
-  * @{
-  */
-
-#ifdef HAL_TIM_MODULE_ENABLED
-
-
-/** @addtogroup TIMEx_Exported_Functions
-  * @{
-  */
-
-
-/** @addtogroup TIMEx_Exported_Functions_Group1
- *  @brief    Peripheral Control functions
- *
-@verbatim   
- ===============================================================================
-             ##### Peripheral Control functions #####
- ===============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Configure Master and the Slave synchronization.
-      
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Configures the TIM in master mode.
-  * @param  htim: TIM handle.   
-  * @param  sMasterConfig: pointer to a TIM_MasterConfigTypeDef structure that
-  *         contains the selected trigger output (TRGO) and the Master/Slave 
-  *         mode. 
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
-  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
-  
-  __HAL_LOCK(htim);
-  
-  /* Change the handler state */
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Reset the MMS Bits */
-  htim->Instance->CR2 &= ~TIM_CR2_MMS;
-  /* Select the TRGO source */
-  htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger;
-
-  /* Reset the MSM Bit */
-  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
-  /* Set or Reset the MSM Bit */
-  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
-
-  htim->State = HAL_TIM_STATE_READY;
-  
-  __HAL_UNLOCK(htim);
-  
-  return HAL_OK;
-}  
-
-
-#if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) \
-    || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
-
-/**
-  * @brief  Configures the remapping of the TIM2, TIM3, TIM21 and TIM22 inputs.
-  *         The channel inputs (T1..T4) and the Trigger input (ETR) of the
-  *         timers can be remaped thanks to this function. When an input is
-  *         mapped, on a GPIO, refer yourself to the GPIO alternate functions
-  *         for more details.
-  * @note   It is not possible to connect TIM2 and TIM21 on
-  *         GPIOB5_AF4 at the same time.
-  *         When selecting TIM3_TI2_GPIOB5_AF4, Channel2 of TIM3 will be
-  *         connected to GPIOB5_AF4 and Channel2 of TIM22 will be connected to
-  *         some other GPIOs. (refer to alternate functions for more details)
-  *         When selecting TIM3_TI2_GPIO_DEF, Channel2 of Timer 3 will be
-  *         connected an GPIO (other than GPIOB5_AF4) and Channel2 of TIM22
-  *         will be connected to GPIOB5_AF4.
-  *
-  * @param  htim: pointer to a TIM_HandleTypeDef structure that contains
-  *               the configuration information for TIM module.
-  * @param  Remap: specifies the TIM input remapping source.
-  *                This parameter is a combination of the following values
-  *                depending on TIM instance:
-  *
-  *         For TIM2, the parameter can have the following values:
-  *           @arg TIM2_ETR_GPIO:      TIM2  ETR connected to GPIO (default):
-  *                                    GPIOA(0)_AF5 or GPIOA(5)_AF2 or
-  *                                    GPIOA(15)_AF2 or GPIOE(9)_AF2
-  *           @arg TIM2_ETR_HSI48:     TIM2  ETR connected to HSI48
-  *           @arg TIM2_ETR_HSI16:     TIM2  ETR connected to HSI16
-  *           @arg TIM2_ETR_LSE:       TIM2  ETR connected to LSE
-  *           @arg TIM2_ETR_COMP2_OUT: TIM2  ETR connected to COMP2 output
-  *           @arg TIM2_ETR_COMP1_OUT: TIM2  ETR connected to COMP1 output
-  *           @arg TIM2_TI4_GPIO :     TIM2  TI4 connected to GPIO1(default):
-  *                                    GPIOA(3)_AF2 or GPIOB(11)_AF2 or
-  *                                    GPIOE(12)_AF0
-  *           @arg TIM2_TI4_COMP1:     TIM2  TI4 connected to COMP1
-  *           @arg TIM2_TI4_COMP2:     TIM2  TI4 connected to COMP2
-  *
-  *         For TIM3, the parameter can have the following values:
-  *           @arg TIM3_ETR_GPIO:      TIM3  ETR connected to GPIO (default):
-  *                                    GPIOE(2)_AF2 or GPIOD(2)_AF2 or
-  *                                    GPIOE(2)AF2
-  *           @arg TIM3_ETR_HSI:       TIM3 ETR connected to HSI
-  *           @arg TIM3_TI1_USB_SOF:   TIM3 TI1 connected to USB_SOF (default)
-  *           @arg TIM3_TI1_GPIO:      TIM3 TI1 connected to GPIO :
-  *                                    GPIOE(3)_AF2 or GPIOA(6)_AF2 or
-  *                                    GPIOC(6)_AF2 or GPIOB(4)_AF2
-  *           @arg TIM3_TI2_GPIOB5_AF4:TIM3 TI3 connected to GPIOB(5)_AF4
-  *                                    (refer to note)
-  *           @arg TIM3_TI2_GPIO_DEF:  TIM3 TI3 connected to GPIO (default):
-  *                                    GPIO_A(7)_AF2 or GPIO_B(5)_AF4 or
-  *                                    GPIOC(7)_AF2 or GPIOE(7)_AF2
-  *           @arg TIM3_TI4_GPIO_DEF:  TIM3 TI4 connected to GPIO:
-  *                                    GPIO_B(1)_AF2 or GPIO_E(6)_AF2
-  *           @arg TIM3_TI4_GPIOC9_AF2:TIM3 TI4 connected to GPIOC(9)_AF2
-  *
-  *         For TIM21, the parameter can have the following values:
-  *           @arg TIM21_ETR_GPIO:     TIM21 ETR connected to GPIO(default) :
-  *                                    APB2_PC(9)_AF0 or APB2_PA(1)_AF5
-  *           @arg TIM21_ETR_COMP2_OUT:TIM21 ETR connected to COMP2 output
-  *           @arg TIM21_ETR_COMP1_OUT:TIM21 ETR connected to COMP1 output
-  *           @arg TIM21_ETR_LSE:      TIM21 ETR connected to LSE
-  *           @arg TIM21_TI1_MCO:      TIM21 TI1 connected to MCO
-  *           @arg TIM21_TI1_RTC_WKUT_IT: TIM21 TI1 connected to RTC WAKEUP interrupt
-  *           @arg TIM21_TI1_HSE_RTC:  TIM21 TI1 connected to HSE_RTC
-  *           @arg TIM21_TI1_MSI:      TIM21 TI1 connected to MSI clock
-  *           @arg TIM21_TI1_LSE:      TIM21 TI1 connected to LSE
-  *           @arg TIM21_TI1_LSI:      TIM21 TI1 connected to LSI
-  *           @arg TIM21_TI1_COMP1_OUT:TIM21 TI1 connected to COMP1_OUT
-  *           @arg TIM21_TI1_GPIO:     TIM21 TI1 connected to GPIO(default):
-  *                                    GPIOA(2)_AF0 or GPIOB(13)_AF6 or
-  *                                    GPIOE(5)_AF0 or GPIOD(0)_AF0
-  *           @arg TIM21_TI2_GPIO:     TIM21 TI2 connected to GPIO(default):
-  *                                    GPIOA(3)_AF0 or GPIOB(14)_AF6 or
-  *                                    GPIOE(6)_AF0 or GPIOD(7)_AF1
-  *           @arg TIM21_TI2_COMP2_OUT:TIM21 TI2 connected to COMP2 output
-  *
-  *         For TIM22, the parameter can have the following values:
-  *           @arg TIM22_ETR_LSE:      TIM22 ETR connected to LSE
-  *           @arg TIM22_ETR_COMP2_OUT:TIM22 ETR connected to COMP2 output
-  *           @arg TIM22_ETR_COMP1_OUT:TIM22 ETR connected to COMP1 output
-  *           @arg TIM22_ETR_GPIO:     TIM22 ETR connected to GPIO(default):
-  *                                    GPIOC(8)_AF0 or GPIOA(4)_AF5
-  *           @arg TIM22_TI1_GPIO1:    TIM22 TI1 connected to GPIO(default):
-  *                                    GPIOC(6)_AF0 or GPIOA(6)_AF5 or
-  *                                    GPIOB(4)_AF4 or GPIOE(0)_AF3
-  *           @arg TIM22_TI1_COMP2_OUT:TIM22 TI1 connected to COMP2 output
-  *           @arg TIM22_TI1_COMP1_OUT:TIM22 TI1 connected to COMP1 output
-  *           @arg TIM22_TI1_GPIO2:    TIM22 TI1 connected to GPIO:
-  *                                    GPIOC(6)_AF0 or GPIOA(6)_AF5 or
-  *                                    GPIOB(4)_AF4 or GPIOE(3)_AF0
-  *
-  * @retval HAL status
-  */
-#elif defined (STM32L031xx) || defined (STM32L041xx) 
-  /**
-  * @brief  Configures the remapping of the TIM2, TIM21 and TIM22 inputs.
-  *         The channel inputs (T1..T4) and the Trigger input (ETR) of the
-  *         timers can be remaped thanks to this function. When an input is
-  *         mapped, on a GPIO, refer yourself to the GPIO alternate functions
-  *         for more details.
-  *
-  * @param  htim: pointer to a TIM_HandleTypeDef structure that contains
-  *               the configuration information for TIM module.
-  * @param  Remap: specifies the TIM input remapping source.
-  *                This parameter is a combination of the following values
-  *                depending on TIM instance:
-  *
-  *         For TIM2, the parameter can have the following values:
-  *           @arg TIM2_ETR_GPIO:      TIM2  ETR connected to GPIO (default):
-  *                                    GPIOA(0)_AF5 or GPIOA(5)_AF2 or
-  *                                    GPIOA(15)_AF2
-  *           @arg TIM2_ETR_HSI16:     TIM2  ETR connected to HS16 (HSIOUT)
-  *           @arg TIM2_ETR_LSE:       TIM2  ETR connected to LSE
-  *           @arg TIM2_ETR_COMP2_OUT: TIM2  ETR connected to COMP2 output
-  *           @arg TIM2_ETR_COMP1_OUT: TIM2  ETR connected to COMP1 output
-  *           @arg TIM2_TI4_GPIO :     TIM2  TI4 connected to GPIO (default):
-  *                                    GPIOA(3)_AF2 or GPIOB(11)_AF2 or
-  *                                    GPIOB(1)_AF5
-  *           @arg TIM2_TI4_COMP1_OUT: TIM2  TI4 connected to COMP1 output
-  *           @arg TIM2_TI4_COMP2_OUT: TIM2  TI4 connected to COMP2 output
-  *
-  *         For TIM21, the parameter can have the following values:
-  *           @arg TIM21_ETR_GPIO:     TIM21 ETR connected to GPIO(default) :
-  *                                    APB2_PA(1)_AF5
-  *           @arg TIM21_ETR_COMP2_OUT:TIM21 ETR connected to COMP2 output
-  *           @arg TIM21_ETR_COMP1_OUT:TIM21 ETR connected to COMP1 output
-  *           @arg TIM21_ETR_LSE:      TIM21 ETR connected to LSE
-  *           @arg TIM21_TI1_MCO:      TIM21 TI1 connected to MCO
-  *           @arg TIM21_TI1_RTC_WKUT_IT: TIM21 TI1 connected to RTC WAKEUP interrupt
-  *           @arg TIM21_TI1_HSE_RTC:  TIM21 TI1 connected to HSE_RTC
-  *           @arg TIM21_TI1_MSI:      TIM21 TI1 connected to MSI clock
-  *           @arg TIM21_TI1_LSE:      TIM21 TI1 connected to LSE
-  *           @arg TIM21_TI1_LSI:      TIM21 TI1 connected to LSI
-  *           @arg TIM21_TI1_COMP1_OUT:TIM21 TI1 connected to COMP1_OUT
-  *           @arg TIM21_TI2_GPIO:     TIM21 TI2 connected to GPIO(default):
-  *                                    GPIOA(3)_AF0 or GPIOB(14)_AF6
-  *           @arg TIM21_TI2_COMP2_OUT:TIM21 TI2 connected to COMP2 output
-  *
-  *         For TIM22, the parameter can have the following values:
-  *           @arg TIM22_ETR_LSE:      TIM22 ETR connected to LSE
-  *           @arg TIM22_ETR_COMP2_OUT:TIM22 ETR connected to COMP2 output
-  *           @arg TIM22_ETR_COMP1_OUT:TIM22 ETR connected to COMP1 output
-  *           @arg TIM22_ETR_GPIO:     TIM22 ETR connected to GPIO(default):
-  *                                    GPIOA(4)_AF5
-  *           @arg TIM22_TI1_GPIO1:    TIM22 TI1 connected to GPIO(default):
-  *                                    GPIOC(0)_AF6 or GPIOA(5)_AF6 or
-  *                                    GPIOB(4)_AF4
-  *           @arg TIM22_TI1_COMP2_OUT:TIM22 TI1 connected to COMP2 output
-  *           @arg TIM22_TI1_COMP1_OUT:TIM22 TI1 connected to COMP1 output
-  *           @arg TIM22_TI1_GPIO2:    TIM22 TI1 connected to GPIO:
-  *                                    GPIOA(6)_AF5 or GPIOB(4)_AF4
-  *
-  * @retval HAL status
-  */      
-#elif defined (STM32L011xx) || defined (STM32L021xx) 
-  /**
-  * @brief  Configures the remapping of the TIM2 and TIM21 inputs.
-  *         The channel inputs (T1..T4) and the Trigger input (ETR) of the
-  *         timers can be remaped thanks to this function. When an input is
-  *         mapped, on a GPIO, refer yourself to the GPIO alternate functions
-  *         for more details.
-  *
-  * @param  htim: pointer to a TIM_HandleTypeDef structure that contains
-  *               the configuration information for TIM module.
-  * @param  Remap: specifies the TIM input remapping source.
-  *                This parameter is a combination of the following values
-  *                depending on TIM instance:
-  *
-  *         For TIM2, the parameter can have the following values:
-  *           @arg TIM2_ETR_GPIO:      TIM2  ETR connected to GPIO (default):
-  *                                    GPIOA(0)_AF5 or GPIOA(5)_AF2 or
-  *                                    GPIOA(15)_AF2
-  *           @arg TIM2_ETR_HSI16:     TIM2  ETR connected to HS16 (HSIOUT)
-  *           @arg TIM2_ETR_LSE:       TIM2  ETR connected to LSE
-  *           @arg TIM2_ETR_COMP2_OUT: TIM2  ETR connected to COMP2 output
-  *           @arg TIM2_ETR_COMP1_OUT: TIM2  ETR connected to COMP1 output
-  *           @arg TIM2_TI4_GPIO :     TIM2  TI4 connected to GPIO (default):
-  *                                    GPIOA(3)_AF2 or GPIOB(11)_AF2 or
-  *                                    GPIOB(1)_AF5
-  *           @arg TIM2_TI4_COMP1_OUT: TIM2  TI4 connected to COMP1 output
-  *           @arg TIM2_TI4_COMP2_OUT: TIM2  TI4 connected to COMP2 output
-  *
-  *         For TIM21, the parameter can have the following values:
-  *           @arg TIM21_ETR_GPIO:     TIM21 ETR connected to GPIO(default) :
-  *                                    APB2_PA(1)_AF5
-  *           @arg TIM21_ETR_COMP2_OUT:TIM21 ETR connected to COMP2 output
-  *           @arg TIM21_ETR_COMP1_OUT:TIM21 ETR connected to COMP1 output
-  *           @arg TIM21_ETR_LSE:      TIM21 ETR connected to LSE
-  *           @arg TIM21_TI1_MCO:      TIM21 TI1 connected to MCO
-  *           @arg TIM21_TI1_RTC_WKUT_IT: TIM21 TI1 connected to RTC WAKEUP interrupt
-  *           @arg TIM21_TI1_HSE_RTC:  TIM21 TI1 connected to HSE_RTC
-  *           @arg TIM21_TI1_MSI:      TIM21 TI1 connected to MSI clock
-  *           @arg TIM21_TI1_LSE:      TIM21 TI1 connected to LSE
-  *           @arg TIM21_TI1_LSI:      TIM21 TI1 connected to LSI
-  *           @arg TIM21_TI1_COMP1_OUT:TIM21 TI1 connected to COMP1_OUT
-  *           @arg TIM21_TI2_GPIO:     TIM21 TI2 connected to GPIO(default):
-  *                                    GPIOA(3)_AF0 or GPIOB(14)_AF6
-  *           @arg TIM21_TI2_COMP2_OUT:TIM21 TI2 connected to COMP2 output
-  *
-  * @retval HAL status
-  */      
-#else
-/**
-  * @brief  Configures the remapping of the TIM2, TIM21 and TIM22 inputs.
-  *         The channel inputs (T1..T4) and the Trigger input (ETR) of the
-  *         timers can be remaped thanks to this function. When an input is
-  *         mapped, on a GPIO, refer yourself to the GPIO alternate functions
-  *         for more details.
-  *
-  * @param  htim: pointer to a TIM_HandleTypeDef structure that contains
-  *               the configuration information for TIM module.
-  * @param  Remap: specifies the TIM input remapping source.
-  *                This parameter is a combination of the following values
-  *                depending on TIM instance:
-  *
-  *         For TIM2, the parameter can have the following values:
-  *           @arg TIM2_ETR_GPIO:      TIM2  ETR connected to GPIO (default):
-  *                                    GPIOA(0)_AF5 or GPIOA(5)_AF2 or
-  *                                    GPIOA(15)_AF2 or GPIOE(9)_AF2
-  *           @arg TIM2_ETR_HSI48:     TIM2  ETR connected to HSI48
-  *           @arg TIM2_ETR_LSE:       TIM2  ETR connected to LSE
-  *           @arg TIM2_ETR_COMP2_OUT: TIM2  ETR connected to COMP2 output
-  *           @arg TIM2_ETR_COMP1_OUT: TIM2  ETR connected to COMP1 output
-  *           @arg TIM2_TI4_GPIO:      TIM2  TI4 connected to GPIO1(default):
-  *                                    GPIOA(3)_AF2 or GPIOB(11)_AF2 or
-  *                                    GPIOE(12)_AF0
-  *           @arg TIM2_TI4_COMP1:     TIM2  TI4 connected to COMP1
-  *           @arg TIM2_TI4_COMP2:     TIM2  TI4 connected to COMP2
-  *           @arg TIM2_TI4_GPIO2:     TIM2  TI4 connected to GPIO2 :
-  *                                    GPIOA(3)_AF2 or GPIOB(11)_AF2 or
-  *                                    GPIOE(12)_AF0
-  *
-  *         For TIM21, the parameter can have the following values:
-  *           @arg TIM21_ETR_GPIO:     TIM21 ETR connected to GPIO(default) :
-  *                                    APB2_PC(9)_AF0 or APB2_PA(1)_AF5
-  *           @arg TIM21_ETR_COMP2_OUT:TIM21 ETR connected to COMP2 output
-  *           @arg TIM21_ETR_COMP1_OUT:TIM21 ETR connected to COMP1 output
-  *           @arg TIM21_ETR_LSE:      TIM21 ETR connected to LSE
-  *           @arg TIM21_TI1_MCO:      TIM21 TI1 connected to MCO
-  *           @arg TIM21_TI1_RTC_WKUT_IT: TIM21 TI1 connected to RTC WAKEUP interrupt
-  *           @arg TIM21_TI1_HSE_RTC:  TIM21 TI1 connected to HSE_RTC
-  *           @arg TIM21_TI1_MSI:      TIM21 TI1 connected to MSI clock
-  *           @arg TIM21_TI1_LSE:      TIM21 TI1 connected to LSE
-  *           @arg TIM21_TI1_LSI:      TIM21 TI1 connected to LSI
-  *           @arg TIM21_TI1_COMP1_OUT:TIM21 TI1 connected to COMP1_OUT
-  *           @arg TIM21_TI1_GPIO:     TIM21 TI1 connected to GPIO(default):
-  *                                    GPIOA(2)_AF0 or GPIOB(13)_AF6 or
-  *                                    GPIOE(5)_AF0 or GPIOD(0)_AF0
-  *           @arg TIM21_TI2_GPIO:     TIM21 TI2 connected to GPIO(default):
-  *                                    GPIOA(3)_AF0 or GPIOB(14)_AF6 or
-  *                                    GPIOE(6)_AF0 or GPIOD(7)_AF1
-  *           @arg TIM21_TI2_COMP2_OUT:TIM21 TI2 connected to COMP2 output
-  *
-  *         For TIM22, the parameter can have the following values:
-  *           @arg TIM22_ETR_LSE:      TIM22 ETR connected to LSE
-  *           @arg TIM22_ETR_COMP2_OUT:TIM22 ETR connected to COMP2 output
-  *           @arg TIM22_ETR_COMP1_OUT:TIM22 ETR connected to COMP1 output
-  *           @arg TIM22_ETR_GPIO:     TIM22 ETR connected to GPIO(default):
-  *                                    GPIOC(8)_AF0 or GPIOA(4)_AF5
-  *           @arg TIM22_TI1_GPIO1:    TIM22 TI1 connected to GPIO(default):
-  *                                    GPIOC(6)_AF0 or GPIOA(6)_AF5 or
-  *                                    GPIOB(4)_AF4 or GPIOE(0)_AF3
-  *           @arg TIM22_TI1_COMP2_OUT:TIM22 TI1 connected to COMP2 output
-  *           @arg TIM22_TI1_COMP1_OUT:TIM22 TI1 connected to COMP1 output
-  *           @arg TIM22_TI1_GPIO2:    TIM22 TI1 connected to GPIO:
-  *                                    GPIOC(6)_AF0 or GPIOA(6)_AF5 or
-  *                                    GPIOB(4)_AF4 or GPIOE(3)_AF0
-  *
-  * @retval HAL status
-  */
-
-#endif /* STM32L07xxx or STM32L08xxx */
-
-HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
-{
-
-   __HAL_LOCK(htim);
-
-  /* Check parameters */
-  assert_param(IS_TIM_REMAP(htim->Instance,Remap));
-
-  /* Set the Timer remapping configuration */
-  htim->Instance->OR = Remap;
-
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_TIM_MODULE_ENABLED */
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tsc.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tsc.c
deleted file mode 100755
index 3487ad06..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tsc.c
+++ /dev/null
@@ -1,817 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_tsc.c
-  * @author  MCD Application Team
-  * @brief   This file provides firmware functions to manage the following 
-  *          functionalities of the Touch Sensing Controller (TSC) peripheral:
-  *           + Initialization and DeInitialization
-  *           + Channel IOs, Shield IOs and Sampling IOs configuration
-  *           + Start and Stop an acquisition
-  *           + Read acquisition result
-  *           + Interrupts and flags management
-  *         
-  @verbatim
-================================================================================
-                       ##### TSC specific features #####
-================================================================================
-  [..]
-  (#) Proven and robust surface charge transfer acquisition principle
-    
-  (#) Supports up to 3 capacitive sensing channels per group
-    
-  (#) Capacitive sensing channels can be acquired in parallel offering a very good
-      response time
-      
-  (#) Spread spectrum feature to improve system robustness in noisy environments
-   
-  (#) Full hardware management of the charge transfer acquisition sequence
-   
-  (#) Programmable charge transfer frequency
-   
-  (#) Programmable sampling capacitor I/O pin
-   
-  (#) Programmable channel I/O pin
-   
-  (#) Programmable max count value to avoid long acquisition when a channel is faulty
-   
-  (#) Dedicated end of acquisition and max count error flags with interrupt capability
-   
-  (#) One sampling capacitor for up to 3 capacitive sensing channels to reduce the system
-      components
-   
-  (#) Compatible with proximity, touchkey, linear and rotary touch sensor implementation
-
-   
-                          ##### How to use this driver #####
-================================================================================
-  [..]
-    (#) Enable the TSC interface clock using __HAL_RCC_TSC_CLK_ENABLE() macro.
-
-    (#) GPIO pins configuration
-      (++) Enable the clock for the TSC GPIOs using __HAL_RCC_GPIOx_CLK_ENABLE() macro.
-      (++) Configure the TSC pins used as sampling IOs in alternate function output Open-Drain mode,
-           and TSC pins used as channel/shield IOs in alternate function output Push-Pull mode
-           using HAL_GPIO_Init() function.
-      (++) Configure the alternate function on all the TSC pins using HAL_xxxx() function.
-
-    (#) Interrupts configuration
-      (++) Configure the NVIC (if the interrupt model is used) using HAL_xxx() function.
-
-    (#) TSC configuration
-      (++) Configure all TSC parameters and used TSC IOs using HAL_TSC_Init() function.
-
-  *** Acquisition sequence ***
-  ===================================
-  [..]
-    (+) Discharge all IOs using HAL_TSC_IODischarge() function.
-    (+) Wait a certain time allowing a good discharge of all capacitors. This delay depends
-        of the sampling capacitor and electrodes design.
-    (+) Select the channel IOs to be acquired using HAL_TSC_IOConfig() function.
-    (+) Launch the acquisition using either HAL_TSC_Start() or HAL_TSC_Start_IT() function.
-        If the synchronized mode is selected, the acquisition will start as soon as the signal
-        is received on the synchro pin.
-    (+) Wait the end of acquisition using either HAL_TSC_PollForAcquisition() or
-        HAL_TSC_GetState() function or using WFI instruction for example.
-    (+) Check the group acquisition status using HAL_TSC_GroupGetStatus() function.
-    (+) Read the acquisition value using HAL_TSC_GroupGetValue() function.
-      
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx)
-#include "stm32l0xx_hal.h"
-
-#ifdef HAL_TSC_MODULE_ENABLED
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup TSC
-  * @brief HAL TSC module driver
-  * @{
-  */
-
-/** @addtogroup TSC_Private TSC Private
-  * @{
-  */
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-static uint32_t TSC_extract_groups(uint32_t iomask);
-/* Private functions ---------------------------------------------------------*/
-/**
-  * @}
-  */
-/** @addtogroup TSC_Exported_Functions TSC Exported Functions
-  * @{
-  */ 
-
-/** @addtogroup HAL_TSC_Exported_Functions_Group1
- *  @brief    Initialization and Configuration functions 
- *
-@verbatim    
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Initialize and configure the TSC.
-      (+) De-initialize the TSC.
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the TSC peripheral according to the specified parameters 
-  *         in the TSC_InitTypeDef structure.           
-  * @param  htsc: TSC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc)
-{
-  /* Check TSC handle allocation */
-  if (htsc == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-  assert_param(IS_TSC_CTPH(htsc->Init.CTPulseHighLength));
-  assert_param(IS_TSC_CTPL(htsc->Init.CTPulseLowLength));
-  assert_param(IS_TSC_SS(htsc->Init.SpreadSpectrum));
-  assert_param(IS_TSC_SSD(htsc->Init.SpreadSpectrumDeviation));
-  assert_param(IS_TSC_SS_PRESC(htsc->Init.SpreadSpectrumPrescaler));
-  assert_param(IS_TSC_PG_PRESC(htsc->Init.PulseGeneratorPrescaler));
-  assert_param(IS_TSC_MCV(htsc->Init.MaxCountValue));
-  assert_param(IS_TSC_IODEF(htsc->Init.IODefaultMode));
-  assert_param(IS_TSC_SYNC_POL(htsc->Init.SynchroPinPolarity));
-  assert_param(IS_TSC_ACQ_MODE(htsc->Init.AcquisitionMode));
-  assert_param(IS_TSC_MCE_IT(htsc->Init.MaxCountInterrupt));
-
-  if(htsc->State == HAL_TSC_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    htsc->Lock = HAL_UNLOCKED;
-  }
-
-  /* Initialize the TSC state */
-  htsc->State = HAL_TSC_STATE_BUSY;
-
-  /* Init the low level hardware : GPIO, CLOCK, CORTEX */
-  HAL_TSC_MspInit(htsc);
-
-  /*--------------------------------------------------------------------------*/  
-  /* Set TSC parameters */
-
-  /* Enable TSC */
-  htsc->Instance->CR = TSC_CR_TSCE;
-  
-  /* Set all functions */
-  htsc->Instance->CR |= (htsc->Init.CTPulseHighLength |
-                         htsc->Init.CTPulseLowLength |
-                         (uint32_t)(htsc->Init.SpreadSpectrumDeviation << 17U) |
-                         htsc->Init.SpreadSpectrumPrescaler |
-                         htsc->Init.PulseGeneratorPrescaler |
-                         htsc->Init.MaxCountValue |
-                         htsc->Init.SynchroPinPolarity |
-                         htsc->Init.AcquisitionMode);
-
-  /* Spread spectrum */
-  if (htsc->Init.SpreadSpectrum == ENABLE)
-  {
-    htsc->Instance->CR |= TSC_CR_SSE;
-  }
-  
-  /* Disable Schmitt trigger hysteresis on all used TSC IOs */
-  htsc->Instance->IOHCR = (uint32_t)(~(htsc->Init.ChannelIOs | htsc->Init.ShieldIOs | htsc->Init.SamplingIOs));
-
-  /* Set channel and shield IOs */
-  htsc->Instance->IOCCR = (htsc->Init.ChannelIOs | htsc->Init.ShieldIOs);
-  
-  /* Set sampling IOs */
-  htsc->Instance->IOSCR = htsc->Init.SamplingIOs;
-  
-  /* Set the groups to be acquired */
-  htsc->Instance->IOGCSR = TSC_extract_groups(htsc->Init.ChannelIOs);
-  
-  /* Clear interrupts */
-  htsc->Instance->IER &= (uint32_t)(~(TSC_IT_EOA | TSC_IT_MCE));
-  
-  /* Clear flags */
-  htsc->Instance->ICR = (TSC_FLAG_EOA | TSC_FLAG_MCE);
-
-  /*--------------------------------------------------------------------------*/
-  
-  /* Initialize the TSC state */
-  htsc->State = HAL_TSC_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Deinitializes the TSC peripheral registers to their default reset values.
-  * @param  htsc: TSC handle  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TSC_DeInit(TSC_HandleTypeDef* htsc)
-{
-  /* Check TSC handle allocation */
-  if (htsc == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-   
-  /* Change TSC state */
-  htsc->State = HAL_TSC_STATE_BUSY;
- 
-  /* DeInit the low level hardware */
-  HAL_TSC_MspDeInit(htsc);
-  
-  /* Change TSC state */
-  htsc->State = HAL_TSC_STATE_RESET;
-
-  /* Process unlocked */
-  __HAL_UNLOCK(htsc);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TSC MSP.
-  * @param  htsc: pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.  
-  * @retval None
-  */
-__weak void HAL_TSC_MspInit(TSC_HandleTypeDef* htsc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htsc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_TSC_MspInit could be implemented in the user file.
-   */ 
-}
-
-/**
-  * @brief  DeInitializes the TSC MSP.
-  * @param  htsc: pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.  
-  * @retval None
-  */
-__weak void HAL_TSC_MspDeInit(TSC_HandleTypeDef* htsc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htsc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_TSC_MspDeInit could be implemented in the user file.
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup HAL_TSC_Exported_Functions_Group2
- *  @brief    IO operation functions 
- *
-@verbatim   
- ===============================================================================
-             ##### IO Operation functions #####
- ===============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Start acquisition in polling mode.
-      (+) Start acquisition in interrupt mode.
-      (+) Stop conversion in polling mode.
-      (+) Stop conversion in interrupt mode.
-      (+) Get group acquisition status.
-      (+) Get group acquisition value.
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Starts the acquisition.
-  * @param  htsc: pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TSC_Start(TSC_HandleTypeDef* htsc)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-  
-  /* Process locked */
-  __HAL_LOCK(htsc);
-  
-  /* Change TSC state */
-  htsc->State = HAL_TSC_STATE_BUSY;
-
-  /* Clear interrupts */
-  __HAL_TSC_DISABLE_IT(htsc, (TSC_IT_EOA | TSC_IT_MCE));
-
-  /* Clear flags */
-  __HAL_TSC_CLEAR_FLAG(htsc, (TSC_FLAG_EOA | TSC_FLAG_MCE));
-
-  /* Set touch sensing IOs not acquired to the specified IODefaultMode */
-  if (htsc->Init.IODefaultMode == TSC_IODEF_OUT_PP_LOW)
-  {
-    __HAL_TSC_SET_IODEF_OUTPPLOW(htsc);
-  }
-  else
-  {
-    __HAL_TSC_SET_IODEF_INFLOAT(htsc);
-  }
-  
-  /* Launch the acquisition */
-  __HAL_TSC_START_ACQ(htsc);
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(htsc);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enables the interrupt and starts the acquisition
-  * @param  htsc: pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval HAL status.
-  */
-HAL_StatusTypeDef HAL_TSC_Start_IT(TSC_HandleTypeDef* htsc)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-  assert_param(IS_TSC_MCE_IT(htsc->Init.MaxCountInterrupt));
-
-  /* Process locked */
-  __HAL_LOCK(htsc);
-  
-  /* Change TSC state */
-  htsc->State = HAL_TSC_STATE_BUSY;
-  
-  /* Enable end of acquisition interrupt */
-  __HAL_TSC_ENABLE_IT(htsc, TSC_IT_EOA);
-
-  /* Enable max count error interrupt (optional) */
-  if (htsc->Init.MaxCountInterrupt == ENABLE)
-  {
-    __HAL_TSC_ENABLE_IT(htsc, TSC_IT_MCE);
-  }
-  else
-  {
-    __HAL_TSC_DISABLE_IT(htsc, TSC_IT_MCE);
-  }
-
-  /* Clear flags */
-  __HAL_TSC_CLEAR_FLAG(htsc, (TSC_FLAG_EOA | TSC_FLAG_MCE));
-  
-  /* Set touch sensing IOs not acquired to the specified IODefaultMode */
-  if (htsc->Init.IODefaultMode == TSC_IODEF_OUT_PP_LOW)
-  {
-    __HAL_TSC_SET_IODEF_OUTPPLOW(htsc);
-  }
-  else
-  {
-    __HAL_TSC_SET_IODEF_INFLOAT(htsc);
-  }
-  
-  /* Launch the acquisition */
-  __HAL_TSC_START_ACQ(htsc);
-
-  /* Process unlocked */
-  __HAL_UNLOCK(htsc);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the acquisition previously launched in polling mode
-  * @param  htsc: pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TSC_Stop(TSC_HandleTypeDef* htsc)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-
-  /* Process locked */
-  __HAL_LOCK(htsc);
-  
-  /* Stop the acquisition */
-  __HAL_TSC_STOP_ACQ(htsc);
-
-  /* Set touch sensing IOs in low power mode (output push-pull) */
-  __HAL_TSC_SET_IODEF_OUTPPLOW(htsc);
-  
-  /* Clear flags */
-  __HAL_TSC_CLEAR_FLAG(htsc, (TSC_FLAG_EOA | TSC_FLAG_MCE));
-  
-  /* Change TSC state */
-  htsc->State = HAL_TSC_STATE_READY;
-
-  /* Process unlocked */
-  __HAL_UNLOCK(htsc);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the acquisition previously launched in interrupt mode
-  * @param  htsc: pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TSC_Stop_IT(TSC_HandleTypeDef* htsc)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-
-  /* Process locked */
-  __HAL_LOCK(htsc);
-  
-  /* Stop the acquisition */
-  __HAL_TSC_STOP_ACQ(htsc);
-  
-  /* Set touch sensing IOs in low power mode (output push-pull) */
-  __HAL_TSC_SET_IODEF_OUTPPLOW(htsc);
-  
-  /* Disable interrupts */
-  __HAL_TSC_DISABLE_IT(htsc, (TSC_IT_EOA | TSC_IT_MCE));
-
-  /* Clear flags */
-  __HAL_TSC_CLEAR_FLAG(htsc, (TSC_FLAG_EOA | TSC_FLAG_MCE));
-  
-  /* Change TSC state */
-  htsc->State = HAL_TSC_STATE_READY;
-
-  /* Process unlocked */
-  __HAL_UNLOCK(htsc);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Gets the acquisition status for a group
-  * @param  htsc: pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @param  gx_index: Index of the group
-  * @retval Group status
-  */
-TSC_GroupStatusTypeDef HAL_TSC_GroupGetStatus(TSC_HandleTypeDef* htsc, uint32_t gx_index)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-  assert_param(IS_TSC_GROUP_INDEX(gx_index));
-
-  /* Return the group status */ 
-  return(__HAL_TSC_GET_GROUP_STATUS(htsc, gx_index));
-}
-
-/**
-  * @brief  Gets the acquisition measure for a group
-  * @param  htsc: pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @param  gx_index: Index of the group
-  * @retval Acquisition measure
-  */
-uint32_t HAL_TSC_GroupGetValue(TSC_HandleTypeDef* htsc, uint32_t gx_index)
-{       
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-  assert_param(IS_TSC_GROUP_INDEX(gx_index));
-
-  /* Return the group acquisition counter */ 
-  return htsc->Instance->IOGXCR[gx_index];
-}
-
-/**
-  * @}
-  */
-  
-/** @addtogroup HAL_TSC_Exported_Functions_Group3
- *  @brief    Peripheral Control functions 
- *
-@verbatim   
- ===============================================================================
-             ##### Peripheral Control functions #####
- ===============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Configure TSC IOs
-      (+) Discharge TSC IOs
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Configures TSC IOs
-  * @param  htsc: pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @param  config: pointer to the configuration structure.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TSC_IOConfig(TSC_HandleTypeDef* htsc, TSC_IOConfigTypeDef* config)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
- 
-  /* Process locked */
-  __HAL_LOCK(htsc);
-
-  /* Stop acquisition */
-  __HAL_TSC_STOP_ACQ(htsc);
-
-  /* Disable Schmitt trigger hysteresis on all used TSC IOs */
-  htsc->Instance->IOHCR = (uint32_t)(~(config->ChannelIOs | config->ShieldIOs | config->SamplingIOs));
-
-  /* Set channel and shield IOs */
-  htsc->Instance->IOCCR = (config->ChannelIOs | config->ShieldIOs);
-  
-  /* Set sampling IOs */
-  htsc->Instance->IOSCR = config->SamplingIOs;
-  
-  /* Set groups to be acquired */
-  htsc->Instance->IOGCSR = TSC_extract_groups(config->ChannelIOs);
-    
-  /* Process unlocked */
-  __HAL_UNLOCK(htsc);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Discharge TSC IOs
-  * @param  htsc: pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @param  choice: enable or disable
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TSC_IODischarge(TSC_HandleTypeDef* htsc, uint32_t choice)
-{       
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-
-  /* Process locked */
-  __HAL_LOCK(htsc);
-  
-  if (choice == ENABLE)
-  {
-    __HAL_TSC_SET_IODEF_OUTPPLOW(htsc);
-  }
-  else
-  {
-    __HAL_TSC_SET_IODEF_INFLOAT(htsc);
-  }
-
-  /* Process unlocked */
-  __HAL_UNLOCK(htsc);
-  
-  /* Return the group acquisition counter */ 
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup HAL_TSC_Exported_Functions_Group4
- *  @brief   State functions 
- *
-@verbatim   
- ===============================================================================
-            ##### State functions #####
- ===============================================================================  
-    [..]
-    This subsection provides functions allowing to
-      (+) Get TSC state.
-      (+) Poll for acquisition completed.
-      (+) Handles TSC interrupt request.
-         
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the TSC state
-  * @param  htsc: pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval HAL state
-  */
-HAL_TSC_StateTypeDef HAL_TSC_GetState(TSC_HandleTypeDef* htsc)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-  
-  if (htsc->State == HAL_TSC_STATE_BUSY)
-  {
-    /* Check end of acquisition flag */
-    if (__HAL_TSC_GET_FLAG(htsc, TSC_FLAG_EOA) != RESET)
-    {
-      /* Check max count error flag */
-      if (__HAL_TSC_GET_FLAG(htsc, TSC_FLAG_MCE) != RESET)
-      {
-        /* Change TSC state */
-        htsc->State = HAL_TSC_STATE_ERROR;
-      }
-      else
-      {
-        /* Change TSC state */
-        htsc->State = HAL_TSC_STATE_READY;
-      }
-    }
-  }
-  
-  /* Return TSC state */
-  return htsc->State;
-}
-
-/**
-  * @brief  Start acquisition and wait until completion
-  * @note   There is no need of a timeout parameter as the max count error is already
-  *         managed by the TSC peripheral.
-  * @param  htsc: pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval HAL state
-  */
-HAL_StatusTypeDef HAL_TSC_PollForAcquisition(TSC_HandleTypeDef* htsc)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-
-  /* Process locked */
-  __HAL_LOCK(htsc);
-  
-  /* Check end of acquisition */
-  while (HAL_TSC_GetState(htsc) == HAL_TSC_STATE_BUSY)
-  {
-    /* The timeout (max count error) is managed by the TSC peripheral itself. */
-  }
-
-  /* Process unlocked */
-  __HAL_UNLOCK(htsc);
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handles TSC interrupt request  
-  * @param  htsc: pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval None
-  */
-void HAL_TSC_IRQHandler(TSC_HandleTypeDef* htsc)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-
-  /* Check if the end of acquisition occured */
-  if (__HAL_TSC_GET_FLAG(htsc, TSC_FLAG_EOA) != RESET)
-  {
-    /* Clear EOA flag */
-    __HAL_TSC_CLEAR_FLAG(htsc, TSC_FLAG_EOA);
-  }
-  
-  /* Check if max count error occured */
-  if (__HAL_TSC_GET_FLAG(htsc, TSC_FLAG_MCE) != RESET)
-  {
-    /* Clear MCE flag */
-    __HAL_TSC_CLEAR_FLAG(htsc, TSC_FLAG_MCE);
-    /* Change TSC state */
-    htsc->State = HAL_TSC_STATE_ERROR;
-    /* Conversion completed callback */
-    HAL_TSC_ErrorCallback(htsc);
-  }
-  else
-  {
-    /* Change TSC state */
-    htsc->State = HAL_TSC_STATE_READY;
-    /* Conversion completed callback */
-    HAL_TSC_ConvCpltCallback(htsc);
-  }
-}
-
-/**
-  * @brief  Acquisition completed callback in non blocking mode 
-  * @param  htsc: pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval None
-  */
-__weak void HAL_TSC_ConvCpltCallback(TSC_HandleTypeDef* htsc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htsc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_TSC_ConvCpltCallback could be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Error callback in non blocking mode
-  * @param  htsc: pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval None
-  */
-__weak void HAL_TSC_ErrorCallback(TSC_HandleTypeDef* htsc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htsc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_TSC_ErrorCallback could be implemented in the user file.
-   */
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup TSC_Private
-  * @{
-  */
-
-/**
-  * @brief  Utility function used to set the acquired groups mask
-  * @param  iomask: Channels IOs mask
-  * @retval Acquired groups mask
-  */
-static uint32_t TSC_extract_groups(uint32_t iomask)
-{
-  uint32_t groups = 0U;
-  uint32_t idx;
-  
-  for (idx = 0U; idx < TSC_NB_OF_GROUPS; idx++)
-  {
-    if ((iomask & ((uint32_t)0x0FU << (idx * 4U))) != RESET)
-    {
-      groups |= ((uint32_t)1U << idx);
-    }
-  }
-  
-  return groups;
-}
-
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-#endif /* HAL_TSC_MODULE_ENABLED */
-#endif /* #if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c
deleted file mode 100755
index 964fc4c4..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c
+++ /dev/null
@@ -1,2874 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_uart.c
-  * @author  MCD Application Team
-  * @brief   UART HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART).
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral Control functions
-  *
-  *
-  @verbatim
- ===============================================================================
-                        ##### How to use this driver #####
- ===============================================================================
-  [..]
-    The UART HAL driver can be used as follows:
-
-    (#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart).
-    (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
-        (++) Enable the USARTx interface clock.
-        (++) UART pins configuration:
-            (+++) Enable the clock for the UART GPIOs.
-            (+++) Configure these UART pins as alternate function pull-up.
-        (++) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
-             and HAL_UART_Receive_IT() APIs):
-            (+++) Configure the USARTx interrupt priority.
-            (+++) Enable the NVIC USART IRQ handle.
-        (++) UART interrupts handling:
-              -@@-  The specific UART interrupts (Transmission complete interrupt,
-                RXNE interrupt and Error Interrupts) are managed using the macros
-                __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() inside the transmit and receive processes.
-        (++) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
-             and HAL_UART_Receive_DMA() APIs):
-            (+++) Declare a DMA handle structure for the Tx/Rx channel.
-            (+++) Enable the DMAx interface clock.
-            (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
-            (+++) Configure the DMA Tx/Rx channel.
-            (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
-            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
-
-    (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
-        flow control and Mode (Receiver/Transmitter) in the huart handle Init structure.
-
-    (#) If required, program UART advanced features (TX/RX pins swap, auto Baud rate detection,...)
-        in the huart handle AdvancedInit structure.
-
-    (#) For the UART asynchronous mode, initialize the UART registers by calling
-        the HAL_UART_Init() API.
-
-    (#) For the UART Half duplex mode, initialize the UART registers by calling
-        the HAL_HalfDuplex_Init() API.
-
-    (#) For the UART LIN (Local Interconnection Network) mode, initialize the UART registers
-        by calling the HAL_LIN_Init() API.
-
-    (#) For the UART Multiprocessor mode, initialize the UART registers
-        by calling the HAL_MultiProcessor_Init() API.
-
-    (#) For the UART RS485 Driver Enabled mode, initialize the UART registers
-        by calling the HAL_RS485Ex_Init() API.
-
-    [..]
-    (@) These API's (HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init(), HAL_MultiProcessor_Init(),
-        also configure the low level Hardware GPIO, CLOCK, CORTEX...etc) by
-        calling the customized HAL_UART_MspInit() API.
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup UART UART
-  * @brief HAL UART module driver
-  * @{
-  */
-
-#ifdef HAL_UART_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup UART_Private_Constants UART Private Constants
-  * @{
-  */
-#define UART_CR1_FIELDS  ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \
-                                     USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8)) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */
-
-#define UART_LPUART_BRR_MIN           ((uint32_t)0x00000300)  /* LPUART BRR minimum authorized value */
-#define UART_LPUART_BRR_MAX           ((uint32_t)0x000FFFFF)  /* LPUART BRR maximum authorized value */                                                                      
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup UART_Private_Functions
-  * @{
-  */
-static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
-static void UART_EndRxTransfer(UART_HandleTypeDef *huart);
-static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
-static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
-static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
-static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
-static void UART_DMAError(DMA_HandleTypeDef *hdma);
-static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
-static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
-static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
-static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
-static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
-static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
-static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
-static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup UART_Exported_Functions UART Exported Functions
-  * @{
-  */
-
-/** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
-  *  @brief    Initialization and Configuration functions
-  *
-@verbatim
-===============================================================================
-            ##### Initialization and Configuration functions #####
- ===============================================================================
-    [..]
-    This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
-    in asynchronous mode.
-      (+) For the asynchronous mode the parameters below can be configured:
-        (++) Baud Rate
-        (++) Word Length
-        (++) Stop Bit
-        (++) Parity: If the parity is enabled, then the MSB bit of the data written
-             in the data register is transmitted but is changed by the parity bit.
-        (++) Hardware flow control
-        (++) Receiver/transmitter modes
-        (++) Over Sampling Method
-        (++) One-Bit Sampling Method
-      (+) For the asynchronous mode, the following advanced features can be configured as well:
-        (++) TX and/or RX pin level inversion
-        (++) data logical level inversion
-        (++) RX and TX pins swap
-        (++) RX overrun detection disabling
-        (++) DMA disabling on RX error
-        (++) MSB first on communication line
-        (++) auto Baud rate detection
-    [..]
-    The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init()and HAL_MultiProcessor_Init()API
-    follow respectively the UART asynchronous, UART Half duplex, UART LIN mode
-    and UART multiprocessor mode configuration procedures (details for the procedures
-    are available in reference manual).
-
-@endverbatim
-
-  Depending on the frame length defined by the M1 and M0 bits (7-bit, 
-  8-bit or 9-bit), the possible UART formats are listed in the 
-  following table.
-  
-  Table 1. UART frame format.
-    +-----------------------------------------------------------------------+
-    |  M1 bit |  M0 bit |  PCE bit  |             UART frame                |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    0    |    0      |    | SB |    8 bit data   | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    0    |    1      |    | SB | 7 bit data | PB | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    1    |    0      |    | SB |    9 bit data   | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    1    |    1      |    | SB | 8 bit data | PB | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    1    |    0    |    0      |    | SB |    7 bit data   | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    1    |    0    |    1      |    | SB | 6 bit data | PB | STB |     |
-    +-----------------------------------------------------------------------+
-
-  * @{
-  */
-
-/**
-  * @brief Initialize the UART mode according to the specified
-  *        parameters in the UART_InitTypeDef and initialize the associated handle.
-  * @param huart: UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
-{
-  /* Check the UART handle allocation */
-  if(huart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  if(huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
-  {
-    /* Check the parameters */
-    assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
-  }
-  else
-  {
-    /* Check the parameters */
-    assert_param(IS_UART_INSTANCE(huart->Instance));
-  }
-
-  if(huart->gState == HAL_UART_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    huart->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK */
-    HAL_UART_MspInit(huart);
-  }
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_UART_DISABLE(huart);
-
-  /* Set the UART Communication parameters */
-  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
-  {
-    UART_AdvFeatureConfig(huart);
-  }
-
-  if (UART_SetConfig(huart) == HAL_ERROR)
-  {
-    return HAL_ERROR;
-  }
-
-  /* In asynchronous mode, the following bits must be kept cleared:
-  - LINEN and CLKEN bits in the USART_CR2 register,
-  - SCEN, HDSEL and IREN  bits in the USART_CR3 register.*/
-  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
-  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
-
-  /* Enable the Peripheral */
-  __HAL_UART_ENABLE(huart);
-
-  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
-  return (UART_CheckIdleState(huart));
-}
-
-/**
-  * @brief Initialize the half-duplex mode according to the specified
-  *        parameters in the UART_InitTypeDef and creates the associated handle.
-  * @param huart: UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
-{
-  /* Check the UART handle allocation */
-  if(huart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check UART instance */
-  assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
-
-  if(huart->gState == HAL_UART_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    huart->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK */
-    HAL_UART_MspInit(huart);
-  }
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_UART_DISABLE(huart);
-
-  /* Set the UART Communication parameters */
-  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
-  {
-    UART_AdvFeatureConfig(huart);
-  }
-
-  if (UART_SetConfig(huart) == HAL_ERROR)
-  {
-    return HAL_ERROR;
-  }
-
-  /* In half-duplex mode, the following bits must be kept cleared:
-  - LINEN and CLKEN bits in the USART_CR2 register,
-  - SCEN and IREN bits in the USART_CR3 register.*/
-  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
-  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN));
-
-  /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
-  SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
-
-  /* Enable the Peripheral */
-  __HAL_UART_ENABLE(huart);
-
-  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
-  return (UART_CheckIdleState(huart));
-}
-
-
-/**
-  * @brief Initialize the LIN mode according to the specified
-  *        parameters in the UART_InitTypeDef and creates the associated handle .
-  * @param huart: UART handle.
-  * @param BreakDetectLength: specifies the LIN break detection length.
-  *        This parameter can be one of the following values:
-  *          @arg @ref UART_LINBREAKDETECTLENGTH_10B 10-bit break detection
-  *          @arg @ref UART_LINBREAKDETECTLENGTH_11B 11-bit break detection
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
-{
-  /* Check the UART handle allocation */
-  if(huart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the LIN UART instance */
-  assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
-  /* Check the Break detection length parameter */
-  assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
-
-  /* LIN mode limited to 16-bit oversampling only */
-  if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
-  {
-    return HAL_ERROR;
-  }
-  /* LIN mode limited to 8-bit data length */
-  if(huart->Init.WordLength != UART_WORDLENGTH_8B)
-  {
-    return HAL_ERROR;
-  }
-
-  if(huart->gState == HAL_UART_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    huart->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK */
-    HAL_UART_MspInit(huart);
-  }
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_UART_DISABLE(huart);
-
-  /* Set the UART Communication parameters */
-  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
-  {
-    UART_AdvFeatureConfig(huart);
-  }
-
-  if (UART_SetConfig(huart) == HAL_ERROR)
-  {
-    return HAL_ERROR;
-  }
-
-  /* In LIN mode, the following bits must be kept cleared:
-  - LINEN and CLKEN bits in the USART_CR2 register,
-  - SCEN and IREN bits in the USART_CR3 register.*/
-  CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
-  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN));
-
-  /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
-  SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
-
-  /* Set the USART LIN Break detection length. */
-  MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength);
-
-  /* Enable the Peripheral */
-  __HAL_UART_ENABLE(huart);
-
-  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
-  return (UART_CheckIdleState(huart));
-}
-
-
-/**
-  * @brief Initialize the multiprocessor mode according to the specified
-  *        parameters in the UART_InitTypeDef and initialize the associated handle.
-  * @param huart: UART handle.
-  * @param Address: UART node address (4-, 6-, 7- or 8-bit long).
-  * @param WakeUpMethod: specifies the UART wakeup method.
-  *        This parameter can be one of the following values:
-  *          @arg @ref UART_WAKEUPMETHOD_IDLELINE WakeUp by an idle line detection
-  *          @arg @ref UART_WAKEUPMETHOD_ADDRESSMARK WakeUp by an address mark
-  * @note  If the user resorts to idle line detection wake up, the Address parameter
-  *        is useless and ignored by the initialization function.
-  * @note  If the user resorts to address mark wake up, the address length detection
-  *        is configured by default to 4 bits only. For the UART to be able to
-  *        manage 6-, 7- or 8-bit long addresses detection, the API
-  *        HAL_MultiProcessorEx_AddressLength_Set() must be called after
-  *        HAL_MultiProcessor_Init().
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
-{
-  /* Check the UART handle allocation */
-  if(huart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the wake up method parameter */
-  assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
-
-  if(huart->gState == HAL_UART_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    huart->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK */
-    HAL_UART_MspInit(huart);
-  }
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_UART_DISABLE(huart);
-
-  /* Set the UART Communication parameters */
-  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
-  {
-    UART_AdvFeatureConfig(huart);
-  }
-
-  if (UART_SetConfig(huart) == HAL_ERROR)
-  {
-    return HAL_ERROR;
-  }
-
-  /* In multiprocessor mode, the following bits must be kept cleared:
-  - LINEN and CLKEN bits in the USART_CR2 register,
-  - SCEN, HDSEL and IREN  bits in the USART_CR3 register. */
-  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
-  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
-
-  if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK)
-  {
-    /* If address mark wake up method is chosen, set the USART address node */
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS));
-  }
-
-  /* Set the wake up method by setting the WAKE bit in the CR1 register */
-  MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
-
-  /* Enable the Peripheral */
-  __HAL_UART_ENABLE(huart);
-
-  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
-  return (UART_CheckIdleState(huart));
-}
-
-
-/**
-  * @brief DeInitialize the UART peripheral.
-  * @param huart: UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
-{
-  /* Check the UART handle allocation */
-  if(huart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_UART_INSTANCE(huart->Instance));
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_UART_DISABLE(huart);
-
-  huart->Instance->CR1 = 0x0U;
-  huart->Instance->CR2 = 0x0U;
-  huart->Instance->CR3 = 0x0U;
-
-  /* DeInit the low level hardware */
-  HAL_UART_MspDeInit(huart);
-
-  huart->ErrorCode = HAL_UART_ERROR_NONE;
-  huart->gState    = HAL_UART_STATE_RESET;
-  huart->RxState   = HAL_UART_STATE_RESET;
-
-  /* Process Unlock */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Initialize the UART MSP.
-  * @param huart: UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_MspInit can be implemented in the user file
-   */
-}
-
-/**
-  * @brief DeInitialize the UART MSP.
-  * @param huart: UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_MspDeInit can be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup UART_Exported_Functions_Group2 IO operation functions
-  * @brief UART Transmit/Receive functions
-  *
-@verbatim
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
-    This subsection provides a set of functions allowing to manage the UART asynchronous
-    and Half duplex data transfers.
-
-    (#) There are two mode of transfer:
-       (+) Blocking mode: The communication is performed in polling mode.
-           The HAL status of all data processing is returned by the same function
-           after finishing transfer.
-       (+) Non-Blocking mode: The communication is performed using Interrupts
-           or DMA, These API's return the HAL status.
-           The end of the data processing will be indicated through the
-           dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
-           using DMA mode.
-           The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
-           will be executed respectively at the end of the transmit or Receive process
-           The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected
-
-    (#) Blocking mode API's are :
-        (+) HAL_UART_Transmit()
-        (+) HAL_UART_Receive()
-
-    (#) Non-Blocking mode API's with Interrupt are :
-        (+) HAL_UART_Transmit_IT()
-        (+) HAL_UART_Receive_IT()
-        (+) HAL_UART_IRQHandler()
-
-    (#) Non-Blocking mode API's with DMA are :
-        (+) HAL_UART_Transmit_DMA()
-        (+) HAL_UART_Receive_DMA()
-        (+) HAL_UART_DMAPause()
-        (+) HAL_UART_DMAResume()
-        (+) HAL_UART_DMAStop()
-
-    (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode:
-        (+) HAL_UART_TxHalfCpltCallback()
-        (+) HAL_UART_TxCpltCallback()
-        (+) HAL_UART_RxHalfCpltCallback()
-        (+) HAL_UART_RxCpltCallback()
-        (+) HAL_UART_ErrorCallback()
-
-    (#) Non-Blocking mode transfers could be aborted using Abort API's :
-        (+) HAL_UART_Abort()
-        (+) HAL_UART_AbortTransmit()
-        (+) HAL_UART_AbortReceive()
-        (+) HAL_UART_Abort_IT()
-        (+) HAL_UART_AbortTransmit_IT()
-        (+) HAL_UART_AbortReceive_IT()
-
-    (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided:
-        (+) HAL_UART_AbortCpltCallback()
-        (+) HAL_UART_AbortTransmitCpltCallback()
-        (+) HAL_UART_AbortReceiveCpltCallback()
-
-    (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
-        Errors are handled as follows :
-       (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is 
-           to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception .
-           Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type,
-           and HAL_UART_ErrorCallback() user callback is executed. Transfer is kept ongoing on UART side.
-           If user wants to abort it, Abort services should be called by user.
-       (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
-           This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
-           Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() user callback is executed.
-
-    -@- In the Half duplex communication, it is forbidden to run the transmit
-        and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Send an amount of data in blocking mode.
-  * @param huart: UART handle.
-  * @param pData: Pointer to data buffer.
-  * @param Size: Amount of data to be sent.
-  * @param Timeout: Timeout duration.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint16_t* tmp;
-  uint32_t tickstart = 0;
-
-  /* Check that a Tx process is not already ongoing */
-  if(huart->gState == HAL_UART_STATE_READY)
-  {
-    if((pData == NULL ) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(huart);
-
-    huart->ErrorCode = HAL_UART_ERROR_NONE;
-    huart->gState = HAL_UART_STATE_BUSY_TX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    huart->TxXferSize = Size;
-    huart->TxXferCount = Size;
-    while(huart->TxXferCount > 0U)
-    {
-      huart->TxXferCount--;
-      if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-      {
-        tmp = (uint16_t*) pData;
-        huart->Instance->TDR = (*tmp & (uint16_t)0x01FFU);
-        pData += 2U;
-      }
-      else
-      {
-        huart->Instance->TDR = (*pData++ & (uint8_t)0xFFU);
-      }
-    }
-    if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    /* At end of Tx process, restore huart->gState to Ready */
-    huart->gState = HAL_UART_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(huart);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Receive an amount of data in blocking mode.
-  * @param huart: UART handle.
-  * @param pData: pointer to data buffer.
-  * @param Size: amount of data to be received.
-  * @param Timeout: Timeout duration.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
-  *         (as received data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint16_t* tmp;
-  uint16_t uhMask;
-  uint32_t tickstart = 0;
-
-  /* Check that a Rx process is not already ongoing */
-  if(huart->RxState == HAL_UART_STATE_READY)
-  {
-    if((pData == NULL ) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be received from RDR will be 
-       handled through a u16 cast. */
-    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(huart);
-
-    huart->ErrorCode = HAL_UART_ERROR_NONE;
-    huart->RxState = HAL_UART_STATE_BUSY_RX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    huart->RxXferSize = Size;
-    huart->RxXferCount = Size;
-
-    /* Computation of UART mask to apply to RDR register */
-    UART_MASK_COMPUTATION(huart);
-    uhMask = huart->Mask;
-
-    /* as long as data have to be received */
-    while(huart->RxXferCount > 0U)
-    {
-      huart->RxXferCount--;
-      if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-      {
-        tmp = (uint16_t*) pData ;
-        *tmp = (uint16_t)(huart->Instance->RDR & uhMask);
-        pData +=2U;
-      }
-      else
-      {
-        *pData++ = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
-      }
-    }
-
-    /* At end of Rx process, restore huart->RxState to Ready */
-    huart->RxState = HAL_UART_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(huart);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Send an amount of data in interrupt mode.
-  * @param huart: UART handle.
-  * @param pData: pointer to data buffer.
-  * @param Size: amount of data to be sent.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Tx process is not already ongoing */
-  if(huart->gState == HAL_UART_STATE_READY)
-  {
-    if((pData == NULL ) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(huart);
-
-    huart->pTxBuffPtr = pData;
-    huart->TxXferSize = Size;
-    huart->TxXferCount = Size;
-
-    huart->ErrorCode = HAL_UART_ERROR_NONE;
-    huart->gState = HAL_UART_STATE_BUSY_TX;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(huart);
-
-    /* Enable the UART Transmit Data Register Empty Interrupt */
-    SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Receive an amount of data in interrupt mode.
-  * @param huart: UART handle.
-  * @param pData: pointer to data buffer.
-  * @param Size: amount of data to be received.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Rx process is not already ongoing */
-  if(huart->RxState == HAL_UART_STATE_READY)
-  {
-    if((pData == NULL ) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be received from RDR will be 
-       handled through a u16 cast. */
-    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(huart);
-
-    huart->pRxBuffPtr = pData;
-    huart->RxXferSize = Size;
-    huart->RxXferCount = Size;
-
-    /* Computation of UART mask to apply to RDR register */
-    UART_MASK_COMPUTATION(huart);
-
-    huart->ErrorCode = HAL_UART_ERROR_NONE;
-    huart->RxState = HAL_UART_STATE_BUSY_RX;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(huart);
-
-    /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the UART Parity Error and Data Register not empty Interrupts */
-    SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Send an amount of data in DMA mode.
-  * @param huart: UART handle.
-  * @param pData: pointer to data buffer.
-  * @param Size: amount of data to be sent.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Tx process is not already ongoing */
-  if(huart->gState == HAL_UART_STATE_READY)
-  {
-    if((pData == NULL ) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data copy into TDR will be 
-       handled by DMA from a u16 frontier. */
-    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(huart);
-
-    huart->pTxBuffPtr = pData;
-    huart->TxXferSize = Size;
-    huart->TxXferCount = Size;
-
-    huart->ErrorCode = HAL_UART_ERROR_NONE;
-    huart->gState = HAL_UART_STATE_BUSY_TX;
-
-    /* Set the UART DMA transfer complete callback */
-    huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
-
-    /* Set the UART DMA Half transfer complete callback */
-    huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
-
-    /* Set the DMA error callback */
-    huart->hdmatx->XferErrorCallback = UART_DMAError;
-
-    /* Set the DMA abort callback */
-    huart->hdmatx->XferAbortCallback = NULL;
-
-    /* Enable the UART transmit DMA channel */
-    HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size);
-
-    /* Clear the TC flag in the ICR register */
-    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(huart);
-
-    /* Enable the DMA transfer for transmit request by setting the DMAT bit
-       in the UART CR3 register */
-    SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Receive an amount of data in DMA mode.
-  * @param huart: UART handle.
-  * @param pData: pointer to data buffer.
-  * @param Size: amount of data to be received.
-  * @note   When the UART parity is enabled (PCE = 1) the data received contain the parity bit.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Rx process is not already ongoing */
-  if(huart->RxState == HAL_UART_STATE_READY)
-  {
-    if((pData == NULL ) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data copy from RDR will be 
-       handled by DMA from a u16 frontier. */
-    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(huart);
-
-    huart->pRxBuffPtr = pData;
-    huart->RxXferSize = Size;
-
-    huart->ErrorCode = HAL_UART_ERROR_NONE;
-    huart->RxState = HAL_UART_STATE_BUSY_RX;
-
-    /* Set the UART DMA transfer complete callback */
-    huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
-
-    /* Set the UART DMA Half transfer complete callback */
-    huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
-
-    /* Set the DMA error callback */
-    huart->hdmarx->XferErrorCallback = UART_DMAError;
-
-    /* Set the DMA abort callback */
-    huart->hdmarx->XferAbortCallback = NULL;
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(huart);
-
-    /* Enable the UART Parity Error Interrupt */
-    SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
-
-    /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the DMA transfer for the receiver request by setting the DMAR bit
-       in the UART CR3 register */
-    SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Pause the DMA Transfer.
-  * @param huart: UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
-{
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  if ((huart->gState == HAL_UART_STATE_BUSY_TX) &&
-      (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)))
-  {
-    /* Disable the UART DMA Tx request */
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-  }
-  if ((huart->RxState == HAL_UART_STATE_BUSY_RX) &&
-      (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)))
-  {
-    /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-    CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-    /* Disable the UART DMA Rx request */
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Resume the DMA Transfer.
-  * @param huart: UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
-{
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  if(huart->gState == HAL_UART_STATE_BUSY_TX)
-  {
-    /* Enable the UART DMA Tx request */
-    SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-  }
-  if(huart->RxState == HAL_UART_STATE_BUSY_RX)
-  {
-    /* Clear the Overrun flag before resuming the Rx transfer */
-    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
-
-    /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
-    SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
-    SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the UART DMA Rx request */
-    SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Stop the DMA Transfer.
-  * @param huart: UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
-{
-  /* The Lock is not implemented on this API to allow the user application
-     to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() /
-     HAL_UART_TxHalfCpltCallback / HAL_UART_RxHalfCpltCallback: 
-     indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete  
-     interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of 
-     the stream and the corresponding call back is executed. */
-
-  /* Stop UART DMA Tx request if ongoing */
-  if ((huart->gState == HAL_UART_STATE_BUSY_TX) &&
-      (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the UART DMA Tx channel */
-    if(huart->hdmatx != NULL)
-    {
-      HAL_DMA_Abort(huart->hdmatx);
-    }
-
-    UART_EndTxTransfer(huart);
-  }
-
-  /* Stop UART DMA Rx request if ongoing */
-  if ((huart->RxState == HAL_UART_STATE_BUSY_RX) &&
-      (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the UART DMA Rx channel */
-    if(huart->hdmarx != NULL)
-    {
-      HAL_DMA_Abort(huart->hdmarx);
-    }
-
-    UART_EndRxTransfer(huart);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing transfers (blocking mode).
-  * @param  huart UART handle.
-  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable UART Interrupts (Tx and Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
-{
-  /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
-  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the UART DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
-    if(huart->hdmatx != NULL)
-    {
-      /* Set the UART DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      huart->hdmatx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(huart->hdmatx);
-    }
-  }
-
-  /* Disable the UART DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
-    if(huart->hdmarx != NULL)
-    {
-      /* Set the UART DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      huart->hdmarx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(huart->hdmarx);
-    }
-  }
-
-  /* Reset Tx and Rx transfer counters */
-  huart->TxXferCount = 0; 
-  huart->RxXferCount = 0; 
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
-
-  /* Restore huart->gState and huart->RxState to Ready */
-  huart->gState  = HAL_UART_STATE_READY;
-  huart->RxState = HAL_UART_STATE_READY;
-
-  /* Reset Handle ErrorCode to No Error */
-  huart->ErrorCode = HAL_UART_ERROR_NONE;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Transmit transfer (blocking mode).
-  * @param  huart UART handle.
-  * @note   This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable UART Interrupts (Tx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-  /* Disable the UART DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
-    if(huart->hdmatx != NULL)
-    {
-      /* Set the UART DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      huart->hdmatx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(huart->hdmatx);
-    }
-  }
-
-  /* Reset Tx transfer counter */
-  huart->TxXferCount = 0; 
-
-  /* Restore huart->gState to Ready */
-  huart->gState = HAL_UART_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Receive transfer (blocking mode).
-  * @param  huart UART handle.
-  * @note   This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable UART Interrupts (Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
-{
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the UART DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
-    if(huart->hdmarx != NULL)
-    {
-      /* Set the UART DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      huart->hdmarx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(huart->hdmarx);
-    }
-  }
-
-  /* Reset Rx transfer counter */
-  huart->RxXferCount = 0; 
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
-
-  /* Restore huart->RxState to Ready */
-  huart->RxState = HAL_UART_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing transfers (Interrupt mode).
-  * @param  huart UART handle.
-  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable UART Interrupts (Tx and Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
-{
-  uint32_t abortcplt = 1;
-  
-  /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
-  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-  /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised
-     before any call to DMA Abort functions */
-  /* DMA Tx Handle is valid */
-  if(huart->hdmatx != NULL)
-  {
-    /* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
-       Otherwise, set it to NULL */
-    if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
-    {
-      huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback;
-    }
-    else
-    {
-      huart->hdmatx->XferAbortCallback = NULL;
-    }
-  }
-  /* DMA Rx Handle is valid */
-  if(huart->hdmarx != NULL)
-  {
-    /* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
-       Otherwise, set it to NULL */
-    if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
-    {
-      huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback;
-    }
-    else
-    {
-      huart->hdmarx->XferAbortCallback = NULL;
-    }
-  }
-  
-  /* Disable the UART DMA Tx request if enabled */
-  if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
-  {
-    /* Disable DMA Tx at UART level */
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
-    if(huart->hdmatx != NULL)
-    {
-      /* UART Tx DMA Abort callback has already been initialised : 
-         will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
-
-      /* Abort DMA TX */
-      if(HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
-      {
-        huart->hdmatx->XferAbortCallback = NULL;
-      }
-      else
-      {
-        abortcplt = 0;
-      }
-    }
-  }
-
-  /* Disable the UART DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
-    if(huart->hdmarx != NULL)
-    {
-      /* UART Rx DMA Abort callback has already been initialised : 
-         will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
-
-      /* Abort DMA RX */
-      if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
-      {
-        huart->hdmarx->XferAbortCallback = NULL;
-        abortcplt = 1;
-      }
-      else
-      {
-        abortcplt = 0;
-      }
-    }
-  }
-
-  /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
-  if (abortcplt == 1)
-  {
-    /* Reset Tx and Rx transfer counters */
-    huart->TxXferCount = 0; 
-    huart->RxXferCount = 0;
-
-    /* Reset errorCode */
-    huart->ErrorCode = HAL_UART_ERROR_NONE;
-
-    /* Clear the Error flags in the ICR register */
-    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
-
-    /* Restore huart->gState and huart->RxState to Ready */
-    huart->gState  = HAL_UART_STATE_READY;
-    huart->RxState = HAL_UART_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_UART_AbortCpltCallback(huart);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Transmit transfer (Interrupt mode).
-  * @param  huart UART handle.
-  * @note   This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable UART Interrupts (Tx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-  /* Disable the UART DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
-    if(huart->hdmatx != NULL)
-    {
-      /* Set the UART DMA Abort callback : 
-         will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
-      huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback;
-
-      /* Abort DMA TX */
-      if(HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
-      {
-        /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */
-        huart->hdmatx->XferAbortCallback(huart->hdmatx);
-      }
-    }
-    else
-    {
-      /* Reset Tx transfer counter */
-      huart->TxXferCount = 0; 
-
-      /* Restore huart->gState to Ready */
-      huart->gState = HAL_UART_STATE_READY;
-
-      /* As no DMA to be aborted, call directly user Abort complete callback */
-      HAL_UART_AbortTransmitCpltCallback(huart);
-    }
-  }
-  else
-  {
-    /* Reset Tx transfer counter */
-    huart->TxXferCount = 0; 
-
-    /* Restore huart->gState to Ready */
-    huart->gState = HAL_UART_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_UART_AbortTransmitCpltCallback(huart);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Receive transfer (Interrupt mode).
-  * @param  huart UART handle.
-  * @note   This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable UART Interrupts (Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
-{
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the UART DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
-    if(huart->hdmarx != NULL)
-    {
-      /* Set the UART DMA Abort callback : 
-         will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
-      huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback;
-
-      /* Abort DMA RX */
-      if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
-      {
-        /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
-        huart->hdmarx->XferAbortCallback(huart->hdmarx);
-      }
-    }
-    else
-    {
-      /* Reset Rx transfer counter */
-      huart->RxXferCount = 0; 
-
-      /* Clear the Error flags in the ICR register */
-      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
-
-      /* Restore huart->RxState to Ready */
-      huart->RxState = HAL_UART_STATE_READY;
-
-      /* As no DMA to be aborted, call directly user Abort complete callback */
-      HAL_UART_AbortReceiveCpltCallback(huart);
-    }
-  }
-  else
-  {
-    /* Reset Rx transfer counter */
-    huart->RxXferCount = 0; 
-
-    /* Clear the Error flags in the ICR register */
-    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
-
-    /* Restore huart->RxState to Ready */
-    huart->RxState = HAL_UART_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_UART_AbortReceiveCpltCallback(huart);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Handle UART interrupt request.
-  * @param huart: UART handle.
-  * @retval None
-  */
-void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
-{
-  uint32_t isrflags   = READ_REG(huart->Instance->ISR);
-  uint32_t cr1its     = READ_REG(huart->Instance->CR1);
-  uint32_t cr3its;
-  uint32_t errorflags;
-
-  /* If no error occurs */
-  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
-  if (errorflags == RESET)
-  {
-    /* UART in mode Receiver ---------------------------------------------------*/
-    if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-    {
-      UART_Receive_IT(huart);
-      return;
-    }
-  }  
-
-  /* If some errors occur */
-  cr3its = READ_REG(huart->Instance->CR3);
-  if(   (errorflags != RESET)
-     && (   ((cr3its & USART_CR3_EIE) != RESET)
-         || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)) )
-  {
-    /* UART parity error interrupt occurred -------------------------------------*/
-    if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
-    {
-      __HAL_UART_CLEAR_IT(huart, UART_CLEAR_PEF);
-
-      huart->ErrorCode |= HAL_UART_ERROR_PE;
-    }
-
-    /* UART frame error interrupt occurred --------------------------------------*/
-    if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    {
-      __HAL_UART_CLEAR_IT(huart, UART_CLEAR_FEF);
-
-      huart->ErrorCode |= HAL_UART_ERROR_FE;
-    }
-
-    /* UART noise error interrupt occurred --------------------------------------*/
-    if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    {
-      __HAL_UART_CLEAR_IT(huart, UART_CLEAR_NEF);
-
-      huart->ErrorCode |= HAL_UART_ERROR_NE;
-    }
-    
-    /* UART Over-Run interrupt occurred -----------------------------------------*/
-    if(((isrflags & USART_ISR_ORE) != RESET) &&
-       (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET)))
-    {
-      __HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF);
-
-      huart->ErrorCode |= HAL_UART_ERROR_ORE;
-    }
-
-    /* Call UART Error Call back function if need be --------------------------*/
-    if(huart->ErrorCode != HAL_UART_ERROR_NONE)
-    {
-      /* UART in mode Receiver ---------------------------------------------------*/
-      if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-      {
-        UART_Receive_IT(huart);
-      }
-
-      /* If Overrun error occurs, or if any error occurs in DMA mode reception,
-         consider error as blocking */
-      if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) ||
-          (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)))
-      {  
-        /* Blocking error : transfer is aborted
-           Set the UART state ready to be able to start again the process,
-           Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
-        UART_EndRxTransfer(huart);
-
-        /* Disable the UART DMA Rx request if enabled */
-        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
-        {
-          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
-          /* Abort the UART DMA Rx channel */
-          if(huart->hdmarx != NULL)
-          {
-            /* Set the UART DMA Abort callback : 
-               will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
-            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
-
-            /* Abort DMA RX */
-            if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
-            {
-              /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
-              huart->hdmarx->XferAbortCallback(huart->hdmarx);
-            }
-          }
-          else
-          {
-            /* Call user error callback */
-            HAL_UART_ErrorCallback(huart);
-          }
-        }
-        else
-        {
-          /* Call user error callback */
-          HAL_UART_ErrorCallback(huart);
-        }
-      }
-      else
-      {
-        /* Non Blocking error : transfer could go on. 
-           Error is notified to user through user error callback */
-        HAL_UART_ErrorCallback(huart);
-        huart->ErrorCode = HAL_UART_ERROR_NONE;
-      }
-    }
-    return;
-
-  } /* End if some error occurs */
-
-  /* UART wakeup from Stop mode interrupt occurred ---------------------------*/
-  if(((isrflags & USART_ISR_WUF) != RESET) && ((cr3its & USART_CR3_WUFIE) != RESET))
-  {
-    __HAL_UART_CLEAR_IT(huart, UART_CLEAR_WUF);
-    /* Set the UART state ready to be able to start again the process */
-    huart->gState  = HAL_UART_STATE_READY;
-    huart->RxState = HAL_UART_STATE_READY;
-    HAL_UARTEx_WakeupCallback(huart);
-    return;
-  }
-
-  /* UART in mode Transmitter ------------------------------------------------*/
-  if(((isrflags & USART_ISR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
-  {
-    UART_Transmit_IT(huart);
-    return;
-  }
-
-  /* UART in mode Transmitter (transmission end) -----------------------------*/
-  if(((isrflags & USART_ISR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
-  {
-    UART_EndTransmit_IT(huart);
-    return;
-  }
-
-}
-
-/**
-  * @brief Tx Transfer completed callback.
-  * @param huart: UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_TxCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Tx Half Transfer completed callback.
-  * @param  huart: UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-           the HAL_UART_TxHalfCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief Rx Transfer completed callback.
-  * @param huart: UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_RxCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Rx Half Transfer completed callback.
-  * @param  huart: UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-           the HAL_UART_RxHalfCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief UART error callback.
-  * @param huart: UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_ErrorCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  UART Abort Complete callback.
-  * @param  huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_AbortCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  UART Abort Complete callback.
-  * @param  huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  UART Abort Receive Complete callback.
-  * @param  huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
-  *  @brief   UART control functions
-  *
-@verbatim
- ===============================================================================
-                      ##### Peripheral Control functions #####
- ===============================================================================
-    [..]
-    This subsection provides a set of functions allowing to control the UART.
-     (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode
-     (+) HAL_MultiProcessor_DisableMuteMode() API disables mute mode
-     (+) HAL_MultiProcessor_EnterMuteMode() API enters mute mode
-     (+) UART_SetConfig() API configures the UART peripheral
-     (+) UART_AdvFeatureConfig() API optionally configures the UART advanced features
-     (+) UART_CheckIdleState() API ensures that TEACK and/or REACK are set after initialization
-     (+) HAL_HalfDuplex_EnableTransmitter() API disables receiver and enables transmitter
-     (+) HAL_HalfDuplex_EnableReceiver() API disables transmitter and enables receiver
-     (+) HAL_LIN_SendBreak() API transmits the break characters
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Enable UART in mute mode (does not mean UART enters mute mode;
-  * to enter mute mode, HAL_MultiProcessor_EnterMuteMode() API must be called).
-  * @param huart: UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
-{
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Enable USART mute mode by setting the MME bit in the CR1 register */
-  SET_BIT(huart->Instance->CR1, USART_CR1_MME);
-
-  huart->gState = HAL_UART_STATE_READY;
-
-  return (UART_CheckIdleState(huart));
-}
-
-/**
-  * @brief  Disable UART mute mode (does not mean the UART actually exits mute mode
-  *         as it may not have been in mute mode at this very moment).
-  * @param  huart: UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
-{
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-   /* Disable USART mute mode by clearing the MME bit in the CR1 register */
-  CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME);
-
-  huart->gState = HAL_UART_STATE_READY;
-
-  return (UART_CheckIdleState(huart));
-}
-
-/**
-  * @brief Enter UART mute mode (means UART actually enters mute mode).
-  * @note  To exit from mute mode, HAL_MultiProcessor_DisableMuteMode() API must be called.
-  * @param huart: UART handle.
-  * @retval None
-  */
-void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
-{
-  __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST);
-}
-
-/**
-  * @brief  Enable the UART transmitter and disable the UART receiver.
-  * @param  huart: UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
-{
-  /* Process Locked */
-  __HAL_LOCK(huart);
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Clear TE and RE bits */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
-  /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
-  SET_BIT(huart->Instance->CR1, USART_CR1_TE);
-
-  huart->gState = HAL_UART_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enable the UART receiver and disable the UART transmitter.
-  * @param  huart: UART handle.
-  * @retval HAL status.
-  */
-HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
-{
-  /* Process Locked */
-  __HAL_LOCK(huart);
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Clear TE and RE bits */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
-  /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
-  SET_BIT(huart->Instance->CR1, USART_CR1_RE);
-
-  huart->gState = HAL_UART_STATE_READY;
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  Transmit break characters.
-  * @param  huart: UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
-{
-  /* Check the parameters */
-  assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
-
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Send break characters */
-  huart->Instance->RQR |= UART_SENDBREAK_REQUEST;
-
-  huart->gState = HAL_UART_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-
-/**
-  * @}
-  */
-
-/** @defgroup UART_Exported_Functions_Group4 Peripheral State and Error functions
- *  @brief   UART Peripheral State functions
- *
-@verbatim
-  ==============================================================================
-            ##### Peripheral State and Error functions #####
-  ==============================================================================
-    [..]
-    This subsection provides functions allowing to :
-      (+) Return the UART handle state.
-      (+) Return the UART handle error code
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the UART handle state.
-  * @param  huart Pointer to a UART_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART.
-  * @retval HAL state
-  */
-HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
-{
-  uint32_t temp1= 0x00U, temp2 = 0x00U;
-  temp1 = huart->gState;
-  temp2 = huart->RxState;
-
-  return (HAL_UART_StateTypeDef)(temp1 | temp2);
-}
-
-/**
-  * @brief  Return the UART handle error code.
-  * @param  huart Pointer to a UART_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART.
-  * @retval UART Error Code
-*/
-uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
-{
-  return huart->ErrorCode;
-}
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup UART_Private_Functions UART Private Functions
-  * @{
-  */
-
-/**
-  * @brief Configure the UART peripheral.
-  * @param huart: UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
-{
-  uint32_t tmpreg                     = 0x00000000U;
-  UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED;
-  uint16_t brrtemp                    = 0x0000U;
-  uint16_t usartdiv                   = 0x0000U;
-  HAL_StatusTypeDef ret               = HAL_OK;
-
-  /* Check the parameters */
-  assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
-  assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
-  if(UART_INSTANCE_LOWPOWER(huart))
-  {
-    assert_param(IS_LPUART_STOPBITS(huart->Init.StopBits));
-  }
-  else
-  {
-    assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
-    assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling));
-  }
-
-  assert_param(IS_UART_PARITY(huart->Init.Parity));
-  assert_param(IS_UART_MODE(huart->Init.Mode));
-  assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
-  assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
-
-
-  /*-------------------------- USART CR1 Configuration -----------------------*/
-  /* Clear M, PCE, PS, TE, RE and OVER8 bits and configure
-   *  the UART Word Length, Parity, Mode and oversampling:
-   *  set the M bits according to huart->Init.WordLength value
-   *  set PCE and PS bits according to huart->Init.Parity value
-   *  set TE and RE bits according to huart->Init.Mode value
-   *  set OVER8 bit according to huart->Init.OverSampling value */
-  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
-  MODIFY_REG(huart->Instance->CR1, UART_CR1_FIELDS, tmpreg);
-
-  /*-------------------------- USART CR2 Configuration -----------------------*/
-  /* Configure the UART Stop Bits: Set STOP[13:12] bits according
-   * to huart->Init.StopBits value */
-  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
-
-  /*-------------------------- USART CR3 Configuration -----------------------*/
-  /* Configure
-   * - UART HardWare Flow Control: set CTSE and RTSE bits according
-   *   to huart->Init.HwFlowCtl value
-   * - one-bit sampling method versus three samples' majority rule according
-   *   to huart->Init.OneBitSampling (not applicable to LPUART) */
-  tmpreg = (uint32_t)huart->Init.HwFlowCtl;
-  if (!(UART_INSTANCE_LOWPOWER(huart)))
-  {
-    tmpreg |= huart->Init.OneBitSampling;
-  }
-  MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT), tmpreg);
-
-  /*-------------------------- USART BRR Configuration -----------------------*/
-  UART_GETCLOCKSOURCE(huart, clocksource);
-  uint32_t frequency = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_USART2);
-
-  /* Check LPUART instance */
-  if(UART_INSTANCE_LOWPOWER(huart))
-  {
-    /* Retrieve frequency clock */
-    tmpreg = 0;
-
-    switch (clocksource)
-    {
-    case UART_CLOCKSOURCE_PCLK1:
-      tmpreg = HAL_RCC_GetPCLK1Freq();
-      break;
-    case UART_CLOCKSOURCE_HSI:
-      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
-      {
-        tmpreg = (uint32_t) (HSI_VALUE >> 2U);
-      }
-      else
-      {
-        tmpreg = (uint32_t) HSI_VALUE;
-      }
-      break;
-    case UART_CLOCKSOURCE_SYSCLK:
-      tmpreg = HAL_RCC_GetSysClockFreq();
-      break;
-    case UART_CLOCKSOURCE_LSE:
-      tmpreg = (uint32_t) LSE_VALUE;
-      break;
-    case UART_CLOCKSOURCE_UNDEFINED:
-    default:
-        ret = HAL_ERROR;
-      break;
-    }
-
-    /* if proper clock source reported */
-    if (tmpreg != 0)
-    {
-      /* ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
-      if ( (tmpreg < (3 * huart->Init.BaudRate) ) ||
-           (tmpreg > (4096 * huart->Init.BaudRate) ))
-      {
-        ret = HAL_ERROR;
-      }
-      else
-      {
-        tmpreg = (uint32_t)(UART_DIV_LPUART(tmpreg, huart->Init.BaudRate));
-   
-        if ((tmpreg >= UART_LPUART_BRR_MIN) && (tmpreg <= UART_LPUART_BRR_MAX))
-        {
-           huart->Instance->BRR = tmpreg;
-        }
-        else
-        {
-          ret = HAL_ERROR;
-        }
-      }  /*   if ( (tmpreg < (3 * huart->Init.BaudRate) ) || (tmpreg > (4096 * huart->Init.BaudRate) )) */
-    } /* if (tmpreg != 0) */
-  }
-  /* Check UART Over Sampling to set Baud Rate Register */
-  else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
-  {
-    switch (clocksource)
-    {
-    case UART_CLOCKSOURCE_PCLK1:
-      usartdiv = (uint16_t)(UART_DIV_SAMPLING8(frequency, huart->Init.BaudRate));
-      break;
-    case UART_CLOCKSOURCE_PCLK2:
-      usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate));
-      break;
-    case UART_CLOCKSOURCE_HSI:
-      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
-      {
-        usartdiv = (uint16_t)(UART_DIV_SAMPLING8((HSI_VALUE >> 2U), huart->Init.BaudRate));
-      }
-      else
-      {
-        usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate)); 
-      }
-      break;
-    case UART_CLOCKSOURCE_SYSCLK:
-      usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
-      break;
-    case UART_CLOCKSOURCE_LSE:
-      usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate));
-      break;
-    case UART_CLOCKSOURCE_UNDEFINED:
-    default:
-        ret = HAL_ERROR;
-      break;
-    }
-
-    brrtemp = usartdiv & 0xFFF0U;
-    brrtemp |= (uint16_t)((uint16_t)(usartdiv & (uint16_t)0x000FU) >> (uint16_t)1U);
-    huart->Instance->BRR = brrtemp;
-  }
-  else
-  {
-    switch (clocksource)
-    {
-    case UART_CLOCKSOURCE_PCLK1:
-      huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
-      break;
-    case UART_CLOCKSOURCE_PCLK2:
-      huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate));
-      break;
-    case UART_CLOCKSOURCE_HSI:
-      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
-      {
-        huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16((HSI_VALUE >> 2U), huart->Init.BaudRate));
-      }
-      else
-      {
-        huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate));
-      }
-      break;
-    case UART_CLOCKSOURCE_SYSCLK:
-      huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
-      break;
-    case UART_CLOCKSOURCE_LSE:
-      huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate));
-      break;
-    case UART_CLOCKSOURCE_UNDEFINED:
-    default:
-        ret = HAL_ERROR;
-      break;
-    }
-  }
-
-  return ret;
-
-}
-
-/**
-  * @brief Configure the UART peripheral advanced features.
-  * @param huart: UART handle.
-  * @retval None
-  */
-void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
-{
-  /* Check whether the set of advanced features to configure is properly set */
-  assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
-
-  /* if required, configure TX pin active level inversion */
-  if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
-  {
-    assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
-  }
-
-  /* if required, configure RX pin active level inversion */
-  if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
-  {
-    assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
-  }
-
-  /* if required, configure data inversion */
-  if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
-  {
-    assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
-  }
-
-  /* if required, configure RX/TX pins swap */
-  if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
-  {
-    assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
-  }
-
-  /* if required, configure RX overrun detection disabling */
-  if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
-  {
-    assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
-    MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
-  }
-
-  /* if required, configure DMA disabling on reception error */
-  if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
-  {
-    assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
-    MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
-  }
-
-  /* if required, configure auto Baud rate detection scheme */
-  if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
-  {
-    assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
-    assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
-    /* set auto Baudrate detection parameters if detection is enabled */
-    if(huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
-    {
-      assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
-      MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
-    }
-  }
-
-  /* if required, configure MSB first on communication line */
-  if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
-  {
-    assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
-  }
-}
-
-/**
-  * @brief Check the UART Idle State.
-  * @param huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
-{
-  uint32_t tickstart = 0;
-
-  /* Initialize the UART ErrorCode */
-  huart->ErrorCode = HAL_UART_ERROR_NONE;
-
-  /* Init tickstart for timeout managment*/
-  tickstart = HAL_GetTick();
-
-  /* Check if the Transmitter is enabled */
-  if((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
-  {
-    /* Wait until TEACK flag is set */
-    if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
-    {
-      /* Timeout occurred */
-      return HAL_TIMEOUT;
-    }
-  }
-  /* Check if the Receiver is enabled */
-  if((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
-  {
-    /* Wait until REACK flag is set */
-    if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
-    {
-      /* Timeout occurred */
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* Initialize the UART State */
-  huart->gState  = HAL_UART_STATE_READY;
-  huart->RxState = HAL_UART_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle UART Communication Timeout.
-  * @param  huart UART handle.
-  * @param  Flag Specifies the UART flag to check
-  * @param  Status Flag status (SET or RESET)
-  * @param  Tickstart Tick start value
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
-{
-  /* Wait until flag is set */
-  while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
-  {
-    /* Check for the Timeout */
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0) || ((HAL_GetTick()-Tickstart) > Timeout))
-      {
-        /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
-        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
-        CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-        huart->gState  = HAL_UART_STATE_READY;
-        huart->RxState = HAL_UART_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(huart);
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion).
-  * @param  huart UART handle.
-  * @retval None
-  */
-static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-  /* At end of Tx process, restore huart->gState to Ready */
-  huart->gState = HAL_UART_STATE_READY;
-}
-
-
-/**
-  * @brief  End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
-  * @param  huart UART handle.
-  * @retval None
-  */
-static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
-{
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-  /* At end of Rx process, restore huart->RxState to Ready */
-  huart->RxState = HAL_UART_STATE_READY;
-}
-
-
-/**
-  * @brief DMA UART transmit process complete callback.
-  * @param hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent);
-  
-  /* DMA Normal mode */
-  if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
-  {
-    huart->TxXferCount = 0U;
-
-    /* Disable the DMA transfer for transmit request by resetting the DMAT bit
-       in the UART CR3 register */
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
-    /* Enable the UART Transmit Complete Interrupt */
-    SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
-  }
-  /* DMA Circular mode */
-  else
-  {
-    HAL_UART_TxCpltCallback(huart);
-  }
-
-}
-
-/**
-  * @brief DMA UART transmit process half complete callback.
-  * @param hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent);
-
-  HAL_UART_TxHalfCpltCallback(huart);
-}
-
-/**
-  * @brief DMA UART receive process complete callback.
-  * @param hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent);
-
-  /* DMA Normal mode */
-  if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
-  {
-    huart->RxXferCount = 0U;
-
-    /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-    CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-    /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
-       in the UART CR3 register */
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
-    /* At end of Rx process, restore huart->RxState to Ready */
-    huart->RxState = HAL_UART_STATE_READY;
-  }
-
-  HAL_UART_RxCpltCallback(huart);
-}
-
-/**
-  * @brief DMA UART receive process half complete callback.
-  * @param hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent);
-
-  HAL_UART_RxHalfCpltCallback(huart);
-}
-
-/**
-  * @brief DMA UART communication error callback.
-  * @param hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMAError(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent);
-
-  /* Stop UART DMA Tx request if ongoing */
-  if (  (huart->gState == HAL_UART_STATE_BUSY_TX)
-      &&(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) )
-  {
-    huart->TxXferCount = 0;
-    UART_EndTxTransfer(huart);
-  }
-
-  /* Stop UART DMA Rx request if ongoing */
-  if (  (huart->RxState == HAL_UART_STATE_BUSY_RX)
-      &&(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) )
-  {
-    huart->RxXferCount = 0;
-    UART_EndRxTransfer(huart);
-  }
-
-  huart->ErrorCode |= HAL_UART_ERROR_DMA;
-  HAL_UART_ErrorCallback(huart);
-}
-
-/**
-  * @brief  DMA UART communication abort callback, when initiated by HAL services on Error
-  *         (To be called at end of DMA Abort procedure following error occurrence).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent);
-  huart->RxXferCount = 0;
-  huart->TxXferCount = 0;
-
-  HAL_UART_ErrorCallback(huart);
-}
-
-/**
-  * @brief  DMA UART Tx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Tx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Rx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef* )(hdma->Parent);
-  
-  huart->hdmatx->XferAbortCallback = NULL;
-
-  /* Check if an Abort process is still ongoing */
-  if(huart->hdmarx != NULL)
-  {
-    if(huart->hdmarx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-  
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  huart->TxXferCount = 0;
-  huart->RxXferCount = 0;
-
-  /* Reset errorCode */
-  huart->ErrorCode = HAL_UART_ERROR_NONE;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
-
-  /* Restore huart->gState and huart->RxState to Ready */
-  huart->gState  = HAL_UART_STATE_READY;
-  huart->RxState = HAL_UART_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_UART_AbortCpltCallback(huart);
-}
-
-
-/**
-  * @brief  DMA UART Rx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Rx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Tx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef* )(hdma->Parent);
-  
-  huart->hdmarx->XferAbortCallback = NULL;
-
-  /* Check if an Abort process is still ongoing */
-  if(huart->hdmatx != NULL)
-  {
-    if(huart->hdmatx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-  
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  huart->TxXferCount = 0;
-  huart->RxXferCount = 0;
-
-  /* Reset errorCode */
-  huart->ErrorCode = HAL_UART_ERROR_NONE;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
-
-  /* Restore huart->gState and huart->RxState to Ready */
-  huart->gState  = HAL_UART_STATE_READY;
-  huart->RxState = HAL_UART_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_UART_AbortCpltCallback(huart);
-}
-
-
-/**
-  * @brief  DMA UART Tx communication abort callback, when initiated by user by a call to
-  *         HAL_UART_AbortTransmit_IT API (Abort only Tx transfer)
-  *         (This callback is executed at end of DMA Tx Abort procedure following user abort request,
-  *         and leads to user Tx Abort Complete callback execution).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent);
-
-  huart->TxXferCount = 0;
-
-  /* Restore huart->gState to Ready */
-  huart->gState = HAL_UART_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_UART_AbortTransmitCpltCallback(huart);
-}
-
-/**
-  * @brief  DMA UART Rx communication abort callback, when initiated by user by a call to
-  *         HAL_UART_AbortReceive_IT API (Abort only Rx transfer)
-  *         (This callback is executed at end of DMA Rx Abort procedure following user abort request,
-  *         and leads to user Rx Abort Complete callback execution).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-  huart->RxXferCount = 0;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
-
-  /* Restore huart->RxState to Ready */
-  huart->RxState = HAL_UART_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_UART_AbortReceiveCpltCallback(huart);
-}
-
-/**
-  * @brief  Send an amount of data in interrupt mode.
-  * @note   Function is called under interruption only, once
-  *         interruptions have been enabled by HAL_UART_Transmit_IT().
-  * @param  huart UART handle.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
-{
-  uint16_t* tmp;
-
-  /* Check that a Tx process is ongoing */
-  if (huart->gState == HAL_UART_STATE_BUSY_TX)
-  {
-    if(huart->TxXferCount == 0U)
-    {
-      /* Disable the UART Transmit Data Register Empty Interrupt */
-      CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
-
-      /* Enable the UART Transmit Complete Interrupt */
-      SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
-
-      return HAL_OK;
-    }
-    else
-    {
-      if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-      {
-        tmp = (uint16_t*) huart->pTxBuffPtr;
-        huart->Instance->TDR = (*tmp & (uint16_t)0x01FFU);
-        huart->pTxBuffPtr += 2U;
-      }
-      else
-      {
-        huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0xFFU);
-      }
-      huart->TxXferCount--;
-
-      return HAL_OK;
-    }
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Wrap up transmission in non-blocking mode.
-  * @param  huart pointer to a UART_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
-{
-  /* Disable the UART Transmit Complete Interrupt */
-  CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
-
-  /* Tx process is ended, restore huart->gState to Ready */
-  huart->gState = HAL_UART_STATE_READY;
-
-  HAL_UART_TxCpltCallback(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Receive an amount of data in interrupt mode.
-  * @note   Function is called under interruption only, once
-  *         interruptions have been enabled by HAL_UART_Receive_IT()
-  * @param  huart UART handle.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
-{
-  uint16_t* tmp;
-  uint16_t  uhMask = huart->Mask;
-  uint16_t  uhdata;
-
-  /* Check that a Rx process is ongoing */
-  if(huart->RxState == HAL_UART_STATE_BUSY_RX)
-  {
-    uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
-    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-    {
-      tmp = (uint16_t*) huart->pRxBuffPtr ;
-      *tmp = (uint16_t)(uhdata & uhMask);
-      huart->pRxBuffPtr +=2;
-    }
-    else
-    {
-      *huart->pRxBuffPtr++ = (uint8_t)(uhdata & (uint8_t)uhMask);
-    }
-
-    if(--huart->RxXferCount == 0U)
-    {
-      /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
-      CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-
-      /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
-      CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-      /* Rx process is completed, restore huart->RxState to Ready */
-      huart->RxState = HAL_UART_STATE_READY;
-
-      HAL_UART_RxCpltCallback(huart);
-
-      return HAL_OK;
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    /* Clear RXNE interrupt flag */
-    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
-
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @}
-  */
-
-#endif /* HAL_UART_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c
deleted file mode 100755
index adbd7af4..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c
+++ /dev/null
@@ -1,520 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_uart_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended UART HAL module driver.
-  *          This file provides firmware functions to manage the following extended
-  *          functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART).
-  *           + Initialization and de-initialization functions
-  *           + Peripheral Control functions
-  *
-  *
-  @verbatim
-  ==============================================================================
-               ##### UART peripheral extended features  #####
-  ==============================================================================
-
-    (#) Declare a UART_HandleTypeDef handle structure.
-
-    (#) For the UART RS485 Driver Enable mode, initialize the UART registers
-        by calling the HAL_RS485Ex_Init() API.
-
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup UARTEx UARTEx
-  * @brief UART Extended HAL module driver
-  * @{
-  */
-
-#ifdef HAL_UART_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup UARTEx_Private_Functions UARTEx Private Functions
-  * @{
-  */
-static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup UARTEx_Exported_Functions  UARTEx Exported Functions
-  * @{
-  */
-
-/** @defgroup UARTEx_Exported_Functions_Group1 Initialization and de-initialization functions
-  * @brief    Extended Initialization and Configuration Functions
-  *
-@verbatim
-===============================================================================
-            ##### Initialization and Configuration functions #####
- ===============================================================================
-    [..]
-    This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
-    in asynchronous mode.
-      (+) For the asynchronous mode the parameters below can be configured:
-        (++) Baud Rate
-        (++) Word Length
-        (++) Stop Bit
-        (++) Parity: If the parity is enabled, then the MSB bit of the data written
-             in the data register is transmitted but is changed by the parity bit.
-        (++) Hardware flow control
-        (++) Receiver/transmitter modes
-        (++) Over Sampling Method
-        (++) One-Bit Sampling Method
-      (+) For the asynchronous mode, the following advanced features can be configured as well:
-        (++) TX and/or RX pin level inversion
-        (++) data logical level inversion
-        (++) RX and TX pins swap
-        (++) RX overrun detection disabling
-        (++) DMA disabling on RX error
-        (++) MSB first on communication line
-        (++) auto Baud rate detection
-    [..]
-    The HAL_RS485Ex_Init() API follows the UART RS485 mode configuration
-     procedures (details for the procedures are available in reference manual).
-
-@endverbatim
-
-  Depending on the frame length defined by the M1 and M0 bits (7-bit, 
-  8-bit or 9-bit), the possible UART formats are listed in the 
-  following table.
-  
-    Table 1. UART frame format.
-    +-----------------------------------------------------------------------+
-    |  M1 bit |  M0 bit |  PCE bit  |             UART frame                |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    0    |    0      |    | SB |    8 bit data   | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    0    |    1      |    | SB | 7 bit data | PB | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    1    |    0      |    | SB |    9 bit data   | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    1    |    1      |    | SB | 8 bit data | PB | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    1    |    0    |    0      |    | SB |    7 bit data   | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    1    |    0    |    1      |    | SB | 6 bit data | PB | STB |     |
-    +-----------------------------------------------------------------------+
-
-  * @{
-  */
-
-/**
-  * @brief Initialize the RS485 Driver enable feature according to the specified
-  *         parameters in the UART_InitTypeDef and creates the associated handle.
-  * @param huart: UART handle.
-  * @param Polarity: select the driver enable polarity.
-  *        This parameter can be one of the following values:
-  *          @arg @ref UART_DE_POLARITY_HIGH DE signal is active high
-  *          @arg @ref UART_DE_POLARITY_LOW  DE signal is active low
-  * @param AssertionTime: Driver Enable assertion time:
-  *                         5-bit value defining the time between the activation of the DE (Driver Enable)
-  *                         signal and the beginning of the start bit. It is expressed in sample time
-  *                         units (1/8 or 1/16 bit time, depending on the oversampling rate)
-  * @param DeassertionTime: Driver Enable deassertion time:
-  *                         5-bit value defining the time between the end of the last stop bit, in a
-  *                         transmitted message, and the de-activation of the DE (Driver Enable) signal.
-  *                         It is expressed in sample time units (1/8 or 1/16 bit time, depending on the
-  *                         oversampling rate).
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime)
-{
-  uint32_t temp = 0x0U;
-
-  /* Check the UART handle allocation */
-  if(huart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the Driver Enable polarity */
-  assert_param(IS_UART_DE_POLARITY(Polarity));
-
-  /* Check the Driver Enable assertion time */
-  assert_param(IS_UART_ASSERTIONTIME(AssertionTime));
-
-  /* Check the Driver Enable deassertion time */
-  assert_param(IS_UART_DEASSERTIONTIME(DeassertionTime));
-
-  if(huart->gState == HAL_UART_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    huart->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, CORTEX */
-    HAL_UART_MspInit(huart);
-  }
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_UART_DISABLE(huart);
-
-  /* Set the UART Communication parameters */
-  if(huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
-  {
-    UART_AdvFeatureConfig(huart);
-  }
-
-  if (UART_SetConfig(huart) == HAL_ERROR)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Enable the Driver Enable mode by setting the DEM bit in the CR3 register */
-  SET_BIT(huart->Instance->CR3, USART_CR3_DEM);
-
-  /* Set the Driver Enable polarity */
-  MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity);
-
-  /* Set the Driver Enable assertion and deassertion times */
-  temp = (AssertionTime << UART_CR1_DEAT_ADDRESS_LSB_POS);
-  temp |= (DeassertionTime << UART_CR1_DEDT_ADDRESS_LSB_POS);
-  MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT|USART_CR1_DEAT), temp);
-
-  /* Enable the Peripheral */
-  __HAL_UART_ENABLE(huart);
-
-  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
-  return (UART_CheckIdleState(huart));
-}
-
-
-/**
-  * @}
-  */
-
-/** @defgroup UARTEx_Exported_Functions_Group3 Peripheral Control functions
-  * @brief    Extended Peripheral Control functions
- *
-@verbatim
- ===============================================================================
-                      ##### Peripheral Control functions #####
- ===============================================================================
-    [..] This section provides the following functions:
-     (+) HAL_UARTEx_EnableClockStopMode() API enables the UART clock (HSI or LSE only) during stop mode
-     (+) HAL_UARTEx_DisableClockStopMode() API disables the above functionality
-     (+) HAL_MultiProcessorEx_AddressLength_Set() API optionally sets the UART node address
-         detection length to more than 4 bits for multiprocessor address mark wake up.
-     (+) HAL_UARTEx_StopModeWakeUpSourceConfig() API defines the wake-up from stop mode
-         trigger: address match, Start Bit detection or RXNE bit status.
-     (+) HAL_UARTEx_EnableStopMode() API enables the UART to wake up the MCU from stop mode
-     (+) HAL_UARTEx_DisableStopMode() API disables the above functionality
-     (+) HAL_UARTEx_EnableClockStopMode() API enables the UART HSI clock during stop mode   
-     (+) HAL_UARTEx_DisableClockStopMode() API disables the above functionality   
-     (+) HAL_UARTEx_WakeupCallback() called upon UART wakeup interrupt
-
-
-@endverbatim
-  * @{
-  */
-
-
-
-
-/**
-  * @brief By default in multiprocessor mode, when the wake up method is set
-  *        to address mark, the UART handles only 4-bit long addresses detection;
-  *        this API allows to enable longer addresses detection (6-, 7- or 8-bit
-  *        long).
-  * @note  Addresses detection lengths are: 6-bit address detection in 7-bit data mode, 
-  *        7-bit address detection in 8-bit data mode, 8-bit address detection in 9-bit data mode.
-  * @param huart: UART handle.
-  * @param AddressLength: this parameter can be one of the following values:
-  *          @arg @ref UART_ADDRESS_DETECT_4B 4-bit long address
-  *          @arg @ref UART_ADDRESS_DETECT_7B 6-, 7- or 8-bit long address
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength)
-{
-  /* Check the UART handle allocation */
-  if(huart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the address length parameter */
-  assert_param(IS_UART_ADDRESSLENGTH_DETECT(AddressLength));
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_UART_DISABLE(huart);
-
-  /* Set the address length */
-  MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, AddressLength);
-
-  /* Enable the Peripheral */
-  __HAL_UART_ENABLE(huart);
-
-  /* TEACK and/or REACK to check before moving huart->gState and/or huart->RxState to Ready */
-  return (UART_CheckIdleState(huart));
-}
-
-
-/**
-  * @brief Set Wakeup from Stop mode interrupt flag selection.
-  * @param huart: UART handle.
-  * @param WakeUpSelection: address match, Start Bit detection or RXNE bit status.
-  * This parameter can be one of the following values:
-  *      @arg @ref UART_WAKEUP_ON_ADDRESS
-  *      @arg @ref UART_WAKEUP_ON_STARTBIT
-  *      @arg @ref UART_WAKEUP_ON_READDATA_NONEMPTY
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  uint32_t tickstart = 0;
-
-  /* check the wake-up from stop mode UART instance */
-  assert_param(IS_UART_WAKEUP_FROMSTOP_INSTANCE(huart->Instance));
-  /* check the wake-up selection parameter */
-  assert_param(IS_UART_WAKEUP_SELECTION(WakeUpSelection.WakeUpEvent));
-
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_UART_DISABLE(huart);
-
-  /* Set the wake-up selection scheme */
-  MODIFY_REG(huart->Instance->CR3, USART_CR3_WUS, WakeUpSelection.WakeUpEvent);
-
-  if (WakeUpSelection.WakeUpEvent == UART_WAKEUP_ON_ADDRESS)
-  {
-    UARTEx_Wakeup_AddressConfig(huart, WakeUpSelection);
-  }
-
-  /* Enable the Peripheral */
-  __HAL_UART_ENABLE(huart);
-
-  /* Init tickstart for timeout managment*/
-  tickstart = HAL_GetTick();
-
-  /* Wait until REACK flag is set */
-  if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
-  {
-    status = HAL_TIMEOUT;
-  }
-  else
-  {
-    /* Initialize the UART State */
-    huart->gState = HAL_UART_STATE_READY;
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return status;
-}
-
-
-/**
-  * @brief Enable UART Stop Mode.
-  * @note  The UART is able to wake up the MCU from Stop 1 mode as long as UART clock is HSI or LSE.
-  * @param huart: UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart)
-{
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Set UESM bit */
-  SET_BIT(huart->Instance->CR1, USART_CR1_UESM);
-
-  huart->gState = HAL_UART_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Disable UART Stop Mode.
-  * @param huart: UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart)
-{
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Clear UESM bit */
-  CLEAR_BIT(huart->Instance->CR1, USART_CR1_UESM);
-
-  huart->gState = HAL_UART_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Enable UART Clock in Stop Mode
-  * The UART keeps the Clock ON during Stop mode
-  * @param huart: uart handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UARTEx_EnableClockStopMode(UART_HandleTypeDef *huart)
-{
-  /* Process Locked */
-  __HAL_LOCK(huart);
-  
-  huart->gState = HAL_UART_STATE_BUSY;
-  
-  /* Set UCESM bit */
-  SET_BIT(huart->Instance->CR3, USART_CR3_UCESM);
-  
-  huart->gState = HAL_UART_STATE_READY;
-  
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-  
-  return HAL_OK; 
-}
-
-/**
-  * @brief Disable UART Clock in Stop Mode 
-  * @param huart: uart handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UARTEx_DisableClockStopMode(UART_HandleTypeDef *huart)
-{
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Clear UCESM bit */
-  CLEAR_BIT(huart->Instance->CR3, USART_CR3_UCESM);
-
-  huart->gState = HAL_UART_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief UART wakeup from Stop mode callback.
-  * @param huart: UART handle.
-  * @retval None
-  */
-__weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UARTEx_WakeupCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup UARTEx_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief Initialize the UART wake-up from stop mode parameters when triggered by address detection.
-  * @param huart: UART handle.
-  * @param WakeUpSelection: UART wake up from stop mode parameters.
-  * @retval None
-  */
-static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection)
-{
-  assert_param(IS_UART_ADDRESSLENGTH_DETECT(WakeUpSelection.AddressLength));
-  if(WakeUpSelection.AddressLength == UART_ADDRESS_DETECT_4B)
-  {
-    assert_param(IS_UART_4B_ADDRESS(WakeUpSelection.Address));
-  }
-  else
-  {
-    assert_param(IS_UART_7B_ADDRESS(WakeUpSelection.Address));
-  }
-
-  /* Set the USART address length */
-  MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, WakeUpSelection.AddressLength);
-
-  /* Set the USART address node */
-  MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)WakeUpSelection.Address << UART_CR2_ADDRESS_LSB_POS));
-}
-
-/**
-  * @}
-  */
-
-#endif /* HAL_UART_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_usart.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_usart.c
deleted file mode 100755
index 944c1cba..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_usart.c
+++ /dev/null
@@ -1,2420 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_usart.c
-  * @author  MCD Application Team
-  * @brief   USART HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the Universal Synchronous/Asynchronous Receiver Transmitter
-  *          Peripheral (USART).
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral Control functions
-  *           + Peripheral State and Error functions
-  *
-  @verbatim
- ===============================================================================
-                        ##### How to use this driver #####
- ===============================================================================
-    [..]
-      The USART HAL driver can be used as follows:
-
-      (#) Declare a USART_HandleTypeDef handle structure (eg. USART_HandleTypeDef husart).
-      (#) Initialize the USART low level resources by implementing the HAL_USART_MspInit() API:
-          (++) Enable the USARTx interface clock.
-          (++) USART pins configuration:
-            (+++) Enable the clock for the USART GPIOs.
-            (+++) Configure these USART pins as alternate function pull-up.
-          (++) NVIC configuration if you need to use interrupt process (HAL_USART_Transmit_IT(),
-                HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs):
-            (+++) Configure the USARTx interrupt priority.
-            (+++) Enable the NVIC USART IRQ handle.
-            (++) USART interrupts handling:
-              -@@-   The specific USART interrupts (Transmission complete interrupt,
-                  RXNE interrupt and Error Interrupts) will be managed using the macros
-                  __HAL_USART_ENABLE_IT() and __HAL_USART_DISABLE_IT() inside the transmit and receive process.
-          (++) DMA Configuration if you need to use DMA process (HAL_USART_Transmit_DMA()
-               HAL_USART_Receive_DMA() and HAL_USART_TransmitReceive_DMA() APIs):
-            (+++) Declare a DMA handle structure for the Tx/Rx channel.
-            (+++) Enable the DMAx interface clock.
-            (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
-            (+++) Configure the DMA Tx/Rx channel.
-            (+++) Associate the initialized DMA handle to the USART DMA Tx/Rx handle.
-            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
-
-      (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
-          flow control and Mode (Receiver/Transmitter) in the husart handle Init structure.
-
-      (#) Initialize the USART registers by calling the HAL_USART_Init() API:
-          (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
-               by calling the customized HAL_USART_MspInit(&husart) API.
-
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup USART USART
-  * @brief HAL USART Synchronous module driver
-  * @{
-  */
-
-#ifdef HAL_USART_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup USART_Private_Constants USART Private Constants
-  * @{
-  */
-#define USART_DUMMY_DATA          ((uint16_t) 0xFFFFU)           /*!< USART transmitted dummy data                     */
-#define USART_TEACK_REACK_TIMEOUT ((uint32_t) 1000U)             /*!< USART TX or RX enable acknowledge time-out value */
-#define USART_CR1_FIELDS          ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \
-                                              USART_CR1_TE | USART_CR1_RE  | USART_CR1_OVER8))    /*!< USART CR1 fields of parameters set by USART_SetConfig API */
-#define USART_CR2_FIELDS          ((uint32_t)(USART_CR2_CPHA | USART_CR2_CPOL | \
-                                              USART_CR2_CLKEN | USART_CR2_LBCL | USART_CR2_STOP)) /*!< USART CR2 fields of parameters set by USART_SetConfig API */
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup USART_Private_Functions
-  * @{
-  */
-static void USART_EndTransfer(USART_HandleTypeDef *husart);
-static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
-static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
-static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
-static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
-static void USART_DMAError(DMA_HandleTypeDef *hdma);
-static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
-static void USART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
-static void USART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
-static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
-static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart);
-static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart);
-static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart);
-static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart);
-static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart);
-static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup USART_Exported_Functions USART Exported Functions
-  * @{
-  */
-
-/** @defgroup USART_Exported_Functions_Group1 Initialization and de-initialization functions
-  *  @brief    Initialization and Configuration functions
-  *
-@verbatim
- ===============================================================================
-            ##### Initialization and Configuration functions #####
- ===============================================================================
-    [..]
-    This subsection provides a set of functions allowing to initialize the USART
-    in asynchronous and in synchronous modes.
-      (+) For the asynchronous mode only these parameters can be configured:
-        (++) Baud Rate
-        (++) Word Length
-        (++) Stop Bit
-        (++) Parity: If the parity is enabled, then the MSB bit of the data written
-             in the data register is transmitted but is changed by the parity bit.
-        (++) USART polarity
-        (++) USART phase
-        (++) USART LastBit
-        (++) Receiver/transmitter modes
-
-    [..]
-    The HAL_USART_Init() function follows the USART  synchronous configuration
-    procedure (details for the procedure are available in reference manual).
-
-@endverbatim
-
-  Depending on the frame length defined by the M1 and M0 bits (7-bit, 
-  8-bit or 9-bit), the possible USART formats are listed in the 
-  following table.
-  
-    Table 1. USART frame format.
-    +-----------------------------------------------------------------------+
-    |  M1 bit |  M0 bit |  PCE bit  |            USART frame                |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    0    |    0      |    | SB |    8 bit data   | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    0    |    1      |    | SB | 7 bit data | PB | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    1    |    0      |    | SB |    9 bit data   | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    1    |    1      |    | SB | 8 bit data | PB | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    1    |    0    |    0      |    | SB |    7 bit data   | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    1    |    0    |    1      |    | SB | 6 bit data | PB | STB |     |
-    +-----------------------------------------------------------------------+
-
-  * @{
-  */
-
-/**
-  * @brief  Initialize the USART mode according to the specified
-  *         parameters in the USART_InitTypeDef and initialize the associated handle.
-  * @param  husart USART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart)
-{
-  /* Check the USART handle allocation */
-  if(husart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_USART_INSTANCE(husart->Instance));
-
-  if(husart->State == HAL_USART_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    husart->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK */
-    HAL_USART_MspInit(husart);
-  }
-
-  husart->State = HAL_USART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_USART_DISABLE(husart);
-
-  /* Set the Usart Communication parameters */
-  if (USART_SetConfig(husart) == HAL_ERROR)
-  {
-    return HAL_ERROR;
-  }
-
-  /* In Synchronous mode, the following bits must be kept cleared:
-  - LINEN bit in the USART_CR2 register
-  - HDSEL, SCEN and IREN bits in the USART_CR3 register.*/
-  husart->Instance->CR2 &= ~USART_CR2_LINEN;
-  husart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN);
-
-  /* Enable the Peripheral */
-  __HAL_USART_ENABLE(husart);
-
-  /* TEACK and/or REACK to check before moving husart->State to Ready */
-  return (USART_CheckIdleState(husart));
-}
-
-/**
-  * @brief  DeInitialize the USART peripheral.
-  * @param  husart USART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart)
-{
-  /* Check the USART handle allocation */
-  if(husart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_USART_INSTANCE(husart->Instance));
-
-  husart->State = HAL_USART_STATE_BUSY;
-
-  husart->Instance->CR1 = 0x0U;
-  husart->Instance->CR2 = 0x0U;
-  husart->Instance->CR3 = 0x0U;
-
-  /* DeInit the low level hardware */
-  HAL_USART_MspDeInit(husart);
-
-  husart->ErrorCode = HAL_USART_ERROR_NONE;
-  husart->State = HAL_USART_STATE_RESET;
-
-  /* Process Unlock */
-  __HAL_UNLOCK(husart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Initialize the USART MSP.
-  * @param husart: USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_MspInit(USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_USART_MspInit can be implemented in the user file
-   */
-}
-
-/**
-  * @brief DeInitialize the USART MSP.
-  * @param husart: USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_MspDeInit(USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_USART_MspDeInit can be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_Exported_Functions_Group2 IO operation functions
-  * @brief    USART Transmit and Receive functions
-  *
-@verbatim
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
-    [..] This subsection provides a set of functions allowing to manage the USART synchronous
-    data transfers.
-
-    [..] The USART supports master mode only: it cannot receive or send data related to an input
-         clock (SCLK is always an output).
-
-    (#) There are two modes of transfer:
-       (++) Blocking mode: The communication is performed in polling mode.
-            The HAL status of all data processing is returned by the same function
-            after finishing transfer.
-       (++) No-Blocking mode: The communication is performed using Interrupts
-           or DMA, These API's return the HAL status.
-           The end of the data processing will be indicated through the
-           dedicated USART IRQ when using Interrupt mode or the DMA IRQ when
-           using DMA mode.
-           The HAL_USART_TxCpltCallback(), HAL_USART_RxCpltCallback() and HAL_USART_TxRxCpltCallback() user callbacks
-           will be executed respectively at the end of the transmit or Receive process
-           The HAL_USART_ErrorCallback()user callback will be executed when a communication error is detected
-
-    (#) Blocking mode API's are :
-        (++) HAL_USART_Transmit()in simplex mode
-        (++) HAL_USART_Receive() in full duplex receive only
-        (++) HAL_USART_TransmitReceive() in full duplex mode
-
-    (#) Non-Blocking mode API's with Interrupt are :
-        (++) HAL_USART_Transmit_IT()in simplex mode
-        (++) HAL_USART_Receive_IT() in full duplex receive only
-        (++) HAL_USART_TransmitReceive_IT()in full duplex mode
-        (++) HAL_USART_IRQHandler()
-
-    (#) No-Blocking mode API's  with DMA are :
-        (++) HAL_USART_Transmit_DMA()in simplex mode
-        (++) HAL_USART_Receive_DMA() in full duplex receive only
-        (++) HAL_USART_TransmitReceive_DMA() in full duplex mode
-        (++) HAL_USART_DMAPause()
-        (++) HAL_USART_DMAResume()
-        (++) HAL_USART_DMAStop()
-
-    (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode:
-        (++) HAL_USART_TxCpltCallback()
-        (++) HAL_USART_RxCpltCallback()
-        (++) HAL_USART_TxHalfCpltCallback()
-        (++) HAL_USART_RxHalfCpltCallback()
-        (++) HAL_USART_ErrorCallback()
-        (++) HAL_USART_TxRxCpltCallback()
-
-    (#) Non-Blocking mode transfers could be aborted using Abort API's :
-        (+) HAL_USART_Abort()
-        (+) HAL_USART_Abort_IT()
-
-    (#) For Abort services based on interrupts (HAL_USART_Abort_IT), a Abort Complete Callbacks is provided:
-        (+) HAL_USART_AbortCpltCallback()
-
-    (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
-        Errors are handled as follows :
-       (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is 
-           to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception .
-           Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type,
-           and HAL_USART_ErrorCallback() user callback is executed. Transfer is kept ongoing on USART side.
-           If user wants to abort it, Abort services should be called by user.
-       (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
-           This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
-           Error code is set to allow user to identify error type, and HAL_USART_ErrorCallback() user callback is executed.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Simplex send an amount of data in blocking mode.
-  * @param  husart USART handle.
-  * @param  pTxData Pointer to data buffer.
-  * @param  Size Amount of data to be sent.
-  * @param  Timeout Timeout duration.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout)
-{
-  uint16_t* tmp;
-  uint32_t tickstart = 0;
-
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pTxData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pTxData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if((((uint32_t)pTxData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_TX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    husart->TxXferSize = Size;
-    husart->TxXferCount = Size;
-
-    /* Check the remaining data to be sent */
-    while(husart->TxXferCount > 0U)
-    {
-      husart->TxXferCount--;
-      if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-      {
-        tmp = (uint16_t*) pTxData;
-        husart->Instance->TDR = (*tmp & (uint16_t)0x01FFU);
-        pTxData += 2U;
-      }
-      else
-      {
-        husart->Instance->TDR = (*pTxData++ & (uint8_t)0xFFU);
-      }
-    }
-
-    if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    /* At end of Tx process, restore husart->State to Ready */
-    husart->State = HAL_USART_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Receive an amount of data in blocking mode.
-  * @note  To receive synchronous data, dummy data are simultaneously transmitted.
-  * @param husart USART handle.
-  * @param pRxData Pointer to data buffer.
-  * @param Size Amount of data to be received.
-  * @param Timeout Timeout duration.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
-{
-  uint16_t* tmp;
-  uint16_t uhMask;
-  uint32_t tickstart = 0;
-
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pRxData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pTxData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if((((uint32_t)pRxData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_RX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    husart->RxXferSize = Size;
-    husart->RxXferCount = Size;
-
-    /* Computation of USART mask to apply to RDR register */
-    USART_MASK_COMPUTATION(husart);
-    uhMask = husart->Mask;
-
-    /* as long as data have to be received */
-    while(husart->RxXferCount > 0U)
-    {
-      husart->RxXferCount--;
-
-      /* Wait until TXE flag is set to send dummy byte in order to generate the
-      * clock for the slave to send data.
-       * Whatever the frame length (7, 8 or 9-bit long), the same dummy value
-       * can be written for all the cases. */
-      if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x0FFU);
-
-      /* Wait for RXNE Flag */
-      if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-
-      if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-      {
-        tmp = (uint16_t*) pRxData ;
-        *tmp = (uint16_t)(husart->Instance->RDR & uhMask);
-        pRxData +=2U;
-      }
-      else
-      {
-        *pRxData++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
-      }
-    }
-
-    /* At end of Rx process, restore husart->State to Ready */
-    husart->State = HAL_USART_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Full-Duplex Send and Receive an amount of data in blocking mode.
-  * @param  husart USART handle.
-  * @param  pTxData pointer to TX data buffer.
-  * @param  pRxData pointer to RX data buffer.
-  * @param  Size amount of data to be sent (same amount to be received).
-  * @param  Timeout Timeout duration.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
-{
-  uint16_t* tmp;
-  uint16_t uhMask;
-  uint32_t tickstart = 0;
-
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pTxData and pRxData buffers provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR/retrieved from RDR will be 
-       handled through a u16 cast. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if(((((uint32_t)pTxData)&1) != 0) || ((((uint32_t)pRxData)&1) != 0))
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_RX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    husart->RxXferSize = Size;
-    husart->TxXferSize = Size;
-    husart->TxXferCount = Size;
-    husart->RxXferCount = Size;
-
-    /* Computation of USART mask to apply to RDR register */
-    USART_MASK_COMPUTATION(husart);
-    uhMask = husart->Mask;
-
-    /* Check the remain data to be sent */
-    while(husart->TxXferCount > 0U)
-    {
-      husart->TxXferCount--;
-      husart->RxXferCount--;
-
-      /* Wait until TXE flag is set to send data */
-      if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-      {
-        tmp = (uint16_t*) pTxData;
-        husart->Instance->TDR = (*tmp & uhMask);
-        pTxData += 2U;
-      }
-      else
-      {
-        husart->Instance->TDR = (*pTxData++ & (uint8_t)uhMask);
-      }
-
-      /* Wait for RXNE Flag */
-      if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-
-      if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-      {
-        tmp = (uint16_t*) pRxData ;
-        *tmp = (uint16_t)(husart->Instance->RDR & uhMask);
-        pRxData +=2U;
-      }
-      else
-      {
-        *pRxData++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
-      }
-    }
-
-    /* At end of TxRx process, restore husart->State to Ready */
-    husart->State = HAL_USART_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Send an amount of data in interrupt mode.
-  * @param  husart USART handle.
-  * @param  pTxData pointer to data buffer.
-  * @param  Size amount of data to be sent.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size)
-{
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pTxData == NULL ) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pTxData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if((((uint32_t)pTxData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->pTxBuffPtr = pTxData;
-    husart->TxXferSize = Size;
-    husart->TxXferCount = Size;
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_TX;
-
-    /* The USART Error Interrupts: (Frame error, noise error, overrun error)
-    are not managed by the USART Transmit Process to avoid the overrun interrupt
-    when the usart mode is configured for transmit and receive "USART_MODE_TX_RX"
-    to benefit for the frame error and noise interrupts the usart mode should be
-    configured only for transmit "USART_MODE_TX" */
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    /* Enable the USART Transmit Data Register Empty Interrupt */
-    __HAL_USART_ENABLE_IT(husart, USART_IT_TXE);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in interrupt mode.
-  * @note   To receive synchronous data, dummy data are simultaneously transmitted.
-  * @param  husart USART handle.
-  * @param  pRxData pointer to data buffer.
-  * @param  Size amount of data to be received.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
-{
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pRxData == NULL ) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pTxData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if((((uint32_t)pRxData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->pRxBuffPtr = pRxData;
-    husart->RxXferSize = Size;
-    husart->RxXferCount = Size;
-
-    USART_MASK_COMPUTATION(husart);
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_RX;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    /* Enable the USART Parity Error and Data Register not empty Interrupts */
-    SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
-
-    /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-    /* Send dummy byte in order to generate the clock for the Slave to send the next data */
-    if(husart->Init.WordLength == USART_WORDLENGTH_9B)
-    {
-      husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x01FFU);
-    }
-    else
-    {
-      husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FFU);
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Full-Duplex Send and Receive an amount of data in interrupt mode.
-  * @param  husart USART handle.
-  * @param  pTxData pointer to TX data buffer.
-  * @param  pRxData pointer to RX data buffer.                         
-  * @param  Size amount of data to be sent (same amount to be received).
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData,  uint16_t Size)
-{
-
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pTxData and pRxData buffers provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR/retrieved from RDR will be 
-       handled through a u16 cast. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if(((((uint32_t)pTxData)&1) != 0) || ((((uint32_t)pRxData)&1) != 0))
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->pRxBuffPtr = pRxData;
-    husart->RxXferSize = Size;
-    husart->RxXferCount = Size;
-    husart->pTxBuffPtr = pTxData;
-    husart->TxXferSize = Size;
-    husart->TxXferCount = Size;
-
-    /* Computation of USART mask to apply to RDR register */
-    USART_MASK_COMPUTATION(husart);
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_TX_RX;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the USART Parity Error and USART Data Register not empty Interrupts */
-    SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
-
-    /* Enable the USART Transmit Data Register Empty Interrupt */
-    SET_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Send an amount of data in DMA mode.
-  * @param  husart USART handle.
-  * @param  pTxData pointer to data buffer.
-  * @param  Size amount of data to be sent.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size)
-{
-  uint32_t *tmp;
-
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pTxData == NULL ) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pTxData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if((((uint32_t)pTxData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->pTxBuffPtr = pTxData;
-    husart->TxXferSize = Size;
-    husart->TxXferCount = Size;
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_TX;
-
-    /* Set the USART DMA transfer complete callback */
-    husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt;
-
-    /* Set the USART DMA Half transfer complete callback */
-    husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt;
-
-    /* Set the DMA error callback */
-    husart->hdmatx->XferErrorCallback = USART_DMAError;
-
-    /* Enable the USART transmit DMA channel */
-    tmp = (uint32_t*)&pTxData;
-    HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size);
-
-    /* Clear the TC flag in the ICR register */
-    __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_TCF);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    /* Enable the DMA transfer for transmit request by setting the DMAT bit
-       in the USART CR3 register */
-    SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in DMA mode.
-  * @param  husart USART handle.
-  * @param  pRxData pointer to data buffer.
-  * @param  Size amount of data to be received.
-  * @note   When the USART parity is enabled (PCE = 1), the received data contain
-  *         the parity bit (MSB position).
-  * @note   The USART DMA transmit channel must be configured in order to generate the clock for the slave.  
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
-{
-  uint32_t *tmp;
-
-  /* Check that a Rx process is not already ongoing */
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pRxData == NULL ) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pTxData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if((((uint32_t)pRxData)&1) != 0)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->pRxBuffPtr = pRxData;
-    husart->RxXferSize = Size;
-    husart->pTxBuffPtr = pRxData;
-    husart->TxXferSize = Size;
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_RX;
-
-    /* Set the USART DMA Rx transfer complete callback */
-    husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt;
-
-    /* Set the USART DMA Half transfer complete callback */
-    husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt;
-
-    /* Set the USART DMA Rx transfer error callback */
-    husart->hdmarx->XferErrorCallback = USART_DMAError;
-
-    /* Enable the USART receive DMA channel */
-    tmp = (uint32_t*)&pRxData;
-    HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(uint32_t*)tmp, Size);
-
-    /* Enable the USART transmit DMA channel: the transmit channel is used in order
-       to generate in the non-blocking mode the clock to the slave device,
-       this mode isn't a simplex receive mode but a full-duplex receive mode */
-    tmp = (uint32_t*)&pRxData;
-    /* Set the USART DMA Tx Complete and Error callback to Null */
-    husart->hdmatx->XferErrorCallback = NULL;
-    husart->hdmatx->XferHalfCpltCallback = NULL;
-    husart->hdmatx->XferCpltCallback = NULL;
-    HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    /* Enable the USART Parity Error Interrupt */
-    SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
-
-    /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the DMA transfer for the receiver request by setting the DMAR bit
-       in the USART CR3 register */
-    SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Enable the DMA transfer for transmit request by setting the DMAT bit
-       in the USART CR3 register */
-    SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Full-Duplex Transmit Receive an amount of data in non-blocking mode.
-  * @param  husart USART handle.
-  * @param  pTxData pointer to TX data buffer.
-  * @param  pRxData pointer to RX data buffer.
-  * @param  Size amount of data to be received/sent.
-  * @note   When the USART parity is enabled (PCE = 1) the data received contain the parity bit.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
-{
-  uint32_t *tmp;
-
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pTxData and pRxData buffers provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR/retrieved from RDR will be 
-       handled through a u16 cast. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if(((((uint32_t)pTxData)&1) != 0) || ((((uint32_t)pRxData)&1) != 0))
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->pRxBuffPtr = pRxData;
-    husart->RxXferSize = Size;
-    husart->pTxBuffPtr = pTxData;
-    husart->TxXferSize = Size;
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_TX_RX;
-
-    /* Set the USART DMA Rx transfer complete callback */
-    husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt;
-
-    /* Set the USART DMA Half transfer complete callback */
-    husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt;
-
-    /* Set the USART DMA Tx transfer complete callback */
-    husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt;
-
-    /* Set the USART DMA Half transfer complete callback */
-    husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt;
-
-    /* Set the USART DMA Tx transfer error callback */
-    husart->hdmatx->XferErrorCallback = USART_DMAError;
-
-    /* Set the USART DMA Rx transfer error callback */
-    husart->hdmarx->XferErrorCallback = USART_DMAError;
-
-    /* Enable the USART receive DMA channel */
-    tmp = (uint32_t*)&pRxData;
-    HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(uint32_t*)tmp, Size);
-
-    /* Enable the USART transmit DMA channel */
-    tmp = (uint32_t*)&pTxData;
-    HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    /* Enable the USART Parity Error Interrupt */
-    SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
-
-    /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-    /* Clear the Overrun flag: mandatory for the second transfer in circular mode */
-    __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF);
-
-    /* Clear the TC flag in the ICR register */
-    __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_TCF);
-
-    /* Enable the DMA transfer for the receiver request by setting the DMAR bit
-       in the USART CR3 register */
-    SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Enable the DMA transfer for transmit request by setting the DMAT bit
-       in the USART CR3 register */
-    SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Pause the DMA Transfer.
-  * @param  husart USART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart)
-{
-  /* Process Locked */
-  __HAL_LOCK(husart);
-
-  if( (husart->State == HAL_USART_STATE_BUSY_TX) &&
-      (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT)))
-  {
-    /* Disable the USART DMA Tx request */
-    CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-  }
-  else if( (husart->State == HAL_USART_STATE_BUSY_RX) ||
-           (husart->State == HAL_USART_STATE_BUSY_TX_RX) )
-  {
-    if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
-    {
-      /* Disable the USART DMA Tx request */
-      CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-    }
-    if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
-    {
-      /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-      CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
-      CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-      /* Disable the USART DMA Rx request */
-      CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-    }
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(husart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Resume the DMA Transfer.
-  * @param  husart USART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart)
-{
-  /* Process Locked */
-  __HAL_LOCK(husart);
-
-  if(husart->State == HAL_USART_STATE_BUSY_TX)
-  {
-    /* Enable the USART DMA Tx request */
-    SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-  }
-  else if( (husart->State == HAL_USART_STATE_BUSY_RX) ||
-           (husart->State == HAL_USART_STATE_BUSY_TX_RX) )
-  {
-    /* Clear the Overrun flag before resuming the Rx transfer*/
-    __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF);
-
-    /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
-    SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
-    SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the USART DMA Rx request  before the DMA Tx request */
-    SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Enable the USART DMA Tx request */
-    SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(husart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stop the DMA Transfer.
-  * @param  husart USART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart)
-{
-  /* The Lock is not implemented on this API to allow the user application
-     to call the HAL USART API under callbacks HAL_USART_TxCpltCallback() / HAL_USART_RxCpltCallback() /
-     HAL_USART_TxHalfCpltCallback / HAL_USART_RxHalfCpltCallback: 
-     indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete  
-     interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of 
-     the stream and the corresponding call back is executed. */
-
-  /* Disable the USART Tx/Rx DMA requests */
-  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-
-  /* Abort the USART DMA tx channel */
-  if(husart->hdmatx != NULL)
-  {
-    HAL_DMA_Abort(husart->hdmatx);
-  }
-  /* Abort the USART DMA rx channel */
-  if(husart->hdmarx != NULL)
-  {
-    HAL_DMA_Abort(husart->hdmarx);
-  }
-
-  USART_EndTransfer(husart);
-  husart->State = HAL_USART_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing transfers (blocking mode).
-  * @param  husart USART handle.
-  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable USART Interrupts (Tx and Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart)
-{
-  /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
-  CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the USART DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the USART DMA Tx channel : use blocking DMA Abort API (no callback) */
-    if(husart->hdmatx != NULL)
-    {
-      /* Set the USART DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      husart->hdmatx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(husart->hdmatx);
-    }
-  }
-
-  /* Disable the USART DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the USART DMA Rx channel : use blocking DMA Abort API (no callback) */
-    if(husart->hdmarx != NULL)
-    {
-      /* Set the USART DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      husart->hdmarx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(husart->hdmarx);
-    }
-  }
-
-  /* Reset Tx and Rx transfer counters */
-  husart->TxXferCount = 0; 
-  husart->RxXferCount = 0; 
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF | USART_CLEAR_NEF | USART_CLEAR_PEF | USART_CLEAR_FEF);
-
-  /* Restore husart->State to Ready */
-  husart->State  = HAL_USART_STATE_READY;
-
-  /* Reset Handle ErrorCode to No Error */
-  husart->ErrorCode = HAL_USART_ERROR_NONE;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing transfers (Interrupt mode).
-  * @param  husart USART handle.
-  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable USART Interrupts (Tx and Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart)
-{
-  uint32_t abortcplt = 1;
-  
-  /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
-  CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-  /* If DMA Tx and/or DMA Rx Handles are associated to USART Handle, DMA Abort complete callbacks should be initialised
-     before any call to DMA Abort functions */
-  /* DMA Tx Handle is valid */
-  if(husart->hdmatx != NULL)
-  {
-    /* Set DMA Abort Complete callback if USART DMA Tx request if enabled.
-       Otherwise, set it to NULL */
-    if(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
-    {
-      husart->hdmatx->XferAbortCallback = USART_DMATxAbortCallback;
-    }
-    else
-    {
-      husart->hdmatx->XferAbortCallback = NULL;
-    }
-  }
-  /* DMA Rx Handle is valid */
-  if(husart->hdmarx != NULL)
-  {
-    /* Set DMA Abort Complete callback if USART DMA Rx request if enabled.
-       Otherwise, set it to NULL */
-    if(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
-    {
-      husart->hdmarx->XferAbortCallback = USART_DMARxAbortCallback;
-    }
-    else
-    {
-      husart->hdmarx->XferAbortCallback = NULL;
-    }
-  }
-  
-  /* Disable the USART DMA Tx request if enabled */
-  if(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
-  {
-    /* Disable DMA Tx at USART level */
-    CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the USART DMA Tx channel : use non blocking DMA Abort API (callback) */
-    if(husart->hdmatx != NULL)
-    {
-      /* USART Tx DMA Abort callback has already been initialised : 
-         will lead to call HAL_USART_AbortCpltCallback() at end of DMA abort procedure */
-
-      /* Abort DMA TX */
-      if(HAL_DMA_Abort_IT(husart->hdmatx) != HAL_OK)
-      {
-        husart->hdmatx->XferAbortCallback = NULL;
-      }
-      else
-      {
-        abortcplt = 0;
-      }
-    }
-  }
-
-  /* Disable the USART DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the USART DMA Rx channel : use non blocking DMA Abort API (callback) */
-    if(husart->hdmarx != NULL)
-    {
-      /* USART Rx DMA Abort callback has already been initialised : 
-         will lead to call HAL_USART_AbortCpltCallback() at end of DMA abort procedure */
-
-      /* Abort DMA RX */
-      if(HAL_DMA_Abort_IT(husart->hdmarx) != HAL_OK)
-      {
-        husart->hdmarx->XferAbortCallback = NULL;
-        abortcplt = 1;
-      }
-      else
-      {
-        abortcplt = 0;
-      }
-    }
-  }
-
-  /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
-  if (abortcplt == 1)
-  {
-    /* Reset Tx and Rx transfer counters */
-    husart->TxXferCount = 0; 
-    husart->RxXferCount = 0;
-
-    /* Reset errorCode */
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-
-    /* Clear the Error flags in the ICR register */
-    __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF | USART_CLEAR_NEF | USART_CLEAR_PEF | USART_CLEAR_FEF);
-
-    /* Restore husart->State to Ready */
-    husart->State  = HAL_USART_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_USART_AbortCpltCallback(husart);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle USART interrupt request.
-  * @param  husart USART handle.
-  * @retval None
-  */
-void HAL_USART_IRQHandler(USART_HandleTypeDef *husart)
-{
-  uint32_t isrflags   = READ_REG(husart->Instance->ISR);
-  uint32_t cr1its     = READ_REG(husart->Instance->CR1);
-  uint32_t cr3its;
-  uint32_t errorflags;
-
-  /* If no error occurs */
-  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
-  if (errorflags == RESET)
-  {
-    /* USART in mode Receiver ---------------------------------------------------*/
-    if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-    {
-      if(husart->State == HAL_USART_STATE_BUSY_RX)
-      {
-        USART_Receive_IT(husart);
-      }
-      else
-      {
-        USART_TransmitReceive_IT(husart);
-      }
-      return;
-    }
-  }
-
-  /* If some errors occur */
-  cr3its = READ_REG(husart->Instance->CR3);
-  if(   (errorflags != RESET)
-     && (   ((cr3its & USART_CR3_EIE) != RESET)
-         || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)) )
-  {
-    /* USART parity error interrupt occurred -------------------------------------*/
-    if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
-    {
-      __HAL_USART_CLEAR_IT(husart, USART_CLEAR_PEF);
-
-      husart->ErrorCode |= HAL_USART_ERROR_PE;
-    }
-
-    /* USART frame error interrupt occurred --------------------------------------*/
-    if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    {
-      __HAL_USART_CLEAR_IT(husart, USART_CLEAR_FEF);
-
-      husart->ErrorCode |= HAL_USART_ERROR_FE;
-    }
-
-    /* USART noise error interrupt occurred --------------------------------------*/
-    if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    {
-      __HAL_USART_CLEAR_IT(husart, USART_CLEAR_NEF);
-
-      husart->ErrorCode |= HAL_USART_ERROR_NE;
-    }
-
-    /* USART Over-Run interrupt occurred -----------------------------------------*/
-    if(((isrflags & USART_ISR_ORE) != RESET) &&
-       (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET)))
-    {
-      __HAL_USART_CLEAR_IT(husart, USART_CLEAR_OREF);
-
-      husart->ErrorCode |= HAL_USART_ERROR_ORE;
-    }
-
-    /* Call USART Error Call back function if need be --------------------------*/
-    if(husart->ErrorCode != HAL_USART_ERROR_NONE)
-    {
-      /* USART in mode Receiver ---------------------------------------------------*/
-      if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-      {
-        if(husart->State == HAL_USART_STATE_BUSY_RX)
-        {
-          USART_Receive_IT(husart);
-        }
-        else
-        {
-          USART_TransmitReceive_IT(husart);
-        }
-      }
-
-      /* If Overrun error occurs, or if any error occurs in DMA mode reception,
-         consider error as blocking */
-      if (((husart->ErrorCode & HAL_USART_ERROR_ORE) != RESET) ||
-          (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR)))
-      {  
-        /* Blocking error : transfer is aborted
-           Set the USART state ready to be able to start again the process,
-           Disable Interrupts, and disable DMA requests, if ongoing */
-        USART_EndTransfer(husart);
-
-        /* Disable the USART DMA Rx request if enabled */
-        if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
-        {
-          CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR | USART_CR3_DMAR);
-
-          /* Abort the USART DMA Tx channel */
-          if(husart->hdmatx != NULL)
-          {
-            /* Set the USART Tx DMA Abort callback to NULL : no callback
-               executed at end of DMA abort procedure */
-            husart->hdmatx->XferAbortCallback = NULL;
-            
-            /* Abort DMA TX */
-            HAL_DMA_Abort_IT(husart->hdmatx);
-          }
-
-          /* Abort the USART DMA Rx channel */
-          if(husart->hdmarx != NULL)
-          {
-            /* Set the USART Rx DMA Abort callback : 
-               will lead to call HAL_USART_ErrorCallback() at end of DMA abort procedure */
-            husart->hdmarx->XferAbortCallback = USART_DMAAbortOnError;
-
-            /* Abort DMA RX */
-            if(HAL_DMA_Abort_IT(husart->hdmarx) != HAL_OK)
-            {
-              /* Call Directly husart->hdmarx->XferAbortCallback function in case of error */
-              husart->hdmarx->XferAbortCallback(husart->hdmarx);
-            }
-          }
-          else
-          {
-            /* Call user error callback */
-            HAL_USART_ErrorCallback(husart);
-          }
-        }
-        else
-        {
-          /* Call user error callback */
-          HAL_USART_ErrorCallback(husart);
-        }
-      }
-      else
-      {
-        /* Non Blocking error : transfer could go on. 
-           Error is notified to user through user error callback */
-        HAL_USART_ErrorCallback(husart);
-        husart->ErrorCode = HAL_USART_ERROR_NONE;
-      }
-    }
-    return;
-
-  } /* End if some error occurs */
-
-
-  /* USART in mode Transmitter ------------------------------------------------*/
-  if(((isrflags & USART_ISR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
-  {
-    if(husart->State == HAL_USART_STATE_BUSY_TX)
-    {
-      USART_Transmit_IT(husart);
-    }
-    else
-    {
-      USART_TransmitReceive_IT(husart);
-    }
-    return;
-  }
-
-  /* USART in mode Transmitter (transmission end) -----------------------------*/
-  if(((isrflags & USART_ISR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
-  {
-    USART_EndTransmit_IT(husart);
-    return;
-  }
-
-}
-
-/**
-  * @brief Tx Transfer completed callback.
-  * @param husart: USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_USART_TxCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Tx Half Transfer completed callback.
-  * @param husart: USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-           the HAL_USART_TxHalfCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Rx Transfer completed callback.
-  * @param husart: USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-           the HAL_USART_RxCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief Rx Half Transfer completed callback.
-  * @param husart: USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_USART_RxHalfCpltCallback can be implemented in the user file
-   */
-}
-
-/**
-  * @brief Tx/Rx Transfers completed callback for the non-blocking process.
-  * @param husart: USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_USART_TxRxCpltCallback can be implemented in the user file
-   */
-}
-
-/**
-  * @brief USART error callback.
-  * @param husart: USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_USART_ErrorCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  USART Abort Complete callback.
-  * @param  husart USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_AbortCpltCallback (USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_USART_AbortCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_Exported_Functions_Group4 Peripheral State and Error functions
- *  @brief   USART Peripheral State and Error functions
- *
-@verbatim
-  ==============================================================================
-            ##### Peripheral State and Error functions #####
-  ==============================================================================
-    [..]
-    This subsection provides functions allowing to :
-      (+) Return the USART handle state
-      (+) Return the USART handle error code
-
-@endverbatim
-  * @{
-  */
-
-
-/**
-  * @brief Return the USART handle state.
-  * @param husart : pointer to a USART_HandleTypeDef structure that contains
-  *              the configuration information for the specified USART.
-  * @retval USART handle state
-  */
-HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart)
-{
-  return husart->State;
-}
-
-/**
-  * @brief Return the USART error code.
-  * @param husart : pointer to a USART_HandleTypeDef structure that contains
-  *              the configuration information for the specified USART.
-  * @retval USART handle Error Code
-  */
-uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart)
-{
-  return husart->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_Private_Functions USART Private Functions
- * @{
- */
-
-/**
-  * @brief  End ongoing transfer on USART peripheral (following error detection or Transfer completion).
-  * @param  husart USART handle.
-  * @retval None
-  */
-static void USART_EndTransfer(USART_HandleTypeDef *husart)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(husart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-  /* At end of process, restore husart->State to Ready */
-  husart->State = HAL_USART_STATE_READY;
-}
-
-/**
-  * @brief  DMA USART transmit process complete callback.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
-{
-  USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
-
-  /* DMA Normal mode */
-  if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
-  {
-    husart->TxXferCount = 0U;
-
-    if(husart->State == HAL_USART_STATE_BUSY_TX)
-    {
-      /* Disable the DMA transfer for transmit request by resetting the DMAT bit
-         in the USART CR3 register */
-      CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-
-      /* Enable the USART Transmit Complete Interrupt */
-      __HAL_USART_ENABLE_IT(husart, USART_IT_TC);
-    }
-  }
-  /* DMA Circular mode */
-  else
-  {
-    if(husart->State == HAL_USART_STATE_BUSY_TX)
-    {
-    HAL_USART_TxCpltCallback(husart);
-   }
- }
-}
-
-/**
-  * @brief  DMA USART transmit process half complete callback.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
-{
-  USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
-
-  HAL_USART_TxHalfCpltCallback(husart);
-}
-
-/**
-  * @brief  DMA USART receive process complete callback.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
-
-  /* DMA Normal mode */
-  if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
-  {
-    husart->RxXferCount = 0;
-
-    /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-    CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
-    CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-    /* Disable the DMA RX transfer for the receiver request by resetting the DMAR bit
-       in USART CR3 register */
-    CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-    /* similarly, disable the DMA TX transfer that was started to provide the
-       clock to the slave device */
-    CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-
-    if(husart->State == HAL_USART_STATE_BUSY_RX)
-    {
-      HAL_USART_RxCpltCallback(husart);
-    }
-    /* The USART state is HAL_USART_STATE_BUSY_TX_RX */
-    else
-    {
-      HAL_USART_TxRxCpltCallback(husart);
-    }
-    husart->State= HAL_USART_STATE_READY;
-  }
-  /* DMA circular mode */
-  else
-  {
-    if(husart->State == HAL_USART_STATE_BUSY_RX)
-    {
-      HAL_USART_RxCpltCallback(husart);
-    }
-    /* The USART state is HAL_USART_STATE_BUSY_TX_RX */
-    else
-    {
-      HAL_USART_TxRxCpltCallback(husart);
-    }
-  }    
-
-}
-
-/**
-  * @brief  DMA USART receive process half complete callback.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
-{
-  USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
-
-  HAL_USART_RxHalfCpltCallback(husart);
-}
-
-/**
-  * @brief DMA USART communication error callback.
-  * @param  hdma: DMA handle.
-  * @retval None
-  */
-static void USART_DMAError(DMA_HandleTypeDef *hdma)
-{
-  USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
-
-  husart->RxXferCount = 0;
-  husart->TxXferCount = 0;
-  USART_EndTransfer(husart);
-
-  husart->ErrorCode |= HAL_USART_ERROR_DMA;
-  husart->State= HAL_USART_STATE_READY;
-
-  HAL_USART_ErrorCallback(husart);
-}
-
-/**
-  * @brief  DMA USART communication abort callback, when initiated by HAL services on Error
-  *         (To be called at end of DMA Abort procedure following error occurrence).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
-{
-  USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
-  husart->RxXferCount = 0;
-  husart->TxXferCount = 0;
-
-  HAL_USART_ErrorCallback(husart);
-}
-
-/**
-  * @brief  DMA USART Tx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Tx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Rx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void USART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  USART_HandleTypeDef* husart = (USART_HandleTypeDef* )(hdma->Parent);
-  
-  husart->hdmatx->XferAbortCallback = NULL;
-
-  /* Check if an Abort process is still ongoing */
-  if(husart->hdmarx != NULL)
-  {
-    if(husart->hdmarx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-  
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  husart->TxXferCount = 0;
-  husart->RxXferCount = 0;
-
-  /* Reset errorCode */
-  husart->ErrorCode = HAL_USART_ERROR_NONE;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF | USART_CLEAR_NEF | USART_CLEAR_PEF | USART_CLEAR_FEF);
-
-  /* Restore husart->State to Ready */
-  husart->State  = HAL_USART_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_USART_AbortCpltCallback(husart);
-}
-
-
-/**
-  * @brief  DMA USART Rx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Rx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Tx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void USART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  USART_HandleTypeDef* husart = (USART_HandleTypeDef* )(hdma->Parent);
-  
-  husart->hdmarx->XferAbortCallback = NULL;
-
-  /* Check if an Abort process is still ongoing */
-  if(husart->hdmatx != NULL)
-  {
-    if(husart->hdmatx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-  
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  husart->TxXferCount = 0;
-  husart->RxXferCount = 0;
-
-  /* Reset errorCode */
-  husart->ErrorCode = HAL_USART_ERROR_NONE;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF | USART_CLEAR_NEF | USART_CLEAR_PEF | USART_CLEAR_FEF);
-
-  /* Restore husart->State to Ready */
-  husart->State  = HAL_USART_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_USART_AbortCpltCallback(husart);
-}
-
-
-/**
-  * @brief  Handle USART Communication Timeout.
-  * @param  husart USART handle.
-  * @param  Flag Specifies the USART flag to check.
-  * @param  Status the Flag status (SET or RESET).
-  * @param  Tickstart Tick start value
-  * @param  Timeout timeout duration.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
-{
-  /* Wait until flag is set */
-  while((__HAL_USART_GET_FLAG(husart, Flag) ? SET : RESET) == Status)
-  {
-    /* Check for the Timeout */
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0) || ((HAL_GetTick()-Tickstart) > Timeout))
-      {
-        /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
-        CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
-        CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-        husart->State= HAL_USART_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(husart);
-
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @brief Configure the USART peripheral.
-  * @param husart: USART handle.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart)
-{
-  uint32_t tmpreg                      = 0x0U;
-  USART_ClockSourceTypeDef clocksource = USART_CLOCKSOURCE_UNDEFINED;
-  HAL_StatusTypeDef ret                = HAL_OK;
-  uint16_t brrtemp                     = 0x0000U;
-  uint16_t usartdiv                    = 0x0000U;
-
-  /* Check the parameters */
-  assert_param(IS_USART_INSTANCE(husart->Instance));
-  assert_param(IS_USART_POLARITY(husart->Init.CLKPolarity));
-  assert_param(IS_USART_PHASE(husart->Init.CLKPhase));
-  assert_param(IS_USART_LASTBIT(husart->Init.CLKLastBit));
-  assert_param(IS_USART_BAUDRATE(husart->Init.BaudRate));
-  assert_param(IS_USART_WORD_LENGTH(husart->Init.WordLength));
-  assert_param(IS_USART_STOPBITS(husart->Init.StopBits));
-  assert_param(IS_USART_PARITY(husart->Init.Parity));
-  assert_param(IS_USART_MODE(husart->Init.Mode));
-
-
-  /*-------------------------- USART CR1 Configuration -----------------------*/
-   /* Clear M, PCE, PS, TE and RE bits and configure
-   *  the USART Word Length, Parity and Mode:
-   *  set the M bits according to husart->Init.WordLength value
-   *  set PCE and PS bits according to husart->Init.Parity value
-   *  set TE and RE bits according to husart->Init.Mode value 
-   *  force OVER8 to 1 to allow to reach the maximum speed (Fclock/8)  */
-  tmpreg = (uint32_t)husart->Init.WordLength | husart->Init.Parity | husart->Init.Mode | USART_CR1_OVER8;
-  MODIFY_REG(husart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
-
-  /*---------------------------- USART CR2 Configuration ---------------------*/
-  /* Clear and configure the USART Clock, CPOL, CPHA, LBCL and STOP bits:
-   * set CPOL bit according to husart->Init.CLKPolarity value
-   * set CPHA bit according to husart->Init.CLKPhase value
-   * set LBCL bit according to husart->Init.CLKLastBit value
-   * set STOP[13:12] bits according to husart->Init.StopBits value */
-  tmpreg = (uint32_t)(USART_CLOCK_ENABLE);
-  tmpreg |= ((uint32_t)husart->Init.CLKPolarity | (uint32_t)husart->Init.CLKPhase);
-  tmpreg |= ((uint32_t)husart->Init.CLKLastBit | (uint32_t)husart->Init.StopBits);
-  MODIFY_REG(husart->Instance->CR2, USART_CR2_FIELDS, tmpreg);
-
-  /*-------------------------- USART CR3 Configuration -----------------------*/
-  /* no CR3 register configuration                                            */
-
-  /*-------------------------- USART BRR Configuration -----------------------*/
-  /* BRR is filled-up according to OVER8 bit setting which is forced to 1     */ 
-  USART_GETCLOCKSOURCE(husart, clocksource);
-  switch (clocksource)
-  {
-    case USART_CLOCKSOURCE_PCLK1:
-      usartdiv = (uint16_t)(((2U*HAL_RCC_GetPCLK1Freq()) + (husart->Init.BaudRate/2U)) / husart->Init.BaudRate);
-      break;
-    case USART_CLOCKSOURCE_PCLK2:
-      usartdiv = (uint16_t)(((2U*HAL_RCC_GetPCLK2Freq()) + (husart->Init.BaudRate/2U)) / husart->Init.BaudRate);
-      break;
-    case USART_CLOCKSOURCE_HSI:
-      usartdiv = (uint16_t)(((2U*HSI_VALUE) + (husart->Init.BaudRate/2U)) / husart->Init.BaudRate);
-      break;
-    case USART_CLOCKSOURCE_SYSCLK:
-      usartdiv = (uint16_t)(((2U*HAL_RCC_GetSysClockFreq()) + (husart->Init.BaudRate/2U)) / husart->Init.BaudRate);
-      break;
-    case USART_CLOCKSOURCE_LSE:
-      usartdiv = (uint16_t)(((2U*LSE_VALUE) + (husart->Init.BaudRate/2U)) / husart->Init.BaudRate);
-      break;
-    case USART_CLOCKSOURCE_UNDEFINED:
-    default:
-      ret = HAL_ERROR;
-      break;
-  }
-  
-  brrtemp = usartdiv & 0xFFF0U;
-  brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
-  husart->Instance->BRR = brrtemp;
-
-  return ret;
-}
-
-/**
-  * @brief Check the USART Idle State.
-  * @param husart: USART handle.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart)
-{
-  uint32_t tickstart = 0;
-
-  /* Initialize the USART ErrorCode */
-  husart->ErrorCode = HAL_USART_ERROR_NONE;
-
-  /* Init tickstart for timeout managment*/
-  tickstart = HAL_GetTick();
-
-  /* Check if the Transmitter is enabled */
-  if((husart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
-  {
-    /* Wait until TEACK flag is set */
-    if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_TEACK, RESET, tickstart, USART_TEACK_REACK_TIMEOUT) != HAL_OK)
-    {
-      /* Timeout occurred */
-      return HAL_TIMEOUT;
-    }
-  }
-  /* Check if the Receiver is enabled */
-  if((husart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
-  {
-    /* Wait until REACK flag is set */
-    if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_REACK, RESET, tickstart, USART_TEACK_REACK_TIMEOUT) != HAL_OK)
-    {
-      /* Timeout occurred */
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* Initialize the USART state*/
-  husart->State= HAL_USART_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(husart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Simplex send an amount of data in non-blocking mode.
-  * @note   Function called under interruption only, once
-  *         interruptions have been enabled by HAL_USART_Transmit_IT().
-  * @note   The USART errors are not managed to avoid the overrun error.
-  * @param  husart USART handle.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart)
-{
-  uint16_t* tmp = 0U;
-
-  /* Check that a Tx process is ongoing */
-  if(husart->State == HAL_USART_STATE_BUSY_TX)
-  {
-    if(husart->TxXferCount == 0U)
-    {
-      /* Disable the USART Transmit data register empty interrupt */
-      __HAL_USART_DISABLE_IT(husart, USART_IT_TXE);
-
-      /* Enable the USART Transmit Complete Interrupt */
-      __HAL_USART_ENABLE_IT(husart, USART_IT_TC);
-
-      return HAL_OK;
-    }
-    else
-    {
-      if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-      {
-        tmp = (uint16_t*) husart->pTxBuffPtr;
-        husart->Instance->TDR = (*tmp & (uint16_t)0x01FFU);
-        husart->pTxBuffPtr += 2U;
-      }
-      else
-      {
-        husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0xFFU);
-      }
-
-      husart->TxXferCount--;
-
-      return HAL_OK;
-    }
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-
-/**
-  * @brief  Wraps up transmission in non-blocking mode.
-  * @param  husart Pointer to a USART_HandleTypeDef structure that contains
-  *                the configuration information for the specified USART module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart)
-{
-  /* Disable the USART Transmit Complete Interrupt */
-  __HAL_USART_DISABLE_IT(husart, USART_IT_TC);
-
-  /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
-  __HAL_USART_DISABLE_IT(husart, USART_IT_ERR);
-
-  /* Tx process is ended, restore husart->State to Ready */
-  husart->State = HAL_USART_STATE_READY;
-
-  HAL_USART_TxCpltCallback(husart);
-
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  Simplex receive an amount of data in non-blocking mode.
-  * @note   Function called under interruption only, once
-  *         interruptions have been enabled by HAL_USART_Receive_IT().
-  * @param  husart USART handle
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart)
-{
-  uint16_t* tmp;
-  uint16_t uhMask = husart->Mask;
-
-  if(husart->State == HAL_USART_STATE_BUSY_RX)
-  {
-
-    if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      tmp = (uint16_t*) husart->pRxBuffPtr;
-      *tmp = (uint16_t)(husart->Instance->RDR & uhMask);
-      husart->pRxBuffPtr += 2U;
-    }
-    else
-    {
-      *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
-    }
-    /* Send dummy byte in order to generate the clock for the Slave to Send the next data */
-    husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FFU);
-
-    if(--husart->RxXferCount == 0U)
-    {
-      /* Disable the USART Parity Error Interrupt and RXNE interrupt*/
-      CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-
-      /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
-      CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-      /* Rx process is completed, restore husart->State to Ready */
-      husart->State = HAL_USART_STATE_READY;
-
-      HAL_USART_RxCpltCallback(husart);
-
-      return HAL_OK;
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Full-Duplex Send receive an amount of data in full-duplex mode (non-blocking).
-  * @note   Function called under interruption only, once
-  *         interruptions have been enabled by HAL_USART_TransmitReceive_IT().
-  * @param husart: USART handle.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart)
-{
-  uint16_t* tmp;
-  uint16_t uhMask = husart->Mask;
-
-  if(husart->State == HAL_USART_STATE_BUSY_TX_RX)
-  {
-
-    if(husart->TxXferCount != 0x00U)
-    {
-      if(__HAL_USART_GET_FLAG(husart, USART_FLAG_TXE) != RESET)
-      {
-        if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-        {
-          tmp = (uint16_t*) husart->pTxBuffPtr;
-          husart->Instance->TDR = (uint16_t)(*tmp & uhMask);
-          husart->pTxBuffPtr += 2U;
-        }
-        else
-        {
-          husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)uhMask);
-        }
-        husart->TxXferCount--;
-
-        /* Check the latest data transmitted */
-        if(husart->TxXferCount == 0U)
-        {
-           __HAL_USART_DISABLE_IT(husart, USART_IT_TXE);
-        }
-      }
-    }
-
-    if(husart->RxXferCount != 0x00U)
-    {
-      if(__HAL_USART_GET_FLAG(husart, USART_FLAG_RXNE) != RESET)
-      {
-        if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-        {
-          tmp = (uint16_t*) husart->pRxBuffPtr;
-          *tmp = (uint16_t)(husart->Instance->RDR & uhMask);
-          husart->pRxBuffPtr += 2U;
-        }
-        else
-        {
-          *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
-        }
-        husart->RxXferCount--;
-      }
-    }
-
-    /* Check the latest data received */
-    if(husart->RxXferCount == 0U)
-    {
-      /* Disable the USART Parity Error Interrupt and RXNE interrupt*/
-      CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-
-      /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
-      CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-      /* Rx process is completed, restore husart->State to Ready */
-      husart->State = HAL_USART_STATE_READY;
-
-      HAL_USART_TxRxCpltCallback(husart);
-
-      return HAL_OK;
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @}
-  */
-
-#endif /* HAL_USART_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_wwdg.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_wwdg.c
deleted file mode 100755
index 77d6ad4c..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_wwdg.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_wwdg.c
-  * @author  MCD Application Team
-  * @brief   WWDG HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Window Watchdog (WWDG) peripheral:
-  *           + Initialization and Configuration function
-  *           + IO operation functions
-  @verbatim
-  ==============================================================================
-                      ##### WWDG specific features #####
-  ==============================================================================
-  [..]
-    Once enabled the WWDG generates a system reset on expiry of a programmed
-    time period, unless the program refreshes the counter (T[6;0] downcounter)
-    before reaching 0x3F value (i.e. a reset is generated when the counter
-    value rolls over from 0x40 to 0x3F).
-
-    (+) An MCU reset is also generated if the counter value is refreshed
-        before the counter has reached the refresh window value. This
-        implies that the counter must be refreshed in a limited window.
-
-    (+) Once enabled the WWDG cannot be disabled except by a system reset.
-
-    (+) WWDGRST flag in RCC_CSR register informs when a WWDG reset has 
-        occurred (check available with __HAL_RCC_GET_FLAG(RCC_FLAG_WWDGRST)).
-
-    (+) The WWDG downcounter input clock is derived from the APB clock divided
-        by a programmable prescaler.
-
-    (+) WWDG downcounter clock (Hz) = PCLK1 / (4096 * Prescaler)
-
-    (+) WWDG timeout (ms) = (1000 * (T[5;0] + 1)) / (WWDG downcounter clock)
-        where T[5;0] are the lowest 6 bits of downcounter.
-
-    (+) WWDG Counter refresh is allowed between the following limits :
-        (++) min time (ms) = (1000 * (T[5;0] - Window)) / (WWDG downcounter clock)
-        (++) max time (ms) = (1000 * (T[5;0] - 0x40)) / (WWDG downcounter clock)
-
-    (+) Min-max timeout value @32 MHz(PCLK1): ~128.0 us / ~65.54 ms
-
-    (+) The Early Wakeup Interrupt (EWI) can be used if specific safety 
-        operations or data logging must be performed before the actual reset is
-        generated. When the downcounter reaches the value 0x40, an EWI interrupt
-        is generated and the corresponding interrupt service routine (ISR) can 
-        be used to trigger specific actions (such as communications or data 
-        logging), before resetting the device.
-        In some applications, the EWI interrupt can be used to manage a software
-        system check and/or system recovery/graceful degradation, without 
-        generating a WWDG reset. In this case, the corresponding interrupt 
-        service routine (ISR) should reload the WWDG counter to avoid the WWDG 
-        reset, then trigger the required actions.
-        Note:When the EWI interrupt cannot be served, e.g. due to a system lock 
-        in a higher priority task, the WWDG reset will eventually be generated.
-
-    (+) Debug mode : When the microcontroller enters debug mode (core halted),
-        the WWDG counter either continues to work normally or stops, depending 
-        on DBG_WWDG_STOP configuration bit in DBG module, accessible through
-        __HAL_DBGMCU_FREEZE_WWDG() and __HAL_DBGMCU_UNFREEZE_WWDG() macros
-
-                     ##### How to use this driver #####
-  ==============================================================================
-  [..]
-    (+) Enable WWDG APB1 clock using __HAL_RCC_WWDG_CLK_ENABLE().
-
-    (+) Set the WWDG prescaler, refresh window, counter value and Early Wakeup 
-        Interrupt mode using using HAL_WWDG_Init() function.
-        This enables WWDG peripheral and the downcounter starts downcounting 
-        from given counter value.
-        Init function can be called again to modify all watchdog parameters, 
-        however if EWI mode has been set once, it can't be clear until next 
-        reset.
-
-    (+) The application program must refresh the WWDG counter at regular
-        intervals during normal operation to prevent an MCU reset using
-        HAL_WWDG_Refresh() function. This operation must occur only when
-        the counter is lower than the window value already programmed.
-
-    (+) if Early Wakeup Interrupt mode is enable an interrupt is generated when 
-        the counter reaches 0x40. User can add his own code in weak function 
-        HAL_WWDG_EarlyWakeupCallback().
-
-     *** WWDG HAL driver macros list ***
-     ==================================
-     [..]
-       Below the list of most used macros in WWDG HAL driver.
-
-      (+) __HAL_WWDG_GET_IT_SOURCE: Check the selected WWDG's interrupt source.
-      (+) __HAL_WWDG_GET_FLAG: Get the selected WWDG's flag status.
-      (+) __HAL_WWDG_CLEAR_FLAG: Clear the WWDG's pending flags.
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-/** @addtogroup STM32L0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
-/** @defgroup WWDG WWDG
-  * @brief WWDG HAL module driver.
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup WWDG_Exported_Functions WWDG Exported Functions
-  * @{
-  */
-
-/** @defgroup WWDG_Exported_Functions_Group1 Initialization and Configuration functions
- *  @brief    Initialization and Configuration functions.
- *
-@verbatim
-  ==============================================================================
-          ##### Initialization and Configuration functions #####
-  ==============================================================================
-  [..]  
-    This section provides functions allowing to:
-      (+) Initialize and start the WWDG according to the specified parameters
-          in the WWDG_InitTypeDef of associated handle.
-      (+) Initialize the WWDG MSP.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initialize the WWDG according to the specified.
-  *         parameters in the WWDG_InitTypeDef of  associated handle.
-  * @param  hwwdg  pointer to a WWDG_HandleTypeDef structure that contains
-  *                the configuration information for the specified WWDG module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg)
-{
-  /* Check the WWDG handle allocation */
-  if(hwwdg == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_WWDG_ALL_INSTANCE(hwwdg->Instance));
-  assert_param(IS_WWDG_PRESCALER(hwwdg->Init.Prescaler));
-  assert_param(IS_WWDG_WINDOW(hwwdg->Init.Window));
-  assert_param(IS_WWDG_COUNTER(hwwdg->Init.Counter));
-  assert_param(IS_WWDG_EWI_MODE(hwwdg->Init.EWIMode));
-
-  /* Init the low level hardware */
-  HAL_WWDG_MspInit(hwwdg);
-
-  /* Set WWDG Counter */
-  WRITE_REG(hwwdg->Instance->CR, (WWDG_CR_WDGA | hwwdg->Init.Counter));
-
-  /* Set WWDG Prescaler and Window */
-  WRITE_REG(hwwdg->Instance->CFR, (hwwdg->Init.EWIMode | hwwdg->Init.Prescaler | hwwdg->Init.Window));
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  Initialize the WWDG MSP.
-  * @param  hwwdg  pointer to a WWDG_HandleTypeDef structure that contains
-  *                the configuration information for the specified WWDG module.
-  * @note   When rewriting this function in user file, mechanism may be added
-  *         to avoid multiple initialize when HAL_WWDG_Init function is called
-  *         again to change parameters.
-  * @retval None
-  */
-__weak void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hwwdg);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-           the HAL_WWDG_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup WWDG_Exported_Functions_Group2 IO operation functions
- *  @brief    IO operation functions 
- *
-@verbatim
-  ==============================================================================
-                      ##### IO operation functions #####
-  ==============================================================================  
-  [..]
-    This section provides functions allowing to:
-    (+) Refresh the WWDG.
-    (+) Handle WWDG interrupt request and associated function callback.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Refresh the WWDG.
-  * @param  hwwdg  pointer to a WWDG_HandleTypeDef structure that contains
-  *                the configuration information for the specified WWDG module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg)
-{
-  /* Write to WWDG CR the WWDG Counter value to refresh with */
-  WRITE_REG(hwwdg->Instance->CR, (hwwdg->Init.Counter));
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle WWDG interrupt request.
-  * @note   The Early Wakeup Interrupt (EWI) can be used if specific safety operations
-  *         or data logging must be performed before the actual reset is generated.
-  *         The EWI interrupt is enabled by calling HAL_WWDG_Init function with 
-  *         EWIMode set to WWDG_EWI_ENABLE.
-  *         When the downcounter reaches the value 0x40, and EWI interrupt is
-  *         generated and the corresponding Interrupt Service Routine (ISR) can
-  *         be used to trigger specific actions (such as communications or data
-  *         logging), before resetting the device.
-  * @param  hwwdg  pointer to a WWDG_HandleTypeDef structure that contains
-  *                the configuration information for the specified WWDG module.
-  * @retval None
-  */
-void HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg)
-{
-  /* Check if Early Wakeup Interrupt is enable */
-  if(__HAL_WWDG_GET_IT_SOURCE(hwwdg, WWDG_IT_EWI) != RESET)
-  {
-    /* Check if WWDG Early Wakeup Interrupt occurred */
-    if(__HAL_WWDG_GET_FLAG(hwwdg, WWDG_FLAG_EWIF) != RESET)
-    {
-      /* Clear the WWDG Early Wakeup flag */
-      __HAL_WWDG_CLEAR_FLAG(hwwdg, WWDG_FLAG_EWIF);
-
-      /* Early Wakeup callback */ 
-      HAL_WWDG_EarlyWakeupCallback(hwwdg);
-    }
-  }
-}
-
-
-/**
-  * @brief  WWDG Early Wakeup callback.
-  * @param  hwwdg  pointer to a WWDG_HandleTypeDef structure that contains
-  *                the configuration information for the specified WWDG module.
-  * @retval None
-  */
-__weak void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef* hwwdg)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hwwdg);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-           the HAL_WWDG_EarlyWakeupCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_WWDG_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c
deleted file mode 100755
index 966a5f2e..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c
+++ /dev/null
@@ -1,658 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_adc.c
-  * @author  MCD Application Team
-  * @brief   ADC LL module driver
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_adc.h"
-#include "stm32l0xx_ll_bus.h"
-
-#ifdef  USE_FULL_ASSERT
-  #include "stm32_assert.h"
-#else
-  #define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (ADC1)
-
-/** @addtogroup ADC_LL ADC
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @addtogroup ADC_LL_Private_Constants
-  * @{
-  */
-
-/* Definitions of ADC hardware constraints delays */
-/* Note: Only ADC IP HW delays are defined in ADC LL driver driver,           */
-/*       not timeout values:                                                  */
-/*       Timeout values for ADC operations are dependent to device clock      */
-/*       configuration (system clock versus ADC clock),                       */
-/*       and therefore must be defined in user application.                   */
-/*       Refer to @ref ADC_LL_EC_HW_DELAYS for description of ADC timeout     */
-/*       values definition.                                                   */
-/* Note: ADC timeout values are defined here in CPU cycles to be independent  */
-/*       of device clock setting.                                             */
-/*       In user application, ADC timeout values should be defined with       */
-/*       temporal values, in function of device clock settings.               */
-/*       Highest ratio CPU clock frequency vs ADC clock frequency:            */
-/*        - ADC clock from synchronous clock with AHB prescaler 512,          */
-/*          APB prescaler 16, ADC prescaler 4.                                */
-/*        - ADC clock from asynchronous clock (HSI) with prescaler 1,         */
-/*          with highest ratio CPU clock frequency vs HSI clock frequency:    */
-/*          CPU clock frequency max 32MHz, HSI frequency 16MHz: ratio 2.      */
-/* Unit: CPU cycles.                                                          */
-#define ADC_CLOCK_RATIO_VS_CPU_HIGHEST          ((uint32_t) 512U * 16U * 4U)
-#define ADC_TIMEOUT_DISABLE_CPU_CYCLES          (ADC_CLOCK_RATIO_VS_CPU_HIGHEST * 1U)
-#define ADC_TIMEOUT_STOP_CONVERSION_CPU_CYCLES  (ADC_CLOCK_RATIO_VS_CPU_HIGHEST * 1U)
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-
-/** @addtogroup ADC_LL_Private_Macros
-  * @{
-  */
-
-/* Check of parameters for configuration of ADC hierarchical scope:           */
-/* common to several ADC instances.                                           */
-#define IS_LL_ADC_COMMON_CLOCK(__CLOCK__)                                      \
-  (   ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV1)                                 \
-   || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV2)                                 \
-   || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV4)                                 \
-   || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV6)                                 \
-   || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV8)                                 \
-   || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV10)                                \
-   || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV12)                                \
-   || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV16)                                \
-   || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV32)                                \
-   || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV64)                                \
-   || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV128)                               \
-   || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV256)                               \
-  )
-
-#define IS_LL_ADC_CLOCK_FREQ_MODE(__CLOCK_FREQ_MODE__)                         \
-  (   ((__CLOCK_FREQ_MODE__) == LL_ADC_CLOCK_FREQ_MODE_HIGH)                   \
-   || ((__CLOCK_FREQ_MODE__) == LL_ADC_CLOCK_FREQ_MODE_LOW)                    \
-  )
-
-/* Check of parameters for configuration of ADC hierarchical scope:           */
-/* ADC instance.                                                              */
-#define IS_LL_ADC_CLOCK(__CLOCK__)                                             \
-  (   ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV4)                             \
-   || ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV2)                             \
-   || ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV1)                             \
-   || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC)                                      \
-  )
-
-#define IS_LL_ADC_RESOLUTION(__RESOLUTION__)                                   \
-  (   ((__RESOLUTION__) == LL_ADC_RESOLUTION_12B)                              \
-   || ((__RESOLUTION__) == LL_ADC_RESOLUTION_10B)                              \
-   || ((__RESOLUTION__) == LL_ADC_RESOLUTION_8B)                               \
-   || ((__RESOLUTION__) == LL_ADC_RESOLUTION_6B)                               \
-  )
-
-#define IS_LL_ADC_DATA_ALIGN(__DATA_ALIGN__)                                   \
-  (   ((__DATA_ALIGN__) == LL_ADC_DATA_ALIGN_RIGHT)                            \
-   || ((__DATA_ALIGN__) == LL_ADC_DATA_ALIGN_LEFT)                             \
-  )
-
-#define IS_LL_ADC_LOW_POWER(__LOW_POWER__)                                     \
-  (   ((__LOW_POWER__) == LL_ADC_LP_MODE_NONE)                                 \
-   || ((__LOW_POWER__) == LL_ADC_LP_AUTOWAIT)                                  \
-   || ((__LOW_POWER__) == LL_ADC_LP_AUTOPOWEROFF)                              \
-   || ((__LOW_POWER__) == LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF)                     \
-  )
-
-/* Check of parameters for configuration of ADC hierarchical scope:           */
-/* ADC group regular                                                          */
-#define IS_LL_ADC_REG_TRIG_SOURCE(__REG_TRIG_SOURCE__)                         \
-  (   ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_SOFTWARE)                      \
-   || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM6_TRGO)                 \
-   || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM21_CH2)                 \
-   || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_TRGO)                 \
-   || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_CH4)                  \
-   || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM22_TRGO)                \
-   || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_CH3)                  \
-   || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM3_TRGO)                 \
-   || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_EXTI_LINE11)               \
-  )
-
-#define IS_LL_ADC_REG_CONTINUOUS_MODE(__REG_CONTINUOUS_MODE__)                 \
-  (   ((__REG_CONTINUOUS_MODE__) == LL_ADC_REG_CONV_SINGLE)                    \
-   || ((__REG_CONTINUOUS_MODE__) == LL_ADC_REG_CONV_CONTINUOUS)                \
-  )
-
-#define IS_LL_ADC_REG_DMA_TRANSFER(__REG_DMA_TRANSFER__)                       \
-  (   ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_NONE)                 \
-   || ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_LIMITED)              \
-   || ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_UNLIMITED)            \
-  )
-
-#define IS_LL_ADC_REG_OVR_DATA_BEHAVIOR(__REG_OVR_DATA_BEHAVIOR__)             \
-  (   ((__REG_OVR_DATA_BEHAVIOR__) == LL_ADC_REG_OVR_DATA_PRESERVED)           \
-   || ((__REG_OVR_DATA_BEHAVIOR__) == LL_ADC_REG_OVR_DATA_OVERWRITTEN)         \
-  )
-
-#define IS_LL_ADC_REG_SEQ_SCAN_DISCONT_MODE(__REG_SEQ_DISCONT_MODE__)          \
-  (   ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_DISABLE)           \
-   || ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_1RANK)             \
-  )
-
-/**
-  * @}
-  */
-
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup ADC_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup ADC_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize registers of all ADC instances belonging to
-  *         the same ADC common instance to their default reset values.
-  * @note   This function is performing a hard reset, using high level
-  *         clock source RCC ADC reset.
-  * @param  ADCxy_COMMON ADC common instance
-  *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: ADC common registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_ADC_CommonDeInit(ADC_Common_TypeDef *ADCxy_COMMON)
-{
-  /* Check the parameters */
-  assert_param(IS_ADC_COMMON_INSTANCE(ADCxy_COMMON));
-  
-  /* Force reset of ADC clock (core clock) */
-  LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_ADC1);
-  
-  /* Release reset of ADC clock (core clock) */
-  LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_ADC1);
-  
-  return SUCCESS;
-}
-
-/**
-  * @brief  Initialize some features of ADC common parameters
-  *         (all ADC instances belonging to the same ADC common instance)
-  *         and multimode (for devices with several ADC instances available).
-  * @note   The setting of ADC common parameters is conditioned to
-  *         ADC instances state:
-  *         All ADC instances belonging to the same ADC common instance
-  *         must be disabled.
-  * @param  ADCxy_COMMON ADC common instance
-  *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
-  * @param  ADC_CommonInitStruct Pointer to a @ref LL_ADC_CommonInitTypeDef structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: ADC common registers are initialized
-  *          - ERROR: ADC common registers are not initialized
-  */
-ErrorStatus LL_ADC_CommonInit(ADC_Common_TypeDef *ADCxy_COMMON, LL_ADC_CommonInitTypeDef *ADC_CommonInitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_COMMON_INSTANCE(ADCxy_COMMON));
-  assert_param(IS_LL_ADC_COMMON_CLOCK(ADC_CommonInitStruct->CommonClock));
-  
-  /* Note: Hardware constraint (refer to description of functions             */
-  /*       "LL_ADC_SetCommonXXX()":                                           */
-  /*       On this STM32 serie, setting of these features is conditioned to   */
-  /*       ADC state:                                                         */
-  /*       All ADC instances of the ADC common group must be disabled.        */
-  if(__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(ADCxy_COMMON) == 0U)
-  {
-    /* Configuration of ADC hierarchical scope:                               */
-    /*  - common to several ADC                                               */
-    /*    (all ADC instances belonging to the same ADC common instance)       */
-    /*    - Set ADC clock (conversion clock)                                  */
-    LL_ADC_SetCommonClock(ADCxy_COMMON, ADC_CommonInitStruct->CommonClock);
-  }
-  else
-  {
-    /* Initialization error: One or several ADC instances belonging to        */
-    /* the same ADC common instance are not disabled.                         */
-    status = ERROR;
-  }
-  
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_ADC_CommonInitTypeDef field to default value.
-  * @param  ADC_CommonInitStruct Pointer to a @ref LL_ADC_CommonInitTypeDef structure
-  *                              whose fields will be set to default values.
-  * @retval None
-  */
-void LL_ADC_CommonStructInit(LL_ADC_CommonInitTypeDef *ADC_CommonInitStruct)
-{
-  /* Set ADC_CommonInitStruct fields to default values */
-  /* Set fields of ADC common */
-  /* (all ADC instances belonging to the same ADC common instance) */
-  ADC_CommonInitStruct->CommonClock = LL_ADC_CLOCK_ASYNC_DIV2;
-  
-}
-
-/**
-  * @brief  De-initialize registers of the selected ADC instance
-  *         to their default reset values.
-  * @note   To reset all ADC instances quickly (perform a hard reset),
-  *         use function @ref LL_ADC_CommonDeInit().
-  * @note   If this functions returns error status, it means that ADC instance
-  *         is in an unknown state.
-  *         In this case, perform a hard reset using high level
-  *         clock source RCC ADC reset.
-  *         Refer to function @ref LL_ADC_CommonDeInit().
-  * @param  ADCx ADC instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: ADC registers are de-initialized
-  *          - ERROR: ADC registers are not de-initialized
-  */
-ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx)
-{
-  ErrorStatus status = SUCCESS;
-  
-  __IO uint32_t timeout_cpu_cycles = 0U;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(ADCx));
-  
-  /* Disable ADC instance if not already disabled.                            */
-  if(LL_ADC_IsEnabled(ADCx) == 1U)
-  {
-    /* Set ADC group regular trigger source to SW start to ensure to not      */
-    /* have an external trigger event occurring during the conversion stop    */
-    /* ADC disable process.                                                   */
-    LL_ADC_REG_SetTriggerSource(ADCx, LL_ADC_REG_TRIG_SOFTWARE);
-    
-    /* Stop potential ADC conversion on going on ADC group regular.           */
-    if(LL_ADC_REG_IsConversionOngoing(ADCx) != 0U)
-    {
-      if(LL_ADC_REG_IsStopConversionOngoing(ADCx) == 0U)
-      {
-        LL_ADC_REG_StopConversion(ADCx);
-      }
-    }
-    
-    /* Wait for ADC conversions are effectively stopped                       */
-    timeout_cpu_cycles = ADC_TIMEOUT_STOP_CONVERSION_CPU_CYCLES;
-    while (LL_ADC_REG_IsStopConversionOngoing(ADCx) == 1U)
-    {
-      if(timeout_cpu_cycles-- == 0U)
-      {
-        /* Time-out error */
-        status = ERROR;
-      }
-    }
-    
-    /* Disable the ADC instance */
-    LL_ADC_Disable(ADCx);
-    
-    /* Wait for ADC instance is effectively disabled */
-    timeout_cpu_cycles = ADC_TIMEOUT_DISABLE_CPU_CYCLES;
-    while (LL_ADC_IsDisableOngoing(ADCx) == 1U)
-    {
-      if(timeout_cpu_cycles-- == 0U)
-      {
-        /* Time-out error */
-        status = ERROR;
-      }
-    }
-  }
-  
-  /* Check whether ADC state is compliant with expected state */
-  if(READ_BIT(ADCx->CR,
-              (  ADC_CR_ADSTP | ADC_CR_ADSTART
-               | ADC_CR_ADDIS | ADC_CR_ADEN   )
-             )
-     == 0U)
-  {
-    /* ========== Reset ADC registers ========== */
-    /* Reset register IER */
-    CLEAR_BIT(ADCx->IER,
-              (  LL_ADC_IT_ADRDY
-               | LL_ADC_IT_EOC
-               | LL_ADC_IT_EOS
-               | LL_ADC_IT_OVR
-               | LL_ADC_IT_EOSMP
-               | LL_ADC_IT_AWD1 )
-             );
-    
-    /* Reset register ISR */
-    SET_BIT(ADCx->ISR,
-            (  LL_ADC_FLAG_ADRDY
-             | LL_ADC_FLAG_EOC
-             | LL_ADC_FLAG_EOS
-             | LL_ADC_FLAG_OVR
-             | LL_ADC_FLAG_EOSMP
-             | LL_ADC_FLAG_AWD1 )
-           );
-    
-    /* Reset register CR */
-    /* Bits ADC_CR_ADCAL, ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode     */
-    /* "read-set": no direct reset applicable.                                */
-    CLEAR_BIT(ADCx->CR, ADC_CR_ADVREGEN);
-    
-    /* Reset register CFGR1 */
-    CLEAR_BIT(ADCx->CFGR1,
-              (  ADC_CFGR1_AWDCH   | ADC_CFGR1_AWDEN  | ADC_CFGR1_AWDSGL  | ADC_CFGR1_DISCEN
-               | ADC_CFGR1_AUTOFF  | ADC_CFGR1_WAIT   | ADC_CFGR1_CONT    | ADC_CFGR1_OVRMOD
-               | ADC_CFGR1_EXTEN   | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN   | ADC_CFGR1_RES
-               | ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN                     )
-             );
-    
-    /* Reset register CFGR2 */
-    /* Note: Update of ADC clock mode is conditioned to ADC state disabled:   */
-    /*       already done above.                                              */
-    CLEAR_BIT(ADCx->CFGR2,
-              (  ADC_CFGR2_CKMODE
-               | ADC_CFGR2_TOVS   | ADC_CFGR2_OVSS  | ADC_CFGR2_OVSR
-               | ADC_CFGR2_OVSE   | ADC_CFGR2_CKMODE                )
-             );
-    
-    /* Reset register SMPR */
-    CLEAR_BIT(ADCx->SMPR, ADC_SMPR_SMP);
-
-    /* Reset register TR */
-    MODIFY_REG(ADCx->TR, ADC_TR_HT | ADC_TR_LT, ADC_TR_HT);
-    
-    /* Reset register CHSELR */
-#if defined(ADC_CCR_VLCDEN)
-    CLEAR_BIT(ADCx->CHSELR,
-              (  ADC_CHSELR_CHSEL18 | ADC_CHSELR_CHSEL17 | ADC_CHSELR_CHSEL16
-               | ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_CHSELR_CHSEL12
-               | ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9  | ADC_CHSELR_CHSEL8
-               | ADC_CHSELR_CHSEL7  | ADC_CHSELR_CHSEL6  | ADC_CHSELR_CHSEL5  | ADC_CHSELR_CHSEL4
-               | ADC_CHSELR_CHSEL3  | ADC_CHSELR_CHSEL2  | ADC_CHSELR_CHSEL1  | ADC_CHSELR_CHSEL0 )
-             );
-#else
-    CLEAR_BIT(ADCx->CHSELR,
-              (  ADC_CHSELR_CHSEL18 | ADC_CHSELR_CHSEL17
-               | ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_CHSELR_CHSEL12
-               | ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9  | ADC_CHSELR_CHSEL8
-               | ADC_CHSELR_CHSEL7  | ADC_CHSELR_CHSEL6  | ADC_CHSELR_CHSEL5  | ADC_CHSELR_CHSEL4
-               | ADC_CHSELR_CHSEL3  | ADC_CHSELR_CHSEL2  | ADC_CHSELR_CHSEL1  | ADC_CHSELR_CHSEL0 )
-             );
-#endif
-    
-    /* Reset register DR */
-    /* bits in access mode read only, no direct reset applicable */
-    
-    /* Reset register CALFACT */
-    CLEAR_BIT(ADCx->CALFACT, ADC_CALFACT_CALFACT);
-    
-  }
-  else
-  {
-    /* ADC instance is in an unknown state */
-    /* Need to performing a hard reset of ADC instance, using high level      */
-    /* clock source RCC ADC reset.                                            */
-    /* Caution: On this STM32 serie, if several ADC instances are available   */
-    /*          on the selected device, RCC ADC reset will reset              */
-    /*          all ADC instances belonging to the common ADC instance.       */
-    status = ERROR;
-  }
-  
-  return status;
-}
-
-/**
-  * @brief  Initialize some features of ADC instance.
-  * @note   These parameters have an impact on ADC scope: ADC instance.
-  *         Refer to corresponding unitary functions into
-  *         @ref ADC_LL_EF_Configuration_ADC_Instance .
-  * @note   The setting of these parameters by function @ref LL_ADC_Init()
-  *         is conditioned to ADC state:
-  *         ADC instance must be disabled.
-  *         This condition is applied to all ADC features, for efficiency
-  *         and compatibility over all STM32 families. However, the different
-  *         features can be set under different ADC state conditions
-  *         (setting possible with ADC enabled without conversion on going,
-  *         ADC enabled with conversion on going, ...)
-  *         Each feature can be updated afterwards with a unitary function
-  *         and potentially with ADC in a different state than disabled,
-  *         refer to description of each function for setting
-  *         conditioned to ADC state.
-  * @note   After using this function, some other features must be configured
-  *         using LL unitary functions.
-  *         The minimum configuration remaining to be done is:
-  *          - Set ADC group regular sequencer:
-  *            map channel on rank corresponding to channel number.
-  *            Refer to function @ref LL_ADC_REG_SetSequencerChannels();
-  *          - Set ADC channel sampling time
-  *            Refer to function LL_ADC_SetChannelSamplingTime();
-  * @param  ADCx ADC instance
-  * @param  ADC_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: ADC registers are initialized
-  *          - ERROR: ADC registers are not initialized
-  */
-ErrorStatus LL_ADC_Init(ADC_TypeDef *ADCx, LL_ADC_InitTypeDef *ADC_InitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(ADCx));
-  
-  assert_param(IS_LL_ADC_CLOCK(ADC_InitStruct->Clock));
-  assert_param(IS_LL_ADC_RESOLUTION(ADC_InitStruct->Resolution));
-  assert_param(IS_LL_ADC_DATA_ALIGN(ADC_InitStruct->DataAlignment));
-  assert_param(IS_LL_ADC_LOW_POWER(ADC_InitStruct->LowPowerMode));
-  
-  /* Note: Hardware constraint (refer to description of this function):       */
-  /*       ADC instance must be disabled.                                     */
-  if(LL_ADC_IsEnabled(ADCx) == 0U)
-  {
-    /* Configuration of ADC hierarchical scope:                               */
-    /*  - ADC instance                                                        */
-    /*    - Set ADC data resolution                                           */
-    /*    - Set ADC conversion data alignment                                 */
-    /*    - Set ADC low power mode                                            */
-    MODIFY_REG(ADCx->CFGR1,
-                 ADC_CFGR1_RES
-               | ADC_CFGR1_ALIGN
-               | ADC_CFGR1_WAIT
-               | ADC_CFGR1_AUTOFF
-              ,
-                 ADC_InitStruct->Resolution
-               | ADC_InitStruct->DataAlignment
-               | ADC_InitStruct->LowPowerMode
-              );
-    
-  }
-  else
-  {
-    /* Initialization error: ADC instance is not disabled. */
-    status = ERROR;
-  }
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_ADC_InitTypeDef field to default value.
-  * @param  ADC_InitStruct Pointer to a @ref LL_ADC_InitTypeDef structure
-  *                        whose fields will be set to default values.
-  * @retval None
-  */
-void LL_ADC_StructInit(LL_ADC_InitTypeDef *ADC_InitStruct)
-{
-  /* Set ADC_InitStruct fields to default values */
-  /* Set fields of ADC instance */
-  ADC_InitStruct->Clock         = LL_ADC_CLOCK_SYNC_PCLK_DIV2;
-  ADC_InitStruct->Resolution    = LL_ADC_RESOLUTION_12B;
-  ADC_InitStruct->DataAlignment = LL_ADC_DATA_ALIGN_RIGHT;
-  ADC_InitStruct->LowPowerMode  = LL_ADC_LP_MODE_NONE;
-  
-}
-
-/**
-  * @brief  Initialize some features of ADC group regular.
-  * @note   These parameters have an impact on ADC scope: ADC group regular.
-  *         Refer to corresponding unitary functions into
-  *         @ref ADC_LL_EF_Configuration_ADC_Group_Regular
-  *         (functions with prefix "REG").
-  * @note   The setting of these parameters by function @ref LL_ADC_Init()
-  *         is conditioned to ADC state:
-  *         ADC instance must be disabled.
-  *         This condition is applied to all ADC features, for efficiency
-  *         and compatibility over all STM32 families. However, the different
-  *         features can be set under different ADC state conditions
-  *         (setting possible with ADC enabled without conversion on going,
-  *         ADC enabled with conversion on going, ...)
-  *         Each feature can be updated afterwards with a unitary function
-  *         and potentially with ADC in a different state than disabled,
-  *         refer to description of each function for setting
-  *         conditioned to ADC state.
-  * @note   After using this function, other features must be configured
-  *         using LL unitary functions.
-  *         The minimum configuration remaining to be done is:
-  *          - Set ADC group regular sequencer:
-  *            map channel on rank corresponding to channel number.
-  *            Refer to function @ref LL_ADC_REG_SetSequencerChannels();
-  *          - Set ADC channel sampling time
-  *            Refer to function LL_ADC_SetChannelSamplingTime();
-  * @param  ADCx ADC instance
-  * @param  ADC_REG_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: ADC registers are initialized
-  *          - ERROR: ADC registers are not initialized
-  */
-ErrorStatus LL_ADC_REG_Init(ADC_TypeDef *ADCx, LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(ADCx));
-  assert_param(IS_LL_ADC_REG_TRIG_SOURCE(ADC_REG_InitStruct->TriggerSource));
-  assert_param(IS_LL_ADC_REG_SEQ_SCAN_DISCONT_MODE(ADC_REG_InitStruct->SequencerDiscont));
-  assert_param(IS_LL_ADC_REG_CONTINUOUS_MODE(ADC_REG_InitStruct->ContinuousMode));
-  assert_param(IS_LL_ADC_REG_DMA_TRANSFER(ADC_REG_InitStruct->DMATransfer));
-  assert_param(IS_LL_ADC_REG_OVR_DATA_BEHAVIOR(ADC_REG_InitStruct->Overrun));
-  
-  /* Note: Hardware constraint (refer to description of this function):       */
-  /*       ADC instance must be disabled.                                     */
-  if(LL_ADC_IsEnabled(ADCx) == 0U)
-  {
-    /* Configuration of ADC hierarchical scope:                               */
-    /*  - ADC group regular                                                   */
-    /*    - Set ADC group regular trigger source                              */
-    /*    - Set ADC group regular sequencer discontinuous mode                */
-    /*    - Set ADC group regular continuous mode                             */
-    /*    - Set ADC group regular conversion data transfer: no transfer or    */
-    /*      transfer by DMA, and DMA requests mode                            */
-    /*    - Set ADC group regular overrun behavior                            */
-    /* Note: On this STM32 serie, ADC trigger edge is set to value 0x0 by     */
-    /*       setting of trigger source to SW start.                           */
-    MODIFY_REG(ADCx->CFGR1,
-                 ADC_CFGR1_EXTSEL
-               | ADC_CFGR1_EXTEN
-               | ADC_CFGR1_DISCEN
-               | ADC_CFGR1_CONT
-               | ADC_CFGR1_DMAEN
-               | ADC_CFGR1_DMACFG
-               | ADC_CFGR1_OVRMOD
-              ,
-                 ADC_REG_InitStruct->TriggerSource
-               | ADC_REG_InitStruct->SequencerDiscont
-               | ADC_REG_InitStruct->ContinuousMode
-               | ADC_REG_InitStruct->DMATransfer
-               | ADC_REG_InitStruct->Overrun
-              );
-
-  }
-  else
-  {
-    /* Initialization error: ADC instance is not disabled. */
-    status = ERROR;
-  }
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_ADC_REG_InitTypeDef field to default value.
-  * @param  ADC_REG_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
-  *                            whose fields will be set to default values.
-  * @retval None
-  */
-void LL_ADC_REG_StructInit(LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct)
-{
-  /* Set ADC_REG_InitStruct fields to default values */
-  /* Set fields of ADC group regular */
-  /* Note: On this STM32 serie, ADC trigger edge is set to value 0x0 by       */
-  /*       setting of trigger source to SW start.                             */
-  ADC_REG_InitStruct->TriggerSource    = LL_ADC_REG_TRIG_SOFTWARE;
-  ADC_REG_InitStruct->SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE;
-  ADC_REG_InitStruct->ContinuousMode   = LL_ADC_REG_CONV_SINGLE;
-  ADC_REG_InitStruct->DMATransfer      = LL_ADC_REG_DMA_TRANSFER_NONE;
-  ADC_REG_InitStruct->Overrun          = LL_ADC_REG_OVR_DATA_OVERWRITTEN;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* ADC1 */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_comp.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_comp.c
deleted file mode 100755
index 4777f01f..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_comp.c
+++ /dev/null
@@ -1,323 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_comp.c
-  * @author  MCD Application Team
-  * @brief   COMP LL module driver
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_comp.h"
-
-#ifdef  USE_FULL_ASSERT
-  #include "stm32_assert.h"
-#else
-  #define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (COMP1) || defined (COMP2)
-
-/** @addtogroup COMP_LL COMP
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-
-/** @addtogroup COMP_LL_Private_Macros
-  * @{
-  */
-
-/* Check of parameters for configuration of COMP hierarchical scope:          */
-/* COMP instance.                                                             */
-
-#define IS_LL_COMP_POWER_MODE(__POWER_MODE__)                                  \
-  (   ((__POWER_MODE__) == LL_COMP_POWERMODE_MEDIUMSPEED)                      \
-   || ((__POWER_MODE__) == LL_COMP_POWERMODE_ULTRALOWPOWER)                    \
-  )
-
-#if defined (STM32L011xx) || defined (STM32L021xx)
-#define IS_LL_COMP_INPUT_PLUS(__COMP_INSTANCE__, __INPUT_PLUS__)               \
-  (((__COMP_INSTANCE__) == COMP1)                                              \
-    ? (                                                                        \
-       (__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO1                              \
-      )                                                                        \
-      :                                                                        \
-      (                                                                        \
-          ((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO1)                         \
-       || ((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO2)                         \
-       || ((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO3)                         \
-       || ((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO4)                         \
-       || ((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO5)                         \
-       || ((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO6)                         \
-      )                                                                        \
-  )
-#else
-#define IS_LL_COMP_INPUT_PLUS(__COMP_INSTANCE__, __INPUT_PLUS__)               \
-  (((__COMP_INSTANCE__) == COMP1)                                              \
-    ? (                                                                        \
-       (__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO1                              \
-      )                                                                        \
-      :                                                                        \
-      (                                                                        \
-          ((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO1)                         \
-       || ((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO2)                         \
-       || ((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO3)                         \
-       || ((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO4)                         \
-       || ((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO5)                         \
-      )                                                                        \
-  )
-#endif
-
-/* Note: On this STM32 serie, comparator input minus parameters are           */
-/*       the different depending on COMP instances.                           */
-#define IS_LL_COMP_INPUT_MINUS(__COMP_INSTANCE__, __INPUT_MINUS__)             \
-  (((__COMP_INSTANCE__) == COMP1)                                              \
-    ? (                                                                        \
-          ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_VREFINT)                   \
-       || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_DAC1_CH1)                  \
-       || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_DAC1_CH2)                  \
-       || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_IO1)                       \
-      )                                                                        \
-      :                                                                        \
-      (                                                                        \
-          ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_1_4VREFINT)                \
-       || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_1_2VREFINT)                \
-       || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_3_4VREFINT)                \
-       || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_VREFINT)                   \
-       || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_DAC1_CH1)                  \
-       || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_DAC1_CH2)                  \
-       || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_IO1)                       \
-       || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_IO2)                       \
-      )                                                                        \
-  )
-
-#define IS_LL_COMP_OUTPUT_POLARITY(__POLARITY__)                               \
-  (   ((__POLARITY__) == LL_COMP_OUTPUTPOL_NONINVERTED)                        \
-   || ((__POLARITY__) == LL_COMP_OUTPUTPOL_INVERTED)                           \
-  )
-
-/**
-  * @}
-  */
-
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup COMP_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup COMP_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize registers of the selected COMP instance
-  *         to their default reset values.
-  * @note   If comparator is locked, de-initialization by software is
-  *         not possible.
-  *         The only way to unlock the comparator is a device hardware reset.
-  * @param  COMPx COMP instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: COMP registers are de-initialized
-  *          - ERROR: COMP registers are not de-initialized
-  */
-ErrorStatus LL_COMP_DeInit(COMP_TypeDef *COMPx)
-{
-  ErrorStatus status = SUCCESS;
-  
-  /* Check the parameters */
-  assert_param(IS_COMP_ALL_INSTANCE(COMPx));
-  
-  /* Note: Hardware constraint (refer to description of this function):       */
-  /*       COMP instance must not be locked.                                  */
-  if(LL_COMP_IsLocked(COMPx) == 0U)
-  {
-    if(COMPx == COMP1)
-    {
-      CLEAR_BIT(COMPx->CSR,
-                (  COMP_CSR_COMP1EN
-                 | COMP_CSR_COMP1INNSEL
-                 | COMP_CSR_COMP1WM
-                 | COMP_CSR_COMP1LPTIM1IN1
-                 | COMP_CSR_COMP1POLARITY
-                 | COMP_CSR_COMP1LOCK
-                ) 
-               );
-    }
-    else
-    {
-      CLEAR_BIT(COMPx->CSR,
-                (  COMP_CSR_COMP2EN
-                 | COMP_CSR_COMP2SPEED
-                 | COMP_CSR_COMP2INNSEL
-                 | COMP_CSR_COMP2INPSEL
-                 | COMP_CSR_COMP2LPTIM1IN2
-                 | COMP_CSR_COMP2LPTIM1IN1
-                 | COMP_CSR_COMP2POLARITY
-                 | COMP_CSR_COMP2LOCK
-                ) 
-               );
-    }
-
-  }
-  else
-  {
-    /* Comparator instance is locked: de-initialization by software is         */
-    /* not possible.                                                           */
-    /* The only way to unlock the comparator is a device hardware reset.       */
-    status = ERROR;
-  }
-  
-  return status;
-}
-
-/**
-  * @brief  Initialize some features of COMP instance.
-  * @note   This function configures features of the selected COMP instance.
-  *         Some features are also available at scope COMP common instance
-  *         (common to several COMP instances).
-  *         Refer to functions having argument "COMPxy_COMMON" as parameter.
-  * @param  COMPx COMP instance
-  * @param  COMP_InitStruct Pointer to a @ref LL_COMP_InitTypeDef structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: COMP registers are initialized
-  *          - ERROR: COMP registers are not initialized
-  */
-ErrorStatus LL_COMP_Init(COMP_TypeDef *COMPx, LL_COMP_InitTypeDef *COMP_InitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  
-  /* Check the parameters */
-  assert_param(IS_COMP_ALL_INSTANCE(COMPx));
-  if(COMPx == COMP2)
-  {
-    assert_param(IS_LL_COMP_POWER_MODE(COMP_InitStruct->PowerMode));
-    assert_param(IS_LL_COMP_INPUT_PLUS(COMPx, COMP_InitStruct->InputPlus));
-  }
-  assert_param(IS_LL_COMP_INPUT_MINUS(COMPx, COMP_InitStruct->InputMinus));
-  assert_param(IS_LL_COMP_OUTPUT_POLARITY(COMP_InitStruct->OutputPolarity));
-  
-  /* Note: Hardware constraint (refer to description of this function)        */
-  /*       COMP instance must not be locked.                                  */
-  if(LL_COMP_IsLocked(COMPx) == 0U)
-  {
-    /* Configuration of comparator instance :                                 */
-    /*  - PowerMode                                                           */
-    /*  - InputPlus                                                           */
-    /*  - InputMinus                                                          */
-    /*  - OutputPolarity                                                      */
-    /* Note: Connection switch is applicable only to COMP instance COMP1,     */
-    /*       therefore is COMP2 is selected the equivalent bit is             */
-    /*       kept unmodified.                                                 */
-    if(COMPx == COMP1)
-    {
-      MODIFY_REG(COMPx->CSR,
-                 ( COMP_CSR_COMP1INNSEL
-                  | COMP_CSR_COMP1POLARITY
-                 ) 
-                ,
-                 (  COMP_InitStruct->InputMinus
-                  | COMP_InitStruct->OutputPolarity
-                 ) 
-                );
-    }
-    else
-    {
-      MODIFY_REG(COMPx->CSR,
-                 (  COMP_CSR_COMP2SPEED       
-                  | COMP_CSR_COMP2INPSEL      
-                  | COMP_CSR_COMP2INNSEL      
-                  | COMP_CSR_COMP2POLARITY
-                 ) 
-                ,
-                 (  COMP_InitStruct->PowerMode
-                  | COMP_InitStruct->InputPlus
-                  | COMP_InitStruct->InputMinus
-                  | COMP_InitStruct->OutputPolarity
-                 ) 
-                );
-    }
-
-  }
-  else
-  {
-    /* Initialization error: COMP instance is locked.                         */
-    status = ERROR;
-  }
-  
-  return status;
-}
-
-/**
-  * @brief Set each @ref LL_COMP_InitTypeDef field to default value.
-  * @param COMP_InitStruct: pointer to a @ref LL_COMP_InitTypeDef structure
-  *                         whose fields will be set to default values.
-  * @retval None
-  */
-void LL_COMP_StructInit(LL_COMP_InitTypeDef *COMP_InitStruct)
-{
-  /* Set COMP_InitStruct fields to default values */
-  COMP_InitStruct->PowerMode            = LL_COMP_POWERMODE_MEDIUMSPEED;
-  COMP_InitStruct->InputPlus            = LL_COMP_INPUT_PLUS_IO1;
-  COMP_InitStruct->InputMinus           = LL_COMP_INPUT_MINUS_VREFINT;
-  COMP_InitStruct->OutputPolarity       = LL_COMP_OUTPUTPOL_NONINVERTED;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* COMP1 || COMP2 */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_crc.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_crc.c
deleted file mode 100755
index 3baa92ff..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_crc.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_crc.c
-  * @author  MCD Application Team
-  * @brief   CRC LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_crc.h"
-#include "stm32l0xx_ll_bus.h"
-
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (CRC)
-
-/** @addtogroup CRC_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup CRC_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup CRC_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize CRC registers (Registers restored to their default values).
-  * @param  CRCx CRC Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: CRC registers are de-initialized
-  *          - ERROR: CRC registers are not de-initialized
-  */
-ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx)
-{
-  ErrorStatus status = SUCCESS;
-
-  /* Check the parameters */
-  assert_param(IS_CRC_ALL_INSTANCE(CRCx));
-
-  if (CRCx == CRC)
-  {
-    /* Force CRC reset */
-    LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_CRC);
-
-    /* Release CRC reset */
-    LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_CRC);
-  }
-  else
-  {
-    status = ERROR;
-  }
-
-  return (status);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined (CRC) */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_crs.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_crs.c
deleted file mode 100755
index 0a9f9b93..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_crs.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_crs.h
-  * @author  MCD Application Team
-  * @brief   CRS LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_crs.h"
-#include "stm32l0xx_ll_bus.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined(CRS)
-
-/** @defgroup CRS_LL CRS
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup CRS_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup CRS_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-Initializes CRS peripheral registers to their default reset values.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: CRS registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_CRS_DeInit(void)
-{
-  LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_CRS);
-  LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_CRS);
-
-  return  SUCCESS;
-}
-
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined(CRS) */
-
-/**
-  * @}
-  */
-  
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dac.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dac.c
deleted file mode 100755
index 9e75d918..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dac.c
+++ /dev/null
@@ -1,282 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_dac.c
-  * @author  MCD Application Team
-  * @brief   DAC LL module driver
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_dac.h"
-#include "stm32l0xx_ll_bus.h"
-
-#ifdef USE_FULL_ASSERT
-  #include "stm32_assert.h"
-#else
-  #define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (DAC1)
-
-/** @addtogroup DAC_LL DAC
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-
-/** @addtogroup DAC_LL_Private_Macros
-  * @{
-  */
-
-#if defined(DAC_CHANNEL2_SUPPORT)
-#define IS_LL_DAC_CHANNEL(__DACX__, __DAC_CHANNEL__)                           \
-  (                                                                            \
-      ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_1)                                  \
-   || ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_2)                                  \
-  )
-#else
-#define IS_LL_DAC_CHANNEL(__DACX__, __DAC_CHANNEL__)                           \
-  (                                                                            \
-   ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_1)                                     \
-  )
-#endif /* DAC_CHANNEL2_SUPPORT */
-
-#define IS_LL_DAC_TRIGGER_SOURCE(__TRIGGER_SOURCE__)                           \
-  (   ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE)                           \
-   || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO)                      \
-   || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM3_TRGO)                      \
-   || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM3_CH3)                       \
-   || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM6_TRGO)                      \
-   || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM7_TRGO)                      \
-   || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM21_TRGO)                     \
-   || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_EXTI_LINE9)                     \
-  )
-
-#define IS_LL_DAC_WAVE_AUTO_GENER_MODE(__WAVE_AUTO_GENERATION_MODE__)           \
-  (   ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NONE)     \
-   || ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NOISE)    \
-   || ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE) \
-  )
-
-#define IS_LL_DAC_WAVE_AUTO_GENER_CONFIG(__WAVE_AUTO_GENERATION_CONFIG__)      \
-  (   ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BIT0)     \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS1_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS2_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS3_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS4_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS5_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS6_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS7_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS8_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS9_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS10_0) \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS11_0) \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_1)       \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_3)       \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_7)       \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_15)      \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_31)      \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_63)      \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_127)     \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_255)     \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_511)     \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_1023)    \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_2047)    \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_4095)    \
-  )
-
-#define IS_LL_DAC_OUTPUT_BUFFER(__OUTPUT_BUFFER__)                             \
-  (   ((__OUTPUT_BUFFER__) == LL_DAC_OUTPUT_BUFFER_ENABLE)                     \
-   || ((__OUTPUT_BUFFER__) == LL_DAC_OUTPUT_BUFFER_DISABLE)                    \
-  )
-
-/**
-  * @}
-  */
-
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup DAC_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup DAC_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize registers of the selected DAC instance
-  *         to their default reset values.
-  * @param  DACx DAC instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: DAC registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_DAC_DeInit(DAC_TypeDef *DACx)
-{
-  /* Check the parameters */
-  assert_param(IS_DAC_ALL_INSTANCE(DACx));
-  
-  /* Force reset of DAC clock */
-  LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_DAC1);
-  
-  /* Release reset of DAC clock */
-  LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_DAC1);
-  
-  return SUCCESS;
-}
-
-/**
-  * @brief  Initialize some features of DAC instance.
-  * @note   The setting of these parameters by function @ref LL_DAC_Init()
-  *         is conditioned to DAC state:
-  *         DAC instance must be disabled.
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @param  DAC_InitStruct Pointer to a @ref LL_DAC_InitTypeDef structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: DAC registers are initialized
-  *          - ERROR: DAC registers are not initialized
-  */
-ErrorStatus LL_DAC_Init(DAC_TypeDef *DACx, uint32_t DAC_Channel, LL_DAC_InitTypeDef *DAC_InitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  
-  /* Check the parameters */
-  assert_param(IS_DAC_ALL_INSTANCE(DACx));
-  assert_param(IS_LL_DAC_CHANNEL(DACx, DAC_Channel));
-  assert_param(IS_LL_DAC_TRIGGER_SOURCE(DAC_InitStruct->TriggerSource));
-  assert_param(IS_LL_DAC_OUTPUT_BUFFER(DAC_InitStruct->OutputBuffer));
-  assert_param(IS_LL_DAC_WAVE_AUTO_GENER_MODE(DAC_InitStruct->WaveAutoGeneration));
-  if (DAC_InitStruct->WaveAutoGeneration != LL_DAC_WAVE_AUTO_GENERATION_NONE)
-  {
-    assert_param(IS_LL_DAC_WAVE_AUTO_GENER_CONFIG(DAC_InitStruct->WaveAutoGenerationConfig));
-  }
-  
-  /* Note: Hardware constraint (refer to description of this function)        */
-  /*       DAC instance must be disabled.                                     */
-  if(LL_DAC_IsEnabled(DACx, DAC_Channel) == 0U)
-  {
-    /* Configuration of DAC channel:                                          */
-    /*  - TriggerSource                                                       */
-    /*  - WaveAutoGeneration                                                  */
-    /*  - OutputBuffer                                                        */
-    if (DAC_InitStruct->WaveAutoGeneration != LL_DAC_WAVE_AUTO_GENERATION_NONE)
-    {
-      MODIFY_REG(DACx->CR,
-                 (  DAC_CR_TSEL1
-                  | DAC_CR_WAVE1
-                  | DAC_CR_MAMP1
-                  | DAC_CR_BOFF1
-                 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
-                ,
-                 (  DAC_InitStruct->TriggerSource
-                  | DAC_InitStruct->WaveAutoGeneration
-                  | DAC_InitStruct->WaveAutoGenerationConfig
-                  | DAC_InitStruct->OutputBuffer
-                 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
-                );
-    }
-    else
-    {
-      MODIFY_REG(DACx->CR,
-                 (  DAC_CR_TSEL1
-                  | DAC_CR_WAVE1
-                  | DAC_CR_BOFF1
-                 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
-                ,
-                 (  DAC_InitStruct->TriggerSource
-                  | LL_DAC_WAVE_AUTO_GENERATION_NONE
-                  | DAC_InitStruct->OutputBuffer
-                 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
-                );
-    }
-  }
-  else
-  {
-    /* Initialization error: DAC instance is not disabled.                    */
-    status = ERROR;
-  }
-  return status;
-}
-
-/**
-  * @brief Set each @ref LL_DAC_InitTypeDef field to default value.
-  * @param DAC_InitStruct pointer to a @ref LL_DAC_InitTypeDef structure
-  *                       whose fields will be set to default values.
-  * @retval None
-  */
-void LL_DAC_StructInit(LL_DAC_InitTypeDef *DAC_InitStruct)
-{
-  /* Set DAC_InitStruct fields to default values */
-  DAC_InitStruct->TriggerSource            = LL_DAC_TRIG_SOFTWARE;
-  DAC_InitStruct->WaveAutoGeneration       = LL_DAC_WAVE_AUTO_GENERATION_NONE;
-  /* Note: Parameter discarded if wave auto generation is disabled,           */
-  /*       set anyway to its default value.                                   */
-  DAC_InitStruct->WaveAutoGenerationConfig = LL_DAC_NOISE_LFSR_UNMASK_BIT0;
-  DAC_InitStruct->OutputBuffer             = LL_DAC_OUTPUT_BUFFER_ENABLE;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* DAC1 */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c
deleted file mode 100755
index 77742c9b..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c
+++ /dev/null
@@ -1,395 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_dma.c
-  * @author  MCD Application Team
-  * @brief   DMA LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_dma.h"
-#include "stm32l0xx_ll_bus.h"
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (DMA1)
-
-/** @defgroup DMA_LL DMA
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup DMA_LL_Private_Macros
-  * @{
-  */
-#define IS_LL_DMA_DIRECTION(__VALUE__)          (((__VALUE__) == LL_DMA_DIRECTION_PERIPH_TO_MEMORY) || \
-                                                 ((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_PERIPH) || \
-                                                 ((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_MEMORY))
-
-#define IS_LL_DMA_MODE(__VALUE__)               (((__VALUE__) == LL_DMA_MODE_NORMAL) || \
-                                                 ((__VALUE__) == LL_DMA_MODE_CIRCULAR))
-
-#define IS_LL_DMA_PERIPHINCMODE(__VALUE__)      (((__VALUE__) == LL_DMA_PERIPH_INCREMENT) || \
-                                                 ((__VALUE__) == LL_DMA_PERIPH_NOINCREMENT))
-
-#define IS_LL_DMA_MEMORYINCMODE(__VALUE__)      (((__VALUE__) == LL_DMA_MEMORY_INCREMENT) || \
-                                                 ((__VALUE__) == LL_DMA_MEMORY_NOINCREMENT))
-
-#define IS_LL_DMA_PERIPHDATASIZE(__VALUE__)     (((__VALUE__) == LL_DMA_PDATAALIGN_BYTE)      || \
-                                                 ((__VALUE__) == LL_DMA_PDATAALIGN_HALFWORD)  || \
-                                                 ((__VALUE__) == LL_DMA_PDATAALIGN_WORD))
-
-#define IS_LL_DMA_MEMORYDATASIZE(__VALUE__)     (((__VALUE__) == LL_DMA_MDATAALIGN_BYTE)      || \
-                                                 ((__VALUE__) == LL_DMA_MDATAALIGN_HALFWORD)  || \
-                                                 ((__VALUE__) == LL_DMA_MDATAALIGN_WORD))
-
-#define IS_LL_DMA_NBDATA(__VALUE__)             ((__VALUE__)  <= (uint32_t)0x0000FFFFU)
-
-#define IS_LL_DMA_PERIPHREQUEST(__VALUE__)      (((__VALUE__) == LL_DMA_REQUEST_0)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_1)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_2)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_3)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_4)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_5)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_6)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_7)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_8)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_9)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_10) || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_11) || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_12) || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_13) || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_14) || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_15))
-
-#define IS_LL_DMA_PRIORITY(__VALUE__)           (((__VALUE__) == LL_DMA_PRIORITY_LOW)    || \
-                                                 ((__VALUE__) == LL_DMA_PRIORITY_MEDIUM) || \
-                                                 ((__VALUE__) == LL_DMA_PRIORITY_HIGH)   || \
-                                                 ((__VALUE__) == LL_DMA_PRIORITY_VERYHIGH))
-
-#if defined (DMA1_Channel6) && defined (DMA1_Channel7)
-#define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL)  ((((INSTANCE) == DMA1) && \
-                                                            (((CHANNEL) == LL_DMA_CHANNEL_1)|| \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_2) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_3) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_4) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_5) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_6) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_7))))
-#elif defined (DMA1_Channel6)
-#define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL)  ((((INSTANCE) == DMA1) && \
-                                                            (((CHANNEL) == LL_DMA_CHANNEL_1)|| \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_2) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_3) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_4) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_5) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_6))))
-#else
-#define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL)  ((((INSTANCE) == DMA1) && \
-                                                            (((CHANNEL) == LL_DMA_CHANNEL_1)|| \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_2) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_3) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_4) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_5))))
-#endif /* DMA1_Channel6 && DMA1_Channel7 */
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup DMA_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup DMA_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize the DMA registers to their default reset values.
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6 (*)
-  *         @arg @ref LL_DMA_CHANNEL_7 (*)
-  *         @arg @ref LL_DMA_CHANNEL_ALL
-  *
-  *         (*) value not defined in all devices
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: DMA registers are de-initialized
-  *          - ERROR: DMA registers are not de-initialized
-  */
-uint32_t LL_DMA_DeInit(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  DMA_Channel_TypeDef *tmp = (DMA_Channel_TypeDef *)DMA1_Channel1;
-  ErrorStatus status = SUCCESS;
-
-  /* Check the DMA Instance DMAx and Channel parameters*/
-  assert_param(IS_LL_DMA_ALL_CHANNEL_INSTANCE(DMAx, Channel) || (Channel == LL_DMA_CHANNEL_ALL));
-
-  if (Channel == LL_DMA_CHANNEL_ALL)
-  {
-    if (DMAx == DMA1)
-    {
-      /* Force reset of DMA clock */
-      LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA1);
-
-      /* Release reset of DMA clock */
-      LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA1);
-    }
-#if defined(DMA2)
-    else if (DMAx == DMA2)
-    {
-      /* Force reset of DMA clock */
-      LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2);
-
-      /* Release reset of DMA clock */
-      LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2);
-    }
-#endif
-    else
-    {
-      status = ERROR;
-    }
-  }
-  else
-  {
-    tmp = (DMA_Channel_TypeDef *)(__LL_DMA_GET_CHANNEL_INSTANCE(DMAx, Channel));
-
-    /* Disable the selected DMAx_Channely */
-    CLEAR_BIT(tmp->CCR, DMA_CCR_EN);
-
-    /* Reset DMAx_Channely control register */
-    LL_DMA_WriteReg(tmp, CCR, 0U);
-
-    /* Reset DMAx_Channely remaining bytes register */
-    LL_DMA_WriteReg(tmp, CNDTR, 0U);
-
-    /* Reset DMAx_Channely peripheral address register */
-    LL_DMA_WriteReg(tmp, CPAR, 0U);
-
-    /* Reset DMAx_Channely memory address register */
-    LL_DMA_WriteReg(tmp, CMAR, 0U);
-
-    /* Reset Request register field for DMAx Channel */
-    LL_DMA_SetPeriphRequest(DMAx, Channel, LL_DMA_REQUEST_0);
-
-    if (Channel == LL_DMA_CHANNEL_1)
-    {
-      /* Reset interrupt pending bits for DMAx Channel1 */
-      LL_DMA_ClearFlag_GI1(DMAx);
-    }
-    else if (Channel == LL_DMA_CHANNEL_2)
-    {
-      /* Reset interrupt pending bits for DMAx Channel2 */
-      LL_DMA_ClearFlag_GI2(DMAx);
-    }
-    else if (Channel == LL_DMA_CHANNEL_3)
-    {
-      /* Reset interrupt pending bits for DMAx Channel3 */
-      LL_DMA_ClearFlag_GI3(DMAx);
-    }
-    else if (Channel == LL_DMA_CHANNEL_4)
-    {
-      /* Reset interrupt pending bits for DMAx Channel4 */
-      LL_DMA_ClearFlag_GI4(DMAx);
-    }
-    else if (Channel == LL_DMA_CHANNEL_5)
-    {
-      /* Reset interrupt pending bits for DMAx Channel5 */
-      LL_DMA_ClearFlag_GI5(DMAx);
-    }
-
-#if defined(DMA1_Channel6)
-    else if (Channel == LL_DMA_CHANNEL_6)
-    {
-      /* Reset interrupt pending bits for DMAx Channel6 */
-      LL_DMA_ClearFlag_GI6(DMAx);
-    }
-#endif
-#if defined(DMA1_Channel7)
-    else if (Channel == LL_DMA_CHANNEL_7)
-    {
-      /* Reset interrupt pending bits for DMAx Channel7 */
-      LL_DMA_ClearFlag_GI7(DMAx);
-    }
-#endif
-    else
-    {
-      status = ERROR;
-    }
-  }
-
-  return status;
-}
-
-/**
-  * @brief  Initialize the DMA registers according to the specified parameters in DMA_InitStruct.
-  * @note   To convert DMAx_Channely Instance to DMAx Instance and Channely, use helper macros :
-  *         @arg @ref __LL_DMA_GET_INSTANCE
-  *         @arg @ref __LL_DMA_GET_CHANNEL
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6 (*)
-  *         @arg @ref LL_DMA_CHANNEL_7 (*)
-  *
-  *         (*) value not defined in all devices
-  * @param  DMA_InitStruct pointer to a @ref LL_DMA_InitTypeDef structure.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: DMA registers are initialized
-  *          - ERROR: Not applicable
-  */
-uint32_t LL_DMA_Init(DMA_TypeDef *DMAx, uint32_t Channel, LL_DMA_InitTypeDef *DMA_InitStruct)
-{
-  /* Check the DMA Instance DMAx and Channel parameters*/
-  assert_param(IS_LL_DMA_ALL_CHANNEL_INSTANCE(DMAx, Channel));
-
-  /* Check the DMA parameters from DMA_InitStruct */
-  assert_param(IS_LL_DMA_DIRECTION(DMA_InitStruct->Direction));
-  assert_param(IS_LL_DMA_MODE(DMA_InitStruct->Mode));
-  assert_param(IS_LL_DMA_PERIPHINCMODE(DMA_InitStruct->PeriphOrM2MSrcIncMode));
-  assert_param(IS_LL_DMA_MEMORYINCMODE(DMA_InitStruct->MemoryOrM2MDstIncMode));
-  assert_param(IS_LL_DMA_PERIPHDATASIZE(DMA_InitStruct->PeriphOrM2MSrcDataSize));
-  assert_param(IS_LL_DMA_MEMORYDATASIZE(DMA_InitStruct->MemoryOrM2MDstDataSize));
-  assert_param(IS_LL_DMA_NBDATA(DMA_InitStruct->NbData));
-  assert_param(IS_LL_DMA_PERIPHREQUEST(DMA_InitStruct->PeriphRequest));
-  assert_param(IS_LL_DMA_PRIORITY(DMA_InitStruct->Priority));
-
-  /*---------------------------- DMAx CCR Configuration ------------------------
-   * Configure DMAx_Channely: data transfer direction, data transfer mode,
-   *                          peripheral and memory increment mode,
-   *                          data size alignment and  priority level with parameters :
-   * - Direction:      DMA_CCR_DIR and DMA_CCR_MEM2MEM bits
-   * - Mode:           DMA_CCR_CIRC bit
-   * - PeriphOrM2MSrcIncMode:  DMA_CCR_PINC bit
-   * - MemoryOrM2MDstIncMode:  DMA_CCR_MINC bit
-   * - PeriphOrM2MSrcDataSize: DMA_CCR_PSIZE[1:0] bits
-   * - MemoryOrM2MDstDataSize: DMA_CCR_MSIZE[1:0] bits
-   * - Priority:               DMA_CCR_PL[1:0] bits
-   */
-  LL_DMA_ConfigTransfer(DMAx, Channel, DMA_InitStruct->Direction              | \
-                        DMA_InitStruct->Mode                   | \
-                        DMA_InitStruct->PeriphOrM2MSrcIncMode  | \
-                        DMA_InitStruct->MemoryOrM2MDstIncMode  | \
-                        DMA_InitStruct->PeriphOrM2MSrcDataSize | \
-                        DMA_InitStruct->MemoryOrM2MDstDataSize | \
-                        DMA_InitStruct->Priority);
-
-  /*-------------------------- DMAx CMAR Configuration -------------------------
-   * Configure the memory or destination base address with parameter :
-   * - MemoryOrM2MDstAddress: DMA_CMAR_MA[31:0] bits
-   */
-  LL_DMA_SetMemoryAddress(DMAx, Channel, DMA_InitStruct->MemoryOrM2MDstAddress);
-
-  /*-------------------------- DMAx CPAR Configuration -------------------------
-   * Configure the peripheral or source base address with parameter :
-   * - PeriphOrM2MSrcAddress: DMA_CPAR_PA[31:0] bits
-   */
-  LL_DMA_SetPeriphAddress(DMAx, Channel, DMA_InitStruct->PeriphOrM2MSrcAddress);
-
-  /*--------------------------- DMAx CNDTR Configuration -----------------------
-   * Configure the peripheral base address with parameter :
-   * - NbData: DMA_CNDTR_NDT[15:0] bits
-   */
-  LL_DMA_SetDataLength(DMAx, Channel, DMA_InitStruct->NbData);
-
-  /*--------------------------- DMAx CSELR Configuration -----------------------
-   * Configure the peripheral base address with parameter :
-   * - PeriphRequest: DMA_CSELR[31:0] bits
-   */
-  LL_DMA_SetPeriphRequest(DMAx, Channel, DMA_InitStruct->PeriphRequest);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Set each @ref LL_DMA_InitTypeDef field to default value.
-  * @param  DMA_InitStruct Pointer to a @ref LL_DMA_InitTypeDef structure.
-  * @retval None
-  */
-void LL_DMA_StructInit(LL_DMA_InitTypeDef *DMA_InitStruct)
-{
-  /* Set DMA_InitStruct fields to default values */
-  DMA_InitStruct->PeriphOrM2MSrcAddress  = (uint32_t)0x00000000U;
-  DMA_InitStruct->MemoryOrM2MDstAddress  = (uint32_t)0x00000000U;
-  DMA_InitStruct->Direction              = LL_DMA_DIRECTION_PERIPH_TO_MEMORY;
-  DMA_InitStruct->Mode                   = LL_DMA_MODE_NORMAL;
-  DMA_InitStruct->PeriphOrM2MSrcIncMode  = LL_DMA_PERIPH_NOINCREMENT;
-  DMA_InitStruct->MemoryOrM2MDstIncMode  = LL_DMA_MEMORY_NOINCREMENT;
-  DMA_InitStruct->PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_BYTE;
-  DMA_InitStruct->MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_BYTE;
-  DMA_InitStruct->NbData                 = (uint32_t)0x00000000U;
-  DMA_InitStruct->PeriphRequest          = LL_DMA_REQUEST_0;
-  DMA_InitStruct->Priority               = LL_DMA_PRIORITY_LOW;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* DMA1 */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c
deleted file mode 100755
index c3262791..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c
+++ /dev/null
@@ -1,230 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_exti.c
-  * @author  MCD Application Team
-  * @brief   EXTI LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_exti.h"
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (EXTI)
-
-/** @defgroup EXTI_LL EXTI
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup EXTI_LL_Private_Macros
-  * @{
-  */
-
-#define IS_LL_EXTI_LINE_0_31(__VALUE__)              (((__VALUE__) & ~LL_EXTI_LINE_ALL_0_31) == 0x00000000U)
-
-#define IS_LL_EXTI_MODE(__VALUE__)                   (((__VALUE__) == LL_EXTI_MODE_IT)            \
-                                                   || ((__VALUE__) == LL_EXTI_MODE_EVENT)         \
-                                                   || ((__VALUE__) == LL_EXTI_MODE_IT_EVENT))
-
-
-#define IS_LL_EXTI_TRIGGER(__VALUE__)                (((__VALUE__) == LL_EXTI_TRIGGER_NONE)       \
-                                                   || ((__VALUE__) == LL_EXTI_TRIGGER_RISING)     \
-                                                   || ((__VALUE__) == LL_EXTI_TRIGGER_FALLING)    \
-                                                   || ((__VALUE__) == LL_EXTI_TRIGGER_RISING_FALLING))
-
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup EXTI_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup EXTI_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize the EXTI registers to their default reset values.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: EXTI registers are de-initialized
-  *          - ERROR: not applicable
-  */
-uint32_t LL_EXTI_DeInit(void)
-{
-  /* Interrupt mask register set to default reset values */
-  LL_EXTI_WriteReg(IMR,   0x3F840000U);
-  /* Event mask register set to default reset values */
-  LL_EXTI_WriteReg(EMR,   0x00000000U);
-  /* Rising Trigger selection register set to default reset values */
-  LL_EXTI_WriteReg(RTSR,  0x00000000U);
-  /* Falling Trigger selection register set to default reset values */
-  LL_EXTI_WriteReg(FTSR,  0x00000000U);
-  /* Software interrupt event register set to default reset values */
-  LL_EXTI_WriteReg(SWIER, 0x00000000U);
-  /* Pending register set to default reset values */
-  LL_EXTI_WriteReg(PR,    0x007BFFFFU);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Initialize the EXTI registers according to the specified parameters in EXTI_InitStruct.
-  * @param  EXTI_InitStruct pointer to a @ref LL_EXTI_InitTypeDef structure.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: EXTI registers are initialized
-  *          - ERROR: not applicable
-  */
-uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  /* Check the parameters */
-  assert_param(IS_LL_EXTI_LINE_0_31(EXTI_InitStruct->Line_0_31));
-  assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->LineCommand));
-  assert_param(IS_LL_EXTI_MODE(EXTI_InitStruct->Mode));
-
-  /* ENABLE LineCommand */
-  if (EXTI_InitStruct->LineCommand != DISABLE)
-  {
-    assert_param(IS_LL_EXTI_TRIGGER(EXTI_InitStruct->Trigger));
-
-    /* Configure EXTI Lines in range from 0 to 31 */
-    if (EXTI_InitStruct->Line_0_31 != LL_EXTI_LINE_NONE)
-    {
-      switch (EXTI_InitStruct->Mode)
-      {
-        case LL_EXTI_MODE_IT:
-          /* First Disable Event on provided Lines */
-          LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
-          /* Then Enable IT on provided Lines */
-          LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31);
-          break;
-        case LL_EXTI_MODE_EVENT:
-          /* First Disable IT on provided Lines */
-          LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31);
-          /* Then Enable Event on provided Lines */
-          LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31);
-          break;
-        case LL_EXTI_MODE_IT_EVENT:
-          /* Directly Enable IT & Event on provided Lines */
-          LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31);
-          LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31);
-          break;
-        default:
-          status = ERROR;
-          break;
-      }
-      if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE)
-      {
-        switch (EXTI_InitStruct->Trigger)
-        {
-          case LL_EXTI_TRIGGER_RISING:
-            /* First Disable Falling Trigger on provided Lines */
-            LL_EXTI_DisableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
-            /* Then Enable Rising Trigger on provided Lines */
-            LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
-            break;
-          case LL_EXTI_TRIGGER_FALLING:
-            /* First Disable Rising Trigger on provided Lines */
-            LL_EXTI_DisableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
-            /* Then Enable Falling Trigger on provided Lines */
-            LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
-            break;
-          case LL_EXTI_TRIGGER_RISING_FALLING:
-            LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
-            LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
-            break;
-          default:
-            status = ERROR;
-            break;
-        }
-      }
-    }
-  }
-  /* DISABLE LineCommand */
-  else
-  {
-    /* De-configure EXTI Lines in range from 0 to 31 */
-    LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31);
-    LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
-  }
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_EXTI_InitTypeDef field to default value.
-  * @param  EXTI_InitStruct Pointer to a @ref LL_EXTI_InitTypeDef structure.
-  * @retval None
-  */
-void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct)
-{
-  EXTI_InitStruct->Line_0_31      = LL_EXTI_LINE_NONE;
-  EXTI_InitStruct->LineCommand    = DISABLE;
-  EXTI_InitStruct->Mode           = LL_EXTI_MODE_IT;
-  EXTI_InitStruct->Trigger        = LL_EXTI_TRIGGER_FALLING;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined (EXTI) */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c
deleted file mode 100755
index 1819911a..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c
+++ /dev/null
@@ -1,281 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_gpio.c
-  * @author  MCD Application Team
-  * @brief   GPIO LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_gpio.h"
-#include "stm32l0xx_ll_bus.h"
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOH)
-
-/** @addtogroup GPIO_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup GPIO_LL_Private_Macros
-  * @{
-  */
-#define IS_LL_GPIO_PIN(__VALUE__)          ((((uint32_t)0x00000000U) < (__VALUE__)) && ((__VALUE__) <= (LL_GPIO_PIN_ALL)))
-
-#define IS_LL_GPIO_MODE(__VALUE__)         (((__VALUE__) == LL_GPIO_MODE_INPUT)     ||\
-                                            ((__VALUE__) == LL_GPIO_MODE_OUTPUT)    ||\
-                                            ((__VALUE__) == LL_GPIO_MODE_ALTERNATE) ||\
-                                            ((__VALUE__) == LL_GPIO_MODE_ANALOG))
-
-#define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__)  (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL)  ||\
-                                            ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN))
-
-#define IS_LL_GPIO_SPEED(__VALUE__)        (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW)       ||\
-                                            ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM)    ||\
-                                            ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH)      ||\
-                                            ((__VALUE__) == LL_GPIO_SPEED_FREQ_VERY_HIGH))
-
-#define IS_LL_GPIO_PULL(__VALUE__)         (((__VALUE__) == LL_GPIO_PULL_NO)   ||\
-                                            ((__VALUE__) == LL_GPIO_PULL_UP)   ||\
-                                            ((__VALUE__) == LL_GPIO_PULL_DOWN))
-
-#define IS_LL_GPIO_ALTERNATE(__VALUE__)    (((__VALUE__) == LL_GPIO_AF_0  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_1  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_2  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_3  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_4  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_5  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_6  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_7 ))
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup GPIO_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup GPIO_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize GPIO registers (Registers restored to their default values).
-  * @param  GPIOx GPIO Port
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: GPIO registers are de-initialized
-  *          - ERROR:   Wrong GPIO Port
-  */
-ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx)
-{
-  ErrorStatus status = SUCCESS;
-
-  /* Check the parameters */
-  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
-
-  /* Force and Release reset on clock of GPIOx Port */
-  if (GPIOx == GPIOA)
-  {
-    LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOA);
-    LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOA);
-  }
-  else if (GPIOx == GPIOB)
-  {
-    LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOB);
-    LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOB);
-  }
-  else if (GPIOx == GPIOC)
-  {
-    LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOC);
-    LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOC);
-  }
-#if defined(GPIOD)
-  else if (GPIOx == GPIOD)
-  {
-    LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOD);
-    LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOD);
-  }
-#endif /* GPIOD */
-#if defined(GPIOE)
-  else if (GPIOx == GPIOE)
-  {
-    LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOE);
-    LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOE);
-  }
-#endif /* GPIOE */
-#if defined(GPIOH)
-  else if (GPIOx == GPIOH)
-  {
-    LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOH);
-    LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOH);
-  }
-#endif /* GPIOH */
-  else
-  {
-    status = ERROR;
-  }
-
-  return (status);
-}
-
-/**
-  * @brief  Initialize GPIO registers according to the specified parameters in GPIO_InitStruct.
-  * @param  GPIOx GPIO Port
-  * @param  GPIO_InitStruct: pointer to a @ref LL_GPIO_InitTypeDef structure
-  *         that contains the configuration information for the specified GPIO peripheral.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content
-  *          - ERROR:   Not applicable
-  */
-ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct)
-{
-  uint32_t pinpos     = 0x00000000U;
-  uint32_t currentpin = 0x00000000U;
-
-  /* Check the parameters */
-  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
-  assert_param(IS_LL_GPIO_PIN(GPIO_InitStruct->Pin));
-  assert_param(IS_LL_GPIO_MODE(GPIO_InitStruct->Mode));
-  assert_param(IS_LL_GPIO_PULL(GPIO_InitStruct->Pull));
-
-  /* ------------------------- Configure the port pins ---------------- */
-  /* Initialize  pinpos on first pin set */
-  /* pinpos = 0; useless as already done in default initialization */
-
-  /* Configure the port pins */
-  while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00000000U)
-  {
-    /* Get current io position */
-    currentpin = (GPIO_InitStruct->Pin) & (0x00000001U << pinpos);
-
-    if (currentpin)
-    {
-      /* Pin Mode configuration */
-      LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode);
-
-      if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
-      {
-        /* Check Speed mode parameters */
-        assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed));
-
-        /* Speed mode configuration */
-        LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed);
-      }
-
-      /* Pull-up Pull down resistor configuration*/
-      LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull);
-
-      if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)
-      {
-        /* Check Alternate parameter */
-        assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate));
-
-        /* Speed mode configuration */
-        if (currentpin < LL_GPIO_PIN_8)
-        {
-          LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate);
-        }
-        else
-        {
-          LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate);
-        }
-      }
-    }
-    pinpos++;
-  }
-
-  if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
-  {
-    /* Check Output mode parameters */
-    assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType));
-
-    /* Output mode configuration*/
-    LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType);
-
-  }
-  return (SUCCESS);
-}
-
-/**
-  * @brief Set each @ref LL_GPIO_InitTypeDef field to default value.
-  * @param GPIO_InitStruct: pointer to a @ref LL_GPIO_InitTypeDef structure
-  *                          whose fields will be set to default values.
-  * @retval None
-  */
-
-void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct)
-{
-  /* Reset GPIO init structure parameters values */
-  GPIO_InitStruct->Pin        = LL_GPIO_PIN_ALL;
-  GPIO_InitStruct->Mode       = LL_GPIO_MODE_ANALOG;
-  GPIO_InitStruct->Speed      = LL_GPIO_SPEED_FREQ_LOW;
-  GPIO_InitStruct->OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-  GPIO_InitStruct->Pull       = LL_GPIO_PULL_NO;
-  GPIO_InitStruct->Alternate  = LL_GPIO_AF_0;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOH) */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c
deleted file mode 100755
index c17c264e..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c
+++ /dev/null
@@ -1,255 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_i2c.c
-  * @author  MCD Application Team
-  * @brief   I2C LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_i2c.h"
-#include "stm32l0xx_ll_bus.h"
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (I2C1) || defined (I2C2) || defined (I2C3)
-
-/** @defgroup I2C_LL I2C
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup I2C_LL_Private_Macros
-  * @{
-  */
-
-#define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__)    (((__VALUE__) == LL_I2C_MODE_I2C)          || \
-                                                 ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST)   || \
-                                                 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \
-                                                 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP))
-
-#define IS_LL_I2C_ANALOG_FILTER(__VALUE__)      (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \
-                                                 ((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE))
-
-#define IS_LL_I2C_DIGITAL_FILTER(__VALUE__)     ((__VALUE__) <= 0x0000000FU)
-
-#define IS_LL_I2C_OWN_ADDRESS1(__VALUE__)       ((__VALUE__) <= 0x000003FFU)
-
-#define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__)   (((__VALUE__) == LL_I2C_ACK) || \
-                                                 ((__VALUE__) == LL_I2C_NACK))
-
-#define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__)       (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \
-                                                 ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT))
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup I2C_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup I2C_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize the I2C registers to their default reset values.
-  * @param  I2Cx I2C Instance.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: I2C registers are de-initialized
-  *          - ERROR: I2C registers are not de-initialized
-  */
-uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx)
-{
-  ErrorStatus status = SUCCESS;
-
-  /* Check the I2C Instance I2Cx */
-  assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
-
-  if (I2Cx == I2C1)
-  {
-    /* Force reset of I2C clock */
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1);
-
-    /* Release reset of I2C clock */
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1);
-  }
-#if defined(I2C2)
-  else if (I2Cx == I2C2)
-  {
-    /* Force reset of I2C clock */
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2);
-
-    /* Release reset of I2C clock */
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2);
-
-  }
-#endif
-#if defined(I2C3)
-  else if (I2Cx == I2C3)
-  {
-    /* Force reset of I2C clock */
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C3);
-
-    /* Release reset of I2C clock */
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C3);
-  }
-#endif
-  else
-  {
-    status = ERROR;
-  }
-
-  return status;
-}
-
-/**
-  * @brief  Initialize the I2C registers according to the specified parameters in I2C_InitStruct.
-  * @param  I2Cx I2C Instance.
-  * @param  I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: I2C registers are initialized
-  *          - ERROR: Not applicable
-  */
-uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct)
-{
-  /* Check the I2C Instance I2Cx */
-  assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
-
-  /* Check the I2C parameters from I2C_InitStruct */
-  assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode));
-  assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter));
-  assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter));
-  assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1));
-  assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge));
-  assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize));
-
-  /* Disable the selected I2Cx Peripheral */
-  LL_I2C_Disable(I2Cx);
-
-  /*---------------------------- I2Cx CR1 Configuration ------------------------
-   * Configure the analog and digital noise filters with parameters :
-   * - AnalogFilter: I2C_CR1_ANFOFF bit
-   * - DigitalFilter: I2C_CR1_DNF[3:0] bits
-   */
-  LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter);
-
-  /*---------------------------- I2Cx TIMINGR Configuration --------------------
-   * Configure the SDA setup, hold time and the SCL high, low period with parameter :
-   * - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0],
-   *           I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits
-   */
-  LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing);
-
-  /* Enable the selected I2Cx Peripheral */
-  LL_I2C_Enable(I2Cx);
-
-  /*---------------------------- I2Cx OAR1 Configuration -----------------------
-   * Disable, Configure and Enable I2Cx device own address 1 with parameters :
-   * - OwnAddress1:  I2C_OAR1_OA1[9:0] bits
-   * - OwnAddrSize:  I2C_OAR1_OA1MODE bit
-   */
-  LL_I2C_DisableOwnAddress1(I2Cx);
-  LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize);
-
-  /* OwnAdress1 == 0 is reserved for General Call address */
-  if (I2C_InitStruct->OwnAddress1 != 0U)
-  {
-    LL_I2C_EnableOwnAddress1(I2Cx);
-  }
-
-  /*---------------------------- I2Cx MODE Configuration -----------------------
-  * Configure I2Cx peripheral mode with parameter :
-   * - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits
-   */
-  LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode);
-
-  /*---------------------------- I2Cx CR2 Configuration ------------------------
-   * Configure the ACKnowledge or Non ACKnowledge condition
-   * after the address receive match code or next received byte with parameter :
-   * - TypeAcknowledge: I2C_CR2_NACK bit
-   */
-  LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Set each @ref LL_I2C_InitTypeDef field to default value.
-  * @param  I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure.
-  * @retval None
-  */
-void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct)
-{
-  /* Set I2C_InitStruct fields to default values */
-  I2C_InitStruct->PeripheralMode  = LL_I2C_MODE_I2C;
-  I2C_InitStruct->Timing          = 0U;
-  I2C_InitStruct->AnalogFilter    = LL_I2C_ANALOGFILTER_ENABLE;
-  I2C_InitStruct->DigitalFilter   = 0U;
-  I2C_InitStruct->OwnAddress1     = 0U;
-  I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK;
-  I2C_InitStruct->OwnAddrSize     = LL_I2C_OWNADDRESS1_7BIT;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* I2C1 || I2C2 || I2C3 */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lptim.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lptim.c
deleted file mode 100755
index 33055e8d..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lptim.c
+++ /dev/null
@@ -1,210 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_lptim.c
-  * @author  MCD Application Team
-  * @brief   LPTIM LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_lptim.h"
-#include "stm32l0xx_ll_bus.h"
-
-#ifdef  USE_FULL_ASSERT
-  #include "stm32_assert.h"
-#else
-  #define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (LPTIM1) || defined (LPTIM2)
-
-/** @addtogroup LPTIM_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup LPTIM_LL_Private_Macros
-  * @{
-  */
-#define IS_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \
-                                       || ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL))
-
-#define IS_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1)   \
-                                          || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2)   \
-                                          || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4)   \
-                                          || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8)   \
-                                          || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16)  \
-                                          || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32)  \
-                                          || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64)  \
-                                          || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128))
-
-#define IS_LPTIM_WAVEFORM(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_PWM) \
-                                   || ((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_SETONCE))
-
-#define IS_LPTIM_OUTPUT_POLARITY(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_REGULAR) \
-                                          || ((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_INVERSE))
-/**
-  * @}
-  */
-
-
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup LPTIM_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup LPTIM_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  Set LPTIMx registers to their reset values.
-  * @param  LPTIMx LP Timer instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: LPTIMx registers are de-initialized
-  *          - ERROR: invalid LPTIMx instance
-  */
-ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef* LPTIMx)
-{
-  ErrorStatus result = SUCCESS;
-
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 
- 
-  if (LPTIMx == LPTIM1)
-  {
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPTIM1);
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPTIM1);  
-  } 
-#if defined(LPTIM2)
-  else if (LPTIMx == LPTIM2)
-  { 
-    LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_LPTIM2);
-    LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_LPTIM2);
-  }
-#endif
-  else
-  {
-    result = ERROR;
-  }
-  
-  return result;
-}
-
-/**
-  * @brief  Set each fields of the LPTIM_InitStruct structure to its default
-  *         value.
-  * @param  LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
-  * @retval None
-  */
-void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef* LPTIM_InitStruct)
-{
-  /* Set the default configuration */
-  LPTIM_InitStruct->ClockSource = LL_LPTIM_CLK_SOURCE_INTERNAL;
-  LPTIM_InitStruct->Prescaler   = LL_LPTIM_PRESCALER_DIV1;
-  LPTIM_InitStruct->Waveform    = LL_LPTIM_OUTPUT_WAVEFORM_PWM;
-  LPTIM_InitStruct->Polarity    = LL_LPTIM_OUTPUT_POLARITY_REGULAR;
-}
-
-/**
-  * @brief  Configure the LPTIMx peripheral according to the specified parameters.
-  * @note LL_LPTIM_Init can only be called when the LPTIM instance is disabled.
-  * @note LPTIMx can be disabled using unitary function @ref LL_LPTIM_Disable().
-  * @param  LPTIMx LP Timer Instance
-  * @param  LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: LPTIMx instance has been initialized
-  *          - ERROR: LPTIMx instance hasn't been initialized
-  */
-ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef * LPTIMx, LL_LPTIM_InitTypeDef* LPTIM_InitStruct)
-{
-  ErrorStatus result = SUCCESS;
-  
-  /* The LPTIMx_CFGR register must only be modified when the LPTIM is disabled 
-     (ENABLE bit is reset to 0).
-  */
-  if (LL_LPTIM_IsEnabled(LPTIMx))
-  {
-    result = ERROR;
-  }
-  else
-  {
-  /* Check the parameters */
-  assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 
-  assert_param(IS_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->ClockSource));
-  assert_param(IS_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->Prescaler));
-  assert_param(IS_LPTIM_WAVEFORM(LPTIM_InitStruct->Waveform));
-  assert_param(IS_LPTIM_OUTPUT_POLARITY(LPTIM_InitStruct->Polarity));
-  
-  /* Set CKSEL bitfield according to ClockSource value */
-  /* Set PRESC bitfield according to Prescaler value */
-  /* Set WAVE bitfield according to Waveform value */
-  /* Set WAVEPOL bitfield according to Polarity value */
-  MODIFY_REG(LPTIMx->CFGR, 
-             (LPTIM_CFGR_CKSEL | LPTIM_CFGR_PRESC | LPTIM_CFGR_WAVE| LPTIM_CFGR_WAVPOL), 
-             LPTIM_InitStruct->ClockSource | \
-             LPTIM_InitStruct->Prescaler | \
-             LPTIM_InitStruct->Waveform | \
-             LPTIM_InitStruct->Polarity);
-  }
-
-  return result;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined (LPTIM1) || defined (LPTIM2) */
-
-/**
-  * @}
-  */
-  
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c
deleted file mode 100755
index 41d900e9..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c
+++ /dev/null
@@ -1,257 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_lpuart.c
-  * @author  MCD Application Team
-  * @brief   LPUART LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_lpuart.h"
-#include "stm32l0xx_ll_rcc.h"
-#include "stm32l0xx_ll_bus.h"
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (LPUART1)
-
-/** @addtogroup LPUART_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @addtogroup LPUART_LL_Private_Constants
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup LPUART_LL_Private_Macros
-  * @{
-  */
-
-/* Check of parameters for configuration of LPUART registers                  */
-
-/* __BAUDRATE__ Depending on constraints applicable for LPUART BRR register   */
-/*              value :                                                       */
-/*                - fck must be in the range [3 x baudrate, 4096 x baudrate]  */
-/*                - LPUART_BRR register value should be >= 0x300              */
-/*                - LPUART_BRR register value should be <= 0xFFFFF (20 bits)  */
-/*              Baudrate specified by the user should belong to [8, 10600000].*/
-#define IS_LL_LPUART_BAUDRATE(__BAUDRATE__) (((__BAUDRATE__) <= 10600000U) && ((__BAUDRATE__) >= 8U))
-
-#define IS_LL_LPUART_DIRECTION(__VALUE__) (((__VALUE__) == LL_LPUART_DIRECTION_NONE) \
-                                        || ((__VALUE__) == LL_LPUART_DIRECTION_RX) \
-                                        || ((__VALUE__) == LL_LPUART_DIRECTION_TX) \
-                                        || ((__VALUE__) == LL_LPUART_DIRECTION_TX_RX))
-
-#define IS_LL_LPUART_PARITY(__VALUE__) (((__VALUE__) == LL_LPUART_PARITY_NONE) \
-                                     || ((__VALUE__) == LL_LPUART_PARITY_EVEN) \
-                                     || ((__VALUE__) == LL_LPUART_PARITY_ODD))
-
-#define IS_LL_LPUART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_LPUART_DATAWIDTH_7B) \
-                                        || ((__VALUE__) == LL_LPUART_DATAWIDTH_8B) \
-                                        || ((__VALUE__) == LL_LPUART_DATAWIDTH_9B))
-
-#define IS_LL_LPUART_STOPBITS(__VALUE__) (((__VALUE__) == LL_LPUART_STOPBITS_1) \
-                                       || ((__VALUE__) == LL_LPUART_STOPBITS_2))
-
-#define IS_LL_LPUART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_LPUART_HWCONTROL_NONE) \
-                                       || ((__VALUE__) == LL_LPUART_HWCONTROL_RTS) \
-                                       || ((__VALUE__) == LL_LPUART_HWCONTROL_CTS) \
-                                       || ((__VALUE__) == LL_LPUART_HWCONTROL_RTS_CTS))
-
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup LPUART_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup LPUART_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize LPUART registers (Registers restored to their default values).
-  * @param  LPUARTx LPUART Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: LPUART registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_LPUART_DeInit(USART_TypeDef *LPUARTx)
-{
-  ErrorStatus status = SUCCESS;
-
-  /* Check the parameters */
-  assert_param(IS_LPUART_INSTANCE(LPUARTx));
-
-  /* Force reset of LPUART peripheral */
-  LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPUART1);
-
-  /* Release reset of LPUART peripheral */
-  LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPUART1);
-
-  return (status);
-}
-
-/**
-  * @brief  Initialize LPUART registers according to the specified
-  *         parameters in LPUART_InitStruct.
-  * @note   As some bits in LPUART configuration registers can only be written when the LPUART is disabled (USART_CR1_UE bit =0),
-  *         LPUART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
-  * @note   Baud rate value stored in LPUART_InitStruct BaudRate field, should be valid (different from 0).
-  * @param  LPUARTx LPUART Instance
-  * @param  LPUART_InitStruct pointer to a @ref LL_LPUART_InitTypeDef structure
-  *         that contains the configuration information for the specified LPUART peripheral.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: LPUART registers are initialized according to LPUART_InitStruct content
-  *          - ERROR: Problem occurred during LPUART Registers initialization
-  */
-ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, LL_LPUART_InitTypeDef *LPUART_InitStruct)
-{
-  ErrorStatus status = ERROR;
-  uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
-
-  /* Check the parameters */
-  assert_param(IS_LPUART_INSTANCE(LPUARTx));
-  assert_param(IS_LL_LPUART_BAUDRATE(LPUART_InitStruct->BaudRate));
-  assert_param(IS_LL_LPUART_DATAWIDTH(LPUART_InitStruct->DataWidth));
-  assert_param(IS_LL_LPUART_STOPBITS(LPUART_InitStruct->StopBits));
-  assert_param(IS_LL_LPUART_PARITY(LPUART_InitStruct->Parity));
-  assert_param(IS_LL_LPUART_DIRECTION(LPUART_InitStruct->TransferDirection));
-  assert_param(IS_LL_LPUART_HWCONTROL(LPUART_InitStruct->HardwareFlowControl));
-
-  /* LPUART needs to be in disabled state, in order to be able to configure some bits in
-     CRx registers. Otherwise (LPUART not in Disabled state) => return ERROR */
-  if (LL_LPUART_IsEnabled(LPUARTx) == 0U)
-  {
-    /*---------------------------- LPUART CR1 Configuration -----------------------
-     * Configure LPUARTx CR1 (LPUART Word Length, Parity and Transfer Direction bits) with parameters:
-     * - DataWidth:          USART_CR1_M bits according to LPUART_InitStruct->DataWidth value
-     * - Parity:             USART_CR1_PCE, USART_CR1_PS bits according to LPUART_InitStruct->Parity value
-     * - TransferDirection:  USART_CR1_TE, USART_CR1_RE bits according to LPUART_InitStruct->TransferDirection value
-     */
-    MODIFY_REG(LPUARTx->CR1,
-               (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE),
-               (LPUART_InitStruct->DataWidth | LPUART_InitStruct->Parity | LPUART_InitStruct->TransferDirection));
-
-    /*---------------------------- LPUART CR2 Configuration -----------------------
-     * Configure LPUARTx CR2 (Stop bits) with parameters:
-     * - Stop Bits:          USART_CR2_STOP bits according to LPUART_InitStruct->StopBits value.
-     */
-    LL_LPUART_SetStopBitsLength(LPUARTx, LPUART_InitStruct->StopBits);
-
-    /*---------------------------- LPUART CR3 Configuration -----------------------
-     * Configure LPUARTx CR3 (Hardware Flow Control) with parameters:
-     * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to LPUART_InitStruct->HardwareFlowControl value.
-     */
-    LL_LPUART_SetHWFlowCtrl(LPUARTx, LPUART_InitStruct->HardwareFlowControl);
-
-    /*---------------------------- LPUART BRR Configuration -----------------------
-     * Retrieve Clock frequency used for LPUART Peripheral
-     */
-    periphclk = LL_RCC_GetLPUARTClockFreq(LL_RCC_LPUART1_CLKSOURCE);
-
-    /* Configure the LPUART Baud Rate :
-       - valid baud rate value (different from 0) is required
-       - Peripheral clock as returned by RCC service, should be valid (different from 0).
-    */
-    if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
-        && (LPUART_InitStruct->BaudRate != 0U))
-    {
-      status = SUCCESS;
-      LL_LPUART_SetBaudRate(LPUARTx,
-                            periphclk,
-                            LPUART_InitStruct->BaudRate);
-    }
-  }
-
-  return (status);
-}
-
-/**
-  * @brief Set each @ref LL_LPUART_InitTypeDef field to default value.
-  * @param LPUART_InitStruct pointer to a @ref LL_LPUART_InitTypeDef structure
-  *                          whose fields will be set to default values.
-  * @retval None
-  */
-
-void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct)
-{
-  /* Set LPUART_InitStruct fields to default values */
-  LPUART_InitStruct->BaudRate            = 9600U;
-  LPUART_InitStruct->DataWidth           = LL_LPUART_DATAWIDTH_8B;
-  LPUART_InitStruct->StopBits            = LL_LPUART_STOPBITS_1;
-  LPUART_InitStruct->Parity              = LL_LPUART_PARITY_NONE ;
-  LPUART_InitStruct->TransferDirection   = LL_LPUART_DIRECTION_TX_RX;
-  LPUART_InitStruct->HardwareFlowControl = LL_LPUART_HWCONTROL_NONE;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined (LPUART1) */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c
deleted file mode 100755
index 5a958de1..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_pwr.c
-  * @author  MCD Application Team
-  * @brief   PWR LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_pwr.h"
-#include "stm32l0xx_ll_bus.h"
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined(PWR)
-
-/** @defgroup PWR_LL PWR
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup PWR_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup PWR_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize the PWR registers to their default reset values.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: PWR registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_PWR_DeInit(void)
-{
-  /* Force reset of PWR clock */
-  LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_PWR);
-
-  /* Release reset of PWR clock */
-  LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_PWR);
-
-  return SUCCESS;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* defined(PWR) */
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c
deleted file mode 100755
index 88006145..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c
+++ /dev/null
@@ -1,650 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_rcc.c
-  * @author  MCD Application Team
-  * @brief   RCC LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_rcc.h"
-#ifdef  USE_FULL_ASSERT
-  #include "stm32_assert.h"
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined(RCC)
-
-/** @defgroup RCC_LL RCC
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup RCC_LL_Private_Macros
-  * @{
-  */
-#if defined(RCC_CCIPR_USART1SEL) && defined(RCC_CCIPR_USART2SEL)
-#define IS_LL_RCC_USART_CLKSOURCE(__VALUE__)  (((__VALUE__) == LL_RCC_USART1_CLKSOURCE) \
-                                            || ((__VALUE__) == LL_RCC_USART2_CLKSOURCE))
-#elif defined(RCC_CCIPR_USART1SEL) && !defined(RCC_CCIPR_USART2SEL)
-#define IS_LL_RCC_USART_CLKSOURCE(__VALUE__)  (((__VALUE__) == LL_RCC_USART1_CLKSOURCE))
-#else
-#define IS_LL_RCC_USART_CLKSOURCE(__VALUE__)  (((__VALUE__) == LL_RCC_USART2_CLKSOURCE))
-#endif /* RCC_CCIPR_USART1SEL && RCC_CCIPR_USART2SEL */
-
-#define IS_LL_RCC_LPUART_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_LPUART1_CLKSOURCE))
-
-#if defined(RCC_CCIPR_I2C3SEL) 
-#define IS_LL_RCC_I2C_CLKSOURCE(__VALUE__)    (((__VALUE__) == LL_RCC_I2C1_CLKSOURCE) \
-                                            || ((__VALUE__) == LL_RCC_I2C3_CLKSOURCE))
-#else
-#define IS_LL_RCC_I2C_CLKSOURCE(__VALUE__)     ((__VALUE__) == LL_RCC_I2C1_CLKSOURCE)
-#endif /* RCC_CCIPR_I2C3SEL */
-
-#define IS_LL_RCC_LPTIM_CLKSOURCE(__VALUE__)  ((__VALUE__) == LL_RCC_LPTIM1_CLKSOURCE)
-
-#if defined(USB)
-#define IS_LL_RCC_USB_CLKSOURCE(__VALUE__)    (((__VALUE__) == LL_RCC_USB_CLKSOURCE))
-#endif /* USB */
-
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup RCC_LL_Private_Functions RCC Private functions
-  * @{
-  */
-uint32_t RCC_GetSystemClockFreq(void);
-uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency);
-uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency);
-uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency);
-uint32_t RCC_PLL_GetFreqDomain_SYS(void);
-/**
-  * @}
-  */
-
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup RCC_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup RCC_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  Reset the RCC clock configuration to the default reset state.
-  * @note   The default reset state of the clock configuration is given below:
-  *         - MSI  ON and used as system clock source
-  *         - HSE, HSI and PLL OFF
-  *         - AHB, APB1 and APB2 prescaler set to 1.
-  *         - CSS, MCO OFF
-  *         - All interrupts disabled
-  * @note   This function doesn't modify the configuration of the
-  *         - Peripheral clocks
-  *         - LSI, LSE and RTC clocks
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RCC registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_RCC_DeInit(void)
-{
-  uint32_t vl_mask = 0U;
-
-  /* Set MSION bit */
-  LL_RCC_MSI_Enable();
-
-  /* Insure MSIRDY bit is set before writing default MSIRANGE value */
-  while (LL_RCC_MSI_IsReady() == 0U)
-  {
-    __NOP();
-  }
-
-  /* Set MSIRANGE default value */
-  LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_5);
-  /* Set MSITRIM bits to the reset value*/
-  LL_RCC_MSI_SetCalibTrimming(0U);
-
-  /* Set HSITRIM bits to the reset value*/
-  LL_RCC_HSI_SetCalibTrimming(0x10U);
-
-  /* Reset SW, HPRE, PPRE and MCOSEL bits */
-  vl_mask = 0xFFFFFFFFU;
-  CLEAR_BIT(vl_mask, (RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2 | RCC_CFGR_MCOSEL));
-  LL_RCC_WriteReg(CFGR, vl_mask);
-
-  /* Reset HSI, HSE, PLL */
-  vl_mask = LL_RCC_ReadReg(CR);
-#if defined(RCC_CR_HSIOUTEN)  	
-  CLEAR_BIT(vl_mask, RCC_CR_HSION| RCC_CR_HSIKERON| RCC_CR_HSIDIVEN | RCC_CR_HSIOUTEN | \
-                     RCC_CR_HSEON | RCC_CR_PLLON); 
-#else
-  CLEAR_BIT(vl_mask, RCC_CR_HSION| RCC_CR_HSIKERON| RCC_CR_HSIDIVEN | \
-                     RCC_CR_HSEON | RCC_CR_PLLON); 
-#endif					 
-  LL_RCC_WriteReg(CR, vl_mask);
-  /* Delay after an RCC peripheral clock */
-  vl_mask = LL_RCC_ReadReg(CR);
-
-  /* Reset HSEBYP bit */
-  LL_RCC_HSE_DisableBypass();
-
-  /* Set RCC_CR_RTCPRE to 0b00*/
-  CLEAR_BIT(vl_mask, RCC_CR_RTCPRE); 
-  LL_RCC_WriteReg(CR, vl_mask);
-
-  /* Reset CFGR register */
-  LL_RCC_WriteReg(CFGR, 0x00000000U);
-
-#if defined(RCC_HSI48_SUPPORT)
-  /* Reset CRRCR register */
-  LL_RCC_WriteReg(CRRCR, 0x00000000U);
-
-  /* Disable HSI48 */
-  LL_RCC_HSI48_Disable();
-
-#endif /*RCC_HSI48_SUPPORT*/
-
-  /* Disable all interrupts */
-  LL_RCC_WriteReg(CIER, 0x00000000U);
-
-  return SUCCESS;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup RCC_LL_EF_Get_Freq
-  * @brief  Return the frequencies of different on chip clocks;  System, AHB, APB1 and APB2 buses clocks
-  *         and different peripheral clocks available on the device.
-  * @note   If SYSCLK source is MSI, function returns values based on MSI clock(*)
-  * @note   If SYSCLK source is HSI, function returns values based on HSI_VALUE(**)
-  * @note   If SYSCLK source is HSE, function returns values based on HSE_VALUE(***)
-  * @note   If SYSCLK source is PLL, function returns values based on 
-  *         HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
-  * @note   (*) MSI clock depends on the selected MSI range but the real value
-  *             may vary depending on the variations in voltage and temperature. 
-  * @note   (**) HSI_VALUE is a defined constant but the real value may vary 
-  *              depending on the variations in voltage and temperature.
-  * @note   (***) HSE_VALUE is a defined constant, user has to ensure that
-  *               HSE_VALUE is same as the real frequency of the crystal used.
-  *               Otherwise, this function may have wrong result.
-  * @note   The result of this function could be incorrect when using fractional
-  *         value for HSE crystal.
-  * @note   This function can be used by the user application to compute the
-  *         baud-rate for the communication peripherals or configure other parameters.
-  * @{
-  */
-
-/**
-  * @brief  Return the frequencies of different on chip clocks;  System, AHB, APB1 and APB2 buses clocks
-  * @note   Each time SYSCLK, HCLK, PCLK1 and/or PCLK2 clock changes, this function
-  *         must be called to update structure fields. Otherwise, any
-  *         configuration based on this function will be incorrect.
-  * @param  RCC_Clocks pointer to a @ref LL_RCC_ClocksTypeDef structure which will hold the clocks frequencies
-  * @retval None
-  */
-void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks)
-{
-  /* Get SYSCLK frequency */
-  RCC_Clocks->SYSCLK_Frequency = RCC_GetSystemClockFreq();
-
-  /* HCLK clock frequency */
-  RCC_Clocks->HCLK_Frequency   = RCC_GetHCLKClockFreq(RCC_Clocks->SYSCLK_Frequency);
-
-  /* PCLK1 clock frequency */
-  RCC_Clocks->PCLK1_Frequency  = RCC_GetPCLK1ClockFreq(RCC_Clocks->HCLK_Frequency);
-
-  /* PCLK2 clock frequency */
-  RCC_Clocks->PCLK2_Frequency  = RCC_GetPCLK2ClockFreq(RCC_Clocks->HCLK_Frequency);
-}
-
-/**
-  * @brief  Return USARTx clock frequency
-  * @param  USARTxSource This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_USART1_CLKSOURCE
-  *         @arg @ref LL_RCC_USART2_CLKSOURCE (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval USART clock frequency (in Hz)
-  *         @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready
-  */
-uint32_t LL_RCC_GetUSARTClockFreq(uint32_t USARTxSource)
-{
-  uint32_t usart_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
-
-  /* Check parameter */
-  assert_param(IS_LL_RCC_USART_CLKSOURCE(USARTxSource));
-#if defined(RCC_CCIPR_USART1SEL)
-  if (USARTxSource == LL_RCC_USART1_CLKSOURCE)
-  {
-    /* USART1CLK clock frequency */
-    switch (LL_RCC_GetUSARTClockSource(USARTxSource))
-    {
-      case LL_RCC_USART1_CLKSOURCE_SYSCLK: /* USART1 Clock is System Clock */
-        usart_frequency = RCC_GetSystemClockFreq();
-        break;
-
-      case LL_RCC_USART1_CLKSOURCE_HSI:    /* USART1 Clock is HSI Osc. */
-        if (LL_RCC_HSI_IsReady())
-        {
-          usart_frequency = HSI_VALUE;
-        }
-        break;
-
-      case LL_RCC_USART1_CLKSOURCE_LSE:    /* USART1 Clock is LSE Osc. */
-        if (LL_RCC_LSE_IsReady())
-        {
-          usart_frequency = LSE_VALUE;
-        }
-        break;
-
-      case LL_RCC_USART1_CLKSOURCE_PCLK2:  /* USART1 Clock is PCLK2 */
-      default:
-        usart_frequency = RCC_GetPCLK2ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
-        break;
-    }
-  }
-#endif /* RCC_CCIPR_USART1SEL  */
-
-#if defined(RCC_CCIPR_USART2SEL)
-  if (USARTxSource == LL_RCC_USART2_CLKSOURCE)
-  {
-    /* USART2CLK clock frequency */
-    switch (LL_RCC_GetUSARTClockSource(USARTxSource))
-    {
-      case LL_RCC_USART2_CLKSOURCE_SYSCLK: /* USART2 Clock is System Clock */
-        usart_frequency = RCC_GetSystemClockFreq();
-        break;
-
-      case LL_RCC_USART2_CLKSOURCE_HSI:    /* USART2 Clock is HSI Osc. */
-        if (LL_RCC_HSI_IsReady())
-        {
-          usart_frequency = HSI_VALUE;
-        }
-        break;
-
-      case LL_RCC_USART2_CLKSOURCE_LSE:    /* USART2 Clock is LSE Osc. */
-        if (LL_RCC_LSE_IsReady())
-        {
-          usart_frequency = LSE_VALUE;
-        }
-        break;
-
-      case LL_RCC_USART2_CLKSOURCE_PCLK1:  /* USART2 Clock is PCLK1 */
-      default:
-        usart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
-        break;
-    }
-  }
-#endif /* RCC_CCIPR_USART2SEL */
-
-  return usart_frequency;
-}
-
-/**
-  * @brief  Return I2Cx clock frequency
-  * @param  I2CxSource This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_I2C1_CLKSOURCE
-  *         @arg @ref LL_RCC_I2C3_CLKSOURCE (*)
-  *
-  *         (*) value not defined in all devices
-  * @retval I2C clock frequency (in Hz)
-  *         @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that HSI oscillator is not ready
-  */
-uint32_t LL_RCC_GetI2CClockFreq(uint32_t I2CxSource)
-{
-  uint32_t i2c_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
-
-  /* Check parameter */
-  assert_param(IS_LL_RCC_I2C_CLKSOURCE(I2CxSource));
-
-  /* I2C1 CLK clock frequency */
-  if (I2CxSource == LL_RCC_I2C1_CLKSOURCE)
-  {
-    switch (LL_RCC_GetI2CClockSource(I2CxSource))
-    {
-      case LL_RCC_I2C1_CLKSOURCE_SYSCLK: /* I2C1 Clock is System Clock */
-        i2c_frequency = RCC_GetSystemClockFreq();
-        break;
-
-      case LL_RCC_I2C1_CLKSOURCE_HSI:    /* I2C1 Clock is HSI Osc. */
-        if (LL_RCC_HSI_IsReady())
-        {
-          i2c_frequency = HSI_VALUE;
-        }
-        break;
-
-      case LL_RCC_I2C1_CLKSOURCE_PCLK1:  /* I2C1 Clock is PCLK1 */
-      default:
-        i2c_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
-        break;
-    }
-  }
-
-#if defined(RCC_CCIPR_I2C3SEL)
-  /* I2C3 CLK clock frequency */
-  if (I2CxSource == LL_RCC_I2C3_CLKSOURCE)
-  {
-    switch (LL_RCC_GetI2CClockSource(I2CxSource))
-    {
-      case LL_RCC_I2C3_CLKSOURCE_SYSCLK: /* I2C3 Clock is System Clock */
-        i2c_frequency = RCC_GetSystemClockFreq();
-        break;
-
-      case LL_RCC_I2C3_CLKSOURCE_HSI:    /* I2C3 Clock is HSI Osc. */
-        if (LL_RCC_HSI_IsReady())
-        {
-          i2c_frequency = HSI_VALUE;
-        }
-        break;
-
-      case LL_RCC_I2C3_CLKSOURCE_PCLK1:  /* I2C3 Clock is PCLK1 */
-      default:
-        i2c_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
-        break;
-    }
-  }
-#endif /*RCC_CCIPR_I2C3SEL*/
-
-  return i2c_frequency;
-}
-
-/**
-  * @brief  Return LPUARTx clock frequency
-  * @param  LPUARTxSource This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE
-  * @retval LPUART clock frequency (in Hz)
-  *         @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready
-  */
-uint32_t LL_RCC_GetLPUARTClockFreq(uint32_t LPUARTxSource)
-{
-  uint32_t lpuart_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
-
-  /* Check parameter */
-  assert_param(IS_LL_RCC_LPUART_CLKSOURCE(LPUARTxSource));
-
-  /* LPUART1CLK clock frequency */
-  switch (LL_RCC_GetLPUARTClockSource(LPUARTxSource))
-  {
-    case LL_RCC_LPUART1_CLKSOURCE_SYSCLK: /* LPUART1 Clock is System Clock */
-      lpuart_frequency = RCC_GetSystemClockFreq();
-      break;
-
-    case LL_RCC_LPUART1_CLKSOURCE_HSI:    /* LPUART1 Clock is HSI Osc. */
-      if (LL_RCC_HSI_IsReady())
-      {
-        lpuart_frequency = HSI_VALUE;
-      }
-      break;
-
-    case LL_RCC_LPUART1_CLKSOURCE_LSE:    /* LPUART1 Clock is LSE Osc. */
-      if (LL_RCC_LSE_IsReady())
-      {
-        lpuart_frequency = LSE_VALUE;
-      }
-      break;
-
-    case LL_RCC_LPUART1_CLKSOURCE_PCLK1:  /* LPUART1 Clock is PCLK1 */
-    default:
-      lpuart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
-      break;
-  }
-
-  return lpuart_frequency;
-}
-
-/**
-  * @brief  Return LPTIMx clock frequency
-  * @param  LPTIMxSource This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_LPTIM1_CLKSOURCE
-  * @retval LPTIM clock frequency (in Hz)
-  *         @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready
-  */
-uint32_t LL_RCC_GetLPTIMClockFreq(uint32_t LPTIMxSource)
-{
-  uint32_t lptim_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
-
-  /* Check parameter */
-  assert_param(IS_LL_RCC_LPTIM_CLKSOURCE(LPTIMxSource));
-
-  if (LPTIMxSource == LL_RCC_LPTIM1_CLKSOURCE)
-  {
-    /* LPTIM1CLK clock frequency */
-    switch (LL_RCC_GetLPTIMClockSource(LPTIMxSource))
-    {
-      case LL_RCC_LPTIM1_CLKSOURCE_LSI:    /* LPTIM1 Clock is LSI Osc. */
-        if (LL_RCC_LSI_IsReady())
-        {
-          lptim_frequency = LSI_VALUE;
-        }
-        break;
-
-      case LL_RCC_LPTIM1_CLKSOURCE_HSI:    /* LPTIM1 Clock is HSI Osc. */
-        if (LL_RCC_HSI_IsReady())
-        {
-          lptim_frequency = HSI_VALUE;
-        }
-        break;
-
-      case LL_RCC_LPTIM1_CLKSOURCE_LSE:    /* LPTIM1 Clock is LSE Osc. */
-        if (LL_RCC_LSE_IsReady())
-        {
-          lptim_frequency = LSE_VALUE;
-        }
-        break;
-
-      case LL_RCC_LPTIM1_CLKSOURCE_PCLK1:  /* LPTIM1 Clock is PCLK1 */
-      default:
-        lptim_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
-        break;
-    }
-  }
-
-  return lptim_frequency;
-}
-
-#if defined(USB)
-/**
-  * @brief  Return USBx clock frequency
-  * @param  USBxSource This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_USB_CLKSOURCE
-  * @retval USB clock frequency (in Hz)
-  *         @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI48) or PLL is not ready
-  *         @arg @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected
-  */
-uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource)
-{
-  uint32_t usb_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
-
-  /* Check parameter */
-  assert_param(IS_LL_RCC_USB_CLKSOURCE(USBxSource));
-
-  /* USBCLK clock frequency */
-  switch (LL_RCC_GetUSBClockSource(USBxSource))
-  {
-    case LL_RCC_USB_CLKSOURCE_PLL:        /* PLL clock used as USB clock source */
-      if (LL_RCC_PLL_IsReady())
-      {
-        usb_frequency = RCC_PLL_GetFreqDomain_SYS();
-      }
-      break;
-
-    case LL_RCC_USB_CLKSOURCE_HSI48:      /* HSI48 clock used as USB clock source */
-    default:
-      if (LL_RCC_HSI48_IsReady())
-      {
-        usb_frequency = HSI48_VALUE;
-      }
-      break;
-  }
-
-  return usb_frequency;
-}
-#endif /* USB */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup RCC_LL_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  Return SYSTEM clock frequency
-  * @retval SYSTEM clock frequency (in Hz)
-  */
-uint32_t RCC_GetSystemClockFreq(void)
-{
-  uint32_t frequency = 0U;
-
-  /* Get SYSCLK source -------------------------------------------------------*/
-  switch (LL_RCC_GetSysClkSource())
-  {
-    case LL_RCC_SYS_CLKSOURCE_STATUS_MSI:  /* MSI used as system clock source */
-      frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_GetRange());
-      break;
-
-    case LL_RCC_SYS_CLKSOURCE_STATUS_HSI:  /* HSI used as system clock  source */
-      frequency = HSI_VALUE;
-      break;
-
-    case LL_RCC_SYS_CLKSOURCE_STATUS_HSE:  /* HSE used as system clock  source */
-      frequency = HSE_VALUE;
-      break;
-
-    case LL_RCC_SYS_CLKSOURCE_STATUS_PLL:  /* PLL used as system clock  source */
-      frequency = RCC_PLL_GetFreqDomain_SYS();
-      break;
-
-    default:
-      frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_GetRange());
-      break;
-  }
-
-  return frequency;
-}
-
-/**
-  * @brief  Return HCLK clock frequency
-  * @param  SYSCLK_Frequency SYSCLK clock frequency
-  * @retval HCLK clock frequency (in Hz)
-  */
-uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency)
-{
-  /* HCLK clock frequency */
-  return __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, LL_RCC_GetAHBPrescaler());
-}
-
-/**
-  * @brief  Return PCLK1 clock frequency
-  * @param  HCLK_Frequency HCLK clock frequency
-  * @retval PCLK1 clock frequency (in Hz)
-  */
-uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency)
-{
-  /* PCLK1 clock frequency */
-  return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler());
-}
-
-/**
-  * @brief  Return PCLK2 clock frequency
-  * @param  HCLK_Frequency HCLK clock frequency
-  * @retval PCLK2 clock frequency (in Hz)
-  */
-uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency)
-{
-  /* PCLK2 clock frequency */
-  return __LL_RCC_CALC_PCLK2_FREQ(HCLK_Frequency, LL_RCC_GetAPB2Prescaler());
-}
-
-/**
-  * @brief  Return PLL clock frequency used for system domain
-  * @retval PLL clock frequency (in Hz)
-  */
-uint32_t RCC_PLL_GetFreqDomain_SYS(void)
-{
-  uint32_t pllinputfreq = 0U, pllsource = 0U;
-
-  /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL divider) * PLL Multiplicator */
-
-  /* Get PLL source */
-  pllsource = LL_RCC_PLL_GetMainSource();
-
-  switch (pllsource)
-  {
-    case LL_RCC_PLLSOURCE_HSI:       /* HSI used as PLL clock source */
-      pllinputfreq = HSI_VALUE;
-      break;
-
-    case LL_RCC_PLLSOURCE_HSE:       /* HSE used as PLL clock source */
-      pllinputfreq = HSE_VALUE;
-      break;
-
-    default:
-      pllinputfreq = HSI_VALUE;
-      break;
-  }
-  return __LL_RCC_CALC_PLLCLK_FREQ(pllinputfreq, LL_RCC_PLL_GetMultiplicator(), LL_RCC_PLL_GetDivider());
-}
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined(RCC) */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rng.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rng.c
deleted file mode 100755
index 1a62a32f..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rng.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_rng.c
-  * @author  MCD Application Team
-  * @brief   RNG LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_rng.h"
-#include "stm32l0xx_ll_bus.h"
-
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (RNG)
-
-/** @addtogroup RNG_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup RNG_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup RNG_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize RNG registers (Registers restored to their default values).
-  * @param  RNGx RNG Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RNG registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx)
-{
-  /* Check the parameters */
-  assert_param(IS_RNG_ALL_INSTANCE(RNGx));
-
-  /* Enable RNG reset state */
-  LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_RNG);
-
-  /* Release RNG from reset state */
-  LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_RNG);
-
-  return (SUCCESS);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined (RNG) */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rtc.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rtc.c
deleted file mode 100755
index 2f976ecd..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rtc.c
+++ /dev/null
@@ -1,895 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_rtc.c
-  * @author  MCD Application Team
-  * @brief   RTC LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_rtc.h"
-#include "stm32l0xx_ll_cortex.h"
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined(RTC)
-
-/** @addtogroup RTC_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @addtogroup RTC_LL_Private_Constants
-  * @{
-  */
-/* Default values used for prescaler */
-#define RTC_ASYNCH_PRESC_DEFAULT     ((uint32_t) 0x0000007FU)
-#define RTC_SYNCH_PRESC_DEFAULT      ((uint32_t) 0x000000FFU)
-
-/* Values used for timeout */
-#define RTC_INITMODE_TIMEOUT         ((uint32_t) 1000U) /* 1s when tick set to 1ms */
-#define RTC_SYNCHRO_TIMEOUT          ((uint32_t) 1000U) /* 1s when tick set to 1ms */
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup RTC_LL_Private_Macros
-  * @{
-  */
-
-#define IS_LL_RTC_HOURFORMAT(__VALUE__) (((__VALUE__) == LL_RTC_HOURFORMAT_24HOUR) \
-                                      || ((__VALUE__) == LL_RTC_HOURFORMAT_AMPM))
-
-#define IS_LL_RTC_ASYNCH_PREDIV(__VALUE__)   ((__VALUE__) <= (uint32_t)0x7FU)
-
-#define IS_LL_RTC_SYNCH_PREDIV(__VALUE__)    ((__VALUE__) <= (uint32_t)0x7FFFU)
-
-#define IS_LL_RTC_FORMAT(__VALUE__) (((__VALUE__) == LL_RTC_FORMAT_BIN) \
-                                  || ((__VALUE__) == LL_RTC_FORMAT_BCD))
-
-#define IS_LL_RTC_TIME_FORMAT(__VALUE__) (((__VALUE__) == LL_RTC_TIME_FORMAT_AM_OR_24) \
-                                       || ((__VALUE__) == LL_RTC_TIME_FORMAT_PM))
-
-#define IS_LL_RTC_HOUR12(__HOUR__)            (((__HOUR__) > 0U) && ((__HOUR__) <= 12U))
-#define IS_LL_RTC_HOUR24(__HOUR__)            ((__HOUR__) <= 23U)
-#define IS_LL_RTC_MINUTES(__MINUTES__)        ((__MINUTES__) <= 59U)
-#define IS_LL_RTC_SECONDS(__SECONDS__)        ((__SECONDS__) <= 59U)
-
-#define IS_LL_RTC_WEEKDAY(__VALUE__) (((__VALUE__) == LL_RTC_WEEKDAY_MONDAY) \
-                                   || ((__VALUE__) == LL_RTC_WEEKDAY_TUESDAY) \
-                                   || ((__VALUE__) == LL_RTC_WEEKDAY_WEDNESDAY) \
-                                   || ((__VALUE__) == LL_RTC_WEEKDAY_THURSDAY) \
-                                   || ((__VALUE__) == LL_RTC_WEEKDAY_FRIDAY) \
-                                   || ((__VALUE__) == LL_RTC_WEEKDAY_SATURDAY) \
-                                   || ((__VALUE__) == LL_RTC_WEEKDAY_SUNDAY))
-
-#define IS_LL_RTC_DAY(__DAY__)    (((__DAY__) >= (uint32_t)1U) && ((__DAY__) <= (uint32_t)31U))
-
-#define IS_LL_RTC_MONTH(__VALUE__) (((__VALUE__) == LL_RTC_MONTH_JANUARY) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_FEBRUARY) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_MARCH) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_APRIL) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_MAY) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_JUNE) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_JULY) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_AUGUST) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_SEPTEMBER) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_OCTOBER) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_NOVEMBER) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_DECEMBER))
-
-#define IS_LL_RTC_YEAR(__YEAR__) ((__YEAR__) <= 99U)
-
-#define IS_LL_RTC_ALMA_MASK(__VALUE__) (((__VALUE__) == LL_RTC_ALMA_MASK_NONE) \
-                                     || ((__VALUE__) == LL_RTC_ALMA_MASK_DATEWEEKDAY) \
-                                     || ((__VALUE__) == LL_RTC_ALMA_MASK_HOURS) \
-                                     || ((__VALUE__) == LL_RTC_ALMA_MASK_MINUTES) \
-                                     || ((__VALUE__) == LL_RTC_ALMA_MASK_SECONDS) \
-                                     || ((__VALUE__) == LL_RTC_ALMA_MASK_ALL))
-
-#define IS_LL_RTC_ALMB_MASK(__VALUE__) (((__VALUE__) == LL_RTC_ALMB_MASK_NONE) \
-                                     || ((__VALUE__) == LL_RTC_ALMB_MASK_DATEWEEKDAY) \
-                                     || ((__VALUE__) == LL_RTC_ALMB_MASK_HOURS) \
-                                     || ((__VALUE__) == LL_RTC_ALMB_MASK_MINUTES) \
-                                     || ((__VALUE__) == LL_RTC_ALMB_MASK_SECONDS) \
-                                     || ((__VALUE__) == LL_RTC_ALMB_MASK_ALL))
-
-
-#define IS_LL_RTC_ALMA_DATE_WEEKDAY_SEL(__SEL__) (((__SEL__) == LL_RTC_ALMA_DATEWEEKDAYSEL_DATE) || \
-                                                  ((__SEL__) == LL_RTC_ALMA_DATEWEEKDAYSEL_WEEKDAY))
-
-#define IS_LL_RTC_ALMB_DATE_WEEKDAY_SEL(__SEL__) (((__SEL__) == LL_RTC_ALMB_DATEWEEKDAYSEL_DATE) || \
-                                                  ((__SEL__) == LL_RTC_ALMB_DATEWEEKDAYSEL_WEEKDAY))
-
-
-/**
-  * @}
-  */
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup RTC_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup RTC_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-Initializes the RTC registers to their default reset values.
-  * @note   This function doesn't reset the RTC Clock source and RTC Backup Data
-  *         registers.
-  * @param  RTCx RTC Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RTC registers are de-initialized
-  *          - ERROR: RTC registers are not de-initialized
-  */
-ErrorStatus LL_RTC_DeInit(RTC_TypeDef *RTCx)
-{
-  ErrorStatus status = ERROR;
-
-  /* Check the parameter */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-
-  /* Disable the write protection for RTC registers */
-  LL_RTC_DisableWriteProtection(RTCx);
-
-  /* Set Initialization mode */
-  if (LL_RTC_EnterInitMode(RTCx) != ERROR)
-  {
-    /* Reset TR, DR and CR registers */
-    LL_RTC_WriteReg(RTCx, TR,       0x00000000U);
-#if defined(RTC_WAKEUP_SUPPORT)
-    LL_RTC_WriteReg(RTCx, WUTR,     RTC_WUTR_WUT);
-#endif /* RTC_WAKEUP_SUPPORT */
-    LL_RTC_WriteReg(RTCx, DR  ,     (RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0));
-    /* Reset All CR bits except CR[2:0] */
-#if defined(RTC_WAKEUP_SUPPORT)
-    LL_RTC_WriteReg(RTCx, CR, (LL_RTC_ReadReg(RTCx, CR) & RTC_CR_WUCKSEL));
-#else
-    LL_RTC_WriteReg(RTCx, CR, 0x00000000U);
-#endif /* RTC_WAKEUP_SUPPORT */
-    LL_RTC_WriteReg(RTCx, PRER,     (RTC_PRER_PREDIV_A | RTC_SYNCH_PRESC_DEFAULT));
-    LL_RTC_WriteReg(RTCx, ALRMAR,   0x00000000U);
-    LL_RTC_WriteReg(RTCx, ALRMBR,   0x00000000U);
-    LL_RTC_WriteReg(RTCx, SHIFTR,   0x00000000U);
-    LL_RTC_WriteReg(RTCx, CALR,     0x00000000U);
-    LL_RTC_WriteReg(RTCx, ALRMASSR, 0x00000000U);
-    LL_RTC_WriteReg(RTCx, ALRMBSSR, 0x00000000U);
-
-    /* Reset ISR register and exit initialization mode */
-    LL_RTC_WriteReg(RTCx, ISR,      0x00000000U);
-
-    /* Reset Tamper and alternate functions configuration register */
-    LL_RTC_WriteReg(RTCx, TAMPCR, 0x00000000U);
-
-    /* Reset Option register */
-    LL_RTC_WriteReg(RTCx, OR, 0x00000000U);
-
-    /* Wait till the RTC RSF flag is set */
-    status = LL_RTC_WaitForSynchro(RTCx);
-  }
-
-  /* Enable the write protection for RTC registers */
-  LL_RTC_EnableWriteProtection(RTCx);
-
-  return status;
-}
-
-/**
-  * @brief  Initializes the RTC registers according to the specified parameters
-  *         in RTC_InitStruct.
-  * @param  RTCx RTC Instance
-  * @param  RTC_InitStruct pointer to a @ref LL_RTC_InitTypeDef structure that contains
-  *         the configuration information for the RTC peripheral.
-  * @note   The RTC Prescaler register is write protected and can be written in
-  *         initialization mode only.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RTC registers are initialized
-  *          - ERROR: RTC registers are not initialized
-  */
-ErrorStatus LL_RTC_Init(RTC_TypeDef *RTCx, LL_RTC_InitTypeDef *RTC_InitStruct)
-{
-  ErrorStatus status = ERROR;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-  assert_param(IS_LL_RTC_HOURFORMAT(RTC_InitStruct->HourFormat));
-  assert_param(IS_LL_RTC_ASYNCH_PREDIV(RTC_InitStruct->AsynchPrescaler));
-  assert_param(IS_LL_RTC_SYNCH_PREDIV(RTC_InitStruct->SynchPrescaler));
-
-  /* Disable the write protection for RTC registers */
-  LL_RTC_DisableWriteProtection(RTCx);
-
-  /* Set Initialization mode */
-  if (LL_RTC_EnterInitMode(RTCx) != ERROR)
-  {
-    /* Set Hour Format */
-    LL_RTC_SetHourFormat(RTCx, RTC_InitStruct->HourFormat);
-
-    /* Configure Synchronous and Asynchronous prescaler factor */
-    LL_RTC_SetSynchPrescaler(RTCx, RTC_InitStruct->SynchPrescaler);
-    LL_RTC_SetAsynchPrescaler(RTCx, RTC_InitStruct->AsynchPrescaler);
-
-    /* Exit Initialization mode */
-    LL_RTC_DisableInitMode(RTCx);
-
-    status = SUCCESS;
-  }
-  /* Enable the write protection for RTC registers */
-  LL_RTC_EnableWriteProtection(RTCx);
-
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_RTC_InitTypeDef field to default value.
-  * @param  RTC_InitStruct pointer to a @ref LL_RTC_InitTypeDef structure which will be initialized.
-  * @retval None
-  */
-void LL_RTC_StructInit(LL_RTC_InitTypeDef *RTC_InitStruct)
-{
-  /* Set RTC_InitStruct fields to default values */
-  RTC_InitStruct->HourFormat      = LL_RTC_HOURFORMAT_24HOUR;
-  RTC_InitStruct->AsynchPrescaler = RTC_ASYNCH_PRESC_DEFAULT;
-  RTC_InitStruct->SynchPrescaler  = RTC_SYNCH_PRESC_DEFAULT;
-}
-
-/**
-  * @brief  Set the RTC current time.
-  * @param  RTCx RTC Instance
-  * @param  RTC_Format This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_FORMAT_BIN
-  *         @arg @ref LL_RTC_FORMAT_BCD
-  * @param  RTC_TimeStruct pointer to a RTC_TimeTypeDef structure that contains
-  *                        the time configuration information for the RTC.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RTC Time register is configured
-  *          - ERROR: RTC Time register is not configured
-  */
-ErrorStatus LL_RTC_TIME_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_TimeTypeDef *RTC_TimeStruct)
-{
-  ErrorStatus status = ERROR;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-  assert_param(IS_LL_RTC_FORMAT(RTC_Format));
-
-  if (RTC_Format == LL_RTC_FORMAT_BIN)
-  {
-    if (LL_RTC_GetHourFormat(RTCx) != LL_RTC_HOURFORMAT_24HOUR)
-    {
-      assert_param(IS_LL_RTC_HOUR12(RTC_TimeStruct->Hours));
-      assert_param(IS_LL_RTC_TIME_FORMAT(RTC_TimeStruct->TimeFormat));
-    }
-    else
-    {
-      RTC_TimeStruct->TimeFormat = 0x00U;
-      assert_param(IS_LL_RTC_HOUR24(RTC_TimeStruct->Hours));
-    }
-    assert_param(IS_LL_RTC_MINUTES(RTC_TimeStruct->Minutes));
-    assert_param(IS_LL_RTC_SECONDS(RTC_TimeStruct->Seconds));
-  }
-  else
-  {
-    if (LL_RTC_GetHourFormat(RTCx) != LL_RTC_HOURFORMAT_24HOUR)
-    {
-      assert_param(IS_LL_RTC_HOUR12(__LL_RTC_CONVERT_BCD2BIN(RTC_TimeStruct->Hours)));
-      assert_param(IS_LL_RTC_TIME_FORMAT(RTC_TimeStruct->TimeFormat));
-    }
-    else
-    {
-      RTC_TimeStruct->TimeFormat = 0x00U;
-      assert_param(IS_LL_RTC_HOUR24(__LL_RTC_CONVERT_BCD2BIN(RTC_TimeStruct->Hours)));
-    }
-    assert_param(IS_LL_RTC_MINUTES(__LL_RTC_CONVERT_BCD2BIN(RTC_TimeStruct->Minutes)));
-    assert_param(IS_LL_RTC_SECONDS(__LL_RTC_CONVERT_BCD2BIN(RTC_TimeStruct->Seconds)));
-  }
-
-  /* Disable the write protection for RTC registers */
-  LL_RTC_DisableWriteProtection(RTCx);
-
-  /* Set Initialization mode */
-  if (LL_RTC_EnterInitMode(RTCx) != ERROR)
-  {
-    /* Check the input parameters format */
-    if (RTC_Format != LL_RTC_FORMAT_BIN)
-    {
-      LL_RTC_TIME_Config(RTCx, RTC_TimeStruct->TimeFormat, RTC_TimeStruct->Hours,
-                         RTC_TimeStruct->Minutes, RTC_TimeStruct->Seconds);
-    }
-    else
-    {
-      LL_RTC_TIME_Config(RTCx, RTC_TimeStruct->TimeFormat, __LL_RTC_CONVERT_BIN2BCD(RTC_TimeStruct->Hours),
-                         __LL_RTC_CONVERT_BIN2BCD(RTC_TimeStruct->Minutes),
-                         __LL_RTC_CONVERT_BIN2BCD(RTC_TimeStruct->Seconds));
-    }
-
-    /* Exit Initialization mode */
-    LL_RTC_DisableInitMode(RTC);
-
-    /* If  RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
-    if (LL_RTC_IsShadowRegBypassEnabled(RTCx) == 0U)
-    {
-      status = LL_RTC_WaitForSynchro(RTCx);
-    }
-    else
-    {
-      status = SUCCESS;
-    }
-  }
-  /* Enable the write protection for RTC registers */
-  LL_RTC_EnableWriteProtection(RTCx);
-
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_RTC_TimeTypeDef field to default value (Time = 00h:00min:00sec).
-  * @param  RTC_TimeStruct pointer to a @ref LL_RTC_TimeTypeDef structure which will be initialized.
-  * @retval None
-  */
-void LL_RTC_TIME_StructInit(LL_RTC_TimeTypeDef *RTC_TimeStruct)
-{
-  /* Time = 00h:00min:00sec */
-  RTC_TimeStruct->TimeFormat = LL_RTC_TIME_FORMAT_AM_OR_24;
-  RTC_TimeStruct->Hours      = 0U;
-  RTC_TimeStruct->Minutes    = 0U;
-  RTC_TimeStruct->Seconds    = 0U;
-}
-
-/**
-  * @brief  Set the RTC current date.
-  * @param  RTCx RTC Instance
-  * @param  RTC_Format This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_FORMAT_BIN
-  *         @arg @ref LL_RTC_FORMAT_BCD
-  * @param  RTC_DateStruct: pointer to a RTC_DateTypeDef structure that contains
-  *                         the date configuration information for the RTC.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RTC Day register is configured
-  *          - ERROR: RTC Day register is not configured
-  */
-ErrorStatus LL_RTC_DATE_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_DateTypeDef *RTC_DateStruct)
-{
-  ErrorStatus status = ERROR;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-  assert_param(IS_LL_RTC_FORMAT(RTC_Format));
-
-  if ((RTC_Format == LL_RTC_FORMAT_BIN) && ((RTC_DateStruct->Month & 0x10U) == 0x10U))
-  {
-    RTC_DateStruct->Month = (RTC_DateStruct->Month & (uint32_t)~(0x10U)) + 0x0AU;
-  }
-  if (RTC_Format == LL_RTC_FORMAT_BIN)
-  {
-    assert_param(IS_LL_RTC_YEAR(RTC_DateStruct->Year));
-    assert_param(IS_LL_RTC_MONTH(RTC_DateStruct->Month));
-    assert_param(IS_LL_RTC_DAY(RTC_DateStruct->Day));
-  }
-  else
-  {
-    assert_param(IS_LL_RTC_YEAR(__LL_RTC_CONVERT_BCD2BIN(RTC_DateStruct->Year)));
-    assert_param(IS_LL_RTC_MONTH(__LL_RTC_CONVERT_BCD2BIN(RTC_DateStruct->Month)));
-    assert_param(IS_LL_RTC_DAY(__LL_RTC_CONVERT_BCD2BIN(RTC_DateStruct->Day)));
-  }
-  assert_param(IS_LL_RTC_WEEKDAY(RTC_DateStruct->WeekDay));
-
-  /* Disable the write protection for RTC registers */
-  LL_RTC_DisableWriteProtection(RTCx);
-
-  /* Set Initialization mode */
-  if (LL_RTC_EnterInitMode(RTCx) != ERROR)
-  {
-    /* Check the input parameters format */
-    if (RTC_Format != LL_RTC_FORMAT_BIN)
-    {
-      LL_RTC_DATE_Config(RTCx, RTC_DateStruct->WeekDay, RTC_DateStruct->Day, RTC_DateStruct->Month, RTC_DateStruct->Year);
-    }
-    else
-    {
-      LL_RTC_DATE_Config(RTCx, RTC_DateStruct->WeekDay, __LL_RTC_CONVERT_BIN2BCD(RTC_DateStruct->Day),
-                         __LL_RTC_CONVERT_BIN2BCD(RTC_DateStruct->Month), __LL_RTC_CONVERT_BIN2BCD(RTC_DateStruct->Year));
-    }
-
-    /* Exit Initialization mode */
-    LL_RTC_DisableInitMode(RTC);
-
-    /* If  RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
-    if (LL_RTC_IsShadowRegBypassEnabled(RTCx) == 0U)
-    {
-      status = LL_RTC_WaitForSynchro(RTCx);
-    }
-    else
-    {
-      status = SUCCESS;
-    }
-  }
-  /* Enable the write protection for RTC registers */
-  LL_RTC_EnableWriteProtection(RTCx);
-
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_RTC_DateTypeDef field to default value (date = Monday, January 01 xx00)
-  * @param  RTC_DateStruct pointer to a @ref LL_RTC_DateTypeDef structure which will be initialized.
-  * @retval None
-  */
-void LL_RTC_DATE_StructInit(LL_RTC_DateTypeDef *RTC_DateStruct)
-{
-  /* Monday, January 01 xx00 */
-  RTC_DateStruct->WeekDay = LL_RTC_WEEKDAY_MONDAY;
-  RTC_DateStruct->Day     = 1U;
-  RTC_DateStruct->Month   = LL_RTC_MONTH_JANUARY;
-  RTC_DateStruct->Year    = 0U;
-}
-
-/**
-  * @brief  Set the RTC Alarm A.
-  * @note   The Alarm register can only be written when the corresponding Alarm
-  *         is disabled (Use @ref LL_RTC_ALMA_Disable function).
-  * @param  RTCx RTC Instance
-  * @param  RTC_Format This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_FORMAT_BIN
-  *         @arg @ref LL_RTC_FORMAT_BCD
-  * @param  RTC_AlarmStruct pointer to a @ref LL_RTC_AlarmTypeDef structure that
-  *                         contains the alarm configuration parameters.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: ALARMA registers are configured
-  *          - ERROR: ALARMA registers are not configured
-  */
-ErrorStatus LL_RTC_ALMA_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_AlarmTypeDef *RTC_AlarmStruct)
-{
-  /* Check the parameters */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-  assert_param(IS_LL_RTC_FORMAT(RTC_Format));
-  assert_param(IS_LL_RTC_ALMA_MASK(RTC_AlarmStruct->AlarmMask));
-  assert_param(IS_LL_RTC_ALMA_DATE_WEEKDAY_SEL(RTC_AlarmStruct->AlarmDateWeekDaySel));
-
-  if (RTC_Format == LL_RTC_FORMAT_BIN)
-  {
-    if (LL_RTC_GetHourFormat(RTCx) != LL_RTC_HOURFORMAT_24HOUR)
-    {
-      assert_param(IS_LL_RTC_HOUR12(RTC_AlarmStruct->AlarmTime.Hours));
-      assert_param(IS_LL_RTC_TIME_FORMAT(RTC_AlarmStruct->AlarmTime.TimeFormat));
-    }
-    else
-    {
-      RTC_AlarmStruct->AlarmTime.TimeFormat = 0x00U;
-      assert_param(IS_LL_RTC_HOUR24(RTC_AlarmStruct->AlarmTime.Hours));
-    }
-    assert_param(IS_LL_RTC_MINUTES(RTC_AlarmStruct->AlarmTime.Minutes));
-    assert_param(IS_LL_RTC_SECONDS(RTC_AlarmStruct->AlarmTime.Seconds));
-
-    if (RTC_AlarmStruct->AlarmDateWeekDaySel == LL_RTC_ALMA_DATEWEEKDAYSEL_DATE)
-    {
-      assert_param(IS_LL_RTC_DAY(RTC_AlarmStruct->AlarmDateWeekDay));
-    }
-    else
-    {
-      assert_param(IS_LL_RTC_WEEKDAY(RTC_AlarmStruct->AlarmDateWeekDay));
-    }
-  }
-  else
-  {
-    if (LL_RTC_GetHourFormat(RTCx) != LL_RTC_HOURFORMAT_24HOUR)
-    {
-      assert_param(IS_LL_RTC_HOUR12(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Hours)));
-      assert_param(IS_LL_RTC_TIME_FORMAT(RTC_AlarmStruct->AlarmTime.TimeFormat));
-    }
-    else
-    {
-      RTC_AlarmStruct->AlarmTime.TimeFormat = 0x00U;
-      assert_param(IS_LL_RTC_HOUR24(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Hours)));
-    }
-
-    assert_param(IS_LL_RTC_MINUTES(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Minutes)));
-    assert_param(IS_LL_RTC_SECONDS(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Seconds)));
-
-    if (RTC_AlarmStruct->AlarmDateWeekDaySel == LL_RTC_ALMA_DATEWEEKDAYSEL_DATE)
-    {
-      assert_param(IS_LL_RTC_DAY(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmDateWeekDay)));
-    }
-    else
-    {
-      assert_param(IS_LL_RTC_WEEKDAY(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmDateWeekDay)));
-    }
-  }
-
-  /* Disable the write protection for RTC registers */
-  LL_RTC_DisableWriteProtection(RTCx);
-
-  /* Select weekday selection */
-  if (RTC_AlarmStruct->AlarmDateWeekDaySel == LL_RTC_ALMA_DATEWEEKDAYSEL_DATE)
-  {
-    /* Set the date for ALARM */
-    LL_RTC_ALMA_DisableWeekday(RTCx);
-    if (RTC_Format != LL_RTC_FORMAT_BIN)
-    {
-      LL_RTC_ALMA_SetDay(RTCx, RTC_AlarmStruct->AlarmDateWeekDay);
-    }
-    else
-    {
-      LL_RTC_ALMA_SetDay(RTCx, __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmDateWeekDay));
-    }
-  }
-  else
-  {
-    /* Set the week day for ALARM */
-    LL_RTC_ALMA_EnableWeekday(RTCx);
-    LL_RTC_ALMA_SetWeekDay(RTCx, RTC_AlarmStruct->AlarmDateWeekDay);
-  }
-
-  /* Configure the Alarm register */
-  if (RTC_Format != LL_RTC_FORMAT_BIN)
-  {
-    LL_RTC_ALMA_ConfigTime(RTCx, RTC_AlarmStruct->AlarmTime.TimeFormat, RTC_AlarmStruct->AlarmTime.Hours,
-                           RTC_AlarmStruct->AlarmTime.Minutes, RTC_AlarmStruct->AlarmTime.Seconds);
-  }
-  else
-  {
-    LL_RTC_ALMA_ConfigTime(RTCx, RTC_AlarmStruct->AlarmTime.TimeFormat,
-                           __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmTime.Hours),
-                           __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmTime.Minutes),
-                           __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmTime.Seconds));
-  }
-  /* Set ALARM mask */
-  LL_RTC_ALMA_SetMask(RTCx, RTC_AlarmStruct->AlarmMask);
-
-  /* Enable the write protection for RTC registers */
-  LL_RTC_EnableWriteProtection(RTCx);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Set the RTC Alarm B.
-  * @note   The Alarm register can only be written when the corresponding Alarm
-  *         is disabled (@ref LL_RTC_ALMB_Disable function).
-  * @param  RTCx RTC Instance
-  * @param  RTC_Format This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_FORMAT_BIN
-  *         @arg @ref LL_RTC_FORMAT_BCD
-  * @param  RTC_AlarmStruct pointer to a @ref LL_RTC_AlarmTypeDef structure that
-  *                         contains the alarm configuration parameters.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: ALARMB registers are configured
-  *          - ERROR: ALARMB registers are not configured
-  */
-ErrorStatus LL_RTC_ALMB_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_AlarmTypeDef *RTC_AlarmStruct)
-{
-  /* Check the parameters */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-  assert_param(IS_LL_RTC_FORMAT(RTC_Format));
-  assert_param(IS_LL_RTC_ALMB_MASK(RTC_AlarmStruct->AlarmMask));
-  assert_param(IS_LL_RTC_ALMB_DATE_WEEKDAY_SEL(RTC_AlarmStruct->AlarmDateWeekDaySel));
-
-  if (RTC_Format == LL_RTC_FORMAT_BIN)
-  {
-    if (LL_RTC_GetHourFormat(RTCx) != LL_RTC_HOURFORMAT_24HOUR)
-    {
-      assert_param(IS_LL_RTC_HOUR12(RTC_AlarmStruct->AlarmTime.Hours));
-      assert_param(IS_LL_RTC_TIME_FORMAT(RTC_AlarmStruct->AlarmTime.TimeFormat));
-    }
-    else
-    {
-      RTC_AlarmStruct->AlarmTime.TimeFormat = 0x00U;
-      assert_param(IS_LL_RTC_HOUR24(RTC_AlarmStruct->AlarmTime.Hours));
-    }
-    assert_param(IS_LL_RTC_MINUTES(RTC_AlarmStruct->AlarmTime.Minutes));
-    assert_param(IS_LL_RTC_SECONDS(RTC_AlarmStruct->AlarmTime.Seconds));
-
-    if (RTC_AlarmStruct->AlarmDateWeekDaySel == LL_RTC_ALMB_DATEWEEKDAYSEL_DATE)
-    {
-      assert_param(IS_LL_RTC_DAY(RTC_AlarmStruct->AlarmDateWeekDay));
-    }
-    else
-    {
-      assert_param(IS_LL_RTC_WEEKDAY(RTC_AlarmStruct->AlarmDateWeekDay));
-    }
-  }
-  else
-  {
-    if (LL_RTC_GetHourFormat(RTCx) != LL_RTC_HOURFORMAT_24HOUR)
-    {
-      assert_param(IS_LL_RTC_HOUR12(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Hours)));
-      assert_param(IS_LL_RTC_TIME_FORMAT(RTC_AlarmStruct->AlarmTime.TimeFormat));
-    }
-    else
-    {
-      RTC_AlarmStruct->AlarmTime.TimeFormat = 0x00U;
-      assert_param(IS_LL_RTC_HOUR24(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Hours)));
-    }
-
-    assert_param(IS_LL_RTC_MINUTES(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Minutes)));
-    assert_param(IS_LL_RTC_SECONDS(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Seconds)));
-
-    if (RTC_AlarmStruct->AlarmDateWeekDaySel == LL_RTC_ALMB_DATEWEEKDAYSEL_DATE)
-    {
-      assert_param(IS_LL_RTC_DAY(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmDateWeekDay)));
-    }
-    else
-    {
-      assert_param(IS_LL_RTC_WEEKDAY(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmDateWeekDay)));
-    }
-  }
-
-  /* Disable the write protection for RTC registers */
-  LL_RTC_DisableWriteProtection(RTCx);
-
-  /* Select weekday selection */
-  if (RTC_AlarmStruct->AlarmDateWeekDaySel == LL_RTC_ALMB_DATEWEEKDAYSEL_DATE)
-  {
-    /* Set the date for ALARM */
-    LL_RTC_ALMB_DisableWeekday(RTCx);
-    if (RTC_Format != LL_RTC_FORMAT_BIN)
-    {
-      LL_RTC_ALMB_SetDay(RTCx, RTC_AlarmStruct->AlarmDateWeekDay);
-    }
-    else
-    {
-      LL_RTC_ALMB_SetDay(RTCx, __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmDateWeekDay));
-    }
-  }
-  else
-  {
-    /* Set the week day for ALARM */
-    LL_RTC_ALMB_EnableWeekday(RTCx);
-    LL_RTC_ALMB_SetWeekDay(RTCx, RTC_AlarmStruct->AlarmDateWeekDay);
-  }
-
-  /* Configure the Alarm register */
-  if (RTC_Format != LL_RTC_FORMAT_BIN)
-  {
-    LL_RTC_ALMB_ConfigTime(RTCx, RTC_AlarmStruct->AlarmTime.TimeFormat, RTC_AlarmStruct->AlarmTime.Hours,
-                           RTC_AlarmStruct->AlarmTime.Minutes, RTC_AlarmStruct->AlarmTime.Seconds);
-  }
-  else
-  {
-    LL_RTC_ALMB_ConfigTime(RTCx, RTC_AlarmStruct->AlarmTime.TimeFormat,
-                           __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmTime.Hours),
-                           __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmTime.Minutes),
-                           __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmTime.Seconds));
-  }
-  /* Set ALARM mask */
-  LL_RTC_ALMB_SetMask(RTCx, RTC_AlarmStruct->AlarmMask);
-
-  /* Enable the write protection for RTC registers */
-  LL_RTC_EnableWriteProtection(RTCx);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Set each @ref LL_RTC_AlarmTypeDef of ALARMA field to default value (Time = 00h:00mn:00sec /
-  *         Day = 1st day of the month/Mask = all fields are masked).
-  * @param  RTC_AlarmStruct pointer to a @ref LL_RTC_AlarmTypeDef structure which will be initialized.
-  * @retval None
-  */
-void LL_RTC_ALMA_StructInit(LL_RTC_AlarmTypeDef *RTC_AlarmStruct)
-{
-  /* Alarm Time Settings : Time = 00h:00mn:00sec */
-  RTC_AlarmStruct->AlarmTime.TimeFormat = LL_RTC_ALMA_TIME_FORMAT_AM;
-  RTC_AlarmStruct->AlarmTime.Hours      = 0U;
-  RTC_AlarmStruct->AlarmTime.Minutes    = 0U;
-  RTC_AlarmStruct->AlarmTime.Seconds    = 0U;
-
-  /* Alarm Day Settings : Day = 1st day of the month */
-  RTC_AlarmStruct->AlarmDateWeekDaySel = LL_RTC_ALMA_DATEWEEKDAYSEL_DATE;
-  RTC_AlarmStruct->AlarmDateWeekDay    = 1U;
-
-  /* Alarm Masks Settings : Mask =  all fields are not masked */
-  RTC_AlarmStruct->AlarmMask           = LL_RTC_ALMA_MASK_NONE;
-}
-
-/**
-  * @brief  Set each @ref LL_RTC_AlarmTypeDef of ALARMA field to default value (Time = 00h:00mn:00sec /
-  *         Day = 1st day of the month/Mask = all fields are masked).
-  * @param  RTC_AlarmStruct pointer to a @ref LL_RTC_AlarmTypeDef structure which will be initialized.
-  * @retval None
-  */
-void LL_RTC_ALMB_StructInit(LL_RTC_AlarmTypeDef *RTC_AlarmStruct)
-{
-  /* Alarm Time Settings : Time = 00h:00mn:00sec */
-  RTC_AlarmStruct->AlarmTime.TimeFormat = LL_RTC_ALMB_TIME_FORMAT_AM;
-  RTC_AlarmStruct->AlarmTime.Hours      = 0U;
-  RTC_AlarmStruct->AlarmTime.Minutes    = 0U;
-  RTC_AlarmStruct->AlarmTime.Seconds    = 0U;
-
-  /* Alarm Day Settings : Day = 1st day of the month */
-  RTC_AlarmStruct->AlarmDateWeekDaySel = LL_RTC_ALMB_DATEWEEKDAYSEL_DATE;
-  RTC_AlarmStruct->AlarmDateWeekDay    = 1U;
-
-  /* Alarm Masks Settings : Mask =  all fields are not masked */
-  RTC_AlarmStruct->AlarmMask           = LL_RTC_ALMB_MASK_NONE;
-}
-
-/**
-  * @brief  Enters the RTC Initialization mode.
-  * @note   The RTC Initialization mode is write protected, use the
-  *         @ref LL_RTC_DisableWriteProtection before calling this function.
-  * @param  RTCx RTC Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RTC is in Init mode
-  *          - ERROR: RTC is not in Init mode
-  */
-ErrorStatus LL_RTC_EnterInitMode(RTC_TypeDef *RTCx)
-{
-  __IO uint32_t timeout = RTC_INITMODE_TIMEOUT;
-  ErrorStatus status = SUCCESS;
-  uint32_t tmp = 0U;
-
-  /* Check the parameter */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-
-  /* Check if the Initialization mode is set */
-  if (LL_RTC_IsActiveFlag_INIT(RTCx) == 0U)
-  {
-    /* Set the Initialization mode */
-    LL_RTC_EnableInitMode(RTCx);
-
-    /* Wait till RTC is in INIT state and if Time out is reached exit */
-    tmp = LL_RTC_IsActiveFlag_INIT(RTCx);
-    while ((timeout != 0U) && (tmp != 1U))
-    {
-      if (LL_SYSTICK_IsActiveCounterFlag() == 1U)
-      {
-        timeout --;
-      }
-      tmp = LL_RTC_IsActiveFlag_INIT(RTCx);
-      if (timeout == 0U)
-      {
-        status = ERROR;
-      }
-    }
-  }
-  return status;
-}
-
-/**
-  * @brief  Exit the RTC Initialization mode.
-  * @note   When the initialization sequence is complete, the calendar restarts
-  *         counting after 4 RTCCLK cycles.
-  * @note   The RTC Initialization mode is write protected, use the
-  *         @ref LL_RTC_DisableWriteProtection before calling this function.
-  * @param  RTCx RTC Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RTC exited from in Init mode
-  *          - ERROR: Not applicable
-  */
-ErrorStatus LL_RTC_ExitInitMode(RTC_TypeDef *RTCx)
-{
-  /* Check the parameter */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-
-  /* Disable initialization mode */
-  LL_RTC_DisableInitMode(RTCx);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Waits until the RTC Time and Day registers (RTC_TR and RTC_DR) are
-  *         synchronized with RTC APB clock.
-  * @note   The RTC Resynchronization mode is write protected, use the
-  *         @ref LL_RTC_DisableWriteProtection before calling this function.
-  * @note   To read the calendar through the shadow registers after Calendar
-  *         initialization, calendar update or after wakeup from low power modes
-  *         the software must first clear the RSF flag.
-  *         The software must then wait until it is set again before reading
-  *         the calendar, which means that the calendar registers have been
-  *         correctly copied into the RTC_TR and RTC_DR shadow registers.
-  * @param  RTCx RTC Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RTC registers are synchronised
-  *          - ERROR: RTC registers are not synchronised
-  */
-ErrorStatus LL_RTC_WaitForSynchro(RTC_TypeDef *RTCx)
-{
-  __IO uint32_t timeout = RTC_SYNCHRO_TIMEOUT;
-  ErrorStatus status = SUCCESS;
-  uint32_t tmp = 0U;
-
-  /* Check the parameter */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-
-  /* Clear RSF flag */
-  LL_RTC_ClearFlag_RS(RTCx);
-
-  /* Wait the registers to be synchronised */
-  tmp = LL_RTC_IsActiveFlag_RS(RTCx);
-  while ((timeout != 0U) && (tmp != 0U))
-  {
-    if (LL_SYSTICK_IsActiveCounterFlag() == 1U)
-    {
-      timeout--;
-    }
-    tmp = LL_RTC_IsActiveFlag_RS(RTCx);
-    if (timeout == 0U)
-    {
-      status = ERROR;
-    }
-  }
-
-  if (status != ERROR)
-  {
-    timeout = RTC_SYNCHRO_TIMEOUT;
-    tmp = LL_RTC_IsActiveFlag_RS(RTCx);
-    while ((timeout != 0U) && (tmp != 1U))
-    {
-      if (LL_SYSTICK_IsActiveCounterFlag() == 1U)
-      {
-        timeout--;
-      }
-      tmp = LL_RTC_IsActiveFlag_RS(RTCx);
-      if (timeout == 0U)
-      {
-        status = ERROR;
-      }
-    }
-  }
-
-  return (status);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined(RTC) */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_spi.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_spi.c
deleted file mode 100755
index c1966904..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_spi.c
+++ /dev/null
@@ -1,532 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_spi.c
-  * @author  MCD Application Team
-  * @brief   SPI LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_spi.h"
-#include "stm32l0xx_ll_bus.h"
-#include "stm32l0xx_ll_rcc.h"
-
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (SPI1) || defined (SPI2)
-
-/** @addtogroup SPI_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup SPI_LL_Private_Constants SPI Private Constants
-  * @{
-  */
-/* SPI registers Masks */
-#define SPI_CR1_CLEAR_MASK                 (SPI_CR1_CPHA    | SPI_CR1_CPOL     | SPI_CR1_MSTR   | \
-                                            SPI_CR1_BR      | SPI_CR1_LSBFIRST | SPI_CR1_SSI    | \
-                                            SPI_CR1_SSM     | SPI_CR1_RXONLY   | SPI_CR1_DFF    | \
-                                            SPI_CR1_CRCNEXT | SPI_CR1_CRCEN    | SPI_CR1_BIDIOE | \
-                                            SPI_CR1_BIDIMODE)
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup SPI_LL_Private_Macros SPI Private Macros
-  * @{
-  */
-#define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX)    \
-                                              || ((__VALUE__) == LL_SPI_SIMPLEX_RX)     \
-                                              || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \
-                                              || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX))
-
-#define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \
-                                || ((__VALUE__) == LL_SPI_MODE_SLAVE))
-
-#define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_8BIT)  \
-                                     || ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT))
-
-#define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \
-                                    || ((__VALUE__) == LL_SPI_POLARITY_HIGH))
-
-#define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \
-                                 || ((__VALUE__) == LL_SPI_PHASE_2EDGE))
-
-#define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT) \
-                               || ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \
-                               || ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT))
-
-#define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2)   \
-                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4)   \
-                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8)   \
-                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16)  \
-                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32)  \
-                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64)  \
-                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \
-                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256))
-
-#define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \
-                                    || ((__VALUE__) == LL_SPI_MSB_FIRST))
-
-#define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \
-                                          || ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE))
-
-#define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U)
-
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup SPI_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup SPI_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize the SPI registers to their default reset values.
-  * @param  SPIx SPI Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: SPI registers are de-initialized
-  *          - ERROR: SPI registers are not de-initialized
-  */
-ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx)
-{
-  ErrorStatus status = ERROR;
-
-  /* Check the parameters */
-  assert_param(IS_SPI_ALL_INSTANCE(SPIx));
-
-#if defined(SPI1)
-  if (SPIx == SPI1)
-  {
-    /* Force reset of SPI clock */
-    LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI1);
-
-    /* Release reset of SPI clock */
-    LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI1);
-
-    status = SUCCESS;
-  }
-#endif /* SPI1 */
-#if defined(SPI2)
-  if (SPIx == SPI2)
-  {
-    /* Force reset of SPI clock */
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI2);
-
-    /* Release reset of SPI clock */
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI2);
-
-    status = SUCCESS;
-  }
-#endif /* SPI2 */
-
-  return status;
-}
-
-/**
-  * @brief  Initialize the SPI registers according to the specified parameters in SPI_InitStruct.
-  * @note   As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
-  *         SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
-  * @param  SPIx SPI Instance
-  * @param  SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
-  * @retval An ErrorStatus enumeration value. (Return always SUCCESS)
-  */
-ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct)
-{
-  ErrorStatus status = ERROR;
-
-  /* Check the SPI Instance SPIx*/
-  assert_param(IS_SPI_ALL_INSTANCE(SPIx));
-
-  /* Check the SPI parameters from SPI_InitStruct*/
-  assert_param(IS_LL_SPI_TRANSFER_DIRECTION(SPI_InitStruct->TransferDirection));
-  assert_param(IS_LL_SPI_MODE(SPI_InitStruct->Mode));
-  assert_param(IS_LL_SPI_DATAWIDTH(SPI_InitStruct->DataWidth));
-  assert_param(IS_LL_SPI_POLARITY(SPI_InitStruct->ClockPolarity));
-  assert_param(IS_LL_SPI_PHASE(SPI_InitStruct->ClockPhase));
-  assert_param(IS_LL_SPI_NSS(SPI_InitStruct->NSS));
-  assert_param(IS_LL_SPI_BAUDRATE(SPI_InitStruct->BaudRate));
-  assert_param(IS_LL_SPI_BITORDER(SPI_InitStruct->BitOrder));
-  assert_param(IS_LL_SPI_CRCCALCULATION(SPI_InitStruct->CRCCalculation));
-
-  if (LL_SPI_IsEnabled(SPIx) == 0x00000000U)
-  {
-    /*---------------------------- SPIx CR1 Configuration ------------------------
-     * Configure SPIx CR1 with parameters:
-     * - TransferDirection:  SPI_CR1_BIDIMODE, SPI_CR1_BIDIOE and SPI_CR1_RXONLY bits
-     * - Master/Slave Mode:  SPI_CR1_MSTR bit
-     * - DataWidth:          SPI_CR1_DFF bit
-     * - ClockPolarity:      SPI_CR1_CPOL bit
-     * - ClockPhase:         SPI_CR1_CPHA bit
-     * - NSS management:     SPI_CR1_SSM bit
-     * - BaudRate prescaler: SPI_CR1_BR[2:0] bits
-     * - BitOrder:           SPI_CR1_LSBFIRST bit
-     * - CRCCalculation:     SPI_CR1_CRCEN bit
-     */
-    MODIFY_REG(SPIx->CR1,
-               SPI_CR1_CLEAR_MASK,
-               SPI_InitStruct->TransferDirection | SPI_InitStruct->Mode | SPI_InitStruct->DataWidth |
-               SPI_InitStruct->ClockPolarity | SPI_InitStruct->ClockPhase |
-               SPI_InitStruct->NSS | SPI_InitStruct->BaudRate |
-               SPI_InitStruct->BitOrder | SPI_InitStruct->CRCCalculation);
-
-    /*---------------------------- SPIx CR2 Configuration ------------------------
-     * Configure SPIx CR2 with parameters:
-     * - NSS management:     SSOE bit
-     */
-    MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, (SPI_InitStruct->NSS >> 16U));
-
-    /*---------------------------- SPIx CRCPR Configuration ----------------------
-     * Configure SPIx CRCPR with parameters:
-     * - CRCPoly:            CRCPOLY[15:0] bits
-     */
-    if (SPI_InitStruct->CRCCalculation == LL_SPI_CRCCALCULATION_ENABLE)
-    {
-      assert_param(IS_LL_SPI_CRC_POLYNOMIAL(SPI_InitStruct->CRCPoly));
-      LL_SPI_SetCRCPolynomial(SPIx, SPI_InitStruct->CRCPoly);
-    }
-    status = SUCCESS;
-  }
-
-#if defined (SPI_I2S_SUPPORT)
-  /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
-  CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD);
-#endif /* SPI_I2S_SUPPORT */
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_SPI_InitTypeDef field to default value.
-  * @param  SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
-  * whose fields will be set to default values.
-  * @retval None
-  */
-void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct)
-{
-  /* Set SPI_InitStruct fields to default values */
-  SPI_InitStruct->TransferDirection = LL_SPI_FULL_DUPLEX;
-  SPI_InitStruct->Mode              = LL_SPI_MODE_SLAVE;
-  SPI_InitStruct->DataWidth         = LL_SPI_DATAWIDTH_8BIT;
-  SPI_InitStruct->ClockPolarity     = LL_SPI_POLARITY_LOW;
-  SPI_InitStruct->ClockPhase        = LL_SPI_PHASE_1EDGE;
-  SPI_InitStruct->NSS               = LL_SPI_NSS_HARD_INPUT;
-  SPI_InitStruct->BaudRate          = LL_SPI_BAUDRATEPRESCALER_DIV2;
-  SPI_InitStruct->BitOrder          = LL_SPI_MSB_FIRST;
-  SPI_InitStruct->CRCCalculation    = LL_SPI_CRCCALCULATION_DISABLE;
-  SPI_InitStruct->CRCPoly           = 7U;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#if defined(SPI_I2S_SUPPORT)
-/** @addtogroup I2S_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup I2S_LL_Private_Constants I2S Private Constants
-  * @{
-  */
-/* I2S registers Masks */
-#define I2S_I2SCFGR_CLEAR_MASK             (SPI_I2SCFGR_CHLEN   | SPI_I2SCFGR_DATLEN | \
-                                            SPI_I2SCFGR_CKPOL   | SPI_I2SCFGR_I2SSTD | \
-                                            SPI_I2SCFGR_I2SCFG  | SPI_I2SCFGR_I2SMOD )
-
-#define I2S_I2SPR_CLEAR_MASK               0x0002U
-/**
-  * @}
-  */
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup I2S_LL_Private_Macros I2S Private Macros
-  * @{
-  */
-
-#define IS_LL_I2S_DATAFORMAT(__VALUE__)  (((__VALUE__) == LL_I2S_DATAFORMAT_16B)          \
-                                       || ((__VALUE__) == LL_I2S_DATAFORMAT_16B_EXTENDED) \
-                                       || ((__VALUE__) == LL_I2S_DATAFORMAT_24B)          \
-                                       || ((__VALUE__) == LL_I2S_DATAFORMAT_32B))
-
-#define IS_LL_I2S_CPOL(__VALUE__)        (((__VALUE__) == LL_I2S_POLARITY_LOW)  \
-                                       || ((__VALUE__) == LL_I2S_POLARITY_HIGH))
-
-#define IS_LL_I2S_STANDARD(__VALUE__)    (((__VALUE__) == LL_I2S_STANDARD_PHILIPS)   \
-                                       || ((__VALUE__) == LL_I2S_STANDARD_MSB)       \
-                                       || ((__VALUE__) == LL_I2S_STANDARD_LSB)       \
-                                       || ((__VALUE__) == LL_I2S_STANDARD_PCM_SHORT) \
-                                       || ((__VALUE__) == LL_I2S_STANDARD_PCM_LONG))
-
-#define IS_LL_I2S_MODE(__VALUE__)        (((__VALUE__) == LL_I2S_MODE_SLAVE_TX)  \
-                                       || ((__VALUE__) == LL_I2S_MODE_SLAVE_RX)  \
-                                       || ((__VALUE__) == LL_I2S_MODE_MASTER_TX) \
-                                       || ((__VALUE__) == LL_I2S_MODE_MASTER_RX))
-
-#define IS_LL_I2S_MCLK_OUTPUT(__VALUE__) (((__VALUE__) == LL_I2S_MCLK_OUTPUT_ENABLE) \
-                                       || ((__VALUE__) == LL_I2S_MCLK_OUTPUT_DISABLE))
-
-#define IS_LL_I2S_AUDIO_FREQ(__VALUE__) ((((__VALUE__) >= LL_I2S_AUDIOFREQ_8K)    \
-                                       && ((__VALUE__) <= LL_I2S_AUDIOFREQ_192K)) \
-                                       || ((__VALUE__) == LL_I2S_AUDIOFREQ_DEFAULT))
-
-#define IS_LL_I2S_PRESCALER_LINEAR(__VALUE__)  ((__VALUE__) >= 0x2U)
-
-#define IS_LL_I2S_PRESCALER_PARITY(__VALUE__) (((__VALUE__) == LL_I2S_PRESCALER_PARITY_EVEN) \
-                                           || ((__VALUE__) == LL_I2S_PRESCALER_PARITY_ODD))
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup I2S_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup I2S_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize the SPI/I2S registers to their default reset values.
-  * @param  SPIx SPI Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: SPI registers are de-initialized
-  *          - ERROR: SPI registers are not de-initialized
-  */
-ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx)
-{
-  return LL_SPI_DeInit(SPIx);
-}
-
-/**
-  * @brief  Initializes the SPI/I2S registers according to the specified parameters in I2S_InitStruct.
-  * @note   As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
-  *         SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
-  * @param  SPIx SPI Instance
-  * @param  I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: SPI registers are Initialized
-  *          - ERROR: SPI registers are not Initialized
-  */
-ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct)
-{
-  uint16_t i2sdiv = 2U, i2sodd = 0U, packetlength = 1U;
-  uint32_t tmp = 0U;
-  LL_RCC_ClocksTypeDef rcc_clocks;
-  uint32_t sourceclock = 0U;
-  ErrorStatus status = ERROR;
-
-  /* Check the I2S parameters */
-  assert_param(IS_I2S_ALL_INSTANCE(SPIx));
-  assert_param(IS_LL_I2S_MODE(I2S_InitStruct->Mode));
-  assert_param(IS_LL_I2S_STANDARD(I2S_InitStruct->Standard));
-  assert_param(IS_LL_I2S_DATAFORMAT(I2S_InitStruct->DataFormat));
-  assert_param(IS_LL_I2S_MCLK_OUTPUT(I2S_InitStruct->MCLKOutput));
-  assert_param(IS_LL_I2S_AUDIO_FREQ(I2S_InitStruct->AudioFreq));
-  assert_param(IS_LL_I2S_CPOL(I2S_InitStruct->ClockPolarity));
-
-  if (LL_I2S_IsEnabled(SPIx) == 0x00000000U)
-  {
-    /*---------------------------- SPIx I2SCFGR Configuration --------------------
-     * Configure SPIx I2SCFGR with parameters:
-     * - Mode:          SPI_I2SCFGR_I2SCFG[1:0] bit
-     * - Standard:      SPI_I2SCFGR_I2SSTD[1:0] and SPI_I2SCFGR_PCMSYNC bits
-     * - DataFormat:    SPI_I2SCFGR_CHLEN and SPI_I2SCFGR_DATLEN bits
-     * - ClockPolarity: SPI_I2SCFGR_CKPOL bit
-     */
-
-    /* Write to SPIx I2SCFGR */
-    MODIFY_REG(SPIx->I2SCFGR,
-               I2S_I2SCFGR_CLEAR_MASK,
-               I2S_InitStruct->Mode | I2S_InitStruct->Standard |
-               I2S_InitStruct->DataFormat | I2S_InitStruct->ClockPolarity |
-               SPI_I2SCFGR_I2SMOD);
-
-    /*---------------------------- SPIx I2SPR Configuration ----------------------
-     * Configure SPIx I2SPR with parameters:
-     * - MCLKOutput:    SPI_I2SPR_MCKOE bit
-     * - AudioFreq:     SPI_I2SPR_I2SDIV[7:0] and SPI_I2SPR_ODD bits
-     */
-
-    /* If the requested audio frequency is not the default, compute the prescaler (i2sodd, i2sdiv)
-     * else, default values are used:  i2sodd = 0U, i2sdiv = 2U.
-     */
-    if (I2S_InitStruct->AudioFreq != LL_I2S_AUDIOFREQ_DEFAULT)
-    {
-      /* Check the frame length (For the Prescaler computing)
-       * Default value: LL_I2S_DATAFORMAT_16B (packetlength = 1U).
-       */
-      if (I2S_InitStruct->DataFormat != LL_I2S_DATAFORMAT_16B)
-      {
-        /* Packet length is 32 bits */
-        packetlength = 2U;
-      }
-
-      /* I2S Clock source is System clock: Get System Clock frequency */
-      LL_RCC_GetSystemClocksFreq(&rcc_clocks);
-
-      /* Get the source clock value: based on System Clock value */
-      sourceclock = rcc_clocks.SYSCLK_Frequency;
-
-      /* Compute the Real divider depending on the MCLK output state with a floating point */
-      if (I2S_InitStruct->MCLKOutput == LL_I2S_MCLK_OUTPUT_ENABLE)
-      {
-        /* MCLK output is enabled */
-        tmp = (uint16_t)(((((sourceclock / 256U) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
-      }
-      else
-      {
-        /* MCLK output is disabled */
-        tmp = (uint16_t)(((((sourceclock / (32U * packetlength)) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
-      }
-
-      /* Remove the floating point */
-      tmp = tmp / 10U;
-
-      /* Check the parity of the divider */
-      i2sodd = (uint16_t)(tmp & (uint16_t)0x0001U);
-
-      /* Compute the i2sdiv prescaler */
-      i2sdiv = (uint16_t)((tmp - i2sodd) / 2U);
-
-      /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
-      i2sodd = (uint16_t)(i2sodd << 8U);
-    }
-
-    /* Test if the divider is 1 or 0 or greater than 0xFF */
-    if ((i2sdiv < 2U) || (i2sdiv > 0xFFU))
-    {
-      /* Set the default values */
-      i2sdiv = 2U;
-      i2sodd = 0U;
-    }
-
-    /* Write to SPIx I2SPR register the computed value */
-    WRITE_REG(SPIx->I2SPR, i2sdiv | i2sodd | I2S_InitStruct->MCLKOutput);
-
-    status = SUCCESS;
-  }
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_I2S_InitTypeDef field to default value.
-  * @param  I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure
-  *         whose fields will be set to default values.
-  * @retval None
-  */
-void LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct)
-{
-  /*--------------- Reset I2S init structure parameters values -----------------*/
-  I2S_InitStruct->Mode              = LL_I2S_MODE_SLAVE_TX;
-  I2S_InitStruct->Standard          = LL_I2S_STANDARD_PHILIPS;
-  I2S_InitStruct->DataFormat        = LL_I2S_DATAFORMAT_16B;
-  I2S_InitStruct->MCLKOutput        = LL_I2S_MCLK_OUTPUT_DISABLE;
-  I2S_InitStruct->AudioFreq         = LL_I2S_AUDIOFREQ_DEFAULT;
-  I2S_InitStruct->ClockPolarity     = LL_I2S_POLARITY_LOW;
-}
-
-/**
-  * @brief  Set linear and parity prescaler.
-  * @note   To calculate value of PrescalerLinear(I2SDIV[7:0] bits) and PrescalerParity(ODD bit)\n
-  *         Check Audio frequency table and formulas inside Reference Manual (SPI/I2S).
-  * @param  SPIx SPI Instance
-  * @param  PrescalerLinear value: Min_Data=0x02 and Max_Data=0xFF.
-  * @param  PrescalerParity This parameter can be one of the following values:
-  *         @arg @ref LL_I2S_PRESCALER_PARITY_EVEN
-  *         @arg @ref LL_I2S_PRESCALER_PARITY_ODD
-  * @retval None
-  */
-void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity)
-{
-  /* Check the I2S parameters */
-  assert_param(IS_I2S_ALL_INSTANCE(SPIx));
-  assert_param(IS_LL_I2S_PRESCALER_LINEAR(PrescalerLinear));
-  assert_param(IS_LL_I2S_PRESCALER_PARITY(PrescalerParity));
-
-  /* Write to SPIx I2SPR */
-  MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_I2SDIV | SPI_I2SPR_ODD, PrescalerLinear | (PrescalerParity << 8U));
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* SPI_I2S_SUPPORT */
-
-#endif /* defined (SPI1) || defined (SPI2) */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c
deleted file mode 100755
index 00fd4208..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c
+++ /dev/null
@@ -1,864 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_tim.c
-  * @author  MCD Application Team
-  * @brief   TIM LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_tim.h"
-#include "stm32l0xx_ll_bus.h"
-
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (TIM2) || defined (TIM3) || defined (TIM21) || defined (TIM22) || defined (TIM6) || defined (TIM7)
-
-/** @addtogroup TIM_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup TIM_LL_Private_Macros
-  * @{
-  */
-#define IS_LL_TIM_COUNTERMODE(__VALUE__) (((__VALUE__) == LL_TIM_COUNTERMODE_UP) \
-                                       || ((__VALUE__) == LL_TIM_COUNTERMODE_DOWN) \
-                                       || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP) \
-                                       || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_DOWN) \
-                                       || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP_DOWN))
-
-#define IS_LL_TIM_CLOCKDIVISION(__VALUE__) (((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV1) \
-                                         || ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV2) \
-                                         || ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV4))
-
-#define IS_LL_TIM_OCMODE(__VALUE__) (((__VALUE__) == LL_TIM_OCMODE_FROZEN) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_ACTIVE) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_INACTIVE) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_TOGGLE) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_FORCED_INACTIVE) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_FORCED_ACTIVE) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_PWM1) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_PWM2))
-
-#define IS_LL_TIM_OCSTATE(__VALUE__) (((__VALUE__) == LL_TIM_OCSTATE_DISABLE) \
-                                   || ((__VALUE__) == LL_TIM_OCSTATE_ENABLE))
-
-#define IS_LL_TIM_OCPOLARITY(__VALUE__) (((__VALUE__) == LL_TIM_OCPOLARITY_HIGH) \
-                                      || ((__VALUE__) == LL_TIM_OCPOLARITY_LOW))
-
-#define IS_LL_TIM_ACTIVEINPUT(__VALUE__) (((__VALUE__) == LL_TIM_ACTIVEINPUT_DIRECTTI) \
-                                       || ((__VALUE__) == LL_TIM_ACTIVEINPUT_INDIRECTTI) \
-                                       || ((__VALUE__) == LL_TIM_ACTIVEINPUT_TRC))
-
-#define IS_LL_TIM_ICPSC(__VALUE__) (((__VALUE__) == LL_TIM_ICPSC_DIV1) \
-                                 || ((__VALUE__) == LL_TIM_ICPSC_DIV2) \
-                                 || ((__VALUE__) == LL_TIM_ICPSC_DIV4) \
-                                 || ((__VALUE__) == LL_TIM_ICPSC_DIV8))
-
-#define IS_LL_TIM_IC_FILTER(__VALUE__) (((__VALUE__) == LL_TIM_IC_FILTER_FDIV1) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N2) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N4) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N8) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N6) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N8) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N6) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N8) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N6) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N8) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N5) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N6) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N8) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N5) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N6) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N8))
-
-#define IS_LL_TIM_IC_POLARITY(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \
-                                       || ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING) \
-                                       || ((__VALUE__) == LL_TIM_IC_POLARITY_BOTHEDGE))
-
-#define IS_LL_TIM_ENCODERMODE(__VALUE__) (((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI1) \
-                                       || ((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI2) \
-                                       || ((__VALUE__) == LL_TIM_ENCODERMODE_X4_TI12))
-
-#define IS_LL_TIM_IC_POLARITY_ENCODER(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \
-                                               || ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING))
-/**
-  * @}
-  */
-
-
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup TIM_LL_Private_Functions TIM Private Functions
-  * @{
-  */
-static ErrorStatus OC1Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
-static ErrorStatus OC2Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
-static ErrorStatus OC3Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
-static ErrorStatus OC4Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
-static ErrorStatus IC1Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
-static ErrorStatus IC2Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
-static ErrorStatus IC3Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
-static ErrorStatus IC4Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup TIM_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup TIM_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  Set TIMx registers to their reset values.
-  * @param  TIMx Timer instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: invalid TIMx instance
-  */
-ErrorStatus LL_TIM_DeInit(TIM_TypeDef *TIMx)
-{
-  ErrorStatus result = SUCCESS;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(TIMx));
-
-  if (TIMx == TIM2)
-  {
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM2);
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM2);
-  }
-#if defined(TIM3)
-  else if (TIMx == TIM3)
-  {
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM3);
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM3);
-  }
-#endif /* TIM3 */
-#if defined(TIM6)
-  else if (TIMx == TIM6)
-  {
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM6);
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM6);
-  }
-#endif /* TIM6 */
-#if defined(TIM7)
-  else if (TIMx == TIM7)
-  {
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM7);
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM7);
-  }
-#endif /* TIM7 */
-  else if (TIMx == TIM21)
-  {
-    LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM21);
-    LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM21);
-  }
-#if defined(TIM22)
-  else if (TIMx == TIM22)
-  {
-    LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM22);
-    LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM22);
-  }
-#endif /* TIM22 */
-  else
-  {
-    result = ERROR;
-  }
-
-  return result;
-}
-
-/**
-  * @brief  Set the fields of the time base unit configuration data structure
-  *         to their default values.
-  * @param  TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (time base unit configuration data structure)
-  * @retval None
-  */
-void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct)
-{
-  /* Set the default configuration */
-  TIM_InitStruct->Prescaler         = (uint16_t)0x0000U;
-  TIM_InitStruct->CounterMode       = LL_TIM_COUNTERMODE_UP;
-  TIM_InitStruct->Autoreload        = (uint32_t)0xFFFFFFFFU;
-  TIM_InitStruct->ClockDivision     = LL_TIM_CLOCKDIVISION_DIV1;
-}
-
-/**
-  * @brief  Configure the TIMx time base unit.
-  * @param  TIMx Timer Instance
-  * @param  TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (TIMx time base unit configuration data structure)
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct)
-{
-  uint32_t tmpcr1 = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_COUNTERMODE(TIM_InitStruct->CounterMode));
-  assert_param(IS_LL_TIM_CLOCKDIVISION(TIM_InitStruct->ClockDivision));
-
-  tmpcr1 = LL_TIM_ReadReg(TIMx, CR1);
-
-  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
-  {
-    /* Select the Counter Mode */
-    MODIFY_REG(tmpcr1, (TIM_CR1_DIR | TIM_CR1_CMS), TIM_InitStruct->CounterMode);
-  }
-
-  if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
-  {
-    /* Set the clock division */
-    MODIFY_REG(tmpcr1, TIM_CR1_CKD, TIM_InitStruct->ClockDivision);
-  }
-
-  /* Write to TIMx CR1 */
-  LL_TIM_WriteReg(TIMx, CR1, tmpcr1);
-
-  /* Set the Autoreload value */
-  LL_TIM_SetAutoReload(TIMx, TIM_InitStruct->Autoreload);
-
-  /* Set the Prescaler value */
-  LL_TIM_SetPrescaler(TIMx, TIM_InitStruct->Prescaler);
-  /* Generate an update event to reload the Prescaler
-     and the repetition counter value (if applicable) immediately */
-  LL_TIM_GenerateEvent_UPDATE(TIMx);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Set the fields of the TIMx output channel configuration data
-  *         structure to their default values.
-  * @param  TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (the output channel configuration data structure)
-  * @retval None
-  */
-void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)
-{
-  /* Set the default configuration */
-  TIM_OC_InitStruct->OCMode       = LL_TIM_OCMODE_FROZEN;
-  TIM_OC_InitStruct->OCState      = LL_TIM_OCSTATE_DISABLE;
-  TIM_OC_InitStruct->CompareValue = (uint32_t)0x00000000U;
-  TIM_OC_InitStruct->OCPolarity   = LL_TIM_OCPOLARITY_HIGH;
-}
-
-/**
-  * @brief  Configure the TIMx output channel.
-  * @param  TIMx Timer Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @param  TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channel configuration data structure)
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx output channel is initialized
-  *          - ERROR: TIMx output channel is not initialized
-  */
-ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)
-{
-  ErrorStatus result = ERROR;
-
-  switch (Channel)
-  {
-    case LL_TIM_CHANNEL_CH1:
-      result = OC1Config(TIMx, TIM_OC_InitStruct);
-      break;
-    case LL_TIM_CHANNEL_CH2:
-      result = OC2Config(TIMx, TIM_OC_InitStruct);
-      break;
-    case LL_TIM_CHANNEL_CH3:
-      result = OC3Config(TIMx, TIM_OC_InitStruct);
-      break;
-    case LL_TIM_CHANNEL_CH4:
-      result = OC4Config(TIMx, TIM_OC_InitStruct);
-      break;
-    default:
-      break;
-  }
-
-  return result;
-}
-
-/**
-  * @brief  Set the fields of the TIMx input channel configuration data
-  *         structure to their default values.
-  * @param  TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel configuration data structure)
-  * @retval None
-  */
-void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
-{
-  /* Set the default configuration */
-  TIM_ICInitStruct->ICPolarity    = LL_TIM_IC_POLARITY_RISING;
-  TIM_ICInitStruct->ICActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
-  TIM_ICInitStruct->ICPrescaler   = LL_TIM_ICPSC_DIV1;
-  TIM_ICInitStruct->ICFilter      = LL_TIM_IC_FILTER_FDIV1;
-}
-
-/**
-  * @brief  Configure the TIMx input channel.
-  * @param  TIMx Timer Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @param  TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel configuration data structure)
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx output channel is initialized
-  *          - ERROR: TIMx output channel is not initialized
-  */
-ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef *TIM_IC_InitStruct)
-{
-  ErrorStatus result = ERROR;
-
-  switch (Channel)
-  {
-    case LL_TIM_CHANNEL_CH1:
-      result = IC1Config(TIMx, TIM_IC_InitStruct);
-      break;
-    case LL_TIM_CHANNEL_CH2:
-      result = IC2Config(TIMx, TIM_IC_InitStruct);
-      break;
-    case LL_TIM_CHANNEL_CH3:
-      result = IC3Config(TIMx, TIM_IC_InitStruct);
-      break;
-    case LL_TIM_CHANNEL_CH4:
-      result = IC4Config(TIMx, TIM_IC_InitStruct);
-      break;
-    default:
-      break;
-  }
-
-  return result;
-}
-
-/**
-  * @brief  Fills each TIM_EncoderInitStruct field with its default value
-  * @param  TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder interface configuration data structure)
-  * @retval None
-  */
-void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct)
-{
-  /* Set the default configuration */
-  TIM_EncoderInitStruct->EncoderMode    = LL_TIM_ENCODERMODE_X2_TI1;
-  TIM_EncoderInitStruct->IC1Polarity    = LL_TIM_IC_POLARITY_RISING;
-  TIM_EncoderInitStruct->IC1ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
-  TIM_EncoderInitStruct->IC1Prescaler   = LL_TIM_ICPSC_DIV1;
-  TIM_EncoderInitStruct->IC1Filter      = LL_TIM_IC_FILTER_FDIV1;
-  TIM_EncoderInitStruct->IC2Polarity    = LL_TIM_IC_POLARITY_RISING;
-  TIM_EncoderInitStruct->IC2ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
-  TIM_EncoderInitStruct->IC2Prescaler   = LL_TIM_ICPSC_DIV1;
-  TIM_EncoderInitStruct->IC2Filter      = LL_TIM_IC_FILTER_FDIV1;
-}
-
-/**
-  * @brief  Configure the encoder interface of the timer instance.
-  * @param  TIMx Timer Instance
-  * @param  TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx encoder interface configuration data structure)
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct)
-{
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_ENCODERMODE(TIM_EncoderInitStruct->EncoderMode));
-  assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC1Polarity));
-  assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_EncoderInitStruct->IC1ActiveInput));
-  assert_param(IS_LL_TIM_ICPSC(TIM_EncoderInitStruct->IC1Prescaler));
-  assert_param(IS_LL_TIM_IC_FILTER(TIM_EncoderInitStruct->IC1Filter));
-  assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC2Polarity));
-  assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_EncoderInitStruct->IC2ActiveInput));
-  assert_param(IS_LL_TIM_ICPSC(TIM_EncoderInitStruct->IC2Prescaler));
-  assert_param(IS_LL_TIM_IC_FILTER(TIM_EncoderInitStruct->IC2Filter));
-
-  /* Disable the CC1 and CC2: Reset the CC1E and CC2E Bits */
-  TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E | TIM_CCER_CC2E);
-
-  /* Get the TIMx CCMR1 register value */
-  tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
-
-  /* Get the TIMx CCER register value */
-  tmpccer = LL_TIM_ReadReg(TIMx, CCER);
-
-  /* Configure TI1 */
-  tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F  | TIM_CCMR1_IC1PSC);
-  tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1ActiveInput >> 16U);
-  tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U);
-  tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Prescaler >> 16U);
-
-  /* Configure TI2 */
-  tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC2S | TIM_CCMR1_IC2F  | TIM_CCMR1_IC2PSC);
-  tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2ActiveInput >> 8U);
-  tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Filter >> 8U);
-  tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Prescaler >> 8U);
-
-  /* Set TI1 and TI2 polarity and enable TI1 and TI2 */
-  tmpccer &= (uint32_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP | TIM_CCER_CC2P | TIM_CCER_CC2NP);
-  tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC1Polarity);
-  tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC2Polarity << 4U);
-  tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E);
-
-  /* Set encoder mode */
-  LL_TIM_SetEncoderMode(TIMx, TIM_EncoderInitStruct->EncoderMode);
-
-  /* Write to TIMx CCMR1 */
-  LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
-
-  /* Write to TIMx CCER */
-  LL_TIM_WriteReg(TIMx, CCER, tmpccer);
-
-  return SUCCESS;
-}
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup TIM_LL_Private_Functions TIM Private Functions
- *  @brief   Private functions
-  * @{
-  */
-/**
-  * @brief  Configure the TIMx output channel 1.
-  * @param  TIMx Timer Instance
-  * @param  TIM_OCInitStruct pointer to the the TIMx output channel 1 configuration data structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-static ErrorStatus OC1Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
-{
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpcr2 = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CC1_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
-  assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
-  assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
-
-  /* Disable the Channel 1: Reset the CC1E Bit */
-  CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E);
-
-  /* Get the TIMx CCER register value */
-  tmpccer = LL_TIM_ReadReg(TIMx, CCER);
-
-  /* Get the TIMx CR2 register value */
-  tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
-
-  /* Get the TIMx CCMR1 register value */
-  tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
-
-  /* Reset Capture/Compare selection Bits */
-  CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC1S);
-
-  /* Set the Output Compare Mode */
-  MODIFY_REG(tmpccmr1, TIM_CCMR1_OC1M, TIM_OCInitStruct->OCMode);
-
-  /* Set the Output Compare Polarity */
-  MODIFY_REG(tmpccer, TIM_CCER_CC1P, TIM_OCInitStruct->OCPolarity);
-
-  /* Set the Output State */
-  MODIFY_REG(tmpccer, TIM_CCER_CC1E, TIM_OCInitStruct->OCState);
-
-  /* Write to TIMx CR2 */
-  LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
-
-  /* Write to TIMx CCMR1 */
-  LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
-
-  /* Set the Capture Compare Register value */
-  LL_TIM_OC_SetCompareCH1(TIMx, TIM_OCInitStruct->CompareValue);
-
-  /* Write to TIMx CCER */
-  LL_TIM_WriteReg(TIMx, CCER, tmpccer);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Configure the TIMx output channel 2.
-  * @param  TIMx Timer Instance
-  * @param  TIM_OCInitStruct pointer to the the TIMx output channel 2 configuration data structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-static ErrorStatus OC2Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
-{
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpcr2 = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CC2_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
-  assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
-  assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
-
-  /* Disable the Channel 2: Reset the CC2E Bit */
-  CLEAR_BIT(TIMx->CCER, TIM_CCER_CC2E);
-
-  /* Get the TIMx CCER register value */
-  tmpccer =  LL_TIM_ReadReg(TIMx, CCER);
-
-  /* Get the TIMx CR2 register value */
-  tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
-
-  /* Get the TIMx CCMR1 register value */
-  tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
-
-  /* Reset Capture/Compare selection Bits */
-  CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC2S);
-
-  /* Select the Output Compare Mode */
-  MODIFY_REG(tmpccmr1, TIM_CCMR1_OC2M, TIM_OCInitStruct->OCMode << 8U);
-
-  /* Set the Output Compare Polarity */
-  MODIFY_REG(tmpccer, TIM_CCER_CC2P, TIM_OCInitStruct->OCPolarity << 4U);
-
-  /* Set the Output State */
-  MODIFY_REG(tmpccer, TIM_CCER_CC2E, TIM_OCInitStruct->OCState << 4U);
-
-  /* Write to TIMx CR2 */
-  LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
-
-  /* Write to TIMx CCMR1 */
-  LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
-
-  /* Set the Capture Compare Register value */
-  LL_TIM_OC_SetCompareCH2(TIMx, TIM_OCInitStruct->CompareValue);
-
-  /* Write to TIMx CCER */
-  LL_TIM_WriteReg(TIMx, CCER, tmpccer);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Configure the TIMx output channel 3.
-  * @param  TIMx Timer Instance
-  * @param  TIM_OCInitStruct pointer to the the TIMx output channel 3 configuration data structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-static ErrorStatus OC3Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
-{
-  uint32_t tmpccmr2 = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpcr2 = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CC3_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
-  assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
-  assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
-
-  /* Disable the Channel 3: Reset the CC3E Bit */
-  CLEAR_BIT(TIMx->CCER, TIM_CCER_CC3E);
-
-  /* Get the TIMx CCER register value */
-  tmpccer =  LL_TIM_ReadReg(TIMx, CCER);
-
-  /* Get the TIMx CR2 register value */
-  tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
-
-  /* Get the TIMx CCMR2 register value */
-  tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2);
-
-  /* Reset Capture/Compare selection Bits */
-  CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC3S);
-
-  /* Select the Output Compare Mode */
-  MODIFY_REG(tmpccmr2, TIM_CCMR2_OC3M, TIM_OCInitStruct->OCMode);
-
-  /* Set the Output Compare Polarity */
-  MODIFY_REG(tmpccer, TIM_CCER_CC3P, TIM_OCInitStruct->OCPolarity << 8U);
-
-  /* Set the Output State */
-  MODIFY_REG(tmpccer, TIM_CCER_CC3E, TIM_OCInitStruct->OCState << 8U);
-
-  /* Write to TIMx CR2 */
-  LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
-
-  /* Write to TIMx CCMR2 */
-  LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2);
-
-  /* Set the Capture Compare Register value */
-  LL_TIM_OC_SetCompareCH3(TIMx, TIM_OCInitStruct->CompareValue);
-
-  /* Write to TIMx CCER */
-  LL_TIM_WriteReg(TIMx, CCER, tmpccer);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Configure the TIMx output channel 4.
-  * @param  TIMx Timer Instance
-  * @param  TIM_OCInitStruct pointer to the the TIMx output channel 4 configuration data structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-static ErrorStatus OC4Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
-{
-  uint32_t tmpccmr2 = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpcr2 = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CC4_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
-  assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
-  assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
-
-  /* Disable the Channel 4: Reset the CC4E Bit */
-  CLEAR_BIT(TIMx->CCER, TIM_CCER_CC4E);
-
-  /* Get the TIMx CCER register value */
-  tmpccer = LL_TIM_ReadReg(TIMx, CCER);
-
-  /* Get the TIMx CR2 register value */
-  tmpcr2 =  LL_TIM_ReadReg(TIMx, CR2);
-
-  /* Get the TIMx CCMR2 register value */
-  tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2);
-
-  /* Reset Capture/Compare selection Bits */
-  CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC4S);
-
-  /* Select the Output Compare Mode */
-  MODIFY_REG(tmpccmr2, TIM_CCMR2_OC4M, TIM_OCInitStruct->OCMode << 8U);
-
-  /* Set the Output Compare Polarity */
-  MODIFY_REG(tmpccer, TIM_CCER_CC4P, TIM_OCInitStruct->OCPolarity << 12U);
-
-  /* Set the Output State */
-  MODIFY_REG(tmpccer, TIM_CCER_CC4E, TIM_OCInitStruct->OCState << 12U);
-
-  /* Write to TIMx CR2 */
-  LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
-
-  /* Write to TIMx CCMR2 */
-  LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2);
-
-  /* Set the Capture Compare Register value */
-  LL_TIM_OC_SetCompareCH4(TIMx, TIM_OCInitStruct->CompareValue);
-
-  /* Write to TIMx CCER */
-  LL_TIM_WriteReg(TIMx, CCER, tmpccer);
-
-  return SUCCESS;
-}
-
-
-/**
-  * @brief  Configure the TIMx input channel 1.
-  * @param  TIMx Timer Instance
-  * @param  TIM_ICInitStruct pointer to the the TIMx input channel 1 configuration data structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-static ErrorStatus IC1Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC1_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
-  assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
-  assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
-  assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
-
-  /* Disable the Channel 1: Reset the CC1E Bit */
-  TIMx->CCER &= (uint32_t)~TIM_CCER_CC1E;
-
-  /* Select the Input and set the filter and the prescaler value */
-  MODIFY_REG(TIMx->CCMR1,
-             (TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC),
-             (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPrescaler) >> 16U);
-
-  /* Select the Polarity and set the CC1E Bit */
-  MODIFY_REG(TIMx->CCER,
-             (TIM_CCER_CC1P | TIM_CCER_CC1NP),
-             (TIM_ICInitStruct->ICPolarity | TIM_CCER_CC1E));
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Configure the TIMx input channel 2.
-  * @param  TIMx Timer Instance
-  * @param  TIM_ICInitStruct pointer to the the TIMx input channel 2 configuration data structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-static ErrorStatus IC2Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC2_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
-  assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
-  assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
-  assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
-
-  /* Disable the Channel 2: Reset the CC2E Bit */
-  TIMx->CCER &= (uint32_t)~TIM_CCER_CC2E;
-
-  /* Select the Input and set the filter and the prescaler value */
-  MODIFY_REG(TIMx->CCMR1,
-             (TIM_CCMR1_CC2S | TIM_CCMR1_IC2F | TIM_CCMR1_IC2PSC),
-             (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPrescaler) >> 8U);
-
-  /* Select the Polarity and set the CC2E Bit */
-  MODIFY_REG(TIMx->CCER,
-             (TIM_CCER_CC2P | TIM_CCER_CC2NP),
-             ((TIM_ICInitStruct->ICPolarity << 4U) | TIM_CCER_CC2E));
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Configure the TIMx input channel 3.
-  * @param  TIMx Timer Instance
-  * @param  TIM_ICInitStruct pointer to the the TIMx input channel 3 configuration data structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-static ErrorStatus IC3Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC3_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
-  assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
-  assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
-  assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
-
-  /* Disable the Channel 3: Reset the CC3E Bit */
-  TIMx->CCER &= (uint32_t)~TIM_CCER_CC3E;
-
-  /* Select the Input and set the filter and the prescaler value */
-  MODIFY_REG(TIMx->CCMR2,
-             (TIM_CCMR2_CC3S | TIM_CCMR2_IC3F | TIM_CCMR2_IC3PSC),
-             (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPrescaler) >> 16U);
-
-  /* Select the Polarity and set the CC3E Bit */
-  MODIFY_REG(TIMx->CCER,
-             (TIM_CCER_CC3P | TIM_CCER_CC3NP),
-             ((TIM_ICInitStruct->ICPolarity << 8U) | TIM_CCER_CC3E));
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Configure the TIMx input channel 4.
-  * @param  TIMx Timer Instance
-  * @param  TIM_ICInitStruct pointer to the the TIMx input channel 4 configuration data structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-static ErrorStatus IC4Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC4_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
-  assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
-  assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
-  assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
-
-  /* Disable the Channel 4: Reset the CC4E Bit */
-  TIMx->CCER &= (uint32_t)~TIM_CCER_CC4E;
-
-  /* Select the Input and set the filter and the prescaler value */
-  MODIFY_REG(TIMx->CCMR2,
-             (TIM_CCMR2_CC4S | TIM_CCMR2_IC4F | TIM_CCMR2_IC4PSC),
-             (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPrescaler) >> 8U);
-
-  /* Select the Polarity and set the CC2E Bit */
-  MODIFY_REG(TIMx->CCER,
-             (TIM_CCER_CC4P | TIM_CCER_CC4NP),
-             ((TIM_ICInitStruct->ICPolarity << 12U) | TIM_CCER_CC4E));
-
-  return SUCCESS;
-}
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* TIM1 || TIM3 || TIM21 || TIM22 || TIM6 || TIM7 */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c
deleted file mode 100755
index e442a67f..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c
+++ /dev/null
@@ -1,433 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_usart.c
-  * @author  MCD Application Team
-  * @brief   USART LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_usart.h"
-#include "stm32l0xx_ll_rcc.h"
-#include "stm32l0xx_ll_bus.h"
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-#if defined (USART1) || defined (USART2) || defined (USART4) || defined (USART5)
-
-/** @addtogroup USART_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @addtogroup USART_LL_Private_Constants
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup USART_LL_Private_Macros
-  * @{
-  */
-
-/* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
- *              divided by the smallest oversampling used on the USART (i.e. 8)    */
-#define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 4000000U)
-
-#define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
-                                       || ((__VALUE__) == LL_USART_DIRECTION_RX) \
-                                       || ((__VALUE__) == LL_USART_DIRECTION_TX) \
-                                       || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
-
-#define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
-                                    || ((__VALUE__) == LL_USART_PARITY_EVEN) \
-                                    || ((__VALUE__) == LL_USART_PARITY_ODD))
-
-#define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
-                                       || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
-                                       || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
-
-#define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
-                                          || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
-
-#define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
-                                              || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
-
-#define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
-                                        || ((__VALUE__) == LL_USART_PHASE_2EDGE))
-
-#define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
-                                           || ((__VALUE__) == LL_USART_POLARITY_HIGH))
-
-#define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
-                                         || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
-
-#define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
-                                      || ((__VALUE__) == LL_USART_STOPBITS_1) \
-                                      || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
-                                      || ((__VALUE__) == LL_USART_STOPBITS_2))
-
-#define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
-                                       || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
-                                       || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
-                                       || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
-
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup USART_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup USART_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize USART registers (Registers restored to their default values).
-  * @param  USARTx USART Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: USART registers are de-initialized
-  *          - ERROR: USART registers are not de-initialized
-  */
-ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
-{
-  ErrorStatus status = SUCCESS;
-
-  /* Check the parameters */
-  assert_param(IS_UART_INSTANCE(USARTx));
-
-#if defined(USART1)
-  if (USARTx == USART1)
-  {
-    /* Force reset of USART clock */
-    LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
-
-    /* Release reset of USART clock */
-    LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
-  }
-#endif /* USART1 */
-#if defined(USART1)
-  else if (USARTx == USART2)
-#else
-  if (USARTx == USART2)
-#endif
-  {
-    /* Force reset of USART clock */
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
-
-    /* Release reset of USART clock */
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
-  }
-#if defined(USART4)
-  else if (USARTx == USART4)
-  {
-    /* Force reset of USART clock */
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART4);
-
-    /* Release reset of USART clock */
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART4);
-  }
-#endif /* USART4 */
-#if defined(USART5)
-  else if (USARTx == USART5)
-  {
-    /* Force reset of USART clock */
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART5);
-
-    /* Release reset of USART clock */
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART5);
-  }
-#endif /* USART5 */
-  else
-  {
-    status = ERROR;
-  }
-
-  return (status);
-}
-
-/**
-  * @brief  Initialize USART registers according to the specified
-  *         parameters in USART_InitStruct.
-  * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
-  *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
-  * @note   Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
-  * @param  USARTx USART Instance
-  * @param  USART_InitStruct: pointer to a LL_USART_InitTypeDef structure
-  *         that contains the configuration information for the specified USART peripheral.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: USART registers are initialized according to USART_InitStruct content
-  *          - ERROR: Problem occurred during USART Registers initialization
-  */
-ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
-{
-  ErrorStatus status = ERROR;
-  uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
-#if (defined(USART4) || defined(USART5))
-  LL_RCC_ClocksTypeDef RCC_Clocks;
-#endif
-
-  /* Check the parameters */
-  assert_param(IS_UART_INSTANCE(USARTx));
-  assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
-  assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
-  assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
-  assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
-  assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
-  assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
-  assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
-
-  /* USART needs to be in disabled state, in order to be able to configure some bits in
-     CRx registers */
-  if (LL_USART_IsEnabled(USARTx) == 0U)
-  {
-    /*---------------------------- USART CR1 Configuration -----------------------
-     * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
-     * - DataWidth:          USART_CR1_M bits according to USART_InitStruct->DataWidth value
-     * - Parity:             USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
-     * - TransferDirection:  USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
-     * - Oversampling:       USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
-     */
-    MODIFY_REG(USARTx->CR1,
-               (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
-                USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
-               (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
-                USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
-
-    /*---------------------------- USART CR2 Configuration -----------------------
-     * Configure USARTx CR2 (Stop bits) with parameters:
-     * - Stop Bits:          USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
-     * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
-     */
-    LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
-
-    /*---------------------------- USART CR3 Configuration -----------------------
-     * Configure USARTx CR3 (Hardware Flow Control) with parameters:
-     * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
-     */
-    LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
-
-    /*---------------------------- USART BRR Configuration -----------------------
-     * Retrieve Clock frequency used for USART Peripheral
-     */
-#if defined(USART1)
-    if (USARTx == USART1)
-    {
-      periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
-    }
-#endif /* USART1 */
-#if defined(USART1)
-    else if (USARTx == USART2)
-#else
-    if (USARTx == USART2)
-#endif
-    {
-      periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
-    }
-#if defined(USART4)
-    else if (USARTx == USART4)
-    {
-      /* USART4 clock is PCLK1 */
-      LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
-      periphclk = RCC_Clocks.PCLK1_Frequency;
-    }
-#endif /* USART4 */
-#if defined(USART5)
-    else if (USARTx == USART5)
-    {
-      /* USART5 clock is PCLK1 */
-      LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
-      periphclk = RCC_Clocks.PCLK1_Frequency;
-    }
-#endif /* USART5 */
-    else
-    {
-      /* Nothing to do, as error code is already assigned to ERROR value */
-    }
-
-    /* Configure the USART Baud Rate :
-       - valid baud rate value (different from 0) is required
-       - Peripheral clock as returned by RCC service, should be valid (different from 0).
-    */
-    if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
-        && (USART_InitStruct->BaudRate != 0U))
-    {
-      status = SUCCESS;
-      LL_USART_SetBaudRate(USARTx,
-                           periphclk,
-                           USART_InitStruct->OverSampling,
-                           USART_InitStruct->BaudRate);
-    }
-  }
-  /* Endif (=> USART not in Disabled state => return ERROR) */
-
-  return (status);
-}
-
-/**
-  * @brief Set each @ref LL_USART_InitTypeDef field to default value.
-  * @param USART_InitStruct: pointer to a @ref LL_USART_InitTypeDef structure
-  *                          whose fields will be set to default values.
-  * @retval None
-  */
-
-void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
-{
-  /* Set USART_InitStruct fields to default values */
-  USART_InitStruct->BaudRate            = 9600U;
-  USART_InitStruct->DataWidth           = LL_USART_DATAWIDTH_8B;
-  USART_InitStruct->StopBits            = LL_USART_STOPBITS_1;
-  USART_InitStruct->Parity              = LL_USART_PARITY_NONE ;
-  USART_InitStruct->TransferDirection   = LL_USART_DIRECTION_TX_RX;
-  USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
-  USART_InitStruct->OverSampling        = LL_USART_OVERSAMPLING_16;
-}
-
-/**
-  * @brief  Initialize USART Clock related settings according to the
-  *         specified parameters in the USART_ClockInitStruct.
-  * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
-  *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
-  * @param  USARTx USART Instance
-  * @param  USART_ClockInitStruct: pointer to a @ref LL_USART_ClockInitTypeDef structure
-  *         that contains the Clock configuration information for the specified USART peripheral.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
-  *          - ERROR: Problem occurred during USART Registers initialization
-  */
-ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
-{
-  ErrorStatus status = SUCCESS;
-
-  /* Check USART Instance and Clock signal output parameters */
-  assert_param(IS_UART_INSTANCE(USARTx));
-  assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
-
-  /* USART needs to be in disabled state, in order to be able to configure some bits in
-     CRx registers */
-  if (LL_USART_IsEnabled(USARTx) == 0U)
-  {
-    /*---------------------------- USART CR2 Configuration -----------------------*/
-    /* If Clock signal has to be output */
-    if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
-    {
-      /* Deactivate Clock signal delivery :
-       * - Disable Clock Output:        USART_CR2_CLKEN cleared
-       */
-      LL_USART_DisableSCLKOutput(USARTx);
-    }
-    else
-    {
-      /* Ensure USART instance is USART capable */
-      assert_param(IS_USART_INSTANCE(USARTx));
-
-      /* Check clock related parameters */
-      assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
-      assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
-      assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
-
-      /*---------------------------- USART CR2 Configuration -----------------------
-       * Configure USARTx CR2 (Clock signal related bits) with parameters:
-       * - Enable Clock Output:         USART_CR2_CLKEN set
-       * - Clock Polarity:              USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
-       * - Clock Phase:                 USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
-       * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
-       */
-      MODIFY_REG(USARTx->CR2,
-                 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
-                 USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
-                 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
-    }
-  }
-  /* Else (USART not in Disabled state => return ERROR */
-  else
-  {
-    status = ERROR;
-  }
-
-  return (status);
-}
-
-/**
-  * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
-  * @param USART_ClockInitStruct: pointer to a @ref LL_USART_ClockInitTypeDef structure
-  *                               whose fields will be set to default values.
-  * @retval None
-  */
-void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
-{
-  /* Set LL_USART_ClockInitStruct fields with default values */
-  USART_ClockInitStruct->ClockOutput       = LL_USART_CLOCK_DISABLE;
-  USART_ClockInitStruct->ClockPolarity     = LL_USART_POLARITY_LOW;            /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
-  USART_ClockInitStruct->ClockPhase        = LL_USART_PHASE_1EDGE;             /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
-  USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT;  /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* USART1 || USART2 || USART4 || USART5 */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c b/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c
deleted file mode 100755
index 66521381..00000000
--- a/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c
+++ /dev/null
@@ -1,580 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_ll_utils.c
-  * @author  MCD Application Team
-  * @brief   UTILS LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_ll_rcc.h"
-#include "stm32l0xx_ll_utils.h"
-#include "stm32l0xx_ll_system.h"
-#include "stm32l0xx_ll_pwr.h"
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32L0xx_LL_Driver
-  * @{
-  */
-
-/** @addtogroup UTILS_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @addtogroup UTILS_LL_Private_Constants
-  * @{
-  */
-#define UTILS_MAX_FREQUENCY_SCALE1  ((uint32_t)32000000U)        /*!< Maximum frequency for system clock at power scale1, in Hz */
-#define UTILS_MAX_FREQUENCY_SCALE2  ((uint32_t)16000000U)        /*!< Maximum frequency for system clock at power scale2, in Hz */
-#define UTILS_MAX_FREQUENCY_SCALE3  ((uint32_t)4000000U)         /*!< Maximum frequency for system clock at power scale3, in Hz */
-
-/* Defines used for PLL range */
-#define UTILS_PLLVCO_OUTPUT_SCALE1  ((uint32_t)96000000U)        /*!< Frequency max for PLLVCO output at power scale1, in Hz  */
-#define UTILS_PLLVCO_OUTPUT_SCALE2  ((uint32_t)48000000U)        /*!< Frequency max for PLLVCO output at power scale2, in Hz  */
-#define UTILS_PLLVCO_OUTPUT_SCALE3  ((uint32_t)24000000U)        /*!< Frequency max for PLLVCO output at power scale3, in Hz  */
-
-/* Defines used for HSE range */
-#define UTILS_HSE_FREQUENCY_MIN     ((uint32_t)1000000U)         /*!< Frequency min for HSE frequency, in Hz   */
-#define UTILS_HSE_FREQUENCY_MAX     ((uint32_t)24000000U)        /*!< Frequency max for HSE frequency, in Hz   */
-
-/* Defines used for FLASH latency according to HCLK Frequency */
-#define UTILS_SCALE1_LATENCY1_FREQ  ((uint32_t)16000000U)        /*!< HCLK frequency to set FLASH latency 1 in power scale 1 */
-#define UTILS_SCALE2_LATENCY1_FREQ  ((uint32_t)8000000U)         /*!< HCLK frequency to set FLASH latency 1 in power scale 2 */
-#define UTILS_SCALE3_LATENCY1_FREQ  ((uint32_t)2000000U)         /*!< HCLK frequency to set FLASH latency 1 in power scale 3 */
-/**
-  * @}
-  */
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup UTILS_LL_Private_Macros
-  * @{
-  */
-#define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1)   \
-                                        || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2)   \
-                                        || ((__VALUE__) == LL_RCC_SYSCLK_DIV_4)   \
-                                        || ((__VALUE__) == LL_RCC_SYSCLK_DIV_8)   \
-                                        || ((__VALUE__) == LL_RCC_SYSCLK_DIV_16)  \
-                                        || ((__VALUE__) == LL_RCC_SYSCLK_DIV_64)  \
-                                        || ((__VALUE__) == LL_RCC_SYSCLK_DIV_128) \
-                                        || ((__VALUE__) == LL_RCC_SYSCLK_DIV_256) \
-                                        || ((__VALUE__) == LL_RCC_SYSCLK_DIV_512))
-
-#define IS_LL_UTILS_APB1_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB1_DIV_1) \
-                                      || ((__VALUE__) == LL_RCC_APB1_DIV_2) \
-                                      || ((__VALUE__) == LL_RCC_APB1_DIV_4) \
-                                      || ((__VALUE__) == LL_RCC_APB1_DIV_8) \
-                                      || ((__VALUE__) == LL_RCC_APB1_DIV_16))
-
-#define IS_LL_UTILS_APB2_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB2_DIV_1) \
-                                      || ((__VALUE__) == LL_RCC_APB2_DIV_2) \
-                                      || ((__VALUE__) == LL_RCC_APB2_DIV_4) \
-                                      || ((__VALUE__) == LL_RCC_APB2_DIV_8) \
-                                      || ((__VALUE__) == LL_RCC_APB2_DIV_16))
-
-#define IS_LL_UTILS_PLLMUL_VALUE(__VALUE__) (((__VALUE__) == LL_RCC_PLL_MUL_3) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_4) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_6) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_8) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_12) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_16) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_24) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_32) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_48))
-
-#define IS_LL_UTILS_PLLDIV_VALUE(__VALUE__) (((__VALUE__) == LL_RCC_PLL_DIV_2) || ((__VALUE__) == LL_RCC_PLL_DIV_3) || \
-                                             ((__VALUE__) == LL_RCC_PLL_DIV_4))
-
-#define IS_LL_UTILS_PLLVCO_OUTPUT(__VALUE__) ((LL_PWR_GetRegulVoltageScaling() == LL_PWR_REGU_VOLTAGE_SCALE1) ? ((__VALUE__) <= UTILS_PLLVCO_OUTPUT_SCALE1) : \
-                                             ((LL_PWR_GetRegulVoltageScaling() == LL_PWR_REGU_VOLTAGE_SCALE2) ? ((__VALUE__) <= UTILS_PLLVCO_OUTPUT_SCALE2) : \
-                                             ((__VALUE__) <= UTILS_PLLVCO_OUTPUT_SCALE3)))
-
-#define IS_LL_UTILS_PLL_FREQUENCY(__VALUE__) ((LL_PWR_GetRegulVoltageScaling() == LL_PWR_REGU_VOLTAGE_SCALE1) ? ((__VALUE__) <= UTILS_MAX_FREQUENCY_SCALE1) : \
-                                             ((LL_PWR_GetRegulVoltageScaling() == LL_PWR_REGU_VOLTAGE_SCALE2) ? ((__VALUE__) <= UTILS_MAX_FREQUENCY_SCALE2) : \
-                                             ((__VALUE__) <= UTILS_MAX_FREQUENCY_SCALE3)))
-
-#define IS_LL_UTILS_HSE_BYPASS(__STATE__) (((__STATE__) == LL_UTILS_HSEBYPASS_ON) \
-                                        || ((__STATE__) == LL_UTILS_HSEBYPASS_OFF))
-
-#define IS_LL_UTILS_HSE_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) >= UTILS_HSE_FREQUENCY_MIN) && ((__FREQUENCY__) <= UTILS_HSE_FREQUENCY_MAX))
-/**
-  * @}
-  */
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup UTILS_LL_Private_Functions UTILS Private functions
-  * @{
-  */
-static uint32_t    UTILS_GetPLLOutputFrequency(uint32_t PLL_InputFrequency,
-                                               LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct);
-static ErrorStatus UTILS_SetFlashLatency(uint32_t Frequency);
-static ErrorStatus UTILS_EnablePLLAndSwitchSystem(uint32_t SYSCLK_Frequency, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
-static ErrorStatus UTILS_PLL_IsBusy(void);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup UTILS_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup UTILS_LL_EF_DELAY
-  * @{
-  */
-
-/**
-  * @brief  This function configures the Cortex-M SysTick source to have 1ms time base.
-  * @note   When a RTOS is used, it is recommended to avoid changing the Systick
-  *         configuration by calling this function, for a delay use rather osDelay RTOS service.
-  * @param  HCLKFrequency HCLK frequency in Hz
-  * @note   HCLK frequency can be calculated thanks to RCC helper macro or function @ref LL_RCC_GetSystemClocksFreq
-  * @retval None
-  */
-void LL_Init1msTick(uint32_t HCLKFrequency)
-{
-  /* Use frequency provided in argument */
-  LL_InitTick(HCLKFrequency, 1000U);
-}
-
-/**
-  * @brief  This function provides accurate delay (in milliseconds) based
-  *         on SysTick counter flag
-  * @note   When a RTOS is used, it is recommended to avoid using blocking delay
-  *         and use rather osDelay service.
-  * @note   To respect 1ms timebase, user should call @ref LL_Init1msTick function which
-  *         will configure Systick to 1ms
-  * @param  Delay specifies the delay time length, in milliseconds.
-  * @retval None
-  */
-void LL_mDelay(uint32_t Delay)
-{
-  __IO uint32_t  tmp = SysTick->CTRL;  /* Clear the COUNTFLAG first */
-  /* Add this code to indicate that local variable is not used */
-  ((void)tmp);
-
-  /* Add a period to guaranty minimum wait */
-  if (Delay < LL_MAX_DELAY)
-  {
-    Delay++;
-  }
-
-  while (Delay)
-  {
-    if ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) != 0U)
-    {
-      Delay--;
-    }
-  }
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup UTILS_EF_SYSTEM
-  *  @brief    System Configuration functions
-  *
-  @verbatim
- ===============================================================================
-           ##### System Configuration functions #####
- ===============================================================================
-    [..]
-         System, AHB and APB buses clocks configuration
-
-         (+) The maximum frequency of the SYSCLK, HCLK, PCLK1 and PCLK2 is 32000000 Hz.
-  @endverbatim
-  @internal
-             Depending on the device voltage range, the maximum frequency should be
-             adapted accordingly:
-             (++) +----------------------------------------------------------------+
-             (++) |  Wait states  |                HCLK clock frequency (MHz)      |
-             (++) |               |------------------------------------------------|
-             (++) |   (Latency)   |            voltage range       | voltage range |
-             (++) |               |            1.65 V - 3.6 V      | 2.0 V - 3.6 V |
-             (++) |               |----------------|---------------|---------------|
-             (++) |               |  VCORE = 1.2 V | VCORE = 1.5 V | VCORE = 1.8 V |
-             (++) |-------------- |----------------|---------------|---------------|
-             (++) |0WS(1CPU cycle)|0 < HCLK <= 2   |0 < HCLK <= 8  |0 < HCLK <= 16 |
-             (++) |---------------|----------------|---------------|---------------|
-             (++) |1WS(2CPU cycle)|2 < HCLK <= 4   |8 < HCLK <= 16 |16 < HCLK <= 32|
-             (++) +----------------------------------------------------------------+
-  @endinternal
-  * @{
-  */
-
-/**
-  * @brief  This function sets directly SystemCoreClock CMSIS variable.
-  * @note   Variable can be calculated also through SystemCoreClockUpdate function.
-  * @param  HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
-  * @retval None
-  */
-void LL_SetSystemCoreClock(uint32_t HCLKFrequency)
-{
-  /* HCLK clock frequency */
-  SystemCoreClock = HCLKFrequency;
-}
-
-/**
-  * @brief  This function configures system clock with HSI as clock source of the PLL
-  * @note   The application need to ensure that PLL is disabled.
-  * @note   Function is based on the following formula:
-  *         - PLL output frequency = ((HSI frequency * PLLMul) / PLLDiv)
-  *         - PLLMul: The application software must set correctly the PLL multiplication factor to avoid exceeding
-  *           - 96 MHz as PLLVCO when the product is in range 1,
-  *           - 48 MHz as PLLVCO when the product is in range 2,
-  *           - 24 MHz when the product is in range 3
-  * @note   FLASH latency can be modified through this function. 
-  * @param  UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains
-  *                             the configuration information for the PLL.
-  * @param  UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains
-  *                             the configuration information for the BUS prescalers.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: Max frequency configuration done
-  *          - ERROR: Max frequency configuration not done
-  */
-ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
-                                         LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  uint32_t pllfreq = 0U;
-
-  /* Check if one of the PLL is enabled */
-  if (UTILS_PLL_IsBusy() == SUCCESS)
-  {
-    /* Calculate the new PLL output frequency */
-    pllfreq = UTILS_GetPLLOutputFrequency(HSI_VALUE, UTILS_PLLInitStruct);
-
-    /* Enable HSI if not enabled */
-    if (LL_RCC_HSI_IsReady() != 1U)
-    {
-      LL_RCC_HSI_Enable();
-      while (LL_RCC_HSI_IsReady() != 1U)
-      {
-        /* Wait for HSI ready */
-      }
-    }
-
-    /* Configure PLL */
-    LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, UTILS_PLLInitStruct->PLLMul, UTILS_PLLInitStruct->PLLDiv);
-
-    /* Enable PLL and switch system clock to PLL */
-    status = UTILS_EnablePLLAndSwitchSystem(pllfreq, UTILS_ClkInitStruct);
-  }
-  else
-  {
-    /* Current PLL configuration cannot be modified */
-    status = ERROR;
-  }
-
-  return status;
-}
-
-/**
-  * @brief  This function configures system clock with HSE as clock source of the PLL
-  * @note   The application need to ensure that PLL is disabled.
-  * @note   Function is based on the following formula:
-  *         - PLL output frequency = ((HSE frequency * PLLMul) / PLLDiv)
-  *         - PLLMul: The application software must set correctly the PLL multiplication factor to avoid exceeding
-  *           - 96 MHz as PLLVCO when the product is in range 1,
-  *           - 48 MHz as PLLVCO when the product is in range 2,
-  *           - 24 MHz when the product is in range 3
-  * @note   FLASH latency can be modified through this function. 
-  * @param  HSEFrequency Value between Min_Data = 1000000 and Max_Data = 24000000
-  * @param  HSEBypass This parameter can be one of the following values:
-  *         @arg @ref LL_UTILS_HSEBYPASS_ON
-  *         @arg @ref LL_UTILS_HSEBYPASS_OFF
-  * @param  UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains
-  *                             the configuration information for the PLL.
-  * @param  UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains
-  *                             the configuration information for the BUS prescalers.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: Max frequency configuration done
-  *          - ERROR: Max frequency configuration not done
-  */
-ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
-                                         LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  uint32_t pllfreq = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_LL_UTILS_HSE_FREQUENCY(HSEFrequency));
-  assert_param(IS_LL_UTILS_HSE_BYPASS(HSEBypass));
-
-  /* Check if one of the PLL is enabled */
-  if (UTILS_PLL_IsBusy() == SUCCESS)
-  {
-    /* Calculate the new PLL output frequency */
-    pllfreq = UTILS_GetPLLOutputFrequency(HSEFrequency, UTILS_PLLInitStruct);
-
-    /* Enable HSE if not enabled */
-    if (LL_RCC_HSE_IsReady() != 1U)
-    {
-      /* Check if need to enable HSE bypass feature or not */
-      if (HSEBypass == LL_UTILS_HSEBYPASS_ON)
-      {
-        LL_RCC_HSE_EnableBypass();
-      }
-      else
-      {
-        LL_RCC_HSE_DisableBypass();
-      }
-
-      /* Enable HSE */
-      LL_RCC_HSE_Enable();
-      while (LL_RCC_HSE_IsReady() != 1U)
-      {
-        /* Wait for HSE ready */
-      }
-    }
-
-      /* Configure PLL */
-      LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, UTILS_PLLInitStruct->PLLMul, UTILS_PLLInitStruct->PLLDiv);
-
-    /* Enable PLL and switch system clock to PLL */
-    status = UTILS_EnablePLLAndSwitchSystem(pllfreq, UTILS_ClkInitStruct);
-  }
-  else
-  {
-    /* Current PLL configuration cannot be modified */
-    status = ERROR;
-  }
-
-  return status;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup UTILS_LL_Private_Functions
-  * @{
-  */
-/**
-  * @brief  Update number of Flash wait states in line with new frequency and current
-            voltage range.
-  * @param  Frequency  HCLK frequency
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: Latency has been modified
-  *          - ERROR: Latency cannot be modified
-  */
-static ErrorStatus UTILS_SetFlashLatency(uint32_t Frequency)
-{
-  ErrorStatus status = SUCCESS;
-
-  uint32_t latency = LL_FLASH_LATENCY_0;  /* default value 0WS */
-
-  /* Frequency cannot be equal to 0 */
-  if (Frequency == 0U)
-  {
-    status = ERROR;
-  }
-  else
-  {
-    if (LL_PWR_GetRegulVoltageScaling() == LL_PWR_REGU_VOLTAGE_SCALE1)
-    {
-      if (Frequency > UTILS_SCALE1_LATENCY1_FREQ)
-      {
-        /* 16 < HCLK <= 32 => 1WS (2 CPU cycles) */
-        latency = LL_FLASH_LATENCY_1;
-      }
-      /* else HCLK < 16MHz default LL_FLASH_LATENCY_0 0WS */
-     }
-    else if (LL_PWR_GetRegulVoltageScaling() == LL_PWR_REGU_VOLTAGE_SCALE2)
-    {
-      if (Frequency > UTILS_SCALE2_LATENCY1_FREQ)
-      {
-        /* 8 < HCLK <= 16 => 1WS (2 CPU cycles) */
-        latency = LL_FLASH_LATENCY_1;
-      }
-      /* else HCLK < 8MHz default LL_FLASH_LATENCY_0 0WS */
-    }
-    else
-    {
-      if (Frequency > UTILS_SCALE3_LATENCY1_FREQ)
-      {
-        /* 2 < HCLK <= 4 => 1WS (2 CPU cycles) */
-        latency = LL_FLASH_LATENCY_1;
-      }
-      /* else HCLK < 4MHz default LL_FLASH_LATENCY_0 0WS */
-    }
-
-    LL_FLASH_SetLatency(latency);
-
-    /* Check that the new number of wait states is taken into account to access the Flash
-       memory by reading the FLASH_ACR register */
-    if (LL_FLASH_GetLatency() != latency)
-    {
-      status = ERROR;
-    }
-  }
-  return status;
-}
-
-/**
-  * @brief  Function to check that PLL can be modified
-  * @param  PLL_InputFrequency  PLL input frequency (in Hz)
-  * @param  UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains
-  *                             the configuration information for the PLL.
-  * @retval PLL output frequency (in Hz)
-  */
-static uint32_t UTILS_GetPLLOutputFrequency(uint32_t PLL_InputFrequency, LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct)
-{
-  uint32_t pllfreq = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_LL_UTILS_PLLMUL_VALUE(UTILS_PLLInitStruct->PLLMul));
-  assert_param(IS_LL_UTILS_PLLDIV_VALUE(UTILS_PLLInitStruct->PLLDiv));
-
-  /* Check different PLL parameters according to RM                          */
-  /* The application software must set correctly the PLL multiplication factor to avoid exceeding
-     96 MHz as PLLVCO when the product is in range 1,
-     48 MHz as PLLVCO when the product is in range 2,
-     24 MHz when the product is in range 3. */
-  pllfreq = PLL_InputFrequency * (PLLMulTable[UTILS_PLLInitStruct->PLLMul >> RCC_POSITION_PLLMUL]);
-  assert_param(IS_LL_UTILS_PLLVCO_OUTPUT(pllfreq));
-
-  /* The application software must set correctly the PLL multiplication factor to avoid exceeding 
-     maximum frequency 32000000 in range 1 */
-  pllfreq = pllfreq / ((UTILS_PLLInitStruct->PLLDiv >> RCC_POSITION_PLLDIV)+1U);
-  assert_param(IS_LL_UTILS_PLL_FREQUENCY(pllfreq));
-
-  return pllfreq;
-}
-
-/**
-  * @brief  Function to check that PLL can be modified
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: PLL modification can be done
-  *          - ERROR: PLL is busy
-  */
-static ErrorStatus UTILS_PLL_IsBusy(void)
-{
-  ErrorStatus status = SUCCESS;
-
-  /* Check if PLL is busy*/
-  if (LL_RCC_PLL_IsReady() != 0U)
-  {
-    /* PLL configuration cannot be modified */
-    status = ERROR;
-  }
-
-
-  return status;
-}
-
-/**
-  * @brief  Function to enable PLL and switch system clock to PLL
-  * @param  SYSCLK_Frequency SYSCLK frequency
-  * @param  UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains
-  *                             the configuration information for the BUS prescalers.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: No problem to switch system to PLL
-  *          - ERROR: Problem to switch system to PLL
-  */
-static ErrorStatus UTILS_EnablePLLAndSwitchSystem(uint32_t SYSCLK_Frequency, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  uint32_t hclk_frequency = 0U;
-
-  assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider));
-  assert_param(IS_LL_UTILS_APB1_DIV(UTILS_ClkInitStruct->APB1CLKDivider));
-  assert_param(IS_LL_UTILS_APB2_DIV(UTILS_ClkInitStruct->APB2CLKDivider));
-
-  /* Calculate HCLK frequency */
-  hclk_frequency = __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider);
-
-  /* Increasing the number of wait states because of higher CPU frequency */
-  if (SystemCoreClock < hclk_frequency)
-  {
-    /* Set FLASH latency to highest latency */
-    status = UTILS_SetFlashLatency(hclk_frequency);
-  }
-
-  /* Update system clock configuration */
-  if (status == SUCCESS)
-  {
-    /* Enable PLL */
-    LL_RCC_PLL_Enable();
-    while (LL_RCC_PLL_IsReady() != 1U)
-    {
-      /* Wait for PLL ready */
-    }
-
-    /* Sysclk activation on the main PLL */
-    LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider);
-    LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
-    while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
-    {
-      /* Wait for system clock switch to PLL */
-    }
-
-    /* Set APB1 & APB2 prescaler*/
-    LL_RCC_SetAPB1Prescaler(UTILS_ClkInitStruct->APB1CLKDivider);
-    LL_RCC_SetAPB2Prescaler(UTILS_ClkInitStruct->APB2CLKDivider);
-  }
-
-  /* Decreasing the number of wait states because of lower CPU frequency */
-  if (SystemCoreClock > hclk_frequency)
-  {
-    /* Set FLASH latency to lowest latency */
-    status = UTILS_SetFlashLatency(hclk_frequency);
-  }
-
-  /* Update SystemCoreClock variable */
-  if (status == SUCCESS)
-  {
-    LL_SetSystemCoreClock(hclk_frequency);
-  }
-
-  return status;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Src/BIT.c b/Src/BIT.c
deleted file mode 100755
index d65d65e2..00000000
--- a/Src/BIT.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/* ========================================
- *
- * Copyright AIO Systems, 2018
- * Written by Novodes for AIO Systems
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO Systems.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : BIT.c
-  * @brief          : This file contains functions related to the BIT of data.
-                      
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-#include "BIT.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
- 
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions ---------------------------------------------------------*/
-
-
-
-/***********************************************************
-
-Function name: BIT_Tests
-
-Function type: uint8_t
-
-Arguments: None
-
-Return: uint8_t val2Ret
-
-Description: This function is responsible for running
-all of the functions of the BIT and give a final outcome
-
-**********************************************************/
-uint8_t BIT_Tests(void)
-{
-	uint8_t val2Ret = 0;
-	
-	val2Ret = BIT_SPI_FlashTest();
-	if(val2Ret != BIT_FAIL)
-	{
-		val2Ret = BIT_ChecksumOfNodesData();
-	}
-	
-	if(val2Ret == BIT_PASS)
-		printf("\n\r\n\rBIT PASS\n\r\n\r");
-	else if(val2Ret == BIT_FAIL)
-		printf("\n\r\n\rBIT FAIL\n\r\n\r");
-	return val2Ret;
-}
-
-
-/***********************************************************
-
-Function name: BIT_SPI_FlashTest
-
-Function type: uint8_t
-
-Arguments: None
-
-Return: uint8_t val2Ret
-
-Description: This function is responsible for checking the SPI
-channel of the external flash.
-
-**********************************************************/
-uint8_t BIT_SPI_FlashTest(void)
-{
-	uint8_t val2Ret = 0;
-	uint8_t manufacturerIdPtr;
-	uint8_t memTypePtr;
-	uint8_t memDensityPtr;
-	
-	EXTERNAL_FLASH_Init();
-
-	if(EXTERNAL_FLASH_ReadDeviceID(&manufacturerIdPtr,&memTypePtr,&memDensityPtr) == PASS)
-	{
-		val2Ret = BIT_PASS;
-		#ifdef GENERAL_INDICATIONS
-		printf("BIT: SPI test - PASS\n\r");
-		#endif
-	}
-	else
-	{
-		val2Ret = BIT_FAIL;
-		#ifdef GENERAL_INDICATIONS
-		printf("BIT: SPI test - FAIL\n\r");
-		#endif
-	}
-		
-	return val2Ret;
-}
-
-
-/***********************************************************
-
-Function name: BIT_VoltageTest
-
-Function type: uint8_t
-
-Arguments: None
-
-Return: uint8_t val2Ret
-
-Description: This function is responsible for checking the SPI
-channel of the external flash.
-
-**********************************************************/
-uint8_t BIT_VoltageTest(void)
-{
-	uint8_t val2Ret = 0;
-	
-	return val2Ret;
-}
-
-
-/***********************************************************
-
-Function name: BIT_ChecksumOfGW_Data
-
-Function type: uint8_t
-
-Arguments: None
-
-Return: uint8_t val2Ret
-
-Description: This function is responsible for checking the SPI
-channel of the external flash.
-
-**********************************************************/
-uint8_t BIT_ChecksumOfGW_Data(void)
-{
-	uint8_t val2Ret = 0;
-	
-	
-	return val2Ret;
-}
-
-
-
-/***********************************************************
-
-Function name: BIT_ChecksumOfNodesData
-
-Function type: uint8_t
-
-Arguments: None
-
-Return: uint8_t val2Ret
-
-Description: This function is responsible for checking the SPI
-channel of the external flash.
-
-**********************************************************/
-uint8_t BIT_ChecksumOfNodesData(void)
-{
-	uint8_t val2Ret = 0;
-	
-	for(uint8_t i=0;i<1/*50*/;i++)
-	{
-		uint8_t NodeParmasChecksumArr[18] = {0};
-		uint8_t ChecksumStored[2] = {0};
-		
-		uint32_t adrs2ReadData = GW_MODBUS_REGISTERS_START_ADRS + 8/*i*/ * REGISTERS_PER_NODE*REGISTER_BYTE_NUM + NUMBER_OF_REGS_FOR_GW*REGISTER_BYTE_NUM;
-		EXTERNAL_FLASH_ReadData(adrs2ReadData, NodeParmasChecksumArr, 18);
-		uint32_t adrs2ReadChecksum = adrs2ReadData +CHECKSUM_OF_NODE_PARAM_LOCATION_WITHIN_NODE_MEM_SPACE*REGISTER_BYTE_NUM;
-		
-		EXTERNAL_FLASH_ReadData(adrs2ReadChecksum, ChecksumStored, 2);
-		
-		
-		uint16_t ChecksunCalc = 0;
-		ChecksunCalc = CalcCRC(NodeParmasChecksumArr, 18);
-		
-		uint16_t readChecksum = 0;
-		readChecksum = (uint16_t)(((ChecksumStored[1]  & 0x00FF) << 8) | ChecksumStored[0]);
-		
-		if(readChecksum != ChecksunCalc)
-		{
-				val2Ret = BIT_FAIL;
-			printf("BIT: Checksum test - FAIL\n\r");
-		}
-		else
-		{
-			printf("BIT: Checksum test - PASS\n\r");
-			val2Ret = BIT_PASS;
-		}
-	}
-	
-	return val2Ret;
-}
-
-
-
-
-
-/************************ (C) COPYRIGHT AIO Systems *****END OF FILE****/
diff --git a/Src/EEPROM.c b/Src/EEPROM.c
deleted file mode 100755
index ce5eaf8b..00000000
--- a/Src/EEPROM.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/* ========================================
- *
- * Copyright AIO Systems, 2018
- * Written by Novodes for AIO Systems
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO Systems.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : eeprom.c
-  * @brief          : This is a user application driver for the EEPROM 
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-#include "eeprom.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
- 
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions ---------------------------------------------------------*/
-
-
-/**
-  * @brief  This function performs a Write sequence to the eeprom of one word - 32 bits
-  * @param  uint32_t relative_address - Relative addres of eeprom  within the eeprom memory bank. (e.g. the value 0 indicates it's the beginning of the bank)
-            uint32_t data - Data to be written to eeprom
-  * @retval None
-  */
-void EEPROM_WRITE_WORD(uint32_t relative_address, uint32_t data)
-{
-  uint8_t SUCCESS_FLAG = 0, attempts_num = 0;
-  uint32_t address_location = FLASH_EEPROM_START_ADDR + (uint32_t)relative_address;
-   
-  // only write to the EEPROM address area of the memory
-  if( address_location >= FLASH_EEPROM_START_ADDR && address_location <= FLASH_EEPROM_END_ADDR)
-  {
-    HAL_FLASHEx_DATAEEPROM_Unlock();// unlock the EEPROM
-    do
-    {
-      #ifdef STM32L152xE
-        HAL_FLASHEx_DATAEEPROM_Erase(FLASH_TYPEPROGRAM_WORD,FLASH_EEPROM_START_ADDR + (uint32_t)relative_address);
-      #else
-        #ifdef STM32L063xx
-          HAL_FLASHEx_DATAEEPROM_Erase(FLASH_EEPROM_START_ADDR + (uint32_t)relative_address);
-        #endif
-      #endif
-      if (HAL_FLASHEx_DATAEEPROM_Program(FLASH_TYPEPROGRAMDATA_WORD, FLASH_EEPROM_START_ADDR + (uint32_t)relative_address, data) != HAL_OK)
-        attempts_num++;
-      else
-        SUCCESS_FLAG = 1;
-    }
-    while(!SUCCESS_FLAG && attempts_num<2);
-       HAL_FLASH_Lock();     // lock the flash  
-       
-    if(!SUCCESS_FLAG)
-      Error_Handler();
-  }
-}
-
-/**
-  * @brief  This function performs a Write sequence to the eeprom of one byte - 8 bits
-  * @param  uint32_t relative_address - Relative addres of eeprom  within the eeprom memory bank. (e.g. the value 0 indicates it's the beginning of the bank)
-            uint32_t data - Data to be written to eeprom
-  * @retval None
-  */
-void EEPROM_WRITE_BYTE(uint32_t relative_address, uint32_t data)
-{
-	uint8_t SUCCESS_FLAG = 0, attempts_num = 0;
-  uint32_t address_location = FLASH_EEPROM_START_ADDR + (uint32_t)relative_address;
-	
-	// only write to the EEPROM address area of the memory
-  if( address_location >= FLASH_EEPROM_START_ADDR && address_location <= FLASH_EEPROM_END_ADDR)
-  {
-    HAL_FLASHEx_DATAEEPROM_Unlock();// unlock the EEPROM
-    do
-    {
-      #ifdef STM32L152xE
-        HAL_FLASHEx_DATAEEPROM_Erase(FLASH_TYPEPROGRAM_WORD,FLASH_EEPROM_START_ADDR + (uint32_t)relative_address);
-      #else
-        #ifdef STM32L063xx
-          HAL_FLASHEx_DATAEEPROM_Erase(FLASH_EEPROM_START_ADDR + (uint32_t)relative_address);
-        #endif
-      #endif
-      if (HAL_FLASHEx_DATAEEPROM_Program(FLASH_TYPEPROGRAMDATA_BYTE, FLASH_EEPROM_START_ADDR + (uint32_t)relative_address, data) != HAL_OK)
-        attempts_num++;
-      else
-        SUCCESS_FLAG = 1;
-    }
-    while(!SUCCESS_FLAG && attempts_num<2);
-       HAL_FLASH_Lock();     // lock the flash  
-       
-    if(!SUCCESS_FLAG)
-      Error_Handler();
-  }
-}
-
-/**
-  * @brief  This function performs a Read sequence from the eeprom of one word - 32 bits
-  * @param  uint32_t relative_address - Relative addres of eeprom within the eeprom memory bank. (e.g. the value 0 indicates it's the beginning of the bank)
-  * @retval uint32_t - the value read from the relative address given
-  */
-uint32_t EEPROM_READ_WORD(uint32_t relative_address)
-{
-  return (*(__IO uint32_t*)(FLASH_EEPROM_START_ADDR + (uint32_t)relative_address));
-} 
-
-/**
-  * @brief  This function performs a Read sequence from the eeprom of one byte - 8 bits
-  * @param  uint32_t relative_address - Relative addres of eeprom  within the eeprom memory bank. (e.g. the value 0 indicates it's the beginning of the bank)
-  * @retval uint8_t - the value read from the relative address given
-  */
-uint8_t  EEPROM_READ_BYTE(uint32_t relative_address)
-{
-  return (*(__IO uint8_t*)(FLASH_EEPROM_START_ADDR + (uint32_t)relative_address));
-}
-
-/**
-  * @brief  This function performs a reading of a stream of data from the eeprom
-  * @param  uint32_t relative_address - Relative address of eeprom  within the eeprom memory bank. (e.g. the value 0 indicates it's the beginning of the bank)
-            uint16_t initialAddress - stream size to be read
-  * @retval None
-  */ 
-void EEPROM_READ_BYTE_SECTOR(uint8_t *arrayPtr, uint16_t arraySize,uint16_t initialAddress)
-{
-  uint16_t i=0;
-  for(;i>8)&0x00FF;
-	ACKArr2Send[ACK_ARR_LOC_4] = (OutgoingRFCRC)&0x00FF;
-	
-	sendDataOverRF(ACKArr2Send, ACK_MESSAGE_SIZE);
-}
-
-
-
-/***********************************************************
-
-Function name: NACK_SendRF
-
-Function type: void
-
-Arguments: none
-
-Return: none
-
-Description: This function is responsible for sending NACK
-over the RF
-
-**********************************************************/
-
-void NACK_SendRF(void)
-{
-	#ifdef RF_INDICATIONS
-	printf("\n\rNACK message - to BR\n\r\n\r");
-	#endif
-	uint8_t NACKArr2Send[NACK_MESSAGE_SIZE] = {0};		//Init the arr
-	NACKArr2Send[NACK_ARR_LOC_0] = NACK_CODE_MESSAGE;
-	NACKArr2Send[NACK_ARR_LOC_1] = GATEWAY_ID;
-	NACKArr2Send[NACK_ARR_LOC_2] = NACK;
-	
-	uint16_t OutgoingRFCRC = CalcCRC(NACKArr2Send, NACK_MESSAGE_SIZE-2);
-	
-	NACKArr2Send[ACK_ARR_LOC_3] = (OutgoingRFCRC>>8)&0x00FF;
-	NACKArr2Send[ACK_ARR_LOC_4] = (OutgoingRFCRC)&0x00FF;
-	
-	sendDataOverRF(NACKArr2Send, NACK_MESSAGE_SIZE);
-}
-
-
-
-
-/***********************************************************
-
-Function name: GW2BR_QuerySendRF
-
-Function type: void
-
-Arguments: none
-
-Return: none
-
-Description: This function is responsible for sendingQuert
-from GW to bridge over the RF
-
-**********************************************************/
-void GW2BR_QuerySendRF(void)
-{
-	#ifdef RF_INDICATIONS
-	printf("\n\rQuery message - to BR\n\r");
-	#endif
-	uint8_t QueryArr2Send[QUERY_GW2BR_MAX_SIZE] = {0};		//Init the array
-	uint8_t tempArr[QUERY_GW2BR_MAX_SIZE] = {0};					//Init a temp array for receiving the query data
-	QueryArr2Send[QUERY_GW2BR_ARR_LOC_0] = QUERY_GW2BR_MESSAGE_CODE;
-	QueryArr2Send[QUERY_GW2BR_ARR_LOC_1] = GATEWAY_ID;
-	QueryArr2Send[QUERY_GW2BR_ARR_LOC_2] = GetDataAndSizeOfQuery(tempArr);			//Get the data and its size;
-	
-	for(uint8_t i=0;i< QueryArr2Send[QUERY_GW2BR_ARR_LOC_2];i++)			//Assign the data of the query to the array to send
-		QueryArr2Send[QUERY_GW2BR_ARR_LOC_3+i] = tempArr[i];
-	
-	uint16_t OutgoingRFCRC = CalcCRC(QueryArr2Send, (QUERY_GW2BR_ARR_LOC_3+QueryArr2Send[QUERY_GW2BR_ARR_LOC_2]));
-	
-	QueryArr2Send[QUERY_GW2BR_ARR_LOC_3+QueryArr2Send[QUERY_GW2BR_ARR_LOC_2]+1] = (OutgoingRFCRC>>8)&0x00FF;
-	QueryArr2Send[QUERY_GW2BR_ARR_LOC_3+QueryArr2Send[QUERY_GW2BR_ARR_LOC_2]+2] = (OutgoingRFCRC)&0x00FF;
-	
-	UnsetNewDataFlag4Node(CurrentNodeID, QUERY);
-	sendDataOverRF(QueryArr2Send, QueryArr2Send[QUERY_GW2BR_ARR_LOC_2]+QUERY_GW2BR_EXTRA_DATA);		//send the data and its size
-	
-}
-
-
-/***********************************************************
-
-Function name: RebootCommand_SendRF
-
-Function type: void
-
-Arguments: none
-
-Return: none
-
-Description: This function is responsible for sending 
- the reboot command to Bridge. 
-
-**********************************************************/
-void RebootCommand_SendRF(void)
-{
-	#ifdef RF_INDICATIONS
-	printf("\n\rReboot message - to BR\n\r");
-	#endif
-	uint8_t RebootCommandArr2Send[REBOOT_COMMAND_MESSAGE_SIZE] = {0};		//Init the array to  be sent
-	RebootCommandArr2Send[REBOOT_COMMAND_ARR_LOC_0] = REBOOT_COMMAND_MESSAGE_CODE;
-	RebootCommandArr2Send[REBOOT_COMMAND_ARR_LOC_1] = CurrentNodeID;
-	RebootCommandArr2Send[REBOOT_COMMAND_ARR_LOC_2] = 0;
-
-	uint16_t OutgoingRFCRC = CalcCRC(RebootCommandArr2Send, REBOOT_COMMAND_MESSAGE_SIZE-2);
-	
-	RebootCommandArr2Send[REBOOT_COMMAND_ARR_LOC_3] = (OutgoingRFCRC>>8)&0x00FF;
-	RebootCommandArr2Send[REBOOT_COMMAND_ARR_LOC_4] = (OutgoingRFCRC)&0x00FF;
-	
-	sendDataOverRF(RebootCommandArr2Send, REBOOT_COMMAND_MESSAGE_SIZE);
-}
-
-
-
-/***********************************************************
-
-Function name: RebootAndDefCommand_SendRF
-
-Function type: void
-
-Arguments: none
-
-Return: none
-
-Description: This function is responsible for sending 
- the reboot and set params to default command to Bridge. 
-
-**********************************************************/
-void RebootAndDefCommand_SendRF(void)
-{
-	#ifdef RF_INDICATIONS
-	printf("\n\rReboot and default message - to BR\n\r");
-	#endif
-	uint8_t RebootCommandArr2Send[REBOOT_COMMAND_MESSAGE_SIZE] = {0};		//Init the array to  be sent
-	RebootCommandArr2Send[REBOOT_COMMAND_ARR_LOC_0] = REBOOT_COMMAND_MESSAGE_CODE;
-	RebootCommandArr2Send[REBOOT_COMMAND_ARR_LOC_1] = CurrentNodeID;
-	RebootCommandArr2Send[REBOOT_COMMAND_ARR_LOC_2] = 1;
-
-	uint16_t OutgoingRFCRC = CalcCRC(RebootCommandArr2Send, REBOOT_COMMAND_MESSAGE_SIZE-2);
-	
-	RebootCommandArr2Send[REBOOT_COMMAND_ARR_LOC_3] = (OutgoingRFCRC>>8)&0x00FF;
-	RebootCommandArr2Send[REBOOT_COMMAND_ARR_LOC_4] = (OutgoingRFCRC)&0x00FF;
-	
-	sendDataOverRF(RebootCommandArr2Send, REBOOT_COMMAND_MESSAGE_SIZE);
-}
-	
-
-
-/***********************************************************
-
-Function name: SetParams_GW2BRSendRF
-
-Function type: void
-
-Arguments: none
-
-Return: none
-
-Description: This function is responsible for sending 
- the Set parameters command to the Bridge. 
-
-**********************************************************/
-void SetParams_GW2BRSendRF(void)
-{
-	uint8_t SetParamsArr2Send[SET_PARAMS_MESSAGE_SIZE] = {0}; 	//Init the array
-	SetParamsArr2Send[SET_PARAMS_ARR_LOC_0] = SET_PARAMS_MESSAGE_CODE;
-	SetParamsArr2Send[SET_PARAMS_ARR_LOC_1] = CurrentNodeID;
-	GetDataOfParamsFromFlash(SetParamsArr2Send+2);
-	uint16_t OutgoingRFCRC = CalcCRC(SetParamsArr2Send, SET_PARAMS_MESSAGE_SIZE-2);
-	
-	SetParamsArr2Send[SET_PARAMS_ARR_LOC_18] = (OutgoingRFCRC>>8)&0x00FF;
-	SetParamsArr2Send[SET_PARAMS_ARR_LOC_19] = (OutgoingRFCRC)&0x00FF;
-	printf("\n\r\n\rThe value of set parameters are:\n\r\n\r");
-	
-	for(uint8_t i=0;i>8)&0x00FF;		//puting the CRC of the data that came on the UART into the last two bytes of the string for the RF to send
-		txBuffer[PKTLEN-2] = (OutgoingRFCRC)&0x00FF;
-		
-		#ifdef GENERAL_INDICATIONS
-		printf("\n\r\n\rDATA SENT OVER RF - ENCRYPTED\n\r\n\r");
-		for(uint8_t k=0;k CC1101_TRANSMISSION_TIMEOUT)
-				{
-					printf("\n\rRF Transmission 1st Timeout Failure\n\r\n\r");
-					break;
-				}
-		} 
-		while (HAL_GPIO_ReadPin(GPIOC, GPIO_PIN_13) != GPIO_PIN_RESET)
-		{	
-				//HAL_Delay(1);	
-				if(HAL_GetTick() - Tick4LoopBreak > CC1101_TRANSMISSION_TIMEOUT)
-				{
-					printf("\n\rRF Transmission 2nd Timeout Failure\n\r\n\r");
-					break;
-				}
-		} 
-	}
-	CC1101_cmdStrobe(CC1101_SFTX);
-	CC1101_setRxState();
-	HAL_NVIC_EnableIRQ(USART1_IRQn);
-	CC1101_GPIOInterruptEnable();	// enable interrupts after the transmission has ended
-	
-}
-
-/************************ (C) COPYRIGHT AIO Systems *****END OF FILE****/
-
diff --git a/Src/Logger.c b/Src/Logger.c
deleted file mode 100755
index b64d2616..00000000
--- a/Src/Logger.c
+++ /dev/null
@@ -1,519 +0,0 @@
-/* ========================================
- *
- * Copyright AIO Systems, 2018
- * Written by Novodes for AIO Systems
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO Systems.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : logger.c
-  * @brief          : This file contains functions related to the logging of data.
-                      It can contain either functions related to printing data
-                      outwards (e.g. with UART) or saving the data internally
-                      for later extraction by the user (internal or external flash)
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-#include "logger.h"
-#include "external_flash.h"
-#include "gpio.h"
-#include "encryption.h"
-
-/* Private typedef -----------------------------------------------------------*/
-#ifdef ENABLE_DEBUG_MODE
-	enum commands
-	{
-		NOTHING,										//0
-		EXT_FLASH_FILL_SECTOR,			//1
-		EXT_FLASH_DEVICE_ID,				//2
-		EXT_FLASH_AUTO_WRITE,				//3	
-		PRINT_FROM_EXTERNAL_FLASH		//4
-	};
-#endif
-/* Private define ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
- 
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions ---------------------------------------------------------*/
-
-//#############################################################################/
-/**
-  * @brief  This section is for supporting the printf function
-  * @param  None
-  * @retval None
-  */
-#ifdef __GNUC__
-#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
-#else
-#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
-
-PUTCHAR_PROTOTYPE
-{
-  HAL_UART_Transmit(&hlpuart1, (uint8_t *)&ch, 1, LOGGER_UART_TRANSMIT_POLLING_TIMEOUT); //##FOR NEW BOARD BRINGUP: CHANGE THE UART HANDLE HERE BASED ON THE UART THAT IS USED FOR PRINTING LOGS##
-  return ch;
-}
-/* end of the section of the printf support */
-//#############################################################################/
-
-#ifdef ENABLE_DEBUG_MODE	// if debug mode is disabled, then all this code is not compiled, saving precious flash space
-
-/**
-  * @brief  This function analyzes and executes a command receieved via the debug port
-	* @param  uint8_t *dataPtr - pointer to the string of data received as a command
-  * @retval None
-  */
-void Command_Analyzer(uint8_t *dataPtr)
-{
-	const char param[2] = " ";
-	static uint8_t command_index;
-	
-	// Command code
-	command_index = (uint8_t)atoi(strtok((char *)dataPtr, param));
-	
-	#ifdef COMMAND_HANDLER_LOGS
-		printf("\n\rCommand Analyzer: received command index: %d\n\r",command_index);
-	#endif
-	
-	switch(command_index)
-	{
-		case NOTHING:
-			#ifdef COMMAND_HANDLER_LOGS
-				printf("\n\rCommand Analyzer: Error, command index must be a number equal to 1 or higher.\n\r");
-			#endif
-		case EXT_FLASH_FILL_SECTOR:
-			;
-			/*uint16_t sector_num = (uint16_t)atoi(strtok(NULL, param));
-			uint8_t data = (uint8_t)atoi(strtok(NULL, param));
-			uint32_t write_byte_num =  (uint32_t)atoi(strtok(NULL, param));
-			uint16_t delay =  (uint16_t)atoi(strtok(NULL, param));
-			EXTERNAL_FLASH_FILL_SECTOR(sector_num,data,write_byte_num,delay);*/
-			break;
-		case EXT_FLASH_DEVICE_ID:
-			EXTERNAL_FLASH_GetDeviceID();
-			break;
-		case EXT_FLASH_AUTO_WRITE:
-			;
-			uint16_t sector_num = (uint16_t)atoi(strtok(NULL, param));
-			uint8_t data = (uint8_t)atoi(strtok(NULL, param));
-			uint32_t write_byte_num =  (uint32_t)atoi(strtok(NULL, param));
-			uint16_t delay =  (uint16_t)atoi(strtok(NULL, param));
-			EXTERNAL_FLASH_AUTO_FILL_SECTORS(sector_num,data,write_byte_num,delay);
-			break; 
-		case PRINT_FROM_EXTERNAL_FLASH:
-			printf("Print from flash logger command\n\r");
-			PrintFromFlashHandler(dataPtr);
-			break;
-		default:
-			#ifdef COMMAND_HANDLER_LOGS
-				printf("\n\rCommand Analyzer: Error, command index does not exist\n\r");
-			#endif
-			break;
-	}
-}
-
-
-/**
-  * @brief  This function reads a section of memory from the external flash.
-	* @param  uint8_t *dataPtr - pointer to the string of data received as a command
-  * @retval None
-  */
-void PrintFromFlashHandler(uint8_t *dataPtr)
-{
-	const char param[2] = " ";
-	//static uint8_t command_index;
-	  
-	uint32_t address = (uint32_t)atoi(strtok(NULL, param));
-	uint16_t length = (uint16_t)atoi(strtok(NULL, param));
-	uint8_t tempArr[255] = {0};
-	
-	EXTERNAL_FLASH_ReadData(address, tempArr, length);
-	printf("External flash read via logger. Address = 0x%x, length = %d\n\r", address, length);
-	for(uint8_t i=0;i MAX_BYTE_NUM_BUFFER)
-    {
-      printf("Command Failure: write/read packet size is too long. Must not exceed %d. Current value is: %d\n\r",MAX_BYTE_NUM_BUFFER,write_byte_num);
-      return; 
-    }
-		
-    if(sector_num > MAX_SECTOR_NUM)
-    {
-      printf("Command Failure: Sector address should be between 0 and %d. Current value is: %d\n\r\n\r",MAX_SECTOR_NUM,sector_num);
-      return; 
-    }
-    
-		EXTERNAL_FLASH_Init();	// initialize the external flash
-		
-    end_sector_address = (((uint32_t)sector_num+1) * (uint32_t)SECTOR_SIZE) - 1;    // Eyal Gerber:  (0x00001000u - 1) = 0x00000FFFu = the size of one sector in the flash
-    address = end_sector_address - (uint32_t)(SECTOR_SIZE-1); // Eyal Gerber: the beginning address of the sector
-		
-    #ifdef ENABLE_FILL_SECTOR_ADVANCED_LOGS
-    printf("sector_num = %d, data = %d, write_byte_num = %d, end_sector_address = %x, address = %x\n\r",sector_num,data, write_byte_num,end_sector_address,address);
-    #endif
-    
-    for(i=0;i end_sector_address)        //if there is a potential overflow beyond the address of the sector
-          temp_byte_num = end_sector_address - address;
-      else
-        temp_byte_num = write_byte_num;
-      
-      if( (ret_err = EXTERNAL_FLASH_WriteData(address, temp_byte_num, data_array)) != PASS )
-      {
-        write_fail_num++;
-				printf("Write Fail at Address: %x, Fail Reason: %x\n\r",address,ret_err);
-      }
-
-    }
-		
-    #ifdef ENABLE_FILL_SECTOR_ADVANCED_LOGS
-			printf("Finished write operation to external flash\r\n");
-    #endif
-
-    HAL_Delay(delay);
-    
-    for(i=0;i end_sector_address)        //if there is a potential overflow beyond the address of the sector
-          temp_byte_num = end_sector_address - address;
-      else
-        temp_byte_num = write_byte_num;
-      
-      if( (ret_err = EXTERNAL_FLASH_ReadData(address, data_array, temp_byte_num))!=PASS )
-			{
-        read_fail_num++;
-				printf("Read Fail at address: 0x%x, Fail Reason: 0x%x\n\r",address,ret_err);
-			}
-			
-			if(delay!=0)      //Eyal Gerber: (16.08.2018) only if the user asked for a delay then we also print the data in chunks for better readability but much slower
-      {
-        #ifdef ENABLE_FILL_SECTOR_ADVANCED_LOGS
-					printf("ADDRESS: 0x%x   -   ",address);
-        #endif
-        HAL_Delay(1);
-      }
-
-      for(i=0;i MAX_BYTE_NUM_BUFFER)
-    {
-      printf("Command Failure: write/read packet size is too long. Must not exceed %d. Current value is: %d\n\r",MAX_BYTE_NUM_BUFFER,write_byte_num);
-      return; 
-    }
-		
-    if(sector_num > MAX_SECTOR_NUM-1)	// must be minus one because we write to two sectors. 
-    {
-      printf("Command Failure: Sector address should be between 0 and %d. Current value is: %d\n\r\n\r",MAX_SECTOR_NUM-1,sector_num);
-      return; 
-    }
-    
-		EXTERNAL_FLASH_Init();	// initialize the external flash
-		
-		end_sector_address = (((uint32_t)sector_num+2) * (uint32_t)SECTOR_SIZE) - 1;    // Eyal Gerber:  (0x00001000u - 1) = 0x00000FFFu = the size of one sector in the flash
-		address = ((uint32_t)sector_num)*((uint32_t)SECTOR_SIZE); // Eyal Gerber: the beginning address of the sector
-		
-		#ifdef ENABLE_FILL_SECTOR_ADVANCED_LOGS
-			printf("sector_num = %d, data = %d, write_byte_num = %d, end_sector_address = %x, address = %x\n\r",sector_num,data, write_byte_num,end_sector_address,address);
-		#endif
-		
-		for(i=0;i end_sector_address)        //if there is a potential overflow beyond the address of the sector
-					temp_byte_num = end_sector_address - address;
-			else
-				temp_byte_num = write_byte_num;
-			
-			if( (ret_err = EXTERNAL_FLASH_WriteData_Automatic(address, temp_byte_num, data_array)) != PASS )
-			{
-				write_fail_num++;
-				printf("Write Fail at Address: %x, Fail Reason: %x\n\r",address,ret_err);
-			}
-
-		}
-		
-		#ifdef ENABLE_FILL_SECTOR_ADVANCED_LOGS
-			printf("Finished write operation to external flash\r\n");
-		#endif
-
-		HAL_Delay(delay);
-		
-		for(i=0;i end_sector_address)        //if there is a potential overflow beyond the address of the sector
-					temp_byte_num = end_sector_address - address;
-			else
-				temp_byte_num = write_byte_num;
-			
-			if( (ret_err = EXTERNAL_FLASH_ReadData(address, data_array, temp_byte_num))!=PASS )
-			{
-				read_fail_num++;
-				printf("Read Fail at address: 0x%x, Fail Reason: 0x%x\n\r",address,ret_err);
-			}
-			
-			if(delay!=0)      //Eyal Gerber: (16.08.2018) only if the user asked for a delay then we also print the data in chunks for better readability but much slower
-			{
-				#ifdef ENABLE_FILL_SECTOR_ADVANCED_LOGS
-					printf("ADDRESS: 0x%x   -   ",address);
-				#endif
-				HAL_Delay(1);
-			}
-
-			for(i=0;i
-#include 
-#include "usart.h"
-#include 
-#include "W3_Flash.h"
-#include "modbus_driver.h"
-#include "modbus_impl.h"
-#include "eeprom.h"
-#include "GW_BRProtocolsImp.h"
-#include "State_machine.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
- 
-uint32_t FirstPage = 0, NbOfPages = 0, Address = 0;
-uint32_t PageError = 0;
-__IO uint32_t data32 = 0, MemoryProgramStatus = 0;
-
-static FLASH_EraseInitTypeDef EraseInitStruct;
-
-uint32_t pageBuffer[128], * pPageBuffer;
-
-
- 
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions ---------------------------------------------------------*/
-
-/**
-  * @brief  
-  * @param  None
-  * @retval None
-  */
-//int flashEraseTable(void)
-//{
-
-//	/* Erase the user Flash area
-//	  (area defined by FLASH_USER_START_ADDR and FLASH_USER_END_ADDR) ***********/
-
-//	/* Get the number of sector to erase from 1st sector*/
-//	NbOfPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR + 1) >> 7;
-
-//	/* Fill EraseInit structure*/
-//	EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
-//	EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;
-//	EraseInitStruct.NbPages = NbOfPages;
-
-//	if ( HAL_FLASHEx_Erase( &EraseInitStruct, &PageError ) != HAL_OK )
-//	{
-//		/* 
-//		  Error occurred while page erase. 
-//		  User can add here some code to deal with this error. 
-//		  PageError will contain the faulty page.
-//		*/
-//		printf( "PageError %x\r\n", PageError );
-//		Error_Handler( );
-//	}
-//	return ( 0 );
-//}
-
-
-
-
-/***********************************************************
-
-Function name: FlashPageEraseAndWrite
-
-Function type: void
-
-Arguments: uint32_t Address, uint32_t *Data, uint32_t size
-
-Return: none
-
-Description: This function is responsible for writing to 
-flash the new data from the user.
-This function deal with the technical side of the flash
-page erase and write.
-This function is called by function code 06 of the 
-Modbus and by function code 16
-
-**********************************************************/
-
-//void FlashPageEraseAndWrite(uint32_t Address, uint32_t *Data, uint32_t size)
-//{
-//	/*Size is the number of modbus commands to write. Since in this function we write only 16bit of data in each
-//	word of 32bit, each page can contain up to 32 modbus commands*/
-//	uint32_t NbOfPages2Write;
-//	uint32_t WordsInPage = 0x20;
-//	if(size > WordsInPage )
-//	{
-//		if(size%WordsInPage == 0)
-//		{
-//			NbOfPages2Write = size/WordsInPage;
-//		}
-//		else
-//		{
-//			NbOfPages2Write = (size/WordsInPage)+1;
-//		}
-//	}
-//	else
-//	{
-//		NbOfPages2Write = 1;
-//	}
-//	
-//	uint32_t  *pageAddr;
-//	uint32_t offset_w;
-//	
-//	/* Get the number of sector to erase from 1st sector*/
-//	NbOfPages = (Address - FLASH_BASE) / FLASH_PAGE_SIZE;
-//	//printf( "The number of page is: 0x%x\n\r", NbOfPages);
-
-//	/* Fill EraseInit structure*/
-//	EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
-//	EraseInitStruct.PageAddress = NbOfPages * FLASH_PAGE_SIZE + FLASH_BASE;
-//	pageAddr = (uint32_t *)EraseInitStruct.PageAddress;
-//	EraseInitStruct.NbPages = NbOfPages2Write;		//The number of pages to erase.
-//	
-//	/*Copy the content of the desire pages before erasing*/
-//	printf( "The address of the first page to write is is: 0x%x\n\r", EraseInitStruct.PageAddress);
-//	offset_w = (Address - (EraseInitStruct.PageAddress))/4;	//Offset is the address of the firts word of the new data to write. We divide by 4 due to the fact that each word made out of 4bytes
-//	//printf("The value of offset is: %x\n\r", offset_w);
-//	printf("The size of message to write to flash is: %d\n\r", size);
-//	printf("The address of flash to write is: %x\n\r", Address);
-//			
-//	
-//	HAL_FLASH_Unlock();
-//	
-//	/*Erase the desire pages*/
-//	if ( HAL_FLASHEx_Erase( &EraseInitStruct, &PageError ) != HAL_OK )
-//	{
-//		Error_Handler( );
-//	}
-//	printf("After Erase\n\r");
-//	
-//	uint8_t DataIndex = 0;	
-//	
-//			
-//	uint32_t NewData2Write[WordsInPage*NbOfPages2Write];		//The array for the mixed old and new data to be write to flash
-
-//	for(uint32_t i=0x0;i= offset_w) && (i <  (offset_w+size)))
-//		{
-//			if(size == 1)		//If funcrion code 06 of Modbus
-//				NewData2Write[i] = (Data[DataIndex]<<16) & 0xFFFF0000;
-//			else		//If function code 16 of Modbus
-//				NewData2Write[i] = (Data[DataIndex]<<24 & 0xFF000000) | (Data[DataIndex+1]<<16 & 0x00FF0000);
-//			DataIndex = DataIndex +2;
-//		}
-//		else
-//			NewData2Write[i] = pageBuffer[i];
-//	}
-//	
-//	
-//	/*Program the flash with the NewData2Write array*/
-//	for(uint32_t i=0x0;i> 7;
-
-//  /* Fill EraseInit structure*/
-//  EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
-//  EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;
-//  EraseInitStruct.NbPages = NbOfPages;
-//  
-//  if (HAL_FLASHEx_Erase(&EraseInitStruct, &PageError) != HAL_OK)
-//  { 
-//    /* 
-//      Error occurred while page erase. 
-//      User can add here some code to deal with this error. 
-//      PageError will contain the faulty page.
-//    */
-//    Error_Handler();
-//  }
-
-//  /* Program the user Flash area word by word
-//    (area defined by FLASH_USER_START_ADDR and FLASH_USER_END_ADDR) ***********/
-
-//	//Address = REMOTE_UNIT_REG_ADRRESS;
-//	Address  = 0x08006200;
-//	printf("The address to write to is: %x", REMOTE_UNIT_REG_ADRRESS);
-//	printf("\n\r");
-//	uint32_t chnagingNumber1 = 0;
-//	uint32_t daa[1] = {0};
-//  
-//	uint16_t i;
-//	for(i=0;i<2000;i++)
-//	{
-//		daa[0] = chnagingNumber1++;
-//    if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, Address,daa[0]) == HAL_OK)
-//    {
-//      HAL_Delay(5);
-//      Address = Address + 4;
-//    }
-//    else
-//    { 
-//      /* Error occurred while writing data in Flash memory. 
-//         User can add here some code to deal with this error */
-//      /*
-//        FLASH_ErrorTypeDef errorcode = HAL_FLASH_GetError();
-//      */
-//      Error_Handler();
-//    }
-//	}
-//		//printf("The value from flash is: %x\n\r", readFromFlashTable(FLASH_USER_START_ADDR, 1));
-
-//  /* Lock the Flash to disable the flash control register access (recommended
-//     to protect the FLASH memory against possible unwanted operation) *********/
-//  HAL_FLASH_Lock(); 
-//	return;
-//}
-
-
-/***********************************************************
-
-Function name: ReadFromFlash
-
-Function type: void
-
-Arguments: uint32_t Address, uint8_t RegCount ,uint8_t * data
-
-Return: none
-
-Description: This function is responsible for reading data from
-flash based on the address argument and the regcount argument
-from the user. The data read is stored in the poiter to an array
-of uint8_t. This function is used by the modbus commands of 
-reading registers.
-
-**********************************************************/
-//void ReadFromFlash(uint32_t Address, uint8_t RegCount ,uint8_t * data)
-//{
-//	printf("\n\r\n\rReading from Flash at address %x\n\r", Address);
-//	if(RegCount<2)
-//	{
-//		int i;
-//		for(i=0;i 0x40)
-	{
-		val2ret = 0;
-		printf("Returning 0\n\r");
-		return val2ret;
-	}
-	else
-	{
-		if(NodeID >= 0x20)
-		{
-			if(action == SET)
-			{
-				tempArr[1] = 1;
-				tempArr[1] = (tempArr[1] << (NodeID - 0x20));
-				arrOfFlags[1] |= tempArr[1];
-			}
-			else if(action == RESET)
-			{
-				tempArr[1] = 1;
-				tempArr[1] = (tempArr[1] << (NodeID - 0x20));
-				arrOfFlags[1] &= ~tempArr[1];
-			}
-			printf("The value to write1 is: %x\n\r", arrOfFlags[1]);
-			EEPROM_WRITE_WORD(BRIDGES_FLAG_START, tempArr[1]);
-		}
-		else
-		{
-			if(action == SET)
-			{
-				tempArr[0] = 1;
-				tempArr[0] = (tempArr[0] << NodeID);
-				arrOfFlags[0] |= tempArr[0];
-			}
-			else if(action == RESET)
-			{
-				tempArr[0] = 1;
-				tempArr[0] = (tempArr[0] << NodeID);
-				arrOfFlags[0] &= ~tempArr[0];
-			}
-			printf("The value to write0 is: %x\n\r", arrOfFlags[0]);
-			EEPROM_WRITE_WORD(BRIDGES_FLAG_START+4, tempArr[1]);
-			
-		}
-		
-		val2ret = 1;
-		return val2ret;
-	}
-		
-}*/
-
-
-
-
-/************************ (C) COPYRIGHT AIO Systems *****END OF FILE****/
-
-
-
diff --git a/Src/app_main.c b/Src/app_main.c
deleted file mode 100755
index f02bd88d..00000000
--- a/Src/app_main.c
+++ /dev/null
@@ -1,200 +0,0 @@
-/* ========================================
- *
- * Copyright AIO Systems, 2018
- * Written by Novodes for AIO Systems
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO Systems.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : app_main.c
-  * @brief          : This is where the application begins and where the application
-                      main loop occurs 
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-#include "app_main.h"
-
-#include "gpio.h"
-#include "spi.h"
-#include "modbus_app_layer.h"
-#include "modbus_driver.h"
-#include "radio.h"
-#include "GW_BRProtocolsImp.h"
-#include "cc1101.h"
-#include "watchdog.h"
-#include "power_management.h"
-#include "eeprom.h"
-#include "external_flash.h"
-#include "bootloader_support.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
-
-volatile uint8_t RFReceiveTransmitFlag = FALSE;		//This flag is used to indicate if the current interrupt has occur due to receive or transmit
-uint8_t BR_Mode_GW_Or_BR;	// global variable to identify the type of board (bridge or gateway) - relevant only for bridge mode
-uint8_t FLAG_PushButton = FALSE;        // flag to determine whether the pushbutton has been pressed. 
-
-/* Private function prototypes -----------------------------------------------*/
-
-void App_Init(void);
-
-/* Exported functions ---------------------------------------------------------*/
-																		 
-/**
-  * @brief  This function is where the main app initializations occur
-  * @param  None
-  * @retval None
-  */
-void App_Init(void)
-{
-	RADIO_ERR recErr;
-	
-	/* Initialize all configured peripherals */
-  GPIO_Init();
-	
-	#ifdef ENABLE_WATCH_DOG
-		Check_WD_Reset();     // check if we woke up due to a watchdog reset
-		WD_Period_Set(WATCHDOG_RESET_PERIOD); // define the watchdog period
-	#endif
-  
-  #ifdef GENERAL_INDICATIONS
-    printf("\r\n\r\n ##### Application Initialization ##### \r\n\r\n");
-		printf("\n\r ##### Under Low Power mode, this board is a GATEWAY ##### \n\r\n\r");
-		printf("\r\n\r\n ##### FW version 1.1.11 ##### \r\n\r\n");
-  #endif
-	
-	
-	recErr = Radio_Init();
-	#ifdef RF_INDICATIONS
-	if(recErr != RADIO_OK)
-		 printf("Radio initialization/identification FAILED");
-	else
-		printf("Radio initialized and identified successfully\n\r");
-	#endif
-  
-  Init_Receive_Interrupt();		//Initialized the arrays and the interrupt of UART1
-	
-	EXTERNAL_FLASH_Init();	// Initialize the external flash driver
-}
-
-/**
-  * @brief  This function is where the main loop occurs and the application is initialized
-  * @param  None
-  * @retval None
-  */
-void App_Main()
-{
-  App_Init();
-	
-	CC1101_GPIOInterruptEnable();
-		
-	BIT_Tests();
-	
-	for(;;)
-	{	
-		MainStateMachineLoop(state);
-		WD_Reload();								// reload the watchdog register to prevent watchdog reset event.
-		
-		#ifdef ENABLE_DEBUG_MODE	
-			CommandHandler();	// scan for commands coming from the user (for debugging)
-		#endif
-		
-		#ifdef ENABLE_DEBUG_MODE
-			if(FLAG_PushButton == TRUE)
-			{
-				FLAG_PushButton = FALSE;
-				system_tests();
-				//HAL_Delay(4000);
-			}
-		#endif
-	}
-}
-
-
-
-
-/***********************************************************
-
-Function name: HAL_GPIO_EXTI_Callback
-
-Function type: void
-
-Arguments: uint16_t GPIO_Pin
-
-Return: None
-
-Description: This function is where the SW jumps to upon 
-interrupt from an external GPIO, in our case, the GDO0 
-of CC1101 and the push button
-
-**********************************************************/
-void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
-{
-	if( HAL_GPIO_ReadPin(GPIOC,GPIO_PIN_6) == RESET ) // if the push button has been pressed. 
-	{
-		FLAG_PushButton = TRUE;
-	}
-	else if( HAL_GPIO_ReadPin(GPIOC,GPIO_PIN_13) == RESET )	// if the GDO0 pin from the CC1101 is the one that triggerred the interrupt
-	{
-		CC1101_GPIOInterruptDisable();
-		RFReceiveTransmitFlag = RF_Routine();
-		CC1101_GPIOInterruptEnable();
-	}
-}
-
-
-/***********************************************************
-
-Function name: CC1101_GPIOInterruptEnable
-
-Function type: void
-
-Arguments: None
-
-Return: None
-
-Description: This function is responsible to enable the
-external GPIO interrupt from the CC1101
-
-**********************************************************/
-void CC1101_GPIOInterruptEnable(void)
-{
-	if(BOOTLOADER_PROCESS_START_FLAG == FALSE)
-		HAL_NVIC_EnableIRQ(EXTI4_15_IRQn);
-}
-
-
-/***********************************************************
-
-Function name: CC1101_GPIOInterruptDisable
-
-Function type: void
-
-Arguments: None
-
-Return: None
-
-Description: This function is responsible to disable the
-external GPIO interrupt
-
-**********************************************************/
-void CC1101_GPIOInterruptDisable(void)
-{
-	HAL_NVIC_DisableIRQ(EXTI4_15_IRQn);
-}
-
-/************************ (C) COPYRIGHT AIO Systems *****END OF FILE****/
diff --git a/Src/bootloader_support.c b/Src/bootloader_support.c
deleted file mode 100755
index fe3d62a5..00000000
--- a/Src/bootloader_support.c
+++ /dev/null
@@ -1,201 +0,0 @@
-/* ========================================
- *
- * Copyright AIO Systems, 2018
- * Written by Novodes for AIO Systems
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO Systems.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : bootloader_support.c
-  * @brief          : This is a user application driver for supporting the bootloader
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-#include "bootloader_support.h"
-#include "external_flash.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
- 
-uint8_t BOOTLOADER_PROCESS_START_FLAG = FALSE; 
-
-static uint16_t crcTable[] = {
-	0X0000, 0XC0C1, 0XC181, 0X0140, 0XC301, 0X03C0, 0X0280, 0XC241,
-	0XC601, 0X06C0, 0X0780, 0XC741, 0X0500, 0XC5C1, 0XC481, 0X0440,
-	0XCC01, 0X0CC0, 0X0D80, 0XCD41, 0X0F00, 0XCFC1, 0XCE81, 0X0E40,
-	0X0A00, 0XCAC1, 0XCB81, 0X0B40, 0XC901, 0X09C0, 0X0880, 0XC841,
-	0XD801, 0X18C0, 0X1980, 0XD941, 0X1B00, 0XDBC1, 0XDA81, 0X1A40,
-	0X1E00, 0XDEC1, 0XDF81, 0X1F40, 0XDD01, 0X1DC0, 0X1C80, 0XDC41,
-	0X1400, 0XD4C1, 0XD581, 0X1540, 0XD701, 0X17C0, 0X1680, 0XD641,
-	0XD201, 0X12C0, 0X1380, 0XD341, 0X1100, 0XD1C1, 0XD081, 0X1040,
-	0XF001, 0X30C0, 0X3180, 0XF141, 0X3300, 0XF3C1, 0XF281, 0X3240,
-	0X3600, 0XF6C1, 0XF781, 0X3740, 0XF501, 0X35C0, 0X3480, 0XF441,
-	0X3C00, 0XFCC1, 0XFD81, 0X3D40, 0XFF01, 0X3FC0, 0X3E80, 0XFE41,
-	0XFA01, 0X3AC0, 0X3B80, 0XFB41, 0X3900, 0XF9C1, 0XF881, 0X3840,
-	0X2800, 0XE8C1, 0XE981, 0X2940, 0XEB01, 0X2BC0, 0X2A80, 0XEA41,
-	0XEE01, 0X2EC0, 0X2F80, 0XEF41, 0X2D00, 0XEDC1, 0XEC81, 0X2C40,
-	0XE401, 0X24C0, 0X2580, 0XE541, 0X2700, 0XE7C1, 0XE681, 0X2640,
-	0X2200, 0XE2C1, 0XE381, 0X2340, 0XE101, 0X21C0, 0X2080, 0XE041,
-	0XA001, 0X60C0, 0X6180, 0XA141, 0X6300, 0XA3C1, 0XA281, 0X6240,
-	0X6600, 0XA6C1, 0XA781, 0X6740, 0XA501, 0X65C0, 0X6480, 0XA441,
-	0X6C00, 0XACC1, 0XAD81, 0X6D40, 0XAF01, 0X6FC0, 0X6E80, 0XAE41,
-	0XAA01, 0X6AC0, 0X6B80, 0XAB41, 0X6900, 0XA9C1, 0XA881, 0X6840,
-	0X7800, 0XB8C1, 0XB981, 0X7940, 0XBB01, 0X7BC0, 0X7A80, 0XBA41,
-	0XBE01, 0X7EC0, 0X7F80, 0XBF41, 0X7D00, 0XBDC1, 0XBC81, 0X7C40,
-	0XB401, 0X74C0, 0X7580, 0XB541, 0X7700, 0XB7C1, 0XB681, 0X7640,
-	0X7200, 0XB2C1, 0XB381, 0X7340, 0XB101, 0X71C0, 0X7080, 0XB041,
-	0X5000, 0X90C1, 0X9181, 0X5140, 0X9301, 0X53C0, 0X5280, 0X9241,
-	0X9601, 0X56C0, 0X5780, 0X9741, 0X5500, 0X95C1, 0X9481, 0X5440,
-	0X9C01, 0X5CC0, 0X5D80, 0X9D41, 0X5F00, 0X9FC1, 0X9E81, 0X5E40,
-	0X5A00, 0X9AC1, 0X9B81, 0X5B40, 0X9901, 0X59C0, 0X5880, 0X9841,
-	0X8801, 0X48C0, 0X4980, 0X8941, 0X4B00, 0X8BC1, 0X8A81, 0X4A40,
-	0X4E00, 0X8EC1, 0X8F81, 0X4F40, 0X8D01, 0X4DC0, 0X4C80, 0X8C41,
-	0X4400, 0X84C1, 0X8581, 0X4540, 0X8701, 0X47C0, 0X4680, 0X8641,
-	0X8201, 0X42C0, 0X4380, 0X8341, 0X4100, 0X81C1, 0X8081, 0X4040
-};
- 
-/* Private function prototypes -----------------------------------------------*/
-
-//uint16_t CalcCRC(uint8_t * buf, uint16_t size);
-
-/* Exported functions ---------------------------------------------------------*/
-
-
-/**
-  * @brief  This function prepares the MCU for bootloading. It erases the relevant memory space in the external flash for writing the image there.
-						This function doesn't receive the image and save it in the external flash.
-  * @param  None
-  * @retval None
-  */
-void Prepare_For_Bootloading(void)
-{
-	uint8_t sector_index;
-	
-	//Erase the relevant sectors destined to hold the application image for bootloading
-	for(sector_index = APP_IMAGE_SECTOR_START; sector_index < APP_IMAGE_SECTOR_ACCESSORIES ; sector_index++)
-		EXTERNAL_FLASH_EraseSector(sector_index*BASE_SECTOR_SIZE);
-		
-	#ifdef ENABLE_BOOTLOADING_LOGS
-		printf("Prepare_For_Bootloading: firmware upgrade process started.\n\r");
-	#endif
-}
-
-/**
-  * @brief  This function launches the bootloader (by performing a SW reset) and sets the ENABLE_FIRMWARE_UPGRADE as TRUE
-						so that the bootloader can detect it and perform the bootloading process instead of jumping back to the application
-  * @param  None
-  * @retval None
-  */
-void Begin_Bootloading(void)
-{
-	#ifdef ENABLE_BOOTLOADING_LOGS
-		printf("Beginning bootloading. Performing system reset in order to launch the bootloader\n\r");
-	#endif
-	Param_SetVal(ENABLE_FIRMWARE_UPGRADE,TRUE);	// set the parameter as TRUE so that the bootloader can detect it and perform the bootloading process instead of jumping back to the application
-	
-	SystemReset();	// perform a software reset in order to go to the bootloader and load the application from the external flash
-}
-
-/**
-  * @brief  This function saved the binary image size to the external flash in the destined location
-  * @param  uint16_t binary_image_bytes_received
-  * @retval None
-  */
-void Save_Image_Size_To_ExternalFlash(uint16_t binary_image_bytes_received)
-{
-	uint8_t data[APP_IMAGE_BYTE_NUM_SIZE];
-	uint32_t add2Write = (APP_IMAGE_SECTOR_ACCESSORIES * BASE_SECTOR_SIZE) + APP_IMAGE_BYTE_NUM_POSITION;
-	
-	data[0] = (uint8_t)((binary_image_bytes_received >> 8) & 0x00FF);	// MSB
-	data[1] = (uint8_t)(binary_image_bytes_received & 0x00FF);	// LSB
-	EXTERNAL_FLASH_WriteData_Automatic(add2Write, APP_IMAGE_BYTE_NUM_SIZE, data);
-	
-	#ifdef ENABLE_BOOTLOADING_LOGS
-		printf("Saved binary image size to the external flash\n\r");
-	#endif
-}
-
-/**
-  * @brief  This function saved the binary image size to the external flash in the destined location
-  * @param  uint16_t binary_image_bytes_received
-  * @retval None
-  */
-uint16_t Read_Image_Size_From_ExternalFlash(void)
-{
-	uint8_t data[APP_IMAGE_BYTE_NUM_SIZE];
-	uint32_t add2Read = (APP_IMAGE_SECTOR_ACCESSORIES * BASE_SECTOR_SIZE) + APP_IMAGE_BYTE_NUM_POSITION;
-	uint16_t binary_image_bytes_received;
-	
-	EXTERNAL_FLASH_ReadData(add2Read, data, APP_IMAGE_BYTE_NUM_SIZE);
-	binary_image_bytes_received = ((uint16_t)(data[0] << 8) & 0xFF00) + (uint16_t)data[1];	// MSB + LSB
-	
-	return binary_image_bytes_received;
-}
-
-/**
-  * @brief  This function calculates the CRC of the binary image stored in the external flash 
-						and then stores the CRC in the designated location in the external flash so that when the bootloader loads it can do a validation of the CRC
-  * @param  None
-  * @retval uint16_t crc - the calculated CRC value
-  */
-uint16_t Calc_And_Save_Binary_Image_CRC(void)
-{
-	#define DATA_PACKET_READ_SIZE 	256			// choose a number that doesn't seem too big for a buffer, yet not too small.
-	uint32_t add2Read = APP_IMAGE_SECTOR_START * BASE_SECTOR_SIZE;	// the beginning address in the external flash where the binary image is saved
-	uint8_t read_num; 
-	uint16_t binary_image_bytes_received = Read_Image_Size_From_ExternalFlash();
-	uint16_t total_number_of_reads = (binary_image_bytes_received/DATA_PACKET_READ_SIZE) + 1;	// number of times we shall read data from the flash until all the data is read and the CRC is calculated
-	uint8_t data[DATA_PACKET_READ_SIZE];
-	uint16_t Bytes2Read;
-	uint16_t crc = 65535;	// init value of the crc
-	uint16_t i;	// loop index for crc calculation
-	uint8_t tableIndex;	// index for the crc calculation
-	
-	for( read_num = 0 ; read_num < total_number_of_reads ; read_num++ )
-	{
-		if(read_num == (total_number_of_reads - 1))
-				Bytes2Read = binary_image_bytes_received % DATA_PACKET_READ_SIZE; // the last read won't necessarily divide by DATA_PACKET_READ_SIZE exactly so we need to calculate exactly how many bytes to read
-		else
-			Bytes2Read = DATA_PACKET_READ_SIZE;
-		
-		EXTERNAL_FLASH_ReadData(add2Read, data, Bytes2Read);
-		add2Read += Bytes2Read;
-		
-		//calculate CRC here:
-		for( i = 0 ; i < Bytes2Read ; i++ )
-		{
-			tableIndex = (uint8_t)(crc ^ data[i]);
-			crc >>= 8;
-			crc ^= crcTable[tableIndex];
-		}
-		
-	}
-	
-	//save crc in the external flash:
-	uint32_t add2Write = (APP_IMAGE_SECTOR_ACCESSORIES * BASE_SECTOR_SIZE) + APP_IMAGE_CRC_POSITION;
-	data[0] = (uint8_t)((crc >> 8) & 0x00FF);	// MSB
-	data[1] = (uint8_t)(crc & 0x00FF);	// LSB
-	EXTERNAL_FLASH_WriteData_Automatic(add2Write, APP_IMAGE_CRC_SIZE, data);
-	
-	#ifdef ENABLE_BOOTLOADING_LOGS
-		printf("Calculated binary image CRC and saved it to the external flash\n\r");
-	#endif
-	
-	return crc;
-}
-
-/************************ (C) COPYRIGHT AIO Systems *****END OF FILE****/
diff --git a/Src/cc1101.c b/Src/cc1101.c
deleted file mode 100755
index 34496505..00000000
--- a/Src/cc1101.c
+++ /dev/null
@@ -1,909 +0,0 @@
-/* ========================================
- *
- * Copyright AIO Systems, 2018
- * Written by Novodes for AIO Systems
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO Systems.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : cc1101.c
-  * @brief          : This file contains functions related to the cc101 IC.
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-#include "cc1101.h"
-#include "common.h"
-#include "ccpacket.h"
-#include "spi.h"
-#include "cc1101regs.h"
-#include "GW_BRProtocolsImp.h"
-#include "modbus_app_layer.h"
-#include "modbus_driver.h"
-#include "State_machine.h"
-#include "encryption.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-typedef struct
-{
-  uint16_t  addr;
-  uint8_t   data;
-}registerSetting_t;
-
-/* Private define ------------------------------------------------------------*/
-
-#define PA_TABLE {0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,}
-
-/* Private variables ---------------------------------------------------------*/
-
-	char PA[] =  {0x60};
-	const unsigned char PA_LEN = 1;
-	/* Sync word qualifier mode = 30/32 sync word bits detected */
-	/* CRC autoflush = FALSE */
-	/* Channel spacing = 199.951172 */
-	/* Data format = Normal mode */
-	/* Data rate = 512.573 */
-	/* RX filter BW = 58.035714 */
-	/* PA ramping = FALSE */
-	/* Preamble count = 4 */
-	/* Whitening = FALSE */
-	/* Address config = No address check */
-	/* Carrier frequency = 433.999969 */
-	/* Device address = 0 */
-	/* TX power = 0 */
-	/* Manchester enable = TRUE */
-	/* CRC enable = TRUE */
-	/* Deviation = 5.157471 */
-	/* Packet length mode = Variable packet length mode. Packet length configured by the first byte after sync word */
-	/* Packet length = 255 */
-	/* Modulation format = GFSK */
-	/* Base frequency = 433.999969 */
-	/* Modulated = TRUE */
-	/* Channel number = 0 */
-//static const registerSetting_t preferredSettings[] = 
-registerSetting_t preferredSettings[] = 
-{ 
-	 
-  {CC1101_IOCFG0,       0x06},
-  {CC1101_FIFOTHR,      0x47},
-  {CC1101_PKTCTRL0,     0x05}, // variable packet length
-	{CC1101_PKTCTRL1,     0x06}, // Address check and 0 (0x00) broadcast + append as default
-  {CC1101_FSCTRL1,      0x06},
-  {CC1101_FREQ2,        0x10},
-  {CC1101_FREQ1,        0xB1},
-	{CC1101_FREQ0,        0x3B},
-	{CC1101_ADDR,         GATEWAY_ID},   // this device address 10
-  {CC1101_MDMCFG4,      0xF5},
-  {CC1101_MDMCFG3,      0x75},
-  {CC1101_MDMCFG2,      0x13},
-  {CC1101_MDMCFG0,      0xE5},
-  {CC1101_DEVIATN,      0x14},
-  {CC1101_MCSM0,        0x18},
-  {CC1101_FOCCFG,       0x16},
-  {CC1101_RESERVED_0X20,0xFB},
-  {CC1101_FSCAL3,       0xE9},
-  {CC1101_FSCAL2,       0x2A},
-  {CC1101_FSCAL1,       0x00},
-  {CC1101_FSCAL0,       0x1F},
-  {CC1101_TEST2,        0x81},
-  {CC1101_TEST1,        0x35},
-  {CC1101_TEST0,        0x09},
-  {CC11xL_PA_TABLE0,    0xC0},
-};
-
-//static bool m_sleepMode = FALSE;
-
-/*
- * RF state
- */
-uint8_t rfState;
-
-/**
- * Carrier frequency
- */
-uint8_t carrierFreq;
-
-/**
- * Working mode (speed, ...)
- */
-uint8_t workMode;
-
-/**
- * Frequency channel
- */
-uint8_t channel;
-
-/**
- * Synchronization word
- */
-uint8_t syncWord[2];
-
-/**
- * Device address
- */
-volatile uint8_t devAddress;
-
-
-uint8_t RF_CRCsOKFlag = FALSE;
-uint8_t RFReceiveFailFlag = FALSE;
-uint8_t LocalBurstCounter = 0;
-uint8_t RFReceiveDoneFlag = TRUE;
-uint8_t Write2UARTFlag = FALSE;
-uint8_t StartRXFlag = FALSE;
-uint8_t PayloadSize4print = 0;
-uint32_t timeSample4RFRecevingTimeout = 0;
-
-/* Private macro -------------------------------------------------------------*/
-
-/**
- * Macros
- */
-
-// Wait until SPI MISO line goes low
-
-// Get GDO0 pin state
-#define getGDO0state()  CC1101_digitalRead(CC1101_GDO0)
-// Wait until GDO0 line goes high
-#define wait_GDO0_high()  while(!getGDO0state())
-// Wait until GDO0 line goes low
-#define wait_GDO0_low()  while(getGDO0state())
-	
-/**
- * Macros
- */
-// Read CC1101 Config register
-#define CC1101_readConfigReg(regAddr)    CC1101_readReg(regAddr, 0)
-// Read CC1101 Status register
-#define CC1101_readStatusReg(regAddr)    CC1101_readReg(regAddr , CC1101_STATUS_REGISTER)
-// Enter Rx state
-//#define setRxState()              CC1101_cmdStrobe(CC1101_SRX)
-// Enter Tx state
-//#define setTxState()              CC1101_cmdStrobe(CC1101_STX)
-
-// Flush Rx FIFO
-#define flushRxFifo()             CC1101_cmdStrobe(CC1101_SFRX)
-// Flush Tx FIFO
-#define flushTxFifo()             CC1101_cmdStrobe(CC1101_SFTX)
-// Disable address check
-#define disableAddressCheck()     CC1101_writeReg(CC1101_PKTCTRL1, 0x04)
-// Enable address check
-#define enableAddressCheck()      CC1101_writeReg(CC1101_PKTCTRL1, 0x06)
-// Disable CCA
-#define disableCCA()              CC1101_writeReg(CC1101_MCSM1, 0)
-// Enable CCA
-#define enableCCA()               CC1101_writeReg(CC1101_MCSM1, CC1101_DEFVAL_MCSM1)
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions ---------------------------------------------------------*/
-
-void delayUs(int time)
-{
-	for(int i = 0 ; i < time * 100; i++)
-	{
-		  __asm("NOP");
-	}
-}
-
-
-uint8_t CC1101_digitalRead(uint8_t signal)
-{
-	
-	switch (signal)
-	{
-		case MISO:
-		{
-			
-		}
-		break;
-		case CC1101_GDO0:
-		{
-			
-		}
-	  break;		
-	}	
-	return 1;	
-}
-
-void CC1101(int deviceAddress)
-{
-  carrierFreq = CFREQ_433;
-  channel = CC1101_DEFVAL_CHANNR;
-  syncWord[0] = CC1101_DEFVAL_SYNC1;
-  syncWord[1] = CC1101_DEFVAL_SYNC0;
-	if (deviceAddress == -1)
-		 devAddress = CC1101_DEFVAL_BROADCAST_ADDR; 
-	else {
-		 devAddress = deviceAddress & 0xFF;
-	}
-}
-
-static void wait_Miso()  
-{ 
-   delayUs(20);
-}
-
-static void delayMicroseconds(int delay)
-{
-	for (int i = 0 ; i < delay * ONE_MICROSEC_CYCLE; i++)
-	{
-		  __asm("NOP");
-	}
-  
-}
-
-
-/**
-	 * CC1101_setTxPowerAmp
-	 * 
-	 * Set PATABLE value
-	 * 
-	 * @param paLevel amplification value
-	 */
-void CC1101_setTxPowerAmp(uint8_t paLevel)
-{
-	CC1101_writeReg(CC1101_PATABLE, paLevel);
-}
- 
-
-
-/**
- * wakeUp
- * 
- * Wake up CC1101 from Power Down state
- */
-void CC1101_wakeUp(void)
-{
-  CC1101_Select();                      // Select CC1101
-  wait_Miso();                          // Wait until MISO goes low
-  CC1101_Deselect();                    // Deselect CC1101
-}
-
-/**
- * CC1101_writeReg
- * 
- * Write single register into the CC1101 IC via SPI
- * 
- * 'regAddr'	Register address
- * 'value'	Value to be writen
- */
-
-void Halt(char *str)
-{
-	printf("%s\n" , str);
-	while (1){}
-}
-
-uint8_t ReadStatus()
-{
-	  return CC1101_cmdStrobe(CC1101_SNOP);	
-}
-
-uint8_t CC1100_setIdleState(void)
-{
-    uint8_t marcState;
-
-	  CC1101_cmdStrobe(CC1101_SIDLE);
-   
-    marcState = 0xFF;                     //set unknown/dummy state value
-
-	  int timeOut = 100;
-    while(marcState != 0x01)              //0x01 = sidle
-    {
-			  marcState = CC1101_readStatusReg(CC1101_MARCSTATE) & 0x1F; //read out state of cc1100 to be sure in RX
-			  if (timeOut == 0)
-				{
-					 printf("SetIdle marcState : %d\n", marcState);
-					 return 0;
-				}
-				timeOut--;
-    }
-    //Serial.println();
-    delayMicroseconds(100);
-    return 1;
-}
-	
-static void CC1101_writeReg(byte regAddr, byte value) 
-{
-
-	uint8_t status[2];
-	
-  CC1101_Select();                      // Select CC1101
-  wait_Miso();                          // Wait until MISO goes low  
-	SPI1_Transmit(regAddr, value, status);
-	CC1101_Deselect();                    // Deselect CC1101
-
-}
-
-/**
- * writeBurstReg
- * 
- * Write multiple registers into the CC1101 IC via SPI
- * 
- * 'regAddr'	Register address
- * 'buffer'	Data to be writen
- * 'len'	Data length
- */
-void CC1101_writeBurstReg(byte regAddr, byte* buffer, byte len)
-{
-  
-  uint8_t status[len];
-	
-  CC1101_Select();                      // Select CC1101
-  wait_Miso();                          // Wait until MISO goes low
- 
-	SPI1_TransmitBurst(regAddr | WRITE_BURST, buffer, len, status);
-
-
-  CC1101_Deselect();                    // Deselect CC1101  
-}
-
-/**
- * CC1101_cmdStrobe
- * 
- * Send command strobe to the CC1101 IC via SPI
- * 
- * 'cmd'	Command strobe
- */     
-uint8_t CC1101_cmdStrobe(byte cmd) 
-{
-	byte status;
-  CC1101_Select();                      // Select CC1101
-  wait_Miso();                          // Wait until MISO goes low
-  uint8_t res = SPI1_TransmitStrobe(cmd, &status);
-	//printf("cmd probe status %x\n" , status);
-  CC1101_Deselect();                    // Deselect CC1101
-	
-	return res;
-}
-
-/**
- * readReg
- * 
- * Read CC1101 register via SPI
- * 
- * 'regAddr'	Register address
- * 'regType'	Type of register: CC1101_CONFIG_REGISTER or CC1101_STATUS_REGISTER
- * 
- * Return:
- * 	Data byte returned by the CC1101 IC
- */
-byte CC1101_readReg(byte regAddr, byte regType)
-{
-  byte val;
-	byte status;	
-  CC1101_Select();                      // Select CC1101		
-	wait_Miso();                          // Wait until MISO goes low	
-	SPI1_Receive(regAddr | regType, &val, &status);
-	
-  //printf("status %x  val = %d\n" , status, val);
-  CC1101_Deselect();                    // Deselect CC1101
-
-  return val;
-}
-
-
- 
-
-/**
- * readBurstReg
- * 
- * Read burst data from CC1101 via SPI
- * 
- * 'buffer'	Buffer where to copy the result to
- * 'regAddr'	Register address
- * 'len'	Data length
- */
-void CC1101_readBurstReg(byte *buffer, byte regAddr, byte len) 
-{
-  byte addr;
-  byte status[len];
-  addr = regAddr | READ_BURST;
-  CC1101_Select();                      // Select CC1101
-  wait_Miso();                          // Wait until MISO goes low
-	SPI1_ReceiveBurst(addr, buffer , len, status);
-	
-  CC1101_Deselect();                    // Deselect CC1101
-}
-
-/**
- * 
- * Reset CC1101
- */
-void CC1101_reset(void) 
-{
-
-	
-	/*
-
-	from the datasheet: 	
-	
-	Set SCLK = 1 and SI = 0, to avoid
-  potential problems with pin control mode
- (see Section 11.3).
- ? Strobe CSn low / high.
- ? Hold CSn low and then high for at least 40
- µs relative to pulling CSn low
- ? Pull CSn low and wait for SO to go low
- (CHIP_RDYn).
- ? Issue the SRES strobe on the SI line.
- ? When SO goes low again, reset is
- complete and the chip is in the IDLE state.
-	
-	*/
-	 
-	 
-	CC1101_Deselect();
-  delayUs(2000);
-	CC1101_Select();
-	delayUs(2000);
-	CC1101_Deselect();
-		
-  
-  wait_Miso();                          // Wait until MISO goes low
-	
-	 
-	CC1101_Select();		
-	uint8_t status;  
-	SPI1_TransmitStrobe(CC1101_SRES , &status);
-  wait_Miso();             
-	// When SO goes low again, reset is
-  // complete and the chip is in the IDLE state.
-
-  CC1101_Deselect();                    // Deselect CC1101
-
- 
-}
-
-/**
- * setCCregs
- * 
- * Configure CC1101 registers
- */
-
-void CC1101_SettingsFromMSP430(void)
-{
-
-	 uint8_t writeByte;
-//   uint8_t readByte;
-	#if 0 // check burst read write and single read write  - pass all
-	uint8_t temp[5] = {11,12,13,14,15};
-	uint8_t temp1[5] = {0};
-	CC1101_writeBurstReg(CC1101_IOCFG2,temp, sizeof(temp));
-	CC1101_readBurstReg(temp1, CC1101_IOCFG2, sizeof(temp1));
-	
-	while (1){}
-	#endif 
-	
-	
-	 int i;
-#ifdef PA_TABLE
-   uint8_t paTable[] = PA_TABLE;
-#endif
-	
-	for(i = 0; i < (sizeof  preferredSettings/sizeof(registerSetting_t)); i++) 
-	{
-			writeByte =  preferredSettings[i].data;
-			CC1101_writeReg( preferredSettings[i].addr, writeByte);
-  }
-	
-	
-  for(i = 0; i < (sizeof  preferredSettings/sizeof(registerSetting_t)); i++) 
-	{
-     //readByte = CC1101_readConfigReg( preferredSettings[i].addr);
-		 //printf("Address %d = 0x%x\n",preferredSettings[i].addr, readByte); 
-  }
-	
-	
-	#ifdef PA_TABLE
-		 // write PA_TABLE
-		 CC1101_writeBurstReg(CC11xL_PA_TABLE0,paTable, sizeof(paTable));
-	#endif
-	
-}
- 
-
-
-/**
- * init
- * 
- * Initialize CC1101 radio
- *
- * @param freq Carrier frequency
- * @param mode Working mode (speed, ...)
- */
-void CC1101_init(uint8_t freq, uint8_t mode)
-{
-  carrierFreq = freq;
-  workMode = mode;
-  
-  //pinMode(CC1101_GDO0, INPUT);          // Config GDO0 as input
-
-  CC1101_reset();                              // Reset CC1101
-
-  
-}
-
-/**
- * CC1101_setSyncWord
- * 
- * Set synchronization word
- * 
- * 'syncH'	Synchronization word - High byte
- * 'syncL'	Synchronization word - Low byte
- */
-void CC1101_setSyncWord1(uint8_t syncH, uint8_t syncL) 
-{
-  CC1101_writeReg(CC1101_SYNC1, syncH);
-  CC1101_writeReg(CC1101_SYNC0, syncL);
-  syncWord[0] = syncH;
-  syncWord[1] = syncL;
-}
-
-/**
- * CC1101_setSyncWord2 (overriding method)
- * 
- * Set synchronization word
- * 
- * 'syncH'	Synchronization word - pointer to 2-byte array
- */
-void CC1101_setSyncWord2(byte *sync) 
-{
-  CC1101_setSyncWord1(sync[0], sync[1]);
-}
-
-/**
- * setDevAddress
- * 
- * Set device address
- * 
- * @param addr	Device address
- */
-void CC1101_setDevAddress(byte addr) 
-{
-  CC1101_writeReg(CC1101_ADDR, addr);
-  devAddress = addr;
-}
-
-/**
- * setChannel
- * 
- * Set frequency channel
- * 
- * 'chnl'	Frequency channel
- */
-void CC1101_setChannel(byte chnl) 
-{
-  CC1101_writeReg(CC1101_CHANNR,  chnl);
-  channel = chnl;
-}
-
-bool CC1101_IsExist(void)
-{
-	
-	byte version = CC1101_readReg(CC1101_VERSION, CC1101_STATUS_REGISTER);
-	printf("version = %d\n\r", version);
-	//HAL_Delay(1000);	//Eyal Gerber: This delay is irrelevant.
-	if (version == 0x14 /*0x14*/) // the version is subject to change , in the datasheet its 20
-		return 1;
-	
-	return 0;
-}
-
-/**
- * setCarrierFreq
- * 
- * Set carrier frequency
- * 
- * 'freq'	New carrier frequency
- */
-void CC1101_setCarrierFreq(byte freq)
-{
-  switch(freq)
-  {
-    case CFREQ_915:
-      CC1101_writeReg(CC1101_FREQ2,  CC1101_DEFVAL_FREQ2_915);
-      CC1101_writeReg(CC1101_FREQ1,  CC1101_DEFVAL_FREQ1_915);
-      CC1101_writeReg(CC1101_FREQ0,  CC1101_DEFVAL_FREQ0_915);
-      break;
-    case CFREQ_433:
-      CC1101_writeReg(CC1101_FREQ2,  CC1101_DEFVAL_FREQ2_433);
-      CC1101_writeReg(CC1101_FREQ1,  CC1101_DEFVAL_FREQ1_433);
-      CC1101_writeReg(CC1101_FREQ0,  CC1101_DEFVAL_FREQ0_433);
-      break;
-    case CFREQ_918:
-      CC1101_writeReg(CC1101_FREQ2,  CC1101_DEFVAL_FREQ2_918);
-      CC1101_writeReg(CC1101_FREQ1,  CC1101_DEFVAL_FREQ1_918);
-      CC1101_writeReg(CC1101_FREQ0,  CC1101_DEFVAL_FREQ0_918);
-      break;
-    default:
-      CC1101_writeReg(CC1101_FREQ2,  CC1101_DEFVAL_FREQ2_868);
-      CC1101_writeReg(CC1101_FREQ1,  CC1101_DEFVAL_FREQ1_868);
-      CC1101_writeReg(CC1101_FREQ0,  CC1101_DEFVAL_FREQ0_868);
-      break;
-  }
-   
-  carrierFreq = freq;  
-}
-
-/**
- * setPowerDownState
- * 
- * Put CC1101 into power-down state
- */
-void CC1101_setPowerDownState(void) 
-{
-  // Comming from RX state, we need to enter the IDLE state first
-  CC1101_cmdStrobe(CC1101_SIDLE);
-  // Enter Power-down state
-  CC1101_cmdStrobe(CC1101_SPWD);
-	
-}
-
-
-
-
-/**
- * receiveData
- * 
- * Read data packet from RX FIFO
- *
- * 'packet'	Container for the packet received
- * 
- * Return:
- * 	Amount of bytes received
- */
-byte CC1101_receiveData1(CCPACKET * packet)
-{
-  byte val;
-  byte rxBytes = CC1101_readStatusReg(CC1101_RXBYTES);
-	printf("rxBytes: %d\n" , rxBytes);
-
-  // Any byte waiting to be read and no overflow?
-  if (rxBytes & 0x7F && !(rxBytes & 0x80))
-  {
-    // Read data length
-    packet->length = CC1101_readConfigReg(CC1101_RXFIFO);
-    // If packet is too long
-    if (packet->length > CCPACKET_DATA_LEN)
-      packet->length = 0;   // Discard packet
-    else
-    {
-      // Read data packet
-      CC1101_readBurstReg(packet->data, CC1101_RXFIFO, packet->length);
-      // Read RSSI
-      packet->rssi = CC1101_readConfigReg(CC1101_RXFIFO);
-      // Read LQI and CRC_OK
-      val = CC1101_readConfigReg(CC1101_RXFIFO);
-      packet->lqi = val & 0x7F;
-      packet->crc_ok = bitRead(val, 7);
-    }
-  }
-  else
-    packet->length = 0;
-
-  CC1100_setIdleState();       // Enter IDLE state
-  flushRxFifo();        // Flush Rx FIFO
-  //cmdStrobe(CC1101_SCAL);
-
-  // Back to RX state
-  CC1101_setRxState();
-
-  return packet->length;
-}
-
-/**
- * setRxState
- * 
- * Enter Rx state
- */
-void CC1101_setRxState(void)
-{
-  CC1101_cmdStrobe(CC1101_SRX);
-  rfState = RFSTATE_RX;
-}
-/**
- * setTxState
- * 
- * Enter Tx state
- */
-void CC1101_setTxState(void)
-{
-  CC1101_cmdStrobe(CC1101_STX);
-  rfState = RFSTATE_TX;
-}
-
-
-
-/***********************************************************
-
-Function name: CC1101_receiveData
-
-Function type: byte
-
-Arguments: uint8_t *rxData, uint8_t *overallSize
-
-Return: byte, depende on the amount of data received.
-
-Description: This function is responsible of receiving
-the data that come over RF.
-
-**********************************************************/
-byte CC1101_receiveData(uint8_t *rxData, uint8_t *overallSize)
-{
-	 #ifdef GENERAL_INDICATIONS
-		printf("within CC1101 receive function\n\r");
-	 #endif
-	 uint8_t RXTempArr[64] = {0};
-   uint8_t rxBytes;
-   uint8_t rxBytesVerify;	 	 
-	 // set radio back in RX
-   CC1101_setRxState();
-	 StartRXFlag = FALSE;
-	 rxBytesVerify = CC1101_readStatusReg(CC1101_RXBYTES);
-	 uint32_t loopTimeout = HAL_GetTick();
-	 do
-	 {
-		 rxBytes = rxBytesVerify;
-		 rxBytesVerify = CC1101_readStatusReg(CC1101_RXBYTES);
-	 }
-	 while((rxBytes != rxBytesVerify) && (HAL_GetTick() - loopTimeout < CC1101_RECEIVE_LOOP_TIMEOUT));
-	 if (rxBytes == 0)
-	 {
-		  printf("no data\n\r");
-		  return  0x03;
-	 }
-	 
-	 if (rxBytes > 64)
-	 {
-		 printf("error in rx size is > 64\n");
-		 //flushRxFifo();
-		 return 0;
-	 }
-	
-	 
-	 uint8_t TempArr4Encryption1[64] = {0};
-	 uint8_t TempArr4Encryption2[RF_ONE_PAYLOAD_MAX_SIZE] = {0};
-	 uint8_t TempArr4Encryption3[RF_ONE_PAYLOAD_MAX_SIZE] = {0};		 
-	 
-	 //CC1101_readBurstReg(RXTempArr , CC1101_RXFIFO, rxBytes); 
-	 
-	 CC1101_readBurstReg(TempArr4Encryption1 , CC1101_RXFIFO, rxBytes); 
-	 
-//	 for(uint8_t k=0;k<64;k++)
-//	 {
-//		 printf("TempArr4Encryption1[%d] = %x\n\r", k, TempArr4Encryption1[k]);
-//	 }
-	 
-	 for(uint8_t i=5;i
-
-
-//0x08: PKTCTRL0 – Packet Automation Control
-typedef union
-{
-    uint8_t Value;
-
-    struct
-    {
-        unsigned LENGTH_CONFIG:2;
-        unsigned CRC_EN:1;
-        unsigned reserved:1;
-        unsigned PKT_FORMAT:2;
-        unsigned WHITE_DATA:1;
-        unsigned reserved2:1;
-
-    }u;
-
-} PKTCTRL0;
-
-
-//0x07: PKTCTRL1 – Packet Automation Control
-
-typedef union
-{
-    uint8_t Value;
-
-    struct
-    {
-        unsigned ADR_CHK:2;
-        unsigned APPEND_STATUS:1;
-        unsigned CRC_AUTOFLUSH:1;
-        unsigned reserved:1;
-        unsigned PQT:3;
-    }u;
-
-} PKTCTRL1;
-
-
-#endif
-
-
-
-
diff --git a/Src/common.c b/Src/common.c
deleted file mode 100755
index 0395c1c7..00000000
--- a/Src/common.c
+++ /dev/null
@@ -1,70 +0,0 @@
-/* ========================================
- *
- * Copyright AIO Systems, 2018
- * Written by Novodes for AIO Systems
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO Systems.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : common.c
-  * @brief          : This file contains functions related to general elements 
-                      and functions that are used by all and could not be 
-                      categorized in a dedicated file. 
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-#include "common.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
- 
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions ---------------------------------------------------------*/
-
-/**
-  * @brief  This function disables interrupts in the system
-  * @param  None
-  * @retval None
-  */
-void Disable_Interrupts(void)
-{
-  __disable_irq();
-}
-
-/**
-  * @brief  This function enables interrupts in the system
-  * @param  None
-  * @retval None
-  */
-void Enable_Interrupts(void)
-{
-  __enable_irq();
-}
-
-
-/**
-  * @brief  This function performs a system reset
-  * @param  None
-  * @retval None
-  */
-void SystemReset(void)
-{
-  HAL_NVIC_SystemReset();
-}
-
-/************************ (C) COPYRIGHT AIO Systems *****END OF FILE****/
diff --git a/Src/encryption.c b/Src/encryption.c
deleted file mode 100755
index b075d8be..00000000
--- a/Src/encryption.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/* ========================================
- *
- * Copyright AIO Systems, 2018
- * Written by Novodes for AIO Systems
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO Systems.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : encryption.c
-  * @brief          : This is a user application driver for encryption
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-#include "encryption.h"
-#include "main.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
-
-//CRYP_HandleTypeDef hcryp;
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions ---------------------------------------------------------*/
-
-/**
-  * @brief  This function encryptes an array of bytes. The function uses the polling
-						method of the encryption module. Therefore, this function is blocking.
-  * @param  uint8_t *InputArray	-	pointer to the array of bytes to encrypt
-						uint16_t Byte_Num	- the number of bytes to encrypt
-						uint8_t *EncryptedArray	- pointer to the encrypted array
-  * @retval None
-  */
-void Encrypt_Data(uint8_t *InputArray, uint16_t Byte_Num, uint8_t *EncryptedArray)
-{
-	if (HAL_CRYP_DeInit(&hcryp) != HAL_OK)
-  {
-    #ifdef ENCRYPTION_LOGS
-      printf("AES DeInit Failed\r\n");
-    #endif
-  }    
-	
-	MX_AES_Init();
-	
-	if (HAL_CRYP_AESECB_Encrypt(&hcryp, InputArray, Byte_Num, EncryptedArray, ENCRYPTION_TIMEOUT_VALUE) != HAL_OK)
-	{
-		#ifdef ENCRYPTION_LOGS
-      printf("AES Encryption Failed\r\n");
-    #endif
-	}  
-}
-
-/**
-  * @brief  This function decryptes an array of bytes. The function uses the polling
-						method of the encryption module. Therefore, this function is blocking.
-  * @param  uint8_t *EncryptedArray	-	pointer to the array of encrypted bytes
-						uint16_t Byte_Num	- the number of bytes to decrypt
-						uint8_t *DecryptedArray	- pointer to the decrypted array
-  * @retval None
-  */
-void Decrypt_Data(uint8_t *EncryptedArray, uint16_t Byte_Num, uint8_t *DecryptedArray)
-{
-	if (HAL_CRYP_DeInit(&hcryp) != HAL_OK)
-  {
-    #ifdef ENCRYPTION_LOGS
-      printf("AES DeInit Failed\r\n");
-    #endif
-  }    
-	
-	MX_AES_Init();
-	
-	if (HAL_CRYP_AESECB_Decrypt(&hcryp, EncryptedArray, Byte_Num, DecryptedArray, ENCRYPTION_TIMEOUT_VALUE) != HAL_OK)
-	{
-		#ifdef ENCRYPTION_LOGS
-      printf("AES Decryption Failed\r\n");
-    #endif
-	}  
-}
-  
-  
-/************************ (C) COPYRIGHT AIO Systems *****END OF FILE****/
diff --git a/Src/external_flash.c b/Src/external_flash.c
deleted file mode 100755
index 4f457fc2..00000000
--- a/Src/external_flash.c
+++ /dev/null
@@ -1,865 +0,0 @@
-/* ========================================
- *
- * Copyright AIO Systems, 2018
- * Written by Novodes for AIO Systems
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO Systems.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : external_flash.c
-  * @brief          : This file contains functions related to the external flash
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-
-#include "external_flash.h"
-#include "gpio.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-#define FLASHBUSY_TIMEOUT		100			// [msec] timeout theshold for waiting for flash to finish being busy
-
-/* Private macro -------------------------------------------------------------*/
-
-#define EXT_FLASH_CS_LOW()	GPIO_SetVal(SPI1_NNS,LOW)
-#define EXT_FLASH_CS_HIGH()	GPIO_SetVal(SPI1_NNS,HIGH)
-#define EXT_FLASH_GET_TICK()	HAL_GetTick()							// for getting the tick timer counter [msec]
-
-/* Private variables ---------------------------------------------------------*/
- 
-/* Private function prototypes -----------------------------------------------*/
-
-uint32_t EXTERNAL_FLASH_EnableWriting(void);
-uint32_t EXTERNAL_FLASH_WaitUntilFlashNotBusy(void);
-void CS_ENABLE(void);
-void CS_DISABLE(void);
-
-/* Exported functions ---------------------------------------------------------*/
-
-/**
-  * @brief  This function initiates the external flash - all that is needed is to drive the CS (chip select) HIGH
-  * @param  None
-  * @retval None
-  */
-void EXTERNAL_FLASH_Init(void)
-{
-    //Set SPI_CS high                  
-    GPIO_SetVal(SPI1_NNS,HIGH);                   
-}
-
-/**
-  * @brief  This function sets the CS (chip select) line to LOW
-  * @param  None
-  * @retval None
-  */
-void CS_ENABLE(void)
-{
-	GPIO_SetVal(SPI1_NNS,LOW); // Set MEM_CS pin to Low
-}
-
-/**
-  * @brief  This function sets the CS (chip select) line to HIGH
-  * @param  None
-  * @retval None
-  */
-void CS_DISABLE(void)
-{
-	GPIO_SetVal(SPI1_NNS,HIGH); // Set MEM_CS pin to HIGH
-}
-
-/**
-  * @brief  This function reads the external flash device ID, memory type and memory density (command RDID in datasheet)
-  * @param  uint8_t *manufacturerIdPtr	-	pointer to manufacturer ID into which the value is assigned
-						uint8_t *memTypePtr	-	pointer to memory type into which the value is assigned
-						uint8_t *memDensityPtr	-	pointer to memory density into which the value is assigned
-  * @retval uint32_t - error code
-  */
-uint32_t EXTERNAL_FLASH_ReadDeviceID(uint8_t *manufacturerIdPtr,uint8_t *memTypePtr,uint8_t *memDensityPtr)
-{
-    uint32_t retErr=PASS;
-    uint8_t WriteBuffer[5], buff_len;
-		uint8_t rxData[4] = {0};
-    
-
-		// Prepare WriteBuffer for transmit. Command with dummy bytes.
-		WriteBuffer[0] = RDID_REG;
-		WriteBuffer[1] = 0u;
-		WriteBuffer[2] = 0u;
-		WriteBuffer[3] = 0u;
-		buff_len = 4u;
-		
-		// Set MEM_CS pin to Low
-		EXT_FLASH_CS_LOW();
-		
-		// Send ReadDeviceID command to the external flash and receive the data back fast.
-		retErr = HAL_SPI_TransmitReceive(&hspi1, WriteBuffer, rxData, buff_len, SPI_EXT_FLASH_POLLING_TIMEOUT);
-		
-		// Set MEM_CS pin to High
-		EXT_FLASH_CS_HIGH();
-		
-    if( retErr == PASS )
-    {
-			// Skip the first byte, Read the ManufacturerID & Memory type and Memory Density from the rx buffer (should be C2 28 14 respectively for MX25R8035F)
-			*manufacturerIdPtr = rxData[1];
-			*memTypePtr = rxData[2];
-			*memDensityPtr = rxData[3];
-    }
-
-		// wait until the flash is no longer busy and only then continue (or until a timeout occurs)
-    retErr = EXTERNAL_FLASH_WaitUntilFlashNotBusy();
-		
-		if( retErr != PASS )
-    {
-        #ifdef FLASH_LOGGER
-            printf("\n\n\rEXTERNAL_FLASH_ReadDeviceID: Read device ID procedure failed with return code: %x\n\r",retErr);     
-        #endif
-        ;
-    }
-
-    return retErr;
-}
-
-/**
-  * @brief  This function performs a blocking check (polling) to wait until the flash is not busy anymore or a timeout occurs.
-						This function is used by the various other external flash functions such as write, read, erase, etc. 
-  * @param  None
-  * @retval uint32_t - error code
-  */
-uint32_t EXTERNAL_FLASH_WaitUntilFlashNotBusy(void)
-{
-	Tick_Counter tickstart = 0u;
-	uint32_t retErr=PASS;
-	bool busyFlg = TRUE;
-	
-	tickstart = EXT_FLASH_GET_TICK();	// sample the tick timer
-	while( (busyFlg == TRUE) && (retErr == PASS) )	// while the flash is still busy and the timeout period hasn't elapsed
-	{
-			EXTERNAL_FLASH_IsFlashBusy(&busyFlg);    
-			if(EXT_FLASH_GET_TICK() - tickstart > FLASHBUSY_TIMEOUT)
-				retErr = FLASH_TIMEOUT_ERROR;
-	}
-	
-	return retErr;
-}
-
-
-/*
- * Function:       IsFlashBusy.   Check WIP bit in "Read Status Register"
- * Arguments:      None.
- * Description:    Check status register WIP bit.
- *                 If  WIP bit = 1: return TRUE ( Busy )
- *                             = 0: return FALSE ( Ready ).
- * Return Message: TRUE, FALSE
- */
-uint32_t EXTERNAL_FLASH_IsFlashBusy(bool *busyPtr)
-{
-    uint32_t retErr = PASS;
-    uint8_t WriteBuffer[5], buff_len, tmpBuffer;
-		uint8_t rxData[2] = {0};
-    
-    // Prepare WriteBuffer for transmit. "Read Status Register" Command with dummy bytes.
-    WriteBuffer[0] = RDSR_REG;
-    WriteBuffer[1] = 0u;
-    buff_len = 2u;
-     
-    // Set MEM_CS pin to Low
-		EXT_FLASH_CS_LOW();		
-
-    // Send ReadDeviceID command to the external flash and receive the data back fast.
-		retErr = HAL_SPI_TransmitReceive(&hspi1, WriteBuffer, rxData, buff_len, SPI_EXT_FLASH_POLLING_TIMEOUT);
-        
-		// Set MEM_CS pin to High
-		EXT_FLASH_CS_HIGH();	
-
-    if( retErr == PASS )
-    {
-        // Skip the first byte
-        tmpBuffer = rxData[1];
-			
-        //iprintf (" WIP bit is: %x \n", tmpBuffer);
-    
-        if( (tmpBuffer & FLASH_WIP_MASK) == FLASH_WIP_MASK)
-          *busyPtr= TRUE;
-        else
-					*busyPtr=FALSE;
-    }
-		
-    if( retErr != PASS )
-		{
-				#ifdef FLASH_LOGGER
-						printf("\n\n\rEXTERNAL_FLASH_IsFlashBusy: Error during checking if flash is busy, return code is: %d\n\r",retErr);     
-				#endif
-				;   
-		} 
-    
-    return retErr;
-}
-
-/**
-  * @brief  This function enables the writing to the external flash - required by some commands
-						Set WREN. Sets the (WEL) write enable latch bit
-  * @param  None
-  * @retval uint32_t - error code
-  */
-uint32_t EXTERNAL_FLASH_EnableWriting(void)
-{
-    uint32_t retErr = PASS;
-		uint8_t WriteBuffer[1], buff_len;
-		uint8_t rxData[2] = {0};  
-    
-		WriteBuffer[0] = WREN_REG;	// put the Write Enable command into the write buffer
-		buff_len = 1;		// the length of the buffer is one byte
-		
-    // Set MEM_CS pin to Low
-		EXT_FLASH_CS_LOW();
-    
-		// Send WriteEnable command byte to set WEL bit.
-		retErr = HAL_SPI_TransmitReceive(&hspi1, WriteBuffer, rxData, buff_len, SPI_EXT_FLASH_POLLING_TIMEOUT);
-		
-		// Set MEM_CS pin to High
-		EXT_FLASH_CS_HIGH(); 
- 
-		// wait until the flash is no longer busy and only then continue (or until a timeout occurs)
-    retErr = EXTERNAL_FLASH_WaitUntilFlashNotBusy();
-		
-		if( retErr != PASS )
-    {
-        #ifdef FLASH_LOGGER
-            printf("\n\n\rEXTERNAL_FLASH_EnableWriting: Enable writing procedure failed with return code: %x\n\r",retErr);     
-        #endif
-        ;
-    }
-    
-    return retErr;
-}
-
-/*******************************************************************
-*   @Function: EXTERNAL_FLASH_WriteData
-*   @Description: Write data to the flash - write any amount of data as long as does not exceed the size of the flash.
-                      The data is written to the flash using the page program comamnd. 
-                      In case the addresses written are on different pages then it will perform several page program commands
-                      so that the data will be written correctly. 
-                      It is assumed that the data is already erased (0xFF) at the relevant addresses. 
-                      It is assumed that the area to write to is within the limits of the flash and that there will be no
-                      overflow beyond the last address of the flash. 
-*   @Input argumments: uint32_t address - start address of memory
-                      uint16_t data_length - amount of bytes to write
-                      uint8_t *data - pointer to array of data
-*   @Output argumments: uint32_t retErr -  Error code
-*******************************************************************/
-uint32_t EXTERNAL_FLASH_WriteData(uint32_t address, uint16_t data_length, uint8_t *data)
-{
-  uint32_t retErr=PASS;
-  uint16_t buff_len_for_calc;
-  uint8_t *buffer_pointer;
-  uint16_t bytes_until_end_of_page = 0;
-  
-  buffer_pointer = data; 
-  buff_len_for_calc = data_length;
-  
-  bytes_until_end_of_page = (uint16_t)(EXTERNAL_FLASH_PAGE_SIZE - (address % EXTERNAL_FLASH_PAGE_SIZE));  // number of bytes until the end of the current page where "address" is located
-  if( buff_len_for_calc <= bytes_until_end_of_page )   // if the number of bytes to write fits within the current page
-  {
-    retErr = EXTERNAL_FLASH_PageProgram(address, buff_len_for_calc, buffer_pointer);        // write to the flash the number of bytes required
-    //buffer_pointer += buff_len_for_calc;  // increment the pointer by the number of bytes written to the flash
-    //address += buff_len_for_calc; // adjust the address to be equal to the next place we need to write data to (the beginning of the next page)
-    buff_len_for_calc = 0;       // decrease the size of the data to be written by the amount just written
-  }
-  else  // if there is an overflow beyond the first page.
-  {
-    retErr = EXTERNAL_FLASH_PageProgram(address, bytes_until_end_of_page, buffer_pointer);        // write to the flash until the end of the page
-    buffer_pointer += bytes_until_end_of_page;  // increment the pointer by the number of bytes written to the flash
-    address += bytes_until_end_of_page; // adjust the address to be equal to the next place we need to write data to (the beginning of the next page)
-    buff_len_for_calc -= bytes_until_end_of_page;       // decrease the size of the data to be written by the amount just written
-  }
-
-  for( ; buff_len_for_calc!=0 ;  )
-  {
-      if(buff_len_for_calc <= EXTERNAL_FLASH_PAGE_SIZE)   // if the remaining bytes to write are less than a full EXTERNAL_FLASH_PAGE_SIZE
-      {
-        retErr = EXTERNAL_FLASH_PageProgram(address, buff_len_for_calc, buffer_pointer); 
-        break;  // end of writing to flash
-      }
-      else        // send maximum possible with page program command (256 bytes)
-      {
-        retErr = EXTERNAL_FLASH_PageProgram(address, EXTERNAL_FLASH_PAGE_SIZE, buffer_pointer);
-        if(retErr!=PASS)
-          break;
-        buffer_pointer += EXTERNAL_FLASH_PAGE_SIZE;    // increment the pointer by the amount we just wrote to the flash
-        address += EXTERNAL_FLASH_PAGE_SIZE; // adjust the address to be equal to the next place we need to write data to (the beginning of the next page)
-        buff_len_for_calc -= EXTERNAL_FLASH_PAGE_SIZE;       // decrease the size of the data to be written by the amount just written
-      }
-  }
-  
-  return retErr;
-}
-
-/*******************************************************************
-*   @Function: EXTERNAL_FLASH_WriteData_Automatic
-*   @Description: Write data to the flash - write any amount of data as long as does not exceed the size of the flash.
-                      The data is written to the flash using the page program comamnd. 
-                      In case the addresses written are on different pages then it will perform several page program commands
-                      so that the data will be written correctly. 
-                      When using this function, it isn't required to have the designated area already erased since the function takes care of that
-											by:
-											Case 1: The relevant pages to write to are all in the same sector - saving temperarly the data of the sector in which the relevant pages are located
-															to a designated sector in the flash. Then erase the sector and rewrite the temperarly stored data to the sector together with the new data. 
-											Case 2: The relevant pages to write to are in two sectors - Do the same thing as in Case 1 just twice - once for each sector. 
-											Case 3 (NOT SUPPORTED): The relevant pages to write to are in three or more sectors - not supported since it would require a lot of RAM (each sector is 4K) so it would require
-															at least 8K RAM which the current MCU does not have. 
-											Assumptions:
-                      1. It is assumed that the area to write to is within the limits of the flash and that there will be no
-                         overflow beyond the last address of the flash. 
-											2. It is assumbed that the received address does not fall within the holding sectors
-*   @Input argumments: uint32_t received_address - address of where to begin to write in the memory
-                      uint16_t data_length - amount of bytes to write
-                      uint8_t *data - pointer to array of data
-*   @Output argumments: uint32_t retErr -  Error code
-*******************************************************************/
-uint32_t EXTERNAL_FLASH_WriteData_Automatic(uint32_t received_address, uint16_t data_length, uint8_t *data)
-{
-  uint32_t retErr=PASS;
-  uint16_t buff_len_for_calc;
-  uint8_t *buffer_pointer;
-  uint16_t bytes_until_end_of_page = 0;				// the number of bytes from the end of the page (from the received address) counting from the received address
-	uint16_t bytes_until_received_address = 0;	// the number of bytes until the recieved address from the beginning of the page it is located in
-	static uint16_t sector_index = FIRST_SECTOR_INDEX_FOR_MEM_HOLD;	// this must be static so that we remember what was the previous sector that we erased/programmed
-	uint32_t beginning_of_holding_sector, beginning_of_second_holding_sector;
-	uint32_t counter_address; 									// variable used for counting and progressing the memory in "for" loops
-	uint32_t end_address_of_data;								// variable that holds the memory address of the last byte that needs to be written
-	uint32_t relative_address; 
-	uint32_t current_sector;	// the current sector in which the received address is located
-	uint32_t last_sector; 		// the last sector in which the last byte to be written to is located
-	uint32_t beginning_of_current_sector, beginning_of_second_sector;
-	static uint8_t COPY_ARRAY[EXTERNAL_FLASH_PAGE_SIZE] = {0};	// array used for copying data between sectors. Initialize it to zeros for easier debugging. 
-	uint8_t write_two_sectors_flag = FALSE;	// flag that indicates whether the data that needs to be written is over two sectors and not just one. 
-	uint32_t write_sector_address, holding_sector_address;
-	
-	//################CODE SECTION SEPARATOR#####################################
-	// perform memory boundry check to see if the received memory address falls within the limits of the external flash at all. 
-	end_address_of_data = received_address + data_length; // variable that holds the memory address of the last byte that needs to be written
-	if( (received_address > EXTERNAL_FLASH_SIZE) || (end_address_of_data > EXTERNAL_FLASH_SIZE) )	// both received_address and end_address_of_data are checked because end_address_of_data could potentially be overflowed and be within limits
-	{
-		retErr = FLASH_MEM_BOUNDRY_ERROR;
-		#ifdef FLASH_LOGGER
-				printf("\n\nEXTERNAL_FLASH_WriteData_Automatic: Address exceeded flash limits, return code is: 0x%x\n\r",retErr);     
-		#endif
-		return retErr; 
-	}
-	
-	//make relevant calculations regarding the current sector
-	current_sector = received_address / BASE_SECTOR_SIZE;	// calculate the current sector in which the received address is located
-	//end_of_current_sector = (current_sector * (BASE_SECTOR_SIZE + 1)) - 1 ;
-	beginning_of_current_sector = current_sector * BASE_SECTOR_SIZE;
-	
-	//check to see if the data to be written overflows into the following sector
-	last_sector = end_address_of_data / BASE_SECTOR_SIZE; // calculate the sector in which the last address to be written is located
-	if( last_sector != current_sector)	// if the last address to write to is not within the current sector
-	{
-		write_two_sectors_flag = TRUE;	// set the flag indicating that two sectors need to be written to	
-		beginning_of_second_sector = last_sector * BASE_SECTOR_SIZE;
-		
-		if( last_sector - current_sector > 1)	// if the last sector to write to is not the sector right after the current sector (i.e. more than two sectors need to be written too)
-		{
-			retErr = FLASH_MEM_MAX_SECTOR_NUM_ERROR;
-			#ifdef FLASH_LOGGER
-					printf("\n\nEXTERNAL_FLASH_WriteData_Automatic: data is to be written over three or more sectors (max allowed is two), return code is: 0x%x\n\r",retErr);     
-			#endif
-			return retErr; 
-		}	
-	}
-	
-	// perform another memory boundry check to see if the received memory falls within the limits of the holding sectors
-	if( (current_sector >= FIRST_SECTOR_INDEX_FOR_MEM_HOLD) && (current_sector <= LAST_SECTOR_INDEX_FOR_MEM_HOLD))
-	{
-		retErr = FLASH_MEM_HOLD_SECTOR_BOUNDRY_ERROR;
-		#ifdef FLASH_LOGGER
-				printf("\n\nEXTERNAL_FLASH_WriteData_Automatic: Current Sector is %d, Address is within holding sector limits, return code is: 0x%x\n\r",current_sector,retErr);     
-		#endif
-		return retErr; 
-	}
-	
-	//################CODE SECTION SEPARATOR#####################################
-	//Erase the designated memory holding sectors for copying the memory to it temporarily. 
-	//The memory holding sectors are a group of sectors that each time, a different sector is erased in a loop
-	//as a wear leveling technique to prevent the erosion of the flash which is limited in the number of its
-	//erase cycles (100,000) per sector. 
-	beginning_of_holding_sector = sector_index * BASE_SECTOR_SIZE;
-	EXTERNAL_FLASH_EraseSector(beginning_of_holding_sector);	// erase the relevant holding sector
-	sector_index++;
-	if(sector_index > LAST_SECTOR_INDEX_FOR_MEM_HOLD)
-		sector_index = FIRST_SECTOR_INDEX_FOR_MEM_HOLD;
-	
-	if(write_two_sectors_flag == TRUE)	// if there is another sector that needs to be written to
-	{
-		beginning_of_second_holding_sector = sector_index * BASE_SECTOR_SIZE;
-		EXTERNAL_FLASH_EraseSector(beginning_of_second_holding_sector);	// erase the relevant holding sector
-		sector_index++;
-		if(sector_index > LAST_SECTOR_INDEX_FOR_MEM_HOLD)
-			sector_index = FIRST_SECTOR_INDEX_FOR_MEM_HOLD;
-	}
-	
-	//################CODE SECTION SEPARATOR#####################################
-	//copy the entire current sector to the holding sector
-	for( counter_address = 0 ; counter_address < BASE_SECTOR_SIZE ; counter_address += EXTERNAL_FLASH_PAGE_SIZE )
-	{
-		retErr = EXTERNAL_FLASH_ReadData(counter_address + beginning_of_current_sector, COPY_ARRAY, EXTERNAL_FLASH_PAGE_SIZE);	// read data from current sector
-		if(retErr!=PASS)
-			return retErr;
-		
-		retErr = EXTERNAL_FLASH_PageProgram(counter_address + beginning_of_holding_sector, EXTERNAL_FLASH_PAGE_SIZE, COPY_ARRAY);        // write to the holding sector the copied data
-		if(retErr!=PASS)
-			return retErr;
-		
-		if(write_two_sectors_flag == TRUE)	// if there is another sector that needs to be written to
-		{
-			retErr = EXTERNAL_FLASH_ReadData(counter_address + beginning_of_second_sector, COPY_ARRAY, EXTERNAL_FLASH_PAGE_SIZE);	// read data from current sector
-			if(retErr!=PASS)
-				return retErr;
-			
-			retErr = EXTERNAL_FLASH_PageProgram(counter_address + beginning_of_second_holding_sector, EXTERNAL_FLASH_PAGE_SIZE, COPY_ARRAY);        // write to the holding sector the copied data
-			if(retErr!=PASS)
-				return retErr;
-		}
-	}
-	
-	//################CODE SECTION SEPARATOR#####################################
-	// erase the sectors to which we need to write
-	EXTERNAL_FLASH_EraseSector(beginning_of_current_sector);	// erase the current sector
-	if(write_two_sectors_flag == TRUE)	// if there is another sector that needs to be written to
-		EXTERNAL_FLASH_EraseSector(beginning_of_second_sector);	// erase the second sector
-	
-	//################CODE SECTION SEPARATOR#####################################
-	//Calculate relative addresses
-	relative_address = received_address % BASE_SECTOR_SIZE;	// calculate the relative address within the sector of the received address. For example, since the sector size is 0x1000 then whether the received address is 0x0300 (sector 0) or 0x1300 (sector 1), the relative address is 0x0300
-	//relative_page_index = relative_address / EXTERNAL_FLASH_PAGE_SIZE;	// calculate the relative page index within the sector of the received address. For example, since the sector size is 0x1000 and the page size is 256 then whether the received address is 0x0300 (sector 0) or 0x1300 (sector 1), the relative page index is 1 (index count starts from 0)
-	//relative_address_within_page = relative_address % EXTERNAL_FLASH_PAGE_SIZE; // calculate the relative address within a page of the received address. For example, since the page size is 256 then whether the received address is 0x0300 or 0x1300, the relative address within the page is 44 (300-256 = 44)
-	
-	//Copy back from the holding sector the data up until the received address and write it back to the current sector
-	for( counter_address = 0 ; counter_address < relative_address ; )
-	{
-		if( (relative_address - counter_address) >= EXTERNAL_FLASH_PAGE_SIZE)	// if more than EXTERNAL_FLASH_PAGE_SIZE bytes are left until the received address
-		{
-			retErr = EXTERNAL_FLASH_ReadData(counter_address + beginning_of_holding_sector, COPY_ARRAY, EXTERNAL_FLASH_PAGE_SIZE);	// read data from holding sector
-			if(retErr!=PASS)
-				return retErr;
-			
-			retErr = EXTERNAL_FLASH_PageProgram(counter_address + beginning_of_current_sector, EXTERNAL_FLASH_PAGE_SIZE, COPY_ARRAY);        // write to the current sector the copied data
-			if(retErr!=PASS)
-				return retErr;
-			
-			counter_address += EXTERNAL_FLASH_PAGE_SIZE; // increment the counter
-		}
-		else 	// if less than EXTERNAL_FLASH_PAGE_SIZE bytes are left until the received address
-		{
-			bytes_until_received_address = (uint16_t)(relative_address - counter_address);	// how many bytes are left to write until reaching the relative address within the sector from the current counter_address.
-			retErr = EXTERNAL_FLASH_ReadData(counter_address + beginning_of_holding_sector, COPY_ARRAY, bytes_until_received_address);	// read data from holding sector
-			if(retErr!=PASS)
-				return retErr;
-			
-			retErr = EXTERNAL_FLASH_PageProgram(counter_address + beginning_of_current_sector, bytes_until_received_address, COPY_ARRAY);        // write to the current sector the copied data
-			if(retErr!=PASS)
-				return retErr;
-			
-			counter_address += bytes_until_received_address; // increment the counter
-		}
-	}
-	
-	//################CODE SECTION SEPARATOR#####################################
-	// Write the new data to the memory starting from the received address: 
-  buffer_pointer = data; 
-  buff_len_for_calc = data_length;
-  
-  bytes_until_end_of_page = (uint16_t)(EXTERNAL_FLASH_PAGE_SIZE - (received_address % EXTERNAL_FLASH_PAGE_SIZE));  // number of bytes until the end of the current page where "received_address" is located
-  if( buff_len_for_calc <= bytes_until_end_of_page )   // if the number of bytes to write fits within the current page
-  {
-    retErr = EXTERNAL_FLASH_PageProgram(received_address, buff_len_for_calc, buffer_pointer);        // write to the flash the number of bytes required
-    //buffer_pointer += buff_len_for_calc;  // increment the pointer by the number of bytes written to the flash
-    //received_address += buff_len_for_calc; // adjust the received_address to be equal to the next place we need to write data to (the beginning of the next page)
-    buff_len_for_calc = 0;       // decrease the size of the data to be written by the amount just written
-  }
-  else  // if there is an overflow beyond the first page.
-  {
-    retErr = EXTERNAL_FLASH_PageProgram(received_address, bytes_until_end_of_page, buffer_pointer);        // write to the flash until the end of the page
-    buffer_pointer += bytes_until_end_of_page;  // increment the pointer by the number of bytes written to the flash
-    received_address += bytes_until_end_of_page; // adjust the received_address to be equal to the next place we need to write data to (the beginning of the next page)
-    buff_len_for_calc -= bytes_until_end_of_page;       // decrease the size of the data to be written by the amount just written
-  }
-
-  for( ; buff_len_for_calc!=0 ;  )
-  {
-      if(buff_len_for_calc <= EXTERNAL_FLASH_PAGE_SIZE)   // if the remaining bytes to write are less than a full EXTERNAL_FLASH_PAGE_SIZE
-      {
-        retErr = EXTERNAL_FLASH_PageProgram(received_address, buff_len_for_calc, buffer_pointer); 
-        break;  // end of writing to flash
-      }
-      else        // send maximum possible with page program command (256 bytes)
-      {
-        retErr = EXTERNAL_FLASH_PageProgram(received_address, EXTERNAL_FLASH_PAGE_SIZE, buffer_pointer);
-        if(retErr!=PASS)
-          return retErr;
-        buffer_pointer += EXTERNAL_FLASH_PAGE_SIZE;    // increment the pointer by the amount we just wrote to the flash
-        received_address += EXTERNAL_FLASH_PAGE_SIZE; // adjust the received_address to be equal to the next place we need to write data to (the beginning of the next page)
-        buff_len_for_calc -= EXTERNAL_FLASH_PAGE_SIZE;       // decrease the size of the data to be written by the amount just written
-      }
-  }
-	
-	//################CODE SECTION SEPARATOR#####################################
-	//Calculate relative addresses
-	relative_address = end_address_of_data % BASE_SECTOR_SIZE;	// calculate the relative address within the sector of the end_address_of_data. For example, since the sector size is 0x1000 then whether the end_address_of_data is 0x0300 (sector 0) or 0x1300 (sector 1), the relative address is 0x0300
-	//relative_page_index = relative_address / EXTERNAL_FLASH_PAGE_SIZE;	// calculate the relative page index within the sector of the end_address_of_data. For example, since the sector size is 0x1000 and the page size is 256 then whether the end_address_of_data is 0x0300 (sector 0) or 0x1300 (sector 1), the relative page index is 1 (index count starts from 0)
-	//relative_address_within_page = relative_address % EXTERNAL_FLASH_PAGE_SIZE; // calculate the relative address within a page of the end_address_of_data. For example, since the page size is 256 then whether the end_address_of_data is 0x0300 or 0x1300, the relative address within the page is 44 (300-256 = 44)
-	
-	//Copy back from the holding sector the data starting from the end of where the data was written until the end of the sector and write it back to the current sector
-	if(write_two_sectors_flag == TRUE)	// if there is another sector that needs to be written to
-	{
-		holding_sector_address = beginning_of_second_holding_sector;
-		write_sector_address = beginning_of_second_sector;
-	}
-	else // There is not another sector to be written to
-	{
-		holding_sector_address = beginning_of_holding_sector;
-		write_sector_address = beginning_of_current_sector;
-	}
-	
-	for( counter_address = relative_address ; counter_address < BASE_SECTOR_SIZE ; /*counter_address += EXTERNAL_FLASH_PAGE_SIZE*/ )
-	{
-		if( counter_address == relative_address)	// if it's the first iteration of this "for" loop
-		{
-			bytes_until_end_of_page = (uint16_t)(EXTERNAL_FLASH_PAGE_SIZE - (end_address_of_data % EXTERNAL_FLASH_PAGE_SIZE));  // number of bytes until the end of the current page where "end_address_of_data" is located
-	
-			retErr = EXTERNAL_FLASH_ReadData(counter_address + holding_sector_address, COPY_ARRAY, bytes_until_end_of_page);	// read data from holding sector
-			if(retErr!=PASS)
-				return retErr;
-			
-			retErr = EXTERNAL_FLASH_PageProgram(counter_address + write_sector_address, bytes_until_end_of_page, COPY_ARRAY);        // write to the current sector the copied data
-			if(retErr!=PASS)
-				return retErr;
-			
-			counter_address += bytes_until_end_of_page;	// increment the counter
-		}
-		else 	// if this is not the first iteration of this "for" loop
-		{
-			retErr = EXTERNAL_FLASH_ReadData(counter_address + holding_sector_address, COPY_ARRAY, EXTERNAL_FLASH_PAGE_SIZE);	// read data from holding sector
-			if(retErr!=PASS)
-				return retErr;
-			
-			retErr = EXTERNAL_FLASH_PageProgram(counter_address + write_sector_address, EXTERNAL_FLASH_PAGE_SIZE, COPY_ARRAY);        // write to the current sector the copied data
-			if(retErr!=PASS)
-				return retErr;
-			
-			counter_address += EXTERNAL_FLASH_PAGE_SIZE;	// increment the counter
-		}
-	}
-  
-  return retErr;
-}
-
-/*******************************************************************
-*   @Function: EXTERNAL_FLASH_PageProgram
-*   @Description: Perform Page Program command - write between 1-255 bytes to the flash within a specific page. 
-                 The program operation must be within the page limits. The memory is divided into equal chuncks of 256 bytes called pages.
-                 If the operation is not within the page limits (begin at one page and finish program at the other page) then what will happen
-                 is that the program operation will program until the end of the page and then loop back to the beginning of the page and continue
-                 programming from there (see datasheet for page program). 
-                 **NOTE: The maximum number of bytes is 255 and not 256 because the cypress 
-*   @Input argumments: uint32_t address - start address of memory
-                      uint16_t data_length - amount of bytes to write (1 to 255 bytes). 
-                      uint8_t *data - pointer to array of data
-*   @Output argumments: uint32_t retErr -  Error code
-*******************************************************************/
-uint32_t EXTERNAL_FLASH_PageProgram(uint32_t address, uint16_t data_length, uint8_t *data)
-{
-    uint32_t retErr=PASS;
-    uint16_t index, buff_len;
-    static uint8_t WriteBuffer[MAX_SPI_BUFFER_LENGTH]; // has to be set as static in order for the function to work.
-
-        
-    // Set Command byte.
-    WriteBuffer[0] = PP_REG;
-    buff_len = 1u;
-        
-    /* Address bytes */
-    WriteBuffer[1] = (uint8_t) (address >> 16u);
-    WriteBuffer[2] = (uint8_t) (address >> 8u);
-    WriteBuffer[3] = (uint8_t) (address);
-    buff_len += 3u;
-        
-		// Prepare ReadBuffer for transmition with dummy bytes.
-		for(index = 0; index < data_length; index++)
-		{
-				WriteBuffer[buff_len + index] = data[index];
-		}
-		buff_len += data_length;
-		
-		// Set WEL (Write Enable Latch) bit
-		retErr=EXTERNAL_FLASH_EnableWriting();
-    
-		if(retErr==PASS)
-		{
-			// Set MEM_CS pin to Low
-			EXT_FLASH_CS_LOW(); 
-		}			
-    
-    if(retErr==PASS)
-    {
-        // Send data to slave. Write dummy content so MOSI is busy while MISO takes data.
-       retErr = HAL_SPI_Transmit(&hspi1, WriteBuffer, buff_len, SPI_EXT_FLASH_POLLING_TIMEOUT);
-    }
-		
-		// Set MEM_CS pin to High
-		EXT_FLASH_CS_HIGH();
-		
-		// wait until the flash is no longer busy and only then continue (or until a timeout occurs)
-    retErr = EXTERNAL_FLASH_WaitUntilFlashNotBusy();
-		
-		if(retErr!=PASS)
-    {
-        #ifdef FLASH_LOGGER
-            printf("\n\n\rEXTERNAL_FLASH_WriteData: Error during writing data to flash procedure, return code is: %x\n\r",retErr);     
-        #endif
-        ;
-    }
-    
-    return retErr;
-}
-
-
-/*******************************************************************
-*   @Function: FLASH_ReadData (updated 16.08.2018 by Eyal Gerber)
-*   @Description: Perform Fast Read Command - It is possible to read the ENTIRE flash with just this command. However, currently, it is possible with 
-                 this function only to read 256 bytes maximum. This is because the function was originally written in a certain way to support even less
-                 bytes but I (Eyal) improved it a bit to support 256 bytes without making drastic changes due to time limitations and due to actual necessity.
-*   @Input argumments: uint32_t address - start address of memory
-                      uint8_t *data - pointer to array of data
-                      uint16_t data_length - amount of bytes to write (1 to 255 bytes). 
-*   @Output argumments: uint32_t retErr -  Error code
-*******************************************************************/
-uint32_t EXTERNAL_FLASH_ReadData(uint32_t address, uint8_t *data, uint16_t data_length)
-{
-    uint32_t retErr=PASS;
-    uint16_t index = 0;
-    static uint8_t WriteBuffer[MAX_SPI_BUFFER_LENGTH];	// has to be set as static in order for the function to work.
-		static uint8_t rxData[MAX_SPI_BUFFER_LENGTH];				// has to be set as static in order for the function to work.
-    uint16_t buff_len; //it has to be uint16_t and not uint8_t because it can contain a value of 256.
-		uint8_t command_bytes_num = 5;   // number of bytes used for the fast read command (including dummy bytes)
-    
-    // Set Command byte.
-    WriteBuffer[0] = FAST_READ_REG;
-    buff_len = 1u;
-        
-    /* Address bytes */
-    WriteBuffer[1] = (uint8_t) (address >> 16u);
-    WriteBuffer[2] = (uint8_t) (address >> 8u);
-    WriteBuffer[3] = (uint8_t) (address);
-    buff_len += 3u;
-    
-    // Add another dummy byte for "FAST READ" command
-    WriteBuffer[4] = 0u;
-    buff_len += 1u;
-        
-    // Prepare ReadBuffer for transmition with dummy bytes.
-    for(index = 0; index < data_length; index++)
-        WriteBuffer[buff_len + index] = 0u;
-        
-    buff_len += data_length;
-    
-    // Set MEM_CS pin to Low
-    EXT_FLASH_CS_LOW(); 
-    
-		// Send data to slave. Write dummy content, so MOSI is busy while MISO takes data.
-		retErr = HAL_SPI_TransmitReceive(&hspi1, WriteBuffer, rxData, buff_len, SPI_EXT_FLASH_POLLING_TIMEOUT);
-     
-		// Set MEM_CS pin to High
-    EXT_FLASH_CS_HIGH();                
-    
-		for(index = 0 ; index < data_length ; index++ )
-			data[index] = rxData[index + command_bytes_num];	// take the received data and put it in the pointer to the receive array. Take the data received only after the command_bytes were sent.
-			 
-		// wait until the flash is no longer busy and only then continue (or until a timeout occurs)
-    retErr = EXTERNAL_FLASH_WaitUntilFlashNotBusy();
-		
-		if(retErr!=PASS)
-    {
-        #ifdef FLASH_LOGGER
-            printf("\n\n\rEXTERNAL_FLASH_ReadData: Error during reading data to flash procedure, return code is: %x\n\r",retErr);     
-        #endif
-        ; 
-    }
-
-    return retErr;
-}
-
-/**
-  * @brief  This function erases a sector (4096 bytes) based on the address it receives. The sector is determined by the address.
-						So if the address is within a specific sector, then that sector will be erased (all values will become 0xFF)
-  * @param  None
-  * @retval uint32_t - error code
-  */
-uint32_t EXTERNAL_FLASH_EraseSector(uint32_t address)
-{
-    uint32_t retErr=PASS;   
-    uint32_t buff_len;
-    uint8_t WriteBuffer[4];
- 
-    // Set Sector Erase Command byte.
-    WriteBuffer[0] = SE_REG;
-    buff_len = 1u;
-	
-    /* Address bytes */
-    WriteBuffer[1] = (uint8_t) (address >> 16u);
-    WriteBuffer[2] = (uint8_t) (address >> 8u);
-    WriteBuffer[3] = (uint8_t) (address);
-    buff_len += 3u;
-	
-    // Set WEL (Write Enable Latch) bit
-    retErr=EXTERNAL_FLASH_EnableWriting();
- 
-    if(retErr==PASS)
-    {
-        // Set MEM_CS pin to Low
-        EXT_FLASH_CS_LOW();                  
-    }
-    
-    if(retErr==PASS)
-    {
-        // Send data to slave. 
-        retErr = HAL_SPI_Transmit(&hspi1, WriteBuffer, buff_len, SPI_EXT_FLASH_POLLING_TIMEOUT);  
-    }
-  
-    // Set MEM_CS pin to High
-    EXT_FLASH_CS_HIGH();                    
-    
-		// wait until the flash is no longer busy and only then continue (or until a timeout occurs)
-    retErr = EXTERNAL_FLASH_WaitUntilFlashNotBusy();
-		
-		if(retErr!=PASS)
-    {
-        #ifdef FLASH_LOGGER
-            printf("\n\n\rEXTERNAL_FLASH_EraseBlock: Error during erasing data to flash procedure, return code is: %x\n\r",retErr);     
-        #endif
-        ;  
-    }
-    
-    return retErr;
-}
-
-/**
-  * @brief  This function erases a block (32K bytes) based on the address it receives. The block is determined by the address.
-						So if the address is within a specific block, then that block will be erased (all values will become 0xFF)
-  * @param  None
-  * @retval uint32_t - error code
-  */
-uint32_t FLASH_EraseBlock(uint32_t address)
-{    
-    uint32_t buff_len;
-    uint8_t WriteBuffer[4];
-    uint32_t retErr=PASS;
-
-    // Set BlockErase Command byte.
-    WriteBuffer[0] = BE32K;
-    buff_len = 1u;
-	
-    /* Address bytes */
-    WriteBuffer[1] = (uint8_t) (address >> 16u);
-    WriteBuffer[2] = (uint8_t) (address >> 8u);
-    WriteBuffer[3] = (uint8_t) (address);
-    buff_len += 3u;
-	
-    // Set WEL (Write Enable Latch) bit
-    retErr=EXTERNAL_FLASH_EnableWriting();
-    
-    
-    if(retErr==PASS)
-    {
-        // Set MEM_CS pin to Low
-        EXT_FLASH_CS_LOW();                
-    }
-    
-    if(retErr==PASS)
-    {
-        // Send data to slave. 
-        retErr = HAL_SPI_Transmit(&hspi1, WriteBuffer, buff_len, SPI_EXT_FLASH_POLLING_TIMEOUT);  
-    }
-    
-		// Set MEM_CS pin to High
-    EXT_FLASH_CS_HIGH();                    
-    
-    // wait until the flash is no longer busy and only then continue (or until a timeout occurs)
-    retErr = EXTERNAL_FLASH_WaitUntilFlashNotBusy();
-		
-		if(retErr!=PASS)
-    {
-        #ifdef FLASH_LOGGER
-            printf("EXTERNAL_FLASH_EraseBlock: Error during erasing data to flash procedure, return code is: 0x%x\n\r",retErr);     
-        #endif
-        ;
-    }
-
-    return retErr;
-}
-
-/**
-  * @brief  This function erases the entire flash memory (all values will become 0xFF). This operation takes several seconds to complete. 
-  * @param  None
-  * @retval uint32_t - error code
-  */
-uint32_t FLASH_EraseAll(void)
-{ 
-    uint32_t retErr=PASS; 
-		uint32_t buff_len;
-    uint8_t WriteBuffer[1];
-    
-		// Set BlockErase Command byte.
-    WriteBuffer[0] = CE_REG_SPI;
-    buff_len = 1u;
-	
-    // Set WEL bit to high
-    retErr=EXTERNAL_FLASH_EnableWriting();
-    
-    if(retErr==PASS)
-    {       
-        // Set MEM_CS pin to Low
-        EXT_FLASH_CS_LOW(); 
-    }
-    
-    if(retErr==PASS)
-    {
-			// Send Chip Erase command 
-      retErr = HAL_SPI_Transmit(&hspi1, WriteBuffer, buff_len, SPI_EXT_FLASH_POLLING_TIMEOUT);  
-    }
-		
-		// Set MEM_CS pin to High
-    EXT_FLASH_CS_HIGH(); 
-    
-    // wait until the flash is no longer busy and only then continue (or until a timeout occurs)
-    retErr = EXTERNAL_FLASH_WaitUntilFlashNotBusy();
-		
-		if(retErr!=PASS)
-    {
-        #ifdef FLASH_LOGGER
-            printf("EXTERNAL_FLASH_EraseAll: Error during erase all flash , return code is: 0x%x\n\r",retErr);     
-        #endif
-				;
-    }  
-    
-    return SUCCESS;
-}
-
-
-
-/************************ (C) COPYRIGHT AIO Systems *****END OF FILE****/
-
-
-
diff --git a/Src/gpio.c b/Src/gpio.c
deleted file mode 100755
index b5e74353..00000000
--- a/Src/gpio.c
+++ /dev/null
@@ -1,406 +0,0 @@
-/* ========================================
- *
- * Copyright AIO Systems, 2018
- * Written by Novodes for AIO Systems
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO Systems.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : gpio.c
-  * @brief          : Driver for easily controlling the pins that are configured
-                      as digital inputs or outputs
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-#include "gpio.h"
-#include "main.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
-
-GPIO_def GPIO_ARRAY[GPIO_PINS_USED_NUM];  //global array that holds the information of all the GPIOs
- 
-/* Private function prototypes -----------------------------------------------*/
-
-void LedBlink(GPIO_pins gpioIndex, uint32_t delay);
-
-/* Exported functions ---------------------------------------------------------*/
-/**
-  * @brief  This function sets the output value of a specific GPIO (must be preconfigured as output)
-  * @param  index in the GPIO struct array indicating the relevant GPIO pin
-  * @retval None
-  */
-void GPIO_SetVal(GPIO_pins GPIO_Index, GPIO_State State)
-{
-  static GPIO_PinState PinState;
-  if(State)
-    PinState = GPIO_PIN_SET;
-  else
-    PinState = GPIO_PIN_RESET;
-  
-  HAL_GPIO_WritePin(GPIO_ARRAY[GPIO_Index].GPIO_PORT, GPIO_ARRAY[GPIO_Index].Pin, PinState); 
-}
-
-void GPIO_ToggleVal(GPIO_pins GPIO_Index)
-{
-  static GPIO_PinState NewState;
-  
-  if(GPIO_ReadVal(GPIO_Index) == GPIO_PIN_SET)
-    NewState = GPIO_PIN_RESET;
-  else
-    NewState = GPIO_PIN_SET;
-  
-  HAL_GPIO_WritePin(GPIO_ARRAY[GPIO_Index].GPIO_PORT, GPIO_ARRAY[GPIO_Index].Pin, NewState); 
-}
-    
-/**
-  * @brief  This function reads the value of a specific GPIO (must be preconfigured as input)
-  * @param  index in the GPIO struct array indicating the relevant GPIO pin
-  * @retval None
-  */
-uint8_t GPIO_ReadVal(GPIO_pins GPIO_Index)
-{
-  return HAL_GPIO_ReadPin(GPIO_ARRAY[GPIO_Index].GPIO_PORT, GPIO_ARRAY[GPIO_Index].Pin);
-  
-}
-
-/**
-  * @brief  This function initializes the GPIO array
-  * @param  None
-  * @retval None
-  */
-void GPIO_Init()
-{
-	GPIO_InitTypeDef GPIO_InitStruct;
-	
-	//Red_LED
-	GPIO_ARRAY[Red_LED].Pin = Red_LED_Pin;
-  GPIO_ARRAY[Red_LED].GPIO_PORT = Red_LED_GPIO_Port;
-	GPIO_InitStruct.Pin = Red_LED_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(Red_LED_GPIO_Port, &GPIO_InitStruct);
-	GPIO_SetVal(Red_LED,LOW);
-	
-	//Yellow_LED
-	GPIO_ARRAY[Yellow_LED].Pin = Yellow_LED_Pin;
-  GPIO_ARRAY[Yellow_LED].GPIO_PORT = Yellow_LED_GPIO_Port;
-	GPIO_InitStruct.Pin = Yellow_LED_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(Yellow_LED_GPIO_Port, &GPIO_InitStruct);
-	GPIO_SetVal(Yellow_LED,LOW);
-	
-	//Green_LED
-	GPIO_ARRAY[Green_LED].Pin = Green_LED_Pin;
-  GPIO_ARRAY[Green_LED].GPIO_PORT = Green_LED_GPIO_Port;
-	GPIO_InitStruct.Pin = Green_LED_Pin;		
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(Green_LED_GPIO_Port, &GPIO_InitStruct);
-	GPIO_SetVal(Green_LED,LOW);
-	
-	//Blue_LED
-	GPIO_ARRAY[Blue_LED].Pin = Blue_LED_Pin;
-  GPIO_ARRAY[Blue_LED].GPIO_PORT = Blue_LED_GPIO_Port;
-	GPIO_InitStruct.Pin = Blue_LED_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(Blue_LED_GPIO_Port, &GPIO_InitStruct);
-	GPIO_SetVal(Blue_LED,LOW);
-	
-	//Jumper1
-	GPIO_ARRAY[Jumper1].Pin = Jumper1_Pin;
-  GPIO_ARRAY[Jumper1].GPIO_PORT = Jumper1_GPIO_Port;
-  GPIO_InitStruct.Pin = Jumper1_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(Jumper1_GPIO_Port, &GPIO_InitStruct);
-	
-	//Jumper2
-	GPIO_ARRAY[Jumper2].Pin = Jumper2_Pin;
-  GPIO_ARRAY[Jumper2].GPIO_PORT = Jumper2_GPIO_Port;
-  GPIO_InitStruct.Pin = Jumper2_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(Jumper2_GPIO_Port, &GPIO_InitStruct);
-	
-	//Jumper3
-	GPIO_ARRAY[Jumper3].Pin = Jumper3_Pin;
-  GPIO_ARRAY[Jumper3].GPIO_PORT = Jumper3_GPIO_Port;
-  GPIO_InitStruct.Pin = Jumper3_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(Jumper3_GPIO_Port, &GPIO_InitStruct);
-	
-	//Jumper4
-	GPIO_ARRAY[Jumper4].Pin = Jumper4_Pin;
-  GPIO_ARRAY[Jumper4].GPIO_PORT = Jumper4_GPIO_Port;
-  GPIO_InitStruct.Pin = Jumper4_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(Jumper4_GPIO_Port, &GPIO_InitStruct);
-	
-	//Jumper5
-	GPIO_ARRAY[Jumper5].Pin = Jumper5_Pin;
-  GPIO_ARRAY[Jumper5].GPIO_PORT = Jumper5_GPIO_Port;
-  GPIO_InitStruct.Pin = Jumper5_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(Jumper5_GPIO_Port, &GPIO_InitStruct);
-
-	//IO1
-	GPIO_ARRAY[IO1].Pin = IO1_Pin;
-  GPIO_ARRAY[IO1].GPIO_PORT = IO1_GPIO_Port;
-  GPIO_InitStruct.Pin = IO1_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(IO1_GPIO_Port, &GPIO_InitStruct);
-	
-	//IO2
-	GPIO_ARRAY[IO2].Pin = IO2_Pin;
-  GPIO_ARRAY[IO2].GPIO_PORT = IO2_GPIO_Port;
-  GPIO_InitStruct.Pin = IO2_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(IO2_GPIO_Port, &GPIO_InitStruct);
-	
-	//IO3
-	GPIO_ARRAY[IO3].Pin = IO3_Pin;
-  GPIO_ARRAY[IO3].GPIO_PORT = IO3_GPIO_Port;
-  GPIO_InitStruct.Pin = IO3_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(IO3_GPIO_Port, &GPIO_InitStruct);
-	
-	//IO4
-	GPIO_ARRAY[IO4].Pin = IO1_Pin;
-  GPIO_ARRAY[IO4].GPIO_PORT = IO4_GPIO_Port;
-  GPIO_InitStruct.Pin = IO4_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(IO4_GPIO_Port, &GPIO_InitStruct);
-
-	//SPI1_NNS
-	GPIO_ARRAY[SPI1_NNS].Pin = SPI1_NNS_Pin;
-  GPIO_ARRAY[SPI1_NNS].GPIO_PORT = SPI1_NNS_GPIO_Port;
-  GPIO_InitStruct.Pin = SPI1_NNS_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(SPI1_NNS_GPIO_Port, &GPIO_InitStruct);
-	GPIO_SetVal(SPI1_NNS,LOW);
-	
-	//SPI2_CS
-	GPIO_ARRAY[SPI2_CS].Pin = SPI2_CS_Pin;
-  GPIO_ARRAY[SPI2_CS].GPIO_PORT = SPI2_CS_GPIO_Port;
-  GPIO_InitStruct.Pin = SPI2_CS_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(SPI2_CS_GPIO_Port, &GPIO_InitStruct);
-	GPIO_SetVal(SPI2_CS,HIGH);
-	
-	//U_BTN
-	GPIO_ARRAY[U_BTN].Pin = U_BTN_Pin;
-  GPIO_ARRAY[U_BTN].GPIO_PORT = U_BTN_GPIO_Port;
-  GPIO_InitStruct.Pin = U_BTN_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(U_BTN_GPIO_Port, &GPIO_InitStruct);
-	
-	//VDD_PER_EN
-	GPIO_ARRAY[VDD_PER_EN].Pin = VDD_PER_EN_Pin;
-  GPIO_ARRAY[VDD_PER_EN].GPIO_PORT = VDD_PER_EN_GPIO_Port;
-	GPIO_InitStruct.Pin = VDD_PER_EN_Pin;		
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(VDD_PER_EN_GPIO_Port, &GPIO_InitStruct);
-	GPIO_SetVal(VDD_PER_EN,LOW);
-	
-	//EN_Vsys
-	GPIO_ARRAY[EN_Vsys].Pin = EN_Vsys_Pin;
-  GPIO_ARRAY[EN_Vsys].GPIO_PORT = EN_Vsys_GPIO_Port;
-  GPIO_InitStruct.Pin = EN_Vsys_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(EN_Vsys_GPIO_Port, &GPIO_InitStruct);
-	
-	//EN_12V
-	GPIO_ARRAY[EN_12V].Pin = EN_12V_Pin;
-  GPIO_ARRAY[EN_12V].GPIO_PORT = EN_12V_GPIO_Port;
-	GPIO_InitStruct.Pin = EN_12V_Pin;		
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(EN_12V_GPIO_Port, &GPIO_InitStruct);
-	GPIO_SetVal(EN_12V,LOW);
-	
-	//RS485_DE1
-	GPIO_ARRAY[RS485_DE1].Pin = RS485_DE1_Pin;
-  GPIO_ARRAY[RS485_DE1].GPIO_PORT = RS485_DE1_GPIO_Port;
-  GPIO_InitStruct.Pin = RS485_DE1_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(RS485_DE1_GPIO_Port, &GPIO_InitStruct);
-	GPIO_SetVal(RS485_DE1,LOW);
-	
-	//RS485_RE1
-	GPIO_ARRAY[RS485_RE1].Pin = RS485_RE1_Pin;
-  GPIO_ARRAY[RS485_RE1].GPIO_PORT = RS485_RE1_GPIO_Port;
-  GPIO_InitStruct.Pin = RS485_RE1_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(RS485_RE1_GPIO_Port, &GPIO_InitStruct);
-	
-	//RS485_RE2
-	GPIO_ARRAY[RS485_RE2].Pin = RS485_RE2_Pin;
-  GPIO_ARRAY[RS485_RE2].GPIO_PORT = RS485_RE2_GPIO_Port;
-  GPIO_InitStruct.Pin = RS485_RE2_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(RS485_RE2_GPIO_Port, &GPIO_InitStruct);
-	
-	//DB_3V_MCU_EN
-	GPIO_ARRAY[DB_3V_MCU_EN].Pin = DB_3V_MCU_EN_Pin;
-  GPIO_ARRAY[DB_3V_MCU_EN].GPIO_PORT = DB_3V_MCU_EN_GPIO_Port;
-	GPIO_InitStruct.Pin = DB_3V_MCU_EN_Pin;		
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(DB_3V_MCU_EN_GPIO_Port, &GPIO_InitStruct);
-	GPIO_SetVal(DB_3V_MCU_EN,LOW);
-	
-	//EN_MCPU
-	GPIO_ARRAY[EN_MCPU].Pin = EN_MCPU_Pin;
-  GPIO_ARRAY[EN_MCPU].GPIO_PORT = EN_MCPU_GPIO_Port;
-	GPIO_InitStruct.Pin = EN_MCPU_Pin;		
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(EN_MCPU_GPIO_Port, &GPIO_InitStruct);
-	GPIO_SetVal(EN_MCPU,HIGH);
-	
-	//PG_PS
-	GPIO_ARRAY[PG_PS].Pin = PG_PS_Pin;
-  GPIO_ARRAY[PG_PS].GPIO_PORT = PG_PS_GPIO_Port;
-  GPIO_InitStruct.Pin = PG_PS_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(PG_PS_GPIO_Port, &GPIO_InitStruct);
-	
-	//GDO0
-	GPIO_ARRAY[GDO0].Pin = GDO0_Pin;
-  GPIO_ARRAY[GDO0].GPIO_PORT = GDO0_GPIO_Port;
-	GPIO_InitStruct.Pin = GDO0_Pin;
-	GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
-	GPIO_InitStruct.Pull = GPIO_NOPULL;
-	GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
-	HAL_GPIO_Init(GDO0_GPIO_Port, &GPIO_InitStruct);
-
-	//MCU_DB_3V
-	GPIO_ARRAY[MCU_DB_3V].Pin = MCU_DB_3V_Pin;
-  GPIO_ARRAY[MCU_DB_3V].GPIO_PORT = MCU_DB_3V_GPIO_Port;
-  GPIO_InitStruct.Pin = MCU_DB_3V_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(MCU_DB_3V_GPIO_Port, &GPIO_InitStruct);
-	
-	//AN_IN
-	GPIO_ARRAY[AN_IN].Pin = AN_IN_Pin;
-  GPIO_ARRAY[AN_IN].GPIO_PORT = AN_IN_GPIO_Port;
-  GPIO_InitStruct.Pin = AN_IN_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(AN_IN_GPIO_Port, &GPIO_InitStruct);
-
-	//RS485_DE2
-	GPIO_ARRAY[RS485_DE2].Pin = RS485_DE2_Pin;
-  GPIO_ARRAY[RS485_DE2].GPIO_PORT = RS485_DE2_GPIO_Port;
-  GPIO_InitStruct.Pin = RS485_DE2_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(RS485_DE2_GPIO_Port, &GPIO_InitStruct);
-	GPIO_SetVal(RS485_DE2,LOW);
-
-	HAL_NVIC_SetPriority(EXTI4_15_IRQn, 0, 0);	
-}
-
-/**
-  * @brief  This function blinks a led several times based on the parameter sent
-            The led will blink in a dutycycle of 50% (led on period = led off period)
-  * @param  GPIO_pins gpioIndex - the index of the GPIO pin
-            uint32_t delay - the on/off period of the led in milliseconds
-            uint8_t times - number of times to blink
-  * @retval None
-  */
-void LedBlinkNTimes(GPIO_pins gpioIndex, uint32_t delay, uint8_t times)
-{
-    for(;times>0;times--)
-    {
-        LedBlink(gpioIndex,delay);
-        HAL_Delay(delay);
-    }
-}
-
-/**
-  * @brief  This function turns on a led for a certain period of time based on
-            the variable "delay" sent.
-  * @param  GPIO_pins gpioIndex - the index of the GPIO pin
-            uint32_t delay - the on period of the led in milliseconds
-  * @retval None
-  */
-void LedBlink(GPIO_pins gpioIndex, uint32_t delay)
-{
-  GPIO_SetVal(gpioIndex,HIGH);
-  HAL_Delay(delay);
-  GPIO_SetVal(gpioIndex,LOW);
-}
-
-/**
-  * @brief  This function blinks all three leds several times based on the parameter sent
-            The led will blink in a dutycycle of 50% (led on period = led off period)
-  * @param  GPIO_pins gpioIndex - the index of the GPIO pin
-            uint32_t delay - the on period of the led in milliseconds
-  * @retval None
-  */
-void AllLedsBlink(uint32_t delay, uint8_t times)
-{
-    for(;times>0;times--)
-    {
-        GPIO_SetVal(Red_LED,HIGH);
-        GPIO_SetVal(Green_LED,HIGH);
-        GPIO_SetVal(Blue_LED,HIGH);
-				GPIO_SetVal(Yellow_LED,HIGH);
-        HAL_Delay(delay);
-        
-        GPIO_SetVal(Red_LED,LOW);
-        GPIO_SetVal(Green_LED,LOW);
-        GPIO_SetVal(Blue_LED,LOW);
-			GPIO_SetVal(Yellow_LED,LOW);
-        HAL_Delay(delay);
-    }
-}
-/************************ (C) COPYRIGHT AIO Systems *****END OF FILE****/
-
diff --git a/Src/main.c b/Src/main.c
deleted file mode 100755
index 9c5ce36d..00000000
--- a/Src/main.c
+++ /dev/null
@@ -1,728 +0,0 @@
-
-/**
-  ******************************************************************************
-  * @file           : main.c
-  * @brief          : Main program body
-  ******************************************************************************
-  ** This notice applies to any and all portions of this file
-  * that are not between comment pairs USER CODE BEGIN and
-  * USER CODE END. Other portions of this file, whether 
-  * inserted by the user or by software development tools
-  * are owned by their respective copyright owners.
-  *
-  * COPYRIGHT(c) 2018 STMicroelectronics
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-/* Includes ------------------------------------------------------------------*/
-#include "main.h"
-#include "stm32l0xx_hal.h"
-
-/* USER CODE BEGIN Includes */
-#include "app_main.h"
-#include "rtc.h"
-/* USER CODE END Includes */
-
-/* Private variables ---------------------------------------------------------*/
-ADC_HandleTypeDef hadc;
-
-CRYP_HandleTypeDef hcryp;
-__ALIGN_BEGIN static const uint8_t pKeyAES[16] __ALIGN_END = {
-                            0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-                            0x00,0x00,0x00,0x00,0x00,0x00};
-
-IWDG_HandleTypeDef hiwdg;
-
-UART_HandleTypeDef hlpuart1;
-UART_HandleTypeDef huart1;
-UART_HandleTypeDef huart2;
-
-RNG_HandleTypeDef hrng;
-
-RTC_HandleTypeDef hrtc;
-
-SPI_HandleTypeDef hspi1;
-SPI_HandleTypeDef hspi2;
-    char *p;
-    *p = 0;
-/* USER CODE BEGIN PV */
-/* Private variables ---------------------------------------------------------*/
-
-/* USER CODE END PV */
-
-/* Private function prototypes -----------------------------------------------*/
-void SystemClock_Config(void);
-static void MX_GPIO_Init(void);
-static void MX_USART1_UART_Init(void);
-static void MX_USART2_UART_Init(void);
-static void MX_LPUART1_UART_Init(void);
-static void MX_RNG_Init(void);
-static void MX_IWDG_Init(void);
-void MX_AES_Init(void);
-static void MX_ADC_Init(void);
-static void MX_SPI2_Init(void);
-static void MX_RTC_Init(void);
-static void MX_SPI1_Init(void);
-static void MX_NVIC_Init(void);
-
-/* USER CODE BEGIN PFP */
-/* Private function prototypes -----------------------------------------------*/
-
-/* USER CODE END PFP */
-
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
-
-/**
-  * @brief  The application entry point.
-  *
-  * @retval None
-  */
-int main(void)
-{
-  /* USER CODE BEGIN 1 */
-
-  /* USER CODE END 1 */
-
-  /* MCU Configuration----------------------------------------------------------*/
-
-  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
-  HAL_Init();
-
-  /* USER CODE BEGIN Init */
-
-  /* USER CODE END Init */
-
-  /* Configure the system clock */
-  SystemClock_Config();
-
-  /* USER CODE BEGIN SysInit */
-
-  /* USER CODE END SysInit */
-
-  /* Initialize all configured peripherals */
-  MX_GPIO_Init();
-  MX_USART1_UART_Init();
-  MX_USART2_UART_Init();
-  MX_LPUART1_UART_Init();
-  MX_AES_Init();
-  MX_SPI2_Init();
-  MX_RTC_Init();
-  MX_SPI1_Init();
-
-  /* Initialize interrupts */
-  MX_NVIC_Init();
-  /* USER CODE BEGIN 2 */
-	App_Main();
-  /* USER CODE END 2 */
-
-  /* Infinite loop */
-  /* USER CODE BEGIN WHILE */
-  while (1)
-  {
-
-  /* USER CODE END WHILE */
-
-  /* USER CODE BEGIN 3 */
-
-  }
-  /* USER CODE END 3 */
-
-}
-
-/**
-  * @brief System Clock Configuration
-  * @retval None
-  */
-void SystemClock_Config(void)
-{
-
-  RCC_OscInitTypeDef RCC_OscInitStruct;
-  RCC_ClkInitTypeDef RCC_ClkInitStruct;
-  RCC_PeriphCLKInitTypeDef PeriphClkInit;
-
-    /**Configure the main internal regulator output voltage 
-    */
-  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
-
-    /**Configure LSE Drive Capability 
-    */
-  HAL_PWR_EnableBkUpAccess();
-
-  __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
-
-    /**Initializes the CPU, AHB and APB busses clocks 
-    */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI
-                              |RCC_OSCILLATORTYPE_LSE;
-  RCC_OscInitStruct.LSEState = RCC_LSE_ON;
-  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
-  RCC_OscInitStruct.HSICalibrationValue = 16;
-  RCC_OscInitStruct.LSIState = RCC_LSI_ON;
-  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
-  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_4;
-  RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_2;
-  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-
-    /**Initializes the CPU, AHB and APB busses clocks 
-    */
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
-                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
-
-  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-
-  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_USART2
-                              |RCC_PERIPHCLK_LPUART1|RCC_PERIPHCLK_RTC
-                              |RCC_PERIPHCLK_USB;
-  PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
-  PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
-  PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
-  PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
-  PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
-  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-
-    /**Configure the Systick interrupt time 
-    */
-  HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
-
-    /**Configure the Systick 
-    */
-  HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
-
-  /* SysTick_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
-}
-
-/**
-  * @brief NVIC Configuration.
-  * @retval None
-  */
-static void MX_NVIC_Init(void)
-{
-  /* RTC_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(RTC_IRQn, 0, 0);
-  HAL_NVIC_EnableIRQ(RTC_IRQn);
-}
-
-/* ADC init function */
-static void MX_ADC_Init(void)
-{
-
-  ADC_ChannelConfTypeDef sConfig;
-
-    /**Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion) 
-    */
-  hadc.Instance = ADC1;
-  hadc.Init.OversamplingMode = DISABLE;
-  hadc.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
-  hadc.Init.Resolution = ADC_RESOLUTION_12B;
-  hadc.Init.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
-  hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD;
-  hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT;
-  hadc.Init.ContinuousConvMode = DISABLE;
-  hadc.Init.DiscontinuousConvMode = DISABLE;
-  hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
-  hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START;
-  hadc.Init.DMAContinuousRequests = DISABLE;
-  hadc.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
-  hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED;
-  hadc.Init.LowPowerAutoWait = DISABLE;
-  hadc.Init.LowPowerFrequencyMode = DISABLE;
-  hadc.Init.LowPowerAutoPowerOff = DISABLE;
-  if (HAL_ADC_Init(&hadc) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-
-    /**Configure for the selected ADC regular channel to be converted. 
-    */
-  sConfig.Channel = ADC_CHANNEL_9;
-  sConfig.Rank = ADC_RANK_CHANNEL_NUMBER;
-  if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-
-    /**Configure for the selected ADC regular channel to be converted. 
-    */
-  sConfig.Channel = ADC_CHANNEL_TEMPSENSOR;
-  if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-
-    /**Configure for the selected ADC regular channel to be converted. 
-    */
-  sConfig.Channel = ADC_CHANNEL_VREFINT;
-  if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-
-}
-
-/* AES init function */
-void MX_AES_Init(void)
-{
-
-  hcryp.Instance = AES;
-  hcryp.Init.DataType = CRYP_DATATYPE_32B;
-  hcryp.Init.pKey = (uint8_t *)pKeyAES;
-  if (HAL_CRYP_Init(&hcryp) != HAL_OK)
-  {
-   ;// _Error_Handler(__FILE__, __LINE__);
-  }
-
-}
-
-/* IWDG init function */
-static void MX_IWDG_Init(void)
-{
-
-  hiwdg.Instance = IWDG;
-  hiwdg.Init.Prescaler = IWDG_PRESCALER_256;
-  hiwdg.Init.Window = 4095;
-  hiwdg.Init.Reload = 4095;
-  if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-
-}
-
-/* LPUART1 init function */
-static void MX_LPUART1_UART_Init(void)
-{
-
-  hlpuart1.Instance = LPUART1;
-  hlpuart1.Init.BaudRate = 921600;
-  hlpuart1.Init.WordLength = UART_WORDLENGTH_8B;
-  hlpuart1.Init.StopBits = UART_STOPBITS_1;
-  hlpuart1.Init.Parity = UART_PARITY_NONE;
-  hlpuart1.Init.Mode = UART_MODE_TX_RX;
-  hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
-  hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
-  hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
-  if (HAL_UART_Init(&hlpuart1) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-
-}
-
-/* USART1 init function */
-static void MX_USART1_UART_Init(void)
-{
-
-  huart1.Instance = USART1;
-  huart1.Init.BaudRate = 9600;
-  huart1.Init.WordLength = UART_WORDLENGTH_8B;
-  huart1.Init.StopBits = UART_STOPBITS_1;
-  huart1.Init.Parity = UART_PARITY_NONE;
-  huart1.Init.Mode = UART_MODE_TX_RX;
-  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
-  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
-  huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
-  huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
-  if (HAL_UART_Init(&huart1) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-
-}
-
-/* USART2 init function */
-static void MX_USART2_UART_Init(void)
-{
-
-  huart2.Instance = USART2;
-  huart2.Init.BaudRate = 115200;
-  huart2.Init.WordLength = UART_WORDLENGTH_8B;
-  huart2.Init.StopBits = UART_STOPBITS_1;
-  huart2.Init.Parity = UART_PARITY_NONE;
-  huart2.Init.Mode = UART_MODE_TX_RX;
-  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
-  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
-  huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
-  huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
-  if (HAL_UART_Init(&huart2) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-
-}
-
-/* RNG init function */
-static void MX_RNG_Init(void)
-{
-
-  hrng.Instance = RNG;
-  if (HAL_RNG_Init(&hrng) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-
-}
-
-/* RTC init function */
-static void MX_RTC_Init(void)
-{
-
-  /* USER CODE BEGIN RTC_Init 0 */
-
-  /* USER CODE END RTC_Init 0 */
-
-  RTC_TimeTypeDef sTime;
-  RTC_DateTypeDef sDate;
-  RTC_AlarmTypeDef sAlarm;
-
-  /* USER CODE BEGIN RTC_Init 1 */
-
-  /* USER CODE END RTC_Init 1 */
-
-    /**Initialize RTC Only 
-    */
-  hrtc.Instance = RTC;
-  hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
-  hrtc.Init.AsynchPrediv = 127;
-  hrtc.Init.SynchPrediv = 255;
-  hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
-  hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE;
-  hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
-  hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
-  if (HAL_RTC_Init(&hrtc) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-  /* USER CODE BEGIN RTC_Init 2 */
-
-  /* USER CODE END RTC_Init 2 */
-
-    /**Initialize RTC and set the Time and Date 
-    */
-  sTime.Hours = 0;
-  sTime.Minutes = 0;
-  sTime.Seconds = 0;
-  sTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
-  sTime.StoreOperation = RTC_STOREOPERATION_RESET;
-  if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BIN) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-  /* USER CODE BEGIN RTC_Init 3 */
-
-  /* USER CODE END RTC_Init 3 */
-
-  sDate.WeekDay = RTC_WEEKDAY_MONDAY;
-  sDate.Month = RTC_MONTH_JANUARY;
-  sDate.Date = 1;
-  sDate.Year = 0;
-
-  if (HAL_RTC_SetDate(&hrtc, &sDate, RTC_FORMAT_BIN) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-  /* USER CODE BEGIN RTC_Init 4 */
-
-  /* USER CODE END RTC_Init 4 */
-
-    /**Enable the Alarm A 
-    */
-  sAlarm.AlarmTime.Hours = 0;
-  sAlarm.AlarmTime.Minutes = 0;
-  sAlarm.AlarmTime.Seconds = 0;
-  sAlarm.AlarmTime.SubSeconds = 0;
-  sAlarm.AlarmTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
-  sAlarm.AlarmTime.StoreOperation = RTC_STOREOPERATION_RESET;
-  sAlarm.AlarmMask = RTC_ALARMMASK_NONE;
-  sAlarm.AlarmSubSecondMask = RTC_ALARMSUBSECONDMASK_ALL;
-  sAlarm.AlarmDateWeekDaySel = RTC_ALARMDATEWEEKDAYSEL_DATE;
-  sAlarm.AlarmDateWeekDay = 1;
-  sAlarm.Alarm = RTC_ALARM_A;
-  if (HAL_RTC_SetAlarm_IT(&hrtc, &sAlarm, RTC_FORMAT_BIN) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-  /* USER CODE BEGIN RTC_Init 5 */
-	HAL_RTC_DeactivateAlarm(&hrtc,RTC_ALARM_A);	// deactive the alarm here and instead set it in the code using Set_RTC_Alarm()
-	Set_RTCAlarmTypeDef(sAlarm,RTC_ALARM_A);	// export the typedef defined here outside of the function so that the configuration may be set by the cube and maintained later in the code. 
-  /* USER CODE END RTC_Init 5 */
-
-    /**Enable the Alarm B 
-    */
-  sAlarm.AlarmDateWeekDay = 1;
-  sAlarm.Alarm = RTC_ALARM_B;
-  if (HAL_RTC_SetAlarm_IT(&hrtc, &sAlarm, RTC_FORMAT_BIN) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-  /* USER CODE BEGIN RTC_Init 6 */
-	HAL_RTC_DeactivateAlarm(&hrtc,RTC_ALARM_B);	// deactive the alarm here and instead set it in the code using Set_RTC_Alarm()
-	Set_RTCAlarmTypeDef(sAlarm,RTC_ALARM_B);	// export the typedef defined here outside of the function so that the configuration may be set by the cube and maintained later in the code. 
-  /* USER CODE END RTC_Init 6 */
-
-    /**Enable the WakeUp 
-    */
-  if (HAL_RTCEx_SetWakeUpTimer_IT(&hrtc, 0, RTC_WAKEUPCLOCK_RTCCLK_DIV16) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-  /* USER CODE BEGIN RTC_Init 7 */
-	HAL_RTCEx_DeactivateWakeUpTimer(&hrtc);	// deactive the wakeup timer and instead set it in the code using Set_RTC_Wakeup()
-  /* USER CODE END RTC_Init 7 */
-
-}
-
-/* SPI1 init function */
-static void MX_SPI1_Init(void)
-{
-
-  /* SPI1 parameter configuration*/
-  hspi1.Instance = SPI1;
-  hspi1.Init.Mode = SPI_MODE_MASTER;
-  hspi1.Init.Direction = SPI_DIRECTION_2LINES;
-  hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
-  hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
-  hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
-  hspi1.Init.NSS = SPI_NSS_SOFT;
-  hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
-  hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
-  hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
-  hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
-  hspi1.Init.CRCPolynomial = 7;
-  if (HAL_SPI_Init(&hspi1) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-
-}
-
-/* SPI2 init function */
-static void MX_SPI2_Init(void)
-{
-
-  /* SPI2 parameter configuration*/
-  hspi2.Instance = SPI2;
-  hspi2.Init.Mode = SPI_MODE_MASTER;
-  hspi2.Init.Direction = SPI_DIRECTION_2LINES;
-  hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
-  hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
-  hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
-  hspi2.Init.NSS = SPI_NSS_SOFT;
-  hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
-  hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
-  hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
-  hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
-  hspi2.Init.CRCPolynomial = 7;
-  if (HAL_SPI_Init(&hspi2) != HAL_OK)
-  {
-    _Error_Handler(__FILE__, __LINE__);
-  }
-
-}
-
-/** Configure pins as 
-        * Analog 
-        * Input 
-        * Output
-        * EVENT_OUT
-        * EXTI
-        * Free pins are configured automatically as Analog (this feature is enabled through 
-        * the Code Generation settings)
-*/
-static void MX_GPIO_Init(void)
-{
-
-  GPIO_InitTypeDef GPIO_InitStruct;
-
-  /* GPIO Ports Clock Enable */
-  __HAL_RCC_GPIOC_CLK_ENABLE();
-  __HAL_RCC_GPIOH_CLK_ENABLE();
-  __HAL_RCC_GPIOA_CLK_ENABLE();
-  __HAL_RCC_GPIOB_CLK_ENABLE();
-  __HAL_RCC_GPIOD_CLK_ENABLE();
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(GPIOC, IO4_Pin|IO3_Pin|VDD_PER_EN_Pin|DB_3V_MCU_EN_Pin, GPIO_PIN_RESET);
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(GPIOA, RS485_DE2_Pin|Red_LED_Pin|Yellow_LED_Pin|Green_LED_Pin 
-                          |Blue_LED_Pin|EN_12V_Pin|RS485_DE1_Pin|SPI1_NNS_Pin, GPIO_PIN_RESET);
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(GPIOB, SPI2_CS_Pin|PG_PS_Pin, GPIO_PIN_RESET);
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(EN_MCPU_GPIO_Port, EN_MCPU_Pin, GPIO_PIN_RESET);
-
-  /*Configure GPIO pin : GDO0_Pin */
-  GPIO_InitStruct.Pin = GDO0_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(GDO0_GPIO_Port, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : PH0 PH1 */
-  GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
-  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : IO4_Pin IO3_Pin VDD_PER_EN_Pin DB_3V_MCU_EN_Pin */
-  GPIO_InitStruct.Pin = IO4_Pin|IO3_Pin|VDD_PER_EN_Pin|DB_3V_MCU_EN_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : MCU_DB_3V_Pin PC3 PC7 EN_Vsys_Pin 
-                           RS485_RE1_Pin RS485_RE2_Pin */
-  GPIO_InitStruct.Pin = MCU_DB_3V_Pin|GPIO_PIN_3|GPIO_PIN_7|EN_Vsys_Pin 
-                          |RS485_RE1_Pin|RS485_RE2_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
-
-  /*Configure GPIO pin : AN_IN_Pin */
-  GPIO_InitStruct.Pin = AN_IN_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(AN_IN_GPIO_Port, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : RS485_DE2_Pin Red_LED_Pin Yellow_LED_Pin Green_LED_Pin 
-                           Blue_LED_Pin EN_12V_Pin RS485_DE1_Pin SPI1_NNS_Pin */
-  GPIO_InitStruct.Pin = RS485_DE2_Pin|Red_LED_Pin|Yellow_LED_Pin|Green_LED_Pin 
-                          |Blue_LED_Pin|EN_12V_Pin|RS485_DE1_Pin|SPI1_NNS_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : Jumper3_Pin Jumper2_Pin Jumper1_Pin Jumper4_Pin */
-  GPIO_InitStruct.Pin = Jumper3_Pin|Jumper2_Pin|Jumper1_Pin|Jumper4_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : IO2_Pin IO1_Pin PB7 */
-  GPIO_InitStruct.Pin = IO2_Pin|IO1_Pin|GPIO_PIN_7;
-  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : SPI2_CS_Pin PG_PS_Pin */
-  GPIO_InitStruct.Pin = SPI2_CS_Pin|PG_PS_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
-  /*Configure GPIO pin : U_BTN_Pin */
-  GPIO_InitStruct.Pin = U_BTN_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(U_BTN_GPIO_Port, &GPIO_InitStruct);
-
-  /*Configure GPIO pin : Jumper5_Pin */
-  GPIO_InitStruct.Pin = Jumper5_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(Jumper5_GPIO_Port, &GPIO_InitStruct);
-
-  /*Configure GPIO pin : EN_MCPU_Pin */
-  GPIO_InitStruct.Pin = EN_MCPU_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(EN_MCPU_GPIO_Port, &GPIO_InitStruct);
-
-  /* EXTI interrupt init*/
-  //HAL_NVIC_SetPriority(EXTI4_15_IRQn, 0, 0);
-  //HAL_NVIC_EnableIRQ(EXTI4_15_IRQn);
-
-}
-
-/* USER CODE BEGIN 4 */
-
-/* USER CODE END 4 */
-
-/**
-  * @brief  This function is executed in case of error occurrence.
-  * @param  file: The file name as string.
-  * @param  line: The line in file as a number.
-  * @retval None
-  */
-void _Error_Handler(char *file, int line)
-{
-  /* USER CODE BEGIN Error_Handler_Debug */
-  /* User can add his own implementation to report the HAL error return state */
-  while(1)
-  {
-		printf("Error Handler: file %s on line %d\r\n", file, line);
-		HAL_Delay(1000);
-  }
-  /* USER CODE END Error_Handler_Debug */
-}
-
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  Reports the name of the source file and the source line number
-  *         where the assert_param error has occurred.
-  * @param  file: pointer to the source file name
-  * @param  line: assert_param error line source number
-  * @retval None
-  */
-void assert_failed(uint8_t* file, uint32_t line)
-{ 
-  /* USER CODE BEGIN 6 */
-  /* User can add his own implementation to report the file name and line number,
-     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
-  /* USER CODE END 6 */
-}
-#endif /* USE_FULL_ASSERT */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Src/modbus_app_layer.c b/Src/modbus_app_layer.c
deleted file mode 100755
index cde92e4d..00000000
--- a/Src/modbus_app_layer.c
+++ /dev/null
@@ -1,645 +0,0 @@
-/* ========================================
- *
- * Copyright AIO Systems, 2018
- * Written by Novodes for AIO Systems
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO Systems.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : modbus_app_layer.c
-  * @brief          : This file contains functions related to modbus operation from
-											the applicatin layer. This means that the functions here are specific
-											to this application
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-
-#include "modbus_app_layer.h"
-#include "modbus_driver.h"
-#include "GW_BRProtocolsImp.h"
-#include "bootloader_support.h"
-#include "cc1101.h"
-#include "PC_GW_ProtocolFunctions.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
- 
-NodeFlag ArrOfFlags4Nodes[TOTAL_NUMBER_OF_NODES] = {0};			//This array is array of flags for all of the nodes that is connected to this GW. These flags will be use to indicate if there's a new data for a specific NodeID
-
-/* Private function prototypes -----------------------------------------------*/
-
-void Write_NodeParameters_CRC(uint8_t *arr2Analyze);
-void Firmware_Update_Parsing(uint8_t *arr2Analyze);
-void Update_FUTS_Register(Firmware_Upgrade_Transfer_Status upgrade_status);
-Firmware_Upgrade_Transfer_Status Read_FUTS_Register(void);
-uint16_t Save_DataChunk_ToExternalFlash(uint8_t *arr2Analyze);
-uint8_t Check_ReceivedFirmwareImage_CRC(uint8_t *arr2Analyze);
-	
-/* Exported functions ---------------------------------------------------------*/
-
-
-/***********************************************************
-
-Function name: IncomingDataAnalysis
-
-Function type: void
-
-Arguments: uint8_t *arr2Analyze
-
-Return: 0
-
-Description: This function is responsible for understanding 
-the correct modbus commad out of the incoming data
-
-**********************************************************/
-void IncomingDataAnalysis(uint8_t *arr2Analyze, uint8_t arrSize)
-{
-	byte functionCode = arr2Analyze[1];
-	uint8_t retErr = FAIL;	// whether the modbus command execution was successfull
-	uint32_t Register2Write = ((uint32_t)((uint16_t)((arr2Analyze[INCOMING_UART_ARR_LOC_2]<= NUMBER_OF_REGS_FOR_GW)
-			NodeIDCalculated = (Register2Write - NUMBER_OF_REGS_FOR_GW) / REGISTERS_PER_NODE;
-		else
-			NodeIDCalculated = 0;
-		
-		#ifdef ENABLE_MODBUS_APP_LOGS
-			printf("\n\r\n\r The address within registers map is: %x\n\r", Register2Write);
-			//printf("Index_Location_Within_Modbus_Mem_Space = %d\n\r", Index_Location_Within_Modbus_Mem_Space/REGISTER_BYTE_NUM);			//Printed divided by two for the user
-			printf("Index_Location_Within_Modbus_Mem_Space = %d\n\r", Index_Location_Within_Modbus_Mem_Space);
-			printf("Node ID as Calculated = %d\n\r\n\r", NodeIDCalculated);
-		#endif
-		
-		switch (functionCode)
-		{
-			 case MB_ReadHoldingRegisters:
-					#ifdef ENABLE_MODBUS_APP_LOGS
-						printf("function code of MB_ReadHoldingRegisters %d\n\r", functionCode);
-					#endif
-					retErr = MB_Apply_ReadHoldingRegisters(arr2Analyze);
-					break;
-			 case MB_ReadInputRegisters:
-					#ifdef ENABLE_MODBUS_APP_LOGS
-						printf("function code of MB_ReadInputRegisters %d\n\r", functionCode);
-					#endif
-					retErr = MB_Apply_ReadHoldingRegisters(arr2Analyze); // Eyal Gerber: In this application, reading the input registers or the holding registers is the same thing so even though the command is for input registers we go and read the holding registers.
-					break;
-			 case MB_WriteSingleRegister:
-					#ifdef ENABLE_MODBUS_APP_LOGS
-						printf("function code of MB_WriteSingleRegister %d\n\r", functionCode);
-					#endif
-					retErr = MB_Apply_WriteSingleRegister(arr2Analyze);
-					break;
-			 case MB_WriteMultipleRegisters:
-					#ifdef ENABLE_MODBUS_APP_LOGS
-						printf("function code of MB_WriteMultipleRegisters %d\n\r", functionCode);
-					#endif
-					retErr = MB_Apply_WriteMultipleRegisters(arr2Analyze);
-			 break;
-			 default:
-				 retErr = FAIL;
-					#ifdef ENABLE_MODBUS_APP_LOGS
-						printf("Unsupported function code %d\n\r", functionCode);
-					#endif
-		}
-	}
-	
-	state = RF_RECEIVE_STATE;	// set the state again to be RF_RECEIVE_STATE for when we get back to the state machine function
-	
-	if(retErr == PASS) // only if the modbus execution was successfull then continue to this section
-	{
-		switch(Index_Location_Within_Modbus_Mem_Space)
-		{
-			case NODE_QUERY_AREA:
-				if(functionCode == 0x10 || functionCode == 0x06)			//If we read from this address also, don't set this flag.
-				{
-					//CODE_REVIEW: since this entire "switch" has been moved after the modbus functions have been called, we now know if they passed CRC. So if we enter the switch it is because the CRC test has passed and there is no need to check it again.
-						SetNewDataFlag4Node(NodeIDCalculated, QUERY);		//Set the flag to indicate that a new data arrived for this node.
-						#ifdef ENABLE_MODBUS_APP_LOGS
-							printf("Set new data flag of query for node %d\n\r", NodeIDCalculated);
-						#endif
-				}
-				break;
-			case NODE_CONFIG_PARAMS_AREA:
-				if(functionCode == 0x10 || functionCode == 0x06)			//If we read from this address also, don't set this flag.
-				{
-					//CODE_REVIEW: since this entire "switch" has been moved after the modbus functions have been called, we now know if they passed CRC. So if we enter the switch it is because the CRC test has passed and there is no need to check it again.
-						SetNewDataFlag4Node(NodeIDCalculated, SET_PARAMS);		//Set the flag to indicate that a new data arrived for this node.
-						#ifdef ENABLE_MODBUS_APP_LOGS
-							printf("Set new data flag of set parameters for node %d\n\r", NodeIDCalculated);
-						#endif
-						Write_NodeParameters_CRC(arr2Analyze);
-				}
-				break;
-			case FIRMWARE_UPDATE_AREA:
-					Firmware_Update_Parsing(arr2Analyze);
-				break;
-			case GATEWAY_AREA:
-				if(Register2Write >= START_OF_CONFIG_REGISTERS_GW_MEM_AREA && Register2Write < FW_UPGRADE_BIT_GW_MEM_AREA) 			//If the write is for GW's configuration registers
-					{
-						
-					}
-					else if(Register2Write == FW_UPGRADE_BIT_GW_MEM_AREA)
-					{
-						
-					}
-					else if(Register2Write >= START_OF_SLOTS_REGISTERING_REGISTERS_GW_MEM_AREA)		//If the write for the GW area is in the nodes registering area
-					{
-						if(functionCode == 0x10 || functionCode == 0x06)			//The whole thing is relevant only if something was written to this area
-						{
-							AddingRemovingNodeAnalyze(arr2Analyze);
-						}
-					}
-				break;
-			}
-		}
-	
-}
-
-
-
-/***********************************************************
-
-Function name: NewDataFlagsSelector
-
-Function type: Modbus_Mem_Space
-
-Arguments: uint32_t received_register
-
-Return: //uint8_t val2Ret	//  CODE_REVIEW: You cannot just write the name of the variable in the description of what a function returns unless it is 100% obvious. This is not the case. What is Val2Ret? What are the various values that could be returned? I masked this and changed the line below
-Return: Modbus_Mem_Space Mem_Space_Code	- the code specifying where the received_register is positioned within the modbus area space
-
-Description: This function checks the received register
-and returns in which section of the modbus memory space the register is located
-
-**********************************************************/
-Modbus_Mem_Space NewDataFlagsSelector(uint32_t received_register)
-{
-	Modbus_Mem_Space val2Ret = UNDEFINED_AREA;
-	//uint16_t temp1 = 0, temp2 =0;	// CODE_REVIEW: NEVER USER THESE NAMES AGAIN. Always use a name that has a meaning. I masked these lines and gave the variables new names.
-	uint16_t Byte_Num_Within_Node_Memory_Space;
-	
-	//temp1 = (uint16_t)((received_register % REGISTERS_PER_NODE) * REGISTER_BYTE_NUM)-NUMBER_OF_REGS_FOR_GW; //For node ID		//CODE_REVIEW: The calculation here is WRONG. I masked this line and re-wrote it below correctly.
-	//uint16_t Node_ID = (uint16_t)((received_register - NUMBER_OF_REGS_FOR_GW) / REGISTERS_PER_NODE);	// the node ID which the received register refers to.
-	
-	Byte_Num_Within_Node_Memory_Space = ((received_register - NUMBER_OF_REGS_FOR_GW) % REGISTERS_PER_NODE) * REGISTER_BYTE_NUM;	// the calculated byte number within the node memory space 
-	
-	if(received_register < NUMBER_OF_REGS_FOR_GW)			//If the address is for the GW registers
-		val2Ret = GATEWAY_AREA;
-	else if((received_register >= NUMBER_OF_REGS_FOR_GW) && (received_register <= (NUMBER_OF_REGS_FOR_GW+REGISTERS_PER_NODE*TOTAL_NUMBER_OF_NODES))) //If in the range of the nodes
-	{
-		//temp2 = temp1-NUMBER_OF_REGS_FOR_GW;				//Removing the 200 registers of the GW	// CODE_REVIEW: I masked this because it was wrong.
-		#ifdef ENABLE_MODBUS_APP_LOGS
-			//printf("The value of temp2/2 is: %d and the value of received_register is: %x\n\r", temp2/REGISTER_BYTE_NUM, received_register);	//CODE_REVIEW: I masked this and rewrote it below. 
-			printf("The value of received_register is: %x\n\r",received_register);
-		#endif
-		
-		//if(temp2 == QUERY_ADDRESS_WITHIN_NODE_MEM_SPACE)				//If query	// CODE_REVIEW: I masked this because it was wrong. 
-		if( Byte_Num_Within_Node_Memory_Space == QUERY_ADDRESS_WITHIN_NODE_MEM_SPACE)
-			val2Ret = NODE_QUERY_AREA;
-		else if( (Byte_Num_Within_Node_Memory_Space >= BR_COM_INTERVAL_LOCATION_WITHIN_NODE_MEM_SPACE) &&  (Byte_Num_Within_Node_Memory_Space <= ALARM_WAKEUP_INTERVAL_LOCATION_WITHIN_NODE_MEM_SPACE))			//If in range of configurable parameters
-			val2Ret = NODE_CONFIG_PARAMS_AREA;
-	}	
-	else if( received_register > (NUMBER_OF_REGS_FOR_GW + (REGISTERS_PER_NODE * TOTAL_NUMBER_OF_NODES)) )			//If after the nodes area
-		val2Ret = FIRMWARE_UPDATE_AREA;
-	
-	#ifdef ENABLE_MODBUS_APP_LOGS
-		printf("\n\r\n\r The value returned from NewDataFlagsSelector function: %d\n\r\n\r", val2Ret);
-	#endif
-	
-	return val2Ret;
-}
-
-/***********************************************************
-
-Function name: CheckIfNewData4Node
-
-Function type: uint8_t
-
-Arguments: uint8_t NodeID, node_data_type FlagType
-
-Return: uint8_t val2Ret - DATA_CHANGED or DATA_NOT_CHANGED
-
-Description: This function is responsible for checking the
-ArrOfFlags4Nodes array to see if there's a new data for 
-NodeID. If so, the val2Ret will be set to DATA_CHANGED, else 
-to DATA_NOT_CHANGED.
-**********************************************************/
-uint8_t CheckIfNewData4Node(uint8_t NodeID, node_data_type FlagType)
-{
-	uint8_t val2Ret = RESET;
-	switch(FlagType)
-	{
-		case QUERY:
-			if(ArrOfFlags4Nodes[NodeID].QueryFlag == DATA_CHANGED)
-			val2Ret = DATA_CHANGED;
-			else if(ArrOfFlags4Nodes[NodeID].QueryFlag == DATA_NOT_CHANGED)
-				val2Ret = DATA_NOT_CHANGED;
-			break;
-		case SET_PARAMS:
-			if(ArrOfFlags4Nodes[NodeID].SetParamsFlag == DATA_CHANGED)
-			val2Ret = DATA_CHANGED;
-			else if(ArrOfFlags4Nodes[NodeID].SetParamsFlag == DATA_NOT_CHANGED)
-				val2Ret = DATA_NOT_CHANGED;
-			break;
-	}
-	return val2Ret;
-}
-
-
-/***********************************************************
-
-Function name: SetNewDataFlag4Node
-
-Function type: void
-
-Arguments: uint8_t NodeID, uint8_t FlagType
-
-Return: None
-
-Description: This function is responsible for setting the 
-coresponding flag if a new data arrived from the GW to Node
-**********************************************************/
-void SetNewDataFlag4Node(uint8_t NodeID, uint8_t FlagType)	//CODE_REVIEW: We need to change so that this array will be in the EEPROM so that if there is a reset event or if there is a bootloading event, this information doesn't go to waste. 
-{
-	switch(FlagType)
-	{
-		case QUERY:
-			ArrOfFlags4Nodes[NodeID].QueryFlag = SET;
-			break;
-		case SET_PARAMS:
-			ArrOfFlags4Nodes[NodeID].SetParamsFlag = SET;
-			break;
-	}
-}
-
-/***********************************************************
-
-Function name: UnsetNewDataFlag4Node
-
-Function type: void
-
-Arguments: uint8_t NodeID, uint8_t FlagType
-
-Return: None
-
-Description: This function is responsible for resetting the 
-coresponding flag if the node already updated about the new
-data
-**********************************************************/
-void UnsetNewDataFlag4Node(uint8_t NodeID, uint8_t FlagType)
-{
-	switch(FlagType)
-	{
-		case QUERY:
-			ArrOfFlags4Nodes[NodeID].QueryFlag = RESET;
-			break;
-		case SET_PARAMS:
-			ArrOfFlags4Nodes[NodeID].SetParamsFlag = RESET;
-			break;
-	}
-}
-
-/**
-  * @brief  This function calculates and writes the CRC of the parameters of the node addressed in the modbus command (that is received as an argument). 
-						This is used for the BIT functionality upon startup to verify that the node parameters have not accidently changed. 
-  * @param  uint8_t *arr2Analyze - the modbus command to analyze
-  * @retval None
-  */
-void Write_NodeParameters_CRC(uint8_t *arr2Analyze)
-{
-	uint32_t register_num = ((uint32_t)(arr2Analyze[REGISTER_ADDRESS_MSB]<<8) & 0x0000FF00) + (uint32_t)arr2Analyze[REGISTER_ADDRESS_LSB];	// extract the register number
-	uint32_t add2Write = GW_MODBUS_REGISTERS_START_ADRS + register_num*REGISTER_BYTE_NUM;	// calculate the physical address in the memory to write to
-	
-	#ifdef ENABLE_CHECKSUM_FOR_NODE_PARAM
-		uint8_t NodeIDCalc=0;
-		
-		if(add2Write >= NUMBER_OF_REGS_FOR_GW)
-			 NodeIDCalc = (register_num-NUMBER_OF_REGS_FOR_GW) / REGISTERS_PER_NODE;
-		
-		if(CheckIfNewData4Node(NodeIDCalc, SET_PARAMS))			//If the new data written are within the parameters section
-		{
-			
-			uint8_t ConfigurableParams[18] = {0};
-			uint32_t address2Read = GW_MODBUS_REGISTERS_START_ADRS + NodeIDCalc * REGISTERS_PER_NODE*REGISTER_BYTE_NUM + NUMBER_OF_REGS_FOR_GW*REGISTER_BYTE_NUM;
-			
-			#ifdef ENABLE_MODBUS_APP_LOGS
-				printf("The register_num = %d and the calculated nodeID is: %d\n\r", register_num, NodeIDCalc);
-				printf("\n\r\n\rThe address to Read from the conf params %x\n\r\n\r", address2Read);
-			#endif
-			
-			EXTERNAL_FLASH_ReadData(address2Read, ConfigurableParams, 18);
-			
-			#ifdef ENABLE_MODBUS_APP_LOGS
-				printf("The parameters are:\n\r");
-				for(uint8_t i=0;i<18;i++)
-					printf("ConfigurableParams[%d] = %x\n\r",i, ConfigurableParams[i]); 
-			#endif
-			
-			uint16_t NodeParamsChecksum = 0;
-			NodeParamsChecksum = CalcCRC(ConfigurableParams, 18);
-			#ifdef ENABLE_MODBUS_APP_LOGS
-				printf("The CRC is %x\n\r", NodeParamsChecksum);
-			#endif
-			
-			uint8_t NodeParamsChecksum2Write[2] = {0};
-			
-			NodeParamsChecksum2Write[0] = NodeParamsChecksum & 0xFF;
-			NodeParamsChecksum2Write[1] = (NodeParamsChecksum >> 8) & 0xFF;
-			
-			#ifdef ENABLE_MODBUS_APP_LOGS
-				printf("NodeParamsChecksum2Write[0] = %x\n\r", NodeParamsChecksum2Write[0]);
-				printf("NodeParamsChecksum2Write[1] = %x\n\r", NodeParamsChecksum2Write[1]);
-			#endif
-			
-			uint32_t address4ChecksumOfNodeParam = address2Read + CHECKSUM_OF_NODE_PARAM_LOCATION_WITHIN_NODE_MEM_SPACE*REGISTER_BYTE_NUM;
-			
-			#ifdef ENABLE_MODBUS_APP_LOGS
-				printf("The address to write the CRC is: %x\n\r", address4ChecksumOfNodeParam);
-			#endif
-			
-			EXTERNAL_FLASH_WriteData_Automatic(address4ChecksumOfNodeParam, REGISTER_BYTE_NUM, NodeParamsChecksum2Write);
-			
-		}
-	#endif
-	;
-}
-
-/**
-  * @brief  This function parses the modbus command (that is received as an argument) and based on what was received does the required action
-						relevant to the firmware update process. 
-  * @param  uint8_t *arr2Analyze - the modbus command to analyze
-  * @retval None
-  */
-void Firmware_Update_Parsing(uint8_t *arr2Analyze)
-{
-	uint32_t register_num = ((uint32_t)(arr2Analyze[REGISTER_ADDRESS_MSB]<<8) & 0x0000FF00) + (uint32_t)arr2Analyze[REGISTER_ADDRESS_LSB];	// extract the register number
-	uint16_t TheData2Write = ((uint16_t)(arr2Analyze[DATA_ADDRESS_MSB]<<8) & 0x0000FF00) + (uint16_t)arr2Analyze[DATA_ADDRESS_LSB];	// extract the data to write
-	static uint8_t Chunk_Index_Counter = 0;	// variable that counts the chunk indexes and makes sure that they are received in consecutive order.
-	uint8_t Received_Chunk_Index;	// the received chunk index in the current modbus packet
-	uint8_t functionCode = arr2Analyze[1];	// the function code of the modbus command received
-	static firmware_update_state Firmware_Update_Status = FIRMWARE_UPDATE_STOPPED;
-	static uint16_t binary_image_bytes_received = 0;	// the total number of bytes received for the binary image. 
-	
-	//Parsing of data for detecting bootloading start
-	switch(register_num)	//CODE_REVIEW_done: Eyal Gerber added this part. It should be moved to somewhere in the application level and not within the modbus driver. I want to put in the state machine. To consult with Yehuda.
-	{
-		case GATEWAY_FIRMWARE_UPGRADE_START_REG:
-			if( TheData2Write ==  GATEWAY_FIRMWARE_UPGRADE_ENABLE )	// if the modbus command was to set the bootloading bit in order to begin bootloading
-			{
-				Prepare_For_Bootloading();
-				BOOTLOADER_PROCESS_START_FLAG = TRUE;
-				CC1101_GPIOInterruptDisable();	// disable RF reception when bootloading process is in progress
-				
-				#ifdef ENABLE_MODBUS_APP_LOGS
-					printf("GFUS bit ENABLED. Firmware upgrade process has started.\n\r");
-				#endif
-				
-				Chunk_Index_Counter = 0;	// init the chunk index
-				binary_image_bytes_received = 0;	// init the value
-				Firmware_Update_Status = RECEIVING_DATA;
-				Update_FUTS_Register(CLEAR_TO_RECEIVE);	// update the FUTS register with the relevant firmware update status
-				
-			}
-			else	//the value in register GATEWAY_FIRMWARE_UPGRADE_START_REG != GATEWAY_FIRMWARE_UPGRADE_ENABLE
-			{			
-				BOOTLOADER_PROCESS_START_FLAG = FALSE;
-				Firmware_Update_Status = FIRMWARE_UPDATE_STOPPED;
-				
-				#ifdef ENABLE_MODBUS_APP_LOGS
-					printf("GFUS bit DISABLED. Firmware upgrade process has been disabled.\n\r");
-				#endif
-				
-				Update_FUTS_Register(NOT_CLEAR_TO_RECEIVE);	// update the FUTS register with the relevant firmware update status
-			}
-			break;
-			
-		case FIRMWARE_DATA_PACKET_CHUNK_REG_BEGIN:
-				if( (functionCode == MB_WriteMultipleRegisters) && (Firmware_Update_Status == RECEIVING_DATA) )
-				{
-					Received_Chunk_Index = arr2Analyze[CHUNK_INDEX_POSITION];
-					#ifdef ENABLE_MODBUS_APP_LOGS
-						printf("Received data packet chunk. Chunk Index = %d\n\r",Received_Chunk_Index);
-					#endif
-					
-					if(Read_FUTS_Register() == NOT_CLEAR_TO_RECEIVE)
-						Update_FUTS_Register(NOT_CLEAR_TO_RECEIVE_ERROR);
-					else
-					{
-						if(Received_Chunk_Index != Chunk_Index_Counter)
-							Update_FUTS_Register(WRONG_DATA_CHUNK_INDEX);
-						else
-						{
-							Chunk_Index_Counter++;	// increment the chunk index counter
-							Firmware_Update_Status = RECEIVING_DATA;
-							binary_image_bytes_received += Save_DataChunk_ToExternalFlash(arr2Analyze);
-							Update_FUTS_Register(CLEAR_TO_RECEIVE);	// update the FUTS register with the relevant firmware update status
-						}
-					}
-				}
-				else
-					Update_FUTS_Register(GENERAL_ERROR);	// General Error because this register must be written to in a multiple register command, otherwise the update sequence could get ruined. 
-		
-				break;
-				
-		case IMAGE_CRC_REG:
-				if(functionCode == MB_WriteSingleRegister && (Firmware_Update_Status == RECEIVING_DATA) )
-				{
-					#ifdef ENABLE_MODBUS_APP_LOGS
-						printf("Binary image CRC %d written to IMAGE_CRC_REG\n\r",TheData2Write);
-					#endif
-					
-					if(Read_FUTS_Register() == NOT_CLEAR_TO_RECEIVE)
-						Update_FUTS_Register(NOT_CLEAR_TO_RECEIVE_ERROR);
-					else
-					{	
-						Update_FUTS_Register(IMAGE_CRC_ANALYSIS_IN_PROGRESS);
-						Firmware_Update_Status = RECEIVED_IMAGE_CRC;
-						Save_Image_Size_To_ExternalFlash(binary_image_bytes_received);
-						if(Check_ReceivedFirmwareImage_CRC(arr2Analyze) == PASS)		// calculates the CRC based on the image saved in the external flash and compares it with the one recieved over modbus
-						{
-							Update_FUTS_Register(IMAGE_CRC_VALIDATED);	// update the FUTS register with the relevant firmware update status
-						}
-						else
-							Update_FUTS_Register(IMAGE_CRC_ERROR);	// update the FUTS register with the relevant firmware update status
-					}
-				}
-				else
-					Update_FUTS_Register(GENERAL_ERROR);	// General Error because this register must be written to in a single register command, otherwise the update sequence could get ruined. 
-				
-				break;
-				
-		case FIRMWARE_UPGRADE_START_REG:
-				if( (functionCode == MB_WriteSingleRegister) && (Firmware_Update_Status == RECEIVED_IMAGE_CRC) )
-				{
-					if( TheData2Write == FIRMWARE_UPGRADE_START_ENABLE )
-					{
-						#ifdef ENABLE_MODBUS_APP_LOGS
-							printf("Received value %d for FIRMWARE_UPGRADE_START_REG\n\r",TheData2Write);
-						#endif
-						
-						if(Read_FUTS_Register() == IMAGE_CRC_VALIDATED)	// verify that the image is validated before starting the bootloading process
-							Begin_Bootloading();
-						else
-						{
-							; // do nothing since the FUTS register is already set with the relevant status from previous stages
-				
-						}
-					}
-				}
-				else
-					Update_FUTS_Register(GENERAL_ERROR);	// General Error because this register must be written to in a single register command, otherwise the update sequence could get ruined. 
-				
-			break;
-		
-		default:
-			#ifdef ENABLE_MODBUS_APP_LOGS
-				printf("ERROR! Exepcted a register from the firmware update area in the modbus memory area\n\r");
-			#endif
-			break;
-	}
-}
-
-/**
-  * @brief  This function is responsible for comparing the received image CRC with the calculation of the CRC based on the received image that was saved in the external flash. 
-  * @param  None
-  * @retval uint8_t PASS or FAIL
-  */
-uint8_t Check_ReceivedFirmwareImage_CRC(uint8_t *arr2Analyze)
-{
-	uint16_t ReceivedCRC_Val;
-	uint8_t calculated_CRC;
-	
-	ReceivedCRC_Val = ((uint16_t)(arr2Analyze[DATA_ADDRESS_MSB]<<8) & 0xFF00) + (uint16_t)arr2Analyze[DATA_ADDRESS_LSB];	// the received CRC over modbus
-	
-	#ifdef ENABLE_MODBUS_APP_LOGS
-		printf("ReceivedCRC_Val = %d\n\r",ReceivedCRC_Val);
-	#endif
-	
-	calculated_CRC = Calc_And_Save_Binary_Image_CRC();	// the calculated CRC based on the data saved in the external flash
-	
-	#ifdef ENABLE_MODBUS_APP_LOGS
-		printf("calculated_CRC = %d\n\r",calculated_CRC);
-	#endif
-	
-	if(ReceivedCRC_Val != calculated_CRC)
-		return FAIL;
-	
-	return PASS;
-}
-
-/**
-  * @brief  This function is responsible for saving the data packet chunks received over modbus to the external flash
-						This function takes the data chunk data from the RAM and not from the modbus memory space. This is so that there would be an option to 
-						possibly make an exception in the modbus driver to not write to the modbus memory space the data chunks in order to reduce the number of erases to the external flash
-						in order to prolong the life of the external flash. 
-  * @param  Firmware_Upgrade_Transfer_Status upgrade_status - the status to write to the register
-  * @retval uint16_t - the number of data bytes in the chunk (not counting the chunk index)
-  */
-uint16_t Save_DataChunk_ToExternalFlash(uint8_t *arr2Analyze)
-{
-	uint8_t data[MAX_NUMBER_OF_BYTES_FOR_DATA_CHUNK] = {0};
-	uint16_t byteNum2send;
-	uint32_t add2Write;
-	uint8_t Received_Chunk_Index = arr2Analyze[CHUNK_INDEX_POSITION];
-	uint8_t i;
-	
-	add2Write = (APP_IMAGE_SECTOR_START * BASE_SECTOR_SIZE) + (Received_Chunk_Index * MAX_NUMBER_OF_BYTES_FOR_DATA_CHUNK);
-	byteNum2send = arr2Analyze[CHUNK_BYTE_NUM_POSITION]-1;	// minus one because the chunk index is not part of the image data packet chunk
-	for( i = 0 ; i < byteNum2send ; i++ )
-		data[i] = arr2Analyze[CHUNK_DATA_POSITION_BEGIN+i];	// populating array to save to external flash
-	
-	EXTERNAL_FLASH_WriteData(add2Write, byteNum2send, data);
-	
-	return byteNum2send;
-}
-
-/**
-  * @brief  This function is responsible for updating the FUTS (FIRMWARE UPGRADE TRANSFER STATUS) register
-  * @param  Firmware_Upgrade_Transfer_Status upgrade_status - the status to write to the register
-  * @retval None
-  */
-void Update_FUTS_Register(Firmware_Upgrade_Transfer_Status upgrade_status)
-{
-	uint8_t data[2] = {0};
-	uint16_t byteNum2send;
-	uint32_t add2Write;
-	
-	data[0] = (uint8_t)upgrade_status;
-	byteNum2send = 1;	// because we're sending one byte
-	add2Write = MODBUS_MEM_SPACE_START_ADDRESS + (FIRMWARE_UPGRADE_TRANSFER_STATUS_REG * REGISTER_BYTE_NUM);
-	EXTERNAL_FLASH_WriteData_Automatic(add2Write, byteNum2send, data);
-	
-	#ifdef ENABLE_MODBUS_APP_LOGS
-		printf("Firmware_Upgrade_Transfer_Status_Register = ");
-		switch(upgrade_status)
-		{
-			case CLEAR_TO_RECEIVE: printf("CLEAR_TO_RECEIVE");
-		  case WRONG_DATA_CHUNK_INDEX: printf("WRONG_DATA_CHUNK_INDEX");
-			case NOT_CLEAR_TO_RECEIVE_ERROR: printf("NOT_CLEAR_TO_RECEIVE_ERROR");
-			case IMAGE_CRC_ERROR: printf("IMAGE_CRC_ERROR");
-			case IMAGE_CRC_VALIDATED: printf("IMAGE_CRC_VALIDATED");
-			case IMAGE_CRC_ANALYSIS_IN_PROGRESS: printf("IMAGE_CRC_ANALYSIS_IN_PROGRESS");
-			case GENERAL_ERROR: printf("GENERAL_ERROR");
-			default: printf("UNKOWN STATUS");
-				break;
-		}				
-		printf("\n\r");
-	#endif
-}
-
-/**
-  * @brief  This function is responsible for reading the FUTS (FIRMWARE UPGRADE TRANSFER STATUS) register and returing its value
-  * @param  None
-  * @retval Firmware_Upgrade_Transfer_Status upgrade_status - the status to read from the register
-  */
-Firmware_Upgrade_Transfer_Status Read_FUTS_Register(void)
-{
-	uint16_t byteNum2read = 1;	// because we're reading just 1 byte
-	uint8_t data[2] = {0};
-	uint32_t add2Read;
-	Firmware_Upgrade_Transfer_Status upgrade_status;
-	
-	add2Read = MODBUS_MEM_SPACE_START_ADDRESS + (FIRMWARE_UPGRADE_TRANSFER_STATUS_REG * REGISTER_BYTE_NUM);
-	EXTERNAL_FLASH_ReadData(add2Read, data, byteNum2read);
-	
-	upgrade_status = (Firmware_Upgrade_Transfer_Status)data[0];
-	
-	return upgrade_status;
-}
-
-/************************ (C) COPYRIGHT AIO Systems *****END OF FILE****/
-
-
\ No newline at end of file
diff --git a/Src/modbus_driver.c b/Src/modbus_driver.c
deleted file mode 100755
index b2b54909..00000000
--- a/Src/modbus_driver.c
+++ /dev/null
@@ -1,331 +0,0 @@
-/* ========================================
- *
- * Copyright AIO Systems, 2018
- * Written by Novodes for AIO Systems
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO Systems.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : modbus_funcs.c
-  * @brief          : This file contains functions related to the modbus implementation
-										  with regards to the memory space of the modbus registers. Here there
-										  are functions that implement the high level management commands and 
-											communicating with the modbus memory space. 
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-
-#include "modbus_driver.h"
-#include "gpio.h"
-#include "modbus_app_layer.h"
-#include "GW_BRProtocolsImp.h"
-#include "State_machine.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
-
-static uint16_t crcTable[] = {
-	0X0000, 0XC0C1, 0XC181, 0X0140, 0XC301, 0X03C0, 0X0280, 0XC241,
-	0XC601, 0X06C0, 0X0780, 0XC741, 0X0500, 0XC5C1, 0XC481, 0X0440,
-	0XCC01, 0X0CC0, 0X0D80, 0XCD41, 0X0F00, 0XCFC1, 0XCE81, 0X0E40,
-	0X0A00, 0XCAC1, 0XCB81, 0X0B40, 0XC901, 0X09C0, 0X0880, 0XC841,
-	0XD801, 0X18C0, 0X1980, 0XD941, 0X1B00, 0XDBC1, 0XDA81, 0X1A40,
-	0X1E00, 0XDEC1, 0XDF81, 0X1F40, 0XDD01, 0X1DC0, 0X1C80, 0XDC41,
-	0X1400, 0XD4C1, 0XD581, 0X1540, 0XD701, 0X17C0, 0X1680, 0XD641,
-	0XD201, 0X12C0, 0X1380, 0XD341, 0X1100, 0XD1C1, 0XD081, 0X1040,
-	0XF001, 0X30C0, 0X3180, 0XF141, 0X3300, 0XF3C1, 0XF281, 0X3240,
-	0X3600, 0XF6C1, 0XF781, 0X3740, 0XF501, 0X35C0, 0X3480, 0XF441,
-	0X3C00, 0XFCC1, 0XFD81, 0X3D40, 0XFF01, 0X3FC0, 0X3E80, 0XFE41,
-	0XFA01, 0X3AC0, 0X3B80, 0XFB41, 0X3900, 0XF9C1, 0XF881, 0X3840,
-	0X2800, 0XE8C1, 0XE981, 0X2940, 0XEB01, 0X2BC0, 0X2A80, 0XEA41,
-	0XEE01, 0X2EC0, 0X2F80, 0XEF41, 0X2D00, 0XEDC1, 0XEC81, 0X2C40,
-	0XE401, 0X24C0, 0X2580, 0XE541, 0X2700, 0XE7C1, 0XE681, 0X2640,
-	0X2200, 0XE2C1, 0XE381, 0X2340, 0XE101, 0X21C0, 0X2080, 0XE041,
-	0XA001, 0X60C0, 0X6180, 0XA141, 0X6300, 0XA3C1, 0XA281, 0X6240,
-	0X6600, 0XA6C1, 0XA781, 0X6740, 0XA501, 0X65C0, 0X6480, 0XA441,
-	0X6C00, 0XACC1, 0XAD81, 0X6D40, 0XAF01, 0X6FC0, 0X6E80, 0XAE41,
-	0XAA01, 0X6AC0, 0X6B80, 0XAB41, 0X6900, 0XA9C1, 0XA881, 0X6840,
-	0X7800, 0XB8C1, 0XB981, 0X7940, 0XBB01, 0X7BC0, 0X7A80, 0XBA41,
-	0XBE01, 0X7EC0, 0X7F80, 0XBF41, 0X7D00, 0XBDC1, 0XBC81, 0X7C40,
-	0XB401, 0X74C0, 0X7580, 0XB541, 0X7700, 0XB7C1, 0XB681, 0X7640,
-	0X7200, 0XB2C1, 0XB381, 0X7340, 0XB101, 0X71C0, 0X7080, 0XB041,
-	0X5000, 0X90C1, 0X9181, 0X5140, 0X9301, 0X53C0, 0X5280, 0X9241,
-	0X9601, 0X56C0, 0X5780, 0X9741, 0X5500, 0X95C1, 0X9481, 0X5440,
-	0X9C01, 0X5CC0, 0X5D80, 0X9D41, 0X5F00, 0X9FC1, 0X9E81, 0X5E40,
-	0X5A00, 0X9AC1, 0X9B81, 0X5B40, 0X9901, 0X59C0, 0X5880, 0X9841,
-	0X8801, 0X48C0, 0X4980, 0X8941, 0X4B00, 0X8BC1, 0X8A81, 0X4A40,
-	0X4E00, 0X8EC1, 0X8F81, 0X4F40, 0X8D01, 0X4DC0, 0X4C80, 0X8C41,
-	0X4400, 0X84C1, 0X8581, 0X4540, 0X8701, 0X47C0, 0X4680, 0X8641,
-	0X8201, 0X42C0, 0X4380, 0X8341, 0X4100, 0X81C1, 0X8081, 0X4040
-};
- 
-/* Private function prototypes -----------------------------------------------*/
-
-
-/* Exported functions ---------------------------------------------------------*/
-
-
-/***********************************************************
-
-Function name: MB_Apply_ReadHoldingRegisters
-
-Function type: void
-
-Arguments: uint8_t * IncomingArr
-
-Return: uint8_t - PASS or FAIL
-
-Description: This function is responsible for dealing with
-the whole prosess of FC = 3. This function is reading from
-the flash is the area after 0x08006000 + 200regs and based 
-on the address from the user. This function also send the 
-respone over modbus to the master. The data from the flash 
-is written to a dedicated array which can be use somewhere
-else in this code.
-
-(0x03) Read Holding Registers
-
-**********************************************************/
-
-uint8_t MB_Apply_ReadHoldingRegisters(uint8_t * IncomingArr)
-{
-	//uint32_t Adrs2Read = START_OF_NODES_MEM_AREA_ADRS + ((uint32_t)((uint16_t)((IncomingArr[ARR_LOC_2]<> BYTE_SHIFT) & 0xFF;
-	UART1_Transmit(MBResponse, AmountOfBytes+MB_FC_3_RESPONSE_EXTRA_DATA, 200);
-	
-	return PASS;
-}
-
-
-
-
-/***********************************************************
-
-Function name: CalcCRC
-
-Function type: uint16_t
-
-Arguments: uint8_t * buf, uint16_t size
-
-Return: CRC
-
-Description: This function is responsible for calculating
-the CRC of the data in the buf array.
-
-**********************************************************/
-uint16_t CalcCRC(uint8_t * buf, uint16_t size)
-{
-	uint16_t crc = 65535;
-
-	for( uint16_t i = 0; i < size; i++ )
-	{
-		byte tableIndex = (byte)(crc ^ buf[i]);
-		crc >>= 8;
-		crc ^= crcTable[tableIndex];
-	}
-
-	return ( crc );
-	
-}
-
-
-
-/***********************************************************
-
-Function name: MB_Apply_WriteSingleRegister
-
-Function type: void
-
-Arguments: uint8_t * IncomingArr
-
-Return: uint8_t - PASS or FAIL
-
-Description: This function is responsible for writing single 
-MB register to the memory map of the GW. 
-
-**********************************************************/
-
-uint8_t MB_Apply_WriteSingleRegister(uint8_t * IncomingArr)
-{
-	uint32_t register_num = ((uint32_t)(IncomingArr[REGISTER_ADDRESS_MSB]<<8) & 0x0000FF00) + (uint32_t)IncomingArr[REGISTER_ADDRESS_LSB];	// extract the register number
-	uint32_t add2Write = MODBUS_MEM_SPACE_START_ADDRESS + (register_num * REGISTER_BYTE_NUM); // Eyal Gerber: I fixed this because this was a critical bug
-	
-	#ifdef ENABLE_MODBUS_LOGS
-		printf("The address to write is 0x%x and the register number is %d\n\r", add2Write, register_num);	//CODE REVIEW: Please add for these logs #ifdef for log control. Please make sure not to use general indications but rather something that is relevant to this case like MODBUS_LOGS for example
-		printf("the base address is: 0x%x\n\r", START_OF_NODES_MEM_AREA_ADRS);
-	#endif
-	
-	uint16_t IncomingCRC = (IncomingArr[ARR_LOC_7]<< BYTE_SHIFT) + IncomingArr[ARR_LOC_6];
-	//uint16_t IncomingCRC =  ((IncomingArr[IncomingArr[6]+7] <<8) & 0xFF00) | (IncomingArr[IncomingArr[6]+8] & 0x00FF);
-	
-	uint16_t IncomingCRCCalc = CalcCRC(IncomingArr, 6);
-	
-	#ifdef ENABLE_MODBUS_LOGS
-		printf("Incoming crc = 0x%x   Calculated CRC = 0x%x\n\r",IncomingCRC, IncomingCRCCalc);
-	#endif
-	
-	
-	if(IncomingCRCCalc != IncomingCRC)
-	{
-		#ifdef ENABLE_MODBUS_LOGS
-			printf( "incorrect incoming CRC! the incoming is: %x and the calculated is: %x\n\r", IncomingCRC, IncomingCRCCalc );
-		#endif
-		return FAIL;
-	}
-
-	uint8_t data2Write[2] = {0};
-	data2Write[0] = IncomingArr[DATA_ADDRESS_MSB];
-	data2Write[1] = IncomingArr[DATA_ADDRESS_LSB];
-	printf("data2Write[0] = %x\n\r", data2Write[0]);
-	printf("data2Write[1] = %x\n\r", data2Write[1]);
-	EXTERNAL_FLASH_WriteData_Automatic(add2Write, REGISTER_BYTE_NUM, data2Write);	// write the data to the memory space
-	
-	// send Modbus response
-	UART1_Transmit(IncomingArr, RESPOSNE_LENGTH_SINGLE_REGISTER_WRITE, 100);		// the response to the command of single register write is exactly the same command received
-	
-	return PASS;
-}
-	
-
-
-/***********************************************************
-
-Function name: MB_Apply_WriteMultipleRegisters
-
-Function type: void
-
-Arguments: uint8_t * IncomingArr
-
-Return: uint8_t - PASS or FAIL
-
-Description: This function is responsible for writing meny 
-MB registers to the memory map of the GW. In case of query
-from the main PC, there's a bit different due to the size of
-the query, that also beig written to the flash and hence 
-the extra argument.
-
-**********************************************************/
-uint8_t MB_Apply_WriteMultipleRegisters(uint8_t * IncomingArr)
-{
-	uint8_t  i;
-	//uint32_t size = (uint32_t)(((IncomingArr[4]<<8)&0xFF00) + (uint16_t)IncomingArr[5]);	//This size is in modbus registers - 16bit
-	byte NumBytes2Write = IncomingArr[6];			//This is in bytes - size*2
-//	SizeOfLastQuery = NumBytes2Write;
-	
-	uint32_t register_num = ((uint32_t)(IncomingArr[REGISTER_ADDRESS_MSB]<<8) & 0x0000FF00) + (uint32_t)IncomingArr[REGISTER_ADDRESS_LSB];	// extract the register number
-	//uint32_t add2Write = START_OF_NODES_MEM_AREA_ADRS + register_num*REGISTER_BYTE_NUM; // Eyal Gerber: I fixed this because this was a critical bug
-	
-	uint32_t add2Write = MODBUS_MEM_SPACE_START_ADDRESS + register_num*REGISTER_BYTE_NUM;
-		
-	#ifdef ENABLE_MODBUS_LOGS
-		printf("The base address is: %x\n\r", MODBUS_MEM_SPACE_START_ADDRESS);
-		printf("The physical address which is written to is: 0x%x, which is register number %d\n\r", add2Write, register_num);
-	#endif
-	
-	uint8_t data2write[MAX_BYTE_NUMBER_TO_WRITE] = {0};
-	for( i = 0 ; i < NumBytes2Write ; i++ )
-		data2write[i] = IncomingArr[i+7];		//Ignoring the other bytes before the actual data
-	
-	#ifdef ENABLE_MODBUS_LOGS
-		for(uint8_t i=0;i> 8) & 0xFF;
-	UART1_Transmit(WriteMultRegsResponse, RESPOSNE_LENGTH_MULTIPLE_REGISTER_WRITE, 100);
-	
-	return PASS;
-}
-
-
-/************************ (C) COPYRIGHT AIO Systems *****END OF FILE****/
diff --git a/Src/modbus_impl.c b/Src/modbus_impl.c
deleted file mode 100755
index 992dbf18..00000000
--- a/Src/modbus_impl.c
+++ /dev/null
@@ -1,108 +0,0 @@
-/* ========================================
- *
- * Copyright AIO Systems, 2018
- * Written by Novodes for AIO Systems
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO Systems.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : modbus_impl.c
-  * @brief          : This file contains functions related to the implemenation of
-											modbus and the interaction with the memory space of the modbus. 
-										  Generally speaking, the functions here are called from modbus_funcs.c
-											and the functions here use functions from W3_Flash.c
-	* @DateUpdated		: 18.08.2018
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-
-/* USER CODE BEGIN Includes */
-#include "stdio.h"
-#include 
-#include "usart.h"
-#include 
-#include "gpio.h"
-#include "modbus_app_layer.h"
-#include "modbus_impl.h"
-#include "main.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
- 
-/* Private function prototypes -----------------------------------------------*/
-
-//extern int flashErasePageWriteData(uint32_t Address, uint32_t *Data, uint32_t size);
-//extern void writeFlashRegTable(uint32_t Address, uint32_t data, uint16_t size);
-//extern void FlashPageEraseAndWrite(uint32_t Address, uint32_t *Data, uint32_t size);
-//extern uint8_t response[MAX_MODBUS_SLAVE_COMMAND_SIZE];
-
-/* Exported functions ---------------------------------------------------------*/
-
-
-
-
-//int writeTOFlashTable(uint32_t Address, uint16_t *Value, uint16_t size)
-//{
-//	printf("The data to write also before changing to 32 second is%x\n\r", Value[0]);
-
-//		//flashErasePageWriteData( Address, (uint32_t)Value, (uint32_t)size);
-//		HAL_FLASH_Lock();
-
-//	return ( 8 );
-//}
-
-
-
-//int writeTOFlashTableMultiData(uint32_t Address, uint32_t *Value, uint32_t size)
-//{
-
-//	HAL_FLASH_Unlock( );
-//	FlashPageEraseAndWrite( Address, Value, size);
-//	HAL_FLASH_Lock( );
-
-//	return ( 1 );
-//}
-
-
-//void Modbus_WriteSingleRegister(uint32_t startAddress, uint16_t *value, uint16_t size)
-//{
-//	printf("The data to write also before changing to 32 is%x\n\r", value[0]);
-//	writeTOFlashTable(startAddress, value, size);
-//}
-
-//void Modbus_WriteSingleCoil(uint32_t startAddress, uint16_t value)
-//{
-
-//	if ( value == 0 )
-//	{
-//		printf( "writing to single coil 0 address %x : %x\n\r", startAddress, value );
-//	}
-//	else if ( value == 0xFF00 )
-//	{
-//		printf( "writing to single coil 1 address %x : %x\n\r", startAddress, value );
-//	}
-//	else if ( value == 1 )
-//	{
-//		printf( "writing to single coil 1 address %x : %x\n\r", startAddress, value );
-//	}
-//}
-
-//int_WriteMultipleRegister2FlashTable( uint32_t Address, uint16_t Value )
-
-
-/************************ (C) COPYRIGHT AIO Systems *****END OF FILE****/
-
diff --git a/Src/parameters.c b/Src/parameters.c
deleted file mode 100755
index 9514211b..00000000
--- a/Src/parameters.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/* ========================================
- *
- * Copyright AIO Systems, 2018
- * Written by Novodes for AIO Systems
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO Systems.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : parameters.c
-  * @brief          : This is a user application driver for managing the parameters of the program
-  * @Instructions   : How to add new parameters to the code:
-                      1. Add the new parameter to the parameters enum in the header file
-                      2. Increment the PARAM_NUM definition in the header file
-                      3. Add a new definition for the default value of the new parameter in the header file
-                      4. Add a new assignment of the value to the default values array in the UploadDefaultSystemParameters() function
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-#include "parameters.h"
-#include "eeprom.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
- 
-static Parameter PARAMS[PARAM_NUM] = {0};             // A local array that holds all the parameters from the EEPROM for easy access to their values. 
-static uint32_t DEFAULT_PARAMS[PARAM_NUM] = {0};      // A local array that holds all the default values for the parameters
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions ---------------------------------------------------------*/
-
-/**
-  * @brief  This function initializes the system parameters array by populating it with the parameters from the EEPROM
-  * @param  None
-  * @retval None
-  */
-void Init_SystemParameters(void)
-{
-  uint32_t index = 0;
-  
-  #ifdef PARAMETERS_INDICATIONS
-    printf("Init_SystemParameters() function\n\r");
-  #endif
-  
-  //assigning the address for each parameter (all parameters have a fixed length of 32 bits - one word)  
-  for(index = 0 ; index < PARAM_NUM ; index++ )
-  {
-    PARAMS[index].ee_adrs = PARAMETERS_RELATIVE_ADDRESS_START + index*PARAM_SIZE;
-  }
-  
-  if( EEPROM_READ_WORD( PARAMS[FIRST_TIME_RUN_FLAG_DEFAULT].ee_adrs ) == (uint32_t)ERASED_CELL )       //if this is the first time the system is running
-  {
-    UploadDefaultSystemParameters();      // upload the default system parameters to the eeprom
-    Param_SetVal((parameters)FIRST_TIME_RUN_FLAG_DEFAULT,(uint32_t)FALSE);  // unset the flag
-  }
-  else
-    Download_SystemParameters();  // populate the parameters array with values from the eeprom
-}
-
-/**
-  * @brief  This function retrieves the value of a parameter from the parameters array. 
-            CRITICAL: It is assumed that the value has already been downloaded to the array from the eeprom
-                      during initialization so that it won't be necessary to read from the eeprom all the time during run time.
-  * @param  parameters param_index - the index of the parameter
-  * @retval uint32_t - the value of the parameter
-  */
-uint32_t Param_GetVal(parameters param_index)
-{
-  return PARAMS[param_index].val;
-}
-
-/**
-  * @brief  This function sets the value of the parameter
-  * @param  parameters param_index - the index of the parameter
-            uint32_t value - the value of the parameter to set
-  * @retval None
-  */
-void Param_SetVal(parameters param_index, uint32_t value)
-{
-  EEPROM_WRITE_WORD( PARAMS[param_index].ee_adrs, value );      // write the value to the eeprom
-  PARAMS[param_index].val = EEPROM_READ_WORD( PARAMS[param_index].ee_adrs );    // get the written value from the eeprom and assign it to the parameters array
-}
-
-/**
-  * @brief  This function assigns the values to the default parameters array and 
-            uploads the default parameters to the EEPROM
-  * @param  None
-  * @retval None
-  */
-void UploadDefaultSystemParameters(void)
-{
-  uint32_t index = 0;
-  
-  #ifdef PARAMETERS_INDICATIONS
-    printf("UploadDefaultSystemParameters() function\n\r");
-  #endif
-  
-  //Assignment of defualt values to the array
-  DEFAULT_PARAMS[ENABLE_FIRMWARE_UPGRADE] = ENABLE_FIRMWARE_UPGRADE_DEFAULT;
-	DEFAULT_PARAMS[BR_COM_INTERVAL] = BR_COM_INTERVAL_DEF;
-	DEFAULT_PARAMS[REPEAT_MESSAGES] = REPEAT_MESSAGES_DEF;
-	DEFAULT_PARAMS[RESPONSE_TIMEOUT] = RESPONSE_TIMEOUT_DEF;
-	DEFAULT_PARAMS[MIN_RAND] = MIN_RAND_DEF;
-	DEFAULT_PARAMS[MAX_RAND] = MAX_RAND_DEF;
-	DEFAULT_PARAMS[ALARM_WAKEUP_INTERVAL] = ALARM_WAKEUP_INTERVAL_DEF;
-	
-	
-  for(index = 0 ; index < PARAM_NUM ; index++ )
-  {
-    Param_SetVal( (parameters)index , DEFAULT_PARAMS[index] );  // when setting the values in the eeprom they are also assigned to the parameters array
-    
-    #ifdef PARAMETERS_INDICATIONS
-      printf("DEFAULT_PARAMS[%d] = %d ,PARAMS[%d].val = %d , PARAMS[%d].ee_adrs = %d \n\r",index,DEFAULT_PARAMS[index],index,PARAMS[index].val,index,PARAMS[index].ee_adrs);
-    #endif
-  }
-}
-
-/**
-  * @brief  This function downloads the parameters that are written in the EEPROM and saves them in the parameters array
-  * @param  None
-  * @retval None
-  */
-void Download_SystemParameters(void)
-{
-  uint32_t index = 0; 
-  
-  #ifdef PARAMETERS_INDICATIONS
-    printf("Download_SystemParameters() function\n\r");
-  #endif
-  
-  // retrieving the values from the memory
-  for(index = 0 ; index < PARAM_NUM ; index++ )
-  {
-    PARAMS[index].val = EEPROM_READ_WORD( PARAMS[index].ee_adrs );
-    
-    #ifdef PARAMETERS_INDICATIONS
-      printf("PARAMS[%d].val = %d , PARAMS[%d].ee_adrs = %d \n\r",index,PARAMS[index].val,index,PARAMS[index].ee_adrs);
-    #endif
-  }
-}
-
-
-
-void SetParams2Default(uint8_t NodeID)
-{
-	uint8_t ParamsTempArr[20] = {0};
-	ParamsTempArr[0] =(uint8_t)((BR_COM_INTERVAL_DEF & 0xFF000000)>>24);
-	ParamsTempArr[1] =(uint8_t)((BR_COM_INTERVAL_DEF & 0x00FF0000) >> 16);
-	ParamsTempArr[2] =(uint8_t)((BR_COM_INTERVAL_DEF & 0x0000FF00) >> 8);
-	ParamsTempArr[3] =(uint8_t)((BR_COM_INTERVAL_DEF) & 0x000000FF);
-	
-	
-	for(uint8_t i=0;i<20;i++)
-	printf("ParamsTempArr[%d] = %x\n\r", i, ParamsTempArr[i]);
-	
-}
-
-/************************ (C) COPYRIGHT AIO Systems *****END OF FILE****/
diff --git a/Src/power_management.c b/Src/power_management.c
deleted file mode 100755
index 17eda07f..00000000
--- a/Src/power_management.c
+++ /dev/null
@@ -1,304 +0,0 @@
-/* ========================================
- *
- * Copyright Magneto, 2018
- * Written by Novodes for Magneto
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF Magneto.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : power_management.c
-  * @brief          : This file is for managing the various sleep modes
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-#include "power_management.h"
-#include "gpio.h"
-#include "rtc.h"
-#include "watchdog.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-#define ENABLE_ULTRA_LOW_POWER  //Enable Ultra low power (ULP) mode - setting the ULP bit in the PWR_CR register in order to disable the internal voltage reference when entering the low power mode
-
-#ifdef ENABLE_ULTRA_LOW_POWER   // the fast wakeup is only relevant if the ultra low power is enabled. 
-//#define ENABLE_FAST_WAKEUP      // enable this if fast wake up is desired (only relevant in case of STOP mode or Standby Mode - see reference manual). Note that if enabled, then for the first ~3ms after wakeup the internal voltage reference is not reliable and any function that requires it (e.g. ADC) should not work during this startup time.
-#endif
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
-
-/* Private function prototypes -----------------------------------------------*/
-
-void Enter_STOP_Mode(void);
-void SystemPower_Config_Before_LowPower(void);
-void SystemClockConfig_After_STOP(void);
-void System_Config_After_STOP(void);
-void Prepare_MCU_Pins_For_LowPowerMode(void);
-void SystemGPIOs_After_STOP(void);
-
-/* Exported functions ---------------------------------------------------------*/
-
-/**
-  * @brief  This function sets the device into the desired low power mode for a set period.
-  * @param  LowPowerModeTypeDef mode - the desired low power mode
-						uint32_t total_sleep_time - how long to remain in sleep [seconds]. If no set wakeup is desired then the value should be zero. It is not possible to set the value to zero if the Watchdog is enabled.
-  * @retval None
-  */
-void Enter_Low_Power_Mode(LowPowerModeTypeDef low_power_mode, uint32_t total_sleep_time)
-{
-	#ifdef ENABLE_WATCH_DOG
-		uint32_t i;												
-		uint32_t MiniSleepIterations = 0;	// the number of sleep iterations. Only relevant in case the watchdog is enabled. In which case, the watchdog cannot be disabled during run time and we must wakeup in order to reset the watchdog timer and go back to sleep until the entire desired sleep period is fullfilled.
-		uint8_t MiniSleepPeriod = 0;  // The MiniSleepPeriod is the time the MCU goes to sleep and wakes up just to reset the watchdog timer to avoid a watchdog reset.
-		
-		MiniSleepPeriod = (WATCHDOG_RESET_PERIOD-2);  //It is equal to the WATCHDOG_INTERVAL-2 because we don't want to wakeup EXACTLY when the watchdog timer elapses because that would be too risky.
-		if(MiniSleepPeriod == 0)
-		{
-			#ifdef WATCHDOG_LOGS
-				printf("Enter_Low_Power_Mode Function: Not entering sleep mode. Error: MiniSleepIterations = 0. This causes division by zero.\n\r");
-			#endif
-			return; 
-		}
-		else
-			MiniSleepIterations = ( total_sleep_time / MiniSleepPeriod ) + 1;	
-		
-		WD_Reload(); 		// reload the watchdog register to prevent watchdog reset event.
-		
-		for( i=0 ; ipaste from MX_GPIO_Init(). 
-            It is not possible to call MX_GPIO_Init() because it is set as
-            static by the Cube and it is preferable not to meddle with the generated
-            code.
-  * @param  None
-  * @retval None
-  */
-void SystemGPIOs_After_STOP(void)
-{
-  GPIO_Init();
-}
-
-/**
-  * @brief  Configures MCU pins for low power mode to optimize power consumption
-  * @param  None
-  * @retval None
-  */
-void Prepare_MCU_Pins_For_LowPowerMode(void)
-{
-  HAL_GPIO_WritePin(EN_MCPU_GPIO_Port, EN_MCPU_Pin, GPIO_PIN_RESET);		//disabe U21 - 3.3V BB
-	HAL_GPIO_WritePin(EN_12V_GPIO_Port, EN_12V_Pin, GPIO_PIN_SET);		//Disable U15 - 12V power line
-	HAL_GPIO_WritePin(VDD_PER_EN_GPIO_Port, VDD_PER_EN_Pin, GPIO_PIN_SET);
-	HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_RESET);		//CS of CC1101
-	HAL_GPIO_WritePin(U_BTN_GPIO_Port, U_BTN_Pin, GPIO_PIN_RESET);		//User PB
-}
-
-
-/************************ (C) COPYRIGHT Magneto *****END OF FILE****/
diff --git a/Src/radio.c b/Src/radio.c
deleted file mode 100755
index 5af22260..00000000
--- a/Src/radio.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/* ========================================
- *
- * Copyright AIO Systems, 2018
- * Written by Novodes for AIO Systems
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO Systems.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : radio.c
-  * @brief          : This file contains functions related to dealing with the RF
-											peripheral.
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-#include "cc1101.h"
-#include "common.h"
-#include "spi.h"
-#include "radio.h"
-#include "ccpacket.h"
-#include "GW_BRProtocolsImp.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
- 
- uint8_t RF_RXBuffer[RF_ALL_PAYLOADS_MAX_SIZE] = {0};
- uint8_t RF_RXBufferSize = 0;
- 
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions ---------------------------------------------------------*/
-
-RADIO_ERR Radio_Init(void)
-{	
-	uint8_t freq = CFREQ_868;
-	CC1101(-1); 
-	uint8_t mode = 0;
-	CC1101_init(freq, mode);	
-	HAL_Delay(1);
-		
-	if (CC1101_IsExist() == 0)
-		 return RADIO_NOT_CONNECTED;
-	
-	CC1101_SettingsFromMSP430();
-	printf("Config ok\n\r");
-	return RADIO_OK;
-}
-
-/***********************************************************
-
-Function name: RF_Routine
-
-Function type: uint8_t
-
-Arguments: None
-
-Return: ret_err
-
-Description: This function is responsible for checking if
-any data came over RF and receiving it.
-
-**********************************************************/
-uint8_t RF_Routine(void)
-{
-  uint8_t ret_err = 0;
-	ret_err = CC1101_receiveData(RF_RXBuffer, &RF_RXBufferSize);
-	//ExternalGPIOInterruptEnable();	//Eyal Gerber (16.08.2018): line disabled. The interrupt should be enabled at the exit of the callback function for better readability
-  return ret_err;
-}
-
-
-
-/***********************************************************
-
-Function name: EndOfReceiveRF
-
-Function type: void
-
-Arguments: None
-
-Return: None
-
-Description: This function is responsible for managing the 
-timeout of the RF receive routine.
-
-**********************************************************/
-void EndOfReceiveRF(void)
-{
-	if(StartRXFlag)		//If we are in the middle of receive routine.
-	{
-		if(HAL_GetTick() - timeSample4RFRecevingTimeout > RF_TIMEOUT)		//If the time has passed
-		{
-			CC1101_ReceiveRoutineFlagsInit();
-		}
-	}
-}
-
-/************************ (C) COPYRIGHT AIO Systems *****END OF FILE****/
diff --git a/Src/receive_interrupt.c b/Src/receive_interrupt.c
deleted file mode 100755
index ffc6d6ae..00000000
--- a/Src/receive_interrupt.c
+++ /dev/null
@@ -1,287 +0,0 @@
-/* ========================================
- *
- * Copyright AIO SYSTEMS, 2018
- * Written by Novodes for AIO SYSTEMS
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : receive_interrupt.c
-  * @brief          : This file contains functions related to the reception of 
-                      data via the uart and handling them. 
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-#include 
-#include "logger.h"
-#include "receive_interrupt.h"
-#include "State_machine.h"
-#include "modbus_app_layer.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-
-/* Private define ------------------------------------------------------------*/
-
-//################################################
-//definitions for the logger channel
-#define LOGGER_MESSAGE_END_BASED_BYTE          // enable this to identify the end of a received message based on a single byte (e.g. 0x0D or 13 decimal for "enter" carriage return in ASCII)
-//#define LOGGER_MESSAGE_END_BASED_TIME       // enable this to identify the end of a received message based on a defined time period after the last received byte
-
-#ifdef LOGGER_MESSAGE_END_BASED_BYTE
-  #define LOGGER_MESSAGE_END_BYTE      13      // 13 = carriage return (enter) in ascii // the byte received that represents the end of the message/command
-#endif
-#ifdef  LOGGER_MESSAGE_END_BASED_TIME
-  #define LOGGER_MESSAGE_END_TIME      10      // [msec] time period after the last received byte which defines the end of the reception of the current message/command
-#endif
-
-//################################################
-//definitions for the main controller (MC) channel
-//#define MC_MESSAGE_END_BASED_BYTE          // enable this to identify the end of a received message based on a single byte (e.g. 0x0D or 13 decimal for "enter" carriage return in ASCII)
-#define MC_MESSAGE_END_BASED_TIME       // enable this to identify the end of a received message based on a defined time period after the last received byte
-
-#ifdef MC_MESSAGE_END_BASED_BYTE
-  #define MC_MESSAGE_END_BYTE      13      // 13 = carriage return (enter) in ascii // the byte received that represents the end of the message/command
-#endif
-#ifdef  MC_MESSAGE_END_BASED_TIME
-  #define MC_MESSAGE_END_TIME      10      // [msec] time period after the last received byte which defines the end of the reception of the current message/command
-#endif
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
-
-volatile uint8_t logger_command_buffer[LOGGER_COMMAND_BUFFER_SIZE];       // the buffer that accumulates the bytes received
-volatile uint8_t mc_command_buffer[MC_COMMAND_BUFFER_SIZE];       // the buffer that accumulates the bytes received
-uint8_t logger_command_data[LOGGER_COMMAND_DATA_SIZE];  // the temporary array that holds only one byte each time it is received and later transfered to the logger command buffer
-uint8_t mc_command_data[MC_COMMAND_DATA_SIZE];	//temporary array that holds only one byte each time it is received and later transfered to the MC command buffer
-volatile uint16_t mc_Rx_index = 0; // the current index in the command buffer to which to add the next received byte
-volatile uint16_t logger_Rx_index = 0; // the current index in the command buffer to which to add the next received byte
-volatile uint8_t UARTStartReceiveFlag = FALSE;
-#ifdef MC_MESSAGE_END_BASED_TIME
-	volatile uint8_t mc_UART_Timeout_Flag = FALSE;
-	volatile uint8_t mc_dataReceivedFlag = FALSE;
-#endif
-#ifdef LOGGER_MESSAGE_END_BASED_TIME
-	volatile uint8_t logger_UART_Timeout_Flag = FALSE;
-	volatile uint8_t logger_dataReceivedFlag = FALSE;
-#endif
-#ifdef LOGGER_MESSAGE_END_BASED_BYTE
-  volatile uint8_t logger_end_message_flag = FALSE;	// indicates that it's the end of the message
-#endif
-uint8_t AfterInitFlag = FALSE;
-uint8_t dataReceivedFlag1 = FALSE, dataReceivedFlag2 = FALSE;
-volatile uint8_t mc_missed_byte_flag = FALSE;
-volatile uint8_t logger_missed_byte_flag = FALSE;
-volatile uint32_t Time4UARTReceiving = 0;
-
-	
-/***********************************************************
-
-Function name: Init_Receive_Interrupt
-
-Function type: void
-
-Arguments: None
-
-Return: None
-
-Description: This function is for initiating the reception 
-of commands over the UART so that the commands from the 
-user could be received. This function should be called 
-upon at the intialization stage of the program so that 
-reception is ready for commands. 
-
-**********************************************************/
-void Init_Receive_Interrupt()
-{
-    uint8_t index;
-        
-    for (index=0;indexInstance == MAIN_CONTROLLER_CHANNEL)   //All the various UART receive interrupts get sent to this callback function so we need to verify that the interrupt source is from the relevant UART.
-    {
-			#ifdef MC_MESSAGE_END_BASED_TIME
-				if (mc_UART_Timeout_Flag == FALSE)    //if there is still no timeout. In case there is a timeout, this variable is unset outside of this callback function but from the moment the flag is set until it is unset, we must not allow to receive anymore data in order not to overide the data in the array before it has been saved.
-				{
-					mc_dataReceivedFlag = TRUE;
-					
-					mc_command_buffer[mc_Rx_index]= mc_command_data[0];  // store data in buffer
-					mc_Rx_index++;
-				}
-				else
-					mc_missed_byte_flag = TRUE;	// indication that we received a byte that wasn't saved in the buffer
-			#endif
-			HAL_UART_Receive_IT(&huart1, mc_command_data, 1);   // activate receive  ##FOR NEW BOARD BRINGUP: CHANGE THE UART HANDLE HERE BASED ON THE UART THAT IS USED FOR RECEIVING COMMANDS##
-    }
-		else 
-		{
-			if(huart->Instance == LOGGER_COMMAND_HANDLER_UART) //All the various UART receive interrupts get sent to this callback function so we need to verify that the interrupt source is from the relevant UART.
-			{
-				#ifdef LOGGER_MESSAGE_END_BASED_BYTE
-					if (logger_command_data[0]!=LOGGER_MESSAGE_END_BYTE)    //if received data other than the message end byte
-					{
-						if(logger_end_message_flag == FALSE)	// if the flag is unset. If it is set it meanst that we received an END_BYTE and we haven't yet processed the buffer and, therefore, we shouldn't save more data on the buffer
-						{
-							logger_command_buffer[logger_Rx_index] = logger_command_data[0];  // store data in buffer
-							logger_Rx_index++;
-						}
-					}
-					else    // it's the end of the message
-						logger_end_message_flag = TRUE;
-				#endif
-				#ifdef LOGGER_MESSAGE_END_BASED_TIME
-					logger_dataReceivedFlag = TRUE;
-					
-					if (logger_UART_Timeout_Flag == FALSE)    //if there is still no timeout. In case there is a timeout, this variable is unset outside of this callback function but from the moment the flag is set until it is unset, we must not allow to receive anymore data in order not to overide the data in the array before it has been saved.
-					{
-							logger_command_buffer[logger_Rx_index] = logger_command_data[0];  // store data in buffer
-							logger_Rx_index++;
-					}
-					else
-						logger_missed_byte_flag = TRUE;	// indication that we received a byte that wasn't saved in the buffer
-				#endif
-				HAL_UART_Receive_IT(&hlpuart1, logger_command_data, 1);   // activate receive  ##FOR NEW BOARD BRINGUP: CHANGE THE UART HANDLE HERE BASED ON THE UART THAT IS USED FOR RECEIVING COMMANDS##
-			}
-		}
-}
-
-
-/***********************************************************
-
-Function name: EndOfReceiveUART
-
-Function type: void
-
-Arguments: None
-
-Return: None
-
-Description: This function is for dealing with the data that
-came over UART. This function decides whether the incoming 
-string is over or not and transfer the data to a dedicated array
-
-**********************************************************/
-void EndOfReceiveUART(void)
-{
-	
-	static uint8_t receivedDataModbus[MAX_MODBUS_SLAVE_COMMAND_SIZE] = {0};	// define as static in order to prevent the MCU from re-allocating memory to this huge array ALL THE TIME
-	
-	static uint16_t i; 
-	
-	if(mc_dataReceivedFlag == TRUE)	// if some data has been received (not necessarily an entire command yet)
-	{
-		Time4UARTReceiving = HAL_GetTick();		//Sample the time
-		mc_dataReceivedFlag = FALSE;
-		UARTStartReceiveFlag = TRUE;
-	}
-	else
-	{
-		if( ((HAL_GetTick() - Time4UARTReceiving) > MC_MESSAGE_END_TIME) && (UARTStartReceiveFlag == TRUE) )	// if an entire command has been received (presumed to be an entire command due to the timeout that passed)
-		{
-			UARTStartReceiveFlag = FALSE;
-			
-			mc_UART_Timeout_Flag = TRUE;	// set flag to indicate that we are now saving the data to our local buffer (future improvement: do this on the fly and not only when the timeout expires or even better to do this with DMA)
-			
-			for(i=0;i WakeUpCounter = Wakeup Time / Wakeup Time Base
-    
-			Example: 
-      To configure the wake up timer to 4s the WakeUpCounter is set to 0x2616 in case of LSI CLK:
-      RTC_WAKEUPCLOCK_RTCCLK_DIV = RTCCLK_Div16 = 16 
-      Wakeup Time Base = 16 /(~39.000KHz) = ~0,488 ms
-      Wakeup Time = ~4s = 0,488ms  * WakeUpCounter
-        ==> WakeUpCounter = ~4s/0,488ms = 9750 = 0x2616 
-	
-			To configure the wake up timer to 4s the WakeUpCounter is set to 0x2004 in case of LSE CLK:
-      RTC_WAKEUPCLOCK_RTCCLK_DIV = RTCCLK_Div16 = 16 
-      Wakeup Time Base = 16 /(32.768KHz) = ~0,410 ms
-      Wakeup Time = ~4s = 0,410ms  * WakeUpCounter
-        ==> WakeUpCounter = ~4s/0,410ms = 8196 = 0x2004 */
-	
-	clk_src = __HAL_RCC_GET_RTC_SOURCE();
-	switch(clk_src)
-	{
-		case RCC_RTCCLKSOURCE_NO_CLK:
-			printf("Set_RTC_Wakeup() Error. No clock source selected for the RTC.\n\r");
-			return;
-		case RCC_RTCCLKSOURCE_LSE:
-			rtc_clk_freq = LSE_FREQUENCY; // external oscillator LSE frequency
-			break;
-		case RCC_RTCCLKSOURCE_LSI:
-			rtc_clk_freq = LSI_FREQUENCY;	// internal oscillator
-			break;
-		case RCC_RTCCLKSOURCE_HSE_DIVX:
-			printf("Set_RTC_Wakeup() Error. Support for HSE Clock source for RTC has not been written yet.\n\r");	// it simply should be written.
-			break;	
-	}
-	
-	/*Add here more modularity to support various selections of the RTC Clock - not just RTC_WAKEUPCLOCK_RTCCLK_DIV16*/
-	
-	WakeUpTimeBase = (1000000*((uint32_t)16)) / rtc_clk_freq;	// assuming we are using RTC_WAKEUPCLOCK_RTCCLK_DIV16 for the wakeup clock
-	WakeUpCounter = (1000000*period) / WakeUpTimeBase;	// based on the formula written above at the beginning of the function
-	
-  HAL_RTCEx_SetWakeUpTimer_IT(&hrtc, WakeUpCounter, RTC_WAKEUPCLOCK_RTCCLK_DIV16);
-}
-
-/**
-  * @brief  This function disables the wakeup mechanism of the RTC
-  * @param  None
-  * @retval None
-  */
-void Disable_RTC_Wakeup(void)
-{
-	HAL_RTCEx_DeactivateWakeUpTimer(&hrtc);
-}
-
-/**
-  * @brief  This function disables the wakeup mechanism of the RTC
-  * @param  uint32_t period - the period of time [seconds] after which to set the alarm of the RTC
-						uint32_t alarm - the alarm to disable (either RTC_ALARM_A or RTC_ALARM_B)
-  * @retval None
-  */
-void Set_RTC_Alarm(uint32_t period, uint32_t alarm)
-{
-	/* ######################################
-	
-	21.08.2018
-	FUNCTION HAS BEEN WRITTEN PROPERLY YET. WE NEED TO TAKE INTO ACCOUNT THE MAX PERIOD WE WANT TO ALLOW TO SET AN ALARM
-  AND REMEMBER THAT IT NEEDS TO BE RELATIVE TO THE RTC CLOCK! THAT MEANS THAT IF THE CURRENT SECONDS IN THE RTC CLOCK
-  ARE 59 SECONDS AND WE WANT TO MAKE AN ALARM FOR 1 MORE SECOND THEN WE WOULD NEED TO UPDATE THE ALARM SO THAT THE SECONDS
-	WOULD BE ZERO AND THE MINUTES WOULD BE THE CURRENT RTC TIME MINUTES + 1. THIS REQUIRES MORE LOGIC SO RIGHT NOW THE 
-	FUNCTION IS NOT READY AT ALL.
-	
-	#########################################*/
-	RTC_AlarmTypeDef sAlarm;
-	uint8_t	hours,minutes,seconds; 
-	
-	if(alarm == RTC_ALARM_A)
-		sAlarm = alarm_def_A;
-	else // alarm = RTC_ALARM_B
-		sAlarm = alarm_def_B;
-	
-	if(period > MAX_RTC_ALARM_PERIOD)
-		printf("Set_RTC_Alarm Error: Cannot set alarm because period is too big. Period = %d. MAX value possible is %d\n\r",period,MAX_RTC_ALARM_PERIOD);
-	
-	hours = period / 3600;	// 60 seconds * 60 minutes = 1 hour
-	minutes = (period / 60) - (hours * 60);	// total minutes in the period minus the portion that is allocated to the hours
-	seconds = (period / 3600) - (hours * 3600) - (minutes * 60);
-	
-	//Calculation of the time: 
-	sAlarm.AlarmTime.Hours = hours;
-  sAlarm.AlarmTime.Minutes = minutes;
-  sAlarm.AlarmTime.Seconds = seconds;
-  sAlarm.AlarmTime.SubSeconds = 0;
-
-	
-	HAL_RTC_SetAlarm_IT(&hrtc, &sAlarm, RTC_FORMAT_BIN);
-}
-
-/**
-  * @brief  This function disables an alarm of the RTC
-  * @param  uint32_t alarm - the alarm to disable (either RTC_ALARM_A or RTC_ALARM_B)
-  * @retval None
-  */
-void Disable_RTC_Alarm(uint32_t alarm)
-{
-	HAL_RTC_DeactivateAlarm(&hrtc,alarm);
-}
-
-/**
-  * @brief  This function keeps the definitions of the RTC_AlarmTypeDefs defined in the main.c file.
-						Unlike other handles that are global and may be exported out of the main.c, the alarm handle is 
-						locally generated within the function MX_RTC_Init, and therefore it may not be exported easily by
-						simply writing "extern" in main.h. 
-						Instead we use this function Set_RTCAlarmTypeDef() which is called from the user code area within 
-						the function MX_RTC_Init to preserve the definitions of the alarm typedef to be later used in the code
-  * @param  RTC_AlarmTypeDef alarm - the alarm defenitions to preserve 
-						uint32_t alarm - the alarm identifier - either RTC_ALARM_A or RTC_ALARM_B
-  * @retval None
-  */
-void Set_RTCAlarmTypeDef(RTC_AlarmTypeDef exported_alarm, uint32_t alarm)
-{
-	if(alarm == RTC_ALARM_A) 
-		alarm_def_A = exported_alarm; // assign the value of the alarm structure to the relevant global variable.
-	else // alarm = RTC_ALARM_B
-		alarm_def_B = exported_alarm; // assign the value of the alarm structure to the relevant global variable.
-}
-
-/**
-  * @brief  Callback function for the RTC wakeup interrupt
-  * @param  RTC_HandleTypeDef *hrtc - the handle of the rtc that caused the interrupt
-  * @retval None
-  */
-void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc)
-{
-	RTC_WakeUpInterrupt_Flag = TRUE;
-}
-
-/**
-  * @brief  Callback function for the RTC alarm A interrupt
-  * @param  RTC_HandleTypeDef *hrtc - the handle of the rtc that caused the interrupt
-  * @retval None
-  */
-void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc)
-{
-	; // add code here. 
-}
-
-/**
-  * @brief  Callback function for the RTC alarm B interrupt
-  * @param  RTC_HandleTypeDef *hrtc - the handle of the rtc that caused the interrupt
-  * @retval None
-  */
-void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc)
-{
-	; // add code here. 
-}
-
-/************************ (C) COPYRIGHT AIO Systems *****END OF FILE****/
diff --git a/Src/spi.c b/Src/spi.c
deleted file mode 100755
index 7c9ffe31..00000000
--- a/Src/spi.c
+++ /dev/null
@@ -1,272 +0,0 @@
-/**
-  ******************************************************************************
-  * File Name          : SPI.c
-  * Description        : This file provides code for the configuration
-  *                      of the SPI instances.
-  ******************************************************************************
-  ** This notice applies to any and all portions of this file
-  * that are not between comment pairs USER CODE BEGIN and
-  * USER CODE END. Other portions of this file, whether 
-  * inserted by the user or by software development tools
-  * are owned by their respective copyright owners.
-  *
-  * COPYRIGHT(c) 2018 STMicroelectronics
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "spi.h"
-
-#include "gpio.h"
-
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
-
-//SPI_HandleTypeDef hspi1;
-//SPI_HandleTypeDef hspi2;
-
-///* SPI1 init function */
-//void MX_SPI1_Init(void)
-//{
-
-//  hspi1.Instance = SPI1;
-//  hspi1.Init.Mode = SPI_MODE_MASTER;
-//  hspi1.Init.Direction = SPI_DIRECTION_2LINES;
-//  hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
-//  hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
-//  hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
-//  hspi1.Init.NSS = SPI_NSS_SOFT;
-//  hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
-//  hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
-//  hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
-//  hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
-//  hspi1.Init.CRCPolynomial = 7;
-//  if (HAL_SPI_Init(&hspi1) != HAL_OK)
-//  {
-//    _Error_Handler(__FILE__, __LINE__);
-//		printf("Error returened from the SPI init func\n\r");
-//  }
-//	else
-//		printf("OK returened from the SPI init func\n\r");
-
-//}
-
-
-//void MX_SPI2_Init(void)
-//{
-//	printf("Inside MX_SPI2_Init\n\r"); 
-//  hspi2.Instance = SPI2;
-//  hspi2.Init.Mode = SPI_MODE_MASTER;
-//  hspi2.Init.Direction = SPI_DIRECTION_2LINES;
-//  hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
-//  hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
-//  hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
-//  hspi2.Init.NSS = SPI_NSS_SOFT;
-//  hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
-//  hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
-//  hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
-//  hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
-//  hspi2.Init.CRCPolynomial = 7;
-//  if (HAL_SPI_Init(&hspi2) != HAL_OK)
-//  {
-//    _Error_Handler(__FILE__, __LINE__);
-//  }
-
-//}
-
-//void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
-//{
-
-//  GPIO_InitTypeDef GPIO_InitStruct;
-//  if(spiHandle->Instance==SPI1)
-//  {
-//  /* USER CODE BEGIN SPI1_MspInit 0 */
-
-//  /* USER CODE END SPI1_MspInit 0 */
-//    /* SPI1 clock enable */
-//    __HAL_RCC_SPI1_CLK_ENABLE();
-//  
-//    /**SPI1 GPIO Configuration    
-//    PA5     ------> SPI1_SCK
-//    PA6     ------> SPI1_MISO
-//    PA7     ------> SPI1_MOSI 
-//    */
-////    GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
-////    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-////    GPIO_InitStruct.Pull = GPIO_NOPULL;
-////    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-////    GPIO_InitStruct.Alternate = GPIO_AF0_SPI1;
-////    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
-//  /* USER CODE BEGIN SPI1_MspInit 1 */
-
-//  /* USER CODE END SPI1_MspInit 1 */
-//  }
-//	else if(spiHandle->Instance==SPI2)
-//		{
-//			printf("Inside the SPI2 section\n\r");
-//			/* SPI1 clock enable */
-//			__HAL_RCC_SPI2_CLK_ENABLE();
-//		
-//			/**SPI1 GPIO Configuration    
-//			PA5     ------> SPI1_SCK
-//			PA6     ------> SPI1_MISO
-//			PA7     ------> SPI1_MOSI 
-//			*/
-//			GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
-//			GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-//			GPIO_InitStruct.Pull = GPIO_NOPULL;
-//			GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-//			GPIO_InitStruct.Alternate = GPIO_AF0_SPI2;
-//			HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-//		}
-//	
-//}
-
-//void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
-//{
-
-//  if(spiHandle->Instance==SPI1)
-//  {
-//  /* USER CODE BEGIN SPI1_MspDeInit 0 */
-
-//  /* USER CODE END SPI1_MspDeInit 0 */
-//    /* Peripheral clock disable */
-//    __HAL_RCC_SPI1_CLK_DISABLE();
-//  
-//    /**SPI1 GPIO Configuration    
-//    PA5     ------> SPI1_SCK
-//    PA6     ------> SPI1_MISO
-//    PA7     ------> SPI1_MOSI 
-//    */
-//    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
-
-//  /* USER CODE BEGIN SPI1_MspDeInit 1 */
-
-//  /* USER CODE END SPI1_MspDeInit 1 */
-//  }
-//	if(spiHandle->Instance==SPI2)
-//  {
-//  /* USER CODE BEGIN SPI1_MspDeInit 0 */
-
-//  /* USER CODE END SPI1_MspDeInit 0 */
-//    /* Peripheral clock disable */
-//    __HAL_RCC_SPI1_CLK_DISABLE();
-//  
-//    /**SPI1 GPIO Configuration    
-//    PA5     ------> SPI1_SCK
-//    PA6     ------> SPI1_MISO
-//    PA7     ------> SPI1_MOSI 
-//    */
-//    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
-
-//  /* USER CODE BEGIN SPI1_MspDeInit 1 */
-
-//  /* USER CODE END SPI1_MspDeInit 1 */
-//  }
-//} 
-
-/* USER CODE BEGIN 1 */
-
-
-void SPI1_Transmit(byte addr, byte data , byte *status)
-{
-	uint8_t txData[2] = {addr & 0x3F, data};
-	uint8_t rxData[2] = {0,0};
-	
-	HAL_SPI_TransmitReceive(&hspi2, txData, rxData, 2, SPI_CC1101_POLLING_TIMEOUT);
-}
-void SPI1_Receive(byte addr, byte *data, byte *status)
-{
-	
-	#if 0 
-	uint8_t txData[1] = {addr & 0x3F};
-	txData[0] |= 0x80;
-	
-	HAL_SPI_TransmitReceive(&hspi2, txData, status, 1, SPI_CC1101_POLLING_TIMEOUT);
-	HAL_SPI_Receive(&hspi2, data, 1, SPI_CC1101_POLLING_TIMEOUT);
-	
-	#else 
-	
-	
-	uint8_t txData[2] = {addr , 0};
-	uint8_t rxData[2] = {0,0};
-	txData[0] |= 0x80;
-	
-	HAL_SPI_TransmitReceive(&hspi2, txData, rxData, 2, SPI_CC1101_POLLING_TIMEOUT);
-	
-	*status = rxData[0];
-	*data = rxData[1];
-		
-	
-	
-	#endif 
-}
-
-uint8_t SPI1_TransmitStrobe(byte cmd, byte *status)
-{
-	uint8_t txData[1] = {cmd & 0x3F};
-	uint8_t rxData[1] = {0};
-	
-	HAL_SPI_TransmitReceive(&hspi2, txData, rxData, 1, SPI_CC1101_POLLING_TIMEOUT);
-	return rxData[0];
-}
-
-void SPI1_TransmitBurst(byte addr, byte *buffer, uint8_t len, byte *status)
-{
-	uint8_t txData[1] = {addr};
-	uint8_t rxData[1] = {0};
-	  
-	HAL_SPI_TransmitReceive(&hspi2, txData, rxData, 1, SPI_CC1101_POLLING_TIMEOUT);
-	status[0] = rxData[0];
-	
-  HAL_SPI_Transmit(&hspi2, buffer, len , SPI_CC1101_POLLING_TIMEOUT);
-
-}
-
-void SPI1_ReceiveBurst(byte addr, byte *buffer, uint8_t len, byte *status)
-{
-	
-	uint8_t txData[1] = {addr};
-	uint8_t rxData[1] = {0};
-	
-	HAL_SPI_TransmitReceive(&hspi2, txData, rxData, 1, SPI_CC1101_POLLING_TIMEOUT);
-	
-  HAL_SPI_Receive(&hspi2, buffer, len , SPI_CC1101_POLLING_TIMEOUT);	
-}
-	
-/* USER CODE END 1 */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Src/stm32l0xx_hal_msp.c b/Src/stm32l0xx_hal_msp.c
deleted file mode 100755
index c761e05a..00000000
--- a/Src/stm32l0xx_hal_msp.c
+++ /dev/null
@@ -1,516 +0,0 @@
-/**
-  ******************************************************************************
-  * File Name          : stm32l0xx_hal_msp.c
-  * Description        : This file provides code for the MSP Initialization 
-  *                      and de-Initialization codes.
-  ******************************************************************************
-  ** This notice applies to any and all portions of this file
-  * that are not between comment pairs USER CODE BEGIN and
-  * USER CODE END. Other portions of this file, whether 
-  * inserted by the user or by software development tools
-  * are owned by their respective copyright owners.
-  *
-  * COPYRIGHT(c) 2018 STMicroelectronics
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-
-extern void _Error_Handler(char *, int);
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
-/**
-  * Initializes the Global MSP.
-  */
-void HAL_MspInit(void)
-{
-  /* USER CODE BEGIN MspInit 0 */
-
-  /* USER CODE END MspInit 0 */
-
-  __HAL_RCC_SYSCFG_CLK_ENABLE();
-  __HAL_RCC_PWR_CLK_ENABLE();
-
-  /* System interrupt init*/
-  /* SVC_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(SVC_IRQn, 0, 0);
-  /* PendSV_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0);
-  /* SysTick_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
-
-  /* USER CODE BEGIN MspInit 1 */
-
-  /* USER CODE END MspInit 1 */
-}
-
-void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
-{
-
-  GPIO_InitTypeDef GPIO_InitStruct;
-  if(hadc->Instance==ADC1)
-  {
-  /* USER CODE BEGIN ADC1_MspInit 0 */
-
-  /* USER CODE END ADC1_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_ADC1_CLK_ENABLE();
-  
-    /**ADC GPIO Configuration    
-    PB1     ------> ADC_IN9 
-    */
-    GPIO_InitStruct.Pin = V_BAT_Pin;
-    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
-    HAL_GPIO_Init(V_BAT_GPIO_Port, &GPIO_InitStruct);
-
-  /* USER CODE BEGIN ADC1_MspInit 1 */
-
-  /* USER CODE END ADC1_MspInit 1 */
-  }
-
-}
-
-void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
-{
-
-  if(hadc->Instance==ADC1)
-  {
-  /* USER CODE BEGIN ADC1_MspDeInit 0 */
-
-  /* USER CODE END ADC1_MspDeInit 0 */
-    /* Peripheral clock disable */
-    __HAL_RCC_ADC1_CLK_DISABLE();
-  
-    /**ADC GPIO Configuration    
-    PB1     ------> ADC_IN9 
-    */
-    HAL_GPIO_DeInit(V_BAT_GPIO_Port, V_BAT_Pin);
-
-  /* USER CODE BEGIN ADC1_MspDeInit 1 */
-
-  /* USER CODE END ADC1_MspDeInit 1 */
-  }
-
-}
-
-void HAL_CRYP_MspInit(CRYP_HandleTypeDef* hcryp)
-{
-
-  if(hcryp->Instance==AES)
-  {
-  /* USER CODE BEGIN AES_MspInit 0 */
-
-  /* USER CODE END AES_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_AES_CLK_ENABLE();
-    /* AES interrupt Init */
-    HAL_NVIC_SetPriority(AES_RNG_LPUART1_IRQn, 0, 0);
-    HAL_NVIC_EnableIRQ(AES_RNG_LPUART1_IRQn);
-  /* USER CODE BEGIN AES_MspInit 1 */
-
-  /* USER CODE END AES_MspInit 1 */
-  }
-
-}
-
-void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef* hcryp)
-{
-
-  if(hcryp->Instance==AES)
-  {
-  /* USER CODE BEGIN AES_MspDeInit 0 */
-
-  /* USER CODE END AES_MspDeInit 0 */
-    /* Peripheral clock disable */
-    __HAL_RCC_AES_CLK_DISABLE();
-
-    /* AES interrupt DeInit */
-  /* USER CODE BEGIN AES:AES_RNG_LPUART1_IRQn disable */
-    /**
-    * Uncomment the line below to disable the "AES_RNG_LPUART1_IRQn" interrupt
-    * Be aware, disabling shared interrupt may affect other IPs
-    */
-    /* HAL_NVIC_DisableIRQ(AES_RNG_LPUART1_IRQn); */
-  /* USER CODE END AES:AES_RNG_LPUART1_IRQn disable */
-
-  /* USER CODE BEGIN AES_MspDeInit 1 */
-
-  /* USER CODE END AES_MspDeInit 1 */
-  }
-
-}
-
-void HAL_UART_MspInit(UART_HandleTypeDef* huart)
-{
-
-  GPIO_InitTypeDef GPIO_InitStruct;
-  if(huart->Instance==LPUART1)
-  {
-  /* USER CODE BEGIN LPUART1_MspInit 0 */
-
-  /* USER CODE END LPUART1_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_LPUART1_CLK_ENABLE();
-  
-    /**LPUART1 GPIO Configuration    
-    PC4     ------> LPUART1_TX
-    PC5     ------> LPUART1_RX 
-    */
-    GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5;
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-    GPIO_InitStruct.Alternate = GPIO_AF2_LPUART1;
-    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
-
-    /* LPUART1 interrupt Init */
-    HAL_NVIC_SetPriority(AES_RNG_LPUART1_IRQn, 0, 0);
-    HAL_NVIC_EnableIRQ(AES_RNG_LPUART1_IRQn);
-  /* USER CODE BEGIN LPUART1_MspInit 1 */
-
-  /* USER CODE END LPUART1_MspInit 1 */
-  }
-  else if(huart->Instance==USART1)
-  {
-  /* USER CODE BEGIN USART1_MspInit 0 */
-
-  /* USER CODE END USART1_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_USART1_CLK_ENABLE();
-  
-    /**USART1 GPIO Configuration    
-    PA9     ------> USART1_TX
-    PA10     ------> USART1_RX 
-    */
-    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-    GPIO_InitStruct.Alternate = GPIO_AF4_USART1;
-    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
-    /* USART1 interrupt Init */
-    HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
-    HAL_NVIC_EnableIRQ(USART1_IRQn);
-  /* USER CODE BEGIN USART1_MspInit 1 */
-
-  /* USER CODE END USART1_MspInit 1 */
-  }
-  else if(huart->Instance==USART2)
-  {
-  /* USER CODE BEGIN USART2_MspInit 0 */
-
-  /* USER CODE END USART2_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_USART2_CLK_ENABLE();
-  
-    /**USART2 GPIO Configuration    
-    PA2     ------> USART2_TX
-    PA3     ------> USART2_RX 
-    */
-    GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-    GPIO_InitStruct.Alternate = GPIO_AF4_USART2;
-    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
-  /* USER CODE BEGIN USART2_MspInit 1 */
-
-  /* USER CODE END USART2_MspInit 1 */
-  }
-
-}
-
-void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
-{
-
-  if(huart->Instance==LPUART1)
-  {
-  /* USER CODE BEGIN LPUART1_MspDeInit 0 */
-
-  /* USER CODE END LPUART1_MspDeInit 0 */
-    /* Peripheral clock disable */
-    __HAL_RCC_LPUART1_CLK_DISABLE();
-  
-    /**LPUART1 GPIO Configuration    
-    PC4     ------> LPUART1_TX
-    PC5     ------> LPUART1_RX 
-    */
-    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_4|GPIO_PIN_5);
-
-    /* LPUART1 interrupt DeInit */
-  /* USER CODE BEGIN LPUART1:AES_RNG_LPUART1_IRQn disable */
-    /**
-    * Uncomment the line below to disable the "AES_RNG_LPUART1_IRQn" interrupt
-    * Be aware, disabling shared interrupt may affect other IPs
-    */
-    /* HAL_NVIC_DisableIRQ(AES_RNG_LPUART1_IRQn); */
-  /* USER CODE END LPUART1:AES_RNG_LPUART1_IRQn disable */
-
-  /* USER CODE BEGIN LPUART1_MspDeInit 1 */
-
-  /* USER CODE END LPUART1_MspDeInit 1 */
-  }
-  else if(huart->Instance==USART1)
-  {
-  /* USER CODE BEGIN USART1_MspDeInit 0 */
-
-  /* USER CODE END USART1_MspDeInit 0 */
-    /* Peripheral clock disable */
-    __HAL_RCC_USART1_CLK_DISABLE();
-  
-    /**USART1 GPIO Configuration    
-    PA9     ------> USART1_TX
-    PA10     ------> USART1_RX 
-    */
-    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
-
-    /* USART1 interrupt DeInit */
-    HAL_NVIC_DisableIRQ(USART1_IRQn);
-  /* USER CODE BEGIN USART1_MspDeInit 1 */
-
-  /* USER CODE END USART1_MspDeInit 1 */
-  }
-  else if(huart->Instance==USART2)
-  {
-  /* USER CODE BEGIN USART2_MspDeInit 0 */
-
-  /* USER CODE END USART2_MspDeInit 0 */
-    /* Peripheral clock disable */
-    __HAL_RCC_USART2_CLK_DISABLE();
-  
-    /**USART2 GPIO Configuration    
-    PA2     ------> USART2_TX
-    PA3     ------> USART2_RX 
-    */
-    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3);
-
-  /* USER CODE BEGIN USART2_MspDeInit 1 */
-
-  /* USER CODE END USART2_MspDeInit 1 */
-  }
-
-}
-
-void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng)
-{
-
-  if(hrng->Instance==RNG)
-  {
-  /* USER CODE BEGIN RNG_MspInit 0 */
-
-  /* USER CODE END RNG_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_RNG_CLK_ENABLE();
-    /* RNG interrupt Init */
-    HAL_NVIC_SetPriority(AES_RNG_LPUART1_IRQn, 0, 0);
-    HAL_NVIC_EnableIRQ(AES_RNG_LPUART1_IRQn);
-  /* USER CODE BEGIN RNG_MspInit 1 */
-
-  /* USER CODE END RNG_MspInit 1 */
-  }
-
-}
-
-void HAL_RNG_MspDeInit(RNG_HandleTypeDef* hrng)
-{
-
-  if(hrng->Instance==RNG)
-  {
-  /* USER CODE BEGIN RNG_MspDeInit 0 */
-
-  /* USER CODE END RNG_MspDeInit 0 */
-    /* Peripheral clock disable */
-    __HAL_RCC_RNG_CLK_DISABLE();
-
-    /* RNG interrupt DeInit */
-  /* USER CODE BEGIN RNG:AES_RNG_LPUART1_IRQn disable */
-    /**
-    * Uncomment the line below to disable the "AES_RNG_LPUART1_IRQn" interrupt
-    * Be aware, disabling shared interrupt may affect other IPs
-    */
-    /* HAL_NVIC_DisableIRQ(AES_RNG_LPUART1_IRQn); */
-  /* USER CODE END RNG:AES_RNG_LPUART1_IRQn disable */
-
-  /* USER CODE BEGIN RNG_MspDeInit 1 */
-
-  /* USER CODE END RNG_MspDeInit 1 */
-  }
-
-}
-
-void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
-{
-
-  if(hrtc->Instance==RTC)
-  {
-  /* USER CODE BEGIN RTC_MspInit 0 */
-
-  /* USER CODE END RTC_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_RTC_ENABLE();
-  /* USER CODE BEGIN RTC_MspInit 1 */
-
-  /* USER CODE END RTC_MspInit 1 */
-  }
-
-}
-
-void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
-{
-
-  if(hrtc->Instance==RTC)
-  {
-  /* USER CODE BEGIN RTC_MspDeInit 0 */
-
-  /* USER CODE END RTC_MspDeInit 0 */
-    /* Peripheral clock disable */
-    __HAL_RCC_RTC_DISABLE();
-
-    /* RTC interrupt DeInit */
-    HAL_NVIC_DisableIRQ(RTC_IRQn);
-  /* USER CODE BEGIN RTC_MspDeInit 1 */
-
-  /* USER CODE END RTC_MspDeInit 1 */
-  }
-
-}
-
-void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
-{
-
-  GPIO_InitTypeDef GPIO_InitStruct;
-  if(hspi->Instance==SPI1)
-  {
-  /* USER CODE BEGIN SPI1_MspInit 0 */
-
-  /* USER CODE END SPI1_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_SPI1_CLK_ENABLE();
-  
-    /**SPI1 GPIO Configuration    
-    PB3     ------> SPI1_SCK
-    PB4     ------> SPI1_MISO
-    PB5     ------> SPI1_MOSI 
-    */
-    GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5;
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-    GPIO_InitStruct.Alternate = GPIO_AF0_SPI1;
-    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
-  /* USER CODE BEGIN SPI1_MspInit 1 */
-
-  /* USER CODE END SPI1_MspInit 1 */
-  }
-  else if(hspi->Instance==SPI2)
-  {
-  /* USER CODE BEGIN SPI2_MspInit 0 */
-
-  /* USER CODE END SPI2_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_SPI2_CLK_ENABLE();
-  
-    /**SPI2 GPIO Configuration    
-    PB13     ------> SPI2_SCK
-    PB14     ------> SPI2_MISO
-    PB15     ------> SPI2_MOSI 
-    */
-    GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-    GPIO_InitStruct.Alternate = GPIO_AF0_SPI2;
-    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
-  /* USER CODE BEGIN SPI2_MspInit 1 */
-
-  /* USER CODE END SPI2_MspInit 1 */
-  }
-
-}
-
-void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
-{
-
-  if(hspi->Instance==SPI1)
-  {
-  /* USER CODE BEGIN SPI1_MspDeInit 0 */
-
-  /* USER CODE END SPI1_MspDeInit 0 */
-    /* Peripheral clock disable */
-    __HAL_RCC_SPI1_CLK_DISABLE();
-  
-    /**SPI1 GPIO Configuration    
-    PB3     ------> SPI1_SCK
-    PB4     ------> SPI1_MISO
-    PB5     ------> SPI1_MOSI 
-    */
-    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5);
-
-  /* USER CODE BEGIN SPI1_MspDeInit 1 */
-
-  /* USER CODE END SPI1_MspDeInit 1 */
-  }
-  else if(hspi->Instance==SPI2)
-  {
-  /* USER CODE BEGIN SPI2_MspDeInit 0 */
-
-  /* USER CODE END SPI2_MspDeInit 0 */
-    /* Peripheral clock disable */
-    __HAL_RCC_SPI2_CLK_DISABLE();
-  
-    /**SPI2 GPIO Configuration    
-    PB13     ------> SPI2_SCK
-    PB14     ------> SPI2_MISO
-    PB15     ------> SPI2_MOSI 
-    */
-    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
-
-  /* USER CODE BEGIN SPI2_MspDeInit 1 */
-
-  /* USER CODE END SPI2_MspDeInit 1 */
-  }
-
-}
-
-/* USER CODE BEGIN 1 */
-
-/* USER CODE END 1 */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Src/stm32l0xx_it.c b/Src/stm32l0xx_it.c
deleted file mode 100755
index 90d29527..00000000
--- a/Src/stm32l0xx_it.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_it.c
-  * @brief   Interrupt Service Routines.
-  ******************************************************************************
-  *
-  * COPYRIGHT(c) 2018 STMicroelectronics
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l0xx_hal.h"
-#include "stm32l0xx.h"
-#include "stm32l0xx_it.h"
-
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
-
-/* External variables --------------------------------------------------------*/
-extern CRYP_HandleTypeDef hcryp;
-extern UART_HandleTypeDef hlpuart1;
-extern UART_HandleTypeDef huart1;
-extern RNG_HandleTypeDef hrng;
-extern RTC_HandleTypeDef hrtc;
-
-/******************************************************************************/
-/*            Cortex-M0+ Processor Interruption and Exception Handlers         */ 
-/******************************************************************************/
-
-/**
-* @brief This function handles Non maskable interrupt.
-*/
-void NMI_Handler(void)
-{
-  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
-
-  /* USER CODE END NonMaskableInt_IRQn 0 */
-  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
-
-  /* USER CODE END NonMaskableInt_IRQn 1 */
-}
-
-/**
-* @brief This function handles Hard fault interrupt.
-*/
-void HardFault_Handler(void)
-{
-  /* USER CODE BEGIN HardFault_IRQn 0 */
-
-  /* USER CODE END HardFault_IRQn 0 */
-  while (1)
-  {
-    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
-    /* USER CODE END W1_HardFault_IRQn 0 */
-  }
-  /* USER CODE BEGIN HardFault_IRQn 1 */
-
-  /* USER CODE END HardFault_IRQn 1 */
-}
-
-/**
-* @brief This function handles System service call via SWI instruction.
-*/
-void SVC_Handler(void)
-{
-  /* USER CODE BEGIN SVC_IRQn 0 */
-
-  /* USER CODE END SVC_IRQn 0 */
-  /* USER CODE BEGIN SVC_IRQn 1 */
-
-  /* USER CODE END SVC_IRQn 1 */
-}
-
-/**
-* @brief This function handles Pendable request for system service.
-*/
-void PendSV_Handler(void)
-{
-  /* USER CODE BEGIN PendSV_IRQn 0 */
-
-  /* USER CODE END PendSV_IRQn 0 */
-  /* USER CODE BEGIN PendSV_IRQn 1 */
-
-  /* USER CODE END PendSV_IRQn 1 */
-}
-
-/**
-* @brief This function handles System tick timer.
-*/
-void SysTick_Handler(void)
-{
-  /* USER CODE BEGIN SysTick_IRQn 0 */
-
-  /* USER CODE END SysTick_IRQn 0 */
-  HAL_IncTick();
-  HAL_SYSTICK_IRQHandler();
-  /* USER CODE BEGIN SysTick_IRQn 1 */
-
-  /* USER CODE END SysTick_IRQn 1 */
-}
-
-/******************************************************************************/
-/* STM32L0xx Peripheral Interrupt Handlers                                    */
-/* Add here the Interrupt Handlers for the used peripherals.                  */
-/* For the available peripheral interrupt handler names,                      */
-/* please refer to the startup file (startup_stm32l0xx.s).                    */
-/******************************************************************************/
-
-/**
-* @brief This function handles RTC global interrupt through EXTI lines 17, 19 and 20 and LSE CSS interrupt through EXTI line 19.
-*/
-void RTC_IRQHandler(void)
-{
-  /* USER CODE BEGIN RTC_IRQn 0 */
-
-  /* USER CODE END RTC_IRQn 0 */
-  HAL_RTC_AlarmIRQHandler(&hrtc);
-  HAL_RTCEx_WakeUpTimerIRQHandler(&hrtc);
-  /* USER CODE BEGIN RTC_IRQn 1 */
-
-  /* USER CODE END RTC_IRQn 1 */
-}
-
-/**
-* @brief This function handles EXTI line 4 to 15 interrupts.
-*/
-void EXTI4_15_IRQHandler(void)
-{
-  /* USER CODE BEGIN EXTI4_15_IRQn 0 */
-
-  /* USER CODE END EXTI4_15_IRQn 0 */
-  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_6);
-  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_13);
-  /* USER CODE BEGIN EXTI4_15_IRQn 1 */
-
-  /* USER CODE END EXTI4_15_IRQn 1 */
-}
-
-/**
-* @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI line 25.
-*/
-void USART1_IRQHandler(void)
-{
-  /* USER CODE BEGIN USART1_IRQn 0 */
-
-  /* USER CODE END USART1_IRQn 0 */
-  HAL_UART_IRQHandler(&huart1);
-  /* USER CODE BEGIN USART1_IRQn 1 */
-
-  /* USER CODE END USART1_IRQn 1 */
-}
-
-/**
-* @brief This function handles AES, RNG and LPUART1 interrupts / LPUART1 wake-up interrupt through EXTI line 28.
-*/
-void AES_RNG_LPUART1_IRQHandler(void)
-{
-  /* USER CODE BEGIN AES_RNG_LPUART1_IRQn 0 */
-
-  /* USER CODE END AES_RNG_LPUART1_IRQn 0 */
-  HAL_CRYP_IRQHandler(&hcryp);
-  HAL_RNG_IRQHandler(&hrng);
-  HAL_UART_IRQHandler(&hlpuart1);
-  /* USER CODE BEGIN AES_RNG_LPUART1_IRQn 1 */
-
-  /* USER CODE END AES_RNG_LPUART1_IRQn 1 */
-}
-
-/* USER CODE BEGIN 1 */
-
-/* USER CODE END 1 */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Src/sys_debug.c b/Src/sys_debug.c
deleted file mode 100755
index 84d6b4ab..00000000
--- a/Src/sys_debug.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/* ========================================
- *
- * Copyright AIO SYSTEMS, 2018
- * Written by Novodes for AIO SYSTEMS
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO SYSTEMS.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : sys_debug.c
-  * @brief          : This is a user application driver used only for debug purposes
-                      during the development process.
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-//#include "external_flash.h"
-//#include "sys_debug.h"
-
-
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
- 
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions ---------------------------------------------------------*/
-
-
-
-/************************ (C) COPYRIGHT AIO SYSTEMS *****END OF FILE****/
diff --git a/Src/system_stm32l0xx.c b/Src/system_stm32l0xx.c
deleted file mode 100755
index 9ec790eb..00000000
--- a/Src/system_stm32l0xx.c
+++ /dev/null
@@ -1,285 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    system_stm32l0xx.c
-  * @author  MCD Application Team
-  * @brief   CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File.
-  *
-  *   This file provides two functions and one global variable to be called from 
-  *   user application:
-  *      - SystemInit(): This function is called at startup just after reset and 
-  *                      before branch to main program. This call is made inside
-  *                      the "startup_stm32l0xx.s" file.
-  *
-  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
-  *                                  by the user application to setup the SysTick 
-  *                                  timer or configure other parameters.
-  *                                     
-  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
-  *                                 be called whenever the core clock is changed
-  *                                 during program execution.
-  *
-  *
-  ******************************************************************************
-  * @attention
-  *
-  * 
© COPYRIGHT(c) 2016 STMicroelectronics

-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l0xx_system
-  * @{
-  */  
-  
-/** @addtogroup STM32L0xx_System_Private_Includes
-  * @{
-  */
-
-#include "stm32l0xx.h"
-
-#if !defined  (HSE_VALUE) 
-  #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (MSI_VALUE)
-  #define MSI_VALUE    ((uint32_t)2000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* MSI_VALUE */
-   
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L0xx_System_Private_TypesDefinitions
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L0xx_System_Private_Defines
-  * @{
-  */
-/************************* Miscellaneous Configuration ************************/
-
-/*!< Uncomment the following line if you need to relocate your vector Table in
-     Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET  0x00U /*!< Vector Table base offset field. 
-                                   This value must be a multiple of 0x200. */
-/******************************************************************************/
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L0xx_System_Private_Macros
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L0xx_System_Private_Variables
-  * @{
-  */
-  /* This variable is updated in three ways:
-      1) by calling CMSIS function SystemCoreClockUpdate()
-      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
-      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 
-         Note: If you use this function to configure the system clock; then there
-               is no need to call the 2 first functions listed above, since SystemCoreClock
-               variable is updated automatically.
-  */
-  uint32_t SystemCoreClock = 2000000U;
-  const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
-  const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
-  const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U};
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L0xx_System_Private_FunctionPrototypes
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L0xx_System_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  Setup the microcontroller system.
-  * @param  None
-  * @retval None
-  */
-void SystemInit (void)
-{    
-/*!< Set MSION bit */
-  RCC->CR |= (uint32_t)0x00000100U;
-
-  /*!< Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0], MCOSEL[2:0] and MCOPRE[2:0] bits */
-  RCC->CFGR &= (uint32_t) 0x88FF400CU;
- 
-  /*!< Reset HSION, HSIDIVEN, HSEON, CSSON and PLLON bits */
-  RCC->CR &= (uint32_t)0xFEF6FFF6U;
-  
-  /*!< Reset HSI48ON  bit */
-  RCC->CRRCR &= (uint32_t)0xFFFFFFFEU;
-  
-  /*!< Reset HSEBYP bit */
-  RCC->CR &= (uint32_t)0xFFFBFFFFU;
-
-  /*!< Reset PLLSRC, PLLMUL[3:0] and PLLDIV[1:0] bits */
-  RCC->CFGR &= (uint32_t)0xFF02FFFFU;
-
-  /*!< Disable all interrupts */
-  RCC->CIER = 0x00000000U;
-  
-  /* Configure the Vector Table location add offset address ------------------*/
-#ifdef VECT_TAB_SRAM
-  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
-#else
-  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
-#endif
-}
-
-/**
-  * @brief  Update SystemCoreClock according to Clock Register Values
-  *         The SystemCoreClock variable contains the core clock (HCLK), it can
-  *         be used by the user application to setup the SysTick timer or configure
-  *         other parameters.
-  *           
-  * @note   Each time the core clock (HCLK) changes, this function must be called
-  *         to update SystemCoreClock variable value. Otherwise, any configuration
-  *         based on this variable will be incorrect.         
-  *     
-  * @note   - The system frequency computed by this function is not the real 
-  *           frequency in the chip. It is calculated based on the predefined 
-  *           constant and the selected clock source:
-  *             
-  *           - If SYSCLK source is MSI, SystemCoreClock will contain the MSI 
-  *             value as defined by the MSI range.
-  *                                   
-  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
-  *                                              
-  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
-  *                          
-  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
-  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
-  *         
-  *         (*) HSI_VALUE is a constant defined in stm32l0xx_hal.h file (default value
-  *             16 MHz) but the real value may vary depending on the variations
-  *             in voltage and temperature.   
-  *    
-  *         (**) HSE_VALUE is a constant defined in stm32l0xx_hal.h file (default value
-  *              8 MHz), user has to ensure that HSE_VALUE is same as the real
-  *              frequency of the crystal used. Otherwise, this function may
-  *              have wrong result.
-  *                
-  *         - The result of this function could be not correct when using fractional
-  *           value for HSE crystal.
-  * @param  None
-  * @retval None
-  */
-void SystemCoreClockUpdate (void)
-{
-  uint32_t tmp = 0U, pllmul = 0U, plldiv = 0U, pllsource = 0U, msirange = 0U;
-
-  /* Get SYSCLK source -------------------------------------------------------*/
-  tmp = RCC->CFGR & RCC_CFGR_SWS;
-  
-  switch (tmp)
-  {
-    case 0x00U:  /* MSI used as system clock */
-      msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13U;
-      SystemCoreClock = (32768U * (1U << (msirange + 1U)));
-      break;
-    case 0x04U:  /* HSI used as system clock */
-      SystemCoreClock = HSI_VALUE;
-      break;
-    case 0x08U:  /* HSE used as system clock */
-      SystemCoreClock = HSE_VALUE;
-      break;
-    case 0x0CU:  /* PLL used as system clock */
-      /* Get PLL clock source and multiplication factor ----------------------*/
-      pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
-      plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
-      pllmul = PLLMulTable[(pllmul >> 18U)];
-      plldiv = (plldiv >> 22U) + 1U;
-      
-      pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
-
-      if (pllsource == 0x00U)
-      {
-        /* HSI oscillator clock selected as PLL clock entry */
-        SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv);
-      }
-      else
-      {
-        /* HSE selected as PLL clock entry */
-        SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv);
-      }
-      break;
-    default: /* MSI used as system clock */
-      msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13U;
-      SystemCoreClock = (32768U * (1U << (msirange + 1U)));
-      break;
-  }
-  /* Compute HCLK clock frequency --------------------------------------------*/
-  /* Get HCLK prescaler */
-  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
-  /* HCLK clock frequency */
-  SystemCoreClock >>= tmp;
-}
-
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Src/usart.c b/Src/usart.c
deleted file mode 100755
index 991686c1..00000000
--- a/Src/usart.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/**
-  ******************************************************************************
-  * File Name          : USART.c
-  * Description        : This file provides code for the configuration
-  *                      of the USART instances.
-  ******************************************************************************
-  ** This notice applies to any and all portions of this file
-  * that are not between comment pairs USER CODE BEGIN and
-  * USER CODE END. Other portions of this file, whether 
-  * inserted by the user or by software development tools
-  * are owned by their respective copyright owners.
-  *
-  * COPYRIGHT(c) 2018 STMicroelectronics
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "usart.h"
-#include "gpio.h"
-
-/***********************************************************
-
-Function name: UART1_Transmit
-
-Function type: void
-
-Arguments: UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout
-
-Return: None
-
-Description: This function is responsible for sending data
-over RS485 with WS control of the enable pins of the 
-Tranceiver.
-
-**********************************************************/
-void UART1_Transmit(uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-	UART1_DE();		//For RS485 flow
-	HAL_UART_Transmit(&huart1, pData, Size, Timeout);
-	UART1_RE();		//For RS485 flow
-}
-
-
-
-/***********************************************************
-
-Function name: UART2_Transmit
-
-Function type: void
-
-Arguments: UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout
-
-Return: None
-
-Description: This function is responsible for sending data
-over RS485 with WS control of the enable pins of the 
-Tranceiver.
-
-**********************************************************/
-void UART2_Transmit(uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-	UART2_DE();		//For RS485 flow
-	HAL_UART_Transmit(&huart2, pData, Size, Timeout);
-	UART2_RE();		//For RS485 flow
-}
-
-
-void USART2_SendData(void)
-{
-	uint8_t da1[2] = {0x37, 0x38};
-	HAL_UART_Transmit(&huart2, da1, 2, 500);
-}
-
-
-void USART1_SendData(uint8_t length, uint8_t *dat)
-{
-	HAL_UART_Transmit(&huart1, dat, 2, 500);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Src/watchdog.c b/Src/watchdog.c
deleted file mode 100755
index e4f55078..00000000
--- a/Src/watchdog.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/* ========================================
- *
- * Copyright AIO Systems, 2018
- * Written by Novodes for AIO Systems
- * All Rights Reserved
- * UNPUBLISHED, LICENSED SOFTWARE.
- *
- * CONFIDENTIAL AND PROPRIETARY INFORMATION
- * WHICH IS THE PROPERTY OF AIO Systems.
- *
- * ========================================
-*/
-/**
-  ******************************************************************************
-  * @file           : watchdog.c
-  * @brief          : This is a user application driver for the watchdog
-  ******************************************************************************
-**/
-
-/* [] BEGINNING OF FILE */
-
-/* Includes ------------------------------------------------------------------*/
-#include "watchdog.h"
-
-/* Private typedef -----------------------------------------------------------*/
-
-/* Private define ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/* Private variables ---------------------------------------------------------*/
-
-//IWDG_HandleTypeDef hiwdg;
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions ---------------------------------------------------------*/
-
-/**
-  * @brief  This function reconfigures the period of the watchdog timer
-  * @param  uint8_t seconds - the period in seconds (maximum value is 28)
-  * @retval None
-  */
-void WD_Period_Set(uint8_t seconds)   // max value of seconds is around ~28 seconds.
-{
-  uint32_t uwLsiFreq = LSI_FREQUENCY;   // it is equal ~39Khz according to the datasheet (but there can be a serious drift ob +4% and -10% and the nominal value can range between 25Khz and 50Khz.
-                                // it would be wise to verify the value of the LSI for each MCU using the GetLSIFrequency() function and call it every now and then (for example every 5 minutes).
-                                // Calling GetLSIFrequency is a good thing also for the RTC since it also sources its clock from the LSI and in order for the RTC to be accurate such a periodic calibration would be wise.
-  
-  /*### Configure the IWDG peripheral ######################################*/
-  /* Example for calculation of setting counter reload value to obtain 20s IWDG TimeOut.
-     IWDG counter clock Frequency = LsiFreq / 32
-     Counter Reload Value = 20s / IWDG counter clock period
-                          = 20s / (256/LsiFreq)
-                          = (LsiFreq * 20) / (256) */
-  
-  hiwdg.Instance = IWDG;
-
-  hiwdg.Init.Prescaler = IWDG_PRESCALER_256;
-  hiwdg.Init.Reload    = (uwLsiFreq * (uint32_t)seconds) / 256;
-	hiwdg.Init.Window = 4095;	// set it to 4095 to disable window mode.
-
-  if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
-  {
-    /* Initialization Error */
-    ;//Status_Handler(WATCHDOG_INIT_ERROR);
-  }
- 
-}
-
-/**
-  * @brief  This function reloads the timer of the iWatchdog
-  * @param  None
-  * @retval None
-  */
-void WD_Reload()
-{
-    HAL_IWDG_Refresh(&hiwdg);
-}
-
-/**
-  * @brief  This function checks if the program woke up due to a watchdog reset event
-  * @param  None
-  * @retval None
-  */
-void Check_WD_Reset()
-{
-  // Check if the system has resumed from IWDG reset
-  if (__HAL_RCC_GET_FLAG(RCC_FLAG_IWDGRST) != RESET)  
-  {
-    //Clear reset flags
-    __HAL_RCC_CLEAR_RESET_FLAGS();
-		
-    #ifdef WATCHDOG_LOGS
-      printf("Watchdog event occured!\r\n");
-    #endif
-    //Error_Handler();	// Eyal Gerber (17.08.2018): Don't go to error handler in case of WD event. This application does not have a human safety consideration. If it can continue to run after reset, let it. 
-  }
-}
-
-/************************ (C) COPYRIGHT AIO Systems *****END OF FILE****/

From 8e2079254379168e22fc714e41f31856552887d4 Mon Sep 17 00:00:00 2001
From: Hadar Epstein 
Date: Fri, 5 Mar 2021 08:39:26 -0800
Subject: [PATCH 0006/4650] s

---
 clang.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/clang.c b/clang.c
index 204d85dc..1fff9317 100644
--- a/clang.c
+++ b/clang.c
@@ -1,5 +1,6 @@
 void f1(struct fred_t *p)
 {
+
     // dereference p and then check if it's NULL
     int x = p->x;
     if (p)

From eefdacabbe071bb552f008d1c884d546779266ed Mon Sep 17 00:00:00 2001
From: Hadar Epstein 
Date: Fri, 5 Mar 2021 08:41:24 -0800
Subject: [PATCH 0007/4650] s

---
 t.t | 2 --
 1 file changed, 2 deletions(-)
 delete mode 100644 t.t

diff --git a/t.t b/t.t
deleted file mode 100644
index 28003c55..00000000
--- a/t.t
+++ /dev/null
@@ -1,2 +0,0 @@
-t.t
-Loops Rule\!

From a530857bf67182c4ef4f31978ed1d306659e9067 Mon Sep 17 00:00:00 2001
From: Hadar Epstein 
Date: Mon, 22 Mar 2021 08:36:55 -0700
Subject: [PATCH 0008/4650] s

---
 clang.c               |    2 +
 clang_tidy_output.txt | 1068 +----------------------------------------
 2 files changed, 17 insertions(+), 1053 deletions(-)

diff --git a/clang.c b/clang.c
index 1fff9317..94bccf83 100644
--- a/clang.c
+++ b/clang.c
@@ -1,6 +1,8 @@
 void f1(struct fred_t *p)
 {
 
+
+
     // dereference p and then check if it's NULL
     int x = p->x;
     if (p)
diff --git a/clang_tidy_output.txt b/clang_tidy_output.txt
index 65ca3ce5..ab89df23 100644
--- a/clang_tidy_output.txt
+++ b/clang_tidy_output.txt
@@ -1,1083 +1,45 @@
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc.c:67:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c:52:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc_ex.c:52:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2s.c:138:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp_ex.c:53:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac_ex.c:56:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lcd.c:89:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr_ex.c:42:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rng.c:58:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c:96:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_irda.c:140:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lptim.c:123:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c:42:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tsc.c:111:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard.c:134:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smbus.c:126:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_smartcard_ex.c:57:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c:257:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c:127:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac.c:188:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c:169:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c:88:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.c:84:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd_ex.c:42:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp.c:151:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c:66:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr.c:43:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c:101:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_iwdg.c:110:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c:80:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c:52:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c:36:10: error: 'stm32l0xx_ll_rcc.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_ll_rcc.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c:61:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c:242:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_firewall.c:64:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pcd.c:73:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc_ex.c:113:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_msp_template.c:48:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c:55:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_usart.c:84:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rtc.c:112:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c:67:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c:130:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_wwdg.c:125:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c:151:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c:49:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f64.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q31.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q31.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q15.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix8_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/CommonTables/arm_const_structs.c:43:10: error: 'arm_const_structs.h' file not found [clang-diagnostic-error]
-#include "arm_const_structs.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_opt_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c:42:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c:41:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c:40:10: error: 'arm_math.h' file not found [clang-diagnostic-error]
-#include "arm_math.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c:64:10: error: 'stm32l0xx.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/clang.c:1:16: warning: declaration of 'struct fred_t' will not be visible outside of this function [clang-diagnostic-visibility]
+/Users/hadar/Desktop/github-plugin/softacheck-dev/../../test_github/test-repo//clang.c:1:16: warning: declaration of 'struct fred_t' will not be visible outside of this function [clang-diagnostic-visibility]
 void f1(struct fred_t *p)
                ^
-/Users/hadar/Desktop/test_github/test-repo/clang.c:4:14: error: incomplete definition of type 'struct fred_t' [clang-diagnostic-error]
+/Users/hadar/Desktop/github-plugin/softacheck-dev/../../test_github/test-repo//clang.c:5:14: error: incomplete definition of type 'struct fred_t' [clang-diagnostic-error]
     int x = p->x;
              ^
-/Users/hadar/Desktop/test_github/test-repo/clang.c:1:16: note: forward declaration of 'struct fred_t'
+/Users/hadar/Desktop/github-plugin/softacheck-dev/../../test_github/test-repo//clang.c:1:16: note: forward declaration of 'struct fred_t'
 void f1(struct fred_t *p)
                ^
-/Users/hadar/Desktop/test_github/test-repo/clang.c:6:9: warning: implicit declaration of function 'do_something' is invalid in C99 [clang-diagnostic-implicit-function-declaration]
+/Users/hadar/Desktop/github-plugin/softacheck-dev/../../test_github/test-repo//clang.c:7:9: warning: implicit declaration of function 'do_something' is invalid in C99 [clang-diagnostic-implicit-function-declaration]
         do_something(x);
         ^
-/Users/hadar/Desktop/test_github/test-repo/clang.c:11:21: error: use of undeclared identifier 'NULL' [clang-diagnostic-error]
+/Users/hadar/Desktop/github-plugin/softacheck-dev/../../test_github/test-repo//clang.c:12:21: error: use of undeclared identifier 'NULL' [clang-diagnostic-error]
     const char *p = NULL;
                     ^
-/Users/hadar/Desktop/test_github/test-repo/clang.c:12:21: error: use of undeclared identifier 'str' [clang-diagnostic-error]
+/Users/hadar/Desktop/github-plugin/softacheck-dev/../../test_github/test-repo//clang.c:13:21: error: use of undeclared identifier 'str' [clang-diagnostic-error]
     for (int i = 0; str[i] != '\0'; i++)
                     ^
-/Users/hadar/Desktop/test_github/test-repo/clang.c:14:13: error: use of undeclared identifier 'str' [clang-diagnostic-error]
+/Users/hadar/Desktop/github-plugin/softacheck-dev/../../test_github/test-repo//clang.c:15:13: error: use of undeclared identifier 'str' [clang-diagnostic-error]
         if (str[i] == ' ')
             ^
-/Users/hadar/Desktop/test_github/test-repo/clang.c:16:17: error: use of undeclared identifier 'str' [clang-diagnostic-error]
+/Users/hadar/Desktop/github-plugin/softacheck-dev/../../test_github/test-repo//clang.c:17:17: error: use of undeclared identifier 'str' [clang-diagnostic-error]
             p = str + i;
                 ^
-/Users/hadar/Desktop/test_github/test-repo/clang.c:28:24: error: use of undeclared identifier 'NULL' [clang-diagnostic-error]
+/Users/hadar/Desktop/github-plugin/softacheck-dev/../../test_github/test-repo//clang.c:29:24: error: use of undeclared identifier 'NULL' [clang-diagnostic-error]
     struct fred_t *p = NULL;
                        ^
-/Users/hadar/Desktop/test_github/test-repo/clang.c:30:13: error: use of undeclared identifier 'fred1' [clang-diagnostic-error]
+/Users/hadar/Desktop/github-plugin/softacheck-dev/../../test_github/test-repo//clang.c:31:13: error: use of undeclared identifier 'fred1' [clang-diagnostic-error]
         p = fred1;
             ^
-/Users/hadar/Desktop/test_github/test-repo/test-clang.c:1:1: error: unknown type name 'test' [clang-diagnostic-error]
+/Users/hadar/Desktop/github-plugin/softacheck-dev/../../test_github/test-repo//test-clang.c:1:1: error: unknown type name 'test' [clang-diagnostic-error]
 test-clang.c
 ^
-/Users/hadar/Desktop/test_github/test-repo/test-clang.c:1:5: error: expected identifier or '(' [clang-diagnostic-error]
+/Users/hadar/Desktop/github-plugin/softacheck-dev/../../test_github/test-repo//test-clang.c:1:5: error: expected identifier or '(' [clang-diagnostic-error]
 test-clang.c
     ^
-/Users/hadar/Desktop/test_github/test-repo/test2.c:7:8: warning: Dereference of undefined pointer value [clang-analyzer-core.NullDereference]
+/Users/hadar/Desktop/github-plugin/softacheck-dev/../../test_github/test-repo//test2.c:7:8: warning: Dereference of undefined pointer value [clang-analyzer-core.NullDereference]
     *p = 0;
        ^
-/Users/hadar/Desktop/test_github/test-repo/test2.c:3:5: note: 'p' declared without an initial value
+/Users/hadar/Desktop/github-plugin/softacheck-dev/../../test_github/test-repo//test2.c:3:5: note: 'p' declared without an initial value
     char *p;
     ^
-/Users/hadar/Desktop/test_github/test-repo/test2.c:7:8: note: Dereference of undefined pointer value
+/Users/hadar/Desktop/github-plugin/softacheck-dev/../../test_github/test-repo//test2.c:7:8: note: Dereference of undefined pointer value
     *p = 0;
        ^
-/Users/hadar/Desktop/test_github/test-repo/Src/radio.c:24:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/parameters.c:28:10: error: 'parameters.h' file not found [clang-diagnostic-error]
-#include "parameters.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/common.c:25:10: error: 'common.h' file not found [clang-diagnostic-error]
-#include "common.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/modbus_impl.c:29:10: error: 'stdio.h' file not found [clang-diagnostic-error]
-#include "stdio.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/GW_BRProtocolsImp.c:24:10: error: 'GW_BRProtocolsImp.h' file not found [clang-diagnostic-error]
-#include "GW_BRProtocolsImp.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/spi.c:41:10: error: 'spi.h' file not found [clang-diagnostic-error]
-#include "spi.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/receive_interrupt.c:21:10: error: 'string.h' file not found [clang-diagnostic-error]
-#include 
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/rtc.c:24:10: error: 'rtc.h' file not found [clang-diagnostic-error]
-#include "rtc.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/stm32l0xx_hal_msp.c:40:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/cc1101.c:23:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/State_machine.c:1:10: error: 'State_machine.h' file not found [clang-diagnostic-error]
-#include "State_machine.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/gpio.c:24:10: error: 'gpio.h' file not found [clang-diagnostic-error]
-#include "gpio.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/Logger.c:26:10: error: 'logger.h' file not found [clang-diagnostic-error]
-#include "logger.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/W3_Flash.c:24:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/EEPROM.c:23:10: error: 'eeprom.h' file not found [clang-diagnostic-error]
-#include "eeprom.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/watchdog.c:23:10: error: 'watchdog.h' file not found [clang-diagnostic-error]
-#include "watchdog.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/main.c:40:10: error: 'main.h' file not found [clang-diagnostic-error]
-#include "main.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/PC_GW_ProtocolFunctions.c:25:10: error: 'PC_GW_ProtocolFunctions.h' file not found [clang-diagnostic-error]
-#include "PC_GW_ProtocolFunctions.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/modbus_driver.c:27:10: error: 'modbus_driver.h' file not found [clang-diagnostic-error]
-#include "modbus_driver.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/power_management.c:23:10: error: 'power_management.h' file not found [clang-diagnostic-error]
-#include "power_management.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/modbus_app_layer.c:26:10: error: 'modbus_app_layer.h' file not found [clang-diagnostic-error]
-#include "modbus_app_layer.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/usart.c:41:10: error: 'usart.h' file not found [clang-diagnostic-error]
-#include "usart.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/system_stm32l0xx.c:64:10: error: 'stm32l0xx.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/BIT.c:24:10: error: 'BIT.h' file not found [clang-diagnostic-error]
-#include "BIT.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/app_main.c:24:10: error: 'app_main.h' file not found [clang-diagnostic-error]
-#include "app_main.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/encryption.c:23:10: error: 'encryption.h' file not found [clang-diagnostic-error]
-#include "encryption.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/external_flash.c:24:10: error: 'external_flash.h' file not found [clang-diagnostic-error]
-#include "external_flash.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/stm32l0xx_it.c:34:10: error: 'stm32l0xx_hal.h' file not found [clang-diagnostic-error]
-#include "stm32l0xx_hal.h"
-         ^
-/Users/hadar/Desktop/test_github/test-repo/Src/bootloader_support.c:23:10: error: 'bootloader_support.h' file not found [clang-diagnostic-error]
-#include "bootloader_support.h"
-         ^

From c6f937206461a447eb5cd0e1ee546e389c682d97 Mon Sep 17 00:00:00 2001
From: Hadar Epstein 
Date: Tue, 23 Mar 2021 08:54:10 -0700
Subject: [PATCH 0009/4650] d

---
 clang.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/clang.c b/clang.c
index 94bccf83..1fff9317 100644
--- a/clang.c
+++ b/clang.c
@@ -1,8 +1,6 @@
 void f1(struct fred_t *p)
 {
 
-
-
     // dereference p and then check if it's NULL
     int x = p->x;
     if (p)

From c288832aa8fc6e77450edcc96f9ecc787299f5ed Mon Sep 17 00:00:00 2001
From: Hadar Epstein 
Date: Thu, 25 Mar 2021 08:18:28 -0700
Subject: [PATCH 0010/4650] s

---
 clang.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/clang.c b/clang.c
index 1fff9317..204d85dc 100644
--- a/clang.c
+++ b/clang.c
@@ -1,6 +1,5 @@
 void f1(struct fred_t *p)
 {
-
     // dereference p and then check if it's NULL
     int x = p->x;
     if (p)

From a06119036dee30f2c4df5e7f9b44c88d6763a34d Mon Sep 17 00:00:00 2001
From: Hadar Epstein 
Date: Thu, 25 Mar 2021 09:10:04 -0700
Subject: [PATCH 0011/4650] d

---
 clang.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/clang.c b/clang.c
index 204d85dc..1fff9317 100644
--- a/clang.c
+++ b/clang.c
@@ -1,5 +1,6 @@
 void f1(struct fred_t *p)
 {
+
     // dereference p and then check if it's NULL
     int x = p->x;
     if (p)

From 23ee28836e1c5bcc3b3c3e1778dd775011b4bd19 Mon Sep 17 00:00:00 2001
From: Hadar Epstein 
Date: Thu, 25 Mar 2021 22:14:41 -0700
Subject: [PATCH 0012/4650] s

---
 clang.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/clang.c b/clang.c
index 1fff9317..d9a3382b 100644
--- a/clang.c
+++ b/clang.c
@@ -1,6 +1,7 @@
 void f1(struct fred_t *p)
 {
 
+
     // dereference p and then check if it's NULL
     int x = p->x;
     if (p)

From f56ddd6a5c01461394853534336dbab7da6e0896 Mon Sep 17 00:00:00 2001
From: Hadar Epstein 
Date: Thu, 25 Mar 2021 22:21:51 -0700
Subject: [PATCH 0013/4650] s

---
 clang.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/clang.c b/clang.c
index d9a3382b..1fff9317 100644
--- a/clang.c
+++ b/clang.c
@@ -1,7 +1,6 @@
 void f1(struct fred_t *p)
 {
 
-
     // dereference p and then check if it's NULL
     int x = p->x;
     if (p)

From 2a462563c3ed00ce205584ada769a55324240525 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 31 Mar 2021 07:42:58 +0000
Subject: [PATCH 0014/4650] [2021-03-31T07:42:57+0000] e2e test


From 933bd04fe57f05df9e9ac12fb42dda16642f454c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 31 Mar 2021 07:45:07 +0000
Subject: [PATCH 0015/4650] [2021-03-31T07:45:07+0000] e2e test


From ba47aeddf94a8b1e20f017705a805ff3a3a6a4a7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 31 Mar 2021 08:59:11 +0000
Subject: [PATCH 0016/4650] [2021-03-31T08:59:10+0000] e2e test


From bc758ea31d8f5fd1185313ee7a5525bf473f35d5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 31 Mar 2021 09:00:18 +0000
Subject: [PATCH 0017/4650] [2021-03-31T09:00:18+0000] e2e test


From 069dc18052274c9848684e95f6af84f1ca0046ca Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 31 Mar 2021 09:22:45 +0000
Subject: [PATCH 0018/4650] [2021-03-31T09:22:45+0000] e2e test


From 279af537772253e230b12ed562643cf43c002c9e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 31 Mar 2021 09:50:22 +0000
Subject: [PATCH 0019/4650] [2021-03-31T09:50:22+0000] e2e test


From cd88389c98fa4627942d5cf245b3d4192943d22c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 31 Mar 2021 10:16:54 +0000
Subject: [PATCH 0020/4650] [2021-03-31T10:16:54+0000] e2e test


From 0bcc899067f4976794087f0c0a469f5f8d7f2e5b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 31 Mar 2021 10:44:02 +0000
Subject: [PATCH 0021/4650] [2021-03-31T10:44:02+0000] e2e test


From 2b31f6f6b686632f524911e3b90dc53af6f5e7bc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 31 Mar 2021 10:59:11 +0000
Subject: [PATCH 0022/4650] [2021-03-31T10:59:11+0000] e2e test


From 98a72d061333e990a05082d161b74ec71816f46c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Apr 2021 05:12:42 +0000
Subject: [PATCH 0023/4650] [2021-04-06T05:12:42+0000] e2e test


From dfd300f79726c10bb8f79382472a8937558a83a3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Apr 2021 05:13:00 +0000
Subject: [PATCH 0024/4650] [2021-04-06T05:12:59+0000] e2e test


From f346969d8bf31c6ecbd538ede99ef7e1141c055a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Apr 2021 05:13:57 +0000
Subject: [PATCH 0025/4650] [2021-04-06T05:13:57+0000] e2e test


From 70b61704c9e62671c6d99790ff2885fe807cf0da Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Apr 2021 05:22:26 +0000
Subject: [PATCH 0026/4650] [2021-04-06T05:22:26+0000] e2e test


From 3bb7445811a31b81ccc7ce6430a7f72d202594f8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Apr 2021 05:26:14 +0000
Subject: [PATCH 0027/4650] [2021-04-06T05:26:13+0000] e2e test


From 7447f3955d77055a298a128d190bb1e7601d93ad Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Apr 2021 05:27:10 +0000
Subject: [PATCH 0028/4650] [2021-04-06T05:27:10+0000] e2e test


From b58a847a70b15370aa6d7e1cd22b135a237f3e48 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Apr 2021 05:27:55 +0000
Subject: [PATCH 0029/4650] [2021-04-06T05:27:55+0000] e2e test


From 2aad8cb9ace64c1f04a20235f42ac518b3e3c952 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Apr 2021 05:31:37 +0000
Subject: [PATCH 0030/4650] [2021-04-06T05:31:37+0000] e2e test


From 42ddfb239ff90d384cdb891cbeae29c82da3fa98 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Apr 2021 05:34:26 +0000
Subject: [PATCH 0031/4650] [2021-04-06T05:34:26+0000] e2e test


From ece122461501bc90ec0cfe442c8396be323ad4d3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Apr 2021 05:38:01 +0000
Subject: [PATCH 0032/4650] [2021-04-06T05:38:01+0000] e2e test


From e59e2501698e7778c57a6abdf6d900d599d20fb2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Apr 2021 05:40:19 +0000
Subject: [PATCH 0033/4650] [2021-04-06T05:40:19+0000] e2e test


From 29ec1ee6d09f52a6cf039ca5ca83442b6a74fcc5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 08:54:12 +0000
Subject: [PATCH 0034/4650] [2021-04-07T08:54:11+0000] e2e test


From 72935626c0a3a29da1cdc9973f4f84fc29b02a99 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 08:55:20 +0000
Subject: [PATCH 0035/4650] [2021-04-07T08:55:19+0000] e2e test


From fc5306b90e7c7e3f23f3506dc14d15a5403cd96e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 08:57:31 +0000
Subject: [PATCH 0036/4650] [2021-04-07T08:57:31+0000] e2e test


From 263df22ee76b21dd08f9e5e5cd49f881325d9a93 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 08:59:24 +0000
Subject: [PATCH 0037/4650] [2021-04-07T08:59:23+0000] e2e test


From 9ee279f5b43d2b739406630731923bb016d0b7e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 09:16:21 +0000
Subject: [PATCH 0038/4650] [2021-04-07T09:16:21+0000] e2e test


From c63b3f89f798a83403209600987f968a594e44fe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 09:27:42 +0000
Subject: [PATCH 0039/4650] [2021-04-07T09:27:42+0000] e2e test


From 43b45d122f68ab370f88c00d4b1e41eb61e4b313 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 09:52:42 +0000
Subject: [PATCH 0040/4650] [2021-04-07T09:52:42+0000] e2e test


From 265374b9b54feb3442d4c3e4c4b3acab77323e0f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 09:55:14 +0000
Subject: [PATCH 0041/4650] [2021-04-07T09:55:14+0000] e2e test


From 2d6f8c35992a886e251ff3507ba11596567bb7b7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 09:59:32 +0000
Subject: [PATCH 0042/4650] [2021-04-07T09:59:32+0000] e2e test


From c17a74f5f45210255e60cc8e7bd0f6da83ce9cdb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 10:16:35 +0000
Subject: [PATCH 0043/4650] [2021-04-07T10:16:35+0000] e2e test


From 3fc9cea31f510eae22b5aa2b5fe00e57c7f35a93 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 10:19:00 +0000
Subject: [PATCH 0044/4650] [2021-04-07T10:19:00+0000] e2e test


From e7bc6454839adc9b56609eed907cd75a8013bef0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 13:10:39 +0000
Subject: [PATCH 0045/4650] [2021-04-07T13:10:39+0000] e2e test


From 2b17877da6ed82b63fd2a145759eb0c92fefe3d8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 14:02:51 +0000
Subject: [PATCH 0046/4650] [2021-04-07T14:02:51+0000] e2e test


From 43edf360fd065480dbffe88602814b3ae1806e7a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 15:02:59 +0000
Subject: [PATCH 0047/4650] [2021-04-07T15:02:59+0000] e2e test


From 803d7f5bf6bed1dbfa379349ff42229180f7986f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 16:05:14 +0000
Subject: [PATCH 0048/4650] [2021-04-07T16:05:14+0000] e2e test


From e673afdb6f9fb97e88b5b3450b0e0463d0f78203 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 17:21:05 +0000
Subject: [PATCH 0049/4650] [2021-04-07T17:21:05+0000] e2e test


From e241285d3b488e61294b9080cb2f80b44ef3b762 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 18:12:40 +0000
Subject: [PATCH 0050/4650] [2021-04-07T18:12:40+0000] e2e test


From 13eb8ede3de8233695af7131426143b61a7b17f7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 19:08:52 +0000
Subject: [PATCH 0051/4650] [2021-04-07T19:08:52+0000] e2e test


From 3230c855b3db0d97d057c9fbba539e945ad5723a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 20:02:55 +0000
Subject: [PATCH 0052/4650] [2021-04-07T20:02:55+0000] e2e test


From fd69328241bb7b0676687b172307aab0c66a7452 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 21:03:01 +0000
Subject: [PATCH 0053/4650] [2021-04-07T21:03:00+0000] e2e test


From 4dbbc2e48eb499dc3365ee202bf95b69b52181ea Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 22:02:53 +0000
Subject: [PATCH 0054/4650] [2021-04-07T22:02:53+0000] e2e test


From 8e2c05b4c0ea12d9adbdd9d55c83d38b21536c33 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Apr 2021 23:04:11 +0000
Subject: [PATCH 0055/4650] [2021-04-07T23:04:10+0000] e2e test


From 3654bb87f83365916af65ed9544da5c0f6d0d87a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 00:11:17 +0000
Subject: [PATCH 0056/4650] [2021-04-08T00:11:17+0000] e2e test


From d0d6c7085d60faf13791f45fdffa62374760047a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 01:27:25 +0000
Subject: [PATCH 0057/4650] [2021-04-08T01:27:24+0000] e2e test


From 7c94db4f0656e8cd97a592c85815dc2d167f52d8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 02:24:24 +0000
Subject: [PATCH 0058/4650] [2021-04-08T02:24:24+0000] e2e test


From 8534be92f7cbb95d9b10bf45b5d85bda64098784 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 03:10:10 +0000
Subject: [PATCH 0059/4650] [2021-04-08T03:10:10+0000] e2e test


From 3a329e311fa1acb4a8cc66a6e977e0f1e7ed4a7a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 04:05:37 +0000
Subject: [PATCH 0060/4650] [2021-04-08T04:05:37+0000] e2e test


From 0bd6195e2e2100f28bd77906c4b1d8e1dd28f31d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 05:07:29 +0000
Subject: [PATCH 0061/4650] [2021-04-08T05:07:29+0000] e2e test


From 89caaf59c4f9c23f89b481d5709f173de3fac313 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 06:03:16 +0000
Subject: [PATCH 0062/4650] [2021-04-08T06:03:16+0000] e2e test


From d7eb54d4137c226ca62d669c06122df457908e63 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 07:06:28 +0000
Subject: [PATCH 0063/4650] [2021-04-08T07:06:28+0000] e2e test


From c3b4b5a88a909f49e8b91623a3bc3966316f806d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 08:03:27 +0000
Subject: [PATCH 0064/4650] [2021-04-08T08:03:27+0000] e2e test


From a3ce954ea75f83d525de244beb18dd354b00e504 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 09:03:11 +0000
Subject: [PATCH 0065/4650] [2021-04-08T09:03:11+0000] e2e test


From f11159dfe0727a4f18646de75057651a530ada52 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 10:03:03 +0000
Subject: [PATCH 0066/4650] [2021-04-08T10:03:03+0000] e2e test


From 01387b0be22dd0b4b52f0e6dba13440d91526a93 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 11:02:50 +0000
Subject: [PATCH 0067/4650] [2021-04-08T11:02:50+0000] e2e test


From b3f32041014e079dbcd2f846035af81f0c90cca1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 12:03:47 +0000
Subject: [PATCH 0068/4650] [2021-04-08T12:03:47+0000] e2e test


From 483314bdf1a43c1c6b50053dce4f2c4e019171c7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 13:09:56 +0000
Subject: [PATCH 0069/4650] [2021-04-08T13:09:56+0000] e2e test


From cb800e51fdfffe7ca5f2182470dfb506291a4310 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 14:03:01 +0000
Subject: [PATCH 0070/4650] [2021-04-08T14:03:01+0000] e2e test


From 1eacfa19374230a725248cef8da815a47317db70 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 15:02:41 +0000
Subject: [PATCH 0071/4650] [2021-04-08T15:02:41+0000] e2e test


From b37f140ebeac9228ff1320cd671dbdbaf83bd68c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 16:04:26 +0000
Subject: [PATCH 0072/4650] [2021-04-08T16:04:25+0000] e2e test


From 57f5473b79e2b145f595cf2b8f086ef3d03bb45d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 17:21:56 +0000
Subject: [PATCH 0073/4650] [2021-04-08T17:21:56+0000] e2e test


From 0d888766bc040f73ff7466758c5891ed20841fba Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 18:12:05 +0000
Subject: [PATCH 0074/4650] [2021-04-08T18:12:05+0000] e2e test


From 513e922933edb8185ab5f0db69a65f9477386714 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 19:08:01 +0000
Subject: [PATCH 0075/4650] [2021-04-08T19:08:01+0000] e2e test


From 372a07681239147bce30e3f06c0e00fe558f0df8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 20:02:51 +0000
Subject: [PATCH 0076/4650] [2021-04-08T20:02:51+0000] e2e test


From 861d243276387bf888c4edd16bd6d89c663e7b8b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 21:02:48 +0000
Subject: [PATCH 0077/4650] [2021-04-08T21:02:48+0000] e2e test


From 58281c2f266b112a2ef5c93040f1bc6a81539660 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 22:02:56 +0000
Subject: [PATCH 0078/4650] [2021-04-08T22:02:56+0000] e2e test


From 5c3eafee61e125da2b62d169afb97e587d4db645 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Apr 2021 23:03:57 +0000
Subject: [PATCH 0079/4650] [2021-04-08T23:03:57+0000] e2e test


From 0fa8e397207b39bad7fdc60ef0892cf8df98a048 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 00:09:45 +0000
Subject: [PATCH 0080/4650] [2021-04-09T00:09:44+0000] e2e test


From abdc1371b41f66a1ae513d9a950b46df3e715f9e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 01:25:20 +0000
Subject: [PATCH 0081/4650] [2021-04-09T01:25:19+0000] e2e test


From 6f0fae6e9d13b45b0e63a1301194a7ccdd6247a0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 02:21:07 +0000
Subject: [PATCH 0082/4650] [2021-04-09T02:21:07+0000] e2e test


From 818e29a7139b0138b9ae49a562d0627149211752 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 03:04:41 +0000
Subject: [PATCH 0083/4650] [2021-04-09T03:04:41+0000] e2e test


From 19ee8e88ab9c084cc6040cc2f78fddfa1ff802dc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 04:02:49 +0000
Subject: [PATCH 0084/4650] [2021-04-09T04:02:49+0000] e2e test


From a318cf2fc66775ca6b6398b5d487fd4c5aadef9e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 05:06:46 +0000
Subject: [PATCH 0085/4650] [2021-04-09T05:06:46+0000] e2e test


From 0e4063736b277fd914e032a0dcea252b304de282 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 06:03:35 +0000
Subject: [PATCH 0086/4650] [2021-04-09T06:03:35+0000] e2e test


From 656ef0bb068b0d5445da77938167decd202041fa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 07:07:19 +0000
Subject: [PATCH 0087/4650] [2021-04-09T07:07:19+0000] e2e test


From acacfe4feac2e55f7984cfbcfb673764a2716e95 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 08:03:27 +0000
Subject: [PATCH 0088/4650] [2021-04-09T08:03:27+0000] e2e test


From 7dc414aa4c60b1164d4dfa948bf9ccc1f11156e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 09:04:24 +0000
Subject: [PATCH 0089/4650] [2021-04-09T09:04:24+0000] e2e test


From 184a835d510670fe8518368653cbd802c7a6bd49 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 10:02:49 +0000
Subject: [PATCH 0090/4650] [2021-04-09T10:02:49+0000] e2e test


From 3b95affbf7549d6d1df05734b645403af3a4224e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 11:02:40 +0000
Subject: [PATCH 0091/4650] [2021-04-09T11:02:40+0000] e2e test


From 6d813b934b3bfcb66a7230e8388603d91e32b526 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 12:03:49 +0000
Subject: [PATCH 0092/4650] [2021-04-09T12:03:49+0000] e2e test


From 67157945bc3b75eac341ed87c4c637dc7af2e9f8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 13:09:00 +0000
Subject: [PATCH 0093/4650] [2021-04-09T13:08:59+0000] e2e test


From 19f94ebb95affda174117084a3e9f323753ac3a9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 14:02:53 +0000
Subject: [PATCH 0094/4650] [2021-04-09T14:02:53+0000] e2e test


From af8875edfa30f9c7c4993a2d3f2bd49a23e38774 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 15:02:49 +0000
Subject: [PATCH 0095/4650] [2021-04-09T15:02:49+0000] e2e test


From e19ab37bdce33f7dc7fbf2c3b815e64592ed7780 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 16:03:37 +0000
Subject: [PATCH 0096/4650] [2021-04-09T16:03:37+0000] e2e test


From 963d63527895e70c1ebc5a24a06fa559664e3bd1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 17:12:13 +0000
Subject: [PATCH 0097/4650] [2021-04-09T17:12:12+0000] e2e test


From 36ed45fbae940c9b873c8ca84cceefde0493cfb7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 18:05:09 +0000
Subject: [PATCH 0098/4650] [2021-04-09T18:05:09+0000] e2e test


From 7b237e4bca108d5fea5bf757f762a720e417ac6f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 19:05:54 +0000
Subject: [PATCH 0099/4650] [2021-04-09T19:05:54+0000] e2e test


From e436a5220f361eaad5bf510cc49ac212ab3c3abc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 20:02:59 +0000
Subject: [PATCH 0100/4650] [2021-04-09T20:02:59+0000] e2e test


From 23cf5686a3790b3787f34f93940bf2ce7e37e068 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 21:02:48 +0000
Subject: [PATCH 0101/4650] [2021-04-09T21:02:48+0000] e2e test


From e3d3097444bebce6193a0e15a4874bce50e8fd77 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 22:02:55 +0000
Subject: [PATCH 0102/4650] [2021-04-09T22:02:55+0000] e2e test


From 986bc0d7d9d38244ce600abad36ddcf42155f3dd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Apr 2021 23:03:51 +0000
Subject: [PATCH 0103/4650] [2021-04-09T23:03:51+0000] e2e test


From ed29ec7a2b38b72b83ed56a0846f509f94c75a69 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 00:09:47 +0000
Subject: [PATCH 0104/4650] [2021-04-10T00:09:47+0000] e2e test


From 16303298c7a33b308224b651bfda6c475235685c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 01:26:02 +0000
Subject: [PATCH 0105/4650] [2021-04-10T01:26:02+0000] e2e test


From 6289f721b243e745c809a38d900928929cd35708 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 02:20:06 +0000
Subject: [PATCH 0106/4650] [2021-04-10T02:20:06+0000] e2e test


From 2190dc72f3a600464f27c8eddade2d11ca949c71 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 03:07:26 +0000
Subject: [PATCH 0107/4650] [2021-04-10T03:07:26+0000] e2e test


From 7be3ace298e0096a57857423e145c7cbd4c9fa23 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 04:04:08 +0000
Subject: [PATCH 0108/4650] [2021-04-10T04:04:08+0000] e2e test


From 31ceec64062328ad643a01b3784259365105c2d5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 05:06:49 +0000
Subject: [PATCH 0109/4650] [2021-04-10T05:06:49+0000] e2e test


From 9fad9651b3afaf0696cc237c6255a42b191a8841 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 06:03:31 +0000
Subject: [PATCH 0110/4650] [2021-04-10T06:03:30+0000] e2e test


From e0ddcb0d79f93ce875f3ed6fd839733be0170100 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 07:05:44 +0000
Subject: [PATCH 0111/4650] [2021-04-10T07:05:44+0000] e2e test


From c1c85c71b35a49c02f30eda9c485ab7b61c3dcc1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 08:03:00 +0000
Subject: [PATCH 0112/4650] [2021-04-10T08:03:00+0000] e2e test


From a35962fe1b25b1ff84e661ec87c36d6f8b37bfd2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 09:02:45 +0000
Subject: [PATCH 0113/4650] [2021-04-10T09:02:45+0000] e2e test


From e6f6fb6e7352b2f0f8afeb2882a3665ae449fa79 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 10:02:50 +0000
Subject: [PATCH 0114/4650] [2021-04-10T10:02:50+0000] e2e test


From dfd4459a73aa4462a7c3eabd4f930729f033a6a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 11:02:39 +0000
Subject: [PATCH 0115/4650] [2021-04-10T11:02:39+0000] e2e test


From 80116630df17b23517a101f167aba1598a7dec3f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 12:03:41 +0000
Subject: [PATCH 0116/4650] [2021-04-10T12:03:41+0000] e2e test


From 2a1cd5d23ce22964f0866ef2e3f625727eb74d71 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 13:08:17 +0000
Subject: [PATCH 0117/4650] [2021-04-10T13:08:17+0000] e2e test


From dcb1a5f76a7baee58da6af7ea006b0a65582ce64 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 14:02:48 +0000
Subject: [PATCH 0118/4650] [2021-04-10T14:02:48+0000] e2e test


From 8e3acf1f49914b6be74f57ec64bc23d1f25c2d89 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 15:02:47 +0000
Subject: [PATCH 0119/4650] [2021-04-10T15:02:47+0000] e2e test


From 93c7a388642249a5bc52f96da4130a2cd6861ae0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 16:03:54 +0000
Subject: [PATCH 0120/4650] [2021-04-10T16:03:54+0000] e2e test


From 9762c62c6214c5555f4972f8126c5373c1b4fe3a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 17:17:50 +0000
Subject: [PATCH 0121/4650] [2021-04-10T17:17:50+0000] e2e test


From dd9f4658cae32088e55391288f42dbfb5bd3e8e5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 18:10:37 +0000
Subject: [PATCH 0122/4650] [2021-04-10T18:10:37+0000] e2e test


From aed53e7c2e8fbc0a763087466144ee075d72edd7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 19:06:27 +0000
Subject: [PATCH 0123/4650] [2021-04-10T19:06:27+0000] e2e test


From 7baafadda252aa1180bb509d543da08e51ba4970 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 20:02:56 +0000
Subject: [PATCH 0124/4650] [2021-04-10T20:02:56+0000] e2e test


From 2a74f99b9193f3555f851c34de4d9609c090119d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 21:02:53 +0000
Subject: [PATCH 0125/4650] [2021-04-10T21:02:53+0000] e2e test


From d617f6f34f18e59d074248e6903a4f333197a3aa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 22:02:42 +0000
Subject: [PATCH 0126/4650] [2021-04-10T22:02:42+0000] e2e test


From 1ad1772cfa483147ace151405876c66e2e755f40 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Apr 2021 23:03:34 +0000
Subject: [PATCH 0127/4650] [2021-04-10T23:03:34+0000] e2e test


From 17df1c37571e80ab89bb2687585437aaf0e223b0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 00:10:40 +0000
Subject: [PATCH 0128/4650] [2021-04-11T00:10:39+0000] e2e test


From 9b7c8b5d0f291206a56a68772dd29ad19c1237e0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 01:27:36 +0000
Subject: [PATCH 0129/4650] [2021-04-11T01:27:36+0000] e2e test


From 45a46e2d891d9ee031ec19789933c1a17380d1a0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 02:22:09 +0000
Subject: [PATCH 0130/4650] [2021-04-11T02:22:09+0000] e2e test


From 88843a50069d9a8b36ab0d7b93858b2042666b9c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 03:08:47 +0000
Subject: [PATCH 0131/4650] [2021-04-11T03:08:47+0000] e2e test


From bcddc11a9dcba22348360e578f4bbcccec16f963 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 04:04:37 +0000
Subject: [PATCH 0132/4650] [2021-04-11T04:04:36+0000] e2e test


From d5d54dc4819314272efd05d512662126cc7779c8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 05:06:59 +0000
Subject: [PATCH 0133/4650] [2021-04-11T05:06:59+0000] e2e test


From 3fb6744015685afbc2a751235d221ebcd25d308b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 06:03:17 +0000
Subject: [PATCH 0134/4650] [2021-04-11T06:03:17+0000] e2e test


From ddeff47b09d10e44c5c2e418aab793fb6d697d0e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 07:05:40 +0000
Subject: [PATCH 0135/4650] [2021-04-11T07:05:40+0000] e2e test


From daa899902cbb6aa3fc645bacf57cee674617d6ae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 08:03:08 +0000
Subject: [PATCH 0136/4650] [2021-04-11T08:03:08+0000] e2e test


From c6aaad64bb2742050ce009204bfdc8df6346a3a6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 09:02:38 +0000
Subject: [PATCH 0137/4650] [2021-04-11T09:02:38+0000] e2e test


From 8852837ab1e97dadd56d6e9fd6cee41459d3b63f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 10:02:44 +0000
Subject: [PATCH 0138/4650] [2021-04-11T10:02:44+0000] e2e test


From bcb40f40dd83cbfb8e5cb7abcb4e3edda5b1cf7a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 11:02:40 +0000
Subject: [PATCH 0139/4650] [2021-04-11T11:02:39+0000] e2e test


From 2d97e23537f35d93aaa236740e35ad9d3485c0dc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 12:03:48 +0000
Subject: [PATCH 0140/4650] [2021-04-11T12:03:48+0000] e2e test


From 80d8d973c45274e693a6c5bfb1383874b899eabb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 13:08:21 +0000
Subject: [PATCH 0141/4650] [2021-04-11T13:08:21+0000] e2e test


From 670304d15e76b9f1e47b7a63161feeb158a9aba9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 14:02:54 +0000
Subject: [PATCH 0142/4650] [2021-04-11T14:02:54+0000] e2e test


From 732f8ae570f2aeb0a2fc22430ca86628328a3d41 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 15:02:46 +0000
Subject: [PATCH 0143/4650] [2021-04-11T15:02:46+0000] e2e test


From d2af3d6a486689e16559e45e399346395731451c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 16:04:24 +0000
Subject: [PATCH 0144/4650] [2021-04-11T16:04:23+0000] e2e test


From 08fb8dc245f65bf052381ef2638c2bcac75eb5ff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 17:17:48 +0000
Subject: [PATCH 0145/4650] [2021-04-11T17:17:48+0000] e2e test


From ced7af9ff7b0b3d778d6fe9d7798f7bd391a150f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 18:10:19 +0000
Subject: [PATCH 0146/4650] [2021-04-11T18:10:19+0000] e2e test


From a1b9e7fda5117b4c9ab95d3a566f7ed3bc975c1e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 19:06:45 +0000
Subject: [PATCH 0147/4650] [2021-04-11T19:06:45+0000] e2e test


From d9ae3cd32ef6e94285738c7342eeb6b6f5099eca Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 20:03:00 +0000
Subject: [PATCH 0148/4650] [2021-04-11T20:02:59+0000] e2e test


From fa46050b2e6987e4a0bfb0d66ed3b62b91fd9d86 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 21:02:52 +0000
Subject: [PATCH 0149/4650] [2021-04-11T21:02:52+0000] e2e test


From adde1d51f102048fe3ac02a234395723a6275b66 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 22:02:43 +0000
Subject: [PATCH 0150/4650] [2021-04-11T22:02:43+0000] e2e test


From fed72be1bc7ea9a1fdb33a5a033f474403c679b5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Apr 2021 23:03:50 +0000
Subject: [PATCH 0151/4650] [2021-04-11T23:03:50+0000] e2e test


From db61c29782986925247c7e5192ad9af4ba0497c6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 00:10:10 +0000
Subject: [PATCH 0152/4650] [2021-04-12T00:10:10+0000] e2e test


From 52191afdcea00b8d1e8c3ef695795fcd9d482cde Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 01:27:04 +0000
Subject: [PATCH 0153/4650] [2021-04-12T01:27:04+0000] e2e test


From 2e5d886daa6fa8c6b568085df0948bb2c19b37eb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 02:22:30 +0000
Subject: [PATCH 0154/4650] [2021-04-12T02:22:30+0000] e2e test


From f4790b6fc113f57218538fbf66949d7193d900e3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 03:09:55 +0000
Subject: [PATCH 0155/4650] [2021-04-12T03:09:55+0000] e2e test


From adc53b390593d8ea6e54b4fd9e313cf7478bf2dc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 04:05:13 +0000
Subject: [PATCH 0156/4650] [2021-04-12T04:05:13+0000] e2e test


From 147b1110914b763dab1f2d5077b59e07572452d7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 05:08:08 +0000
Subject: [PATCH 0157/4650] [2021-04-12T05:08:08+0000] e2e test


From d134b39826a2937553b2dd644e36c66003b8b655 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 06:03:31 +0000
Subject: [PATCH 0158/4650] [2021-04-12T06:03:30+0000] e2e test


From 1a653090bbafa88508cfa5ab81058cc2a405a86e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 07:06:47 +0000
Subject: [PATCH 0159/4650] [2021-04-12T07:06:47+0000] e2e test


From fed828425a68d8ac1cbdd91100b8dc60eb927abb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 08:03:16 +0000
Subject: [PATCH 0160/4650] [2021-04-12T08:03:16+0000] e2e test


From 20c51627dd6cbc86d5b6fdf3bf1a6c67d7904f2b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 09:03:18 +0000
Subject: [PATCH 0161/4650] [2021-04-12T09:03:18+0000] e2e test


From 04417304632539677d4a821c7da8954542b04285 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 10:03:00 +0000
Subject: [PATCH 0162/4650] [2021-04-12T10:03:00+0000] e2e test


From 4bbd321ee9138140886d3ce64b0a99dcdbbb9d40 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 11:02:42 +0000
Subject: [PATCH 0163/4650] [2021-04-12T11:02:41+0000] e2e test


From ca7af907fc5eb6e0b507a4078b882f0c331c0362 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 12:03:41 +0000
Subject: [PATCH 0164/4650] [2021-04-12T12:03:40+0000] e2e test


From 68944ce64e75b9ed81f0c2a95f31cbe4e5792dce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 13:09:48 +0000
Subject: [PATCH 0165/4650] [2021-04-12T13:09:47+0000] e2e test


From 720504069912aac3180be8e6cdf9df0eff666947 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 14:02:51 +0000
Subject: [PATCH 0166/4650] [2021-04-12T14:02:51+0000] e2e test


From 3ec6bad7ea8ec7968e2262f7545b8dd7503ef1c6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 15:02:43 +0000
Subject: [PATCH 0167/4650] [2021-04-12T15:02:43+0000] e2e test


From caba012d2ef1670483bb8860ace3ea7092ba9a8c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 16:04:04 +0000
Subject: [PATCH 0168/4650] [2021-04-12T16:04:04+0000] e2e test


From aa22568459bd9b665053fa6782764d158556aa64 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 17:18:12 +0000
Subject: [PATCH 0169/4650] [2021-04-12T17:18:12+0000] e2e test


From 7057d49bef92b1c81545c49b3b3c39744a996729 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 18:11:40 +0000
Subject: [PATCH 0170/4650] [2021-04-12T18:11:40+0000] e2e test


From 447e64cc3b466ca7012badd89f6d8f703de3d280 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 19:07:59 +0000
Subject: [PATCH 0171/4650] [2021-04-12T19:07:59+0000] e2e test


From 627bde1b0002ec8a61fcd203ec7d886d9e6d29f7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 20:02:49 +0000
Subject: [PATCH 0172/4650] [2021-04-12T20:02:49+0000] e2e test


From d7aba17697cafb06ef8c0fef38b0e138c3a956e4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 21:02:53 +0000
Subject: [PATCH 0173/4650] [2021-04-12T21:02:53+0000] e2e test


From fecb987d48a182764369f6bd56fc6e085899b402 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 22:03:06 +0000
Subject: [PATCH 0174/4650] [2021-04-12T22:03:06+0000] e2e test


From c3f82bc6e8ddba2e2099d16979929fbebeba944d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Apr 2021 23:04:22 +0000
Subject: [PATCH 0175/4650] [2021-04-12T23:04:22+0000] e2e test


From 44c0d199efa1a30416ac8ee4c9b2811194a31d7a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 00:10:34 +0000
Subject: [PATCH 0176/4650] [2021-04-13T00:10:34+0000] e2e test


From 37543e42a9025b1a48f44a398f84aef5f6324518 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 01:27:03 +0000
Subject: [PATCH 0177/4650] [2021-04-13T01:27:03+0000] e2e test


From 7d8201b8a8acb922224366e4b37f2993a4b01064 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 02:21:43 +0000
Subject: [PATCH 0178/4650] [2021-04-13T02:21:43+0000] e2e test


From 6853da85599f22f82521c08f703835eee650bb80 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 03:10:11 +0000
Subject: [PATCH 0179/4650] [2021-04-13T03:10:11+0000] e2e test


From 825cb27b249101fb049cca64c9d8f8c85dcc0d73 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 04:05:31 +0000
Subject: [PATCH 0180/4650] [2021-04-13T04:05:31+0000] e2e test


From 7aa9bc95698c8e3780b732e284823b69e23e1596 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 05:06:50 +0000
Subject: [PATCH 0181/4650] [2021-04-13T05:06:50+0000] e2e test


From 67a135dfc94b6b0ab6f9b64b38d9f2ad80c030b0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 06:03:27 +0000
Subject: [PATCH 0182/4650] [2021-04-13T06:03:27+0000] e2e test


From 843d9391e6f1898db3268c176435f8e7fce90ed1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 07:06:24 +0000
Subject: [PATCH 0183/4650] [2021-04-13T07:06:24+0000] e2e test


From 0eeb35af86ce44a59118588d91f63f2c8e79248d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 08:03:24 +0000
Subject: [PATCH 0184/4650] [2021-04-13T08:03:24+0000] e2e test


From 0fab445178adfb40dc72137136101294b16f1b91 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 09:03:26 +0000
Subject: [PATCH 0185/4650] [2021-04-13T09:03:26+0000] e2e test


From d323aa674d7b783c18b615454203315fbf67c7d6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 10:03:13 +0000
Subject: [PATCH 0186/4650] [2021-04-13T10:03:12+0000] e2e test


From a551f76abbe3a02be02bdf5ca27bd3a5cf2dd239 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 11:02:46 +0000
Subject: [PATCH 0187/4650] [2021-04-13T11:02:46+0000] e2e test


From 04ef495eda58aca59ba7ddf9829a57b23c1d28ba Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 12:03:42 +0000
Subject: [PATCH 0188/4650] [2021-04-13T12:03:42+0000] e2e test


From f9a4c338de8169de25a79d98f974dd8218d566f1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 13:09:35 +0000
Subject: [PATCH 0189/4650] [2021-04-13T13:09:35+0000] e2e test


From b93771fd8d54fb834f71500d2b2515d21403b6a8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 14:02:52 +0000
Subject: [PATCH 0190/4650] [2021-04-13T14:02:52+0000] e2e test


From f624a50a9e9f3a23024640fcef40a101f8001722 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 15:02:55 +0000
Subject: [PATCH 0191/4650] [2021-04-13T15:02:55+0000] e2e test


From 4dee27df49fa1bba256e952a468f5203c6280784 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 16:04:51 +0000
Subject: [PATCH 0192/4650] [2021-04-13T16:04:51+0000] e2e test


From 421291177b7c7e4d7e7253679bf1afb9d78785ca Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 17:20:18 +0000
Subject: [PATCH 0193/4650] [2021-04-13T17:20:18+0000] e2e test


From 3d7234fccb09d09670e55dda9dbf2ecd586500a1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 18:11:51 +0000
Subject: [PATCH 0194/4650] [2021-04-13T18:11:51+0000] e2e test


From 8239d953f613f07b537bbd3722685e0a36881474 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 19:07:32 +0000
Subject: [PATCH 0195/4650] [2021-04-13T19:07:32+0000] e2e test


From bc7c6ea7b668dbb1980632791cdeecac5c4e9385 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 20:03:05 +0000
Subject: [PATCH 0196/4650] [2021-04-13T20:03:05+0000] e2e test


From ae9477310c5d32b4c3ae613dcf9a21c1676f09f1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 21:02:40 +0000
Subject: [PATCH 0197/4650] [2021-04-13T21:02:40+0000] e2e test


From 89c5490385840887b2119df7debb228de5af3ee9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 22:02:46 +0000
Subject: [PATCH 0198/4650] [2021-04-13T22:02:45+0000] e2e test


From 094322c766b1a7e8b2ccb6f3508a2808e589553b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Apr 2021 23:03:34 +0000
Subject: [PATCH 0199/4650] [2021-04-13T23:03:34+0000] e2e test


From bcfdcbb4d06dceb7560d7e35bbb3ce60b7ba6d74 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 00:08:18 +0000
Subject: [PATCH 0200/4650] [2021-04-14T00:08:18+0000] e2e test


From d89bedb12f41a3a7adacb11e781ed1192eaca32e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 01:25:40 +0000
Subject: [PATCH 0201/4650] [2021-04-14T01:25:40+0000] e2e test


From 7d523e07c94f14615c66d44c467c35a83c6a26db Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 02:19:23 +0000
Subject: [PATCH 0202/4650] [2021-04-14T02:19:23+0000] e2e test


From f7fd27875deead7814ba699249e2fe956ace23fb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 03:06:49 +0000
Subject: [PATCH 0203/4650] [2021-04-14T03:06:49+0000] e2e test


From c5ac064494ba55d6ebc1e41e154bdec3d2afa7b3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 04:03:03 +0000
Subject: [PATCH 0204/4650] [2021-04-14T04:03:03+0000] e2e test


From 89432b502e97e07e583302acca85b78e2f0fd7fc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 05:05:54 +0000
Subject: [PATCH 0205/4650] [2021-04-14T05:05:54+0000] e2e test


From 19c7332245418fbbacbf1cb331cee3b878291343 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 06:03:23 +0000
Subject: [PATCH 0206/4650] [2021-04-14T06:03:23+0000] e2e test


From c8abccb83812f793e1db9828aa6b272b0a87d145 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 07:05:20 +0000
Subject: [PATCH 0207/4650] [2021-04-14T07:05:20+0000] e2e test


From affefda19a3d87e21f0c04c956cbd0c79d758d35 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 08:02:59 +0000
Subject: [PATCH 0208/4650] [2021-04-14T08:02:59+0000] e2e test


From 50fb1d429e5ec297f26a4203045e267b55fdb5cb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 09:02:56 +0000
Subject: [PATCH 0209/4650] [2021-04-14T09:02:56+0000] e2e test


From 6eea8f14db995ef8bb4af11f204ae762cf966895 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 10:02:43 +0000
Subject: [PATCH 0210/4650] [2021-04-14T10:02:43+0000] e2e test


From a8385a4095ce2b03a78a6b3cf4ef7193caa17d01 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 11:02:36 +0000
Subject: [PATCH 0211/4650] [2021-04-14T11:02:36+0000] e2e test


From cdd211fd4287dfcda10dc9891d08e591377e0483 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 12:03:55 +0000
Subject: [PATCH 0212/4650] [2021-04-14T12:03:55+0000] e2e test


From 0af623861f9e3660130c7fba7d24451d93c4c2c5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 13:08:05 +0000
Subject: [PATCH 0213/4650] [2021-04-14T13:08:05+0000] e2e test


From 1f982b1217951f711d58e1bed9f1877609edb69c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 14:02:48 +0000
Subject: [PATCH 0214/4650] [2021-04-14T14:02:48+0000] e2e test


From ac3787ec97f7a8ca7f1a2e4a0cc57adada9f8a71 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 15:02:50 +0000
Subject: [PATCH 0215/4650] [2021-04-14T15:02:50+0000] e2e test


From 9ef1cabcbfa9eae2e5226810192376be7a324acc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 16:03:50 +0000
Subject: [PATCH 0216/4650] [2021-04-14T16:03:50+0000] e2e test


From 1a893a9515ad06b6d4e61d8edf25191c91f3eaa8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 17:17:10 +0000
Subject: [PATCH 0217/4650] [2021-04-14T17:17:10+0000] e2e test


From 71617e17a028062deb92e69e55823b0c78bc37e4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 18:09:03 +0000
Subject: [PATCH 0218/4650] [2021-04-14T18:09:03+0000] e2e test


From 53a2e5c7013206404899676a93f2330e1d9cbfdc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 19:06:15 +0000
Subject: [PATCH 0219/4650] [2021-04-14T19:06:15+0000] e2e test


From b59d91589ffdf0a8c142d62cf9f8b2520e710e88 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 20:02:55 +0000
Subject: [PATCH 0220/4650] [2021-04-14T20:02:55+0000] e2e test


From 45cda253750c9bd756a281f5af3fb3639a6d81b2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 21:02:42 +0000
Subject: [PATCH 0221/4650] [2021-04-14T21:02:42+0000] e2e test


From 0ae9d9ef4189f5de1eb388b9c49663d4d5efd854 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 22:02:54 +0000
Subject: [PATCH 0222/4650] [2021-04-14T22:02:54+0000] e2e test


From 193ea92a83495b9d56a3e19713ee2da8bf9e432c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Apr 2021 23:03:11 +0000
Subject: [PATCH 0223/4650] [2021-04-14T23:03:11+0000] e2e test


From a627a7bacadb2ebed7ba75758404a98c495141a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 00:09:13 +0000
Subject: [PATCH 0224/4650] [2021-04-15T00:09:12+0000] e2e test


From 1e482cd8b4e681e4e03b2a197565ecb77e622198 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 01:26:34 +0000
Subject: [PATCH 0225/4650] [2021-04-15T01:26:34+0000] e2e test


From edd41c092dc9560a2078982a1f5a20642ce06299 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 02:18:14 +0000
Subject: [PATCH 0226/4650] [2021-04-15T02:18:14+0000] e2e test


From 1b43168ff4ef0595bed5bb9d147686ca2e4179a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 03:05:55 +0000
Subject: [PATCH 0227/4650] [2021-04-15T03:05:54+0000] e2e test


From e478c0a8ae480a30fc7cfbf450b9ed734d21aaa3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 04:03:14 +0000
Subject: [PATCH 0228/4650] [2021-04-15T04:03:13+0000] e2e test


From 2bb6c3813fd33477d58f0aa5ccf6c39333d503bb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 05:06:15 +0000
Subject: [PATCH 0229/4650] [2021-04-15T05:06:15+0000] e2e test


From 076991bba1a8a399f949fc171651264d4faa01d5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 06:03:26 +0000
Subject: [PATCH 0230/4650] [2021-04-15T06:03:26+0000] e2e test


From 33ca8f77f8fcac9e1ce20bed7972388de54a9de7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 07:05:55 +0000
Subject: [PATCH 0231/4650] [2021-04-15T07:05:55+0000] e2e test


From 777123ba5a5069d9671e901b6ecfc5c90aca3fc3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 08:03:14 +0000
Subject: [PATCH 0232/4650] [2021-04-15T08:03:13+0000] e2e test


From 38f2a64eb047dd6e220df0dd870302bad3e0b2e2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 09:02:49 +0000
Subject: [PATCH 0233/4650] [2021-04-15T09:02:49+0000] e2e test


From 32f0312cc40fbc98d8bb04187aaed2fb9cfd4765 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 10:02:49 +0000
Subject: [PATCH 0234/4650] [2021-04-15T10:02:49+0000] e2e test


From dfbb9886cd99340ef32df1d23bcc36e46b0d52ef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 11:02:42 +0000
Subject: [PATCH 0235/4650] [2021-04-15T11:02:42+0000] e2e test


From 0537e6ba53f112aca6609dc2b2daaef634d58230 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 12:04:02 +0000
Subject: [PATCH 0236/4650] [2021-04-15T12:04:02+0000] e2e test


From 816acad46bebb9ee71323e654e166d54510ba3e5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 13:08:33 +0000
Subject: [PATCH 0237/4650] [2021-04-15T13:08:33+0000] e2e test


From a073735a44f778f778fb36522c0a76a01e0b9cf2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 14:02:52 +0000
Subject: [PATCH 0238/4650] [2021-04-15T14:02:52+0000] e2e test


From fb93a4435e1c185cd242b4795198d32db42c1d4d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 15:02:50 +0000
Subject: [PATCH 0239/4650] [2021-04-15T15:02:50+0000] e2e test


From 8169866946fb046a749a349eff3295dba043ae56 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 16:04:59 +0000
Subject: [PATCH 0240/4650] [2021-04-15T16:04:59+0000] e2e test


From 132c844ee29058dc86c0ab36e82b22721c14dd39 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 17:18:33 +0000
Subject: [PATCH 0241/4650] [2021-04-15T17:18:33+0000] e2e test


From f5d5987c0a32064097b1606ef30192fddc49b3d4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 18:11:15 +0000
Subject: [PATCH 0242/4650] [2021-04-15T18:11:15+0000] e2e test


From 8630c13482b8f1eb7d06bdc22b4987e9231a05c0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 19:07:44 +0000
Subject: [PATCH 0243/4650] [2021-04-15T19:07:44+0000] e2e test


From 49f5112787eadd870fb61dc058c05738de7ca1be Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 20:02:55 +0000
Subject: [PATCH 0244/4650] [2021-04-15T20:02:55+0000] e2e test


From b4de6549ab0dc601fbf74af51a79565c3b6186c9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 21:02:41 +0000
Subject: [PATCH 0245/4650] [2021-04-15T21:02:41+0000] e2e test


From adb4c89114289ac3f13b16e0fc9e6516034f820c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 22:03:00 +0000
Subject: [PATCH 0246/4650] [2021-04-15T22:03:00+0000] e2e test


From 1f1d86c6f05b05325884d0a737c9fa957d9b73c5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Apr 2021 23:03:04 +0000
Subject: [PATCH 0247/4650] [2021-04-15T23:03:04+0000] e2e test


From ed1f055760fd9d2901f93b1b9fdb512fc645764c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 00:08:05 +0000
Subject: [PATCH 0248/4650] [2021-04-16T00:08:05+0000] e2e test


From e247680c2fd0c3e41d7afd7092db2e52c9490c08 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 01:26:31 +0000
Subject: [PATCH 0249/4650] [2021-04-16T01:26:31+0000] e2e test


From fff190ce27679080314cf3ed06d55f537f439fe2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 02:21:19 +0000
Subject: [PATCH 0250/4650] [2021-04-16T02:21:19+0000] e2e test


From 4cb0d5ae707d1d05fab6f22698c88cd76ba77711 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 03:09:31 +0000
Subject: [PATCH 0251/4650] [2021-04-16T03:09:31+0000] e2e test


From f1f808a5edc4275a147b90cf216fe6a338eb4420 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 04:04:56 +0000
Subject: [PATCH 0252/4650] [2021-04-16T04:04:55+0000] e2e test


From fac72708b786493fb9aa96af37db9225ca3412dd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 05:06:56 +0000
Subject: [PATCH 0253/4650] [2021-04-16T05:06:56+0000] e2e test


From a12fe2c59e0e9b6a44c597c28041c1f6a6d611e5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 06:03:33 +0000
Subject: [PATCH 0254/4650] [2021-04-16T06:03:33+0000] e2e test


From 351197a37df3bfe1e4fe309cfff4fb17ce64cb44 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 07:05:02 +0000
Subject: [PATCH 0255/4650] [2021-04-16T07:05:02+0000] e2e test


From bb7d8df1a57e823e22aab8a2f6fcfe79b30771d0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 08:02:59 +0000
Subject: [PATCH 0256/4650] [2021-04-16T08:02:59+0000] e2e test


From 25cea507b5b13bbf727f79f05f55962547615051 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 09:03:10 +0000
Subject: [PATCH 0257/4650] [2021-04-16T09:03:10+0000] e2e test


From a338a23c22eb3def5a5f6dee3643b6220ee5bbc5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 10:02:50 +0000
Subject: [PATCH 0258/4650] [2021-04-16T10:02:50+0000] e2e test


From 005a879ebc9b30c79deecdc3c0a2628dda6fbc11 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 11:02:49 +0000
Subject: [PATCH 0259/4650] [2021-04-16T11:02:48+0000] e2e test


From d8bba0583a345b84210033d42e068959e8484ce7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 12:03:44 +0000
Subject: [PATCH 0260/4650] [2021-04-16T12:03:44+0000] e2e test


From 46638137f935c626237b7c94c1bd84a8d525ce95 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 13:09:10 +0000
Subject: [PATCH 0261/4650] [2021-04-16T13:09:09+0000] e2e test


From b1162fbf4de52d04df153393191093103e6f76ad Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 14:02:51 +0000
Subject: [PATCH 0262/4650] [2021-04-16T14:02:51+0000] e2e test


From ba4493ab6dccb1aaea0eab8bf3976712fdd0e092 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 15:02:59 +0000
Subject: [PATCH 0263/4650] [2021-04-16T15:02:58+0000] e2e test


From 5f215e14c0eaf7fd0ee6d474388cf6894a452e02 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 16:04:22 +0000
Subject: [PATCH 0264/4650] [2021-04-16T16:04:22+0000] e2e test


From bc25e81661c8cef7bf90d3808c246f8c252abf5e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 17:17:47 +0000
Subject: [PATCH 0265/4650] [2021-04-16T17:17:47+0000] e2e test


From 8520f94caedc6800d711cc88c43a165805999bb3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 18:11:24 +0000
Subject: [PATCH 0266/4650] [2021-04-16T18:11:24+0000] e2e test


From e7948ad81dedb9840d5e51a8cefa93da26e7e911 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 19:07:30 +0000
Subject: [PATCH 0267/4650] [2021-04-16T19:07:30+0000] e2e test


From e44d26b3c6dae658e3a8432b4f5d5fd4fb473ec3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 20:02:57 +0000
Subject: [PATCH 0268/4650] [2021-04-16T20:02:57+0000] e2e test


From 634d104418265a7bf5ec63da7d0f66ec75207eb5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 21:02:43 +0000
Subject: [PATCH 0269/4650] [2021-04-16T21:02:43+0000] e2e test


From 4c2c4ccf20b3eb0585c2fe2abcb800b48cbd2db7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 22:02:48 +0000
Subject: [PATCH 0270/4650] [2021-04-16T22:02:48+0000] e2e test


From 560b21cc07183ba33db5d4277020d05955a79a60 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Apr 2021 23:02:52 +0000
Subject: [PATCH 0271/4650] [2021-04-16T23:02:51+0000] e2e test


From 5bb6e96b010106cd2262c63835a6664e082826d5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 00:08:53 +0000
Subject: [PATCH 0272/4650] [2021-04-17T00:08:52+0000] e2e test


From 28050169dd72f95a6c3794cd1afe043ccc6d016b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 01:25:44 +0000
Subject: [PATCH 0273/4650] [2021-04-17T01:25:44+0000] e2e test


From f0d36504de0b59190645dfa9758bc42ecf7895f8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 02:18:21 +0000
Subject: [PATCH 0274/4650] [2021-04-17T02:18:21+0000] e2e test


From 07a6d60e362092a6f3d498b70c285db565f07bb4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 03:06:16 +0000
Subject: [PATCH 0275/4650] [2021-04-17T03:06:16+0000] e2e test


From dafa0dc458f0e399a7b4316b342ee6590b376b7c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 04:03:20 +0000
Subject: [PATCH 0276/4650] [2021-04-17T04:03:20+0000] e2e test


From f56b2340b632ce70f8863862846a8832a596b501 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 05:06:04 +0000
Subject: [PATCH 0277/4650] [2021-04-17T05:06:04+0000] e2e test


From b4969687001bec3af8c0ea4ff593696db932e944 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 06:03:23 +0000
Subject: [PATCH 0278/4650] [2021-04-17T06:03:22+0000] e2e test


From 746b3a83226854cffe8e17b584ff09965398c1d8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 07:05:42 +0000
Subject: [PATCH 0279/4650] [2021-04-17T07:05:42+0000] e2e test


From df73207521eebcd5446a888eab0381cbb9e8689f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 08:02:56 +0000
Subject: [PATCH 0280/4650] [2021-04-17T08:02:56+0000] e2e test


From 712a63ddf92246eec77bc502cc13bee67b7b8bfb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 09:02:52 +0000
Subject: [PATCH 0281/4650] [2021-04-17T09:02:52+0000] e2e test


From 590a40e579ab26b825ba3706bb8ef4f4c4527105 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 10:02:55 +0000
Subject: [PATCH 0282/4650] [2021-04-17T10:02:55+0000] e2e test


From f2252f6193a7dbfb8734c9b391919b1def6a3423 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 11:02:50 +0000
Subject: [PATCH 0283/4650] [2021-04-17T11:02:50+0000] e2e test


From b63775b97f4fb6fc53c1c8a5c90cdbed0fe24e3a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 12:03:22 +0000
Subject: [PATCH 0284/4650] [2021-04-17T12:03:22+0000] e2e test


From 22648b334fe21586c93305afa46d68ab286de80c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 13:07:39 +0000
Subject: [PATCH 0285/4650] [2021-04-17T13:07:39+0000] e2e test


From 9c46a36ef9ada6dc6bf2d2da078190c776d5fc07 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 14:02:42 +0000
Subject: [PATCH 0286/4650] [2021-04-17T14:02:42+0000] e2e test


From 3f309dd358bbbc2d6909aebf98234b8535d18f1d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 15:02:54 +0000
Subject: [PATCH 0287/4650] [2021-04-17T15:02:54+0000] e2e test


From caf44a4876892ea5c832bcf8d65795e72aaf081d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 16:03:51 +0000
Subject: [PATCH 0288/4650] [2021-04-17T16:03:51+0000] e2e test


From 8cb7df3de33315c23aec382dbec90da81f95da16 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 17:17:10 +0000
Subject: [PATCH 0289/4650] [2021-04-17T17:17:10+0000] e2e test


From 1712e59a5c9d2557b95230acce7b0cb65a83ba37 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 18:08:48 +0000
Subject: [PATCH 0290/4650] [2021-04-17T18:08:48+0000] e2e test


From 9319a3bcf66f6957c4c144e0fe60d2747b99e1e5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 19:06:16 +0000
Subject: [PATCH 0291/4650] [2021-04-17T19:06:15+0000] e2e test


From 6db9b0b3a97f940da1cbad5737763ba4426a83a1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 20:03:03 +0000
Subject: [PATCH 0292/4650] [2021-04-17T20:03:03+0000] e2e test


From efc07f71322b9638985d2e2e189cb939d2e0416d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 21:02:53 +0000
Subject: [PATCH 0293/4650] [2021-04-17T21:02:53+0000] e2e test


From 7bc48a78729e6a6c58f082cb0ef320575149f3e2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 22:02:53 +0000
Subject: [PATCH 0294/4650] [2021-04-17T22:02:53+0000] e2e test


From 8cb2651d0382ab83443b5f3745afe681b68f18e9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Apr 2021 23:02:51 +0000
Subject: [PATCH 0295/4650] [2021-04-17T23:02:51+0000] e2e test


From 1c38a6d9f62bc5c1018a25401eded0e57601e178 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 00:09:05 +0000
Subject: [PATCH 0296/4650] [2021-04-18T00:09:04+0000] e2e test


From 1416594a46946415a281937cdaaa810142397a94 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 01:27:05 +0000
Subject: [PATCH 0297/4650] [2021-04-18T01:27:05+0000] e2e test


From b0f5f8c26bfe5999cc5f845500fa48a5f2184943 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 02:21:26 +0000
Subject: [PATCH 0298/4650] [2021-04-18T02:21:26+0000] e2e test


From 17149f752db88245c6828ace673fa488c8057c5f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 03:08:35 +0000
Subject: [PATCH 0299/4650] [2021-04-18T03:08:35+0000] e2e test


From 1abeb99a55776a99ad9a5a013ee0dfe0586b5f32 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 04:04:01 +0000
Subject: [PATCH 0300/4650] [2021-04-18T04:04:01+0000] e2e test


From 38c2a7a88c54ceee935728f4a302a7bbb3624011 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 05:06:19 +0000
Subject: [PATCH 0301/4650] [2021-04-18T05:06:19+0000] e2e test


From 9ad593927b8c495fdc7f94702c8a9be97d04e2a0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 06:03:24 +0000
Subject: [PATCH 0302/4650] [2021-04-18T06:03:24+0000] e2e test


From 7c729c4ec9e8bb14c7fef3e5978d94c5b533b00d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 07:05:41 +0000
Subject: [PATCH 0303/4650] [2021-04-18T07:05:41+0000] e2e test


From 0f3edccdeb47d2bb2853f790c7c5e8b6f39be6de Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 08:03:03 +0000
Subject: [PATCH 0304/4650] [2021-04-18T08:03:03+0000] e2e test


From ec29d0cc704f357b6d55b4dfca72a5c025b35ea9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 09:02:53 +0000
Subject: [PATCH 0305/4650] [2021-04-18T09:02:53+0000] e2e test


From faa9faa115b7f4c6185d5c65bf8f6e0dca752a45 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 10:02:45 +0000
Subject: [PATCH 0306/4650] [2021-04-18T10:02:45+0000] e2e test


From c476200323acd280e15c50682fc928d9aa6fc3ce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 11:02:49 +0000
Subject: [PATCH 0307/4650] [2021-04-18T11:02:49+0000] e2e test


From 63ac88ab20663bb39b33a8db93c79bb11e97c55f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 12:03:39 +0000
Subject: [PATCH 0308/4650] [2021-04-18T12:03:39+0000] e2e test


From 647b8fe04bdb6abefba2fc2efa38801a1bd91b5f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 13:08:01 +0000
Subject: [PATCH 0309/4650] [2021-04-18T13:08:01+0000] e2e test


From d7b6f8bb5f3d1766f1ca835c582b8230903bc5e0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 14:02:40 +0000
Subject: [PATCH 0310/4650] [2021-04-18T14:02:39+0000] e2e test


From d751f012b83dcaea8b214f148902bf16c32eb9e4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 15:02:35 +0000
Subject: [PATCH 0311/4650] [2021-04-18T15:02:34+0000] e2e test


From 055251a820a7b74580f6c294b42c291afd9ffc58 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 16:04:05 +0000
Subject: [PATCH 0312/4650] [2021-04-18T16:04:05+0000] e2e test


From 4ac8a9742cdb0ef707596c7c627a24953e5aa6ec Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 17:17:02 +0000
Subject: [PATCH 0313/4650] [2021-04-18T17:17:02+0000] e2e test


From 84b0afa0783c0f557d077ea3eaa16ece1cdbaa66 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 18:08:46 +0000
Subject: [PATCH 0314/4650] [2021-04-18T18:08:46+0000] e2e test


From d79070a1ac4cac6124db800b55748cbafb95d4e0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 19:05:57 +0000
Subject: [PATCH 0315/4650] [2021-04-18T19:05:57+0000] e2e test


From 9ef61decf2d5a4e16976945ee8d51828f20d36cf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 20:03:04 +0000
Subject: [PATCH 0316/4650] [2021-04-18T20:03:04+0000] e2e test


From 945610ae5a0deb7b6924aa80b4dc166353d4ae85 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 21:03:03 +0000
Subject: [PATCH 0317/4650] [2021-04-18T21:03:03+0000] e2e test


From 8086c15af8716284aaa0af689b69e94ab2a30c34 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 22:02:41 +0000
Subject: [PATCH 0318/4650] [2021-04-18T22:02:41+0000] e2e test


From 655c85291ca35b483b794f361d95d6a918f84aa6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Apr 2021 23:02:40 +0000
Subject: [PATCH 0319/4650] [2021-04-18T23:02:40+0000] e2e test


From d06f3f80f630edc03ea1d6be15cf30be17d26477 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 00:09:11 +0000
Subject: [PATCH 0320/4650] [2021-04-19T00:09:11+0000] e2e test


From 433a24b574ba3ad8b921de20884437d8c05a03ac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 01:26:48 +0000
Subject: [PATCH 0321/4650] [2021-04-19T01:26:48+0000] e2e test


From fd87f1d824a137e6ad7cbc5d4fe91491c092c530 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 02:21:24 +0000
Subject: [PATCH 0322/4650] [2021-04-19T02:21:24+0000] e2e test


From 74c2d8407cc6597f5387f098d178e8b57390fea2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 03:09:07 +0000
Subject: [PATCH 0323/4650] [2021-04-19T03:09:07+0000] e2e test


From 62f2fc7e59ac7a6f2b6c7818b292af1c50c79f08 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 04:04:35 +0000
Subject: [PATCH 0324/4650] [2021-04-19T04:04:35+0000] e2e test


From cfb9ea1daec5a1e1a8872c9d21c23b24c9c2b628 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 05:06:58 +0000
Subject: [PATCH 0325/4650] [2021-04-19T05:06:58+0000] e2e test


From 32eb0e0745186e347698fe0afca5eb741209f40c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 06:03:26 +0000
Subject: [PATCH 0326/4650] [2021-04-19T06:03:26+0000] e2e test


From ced9a7025e48f3ea061755dbe21b93bfde2cb277 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 07:05:57 +0000
Subject: [PATCH 0327/4650] [2021-04-19T07:05:57+0000] e2e test


From 131c0539115f9c4f40222c1fb940dfccade1604a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 08:03:13 +0000
Subject: [PATCH 0328/4650] [2021-04-19T08:03:13+0000] e2e test


From 9bc8df3fe8559accf7f215658277817a781cdfd6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 09:02:42 +0000
Subject: [PATCH 0329/4650] [2021-04-19T09:02:42+0000] e2e test


From b0f9dd13e270bbe96c44fcb2c90c45b52ce5bd80 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 10:02:45 +0000
Subject: [PATCH 0330/4650] [2021-04-19T10:02:45+0000] e2e test


From 1b632666ffec11cca6652d88782a7ac73bfc7a72 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 11:02:38 +0000
Subject: [PATCH 0331/4650] [2021-04-19T11:02:37+0000] e2e test


From 0f1edbe3d41d9002c47d006501334025f8540391 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 12:04:13 +0000
Subject: [PATCH 0332/4650] [2021-04-19T12:04:13+0000] e2e test


From fa91a2d60b10652d64709a5d686517a19784be2d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 13:09:13 +0000
Subject: [PATCH 0333/4650] [2021-04-19T13:09:13+0000] e2e test


From 905cf007002b575e07aeb91ff5e0c052d596c618 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 14:02:51 +0000
Subject: [PATCH 0334/4650] [2021-04-19T14:02:51+0000] e2e test


From e390bb2952ee15eeaf78706bdcc19e995136fde0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 15:02:51 +0000
Subject: [PATCH 0335/4650] [2021-04-19T15:02:50+0000] e2e test


From 347047e882d941ec0336070f3a442fe342934473 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 16:04:38 +0000
Subject: [PATCH 0336/4650] [2021-04-19T16:04:38+0000] e2e test


From 88b237a6b4400a31b9193f8ce9976645095fa19a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 17:17:26 +0000
Subject: [PATCH 0337/4650] [2021-04-19T17:17:26+0000] e2e test


From 1f1d89bc4c0ad803729bdc33b7b4b8cd2caf7a82 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 18:09:38 +0000
Subject: [PATCH 0338/4650] [2021-04-19T18:09:38+0000] e2e test


From 16cc583d9b90e45a5f5478ecbeb52d48832ec405 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 19:07:06 +0000
Subject: [PATCH 0339/4650] [2021-04-19T19:07:06+0000] e2e test


From e82df12dfce97fcb32097ae24e545b58f358de6e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 20:02:48 +0000
Subject: [PATCH 0340/4650] [2021-04-19T20:02:48+0000] e2e test


From 36a32d3fdc8893043ceb5a0a8213cabd4ce4acfe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 21:02:40 +0000
Subject: [PATCH 0341/4650] [2021-04-19T21:02:40+0000] e2e test


From 3863469e516556a9266bea1b66dbb2c0150a7784 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 22:02:51 +0000
Subject: [PATCH 0342/4650] [2021-04-19T22:02:51+0000] e2e test


From ac53bdc0a8987423fe883b8e7a14ce973e06952e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Apr 2021 23:03:07 +0000
Subject: [PATCH 0343/4650] [2021-04-19T23:03:07+0000] e2e test


From 5b841a681dcfd2ce2854515a4810b7a441d67f72 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 00:09:33 +0000
Subject: [PATCH 0344/4650] [2021-04-20T00:09:32+0000] e2e test


From b73b57f1d859886880d7a8a91503fe470283d7f8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 01:26:19 +0000
Subject: [PATCH 0345/4650] [2021-04-20T01:26:19+0000] e2e test


From 48514874d4b508a7ef2e5965891edc979a8d6460 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 02:20:26 +0000
Subject: [PATCH 0346/4650] [2021-04-20T02:20:26+0000] e2e test


From 707ace7cef0858cd43ea73664924638b1436efda Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 03:07:32 +0000
Subject: [PATCH 0347/4650] [2021-04-20T03:07:32+0000] e2e test


From ea5bfe9123dae6165e279c36ff1110450e9718dc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 04:03:58 +0000
Subject: [PATCH 0348/4650] [2021-04-20T04:03:57+0000] e2e test


From cf7ba6b8d6856961b7ea7a30887e6967d40c462d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 05:05:50 +0000
Subject: [PATCH 0349/4650] [2021-04-20T05:05:50+0000] e2e test


From c349a851fa02787a56d0521f7c140a9cbb5d7030 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 06:03:51 +0000
Subject: [PATCH 0350/4650] [2021-04-20T06:03:51+0000] e2e test


From 64e68bdba594f1e3bce8f9d35cb36236fd3ac4c0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 07:04:29 +0000
Subject: [PATCH 0351/4650] [2021-04-20T07:04:29+0000] e2e test


From fb5272132f83b09683ff8a0a2eab579c851d5232 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 08:03:16 +0000
Subject: [PATCH 0352/4650] [2021-04-20T08:03:16+0000] e2e test


From b2390538bcf2e022c864bdabb393f4e8ad469742 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 09:02:49 +0000
Subject: [PATCH 0353/4650] [2021-04-20T09:02:49+0000] e2e test


From 0131727ee365e7808835f3a35985b5958b9933af Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 10:02:45 +0000
Subject: [PATCH 0354/4650] [2021-04-20T10:02:44+0000] e2e test


From a36bc22a7fcb15f2985275148df3771ef876a2ea Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 11:02:38 +0000
Subject: [PATCH 0355/4650] [2021-04-20T11:02:38+0000] e2e test


From 9d105661c1c83875ddda34b47f2573905f84d277 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 12:03:46 +0000
Subject: [PATCH 0356/4650] [2021-04-20T12:03:46+0000] e2e test


From 8904977d57d38a274fae41793377a2be0eb56325 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 13:09:36 +0000
Subject: [PATCH 0357/4650] [2021-04-20T13:09:35+0000] e2e test


From 20535c8be71ec7c469bd8a0bbdb665c4a62da317 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 14:02:52 +0000
Subject: [PATCH 0358/4650] [2021-04-20T14:02:52+0000] e2e test


From 8befd1b11e16338c7bdd542bc5c2dbc772b01481 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 15:02:44 +0000
Subject: [PATCH 0359/4650] [2021-04-20T15:02:44+0000] e2e test


From 4cd4808124242555ea58b1a26f31787541d098d8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 16:03:58 +0000
Subject: [PATCH 0360/4650] [2021-04-20T16:03:58+0000] e2e test


From 223812d5b7bae09b2c37e13e614fdb50dbd2025d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 17:17:57 +0000
Subject: [PATCH 0361/4650] [2021-04-20T17:17:57+0000] e2e test


From 33c472292a38a9d01b00d874bee6eb6da5633457 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 18:11:02 +0000
Subject: [PATCH 0362/4650] [2021-04-20T18:11:01+0000] e2e test


From 940ea72988bc25bbdd09e57fe43b0adde2da5dc2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 19:07:30 +0000
Subject: [PATCH 0363/4650] [2021-04-20T19:07:30+0000] e2e test


From b4521c092b6e057ec53e52ffa457738222421647 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 20:03:03 +0000
Subject: [PATCH 0364/4650] [2021-04-20T20:03:03+0000] e2e test


From d4b285db807a379e648ada6ec5dc065f09fe2dba Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 21:02:53 +0000
Subject: [PATCH 0365/4650] [2021-04-20T21:02:53+0000] e2e test


From 47dc834844fbf9afee2dfdfb6f55d61c25b0e3c7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 22:02:51 +0000
Subject: [PATCH 0366/4650] [2021-04-20T22:02:51+0000] e2e test


From 9a2c9319ec2f218a580f226b005a276b1b985b06 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Apr 2021 23:03:10 +0000
Subject: [PATCH 0367/4650] [2021-04-20T23:03:10+0000] e2e test


From aa46366287e0d2fc5d917a6e80d7948ee50b9e9c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 00:09:07 +0000
Subject: [PATCH 0368/4650] [2021-04-21T00:09:07+0000] e2e test


From 4496e7fc640b98c11a3d70111412bf4a88beb63b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 01:26:36 +0000
Subject: [PATCH 0369/4650] [2021-04-21T01:26:36+0000] e2e test


From df3893e1c09b855cb247d0c7ee0818247d0c2683 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 02:21:05 +0000
Subject: [PATCH 0370/4650] [2021-04-21T02:21:05+0000] e2e test


From 54c091cf4402d2b677ebff56fd56c051c97c8ced Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 05:07:20 +0000
Subject: [PATCH 0371/4650] [2021-04-21T05:07:19+0000] e2e test


From f0f1162b602380275e17852a50eb1775c719f52d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 06:04:00 +0000
Subject: [PATCH 0372/4650] [2021-04-21T06:04:00+0000] e2e test


From fbb2c22e97be8108d221adf479cb360331c9bfb2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 09:02:44 +0000
Subject: [PATCH 0373/4650] [2021-04-21T09:02:44+0000] e2e test


From b551d0269c9f2afcbd22fa00298836492e122540 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 10:02:45 +0000
Subject: [PATCH 0374/4650] [2021-04-21T10:02:45+0000] e2e test


From 673a80a9fa8c137fe18a20b5fca46e8072db2cb6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 11:02:41 +0000
Subject: [PATCH 0375/4650] [2021-04-21T11:02:41+0000] e2e test


From 1e2f0b1dfa13fff0db2c2602fa2fc74e93277a9b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 12:03:40 +0000
Subject: [PATCH 0376/4650] [2021-04-21T12:03:40+0000] e2e test


From dcd288c7a21738f02fe8d41e1f4710279dbe92e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 13:09:36 +0000
Subject: [PATCH 0377/4650] [2021-04-21T13:09:36+0000] e2e test


From 25ffc825c2b9b7c687337da8bc7044d7215dc361 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 14:03:02 +0000
Subject: [PATCH 0378/4650] [2021-04-21T14:03:02+0000] e2e test


From 945854ce3f6ebcd09feb9ea5d698edcc11bca1ee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 15:03:06 +0000
Subject: [PATCH 0379/4650] [2021-04-21T15:03:06+0000] e2e test


From 4a043b843886b2c1369dabf3d23d57b8f65a6b8b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 16:05:28 +0000
Subject: [PATCH 0380/4650] [2021-04-21T16:05:28+0000] e2e test


From 5315a85cbc96be3ff1b6c1ab58d390320e1eb08f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 17:18:40 +0000
Subject: [PATCH 0381/4650] [2021-04-21T17:18:40+0000] e2e test


From 06ba8f68321727ddb6e068843fd471bad718aea2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 18:11:13 +0000
Subject: [PATCH 0382/4650] [2021-04-21T18:11:13+0000] e2e test


From c86929a7d502e80b870f6773b35d15241ea349fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 19:07:41 +0000
Subject: [PATCH 0383/4650] [2021-04-21T19:07:41+0000] e2e test


From 50f6d86cea3e2edcae155f44ac0f80e3b4037176 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 20:02:55 +0000
Subject: [PATCH 0384/4650] [2021-04-21T20:02:55+0000] e2e test


From f59277eb7d29db4af012d84511bdd108020ac428 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 21:02:44 +0000
Subject: [PATCH 0385/4650] [2021-04-21T21:02:44+0000] e2e test


From 06fd7fea0734c7ca3eb6e3449e718f1ec9d93bc9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 22:02:46 +0000
Subject: [PATCH 0386/4650] [2021-04-21T22:02:46+0000] e2e test


From 10ac4edf8d167b3d5a99c111a0b82959989c1861 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Apr 2021 23:03:42 +0000
Subject: [PATCH 0387/4650] [2021-04-21T23:03:42+0000] e2e test


From d58fa96b70553337fbbc620c9f03488af79fb589 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 00:09:52 +0000
Subject: [PATCH 0388/4650] [2021-04-22T00:09:52+0000] e2e test


From ed18ebc4a20a1e6b14925e0caf5268e0fe383254 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 01:26:42 +0000
Subject: [PATCH 0389/4650] [2021-04-22T01:26:42+0000] e2e test


From dc5ac02e025745b5469e7ebb5ecc14ba2fe63382 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 02:21:19 +0000
Subject: [PATCH 0390/4650] [2021-04-22T02:21:19+0000] e2e test


From cb5693b6d07ba206661e71ecef92722e63dc636a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 03:08:10 +0000
Subject: [PATCH 0391/4650] [2021-04-22T03:08:10+0000] e2e test


From aea865bc0ba7db795666c6d3ea66d30813e1fa8c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 04:04:24 +0000
Subject: [PATCH 0392/4650] [2021-04-22T04:04:23+0000] e2e test


From 63f090af77994bc6ec8a55d9a676180f4d017cb8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 05:06:52 +0000
Subject: [PATCH 0393/4650] [2021-04-22T05:06:52+0000] e2e test


From 693bb6c6212a6e7f8f435dcb11c4ad87f00703b8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 06:03:32 +0000
Subject: [PATCH 0394/4650] [2021-04-22T06:03:32+0000] e2e test


From 39820575fcb94e98b1b5639b8bf8c614d4eac432 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 07:06:44 +0000
Subject: [PATCH 0395/4650] [2021-04-22T07:06:44+0000] e2e test


From 4b473e95bef1029094ac89d308aa5093c2e36d91 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 08:03:22 +0000
Subject: [PATCH 0396/4650] [2021-04-22T08:03:22+0000] e2e test


From 344379dcc0d44c87da29ad7c6faa97734fbe3166 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 09:03:04 +0000
Subject: [PATCH 0397/4650] [2021-04-22T09:03:04+0000] e2e test


From 8f392f034293a377e153130ef82441a10d0b7121 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 10:02:47 +0000
Subject: [PATCH 0398/4650] [2021-04-22T10:02:47+0000] e2e test


From 53753dcf2a2c4257b6e49d038bfa669d5a46c706 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 11:02:38 +0000
Subject: [PATCH 0399/4650] [2021-04-22T11:02:38+0000] e2e test


From ba53fb7924d779a62c796bf1400a74a49db822c5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 12:03:54 +0000
Subject: [PATCH 0400/4650] [2021-04-22T12:03:54+0000] e2e test


From 03cbffffb11933f45908028d5bb2822bc6acd761 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 13:10:47 +0000
Subject: [PATCH 0401/4650] [2021-04-22T13:10:47+0000] e2e test


From 4e004a6a09813b70762f51ba06b36f913510dbcb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 14:03:06 +0000
Subject: [PATCH 0402/4650] [2021-04-22T14:03:06+0000] e2e test


From 40305f55872771bb58b4d28233d42c54ba217119 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 15:02:50 +0000
Subject: [PATCH 0403/4650] [2021-04-22T15:02:50+0000] e2e test


From 1f9749c60a893cb87e3db00f8b17a3cb642db48d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 16:05:08 +0000
Subject: [PATCH 0404/4650] [2021-04-22T16:05:07+0000] e2e test


From f1816340ac4f8921224e9b69674b3c714efd55a0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 17:20:17 +0000
Subject: [PATCH 0405/4650] [2021-04-22T17:20:16+0000] e2e test


From 8f8d59b07bedd3b6d9184b23499068dc3111bc75 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 18:12:11 +0000
Subject: [PATCH 0406/4650] [2021-04-22T18:12:10+0000] e2e test


From 8041e630e5c35abf43fdd39a19c6f182823d3cb7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 19:09:16 +0000
Subject: [PATCH 0407/4650] [2021-04-22T19:09:16+0000] e2e test


From 26e519e11131361cad1b1925b362c93458eb09f9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 20:02:55 +0000
Subject: [PATCH 0408/4650] [2021-04-22T20:02:55+0000] e2e test


From b7ad3e27ba05783f9a1a1df5bd41e4ea5d740912 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 21:02:47 +0000
Subject: [PATCH 0409/4650] [2021-04-22T21:02:47+0000] e2e test


From 5f4da9eed9e1fbaa36c90c576519bf0667bb260d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 22:03:01 +0000
Subject: [PATCH 0410/4650] [2021-04-22T22:03:01+0000] e2e test


From 13053f5696fbcc9543657f439656a388eae6fe5a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Apr 2021 23:03:05 +0000
Subject: [PATCH 0411/4650] [2021-04-22T23:03:05+0000] e2e test


From 05fbc880378f042e51d4534b64b8026daacd5a00 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 00:09:05 +0000
Subject: [PATCH 0412/4650] [2021-04-23T00:09:05+0000] e2e test


From 5983a362e97b04873ca560bcff885f0c1520e964 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 01:27:33 +0000
Subject: [PATCH 0413/4650] [2021-04-23T01:27:33+0000] e2e test


From 1a44dc750b1accb6d3be22c9ca3188cc9df40cc9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 02:25:20 +0000
Subject: [PATCH 0414/4650] [2021-04-23T02:25:20+0000] e2e test


From b5e78ecb368342ed10da95fc81f369bdb1f63e20 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 03:07:33 +0000
Subject: [PATCH 0415/4650] [2021-04-23T03:07:33+0000] e2e test


From 5e5c6da1b9ecbe4b1adddf4d65f0eab56a181cc9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 04:04:38 +0000
Subject: [PATCH 0416/4650] [2021-04-23T04:04:38+0000] e2e test


From 47cbd6015d11eb97a17321b3c58f1842836f5cab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 05:07:02 +0000
Subject: [PATCH 0417/4650] [2021-04-23T05:07:02+0000] e2e test


From 71c8a1376a10c0791ad0032acff1804101234abf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 06:03:24 +0000
Subject: [PATCH 0418/4650] [2021-04-23T06:03:23+0000] e2e test


From ef7ed5db73e2054008640ae99989dc76d5b79a0d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 07:06:43 +0000
Subject: [PATCH 0419/4650] [2021-04-23T07:06:43+0000] e2e test


From bf7c3231993d9b9101aecd5f4eafd76396c83bac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 08:03:16 +0000
Subject: [PATCH 0420/4650] [2021-04-23T08:03:16+0000] e2e test


From a9fcf231f5deb9bd0626fd1c3acdb8ec6a9f8f22 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 09:03:48 +0000
Subject: [PATCH 0421/4650] [2021-04-23T09:03:48+0000] e2e test


From 579bc87d2c8e1d7bda606bdf8cdb2699a50226ba Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 10:02:57 +0000
Subject: [PATCH 0422/4650] [2021-04-23T10:02:57+0000] e2e test


From 404ef74681e9982ac940181ad60f7ec3415a7e42 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 11:02:40 +0000
Subject: [PATCH 0423/4650] [2021-04-23T11:02:40+0000] e2e test


From 9e22b4b632ed3af1754644dfb11ecd417377ef00 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 12:03:51 +0000
Subject: [PATCH 0424/4650] [2021-04-23T12:03:51+0000] e2e test


From 2105a736e646431c4612074eaa4f7a4d40516594 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 13:10:11 +0000
Subject: [PATCH 0425/4650] [2021-04-23T13:10:11+0000] e2e test


From 0ef15263553e6d421119752e190e09d370455bb3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 14:02:51 +0000
Subject: [PATCH 0426/4650] [2021-04-23T14:02:51+0000] e2e test


From 144d5b85a196b871b574ed11d0706defc8a72849 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 15:02:53 +0000
Subject: [PATCH 0427/4650] [2021-04-23T15:02:53+0000] e2e test


From 50b94b760076e8e05c07d5155d88d552306d17e6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 16:06:19 +0000
Subject: [PATCH 0428/4650] [2021-04-23T16:06:19+0000] e2e test


From 79f938fb3274072c4c4600d4ef54932664cba2a1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 17:21:06 +0000
Subject: [PATCH 0429/4650] [2021-04-23T17:21:06+0000] e2e test


From 8195546ad1c0eb07f927f10a2e82e36835e2c0a0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 18:11:54 +0000
Subject: [PATCH 0430/4650] [2021-04-23T18:11:54+0000] e2e test


From af0de29ed79836fa6bf4a09438657171760dd478 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 19:08:45 +0000
Subject: [PATCH 0431/4650] [2021-04-23T19:08:45+0000] e2e test


From cdce0150be71004f8bbdff173bc66b7c497899fa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 20:02:57 +0000
Subject: [PATCH 0432/4650] [2021-04-23T20:02:57+0000] e2e test


From 0401b78f0faa7c69a302a1c80b7a674a240d0e27 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 21:02:46 +0000
Subject: [PATCH 0433/4650] [2021-04-23T21:02:46+0000] e2e test


From 73a142e25a9bc1d7d4aac0e2629a9550edcef1e0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 22:02:56 +0000
Subject: [PATCH 0434/4650] [2021-04-23T22:02:56+0000] e2e test


From 5067112adef5250f35bd0740d181205a99cbc932 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Apr 2021 23:03:58 +0000
Subject: [PATCH 0435/4650] [2021-04-23T23:03:58+0000] e2e test


From 72acf8aae806adaf2ba863982612775b4cb471cb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 00:10:00 +0000
Subject: [PATCH 0436/4650] [2021-04-24T00:10:00+0000] e2e test


From a0d0b5d555bb440e8e196e6cb5cf0192c7e5e557 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 01:26:49 +0000
Subject: [PATCH 0437/4650] [2021-04-24T01:26:49+0000] e2e test


From c3c06b9bede411434814451b0d0d90ac38ac036b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 02:22:31 +0000
Subject: [PATCH 0438/4650] [2021-04-24T02:22:31+0000] e2e test


From 76a4254fc08d788fd5d534860e86432c7ec817b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 03:07:52 +0000
Subject: [PATCH 0439/4650] [2021-04-24T03:07:52+0000] e2e test


From ebdf5d26489f5b30df554fcadb1fb06ce2dafa57 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 04:04:25 +0000
Subject: [PATCH 0440/4650] [2021-04-24T04:04:25+0000] e2e test


From b6f6a0c6086f145096413856aef01cc213c56ce0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 05:07:14 +0000
Subject: [PATCH 0441/4650] [2021-04-24T05:07:13+0000] e2e test


From be9094c98f44e57b0146a86fdb001cafba07e5e8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 06:03:14 +0000
Subject: [PATCH 0442/4650] [2021-04-24T06:03:14+0000] e2e test


From 5820cd3dc032b9d921aa45dbea7d14dcfd77d97b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 07:06:53 +0000
Subject: [PATCH 0443/4650] [2021-04-24T07:06:53+0000] e2e test


From dccf2eb12ca4570f541c30d02038dd8a0e3d480b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 08:03:11 +0000
Subject: [PATCH 0444/4650] [2021-04-24T08:03:11+0000] e2e test


From bfe81ca2e3755ce52d25015d15990a3c412f974a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 09:02:43 +0000
Subject: [PATCH 0445/4650] [2021-04-24T09:02:43+0000] e2e test


From fc3fe4103d15a4a19581d79436554007ae697a49 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 10:02:47 +0000
Subject: [PATCH 0446/4650] [2021-04-24T10:02:46+0000] e2e test


From 732c7d1782ee03bd01434474eed39e21aad99208 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 11:02:44 +0000
Subject: [PATCH 0447/4650] [2021-04-24T11:02:44+0000] e2e test


From f459309f819854a425ba41dc1bdf762efdae7784 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 12:03:47 +0000
Subject: [PATCH 0448/4650] [2021-04-24T12:03:46+0000] e2e test


From 383d0ba669e895a718cec7ed75a5f090d9ebc92a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 13:10:02 +0000
Subject: [PATCH 0449/4650] [2021-04-24T13:10:02+0000] e2e test


From 5877cff1abb2d9ff734ad148a6afdabec0450def Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 14:02:50 +0000
Subject: [PATCH 0450/4650] [2021-04-24T14:02:50+0000] e2e test


From c1c59fa551ae5760f07d20b6463b86729e111e29 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 15:02:53 +0000
Subject: [PATCH 0451/4650] [2021-04-24T15:02:53+0000] e2e test


From 5ccf3751ed704cfdcfc95f2faf36422663f4766f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 16:05:01 +0000
Subject: [PATCH 0452/4650] [2021-04-24T16:05:01+0000] e2e test


From 96966dbaee18a6ef7437c50f103138e716367179 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 17:20:26 +0000
Subject: [PATCH 0453/4650] [2021-04-24T17:20:26+0000] e2e test


From 3bfe0496fee17f63d0f485430b683c9acf229ee4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 18:11:45 +0000
Subject: [PATCH 0454/4650] [2021-04-24T18:11:44+0000] e2e test


From 361d2d3865745364c4e916330dc7977d15104926 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 19:07:28 +0000
Subject: [PATCH 0455/4650] [2021-04-24T19:07:27+0000] e2e test


From bc0f694c51f0bdaf7fa3e2956a4f21d4c3ac1c2e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 20:02:54 +0000
Subject: [PATCH 0456/4650] [2021-04-24T20:02:54+0000] e2e test


From 90362134b8bf26abf70b791c1f658c939c4be88a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 21:02:38 +0000
Subject: [PATCH 0457/4650] [2021-04-24T21:02:38+0000] e2e test


From abc3ccc72f05e183fe88249201b544374afaa2ee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 22:02:44 +0000
Subject: [PATCH 0458/4650] [2021-04-24T22:02:44+0000] e2e test


From 32f3e70831c39dbded5e03c108c276b25fc60329 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Apr 2021 23:03:04 +0000
Subject: [PATCH 0459/4650] [2021-04-24T23:03:03+0000] e2e test


From 6feca44542f51ba28b273fb749c9126ea6a20821 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 00:09:45 +0000
Subject: [PATCH 0460/4650] [2021-04-25T00:09:45+0000] e2e test


From 7fb34de2ccf9156cd13b669e59177043436a1d80 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 01:28:53 +0000
Subject: [PATCH 0461/4650] [2021-04-25T01:28:53+0000] e2e test


From c6aabe521ad3d54efba04ef1a5bd9c8a5434557f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 02:25:59 +0000
Subject: [PATCH 0462/4650] [2021-04-25T02:25:58+0000] e2e test


From ff817b6afbbdd8e07d2329ce7e0a03ef1d52f92d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 03:10:15 +0000
Subject: [PATCH 0463/4650] [2021-04-25T03:10:15+0000] e2e test


From e576d7931466cb394075001e5cdc93c17267e056 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 04:05:23 +0000
Subject: [PATCH 0464/4650] [2021-04-25T04:05:23+0000] e2e test


From 5dcf113235c430bda7493a33de665ebcd867ba7d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 05:07:36 +0000
Subject: [PATCH 0465/4650] [2021-04-25T05:07:36+0000] e2e test


From af75ae4dd19b269622a8e137be3a5b633b870ad5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 06:03:12 +0000
Subject: [PATCH 0466/4650] [2021-04-25T06:03:12+0000] e2e test


From b80b7393e6cdc44440df3cb17e3255ad26e35f6f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 07:06:23 +0000
Subject: [PATCH 0467/4650] [2021-04-25T07:06:23+0000] e2e test


From fe71d4f53906f31d776a1f31fdbb8b2ca57570ac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 07:43:47 +0000
Subject: [PATCH 0468/4650] [2021-04-25T07:43:47+0000] e2e test


From ef119de0aeb445e14539b48acbfd2bc52a00c170 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 08:03:04 +0000
Subject: [PATCH 0469/4650] [2021-04-25T08:03:04+0000] e2e test


From 6ebf678e3544fea2db4cb0d133405c67093255a9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 08:58:00 +0000
Subject: [PATCH 0470/4650] [2021-04-25T08:58:00+0000] e2e test


From 9c4df22c7bd75fcc8aaefb55f12f6b7d56a66a08 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 09:02:46 +0000
Subject: [PATCH 0471/4650] [2021-04-25T09:02:46+0000] e2e test


From b43d572d304b9f4762033569157df55d34b35832 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 09:11:55 +0000
Subject: [PATCH 0472/4650] [2021-04-25T09:11:55+0000] e2e test


From 9fc10608dbf3ed50a2177f18557b61e12aba16d1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 10:02:51 +0000
Subject: [PATCH 0473/4650] [2021-04-25T10:02:51+0000] e2e test


From ce42c91c5b11392ed7678a7356c183eb8afdcc2e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 11:02:51 +0000
Subject: [PATCH 0474/4650] [2021-04-25T11:02:51+0000] e2e test


From bc0fbc840ee4f39b054a14af87a1b29bbb250b94 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 12:03:48 +0000
Subject: [PATCH 0475/4650] [2021-04-25T12:03:48+0000] e2e test


From fa710ab1d337aa0b607bd9b9f1d09e8ac2bca5e8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 12:05:31 +0000
Subject: [PATCH 0476/4650] [2021-04-25T12:05:31+0000] e2e test


From a2e8ad538c54a35f9b43091f57d6229111ee80d7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 12:07:45 +0000
Subject: [PATCH 0477/4650] [2021-04-25T12:07:45+0000] e2e test


From ab8ea529da288a8956b48e444da640e6f4f9d815 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 12:48:18 +0000
Subject: [PATCH 0478/4650] [2021-04-25T12:48:17+0000] e2e test


From 6eca31e351cf189097fa631e303b8b2c70190d48 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 13:09:53 +0000
Subject: [PATCH 0479/4650] [2021-04-25T13:09:53+0000] e2e test


From 96283acbf88c7254bc009f866864106cd906e3b3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 14:02:52 +0000
Subject: [PATCH 0480/4650] [2021-04-25T14:02:52+0000] e2e test


From 75a45f630d0b09fb98df589852af1840b1413e2c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 14:28:27 +0000
Subject: [PATCH 0481/4650] [2021-04-25T14:28:27+0000] e2e test


From e81ca56120d056c555599918781a43d2b18e424e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 15:02:58 +0000
Subject: [PATCH 0482/4650] [2021-04-25T15:02:58+0000] e2e test


From 2cb4232523d5ac9fb12051db81d872ee92e1e015 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 16:04:36 +0000
Subject: [PATCH 0483/4650] [2021-04-25T16:04:36+0000] e2e test


From a9e6e381b9e96d90b47588cd9ddf8581c2c0fa6c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 17:20:31 +0000
Subject: [PATCH 0484/4650] [2021-04-25T17:20:31+0000] e2e test


From f9c42fbd78669f6841a36353428f98230a569c6d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 18:12:21 +0000
Subject: [PATCH 0485/4650] [2021-04-25T18:12:21+0000] e2e test


From a36849b07b2b3d0fd5e54f7eafb9aca46b5707ed Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 19:08:07 +0000
Subject: [PATCH 0486/4650] [2021-04-25T19:08:07+0000] e2e test


From f883ea7f9165767789e40fba1755ec275ccf330e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 20:03:04 +0000
Subject: [PATCH 0487/4650] [2021-04-25T20:03:04+0000] e2e test


From c24c2a9373cd7a60857df54dc359f53c32f66cab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 21:02:45 +0000
Subject: [PATCH 0488/4650] [2021-04-25T21:02:45+0000] e2e test


From 22b5cb070c374007900c6888db01b9ff7b2ebded Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 22:02:44 +0000
Subject: [PATCH 0489/4650] [2021-04-25T22:02:44+0000] e2e test


From f3cfe9d0f7f21be41543a7a1100ac8af6fff0c0b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Apr 2021 23:03:08 +0000
Subject: [PATCH 0490/4650] [2021-04-25T23:03:08+0000] e2e test


From e73e649273ee7c0f09f6f5dd4ea31bade87178be Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 00:10:17 +0000
Subject: [PATCH 0491/4650] [2021-04-26T00:10:17+0000] e2e test


From 10f6d2a42688a279c91115e43280ad8e233ddd09 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 01:27:31 +0000
Subject: [PATCH 0492/4650] [2021-04-26T01:27:31+0000] e2e test


From 01ed51e68884bd6cdfa4449af1919636b3eb9bd7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 02:26:04 +0000
Subject: [PATCH 0493/4650] [2021-04-26T02:26:04+0000] e2e test


From 51ce0dd7ccf06b41f5af4751e487f02f12636265 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 03:09:59 +0000
Subject: [PATCH 0494/4650] [2021-04-26T03:09:59+0000] e2e test


From 39bd1a0e31557675f645ce55c33476a2174f0497 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 04:05:43 +0000
Subject: [PATCH 0495/4650] [2021-04-26T04:05:43+0000] e2e test


From 33268cec518362de7a99020445e63e37eb4b3125 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 05:07:36 +0000
Subject: [PATCH 0496/4650] [2021-04-26T05:07:36+0000] e2e test


From 82bb5624a277c13dd20797bfb43fa42af82bace5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 06:03:23 +0000
Subject: [PATCH 0497/4650] [2021-04-26T06:03:23+0000] e2e test


From ebb12f165458bebfd66615e04a95437dfe70459d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 07:07:10 +0000
Subject: [PATCH 0498/4650] [2021-04-26T07:07:10+0000] e2e test


From 001fd92b24ca19ac2a5b94de702db29c764c5a65 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 08:03:27 +0000
Subject: [PATCH 0499/4650] [2021-04-26T08:03:27+0000] e2e test


From e17e61db8a20e5b14051bb3b430faae6d8cb30c8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 09:03:19 +0000
Subject: [PATCH 0500/4650] [2021-04-26T09:03:19+0000] e2e test


From e1dd55d1261cf6e2c936c7cc5cce9637163f9513 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 10:02:48 +0000
Subject: [PATCH 0501/4650] [2021-04-26T10:02:48+0000] e2e test


From 9c90d3d885a83dab4b6f270f8d229da9a53a685a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 11:02:44 +0000
Subject: [PATCH 0502/4650] [2021-04-26T11:02:44+0000] e2e test


From eb5118897f3fe1bc60b0635eb5e8e21c31492a2d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 12:03:57 +0000
Subject: [PATCH 0503/4650] [2021-04-26T12:03:57+0000] e2e test


From 7b934cea32f6cf2e4e90fb5f378ba5ad562f86e6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 13:11:18 +0000
Subject: [PATCH 0504/4650] [2021-04-26T13:11:18+0000] e2e test


From f8630ca0460fa70c951a8892bb9c8d33641fcecd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 14:02:56 +0000
Subject: [PATCH 0505/4650] [2021-04-26T14:02:56+0000] e2e test


From 9f4e2cae4819d67085cc8d1389f9312310091c8f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 15:02:46 +0000
Subject: [PATCH 0506/4650] [2021-04-26T15:02:45+0000] e2e test


From 2fd7c5efe797633728fd5e86ed14eeaab8e8650e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 16:04:54 +0000
Subject: [PATCH 0507/4650] [2021-04-26T16:04:54+0000] e2e test


From 2e923f4ac36c2cb44cacfc36d84b721ec1274fd1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 17:20:31 +0000
Subject: [PATCH 0508/4650] [2021-04-26T17:20:31+0000] e2e test


From 365ffd9c9bffa897ef5bac32a4d982ed72bf67f5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 18:12:14 +0000
Subject: [PATCH 0509/4650] [2021-04-26T18:12:14+0000] e2e test


From cd13fc230398f1cf0e00e2ed6a31ec991a0ae820 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 19:07:48 +0000
Subject: [PATCH 0510/4650] [2021-04-26T19:07:48+0000] e2e test


From 755e3c062c423cafc5f57a8634c077332ca4c808 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 20:03:08 +0000
Subject: [PATCH 0511/4650] [2021-04-26T20:03:08+0000] e2e test


From e5cbb3abff14d172e5fde98d27cf06d7ac0a5b15 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 21:02:43 +0000
Subject: [PATCH 0512/4650] [2021-04-26T21:02:43+0000] e2e test


From 06e49596d1fbc203762e64a0beecf339ed4e63bb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 22:02:46 +0000
Subject: [PATCH 0513/4650] [2021-04-26T22:02:46+0000] e2e test


From 1f52f47ff65ed7048fdbf8bee3cab12e1f1a1925 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Apr 2021 23:03:04 +0000
Subject: [PATCH 0514/4650] [2021-04-26T23:03:03+0000] e2e test


From 88be9836bf0f34a2f73cb9b17507c3863b835691 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 00:08:50 +0000
Subject: [PATCH 0515/4650] [2021-04-27T00:08:50+0000] e2e test


From 5402783114f75fa59ea4cd9269fc58993ba56986 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 01:26:36 +0000
Subject: [PATCH 0516/4650] [2021-04-27T01:26:36+0000] e2e test


From c73007baf6b15eeb6507e218c28099394ee38efb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 02:22:12 +0000
Subject: [PATCH 0517/4650] [2021-04-27T02:22:12+0000] e2e test


From 6d0abacd5c008ff3b80d7ff05f4f28861d156a32 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 03:06:43 +0000
Subject: [PATCH 0518/4650] [2021-04-27T03:06:42+0000] e2e test


From 53cfcce143d6c595a2aa8aee664d2f8780457ec6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 04:03:21 +0000
Subject: [PATCH 0519/4650] [2021-04-27T04:03:21+0000] e2e test


From a08261042b9fbe74077d42f80c9a7c2195109e3e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 05:06:32 +0000
Subject: [PATCH 0520/4650] [2021-04-27T05:06:32+0000] e2e test


From ea03a67f4bf5191e75cb962a500882a8367d1bf1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 06:03:31 +0000
Subject: [PATCH 0521/4650] [2021-04-27T06:03:31+0000] e2e test


From 14e8d59959f053cea58872c7844480d3729b88c3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 07:06:13 +0000
Subject: [PATCH 0522/4650] [2021-04-27T07:06:13+0000] e2e test


From c66a7aa49b515345c45bc0256a07b3a90dac4462 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 08:03:39 +0000
Subject: [PATCH 0523/4650] [2021-04-27T08:03:39+0000] e2e test


From 98f2bb152804dd7b9f1bcea8818e89cb7e10e7f8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 09:02:44 +0000
Subject: [PATCH 0524/4650] [2021-04-27T09:02:43+0000] e2e test


From 98fb815f709569c43472ca64c11af19b4b768447 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 10:02:46 +0000
Subject: [PATCH 0525/4650] [2021-04-27T10:02:46+0000] e2e test


From 0bad3cc0e30c3546fe54f583768172f7fe99ab99 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 11:02:53 +0000
Subject: [PATCH 0526/4650] [2021-04-27T11:02:53+0000] e2e test


From 652f518f5c79e853d4aaa934a3428032ca508e79 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 12:04:12 +0000
Subject: [PATCH 0527/4650] [2021-04-27T12:04:11+0000] e2e test


From b61c90398a92ac7f74a4cbd027aad045b409f8d5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 13:10:19 +0000
Subject: [PATCH 0528/4650] [2021-04-27T13:10:19+0000] e2e test


From 1b205ad9604b1ec83d18d939db62434035635c97 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 14:02:59 +0000
Subject: [PATCH 0529/4650] [2021-04-27T14:02:59+0000] e2e test


From f01874883ccb6d469de6977d2daae6d3eb7a0c80 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 15:02:48 +0000
Subject: [PATCH 0530/4650] [2021-04-27T15:02:48+0000] e2e test


From 7aaf8be9fd9ae805f15c8d8822c700d1b731515d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 16:05:07 +0000
Subject: [PATCH 0531/4650] [2021-04-27T16:05:06+0000] e2e test


From 2fc552e5ca1af40a2507fabb9dc5f8eeceece962 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 17:20:50 +0000
Subject: [PATCH 0532/4650] [2021-04-27T17:20:50+0000] e2e test


From 87a4cb36536195281bea6676b3af9a75e3d0870c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 18:12:12 +0000
Subject: [PATCH 0533/4650] [2021-04-27T18:12:12+0000] e2e test


From 7c94e6fcee3d17821b9c8a0faef03b6a2e1bcaaf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 19:08:42 +0000
Subject: [PATCH 0534/4650] [2021-04-27T19:08:42+0000] e2e test


From 5409ece5ad65f7cb9e33a9bede034e185e1f7e10 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 20:02:55 +0000
Subject: [PATCH 0535/4650] [2021-04-27T20:02:55+0000] e2e test


From e801185cd6ef4afbe1b01122f18ac28889694146 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 21:02:56 +0000
Subject: [PATCH 0536/4650] [2021-04-27T21:02:56+0000] e2e test


From 788b8c6021584635e9663906e741903dc64c3a7b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 22:02:54 +0000
Subject: [PATCH 0537/4650] [2021-04-27T22:02:54+0000] e2e test


From 6780b1b0a79a79d4082d6ab91d2864a0db11e9ef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Apr 2021 23:03:17 +0000
Subject: [PATCH 0538/4650] [2021-04-27T23:03:16+0000] e2e test


From f13e19abadd312ca7f8fcb9fc9aedb297005a6e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 00:09:12 +0000
Subject: [PATCH 0539/4650] [2021-04-28T00:09:11+0000] e2e test


From 80cc6053ac421d2d8877080bd54cde98ca643664 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 01:26:32 +0000
Subject: [PATCH 0540/4650] [2021-04-28T01:26:31+0000] e2e test


From 67871e233ef5dbad610fd50a8542f5e18dbe1f2f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 02:23:21 +0000
Subject: [PATCH 0541/4650] [2021-04-28T02:23:21+0000] e2e test


From 1459369feee016dbc6033077e9239372a960670d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 03:08:28 +0000
Subject: [PATCH 0542/4650] [2021-04-28T03:08:28+0000] e2e test


From d1fcf94b85b13f11d847097c2d29a9de0e5f9852 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 04:04:37 +0000
Subject: [PATCH 0543/4650] [2021-04-28T04:04:37+0000] e2e test


From c02cc4cccf5ce2699e72ac821ae8f5b83aee94d3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 05:06:54 +0000
Subject: [PATCH 0544/4650] [2021-04-28T05:06:54+0000] e2e test


From a60e6442d1ed0767e9f6e9ee53e8ff8ee333e715 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 06:03:26 +0000
Subject: [PATCH 0545/4650] [2021-04-28T06:03:26+0000] e2e test


From d3305cd15fca09cbbc607872a4a42c2ba5dbaba9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 07:06:24 +0000
Subject: [PATCH 0546/4650] [2021-04-28T07:06:24+0000] e2e test


From 444db0f4ac87201bc9a2216e6d6332eb2156765b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 08:03:07 +0000
Subject: [PATCH 0547/4650] [2021-04-28T08:03:07+0000] e2e test


From 3039028d7f1595286e36f9db90c70835f8fe263d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 09:02:54 +0000
Subject: [PATCH 0548/4650] [2021-04-28T09:02:54+0000] e2e test


From d73cd44f64a7ce878bab7bdf78c2257386a443dc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 10:02:59 +0000
Subject: [PATCH 0549/4650] [2021-04-28T10:02:59+0000] e2e test


From 4c4c193a89eee5b239a2954cbb5d1463289a869f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 11:02:41 +0000
Subject: [PATCH 0550/4650] [2021-04-28T11:02:41+0000] e2e test


From 0d7bc8c56c7ea22f283f53df9805bb259148caa3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 12:03:54 +0000
Subject: [PATCH 0551/4650] [2021-04-28T12:03:54+0000] e2e test


From 38f681474168a1b223b572ed071548019ba93fb9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 13:10:43 +0000
Subject: [PATCH 0552/4650] [2021-04-28T13:10:43+0000] e2e test


From d3c997dfeaa0afbd18cd9e1a888cc3fd81292a8b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 14:02:48 +0000
Subject: [PATCH 0553/4650] [2021-04-28T14:02:48+0000] e2e test


From 41e5b5d9c888689566fa687f7c98bbf633b1065a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 15:02:51 +0000
Subject: [PATCH 0554/4650] [2021-04-28T15:02:51+0000] e2e test


From bced090670cf3a5408c1899cd0264290c28c473f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 16:05:23 +0000
Subject: [PATCH 0555/4650] [2021-04-28T16:05:23+0000] e2e test


From b2b13cb6e7dd6c7d968b1afcbe12a62f896efb4a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 17:21:23 +0000
Subject: [PATCH 0556/4650] [2021-04-28T17:21:23+0000] e2e test


From 98497c53dddcd19efb30ba06bffcc8c48e2307dd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 18:12:15 +0000
Subject: [PATCH 0557/4650] [2021-04-28T18:12:15+0000] e2e test


From 0fb2f1ab3d8cc050bf87b1b06e9c8f35c7be7afa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 19:08:20 +0000
Subject: [PATCH 0558/4650] [2021-04-28T19:08:20+0000] e2e test


From 670cc0906909b37703193d670b7c6c42987bffa2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 20:03:15 +0000
Subject: [PATCH 0559/4650] [2021-04-28T20:03:14+0000] e2e test


From 25df1d847b25bec11a6ffc468523f2e612d136a5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 21:03:00 +0000
Subject: [PATCH 0560/4650] [2021-04-28T21:02:59+0000] e2e test


From 47f750ddfa49e76c7afb3ed4c813349785e22208 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 22:02:58 +0000
Subject: [PATCH 0561/4650] [2021-04-28T22:02:58+0000] e2e test


From 44c63cd11917cde21c7ae4c11c8903e71ea7276e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Apr 2021 23:03:00 +0000
Subject: [PATCH 0562/4650] [2021-04-28T23:03:00+0000] e2e test


From 84c4c67cd6dd11eb7009af6451e146e87ba5af67 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 00:09:08 +0000
Subject: [PATCH 0563/4650] [2021-04-29T00:09:08+0000] e2e test


From 107f8baddfef3d2702aaa4554fe1d7ab493c5048 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 01:25:47 +0000
Subject: [PATCH 0564/4650] [2021-04-29T01:25:47+0000] e2e test


From 195caf522141ac7897ff113785ccefee1ca408bf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 02:21:35 +0000
Subject: [PATCH 0565/4650] [2021-04-29T02:21:35+0000] e2e test


From 00cd133c8671f55cecf1c4a61f3c4c77f36e0e5d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 03:04:50 +0000
Subject: [PATCH 0566/4650] [2021-04-29T03:04:49+0000] e2e test


From e18716bec1cb0d0aa0f58adf1589068d925e8b8a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 04:02:41 +0000
Subject: [PATCH 0567/4650] [2021-04-29T04:02:41+0000] e2e test


From 00b6cc063f3001d02e23393ee2f7614454ba4818 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 05:05:19 +0000
Subject: [PATCH 0568/4650] [2021-04-29T05:05:19+0000] e2e test


From 31d2f24e82986620e0146388c02bbc010d92809a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 06:02:47 +0000
Subject: [PATCH 0569/4650] [2021-04-29T06:02:46+0000] e2e test


From 325b0e852d41d6ae8c73044f9f0f3516e243fc43 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 07:04:35 +0000
Subject: [PATCH 0570/4650] [2021-04-29T07:04:35+0000] e2e test


From 7d58f6af2050b98f4d218dbdf685b7ef289e929f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 08:02:45 +0000
Subject: [PATCH 0571/4650] [2021-04-29T08:02:45+0000] e2e test


From f7ec729ae6267a8ce08b9a1d7c71ccdffc891165 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 09:02:42 +0000
Subject: [PATCH 0572/4650] [2021-04-29T09:02:42+0000] e2e test


From 067340f02441e6dd36aa05c11c00fd0e1b1d9d8c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 10:02:41 +0000
Subject: [PATCH 0573/4650] [2021-04-29T10:02:41+0000] e2e test


From b3f4778bb2ed8cf82cba9a58bcf0bc4cd44350a3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 11:02:48 +0000
Subject: [PATCH 0574/4650] [2021-04-29T11:02:48+0000] e2e test


From ff628796c8837677efdb9634526c257cf6fbec2b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 12:02:54 +0000
Subject: [PATCH 0575/4650] [2021-04-29T12:02:54+0000] e2e test


From 11884c2f658a5e35be1f7bf61e50e18252f00522 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 13:09:42 +0000
Subject: [PATCH 0576/4650] [2021-04-29T13:09:42+0000] e2e test


From 6705fd913dd254eb84dd8e7c181f76cb74a09543 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 14:02:35 +0000
Subject: [PATCH 0577/4650] [2021-04-29T14:02:35+0000] e2e test


From 4d638c4a4f3f1334ee5de74c707a7013e045dd97 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 15:02:37 +0000
Subject: [PATCH 0578/4650] [2021-04-29T15:02:37+0000] e2e test


From 54c29c0ddae5628fab611832cb54e1437ed56f65 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 16:03:35 +0000
Subject: [PATCH 0579/4650] [2021-04-29T16:03:35+0000] e2e test


From e10aa3f5877b1901af3ca70d1d258846b038503d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 17:18:01 +0000
Subject: [PATCH 0580/4650] [2021-04-29T17:18:01+0000] e2e test


From acb67d2c4aa8085bf796b56e6ed0a146b5ee2e75 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 18:10:34 +0000
Subject: [PATCH 0581/4650] [2021-04-29T18:10:34+0000] e2e test


From bc46dbbff6d14fa8e218eac35318e3ec767e66c1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 19:06:18 +0000
Subject: [PATCH 0582/4650] [2021-04-29T19:06:18+0000] e2e test


From bddf3927b1b16fc63cbfaffe258a3b707fc31c0e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 20:02:37 +0000
Subject: [PATCH 0583/4650] [2021-04-29T20:02:37+0000] e2e test


From 913824e346e5c02444d1c06ba1ee4260d8a2c9a6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 21:02:43 +0000
Subject: [PATCH 0584/4650] [2021-04-29T21:02:43+0000] e2e test


From 3fc9ef73167e4679baf24e4110399985e1755615 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 22:02:51 +0000
Subject: [PATCH 0585/4650] [2021-04-29T22:02:51+0000] e2e test


From f05e74903f8943ff56d126082bb390733ec792a8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Apr 2021 23:02:33 +0000
Subject: [PATCH 0586/4650] [2021-04-29T23:02:33+0000] e2e test


From c5b76b80f421cd1ba24c2a3a83d8098326579fa3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 00:04:38 +0000
Subject: [PATCH 0587/4650] [2021-04-30T00:04:38+0000] e2e test


From e7d4aaa70c0fcf158aed19dbc5943fae2a8094a1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 01:26:12 +0000
Subject: [PATCH 0588/4650] [2021-04-30T01:26:12+0000] e2e test


From afdee1fdcfebd4296534f9a2eafd1e5c07cc5014 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 02:21:59 +0000
Subject: [PATCH 0589/4650] [2021-04-30T02:21:58+0000] e2e test


From ba8083e6a5df2607a1d2f65401ed64d1f8001ced Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 03:06:22 +0000
Subject: [PATCH 0590/4650] [2021-04-30T03:06:22+0000] e2e test


From 49cf43738505b3e8852d3a2f1f67050a16798f3c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 04:02:42 +0000
Subject: [PATCH 0591/4650] [2021-04-30T04:02:42+0000] e2e test


From 108d210977d6abb933ee974dd3604bf0269dff1f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 05:05:31 +0000
Subject: [PATCH 0592/4650] [2021-04-30T05:05:31+0000] e2e test


From baceb63b6482f1397256784bb975f9198c707eaa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 06:02:37 +0000
Subject: [PATCH 0593/4650] [2021-04-30T06:02:37+0000] e2e test


From d9a6ad17987391d6c43f947c76c95227b39455f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 07:05:07 +0000
Subject: [PATCH 0594/4650] [2021-04-30T07:05:06+0000] e2e test


From fa253dc853bb8e47f2edc8bb4abaad3ef0436c04 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 08:02:51 +0000
Subject: [PATCH 0595/4650] [2021-04-30T08:02:50+0000] e2e test


From c783f4263c242a3b16d216d032502bd6cca5f4ef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 09:02:35 +0000
Subject: [PATCH 0596/4650] [2021-04-30T09:02:35+0000] e2e test


From 2550fd7134deb37579015fda3e91cb20f0f01d22 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 10:02:37 +0000
Subject: [PATCH 0597/4650] [2021-04-30T10:02:37+0000] e2e test


From dd2c90c003c791230ebda05b6968771c867bb648 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 11:02:43 +0000
Subject: [PATCH 0598/4650] [2021-04-30T11:02:43+0000] e2e test


From b7891a012364e838521f908b5f4e6ac38bb0e39e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 12:02:59 +0000
Subject: [PATCH 0599/4650] [2021-04-30T12:02:59+0000] e2e test


From c4f7f36676f3f63404ab05820a1d57194ad9f3dc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 13:09:13 +0000
Subject: [PATCH 0600/4650] [2021-04-30T13:09:13+0000] e2e test


From 4afe2ae7930925284782ba5fd8156edd7508683d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 14:02:38 +0000
Subject: [PATCH 0601/4650] [2021-04-30T14:02:38+0000] e2e test


From f312caf3665b3302101ec1c80620f18d27f754b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 15:02:39 +0000
Subject: [PATCH 0602/4650] [2021-04-30T15:02:39+0000] e2e test


From d13928eaa8ff394bb6e8e7ab39137741f1aa1d53 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 16:03:29 +0000
Subject: [PATCH 0603/4650] [2021-04-30T16:03:29+0000] e2e test


From fd7377d62a9841d4e414ab7f74cefc4b1e3e4b49 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 17:17:27 +0000
Subject: [PATCH 0604/4650] [2021-04-30T17:17:27+0000] e2e test


From b28fadb03073fb3438e77b6c2563f4c698eebd68 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 18:09:23 +0000
Subject: [PATCH 0605/4650] [2021-04-30T18:09:23+0000] e2e test


From a0ef25c74ec64924f550d47fd6aa4ec62d8cb784 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 19:06:05 +0000
Subject: [PATCH 0606/4650] [2021-04-30T19:06:05+0000] e2e test


From fcab4137cae1e6687e350884f16da1929f7e2adc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 20:02:38 +0000
Subject: [PATCH 0607/4650] [2021-04-30T20:02:38+0000] e2e test


From b3e6aa92d368f138e028a6aebb423f2a5760fb26 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 21:02:42 +0000
Subject: [PATCH 0608/4650] [2021-04-30T21:02:41+0000] e2e test


From ab81b7fe21bd5347cdb968f6b7bfe514e2a2f262 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 22:02:35 +0000
Subject: [PATCH 0609/4650] [2021-04-30T22:02:35+0000] e2e test


From f7df1e303206b6ee4e8430dd26e31778f2dfc4c2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Apr 2021 23:02:39 +0000
Subject: [PATCH 0610/4650] [2021-04-30T23:02:38+0000] e2e test


From e3498d0f29056df02e7001d7c349674bb5aaeeea Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 00:05:16 +0000
Subject: [PATCH 0611/4650] [2021-05-01T00:05:16+0000] e2e test


From 36d1a897d336212a5e59bf2312d8788c96b7d2e6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 01:27:00 +0000
Subject: [PATCH 0612/4650] [2021-05-01T01:26:59+0000] e2e test


From 19fe400976d4d1485c34839fc34df1bae95dfcd3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 02:24:04 +0000
Subject: [PATCH 0613/4650] [2021-05-01T02:24:04+0000] e2e test


From 18213fa91ec5f83635504f559718e3048c4801e8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 03:07:07 +0000
Subject: [PATCH 0614/4650] [2021-05-01T03:07:07+0000] e2e test


From 1f5456abef9d8979b371300e5150042d69ea23f6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 04:02:42 +0000
Subject: [PATCH 0615/4650] [2021-05-01T04:02:42+0000] e2e test


From bf4d7c2bdf8ed8d48d72289c086df1e6429bf4b7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 05:05:43 +0000
Subject: [PATCH 0616/4650] [2021-05-01T05:05:43+0000] e2e test


From 0fef7246a9d61fe6e771384cdd55b8ddb9264014 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 06:02:41 +0000
Subject: [PATCH 0617/4650] [2021-05-01T06:02:41+0000] e2e test


From 525fe32c725d49378855286ef4ae686512b3061a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 07:04:46 +0000
Subject: [PATCH 0618/4650] [2021-05-01T07:04:46+0000] e2e test


From ec46bc912e6b64e72895e7fa8a4583c85c36c909 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 08:02:53 +0000
Subject: [PATCH 0619/4650] [2021-05-01T08:02:53+0000] e2e test


From 49d51243fb5d894c71f78854adef3a5acf06404d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 09:02:47 +0000
Subject: [PATCH 0620/4650] [2021-05-01T09:02:47+0000] e2e test


From e024fccab76d81e159c91c433f2900ec32bfb58e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 10:02:37 +0000
Subject: [PATCH 0621/4650] [2021-05-01T10:02:37+0000] e2e test


From c100811dda4829f993b9025c1041de724524081f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 11:02:41 +0000
Subject: [PATCH 0622/4650] [2021-05-01T11:02:41+0000] e2e test


From 1ef7ef6dac8f414b57f85ee5435700a8afc1eec5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 12:02:47 +0000
Subject: [PATCH 0623/4650] [2021-05-01T12:02:47+0000] e2e test


From c91cd1563b9c7e55e156c84d07ae2344137c39f2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 13:09:37 +0000
Subject: [PATCH 0624/4650] [2021-05-01T13:09:37+0000] e2e test


From 7c27db5a9624408e3b56e5449cef0c3c0bd88b05 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 14:02:36 +0000
Subject: [PATCH 0625/4650] [2021-05-01T14:02:36+0000] e2e test


From 23bb95dd03ae01b3a6676dd80f4323432c61b674 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 15:02:42 +0000
Subject: [PATCH 0626/4650] [2021-05-01T15:02:42+0000] e2e test


From 32f010ece8e408f5257505a9fd980e95314ee268 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 16:03:16 +0000
Subject: [PATCH 0627/4650] [2021-05-01T16:03:16+0000] e2e test


From 5090c1b623ee14b81f961729155e914db22179cc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 17:17:33 +0000
Subject: [PATCH 0628/4650] [2021-05-01T17:17:33+0000] e2e test


From adca689a6a46025f137b973c119ad9302afc4b66 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 18:09:39 +0000
Subject: [PATCH 0629/4650] [2021-05-01T18:09:39+0000] e2e test


From a81631cbc844ad5f18d09136e0c016b1512e32a3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 19:05:45 +0000
Subject: [PATCH 0630/4650] [2021-05-01T19:05:45+0000] e2e test


From 3888353b6983a00067a2cf4d4890f4198e9f21e9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 20:02:52 +0000
Subject: [PATCH 0631/4650] [2021-05-01T20:02:52+0000] e2e test


From 1619295523c3a9c6a0fd66dfdb855b47810b9709 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 21:02:35 +0000
Subject: [PATCH 0632/4650] [2021-05-01T21:02:35+0000] e2e test


From dc14dbae3698b4dcc522cd9dd896143739768f84 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 22:02:48 +0000
Subject: [PATCH 0633/4650] [2021-05-01T22:02:47+0000] e2e test


From 6ec6d23c72ec1e06fbaaaaaeed9de00960fdbae4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 1 May 2021 23:03:03 +0000
Subject: [PATCH 0634/4650] [2021-05-01T23:03:03+0000] e2e test


From b6dfc7ff84ef23382fe9e32b34f0eb957d006030 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 00:06:36 +0000
Subject: [PATCH 0635/4650] [2021-05-02T00:06:36+0000] e2e test


From 42bf4312c744025e0056c23084261d8f5a4e33e2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 01:28:46 +0000
Subject: [PATCH 0636/4650] [2021-05-02T01:28:46+0000] e2e test


From e37147f357d9e3c6a6ec8aacbd0080c58ca5ae6b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 02:26:10 +0000
Subject: [PATCH 0637/4650] [2021-05-02T02:26:10+0000] e2e test


From 77f3d41d9343fac2bc3284dd045f68704286d2f9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 03:09:36 +0000
Subject: [PATCH 0638/4650] [2021-05-02T03:09:36+0000] e2e test


From 4c523867a6590dba1227108c3a48b17fe7a05904 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 04:04:45 +0000
Subject: [PATCH 0639/4650] [2021-05-02T04:04:45+0000] e2e test


From 5d02f25995f243bcbf947b6312b4d63ca2156203 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 05:06:52 +0000
Subject: [PATCH 0640/4650] [2021-05-02T05:06:52+0000] e2e test


From d774c284a21ad57c64b75702ea1e1d5908fddefb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 06:02:55 +0000
Subject: [PATCH 0641/4650] [2021-05-02T06:02:55+0000] e2e test


From 4a6399c94ec8bb4f9cdd30c5e9e0a96b643525c8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 07:05:11 +0000
Subject: [PATCH 0642/4650] [2021-05-02T07:05:11+0000] e2e test


From cb34c38ab8629400679c3bbb224b942bcc9c49ad Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 08:02:57 +0000
Subject: [PATCH 0643/4650] [2021-05-02T08:02:56+0000] e2e test


From 5f1360aadca3288afdf1230b3c04f11c1300d7bc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 09:02:43 +0000
Subject: [PATCH 0644/4650] [2021-05-02T09:02:43+0000] e2e test


From a04c9995a840b524da056f582456139c2267b3aa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 10:02:42 +0000
Subject: [PATCH 0645/4650] [2021-05-02T10:02:42+0000] e2e test


From 89f9654d141c0be79b0f7cdf2a740d94e8781f52 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 11:02:34 +0000
Subject: [PATCH 0646/4650] [2021-05-02T11:02:34+0000] e2e test


From 615a8a399d4442c43fb92a5305d6e72543b4caa7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 12:02:41 +0000
Subject: [PATCH 0647/4650] [2021-05-02T12:02:41+0000] e2e test


From 22ad29781a332c16dec2543fdacd226aff308a81 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 13:08:47 +0000
Subject: [PATCH 0648/4650] [2021-05-02T13:08:47+0000] e2e test


From 5e64c2e6667c8228ae753fc97222e42793aaa69f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 14:02:35 +0000
Subject: [PATCH 0649/4650] [2021-05-02T14:02:35+0000] e2e test


From 585e80c5db85a28eb9b68fb1d4c63676c5fdcd36 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 15:02:51 +0000
Subject: [PATCH 0650/4650] [2021-05-02T15:02:51+0000] e2e test


From 7db966280fff01c1ea68cd447ddd343e972047d9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 16:03:39 +0000
Subject: [PATCH 0651/4650] [2021-05-02T16:03:39+0000] e2e test


From 544e0c40006b13b2b9f434076e520150e678eb21 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 17:17:33 +0000
Subject: [PATCH 0652/4650] [2021-05-02T17:17:33+0000] e2e test


From 989af8f2fe3378f3c1ba39802ea386ae664c2175 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 18:07:56 +0000
Subject: [PATCH 0653/4650] [2021-05-02T18:07:56+0000] e2e test


From ec1b7f6e5e78fa57dc8becf61cc7a7a7124a1c1b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 19:05:26 +0000
Subject: [PATCH 0654/4650] [2021-05-02T19:05:26+0000] e2e test


From 656d3c9d869dee37a961298d460038bc33229f43 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 20:02:52 +0000
Subject: [PATCH 0655/4650] [2021-05-02T20:02:52+0000] e2e test


From 8a8cd337ef7c38939ae37b90c06fc9a16bfb4fe5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 21:02:33 +0000
Subject: [PATCH 0656/4650] [2021-05-02T21:02:33+0000] e2e test


From ab4616e61537b60bc29bb1b5b39bba90f08d6efb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 22:02:40 +0000
Subject: [PATCH 0657/4650] [2021-05-02T22:02:40+0000] e2e test


From 07761e78b8557fd5c474d68a004873fa63e86c95 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 2 May 2021 23:02:39 +0000
Subject: [PATCH 0658/4650] [2021-05-02T23:02:39+0000] e2e test


From 4fe96af5c04cfe0154450da85e7de7ae4baa66c8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 00:06:18 +0000
Subject: [PATCH 0659/4650] [2021-05-03T00:06:18+0000] e2e test


From dd84abbd0246a16147afb9feae827aa1fcb5ef1f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 01:27:03 +0000
Subject: [PATCH 0660/4650] [2021-05-03T01:27:03+0000] e2e test


From 3fd39bca4680022941696d641fb93ee4226df571 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 02:24:34 +0000
Subject: [PATCH 0661/4650] [2021-05-03T02:24:34+0000] e2e test


From 17badc62fd12dadb334d21d97a510844aa49143a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 03:23:31 +0000
Subject: [PATCH 0662/4650] [2021-05-03T03:23:31+0000] e2e test


From 96caf73b0843b8d7c4f08b7672cf29536348d826 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 04:03:39 +0000
Subject: [PATCH 0663/4650] [2021-05-03T04:03:38+0000] e2e test


From a28a0b47f13c083c6e5985fff3b3610135a10b34 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 05:06:01 +0000
Subject: [PATCH 0664/4650] [2021-05-03T05:06:01+0000] e2e test


From 52fd89f59c38133c19e809a745ea29ab1ed4b416 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 06:02:56 +0000
Subject: [PATCH 0665/4650] [2021-05-03T06:02:55+0000] e2e test


From d82c31cd85aa973c60e5a0a42875b17626e028b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 07:05:45 +0000
Subject: [PATCH 0666/4650] [2021-05-03T07:05:45+0000] e2e test


From 239488b24b89da7c79048f3a992df874319da75d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 08:02:52 +0000
Subject: [PATCH 0667/4650] [2021-05-03T08:02:52+0000] e2e test


From 48dfff6db0d1ca9d92e4782a8500bb5fdf1633e1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 09:02:35 +0000
Subject: [PATCH 0668/4650] [2021-05-03T09:02:35+0000] e2e test


From 3bd8ff2fd2e0cb491b5b5a35573a59c27d69e044 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 10:02:39 +0000
Subject: [PATCH 0669/4650] [2021-05-03T10:02:39+0000] e2e test


From 08216892907dc0856ebfdb0a0b40d5985ca9f696 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 11:02:32 +0000
Subject: [PATCH 0670/4650] [2021-05-03T11:02:32+0000] e2e test


From 53b2c34dad407bddc2f88b7a3b7a71a5ffefb3da Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 12:02:56 +0000
Subject: [PATCH 0671/4650] [2021-05-03T12:02:55+0000] e2e test


From 72ca1e7915097385e2f02398f76aa1d8b4f8ca0d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 13:10:01 +0000
Subject: [PATCH 0672/4650] [2021-05-03T13:10:01+0000] e2e test


From 5c82170838c2be4a531198b50faf9a65c950d837 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 14:02:34 +0000
Subject: [PATCH 0673/4650] [2021-05-03T14:02:34+0000] e2e test


From 3aa52aaaa4ffe942270218af70a7980bfc2f835b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 15:02:58 +0000
Subject: [PATCH 0674/4650] [2021-05-03T15:02:58+0000] e2e test


From 98bc3393f7fcbc5559dbd592e624637adf26e02c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 16:04:04 +0000
Subject: [PATCH 0675/4650] [2021-05-03T16:04:04+0000] e2e test


From 7b649c862f9f716e4f6da9e4ba4ed4d88d355e3f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 17:18:37 +0000
Subject: [PATCH 0676/4650] [2021-05-03T17:18:37+0000] e2e test


From c26b528c771369e0ab53fa40babf89f346cbf2c2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 18:08:34 +0000
Subject: [PATCH 0677/4650] [2021-05-03T18:08:34+0000] e2e test


From 7ad435c7a293af6108b3d2853905da8851dbc13c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 19:05:50 +0000
Subject: [PATCH 0678/4650] [2021-05-03T19:05:49+0000] e2e test


From 6a42c767458db64f8372d8d9c1add7c82522c78d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 20:02:55 +0000
Subject: [PATCH 0679/4650] [2021-05-03T20:02:55+0000] e2e test


From c95e0d94c049a414c85c0064985dfe61f3ea3146 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 21:02:29 +0000
Subject: [PATCH 0680/4650] [2021-05-03T21:02:29+0000] e2e test


From 0c2df01c1fe3007394f33547927619d4c2169a8f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 22:12:30 +0000
Subject: [PATCH 0681/4650] [2021-05-03T22:12:30+0000] e2e test


From e0445f43ce367d82f601b6021227130a7ab714ee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 3 May 2021 23:09:48 +0000
Subject: [PATCH 0682/4650] [2021-05-03T23:09:48+0000] e2e test


From a4068a29ce2f00013054a4c6a6d5b1f066d3af3f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 00:31:18 +0000
Subject: [PATCH 0683/4650] [2021-05-04T00:31:18+0000] e2e test


From ea0a7c227c1cb79fa3bdb0d158adbb6db6f6a51c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 02:01:26 +0000
Subject: [PATCH 0684/4650] [2021-05-04T02:01:26+0000] e2e test


From 26de536dc7083eccfda9df68b8c7ae6e38f1b431 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 03:15:43 +0000
Subject: [PATCH 0685/4650] [2021-05-04T03:15:43+0000] e2e test


From 83bb743f316d9d0466b443b388569afe067647da Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 04:11:53 +0000
Subject: [PATCH 0686/4650] [2021-05-04T04:11:53+0000] e2e test


From 3670fe2c5a90f3ff30661532890947dc7442f32c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 05:13:09 +0000
Subject: [PATCH 0687/4650] [2021-05-04T05:13:09+0000] e2e test


From 712e13fa34d986e0603a7af6125cf7095224789d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 06:11:39 +0000
Subject: [PATCH 0688/4650] [2021-05-04T06:11:39+0000] e2e test


From f5335a811021b12656fc06061af01978fbea8d6f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 07:12:07 +0000
Subject: [PATCH 0689/4650] [2021-05-04T07:12:07+0000] e2e test


From b4d1e9b2018168c43730475b6bc404e484ca81a1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 08:11:23 +0000
Subject: [PATCH 0690/4650] [2021-05-04T08:11:23+0000] e2e test


From f419c14d0277c698aadcacebeca5300275791890 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 09:09:56 +0000
Subject: [PATCH 0691/4650] [2021-05-04T09:09:56+0000] e2e test


From 6eaa0abf9061b17c148a2d4bf5e329449631ef3b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 10:10:15 +0000
Subject: [PATCH 0692/4650] [2021-05-04T10:10:14+0000] e2e test


From 82bc503ca1b29065f5480545369b38fee5cf2c85 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 11:08:03 +0000
Subject: [PATCH 0693/4650] [2021-05-04T11:08:03+0000] e2e test


From f5758cc2ca6f272595d8ffb925f1067c85b25a0b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 12:13:21 +0000
Subject: [PATCH 0694/4650] [2021-05-04T12:13:21+0000] e2e test


From d870d6e01130a86f0adc6547446a8ffb8b93c75a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 13:18:19 +0000
Subject: [PATCH 0695/4650] [2021-05-04T13:18:19+0000] e2e test


From fa0b97f7a00d2e2b753b5b7eddbae2e3d3813223 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 14:09:38 +0000
Subject: [PATCH 0696/4650] [2021-05-04T14:09:38+0000] e2e test


From e5ced5807418e1844e9a6ad26d79aa154c792f57 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 15:10:47 +0000
Subject: [PATCH 0697/4650] [2021-05-04T15:10:47+0000] e2e test


From b38c8cc32af579fe29c4bd4556ba1b1e5e8aca80 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 16:14:49 +0000
Subject: [PATCH 0698/4650] [2021-05-04T16:14:49+0000] e2e test


From 671d75c08a713d7805727946f9fb6a060c95064a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 17:29:57 +0000
Subject: [PATCH 0699/4650] [2021-05-04T17:29:57+0000] e2e test


From 8cfdd15558565b8711bfce384160d896729bcf30 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 18:13:40 +0000
Subject: [PATCH 0700/4650] [2021-05-04T18:13:40+0000] e2e test


From c2b03338107bc74346241933554533a3ab6d68ba Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 19:10:11 +0000
Subject: [PATCH 0701/4650] [2021-05-04T19:10:11+0000] e2e test


From c7ffede087eb021fb1d16821a3ba760ec2a18aed Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 20:10:01 +0000
Subject: [PATCH 0702/4650] [2021-05-04T20:10:01+0000] e2e test


From 0aa5d963507cab7dd1bd15c36dda4c1ba5178b27 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 21:08:28 +0000
Subject: [PATCH 0703/4650] [2021-05-04T21:08:28+0000] e2e test


From fc2c524a1872a03805072bcc21b7d140dcd9af35 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 22:11:41 +0000
Subject: [PATCH 0704/4650] [2021-05-04T22:11:41+0000] e2e test


From c569f76804e99b8bd8474813d15519eb386b6fdf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 4 May 2021 23:09:38 +0000
Subject: [PATCH 0705/4650] [2021-05-04T23:09:37+0000] e2e test


From 429ef426a4bc05bfb4305bee33db3a46c63b758c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 00:26:18 +0000
Subject: [PATCH 0706/4650] [2021-05-05T00:26:18+0000] e2e test


From 37af72a4acb0e47553148b219dbf97734eb3de02 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 01:56:46 +0000
Subject: [PATCH 0707/4650] [2021-05-05T01:56:46+0000] e2e test


From dbf82ab067facf225f12f4b10943d428e184a924 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 02:38:40 +0000
Subject: [PATCH 0708/4650] [2021-05-05T02:38:40+0000] e2e test


From 3ab17f7cbd611e9e887b9d680701c58c701b324d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 03:14:21 +0000
Subject: [PATCH 0709/4650] [2021-05-05T03:14:21+0000] e2e test


From 6b62f553c2fa0174c18fab4d0c6b20a0e8dc2164 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 04:11:22 +0000
Subject: [PATCH 0710/4650] [2021-05-05T04:11:21+0000] e2e test


From 9e8b16da6b73b5ea05f28ea5e5c6f87c6a29112a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 05:12:17 +0000
Subject: [PATCH 0711/4650] [2021-05-05T05:12:16+0000] e2e test


From f999058cb5f2e8988183585319f3eeaad7f4b8ea Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 06:11:46 +0000
Subject: [PATCH 0712/4650] [2021-05-05T06:11:46+0000] e2e test


From 4a9f51e3ffaa2a43224ed299c9d7df1f810fdbaf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 07:13:14 +0000
Subject: [PATCH 0713/4650] [2021-05-05T07:13:14+0000] e2e test


From 89cf98828ce12194b695d4da7c012ca4916bb69e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 08:10:46 +0000
Subject: [PATCH 0714/4650] [2021-05-05T08:10:46+0000] e2e test


From 85792a03a6d6e79b1d5dc36ce521e9bc2c3b5f34 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 09:09:34 +0000
Subject: [PATCH 0715/4650] [2021-05-05T09:09:34+0000] e2e test


From 432bfea0323b20aa9f1115166654cd03013e9159 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 10:09:41 +0000
Subject: [PATCH 0716/4650] [2021-05-05T10:09:41+0000] e2e test


From 1b1887b82cb48f2703cb364d30d6465d907e2f4e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 11:08:09 +0000
Subject: [PATCH 0717/4650] [2021-05-05T11:08:09+0000] e2e test


From 3b469c31188daa0ccabf2facd16e90e1d360fd4b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 12:13:08 +0000
Subject: [PATCH 0718/4650] [2021-05-05T12:13:08+0000] e2e test


From 6eaeaac290d307342c779115fe06aa95c826eed0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 13:20:51 +0000
Subject: [PATCH 0719/4650] [2021-05-05T13:20:51+0000] e2e test


From 86491705cd537f819c9e3020a6dfd77e633da6f3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 14:09:48 +0000
Subject: [PATCH 0720/4650] [2021-05-05T14:09:48+0000] e2e test


From 02e72f3d101414afa84cb8fcd6bb020e3cd8cfd1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 15:10:10 +0000
Subject: [PATCH 0721/4650] [2021-05-05T15:10:10+0000] e2e test


From 2ea0907540e26f2867cb77b3442eebe02cac6d49 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 16:15:56 +0000
Subject: [PATCH 0722/4650] [2021-05-05T16:15:56+0000] e2e test


From 000dca7aede9159f9fe4585ce40c6966f0191cf1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 17:33:40 +0000
Subject: [PATCH 0723/4650] [2021-05-05T17:33:40+0000] e2e test


From 5a0c98150f65c23acdc1f43233ede11c4e0a7eb9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 18:17:05 +0000
Subject: [PATCH 0724/4650] [2021-05-05T18:17:05+0000] e2e test


From 4c75b1a3f8fef47b8c03516e62259f178478430e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 19:12:25 +0000
Subject: [PATCH 0725/4650] [2021-05-05T19:12:25+0000] e2e test


From d07b1aa09e727f318d7acd859805668b0fcac4ce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 20:09:44 +0000
Subject: [PATCH 0726/4650] [2021-05-05T20:09:44+0000] e2e test


From 54b775a99f1913fc95ff9ce76d5f31b287ffd99f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 21:08:32 +0000
Subject: [PATCH 0727/4650] [2021-05-05T21:08:32+0000] e2e test


From 51ba1edf6a924322327e509990d06bd44d7ee7f1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 22:11:41 +0000
Subject: [PATCH 0728/4650] [2021-05-05T22:11:41+0000] e2e test


From db9f793a64746e42ee60235343f34d351d2d4377 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 5 May 2021 23:09:37 +0000
Subject: [PATCH 0729/4650] [2021-05-05T23:09:37+0000] e2e test


From 746169ce902d26e8b8efb21e27a0f1dea84ec6f1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 00:25:35 +0000
Subject: [PATCH 0730/4650] [2021-05-06T00:25:35+0000] e2e test


From 590c248906afa3c11b0c806c94d1a21b4def7a06 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 01:56:34 +0000
Subject: [PATCH 0731/4650] [2021-05-06T01:56:34+0000] e2e test


From 6bce5bc57d16378db9efbfb82c419b513b3f702b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 02:38:51 +0000
Subject: [PATCH 0732/4650] [2021-05-06T02:38:51+0000] e2e test


From a6062414f905e784cabd55362f33429fbedeab11 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 03:14:20 +0000
Subject: [PATCH 0733/4650] [2021-05-06T03:14:20+0000] e2e test


From 76b47f1b7c585a5b2b1946c3f191940fffa0bdba Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 04:11:35 +0000
Subject: [PATCH 0734/4650] [2021-05-06T04:11:35+0000] e2e test


From 48db7547e9076aff2d811eaa969035662504868b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 05:12:31 +0000
Subject: [PATCH 0735/4650] [2021-05-06T05:12:31+0000] e2e test


From 9339d5e736a4c1c4df82d90e17469831492a644e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 06:11:22 +0000
Subject: [PATCH 0736/4650] [2021-05-06T06:11:22+0000] e2e test


From a0a9ff37c1a93b75c568b9904f63e1d0a451e876 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 07:12:08 +0000
Subject: [PATCH 0737/4650] [2021-05-06T07:12:07+0000] e2e test


From 74ccba2a28753574685c6eb0e671c0fef9ecca09 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 08:10:38 +0000
Subject: [PATCH 0738/4650] [2021-05-06T08:10:38+0000] e2e test


From f0c44911bf7741aad90f024bc112cbdfaffe18c1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 09:09:36 +0000
Subject: [PATCH 0739/4650] [2021-05-06T09:09:35+0000] e2e test


From a6649e7d050853eb2ca9b90f21f5c3854ad766ec Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 10:10:06 +0000
Subject: [PATCH 0740/4650] [2021-05-06T10:10:06+0000] e2e test


From fb9ddd55e5a3a11a8803bde0ad5595f5af6b8a29 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 11:08:31 +0000
Subject: [PATCH 0741/4650] [2021-05-06T11:08:31+0000] e2e test


From e045b4129c7761863606c6adc405c6f0de8a8c19 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 12:13:17 +0000
Subject: [PATCH 0742/4650] [2021-05-06T12:13:16+0000] e2e test


From 70b15343b431f91ee63d08fe63ebf09b15dd01c6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 13:19:47 +0000
Subject: [PATCH 0743/4650] [2021-05-06T13:19:47+0000] e2e test


From f9dad4eddb88d905f81034c3355a927b4f0e51a3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 14:09:30 +0000
Subject: [PATCH 0744/4650] [2021-05-06T14:09:30+0000] e2e test


From 6a64fe8dde1dd04c25ffa4a8aaca961cb57bbb06 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 15:09:53 +0000
Subject: [PATCH 0745/4650] [2021-05-06T15:09:53+0000] e2e test


From c2d926994848a617f7a8f21f77488c94869e7ae5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 16:18:16 +0000
Subject: [PATCH 0746/4650] [2021-05-06T16:18:16+0000] e2e test


From 9d7224ba11e62df472c40ea94d059f72dbe3fe1b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 17:35:12 +0000
Subject: [PATCH 0747/4650] [2021-05-06T17:35:12+0000] e2e test


From 83194a3d444dd177f3ed1481cc93d844ebd1f029 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 18:17:29 +0000
Subject: [PATCH 0748/4650] [2021-05-06T18:17:29+0000] e2e test


From 9d08f63188c8781186a3a418e8a9c2d174528fc6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 19:12:38 +0000
Subject: [PATCH 0749/4650] [2021-05-06T19:12:38+0000] e2e test


From 78cff032130f64cb4d5be16952eff01815c60f79 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 20:10:25 +0000
Subject: [PATCH 0750/4650] [2021-05-06T20:10:25+0000] e2e test


From 521d9519a57570e1905f312a4c8b2f46349bc9ea Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 21:07:26 +0000
Subject: [PATCH 0751/4650] [2021-05-06T21:07:25+0000] e2e test


From d4ac4e2c53479aabc5b791f64ae56cbc0a3950f4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 22:12:05 +0000
Subject: [PATCH 0752/4650] [2021-05-06T22:12:05+0000] e2e test


From 4d7c161ca88720a61cfdeb6047599e96057fca6d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 6 May 2021 23:09:30 +0000
Subject: [PATCH 0753/4650] [2021-05-06T23:09:30+0000] e2e test


From 14a34d804d37f77cd3860213f961e73c31ae32d6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 00:27:06 +0000
Subject: [PATCH 0754/4650] [2021-05-07T00:27:06+0000] e2e test


From c19384d07fde4e25887200f106a9875a3d4b84b4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 02:00:43 +0000
Subject: [PATCH 0755/4650] [2021-05-07T02:00:43+0000] e2e test


From fa29feee6099f4354f5926f9f386a15b98c27a47 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 03:16:57 +0000
Subject: [PATCH 0756/4650] [2021-05-07T03:16:57+0000] e2e test


From 92c455d7aa9626a766f9c260c2a4c6a2ad13372f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 04:15:36 +0000
Subject: [PATCH 0757/4650] [2021-05-07T04:15:36+0000] e2e test


From f005d51eea2d127eb8a7f01fa8d15e45441f7dfb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 05:14:33 +0000
Subject: [PATCH 0758/4650] [2021-05-07T05:14:33+0000] e2e test


From 4abe05643babfcb611e19d2c3ea37044e2bbbd2c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 06:11:19 +0000
Subject: [PATCH 0759/4650] [2021-05-07T06:11:19+0000] e2e test


From 5697dbeb48e6c662319d5afd45b1e89a67c35549 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 07:13:20 +0000
Subject: [PATCH 0760/4650] [2021-05-07T07:13:19+0000] e2e test


From fe8e5270103ac17ed1fe826c57751c7269181753 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 08:11:50 +0000
Subject: [PATCH 0761/4650] [2021-05-07T08:11:50+0000] e2e test


From dd617f25bb646bea592c42deb1d93ff1dd899434 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 09:09:28 +0000
Subject: [PATCH 0762/4650] [2021-05-07T09:09:28+0000] e2e test


From f0dcd1e4158dfd15a41c8a067cdc99b2ce72cf7a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 10:10:12 +0000
Subject: [PATCH 0763/4650] [2021-05-07T10:10:12+0000] e2e test


From 4e7eff8de218223c3310380d367322e7c1f20711 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 11:08:14 +0000
Subject: [PATCH 0764/4650] [2021-05-07T11:08:14+0000] e2e test


From 47a64f0b2fff12788389a84d0ee4dc53f0f970eb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 12:13:04 +0000
Subject: [PATCH 0765/4650] [2021-05-07T12:13:04+0000] e2e test


From 336c6e84b69b3ffd14534cc31aeb70ccd8d880f1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 13:19:37 +0000
Subject: [PATCH 0766/4650] [2021-05-07T13:19:37+0000] e2e test


From cb3db701eb1d37f7451e974eeddfcef0b4e7b8d8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 14:09:38 +0000
Subject: [PATCH 0767/4650] [2021-05-07T14:09:38+0000] e2e test


From a5868d5485b5fcfeff33580ad76c1878e660eeab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 15:09:58 +0000
Subject: [PATCH 0768/4650] [2021-05-07T15:09:58+0000] e2e test


From 4d023f515202bfa7bb25755484730a03c77ff3bf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 16:18:30 +0000
Subject: [PATCH 0769/4650] [2021-05-07T16:18:30+0000] e2e test


From 668ca8cb9cd60d71fb36f46cd4dbd219f9e8fb42 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 17:34:59 +0000
Subject: [PATCH 0770/4650] [2021-05-07T17:34:59+0000] e2e test


From 2dcb8ca0fe42b6eee9eb8a3769ef85421b9aad2f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 18:17:30 +0000
Subject: [PATCH 0771/4650] [2021-05-07T18:17:30+0000] e2e test


From 9f5382ca7e8c699e8d7ca296199fc5f42ea87005 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 19:11:56 +0000
Subject: [PATCH 0772/4650] [2021-05-07T19:11:56+0000] e2e test


From d5684223103bae61999950d7b485626d5eb3d59f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 20:10:08 +0000
Subject: [PATCH 0773/4650] [2021-05-07T20:10:08+0000] e2e test


From 3951fa9375a2cf44350abc092342a0174ed421e8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 21:08:56 +0000
Subject: [PATCH 0774/4650] [2021-05-07T21:08:56+0000] e2e test


From 8fc9e5d4ad2880cfa0cdda4382266320458e7eb4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 22:12:43 +0000
Subject: [PATCH 0775/4650] [2021-05-07T22:12:43+0000] e2e test


From dd147447c8cc669fdf1ef5ff4e47805ab96c935a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 7 May 2021 23:09:22 +0000
Subject: [PATCH 0776/4650] [2021-05-07T23:09:22+0000] e2e test


From d8734d3bcd03dba7285b419161a7221810aafefb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 00:27:05 +0000
Subject: [PATCH 0777/4650] [2021-05-08T00:27:05+0000] e2e test


From a71df3ec41d33707c90659b3be46cb3e2a25fe3c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 01:59:30 +0000
Subject: [PATCH 0778/4650] [2021-05-08T01:59:30+0000] e2e test


From f8fdcc1529b6339a73d40687e757a4a966765332 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 02:45:39 +0000
Subject: [PATCH 0779/4650] [2021-05-08T02:45:39+0000] e2e test


From 798303eed81fcb7100b9764688bd04c5ab8b51e2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 03:15:26 +0000
Subject: [PATCH 0780/4650] [2021-05-08T03:15:26+0000] e2e test


From ea6a04dd946a2da191dbbfe430ee91bfa0fc729b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 04:12:19 +0000
Subject: [PATCH 0781/4650] [2021-05-08T04:12:19+0000] e2e test


From 2c1acce9785cbf5f88351e93267fded20583d5bd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 05:12:47 +0000
Subject: [PATCH 0782/4650] [2021-05-08T05:12:46+0000] e2e test


From 7ef4f6dae48ae0ebcdf1b8092ec2fa3bd1a4a9e5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 08:10:50 +0000
Subject: [PATCH 0783/4650] [2021-05-08T08:10:50+0000] e2e test


From 9d8e8b29fe5e42b301b8ce5178044137f7d4bd3b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 09:09:30 +0000
Subject: [PATCH 0784/4650] [2021-05-08T09:09:30+0000] e2e test


From 361d371b04292ed1349bf3969249f7d1d118382f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 10:10:11 +0000
Subject: [PATCH 0785/4650] [2021-05-08T10:10:11+0000] e2e test


From 79e4a68d0a99587753ca737897cf89427dd34e80 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 11:08:16 +0000
Subject: [PATCH 0786/4650] [2021-05-08T11:08:16+0000] e2e test


From 17a2fe7184bf902ab3fe04167a3dce724147ea13 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 12:13:37 +0000
Subject: [PATCH 0787/4650] [2021-05-08T12:13:37+0000] e2e test


From 2c005ad5bdb39faf605239c195fa85ec7e8f2091 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 13:18:36 +0000
Subject: [PATCH 0788/4650] [2021-05-08T13:18:36+0000] e2e test


From 91880b75299ecda4fb0a1f3ffb5515d56231d357 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 14:09:05 +0000
Subject: [PATCH 0789/4650] [2021-05-08T14:09:05+0000] e2e test


From 31a77195acba58198c147f355a9709fcf47f9f61 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 15:09:47 +0000
Subject: [PATCH 0790/4650] [2021-05-08T15:09:46+0000] e2e test


From c92da6a6c3b5d1a279d225162cc68ae4522b9e80 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 16:17:21 +0000
Subject: [PATCH 0791/4650] [2021-05-08T16:17:21+0000] e2e test


From a95dc988d8df4bdf48472b2b386b63eff46200f8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 17:33:05 +0000
Subject: [PATCH 0792/4650] [2021-05-08T17:33:05+0000] e2e test


From 3fc43fdae85d373144a49903df01f5684e4aa431 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 18:15:32 +0000
Subject: [PATCH 0793/4650] [2021-05-08T18:15:32+0000] e2e test


From 7010742b642ea29070630bf1e3107a8187aabd5a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 19:09:55 +0000
Subject: [PATCH 0794/4650] [2021-05-08T19:09:54+0000] e2e test


From 425b712ada66a0afdcf7862ffbee7e64b8b30841 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 20:10:03 +0000
Subject: [PATCH 0795/4650] [2021-05-08T20:10:03+0000] e2e test


From 6f8279866de2648120c26cfb600b3d57d88e6776 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 21:08:41 +0000
Subject: [PATCH 0796/4650] [2021-05-08T21:08:40+0000] e2e test


From 3eb0cf0977ad960acacf4b80b440521b616f1ed4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 22:11:35 +0000
Subject: [PATCH 0797/4650] [2021-05-08T22:11:34+0000] e2e test


From f84d8ed212aec0bcd0ae82602341f288d1d2778b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 8 May 2021 23:09:46 +0000
Subject: [PATCH 0798/4650] [2021-05-08T23:09:46+0000] e2e test


From 3af9a94461238d643733153c7807cee45d28c3f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 00:29:40 +0000
Subject: [PATCH 0799/4650] [2021-05-09T00:29:40+0000] e2e test


From 860077db430a73bc7d9c16a97e658824ea16a395 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 02:01:40 +0000
Subject: [PATCH 0800/4650] [2021-05-09T02:01:40+0000] e2e test


From fadbee3590d89e00307d1cb540c5846c0bdf838e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 03:15:47 +0000
Subject: [PATCH 0801/4650] [2021-05-09T03:15:47+0000] e2e test


From 4cb04f73b1b1812333cce0596aee0bd066f0b213 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 04:11:57 +0000
Subject: [PATCH 0802/4650] [2021-05-09T04:11:57+0000] e2e test


From a0ef23abe3bb861abef4ee2650087854b2a117af Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 05:12:50 +0000
Subject: [PATCH 0803/4650] [2021-05-09T05:12:50+0000] e2e test


From 995f0b19089ddc6b8f5efaa084e66ff760a41ed5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 06:10:56 +0000
Subject: [PATCH 0804/4650] [2021-05-09T06:10:56+0000] e2e test


From 509084d461c5235a865990631952cd53fcdef39b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 07:11:58 +0000
Subject: [PATCH 0805/4650] [2021-05-09T07:11:58+0000] e2e test


From 3c5113aab8cb57e80941f073ae47a80414562dc4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 08:10:36 +0000
Subject: [PATCH 0806/4650] [2021-05-09T08:10:36+0000] e2e test


From ea4a116b8aa17034789a87146bb996f15b8ece88 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 09:09:44 +0000
Subject: [PATCH 0807/4650] [2021-05-09T09:09:44+0000] e2e test


From 802b6c6d1841c1f5a43060b4c4f0e055bc9e88be Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 10:09:52 +0000
Subject: [PATCH 0808/4650] [2021-05-09T10:09:52+0000] e2e test


From 67650c98e8a5f69ab6d7bfdf3472cc39a33cddb4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 11:07:53 +0000
Subject: [PATCH 0809/4650] [2021-05-09T11:07:53+0000] e2e test


From 8d0859a86851ee2178d3f5a26870307f60aaa128 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 12:13:05 +0000
Subject: [PATCH 0810/4650] [2021-05-09T12:13:05+0000] e2e test


From bb31c42966be1a2332e937e6c1896a4367b99e34 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 13:18:58 +0000
Subject: [PATCH 0811/4650] [2021-05-09T13:18:58+0000] e2e test


From 1aeae406037dce56800ed281ab07406f019f5706 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 14:09:12 +0000
Subject: [PATCH 0812/4650] [2021-05-09T14:09:12+0000] e2e test


From 900b2ee7e1ba9b9f23d36dbe34983e3df0cf9ae8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 15:09:34 +0000
Subject: [PATCH 0813/4650] [2021-05-09T15:09:34+0000] e2e test


From 64a9c155e8f06f07b015eb54db1af8884d8b3c61 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 16:18:12 +0000
Subject: [PATCH 0814/4650] [2021-05-09T16:18:12+0000] e2e test


From 74bf884c0130bb460ed19f45aecbbd5fbf9b978e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 17:34:08 +0000
Subject: [PATCH 0815/4650] [2021-05-09T17:34:08+0000] e2e test


From 43eec7007b042064d3839789c4866a4b4b19e6c5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 18:15:49 +0000
Subject: [PATCH 0816/4650] [2021-05-09T18:15:49+0000] e2e test


From 8686f010ec42c62933156469c2c7ee136f0c6d5e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 19:10:16 +0000
Subject: [PATCH 0817/4650] [2021-05-09T19:10:16+0000] e2e test


From 3da13b9112fea87e609be953848879ac831aef53 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 20:09:57 +0000
Subject: [PATCH 0818/4650] [2021-05-09T20:09:57+0000] e2e test


From 7106c3073fa269675176e239e779847cf47ac5e4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 21:08:48 +0000
Subject: [PATCH 0819/4650] [2021-05-09T21:08:48+0000] e2e test


From 7bb50dabe8bb0260d66b7e73c150875f1128994b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 22:11:49 +0000
Subject: [PATCH 0820/4650] [2021-05-09T22:11:48+0000] e2e test


From 17a09888381c53688e42b1da55f38cc4171dde8f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 9 May 2021 23:09:26 +0000
Subject: [PATCH 0821/4650] [2021-05-09T23:09:26+0000] e2e test


From c5fe57eac5168d6cbf825bd66eb9262c28f7220d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 00:28:44 +0000
Subject: [PATCH 0822/4650] [2021-05-10T00:28:44+0000] e2e test


From 9bfee78eee3f0dc1e266d349761c5d9562d7a566 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 02:04:19 +0000
Subject: [PATCH 0823/4650] [2021-05-10T02:04:19+0000] e2e test


From d3319f0a6f0fa5037c49b40d800e83bc4affc64e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 03:19:57 +0000
Subject: [PATCH 0824/4650] [2021-05-10T03:19:57+0000] e2e test


From 9ecb0c58f410141552be650c3b3d2e5e38f4370e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 04:14:38 +0000
Subject: [PATCH 0825/4650] [2021-05-10T04:14:38+0000] e2e test


From 4343f4dffeddd161b804278d6c22ef2ae0541ccf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 05:14:46 +0000
Subject: [PATCH 0826/4650] [2021-05-10T05:14:46+0000] e2e test


From 97480954f94c260d6d2c4281e25bf901b80f54fb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 06:11:18 +0000
Subject: [PATCH 0827/4650] [2021-05-10T06:11:18+0000] e2e test


From 8f6d8a3b8703e366f54982e7b21cc6ae02dcc049 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 07:13:15 +0000
Subject: [PATCH 0828/4650] [2021-05-10T07:13:15+0000] e2e test


From 03485f008655b119d7d413bb23cfe15b8ebc26ca Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 08:11:18 +0000
Subject: [PATCH 0829/4650] [2021-05-10T08:11:18+0000] e2e test


From c01472dfe3efbe8bffe3269def9c732ae9b276fb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 09:10:09 +0000
Subject: [PATCH 0830/4650] [2021-05-10T09:10:09+0000] e2e test


From b246220b786ed500e983766c00ddeec8af73a05c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 10:10:10 +0000
Subject: [PATCH 0831/4650] [2021-05-10T10:10:10+0000] e2e test


From 83ac0db15cd517a28e4bf63fba4c5b87f95ecf45 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 11:08:24 +0000
Subject: [PATCH 0832/4650] [2021-05-10T11:08:24+0000] e2e test


From e385441e798f8c9c0e374ec622ea197ad55e2ffe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 12:13:22 +0000
Subject: [PATCH 0833/4650] [2021-05-10T12:13:22+0000] e2e test


From d79a26e366c74c051f4c48efefda7a256b5162fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 13:20:05 +0000
Subject: [PATCH 0834/4650] [2021-05-10T13:20:05+0000] e2e test


From 00d9a7c391fa76c28e12f0918cd1b0e0d8f37f22 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 14:09:44 +0000
Subject: [PATCH 0835/4650] [2021-05-10T14:09:44+0000] e2e test


From a5295c55925df9ea2779026c5c8d63dad5b546e1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 15:10:14 +0000
Subject: [PATCH 0836/4650] [2021-05-10T15:10:14+0000] e2e test


From 04bbcee75fbf5921cc25cb26fe3b9080507c789c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 16:18:13 +0000
Subject: [PATCH 0837/4650] [2021-05-10T16:18:12+0000] e2e test


From 61ae749c63d759e0935d93eb1d6308fdd512eab3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 17:37:48 +0000
Subject: [PATCH 0838/4650] [2021-05-10T17:37:48+0000] e2e test


From ae360c800dfbc37a440656ca9e6632d6e1d44e6c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 18:21:31 +0000
Subject: [PATCH 0839/4650] [2021-05-10T18:21:31+0000] e2e test


From 38f45912df91c90f4ed0060d7598d8565b1cd1d4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 19:14:38 +0000
Subject: [PATCH 0840/4650] [2021-05-10T19:14:38+0000] e2e test


From e1cda314583bd2f6bc4c2cc4d9394c785f6770f7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 20:10:21 +0000
Subject: [PATCH 0841/4650] [2021-05-10T20:10:20+0000] e2e test


From 53456c6b0cb5732184093885796ef305d09ebcd0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 21:08:37 +0000
Subject: [PATCH 0842/4650] [2021-05-10T21:08:37+0000] e2e test


From 43a4978ce2580e89f9e01b572b2e6826c50173b0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 22:11:54 +0000
Subject: [PATCH 0843/4650] [2021-05-10T22:11:54+0000] e2e test


From 3ed6dcd435584e6c6c882ddd0ae8c6db7e998877 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 10 May 2021 23:09:32 +0000
Subject: [PATCH 0844/4650] [2021-05-10T23:09:32+0000] e2e test


From 5ae89dbcdcd0fe12ba96865966b1dfd4b17d274b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 00:27:47 +0000
Subject: [PATCH 0845/4650] [2021-05-11T00:27:46+0000] e2e test


From 17223b39df7a37e78e8b2ad7d631b3a8dc6dab2a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 02:03:17 +0000
Subject: [PATCH 0846/4650] [2021-05-11T02:03:16+0000] e2e test


From 1a96fd6a394743fe2dfe549fe46266e0fb4d3c3b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 03:18:20 +0000
Subject: [PATCH 0847/4650] [2021-05-11T03:18:20+0000] e2e test


From 68e909409789bd40532fde0c6ed882d0bcf4298c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 04:13:25 +0000
Subject: [PATCH 0848/4650] [2021-05-11T04:13:25+0000] e2e test


From 1147c6018dcda92d05d1ef2b6ea17b7125b1d348 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 05:14:25 +0000
Subject: [PATCH 0849/4650] [2021-05-11T05:14:25+0000] e2e test


From a752ccfb4152cd9cb3a56492b8c5df847cb8d620 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 06:11:27 +0000
Subject: [PATCH 0850/4650] [2021-05-11T06:11:27+0000] e2e test


From da1521eb9ac097edb674a17fcd082a97adc0c316 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 07:12:50 +0000
Subject: [PATCH 0851/4650] [2021-05-11T07:12:49+0000] e2e test


From fbc2a54ab7eb87a3029260b8d861f092155894d6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 08:11:06 +0000
Subject: [PATCH 0852/4650] [2021-05-11T08:11:06+0000] e2e test


From 05cab8e8a015c7dcd0005a38ad9111bc3ca6fb40 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 09:09:40 +0000
Subject: [PATCH 0853/4650] [2021-05-11T09:09:40+0000] e2e test


From 5b9761016dbfb2e35a4d104da8be92475a1bc2b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 10:10:09 +0000
Subject: [PATCH 0854/4650] [2021-05-11T10:10:09+0000] e2e test


From 706f3c3653555ef10a95dd4c241be4cfe7ba6d64 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 11:07:59 +0000
Subject: [PATCH 0855/4650] [2021-05-11T11:07:59+0000] e2e test


From ee48704e6ff0ff0616a6b79dacc31793925937d0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 12:13:44 +0000
Subject: [PATCH 0856/4650] [2021-05-11T12:13:44+0000] e2e test


From 7d53827476c3c51a58ea608cb6de57f4c4f1c5fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 13:21:12 +0000
Subject: [PATCH 0857/4650] [2021-05-11T13:21:12+0000] e2e test


From 95cd8431725ff514c76299b9340c762b7925870d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 14:09:34 +0000
Subject: [PATCH 0858/4650] [2021-05-11T14:09:34+0000] e2e test


From babb01fb618532c68598f11a7cee3da491ece359 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 15:10:18 +0000
Subject: [PATCH 0859/4650] [2021-05-11T15:10:18+0000] e2e test


From b00ac59e47311b2af412cae7e26d8e868ed35fb0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 16:19:51 +0000
Subject: [PATCH 0860/4650] [2021-05-11T16:19:51+0000] e2e test


From bb5e77b0c420fb12ebb057a5d3dd6479065a31a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 17:37:37 +0000
Subject: [PATCH 0861/4650] [2021-05-11T17:37:37+0000] e2e test


From 0deb6c85dbd5c97d23f85ccac6a35f8df8684648 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 18:21:26 +0000
Subject: [PATCH 0862/4650] [2021-05-11T18:21:26+0000] e2e test


From 5f89e30590b112794c72296de3e46612089e105d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 19:14:53 +0000
Subject: [PATCH 0863/4650] [2021-05-11T19:14:53+0000] e2e test


From ab13b82038fde38db561c6e59a2b858420bcf3e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 20:10:37 +0000
Subject: [PATCH 0864/4650] [2021-05-11T20:10:37+0000] e2e test


From f4bda9f10353f9c1a8dda63116a54e4a2724f6d4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 21:08:36 +0000
Subject: [PATCH 0865/4650] [2021-05-11T21:08:36+0000] e2e test


From 928cead240a1e00a38be1b60cf13ec1e3dcb23e9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 22:11:59 +0000
Subject: [PATCH 0866/4650] [2021-05-11T22:11:59+0000] e2e test


From 7a79ec8721b0bfc1aad252a07892f77332c89d16 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 11 May 2021 23:09:45 +0000
Subject: [PATCH 0867/4650] [2021-05-11T23:09:45+0000] e2e test


From 08e09b42db8b2c8648b91b8181b7557dcad22b9b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 00:28:42 +0000
Subject: [PATCH 0868/4650] [2021-05-12T00:28:42+0000] e2e test


From 5a29275d2d898c58577805636f2b976abc99ca5e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 01:26:32 +0000
Subject: [PATCH 0869/4650] [2021-05-12T01:26:32+0000] e2e test


From 6d32a207a04612c7a8d6a30efd9aabc05699f6d7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 02:24:01 +0000
Subject: [PATCH 0870/4650] [2021-05-12T02:24:01+0000] e2e test


From 3a63e77804b9d3ede4633a244174de59955e4dcf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 03:10:01 +0000
Subject: [PATCH 0871/4650] [2021-05-12T03:10:01+0000] e2e test


From dd7599ac124c6e99eeceb068682f4f6fae8cab93 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 04:05:28 +0000
Subject: [PATCH 0872/4650] [2021-05-12T04:05:28+0000] e2e test


From 47f5513ea2356cd87abfa180143871a6a06b8037 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 05:07:26 +0000
Subject: [PATCH 0873/4650] [2021-05-12T05:07:25+0000] e2e test


From b48a5ba6e1c864b6ea28b6ea64802e50c03664e4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 06:02:41 +0000
Subject: [PATCH 0874/4650] [2021-05-12T06:02:41+0000] e2e test


From a42a35310d5289ee094714352a47c8259203f3d9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 07:05:54 +0000
Subject: [PATCH 0875/4650] [2021-05-12T07:05:54+0000] e2e test


From 5c977f2d8597995afab99346ac32710bae83afbb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 08:02:37 +0000
Subject: [PATCH 0876/4650] [2021-05-12T08:02:37+0000] e2e test


From a2a5777734323052319d7c49e3dbaee7543bba5f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 09:02:36 +0000
Subject: [PATCH 0877/4650] [2021-05-12T09:02:36+0000] e2e test


From f72cf06c650722507d7c101c8fcae27056791544 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 10:02:38 +0000
Subject: [PATCH 0878/4650] [2021-05-12T10:02:38+0000] e2e test


From f18bab6a894de476d351c0681efc00dbe21affe9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 11:02:37 +0000
Subject: [PATCH 0879/4650] [2021-05-12T11:02:37+0000] e2e test


From 58b47a11a1a7191472aae4269de1a19675f2a473 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 12:02:55 +0000
Subject: [PATCH 0880/4650] [2021-05-12T12:02:55+0000] e2e test


From 2ea031bf9065a527ae570243e727e0712c24de2a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 13:11:25 +0000
Subject: [PATCH 0881/4650] [2021-05-12T13:11:24+0000] e2e test


From f6ebb28941ba0c827418400f71dedb9635f78132 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 14:02:44 +0000
Subject: [PATCH 0882/4650] [2021-05-12T14:02:43+0000] e2e test


From bb4d2de7241b86c47caa66328fbd6987bf33585f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 15:02:37 +0000
Subject: [PATCH 0883/4650] [2021-05-12T15:02:37+0000] e2e test


From e1fc3588eccfe7ef2c6e86c0dc964226f4735273 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 16:06:31 +0000
Subject: [PATCH 0884/4650] [2021-05-12T16:06:31+0000] e2e test


From 938337e7835c4afef1af14693806b4b2f49bbf11 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 17:20:25 +0000
Subject: [PATCH 0885/4650] [2021-05-12T17:20:25+0000] e2e test


From 0c91f5a4eb92c1587d91d6ed87c14a1b4630a64c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 18:12:01 +0000
Subject: [PATCH 0886/4650] [2021-05-12T18:12:01+0000] e2e test


From 9832fa2d2f1ae76a87f173a976a53694d13df06f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 19:08:51 +0000
Subject: [PATCH 0887/4650] [2021-05-12T19:08:51+0000] e2e test


From f893a00486e4d45c44419141f48bc4fb2c2fbab0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 20:02:38 +0000
Subject: [PATCH 0888/4650] [2021-05-12T20:02:38+0000] e2e test


From f57876599887da3d27f24f3808093ff1fc1cb56b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 21:02:40 +0000
Subject: [PATCH 0889/4650] [2021-05-12T21:02:40+0000] e2e test


From b78d0a88573f794761cfe2281b0f46c2b34252d4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 22:02:43 +0000
Subject: [PATCH 0890/4650] [2021-05-12T22:02:43+0000] e2e test


From 11437d1f0efbcde6f6f0b335fa56286ef3cea54e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 12 May 2021 23:02:40 +0000
Subject: [PATCH 0891/4650] [2021-05-12T23:02:40+0000] e2e test


From 5d6b3054b475db82091eb427ed14d3c92bde835a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 00:04:38 +0000
Subject: [PATCH 0892/4650] [2021-05-13T00:04:38+0000] e2e test


From 27970187b385642c5e8fa1aaa601d6a6e6460c83 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 01:28:40 +0000
Subject: [PATCH 0893/4650] [2021-05-13T01:28:40+0000] e2e test


From 20e310146fcd08f1685228e754ece74197e766ae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 02:27:04 +0000
Subject: [PATCH 0894/4650] [2021-05-13T02:27:04+0000] e2e test


From e93f8c9d86a5478c4e706aae9d8b3fd9cdd58be8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 03:10:39 +0000
Subject: [PATCH 0895/4650] [2021-05-13T03:10:39+0000] e2e test


From 76dee8a6d6878790fdaf8ac33fa8803f612bd9df Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 04:05:53 +0000
Subject: [PATCH 0896/4650] [2021-05-13T04:05:53+0000] e2e test


From e2af995bc4c82ec4c828c0a9fb1d7f6d80ecfd9f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 05:07:56 +0000
Subject: [PATCH 0897/4650] [2021-05-13T05:07:56+0000] e2e test


From 330ddfeba3568074e51bb26670cbf3e2887db913 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 06:02:44 +0000
Subject: [PATCH 0898/4650] [2021-05-13T06:02:43+0000] e2e test


From f0fb308985a4499516dc22c6f58174257db37371 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 07:06:31 +0000
Subject: [PATCH 0899/4650] [2021-05-13T07:06:31+0000] e2e test


From 71f315fb75add0197e0a8d9a89bab5193ff3f49c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 08:02:48 +0000
Subject: [PATCH 0900/4650] [2021-05-13T08:02:48+0000] e2e test


From d3fac5efe54e91c19ec831295f393633f88e65ed Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 09:02:43 +0000
Subject: [PATCH 0901/4650] [2021-05-13T09:02:43+0000] e2e test


From 4214c9bf49fd9c59c1b4ec774b2fbefc29c1ec84 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 10:02:47 +0000
Subject: [PATCH 0902/4650] [2021-05-13T10:02:47+0000] e2e test


From 78495c4f1ef3c653e9f9d6f2ea91b1158b60eb4b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 11:02:50 +0000
Subject: [PATCH 0903/4650] [2021-05-13T11:02:50+0000] e2e test


From 2ab10200b804bd0e2fef0852657a978a4646e708 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 12:02:45 +0000
Subject: [PATCH 0904/4650] [2021-05-13T12:02:45+0000] e2e test


From 16647005cee861c12b6e57ec1a0a9d2773d798bb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 13:11:12 +0000
Subject: [PATCH 0905/4650] [2021-05-13T13:11:12+0000] e2e test


From bebbe89a5e9f5c270b0ab1d6f45882ab807a2bbc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 14:02:44 +0000
Subject: [PATCH 0906/4650] [2021-05-13T14:02:44+0000] e2e test


From da58c452b188de72a64ca42411d8661f5e201556 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 15:02:51 +0000
Subject: [PATCH 0907/4650] [2021-05-13T15:02:51+0000] e2e test


From 48ebd9ccee19c8213a7b190734815622070997b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 16:05:54 +0000
Subject: [PATCH 0908/4650] [2021-05-13T16:05:54+0000] e2e test


From 8324fc6d9bffd30340274263ec1b149f82105ead Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 17:20:31 +0000
Subject: [PATCH 0909/4650] [2021-05-13T17:20:30+0000] e2e test


From 7432127c5a90e8d0e77337929bccca30670a18d8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 18:12:08 +0000
Subject: [PATCH 0910/4650] [2021-05-13T18:12:08+0000] e2e test


From 572816331b804b958ce2cfe38ddafd5486df0a05 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 19:09:37 +0000
Subject: [PATCH 0911/4650] [2021-05-13T19:09:37+0000] e2e test


From 8f4f85cba13a283e6cc12d907ceed2cedb64c7c3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 20:02:46 +0000
Subject: [PATCH 0912/4650] [2021-05-13T20:02:45+0000] e2e test


From 403dc1310e60effcd8476af05b9804e5cc74cde0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 21:02:45 +0000
Subject: [PATCH 0913/4650] [2021-05-13T21:02:45+0000] e2e test


From 073ccee9a169a4de439f7b57ea5068c9867ae840 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 22:02:47 +0000
Subject: [PATCH 0914/4650] [2021-05-13T22:02:47+0000] e2e test


From 9d600710ff4bffa6a87b3a9f6c9f61eec5abd045 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 13 May 2021 23:04:51 +0000
Subject: [PATCH 0915/4650] [2021-05-13T23:04:51+0000] e2e test


From cde8806a65eb6627ebd4812930a96ee8e26724b8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 00:06:01 +0000
Subject: [PATCH 0916/4650] [2021-05-14T00:06:01+0000] e2e test


From 9e5f05aa9fa160de1f557d46a6b08a9a15a48b16 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 01:28:26 +0000
Subject: [PATCH 0917/4650] [2021-05-14T01:28:26+0000] e2e test


From 74ba2f55a80a1f4b9edba244c43dec19d8ad40f9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 02:27:11 +0000
Subject: [PATCH 0918/4650] [2021-05-14T02:27:11+0000] e2e test


From 36ac99b1e0c68cb9311a78ea5df588836d50fb62 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 03:11:50 +0000
Subject: [PATCH 0919/4650] [2021-05-14T03:11:50+0000] e2e test


From bcb9c7c8a2ffdc5cff12a095e23d779adb6427b8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 04:06:46 +0000
Subject: [PATCH 0920/4650] [2021-05-14T04:06:45+0000] e2e test


From d3bf10c9004aad2c0b36863983cc709c6779f41c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 05:07:27 +0000
Subject: [PATCH 0921/4650] [2021-05-14T05:07:27+0000] e2e test


From 271819d4454bc6d6c5da31591c2e9cc237dc250f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 06:02:46 +0000
Subject: [PATCH 0922/4650] [2021-05-14T06:02:45+0000] e2e test


From 057a77a9be4cc89cb84fef66c3ec3bb6b5f61b48 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 07:07:22 +0000
Subject: [PATCH 0923/4650] [2021-05-14T07:07:21+0000] e2e test


From 05b1be42e706e64bda7da815116abb1cb78bc9c3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 08:02:50 +0000
Subject: [PATCH 0924/4650] [2021-05-14T08:02:50+0000] e2e test


From a469952a4792ffc956c7567954a6cdaad2a15058 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 09:02:48 +0000
Subject: [PATCH 0925/4650] [2021-05-14T09:02:48+0000] e2e test


From a4cbefcf33bcc365be428da8886b92090c4683b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 10:02:41 +0000
Subject: [PATCH 0926/4650] [2021-05-14T10:02:41+0000] e2e test


From 261b96be306a35c6db40529cb7da8e379aa12b22 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 11:02:39 +0000
Subject: [PATCH 0927/4650] [2021-05-14T11:02:39+0000] e2e test


From 68bd474dcca37e6cd864dad1e308e40a610958f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 12:02:37 +0000
Subject: [PATCH 0928/4650] [2021-05-14T12:02:37+0000] e2e test


From 36387ee5d392fbb7a48977bd7cb4948e0ff6cfa5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 13:10:43 +0000
Subject: [PATCH 0929/4650] [2021-05-14T13:10:43+0000] e2e test


From e3ae308881c4d6f138c3d3a6869546ed00f7f86a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 14:02:41 +0000
Subject: [PATCH 0930/4650] [2021-05-14T14:02:40+0000] e2e test


From f06417d25a626ea27734e506a805efa1fdbc0b96 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 15:03:07 +0000
Subject: [PATCH 0931/4650] [2021-05-14T15:03:07+0000] e2e test


From c458dfbbc9113548ddb6f1344d8d0955d45d8053 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 16:05:57 +0000
Subject: [PATCH 0932/4650] [2021-05-14T16:05:56+0000] e2e test


From 6497ed55deae384b045d45b5fb0182ffdffb5acd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 17:20:27 +0000
Subject: [PATCH 0933/4650] [2021-05-14T17:20:27+0000] e2e test


From db46beb924082c022383534ab965c920a42fd003 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 18:12:30 +0000
Subject: [PATCH 0934/4650] [2021-05-14T18:12:30+0000] e2e test


From 0901edf5607ac9ac9821c023671cae620bd3e269 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 19:10:01 +0000
Subject: [PATCH 0935/4650] [2021-05-14T19:10:01+0000] e2e test


From 745c6336d1542c20a567f0ca4061afb22b76bc34 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 20:02:39 +0000
Subject: [PATCH 0936/4650] [2021-05-14T20:02:39+0000] e2e test


From b0b17475a78934eede96fd1be7c31fa279f063f3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 21:02:40 +0000
Subject: [PATCH 0937/4650] [2021-05-14T21:02:40+0000] e2e test


From ff32de979e09abc59fb6a182b8c36a7a48a7fb7f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 22:02:35 +0000
Subject: [PATCH 0938/4650] [2021-05-14T22:02:35+0000] e2e test


From 31f10356a2181c57d3905f4ec7454beb963f8958 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 14 May 2021 23:02:58 +0000
Subject: [PATCH 0939/4650] [2021-05-14T23:02:58+0000] e2e test


From 0967e46a6cc8e2c29f741958f4f71e25ff9bd5d9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 00:05:27 +0000
Subject: [PATCH 0940/4650] [2021-05-15T00:05:27+0000] e2e test


From ee3614bb26f0b9511d5665cb5ee98e003f64c1e2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 01:27:39 +0000
Subject: [PATCH 0941/4650] [2021-05-15T01:27:39+0000] e2e test


From 13080b95eabc158db62a65273183df2d8ba0b44d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 02:26:01 +0000
Subject: [PATCH 0942/4650] [2021-05-15T02:26:01+0000] e2e test


From 649523bc61cfad7542cf3bd18965a0e15771a583 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 03:09:39 +0000
Subject: [PATCH 0943/4650] [2021-05-15T03:09:39+0000] e2e test


From ebca43b79911e8782bb61a8242fdc36228316c39 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 04:05:55 +0000
Subject: [PATCH 0944/4650] [2021-05-15T04:05:55+0000] e2e test


From 9e556ce916cd9a9eb5b45e8d44920584275d0664 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 05:07:21 +0000
Subject: [PATCH 0945/4650] [2021-05-15T05:07:21+0000] e2e test


From 989581b60b878730ae08d2c87fcdabaa614957a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 06:02:46 +0000
Subject: [PATCH 0946/4650] [2021-05-15T06:02:46+0000] e2e test


From fc9feb528ac3d6aa8d8c74cf2022abc0179652ac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 07:06:27 +0000
Subject: [PATCH 0947/4650] [2021-05-15T07:06:27+0000] e2e test


From 46bd975857ed6f39c4fb0257c5b1bd48de673201 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 08:02:43 +0000
Subject: [PATCH 0948/4650] [2021-05-15T08:02:43+0000] e2e test


From de6530c2dee13c6186a30d9cc2e0375f62c0cbcb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 09:02:35 +0000
Subject: [PATCH 0949/4650] [2021-05-15T09:02:35+0000] e2e test


From c9e1c296922d88abdd4de85b8fa88a03185bdce3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 10:02:34 +0000
Subject: [PATCH 0950/4650] [2021-05-15T10:02:34+0000] e2e test


From b8ae143601caa19bfc137897938261c152ba8fb6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 11:02:39 +0000
Subject: [PATCH 0951/4650] [2021-05-15T11:02:38+0000] e2e test


From 6eae8639dfda47dac12f89ea8f5dda5839905c92 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 12:02:42 +0000
Subject: [PATCH 0952/4650] [2021-05-15T12:02:42+0000] e2e test


From 0227501a8cbdaa5db94195f11d525bee6fc0b69a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 13:10:19 +0000
Subject: [PATCH 0953/4650] [2021-05-15T13:10:19+0000] e2e test


From 8d108fa97139a4906534bdcb3b2806ce8e5c49fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 14:02:37 +0000
Subject: [PATCH 0954/4650] [2021-05-15T14:02:37+0000] e2e test


From 5f09a25ac46718fe3a02b3ebdc510fd6e52d004b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 15:02:37 +0000
Subject: [PATCH 0955/4650] [2021-05-15T15:02:36+0000] e2e test


From cf10db5a636a52c9bbcd4ab78094ba837d56c453 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 16:05:45 +0000
Subject: [PATCH 0956/4650] [2021-05-15T16:05:45+0000] e2e test


From 5e1165944df33c56fa15fa4850e5a52c7cd5e2da Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 17:19:53 +0000
Subject: [PATCH 0957/4650] [2021-05-15T17:19:53+0000] e2e test


From 9e10acc05ff51a50962230f7910e5949112d3265 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 18:11:39 +0000
Subject: [PATCH 0958/4650] [2021-05-15T18:11:39+0000] e2e test


From 75ee68faf358f29625519ead86e32627dfd683c1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 19:08:34 +0000
Subject: [PATCH 0959/4650] [2021-05-15T19:08:34+0000] e2e test


From c98ed48d57de78d188762c7119e596ba85afa317 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 20:02:39 +0000
Subject: [PATCH 0960/4650] [2021-05-15T20:02:39+0000] e2e test


From efa1eb3cffae596b48c22f8f0c73fcee256c4645 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 21:02:43 +0000
Subject: [PATCH 0961/4650] [2021-05-15T21:02:43+0000] e2e test


From 34bd12ac9abd5403f5d168e55f264f1d038be544 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 22:02:42 +0000
Subject: [PATCH 0962/4650] [2021-05-15T22:02:42+0000] e2e test


From 5cc8f3fcfc977997acfb589cc8e525c85c44fb7d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 15 May 2021 23:02:43 +0000
Subject: [PATCH 0963/4650] [2021-05-15T23:02:43+0000] e2e test


From 39c0741af5055dea90f31ca47ac0d6e1d853ac3c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 00:06:10 +0000
Subject: [PATCH 0964/4650] [2021-05-16T00:06:10+0000] e2e test


From 6577341b697bbcc4570669699f85e0bc0d90c2c6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 01:29:44 +0000
Subject: [PATCH 0965/4650] [2021-05-16T01:29:44+0000] e2e test


From 6945992a65c3b5c8a27b1110e56ca444e8dfe83e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 02:29:29 +0000
Subject: [PATCH 0966/4650] [2021-05-16T02:29:29+0000] e2e test


From bb21e6cb9bd4181a0146450a6ad7f43ef39546a7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 03:14:12 +0000
Subject: [PATCH 0967/4650] [2021-05-16T03:14:12+0000] e2e test


From 849a79526ae8b4d241e091ae7cd63dc252b60746 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 04:10:21 +0000
Subject: [PATCH 0968/4650] [2021-05-16T04:10:21+0000] e2e test


From c8b146cb0285a77955ca80af8975c009f69647cc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 05:08:47 +0000
Subject: [PATCH 0969/4650] [2021-05-16T05:08:47+0000] e2e test


From 1edbe12dc4056205b7eb9e48a56ab6b6215ff72a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 06:02:36 +0000
Subject: [PATCH 0970/4650] [2021-05-16T06:02:36+0000] e2e test


From 4e10717b637dc0d12a4c6e5cf035e778b28d8c1e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 07:06:11 +0000
Subject: [PATCH 0971/4650] [2021-05-16T07:06:11+0000] e2e test


From 94ec570e5ec670886923bd91b9bcd1e13263a8f3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 08:02:41 +0000
Subject: [PATCH 0972/4650] [2021-05-16T08:02:41+0000] e2e test


From 3ec5223bb106cb23dc8bcc4a94f90fbe4cb95ced Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 09:02:51 +0000
Subject: [PATCH 0973/4650] [2021-05-16T09:02:51+0000] e2e test


From 39dc4761894ebc47fd69c32a4b17ae2b72b524f9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 10:04:35 +0000
Subject: [PATCH 0974/4650] [2021-05-16T10:04:35+0000] e2e test


From a6d6d4f267b35fdefdaf7b2193d804c85a8e8827 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 11:11:25 +0000
Subject: [PATCH 0975/4650] [2021-05-16T11:11:25+0000] e2e test


From 657110749c5e918e904675f76753fa77d845fb94 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 12:04:53 +0000
Subject: [PATCH 0976/4650] [2021-05-16T12:04:53+0000] e2e test


From feb1a3d42152266dbff891060dec72bc103d63af Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 13:10:22 +0000
Subject: [PATCH 0977/4650] [2021-05-16T13:10:22+0000] e2e test


From 14a87791b8cc6cd242971627d1d04f6aa67c1ee7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 14:06:45 +0000
Subject: [PATCH 0978/4650] [2021-05-16T14:06:45+0000] e2e test


From a1b69d4f934dc79caa58445b3000192636335e8f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 15:02:44 +0000
Subject: [PATCH 0979/4650] [2021-05-16T15:02:43+0000] e2e test


From 509b1fa60405835095edda4037f87231c63c7464 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 16:05:05 +0000
Subject: [PATCH 0980/4650] [2021-05-16T16:05:05+0000] e2e test


From 33da879ffbc397a06ff596265d3cb648a856cb57 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 17:20:43 +0000
Subject: [PATCH 0981/4650] [2021-05-16T17:20:43+0000] e2e test


From 364d8d4af55a86a2575346b21cbc53243daf4fdd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 18:12:15 +0000
Subject: [PATCH 0982/4650] [2021-05-16T18:12:14+0000] e2e test


From fa0940a08d7dd10a0a116a99a2e8dcbc9b78fe47 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 19:09:27 +0000
Subject: [PATCH 0983/4650] [2021-05-16T19:09:27+0000] e2e test


From a85864b704d5d1747f08404548289e45de5cc9d5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 20:02:37 +0000
Subject: [PATCH 0984/4650] [2021-05-16T20:02:37+0000] e2e test


From 564fac29396dd412c9d59d910778a57e8e25531b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 21:02:40 +0000
Subject: [PATCH 0985/4650] [2021-05-16T21:02:40+0000] e2e test


From 7b72997d46d578e9db7f5c51563cfba470c20fc7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 22:02:39 +0000
Subject: [PATCH 0986/4650] [2021-05-16T22:02:39+0000] e2e test


From e23e2987df9e6aaf08cf8595c59750ecda76a422 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 16 May 2021 23:02:43 +0000
Subject: [PATCH 0987/4650] [2021-05-16T23:02:43+0000] e2e test


From 3f0b27ac5e47770e04f446605ce7307352d2a0f2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 00:05:36 +0000
Subject: [PATCH 0988/4650] [2021-05-17T00:05:36+0000] e2e test


From e75c49b18ca19f770fa3f162f2277dd62740e1f3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 01:27:53 +0000
Subject: [PATCH 0989/4650] [2021-05-17T01:27:53+0000] e2e test


From 551f4d1887c0827e86ad1189ffe86b5344d75356 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 02:27:36 +0000
Subject: [PATCH 0990/4650] [2021-05-17T02:27:36+0000] e2e test


From ed426bd5c3583f034f61567aca37494f8c6bceae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 03:11:43 +0000
Subject: [PATCH 0991/4650] [2021-05-17T03:11:43+0000] e2e test


From b1d41b4b35044ee6dd269f16af6d688009bc302d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 04:06:48 +0000
Subject: [PATCH 0992/4650] [2021-05-17T04:06:48+0000] e2e test


From f5f510e40e8f41ce5f3485af98b8fec0347a936e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 05:07:34 +0000
Subject: [PATCH 0993/4650] [2021-05-17T05:07:34+0000] e2e test


From 3315734c4a77b09abaacdbd3f48fbb0c0f7f5de1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 06:02:39 +0000
Subject: [PATCH 0994/4650] [2021-05-17T06:02:38+0000] e2e test


From 666b495f061daa67e6a4a3d91e667ba1d902c2b4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 07:06:45 +0000
Subject: [PATCH 0995/4650] [2021-05-17T07:06:45+0000] e2e test


From e32c16baf31ab2ea3d668b4819b41aaaa5c95913 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 08:02:36 +0000
Subject: [PATCH 0996/4650] [2021-05-17T08:02:36+0000] e2e test


From 64c4d7d44e2d65eb2da61dc6893d3955f3ff0d64 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 09:02:39 +0000
Subject: [PATCH 0997/4650] [2021-05-17T09:02:39+0000] e2e test


From de91057250138157b50df6ed06e6cde7445713f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 10:02:41 +0000
Subject: [PATCH 0998/4650] [2021-05-17T10:02:41+0000] e2e test


From 86353e0e89e9f06710425555f8ce0b128b2be7ef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 11:02:42 +0000
Subject: [PATCH 0999/4650] [2021-05-17T11:02:42+0000] e2e test


From ce5298e905b0c0c75a4f283ea2045c0e5faf3ecb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 12:02:55 +0000
Subject: [PATCH 1000/4650] [2021-05-17T12:02:55+0000] e2e test


From dfc9f099bb5b8da828ad45104dc4e2a5c5808c5d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 13:12:46 +0000
Subject: [PATCH 1001/4650] [2021-05-17T13:12:46+0000] e2e test


From e55183f06e4d0566325762219ca04409252a97c6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 14:03:13 +0000
Subject: [PATCH 1002/4650] [2021-05-17T14:03:13+0000] e2e test


From 4086a0a193f04fcb61721f1a702f5263d9e05d48 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 15:02:51 +0000
Subject: [PATCH 1003/4650] [2021-05-17T15:02:51+0000] e2e test


From 05ae465fa959ff0ce98e096a7a66627a99af78dd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 16:06:32 +0000
Subject: [PATCH 1004/4650] [2021-05-17T16:06:32+0000] e2e test


From 397d9a422ee29ac1bba2d4eac9275be8feeae366 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 17:20:21 +0000
Subject: [PATCH 1005/4650] [2021-05-17T17:20:21+0000] e2e test


From 886ead1fcd7f9273e716fdad34e1417dee5acec8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 18:12:33 +0000
Subject: [PATCH 1006/4650] [2021-05-17T18:12:33+0000] e2e test


From 497fd7cac1a247ce22e2f83698f309458ab50fa9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 19:10:04 +0000
Subject: [PATCH 1007/4650] [2021-05-17T19:10:04+0000] e2e test


From 08d0b3bae2f3ceccf21b0bacc2caad635cab59a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 20:02:45 +0000
Subject: [PATCH 1008/4650] [2021-05-17T20:02:45+0000] e2e test


From b9ab74a57b7961d29747946e0b3987b5cda85e80 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 21:02:52 +0000
Subject: [PATCH 1009/4650] [2021-05-17T21:02:52+0000] e2e test


From f3ca063e92a8e3d5356ce2ae3059cd2514c8d052 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 22:02:46 +0000
Subject: [PATCH 1010/4650] [2021-05-17T22:02:46+0000] e2e test


From 4cdaad56e11031fe4c2a34557a8abbb3f022c101 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 17 May 2021 23:03:05 +0000
Subject: [PATCH 1011/4650] [2021-05-17T23:03:05+0000] e2e test


From cfc7696c54d032ec2ad562e23e657cfcdcac6b2a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 00:06:02 +0000
Subject: [PATCH 1012/4650] [2021-05-18T00:06:02+0000] e2e test


From 8e3f0908b5d7d63a32fe0ed568086f840fa4d530 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 01:28:32 +0000
Subject: [PATCH 1013/4650] [2021-05-18T01:28:32+0000] e2e test


From ca056279c5563a425f9c9d618579c9594dd24d37 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 02:27:50 +0000
Subject: [PATCH 1014/4650] [2021-05-18T02:27:50+0000] e2e test


From 2b5ed16cc311552123318cf16d14d7d018454e54 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 03:12:04 +0000
Subject: [PATCH 1015/4650] [2021-05-18T03:12:03+0000] e2e test


From 0020e38be0be4cbb9642884cefcea0da9163e316 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 04:07:31 +0000
Subject: [PATCH 1016/4650] [2021-05-18T04:07:31+0000] e2e test


From b1da6581bbd88710296d6de4a3dae33f001a632f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 05:07:50 +0000
Subject: [PATCH 1017/4650] [2021-05-18T05:07:50+0000] e2e test


From c686cd7eef43b269ad187c8cb6b06754d401af29 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 06:02:37 +0000
Subject: [PATCH 1018/4650] [2021-05-18T06:02:36+0000] e2e test


From 80f7fc225aaaf81586b28cf859403652cc34fc1f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 07:06:35 +0000
Subject: [PATCH 1019/4650] [2021-05-18T07:06:35+0000] e2e test


From 46e3e342e73207937bfddf32fa864af957b12e63 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 08:02:39 +0000
Subject: [PATCH 1020/4650] [2021-05-18T08:02:39+0000] e2e test


From 76e5940391d2079e421550335f28a89ade39c6dd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 09:02:43 +0000
Subject: [PATCH 1021/4650] [2021-05-18T09:02:43+0000] e2e test


From 2cef97e1a4192f67bc098ce95d42de79054f2454 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 10:02:38 +0000
Subject: [PATCH 1022/4650] [2021-05-18T10:02:38+0000] e2e test


From 998a2cbc8b09bd23754fa0637064d59b273fd0b2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 11:02:33 +0000
Subject: [PATCH 1023/4650] [2021-05-18T11:02:33+0000] e2e test


From 92ed05f6dc75d4fa4526bc080869f76b0dd61343 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 12:02:52 +0000
Subject: [PATCH 1024/4650] [2021-05-18T12:02:52+0000] e2e test


From 93ec3132551c7d6db778be6e4d0c6cc4ebebf443 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 13:11:46 +0000
Subject: [PATCH 1025/4650] [2021-05-18T13:11:46+0000] e2e test


From 0af5958678b47ebf724f810eba86c78db2c308df Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 14:02:49 +0000
Subject: [PATCH 1026/4650] [2021-05-18T14:02:49+0000] e2e test


From 7d3f03dd03f1e56e4cea8f2d07adf9fe492dc6a7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 15:02:57 +0000
Subject: [PATCH 1027/4650] [2021-05-18T15:02:57+0000] e2e test


From 0047149ad1fa7fc6d5a5f681a712265ce4c6ee65 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 16:05:43 +0000
Subject: [PATCH 1028/4650] [2021-05-18T16:05:42+0000] e2e test


From 7edf70adb75969fed822e49eb081ce39a938466d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 17:20:23 +0000
Subject: [PATCH 1029/4650] [2021-05-18T17:20:23+0000] e2e test


From c18fd00a86c89ea2534e2365a9d84d504b5dd7d1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 18:13:46 +0000
Subject: [PATCH 1030/4650] [2021-05-18T18:13:46+0000] e2e test


From 73b51e7ad11378a5b60b2f9b82aded6071fe9893 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 19:11:53 +0000
Subject: [PATCH 1031/4650] [2021-05-18T19:11:53+0000] e2e test


From 5e8a832e5151d4a51f613d4b5953edb8de612a94 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 20:02:43 +0000
Subject: [PATCH 1032/4650] [2021-05-18T20:02:43+0000] e2e test


From 70f3108eb612d7c2c7c3a1b30c4a28e150fc6e85 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 21:02:33 +0000
Subject: [PATCH 1033/4650] [2021-05-18T21:02:33+0000] e2e test


From be63e68586e50e54fa0ae1799de7eed033f577f5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 22:02:35 +0000
Subject: [PATCH 1034/4650] [2021-05-18T22:02:35+0000] e2e test


From 38281bf4b505379487f7bddae8c72fd600e8e8b5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 18 May 2021 23:02:57 +0000
Subject: [PATCH 1035/4650] [2021-05-18T23:02:56+0000] e2e test


From d80929237f16c067e4130c52f2c60ed93436ac1c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 00:05:24 +0000
Subject: [PATCH 1036/4650] [2021-05-19T00:05:24+0000] e2e test


From b0316ad2109d8cd5f7418a1fb149cc44dedbcf5a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 01:27:00 +0000
Subject: [PATCH 1037/4650] [2021-05-19T01:27:00+0000] e2e test


From 7c46686e830cdf90f38d64c7559dd1e1b80b9cd3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 02:25:44 +0000
Subject: [PATCH 1038/4650] [2021-05-19T02:25:44+0000] e2e test


From 5c7998b2e3c64ad039e3ba07d2f736e5de4466b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 03:09:20 +0000
Subject: [PATCH 1039/4650] [2021-05-19T03:09:20+0000] e2e test


From 06508b98ee902f7562eb414621278555e12ffea1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 04:05:39 +0000
Subject: [PATCH 1040/4650] [2021-05-19T04:05:38+0000] e2e test


From d1e8b44e4ae777cc1755237ad655bd1688b516de Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 05:07:41 +0000
Subject: [PATCH 1041/4650] [2021-05-19T05:07:41+0000] e2e test


From 8e7df74e09f38b5b2812c64224530ae488fef83b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 06:02:35 +0000
Subject: [PATCH 1042/4650] [2021-05-19T06:02:35+0000] e2e test


From 6d2293a486163d2c25fec07c4f050cfb48893da0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 07:06:38 +0000
Subject: [PATCH 1043/4650] [2021-05-19T07:06:38+0000] e2e test


From 2e6a0bf077eadd97500cb32eb5081c4684dc8e5b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 08:02:44 +0000
Subject: [PATCH 1044/4650] [2021-05-19T08:02:44+0000] e2e test


From 0b983d636e84514665ecbe697ac122f3309b8f2d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 09:02:41 +0000
Subject: [PATCH 1045/4650] [2021-05-19T09:02:41+0000] e2e test


From 762430247fca13a87cc17cc95c30a5ed3b60f24b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 10:02:36 +0000
Subject: [PATCH 1046/4650] [2021-05-19T10:02:35+0000] e2e test


From 2aa7d071ce327be773d9f6d74a2630b174f27047 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 11:02:43 +0000
Subject: [PATCH 1047/4650] [2021-05-19T11:02:43+0000] e2e test


From f8a7401a19a5125162433990c1fad9497343688a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 12:02:46 +0000
Subject: [PATCH 1048/4650] [2021-05-19T12:02:45+0000] e2e test


From 67a8488e27d05268e5380e9589386573ff9366cf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 13:11:10 +0000
Subject: [PATCH 1049/4650] [2021-05-19T13:11:10+0000] e2e test


From fdea065783a9602c938fbf79c65837f056da350b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 14:02:39 +0000
Subject: [PATCH 1050/4650] [2021-05-19T14:02:38+0000] e2e test


From 915cacc17a2f6032bbdde053e0540f634d6ca0c1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 15:02:39 +0000
Subject: [PATCH 1051/4650] [2021-05-19T15:02:39+0000] e2e test


From cf5243d2468642a72aa2a41cf8b9fcdf5a28aa84 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 16:05:53 +0000
Subject: [PATCH 1052/4650] [2021-05-19T16:05:53+0000] e2e test


From 767a4ae58f913bdf68b558a5fbbb9c3bc6c512f7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 17:20:20 +0000
Subject: [PATCH 1053/4650] [2021-05-19T17:20:20+0000] e2e test


From be44357ed6625aa03529c6e80e913c94a09439e5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 18:12:56 +0000
Subject: [PATCH 1054/4650] [2021-05-19T18:12:56+0000] e2e test


From 013264b8b6f891afcf88f141b6dd83fe3e19eeff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 19:10:43 +0000
Subject: [PATCH 1055/4650] [2021-05-19T19:10:43+0000] e2e test


From 2b42ab7ff4875507c846bdd6f36f14e8e3061141 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 20:02:47 +0000
Subject: [PATCH 1056/4650] [2021-05-19T20:02:47+0000] e2e test


From 00e3c30562762881b7382769e27bcdc3ff9c0c2a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 21:02:37 +0000
Subject: [PATCH 1057/4650] [2021-05-19T21:02:37+0000] e2e test


From 7906f296c2694299307f8c13e6224f2df8f39462 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 22:02:52 +0000
Subject: [PATCH 1058/4650] [2021-05-19T22:02:52+0000] e2e test


From 49c628fe26ee34c79b9b5bd33a586be59304ebd6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 19 May 2021 23:02:42 +0000
Subject: [PATCH 1059/4650] [2021-05-19T23:02:41+0000] e2e test


From 5ea8be89f9a8ad52f17cbbadc1cfc39a5511d5d4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 00:05:26 +0000
Subject: [PATCH 1060/4650] [2021-05-20T00:05:26+0000] e2e test


From 26b05c6cae32405804e4aeb211603b882f5d36aa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 01:27:05 +0000
Subject: [PATCH 1061/4650] [2021-05-20T01:27:05+0000] e2e test


From 9b251eb7fccf4ca3fc6d5330f135dc7371b4890e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 02:26:07 +0000
Subject: [PATCH 1062/4650] [2021-05-20T02:26:07+0000] e2e test


From df18ed5a6aed3aa8ee165b1dc7049e890acaa0f8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 03:10:27 +0000
Subject: [PATCH 1063/4650] [2021-05-20T03:10:27+0000] e2e test


From 512a8496fc824d7e7c2fd897fa3bcba92a4fc5be Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 04:06:08 +0000
Subject: [PATCH 1064/4650] [2021-05-20T04:06:08+0000] e2e test


From cd9cb9c138c024cc98cc046bd29d0517dbf05ab1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 05:07:40 +0000
Subject: [PATCH 1065/4650] [2021-05-20T05:07:40+0000] e2e test


From c4fba89384673422c653d48672faecfa06913b03 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 06:02:42 +0000
Subject: [PATCH 1066/4650] [2021-05-20T06:02:42+0000] e2e test


From 2e579b226a01742eb002f58b82d6f5aa5d1da887 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 07:06:59 +0000
Subject: [PATCH 1067/4650] [2021-05-20T07:06:59+0000] e2e test


From 3b0cc4a2633e299c69f690af492d0fc6344df225 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 08:02:44 +0000
Subject: [PATCH 1068/4650] [2021-05-20T08:02:44+0000] e2e test


From e196620a856392b0002294bb88516a9d6c4fd16d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 09:02:44 +0000
Subject: [PATCH 1069/4650] [2021-05-20T09:02:43+0000] e2e test


From 4a93f07b5c130320af7a83b0a3a4546e5ec2e235 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 10:02:43 +0000
Subject: [PATCH 1070/4650] [2021-05-20T10:02:43+0000] e2e test


From 712b517d9b4e094f15f444082558e0932fb9bfa3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 11:02:40 +0000
Subject: [PATCH 1071/4650] [2021-05-20T11:02:40+0000] e2e test


From 7a16fc65dd93602bc3f5e1f11dfa78ae613e5818 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 12:03:06 +0000
Subject: [PATCH 1072/4650] [2021-05-20T12:03:06+0000] e2e test


From 75ad4f1eee02c875de606b057bbd8f4ddb21e933 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 13:12:44 +0000
Subject: [PATCH 1073/4650] [2021-05-20T13:12:43+0000] e2e test


From b797ba23dcadbb76b50849bc1ca5f088ff92f8eb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 14:02:33 +0000
Subject: [PATCH 1074/4650] [2021-05-20T14:02:33+0000] e2e test


From ff051fa4fc543f996c290805c89ac4f3781599c6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 15:02:52 +0000
Subject: [PATCH 1075/4650] [2021-05-20T15:02:51+0000] e2e test


From 82e227d792915bef4b0ccd740dab4e391634eae1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 16:06:42 +0000
Subject: [PATCH 1076/4650] [2021-05-20T16:06:42+0000] e2e test


From 16c365a173c77469280dd46a9bd77ec3b1e77f24 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 17:20:57 +0000
Subject: [PATCH 1077/4650] [2021-05-20T17:20:57+0000] e2e test


From 9c40892137c5c5479a9ea55f5996c32c5b46bc8f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 18:13:32 +0000
Subject: [PATCH 1078/4650] [2021-05-20T18:13:32+0000] e2e test


From 16e97433477121c31082cb5e833d25073060bf04 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 19:12:05 +0000
Subject: [PATCH 1079/4650] [2021-05-20T19:12:05+0000] e2e test


From 0c29fdd6fa5d69c12adc398aafe765f1729a9a4c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 20:02:35 +0000
Subject: [PATCH 1080/4650] [2021-05-20T20:02:35+0000] e2e test


From 35c275387a755e77887182c47b324456c54933eb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 21:03:09 +0000
Subject: [PATCH 1081/4650] [2021-05-20T21:03:08+0000] e2e test


From 7ad7303e612c0da14951d9c2ecc408bb79d5f799 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 22:02:35 +0000
Subject: [PATCH 1082/4650] [2021-05-20T22:02:35+0000] e2e test


From d1d8e3fe8a2e6eccdde2f2a82d335976e8b8c711 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 20 May 2021 23:02:39 +0000
Subject: [PATCH 1083/4650] [2021-05-20T23:02:39+0000] e2e test


From d077176e2ea3e2091d606b2ada2b363ae3049af4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 00:05:42 +0000
Subject: [PATCH 1084/4650] [2021-05-21T00:05:41+0000] e2e test


From 6e6f0bcd9bb63323cf19aa4f8b0404fe5629fda9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 01:28:01 +0000
Subject: [PATCH 1085/4650] [2021-05-21T01:28:01+0000] e2e test


From 9eb51b66997e7912e1f43dc718ec300dad5dc0a5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 02:27:04 +0000
Subject: [PATCH 1086/4650] [2021-05-21T02:27:03+0000] e2e test


From 8cfa266aaea56501580d065a9b0db2e617755d70 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 03:10:58 +0000
Subject: [PATCH 1087/4650] [2021-05-21T03:10:58+0000] e2e test


From 6f5448d4d49e52ca4cb1d0a1e4f771c99509ccea Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 04:06:47 +0000
Subject: [PATCH 1088/4650] [2021-05-21T04:06:47+0000] e2e test


From 59edcb7483fba2de3ccf526375c1882e6f779744 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 05:08:07 +0000
Subject: [PATCH 1089/4650] [2021-05-21T05:08:06+0000] e2e test


From 6bfd6b00bcd3d7b72bee876fcb9ccce13c6b4dbf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 06:02:41 +0000
Subject: [PATCH 1090/4650] [2021-05-21T06:02:41+0000] e2e test


From d9ba548ea7d0208013b5681d8162f3015a168509 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 07:07:21 +0000
Subject: [PATCH 1091/4650] [2021-05-21T07:07:21+0000] e2e test


From d73faa7e40d6b8da6219e0b4f0d23821e5356f28 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 08:02:51 +0000
Subject: [PATCH 1092/4650] [2021-05-21T08:02:51+0000] e2e test


From 4fb9a240f63ee93e963098ab86adc47119c53362 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 09:02:44 +0000
Subject: [PATCH 1093/4650] [2021-05-21T09:02:44+0000] e2e test


From a5fc8d398a4489b6a929e2aa6add761ae814fc83 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 10:02:49 +0000
Subject: [PATCH 1094/4650] [2021-05-21T10:02:48+0000] e2e test


From 85c9eb5ad84a2b0dbfc89cb1bc4711b4a031f8ff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 11:02:39 +0000
Subject: [PATCH 1095/4650] [2021-05-21T11:02:39+0000] e2e test


From 90909889a02cdace2a28a4d0c4850bd6d3ab5137 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 12:02:57 +0000
Subject: [PATCH 1096/4650] [2021-05-21T12:02:57+0000] e2e test


From 7f39e47bb7e32eeb584c5ac84145b2ef57d71e06 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 13:12:35 +0000
Subject: [PATCH 1097/4650] [2021-05-21T13:12:35+0000] e2e test


From c780ce1bc183b37a50c8f19069bea2e2dcd18536 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 14:03:04 +0000
Subject: [PATCH 1098/4650] [2021-05-21T14:03:04+0000] e2e test


From 2c611164c79c6ad11694ec12309eeaea45cead99 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 15:02:45 +0000
Subject: [PATCH 1099/4650] [2021-05-21T15:02:45+0000] e2e test


From 98cfcdb4f3a2f614321ced1e75d6c486d40486d1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 16:06:25 +0000
Subject: [PATCH 1100/4650] [2021-05-21T16:06:25+0000] e2e test


From 96c607a62eaede22cc5e53b166716e567215ef57 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 17:21:09 +0000
Subject: [PATCH 1101/4650] [2021-05-21T17:21:09+0000] e2e test


From dda147d524f62376966e9b1ae6d84acad4d25f47 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 18:14:46 +0000
Subject: [PATCH 1102/4650] [2021-05-21T18:14:45+0000] e2e test


From dca4033a97334f82d44f04dcd2746e7b5e03a84b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 19:14:47 +0000
Subject: [PATCH 1103/4650] [2021-05-21T19:14:47+0000] e2e test


From d21d21f8ebd9281e00692046238bee46ef2c942d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 20:02:37 +0000
Subject: [PATCH 1104/4650] [2021-05-21T20:02:37+0000] e2e test


From e1e6906a189dfdafc2173c66bb36ca5a6580c2e2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 21:02:40 +0000
Subject: [PATCH 1105/4650] [2021-05-21T21:02:39+0000] e2e test


From 8f5ed10a0b068c10b2bb16b318662500d95b73cb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 22:02:42 +0000
Subject: [PATCH 1106/4650] [2021-05-21T22:02:42+0000] e2e test


From d1eeefc4b1cbfebe9d147a6ce47348cc6fc85442 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 21 May 2021 23:02:38 +0000
Subject: [PATCH 1107/4650] [2021-05-21T23:02:38+0000] e2e test


From 02314d5a3afbd8077ff566c254aaad7b8b495473 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 00:05:30 +0000
Subject: [PATCH 1108/4650] [2021-05-22T00:05:30+0000] e2e test


From d7eb1e00c4eaf816681a555f3dbd79bb601ceef9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 01:27:28 +0000
Subject: [PATCH 1109/4650] [2021-05-22T01:27:28+0000] e2e test


From f8145620d2dedfa00bc1c8d79f73913690003d44 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 02:27:02 +0000
Subject: [PATCH 1110/4650] [2021-05-22T02:27:01+0000] e2e test


From f57a85d9c354d39023ede1cbb9281490340ea8d6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 03:10:42 +0000
Subject: [PATCH 1111/4650] [2021-05-22T03:10:42+0000] e2e test


From 33e67beb999d7ab2289e7abac74ffe19634e1962 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 04:07:36 +0000
Subject: [PATCH 1112/4650] [2021-05-22T04:07:36+0000] e2e test


From 030f69b8c5450d51f48d8b3259e97c5a79c6a7fe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 05:08:59 +0000
Subject: [PATCH 1113/4650] [2021-05-22T05:08:59+0000] e2e test


From a66640b7a5e9ecbb5c20d314cebff1cc31111aee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 06:02:41 +0000
Subject: [PATCH 1114/4650] [2021-05-22T06:02:41+0000] e2e test


From 7377a318add662b04cc958ea27e83d69009de9df Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 07:07:28 +0000
Subject: [PATCH 1115/4650] [2021-05-22T07:07:28+0000] e2e test


From 0d1b8321fcdf34eb5101992c532adbdbd24d9d0a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 08:02:48 +0000
Subject: [PATCH 1116/4650] [2021-05-22T08:02:48+0000] e2e test


From b5ae22f27caf9036012053dd9ee802db9ba95479 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 09:02:52 +0000
Subject: [PATCH 1117/4650] [2021-05-22T09:02:52+0000] e2e test


From a319f005ea7c30e764b864b52f9a8ec4d245e4fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 10:02:51 +0000
Subject: [PATCH 1118/4650] [2021-05-22T10:02:51+0000] e2e test


From 9b14514a210897459da766b590320927e87f591e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 11:02:40 +0000
Subject: [PATCH 1119/4650] [2021-05-22T11:02:40+0000] e2e test


From ccace63122887149e81766d6bca12f92a0547e4e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 12:02:51 +0000
Subject: [PATCH 1120/4650] [2021-05-22T12:02:51+0000] e2e test


From 0f2eaa62292888b8bd22a7116b17c5844f0aca90 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 13:11:22 +0000
Subject: [PATCH 1121/4650] [2021-05-22T13:11:22+0000] e2e test


From b1688e158b0756f86ac74d0badeff7d5c95b42f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 14:02:35 +0000
Subject: [PATCH 1122/4650] [2021-05-22T14:02:34+0000] e2e test


From 19317fb2f79d25d101d07cc4c77f5d2dba292515 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 15:02:40 +0000
Subject: [PATCH 1123/4650] [2021-05-22T15:02:40+0000] e2e test


From 85427d8f24f408b74eeecfa0506b5ca3e61e81e2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 16:06:05 +0000
Subject: [PATCH 1124/4650] [2021-05-22T16:06:05+0000] e2e test


From de7b4106b2d4ef88e5f0b607d53d7d445ec5a85b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 17:20:24 +0000
Subject: [PATCH 1125/4650] [2021-05-22T17:20:24+0000] e2e test


From 9f5d9cbfdccece57a308284eb4dc2ecd9b1d59a6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 18:13:25 +0000
Subject: [PATCH 1126/4650] [2021-05-22T18:13:25+0000] e2e test


From 06e104658f93e66761216a9736ef88cb7d0941b7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 19:12:48 +0000
Subject: [PATCH 1127/4650] [2021-05-22T19:12:48+0000] e2e test


From 3a62ccde5bedd9ae1f87fe07911a2f9cb9d01a16 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 20:02:40 +0000
Subject: [PATCH 1128/4650] [2021-05-22T20:02:40+0000] e2e test


From a609efcd97e4a00a957a35820cca4d4a16d973e1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 21:02:34 +0000
Subject: [PATCH 1129/4650] [2021-05-22T21:02:34+0000] e2e test


From 8000094bfcbf3f58bca93d524c513fe7aaee6f1f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 22:02:35 +0000
Subject: [PATCH 1130/4650] [2021-05-22T22:02:34+0000] e2e test


From d9e6168732e2804e98f02ab3c3e530c938d967cb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 22 May 2021 23:02:37 +0000
Subject: [PATCH 1131/4650] [2021-05-22T23:02:37+0000] e2e test


From db78ccbabeaa19fe2b83218e8a45cc6ffc9d1c66 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 00:06:18 +0000
Subject: [PATCH 1132/4650] [2021-05-23T00:06:18+0000] e2e test


From 59fddceff73f3278fc18c1ae525490aca2e2bb34 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 01:30:37 +0000
Subject: [PATCH 1133/4650] [2021-05-23T01:30:37+0000] e2e test


From 726da005b37f875c1335104958a8bb0875915db1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 02:31:00 +0000
Subject: [PATCH 1134/4650] [2021-05-23T02:31:00+0000] e2e test


From 7fa7ca36860ecdb40cc54b8c8a4e373239a8b85e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 03:17:20 +0000
Subject: [PATCH 1135/4650] [2021-05-23T03:17:20+0000] e2e test


From 5debb0221a367a01b9278b719581449394b1c71f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 04:13:10 +0000
Subject: [PATCH 1136/4650] [2021-05-23T04:13:09+0000] e2e test


From 826b3b7d6f6d818b889e7854942674200202c257 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 05:11:25 +0000
Subject: [PATCH 1137/4650] [2021-05-23T05:11:25+0000] e2e test


From 383e0e824dfa7319d3b4bafc029827328b796232 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 06:02:58 +0000
Subject: [PATCH 1138/4650] [2021-05-23T06:02:58+0000] e2e test


From 429d36b4e5e1e09a78fe5296f5248c67dbb2bedd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 07:07:29 +0000
Subject: [PATCH 1139/4650] [2021-05-23T07:07:29+0000] e2e test


From c527ba6d0e354bc89aab83c32ed6e841b10857f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 08:02:44 +0000
Subject: [PATCH 1140/4650] [2021-05-23T08:02:44+0000] e2e test


From 9c76d8ca1c7fb670b9597dc7d6b5f9c6b66448b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 09:02:41 +0000
Subject: [PATCH 1141/4650] [2021-05-23T09:02:41+0000] e2e test


From 12724196d7163f9eca0365fcb503cf442dae7b8a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 10:02:44 +0000
Subject: [PATCH 1142/4650] [2021-05-23T10:02:44+0000] e2e test


From 7f91b02fea050c1f838b9d7dd6813219e806ed30 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 11:02:31 +0000
Subject: [PATCH 1143/4650] [2021-05-23T11:02:31+0000] e2e test


From c1a4c087d71565590994e59ac0ec0fffda70ece3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 12:02:45 +0000
Subject: [PATCH 1144/4650] [2021-05-23T12:02:45+0000] e2e test


From 924d759d9b8881c365ee1bb7e3231ebc55c3921d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 13:12:40 +0000
Subject: [PATCH 1145/4650] [2021-05-23T13:12:39+0000] e2e test


From 7f71dce99b6d176c0d0aeb19c91b224d6de2ff8e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 14:02:36 +0000
Subject: [PATCH 1146/4650] [2021-05-23T14:02:36+0000] e2e test


From 07cdefc575c77a300b0fcdd5873a23475102f1f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 15:02:35 +0000
Subject: [PATCH 1147/4650] [2021-05-23T15:02:35+0000] e2e test


From 473f872f81b814de00701aab2a95f92efdaf3734 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 16:06:10 +0000
Subject: [PATCH 1148/4650] [2021-05-23T16:06:10+0000] e2e test


From d0e3dec61af1af37d93e845c4c290a8478f025c3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 17:20:08 +0000
Subject: [PATCH 1149/4650] [2021-05-23T17:20:08+0000] e2e test


From 01f909172c66b65bbcec80e5a82da6746acf6c86 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 18:12:28 +0000
Subject: [PATCH 1150/4650] [2021-05-23T18:12:28+0000] e2e test


From 4be0e96dd68e5b0fca56649ef9dca97552250432 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 19:11:01 +0000
Subject: [PATCH 1151/4650] [2021-05-23T19:11:01+0000] e2e test


From 949cab74b6f9f2bb85caba5b39ef75fadf7cfacf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 20:02:39 +0000
Subject: [PATCH 1152/4650] [2021-05-23T20:02:39+0000] e2e test


From abc1ae5790abf5391d5d74e2b055f92c29f27091 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 21:02:41 +0000
Subject: [PATCH 1153/4650] [2021-05-23T21:02:41+0000] e2e test


From 4d8162d667eab4c55bc3bf8797b89d8119a27c2a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 22:02:39 +0000
Subject: [PATCH 1154/4650] [2021-05-23T22:02:39+0000] e2e test


From c0fadb36c419f5dad42ff975fd0e9ebc35dc5533 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 23 May 2021 23:02:45 +0000
Subject: [PATCH 1155/4650] [2021-05-23T23:02:45+0000] e2e test


From bed2385f7ebf3a799f05148d519262c0606d261c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 00:05:46 +0000
Subject: [PATCH 1156/4650] [2021-05-24T00:05:46+0000] e2e test


From d82ec8a7cf422353893a25eee903bd4b3d6dd226 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 01:29:58 +0000
Subject: [PATCH 1157/4650] [2021-05-24T01:29:58+0000] e2e test


From 0e8336b0e2bea9f03d525ef70ffae2cf33cc759f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 02:30:49 +0000
Subject: [PATCH 1158/4650] [2021-05-24T02:30:49+0000] e2e test


From afccd52368df0ccf6440e449d49c88745ab074b0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 03:16:06 +0000
Subject: [PATCH 1159/4650] [2021-05-24T03:16:06+0000] e2e test


From 02ed320abacb9473266f459f6249d64d37359d01 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 04:12:04 +0000
Subject: [PATCH 1160/4650] [2021-05-24T04:12:04+0000] e2e test


From cb204ce916d326e06a8ca6052c0848a9f80e9f73 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 05:11:21 +0000
Subject: [PATCH 1161/4650] [2021-05-24T05:11:21+0000] e2e test


From ae9326567028a4f4e8d13c57e2344fdfbc9fe6eb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 06:04:04 +0000
Subject: [PATCH 1162/4650] [2021-05-24T06:04:04+0000] e2e test


From 41975823a8a0fda8a2c74ab547f1e4a593fd678d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 07:08:48 +0000
Subject: [PATCH 1163/4650] [2021-05-24T07:08:48+0000] e2e test


From 4c3619afefc4308ab825e9d393eeb14361b78560 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 08:02:46 +0000
Subject: [PATCH 1164/4650] [2021-05-24T08:02:46+0000] e2e test


From b5c59d474289f6a54dcaf9f9d784989db66eaabe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 09:03:29 +0000
Subject: [PATCH 1165/4650] [2021-05-24T09:03:29+0000] e2e test


From b8f748b98993549ec145d16670bd97f73d7b1404 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 10:04:41 +0000
Subject: [PATCH 1166/4650] [2021-05-24T10:04:40+0000] e2e test


From 39ca4f70ba3dd3df29ba7d8e93754b964ec7622f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 11:05:06 +0000
Subject: [PATCH 1167/4650] [2021-05-24T11:05:06+0000] e2e test


From 0ab17d38f092578ca72c93b97f1595cef9112043 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 12:02:45 +0000
Subject: [PATCH 1168/4650] [2021-05-24T12:02:45+0000] e2e test


From 3793e85e35faa4c4fe2b5bf65fcb38ee8268b5ad Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 13:14:57 +0000
Subject: [PATCH 1169/4650] [2021-05-24T13:14:57+0000] e2e test


From 33560b293f05896d7d6bad8a221d747ad6c76fa7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 14:05:11 +0000
Subject: [PATCH 1170/4650] [2021-05-24T14:05:11+0000] e2e test


From 9199bbf767a453ddf4cb2b06068fef8445430999 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 15:02:36 +0000
Subject: [PATCH 1171/4650] [2021-05-24T15:02:36+0000] e2e test


From 7e633e40cc755ce554cc8ff8dab2e7d30685cf55 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 16:08:39 +0000
Subject: [PATCH 1172/4650] [2021-05-24T16:08:39+0000] e2e test


From e3d1df8f0265c847d18ff66854a041044aec43cb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 17:22:56 +0000
Subject: [PATCH 1173/4650] [2021-05-24T17:22:56+0000] e2e test


From eec2802befef49a74961cf3b32ec9520619c6656 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 18:16:05 +0000
Subject: [PATCH 1174/4650] [2021-05-24T18:16:05+0000] e2e test


From fbfd8f777f8737c2be18c246b0814044a53f2dac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 19:16:05 +0000
Subject: [PATCH 1175/4650] [2021-05-24T19:16:05+0000] e2e test


From 4631d28c5fc153e5763adfe7f704bf4b0ea5f8fb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 20:02:47 +0000
Subject: [PATCH 1176/4650] [2021-05-24T20:02:47+0000] e2e test


From 81428627da26aa949c3ab130f29979daa8a0909f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 21:02:42 +0000
Subject: [PATCH 1177/4650] [2021-05-24T21:02:42+0000] e2e test


From e07d78ee5862d4648a8340d1ce576b4e66ac7eee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 22:02:42 +0000
Subject: [PATCH 1178/4650] [2021-05-24T22:02:42+0000] e2e test


From 1df6c1d7122cb4df87b49c4b265b9816799004f4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 24 May 2021 23:02:39 +0000
Subject: [PATCH 1179/4650] [2021-05-24T23:02:39+0000] e2e test


From edf715853b36404de760b0babfcef193da761220 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 00:06:04 +0000
Subject: [PATCH 1180/4650] [2021-05-25T00:06:04+0000] e2e test


From 355c1054116ee16f4cc088426c9a5f8bd21b372a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 01:29:03 +0000
Subject: [PATCH 1181/4650] [2021-05-25T01:29:03+0000] e2e test


From 0c9a4c114075245096e089aec64bda714dbbd53d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 02:31:28 +0000
Subject: [PATCH 1182/4650] [2021-05-25T02:31:28+0000] e2e test


From 3ef72b18ca46d48b3425ca3baa76d9ae0c1e9c25 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 03:19:14 +0000
Subject: [PATCH 1183/4650] [2021-05-25T03:19:14+0000] e2e test


From 6c9b77f09d948bc0811b7e44a1fffb84e050bb04 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 04:14:27 +0000
Subject: [PATCH 1184/4650] [2021-05-25T04:14:26+0000] e2e test


From b331768011e7d02d235ec2f325045112cfb0be17 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 05:16:54 +0000
Subject: [PATCH 1185/4650] [2021-05-25T05:16:54+0000] e2e test


From f01593d8a75bafae91c18e7cfe3f119907c5b130 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 06:10:35 +0000
Subject: [PATCH 1186/4650] [2021-05-25T06:10:35+0000] e2e test


From 98b740e1f49d08bb38c1844d52ba950d0d265ee0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 07:12:49 +0000
Subject: [PATCH 1187/4650] [2021-05-25T07:12:49+0000] e2e test


From d4987fd9533b0a46e47e2e4441c56b0a0f07a11d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 08:05:49 +0000
Subject: [PATCH 1188/4650] [2021-05-25T08:05:49+0000] e2e test


From 0a0c085009883c68048f0e703a14207b8cbb7f56 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 09:06:17 +0000
Subject: [PATCH 1189/4650] [2021-05-25T09:06:17+0000] e2e test


From a7e0f2111bf75a66d26c1b8d35cdd2edec6063cd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 10:07:05 +0000
Subject: [PATCH 1190/4650] [2021-05-25T10:07:05+0000] e2e test


From 5ae4e3dabf4c1199971c3548576c0d355ff4a9cd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 11:07:24 +0000
Subject: [PATCH 1191/4650] [2021-05-25T11:07:24+0000] e2e test


From cde7073b27da85ef2e60d89f973c3c39caec63c0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 12:02:54 +0000
Subject: [PATCH 1192/4650] [2021-05-25T12:02:54+0000] e2e test


From af8e660ad2923892b4faeeb05f4be30209a89888 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 13:16:12 +0000
Subject: [PATCH 1193/4650] [2021-05-25T13:16:12+0000] e2e test


From d474cc484fd34a563b59239ef4b108e914f817d4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 14:08:57 +0000
Subject: [PATCH 1194/4650] [2021-05-25T14:08:57+0000] e2e test


From b03d059a79f7b90fa969af247e42e36010327430 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 15:02:42 +0000
Subject: [PATCH 1195/4650] [2021-05-25T15:02:42+0000] e2e test


From fa96eb18b5bbba64dca753563ee8b9ca87062106 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 16:09:01 +0000
Subject: [PATCH 1196/4650] [2021-05-25T16:09:01+0000] e2e test


From 7dd097c8d59a655e8f2e1e68c520861549e5511a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 17:24:40 +0000
Subject: [PATCH 1197/4650] [2021-05-25T17:24:40+0000] e2e test


From 69a3c3943fe9cd8ac71d5247125de05bb290936d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 18:21:26 +0000
Subject: [PATCH 1198/4650] [2021-05-25T18:21:26+0000] e2e test


From 1b09a34d84a0ac78fe981cc0b6165d9f607f38ad Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 19:16:05 +0000
Subject: [PATCH 1199/4650] [2021-05-25T19:16:05+0000] e2e test


From 4ace13ac94301a66e44014ce2f07eec19c4a842f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 20:03:49 +0000
Subject: [PATCH 1200/4650] [2021-05-25T20:03:49+0000] e2e test


From 98bd27380f27380f8cf2eb12470df3754481e210 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 21:02:43 +0000
Subject: [PATCH 1201/4650] [2021-05-25T21:02:43+0000] e2e test


From 8d3d2c32b6d5d35af54e27d91398b014898027f9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 22:03:06 +0000
Subject: [PATCH 1202/4650] [2021-05-25T22:03:06+0000] e2e test


From e2a87cae94ad69595ca5963f7a96ddb1f332bf51 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 25 May 2021 23:04:44 +0000
Subject: [PATCH 1203/4650] [2021-05-25T23:04:44+0000] e2e test


From 3e31682034e6a43be37d4f2dcd9aef8a83ccec69 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 00:09:55 +0000
Subject: [PATCH 1204/4650] [2021-05-26T00:09:55+0000] e2e test


From 125de2cadadd47e98cc7024e25750125e69d1d00 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 01:30:59 +0000
Subject: [PATCH 1205/4650] [2021-05-26T01:30:59+0000] e2e test


From 1013f556950a952a0b4273833ea4c3384d203e03 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 02:36:14 +0000
Subject: [PATCH 1206/4650] [2021-05-26T02:36:14+0000] e2e test


From 39a3bba61f537465fd7f0cbba1483961735250a5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 03:31:04 +0000
Subject: [PATCH 1207/4650] [2021-05-26T03:31:04+0000] e2e test


From 305ce2a3337c392baecac2bad24af8e14d8238ed Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 04:23:11 +0000
Subject: [PATCH 1208/4650] [2021-05-26T04:23:11+0000] e2e test


From b06990a4274754248a58ddc78fada15434a01de0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 05:19:32 +0000
Subject: [PATCH 1209/4650] [2021-05-26T05:19:32+0000] e2e test


From 7ee5add164bc2414f07878310c72d7071010a3e4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 06:14:09 +0000
Subject: [PATCH 1210/4650] [2021-05-26T06:14:09+0000] e2e test


From aed54bae460b3e95c2085adfe03bf264cfc274c2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 07:17:09 +0000
Subject: [PATCH 1211/4650] [2021-05-26T07:17:09+0000] e2e test


From c4d54659a2bb812daf9a85d15d59cb96bdb65c5d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 08:12:00 +0000
Subject: [PATCH 1212/4650] [2021-05-26T08:12:00+0000] e2e test


From e599500be51c353a3b826f07504a844156b35f52 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 09:09:20 +0000
Subject: [PATCH 1213/4650] [2021-05-26T09:09:20+0000] e2e test


From 3b36db26d2cb9e6f069a400bd07be6e8cd59453f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 10:09:52 +0000
Subject: [PATCH 1214/4650] [2021-05-26T10:09:51+0000] e2e test


From a4a0f7837b2b5b9c7fd99c05a7c125e82656908f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 11:09:23 +0000
Subject: [PATCH 1215/4650] [2021-05-26T11:09:23+0000] e2e test


From 22a551a5fd31d19469b2d85b3c8ba1ff47610d56 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 12:04:21 +0000
Subject: [PATCH 1216/4650] [2021-05-26T12:04:21+0000] e2e test


From cf5d8418a3a115f4e667d842063045b90996e92e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 13:17:08 +0000
Subject: [PATCH 1217/4650] [2021-05-26T13:17:08+0000] e2e test


From f00a116ad3d5b8cf1f3f5b373d3cb6a1f1d5d5d2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 14:12:54 +0000
Subject: [PATCH 1218/4650] [2021-05-26T14:12:54+0000] e2e test


From fb4a1303c3068ee7587d410eb0614a2b2be208bd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 15:03:46 +0000
Subject: [PATCH 1219/4650] [2021-05-26T15:03:45+0000] e2e test


From 2690ac39aae5cdec318a40bd381cb8d10152ab49 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 16:10:38 +0000
Subject: [PATCH 1220/4650] [2021-05-26T16:10:37+0000] e2e test


From 3ee175d5ab0d845dd7397305af0c6f7db28182bf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 17:26:34 +0000
Subject: [PATCH 1221/4650] [2021-05-26T17:26:34+0000] e2e test


From 720dc48ec96ac870894aff7e5b5203563598a4cc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 18:27:54 +0000
Subject: [PATCH 1222/4650] [2021-05-26T18:27:54+0000] e2e test


From 8141916afa01b97ed94ab024ddc760e1c637b6df Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 19:20:56 +0000
Subject: [PATCH 1223/4650] [2021-05-26T19:20:56+0000] e2e test


From ab9780b76780f76e3762b170d63ce9a315b18ede Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 20:11:37 +0000
Subject: [PATCH 1224/4650] [2021-05-26T20:11:37+0000] e2e test


From c94d7015a0f0bba1e1783f84e8de7f521849c2ed Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 21:06:07 +0000
Subject: [PATCH 1225/4650] [2021-05-26T21:06:07+0000] e2e test


From 55bd74d218cd8b404716b6ca87e7c72caa1252a3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 22:05:28 +0000
Subject: [PATCH 1226/4650] [2021-05-26T22:05:28+0000] e2e test


From e60e4fd4a58c375ee019354d785360da8e35d90a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 26 May 2021 23:06:44 +0000
Subject: [PATCH 1227/4650] [2021-05-26T23:06:44+0000] e2e test


From f772b90fbe5f4902b12ca7176dd7f387cf7bdddb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 00:10:48 +0000
Subject: [PATCH 1228/4650] [2021-05-27T00:10:48+0000] e2e test


From 9f177d27a8067655c31f4383f02afe4cbe1b526f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 01:31:12 +0000
Subject: [PATCH 1229/4650] [2021-05-27T01:31:12+0000] e2e test


From f2fc909210ee527ac77ca99fc885d90d835a2ce1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 02:46:33 +0000
Subject: [PATCH 1230/4650] [2021-05-27T02:46:33+0000] e2e test


From ce69b8b87224c36282e097e611b6b09714ee82ac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 03:33:06 +0000
Subject: [PATCH 1231/4650] [2021-05-27T03:33:06+0000] e2e test


From d647634d6a426df7952cf5dae86b628a55c2fb73 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 04:23:30 +0000
Subject: [PATCH 1232/4650] [2021-05-27T04:23:30+0000] e2e test


From 1e6178bbb8a124532a5fe5873fc6d74d6997134e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 05:25:57 +0000
Subject: [PATCH 1233/4650] [2021-05-27T05:25:57+0000] e2e test


From 9c56707fbaca1feedbd50cdca21e65902cc5be1a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 06:17:40 +0000
Subject: [PATCH 1234/4650] [2021-05-27T06:17:40+0000] e2e test


From 69278adaa6b15f2a9372a029ab97e8371a454561 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 07:20:09 +0000
Subject: [PATCH 1235/4650] [2021-05-27T07:20:08+0000] e2e test


From 5df80520ae4e97f47f9da121aeea0987b7c20c64 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 08:16:15 +0000
Subject: [PATCH 1236/4650] [2021-05-27T08:16:15+0000] e2e test


From 79793a627988f6feac5f356a29b46fe2bcf04356 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 09:16:07 +0000
Subject: [PATCH 1237/4650] [2021-05-27T09:16:07+0000] e2e test


From a46df01037f38381932fa4f59abe6a9c5b114807 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 10:15:04 +0000
Subject: [PATCH 1238/4650] [2021-05-27T10:15:04+0000] e2e test


From 07d59ba951305e1de6f0aed9e3a4ad6e13bf933d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 11:15:23 +0000
Subject: [PATCH 1239/4650] [2021-05-27T11:15:23+0000] e2e test


From 5cfbeaa0abe9e588c667285e596fcd2e8ea88c75 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 12:09:54 +0000
Subject: [PATCH 1240/4650] [2021-05-27T12:09:54+0000] e2e test


From fbe4f0a4817bba046647897fd407967edbaeb2ae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 13:21:09 +0000
Subject: [PATCH 1241/4650] [2021-05-27T13:21:09+0000] e2e test


From c9db4db848265129cdb4838df9eb5af2c7c35c78 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 14:15:34 +0000
Subject: [PATCH 1242/4650] [2021-05-27T14:15:34+0000] e2e test


From 50a00f42dca6388a75a94a9ef2c7e92099da22e8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 15:09:28 +0000
Subject: [PATCH 1243/4650] [2021-05-27T15:09:28+0000] e2e test


From fd84fe3d264a15a8ee9342bf2bb969a35deb5bb6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 16:14:40 +0000
Subject: [PATCH 1244/4650] [2021-05-27T16:14:40+0000] e2e test


From 37a9b11b8de9c480e8d4fdf677ee017d64d39d8f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 17:29:18 +0000
Subject: [PATCH 1245/4650] [2021-05-27T17:29:18+0000] e2e test


From f18e370122ae28fd4c8af2dfcee81b6a2bf97e86 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 18:31:38 +0000
Subject: [PATCH 1246/4650] [2021-05-27T18:31:38+0000] e2e test


From 59fc44bdd1939c842d9b77302691d5eb10198ca0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 19:21:59 +0000
Subject: [PATCH 1247/4650] [2021-05-27T19:21:59+0000] e2e test


From 7eee39d7b6efa2d89db88e0927330eeaf452e7f2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 20:09:19 +0000
Subject: [PATCH 1248/4650] [2021-05-27T20:09:19+0000] e2e test


From 9fa4087e7c291c87272a2a59ba0c9cf3a22fa3b8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 21:06:11 +0000
Subject: [PATCH 1249/4650] [2021-05-27T21:06:11+0000] e2e test


From f416aafe2a66855034bd0a731b00367971ce40c2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 22:06:31 +0000
Subject: [PATCH 1250/4650] [2021-05-27T22:06:31+0000] e2e test


From c77ffdc603575ef18cafe77ba19eb7c21311e770 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 27 May 2021 23:08:01 +0000
Subject: [PATCH 1251/4650] [2021-05-27T23:08:01+0000] e2e test


From b85c248cf8e22dd88e89d2093cca30f133f112a1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 00:11:34 +0000
Subject: [PATCH 1252/4650] [2021-05-28T00:11:34+0000] e2e test


From ec1eef065260f8a3bf02e31f9175e789697e7187 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 01:31:20 +0000
Subject: [PATCH 1253/4650] [2021-05-28T01:31:20+0000] e2e test


From 7f939266405142e1986080ddd2309db7a0f84332 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 02:51:06 +0000
Subject: [PATCH 1254/4650] [2021-05-28T02:51:05+0000] e2e test


From 15153fd58c1cbafa59001430c2f0dc8a6de96668 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 03:51:51 +0000
Subject: [PATCH 1255/4650] [2021-05-28T03:51:51+0000] e2e test


From e346a2e4978659806a7f5ec5ef7d06404dee02f1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 04:32:16 +0000
Subject: [PATCH 1256/4650] [2021-05-28T04:32:16+0000] e2e test


From 7012fa5cd96a25fc94f5a2edd2f6fda907d9fba8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 05:31:42 +0000
Subject: [PATCH 1257/4650] [2021-05-28T05:31:42+0000] e2e test


From bf03fc136082899316c0a4f0d7ccde7b061d2728 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 06:29:10 +0000
Subject: [PATCH 1258/4650] [2021-05-28T06:29:10+0000] e2e test


From 1b8f7eb1b2a2c125534fbec5468c3eb49ac3f283 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 07:25:00 +0000
Subject: [PATCH 1259/4650] [2021-05-28T07:25:00+0000] e2e test


From c283bb8a3474d9414840394f56ab6c17aab8b6c9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 08:18:36 +0000
Subject: [PATCH 1260/4650] [2021-05-28T08:18:36+0000] e2e test


From 21b784e6e96995542b8bea776f8bf228126b7cc9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 09:16:30 +0000
Subject: [PATCH 1261/4650] [2021-05-28T09:16:30+0000] e2e test


From 538f3e66319aff0654682e68971cd2c5a01c2353 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 10:16:31 +0000
Subject: [PATCH 1262/4650] [2021-05-28T10:16:31+0000] e2e test


From a19ba6c1433d41c3ed803c4c11f66a733e8b2ec7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 11:17:23 +0000
Subject: [PATCH 1263/4650] [2021-05-28T11:17:23+0000] e2e test


From c5fcd6bb55d22b76c9091495ea4f45e11b1f7094 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 12:15:52 +0000
Subject: [PATCH 1264/4650] [2021-05-28T12:15:52+0000] e2e test


From 5143f36a580052b610b61355a6817eaf80860d4f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 13:23:12 +0000
Subject: [PATCH 1265/4650] [2021-05-28T13:23:12+0000] e2e test


From 234718321166326b49a9ef1d3ba05ad5e4aed42f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 14:15:11 +0000
Subject: [PATCH 1266/4650] [2021-05-28T14:15:11+0000] e2e test


From 70cabe7cdf562fded9cdf500d4213f596a060922 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 15:05:24 +0000
Subject: [PATCH 1267/4650] [2021-05-28T15:05:24+0000] e2e test


From 289203d120ba5a18c180c669277ab56904160178 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 16:13:42 +0000
Subject: [PATCH 1268/4650] [2021-05-28T16:13:42+0000] e2e test


From c2bcf0e8d467409c0d8d0a7ee39012dbc017a718 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 17:29:20 +0000
Subject: [PATCH 1269/4650] [2021-05-28T17:29:20+0000] e2e test


From ae7f5177a24b5523b5800ccceef2a5efe5e118b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 18:32:30 +0000
Subject: [PATCH 1270/4650] [2021-05-28T18:32:30+0000] e2e test


From 08ae8ea5c483ecb9dff8e10cb43dc02f98acc843 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 19:26:42 +0000
Subject: [PATCH 1271/4650] [2021-05-28T19:26:42+0000] e2e test


From d61ae2faf30fba37499c75b24072e08dc274643f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 20:20:43 +0000
Subject: [PATCH 1272/4650] [2021-05-28T20:20:43+0000] e2e test


From 5ab5560514c2c43255d6981c7745a63f1ed8124f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 21:09:43 +0000
Subject: [PATCH 1273/4650] [2021-05-28T21:09:43+0000] e2e test


From 93fdaf9e6cebfd0c354ed9d5d47f8a2c6979a880 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 22:07:57 +0000
Subject: [PATCH 1274/4650] [2021-05-28T22:07:57+0000] e2e test


From 646a374dffb6ded1f85ac6d1f358ad6724cb0dd0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 28 May 2021 23:10:20 +0000
Subject: [PATCH 1275/4650] [2021-05-28T23:10:19+0000] e2e test


From f9d23186547ae896d622a35564dbd8992b4f73d8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 00:15:29 +0000
Subject: [PATCH 1276/4650] [2021-05-29T00:15:29+0000] e2e test


From 8fce3a3dcfa3cd26bff6b35dda0b4d013ec1e310 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 01:31:43 +0000
Subject: [PATCH 1277/4650] [2021-05-29T01:31:43+0000] e2e test


From 1892f0495cbd17416351dda259afe97fb436008f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 02:54:46 +0000
Subject: [PATCH 1278/4650] [2021-05-29T02:54:46+0000] e2e test


From 7d7dceedcb3361d876aa586e967e40d5b8e35a03 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 04:00:56 +0000
Subject: [PATCH 1279/4650] [2021-05-29T04:00:56+0000] e2e test


From d4282410dffb48235ac70ced206fa5113888c7da Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 05:42:14 +0000
Subject: [PATCH 1280/4650] [2021-05-29T05:42:14+0000] e2e test


From fb765a7c60c003dbf411c873363f6a9f15158cec Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 06:36:04 +0000
Subject: [PATCH 1281/4650] [2021-05-29T06:36:04+0000] e2e test


From 81ade986d3bc6284314c343cfac4f275371c5465 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 07:31:30 +0000
Subject: [PATCH 1282/4650] [2021-05-29T07:31:30+0000] e2e test


From f41b0e97e0b0b6e6c284d6c9661b67869680a50c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 08:30:40 +0000
Subject: [PATCH 1283/4650] [2021-05-29T08:30:39+0000] e2e test


From dca926272f90a71a4e88a28f96a6cae53d4774e8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 09:21:16 +0000
Subject: [PATCH 1284/4650] [2021-05-29T09:21:16+0000] e2e test


From aae677f46cdd76d0bd06d438e503b000a4f21878 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 10:16:18 +0000
Subject: [PATCH 1285/4650] [2021-05-29T10:16:18+0000] e2e test


From a0e83a339778de184422230b9f4dc5fa422da281 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 11:17:19 +0000
Subject: [PATCH 1286/4650] [2021-05-29T11:17:19+0000] e2e test


From 66ea2565f86ecd375f415f0d40bd33610d5120f6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 12:13:10 +0000
Subject: [PATCH 1287/4650] [2021-05-29T12:13:10+0000] e2e test


From 8902e86c0b3bc3c54a90c5f92b31e290fb2814ce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 13:24:57 +0000
Subject: [PATCH 1288/4650] [2021-05-29T13:24:57+0000] e2e test


From 9a2df0ac2cb4c44afb0d4ebbe9febb3698add1e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 14:21:59 +0000
Subject: [PATCH 1289/4650] [2021-05-29T14:21:59+0000] e2e test


From f148294c34e1656dd7192d1b5620086cfbfdfc4c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 15:08:21 +0000
Subject: [PATCH 1290/4650] [2021-05-29T15:08:21+0000] e2e test


From cfc3a664b2043e6185941824b8334b912ab0d3f8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 16:15:24 +0000
Subject: [PATCH 1291/4650] [2021-05-29T16:15:24+0000] e2e test


From 55c4dab343325385b4605aa3488f1ce05f9ec0bb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 17:30:07 +0000
Subject: [PATCH 1292/4650] [2021-05-29T17:30:07+0000] e2e test


From 079eb3d19424d2afe84aaf5c46e29f8e35bcac90 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 18:34:45 +0000
Subject: [PATCH 1293/4650] [2021-05-29T18:34:45+0000] e2e test


From f0080e9bc5f1ee3604bd8a6495148e597f075404 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 19:29:38 +0000
Subject: [PATCH 1294/4650] [2021-05-29T19:29:38+0000] e2e test


From ef5a3afe13ec6c3925ee481bb331a5b68af2ff6f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 20:22:38 +0000
Subject: [PATCH 1295/4650] [2021-05-29T20:22:38+0000] e2e test


From 4a9be30311c357f788ca92135b550cad904400f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 21:12:25 +0000
Subject: [PATCH 1296/4650] [2021-05-29T21:12:25+0000] e2e test


From 5ca9a0a819cbe39141fb5022683624d6ded38f4e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 22:10:14 +0000
Subject: [PATCH 1297/4650] [2021-05-29T22:10:14+0000] e2e test


From e3043cda800619e3fd4c1b0e2af126d46f8e84a0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 29 May 2021 23:11:07 +0000
Subject: [PATCH 1298/4650] [2021-05-29T23:11:07+0000] e2e test


From 52dd41701482be0c2c22057749a03faed7876bf5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 00:17:10 +0000
Subject: [PATCH 1299/4650] [2021-05-30T00:17:10+0000] e2e test


From 60c236db3f74058fe91f819f38bdc336bfe4d883 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 01:31:44 +0000
Subject: [PATCH 1300/4650] [2021-05-30T01:31:44+0000] e2e test


From 7dbcec54bb817522d4216e0b55c1ee1eaa0b6fb5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 02:57:14 +0000
Subject: [PATCH 1301/4650] [2021-05-30T02:57:14+0000] e2e test


From 0f8b4219ca89b86dee88bf19ea78b2a551a61d2a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 04:05:03 +0000
Subject: [PATCH 1302/4650] [2021-05-30T04:05:03+0000] e2e test


From 8eef8db47bd50eba2ca6f1cd5b6485e217891c8c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 05:32:22 +0000
Subject: [PATCH 1303/4650] [2021-05-30T05:32:22+0000] e2e test


From d93ecdd67befa5e30e086d705218dcb5d3144034 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 06:32:23 +0000
Subject: [PATCH 1304/4650] [2021-05-30T06:32:23+0000] e2e test


From 9406cd9077f2cfe3f466cb4e488a2e8f4f06d792 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 07:27:48 +0000
Subject: [PATCH 1305/4650] [2021-05-30T07:27:48+0000] e2e test


From e3a5a22cdeb3c67f370e269a55dea4e1b836c11b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 08:22:23 +0000
Subject: [PATCH 1306/4650] [2021-05-30T08:22:23+0000] e2e test


From 936444f5ff8d09fd4091fec68c485da74c065faf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 09:16:33 +0000
Subject: [PATCH 1307/4650] [2021-05-30T09:16:33+0000] e2e test


From d6f0c053ff4cbb215dd2afd1f623f335b65def94 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 10:16:47 +0000
Subject: [PATCH 1308/4650] [2021-05-30T10:16:47+0000] e2e test


From e6c73355c2824c518f62d5dd9fb96aafc6d1b762 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 11:17:30 +0000
Subject: [PATCH 1309/4650] [2021-05-30T11:17:30+0000] e2e test


From bda5305702817379817e586850d0329d68726640 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 12:15:48 +0000
Subject: [PATCH 1310/4650] [2021-05-30T12:15:48+0000] e2e test


From 300436274697b061eb0dd48db0f653425205952b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 13:24:33 +0000
Subject: [PATCH 1311/4650] [2021-05-30T13:24:33+0000] e2e test


From 3d9af210ab3b0e19e15f992264367024f639ec1d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 14:20:12 +0000
Subject: [PATCH 1312/4650] [2021-05-30T14:20:12+0000] e2e test


From d37aa47c85763bf1dcd81d2a3d0073c94b215189 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 15:08:05 +0000
Subject: [PATCH 1313/4650] [2021-05-30T15:08:05+0000] e2e test


From ca30c01544125af2e2a1e9e52319523c322a5d99 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 16:16:05 +0000
Subject: [PATCH 1314/4650] [2021-05-30T16:16:05+0000] e2e test


From 43832641abad85119ac416368efd5fe772f81699 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 17:29:54 +0000
Subject: [PATCH 1315/4650] [2021-05-30T17:29:53+0000] e2e test


From 586aae56060cb0678da9527297f35d14b559242a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 18:32:49 +0000
Subject: [PATCH 1316/4650] [2021-05-30T18:32:49+0000] e2e test


From 110e0e768e5499bae8030c044b356a8a26c4104a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 19:28:03 +0000
Subject: [PATCH 1317/4650] [2021-05-30T19:28:02+0000] e2e test


From 3a4d8a87248513137ef74f3a1fcd58d6512b9fda Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 20:22:18 +0000
Subject: [PATCH 1318/4650] [2021-05-30T20:22:18+0000] e2e test


From 4de45ea4e5ef867e5cc908a5f130ee24ca51ea8e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 21:13:15 +0000
Subject: [PATCH 1319/4650] [2021-05-30T21:13:15+0000] e2e test


From 447972c09c1636247ff8302c72b551fa4c774094 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 22:11:19 +0000
Subject: [PATCH 1320/4650] [2021-05-30T22:11:18+0000] e2e test


From 32a35548b638ed9a11675ad7e03c0ca571fccc24 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 30 May 2021 23:14:11 +0000
Subject: [PATCH 1321/4650] [2021-05-30T23:14:11+0000] e2e test


From 4360a9b19e03a9c2302ffacec0770accf17d3e20 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 00:19:14 +0000
Subject: [PATCH 1322/4650] [2021-05-31T00:19:14+0000] e2e test


From 0a74db0b21d9de9dc9bc9b93998d68bad4ab3602 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 01:31:59 +0000
Subject: [PATCH 1323/4650] [2021-05-31T01:31:59+0000] e2e test


From 05faaccebfcc83f86b47f63182317370a58ba21e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 02:58:30 +0000
Subject: [PATCH 1324/4650] [2021-05-31T02:58:30+0000] e2e test


From 9e0681be64cd5c33488dffc9c9ba36106868e196 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 04:07:27 +0000
Subject: [PATCH 1325/4650] [2021-05-31T04:07:27+0000] e2e test


From 64984f0364dacfa4ce07c3590ff7ba69596379ab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 05:34:30 +0000
Subject: [PATCH 1326/4650] [2021-05-31T05:34:29+0000] e2e test


From 63b98015122fb8d0f1652c85a8e4932a5d2ba8a5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 06:34:41 +0000
Subject: [PATCH 1327/4650] [2021-05-31T06:34:41+0000] e2e test


From 032004bddc46d9cf4d00b213f532f2b84947012a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 07:31:06 +0000
Subject: [PATCH 1328/4650] [2021-05-31T07:31:06+0000] e2e test


From 875d2e37f47d6e6980da24dd5ffa7cf32a2942e4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 08:31:37 +0000
Subject: [PATCH 1329/4650] [2021-05-31T08:31:37+0000] e2e test


From 5836b5e00f89b5f534a266b07165bb32f7c1254c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 09:24:42 +0000
Subject: [PATCH 1330/4650] [2021-05-31T09:24:42+0000] e2e test


From e844a1023240e8c32759e99d8a25e8912814915f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 10:19:11 +0000
Subject: [PATCH 1331/4650] [2021-05-31T10:19:11+0000] e2e test


From ac791ebd9b06ecc7a9520c2f5f2aa74194f72b61 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 11:23:33 +0000
Subject: [PATCH 1332/4650] [2021-05-31T11:23:33+0000] e2e test


From fc5f0199374f164066911968c5bb5128559c4f02 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 12:15:38 +0000
Subject: [PATCH 1333/4650] [2021-05-31T12:15:38+0000] e2e test


From 7f792865845c2fa5c045820ae2c869e85bec3825 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 13:25:26 +0000
Subject: [PATCH 1334/4650] [2021-05-31T13:25:26+0000] e2e test


From d92a64941a214f4afb3e366ef60206a2fbb71245 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 14:20:15 +0000
Subject: [PATCH 1335/4650] [2021-05-31T14:20:15+0000] e2e test


From 71cb06d411f4e62c380cf94e0d5a623235f1d6b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 15:11:54 +0000
Subject: [PATCH 1336/4650] [2021-05-31T15:11:53+0000] e2e test


From 58af4b4a367883f0a763246c18f22a7a8961c1d3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 16:19:28 +0000
Subject: [PATCH 1337/4650] [2021-05-31T16:19:28+0000] e2e test


From 330ed3e76636d6d22b347aab9760b96e1e195acf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 17:31:15 +0000
Subject: [PATCH 1338/4650] [2021-05-31T17:31:15+0000] e2e test


From 6c1f3a1e196aa9b22b29f8ffd60c9874a57a657c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 18:45:33 +0000
Subject: [PATCH 1339/4650] [2021-05-31T18:45:33+0000] e2e test


From 9d767e54f55a27f30397fdda191e9b066ec3e1d3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 19:32:09 +0000
Subject: [PATCH 1340/4650] [2021-05-31T19:32:09+0000] e2e test


From d3a77138b2fd1dd155d67bc9bc41e8c264c5c5cb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 20:30:09 +0000
Subject: [PATCH 1341/4650] [2021-05-31T20:30:08+0000] e2e test


From d33569fbb260d36be2b918a82f6b06d290527a85 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 21:26:40 +0000
Subject: [PATCH 1342/4650] [2021-05-31T21:26:39+0000] e2e test


From f137f5f6ad4bba98b4f8088115c4e0e8aa32380b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 22:15:43 +0000
Subject: [PATCH 1343/4650] [2021-05-31T22:15:43+0000] e2e test


From 267b7a9e2b124808e09b81b2d7236c4495b88086 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 31 May 2021 23:17:11 +0000
Subject: [PATCH 1344/4650] [2021-05-31T23:17:11+0000] e2e test


From b3cceadf892ca757ced37ec22a64058abe1c9cb9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 00:23:07 +0000
Subject: [PATCH 1345/4650] [2021-06-01T00:23:07+0000] e2e test


From f700352a7e670ae01586a80dd72a673f58f404f8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 01:32:08 +0000
Subject: [PATCH 1346/4650] [2021-06-01T01:32:07+0000] e2e test


From 40f3e062f9ae2e90689ba45fec2414c3c282e82a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 03:01:00 +0000
Subject: [PATCH 1347/4650] [2021-06-01T03:01:00+0000] e2e test


From b807401a957b07a5d866f5527a9bfad52f3d7c2b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 05:08:10 +0000
Subject: [PATCH 1348/4650] [2021-06-01T05:08:10+0000] e2e test


From 785cebbafda7cdc439fe14b397702e3ef09712f3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 06:47:03 +0000
Subject: [PATCH 1349/4650] [2021-06-01T06:47:03+0000] e2e test


From 6d12092e22df32ff3a841f7ac7c98f7d4a35b5d0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 07:32:35 +0000
Subject: [PATCH 1350/4650] [2021-06-01T07:32:35+0000] e2e test


From 363e1e7ec6145668aeac25f258258dcc7523b179 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 08:31:53 +0000
Subject: [PATCH 1351/4650] [2021-06-01T08:31:53+0000] e2e test


From 7d468b17495c2489d399456e352c1462525a8619 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 09:30:43 +0000
Subject: [PATCH 1352/4650] [2021-06-01T09:30:43+0000] e2e test


From e45daaa34772110a3b4ca9dbce735b191bf8ae9e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 10:21:32 +0000
Subject: [PATCH 1353/4650] [2021-06-01T10:21:32+0000] e2e test


From a7e06fe32d49bdc71ce72ac616b4c9bc083adfd1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 11:22:46 +0000
Subject: [PATCH 1354/4650] [2021-06-01T11:22:46+0000] e2e test


From a85800da552b9476d407c2285e2aa713bd0264fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 12:17:46 +0000
Subject: [PATCH 1355/4650] [2021-06-01T12:17:46+0000] e2e test


From d3a2c0d458db65a4c0854914abbcda4ccabd7014 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 13:28:25 +0000
Subject: [PATCH 1356/4650] [2021-06-01T13:28:25+0000] e2e test


From 9205251e7bff985ea9740d411d9f78a1d2ab5ebf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 14:30:03 +0000
Subject: [PATCH 1357/4650] [2021-06-01T14:30:03+0000] e2e test


From 922f71aadb40116c07f93b45ffdce539e3f12f3b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 15:16:22 +0000
Subject: [PATCH 1358/4650] [2021-06-01T15:16:22+0000] e2e test


From 83ffa0b8bc1844f18d0418b1573b17f3bbdd4ea6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 16:22:40 +0000
Subject: [PATCH 1359/4650] [2021-06-01T16:22:40+0000] e2e test


From 0b6a4f1a02310607fdc01bd899be89a2e5b439c7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 17:32:06 +0000
Subject: [PATCH 1360/4650] [2021-06-01T17:32:06+0000] e2e test


From 3536a90c08a8cc405ba4f4150416d5bd442d78ff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 18:56:01 +0000
Subject: [PATCH 1361/4650] [2021-06-01T18:56:01+0000] e2e test


From 019ebc44a9ec5acfa7176ed49b1bb3c9770ae94d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 19:57:08 +0000
Subject: [PATCH 1362/4650] [2021-06-01T19:57:08+0000] e2e test


From cab89f89ea1df0e6eb2bff2c236b02077e0af2ce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 20:51:24 +0000
Subject: [PATCH 1363/4650] [2021-06-01T20:51:24+0000] e2e test


From 8d65be75c894886f7726bac0788b6590b7144798 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 21:31:04 +0000
Subject: [PATCH 1364/4650] [2021-06-01T21:31:04+0000] e2e test


From 902db79fa0ca82258507bfeaadc54ad9bf7e1a3e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 22:26:41 +0000
Subject: [PATCH 1365/4650] [2021-06-01T22:26:40+0000] e2e test


From e475acf2493f7747c24ac56e0c9426e9a9e256b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 1 Jun 2021 23:19:45 +0000
Subject: [PATCH 1366/4650] [2021-06-01T23:19:44+0000] e2e test


From 342cf491b800da94519f74a5dc35624dd7dd5916 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 00:22:09 +0000
Subject: [PATCH 1367/4650] [2021-06-02T00:22:09+0000] e2e test


From 9a747cc5a32eca2d09a3ff454a4a7f6deac45ca4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 01:32:15 +0000
Subject: [PATCH 1368/4650] [2021-06-02T01:32:15+0000] e2e test


From 8b09e759e8d96759c6ae63995e4b40898167a7a1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 03:01:04 +0000
Subject: [PATCH 1369/4650] [2021-06-02T03:01:04+0000] e2e test


From a5ba5595b1dfaa19516274789c7e52d3fa68796c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 05:05:17 +0000
Subject: [PATCH 1370/4650] [2021-06-02T05:05:17+0000] e2e test


From 8a536782993e76fcb2e4e619697ebffeff0c664e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 06:47:19 +0000
Subject: [PATCH 1371/4650] [2021-06-02T06:47:19+0000] e2e test


From 7481b8a5c9c601338c717acde574fbd118ddb41d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 07:33:44 +0000
Subject: [PATCH 1372/4650] [2021-06-02T07:33:44+0000] e2e test


From b6a8a9ccc98afc111b2c6cdd359edb8f100c6da4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 09:32:40 +0000
Subject: [PATCH 1373/4650] [2021-06-02T09:32:40+0000] e2e test


From cb5e36fa9d16f58e22abbaf28576e451fe3e2016 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 10:31:22 +0000
Subject: [PATCH 1374/4650] [2021-06-02T10:31:21+0000] e2e test


From 0de9dd1b98330586cfed71341ab6af1c08fe3c94 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 11:31:01 +0000
Subject: [PATCH 1375/4650] [2021-06-02T11:31:01+0000] e2e test


From f811ac8e4571ecfbaa0c9c86cdfa6354e60665cd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 12:21:19 +0000
Subject: [PATCH 1376/4650] [2021-06-02T12:21:18+0000] e2e test


From 6b0711057392046c64ab4d6a52149ead0cb746df Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 13:29:56 +0000
Subject: [PATCH 1377/4650] [2021-06-02T13:29:55+0000] e2e test


From 444431483a03cf85fd80076ba217eb5451eed6d6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 14:32:11 +0000
Subject: [PATCH 1378/4650] [2021-06-02T14:32:11+0000] e2e test


From 1015c8ba1b413ab25559ec42830039a6fc414bc0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 15:19:25 +0000
Subject: [PATCH 1379/4650] [2021-06-02T15:19:25+0000] e2e test


From cad550f0d312d6ea7fbfde8262057cfa1bca655f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 16:25:46 +0000
Subject: [PATCH 1380/4650] [2021-06-02T16:25:46+0000] e2e test


From b98f5851498aa9135053d495a84cbb0793d65457 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 17:32:32 +0000
Subject: [PATCH 1381/4650] [2021-06-02T17:32:32+0000] e2e test


From 41330731bf34ad3d657174b80ee59b28ee2934f7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 18:56:13 +0000
Subject: [PATCH 1382/4650] [2021-06-02T18:56:12+0000] e2e test


From 74921fc1616872fb1486f94da5d52ce97cf89f7d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 19:55:33 +0000
Subject: [PATCH 1383/4650] [2021-06-02T19:55:32+0000] e2e test


From f1b4d81f8ade4c63e14296cd414d360e4e139ccd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 20:46:52 +0000
Subject: [PATCH 1384/4650] [2021-06-02T20:46:52+0000] e2e test


From 2f42b36501d6de65ee4e9e231739ebd757074c22 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 21:30:33 +0000
Subject: [PATCH 1385/4650] [2021-06-02T21:30:33+0000] e2e test


From 94e1a2b907b54f24dfa07dac03a03f00eb5f1021 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 22:23:52 +0000
Subject: [PATCH 1386/4650] [2021-06-02T22:23:52+0000] e2e test


From 15047b15656d2926aef902c2abd63e35e3382f5a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 2 Jun 2021 23:20:05 +0000
Subject: [PATCH 1387/4650] [2021-06-02T23:20:05+0000] e2e test


From 555aced5f4b21f328343cfaaf012e2dcab5d4ed7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 00:20:54 +0000
Subject: [PATCH 1388/4650] [2021-06-03T00:20:54+0000] e2e test


From 5d61d4f5da6acb4a359786ad7b46d5e133ca6645 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 01:32:00 +0000
Subject: [PATCH 1389/4650] [2021-06-03T01:32:00+0000] e2e test


From db7e4e5c4c7e599652826983beaaf4d23cb6576f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 02:59:09 +0000
Subject: [PATCH 1390/4650] [2021-06-03T02:59:09+0000] e2e test


From a3acacfdd8ed94c2227f9dafea20731d29004f91 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 04:08:08 +0000
Subject: [PATCH 1391/4650] [2021-06-03T04:08:08+0000] e2e test


From 1ee02ffe181dd968e2363afd676f8816eeec9206 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 05:34:52 +0000
Subject: [PATCH 1392/4650] [2021-06-03T05:34:52+0000] e2e test


From c34118c30ad82a885e68dc5904580c7840345fc3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 06:33:53 +0000
Subject: [PATCH 1393/4650] [2021-06-03T06:33:53+0000] e2e test


From b647012aa3ac19512f6ac0526f9e19f9632ac082 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 07:31:17 +0000
Subject: [PATCH 1394/4650] [2021-06-03T07:31:17+0000] e2e test


From 9df30a4dd18da804430650d3478e423a8571ea3b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 08:31:05 +0000
Subject: [PATCH 1395/4650] [2021-06-03T08:31:05+0000] e2e test


From f6f7d69803b77e2287960b3a320a73006dcc2404 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 09:23:46 +0000
Subject: [PATCH 1396/4650] [2021-06-03T09:23:46+0000] e2e test


From 83ee35ad28340271d2fa27b7ff3de5a91ae6c392 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 10:18:58 +0000
Subject: [PATCH 1397/4650] [2021-06-03T10:18:58+0000] e2e test


From a7a490a775e60058aab8a568f604e36720f066ca Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 11:23:30 +0000
Subject: [PATCH 1398/4650] [2021-06-03T11:23:30+0000] e2e test


From eb1c343f740d7bcab6d83883ee0a07f282280198 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 12:12:55 +0000
Subject: [PATCH 1399/4650] [2021-06-03T12:12:55+0000] e2e test


From 1db72233494c3d132381663cb1ef9f2a9f7517fe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 13:24:27 +0000
Subject: [PATCH 1400/4650] [2021-06-03T13:24:27+0000] e2e test


From 32959372b3d6143175356795867d196f72af7bfc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 14:17:33 +0000
Subject: [PATCH 1401/4650] [2021-06-03T14:17:33+0000] e2e test


From 9af8596b14e47a0d637dd9d46434bbdf8d50258b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 15:11:48 +0000
Subject: [PATCH 1402/4650] [2021-06-03T15:11:48+0000] e2e test


From f743dedb3363c198485356e9914d643676350da6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 16:17:16 +0000
Subject: [PATCH 1403/4650] [2021-06-03T16:17:16+0000] e2e test


From a677f4073faca55efb94489a7be20f2be240b6e6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 17:31:34 +0000
Subject: [PATCH 1404/4650] [2021-06-03T17:31:34+0000] e2e test


From 912c1f68484f0dde28c6b869f9f6950c2b1d4237 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 18:49:35 +0000
Subject: [PATCH 1405/4650] [2021-06-03T18:49:34+0000] e2e test


From 3a41d705f339897bfb1e99a7fff6ed8d811d44f6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 19:35:00 +0000
Subject: [PATCH 1406/4650] [2021-06-03T19:34:59+0000] e2e test


From 27538e77e5ad8c738998e7471f90bcc523544901 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 20:31:06 +0000
Subject: [PATCH 1407/4650] [2021-06-03T20:31:06+0000] e2e test


From fa48f67d71930da767e361ba0b4150262b76d80c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 21:27:01 +0000
Subject: [PATCH 1408/4650] [2021-06-03T21:27:01+0000] e2e test


From 4d3f19abe1fffa6e0def6652f873bf70674627f5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 22:17:20 +0000
Subject: [PATCH 1409/4650] [2021-06-03T22:17:20+0000] e2e test


From 7c3bcead63baf8de0a1837ee6a9f73af5d44baed Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 3 Jun 2021 23:21:33 +0000
Subject: [PATCH 1410/4650] [2021-06-03T23:21:33+0000] e2e test


From 2a6958ef8168cfd7a27c4b80801d20493af1f8e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 00:23:42 +0000
Subject: [PATCH 1411/4650] [2021-06-04T00:23:42+0000] e2e test


From 0a2bc081dc533e9861ca878a3879f05f93d36571 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 01:31:51 +0000
Subject: [PATCH 1412/4650] [2021-06-04T01:31:51+0000] e2e test


From 147fee9a6e0312c1747a282d315f45d3db080a9f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 02:47:31 +0000
Subject: [PATCH 1413/4650] [2021-06-04T02:47:31+0000] e2e test


From 21c93c99c83a6f960174e1b75123ab08a42d17a4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 03:47:12 +0000
Subject: [PATCH 1414/4650] [2021-06-04T03:47:12+0000] e2e test


From ae0c152ac9279b9abd75f35d09e764658bcba5be Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 04:32:15 +0000
Subject: [PATCH 1415/4650] [2021-06-04T04:32:15+0000] e2e test


From 08be77a5bc300a7f1e882a292e2b51a449fd2942 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 05:31:57 +0000
Subject: [PATCH 1416/4650] [2021-06-04T05:31:56+0000] e2e test


From 5064f6fa1de75f408df318992dd83f81d46ae403 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 06:34:55 +0000
Subject: [PATCH 1417/4650] [2021-06-04T06:34:55+0000] e2e test


From afb6935692d72b97482075042931f88964c3e407 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 07:33:11 +0000
Subject: [PATCH 1418/4650] [2021-06-04T07:33:11+0000] e2e test


From f5bc2840b0483f2e828bd78ea4f02f1ffd93b6ae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 08:35:56 +0000
Subject: [PATCH 1419/4650] [2021-06-04T08:35:56+0000] e2e test


From 3367a365158a7c20c4315fab04696dcacd50300e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 09:32:00 +0000
Subject: [PATCH 1420/4650] [2021-06-04T09:32:00+0000] e2e test


From 26b40c6b48614f5f2da66d9d06a1585cb2e8d0b0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 10:30:43 +0000
Subject: [PATCH 1421/4650] [2021-06-04T10:30:43+0000] e2e test


From aaa438d110b01b675a7f774ca9bd90318d0a0247 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 11:28:08 +0000
Subject: [PATCH 1422/4650] [2021-06-04T11:28:08+0000] e2e test


From 519c0b5b402dd57c4de6d1d7268c9b60aa801db3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 12:25:01 +0000
Subject: [PATCH 1423/4650] [2021-06-04T12:25:00+0000] e2e test


From dcd9c8050488af021f043951633ff4af1dca739e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 13:27:19 +0000
Subject: [PATCH 1424/4650] [2021-06-04T13:27:19+0000] e2e test


From 92d0be711852f5d1a9cc761532951c4e39dab2f3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 14:30:41 +0000
Subject: [PATCH 1425/4650] [2021-06-04T14:30:40+0000] e2e test


From 69185f86e1b305c15cdcb5a43a542f48498e4ee0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 15:17:18 +0000
Subject: [PATCH 1426/4650] [2021-06-04T15:17:18+0000] e2e test


From 2bc8eedbd366056ab62622998a6f38d0db442dd6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 16:23:35 +0000
Subject: [PATCH 1427/4650] [2021-06-04T16:23:35+0000] e2e test


From 6ada1a34ef2bc48bb9f45d15c7657834f0d34a9a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 17:33:48 +0000
Subject: [PATCH 1428/4650] [2021-06-04T17:33:47+0000] e2e test


From 888404535ff33fc36c6590707a4d29ce4cfdc239 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 18:38:39 +0000
Subject: [PATCH 1429/4650] [2021-06-04T18:38:39+0000] e2e test


From bc43037969d264779a01489498c693f5832101f5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 19:31:51 +0000
Subject: [PATCH 1430/4650] [2021-06-04T19:31:51+0000] e2e test


From 09bf8253878ccf30e88fa4a7e9dc1ec7912d9f3d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 20:26:57 +0000
Subject: [PATCH 1431/4650] [2021-06-04T20:26:57+0000] e2e test


From da4844ba513b30daa7329fce626bdd8294446c46 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 21:24:32 +0000
Subject: [PATCH 1432/4650] [2021-06-04T21:24:32+0000] e2e test


From aedde3f1bef7e2aa454aa88042ed91a62f86f544 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 22:14:47 +0000
Subject: [PATCH 1433/4650] [2021-06-04T22:14:46+0000] e2e test


From fef6b37df0012629152eac848b96009b6dd87c61 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 4 Jun 2021 23:16:33 +0000
Subject: [PATCH 1434/4650] [2021-06-04T23:16:33+0000] e2e test


From ae211ef86959b7f07d126e875982077573564589 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 00:17:31 +0000
Subject: [PATCH 1435/4650] [2021-06-05T00:17:31+0000] e2e test


From 6cc2b4f7f6b0e403dfa8786ed694548ac36d457e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 01:31:30 +0000
Subject: [PATCH 1436/4650] [2021-06-05T01:31:30+0000] e2e test


From dc8316345da91b41f93336867a7a52f54ab3b057 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 02:45:50 +0000
Subject: [PATCH 1437/4650] [2021-06-05T02:45:49+0000] e2e test


From 156963b1c1eb4a8929a1f23d46690dc1c5378c53 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 03:32:04 +0000
Subject: [PATCH 1438/4650] [2021-06-05T03:32:03+0000] e2e test


From aa652372d70357d13764591bb9420e441364917d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 04:26:52 +0000
Subject: [PATCH 1439/4650] [2021-06-05T04:26:52+0000] e2e test


From 2cf945dd60858a67594da21d34996e9f0097d0a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 05:30:38 +0000
Subject: [PATCH 1440/4650] [2021-06-05T05:30:38+0000] e2e test


From 26c56dfe0e024f08cc6d4e1f666e9d1318c99740 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 06:23:39 +0000
Subject: [PATCH 1441/4650] [2021-06-05T06:23:39+0000] e2e test


From de69e0336f9acb0ef58b6c4937fde5218a0fcbc7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 07:21:51 +0000
Subject: [PATCH 1442/4650] [2021-06-05T07:21:51+0000] e2e test


From 18f94484af9cd6588ebe1b6eaf38f0aa902b7c92 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 08:15:59 +0000
Subject: [PATCH 1443/4650] [2021-06-05T08:15:58+0000] e2e test


From 4b1625ce20437db4ad074f17c803c9376f0bd562 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 09:17:34 +0000
Subject: [PATCH 1444/4650] [2021-06-05T09:17:33+0000] e2e test


From d9f9edbae9ed7eb4cdd3d89ec45fdd7c84da402d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 10:16:47 +0000
Subject: [PATCH 1445/4650] [2021-06-05T10:16:47+0000] e2e test


From 7985940d7d94a84c8db90ad90f5b0b731860802d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 11:18:06 +0000
Subject: [PATCH 1446/4650] [2021-06-05T11:18:05+0000] e2e test


From 47cde12b83e38bc2b09f07b4ed9675253db657e1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 12:13:14 +0000
Subject: [PATCH 1447/4650] [2021-06-05T12:13:14+0000] e2e test


From 2cba08f18370a91a994787b45808ce5707f6c497 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 13:24:45 +0000
Subject: [PATCH 1448/4650] [2021-06-05T13:24:45+0000] e2e test


From 9787882c47e332336162f4cd3529ffd4109d8507 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 14:17:58 +0000
Subject: [PATCH 1449/4650] [2021-06-05T14:17:58+0000] e2e test


From 2f053ce25cf8c9c70ed0b9139e1baaef80a4903f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 15:04:51 +0000
Subject: [PATCH 1450/4650] [2021-06-05T15:04:51+0000] e2e test


From bc790836a4f8f28ca29fc00622dc4d6c6771c144 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 16:12:19 +0000
Subject: [PATCH 1451/4650] [2021-06-05T16:12:19+0000] e2e test


From b55b8220f68c3d843c19b66a0da32711a7de8f7f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 17:27:18 +0000
Subject: [PATCH 1452/4650] [2021-06-05T17:27:18+0000] e2e test


From 1b80a6c9588d73c72a826cfcdfca9791f2330399 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 18:29:06 +0000
Subject: [PATCH 1453/4650] [2021-06-05T18:29:05+0000] e2e test


From 733e008513b674ceaa72ec4002151d040af1aaf0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 19:22:35 +0000
Subject: [PATCH 1454/4650] [2021-06-05T19:22:35+0000] e2e test


From 83fd8a9fe8e0fcdbe2d6635e09a02cee36bd0e67 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 20:09:54 +0000
Subject: [PATCH 1455/4650] [2021-06-05T20:09:54+0000] e2e test


From 5a0fd7bc036fdeca103dc3baf0f082fdd6c10649 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 21:07:04 +0000
Subject: [PATCH 1456/4650] [2021-06-05T21:07:04+0000] e2e test


From c8a6087522665b9fdd41204a74c24b9028388938 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 22:06:38 +0000
Subject: [PATCH 1457/4650] [2021-06-05T22:06:38+0000] e2e test


From db171107e3cf119744954c52d3fcb90d2c2df97d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 5 Jun 2021 23:08:59 +0000
Subject: [PATCH 1458/4650] [2021-06-05T23:08:59+0000] e2e test


From 11a5d6a9231092e0417b2ed2958b3afcc9a3a993 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 00:11:28 +0000
Subject: [PATCH 1459/4650] [2021-06-06T00:11:28+0000] e2e test


From 4ef33ffa53ee3dec8046b90b0c086daffc599015 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 01:31:05 +0000
Subject: [PATCH 1460/4650] [2021-06-06T01:31:04+0000] e2e test


From d43a210e1b27d8ff6e4e754a11b4a0748ecc66eb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 02:41:30 +0000
Subject: [PATCH 1461/4650] [2021-06-06T02:41:30+0000] e2e test


From 4dead8cee3c0dd31af02290b664c7a51a1870b91 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 03:31:32 +0000
Subject: [PATCH 1462/4650] [2021-06-06T03:31:32+0000] e2e test


From e5ab27eb2d983395b327a3bb3aae62d5f32f419f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 04:26:06 +0000
Subject: [PATCH 1463/4650] [2021-06-06T04:26:06+0000] e2e test


From 5c0c02c3de9d1df6e7fd2fcba31aaac5ef38143d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 05:29:06 +0000
Subject: [PATCH 1464/4650] [2021-06-06T05:29:05+0000] e2e test


From 2eceed1763646c99d39d8ebf5be24441caf3b1b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 06:21:44 +0000
Subject: [PATCH 1465/4650] [2021-06-06T06:21:44+0000] e2e test


From e8e9f393f8d01ea6e87232982572ed2c9e49396b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 07:20:47 +0000
Subject: [PATCH 1466/4650] [2021-06-06T07:20:47+0000] e2e test


From 609fc690dffcadaab17d14aab32803af124a3886 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 08:17:37 +0000
Subject: [PATCH 1467/4650] [2021-06-06T08:17:37+0000] e2e test


From 9b9c55819097e9c8cf27cf609be5853e5802f7b3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 09:17:00 +0000
Subject: [PATCH 1468/4650] [2021-06-06T09:17:00+0000] e2e test


From 26e695f0cf06e7093ed0aede11ac66ee34296930 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 10:16:49 +0000
Subject: [PATCH 1469/4650] [2021-06-06T10:16:49+0000] e2e test


From 87cd08450c65276b20c582bb8e6f7572caacbb71 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 11:18:44 +0000
Subject: [PATCH 1470/4650] [2021-06-06T11:18:43+0000] e2e test


From a79ba8e0b4c2de700e252a366cc968d4b1b48f13 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 12:12:59 +0000
Subject: [PATCH 1471/4650] [2021-06-06T12:12:59+0000] e2e test


From abf717d4969d3b28b9cf33660230798a008c2d65 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 13:24:34 +0000
Subject: [PATCH 1472/4650] [2021-06-06T13:24:34+0000] e2e test


From caaab0f50a1331dd9d399690b83f0d364e6c76cf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 14:19:19 +0000
Subject: [PATCH 1473/4650] [2021-06-06T14:19:19+0000] e2e test


From 41a2000004635f8c9d4ca082e74a4cd44c1e74c7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 15:06:16 +0000
Subject: [PATCH 1474/4650] [2021-06-06T15:06:16+0000] e2e test


From c09e01822ac5d931cecda7ec5669229fb87360b4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 16:14:01 +0000
Subject: [PATCH 1475/4650] [2021-06-06T16:14:01+0000] e2e test


From 7cde4876e089097ca261336ff2ba2ce61ca54606 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 17:26:55 +0000
Subject: [PATCH 1476/4650] [2021-06-06T17:26:55+0000] e2e test


From b04b70d34919d3a6ac92c0a2e6862dfdb90f0155 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 18:29:10 +0000
Subject: [PATCH 1477/4650] [2021-06-06T18:29:10+0000] e2e test


From 6f927074c9f8645b84c6afa3040c6231f108d9f9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 19:22:51 +0000
Subject: [PATCH 1478/4650] [2021-06-06T19:22:51+0000] e2e test


From d65800d46949f3371b840b2047085d726acb1f62 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 20:11:13 +0000
Subject: [PATCH 1479/4650] [2021-06-06T20:11:13+0000] e2e test


From c4ff266075ed97f561cf365c854d37b431f8a4c9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 21:07:31 +0000
Subject: [PATCH 1480/4650] [2021-06-06T21:07:30+0000] e2e test


From aeac4e19151d279364181963f50c23755edd23ed Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 22:06:40 +0000
Subject: [PATCH 1481/4650] [2021-06-06T22:06:40+0000] e2e test


From 74183a565a48946de7200552af89dc25786ba719 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 6 Jun 2021 23:08:20 +0000
Subject: [PATCH 1482/4650] [2021-06-06T23:08:20+0000] e2e test


From 2715a14962e06196dc1492e2a198b0855e48924b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 00:10:29 +0000
Subject: [PATCH 1483/4650] [2021-06-07T00:10:29+0000] e2e test


From 5f1de5d228fd95cd3c339764eafcf7f19d058938 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 01:31:24 +0000
Subject: [PATCH 1484/4650] [2021-06-07T01:31:24+0000] e2e test


From ce2ddd2c712537a8cae504869c7e7f5e56152f1d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 02:46:22 +0000
Subject: [PATCH 1485/4650] [2021-06-07T02:46:21+0000] e2e test


From 1a238c251cf10ce37355c53a680685816fb8e8d3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 03:37:33 +0000
Subject: [PATCH 1486/4650] [2021-06-07T03:37:33+0000] e2e test


From a81ac0e1216d2866988f119412055e888f16e4e1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 04:30:42 +0000
Subject: [PATCH 1487/4650] [2021-06-07T04:30:42+0000] e2e test


From a0bd94fbe58db902c06606a3096a382473beb470 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 05:31:52 +0000
Subject: [PATCH 1488/4650] [2021-06-07T05:31:52+0000] e2e test


From c5996097034ba3b41d7df8dd6da697c570285cc7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 06:36:36 +0000
Subject: [PATCH 1489/4650] [2021-06-07T06:36:36+0000] e2e test


From e8b3b18b41c1e4c1178b6de7621e843b6e945001 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 07:31:57 +0000
Subject: [PATCH 1490/4650] [2021-06-07T07:31:57+0000] e2e test


From 999df1435cd2d1597ca22eb8b176e1e75d76e556 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 08:31:57 +0000
Subject: [PATCH 1491/4650] [2021-06-07T08:31:57+0000] e2e test


From ef71a839f43a407eba6fccb88367ca43b7d80265 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 09:30:36 +0000
Subject: [PATCH 1492/4650] [2021-06-07T09:30:36+0000] e2e test


From 6ee8d046de6e1ce8b4b95fffafb3f704d7f8f536 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 10:22:21 +0000
Subject: [PATCH 1493/4650] [2021-06-07T10:22:21+0000] e2e test


From 18de97a83a2c320cc8e023a43817ecd87d96f4cb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 11:26:30 +0000
Subject: [PATCH 1494/4650] [2021-06-07T11:26:30+0000] e2e test


From 5fe7540f0d8426ac6dc5050ecec4c85a77a41db1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 12:14:15 +0000
Subject: [PATCH 1495/4650] [2021-06-07T12:14:15+0000] e2e test


From d8167277ad8fae1d60999787162a4118fed4d81c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 13:27:31 +0000
Subject: [PATCH 1496/4650] [2021-06-07T13:27:31+0000] e2e test


From 79c5f804d604a909a574af77cb2dba6b6483459a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 14:28:39 +0000
Subject: [PATCH 1497/4650] [2021-06-07T14:28:39+0000] e2e test


From 53900ca9ccd676e1f96fcee0430ea3df3053a2f7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 15:13:10 +0000
Subject: [PATCH 1498/4650] [2021-06-07T15:13:10+0000] e2e test


From f9ee224191f1766f56321a567f562939d03ab9d9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 16:20:07 +0000
Subject: [PATCH 1499/4650] [2021-06-07T16:20:07+0000] e2e test


From 8e931163239732b0468d6c750db8ca2e2cf795fe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 17:33:09 +0000
Subject: [PATCH 1500/4650] [2021-06-07T17:33:08+0000] e2e test


From 113da498921d27d9a32c1f67b8b2e0b90ba467a9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 18:46:54 +0000
Subject: [PATCH 1501/4650] [2021-06-07T18:46:54+0000] e2e test


From b303264183d7ce21293279c2dc67d200ec8d6f83 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 19:32:50 +0000
Subject: [PATCH 1502/4650] [2021-06-07T19:32:49+0000] e2e test


From 361532240d8123ff6c6a511d95bcae9db1c1d0e3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 20:30:40 +0000
Subject: [PATCH 1503/4650] [2021-06-07T20:30:40+0000] e2e test


From 82bb10dce1eedbc48044b010faf2f4df2b206d64 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 21:27:35 +0000
Subject: [PATCH 1504/4650] [2021-06-07T21:27:34+0000] e2e test


From 1b4e0f50c215bc56df89a29a6b9998231c11d8ce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 22:16:18 +0000
Subject: [PATCH 1505/4650] [2021-06-07T22:16:18+0000] e2e test


From 011704a341ddbbf741da20176f90711e44b25131 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 7 Jun 2021 23:15:49 +0000
Subject: [PATCH 1506/4650] [2021-06-07T23:15:49+0000] e2e test


From 5abbbcebef449ef0d0ec4b96efc79d9e5142bafd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 00:14:51 +0000
Subject: [PATCH 1507/4650] [2021-06-08T00:14:51+0000] e2e test


From 923e76552c2abcae1b9670091139e15fb210a0d5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 01:31:17 +0000
Subject: [PATCH 1508/4650] [2021-06-08T01:31:17+0000] e2e test


From b9b02b470716417c09002df60e108b2505472b52 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 02:36:15 +0000
Subject: [PATCH 1509/4650] [2021-06-08T02:36:15+0000] e2e test


From 437541bdf0028edd4e318168ad6334d146d875de Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 03:27:06 +0000
Subject: [PATCH 1510/4650] [2021-06-08T03:27:06+0000] e2e test


From 67eb68726e14d5f2aea334ea7e2a5d3f0862385f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 04:19:41 +0000
Subject: [PATCH 1511/4650] [2021-06-08T04:19:41+0000] e2e test


From 060e735ba8acda98b518740674a647533b1cc4c1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 05:23:17 +0000
Subject: [PATCH 1512/4650] [2021-06-08T05:23:17+0000] e2e test


From 83db4e07af613263bab606698489b9c608202772 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 06:10:42 +0000
Subject: [PATCH 1513/4650] [2021-06-08T06:10:42+0000] e2e test


From 91a4e2db869c9e96993692609b036dc99efe80cb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 07:14:04 +0000
Subject: [PATCH 1514/4650] [2021-06-08T07:14:04+0000] e2e test


From 9c08e5aeae136f2f441e50fd0a95381610f4daa4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 08:04:43 +0000
Subject: [PATCH 1515/4650] [2021-06-08T08:04:43+0000] e2e test


From 746960b61e060ff3c711213c3ff7dc44ff84722c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 09:03:54 +0000
Subject: [PATCH 1516/4650] [2021-06-08T09:03:54+0000] e2e test


From 4a6d1bf1d7b19f09cfa9f0ce901ec537838bace8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 11:04:59 +0000
Subject: [PATCH 1517/4650] [2021-06-08T11:04:59+0000] e2e test


From 08a6d8f70f33a49a85c9acb2d28e84206987837a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 12:02:44 +0000
Subject: [PATCH 1518/4650] [2021-06-08T12:02:44+0000] e2e test


From ac83b2293f0fb4b2b43d4f45f5e096ef07df1dde Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 13:15:02 +0000
Subject: [PATCH 1519/4650] [2021-06-08T13:15:02+0000] e2e test


From a14ec30e9515bb40537ea36b64107484dfeaf57d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 14:07:26 +0000
Subject: [PATCH 1520/4650] [2021-06-08T14:07:26+0000] e2e test


From ca3c73797c86a376a86f50b6040c401a9ddb6ebe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 15:02:35 +0000
Subject: [PATCH 1521/4650] [2021-06-08T15:02:35+0000] e2e test


From 56bdf737f111f1768f7420c0aa3f55b003084439 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 16:06:53 +0000
Subject: [PATCH 1522/4650] [2021-06-08T16:06:53+0000] e2e test


From b8749b05685b1ddbdf190d1554fcc88473585b20 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 17:22:44 +0000
Subject: [PATCH 1523/4650] [2021-06-08T17:22:44+0000] e2e test


From eeb527b195e20a5b4fffda335f39de130fa2248f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 18:15:28 +0000
Subject: [PATCH 1524/4650] [2021-06-08T18:15:28+0000] e2e test


From c347ea7859224006d050f8158f8362c49b5de37f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 19:17:05 +0000
Subject: [PATCH 1525/4650] [2021-06-08T19:17:05+0000] e2e test


From 9e9ed7b5213c6d9d08125a757bdd407d3cf501ec Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 20:05:51 +0000
Subject: [PATCH 1526/4650] [2021-06-08T20:05:51+0000] e2e test


From 002ea0a08bbdccf0705df99e540b2c732c19ad36 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 21:02:41 +0000
Subject: [PATCH 1527/4650] [2021-06-08T21:02:41+0000] e2e test


From eead46ed98a2a7b4000bf28c89875be3d02193cc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 22:02:30 +0000
Subject: [PATCH 1528/4650] [2021-06-08T22:02:30+0000] e2e test


From 17abd8f03d20fe9ee74ade0c72366de8db82ebd4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 8 Jun 2021 23:02:38 +0000
Subject: [PATCH 1529/4650] [2021-06-08T23:02:38+0000] e2e test


From fa2982a9eb1d5166e9773f7661bc3383a76bcca9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 00:04:14 +0000
Subject: [PATCH 1530/4650] [2021-06-09T00:04:14+0000] e2e test


From d25e219aba2bd1e89049ae0f39a97fb1a5784d97 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 01:27:28 +0000
Subject: [PATCH 1531/4650] [2021-06-09T01:27:28+0000] e2e test


From 8dd850cf85d4b9b24a776de31ba81ae47c8a3d58 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 02:27:51 +0000
Subject: [PATCH 1532/4650] [2021-06-09T02:27:51+0000] e2e test


From 671b531b00af0eaf56c94b9c4473d2f31ca68ba0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 03:15:59 +0000
Subject: [PATCH 1533/4650] [2021-06-09T03:15:59+0000] e2e test


From f7408043269a40f78a9f264637a500383051ddd5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 04:15:44 +0000
Subject: [PATCH 1534/4650] [2021-06-09T04:15:44+0000] e2e test


From b439831d6b513a52f6ae8c71829e5bf42ce57f6d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 05:16:28 +0000
Subject: [PATCH 1535/4650] [2021-06-09T05:16:28+0000] e2e test


From 6ab441a3afb45a69ad54e6c70a603e7710573bbd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 06:08:46 +0000
Subject: [PATCH 1536/4650] [2021-06-09T06:08:46+0000] e2e test


From 27ff801c9d3ed5951b5de2bcb036011ae7343626 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 07:10:29 +0000
Subject: [PATCH 1537/4650] [2021-06-09T07:10:29+0000] e2e test


From 34ecf6f60a243341f750a2f92b71a8621ec2148f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 08:02:36 +0000
Subject: [PATCH 1538/4650] [2021-06-09T08:02:36+0000] e2e test


From 9708559436e19a8ebedc78e208dcde2009170b0e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 09:02:40 +0000
Subject: [PATCH 1539/4650] [2021-06-09T09:02:40+0000] e2e test


From 89859c8e35078b97ff684852014d35cb9cfd4c18 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 10:02:32 +0000
Subject: [PATCH 1540/4650] [2021-06-09T10:02:32+0000] e2e test


From 2fdefdf57cbc19be6ed91ac747a4ebcd5e87754e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 11:02:34 +0000
Subject: [PATCH 1541/4650] [2021-06-09T11:02:34+0000] e2e test


From eeb98cd20e10ba00e579fe96c5fe0157e55128bc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 12:02:58 +0000
Subject: [PATCH 1542/4650] [2021-06-09T12:02:58+0000] e2e test


From 6ff44d69f56ca2b2fa464a4e27755760ed617aea Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 13:13:16 +0000
Subject: [PATCH 1543/4650] [2021-06-09T13:13:16+0000] e2e test


From c947d63cee7c8558ab798806ee602d927b801100 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 14:04:23 +0000
Subject: [PATCH 1544/4650] [2021-06-09T14:04:23+0000] e2e test


From f3ff519ad8a85b5586a0c00f4a744c1d46eceac2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 15:02:35 +0000
Subject: [PATCH 1545/4650] [2021-06-09T15:02:35+0000] e2e test


From 7e00dcca765bb6a123d77d477dbf23e4ec6788b5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 16:06:23 +0000
Subject: [PATCH 1546/4650] [2021-06-09T16:06:23+0000] e2e test


From 62ca3b01425ed5ece0ae0e6c43ac05f214215c2e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 17:19:11 +0000
Subject: [PATCH 1547/4650] [2021-06-09T17:19:11+0000] e2e test


From fa3053796a19d89c3968f8588dd27c44beafbddb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 18:13:08 +0000
Subject: [PATCH 1548/4650] [2021-06-09T18:13:08+0000] e2e test


From 5650ac0109c6db62271cd65bed9721f4221f6671 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 19:13:12 +0000
Subject: [PATCH 1549/4650] [2021-06-09T19:13:12+0000] e2e test


From 09e029c5a7ca8c78b82678df302ab4a9b4e0a828 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 20:02:36 +0000
Subject: [PATCH 1550/4650] [2021-06-09T20:02:36+0000] e2e test


From 2dfbffe77ecc6e91d1216b6fd6678cbb6eb3626c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 21:02:32 +0000
Subject: [PATCH 1551/4650] [2021-06-09T21:02:32+0000] e2e test


From 89666fb9096e86990dd528b84b12fe684fa5da66 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 22:02:34 +0000
Subject: [PATCH 1552/4650] [2021-06-09T22:02:34+0000] e2e test


From 5f6d9c3abfc67e457216a82b26f56be89896bb25 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 9 Jun 2021 23:02:36 +0000
Subject: [PATCH 1553/4650] [2021-06-09T23:02:36+0000] e2e test


From b96243e52bacae0a7195ee049fad0c584be8ac42 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 00:03:50 +0000
Subject: [PATCH 1554/4650] [2021-06-10T00:03:50+0000] e2e test


From 163363bd72b5970c303a15c735616b4d4ff1a55e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 01:27:17 +0000
Subject: [PATCH 1555/4650] [2021-06-10T01:27:17+0000] e2e test


From 07e7dbb8f86c6de5d27f3e1aace73753b7ebe430 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 02:26:35 +0000
Subject: [PATCH 1556/4650] [2021-06-10T02:26:35+0000] e2e test


From 905640a26c54cfb7ddfd85bc7fe7afc320ef9f59 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 03:13:23 +0000
Subject: [PATCH 1557/4650] [2021-06-10T03:13:23+0000] e2e test


From 01060bc38eb831f9849cb8014b73aa4333360b03 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 04:10:27 +0000
Subject: [PATCH 1558/4650] [2021-06-10T04:10:27+0000] e2e test


From 8833554b5f36e9143258c33286b7cc53d446bead Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 05:14:24 +0000
Subject: [PATCH 1559/4650] [2021-06-10T05:14:24+0000] e2e test


From 3e538e25fdbd7fa5ec6f39f0d6a5f57c7c9d8bcc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 06:06:03 +0000
Subject: [PATCH 1560/4650] [2021-06-10T06:06:03+0000] e2e test


From 63b1d8396fd196090381d596c29eed009b98593d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 07:08:33 +0000
Subject: [PATCH 1561/4650] [2021-06-10T07:08:33+0000] e2e test


From 3572aeea9aa9ab1ac45884511d99179c7fcf90ac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 08:02:39 +0000
Subject: [PATCH 1562/4650] [2021-06-10T08:02:39+0000] e2e test


From e5b92549c850b4f2976dff59695d1c9841366f49 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 09:02:41 +0000
Subject: [PATCH 1563/4650] [2021-06-10T09:02:41+0000] e2e test


From 96204de46f4df2072163e1ef457fffd3de66b02a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 10:02:35 +0000
Subject: [PATCH 1564/4650] [2021-06-10T10:02:34+0000] e2e test


From 5f99219f5c0ff9da2564c97d9e4b5ace2583a3e0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 11:02:33 +0000
Subject: [PATCH 1565/4650] [2021-06-10T11:02:33+0000] e2e test


From 9b41f86a07b9bf2e303b0c66b220d53dd8421991 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 12:02:40 +0000
Subject: [PATCH 1566/4650] [2021-06-10T12:02:40+0000] e2e test


From 758db8f5995287c7975f36db13b1e22ebefd748f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 13:13:45 +0000
Subject: [PATCH 1567/4650] [2021-06-10T13:13:45+0000] e2e test


From 35be6b309d2b6b35e074362ddaa4aab2c67d71da Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 14:04:13 +0000
Subject: [PATCH 1568/4650] [2021-06-10T14:04:13+0000] e2e test


From 5d3ae43bd1cc3b3d636b06408904ff13be99d22b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 15:02:34 +0000
Subject: [PATCH 1569/4650] [2021-06-10T15:02:34+0000] e2e test


From 0189ecd522ea3ead972750262ccc461dfd15ed9e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 16:06:13 +0000
Subject: [PATCH 1570/4650] [2021-06-10T16:06:13+0000] e2e test


From f65fe1cd4a17a68048069185b47b4b89a5c88a98 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 17:19:58 +0000
Subject: [PATCH 1571/4650] [2021-06-10T17:19:58+0000] e2e test


From 04912f07449a5ac308ef19c91e20c9e136abe77a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 18:12:55 +0000
Subject: [PATCH 1572/4650] [2021-06-10T18:12:55+0000] e2e test


From 8b645c69a17c3dd9f2d71e0e9062e61d9c555694 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 19:12:06 +0000
Subject: [PATCH 1573/4650] [2021-06-10T19:12:06+0000] e2e test


From ea71e10fe895cb9b8845dce55cefd03ce6ed9f26 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 20:02:42 +0000
Subject: [PATCH 1574/4650] [2021-06-10T20:02:42+0000] e2e test


From 51260076c0fd314955d10c3601a4747b39379eef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 21:02:48 +0000
Subject: [PATCH 1575/4650] [2021-06-10T21:02:47+0000] e2e test


From a5640b9933a1e9e4b98f20e0710c74209ad71b0f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 22:02:31 +0000
Subject: [PATCH 1576/4650] [2021-06-10T22:02:30+0000] e2e test


From 1643981fa65ca4a85c8f0c32ea7509e40d028fe4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 10 Jun 2021 23:02:30 +0000
Subject: [PATCH 1577/4650] [2021-06-10T23:02:30+0000] e2e test


From 82f13ff43dbbca8303db6fc142f9673c7dfcace0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 00:03:44 +0000
Subject: [PATCH 1578/4650] [2021-06-11T00:03:44+0000] e2e test


From 50ed1bcd39582d75eab653e6dab2a796daedbaba Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 01:25:53 +0000
Subject: [PATCH 1579/4650] [2021-06-11T01:25:53+0000] e2e test


From 07785781ba61c4bc305624cee8510e871b9170f5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 02:22:23 +0000
Subject: [PATCH 1580/4650] [2021-06-11T02:22:23+0000] e2e test


From 990cbb6385d82cff1eb65bf55ccd9592088a1d55 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 03:09:05 +0000
Subject: [PATCH 1581/4650] [2021-06-11T03:09:04+0000] e2e test


From be65c31f618d6b5c37a7458165f36533b8b31b89 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 04:03:04 +0000
Subject: [PATCH 1582/4650] [2021-06-11T04:03:04+0000] e2e test


From ca329636b16fff28f1ac3abb2a1f1ed7e1f0007d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 05:06:30 +0000
Subject: [PATCH 1583/4650] [2021-06-11T05:06:30+0000] e2e test


From 63fe40173d8b63815a357c311ff46243b0bf951d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 06:02:42 +0000
Subject: [PATCH 1584/4650] [2021-06-11T06:02:42+0000] e2e test


From 6afde7a45abcaa83ffcc0f8dd0fa35c63ba13432 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 07:04:45 +0000
Subject: [PATCH 1585/4650] [2021-06-11T07:04:45+0000] e2e test


From d3de2a23861de65b555f0e83c0d43d4ad63fb03f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 08:02:36 +0000
Subject: [PATCH 1586/4650] [2021-06-11T08:02:36+0000] e2e test


From e1ad094b3ddc9e5adda21ffddeb230270e52ac2e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 09:02:42 +0000
Subject: [PATCH 1587/4650] [2021-06-11T09:02:41+0000] e2e test


From 749e022a2d89c10ab153a5b6d6bfdf4327b47c1e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 10:02:39 +0000
Subject: [PATCH 1588/4650] [2021-06-11T10:02:39+0000] e2e test


From e1a0f23b97719dbdf3084573eea3db404e306902 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 11:02:28 +0000
Subject: [PATCH 1589/4650] [2021-06-11T11:02:28+0000] e2e test


From 406f8eda401716e5bf0cc49d1b5067fb9c5e6bd7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 12:02:44 +0000
Subject: [PATCH 1590/4650] [2021-06-11T12:02:44+0000] e2e test


From 146e114756b5002e057b24c7787bc59a84769563 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 13:09:51 +0000
Subject: [PATCH 1591/4650] [2021-06-11T13:09:51+0000] e2e test


From c3f6ec3356ff43385827b6183272fd1cc8cec004 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 14:02:32 +0000
Subject: [PATCH 1592/4650] [2021-06-11T14:02:32+0000] e2e test


From ad351ff06a72e2ed34873abe86989f8e287cd9e2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 15:02:44 +0000
Subject: [PATCH 1593/4650] [2021-06-11T15:02:44+0000] e2e test


From d0764b5b7e5045f52d6f521f32b70dc856e92c7c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 16:03:45 +0000
Subject: [PATCH 1594/4650] [2021-06-11T16:03:45+0000] e2e test


From 54a1efea3fa85b717b0b37b2c5e4e8ec3ef0f641 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 17:14:20 +0000
Subject: [PATCH 1595/4650] [2021-06-11T17:14:20+0000] e2e test


From e80738cb00340d01fcb1fd3d291075ebb819f78c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 18:03:56 +0000
Subject: [PATCH 1596/4650] [2021-06-11T18:03:56+0000] e2e test


From b742cda691127294f062c51543539691b49ed9e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 19:02:59 +0000
Subject: [PATCH 1597/4650] [2021-06-11T19:02:59+0000] e2e test


From b2cab03ada384de85797f6b0b2b193d08dd43b7f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 20:02:36 +0000
Subject: [PATCH 1598/4650] [2021-06-11T20:02:36+0000] e2e test


From 3acde9b1c6a6ef2c5e5e6ba7c30bd902b868c098 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 21:02:39 +0000
Subject: [PATCH 1599/4650] [2021-06-11T21:02:38+0000] e2e test


From 128ee086b2d00544a358b0e00e75d762896194e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 22:02:30 +0000
Subject: [PATCH 1600/4650] [2021-06-11T22:02:30+0000] e2e test


From 990fc10ca33f012522497378750db0270a6fc40d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 11 Jun 2021 23:02:36 +0000
Subject: [PATCH 1601/4650] [2021-06-11T23:02:36+0000] e2e test


From 7f422a284a77af06335872004bdf6cc08393b1cf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 00:03:31 +0000
Subject: [PATCH 1602/4650] [2021-06-12T00:03:30+0000] e2e test


From 17471a8cd9e77fe8620cfeb6fed23bd3369f6cce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 01:23:13 +0000
Subject: [PATCH 1603/4650] [2021-06-12T01:23:13+0000] e2e test


From 5ede6711e865824ea9e7bbdd644edfffa54f027e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 02:14:55 +0000
Subject: [PATCH 1604/4650] [2021-06-12T02:14:55+0000] e2e test


From 8678a041123319c816ba1e53b16adaa70b03a7e9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 03:03:31 +0000
Subject: [PATCH 1605/4650] [2021-06-12T03:03:31+0000] e2e test


From 6037de8691438e57d005aa68f4a6193e91628479 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 04:02:30 +0000
Subject: [PATCH 1606/4650] [2021-06-12T04:02:29+0000] e2e test


From e68b02ba0b9c0568993c97316a57aeb3175ccc07 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 05:05:05 +0000
Subject: [PATCH 1607/4650] [2021-06-12T05:05:05+0000] e2e test


From 75c0ff1731dde8fc3502b355bea1823ecf725326 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 06:02:43 +0000
Subject: [PATCH 1608/4650] [2021-06-12T06:02:43+0000] e2e test


From 765510e70cdb18d27c258fc5525b0678acbe7cc6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 07:04:13 +0000
Subject: [PATCH 1609/4650] [2021-06-12T07:04:13+0000] e2e test


From c63feddde83c622c9a49c57a2cd9be569ba61cee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 08:02:31 +0000
Subject: [PATCH 1610/4650] [2021-06-12T08:02:30+0000] e2e test


From 6b4e847a22c10e53999fc6eab4a4576bb0f71a35 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 09:02:40 +0000
Subject: [PATCH 1611/4650] [2021-06-12T09:02:40+0000] e2e test


From 45ea703cfb19b6f57229dff11df36c977658b2d4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 10:02:36 +0000
Subject: [PATCH 1612/4650] [2021-06-12T10:02:36+0000] e2e test


From 3fb9c26372098ab0a2f75b4b04a497fef8f470db Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 11:02:30 +0000
Subject: [PATCH 1613/4650] [2021-06-12T11:02:30+0000] e2e test


From ac2bdb67750b4840c484c6db41764980573e920f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 12:02:39 +0000
Subject: [PATCH 1614/4650] [2021-06-12T12:02:39+0000] e2e test


From b7244ef3baf0d952ad60fa6bf63c1095e0c5eb1a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 13:09:04 +0000
Subject: [PATCH 1615/4650] [2021-06-12T13:09:04+0000] e2e test


From 4e66fe41742e3189e064e0137a5ad5eac57d3e3f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 14:02:38 +0000
Subject: [PATCH 1616/4650] [2021-06-12T14:02:37+0000] e2e test


From 33be5aa28b35070890e7be0147d5e370f59a642d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 15:02:28 +0000
Subject: [PATCH 1617/4650] [2021-06-12T15:02:28+0000] e2e test


From 8208d0f9fc89cb17c64c5e3e35750e4c03ea62f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 16:03:31 +0000
Subject: [PATCH 1618/4650] [2021-06-12T16:03:31+0000] e2e test


From 46e96cfc45021f4c81056f5f5df802389610a4b4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 17:11:43 +0000
Subject: [PATCH 1619/4650] [2021-06-12T17:11:42+0000] e2e test


From 5034f5fcf23c65fd7a2422930f4dbc5a1839e5b1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 18:02:29 +0000
Subject: [PATCH 1620/4650] [2021-06-12T18:02:29+0000] e2e test


From 425a48cb3b9f45cd343abf70642dc39684e0584f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 19:04:01 +0000
Subject: [PATCH 1621/4650] [2021-06-12T19:04:01+0000] e2e test


From f5cc03e5c5ac27393c427e701332ec36cb99f53e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 20:02:36 +0000
Subject: [PATCH 1622/4650] [2021-06-12T20:02:36+0000] e2e test


From b150d9954838d43d852ad6680256d89bbee3d4ae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 21:02:31 +0000
Subject: [PATCH 1623/4650] [2021-06-12T21:02:31+0000] e2e test


From d5ea6c2aef62e236ce15e007bce29eaf63564767 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 22:02:39 +0000
Subject: [PATCH 1624/4650] [2021-06-12T22:02:39+0000] e2e test


From 90fd53dc33c770003a7556492cd22eb43ad9bfb8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 12 Jun 2021 23:02:30 +0000
Subject: [PATCH 1625/4650] [2021-06-12T23:02:29+0000] e2e test


From eeca22849df37412d57cb81b12beee1a3ff485f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 00:04:03 +0000
Subject: [PATCH 1626/4650] [2021-06-13T00:04:03+0000] e2e test


From 98d31fa8cd2ac1ad8fb9a76e4769459eaa9e9cf2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 01:25:57 +0000
Subject: [PATCH 1627/4650] [2021-06-13T01:25:57+0000] e2e test


From 7532a459a757cfcc9c5581a912abf428069b1ff9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 02:18:13 +0000
Subject: [PATCH 1628/4650] [2021-06-13T02:18:13+0000] e2e test


From 95684df13ff952df52f805f93f1a872bdc494cae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 03:04:03 +0000
Subject: [PATCH 1629/4650] [2021-06-13T03:04:03+0000] e2e test


From 7da549038fa03cde26dc5702b62a809691e7d3c5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 04:02:35 +0000
Subject: [PATCH 1630/4650] [2021-06-13T04:02:35+0000] e2e test


From 24dd4d0e0a58d2aa908cc207c23fa97617136f55 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 05:05:12 +0000
Subject: [PATCH 1631/4650] [2021-06-13T05:05:11+0000] e2e test


From 25dbf6bc8af2cbaaf8af17851eff419f420a59bd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 06:02:42 +0000
Subject: [PATCH 1632/4650] [2021-06-13T06:02:42+0000] e2e test


From 84821adeacdb6d8c5bf5de8e71ef19211907af27 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 07:04:33 +0000
Subject: [PATCH 1633/4650] [2021-06-13T07:04:33+0000] e2e test


From 58c90dc88e7d302d12c9b0bdc8fc2d6e77ca0dc2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 08:02:39 +0000
Subject: [PATCH 1634/4650] [2021-06-13T08:02:38+0000] e2e test


From 7d2a335362c93460b6b77c470dc11ea6bf8d2d7d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 09:02:30 +0000
Subject: [PATCH 1635/4650] [2021-06-13T09:02:30+0000] e2e test


From 0fc9538bcf98ea7be869f6a2e8413de56f6b2c5f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 10:02:35 +0000
Subject: [PATCH 1636/4650] [2021-06-13T10:02:34+0000] e2e test


From ff653deca6b0403d4b754d57718159e81fdac460 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 11:02:32 +0000
Subject: [PATCH 1637/4650] [2021-06-13T11:02:32+0000] e2e test


From 04ac103bbcee4338e3ad29ac65b5c807c117cb5f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 12:02:42 +0000
Subject: [PATCH 1638/4650] [2021-06-13T12:02:42+0000] e2e test


From 5272198094d29b1f511e0271eefa24a1bfc6dc5c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 13:09:59 +0000
Subject: [PATCH 1639/4650] [2021-06-13T13:09:59+0000] e2e test


From 3ba711b622b5c6935a5df1c088dd271e6c6fe7f6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 14:02:29 +0000
Subject: [PATCH 1640/4650] [2021-06-13T14:02:29+0000] e2e test


From 63309e4bfc27f19e4a2c385e08bd2cee6149ee0d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 15:02:32 +0000
Subject: [PATCH 1641/4650] [2021-06-13T15:02:32+0000] e2e test


From ec586ac339d31b6e64d2f5fcaa9b2144443d9d01 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 16:03:38 +0000
Subject: [PATCH 1642/4650] [2021-06-13T16:03:38+0000] e2e test


From 287913c7c452014b74e82393ed5c1704074ad1bd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 17:11:44 +0000
Subject: [PATCH 1643/4650] [2021-06-13T17:11:44+0000] e2e test


From c1c3bca7b9bd808900bbbdb0f8e29541e1d46918 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 18:02:31 +0000
Subject: [PATCH 1644/4650] [2021-06-13T18:02:31+0000] e2e test


From 88646d0046507fbe4e7c59336b37c6c2445338c9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 19:03:57 +0000
Subject: [PATCH 1645/4650] [2021-06-13T19:03:56+0000] e2e test


From aca01771d1c7378847f8cc54bc8fef71819267cf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 20:02:29 +0000
Subject: [PATCH 1646/4650] [2021-06-13T20:02:28+0000] e2e test


From 5f6ae9c6a28afc53381bb7293c6c2105a17a51ac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 21:02:38 +0000
Subject: [PATCH 1647/4650] [2021-06-13T21:02:38+0000] e2e test


From 371ac3b45525b603ea60b8863faddfd9e88104a0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 22:02:34 +0000
Subject: [PATCH 1648/4650] [2021-06-13T22:02:33+0000] e2e test


From cfdb821eefc69131f1e445edd00ffb6c23dc2819 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 13 Jun 2021 23:02:43 +0000
Subject: [PATCH 1649/4650] [2021-06-13T23:02:43+0000] e2e test


From 57cda270e02cae1eb25d1fa64658f575992a977e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 00:04:11 +0000
Subject: [PATCH 1650/4650] [2021-06-14T00:04:11+0000] e2e test


From 1a1b9fa305fd1163e40e3299f8b138822953e7e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 01:25:27 +0000
Subject: [PATCH 1651/4650] [2021-06-14T01:25:27+0000] e2e test


From 990d168131fa1b48eaacf146abd7ca3f2d9fa054 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 02:18:56 +0000
Subject: [PATCH 1652/4650] [2021-06-14T02:18:56+0000] e2e test


From 0cf8c22d95d3c38ccca3b30ea3518055ee4b1e07 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 03:04:40 +0000
Subject: [PATCH 1653/4650] [2021-06-14T03:04:40+0000] e2e test


From ad995fa7be0f8a11b6d29f2e397267faf433a566 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 04:02:47 +0000
Subject: [PATCH 1654/4650] [2021-06-14T04:02:47+0000] e2e test


From 7bdd00875a8908acd6fd5683a3020e473ddbd743 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 05:05:46 +0000
Subject: [PATCH 1655/4650] [2021-06-14T05:05:46+0000] e2e test


From 96e6edabc6094c2be4bb9d702bbbc12beace2f51 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 06:02:38 +0000
Subject: [PATCH 1656/4650] [2021-06-14T06:02:38+0000] e2e test


From 8965708706845742016f041163c909c8e5592f9c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 07:05:48 +0000
Subject: [PATCH 1657/4650] [2021-06-14T07:05:48+0000] e2e test


From 73569fb7b898168c4e4b0ad67dae540b3c16a398 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 08:02:42 +0000
Subject: [PATCH 1658/4650] [2021-06-14T08:02:41+0000] e2e test


From 2d86638cf55d624d64f21c041d54f6650388aa1b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 09:02:34 +0000
Subject: [PATCH 1659/4650] [2021-06-14T09:02:34+0000] e2e test


From fa23bb074567a401f4dfb274db39b882bad316fa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 10:02:39 +0000
Subject: [PATCH 1660/4650] [2021-06-14T10:02:39+0000] e2e test


From 3a689cf3087c0c2e4ba312f15fd85b716eea1374 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 11:02:32 +0000
Subject: [PATCH 1661/4650] [2021-06-14T11:02:32+0000] e2e test


From 4c051064bca1a6ace35dfcf777f794c68d869427 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 12:02:43 +0000
Subject: [PATCH 1662/4650] [2021-06-14T12:02:43+0000] e2e test


From d77ed8db8bf6b2d5793feff935c3c5b03e22bd46 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 13:10:30 +0000
Subject: [PATCH 1663/4650] [2021-06-14T13:10:30+0000] e2e test


From 76cd1b290aa270c595730f08ca8eab8ceee16b67 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 14:02:35 +0000
Subject: [PATCH 1664/4650] [2021-06-14T14:02:35+0000] e2e test


From dcf7aefb65ad5e61f7562b6cf40f8f61413bd084 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 15:02:41 +0000
Subject: [PATCH 1665/4650] [2021-06-14T15:02:41+0000] e2e test


From 2a858a14ba2c7275125ca0c4febb6bb67c1485ff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 16:03:46 +0000
Subject: [PATCH 1666/4650] [2021-06-14T16:03:46+0000] e2e test


From 2de405e6aae3a5e18db49431889fb1ce8200a5ab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 17:12:58 +0000
Subject: [PATCH 1667/4650] [2021-06-14T17:12:58+0000] e2e test


From 0ac6f1fce3c6575af6fe29a13149805b8e9a0820 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 18:02:40 +0000
Subject: [PATCH 1668/4650] [2021-06-14T18:02:40+0000] e2e test


From a2449db472c5749f7b02b2c7d21148fcc33dc79f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 19:03:07 +0000
Subject: [PATCH 1669/4650] [2021-06-14T19:03:07+0000] e2e test


From c0450a6c29cebf7b2a82094caa02c6e44acf96bc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 20:02:44 +0000
Subject: [PATCH 1670/4650] [2021-06-14T20:02:44+0000] e2e test


From 9913b9e1d5202c020a07b46f77687fb99ac9fd8e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 21:02:38 +0000
Subject: [PATCH 1671/4650] [2021-06-14T21:02:38+0000] e2e test


From 2977fe0f7addaef86f5f27315316ce55eed7024e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 22:02:36 +0000
Subject: [PATCH 1672/4650] [2021-06-14T22:02:36+0000] e2e test


From 1e87bc13a6f541d0f44e5c4372efde72b51a3b4a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 14 Jun 2021 23:02:42 +0000
Subject: [PATCH 1673/4650] [2021-06-14T23:02:42+0000] e2e test


From 92efc4608daaa1cb7ad2648abbedcc40bce4bd10 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 00:03:35 +0000
Subject: [PATCH 1674/4650] [2021-06-15T00:03:35+0000] e2e test


From 1f86f1cf832603303aab50eb562b5b8c976678a4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 01:26:25 +0000
Subject: [PATCH 1675/4650] [2021-06-15T01:26:25+0000] e2e test


From bbf793f449fbd768051661fa163400f26a72fee7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 02:22:09 +0000
Subject: [PATCH 1676/4650] [2021-06-15T02:22:09+0000] e2e test


From 1f0a5203573a4965bb514bebb7b912b80ea6d26e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 03:06:04 +0000
Subject: [PATCH 1677/4650] [2021-06-15T03:06:04+0000] e2e test


From 48fb24f6d56126fb5b0b6118c77f7775009e1c76 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 04:02:39 +0000
Subject: [PATCH 1678/4650] [2021-06-15T04:02:39+0000] e2e test


From 464eefc5f47940d02c8924cb5bc97a3929909089 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 05:05:44 +0000
Subject: [PATCH 1679/4650] [2021-06-15T05:05:43+0000] e2e test


From 419b841fa66712b42dc096626f9e734fec4ae8dc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 06:02:38 +0000
Subject: [PATCH 1680/4650] [2021-06-15T06:02:38+0000] e2e test


From d635a47c4fe08c576bb6110f772d0a84398e95e2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 07:05:13 +0000
Subject: [PATCH 1681/4650] [2021-06-15T07:05:13+0000] e2e test


From 91ecb5848cf68316991c274b289a8983c2fec1b3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 08:02:47 +0000
Subject: [PATCH 1682/4650] [2021-06-15T08:02:47+0000] e2e test


From 14ff0ab8e0bed01f80bb503905a37b49c80753b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 09:02:32 +0000
Subject: [PATCH 1683/4650] [2021-06-15T09:02:32+0000] e2e test


From 897f4dd1b1feccf1f04aa2026756d20aad6e820f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 10:02:36 +0000
Subject: [PATCH 1684/4650] [2021-06-15T10:02:36+0000] e2e test


From 628744455433981b629c758408e4714966bb0ad6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 11:02:32 +0000
Subject: [PATCH 1685/4650] [2021-06-15T11:02:32+0000] e2e test


From 266f0a8619da9941487ee5c73a6db19a16156a7c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 12:02:45 +0000
Subject: [PATCH 1686/4650] [2021-06-15T12:02:45+0000] e2e test


From 13cd4ae9da6f6f192162d0792867ea8ea83b9b61 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 13:10:34 +0000
Subject: [PATCH 1687/4650] [2021-06-15T13:10:34+0000] e2e test


From 25c3729d8f96b3f20cc896f34ae4d03d1024f7fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 14:02:38 +0000
Subject: [PATCH 1688/4650] [2021-06-15T14:02:38+0000] e2e test


From 838af03ce210397e76ba753b484ab47b1ed24407 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 15:02:36 +0000
Subject: [PATCH 1689/4650] [2021-06-15T15:02:36+0000] e2e test


From 72e355982c9c7635383b8e55c28a5c71838243ff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 16:03:49 +0000
Subject: [PATCH 1690/4650] [2021-06-15T16:03:48+0000] e2e test


From 3f654be0d2b3863d08d16a5ae15a368ddc1b69a6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 17:15:48 +0000
Subject: [PATCH 1691/4650] [2021-06-15T17:15:48+0000] e2e test


From 698ecaefff0493e52308c7219acbe50a3576de60 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 18:04:22 +0000
Subject: [PATCH 1692/4650] [2021-06-15T18:04:22+0000] e2e test


From c9cfd09b239247f4ca61b36508bb91ea9af326b8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 19:04:26 +0000
Subject: [PATCH 1693/4650] [2021-06-15T19:04:26+0000] e2e test


From 9e9b32b29d79ce77130924faa281d2850f2f1a1f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 20:02:35 +0000
Subject: [PATCH 1694/4650] [2021-06-15T20:02:35+0000] e2e test


From aa82757325ee1b72cdddc50f8938899afd901d59 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 21:02:33 +0000
Subject: [PATCH 1695/4650] [2021-06-15T21:02:33+0000] e2e test


From c6dbceb251cc8d64626ddf448b6bf2ebeefd2c6a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 22:02:48 +0000
Subject: [PATCH 1696/4650] [2021-06-15T22:02:47+0000] e2e test


From 88ab69a7455d9b09806271e74b51bc221056ed0e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 15 Jun 2021 23:02:41 +0000
Subject: [PATCH 1697/4650] [2021-06-15T23:02:41+0000] e2e test


From 81bd23cdc145c69185086a2068c79943de4f7c0b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 00:03:46 +0000
Subject: [PATCH 1698/4650] [2021-06-16T00:03:46+0000] e2e test


From aad333682df2fafab9a66215db29df8dbe6361a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 01:25:25 +0000
Subject: [PATCH 1699/4650] [2021-06-16T01:25:25+0000] e2e test


From 1b9e0bf51677942a1c9a78de18a81e443a342d8c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 02:19:11 +0000
Subject: [PATCH 1700/4650] [2021-06-16T02:19:11+0000] e2e test


From a4434c68631bd13f5c0df833ccd1a09c52a72d47 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 03:04:34 +0000
Subject: [PATCH 1701/4650] [2021-06-16T03:04:33+0000] e2e test


From 5a253fb90f8147c91d59f084efae4af1cb102d0d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 04:02:34 +0000
Subject: [PATCH 1702/4650] [2021-06-16T04:02:34+0000] e2e test


From 8359d76192790970b92cb7e3a12ed80cd1e1a0f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 05:05:38 +0000
Subject: [PATCH 1703/4650] [2021-06-16T05:05:37+0000] e2e test


From 20320f2d69c0119e740f143e585eda951980bf6e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 06:02:45 +0000
Subject: [PATCH 1704/4650] [2021-06-16T06:02:45+0000] e2e test


From 65ac21ccef77ac9e7428699bfe525ef13531d783 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 07:05:34 +0000
Subject: [PATCH 1705/4650] [2021-06-16T07:05:34+0000] e2e test


From b708f24f579492c3291c348b47d8a51b6ac81f73 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 08:02:37 +0000
Subject: [PATCH 1706/4650] [2021-06-16T08:02:37+0000] e2e test


From e8e1e33ddf25a402725148f52561fb5074f615b1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 09:02:30 +0000
Subject: [PATCH 1707/4650] [2021-06-16T09:02:29+0000] e2e test


From bd063e75774417f3ec559e9ac031ead845a2eefe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 10:02:45 +0000
Subject: [PATCH 1708/4650] [2021-06-16T10:02:45+0000] e2e test


From 267103b01aaec3db762b4d1c2be6f53b4720890e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 11:02:42 +0000
Subject: [PATCH 1709/4650] [2021-06-16T11:02:42+0000] e2e test


From fd3fa0d48721cc8a30d099bea13e0709c0a25b46 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 12:03:01 +0000
Subject: [PATCH 1710/4650] [2021-06-16T12:03:01+0000] e2e test


From 9d2094b116d59de6d0240574ecb892996b2cd55a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 13:11:16 +0000
Subject: [PATCH 1711/4650] [2021-06-16T13:11:16+0000] e2e test


From 309628d2c542f33a72fddb371c248da868289f2c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 14:02:38 +0000
Subject: [PATCH 1712/4650] [2021-06-16T14:02:37+0000] e2e test


From 8195aa3c244750973e47afa17bd692f283795846 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 15:02:43 +0000
Subject: [PATCH 1713/4650] [2021-06-16T15:02:43+0000] e2e test


From 8ba357f9cd33daeb329daeec7fb1be80f2647029 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 16:03:47 +0000
Subject: [PATCH 1714/4650] [2021-06-16T16:03:46+0000] e2e test


From e5857258012736f670e8b255dd16bd87e1fb806b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 17:14:08 +0000
Subject: [PATCH 1715/4650] [2021-06-16T17:14:08+0000] e2e test


From af2747f733d336473df81358263e9fdaa4984c09 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 18:03:26 +0000
Subject: [PATCH 1716/4650] [2021-06-16T18:03:26+0000] e2e test


From 044758082733e375051b8e858228e0d1038ec733 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 19:04:35 +0000
Subject: [PATCH 1717/4650] [2021-06-16T19:04:34+0000] e2e test


From 9bbde4841d66dc8090989d70c45be35b6fcc6016 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 20:02:47 +0000
Subject: [PATCH 1718/4650] [2021-06-16T20:02:46+0000] e2e test


From ee834f27dce7caca8a07bf538371e74da555e52e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 21:02:38 +0000
Subject: [PATCH 1719/4650] [2021-06-16T21:02:38+0000] e2e test


From 56506bf69413c909a77985e110fac6bec761e329 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 22:02:28 +0000
Subject: [PATCH 1720/4650] [2021-06-16T22:02:28+0000] e2e test


From 51f261a3a0e2f02c6f99d41cf5e8de38f862fbfd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 16 Jun 2021 23:02:37 +0000
Subject: [PATCH 1721/4650] [2021-06-16T23:02:37+0000] e2e test


From d396e25bb807501f9569b44bf9fea076879fb64a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 00:03:36 +0000
Subject: [PATCH 1722/4650] [2021-06-17T00:03:36+0000] e2e test


From 2cf09d36f3d97fd4253b80e9acb826328c4de7b3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 01:24:42 +0000
Subject: [PATCH 1723/4650] [2021-06-17T01:24:42+0000] e2e test


From 6e94f201680352bcf78cb0f68fb6aa3822089474 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 02:16:40 +0000
Subject: [PATCH 1724/4650] [2021-06-17T02:16:40+0000] e2e test


From 4ce8c341bae9ed02758056dfa957ac0636dbb7d4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 03:03:24 +0000
Subject: [PATCH 1725/4650] [2021-06-17T03:03:24+0000] e2e test


From 4fb6fcff4787060a38485922baf54e7f932fe2a8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 04:02:38 +0000
Subject: [PATCH 1726/4650] [2021-06-17T04:02:38+0000] e2e test


From 3877f08c6367106c2af81bdd74ec1384bfd93e27 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 05:05:26 +0000
Subject: [PATCH 1727/4650] [2021-06-17T05:05:26+0000] e2e test


From 7889009286e9f8b2355f5c5ca6fe554a613150bd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 06:02:42 +0000
Subject: [PATCH 1728/4650] [2021-06-17T06:02:42+0000] e2e test


From 59b6f57ca45eb6d4ea4a78bbb83b45bb8d6647ab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 07:05:39 +0000
Subject: [PATCH 1729/4650] [2021-06-17T07:05:39+0000] e2e test


From 1f4bcb342c3ee8b5d7338150edf0e17d7a461465 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 08:02:50 +0000
Subject: [PATCH 1730/4650] [2021-06-17T08:02:49+0000] e2e test


From c67fdf3acc9088121ef25e6b2681a7de98b6d807 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 09:02:34 +0000
Subject: [PATCH 1731/4650] [2021-06-17T09:02:34+0000] e2e test


From f01c689b8940c4a7d2e27ca2723077e7df23372b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 10:02:34 +0000
Subject: [PATCH 1732/4650] [2021-06-17T10:02:34+0000] e2e test


From 709607ccf83affac4a479c26fadb64f472712278 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 11:02:33 +0000
Subject: [PATCH 1733/4650] [2021-06-17T11:02:33+0000] e2e test


From 46f199148722b06caa061e9871cf8cd41900e68d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 12:02:53 +0000
Subject: [PATCH 1734/4650] [2021-06-17T12:02:53+0000] e2e test


From eefe89996c721cf70178d6e8e945d2c7eb4d6be2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 13:10:48 +0000
Subject: [PATCH 1735/4650] [2021-06-17T13:10:48+0000] e2e test


From 69d67dbcfb429aa7a1a3691b59ddf4377569f645 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 14:02:39 +0000
Subject: [PATCH 1736/4650] [2021-06-17T14:02:39+0000] e2e test


From fb97b69925092087e9972b8f8f8b1d833dc8b5aa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 15:02:40 +0000
Subject: [PATCH 1737/4650] [2021-06-17T15:02:40+0000] e2e test


From f9e58696b61d7c8ef7def7eaffa8bdf0415cb907 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 16:04:13 +0000
Subject: [PATCH 1738/4650] [2021-06-17T16:04:13+0000] e2e test


From 73762f24fccd54241a1bde0fd89aeb5445a642d4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 17:14:49 +0000
Subject: [PATCH 1739/4650] [2021-06-17T17:14:49+0000] e2e test


From 3d2d516d959a33f1889904a649dd0e51bdc9bff6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 18:03:29 +0000
Subject: [PATCH 1740/4650] [2021-06-17T18:03:29+0000] e2e test


From dcf59df92998d34a39db1ba96ec2a36a28f75f3e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 19:04:09 +0000
Subject: [PATCH 1741/4650] [2021-06-17T19:04:09+0000] e2e test


From d8f0356f47bfbfed8439c47baf3b900707fbc983 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 20:02:58 +0000
Subject: [PATCH 1742/4650] [2021-06-17T20:02:58+0000] e2e test


From e0d7de56357f68fce8f5fd5e733b5ba46b5b851e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 21:02:36 +0000
Subject: [PATCH 1743/4650] [2021-06-17T21:02:36+0000] e2e test


From 9083d6b1806836e42af04ad0df678b5319c56755 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 22:02:32 +0000
Subject: [PATCH 1744/4650] [2021-06-17T22:02:32+0000] e2e test


From 84b20e1b172406b0148ca7cf481410f1795afc7f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 17 Jun 2021 23:02:47 +0000
Subject: [PATCH 1745/4650] [2021-06-17T23:02:47+0000] e2e test


From 6e01f31de8f6cfbb068e4d48a5c12ed9f24c7376 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 00:03:31 +0000
Subject: [PATCH 1746/4650] [2021-06-18T00:03:31+0000] e2e test


From 8eb1345ebee8ea975ef6958318d1eb089c9f6449 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 01:26:33 +0000
Subject: [PATCH 1747/4650] [2021-06-18T01:26:33+0000] e2e test


From ddacae95f36c274d3c043ffb49e0c9b0ce73f081 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 02:20:57 +0000
Subject: [PATCH 1748/4650] [2021-06-18T02:20:57+0000] e2e test


From 3a6334d8d17876cec32e908d9c3bc633fbbf3f30 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 03:04:11 +0000
Subject: [PATCH 1749/4650] [2021-06-18T03:04:11+0000] e2e test


From adfa2ce8b0dcbb14e08afa688221c8669298a43d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 04:02:33 +0000
Subject: [PATCH 1750/4650] [2021-06-18T04:02:33+0000] e2e test


From 1d888048ba573b82849ce447f21ea1ca4e3f4ffc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 05:05:12 +0000
Subject: [PATCH 1751/4650] [2021-06-18T05:05:12+0000] e2e test


From 9b87869e0e63103b3d4b67a532bca52206cb1088 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 06:02:45 +0000
Subject: [PATCH 1752/4650] [2021-06-18T06:02:45+0000] e2e test


From 481901e8133a8faf00fb44dce71b6f074cde62e9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 07:05:27 +0000
Subject: [PATCH 1753/4650] [2021-06-18T07:05:27+0000] e2e test


From 97a804b76f44143e0347b688382d94031fd5b248 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 08:02:36 +0000
Subject: [PATCH 1754/4650] [2021-06-18T08:02:36+0000] e2e test


From 52baeb29debb0a99cf652047883805e6978c73b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 09:02:36 +0000
Subject: [PATCH 1755/4650] [2021-06-18T09:02:35+0000] e2e test


From d20383095940a9b40e74933cd6e416507befdedd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 10:02:38 +0000
Subject: [PATCH 1756/4650] [2021-06-18T10:02:37+0000] e2e test


From e871de1956edf5e1472ac5f837c098bdab171057 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 11:02:30 +0000
Subject: [PATCH 1757/4650] [2021-06-18T11:02:30+0000] e2e test


From 30a24fa7d753f633527a857483ca93e6e948b9c6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 12:02:51 +0000
Subject: [PATCH 1758/4650] [2021-06-18T12:02:51+0000] e2e test


From 275aee5431accf5d51d3fe341782cfc6a3940b32 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 13:10:59 +0000
Subject: [PATCH 1759/4650] [2021-06-18T13:10:58+0000] e2e test


From 1969e242e3fd02a0a562a849d6c9ccb1b8f6c89c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 14:02:33 +0000
Subject: [PATCH 1760/4650] [2021-06-18T14:02:33+0000] e2e test


From 45d1b99e47b9adb257fcb6d34541a8ba950dc928 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 15:02:35 +0000
Subject: [PATCH 1761/4650] [2021-06-18T15:02:35+0000] e2e test


From ed14c44ce6d7c774373403039d4ad1bdc540d0cb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 19:02:51 +0000
Subject: [PATCH 1762/4650] [2021-06-18T19:02:51+0000] e2e test


From 6003865c299770322bbf9445c884d3b355578553 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 20:02:54 +0000
Subject: [PATCH 1763/4650] [2021-06-18T20:02:54+0000] e2e test


From e9ddf46dc6e0126175138bc58184bf343fe2d41f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 21:02:32 +0000
Subject: [PATCH 1764/4650] [2021-06-18T21:02:32+0000] e2e test


From acaad6011b6b2d20d8afd3b0ba74419292ba4ff5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 22:02:35 +0000
Subject: [PATCH 1765/4650] [2021-06-18T22:02:35+0000] e2e test


From 8b9dd5fc389f382a75891b456d57519a827fb919 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 18 Jun 2021 23:02:35 +0000
Subject: [PATCH 1766/4650] [2021-06-18T23:02:35+0000] e2e test


From 87c7bb96996211f95197c2506726c9613b952b9f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 00:03:53 +0000
Subject: [PATCH 1767/4650] [2021-06-19T00:03:53+0000] e2e test


From 31b7357d8d8bd2ff7344a65d8318b2a4a5eaf582 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 01:26:11 +0000
Subject: [PATCH 1768/4650] [2021-06-19T01:26:11+0000] e2e test


From 7b35964c90b3c9a7725ad7353057b50ede6f0546 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 02:20:30 +0000
Subject: [PATCH 1769/4650] [2021-06-19T02:20:30+0000] e2e test


From 1428a83577fecf8708b66e505ae84c632e5dc2d4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 03:03:22 +0000
Subject: [PATCH 1770/4650] [2021-06-19T03:03:21+0000] e2e test


From 6f935a1ca28ea265507d8ec9b2fc8621e2b1ba04 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 04:02:31 +0000
Subject: [PATCH 1771/4650] [2021-06-19T04:02:30+0000] e2e test


From 0bd6ca4a46dfc7fad26fa5dcc827d6ea130e9c71 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 05:05:20 +0000
Subject: [PATCH 1772/4650] [2021-06-19T05:05:20+0000] e2e test


From fa5643fc585820b3f73eff2646e60a7892375166 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 06:02:47 +0000
Subject: [PATCH 1773/4650] [2021-06-19T06:02:47+0000] e2e test


From 8126d5488f6917adda131b3d59f4936321110381 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 07:04:47 +0000
Subject: [PATCH 1774/4650] [2021-06-19T07:04:47+0000] e2e test


From d9d6af757f314c29220ec244ea5e0c1c5ef82b94 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 08:02:44 +0000
Subject: [PATCH 1775/4650] [2021-06-19T08:02:44+0000] e2e test


From ff884ad30d2d4bb4f468b37816663864456a3341 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 09:02:28 +0000
Subject: [PATCH 1776/4650] [2021-06-19T09:02:28+0000] e2e test


From 7c1e9bec94ee571079729cc6a22f70cba1362fbe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 10:02:35 +0000
Subject: [PATCH 1777/4650] [2021-06-19T10:02:35+0000] e2e test


From 24232999b18344374750ae240e922e6d05405baa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 11:02:38 +0000
Subject: [PATCH 1778/4650] [2021-06-19T11:02:38+0000] e2e test


From 00a502a129215f575fe3fc3fa79d60621048604e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 12:02:30 +0000
Subject: [PATCH 1779/4650] [2021-06-19T12:02:30+0000] e2e test


From 502f680c31e6e4f5e0eee3d273cecd875e317351 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 13:09:47 +0000
Subject: [PATCH 1780/4650] [2021-06-19T13:09:47+0000] e2e test


From aab95b00496466d3258c212aa339d36148137dbf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 14:02:43 +0000
Subject: [PATCH 1781/4650] [2021-06-19T14:02:43+0000] e2e test


From edb27beaddbaf0d2fb25e3b5adaa92d2becec4ae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 15:02:32 +0000
Subject: [PATCH 1782/4650] [2021-06-19T15:02:32+0000] e2e test


From 44c19bdf21cdf47aa286a8ae92c871fe38463768 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 16:03:09 +0000
Subject: [PATCH 1783/4650] [2021-06-19T16:03:09+0000] e2e test


From 1de88c1e2a989c77000457c08556e83ac7b698e1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 17:10:58 +0000
Subject: [PATCH 1784/4650] [2021-06-19T17:10:57+0000] e2e test


From 198c48a8a706354355b2d20b202c3c8903f28260 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 18:02:32 +0000
Subject: [PATCH 1785/4650] [2021-06-19T18:02:32+0000] e2e test


From d32217de9e82ba8e5b7439606c565beac154770d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 19:02:27 +0000
Subject: [PATCH 1786/4650] [2021-06-19T19:02:27+0000] e2e test


From ddbd0bd2c3bfabb75db75f5d6932b2becf0b33fb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 20:02:32 +0000
Subject: [PATCH 1787/4650] [2021-06-19T20:02:32+0000] e2e test


From 0709b3133c53466f3b8c52fd6c692e4ca84d4857 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 21:02:38 +0000
Subject: [PATCH 1788/4650] [2021-06-19T21:02:38+0000] e2e test


From 1614acdfc6e6773678f7a23360d679a3a4236559 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 22:02:39 +0000
Subject: [PATCH 1789/4650] [2021-06-19T22:02:39+0000] e2e test


From 65ee1827079089ada31ab3a96a9c719c651c08c3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 19 Jun 2021 23:02:36 +0000
Subject: [PATCH 1790/4650] [2021-06-19T23:02:36+0000] e2e test


From 7c4cee691fb231ab47ed85c13c1f593d011b2ec8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 00:04:17 +0000
Subject: [PATCH 1791/4650] [2021-06-20T00:04:17+0000] e2e test


From fbec771c3ad89091a1d9f79d1619f272e9b39937 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 01:26:28 +0000
Subject: [PATCH 1792/4650] [2021-06-20T01:26:28+0000] e2e test


From 8dd74a0a7ded5cbfb95db8d8f20e8c2d625f723a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 02:22:10 +0000
Subject: [PATCH 1793/4650] [2021-06-20T02:22:10+0000] e2e test


From d2924f59f3cea7fbe46090d7d6e5b9b52c9f20ec Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 03:03:55 +0000
Subject: [PATCH 1794/4650] [2021-06-20T03:03:55+0000] e2e test


From 8de89821be1adb21df78b5585f56dd14f55aaac7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 04:02:38 +0000
Subject: [PATCH 1795/4650] [2021-06-20T04:02:38+0000] e2e test


From 219da2fae039ccb6da748eeb33a24547bb4b414b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 05:04:45 +0000
Subject: [PATCH 1796/4650] [2021-06-20T05:04:45+0000] e2e test


From 4e02c0c96a63d43994b321b094ee1220c301eabe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 06:02:42 +0000
Subject: [PATCH 1797/4650] [2021-06-20T06:02:42+0000] e2e test


From 748baf30b1c91c9e152424e99dc78eb6275fccb2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 07:04:31 +0000
Subject: [PATCH 1798/4650] [2021-06-20T07:04:31+0000] e2e test


From c7d9d209a482de0466b5db9c51c0c948d17d331c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 08:02:33 +0000
Subject: [PATCH 1799/4650] [2021-06-20T08:02:33+0000] e2e test


From 8ade8ed14be86e5f30050db3a46d888616d1b682 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 09:02:38 +0000
Subject: [PATCH 1800/4650] [2021-06-20T09:02:38+0000] e2e test


From f4447d8622b3828e9a0afa3f28c3ea5cc6417ee9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 10:02:40 +0000
Subject: [PATCH 1801/4650] [2021-06-20T10:02:40+0000] e2e test


From 92975315d59e90e8b34387483e1123d50732fbcd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 11:02:30 +0000
Subject: [PATCH 1802/4650] [2021-06-20T11:02:30+0000] e2e test


From 0e47c115a3762a441fad908fb2ecd09f1b44d76d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 12:02:43 +0000
Subject: [PATCH 1803/4650] [2021-06-20T12:02:43+0000] e2e test


From 64e0b13283ec7b0eda47e42ca24b4a36a900d54c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 13:09:52 +0000
Subject: [PATCH 1804/4650] [2021-06-20T13:09:52+0000] e2e test


From 8fb08e9d4231d3a74e4b4e6581c72434f63b84b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 14:02:35 +0000
Subject: [PATCH 1805/4650] [2021-06-20T14:02:35+0000] e2e test


From 64150bb6c2c32d8e0bb43f7f816ee0565f8e7379 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 15:02:50 +0000
Subject: [PATCH 1806/4650] [2021-06-20T15:02:50+0000] e2e test


From a3848de1c2361d4284c4c99ef18bd045fe11f5a9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 16:03:09 +0000
Subject: [PATCH 1807/4650] [2021-06-20T16:03:08+0000] e2e test


From 8409fce1cf9c5c367bd1d96ea132e38145e436e0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 17:11:02 +0000
Subject: [PATCH 1808/4650] [2021-06-20T17:11:02+0000] e2e test


From 743d5fdedd1f502f6acd62c167c63a0eab540803 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 18:02:36 +0000
Subject: [PATCH 1809/4650] [2021-06-20T18:02:36+0000] e2e test


From 56fa921871fda6372612d55bce36700559cedb27 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 19:02:29 +0000
Subject: [PATCH 1810/4650] [2021-06-20T19:02:29+0000] e2e test


From 24f45e757e72423d966df554959288ba0e192949 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 20:02:44 +0000
Subject: [PATCH 1811/4650] [2021-06-20T20:02:44+0000] e2e test


From c6d1cf106376dafbf93ac5d3232f53ae95085775 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 21:02:38 +0000
Subject: [PATCH 1812/4650] [2021-06-20T21:02:38+0000] e2e test


From a352d75f0e220e2b39440e6fcab4c2f13336ad5b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 22:02:40 +0000
Subject: [PATCH 1813/4650] [2021-06-20T22:02:40+0000] e2e test


From fa1d8ba03b686767aabb49d241f91ef922fec8c9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 20 Jun 2021 23:02:30 +0000
Subject: [PATCH 1814/4650] [2021-06-20T23:02:30+0000] e2e test


From 992d0ec7c39ab68696b6347869637cfeef12a1e9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 00:03:55 +0000
Subject: [PATCH 1815/4650] [2021-06-21T00:03:55+0000] e2e test


From 0124409f6e4a15b5c6da3979f135bbb38b9c81f8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 01:26:45 +0000
Subject: [PATCH 1816/4650] [2021-06-21T01:26:45+0000] e2e test


From 25920936d7d93a2ee5c0af92847292b65cb898c3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 02:21:11 +0000
Subject: [PATCH 1817/4650] [2021-06-21T02:21:10+0000] e2e test


From c14afb2c66c7bc298bc6d2cfdba86ea8e39294c0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 03:03:27 +0000
Subject: [PATCH 1818/4650] [2021-06-21T03:03:27+0000] e2e test


From 040d7d69e56b900b790299958aef0a18f77f22fc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 04:02:33 +0000
Subject: [PATCH 1819/4650] [2021-06-21T04:02:33+0000] e2e test


From ec1bd0ce7c945a1f8547f3f01a0f905e4ef340b0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 05:04:36 +0000
Subject: [PATCH 1820/4650] [2021-06-21T05:04:36+0000] e2e test


From 30cfc84b0465f37b748c79431ca2143cb499b41a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 06:02:44 +0000
Subject: [PATCH 1821/4650] [2021-06-21T06:02:43+0000] e2e test


From 06554071ed8631fc704b41e0c1a38eaf75ec96c6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 07:05:51 +0000
Subject: [PATCH 1822/4650] [2021-06-21T07:05:51+0000] e2e test


From e01d934c32cc9253c6bc23a54ca48fe31874013f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 08:08:39 +0000
Subject: [PATCH 1823/4650] [2021-06-21T08:08:38+0000] e2e test


From dd1646face35cc44b6e7da835b9c884154fcbf1b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 09:02:29 +0000
Subject: [PATCH 1824/4650] [2021-06-21T09:02:29+0000] e2e test


From b8e643c1a315e67fa1a305cab65a640b70c97299 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 10:02:36 +0000
Subject: [PATCH 1825/4650] [2021-06-21T10:02:36+0000] e2e test


From d857e92f818145d2d479a2ab2a38b5374d8bc6f1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 11:02:26 +0000
Subject: [PATCH 1826/4650] [2021-06-21T11:02:26+0000] e2e test


From 46171fb1466af82e2087b7baf28404a3be65f923 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 12:02:45 +0000
Subject: [PATCH 1827/4650] [2021-06-21T12:02:45+0000] e2e test


From 9920ad3efdf89774f511567c879a8feb756018c6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 13:10:35 +0000
Subject: [PATCH 1828/4650] [2021-06-21T13:10:35+0000] e2e test


From 27f31bc84f2997855dd35f654f21207f9beee8fa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 14:02:38 +0000
Subject: [PATCH 1829/4650] [2021-06-21T14:02:38+0000] e2e test


From cb630c459b69140ac55587d90ada5bc92b02cd1e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 15:02:33 +0000
Subject: [PATCH 1830/4650] [2021-06-21T15:02:33+0000] e2e test


From bda426bd29dd36aaf58feaff08fb7a752c352208 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 16:03:29 +0000
Subject: [PATCH 1831/4650] [2021-06-21T16:03:29+0000] e2e test


From bf35675f1a018dcb39a34f10c74971252679da10 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 17:11:49 +0000
Subject: [PATCH 1832/4650] [2021-06-21T17:11:49+0000] e2e test


From 13730b05f796249a33df7ab09d41c152c4bfebef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 18:02:33 +0000
Subject: [PATCH 1833/4650] [2021-06-21T18:02:32+0000] e2e test


From 3dd6a0a9f4cfce4f38c94c0ede6693f5814e2b12 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 19:02:46 +0000
Subject: [PATCH 1834/4650] [2021-06-21T19:02:46+0000] e2e test


From ac859749d4a7d14e96a9e62cabe3065000596ece Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 20:03:49 +0000
Subject: [PATCH 1835/4650] [2021-06-21T20:03:49+0000] e2e test


From 6590f1941087541f86ad67f095286a4f3bd2398c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 21:02:38 +0000
Subject: [PATCH 1836/4650] [2021-06-21T21:02:38+0000] e2e test


From 3ad39b83124124b1275822640a6d209a698570d6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 22:02:40 +0000
Subject: [PATCH 1837/4650] [2021-06-21T22:02:40+0000] e2e test


From 1a4f3951230d81f1ed971e5f57982b6282b38c57 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 21 Jun 2021 23:02:37 +0000
Subject: [PATCH 1838/4650] [2021-06-21T23:02:37+0000] e2e test


From 02e7e34205e12fe547d85e3dcf12d0740664de91 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 00:04:17 +0000
Subject: [PATCH 1839/4650] [2021-06-22T00:04:17+0000] e2e test


From 847228294977d50f30e4ff32f2436a0382b49b5b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 01:24:12 +0000
Subject: [PATCH 1840/4650] [2021-06-22T01:24:12+0000] e2e test


From f1c58b53004a7c6b83c46f0ed2733273aa44e779 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 02:15:57 +0000
Subject: [PATCH 1841/4650] [2021-06-22T02:15:57+0000] e2e test


From 7373e10febcd7488722584bfc4c8a17db830f03c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 03:02:37 +0000
Subject: [PATCH 1842/4650] [2021-06-22T03:02:37+0000] e2e test


From 58341f0840750de1c399b0ea80c704f36841b596 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 04:02:41 +0000
Subject: [PATCH 1843/4650] [2021-06-22T04:02:41+0000] e2e test


From 29ac39ecc395de6a532abd51c0d19cd643570588 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 05:04:50 +0000
Subject: [PATCH 1844/4650] [2021-06-22T05:04:50+0000] e2e test


From 8c673687a162eebecbdf6d1307d977b719768ffb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 06:02:58 +0000
Subject: [PATCH 1845/4650] [2021-06-22T06:02:58+0000] e2e test


From 8c241a1faf774caeb35933e8123599897f812b61 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 07:04:57 +0000
Subject: [PATCH 1846/4650] [2021-06-22T07:04:57+0000] e2e test


From 24ecff3773483a3e0bdd2dc7a9c43e373a98ec7c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 08:02:47 +0000
Subject: [PATCH 1847/4650] [2021-06-22T08:02:47+0000] e2e test


From ed82c1153e65919a33832a84b43c0295bdce0562 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 09:02:38 +0000
Subject: [PATCH 1848/4650] [2021-06-22T09:02:38+0000] e2e test


From a9b6b7321bbc9bd9c4e5f67b4b5faad08c84b609 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 10:02:48 +0000
Subject: [PATCH 1849/4650] [2021-06-22T10:02:48+0000] e2e test


From cc25177b3245846ee8dc767290fa4f06715114b0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 11:02:30 +0000
Subject: [PATCH 1850/4650] [2021-06-22T11:02:30+0000] e2e test


From ad4281c833ee0f38fe6e144e7244ad98ffb2424f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 12:02:43 +0000
Subject: [PATCH 1851/4650] [2021-06-22T12:02:43+0000] e2e test


From 6581c44c35acdb6494c5c5d42321ea6a8b8631d4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 13:10:23 +0000
Subject: [PATCH 1852/4650] [2021-06-22T13:10:23+0000] e2e test


From 2836e5b71704bd22784d0bd37644a258a86799a1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 14:02:39 +0000
Subject: [PATCH 1853/4650] [2021-06-22T14:02:39+0000] e2e test


From 4f0603391b5ea023a3131690aa1de4d2787655d1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 15:02:42 +0000
Subject: [PATCH 1854/4650] [2021-06-22T15:02:42+0000] e2e test


From 43c415d1b174767edfae6469c48a04f751112e91 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 16:03:45 +0000
Subject: [PATCH 1855/4650] [2021-06-22T16:03:45+0000] e2e test


From 800f56b4fe73594c74ceef62d0f451749868c2e5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 17:11:48 +0000
Subject: [PATCH 1856/4650] [2021-06-22T17:11:48+0000] e2e test


From 89b2b7fce55593118e53c552aec04915dd4f2e47 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 18:02:48 +0000
Subject: [PATCH 1857/4650] [2021-06-22T18:02:47+0000] e2e test


From 52555a20bbd0358aaa7285fdbf815980389e8a1d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 19:02:33 +0000
Subject: [PATCH 1858/4650] [2021-06-22T19:02:33+0000] e2e test


From 54256e8d3919116efd92281911f2fc47832308b1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 20:02:32 +0000
Subject: [PATCH 1859/4650] [2021-06-22T20:02:32+0000] e2e test


From 9e9f6d045c421c30ff9773582bf2288309733826 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 21:02:57 +0000
Subject: [PATCH 1860/4650] [2021-06-22T21:02:57+0000] e2e test


From 65cfdb173f556d1eb40642892b4220f500c78467 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 22:02:47 +0000
Subject: [PATCH 1861/4650] [2021-06-22T22:02:47+0000] e2e test


From 21baa6f21d65e726ff21c0426c22e55602b78550 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 22 Jun 2021 23:02:32 +0000
Subject: [PATCH 1862/4650] [2021-06-22T23:02:32+0000] e2e test


From e1647bc33f014d4a3eeb2a4206c7c707c41ef191 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 00:03:31 +0000
Subject: [PATCH 1863/4650] [2021-06-23T00:03:31+0000] e2e test


From 4c878ba3737b4727613bbd74a72344773911e9b8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 01:21:27 +0000
Subject: [PATCH 1864/4650] [2021-06-23T01:21:27+0000] e2e test


From d08248fec523229c854ba39e100b6a06d7129007 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 02:12:17 +0000
Subject: [PATCH 1865/4650] [2021-06-23T02:12:17+0000] e2e test


From b1cc6af0a21a7fe3bc03272c13e320886e6a1ce9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 03:02:37 +0000
Subject: [PATCH 1866/4650] [2021-06-23T03:02:36+0000] e2e test


From d7526af69859e7aecc5b9a0638458ada30fd8946 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 04:02:46 +0000
Subject: [PATCH 1867/4650] [2021-06-23T04:02:46+0000] e2e test


From 119d147e66c0c54eb49fd6c010336d8c9dc1d4c9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 05:02:30 +0000
Subject: [PATCH 1868/4650] [2021-06-23T05:02:30+0000] e2e test


From 071f4d31c84271b8d294c7d949cd09f8860b6ebb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 06:02:58 +0000
Subject: [PATCH 1869/4650] [2021-06-23T06:02:58+0000] e2e test


From 6cda8271acf18a7f184878648a9449f95fd20577 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 07:02:34 +0000
Subject: [PATCH 1870/4650] [2021-06-23T07:02:34+0000] e2e test


From 7ff132388e6401e42367c52d1eb8febde9e577bf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 08:02:48 +0000
Subject: [PATCH 1871/4650] [2021-06-23T08:02:48+0000] e2e test


From 863d20d58a041c84f0e2c263cf1eafc0543bc1ad Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 09:02:34 +0000
Subject: [PATCH 1872/4650] [2021-06-23T09:02:34+0000] e2e test


From 6838397d1ff26c13ea223e044153563ca51ec229 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 10:02:42 +0000
Subject: [PATCH 1873/4650] [2021-06-23T10:02:42+0000] e2e test


From fcdff26a8178eb4b1ba4b90b2afac5a6c344b920 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 11:02:33 +0000
Subject: [PATCH 1874/4650] [2021-06-23T11:02:33+0000] e2e test


From e07a5d135ddc0376fe4814351ce90f4c6a30c81a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 12:02:43 +0000
Subject: [PATCH 1875/4650] [2021-06-23T12:02:43+0000] e2e test


From 8000063718b6dfce7f232d958f4e41a16a5f19fa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 13:05:01 +0000
Subject: [PATCH 1876/4650] [2021-06-23T13:05:01+0000] e2e test


From eaeffa439a8ed2c00e54037b7ce493f6d67e15db Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 14:02:29 +0000
Subject: [PATCH 1877/4650] [2021-06-23T14:02:29+0000] e2e test


From d1479be98d6121c5d54bad58979508c1176e30bb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 15:02:39 +0000
Subject: [PATCH 1878/4650] [2021-06-23T15:02:39+0000] e2e test


From 13604cbf46f1a548b506c4f406d487cc56109b0d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 16:02:41 +0000
Subject: [PATCH 1879/4650] [2021-06-23T16:02:41+0000] e2e test


From 1323afd85498868d37734096155105cdc393bc7d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 17:05:56 +0000
Subject: [PATCH 1880/4650] [2021-06-23T17:05:56+0000] e2e test


From c7fc5d9bffca8a7d9dba9128d1d497d7752502a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 18:03:32 +0000
Subject: [PATCH 1881/4650] [2021-06-23T18:03:32+0000] e2e test


From 40a8fec3ff783ecd37b0fb29506f4e76610665cc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 19:02:39 +0000
Subject: [PATCH 1882/4650] [2021-06-23T19:02:38+0000] e2e test


From 26fdee1f033ffe2c3a2b710651e747471a286c9a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 20:02:54 +0000
Subject: [PATCH 1883/4650] [2021-06-23T20:02:54+0000] e2e test


From fe2f94e215648b8a7bb9a1c8c9cd9fd6c9bf2d9b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 21:02:45 +0000
Subject: [PATCH 1884/4650] [2021-06-23T21:02:44+0000] e2e test


From 2d7e724031e6ee636e14ac1df62dfe5df690f16b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 22:02:36 +0000
Subject: [PATCH 1885/4650] [2021-06-23T22:02:36+0000] e2e test


From ce4230e1968ee2657946d7403532e0bbeb72cf0b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 23 Jun 2021 23:03:01 +0000
Subject: [PATCH 1886/4650] [2021-06-23T23:03:01+0000] e2e test


From 14c81efe8fda77225c4b0f68a230b7e58cbe3f28 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 00:03:40 +0000
Subject: [PATCH 1887/4650] [2021-06-24T00:03:40+0000] e2e test


From 17f3289a11b1a23ef4cf9e8375044fea6f2832d5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 01:21:57 +0000
Subject: [PATCH 1888/4650] [2021-06-24T01:21:56+0000] e2e test


From 2b836916ae30df9fb5821c809a1e2c8a5e259f46 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 02:09:42 +0000
Subject: [PATCH 1889/4650] [2021-06-24T02:09:42+0000] e2e test


From 9a9256ee3b587b3af47624530785c90b5e6af1ab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 03:02:40 +0000
Subject: [PATCH 1890/4650] [2021-06-24T03:02:39+0000] e2e test


From 0127b68d95586fa56ccd97ebaf7c338dd22f7e34 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 04:02:36 +0000
Subject: [PATCH 1891/4650] [2021-06-24T04:02:36+0000] e2e test


From ab04fc98d59873bcbd5605c9bf22def24dfd88b0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 05:02:19 +0000
Subject: [PATCH 1892/4650] [2021-06-24T05:02:19+0000] e2e test


From 57d7259d807e819f1b6e03c543939d388e666cb9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 06:02:39 +0000
Subject: [PATCH 1893/4650] [2021-06-24T06:02:39+0000] e2e test


From f51d2382249dfa71ac0df306a1cb9787c385f90b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 07:02:21 +0000
Subject: [PATCH 1894/4650] [2021-06-24T07:02:21+0000] e2e test


From dbd83cedbb697dee572cd77da13a6b0e8deeeed8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 08:02:34 +0000
Subject: [PATCH 1895/4650] [2021-06-24T08:02:34+0000] e2e test


From dab5024a87032cfb69182c83a1e76373c9613e49 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 09:02:22 +0000
Subject: [PATCH 1896/4650] [2021-06-24T09:02:22+0000] e2e test


From 9fe26d3ea50d5854b0b1c72820c6d828770fd5b3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 10:02:25 +0000
Subject: [PATCH 1897/4650] [2021-06-24T10:02:25+0000] e2e test


From 4aace5ffd00768948732efd5238dc3698e3c958e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 11:02:21 +0000
Subject: [PATCH 1898/4650] [2021-06-24T11:02:21+0000] e2e test


From c0e4e3f635c3ee8d68c763c7bbb7fb1c4f7b5109 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 12:02:37 +0000
Subject: [PATCH 1899/4650] [2021-06-24T12:02:36+0000] e2e test


From c5c6435bd744e795ce31edd663a863380c688a6c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 13:07:03 +0000
Subject: [PATCH 1900/4650] [2021-06-24T13:07:03+0000] e2e test


From cab97176f0ecf40d509fe16dbe194cbe8d7c6102 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 14:02:24 +0000
Subject: [PATCH 1901/4650] [2021-06-24T14:02:24+0000] e2e test


From 007a41969db8152d5bbe6b42e398ac9a24a6d2c1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 15:02:32 +0000
Subject: [PATCH 1902/4650] [2021-06-24T15:02:32+0000] e2e test


From 5dcf3f6399a2f6274a1435379574b45a7a36f640 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 16:02:40 +0000
Subject: [PATCH 1903/4650] [2021-06-24T16:02:40+0000] e2e test


From 3a96b3f221d47d3496d1057b05e2150d81672e09 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 17:06:54 +0000
Subject: [PATCH 1904/4650] [2021-06-24T17:06:54+0000] e2e test


From 0c5e4f7e57238ea4b2c2cc73aa6afa8b105954a8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 18:02:26 +0000
Subject: [PATCH 1905/4650] [2021-06-24T18:02:26+0000] e2e test


From bb27f896350f0ee7e52305167f1da2c8ba9f8254 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 19:02:21 +0000
Subject: [PATCH 1906/4650] [2021-06-24T19:02:21+0000] e2e test


From 08013f8a5fa3301214a334091d5cf58bcbd82dd0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 20:02:29 +0000
Subject: [PATCH 1907/4650] [2021-06-24T20:02:28+0000] e2e test


From 91391e56be9ba429cb44a48ab524337261c7f6f4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 21:02:40 +0000
Subject: [PATCH 1908/4650] [2021-06-24T21:02:40+0000] e2e test


From f0eb6229e514594be697c3ce30ca4a131964ea31 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 22:02:29 +0000
Subject: [PATCH 1909/4650] [2021-06-24T22:02:29+0000] e2e test


From c907bade0d0a66e53e4575ae6a9948cd68306eec Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 24 Jun 2021 23:02:29 +0000
Subject: [PATCH 1910/4650] [2021-06-24T23:02:28+0000] e2e test


From f9d43c9682569f3ce85133da2e738b1087288a8a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 00:03:39 +0000
Subject: [PATCH 1911/4650] [2021-06-25T00:03:39+0000] e2e test


From e31f8ac621e4bf678a755a5d8c8382af1a844bf3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 01:25:07 +0000
Subject: [PATCH 1912/4650] [2021-06-25T01:25:07+0000] e2e test


From 4e4620c5d29fc31f9fdbaed0e9e2a224e3f08959 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 02:15:26 +0000
Subject: [PATCH 1913/4650] [2021-06-25T02:15:26+0000] e2e test


From 704bb63989241b1f2ce536ee0cefcf009087e1be Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 03:02:34 +0000
Subject: [PATCH 1914/4650] [2021-06-25T03:02:34+0000] e2e test


From 293a6ad1c2156d1e9ca5ac2b55c514ec30e8fbb2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 04:02:34 +0000
Subject: [PATCH 1915/4650] [2021-06-25T04:02:33+0000] e2e test


From b5a6cfd967610847f663e2064f06e43217694c6e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 05:02:16 +0000
Subject: [PATCH 1916/4650] [2021-06-25T05:02:16+0000] e2e test


From 360dacee83f372060fda6d0a00fe002c00e74e51 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 06:02:48 +0000
Subject: [PATCH 1917/4650] [2021-06-25T06:02:48+0000] e2e test


From c61d59621812e86bd22411ee23f3aa926a0c7f41 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 07:02:24 +0000
Subject: [PATCH 1918/4650] [2021-06-25T07:02:24+0000] e2e test


From a1da30b5883d0970aaeb0524e58da95542700a75 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 08:02:42 +0000
Subject: [PATCH 1919/4650] [2021-06-25T08:02:41+0000] e2e test


From c2a2c993581f27f1383cdf48be5d37f66b01b6e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 09:02:33 +0000
Subject: [PATCH 1920/4650] [2021-06-25T09:02:32+0000] e2e test


From 1af98e3d5465a9580e7b5bcb62beef74fe204706 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 10:02:26 +0000
Subject: [PATCH 1921/4650] [2021-06-25T10:02:26+0000] e2e test


From a25c94d16cfe52d897e07f4026b97c183ece8c02 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 11:02:20 +0000
Subject: [PATCH 1922/4650] [2021-06-25T11:02:20+0000] e2e test


From a3a56e31d49987559842f36ddb805b606964c6b0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 12:02:41 +0000
Subject: [PATCH 1923/4650] [2021-06-25T12:02:41+0000] e2e test


From 27ec51916acdb0b19252c13551e8fb58a944f990 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 13:07:15 +0000
Subject: [PATCH 1924/4650] [2021-06-25T13:07:15+0000] e2e test


From 5f497800fe9e07ab6c9a424d65935717ace89400 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 14:02:29 +0000
Subject: [PATCH 1925/4650] [2021-06-25T14:02:29+0000] e2e test


From abd555c9b27e126334fd52581cc8eb418d21b4fe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 15:02:33 +0000
Subject: [PATCH 1926/4650] [2021-06-25T15:02:33+0000] e2e test


From 173bcccb62b16f8dad7a0f8d95eff287d3d3ff41 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 16:02:39 +0000
Subject: [PATCH 1927/4650] [2021-06-25T16:02:39+0000] e2e test


From 065b01e1e2115b9530cb06991cbb449532ac37eb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 17:07:53 +0000
Subject: [PATCH 1928/4650] [2021-06-25T17:07:53+0000] e2e test


From e7544e8cf7012f0fedc27dfe8b6405c10ca420ba Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 18:02:25 +0000
Subject: [PATCH 1929/4650] [2021-06-25T18:02:25+0000] e2e test


From b026817c8c428b44de8e0cac0a6304c888315ad1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 19:02:20 +0000
Subject: [PATCH 1930/4650] [2021-06-25T19:02:20+0000] e2e test


From ac5259361e71219097e35ed553b999f9d536c91e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 20:02:30 +0000
Subject: [PATCH 1931/4650] [2021-06-25T20:02:30+0000] e2e test


From 3e93f886e094166647e941ff3fabb667002c5c8a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 21:02:17 +0000
Subject: [PATCH 1932/4650] [2021-06-25T21:02:17+0000] e2e test


From 791a5485469a1ef73cdbb0edb58abb97ff55994a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 22:02:47 +0000
Subject: [PATCH 1933/4650] [2021-06-25T22:02:46+0000] e2e test


From bff1db36835dc4262afe50fa50e9f3a16289947f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 25 Jun 2021 23:02:31 +0000
Subject: [PATCH 1934/4650] [2021-06-25T23:02:31+0000] e2e test


From 794607e28c3458e4024bd34a9bf2d18d8494a823 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 00:03:29 +0000
Subject: [PATCH 1935/4650] [2021-06-26T00:03:29+0000] e2e test


From 3ec2a7ead7811bad52e362e3b9218985d7337bef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 01:22:25 +0000
Subject: [PATCH 1936/4650] [2021-06-26T01:22:25+0000] e2e test


From 5f5fa7cf2ea5660ab20e04e1bfb5ce016771865e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 02:11:43 +0000
Subject: [PATCH 1937/4650] [2021-06-26T02:11:43+0000] e2e test


From c0e61789402870a32bf585cd02cfbbac40699e31 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 03:02:36 +0000
Subject: [PATCH 1938/4650] [2021-06-26T03:02:36+0000] e2e test


From c5c8b0bae529ffe2f60b84392ad8742568a7b99c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 04:02:30 +0000
Subject: [PATCH 1939/4650] [2021-06-26T04:02:30+0000] e2e test


From 10ade07219899b252e91c47b8c5c55acefe518bb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 05:02:22 +0000
Subject: [PATCH 1940/4650] [2021-06-26T05:02:22+0000] e2e test


From bba147b38d997c38d0098e718ccb76b791c1fc2c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 06:02:53 +0000
Subject: [PATCH 1941/4650] [2021-06-26T06:02:52+0000] e2e test


From 1c5393af252d72de9230b57c7d79979ff49ea36a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 07:02:14 +0000
Subject: [PATCH 1942/4650] [2021-06-26T07:02:14+0000] e2e test


From ca0ca6b99f37185f70dfe1024d0a63b75dc9ae22 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 08:02:45 +0000
Subject: [PATCH 1943/4650] [2021-06-26T08:02:45+0000] e2e test


From c566edc4e5a855835da0e6f513d4f68c9d01ed21 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 09:02:35 +0000
Subject: [PATCH 1944/4650] [2021-06-26T09:02:35+0000] e2e test


From 4d934b36544e8bfee17b2f11ac1dd6fd8aca6af6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 10:02:25 +0000
Subject: [PATCH 1945/4650] [2021-06-26T10:02:25+0000] e2e test


From 490e216096c6bfa3323b0e8449a76ee6d1913ab9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 11:02:18 +0000
Subject: [PATCH 1946/4650] [2021-06-26T11:02:18+0000] e2e test


From e7fa2020fbc744513f6ab3d9eba6e553ebe6d140 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 12:02:48 +0000
Subject: [PATCH 1947/4650] [2021-06-26T12:02:48+0000] e2e test


From 9aa3c43a2d30b7f08b251cebc677fd1d2af9602d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 13:06:17 +0000
Subject: [PATCH 1948/4650] [2021-06-26T13:06:17+0000] e2e test


From 7e0e09bf6cb846f0aab891fbee8f4c07bceec186 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 14:02:27 +0000
Subject: [PATCH 1949/4650] [2021-06-26T14:02:27+0000] e2e test


From 35ad82627d9b40924f5ffaa15aaa1c95bb44a003 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 15:02:30 +0000
Subject: [PATCH 1950/4650] [2021-06-26T15:02:30+0000] e2e test


From b327d6d95b9f425ef786eedf28cb9b9f83c9a0c3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 16:02:33 +0000
Subject: [PATCH 1951/4650] [2021-06-26T16:02:33+0000] e2e test


From a613576bce822118e49f252b08d757ecabe1d22d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 17:06:35 +0000
Subject: [PATCH 1952/4650] [2021-06-26T17:06:35+0000] e2e test


From f6d5ffa5f5bf4101bf229986326e031a9b8c32d7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 18:02:19 +0000
Subject: [PATCH 1953/4650] [2021-06-26T18:02:19+0000] e2e test


From 4880618490743e7729168b02034f0b122b21d6ce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 19:02:18 +0000
Subject: [PATCH 1954/4650] [2021-06-26T19:02:17+0000] e2e test


From a70b4f3b727f25f3a6b93773a4bcedcc8a74f47d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 20:02:52 +0000
Subject: [PATCH 1955/4650] [2021-06-26T20:02:51+0000] e2e test


From 5408206966b33de9e609b4584f592be73999ca2e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 21:02:27 +0000
Subject: [PATCH 1956/4650] [2021-06-26T21:02:27+0000] e2e test


From 8838268efb4c41b24f6bca90f8ffbbdd480a06a3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 22:02:37 +0000
Subject: [PATCH 1957/4650] [2021-06-26T22:02:37+0000] e2e test


From e33162437b1be1ba86bdad3558ecc07024dfa24a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 26 Jun 2021 23:02:33 +0000
Subject: [PATCH 1958/4650] [2021-06-26T23:02:33+0000] e2e test


From 3e28150601d2c9648834f25f088b5701fd673bb2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 00:03:52 +0000
Subject: [PATCH 1959/4650] [2021-06-27T00:03:52+0000] e2e test


From 71092c1d32fcbc9c2ce557013d4546e9eb05f651 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 01:25:26 +0000
Subject: [PATCH 1960/4650] [2021-06-27T01:25:26+0000] e2e test


From 99824d76e3777b00ab7a3d4df73f1e9c663d346f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 02:15:56 +0000
Subject: [PATCH 1961/4650] [2021-06-27T02:15:56+0000] e2e test


From 78da28cde5f6109c181f5081a7acd611fb7c67e0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 03:02:18 +0000
Subject: [PATCH 1962/4650] [2021-06-27T03:02:18+0000] e2e test


From 5cabdb63ecd9a9cef062d440305f88c81d48c443 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 04:02:32 +0000
Subject: [PATCH 1963/4650] [2021-06-27T04:02:31+0000] e2e test


From 05866e66ab670bbf02bce51ffeb3679ea3dce276 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 05:02:28 +0000
Subject: [PATCH 1964/4650] [2021-06-27T05:02:28+0000] e2e test


From cd4421e0f340023c26d7d796b5a88c0d71b051ad Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 06:02:48 +0000
Subject: [PATCH 1965/4650] [2021-06-27T06:02:48+0000] e2e test


From 432b991376ba1bdfb6ff68bf53155fc1f6a71a54 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 07:02:17 +0000
Subject: [PATCH 1966/4650] [2021-06-27T07:02:17+0000] e2e test


From dcb0ab2660fa05906a253cb2777dfd76df8d7e80 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 08:02:43 +0000
Subject: [PATCH 1967/4650] [2021-06-27T08:02:43+0000] e2e test


From b4da0b21ce8242edbddc9887e35c0e0e8b41970a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 09:02:23 +0000
Subject: [PATCH 1968/4650] [2021-06-27T09:02:22+0000] e2e test


From 4c03235fcb0e7d830f0391c953a807c9ea2d71f9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 10:02:37 +0000
Subject: [PATCH 1969/4650] [2021-06-27T10:02:36+0000] e2e test


From ad7bbf41d676486518796c2ff952b5eec474aa38 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 11:02:25 +0000
Subject: [PATCH 1970/4650] [2021-06-27T11:02:25+0000] e2e test


From c3c6b388a764eb8aafd79edd6ee2e94857ce0557 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 12:02:37 +0000
Subject: [PATCH 1971/4650] [2021-06-27T12:02:37+0000] e2e test


From a301073348dd1b0d9f0360c4211d09c63396d31e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 13:06:25 +0000
Subject: [PATCH 1972/4650] [2021-06-27T13:06:25+0000] e2e test


From 08363549eafe3c9ce8988a0dd65f7d8052d0ebbb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 14:02:17 +0000
Subject: [PATCH 1973/4650] [2021-06-27T14:02:17+0000] e2e test


From afc68f90fc605c20f5e51333c98f8b38e4fd78a1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 15:02:30 +0000
Subject: [PATCH 1974/4650] [2021-06-27T15:02:29+0000] e2e test


From 0a1cc44755dd1dee28424f121e093fb3081dad14 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 16:02:35 +0000
Subject: [PATCH 1975/4650] [2021-06-27T16:02:35+0000] e2e test


From 690536fdab428f52534c5aff813936b0752357fa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 17:06:31 +0000
Subject: [PATCH 1976/4650] [2021-06-27T17:06:30+0000] e2e test


From fd43323b3bd587b59d1b3a75bf5b82e9e4312a9e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 18:02:22 +0000
Subject: [PATCH 1977/4650] [2021-06-27T18:02:22+0000] e2e test


From 027c52ddcc55fbbb93724bfaf65506ff170ccb01 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 19:02:13 +0000
Subject: [PATCH 1978/4650] [2021-06-27T19:02:13+0000] e2e test


From eceff6acb3e940068d2886adc9691cbea0b91f48 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 20:02:45 +0000
Subject: [PATCH 1979/4650] [2021-06-27T20:02:45+0000] e2e test


From 135db7570b726a17a1b7a8e6b3b88754e66dda18 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 21:02:17 +0000
Subject: [PATCH 1980/4650] [2021-06-27T21:02:17+0000] e2e test


From adf72fb27bd8120fa1fe1a08e6f3d0b1c97b4d81 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 22:02:24 +0000
Subject: [PATCH 1981/4650] [2021-06-27T22:02:24+0000] e2e test


From 1007bd7263352cae3dc9d65b6f59e3c9aac8e1aa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 27 Jun 2021 23:02:23 +0000
Subject: [PATCH 1982/4650] [2021-06-27T23:02:23+0000] e2e test


From 9ac6b79e21bb302595d1615c3653ab88da4fc0ac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 00:03:38 +0000
Subject: [PATCH 1983/4650] [2021-06-28T00:03:38+0000] e2e test


From 1b4f20fa250473f58d36d41d094636997082fb08 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 01:23:56 +0000
Subject: [PATCH 1984/4650] [2021-06-28T01:23:56+0000] e2e test


From b7fa1b9376220924d13ea78bb66cfdba9c494921 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 02:14:15 +0000
Subject: [PATCH 1985/4650] [2021-06-28T02:14:15+0000] e2e test


From bf3aa7a9d485f4b660c5d0fd600a693886cd9dc3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 03:02:24 +0000
Subject: [PATCH 1986/4650] [2021-06-28T03:02:24+0000] e2e test


From 27ed1d70273e04613330260a0cfa92f1085d1edd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 04:02:37 +0000
Subject: [PATCH 1987/4650] [2021-06-28T04:02:37+0000] e2e test


From 786f62d9952e834a35593f683c68ef70b3de5a49 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 05:02:22 +0000
Subject: [PATCH 1988/4650] [2021-06-28T05:02:22+0000] e2e test


From 7a93fbd1f056782ff3c41aadc2a704b2247fa336 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 06:02:27 +0000
Subject: [PATCH 1989/4650] [2021-06-28T06:02:27+0000] e2e test


From 86e0ccd72cbc56d3087a229131a1f72d4100233b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 07:02:17 +0000
Subject: [PATCH 1990/4650] [2021-06-28T07:02:17+0000] e2e test


From 9e36a2b8c94e593a94192865d63dbab5e5397a97 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 08:02:44 +0000
Subject: [PATCH 1991/4650] [2021-06-28T08:02:44+0000] e2e test


From 485c00dd2ad9fd7652bf14a740a7490999eedaca Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 09:02:25 +0000
Subject: [PATCH 1992/4650] [2021-06-28T09:02:25+0000] e2e test


From 3ee3d0c8a09afa4afc6e48a09c65f671f1381c26 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 10:02:24 +0000
Subject: [PATCH 1993/4650] [2021-06-28T10:02:24+0000] e2e test


From 7dfc34a58e4d8752a5d968aaf0439433f6ec6f98 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 11:02:30 +0000
Subject: [PATCH 1994/4650] [2021-06-28T11:02:30+0000] e2e test


From 466334ea7e10446ccf3948cae28babf80851abb6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 12:02:31 +0000
Subject: [PATCH 1995/4650] [2021-06-28T12:02:31+0000] e2e test


From b938521e02901bdde15f8035fc37feed87660499 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 13:07:30 +0000
Subject: [PATCH 1996/4650] [2021-06-28T13:07:30+0000] e2e test


From cb2eaf479ef7ac049d2f904109d15540de4469ac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 14:02:19 +0000
Subject: [PATCH 1997/4650] [2021-06-28T14:02:19+0000] e2e test


From 7d592a61a4ad9d3bfe611a41a21153ebe23bf741 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 15:02:34 +0000
Subject: [PATCH 1998/4650] [2021-06-28T15:02:34+0000] e2e test


From c33c803d66224275ef8d948ccccb2bc220ffe3e4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 16:02:30 +0000
Subject: [PATCH 1999/4650] [2021-06-28T16:02:30+0000] e2e test


From 97ef589eee832f578c0f87dbd80b0cfebb485123 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 17:18:31 +0000
Subject: [PATCH 2000/4650] [2021-06-28T17:18:31+0000] e2e test


From cde402a84c323411c5521c64f06ffdf1c6a8857d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 18:10:33 +0000
Subject: [PATCH 2001/4650] [2021-06-28T18:10:33+0000] e2e test


From 8f1fc7b8b2992fc07036f8770f8267895687bb36 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 19:03:26 +0000
Subject: [PATCH 2002/4650] [2021-06-28T19:03:26+0000] e2e test


From 2f09d7c233b55b82b5f5fab38d726018a34068f9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 20:03:12 +0000
Subject: [PATCH 2003/4650] [2021-06-28T20:03:12+0000] e2e test


From e0d6132340c14e7828c24c32f894f9073cefb1bb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 21:02:22 +0000
Subject: [PATCH 2004/4650] [2021-06-28T21:02:22+0000] e2e test


From 58f31771784d13feb96b290aa9888e8f18b7c10f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 22:02:25 +0000
Subject: [PATCH 2005/4650] [2021-06-28T22:02:25+0000] e2e test


From ee770180ac5e0961b70bd7e9ba2b6b9a7c7be090 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 28 Jun 2021 23:02:17 +0000
Subject: [PATCH 2006/4650] [2021-06-28T23:02:17+0000] e2e test


From e8862e8ebb28d84957f0da488a2b00fd9c45092c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 00:03:22 +0000
Subject: [PATCH 2007/4650] [2021-06-29T00:03:22+0000] e2e test


From ec66bf89f8da301195743dcb73d85bdb765e95b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 01:23:06 +0000
Subject: [PATCH 2008/4650] [2021-06-29T01:23:06+0000] e2e test


From 38c7ca4d007c8714bf8ee089510599a1fc74c2df Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 02:13:08 +0000
Subject: [PATCH 2009/4650] [2021-06-29T02:13:08+0000] e2e test


From c971777db7dbf001887ca9d6674fee4e7f9ad109 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 03:02:47 +0000
Subject: [PATCH 2010/4650] [2021-06-29T03:02:47+0000] e2e test


From b54229a53fd09e9e05071eb8fc6e8ac95c037454 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 04:02:27 +0000
Subject: [PATCH 2011/4650] [2021-06-29T04:02:26+0000] e2e test


From 0f4b6c8dd4183ef1834e166bd67ecfe183508673 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 05:02:25 +0000
Subject: [PATCH 2012/4650] [2021-06-29T05:02:25+0000] e2e test


From ec65c515946dcd73416a30ae087599b6f4cabb90 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 06:02:33 +0000
Subject: [PATCH 2013/4650] [2021-06-29T06:02:33+0000] e2e test


From 3855372fab172662cc85ce2554532fe7f136b052 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 07:02:20 +0000
Subject: [PATCH 2014/4650] [2021-06-29T07:02:20+0000] e2e test


From e0ff3e2e09e0933ccf718d66b2f61a73e755c1bd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 08:02:34 +0000
Subject: [PATCH 2015/4650] [2021-06-29T08:02:34+0000] e2e test


From 24d86f2f857709e0a66f277461b79dbc7dd1e296 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 09:02:29 +0000
Subject: [PATCH 2016/4650] [2021-06-29T09:02:29+0000] e2e test


From 97f7ea42a7944f07abcb06cab76196e033e39d38 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 10:02:23 +0000
Subject: [PATCH 2017/4650] [2021-06-29T10:02:23+0000] e2e test


From 357f07b51b93bb4621010fb218777072778919aa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 11:02:23 +0000
Subject: [PATCH 2018/4650] [2021-06-29T11:02:23+0000] e2e test


From 5b970cfed20d1e97ceefde80f881433a470820d2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 12:02:32 +0000
Subject: [PATCH 2019/4650] [2021-06-29T12:02:32+0000] e2e test


From 813631ea365aa7dc60e6fed039f0764bbfcd38c7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 14:02:29 +0000
Subject: [PATCH 2020/4650] [2021-06-29T14:02:29+0000] e2e test


From 420ae62ceb07fcfc59e79ce8b36245f63554c48d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 15:02:24 +0000
Subject: [PATCH 2021/4650] [2021-06-29T15:02:24+0000] e2e test


From afdc493783b54d52bc3322318e73e00a96b47206 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 16:02:31 +0000
Subject: [PATCH 2022/4650] [2021-06-29T16:02:31+0000] e2e test


From a1990458fda969453707da7fb32641f941a6d398 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 17:07:37 +0000
Subject: [PATCH 2023/4650] [2021-06-29T17:07:37+0000] e2e test


From 7570976da07579e5a4dadfb91d2c576efd4dac19 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 18:02:26 +0000
Subject: [PATCH 2024/4650] [2021-06-29T18:02:26+0000] e2e test


From 5ead9e7b222676ee41e2429d0973a58f98f41379 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 19:02:19 +0000
Subject: [PATCH 2025/4650] [2021-06-29T19:02:19+0000] e2e test


From 13a400d11a9de678f32e399641062200cdc7e026 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 20:02:39 +0000
Subject: [PATCH 2026/4650] [2021-06-29T20:02:38+0000] e2e test


From df7163e2c512244e2c275761577349626bcd0875 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 21:02:38 +0000
Subject: [PATCH 2027/4650] [2021-06-29T21:02:38+0000] e2e test


From fbfc747e7416ad0ee7ad36e13a036d4e05433ff7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 22:02:26 +0000
Subject: [PATCH 2028/4650] [2021-06-29T22:02:26+0000] e2e test


From 7f334e6be18318c9539ab0b7018532649da3a277 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 29 Jun 2021 23:02:25 +0000
Subject: [PATCH 2029/4650] [2021-06-29T23:02:25+0000] e2e test


From 502298814eade768fb18f9ef788b2688a6bbb858 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 00:03:36 +0000
Subject: [PATCH 2030/4650] [2021-06-30T00:03:36+0000] e2e test


From 6367d555a3ecfce61b6334c71a5dba94803c131d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 01:24:29 +0000
Subject: [PATCH 2031/4650] [2021-06-30T01:24:29+0000] e2e test


From 127fdacb08f64c28cfdd2af72e6022be9c430355 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 02:15:57 +0000
Subject: [PATCH 2032/4650] [2021-06-30T02:15:56+0000] e2e test


From 55146b0bef62ee3f1323792653817c44e9151528 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 03:02:24 +0000
Subject: [PATCH 2033/4650] [2021-06-30T03:02:24+0000] e2e test


From 0337e059c048d4562f37514b2dfa68db026c6ba1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 04:02:25 +0000
Subject: [PATCH 2034/4650] [2021-06-30T04:02:25+0000] e2e test


From 8e48202df27edc3ca648bbbf163aa477d343aa77 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 05:02:22 +0000
Subject: [PATCH 2035/4650] [2021-06-30T05:02:22+0000] e2e test


From 593fb98a9e151ce6606f4c0e49c59f9eb766ee0a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 06:02:52 +0000
Subject: [PATCH 2036/4650] [2021-06-30T06:02:52+0000] e2e test


From 9b7871e7f9e1332747a2c4a382f6509648aa4864 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 07:02:23 +0000
Subject: [PATCH 2037/4650] [2021-06-30T07:02:23+0000] e2e test


From 1eb5cdbf09457aa6139be88e1e733cb3502b22e4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 08:02:29 +0000
Subject: [PATCH 2038/4650] [2021-06-30T08:02:29+0000] e2e test


From 71a7524018287b8fa279dde76b8a8146ba3387c9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 09:02:25 +0000
Subject: [PATCH 2039/4650] [2021-06-30T09:02:25+0000] e2e test


From 0c3f931620c966cfadabfc4aeee10d9f4860f989 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 10:02:35 +0000
Subject: [PATCH 2040/4650] [2021-06-30T10:02:35+0000] e2e test


From e00a678601bb2ede6d547602a879ef41fa37bec7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 11:02:35 +0000
Subject: [PATCH 2041/4650] [2021-06-30T11:02:35+0000] e2e test


From 8c7856af9ea29482739398ce4ec25b0becde0b21 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 12:02:48 +0000
Subject: [PATCH 2042/4650] [2021-06-30T12:02:47+0000] e2e test


From b6e715892a501646fdf2d9731361f28e6248cc02 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 13:07:23 +0000
Subject: [PATCH 2043/4650] [2021-06-30T13:07:23+0000] e2e test


From 3c743abffc5a90ce9b39d8121ef6714591e36803 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 14:02:25 +0000
Subject: [PATCH 2044/4650] [2021-06-30T14:02:25+0000] e2e test


From 2caac9c1d55e6d8ac87750c8c14b0422e50c518f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 15:02:43 +0000
Subject: [PATCH 2045/4650] [2021-06-30T15:02:43+0000] e2e test


From 8303a8e904451edb23b4cd0ad722ebbce1ce5a21 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 16:02:32 +0000
Subject: [PATCH 2046/4650] [2021-06-30T16:02:32+0000] e2e test


From 83f684a12afe87899994e2b298b3e32636f51c78 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 17:09:04 +0000
Subject: [PATCH 2047/4650] [2021-06-30T17:09:04+0000] e2e test


From dfb9c563d7ee0da8aa4e61f1e1c20e823a2c4e37 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 18:02:27 +0000
Subject: [PATCH 2048/4650] [2021-06-30T18:02:27+0000] e2e test


From 532a2e393dc2bfe87abc206dbf6f89ceed573529 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 19:02:14 +0000
Subject: [PATCH 2049/4650] [2021-06-30T19:02:14+0000] e2e test


From c8e17f4a44f032c77fd6cf019793b98d12461f43 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 20:02:33 +0000
Subject: [PATCH 2050/4650] [2021-06-30T20:02:33+0000] e2e test


From 807575405d19e2195bf7b7c819f421667bed7761 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 21:02:56 +0000
Subject: [PATCH 2051/4650] [2021-06-30T21:02:56+0000] e2e test


From ad08d12cb41d16678430c9a830aaa80345881251 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 22:02:23 +0000
Subject: [PATCH 2052/4650] [2021-06-30T22:02:23+0000] e2e test


From f46d6e813ddd0b18aa0a2b1d75f1e32b3ee5b9e2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 30 Jun 2021 23:02:20 +0000
Subject: [PATCH 2053/4650] [2021-06-30T23:02:20+0000] e2e test


From 2fdbda862045a81d5c6c156b5019dd4d0398bb33 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 00:03:56 +0000
Subject: [PATCH 2054/4650] [2021-07-01T00:03:56+0000] e2e test


From c79577d8372e0d24570073ef071eb62d56d445b5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 01:24:37 +0000
Subject: [PATCH 2055/4650] [2021-07-01T01:24:37+0000] e2e test


From c1836fc87d97ea5f8d1b2d95fbf4937c3b098ba6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 02:13:54 +0000
Subject: [PATCH 2056/4650] [2021-07-01T02:13:54+0000] e2e test


From f7808906a647520be549f1f64638cdc3e437fdcd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 03:02:59 +0000
Subject: [PATCH 2057/4650] [2021-07-01T03:02:59+0000] e2e test


From 14704755cb5ed15c5926703fde05df46c1c3c630 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 04:02:34 +0000
Subject: [PATCH 2058/4650] [2021-07-01T04:02:34+0000] e2e test


From 87cb0f7bbc49099d46ccbb5416049207b4e38c29 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 05:03:54 +0000
Subject: [PATCH 2059/4650] [2021-07-01T05:03:54+0000] e2e test


From f714c3977c74eeffbb32250e4a6a64c0913484e8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 06:02:38 +0000
Subject: [PATCH 2060/4650] [2021-07-01T06:02:38+0000] e2e test


From ba66a7c1446bbc44031ee52e9bbc348db7619192 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 07:02:27 +0000
Subject: [PATCH 2061/4650] [2021-07-01T07:02:27+0000] e2e test


From da59172ca82e2faec25ef567042d95a155163f83 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 08:02:44 +0000
Subject: [PATCH 2062/4650] [2021-07-01T08:02:44+0000] e2e test


From 20aa17e353001346cbf64aac0a8e665ce47ba6e0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 09:02:27 +0000
Subject: [PATCH 2063/4650] [2021-07-01T09:02:27+0000] e2e test


From d499fafda6384be80d68b85680baf27fc99e9b02 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 10:02:27 +0000
Subject: [PATCH 2064/4650] [2021-07-01T10:02:27+0000] e2e test


From f696cd8563cfaf56e16b502412d348f778724cc2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 11:02:22 +0000
Subject: [PATCH 2065/4650] [2021-07-01T11:02:22+0000] e2e test


From 2e5a98f32f83170cda17d5d627c7104e11b2bb56 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 12:02:40 +0000
Subject: [PATCH 2066/4650] [2021-07-01T12:02:40+0000] e2e test


From 0dfef708246d2b8f9b6156e8cf3080ec87975b04 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 13:06:42 +0000
Subject: [PATCH 2067/4650] [2021-07-01T13:06:42+0000] e2e test


From f4287d7daba881ad81f82af463e778e62f2e360d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 14:02:35 +0000
Subject: [PATCH 2068/4650] [2021-07-01T14:02:35+0000] e2e test


From d5f6e698b855079432a7b53af4ece94f957ce05d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 15:02:29 +0000
Subject: [PATCH 2069/4650] [2021-07-01T15:02:29+0000] e2e test


From d52d9aab87c70ecd67c114a6055db5098c407da0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 16:02:30 +0000
Subject: [PATCH 2070/4650] [2021-07-01T16:02:29+0000] e2e test


From 6b0a88f354ac984661b3d098df81ded844a8fcbf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 17:08:02 +0000
Subject: [PATCH 2071/4650] [2021-07-01T17:08:02+0000] e2e test


From 8ce088395dfb6753a938cdfc060c3b69c45e763f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 18:02:28 +0000
Subject: [PATCH 2072/4650] [2021-07-01T18:02:28+0000] e2e test


From b7e87d36788f7c6df41af1698147b0c43865e058 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 19:02:33 +0000
Subject: [PATCH 2073/4650] [2021-07-01T19:02:33+0000] e2e test


From f1c31ca70c0400d99606b5d933f49b2164474eac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 20:02:55 +0000
Subject: [PATCH 2074/4650] [2021-07-01T20:02:55+0000] e2e test


From b59f522c6543d6d870654743ca40c4dd96325504 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 21:02:30 +0000
Subject: [PATCH 2075/4650] [2021-07-01T21:02:30+0000] e2e test


From 2f0d421dab88a0e1ab93e4a1654bc1a89706fcf0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 22:02:29 +0000
Subject: [PATCH 2076/4650] [2021-07-01T22:02:29+0000] e2e test


From 5137eb548bef7f3f2dfdf54c246ebcd4d85f06de Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 1 Jul 2021 23:02:48 +0000
Subject: [PATCH 2077/4650] [2021-07-01T23:02:47+0000] e2e test


From 1dbf89e6ebb58bc1203c48b29aa7be7b97b98edf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 00:03:33 +0000
Subject: [PATCH 2078/4650] [2021-07-02T00:03:33+0000] e2e test


From 7a152c15e68944555879a2bc41049782bcc1e9fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 01:24:17 +0000
Subject: [PATCH 2079/4650] [2021-07-02T01:24:17+0000] e2e test


From 0a9dc3aa53855e673eb7d41234cfcecf174721ca Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 02:12:41 +0000
Subject: [PATCH 2080/4650] [2021-07-02T02:12:41+0000] e2e test


From 2d5a53a9cab8dec89e626d461fac6eb3b115b4c8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 03:02:33 +0000
Subject: [PATCH 2081/4650] [2021-07-02T03:02:33+0000] e2e test


From c2ad24b743332713b41a4b1dcf8ab9fd040312cf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 04:02:31 +0000
Subject: [PATCH 2082/4650] [2021-07-02T04:02:31+0000] e2e test


From 81fc81b0575daa5f68d0c74f6365a71376b9ac04 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 05:02:29 +0000
Subject: [PATCH 2083/4650] [2021-07-02T05:02:29+0000] e2e test


From f59fd5360d17c16267aaa91e17e72080dc525830 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 06:02:31 +0000
Subject: [PATCH 2084/4650] [2021-07-02T06:02:31+0000] e2e test


From 9ea75dcbe3eca70b942ace19297e4e00012ca1b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 07:02:26 +0000
Subject: [PATCH 2085/4650] [2021-07-02T07:02:26+0000] e2e test


From 4180f3d155cc1e3b0fe858eaafd899ddf5f6c8c1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 08:02:30 +0000
Subject: [PATCH 2086/4650] [2021-07-02T08:02:30+0000] e2e test


From 5a3c9bcefca29ceadcdf542a38f3e1f8f7a6519e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 09:02:35 +0000
Subject: [PATCH 2087/4650] [2021-07-02T09:02:35+0000] e2e test


From 25c9802d158a6cb61f08248633fae72ab291181b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 10:02:33 +0000
Subject: [PATCH 2088/4650] [2021-07-02T10:02:33+0000] e2e test


From d1b93cf05b36b06da316d264eceaf10306beb96f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 11:02:21 +0000
Subject: [PATCH 2089/4650] [2021-07-02T11:02:21+0000] e2e test


From 8d7a79386facdd617d391a4c859baad1b10a2a27 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 12:02:56 +0000
Subject: [PATCH 2090/4650] [2021-07-02T12:02:56+0000] e2e test


From d6b27bbe07aaf402f59918a91b19355fdcc50c5f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 13:06:23 +0000
Subject: [PATCH 2091/4650] [2021-07-02T13:06:23+0000] e2e test


From 111fb35355400da6e90927b6554ec4e5c95a1ab9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 14:02:26 +0000
Subject: [PATCH 2092/4650] [2021-07-02T14:02:26+0000] e2e test


From b886111e256344fe52befead83a284fecb451787 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 15:02:31 +0000
Subject: [PATCH 2093/4650] [2021-07-02T15:02:31+0000] e2e test


From 29f576c758fc9b242c27d0e16abb26054c51817e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 16:02:39 +0000
Subject: [PATCH 2094/4650] [2021-07-02T16:02:39+0000] e2e test


From 77d32aabcc7f73c8ec8c3a3c42e05f109ac96ff3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 17:08:01 +0000
Subject: [PATCH 2095/4650] [2021-07-02T17:08:01+0000] e2e test


From 6505b6f94c79586f689a22bf0e1ae65a8aa1c20e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 18:02:26 +0000
Subject: [PATCH 2096/4650] [2021-07-02T18:02:25+0000] e2e test


From 79c536902e4ccea31d9cc83397ffea577081b8a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 19:03:26 +0000
Subject: [PATCH 2097/4650] [2021-07-02T19:03:26+0000] e2e test


From fd8550455c007957149c8b9ea95e63b20bbad8c1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 20:02:27 +0000
Subject: [PATCH 2098/4650] [2021-07-02T20:02:27+0000] e2e test


From 920417c6397a86805494a591c31635f0b5ac8fd6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 21:02:24 +0000
Subject: [PATCH 2099/4650] [2021-07-02T21:02:23+0000] e2e test


From fe78f979733bd6bcbc40f467e084f70dfb66edba Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 22:02:48 +0000
Subject: [PATCH 2100/4650] [2021-07-02T22:02:48+0000] e2e test


From 99b97da843f144c60d90c0749d07f654bfd939ec Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 2 Jul 2021 23:02:26 +0000
Subject: [PATCH 2101/4650] [2021-07-02T23:02:26+0000] e2e test


From cea1ed138d29b07320a25d50e8c9f50f0dd6ab8a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 00:03:28 +0000
Subject: [PATCH 2102/4650] [2021-07-03T00:03:28+0000] e2e test


From 5ffe06938a041d34558baf9a5cff62c7861920a9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 01:22:17 +0000
Subject: [PATCH 2103/4650] [2021-07-03T01:22:16+0000] e2e test


From 17cc208f9bff111f70de00a1467c8c79803a76f2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 02:09:24 +0000
Subject: [PATCH 2104/4650] [2021-07-03T02:09:24+0000] e2e test


From 7fd3475bedf83c74040f286be936439029bbee5d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 03:02:44 +0000
Subject: [PATCH 2105/4650] [2021-07-03T03:02:44+0000] e2e test


From 606e80b3af4880e81b5b452ce390fc717d3f9e58 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 04:02:32 +0000
Subject: [PATCH 2106/4650] [2021-07-03T04:02:32+0000] e2e test


From cf6b54576cfa62a903619dd834af823f92b87267 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 05:02:18 +0000
Subject: [PATCH 2107/4650] [2021-07-03T05:02:18+0000] e2e test


From 28c6381d0128a6673c96bfd04c5ba6b783e65756 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 06:02:38 +0000
Subject: [PATCH 2108/4650] [2021-07-03T06:02:37+0000] e2e test


From 7cf03299f97871bb4b2a88f38e8c8f4e6c5e72cd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 07:02:26 +0000
Subject: [PATCH 2109/4650] [2021-07-03T07:02:26+0000] e2e test


From c8407bed3332906a56d3b1cc00024879b89125b8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 08:02:29 +0000
Subject: [PATCH 2110/4650] [2021-07-03T08:02:29+0000] e2e test


From e5dda60a7cbc19903ca9c129496c77ea6576e170 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 09:02:30 +0000
Subject: [PATCH 2111/4650] [2021-07-03T09:02:30+0000] e2e test


From 17c4a9ad5ed7c7d9918684683f7ea9eff250502a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 10:02:26 +0000
Subject: [PATCH 2112/4650] [2021-07-03T10:02:25+0000] e2e test


From 069779908665dbf3ea3226e294581290215617ac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 11:02:36 +0000
Subject: [PATCH 2113/4650] [2021-07-03T11:02:36+0000] e2e test


From 6ccedf538b623acf040560ed1c345659141183a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 12:02:55 +0000
Subject: [PATCH 2114/4650] [2021-07-03T12:02:55+0000] e2e test


From 59920a69f93f9b840c3984da99e485105c83c18b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 13:05:07 +0000
Subject: [PATCH 2115/4650] [2021-07-03T13:05:07+0000] e2e test


From 6a963c60a446cc6bbf2c6969b0789c369729d595 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 14:02:46 +0000
Subject: [PATCH 2116/4650] [2021-07-03T14:02:46+0000] e2e test


From 2409888c22bb4187bd48105b04b6f6e0fae52944 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 15:02:28 +0000
Subject: [PATCH 2117/4650] [2021-07-03T15:02:28+0000] e2e test


From 40049c52ec619b7980392eb4df308077d6346f33 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 16:02:32 +0000
Subject: [PATCH 2118/4650] [2021-07-03T16:02:32+0000] e2e test


From 9e1a5a73540c16ca5ec52f3b17bfb00118061f5e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 17:06:09 +0000
Subject: [PATCH 2119/4650] [2021-07-03T17:06:09+0000] e2e test


From a87b9a028f5f6f945ed948172bcb27a2e0f52e21 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 18:02:35 +0000
Subject: [PATCH 2120/4650] [2021-07-03T18:02:35+0000] e2e test


From 735a140d7e967991fa04afb638921a4562bc7f88 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 19:02:12 +0000
Subject: [PATCH 2121/4650] [2021-07-03T19:02:12+0000] e2e test


From 39ef364fc3c619e7629f43280abfaf68cad3df98 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 20:02:27 +0000
Subject: [PATCH 2122/4650] [2021-07-03T20:02:27+0000] e2e test


From e92ba71e77d478cd2590741857e12d69d7df60fa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 21:02:34 +0000
Subject: [PATCH 2123/4650] [2021-07-03T21:02:34+0000] e2e test


From a898280395a3cdc6dee3dbfc18961a80bfc61e84 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 22:02:23 +0000
Subject: [PATCH 2124/4650] [2021-07-03T22:02:23+0000] e2e test


From b03a4217e4fca10adcbe3c6418718cbd6f1ce8d9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 3 Jul 2021 23:02:31 +0000
Subject: [PATCH 2125/4650] [2021-07-03T23:02:31+0000] e2e test


From 731403b7ffb0f65b4d81641e02a4cb0246921728 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 00:04:03 +0000
Subject: [PATCH 2126/4650] [2021-07-04T00:04:03+0000] e2e test


From 45d0bef873bfbeb82dad82f8e815b5dcc1a4f00d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 01:23:38 +0000
Subject: [PATCH 2127/4650] [2021-07-04T01:23:38+0000] e2e test


From a68a61bc6ccfc25dda765ca96a41ab0bd5260c9f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 02:10:37 +0000
Subject: [PATCH 2128/4650] [2021-07-04T02:10:37+0000] e2e test


From fe99057661d02b16175d78febb373921be162b2c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 03:02:24 +0000
Subject: [PATCH 2129/4650] [2021-07-04T03:02:24+0000] e2e test


From da0697a0baf181d12e00c0a3e2c70c4a81f13daf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 04:02:29 +0000
Subject: [PATCH 2130/4650] [2021-07-04T04:02:28+0000] e2e test


From f0335ceca871497337e7c87bb1c1b038b169d47b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 05:02:16 +0000
Subject: [PATCH 2131/4650] [2021-07-04T05:02:16+0000] e2e test


From 5941ab7f4baa2a6456ef7e444ea689248859a465 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 06:02:33 +0000
Subject: [PATCH 2132/4650] [2021-07-04T06:02:33+0000] e2e test


From b4e9a1e0f9d0708d2f10cfb3210aa864eb070585 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 07:02:16 +0000
Subject: [PATCH 2133/4650] [2021-07-04T07:02:16+0000] e2e test


From 2edcf7de8a96cc1ceef4a7d3102ab0560e9c2aae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 08:02:44 +0000
Subject: [PATCH 2134/4650] [2021-07-04T08:02:44+0000] e2e test


From 66ba8104517b81560ff56de6ffc7e2036418e3f5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 09:02:40 +0000
Subject: [PATCH 2135/4650] [2021-07-04T09:02:40+0000] e2e test


From b9a5033638b9f8e7ff6e3c39fab1a56bb4691d35 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 10:02:22 +0000
Subject: [PATCH 2136/4650] [2021-07-04T10:02:22+0000] e2e test


From a7eb46afc15e10dfc6b80b5d9d855b275d2ff7c5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 11:02:33 +0000
Subject: [PATCH 2137/4650] [2021-07-04T11:02:33+0000] e2e test


From d93d0bb668f02aa4119e2b91c3ff62f4311a10d2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 12:02:30 +0000
Subject: [PATCH 2138/4650] [2021-07-04T12:02:30+0000] e2e test


From b3d6930ee03c05f6213226da7809c0d06b4cc107 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 13:05:13 +0000
Subject: [PATCH 2139/4650] [2021-07-04T13:05:13+0000] e2e test


From acf2e96e144a45b849ec4ff664a1bbb305916d87 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 14:02:33 +0000
Subject: [PATCH 2140/4650] [2021-07-04T14:02:33+0000] e2e test


From 6d02dbec1e71d3c2c17d575ce9f837d6db3ad80a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 15:02:29 +0000
Subject: [PATCH 2141/4650] [2021-07-04T15:02:29+0000] e2e test


From a397786e5d88ef52d709950055cfd6a7f4c5fb95 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 16:02:31 +0000
Subject: [PATCH 2142/4650] [2021-07-04T16:02:31+0000] e2e test


From 6c67d000a63a503600950d85625936ec21b2dc1d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 17:05:57 +0000
Subject: [PATCH 2143/4650] [2021-07-04T17:05:57+0000] e2e test


From c2b3259db3b6cf70a7fc2330d6489d789a13cf16 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 18:02:29 +0000
Subject: [PATCH 2144/4650] [2021-07-04T18:02:29+0000] e2e test


From a8a59d514a6a5d2aef61ba559c766970959ba587 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 19:02:19 +0000
Subject: [PATCH 2145/4650] [2021-07-04T19:02:19+0000] e2e test


From ed3b80ce122d9255578901f4ba8fa771b430be29 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 20:02:30 +0000
Subject: [PATCH 2146/4650] [2021-07-04T20:02:30+0000] e2e test


From 5a40c0b96e2255ea62956ce7cf9e46ea3a547853 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 21:02:24 +0000
Subject: [PATCH 2147/4650] [2021-07-04T21:02:24+0000] e2e test


From 21ace1380a76225f74896897432ae08ee495b238 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 22:02:32 +0000
Subject: [PATCH 2148/4650] [2021-07-04T22:02:32+0000] e2e test


From 7e479e5cc25934b7c398337705c3a83fd6f41a30 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 4 Jul 2021 23:02:43 +0000
Subject: [PATCH 2149/4650] [2021-07-04T23:02:43+0000] e2e test


From ec5a1ff6717e435fea74d493ed4ac4bc4582b950 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 00:03:48 +0000
Subject: [PATCH 2150/4650] [2021-07-05T00:03:48+0000] e2e test


From eb0090435812b4c9807f1e02e002e70724e3a17b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 01:23:27 +0000
Subject: [PATCH 2151/4650] [2021-07-05T01:23:27+0000] e2e test


From cd3b2d333e81708e834e3ec35f2a645ea3e5cf90 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 02:11:03 +0000
Subject: [PATCH 2152/4650] [2021-07-05T02:11:03+0000] e2e test


From 5e1540b02edf1324289b1ac84efdd9d8559d260d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 03:02:38 +0000
Subject: [PATCH 2153/4650] [2021-07-05T03:02:38+0000] e2e test


From 94e5d9bca6cdda3a7fd9b422b9c3dacd4bf25927 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 04:02:41 +0000
Subject: [PATCH 2154/4650] [2021-07-05T04:02:41+0000] e2e test


From 2941899f49f5599c9602331b5fe34e98d4a59c9f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 05:02:19 +0000
Subject: [PATCH 2155/4650] [2021-07-05T05:02:19+0000] e2e test


From a840f9a74b821f4ccef9cf65babf8975bce1249c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 06:02:47 +0000
Subject: [PATCH 2156/4650] [2021-07-05T06:02:47+0000] e2e test


From b8d8781d850ff7cf7b5e5772478be06d46706903 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 07:02:19 +0000
Subject: [PATCH 2157/4650] [2021-07-05T07:02:19+0000] e2e test


From 8d3203e06b1ca6b23af81b10eb7c363a4dbf0e4f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 08:02:26 +0000
Subject: [PATCH 2158/4650] [2021-07-05T08:02:26+0000] e2e test


From 93ec6ed1f443cd0617e36484e7e065e6a26792b4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 09:02:31 +0000
Subject: [PATCH 2159/4650] [2021-07-05T09:02:31+0000] e2e test


From 23a1f45ac3b0eca6cfda16b73ea263c9c2afd504 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 10:02:38 +0000
Subject: [PATCH 2160/4650] [2021-07-05T10:02:38+0000] e2e test


From d762ada72515b279d7b1d48fc5392a9d224e6baf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 11:02:23 +0000
Subject: [PATCH 2161/4650] [2021-07-05T11:02:23+0000] e2e test


From aa7a3c9e6550493dfcdc01643614d627beb0e9c6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 12:02:37 +0000
Subject: [PATCH 2162/4650] [2021-07-05T12:02:36+0000] e2e test


From e9c0804eec510a69a3e115b488c10516716dd991 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 13:06:14 +0000
Subject: [PATCH 2163/4650] [2021-07-05T13:06:14+0000] e2e test


From cc46c766af5ac91a762d6f07204528c1ed958a28 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 14:02:23 +0000
Subject: [PATCH 2164/4650] [2021-07-05T14:02:23+0000] e2e test


From a43a0b3c8ddb55177d74157175c1d6db7c4d0a27 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 15:02:26 +0000
Subject: [PATCH 2165/4650] [2021-07-05T15:02:26+0000] e2e test


From 69a8bb5d50b0ebc39046728211d0a453c901313d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 16:02:30 +0000
Subject: [PATCH 2166/4650] [2021-07-05T16:02:30+0000] e2e test


From a8c5b1b02ea75cfa1c8eddb17bcd6a1ca5b5a72f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 17:06:47 +0000
Subject: [PATCH 2167/4650] [2021-07-05T17:06:47+0000] e2e test


From d0b0e860234c1ce1b2dae1a06419be3b8774465b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 18:02:31 +0000
Subject: [PATCH 2168/4650] [2021-07-05T18:02:31+0000] e2e test


From 2e0e175833d3f82ac59fb47e200617315e94ee90 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 19:02:19 +0000
Subject: [PATCH 2169/4650] [2021-07-05T19:02:19+0000] e2e test


From a1577a3857461ead999b271209a21b85de63317e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 20:02:29 +0000
Subject: [PATCH 2170/4650] [2021-07-05T20:02:29+0000] e2e test


From 89e6c842504c85288505900ffda1c2cee9f22dc7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 21:02:28 +0000
Subject: [PATCH 2171/4650] [2021-07-05T21:02:28+0000] e2e test


From 16924999c9af11647bf27fe5bdc65cf043d1f61f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 22:02:39 +0000
Subject: [PATCH 2172/4650] [2021-07-05T22:02:39+0000] e2e test


From a012f31618387e35361d44f9565405919d076007 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 5 Jul 2021 23:02:26 +0000
Subject: [PATCH 2173/4650] [2021-07-05T23:02:26+0000] e2e test


From 2515d27cc0b223ea2c58cdfa018050766ed869a8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 00:03:34 +0000
Subject: [PATCH 2174/4650] [2021-07-06T00:03:34+0000] e2e test


From b823df657ffc9940fa08a35eb847591536bd9558 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 01:24:28 +0000
Subject: [PATCH 2175/4650] [2021-07-06T01:24:28+0000] e2e test


From c3bdbb9301c1d36e60ed81a9d64494b805a4c370 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 02:12:30 +0000
Subject: [PATCH 2176/4650] [2021-07-06T02:12:30+0000] e2e test


From e36372643cf8e49608b9fbf8bda5f7c68399127e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 03:02:26 +0000
Subject: [PATCH 2177/4650] [2021-07-06T03:02:26+0000] e2e test


From b22c30f3337ff0df789f7816917f6a5261cae851 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 04:02:36 +0000
Subject: [PATCH 2178/4650] [2021-07-06T04:02:36+0000] e2e test


From e85424fec52d7421282c9bfc6e0519aa7331684f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 05:02:20 +0000
Subject: [PATCH 2179/4650] [2021-07-06T05:02:20+0000] e2e test


From 9aa89c8649d87df6e1572332967662d26cac9466 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 06:02:42 +0000
Subject: [PATCH 2180/4650] [2021-07-06T06:02:42+0000] e2e test


From fe8066c7b45451e60233ae150a5ce7fbe09a4bc2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 07:02:23 +0000
Subject: [PATCH 2181/4650] [2021-07-06T07:02:23+0000] e2e test


From 70cd6ad24bcbb7ce5011084561ad05b98e9247bc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 08:02:55 +0000
Subject: [PATCH 2182/4650] [2021-07-06T08:02:55+0000] e2e test


From 56ea96e0fe4466c1f0184692612d1137147c4c3b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 09:02:33 +0000
Subject: [PATCH 2183/4650] [2021-07-06T09:02:33+0000] e2e test


From 7101fd5c2b3cff8825a1330e47cd09c0cbce9ac3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 10:02:39 +0000
Subject: [PATCH 2184/4650] [2021-07-06T10:02:39+0000] e2e test


From 2f535590cd6832f0452833e13895b3023b9fdf0b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 11:02:37 +0000
Subject: [PATCH 2185/4650] [2021-07-06T11:02:37+0000] e2e test


From e082b1cafb4d3abd6e52aad2df0b7b746574b8f3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 12:02:32 +0000
Subject: [PATCH 2186/4650] [2021-07-06T12:02:32+0000] e2e test


From 5c4646781d352155499bcf5b30b237af848197cc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 13:06:26 +0000
Subject: [PATCH 2187/4650] [2021-07-06T13:06:25+0000] e2e test


From 3168c5f7b9353ebbc74d07cad5ca23bbd01a1f5e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 14:02:50 +0000
Subject: [PATCH 2188/4650] [2021-07-06T14:02:50+0000] e2e test


From 95b1bba503519d0c1bd97c49e994e0327f3b0ec8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 15:02:27 +0000
Subject: [PATCH 2189/4650] [2021-07-06T15:02:27+0000] e2e test


From 44c9be736aea796f56fd933bfa86131a02cd0ee6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 16:02:39 +0000
Subject: [PATCH 2190/4650] [2021-07-06T16:02:39+0000] e2e test


From 3496bbc919f8ee1c1e8b37b7ac029d177aa042f7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 17:06:46 +0000
Subject: [PATCH 2191/4650] [2021-07-06T17:06:46+0000] e2e test


From f44774fba3abb12e3e31573f6afd7f967125c760 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 18:02:43 +0000
Subject: [PATCH 2192/4650] [2021-07-06T18:02:43+0000] e2e test


From 786ed8d608e9920a4c2acdddce40f14bbe7bf124 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 19:02:14 +0000
Subject: [PATCH 2193/4650] [2021-07-06T19:02:14+0000] e2e test


From 8eff45dbe4b2d0df0cfb8b73bf500d53b5b2f97f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 20:02:31 +0000
Subject: [PATCH 2194/4650] [2021-07-06T20:02:31+0000] e2e test


From 325402cccacd958c84d20fcdb8a8c4a1b4508aaf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 21:02:33 +0000
Subject: [PATCH 2195/4650] [2021-07-06T21:02:33+0000] e2e test


From a9454730f52e7a3c9042452bf834819cbdfa0b61 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 22:02:23 +0000
Subject: [PATCH 2196/4650] [2021-07-06T22:02:22+0000] e2e test


From 2d9d8385f4307b9192fe7f74cc5a8a9ae9ed0fbc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 6 Jul 2021 23:02:39 +0000
Subject: [PATCH 2197/4650] [2021-07-06T23:02:39+0000] e2e test


From d9e75da5bb42e14f9ab3a9fa4809f48547ea5489 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 00:03:39 +0000
Subject: [PATCH 2198/4650] [2021-07-07T00:03:39+0000] e2e test


From d84f21f319021f55a72d9581ff09324ed09742a5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 01:24:11 +0000
Subject: [PATCH 2199/4650] [2021-07-07T01:24:10+0000] e2e test


From 75840fb54a77dd4ee7e06df16b7c4a038cfad67f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 02:12:25 +0000
Subject: [PATCH 2200/4650] [2021-07-07T02:12:25+0000] e2e test


From 4fab46db4c808fb13cfc1d6a7236fa8e99df9459 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 03:02:25 +0000
Subject: [PATCH 2201/4650] [2021-07-07T03:02:25+0000] e2e test


From 19d69c616eeb25620c58bec0aaf760c08f1f0257 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 04:02:31 +0000
Subject: [PATCH 2202/4650] [2021-07-07T04:02:30+0000] e2e test


From cc17dace5534932ae274e5bcb38daf47000b8046 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 05:02:22 +0000
Subject: [PATCH 2203/4650] [2021-07-07T05:02:22+0000] e2e test


From 70622a16a745ee9061fb49d957398d9c32db8f43 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 06:02:54 +0000
Subject: [PATCH 2204/4650] [2021-07-07T06:02:54+0000] e2e test


From 2e41e2669b8b117101d0c4eabc39fad2bfa5b53d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 07:02:23 +0000
Subject: [PATCH 2205/4650] [2021-07-07T07:02:23+0000] e2e test


From bb6832902601199c31da3580b8b8d1b4df5fb033 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 08:02:38 +0000
Subject: [PATCH 2206/4650] [2021-07-07T08:02:38+0000] e2e test


From 42d752765a12e91e75e735d0a2e6eae44df4f7bd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 09:02:32 +0000
Subject: [PATCH 2207/4650] [2021-07-07T09:02:32+0000] e2e test


From f788b5e07a1b683151c3fefb29e1dcfb8e529555 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 10:02:30 +0000
Subject: [PATCH 2208/4650] [2021-07-07T10:02:30+0000] e2e test


From 601a92d782c2c8700b86e88546e0d4e5b78606c1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 11:02:43 +0000
Subject: [PATCH 2209/4650] [2021-07-07T11:02:43+0000] e2e test


From 04331a1a458dc790109c448dad26aad8a998420e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 12:02:47 +0000
Subject: [PATCH 2210/4650] [2021-07-07T12:02:47+0000] e2e test


From 088b9f9295995c4ff44f8ddcbc634e3d44a03e6f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 13:06:44 +0000
Subject: [PATCH 2211/4650] [2021-07-07T13:06:44+0000] e2e test


From 0097fe8856593009d83aa8bbb1efa9038e20f044 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 14:02:53 +0000
Subject: [PATCH 2212/4650] [2021-07-07T14:02:53+0000] e2e test


From ec7413aac8127a8e0da9748ca38ace5be5d0bc7b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 15:02:32 +0000
Subject: [PATCH 2213/4650] [2021-07-07T15:02:32+0000] e2e test


From 9368e5e4330d6d9e5d4645798389c95d287cebe4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 16:04:45 +0000
Subject: [PATCH 2214/4650] [2021-07-07T16:04:45+0000] e2e test


From b0e8a2ca7843959567b782573ad44d3a7173123e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 17:12:18 +0000
Subject: [PATCH 2215/4650] [2021-07-07T17:12:18+0000] e2e test


From ddbafdc8625a8ac579dfcdf8053c05c0b779ce88 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 18:02:26 +0000
Subject: [PATCH 2216/4650] [2021-07-07T18:02:26+0000] e2e test


From 17affa24c7732ab6734880f78757a290c25f4f49 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 19:02:18 +0000
Subject: [PATCH 2217/4650] [2021-07-07T19:02:18+0000] e2e test


From efa13141e3a246eccd54c0db16185111fc6ff168 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 20:02:31 +0000
Subject: [PATCH 2218/4650] [2021-07-07T20:02:31+0000] e2e test


From d32d01e44c6b9bec36d086c8dce5e3f8555a9708 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 21:02:49 +0000
Subject: [PATCH 2219/4650] [2021-07-07T21:02:49+0000] e2e test


From fc4273fe30356dd21a6aabe2b129d8b06f13f45d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 22:02:39 +0000
Subject: [PATCH 2220/4650] [2021-07-07T22:02:39+0000] e2e test


From 3352a5ebdd3088c936c60dc6de64a6ede21d6ae3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 7 Jul 2021 23:02:29 +0000
Subject: [PATCH 2221/4650] [2021-07-07T23:02:28+0000] e2e test


From c464ddd58d470cd06c2ae36cccb82445aa4e8d7b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 00:03:39 +0000
Subject: [PATCH 2222/4650] [2021-07-08T00:03:39+0000] e2e test


From 8b9611b8a9b0c2cfc29f195167d978133c38f985 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 01:24:23 +0000
Subject: [PATCH 2223/4650] [2021-07-08T01:24:23+0000] e2e test


From 5bcc2dd3a4b07edbf51867de55426c2fbc068b22 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 02:12:59 +0000
Subject: [PATCH 2224/4650] [2021-07-08T02:12:59+0000] e2e test


From e5b10d2fb9b0a6b81df653d5702cb719ee5e2dc2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 03:02:37 +0000
Subject: [PATCH 2225/4650] [2021-07-08T03:02:37+0000] e2e test


From 33e657fa0b209897b9728733aa62f77acf2dcb57 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 04:02:40 +0000
Subject: [PATCH 2226/4650] [2021-07-08T04:02:39+0000] e2e test


From fdec8dc6801cd099a050fc1b3452030f30bcd835 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 05:02:35 +0000
Subject: [PATCH 2227/4650] [2021-07-08T05:02:35+0000] e2e test


From 1a2dbd21908e76e06f2ae90eb42dae5d58078b40 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 06:02:58 +0000
Subject: [PATCH 2228/4650] [2021-07-08T06:02:58+0000] e2e test


From 88bb1598925f2e8e2619e441f3dac43b6b6de945 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 07:02:22 +0000
Subject: [PATCH 2229/4650] [2021-07-08T07:02:22+0000] e2e test


From 4ad9afb3542eccdd38a09c1e4bb98ff2de504918 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 08:02:34 +0000
Subject: [PATCH 2230/4650] [2021-07-08T08:02:34+0000] e2e test


From 6643bc32c0fe6b64eaeb6b86c5946de9a3787ba9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 09:02:30 +0000
Subject: [PATCH 2231/4650] [2021-07-08T09:02:30+0000] e2e test


From 62711f7af2e4ec7ecf6b8f9ea82fc52d5bce3a1d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 10:02:26 +0000
Subject: [PATCH 2232/4650] [2021-07-08T10:02:26+0000] e2e test


From f098c2514dca29b266e8b8d8367605ebccf00eb5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 11:02:29 +0000
Subject: [PATCH 2233/4650] [2021-07-08T11:02:29+0000] e2e test


From 896db70c41a9367cdef2c833a59d3381364a2462 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 12:02:29 +0000
Subject: [PATCH 2234/4650] [2021-07-08T12:02:29+0000] e2e test


From 2050930d701e1d179ac6f29b8391543e17badc9a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 13:08:09 +0000
Subject: [PATCH 2235/4650] [2021-07-08T13:08:09+0000] e2e test


From 9ae7047887491cdca77fc1db666942f5b3566a65 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 14:03:02 +0000
Subject: [PATCH 2236/4650] [2021-07-08T14:03:02+0000] e2e test


From b5d2c52a46a5fca891f9599224dd728b3e97f4e8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 15:02:50 +0000
Subject: [PATCH 2237/4650] [2021-07-08T15:02:50+0000] e2e test


From 4a16f0ea8da2129e69b30615b2f6f13ce3dac92e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 16:04:27 +0000
Subject: [PATCH 2238/4650] [2021-07-08T16:04:27+0000] e2e test


From 2d0a4ec0df2482b0117228cba6b5c15f328b4aa6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 17:10:43 +0000
Subject: [PATCH 2239/4650] [2021-07-08T17:10:43+0000] e2e test


From 670e425e7218a7b4d143ac95e0f25aab72ae0269 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 18:02:30 +0000
Subject: [PATCH 2240/4650] [2021-07-08T18:02:30+0000] e2e test


From 63b9089f09ba236f278da1c548a500a9c8b84c7c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 19:02:19 +0000
Subject: [PATCH 2241/4650] [2021-07-08T19:02:18+0000] e2e test


From e813f87ff66d220f0cb4e671f5a25046c5d8166f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 20:02:27 +0000
Subject: [PATCH 2242/4650] [2021-07-08T20:02:27+0000] e2e test


From c5067bf9a070c06be1d7d08408b1699411050b7a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 21:02:20 +0000
Subject: [PATCH 2243/4650] [2021-07-08T21:02:20+0000] e2e test


From 752c8a11a247b2bfba2cfd74a0b3ceac97b89a38 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 22:02:44 +0000
Subject: [PATCH 2244/4650] [2021-07-08T22:02:44+0000] e2e test


From 798446aebd86429b6fdf678b4acab822bf1f327e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 8 Jul 2021 23:02:51 +0000
Subject: [PATCH 2245/4650] [2021-07-08T23:02:51+0000] e2e test


From 500ddc97ede1bb078fb1e5a52a950f16af51558d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 00:03:44 +0000
Subject: [PATCH 2246/4650] [2021-07-09T00:03:44+0000] e2e test


From 8712ada0b5d5974f080b134decfd2d99d97778dc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 01:24:42 +0000
Subject: [PATCH 2247/4650] [2021-07-09T01:24:42+0000] e2e test


From e9112f12129a1640a59e74a0114891370445af2d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 02:13:19 +0000
Subject: [PATCH 2248/4650] [2021-07-09T02:13:19+0000] e2e test


From e9fdc1cb1d62e872e6ce236aeebdd70bd6f7c97e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 03:02:25 +0000
Subject: [PATCH 2249/4650] [2021-07-09T03:02:25+0000] e2e test


From da0d333cb21e0c50482736516e53f0d7290f4139 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 04:02:29 +0000
Subject: [PATCH 2250/4650] [2021-07-09T04:02:28+0000] e2e test


From 2941b45b5aeeb2152bb07c268f96c4298146d7e6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 05:02:24 +0000
Subject: [PATCH 2251/4650] [2021-07-09T05:02:24+0000] e2e test


From f1d9e07fe09f27995b6eccf3b6cc923570e20cd5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 06:02:46 +0000
Subject: [PATCH 2252/4650] [2021-07-09T06:02:46+0000] e2e test


From f37da65036ab2c670e6848b7dd2e6cc1836d864c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 07:02:25 +0000
Subject: [PATCH 2253/4650] [2021-07-09T07:02:25+0000] e2e test


From f8b156edb57cc96ae5c55c7977fb057543c73a9f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 08:02:44 +0000
Subject: [PATCH 2254/4650] [2021-07-09T08:02:44+0000] e2e test


From b908bcede76a477535b5ad801cf8060bfd62ad20 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 09:02:27 +0000
Subject: [PATCH 2255/4650] [2021-07-09T09:02:26+0000] e2e test


From e388ecd6318ee839f0f0a34e6517f02fbec31d27 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 10:02:27 +0000
Subject: [PATCH 2256/4650] [2021-07-09T10:02:27+0000] e2e test


From 3a26dddad96ca68032a325ba5ae70f6c71a0b259 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 11:02:30 +0000
Subject: [PATCH 2257/4650] [2021-07-09T11:02:30+0000] e2e test


From 8110be41def472c3154fd215f299a63ce0e8cc47 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 12:02:52 +0000
Subject: [PATCH 2258/4650] [2021-07-09T12:02:52+0000] e2e test


From c70dfa90ee41cd0ec6adede48ba0e09593d9b25a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 13:06:02 +0000
Subject: [PATCH 2259/4650] [2021-07-09T13:06:02+0000] e2e test


From caa22a020b1cf1cf54d305c4a3ef605c368b8e59 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 14:02:19 +0000
Subject: [PATCH 2260/4650] [2021-07-09T14:02:19+0000] e2e test


From 17bc24d99c434acc098f1cbfcfb7fe64eb0f317b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 15:02:41 +0000
Subject: [PATCH 2261/4650] [2021-07-09T15:02:41+0000] e2e test


From 0799f7f777cf190aadf412988cfdf441d2c66305 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 16:02:30 +0000
Subject: [PATCH 2262/4650] [2021-07-09T16:02:30+0000] e2e test


From 9d53c0ec84c1fe58333df940ff573e8c951a84bc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 17:07:33 +0000
Subject: [PATCH 2263/4650] [2021-07-09T17:07:33+0000] e2e test


From 7e32eaae1b6794e780db30e06813f719b619c802 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 18:02:27 +0000
Subject: [PATCH 2264/4650] [2021-07-09T18:02:27+0000] e2e test


From ca3014b623badf199cb295b261b8c5fb7d506763 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 19:02:15 +0000
Subject: [PATCH 2265/4650] [2021-07-09T19:02:15+0000] e2e test


From 8c79a43e06472d94e37838dc201e2dc87c79739d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 20:02:26 +0000
Subject: [PATCH 2266/4650] [2021-07-09T20:02:26+0000] e2e test


From bc83116524580de782b50ec9ca14b1a23e31b145 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 21:02:35 +0000
Subject: [PATCH 2267/4650] [2021-07-09T21:02:35+0000] e2e test


From 52a6690bf841b5997eaa770d16e6177b5f096b29 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 22:02:31 +0000
Subject: [PATCH 2268/4650] [2021-07-09T22:02:30+0000] e2e test


From 988670581298b1035e4a88cac3faa58b1cad6f72 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 9 Jul 2021 23:02:27 +0000
Subject: [PATCH 2269/4650] [2021-07-09T23:02:27+0000] e2e test


From 8836efedbf70dc85b868dfafc68ea471c2625bd3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 00:03:31 +0000
Subject: [PATCH 2270/4650] [2021-07-10T00:03:31+0000] e2e test


From 301db8a5b8f9d20f1056e6cb87933ede9b5c169d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 01:22:21 +0000
Subject: [PATCH 2271/4650] [2021-07-10T01:22:21+0000] e2e test


From f5d8eaba38665000adc05d24f69813af381d0d24 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 02:11:46 +0000
Subject: [PATCH 2272/4650] [2021-07-10T02:11:46+0000] e2e test


From 0800380036907ceb6e17f5a7bf52a09e7edf2385 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 03:02:26 +0000
Subject: [PATCH 2273/4650] [2021-07-10T03:02:26+0000] e2e test


From b5dbe8556f857e03a62f89ef16b0ee8e6a3c1537 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 04:02:41 +0000
Subject: [PATCH 2274/4650] [2021-07-10T04:02:41+0000] e2e test


From ae4bb2e517fae7bb3875392e9767987c48358076 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 05:02:17 +0000
Subject: [PATCH 2275/4650] [2021-07-10T05:02:17+0000] e2e test


From 832a913a4e3d9635bf797c1a14043a1ede60dfb6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 06:02:42 +0000
Subject: [PATCH 2276/4650] [2021-07-10T06:02:42+0000] e2e test


From 0e13a4629f2013bf563d42bc96fa356cbf92ca36 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 07:02:17 +0000
Subject: [PATCH 2277/4650] [2021-07-10T07:02:17+0000] e2e test


From bfdd5e0af7ee409e66e2f81521b9c14c421f4019 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 08:02:42 +0000
Subject: [PATCH 2278/4650] [2021-07-10T08:02:42+0000] e2e test


From ccb8c16130cf8cf0453ee26132d2c4abd5724ae3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 09:02:33 +0000
Subject: [PATCH 2279/4650] [2021-07-10T09:02:33+0000] e2e test


From 006074cbdeb893f69503f63531e34f63bdc0f642 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 10:02:37 +0000
Subject: [PATCH 2280/4650] [2021-07-10T10:02:37+0000] e2e test


From 8be4ff41d32c5da0ae483de1fed1947734de3e48 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 11:02:20 +0000
Subject: [PATCH 2281/4650] [2021-07-10T11:02:20+0000] e2e test


From b2e749d4fc283ad166bda13a46b2cb26040252e8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 12:02:42 +0000
Subject: [PATCH 2282/4650] [2021-07-10T12:02:42+0000] e2e test


From eca055a3ac0ef0fc3dc3525b42bbcaea51b608fa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 13:05:04 +0000
Subject: [PATCH 2283/4650] [2021-07-10T13:05:04+0000] e2e test


From 343ba3e44df5e712a2783f00c997bc577c997ab9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 14:02:17 +0000
Subject: [PATCH 2284/4650] [2021-07-10T14:02:17+0000] e2e test


From 455650a7a086f05bf8c91812b35cffdf5ef64d17 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 15:02:47 +0000
Subject: [PATCH 2285/4650] [2021-07-10T15:02:47+0000] e2e test


From f913ba8f4a63ccc99094bbba0c025d0b1e806f61 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 16:02:30 +0000
Subject: [PATCH 2286/4650] [2021-07-10T16:02:30+0000] e2e test


From 318d42acf6e268cef3a9081a9d6ee24d1144b624 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 17:05:59 +0000
Subject: [PATCH 2287/4650] [2021-07-10T17:05:59+0000] e2e test


From 3c8fa657dad2c14b07c83a344cdf84beb2fff88d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 18:02:30 +0000
Subject: [PATCH 2288/4650] [2021-07-10T18:02:30+0000] e2e test


From 413a1988d0866fea293468dad03fc915b768ce30 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 19:02:15 +0000
Subject: [PATCH 2289/4650] [2021-07-10T19:02:15+0000] e2e test


From 8629f132e2b2900c5db791b034dfc9ec5253e24b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 20:02:34 +0000
Subject: [PATCH 2290/4650] [2021-07-10T20:02:34+0000] e2e test


From 42d69f18339e2f994d8ae65d43118fb4a84df7cf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 21:02:19 +0000
Subject: [PATCH 2291/4650] [2021-07-10T21:02:19+0000] e2e test


From 8ee6a52b9f1b3d99732f683bc7b02ac689f97641 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 22:02:29 +0000
Subject: [PATCH 2292/4650] [2021-07-10T22:02:28+0000] e2e test


From c60f08cee00a8040da7334af58c9e522df10216c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 10 Jul 2021 23:02:43 +0000
Subject: [PATCH 2293/4650] [2021-07-10T23:02:43+0000] e2e test


From 052e9c1c0adfe23237fe06c107bacfecf8affe44 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 00:04:04 +0000
Subject: [PATCH 2294/4650] [2021-07-11T00:04:03+0000] e2e test


From d784e336e7fe4ac8a15d6aa5e79f98eb29113478 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 01:24:39 +0000
Subject: [PATCH 2295/4650] [2021-07-11T01:24:39+0000] e2e test


From cae2515f18728929881cfa9412865b38d27b1156 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 02:13:23 +0000
Subject: [PATCH 2296/4650] [2021-07-11T02:13:23+0000] e2e test


From b104c4cd80b4e1d487cbad01c3083ba51550e5af Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 03:02:24 +0000
Subject: [PATCH 2297/4650] [2021-07-11T03:02:23+0000] e2e test


From 4b9c1dc836c9a9027a086d8c612559779db30d4e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 04:02:28 +0000
Subject: [PATCH 2298/4650] [2021-07-11T04:02:28+0000] e2e test


From db69c7f39a673584176d6a1e66751ef785b48620 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 05:02:14 +0000
Subject: [PATCH 2299/4650] [2021-07-11T05:02:14+0000] e2e test


From 060854118350c5cbb72200f8f6dd11df7daa3ec8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 06:02:40 +0000
Subject: [PATCH 2300/4650] [2021-07-11T06:02:40+0000] e2e test


From 8d2383e7508f5bd797b05c560d2adedccb64fd98 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 07:02:16 +0000
Subject: [PATCH 2301/4650] [2021-07-11T07:02:16+0000] e2e test


From b2faf27d8b5b0e7754f6c8d41d46ff465cf295ae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 08:02:35 +0000
Subject: [PATCH 2302/4650] [2021-07-11T08:02:35+0000] e2e test


From 412b7969e4e8a8d1343376c846744eb9c5cf05ce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 09:02:33 +0000
Subject: [PATCH 2303/4650] [2021-07-11T09:02:33+0000] e2e test


From cb38e9308f6ebecd3dd456197d27f5ee235ef382 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 10:02:21 +0000
Subject: [PATCH 2304/4650] [2021-07-11T10:02:21+0000] e2e test


From e5c9fe661d140e7740547a7cfff60926643fce49 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 11:02:25 +0000
Subject: [PATCH 2305/4650] [2021-07-11T11:02:25+0000] e2e test


From bfdd54933cbcbc94bc3b3af73ca8b83e3aafc348 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 12:02:52 +0000
Subject: [PATCH 2306/4650] [2021-07-11T12:02:52+0000] e2e test


From da119d4f8e2891cc0d071b6c6f8393bc7c86e74d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 13:05:15 +0000
Subject: [PATCH 2307/4650] [2021-07-11T13:05:15+0000] e2e test


From ec44549e94d0c08a6eeb338f644f0d0dab1a42a5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 14:02:34 +0000
Subject: [PATCH 2308/4650] [2021-07-11T14:02:34+0000] e2e test


From 067ac686b13ead1389c013027435516f00f5fe06 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 15:02:35 +0000
Subject: [PATCH 2309/4650] [2021-07-11T15:02:34+0000] e2e test


From 18276a66abe5c9ccbd8ef9522f6d1faac421dd8b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 16:02:34 +0000
Subject: [PATCH 2310/4650] [2021-07-11T16:02:34+0000] e2e test


From 21752d9fde6f1b0e60ce686c9b6fc2e6ae189631 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 17:06:02 +0000
Subject: [PATCH 2311/4650] [2021-07-11T17:06:02+0000] e2e test


From bf1d967c4bd64277399127c86d1df0becc79e5d6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 18:02:32 +0000
Subject: [PATCH 2312/4650] [2021-07-11T18:02:31+0000] e2e test


From 2cebbc93773d84f32d3f6adc84f1a35bef392b5e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 19:02:28 +0000
Subject: [PATCH 2313/4650] [2021-07-11T19:02:28+0000] e2e test


From 948c6a754347547b7c0a36cfc3e7978e56a079fb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 20:02:28 +0000
Subject: [PATCH 2314/4650] [2021-07-11T20:02:28+0000] e2e test


From 09d5d1b80dc7a041c7a2a06f9cbe9ac483d091ec Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 21:02:22 +0000
Subject: [PATCH 2315/4650] [2021-07-11T21:02:22+0000] e2e test


From f76edf2db74a0ed1605eed0a9ab26e2f89b11643 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 22:02:27 +0000
Subject: [PATCH 2316/4650] [2021-07-11T22:02:27+0000] e2e test


From 9643c4cc8106f432fb5ac4ccca951287b4f19c60 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 11 Jul 2021 23:02:38 +0000
Subject: [PATCH 2317/4650] [2021-07-11T23:02:38+0000] e2e test


From 1712ab5e90691c202163d60e2d7bdabf862d405b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 00:03:55 +0000
Subject: [PATCH 2318/4650] [2021-07-12T00:03:55+0000] e2e test


From 788bc362f96e4763758dba59fbb958d0b3268a87 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 01:23:48 +0000
Subject: [PATCH 2319/4650] [2021-07-12T01:23:47+0000] e2e test


From 9fd3751c8229a48d736de3251bf815961abc3bac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 02:10:59 +0000
Subject: [PATCH 2320/4650] [2021-07-12T02:10:59+0000] e2e test


From ca06b50558501e65442cb3dc811a2a2d16f13603 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 03:02:35 +0000
Subject: [PATCH 2321/4650] [2021-07-12T03:02:35+0000] e2e test


From 7841cc2d255c880d1cb198819516de72b4ce4f52 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 04:02:47 +0000
Subject: [PATCH 2322/4650] [2021-07-12T04:02:47+0000] e2e test


From bc570de4519b766f435702af32c8f50f40c59777 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 05:02:24 +0000
Subject: [PATCH 2323/4650] [2021-07-12T05:02:24+0000] e2e test


From 5843588022cebbb7cda705599fdafbc9ee652829 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 06:02:51 +0000
Subject: [PATCH 2324/4650] [2021-07-12T06:02:51+0000] e2e test


From 9dfb4ba34d2c58cf713f633e97edef1957f597fe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 07:02:21 +0000
Subject: [PATCH 2325/4650] [2021-07-12T07:02:21+0000] e2e test


From 66530b6c6fda519a31d8ffda05b9f8685dde7071 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 08:02:33 +0000
Subject: [PATCH 2326/4650] [2021-07-12T08:02:33+0000] e2e test


From 66ef943f6c2c2e183f89b70e8257b34373a606ed Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 09:02:35 +0000
Subject: [PATCH 2327/4650] [2021-07-12T09:02:35+0000] e2e test


From 5ac45df17d4ed1020fa0d32a3f57458f42cde4ae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 10:02:53 +0000
Subject: [PATCH 2328/4650] [2021-07-12T10:02:53+0000] e2e test


From 4aa6c1a079d968869ee9f2d999d5007e8e009232 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 11:02:38 +0000
Subject: [PATCH 2329/4650] [2021-07-12T11:02:37+0000] e2e test


From 194ff3034ded51fd9525adef5a86b953be1d4571 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 12:02:57 +0000
Subject: [PATCH 2330/4650] [2021-07-12T12:02:57+0000] e2e test


From 94b5ce5fa1900ed9bd0744e1a73cfe3e99db7ac7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 13:06:48 +0000
Subject: [PATCH 2331/4650] [2021-07-12T13:06:48+0000] e2e test


From c1d0064e3195a6c32fd6aa83b288d1772e7af32c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 14:02:22 +0000
Subject: [PATCH 2332/4650] [2021-07-12T14:02:22+0000] e2e test


From 08331432efc9e2b280b96765f58a36be81054b2e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 15:02:45 +0000
Subject: [PATCH 2333/4650] [2021-07-12T15:02:45+0000] e2e test


From 82da83cec36acdb17a500237f6fe8e31bd09aaca Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 16:02:44 +0000
Subject: [PATCH 2334/4650] [2021-07-12T16:02:43+0000] e2e test


From 8e22b70f2182eae7e14684aa9e87fc16737bb99c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 17:08:26 +0000
Subject: [PATCH 2335/4650] [2021-07-12T17:08:26+0000] e2e test


From c508dc6b1062fc8ae50ab15caed9417b274ba336 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 18:02:30 +0000
Subject: [PATCH 2336/4650] [2021-07-12T18:02:29+0000] e2e test


From c7a47c3d81230f09536fab83d57c0b7bb1154f67 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 19:02:21 +0000
Subject: [PATCH 2337/4650] [2021-07-12T19:02:21+0000] e2e test


From 8859248ea37c8b4091e2f52b9eff9beeb8be4772 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 20:02:26 +0000
Subject: [PATCH 2338/4650] [2021-07-12T20:02:25+0000] e2e test


From 79af56a7622592f5b61aa3f5036e8cd7b9c33409 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 21:02:30 +0000
Subject: [PATCH 2339/4650] [2021-07-12T21:02:30+0000] e2e test


From 7790e059c8a27767c80c6ac497f04d91778d01fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 22:02:35 +0000
Subject: [PATCH 2340/4650] [2021-07-12T22:02:35+0000] e2e test


From 7744cf83a38bbaa0a9a12c91a4adece0926e9bf5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 12 Jul 2021 23:02:28 +0000
Subject: [PATCH 2341/4650] [2021-07-12T23:02:28+0000] e2e test


From 2255feb2679540ced859a69911aa97e6f2526c96 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 00:03:29 +0000
Subject: [PATCH 2342/4650] [2021-07-13T00:03:29+0000] e2e test


From ff6daa6a64845a22ea2268dd01cb1ea51f43c530 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 01:24:21 +0000
Subject: [PATCH 2343/4650] [2021-07-13T01:24:21+0000] e2e test


From 12d5bc407066ed6670b7bc51f31e95715a70c1e8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 02:12:51 +0000
Subject: [PATCH 2344/4650] [2021-07-13T02:12:51+0000] e2e test


From fb25a514cd8e4efdd0d748615b314ab86d77ef87 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 03:02:25 +0000
Subject: [PATCH 2345/4650] [2021-07-13T03:02:25+0000] e2e test


From e09d24209851832606ff89f36499e2566d2e3c20 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 04:02:43 +0000
Subject: [PATCH 2346/4650] [2021-07-13T04:02:42+0000] e2e test


From 3ab6dd4cc63f55afceb0a43cdca421c5ee2b4fe9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 05:02:17 +0000
Subject: [PATCH 2347/4650] [2021-07-13T05:02:17+0000] e2e test


From ab372c2773730ac8ea05d397b72b1901c402a094 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 06:02:53 +0000
Subject: [PATCH 2348/4650] [2021-07-13T06:02:53+0000] e2e test


From 8c92a1d2a1b737b53967480c005f24aa46ae0376 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 07:02:24 +0000
Subject: [PATCH 2349/4650] [2021-07-13T07:02:23+0000] e2e test


From 9c63649a96a4a9425db4a80233e95237bff8de40 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 08:02:45 +0000
Subject: [PATCH 2350/4650] [2021-07-13T08:02:45+0000] e2e test


From 74473080822b2e9f6656f0d24f7313c0c2423324 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 09:02:40 +0000
Subject: [PATCH 2351/4650] [2021-07-13T09:02:40+0000] e2e test


From 123ce3b81eabdb5edbe411b7d6546148c1823b17 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 10:02:37 +0000
Subject: [PATCH 2352/4650] [2021-07-13T10:02:37+0000] e2e test


From 90fa1ada4ab2343de3ef7310602b07e81a7122e6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 11:02:20 +0000
Subject: [PATCH 2353/4650] [2021-07-13T11:02:20+0000] e2e test


From e882e8d80de20dac76eb3f2a39b82790616ad44b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 12:02:33 +0000
Subject: [PATCH 2354/4650] [2021-07-13T12:02:33+0000] e2e test


From 546142150b115ed030e1f97f84088ccb909bae01 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 13:07:55 +0000
Subject: [PATCH 2355/4650] [2021-07-13T13:07:55+0000] e2e test


From 269f57891c6b466458f394ce4717b71850564310 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 14:02:21 +0000
Subject: [PATCH 2356/4650] [2021-07-13T14:02:21+0000] e2e test


From 57d9b8be34cbb7681a04a8571c82df87c929c574 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 15:02:39 +0000
Subject: [PATCH 2357/4650] [2021-07-13T15:02:39+0000] e2e test


From 05ecad45824a889d9b4be8d0f6bb01b1b9b87c25 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 16:02:33 +0000
Subject: [PATCH 2358/4650] [2021-07-13T16:02:33+0000] e2e test


From c36c037c1e572aa5c37bc1f759bc25d10b7149f2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 17:07:40 +0000
Subject: [PATCH 2359/4650] [2021-07-13T17:07:40+0000] e2e test


From f1a65db81f4d90ab0dc1642b1523d27e3d90a7a4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 18:02:25 +0000
Subject: [PATCH 2360/4650] [2021-07-13T18:02:25+0000] e2e test


From fb406a864435436884149731e800729375149cef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 19:02:23 +0000
Subject: [PATCH 2361/4650] [2021-07-13T19:02:23+0000] e2e test


From a9102219571552b2fe5639c5036bac1565da54a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 20:02:35 +0000
Subject: [PATCH 2362/4650] [2021-07-13T20:02:35+0000] e2e test


From 1d3654afec11b3e902a51ea8459191cfe130bc33 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 21:02:22 +0000
Subject: [PATCH 2363/4650] [2021-07-13T21:02:22+0000] e2e test


From a9e39cd7b348fbadccabb4b2ae27c0e10387850d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 22:02:23 +0000
Subject: [PATCH 2364/4650] [2021-07-13T22:02:23+0000] e2e test


From 3710cfbe365a7e5c3c11b15c586e29ad5695479a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 13 Jul 2021 23:02:28 +0000
Subject: [PATCH 2365/4650] [2021-07-13T23:02:28+0000] e2e test


From a957e3593d205f03e49e85429b1c4b24566367e6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 00:03:58 +0000
Subject: [PATCH 2366/4650] [2021-07-14T00:03:58+0000] e2e test


From 9d2af39c117248019f1c10efa3052266ad08a13c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 01:22:46 +0000
Subject: [PATCH 2367/4650] [2021-07-14T01:22:45+0000] e2e test


From d11249527384f46eb3eafe6fe47ba3eb5846fe6d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 02:10:41 +0000
Subject: [PATCH 2368/4650] [2021-07-14T02:10:41+0000] e2e test


From 8b5246aa6ccb5cd53e687ef85cce7f7c1016b331 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 03:02:27 +0000
Subject: [PATCH 2369/4650] [2021-07-14T03:02:26+0000] e2e test


From 29d3692c0aa7f2cd815e6d869e878dd5d7e34703 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 04:02:35 +0000
Subject: [PATCH 2370/4650] [2021-07-14T04:02:35+0000] e2e test


From 3d388f58d22924fbec02f10d677753d99b9bd299 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 05:02:22 +0000
Subject: [PATCH 2371/4650] [2021-07-14T05:02:22+0000] e2e test


From 4b5658c1dd4f489aa8cd767731eab7cdb7ff9386 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 06:02:41 +0000
Subject: [PATCH 2372/4650] [2021-07-14T06:02:41+0000] e2e test


From c9dbe4b9e435b108b45f5ff9817f39e3234d06bc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 07:02:20 +0000
Subject: [PATCH 2373/4650] [2021-07-14T07:02:19+0000] e2e test


From b2061720d62cf2866b4a229b3f04e9ceaeb8ccd4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 08:02:30 +0000
Subject: [PATCH 2374/4650] [2021-07-14T08:02:29+0000] e2e test


From f47837557635e56c1f7cda8f50c04282fa12c715 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 09:02:20 +0000
Subject: [PATCH 2375/4650] [2021-07-14T09:02:19+0000] e2e test


From bc9f13198fe309966880ac9563eb3953dd1d7553 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 10:02:28 +0000
Subject: [PATCH 2376/4650] [2021-07-14T10:02:28+0000] e2e test


From 1387dd99a11feaacc57ae4e4ae939331adc94d22 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 11:02:21 +0000
Subject: [PATCH 2377/4650] [2021-07-14T11:02:21+0000] e2e test


From 1d095cccbe913b0fe96087067a69b6f2e897837e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 12:02:57 +0000
Subject: [PATCH 2378/4650] [2021-07-14T12:02:56+0000] e2e test


From 19fd106e69e5f074878fa343e6eb837481c66374 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 13:07:59 +0000
Subject: [PATCH 2379/4650] [2021-07-14T13:07:58+0000] e2e test


From 8324156cb2da609d800bee1bcd36eb670730d282 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 14:02:22 +0000
Subject: [PATCH 2380/4650] [2021-07-14T14:02:22+0000] e2e test


From f9ab2e8935a42d0c7d9919c09a45719f2a5a57b8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 15:02:29 +0000
Subject: [PATCH 2381/4650] [2021-07-14T15:02:29+0000] e2e test


From abe82432421c42922f3cf5640f1f970c941c580f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 16:02:30 +0000
Subject: [PATCH 2382/4650] [2021-07-14T16:02:30+0000] e2e test


From 57ff9de6708cff76727587dc43f97bb6506bce17 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 17:07:12 +0000
Subject: [PATCH 2383/4650] [2021-07-14T17:07:11+0000] e2e test


From d7baf700d8667f7ecfc205cef97cd38c15a7f8c8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 18:02:33 +0000
Subject: [PATCH 2384/4650] [2021-07-14T18:02:33+0000] e2e test


From 0454bbd9ac181cb5b20d84445e67cd534e4e9e09 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 19:02:26 +0000
Subject: [PATCH 2385/4650] [2021-07-14T19:02:25+0000] e2e test


From 325cfcc73e5f82ed9d9368c72e7574e36338441c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 20:02:39 +0000
Subject: [PATCH 2386/4650] [2021-07-14T20:02:38+0000] e2e test


From d35e1b1679b426687b15169b619e447b04aeb397 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 21:02:27 +0000
Subject: [PATCH 2387/4650] [2021-07-14T21:02:27+0000] e2e test


From 90b6cef1400c12812c8f832923eb6ee8f2071978 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 22:02:23 +0000
Subject: [PATCH 2388/4650] [2021-07-14T22:02:23+0000] e2e test


From 516a1983df8b2ef902d63f774bfc9a2323370af7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 14 Jul 2021 23:02:24 +0000
Subject: [PATCH 2389/4650] [2021-07-14T23:02:24+0000] e2e test


From 299abce88a78b4579e9e749c932bb0fff0a344a5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 00:03:43 +0000
Subject: [PATCH 2390/4650] [2021-07-15T00:03:43+0000] e2e test


From 0cfc96e6ca6cef0bea49f558777a46cd123904e8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 01:23:49 +0000
Subject: [PATCH 2391/4650] [2021-07-15T01:23:49+0000] e2e test


From fb83638f419ece0df5d333508b5ed2ad1817ca60 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 02:12:49 +0000
Subject: [PATCH 2392/4650] [2021-07-15T02:12:49+0000] e2e test


From 497907bd1184b270db883e7e81416c387157afa3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 03:02:37 +0000
Subject: [PATCH 2393/4650] [2021-07-15T03:02:37+0000] e2e test


From 436348a7e4874e52385e9ec8d385ead11892e618 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 04:02:43 +0000
Subject: [PATCH 2394/4650] [2021-07-15T04:02:43+0000] e2e test


From ea073cf879bebc665071e53a3efed8c5cf7d65b0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 05:02:23 +0000
Subject: [PATCH 2395/4650] [2021-07-15T05:02:23+0000] e2e test


From bf7f973f19bdb8efd95e10217742deaefd5a892c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 06:02:36 +0000
Subject: [PATCH 2396/4650] [2021-07-15T06:02:35+0000] e2e test


From 74cd4e578aa1fc311f71199f87f8e003f0bb5823 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 07:02:21 +0000
Subject: [PATCH 2397/4650] [2021-07-15T07:02:21+0000] e2e test


From c8b919e96df88e04a41fa6f3d137c2980cc345d3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 08:02:33 +0000
Subject: [PATCH 2398/4650] [2021-07-15T08:02:33+0000] e2e test


From c9c83868bfc80b384e8ab6b2f40167a5fff6617f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 09:02:36 +0000
Subject: [PATCH 2399/4650] [2021-07-15T09:02:36+0000] e2e test


From 49fed511447f41425ae9309cdfc41cbe5db794f5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 10:02:28 +0000
Subject: [PATCH 2400/4650] [2021-07-15T10:02:28+0000] e2e test


From 7765227b7802321628a5fa5766bb0b15f475f11b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 11:02:17 +0000
Subject: [PATCH 2401/4650] [2021-07-15T11:02:17+0000] e2e test


From a3eeb957c59bc1fe9a3f993f4d823715dbde5c24 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 12:02:51 +0000
Subject: [PATCH 2402/4650] [2021-07-15T12:02:51+0000] e2e test


From 828c1174903ab5ef28073b6c7eddeb5cd7a67f90 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 13:06:50 +0000
Subject: [PATCH 2403/4650] [2021-07-15T13:06:50+0000] e2e test


From 751ca403c5a36c089741a37b039228774328e428 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 14:02:25 +0000
Subject: [PATCH 2404/4650] [2021-07-15T14:02:24+0000] e2e test


From 535a41c19ce153577ef4170f4a7ecb9b31671f37 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 15:02:25 +0000
Subject: [PATCH 2405/4650] [2021-07-15T15:02:25+0000] e2e test


From 1d11baa367648ccac77a568fd2c45892b59840be Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 16:02:39 +0000
Subject: [PATCH 2406/4650] [2021-07-15T16:02:39+0000] e2e test


From 86f5f06e39b460feb1729bbd69135e09cada411d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 17:07:14 +0000
Subject: [PATCH 2407/4650] [2021-07-15T17:07:14+0000] e2e test


From 7fb463e24bfdf21d952d365a2fdf61f805c68cf9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 18:02:31 +0000
Subject: [PATCH 2408/4650] [2021-07-15T18:02:31+0000] e2e test


From 1fb5f4d15857b511a6fe13e9f262f6db2124b3fb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 19:02:22 +0000
Subject: [PATCH 2409/4650] [2021-07-15T19:02:22+0000] e2e test


From d9fa18719b36f9b80ac7a58c58bbe49b8abb1032 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 20:03:35 +0000
Subject: [PATCH 2410/4650] [2021-07-15T20:03:35+0000] e2e test


From 09cf0fd475b52f7b532d37b742f1fc7668acd1c4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 21:02:24 +0000
Subject: [PATCH 2411/4650] [2021-07-15T21:02:24+0000] e2e test


From d2ac4b82759ba6393d1ee4b7b4597fc8bef38e7b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 22:02:34 +0000
Subject: [PATCH 2412/4650] [2021-07-15T22:02:33+0000] e2e test


From 056d9439e5ecc6c41a052ec72f46aa6881a781a0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 15 Jul 2021 23:02:32 +0000
Subject: [PATCH 2413/4650] [2021-07-15T23:02:31+0000] e2e test


From f0b0a41f5fc9c5f8f45009e4b693aa798fd82e7f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 00:03:50 +0000
Subject: [PATCH 2414/4650] [2021-07-16T00:03:49+0000] e2e test


From 7436ffd59dd5669becd77e0b5098024dd3fa2fda Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 01:24:29 +0000
Subject: [PATCH 2415/4650] [2021-07-16T01:24:29+0000] e2e test


From 0a43812b17c89adfbc2aedd45f53fa60f0af1df3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 02:13:46 +0000
Subject: [PATCH 2416/4650] [2021-07-16T02:13:46+0000] e2e test


From 617f7852a8249b093930ebaa336b2822a3b592cd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 03:02:23 +0000
Subject: [PATCH 2417/4650] [2021-07-16T03:02:23+0000] e2e test


From 8bc19fca730ccc779b22f50e4dfa110d480553d8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 04:02:45 +0000
Subject: [PATCH 2418/4650] [2021-07-16T04:02:45+0000] e2e test


From 169d920acca1a0a33aef4870ca4cc6a4c948a458 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 05:02:23 +0000
Subject: [PATCH 2419/4650] [2021-07-16T05:02:23+0000] e2e test


From 3819805be9752313d025c703d250d46e62a9ca37 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 06:02:33 +0000
Subject: [PATCH 2420/4650] [2021-07-16T06:02:33+0000] e2e test


From 7256a098112a1270d530fdc366646a0d9fba1e6f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 07:02:18 +0000
Subject: [PATCH 2421/4650] [2021-07-16T07:02:18+0000] e2e test


From ce3e40fcfbccf6094ce5ee402e959fa81703ba64 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 08:02:31 +0000
Subject: [PATCH 2422/4650] [2021-07-16T08:02:31+0000] e2e test


From a138af2d0eb0391216a0f3cdcb6d1a0802ad961f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 09:02:24 +0000
Subject: [PATCH 2423/4650] [2021-07-16T09:02:24+0000] e2e test


From cbd6bd03af6f0a3c08f52b1baaf98d3968a247d4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 10:02:24 +0000
Subject: [PATCH 2424/4650] [2021-07-16T10:02:24+0000] e2e test


From 55c260175342938b0d34d48b0ca7938ecd898d88 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 11:02:34 +0000
Subject: [PATCH 2425/4650] [2021-07-16T11:02:34+0000] e2e test


From b67a0b7ee7bb0c3de7edcebf4fb0227443336d3a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 12:02:37 +0000
Subject: [PATCH 2426/4650] [2021-07-16T12:02:37+0000] e2e test


From 4ecdd41dc5ee4c9bf38519f2a98163d7a24b0dc2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 13:06:40 +0000
Subject: [PATCH 2427/4650] [2021-07-16T13:06:40+0000] e2e test


From 0e4c07150ec1cc3507d932eeff6f3bf5ea5ad4e3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 14:02:44 +0000
Subject: [PATCH 2428/4650] [2021-07-16T14:02:44+0000] e2e test


From 53c4264c9672dfdcade3368032f2a3e35e4c6b92 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 15:02:35 +0000
Subject: [PATCH 2429/4650] [2021-07-16T15:02:35+0000] e2e test


From fbde1537c741ae847fc1c6a519b780b77b1ffda2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 16:02:30 +0000
Subject: [PATCH 2430/4650] [2021-07-16T16:02:30+0000] e2e test


From 6f72f463b3a0956970b2a39458cd230e1b5b4790 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 17:08:24 +0000
Subject: [PATCH 2431/4650] [2021-07-16T17:08:24+0000] e2e test


From 9977e65e7ee409afac06d021c2961e1f293c188f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 18:02:32 +0000
Subject: [PATCH 2432/4650] [2021-07-16T18:02:32+0000] e2e test


From 3a799d31e82a39c4f9c5e60f80276ff8a809605b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 19:02:19 +0000
Subject: [PATCH 2433/4650] [2021-07-16T19:02:19+0000] e2e test


From cce43adfc90be31c9294dbac9d4ced866c49ac25 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 20:02:40 +0000
Subject: [PATCH 2434/4650] [2021-07-16T20:02:40+0000] e2e test


From 6a5fc2bd2eccdba28ed4b36bdbdba8b599e1a278 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 21:02:20 +0000
Subject: [PATCH 2435/4650] [2021-07-16T21:02:20+0000] e2e test


From c20c877d6653d08032d24ba147b33b5f055d8580 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 22:02:26 +0000
Subject: [PATCH 2436/4650] [2021-07-16T22:02:26+0000] e2e test


From 51ce1540b442f2b1e1adc75426dc7ecbd345b375 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 16 Jul 2021 23:02:23 +0000
Subject: [PATCH 2437/4650] [2021-07-16T23:02:23+0000] e2e test


From e37958877646215cb6b171cb6dae45437b826f79 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 00:03:39 +0000
Subject: [PATCH 2438/4650] [2021-07-17T00:03:38+0000] e2e test


From a42a0d178daf1010ca54669dafc9d05d9b700750 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 01:22:50 +0000
Subject: [PATCH 2439/4650] [2021-07-17T01:22:50+0000] e2e test


From 1b6d1338131f250035bf2c121f626b87efef3a8a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 02:12:17 +0000
Subject: [PATCH 2440/4650] [2021-07-17T02:12:17+0000] e2e test


From bf96612041d501db31cf4d27513e82792f442116 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 03:02:29 +0000
Subject: [PATCH 2441/4650] [2021-07-17T03:02:29+0000] e2e test


From c874027b9e5db3aafc731845eb8875b97502124b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 04:02:41 +0000
Subject: [PATCH 2442/4650] [2021-07-17T04:02:41+0000] e2e test


From f7d9edfddb6cd16ff277e1e9a7b3c885077587fc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 05:02:20 +0000
Subject: [PATCH 2443/4650] [2021-07-17T05:02:20+0000] e2e test


From cb6c0ac6f19cfbbccd76c38338add2c934f99965 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 06:02:47 +0000
Subject: [PATCH 2444/4650] [2021-07-17T06:02:46+0000] e2e test


From 5a6b9b95978e752c9a2d275e63aa3457561787f3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 07:02:21 +0000
Subject: [PATCH 2445/4650] [2021-07-17T07:02:20+0000] e2e test


From 976698fd021295e034513ea52530303573b85cfe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 08:02:31 +0000
Subject: [PATCH 2446/4650] [2021-07-17T08:02:31+0000] e2e test


From bc292013add5e08bd4da9b9086cf8ce8a49260c9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 09:02:26 +0000
Subject: [PATCH 2447/4650] [2021-07-17T09:02:26+0000] e2e test


From f49ee73f0ff38d2c8c4b92ee1f29bb445cec821a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 10:02:28 +0000
Subject: [PATCH 2448/4650] [2021-07-17T10:02:28+0000] e2e test


From 37382ecd4526c5a73071da6e6c60d2be5c5cdb94 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 11:02:34 +0000
Subject: [PATCH 2449/4650] [2021-07-17T11:02:34+0000] e2e test


From 43ac6c5e9c205e4b3ece3aa9fb848888c833a67d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 12:02:49 +0000
Subject: [PATCH 2450/4650] [2021-07-17T12:02:49+0000] e2e test


From 549d675bbf030cf6d2e7e4179880ada9add7cc7c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 13:05:37 +0000
Subject: [PATCH 2451/4650] [2021-07-17T13:05:37+0000] e2e test


From a10d1ff74217377d6b59c68268e579747c0fd006 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 14:02:37 +0000
Subject: [PATCH 2452/4650] [2021-07-17T14:02:37+0000] e2e test


From 269cec2a8a1a5073498c5e461b333fc296775bc6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 15:02:49 +0000
Subject: [PATCH 2453/4650] [2021-07-17T15:02:49+0000] e2e test


From 215b2dc95e3ae1d77a1f06abc982ecdf54cb844e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 16:02:31 +0000
Subject: [PATCH 2454/4650] [2021-07-17T16:02:31+0000] e2e test


From 7a7b5b8e26a912188d297b7f7ab56bf3dcc60266 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 17:06:33 +0000
Subject: [PATCH 2455/4650] [2021-07-17T17:06:33+0000] e2e test


From 052a7cafbba7f8cdbf18614b1ade89d135e56612 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 18:02:25 +0000
Subject: [PATCH 2456/4650] [2021-07-17T18:02:25+0000] e2e test


From 04cd1ae4f5e6413ce6943c09cf74fb6357d2a1a9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 19:02:21 +0000
Subject: [PATCH 2457/4650] [2021-07-17T19:02:21+0000] e2e test


From 4d24986018cf2702b67fcec9b6c5a4a20ec1c6c3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 20:02:35 +0000
Subject: [PATCH 2458/4650] [2021-07-17T20:02:35+0000] e2e test


From b706dc9666926980f80231927dbc63e2994f875c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 21:02:35 +0000
Subject: [PATCH 2459/4650] [2021-07-17T21:02:35+0000] e2e test


From 60e76b4bdf59f18fad9f1b3f3f507165e58b5485 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 22:02:27 +0000
Subject: [PATCH 2460/4650] [2021-07-17T22:02:26+0000] e2e test


From 368ac3f90be0b2cda119963d04ffad93a33503c1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 17 Jul 2021 23:02:36 +0000
Subject: [PATCH 2461/4650] [2021-07-17T23:02:36+0000] e2e test


From 7777cabd6c109810dd66906be6611e034aefb130 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 00:04:01 +0000
Subject: [PATCH 2462/4650] [2021-07-18T00:04:01+0000] e2e test


From f8c195b5d75a8cc3340e0a57cbb64bb8641e0def Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 01:24:10 +0000
Subject: [PATCH 2463/4650] [2021-07-18T01:24:10+0000] e2e test


From ee4abb7dc293b8f44cdd564576436c675436a32d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 02:12:13 +0000
Subject: [PATCH 2464/4650] [2021-07-18T02:12:13+0000] e2e test


From 5e5d686b8ca3d7c4a90c7705a4032e627b388ad7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 03:02:28 +0000
Subject: [PATCH 2465/4650] [2021-07-18T03:02:28+0000] e2e test


From 9a1658da1943aea0e634c2c5198c59b517661d2a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 04:02:31 +0000
Subject: [PATCH 2466/4650] [2021-07-18T04:02:31+0000] e2e test


From d8afb1c8fc62e9b4bac40eb904942aa34e2d9190 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 05:02:19 +0000
Subject: [PATCH 2467/4650] [2021-07-18T05:02:19+0000] e2e test


From 759981c1d6871e76be6d29bba6ce078281d7f43b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 06:02:52 +0000
Subject: [PATCH 2468/4650] [2021-07-18T06:02:51+0000] e2e test


From 11b6e4aec1967f00676ad76f9644633589a2dd25 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 07:02:22 +0000
Subject: [PATCH 2469/4650] [2021-07-18T07:02:22+0000] e2e test


From 53d42a207a7ee9fb8abeaba7633d0dbbd10f714c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 08:02:50 +0000
Subject: [PATCH 2470/4650] [2021-07-18T08:02:50+0000] e2e test


From a263702d1e5b19fa989917fb065dd7f35b4ddf29 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 09:02:24 +0000
Subject: [PATCH 2471/4650] [2021-07-18T09:02:24+0000] e2e test


From b6cf1d5f5c07ed215b40f9b9c07ea3c943b7a620 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 10:02:57 +0000
Subject: [PATCH 2472/4650] [2021-07-18T10:02:57+0000] e2e test


From 9c3e994ea041c8d2b63f42c5fe1f86e6097f49ed Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 11:02:20 +0000
Subject: [PATCH 2473/4650] [2021-07-18T11:02:20+0000] e2e test


From b6dbafa9d2240cbf2ac790bf6a56fdb9db9b7b9c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 12:02:45 +0000
Subject: [PATCH 2474/4650] [2021-07-18T12:02:44+0000] e2e test


From 80a2f5fdc0c4f557378c65600d8f915a458219c5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 13:05:23 +0000
Subject: [PATCH 2475/4650] [2021-07-18T13:05:23+0000] e2e test


From 949d4c7aebce9432339c697faf0180f40933078a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 14:02:39 +0000
Subject: [PATCH 2476/4650] [2021-07-18T14:02:38+0000] e2e test


From ca0e7774e31d20925dea91a8b2a4a710fcd1228b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 15:02:55 +0000
Subject: [PATCH 2477/4650] [2021-07-18T15:02:55+0000] e2e test


From 6de261f6941878c321b5c04fb988df51eb00f470 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 16:02:34 +0000
Subject: [PATCH 2478/4650] [2021-07-18T16:02:34+0000] e2e test


From c4ec2d7e51375636fbcfc87f4f37a23e78c8b8d2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 17:06:13 +0000
Subject: [PATCH 2479/4650] [2021-07-18T17:06:13+0000] e2e test


From 73a0bf2f90c3272e1fa52866a84678cb977eb208 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 18:02:19 +0000
Subject: [PATCH 2480/4650] [2021-07-18T18:02:19+0000] e2e test


From 6109c2069b3ea330aab6bc561786d85676c788a4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 19:02:19 +0000
Subject: [PATCH 2481/4650] [2021-07-18T19:02:19+0000] e2e test


From 5fb8245f51b70e4389a2432a4d4f4e12d031896f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 20:02:39 +0000
Subject: [PATCH 2482/4650] [2021-07-18T20:02:39+0000] e2e test


From 1a561258e686aaea60fe435639a8a50855ae6cb8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 21:02:26 +0000
Subject: [PATCH 2483/4650] [2021-07-18T21:02:26+0000] e2e test


From 53b2ea9a36118e6a7108d8134504ae0f88223ad4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 22:02:30 +0000
Subject: [PATCH 2484/4650] [2021-07-18T22:02:30+0000] e2e test


From eaae38b8b20b0259a9888479ca54d8b94aacaf45 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 18 Jul 2021 23:02:33 +0000
Subject: [PATCH 2485/4650] [2021-07-18T23:02:33+0000] e2e test


From 487f118c2cf9c54301b3138865d88d472dd9ee38 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 00:03:56 +0000
Subject: [PATCH 2486/4650] [2021-07-19T00:03:56+0000] e2e test


From 69f0f7697bc3f02b49906426c7b5d3315fa8d60f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 01:24:11 +0000
Subject: [PATCH 2487/4650] [2021-07-19T01:24:11+0000] e2e test


From e42a0945a7a0a5b4332c202928aa53e43fdbbdbe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 02:13:45 +0000
Subject: [PATCH 2488/4650] [2021-07-19T02:13:45+0000] e2e test


From 3e01204f8006d5392863c154d87c3511bd279c19 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 03:02:26 +0000
Subject: [PATCH 2489/4650] [2021-07-19T03:02:26+0000] e2e test


From bf0c17801f556e497fbf1836fc902cdf9d8f7c0c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 04:02:33 +0000
Subject: [PATCH 2490/4650] [2021-07-19T04:02:33+0000] e2e test


From 03cbd0b73a8e779748491e8c732e6705707577c2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 05:02:24 +0000
Subject: [PATCH 2491/4650] [2021-07-19T05:02:24+0000] e2e test


From ff3dbdd74673772ec77b8960dd902b888fd3d19d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 06:02:56 +0000
Subject: [PATCH 2492/4650] [2021-07-19T06:02:56+0000] e2e test


From 59e593416e56d6e1fb8cacbecc2e535d1bca7c9d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 07:02:21 +0000
Subject: [PATCH 2493/4650] [2021-07-19T07:02:21+0000] e2e test


From 69eee6e5cf2ed06f82d4fbb12b6a9cbeaab550f9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 08:02:33 +0000
Subject: [PATCH 2494/4650] [2021-07-19T08:02:33+0000] e2e test


From ee039cd0ae5a1b1955c4cb9ffbb6259e17c80010 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 09:02:29 +0000
Subject: [PATCH 2495/4650] [2021-07-19T09:02:29+0000] e2e test


From 66fbd018af38a24ef623babf1ce213147a485987 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 10:02:36 +0000
Subject: [PATCH 2496/4650] [2021-07-19T10:02:36+0000] e2e test


From c3b30808b617d126eef8d8cfc4761e8536c3abe3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 11:02:27 +0000
Subject: [PATCH 2497/4650] [2021-07-19T11:02:27+0000] e2e test


From 79f71d377179dd141ffbcd888773af2862be40b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 12:02:44 +0000
Subject: [PATCH 2498/4650] [2021-07-19T12:02:44+0000] e2e test


From 1cad3ab981e7b43c5638e8ea11dc0ea09e3c09fa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 13:07:11 +0000
Subject: [PATCH 2499/4650] [2021-07-19T13:07:11+0000] e2e test


From 4b2b17a0ab87f500b9c9e6b7576cca144ee6297f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 14:02:33 +0000
Subject: [PATCH 2500/4650] [2021-07-19T14:02:33+0000] e2e test


From 0b4368bdd1b8bbab446edec086ebefb8713cccb0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 15:02:32 +0000
Subject: [PATCH 2501/4650] [2021-07-19T15:02:32+0000] e2e test


From 727c44f7e0c6aed7d4b979fa257cae498afec6d3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 16:02:35 +0000
Subject: [PATCH 2502/4650] [2021-07-19T16:02:35+0000] e2e test


From eaeb31b41005724b5da12294a22e28bcafa88516 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 17:07:27 +0000
Subject: [PATCH 2503/4650] [2021-07-19T17:07:26+0000] e2e test


From c3ee5700c849a8827a93885e4f4cfff49fd89804 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 18:02:32 +0000
Subject: [PATCH 2504/4650] [2021-07-19T18:02:32+0000] e2e test


From 24ad6dd08bdc3ccfbb1e216616015e18fdc0553b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 19:02:32 +0000
Subject: [PATCH 2505/4650] [2021-07-19T19:02:32+0000] e2e test


From 29d4887455b974ddb1fdd1aead9657781c152539 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 20:02:42 +0000
Subject: [PATCH 2506/4650] [2021-07-19T20:02:42+0000] e2e test


From 3a30d348ebab08a4ca5a333f519b3d4f1b37e353 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 21:02:36 +0000
Subject: [PATCH 2507/4650] [2021-07-19T21:02:36+0000] e2e test


From 5c9ddf12c7ddf778e97946bec8f982df685a34bf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 22:02:22 +0000
Subject: [PATCH 2508/4650] [2021-07-19T22:02:22+0000] e2e test


From 0ec907b6e0733b26adf6fcf05c1413f1bb86ed4d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 19 Jul 2021 23:02:41 +0000
Subject: [PATCH 2509/4650] [2021-07-19T23:02:41+0000] e2e test


From aef61489149e8c539f4f264ae1c83600f5be1075 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 00:03:59 +0000
Subject: [PATCH 2510/4650] [2021-07-20T00:03:59+0000] e2e test


From 10bd4bec1f8de14fdc424c178e3cb5a97e718a73 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 01:25:25 +0000
Subject: [PATCH 2511/4650] [2021-07-20T01:25:25+0000] e2e test


From 109ce1bde579d6d74005e7ff85e309b6973953c6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 02:15:55 +0000
Subject: [PATCH 2512/4650] [2021-07-20T02:15:55+0000] e2e test


From a58628f87991ec83284eb72ec46cd70be62666ce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 03:02:32 +0000
Subject: [PATCH 2513/4650] [2021-07-20T03:02:32+0000] e2e test


From e94f64006ad6230b533771b41963225217e5a498 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 04:02:39 +0000
Subject: [PATCH 2514/4650] [2021-07-20T04:02:38+0000] e2e test


From 6bd01c88113711ed608ae6effa856a2786feb99b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 05:02:20 +0000
Subject: [PATCH 2515/4650] [2021-07-20T05:02:20+0000] e2e test


From 46295ad0fb3eb61ca29bbdb712472a126bae0be6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 06:02:33 +0000
Subject: [PATCH 2516/4650] [2021-07-20T06:02:33+0000] e2e test


From acabfa84c4ffc45fd92d7bd0e3bb6cb7ddb25c85 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 07:02:41 +0000
Subject: [PATCH 2517/4650] [2021-07-20T07:02:41+0000] e2e test


From f8f771a62f5a468c62a4dcffcc9461d224c03e28 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 08:02:53 +0000
Subject: [PATCH 2518/4650] [2021-07-20T08:02:53+0000] e2e test


From 18636600784cbb9a5ee72ae959dc1e9807ce5757 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 09:02:40 +0000
Subject: [PATCH 2519/4650] [2021-07-20T09:02:40+0000] e2e test


From 42f39220e46e30104a305feb1baac604783f5df8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 10:02:41 +0000
Subject: [PATCH 2520/4650] [2021-07-20T10:02:41+0000] e2e test


From 150d3bce5a83bcbe1bdc6a2fa142d4bbb1146ed0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 11:02:21 +0000
Subject: [PATCH 2521/4650] [2021-07-20T11:02:21+0000] e2e test


From 808d0a06321b3b2bf2e69d71e650c31da026f4b5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 12:02:59 +0000
Subject: [PATCH 2522/4650] [2021-07-20T12:02:59+0000] e2e test


From a4cbc67a153eae7dbbd3b76551e5e07e5b4a43d8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 13:06:45 +0000
Subject: [PATCH 2523/4650] [2021-07-20T13:06:45+0000] e2e test


From 1b885638e3683df606a851c4bbd6163f22986396 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 14:02:38 +0000
Subject: [PATCH 2524/4650] [2021-07-20T14:02:38+0000] e2e test


From 671b7eae6293f9a58efbfac74c5b167e4c3dcd87 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 15:02:26 +0000
Subject: [PATCH 2525/4650] [2021-07-20T15:02:26+0000] e2e test


From 9c67d237d4b65d9cac6d6e56e704bf26a5070650 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 16:02:34 +0000
Subject: [PATCH 2526/4650] [2021-07-20T16:02:34+0000] e2e test


From 4c80c272a1fe4b81fe943b2df88753ad80922f2d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 17:07:12 +0000
Subject: [PATCH 2527/4650] [2021-07-20T17:07:12+0000] e2e test


From 99265975a02b77cef0cc16b35f7f5e2da7e62721 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 18:02:30 +0000
Subject: [PATCH 2528/4650] [2021-07-20T18:02:29+0000] e2e test


From ecb6682788deb6ca9f982e8863412c7c04a65223 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 19:02:25 +0000
Subject: [PATCH 2529/4650] [2021-07-20T19:02:25+0000] e2e test


From 9781fea3f58b430cfb6d8a08a26891daa1f0b78b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 20:02:32 +0000
Subject: [PATCH 2530/4650] [2021-07-20T20:02:32+0000] e2e test


From 471272092da10f3cc46b08226b80543e74f691a1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 21:02:23 +0000
Subject: [PATCH 2531/4650] [2021-07-20T21:02:22+0000] e2e test


From 317d713bb8acd56afc7733b95980c78f8dd9744d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 22:02:35 +0000
Subject: [PATCH 2532/4650] [2021-07-20T22:02:35+0000] e2e test


From 37d23905c879ef670321c5c7d0774921d9f667ce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 20 Jul 2021 23:02:23 +0000
Subject: [PATCH 2533/4650] [2021-07-20T23:02:23+0000] e2e test


From 36414a240b2721e277b650d61db5162838cac3a7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 00:03:50 +0000
Subject: [PATCH 2534/4650] [2021-07-21T00:03:49+0000] e2e test


From 1b0a0e412dde6e031c5a4d22e848400f1c3a38e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 01:24:28 +0000
Subject: [PATCH 2535/4650] [2021-07-21T01:24:28+0000] e2e test


From a4cb07aa8f1a291daaa4d6bf4197e28d57c70d30 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 02:14:07 +0000
Subject: [PATCH 2536/4650] [2021-07-21T02:14:07+0000] e2e test


From 1489ac2dd6dd49ce6fbcedd676f268f5690e8a55 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 03:02:26 +0000
Subject: [PATCH 2537/4650] [2021-07-21T03:02:26+0000] e2e test


From 608251f22544881112400f17d992bc1ead32d2fc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 04:02:34 +0000
Subject: [PATCH 2538/4650] [2021-07-21T04:02:34+0000] e2e test


From e115c0a480cfa048a7e69bafd24f9d1624c1a97b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 05:02:19 +0000
Subject: [PATCH 2539/4650] [2021-07-21T05:02:19+0000] e2e test


From a10dee3a789524643670d9bbe58079ff4aa5aca0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 06:02:45 +0000
Subject: [PATCH 2540/4650] [2021-07-21T06:02:45+0000] e2e test


From 53c46039bb5a6298ccf643918ec9c4c52271b5b4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 07:02:30 +0000
Subject: [PATCH 2541/4650] [2021-07-21T07:02:30+0000] e2e test


From 84f49135efeb100582fc39bb3ad767da5dd71ed4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 08:02:35 +0000
Subject: [PATCH 2542/4650] [2021-07-21T08:02:34+0000] e2e test


From ec2f9a2c16907f7f055dee2f189dda82ee2c34f5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 09:02:25 +0000
Subject: [PATCH 2543/4650] [2021-07-21T09:02:25+0000] e2e test


From 751b7efd48f755cb12b023724abe47f263c0d8e2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 10:02:35 +0000
Subject: [PATCH 2544/4650] [2021-07-21T10:02:35+0000] e2e test


From 486d6eaa49a672540c420f40369fde4afcca95ce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 11:02:25 +0000
Subject: [PATCH 2545/4650] [2021-07-21T11:02:24+0000] e2e test


From 9f0002cc7d9e3811fa604a8a089ddf3a363b5252 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 12:02:41 +0000
Subject: [PATCH 2546/4650] [2021-07-21T12:02:41+0000] e2e test


From ddc1a2624310e7c3ac5f3811d4a0168618f4055a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 13:06:41 +0000
Subject: [PATCH 2547/4650] [2021-07-21T13:06:40+0000] e2e test


From 759ee877d5b1cf983f08f20ccd036dfbd753310e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 14:02:36 +0000
Subject: [PATCH 2548/4650] [2021-07-21T14:02:36+0000] e2e test


From 7af1479dee9cefe12e3bb0a5aedb3af2e95b743b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 15:02:22 +0000
Subject: [PATCH 2549/4650] [2021-07-21T15:02:21+0000] e2e test


From a180ad31dd1d36f788c23c7f6b8ce38f68df5568 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 16:02:30 +0000
Subject: [PATCH 2550/4650] [2021-07-21T16:02:29+0000] e2e test


From 398d3196ef2a21c101279ec2eba3741a4ca2c131 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 17:08:12 +0000
Subject: [PATCH 2551/4650] [2021-07-21T17:08:12+0000] e2e test


From 0cf0a8f4941856568809e96d4a6680a92abc5b5f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 18:02:35 +0000
Subject: [PATCH 2552/4650] [2021-07-21T18:02:35+0000] e2e test


From d45664270d63f14a69c223950d4a98877bca82cf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 19:02:28 +0000
Subject: [PATCH 2553/4650] [2021-07-21T19:02:28+0000] e2e test


From 8e6c175fadc862408cba5174d7bb6adf4f295640 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 20:02:29 +0000
Subject: [PATCH 2554/4650] [2021-07-21T20:02:29+0000] e2e test


From 69669a7556d88cd5be8a0126890a4818efc77a2b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 21:02:23 +0000
Subject: [PATCH 2555/4650] [2021-07-21T21:02:23+0000] e2e test


From 5e24921829f7e168ba8cfdeb5d650a35df440999 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 22:02:29 +0000
Subject: [PATCH 2556/4650] [2021-07-21T22:02:29+0000] e2e test


From 9155ae0a8f2e0ddf24cab65ac56f79f19b0ae91b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 21 Jul 2021 23:02:38 +0000
Subject: [PATCH 2557/4650] [2021-07-21T23:02:38+0000] e2e test


From 75902941587c1c997a2078f0b3f23fad2c0770db Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 00:03:39 +0000
Subject: [PATCH 2558/4650] [2021-07-22T00:03:39+0000] e2e test


From caea8c5526e9e2828c2527d75cf9b600ce4a3289 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 01:24:36 +0000
Subject: [PATCH 2559/4650] [2021-07-22T01:24:36+0000] e2e test


From eb0745fe2a5f2f3d49fb17daa2460c8b1147167c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 02:15:34 +0000
Subject: [PATCH 2560/4650] [2021-07-22T02:15:34+0000] e2e test


From 0bdc6c12d472c6a5e9479da9de03db7d23062cbc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 03:02:34 +0000
Subject: [PATCH 2561/4650] [2021-07-22T03:02:34+0000] e2e test


From b72c18e5f6cb388be0437524b00ffddf53462f53 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 04:02:25 +0000
Subject: [PATCH 2562/4650] [2021-07-22T04:02:25+0000] e2e test


From 4801d1e0a6f124353fc80a8ff17a3b16e2c9c4b2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 05:02:18 +0000
Subject: [PATCH 2563/4650] [2021-07-22T05:02:18+0000] e2e test


From a9b33a777062ed17f155fb1ac6d2b571be9d97d1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 06:02:41 +0000
Subject: [PATCH 2564/4650] [2021-07-22T06:02:41+0000] e2e test


From 4f98f0cb74aefdd97b685e4acace49318af5dfe0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 07:02:42 +0000
Subject: [PATCH 2565/4650] [2021-07-22T07:02:42+0000] e2e test


From 9cdb822c267ac92c0230104a395a50bdb0a756f6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 08:02:39 +0000
Subject: [PATCH 2566/4650] [2021-07-22T08:02:39+0000] e2e test


From 8b3ff494c9eac488bf71fbdeb21f543f0168dfee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 09:02:29 +0000
Subject: [PATCH 2567/4650] [2021-07-22T09:02:29+0000] e2e test


From d2a068e2a51272588dd7139abdb3e9a505522600 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 10:02:28 +0000
Subject: [PATCH 2568/4650] [2021-07-22T10:02:28+0000] e2e test


From 4014e7b9558b00d50445bec100992b3d6cfad722 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 11:02:26 +0000
Subject: [PATCH 2569/4650] [2021-07-22T11:02:26+0000] e2e test


From 9b6118b9bf5965ea587bcf4761b980c20886c675 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 12:02:43 +0000
Subject: [PATCH 2570/4650] [2021-07-22T12:02:43+0000] e2e test


From 921f1846e73b4a3a8475cd463f08e9b3146c6110 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 13:07:10 +0000
Subject: [PATCH 2571/4650] [2021-07-22T13:07:10+0000] e2e test


From fd4ff0ccb4ab9e6df3a106f88e6fcf7fc3c372e1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 14:02:21 +0000
Subject: [PATCH 2572/4650] [2021-07-22T14:02:21+0000] e2e test


From dac2611fd9205baa660777b03f09cb6ad187bbc9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 15:02:46 +0000
Subject: [PATCH 2573/4650] [2021-07-22T15:02:46+0000] e2e test


From e1cd884dcd5c60a73326da3a36464b4a2d8b1583 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 16:02:28 +0000
Subject: [PATCH 2574/4650] [2021-07-22T16:02:28+0000] e2e test


From 32cc6cd1feca0b0c42dcdeac8276dec5d5ac274c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 17:08:14 +0000
Subject: [PATCH 2575/4650] [2021-07-22T17:08:14+0000] e2e test


From 02e54d89b6bffdcdc21cbb741cf325f046bdc6f8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 18:02:30 +0000
Subject: [PATCH 2576/4650] [2021-07-22T18:02:30+0000] e2e test


From 079d4ee0cb035f42ae538197c752b4d360e9370f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 19:02:23 +0000
Subject: [PATCH 2577/4650] [2021-07-22T19:02:23+0000] e2e test


From ad9b7183668784a6ed94a1524d0dec1033863b7e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 20:02:37 +0000
Subject: [PATCH 2578/4650] [2021-07-22T20:02:36+0000] e2e test


From d5d9230eac1eb7f811fe4f8a87f057a2e751659e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 21:02:21 +0000
Subject: [PATCH 2579/4650] [2021-07-22T21:02:21+0000] e2e test


From 8b91370b34690f2684274fcb4614dafccaf07ba8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 22:02:33 +0000
Subject: [PATCH 2580/4650] [2021-07-22T22:02:32+0000] e2e test


From 577e63d3201cff5a4cfb9fbbcbcc52a49c0ec74c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 22 Jul 2021 23:02:34 +0000
Subject: [PATCH 2581/4650] [2021-07-22T23:02:34+0000] e2e test


From 72a437a5749447f6bd2c95bb7a7f4038cf094d56 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 00:03:48 +0000
Subject: [PATCH 2582/4650] [2021-07-23T00:03:47+0000] e2e test


From 2f3285540942e48ee681d7958837e59a2efb41e2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 01:24:02 +0000
Subject: [PATCH 2583/4650] [2021-07-23T01:24:02+0000] e2e test


From 642c277e4178bf4a0830d37e34b42ffa3f0d4403 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 02:13:50 +0000
Subject: [PATCH 2584/4650] [2021-07-23T02:13:50+0000] e2e test


From 696a5eaeab20c945c3a95924f71e509db2dbcc38 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 03:02:30 +0000
Subject: [PATCH 2585/4650] [2021-07-23T03:02:30+0000] e2e test


From 0cfb8387829132b92c78695769f77ef1e406b9df Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 04:02:39 +0000
Subject: [PATCH 2586/4650] [2021-07-23T04:02:39+0000] e2e test


From 83763dabbaaf123b5c6b398bcb68a3d0c2a0c635 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 05:02:32 +0000
Subject: [PATCH 2587/4650] [2021-07-23T05:02:32+0000] e2e test


From d19277799cbf1404709e332c445f17e43ad1000a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 06:02:29 +0000
Subject: [PATCH 2588/4650] [2021-07-23T06:02:28+0000] e2e test


From 527eb71690dacb6ffcf3264e744d06bdc1afa990 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 07:02:30 +0000
Subject: [PATCH 2589/4650] [2021-07-23T07:02:30+0000] e2e test


From f0d4a9ebcb2c11ef0a9a798e298717c561d34463 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 08:02:31 +0000
Subject: [PATCH 2590/4650] [2021-07-23T08:02:31+0000] e2e test


From b952013b8db131b2d8a238dca74e8ad978c23fdd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 09:02:38 +0000
Subject: [PATCH 2591/4650] [2021-07-23T09:02:38+0000] e2e test


From 33f944a15ed455190b2d870a78eaf498e65f4ae9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 10:02:33 +0000
Subject: [PATCH 2592/4650] [2021-07-23T10:02:33+0000] e2e test


From 748f8109f69e905db71503a4babc631818c0d2c7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 11:02:24 +0000
Subject: [PATCH 2593/4650] [2021-07-23T11:02:24+0000] e2e test


From 0d17d5ded43d8c3936ea06c73463c3e4273f4bcf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 12:02:57 +0000
Subject: [PATCH 2594/4650] [2021-07-23T12:02:57+0000] e2e test


From 751c86cfb0248bead3604fb57389eae8f1c5b907 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 13:06:41 +0000
Subject: [PATCH 2595/4650] [2021-07-23T13:06:41+0000] e2e test


From a74933e6edb6164402a401706da57bbef4b60d77 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 14:02:35 +0000
Subject: [PATCH 2596/4650] [2021-07-23T14:02:35+0000] e2e test


From 4d5fb3861e1046f721b75846c3d241cdb8bc16b0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 16:02:38 +0000
Subject: [PATCH 2597/4650] [2021-07-23T16:02:38+0000] e2e test


From 8eeca275d8bb472f0708cd881e119e06c7630b43 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 17:07:37 +0000
Subject: [PATCH 2598/4650] [2021-07-23T17:07:37+0000] e2e test


From 590b71eba7ea186b9990c0d519563bafb61708ee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 18:02:33 +0000
Subject: [PATCH 2599/4650] [2021-07-23T18:02:33+0000] e2e test


From e1229e66455599e1aa68077b6d08af1d20fedda2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 19:02:31 +0000
Subject: [PATCH 2600/4650] [2021-07-23T19:02:31+0000] e2e test


From 1d6b7a20ebd942e0f8aa723f740be2e387936e65 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 20:02:29 +0000
Subject: [PATCH 2601/4650] [2021-07-23T20:02:29+0000] e2e test


From bee5d3b4e73d7743a8b467eb7c1d3af089484693 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 21:02:33 +0000
Subject: [PATCH 2602/4650] [2021-07-23T21:02:33+0000] e2e test


From 2426b9be83a27a23c9aaef918ba99cc905a7ca04 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 22:02:26 +0000
Subject: [PATCH 2603/4650] [2021-07-23T22:02:26+0000] e2e test


From 2d3790a12fd779e3020ea3b70a7e169c0c0c8f2a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 23 Jul 2021 23:02:37 +0000
Subject: [PATCH 2604/4650] [2021-07-23T23:02:36+0000] e2e test


From d803333631f09b6645b6adddc84453737f1dba5d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 00:03:40 +0000
Subject: [PATCH 2605/4650] [2021-07-24T00:03:40+0000] e2e test


From 6d9f06473e524dbb352bb692efa6c407870d96b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 01:23:51 +0000
Subject: [PATCH 2606/4650] [2021-07-24T01:23:51+0000] e2e test


From 80549794af98e9fdf96dbd1770c1e31b93f84174 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 02:13:08 +0000
Subject: [PATCH 2607/4650] [2021-07-24T02:13:08+0000] e2e test


From fc4c62a3012df1f27c5c13feb9ac186005181b2c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 03:02:27 +0000
Subject: [PATCH 2608/4650] [2021-07-24T03:02:27+0000] e2e test


From 97c31e71e098cdd4cdf8580ab8cd04d29b5ddc5c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 04:02:30 +0000
Subject: [PATCH 2609/4650] [2021-07-24T04:02:30+0000] e2e test


From f26344181fb0dad826fc24ef8f5cbaf17c00bb56 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 05:02:28 +0000
Subject: [PATCH 2610/4650] [2021-07-24T05:02:28+0000] e2e test


From c1912117453fe35b68b4a37abfff797860a23afc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 06:02:49 +0000
Subject: [PATCH 2611/4650] [2021-07-24T06:02:48+0000] e2e test


From e010949fa65ad96f175013538f5ab33d4607284a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 07:02:20 +0000
Subject: [PATCH 2612/4650] [2021-07-24T07:02:20+0000] e2e test


From 655aa02062a8730173aa816ba835b6f61c7ab4fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 08:02:49 +0000
Subject: [PATCH 2613/4650] [2021-07-24T08:02:49+0000] e2e test


From 88bc3ee12dd6654267b4cce85fededa20025e8a6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 09:02:30 +0000
Subject: [PATCH 2614/4650] [2021-07-24T09:02:29+0000] e2e test


From 00ccceacf65178e45ed6b96737c52d847d2a25c6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 10:02:26 +0000
Subject: [PATCH 2615/4650] [2021-07-24T10:02:26+0000] e2e test


From 34df13e0d764d1f6db4b323fcc379e5559979fb5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 11:02:18 +0000
Subject: [PATCH 2616/4650] [2021-07-24T11:02:18+0000] e2e test


From 1f11f630501dce0b1aa7cc701924d2ce7f19f953 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 12:02:49 +0000
Subject: [PATCH 2617/4650] [2021-07-24T12:02:49+0000] e2e test


From e194fcf73366045c20de2945c32d14755d1fe5ac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 13:05:32 +0000
Subject: [PATCH 2618/4650] [2021-07-24T13:05:32+0000] e2e test


From d4b62beb4e76aaae26bdd366314efefc49188e30 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 14:02:42 +0000
Subject: [PATCH 2619/4650] [2021-07-24T14:02:42+0000] e2e test


From 27bb185045991b7a671f84516a4a6b295826f14c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 15:02:33 +0000
Subject: [PATCH 2620/4650] [2021-07-24T15:02:33+0000] e2e test


From e57d12682288765609e789a9d89df891ad40d368 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 16:02:30 +0000
Subject: [PATCH 2621/4650] [2021-07-24T16:02:29+0000] e2e test


From 74a29b9d8d8b4584e1cca1ef398cf9ed49d4c79a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 17:06:16 +0000
Subject: [PATCH 2622/4650] [2021-07-24T17:06:16+0000] e2e test


From 6b47317680a441d9a9599707df97b1e0b132723d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 18:02:34 +0000
Subject: [PATCH 2623/4650] [2021-07-24T18:02:34+0000] e2e test


From aa4580a4bc0f2517b6652552dad0ad1b83e8a035 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 19:02:20 +0000
Subject: [PATCH 2624/4650] [2021-07-24T19:02:20+0000] e2e test


From 6210db882d29648d3889051adef11c20815f4924 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 20:02:28 +0000
Subject: [PATCH 2625/4650] [2021-07-24T20:02:28+0000] e2e test


From 8b4f92b83f0514c4eabb7eee282100a4e90bab3e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 21:02:27 +0000
Subject: [PATCH 2626/4650] [2021-07-24T21:02:27+0000] e2e test


From 9d98626537c18a564d1800dc0a9d157779cdc5ef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 22:02:34 +0000
Subject: [PATCH 2627/4650] [2021-07-24T22:02:33+0000] e2e test


From bbb64ae39220036dbebbf42aa171501f956ef6c5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 24 Jul 2021 23:02:29 +0000
Subject: [PATCH 2628/4650] [2021-07-24T23:02:29+0000] e2e test


From 36b0a9d4654e45fcd338a7665226f6cff1b9296b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 00:03:49 +0000
Subject: [PATCH 2629/4650] [2021-07-25T00:03:49+0000] e2e test


From 2c8f8ab1116d16e7b09cfd458b4cb5fb2841b63d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 01:23:54 +0000
Subject: [PATCH 2630/4650] [2021-07-25T01:23:53+0000] e2e test


From 1d28d4ebca9f6851ab14642d058ea90b6b117c77 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 02:12:23 +0000
Subject: [PATCH 2631/4650] [2021-07-25T02:12:23+0000] e2e test


From 032edafe4fa07595d1534f0c82384dddedbbc135 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 03:02:21 +0000
Subject: [PATCH 2632/4650] [2021-07-25T03:02:21+0000] e2e test


From d84c47fedefd5d336653e483f06600f2ba7d1b57 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 04:02:41 +0000
Subject: [PATCH 2633/4650] [2021-07-25T04:02:40+0000] e2e test


From c73238dd6f736f3a79ee589cf209126e87b9d206 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 05:02:23 +0000
Subject: [PATCH 2634/4650] [2021-07-25T05:02:23+0000] e2e test


From 7c46b03d6dce99794569de7953af88085edc4f7a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 06:02:47 +0000
Subject: [PATCH 2635/4650] [2021-07-25T06:02:47+0000] e2e test


From 3c81ba7899f8944c321279fa3c12b6b3f3e3465e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 07:02:24 +0000
Subject: [PATCH 2636/4650] [2021-07-25T07:02:24+0000] e2e test


From 58dd4df73af181b968effaa6e8f50490911d2203 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 08:02:35 +0000
Subject: [PATCH 2637/4650] [2021-07-25T08:02:35+0000] e2e test


From c1e021355a14e7b6996227c459869b4e6ddaac82 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 09:02:25 +0000
Subject: [PATCH 2638/4650] [2021-07-25T09:02:25+0000] e2e test


From 1397f9c3ed2bce25bbaf8b299c4d75852bb73d27 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 10:02:31 +0000
Subject: [PATCH 2639/4650] [2021-07-25T10:02:30+0000] e2e test


From 89bb35ea304bcd1ff2457ea9fe784a879c4ff90e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 11:02:38 +0000
Subject: [PATCH 2640/4650] [2021-07-25T11:02:37+0000] e2e test


From d4e69512e0678ea601f9cad7c334b69554cffbd2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 12:02:50 +0000
Subject: [PATCH 2641/4650] [2021-07-25T12:02:50+0000] e2e test


From 2480e51c473fb0488a6a486ca062d2b89450ddc8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 13:05:29 +0000
Subject: [PATCH 2642/4650] [2021-07-25T13:05:29+0000] e2e test


From 20efcb2d937476b5ba1d176950958a1ae9491ff1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 14:02:37 +0000
Subject: [PATCH 2643/4650] [2021-07-25T14:02:36+0000] e2e test


From 6164b553ad1725f89d6df421efb4bec03160d1cd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 15:02:26 +0000
Subject: [PATCH 2644/4650] [2021-07-25T15:02:26+0000] e2e test


From 8cf2b47bd332337e021c10028f4f5ada359ae37b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 16:02:26 +0000
Subject: [PATCH 2645/4650] [2021-07-25T16:02:25+0000] e2e test


From ed3171e0c9e0d5033c78235f429eb15b4e2e3280 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 17:06:14 +0000
Subject: [PATCH 2646/4650] [2021-07-25T17:06:14+0000] e2e test


From a54986dd354183da37e2af3d16d5a11f1b0f2d79 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 18:02:25 +0000
Subject: [PATCH 2647/4650] [2021-07-25T18:02:25+0000] e2e test


From 7e381d5ae695d9b2899620c8002560d3f122c6fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 19:02:26 +0000
Subject: [PATCH 2648/4650] [2021-07-25T19:02:26+0000] e2e test


From e0715b62115c461481c6585f7c7789f05105414b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 20:02:32 +0000
Subject: [PATCH 2649/4650] [2021-07-25T20:02:32+0000] e2e test


From 3af78fa7dcb3d2ae772747e71260cbfb39e5144c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 21:02:35 +0000
Subject: [PATCH 2650/4650] [2021-07-25T21:02:35+0000] e2e test


From c442bfaacb925e274648004f8ef24dc4820ebec5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 22:02:21 +0000
Subject: [PATCH 2651/4650] [2021-07-25T22:02:21+0000] e2e test


From 835869b18deb98f39bda3f69bd4af099e7adff29 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 25 Jul 2021 23:02:37 +0000
Subject: [PATCH 2652/4650] [2021-07-25T23:02:37+0000] e2e test


From b9cefcd17c339bca668a4c4253a3ce6a13d8fb28 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 00:03:43 +0000
Subject: [PATCH 2653/4650] [2021-07-26T00:03:43+0000] e2e test


From 8c8ced337a5a227edca609d1e714598da7b06d0d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 01:24:46 +0000
Subject: [PATCH 2654/4650] [2021-07-26T01:24:46+0000] e2e test


From 20d5b1f71cebc56a31b5b92f6de9102013f2536a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 02:14:06 +0000
Subject: [PATCH 2655/4650] [2021-07-26T02:14:06+0000] e2e test


From 1586cc991b91edfdb1851e865e53bb64f2a86cb5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 03:02:30 +0000
Subject: [PATCH 2656/4650] [2021-07-26T03:02:30+0000] e2e test


From 2c1d95897e0cc3a9eb3c7840b0c644ad98d188ab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 04:02:34 +0000
Subject: [PATCH 2657/4650] [2021-07-26T04:02:34+0000] e2e test


From 2efea718e2921ac50f9babcaf14032504208c62d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 05:02:22 +0000
Subject: [PATCH 2658/4650] [2021-07-26T05:02:22+0000] e2e test


From f301f096cf9028109b23ae1fbb2265ceebe0a181 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 06:02:38 +0000
Subject: [PATCH 2659/4650] [2021-07-26T06:02:38+0000] e2e test


From c3a14040130b5110acb8b670ab64d0c24d222c79 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 07:02:21 +0000
Subject: [PATCH 2660/4650] [2021-07-26T07:02:21+0000] e2e test


From 192db6d434e7a251a0eb3b2fd9c3db99d89b46d9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 08:02:34 +0000
Subject: [PATCH 2661/4650] [2021-07-26T08:02:33+0000] e2e test


From 26589300db54a7fcfbe555d2958e59e8748f67b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 09:02:43 +0000
Subject: [PATCH 2662/4650] [2021-07-26T09:02:42+0000] e2e test


From b3795adb492542f39ccfa1da6d748ccdfb8cf541 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 10:09:02 +0000
Subject: [PATCH 2663/4650] [2021-07-26T10:09:02+0000] e2e test


From 31b1e6f70a5fc2a6118fabeae33df02f647e7046 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 11:03:48 +0000
Subject: [PATCH 2664/4650] [2021-07-26T11:03:48+0000] e2e test


From d00a794c3ee31d3aec7821520617ab08aaa3ad3d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 12:02:48 +0000
Subject: [PATCH 2665/4650] [2021-07-26T12:02:48+0000] e2e test


From a84c55d759feb6108c396bceb946055512184674 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 13:07:14 +0000
Subject: [PATCH 2666/4650] [2021-07-26T13:07:14+0000] e2e test


From 946294464433c2cd6062873e962c0351056b9dbd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 14:02:23 +0000
Subject: [PATCH 2667/4650] [2021-07-26T14:02:23+0000] e2e test


From 76eb61692917af74c8a9abc0298fa987f18f0d93 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 15:02:29 +0000
Subject: [PATCH 2668/4650] [2021-07-26T15:02:29+0000] e2e test


From ee7c22d675e10a422d717c412baacb7a0a0a74ca Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 16:02:43 +0000
Subject: [PATCH 2669/4650] [2021-07-26T16:02:43+0000] e2e test


From 01a45dbe475e1a5ae41c2fb7fb4fc82440cb32b8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 17:07:33 +0000
Subject: [PATCH 2670/4650] [2021-07-26T17:07:33+0000] e2e test


From c5b8c92cafbb96d9be3ab3bbcd65138d257bd123 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 18:02:42 +0000
Subject: [PATCH 2671/4650] [2021-07-26T18:02:42+0000] e2e test


From 50bb25ffd014c3fae8b1e776e5404c07ef2e9594 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 19:02:22 +0000
Subject: [PATCH 2672/4650] [2021-07-26T19:02:22+0000] e2e test


From 1d83a64924beff337659827e1c4befd8e818cb76 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 20:02:27 +0000
Subject: [PATCH 2673/4650] [2021-07-26T20:02:26+0000] e2e test


From 7beab15396588d9cad42dc725e5608e483fd13bd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 21:02:21 +0000
Subject: [PATCH 2674/4650] [2021-07-26T21:02:21+0000] e2e test


From 30674e0985a9fea01e0480501faf6c45559d6ae6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 22:02:26 +0000
Subject: [PATCH 2675/4650] [2021-07-26T22:02:26+0000] e2e test


From 39b44bb893d5d234fe4b707911f22af090d6dd81 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 26 Jul 2021 23:03:35 +0000
Subject: [PATCH 2676/4650] [2021-07-26T23:03:34+0000] e2e test


From d02af31db66f291789fc9fd0cb91c3f157ea70f7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 00:03:57 +0000
Subject: [PATCH 2677/4650] [2021-07-27T00:03:57+0000] e2e test


From 7a4356d34888917f3e9c6eb874c4c9bbb4a4b637 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 01:25:13 +0000
Subject: [PATCH 2678/4650] [2021-07-27T01:25:13+0000] e2e test


From 66c5c27fa2704aff77d12db348b856678bacd866 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 02:15:28 +0000
Subject: [PATCH 2679/4650] [2021-07-27T02:15:28+0000] e2e test


From 993b42c53f65844a63dabe5dba866b206af22ed5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 03:02:27 +0000
Subject: [PATCH 2680/4650] [2021-07-27T03:02:27+0000] e2e test


From ee77504f35fa52a8b89a4d0090028cfad599695e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 04:02:37 +0000
Subject: [PATCH 2681/4650] [2021-07-27T04:02:37+0000] e2e test


From 1e22c085217e0abcca8efb67a332dfda910fcaf8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 05:02:19 +0000
Subject: [PATCH 2682/4650] [2021-07-27T05:02:19+0000] e2e test


From 2a766caa3e7f4325c0bcd94603d89276bb6ed5c4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 06:02:44 +0000
Subject: [PATCH 2683/4650] [2021-07-27T06:02:44+0000] e2e test


From 42faeb2a77f32fb53f22e69869d1388340ca4a23 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 07:02:22 +0000
Subject: [PATCH 2684/4650] [2021-07-27T07:02:22+0000] e2e test


From 994319c8d54f83c373e55a5ac3a1f2ea59d06f4c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 08:02:45 +0000
Subject: [PATCH 2685/4650] [2021-07-27T08:02:45+0000] e2e test


From 2447aae48cebc4fe0a3a31c9037b9f144393aaa5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 09:02:25 +0000
Subject: [PATCH 2686/4650] [2021-07-27T09:02:25+0000] e2e test


From 5c59b33838f4d38403dc4dfacb335bb98b9165a3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 10:02:24 +0000
Subject: [PATCH 2687/4650] [2021-07-27T10:02:24+0000] e2e test


From 4728853cc099118f21d75143061aed9904680bdb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 11:02:32 +0000
Subject: [PATCH 2688/4650] [2021-07-27T11:02:32+0000] e2e test


From 312208904d25fe3e2c22adb45abd191a01d390d8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 12:02:45 +0000
Subject: [PATCH 2689/4650] [2021-07-27T12:02:45+0000] e2e test


From c5ea456434750be1d5f01c13c10b0002a517a5de Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 13:06:46 +0000
Subject: [PATCH 2690/4650] [2021-07-27T13:06:46+0000] e2e test


From 3293d39f1aca31d6a2f30322c53cd804d72153d0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 14:02:24 +0000
Subject: [PATCH 2691/4650] [2021-07-27T14:02:24+0000] e2e test


From e775343e89ea9217d080f4d866817ba71b11f51b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 15:02:33 +0000
Subject: [PATCH 2692/4650] [2021-07-27T15:02:33+0000] e2e test


From 0c13be1eb61c6c148f5190540d543265de644999 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 16:02:33 +0000
Subject: [PATCH 2693/4650] [2021-07-27T16:02:33+0000] e2e test


From 3345801f0871f823e57cd7fcec274814328da19c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 17:07:17 +0000
Subject: [PATCH 2694/4650] [2021-07-27T17:07:17+0000] e2e test


From 14168ab71529bea658dc04b28da20e88c4f51219 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 18:02:29 +0000
Subject: [PATCH 2695/4650] [2021-07-27T18:02:28+0000] e2e test


From b56d8cc17882c417b9c2156fa6a7a1c85c1a1c50 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 19:02:23 +0000
Subject: [PATCH 2696/4650] [2021-07-27T19:02:22+0000] e2e test


From 04493c99569c2b227b34fe352fbb4164a800cb55 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 20:02:22 +0000
Subject: [PATCH 2697/4650] [2021-07-27T20:02:21+0000] e2e test


From 785ec505fb09e582d341697da2dc7f8abf0c9380 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 21:02:24 +0000
Subject: [PATCH 2698/4650] [2021-07-27T21:02:24+0000] e2e test


From 363e6489775b8797061f012332ddeeef0576cf4d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 22:02:29 +0000
Subject: [PATCH 2699/4650] [2021-07-27T22:02:29+0000] e2e test


From 9e2a743d57233a389fd0bbdd863f1b8b10705de0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 27 Jul 2021 23:02:32 +0000
Subject: [PATCH 2700/4650] [2021-07-27T23:02:32+0000] e2e test


From 7cf9f8f893910c4c740b801f46125c94b516601f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 00:03:30 +0000
Subject: [PATCH 2701/4650] [2021-07-28T00:03:30+0000] e2e test


From 77860edbba3fc6aeb5292ac027576a14cea59a68 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 01:24:57 +0000
Subject: [PATCH 2702/4650] [2021-07-28T01:24:56+0000] e2e test


From 4ac33ffe856f89b1c76d262f17026634f28f3e36 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 02:14:36 +0000
Subject: [PATCH 2703/4650] [2021-07-28T02:14:36+0000] e2e test


From 74f1bf5a47d3695831639bca4718dced4bb82251 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 03:02:28 +0000
Subject: [PATCH 2704/4650] [2021-07-28T03:02:28+0000] e2e test


From 715fb4dbf5038acd1aeb416e81ce9981a4af11f9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 04:02:45 +0000
Subject: [PATCH 2705/4650] [2021-07-28T04:02:44+0000] e2e test


From ceca07d12a21c60b4fda5e98f8bc7c7c8488bc76 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 05:02:34 +0000
Subject: [PATCH 2706/4650] [2021-07-28T05:02:34+0000] e2e test


From 9dbb432c1f3e8fced63859b75f0f562f61f5f97c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 06:03:03 +0000
Subject: [PATCH 2707/4650] [2021-07-28T06:03:03+0000] e2e test


From fd666a040ed48df36e26b33a094b9e4e9035ad06 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 07:02:23 +0000
Subject: [PATCH 2708/4650] [2021-07-28T07:02:23+0000] e2e test


From 1a96488f7482ad4a0436c153dd810b74971741b8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 08:02:41 +0000
Subject: [PATCH 2709/4650] [2021-07-28T08:02:41+0000] e2e test


From f7a5dd4ab4a31d25535001bf3fb9f69f60e23a19 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 09:02:39 +0000
Subject: [PATCH 2710/4650] [2021-07-28T09:02:39+0000] e2e test


From 7c28fc2c4c21a81955ec68014204fe5bb42dfcdd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 10:02:27 +0000
Subject: [PATCH 2711/4650] [2021-07-28T10:02:27+0000] e2e test


From e52168af20b117deb725d1f4cc9ff7c715b385b7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 11:02:30 +0000
Subject: [PATCH 2712/4650] [2021-07-28T11:02:30+0000] e2e test


From 92f27b006833b1c9b74da27761fadc018a6b5299 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 12:02:56 +0000
Subject: [PATCH 2713/4650] [2021-07-28T12:02:56+0000] e2e test


From da35ff6a31712dda9d8ab62c4ea11f953f0a78a1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 13:09:37 +0000
Subject: [PATCH 2714/4650] [2021-07-28T13:09:37+0000] e2e test


From ad7855a41282450e1dda54538692ddedfaf1ff10 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 14:02:35 +0000
Subject: [PATCH 2715/4650] [2021-07-28T14:02:35+0000] e2e test


From 752e21f821780702d813ad4a328a70eab4dfc3a7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 15:02:34 +0000
Subject: [PATCH 2716/4650] [2021-07-28T15:02:34+0000] e2e test


From a078b9111bbfb171a4c865354c1fe4e6405b8f07 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 16:02:54 +0000
Subject: [PATCH 2717/4650] [2021-07-28T16:02:54+0000] e2e test


From 86fe2b0555c474cdda7d2ec90153f0fb1c9f8acb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 17:07:54 +0000
Subject: [PATCH 2718/4650] [2021-07-28T17:07:54+0000] e2e test


From 407a7448436d385a7d98a13a78e2ca62a2f64f62 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 18:02:46 +0000
Subject: [PATCH 2719/4650] [2021-07-28T18:02:45+0000] e2e test


From 3c4019df5f6781d55c6fde1bed1ece1f54c52cf6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 19:02:21 +0000
Subject: [PATCH 2720/4650] [2021-07-28T19:02:21+0000] e2e test


From 0de158c0b3da96ace170e54c9fbe032c54dc07aa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 20:02:31 +0000
Subject: [PATCH 2721/4650] [2021-07-28T20:02:31+0000] e2e test


From 575bed63ae18a194cb53104269a787c24c065cee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 21:02:34 +0000
Subject: [PATCH 2722/4650] [2021-07-28T21:02:34+0000] e2e test


From d2ad0789d00c7fd4f48e1cd6fca6c95855cfc500 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 22:02:27 +0000
Subject: [PATCH 2723/4650] [2021-07-28T22:02:27+0000] e2e test


From 20eceaaaba35491abfcf9abe4b0cab07fccf3d30 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 28 Jul 2021 23:02:28 +0000
Subject: [PATCH 2724/4650] [2021-07-28T23:02:28+0000] e2e test


From 7f5a51bee136b09b86b69ce07b2c0701b410e931 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 00:03:52 +0000
Subject: [PATCH 2725/4650] [2021-07-29T00:03:52+0000] e2e test


From 7ad5f8f63580496649b774776454937a7982054b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 01:24:03 +0000
Subject: [PATCH 2726/4650] [2021-07-29T01:24:02+0000] e2e test


From 9b1190c9147c52015c25673a1e26e2eb10973f43 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 02:13:49 +0000
Subject: [PATCH 2727/4650] [2021-07-29T02:13:49+0000] e2e test


From f75ac5ab7babcc91e4aa07ee15eb2b55a5c80978 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 03:02:35 +0000
Subject: [PATCH 2728/4650] [2021-07-29T03:02:34+0000] e2e test


From 6360a25420980cb8b069a55ef06f93f88da38351 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 04:02:36 +0000
Subject: [PATCH 2729/4650] [2021-07-29T04:02:36+0000] e2e test


From f8fac1a0b730ec27279d710b8a14aa8e895b1fdd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 05:02:23 +0000
Subject: [PATCH 2730/4650] [2021-07-29T05:02:23+0000] e2e test


From f462697fc57f93b801c4564138ea39305e162a22 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 06:02:49 +0000
Subject: [PATCH 2731/4650] [2021-07-29T06:02:49+0000] e2e test


From 91cfcaed4d51ecb8bee0752af2742e854b45b36f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 07:02:28 +0000
Subject: [PATCH 2732/4650] [2021-07-29T07:02:28+0000] e2e test


From 5b163701461636ba90205727d400fdb9d0ae41eb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 08:03:17 +0000
Subject: [PATCH 2733/4650] [2021-07-29T08:03:17+0000] e2e test


From d0c34d2c91930dec8d471a3700d982e648bb2e19 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 09:02:36 +0000
Subject: [PATCH 2734/4650] [2021-07-29T09:02:36+0000] e2e test


From 16d728db2081e103f1782f43fc294cc9a854bc1a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 10:02:25 +0000
Subject: [PATCH 2735/4650] [2021-07-29T10:02:25+0000] e2e test


From 15532272f0cd121bc39a6b137fd7c52e618bb91e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 11:02:30 +0000
Subject: [PATCH 2736/4650] [2021-07-29T11:02:30+0000] e2e test


From 451418e041db90fe57247d0fd2790c9090fe1157 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 12:02:33 +0000
Subject: [PATCH 2737/4650] [2021-07-29T12:02:33+0000] e2e test


From af63c29154d33f215cdd1a5321bf8d92f9b4eb34 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 13:07:39 +0000
Subject: [PATCH 2738/4650] [2021-07-29T13:07:38+0000] e2e test


From f76182e995ed5f2f5aba47126f56e7601359da28 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 14:02:28 +0000
Subject: [PATCH 2739/4650] [2021-07-29T14:02:27+0000] e2e test


From 16791fbfe5593d42451220bb20b5727e48aa4298 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 15:02:26 +0000
Subject: [PATCH 2740/4650] [2021-07-29T15:02:26+0000] e2e test


From c4d5ec0b8afdbc0a43bb87c5f39e6307dfa7692c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 16:02:35 +0000
Subject: [PATCH 2741/4650] [2021-07-29T16:02:35+0000] e2e test


From 76182b8ac6ab34d5e8677e3c799ad58db5debc5b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 17:07:38 +0000
Subject: [PATCH 2742/4650] [2021-07-29T17:07:38+0000] e2e test


From ef8ec80f12922176de7b3aab4551e385dd9a2701 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 18:02:37 +0000
Subject: [PATCH 2743/4650] [2021-07-29T18:02:37+0000] e2e test


From b8ac6cda19b49411a303082fcc58b0c4a6020e43 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 19:02:19 +0000
Subject: [PATCH 2744/4650] [2021-07-29T19:02:18+0000] e2e test


From d3574a14ca59bedaf59e2d555de9d47d120c7520 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 20:02:40 +0000
Subject: [PATCH 2745/4650] [2021-07-29T20:02:40+0000] e2e test


From bb8e3bc842b41ca34126d486dcd89a79a9845de2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 21:02:31 +0000
Subject: [PATCH 2746/4650] [2021-07-29T21:02:31+0000] e2e test


From bdf9dbd142989ff519c4502fb44bc280568c65b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 22:02:22 +0000
Subject: [PATCH 2747/4650] [2021-07-29T22:02:22+0000] e2e test


From d26bd4ed6294325e992aacc71d36947ec622fa47 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 29 Jul 2021 23:02:49 +0000
Subject: [PATCH 2748/4650] [2021-07-29T23:02:49+0000] e2e test


From d680f71aa369464c5bedc7b6180473f8ca80be8a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 00:03:54 +0000
Subject: [PATCH 2749/4650] [2021-07-30T00:03:54+0000] e2e test


From 39137e6301fbc0603d14fbf4dbee2c61113618b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 01:25:04 +0000
Subject: [PATCH 2750/4650] [2021-07-30T01:25:04+0000] e2e test


From 9fcd22ca054cbdd4a30c3c68207d0bf5aa82dff2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 02:16:40 +0000
Subject: [PATCH 2751/4650] [2021-07-30T02:16:40+0000] e2e test


From 839597a5d3f50876213de591493418443f4cb4a8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 03:02:27 +0000
Subject: [PATCH 2752/4650] [2021-07-30T03:02:27+0000] e2e test


From 5daeaf53e4605e42194a309e1b9ab6f671e05cca Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 04:02:34 +0000
Subject: [PATCH 2753/4650] [2021-07-30T04:02:34+0000] e2e test


From 9577ee57a473cc4ae7d3cc50b6b03fbe096a3c7c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 05:02:22 +0000
Subject: [PATCH 2754/4650] [2021-07-30T05:02:22+0000] e2e test


From 06973d43048ae89acc9f1f786e6818886a315801 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 06:02:52 +0000
Subject: [PATCH 2755/4650] [2021-07-30T06:02:52+0000] e2e test


From e0ba68ffff2961fe0e411911e934c1cf7ada41aa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 07:02:18 +0000
Subject: [PATCH 2756/4650] [2021-07-30T07:02:18+0000] e2e test


From 84397cbcee484b998710d0670736697e2ac66470 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 08:02:29 +0000
Subject: [PATCH 2757/4650] [2021-07-30T08:02:28+0000] e2e test


From 10d9668cc15cf9aac827f7b2664cfbfe6ee61401 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 09:02:24 +0000
Subject: [PATCH 2758/4650] [2021-07-30T09:02:24+0000] e2e test


From b9e03b6d474efb5ab96759d3d6c32a2365a777fc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 10:02:30 +0000
Subject: [PATCH 2759/4650] [2021-07-30T10:02:30+0000] e2e test


From e11c4393b325791e06950a92e5fdabafcb3bd6df Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 11:02:26 +0000
Subject: [PATCH 2760/4650] [2021-07-30T11:02:26+0000] e2e test


From c563c2f9df7e83305be3bde1deb5fa950f071a57 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 12:02:38 +0000
Subject: [PATCH 2761/4650] [2021-07-30T12:02:38+0000] e2e test


From ad967e3832faa33af162f211ae1bb978a8387b4d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 13:07:16 +0000
Subject: [PATCH 2762/4650] [2021-07-30T13:07:16+0000] e2e test


From 72e54d9cda10a8de76c5b3e0a1c649aedd075c91 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 14:02:49 +0000
Subject: [PATCH 2763/4650] [2021-07-30T14:02:49+0000] e2e test


From 1ee7da84fdfe09388851dd5c941c92ddf229e233 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 15:02:35 +0000
Subject: [PATCH 2764/4650] [2021-07-30T15:02:35+0000] e2e test


From 90d56dd17b8bcb9b402c694895d72b040f232b30 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 16:02:37 +0000
Subject: [PATCH 2765/4650] [2021-07-30T16:02:37+0000] e2e test


From 4ae025e5cbf62f0bad024acf1931b1bb1d88f18f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 17:06:55 +0000
Subject: [PATCH 2766/4650] [2021-07-30T17:06:55+0000] e2e test


From 15a78346083534469335d26cbdc3bcb5cc1ae51b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 18:02:37 +0000
Subject: [PATCH 2767/4650] [2021-07-30T18:02:37+0000] e2e test


From 2d32cb52eb71c1ba9cae51faab5364ab1cb46a2b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 19:02:19 +0000
Subject: [PATCH 2768/4650] [2021-07-30T19:02:19+0000] e2e test


From 59f520c99f0b2723f77521a70609a63145cc33fb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 20:02:47 +0000
Subject: [PATCH 2769/4650] [2021-07-30T20:02:47+0000] e2e test


From 7c61c40249411b1beef1f81a09ae522de3dbc9ae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 21:02:23 +0000
Subject: [PATCH 2770/4650] [2021-07-30T21:02:22+0000] e2e test


From ff33480c24cf76a0b858ed5f530cd86e54629566 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 22:02:39 +0000
Subject: [PATCH 2771/4650] [2021-07-30T22:02:39+0000] e2e test


From 6d63dcf00a39d7d5b02e073294fb7eb9c5d58366 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 30 Jul 2021 23:02:27 +0000
Subject: [PATCH 2772/4650] [2021-07-30T23:02:27+0000] e2e test


From e868ae1a70dbac312c5be980c459e5e380523225 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 00:03:54 +0000
Subject: [PATCH 2773/4650] [2021-07-31T00:03:53+0000] e2e test


From 95d442f1dd53b288f4bc953f7572c991beb4ebae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 01:23:35 +0000
Subject: [PATCH 2774/4650] [2021-07-31T01:23:35+0000] e2e test


From bd0697ae398242a27b2577a6dce6bf539290babe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 02:13:41 +0000
Subject: [PATCH 2775/4650] [2021-07-31T02:13:41+0000] e2e test


From ee581511fcede06f58fc375f1961cdd2c2fee5d5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 03:02:42 +0000
Subject: [PATCH 2776/4650] [2021-07-31T03:02:42+0000] e2e test


From 87eec2b87786787ec0722e05139f251d31a8ab7e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 04:02:25 +0000
Subject: [PATCH 2777/4650] [2021-07-31T04:02:25+0000] e2e test


From e5f9ffc982b5513a25e43b783a7973e89764278e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 05:02:22 +0000
Subject: [PATCH 2778/4650] [2021-07-31T05:02:22+0000] e2e test


From ff37cf74f89ccb04a3f865936e9ddf412ac48370 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 06:02:33 +0000
Subject: [PATCH 2779/4650] [2021-07-31T06:02:33+0000] e2e test


From 5c589a302324b5307736f672f301db0c80d852ee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 07:02:24 +0000
Subject: [PATCH 2780/4650] [2021-07-31T07:02:24+0000] e2e test


From 8f4ca26cc8681ce7dcfede417f1695da61b3ac56 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 08:02:42 +0000
Subject: [PATCH 2781/4650] [2021-07-31T08:02:42+0000] e2e test


From d39b235ccd1e81ab3a0d1e52489b8e21adbc98e1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 09:02:20 +0000
Subject: [PATCH 2782/4650] [2021-07-31T09:02:19+0000] e2e test


From 0c7233918478b7cab5800c008ec0edc20e631be6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 10:02:30 +0000
Subject: [PATCH 2783/4650] [2021-07-31T10:02:30+0000] e2e test


From a765cf06afda731e73a7865d197f49d999d75767 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 11:02:16 +0000
Subject: [PATCH 2784/4650] [2021-07-31T11:02:16+0000] e2e test


From 7b803265a13b9ed2ad69e3e413d5660fbee2dcb2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 12:02:47 +0000
Subject: [PATCH 2785/4650] [2021-07-31T12:02:47+0000] e2e test


From 6b26ba83ef11844ca781be30edafb0f12b305124 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 13:06:06 +0000
Subject: [PATCH 2786/4650] [2021-07-31T13:06:06+0000] e2e test


From dc3e9d53461acbbc7870e346b7fd32faf4f53258 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 14:02:28 +0000
Subject: [PATCH 2787/4650] [2021-07-31T14:02:28+0000] e2e test


From 776a88d74be25d075b4fdf78294ccd98bb842a09 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 15:02:35 +0000
Subject: [PATCH 2788/4650] [2021-07-31T15:02:35+0000] e2e test


From b06d1b192ed4bf09047c0cf6106643e10c6cccb8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 16:02:37 +0000
Subject: [PATCH 2789/4650] [2021-07-31T16:02:37+0000] e2e test


From 5e8431e4a73e219a6a2784693e27495b9d32edf9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 17:06:18 +0000
Subject: [PATCH 2790/4650] [2021-07-31T17:06:18+0000] e2e test


From a911aa87a909d88fed532464c3ff9928cf5a54f2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 18:02:35 +0000
Subject: [PATCH 2791/4650] [2021-07-31T18:02:35+0000] e2e test


From 7d40e207d1b659aafa949efe42f4f0b2f133aff4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 19:02:22 +0000
Subject: [PATCH 2792/4650] [2021-07-31T19:02:22+0000] e2e test


From 11085c375ef8c40713566f5686d9f25cf79dd114 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 20:02:51 +0000
Subject: [PATCH 2793/4650] [2021-07-31T20:02:51+0000] e2e test


From ea876a4893b00de42734552fd96c77edb6aebbe4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 21:02:38 +0000
Subject: [PATCH 2794/4650] [2021-07-31T21:02:38+0000] e2e test


From a95f4d6b28cb92b74619aba4ba5938139979b27a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 22:02:22 +0000
Subject: [PATCH 2795/4650] [2021-07-31T22:02:22+0000] e2e test


From 4507002151815f14979b1ab2ba37e097bd3de422 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 31 Jul 2021 23:02:28 +0000
Subject: [PATCH 2796/4650] [2021-07-31T23:02:28+0000] e2e test


From d6b62f1463314271e9c90008f409fb14ee1bff42 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 00:04:21 +0000
Subject: [PATCH 2797/4650] [2021-08-01T00:04:21+0000] e2e test


From 3aad79d1a8703bf86d2e28e0f6f316d8dd1e15f2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 01:25:51 +0000
Subject: [PATCH 2798/4650] [2021-08-01T01:25:51+0000] e2e test


From 1509c79d8626eed4c43adf8e26f5048e2d026f47 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 02:16:07 +0000
Subject: [PATCH 2799/4650] [2021-08-01T02:16:07+0000] e2e test


From a1895b20aca41dcd8afe7669f914abe2088a2873 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 03:02:27 +0000
Subject: [PATCH 2800/4650] [2021-08-01T03:02:27+0000] e2e test


From d657b472d862c77636c96cf0b9e95f4c2948eb10 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 04:02:27 +0000
Subject: [PATCH 2801/4650] [2021-08-01T04:02:27+0000] e2e test


From 3236293dbef3df3dfac5779843f8998351014246 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 05:02:18 +0000
Subject: [PATCH 2802/4650] [2021-08-01T05:02:18+0000] e2e test


From 78750c0d7442f998319bcb6c4f825977151776ad Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 06:02:33 +0000
Subject: [PATCH 2803/4650] [2021-08-01T06:02:33+0000] e2e test


From 02bd754f4970ce07027c07d1aeafaf3fa36ccdea Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 07:02:23 +0000
Subject: [PATCH 2804/4650] [2021-08-01T07:02:23+0000] e2e test


From b39e377fc976e59d27f2556e7dbd9bb6a2149c7f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 08:02:35 +0000
Subject: [PATCH 2805/4650] [2021-08-01T08:02:35+0000] e2e test


From 5afeb7c8e041bc46448c00bdb2e0254ea1e0c8ab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 09:02:38 +0000
Subject: [PATCH 2806/4650] [2021-08-01T09:02:38+0000] e2e test


From e720ef400d0dc777c84f52cfe0cbffb0a2927f72 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 10:02:42 +0000
Subject: [PATCH 2807/4650] [2021-08-01T10:02:42+0000] e2e test


From e1808e88a06d6d132176b786cbc171f6df16baad Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 11:02:52 +0000
Subject: [PATCH 2808/4650] [2021-08-01T11:02:51+0000] e2e test


From 0b9d41eeeb99384f456e9725c1cf9e7d5642192f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 12:03:17 +0000
Subject: [PATCH 2809/4650] [2021-08-01T12:03:17+0000] e2e test


From 91f0ca16ee61f83e671bafd15fa244cdd00fb1f4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 13:05:50 +0000
Subject: [PATCH 2810/4650] [2021-08-01T13:05:50+0000] e2e test


From a7422edf9e1907e584d32b33f17149eb134319a7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 14:02:23 +0000
Subject: [PATCH 2811/4650] [2021-08-01T14:02:23+0000] e2e test


From 8ccbdf3c22f0ce46e58fa85c2c9a360000cd196b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 15:02:30 +0000
Subject: [PATCH 2812/4650] [2021-08-01T15:02:30+0000] e2e test


From 5064dc397369bfdf47e86e03305060799bc06b3a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 16:02:42 +0000
Subject: [PATCH 2813/4650] [2021-08-01T16:02:41+0000] e2e test


From 36022455f39402ec5cd61df363bbc25cc503287f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 17:06:50 +0000
Subject: [PATCH 2814/4650] [2021-08-01T17:06:49+0000] e2e test


From 742a2fe5c9273bd6a8072570a5ee4de3e56b7946 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 18:02:53 +0000
Subject: [PATCH 2815/4650] [2021-08-01T18:02:53+0000] e2e test


From ef59c8c5d974e947cfa9a53e4d88a76b9e136487 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 19:02:14 +0000
Subject: [PATCH 2816/4650] [2021-08-01T19:02:14+0000] e2e test


From 51cbf6bbe7278459a1cd0aef3e5a31b79544baa2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 20:02:54 +0000
Subject: [PATCH 2817/4650] [2021-08-01T20:02:54+0000] e2e test


From 4b14c53218a8513d4d71ac3d7a2752ea4f1f13e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 21:02:28 +0000
Subject: [PATCH 2818/4650] [2021-08-01T21:02:28+0000] e2e test


From 3e68b50159c18d472b8876751b30025caedb539d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 22:02:23 +0000
Subject: [PATCH 2819/4650] [2021-08-01T22:02:23+0000] e2e test


From a40f1c4ccc22ee46c7640216dcfa8fc287bbc67e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 1 Aug 2021 23:02:42 +0000
Subject: [PATCH 2820/4650] [2021-08-01T23:02:42+0000] e2e test


From aac1d7ed933acac51b34be3f82fa1de8686486a8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 00:04:02 +0000
Subject: [PATCH 2821/4650] [2021-08-02T00:04:01+0000] e2e test


From 99b154ae3f029d473d703cdaeef122df7291efa3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 01:24:17 +0000
Subject: [PATCH 2822/4650] [2021-08-02T01:24:17+0000] e2e test


From 4e96907b16a91ea89ea8f84a2f8ebe7da9f563ef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 02:13:01 +0000
Subject: [PATCH 2823/4650] [2021-08-02T02:13:01+0000] e2e test


From 574e78c4f1fb88f4c61d0e819b90d70585ac64ca Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 03:02:29 +0000
Subject: [PATCH 2824/4650] [2021-08-02T03:02:29+0000] e2e test


From 948a2becdb9f490fdd3a6e4ba01ee05142015999 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 04:02:40 +0000
Subject: [PATCH 2825/4650] [2021-08-02T04:02:40+0000] e2e test


From f56f02717284c60875447397b5aff3eeabd1dfd5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 05:02:27 +0000
Subject: [PATCH 2826/4650] [2021-08-02T05:02:27+0000] e2e test


From fdb7468ee33c9ee68e161fc020cb99156f3cc4dc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 06:02:42 +0000
Subject: [PATCH 2827/4650] [2021-08-02T06:02:42+0000] e2e test


From 9a49618bf5d4e39c61b82a2f4c8f0c94862002fe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 07:02:28 +0000
Subject: [PATCH 2828/4650] [2021-08-02T07:02:28+0000] e2e test


From 9dfaeb844d757bf6803105a0802848e0ef2d23ce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 08:02:49 +0000
Subject: [PATCH 2829/4650] [2021-08-02T08:02:49+0000] e2e test


From 6cb1a4d538ae356eeae98f44e5e9bcbf11c3dacd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 09:02:25 +0000
Subject: [PATCH 2830/4650] [2021-08-02T09:02:25+0000] e2e test


From 560e5035da188e317e2475270589cea08fb09210 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 10:02:52 +0000
Subject: [PATCH 2831/4650] [2021-08-02T10:02:52+0000] e2e test


From 80591ef4ef9cb7e3b0c57a11e50d68e233157cfc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 11:02:28 +0000
Subject: [PATCH 2832/4650] [2021-08-02T11:02:28+0000] e2e test


From a79af91aa6e583a72d4ccfa551bdda2237372e5c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 12:03:00 +0000
Subject: [PATCH 2833/4650] [2021-08-02T12:03:00+0000] e2e test


From 4ea8afa0a794180294756c5308c159c781e5cb52 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 13:07:14 +0000
Subject: [PATCH 2834/4650] [2021-08-02T13:07:14+0000] e2e test


From c62a3408a941884812bd1e55df862ce158cbd3f2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 14:02:23 +0000
Subject: [PATCH 2835/4650] [2021-08-02T14:02:23+0000] e2e test


From fa93269905535ae304930f7817da6953e5341efc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 15:02:21 +0000
Subject: [PATCH 2836/4650] [2021-08-02T15:02:21+0000] e2e test


From 2e5f5092bedff5d2335d0b709892e22f214940e9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 16:02:31 +0000
Subject: [PATCH 2837/4650] [2021-08-02T16:02:31+0000] e2e test


From be01917390de861bf8a64a7829e6e6a2c799c3ac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 17:07:16 +0000
Subject: [PATCH 2838/4650] [2021-08-02T17:07:15+0000] e2e test


From fbffe168da040e3e4a850c2fb936ca2a18464f16 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 18:02:39 +0000
Subject: [PATCH 2839/4650] [2021-08-02T18:02:39+0000] e2e test


From 32baafc233c8af071cb37d9f93525560a48149dd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 19:02:24 +0000
Subject: [PATCH 2840/4650] [2021-08-02T19:02:24+0000] e2e test


From 654c443bb0680b3ca10484b1173e6b9e464a1a60 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 20:02:29 +0000
Subject: [PATCH 2841/4650] [2021-08-02T20:02:28+0000] e2e test


From 85ce37e147e99c8f396d5c10855d737a8dfdcd62 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 21:02:23 +0000
Subject: [PATCH 2842/4650] [2021-08-02T21:02:23+0000] e2e test


From 1c3f62266edee17d11b3b38c2f01f49821b285c4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 22:02:36 +0000
Subject: [PATCH 2843/4650] [2021-08-02T22:02:36+0000] e2e test


From 25d43354ca8525331f736ba48c82e3c9c39383c1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 2 Aug 2021 23:02:45 +0000
Subject: [PATCH 2844/4650] [2021-08-02T23:02:45+0000] e2e test


From 7ac7f98e2db2fb1b0ec26d1a05d627a3e2cb9684 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 00:03:53 +0000
Subject: [PATCH 2845/4650] [2021-08-03T00:03:53+0000] e2e test


From b6ae421680b716fbcdb03edfaca0694481dc5cff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 01:24:59 +0000
Subject: [PATCH 2846/4650] [2021-08-03T01:24:59+0000] e2e test


From 2860f779e11038f14464c2a827cca16cbfe9dc2c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 02:16:58 +0000
Subject: [PATCH 2847/4650] [2021-08-03T02:16:58+0000] e2e test


From b77a38647bd866f4d8fee6d3e7ad6cea2bad5836 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 03:02:39 +0000
Subject: [PATCH 2848/4650] [2021-08-03T03:02:38+0000] e2e test


From 7210ca7d175993097cef4a0af19c95b48b7e716f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 04:02:46 +0000
Subject: [PATCH 2849/4650] [2021-08-03T04:02:46+0000] e2e test


From 5bea8018160d417e25e41b7505bae954bdb22f69 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 05:02:16 +0000
Subject: [PATCH 2850/4650] [2021-08-03T05:02:16+0000] e2e test


From eded7dfe595c5d0b3f88fed45424c0c77553dc16 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 06:02:40 +0000
Subject: [PATCH 2851/4650] [2021-08-03T06:02:40+0000] e2e test


From 80851d65aaeeb1c99ad95fc1f0c3d700204e4513 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 07:02:26 +0000
Subject: [PATCH 2852/4650] [2021-08-03T07:02:26+0000] e2e test


From 8c537098b33b0c7b1d9a7b6dfda5477c081833df Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 08:02:30 +0000
Subject: [PATCH 2853/4650] [2021-08-03T08:02:30+0000] e2e test


From 547ab0641bbd77e733c00754a8bb03e27a2bb733 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 09:02:30 +0000
Subject: [PATCH 2854/4650] [2021-08-03T09:02:30+0000] e2e test


From a668e31b97657fcb8bc1a75da5ba63fdecf2be45 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 10:02:47 +0000
Subject: [PATCH 2855/4650] [2021-08-03T10:02:47+0000] e2e test


From 3f15623c9db132d60b703403863518a66aa72b5f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 11:02:23 +0000
Subject: [PATCH 2856/4650] [2021-08-03T11:02:22+0000] e2e test


From cc30e4ced5744ffb814d357330e72ee1d0ab71dd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 12:03:05 +0000
Subject: [PATCH 2857/4650] [2021-08-03T12:03:04+0000] e2e test


From 1839db2b2cd0d7fb3bf133084f15c3d20ff3bf05 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 13:07:53 +0000
Subject: [PATCH 2858/4650] [2021-08-03T13:07:53+0000] e2e test


From 0d89a9badb3012b23856ac339eef269930083060 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 14:02:30 +0000
Subject: [PATCH 2859/4650] [2021-08-03T14:02:30+0000] e2e test


From f77a7555155c2ce806c7f2f47c9f7c4a660cb4b1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 15:02:31 +0000
Subject: [PATCH 2860/4650] [2021-08-03T15:02:30+0000] e2e test


From 7c497d8ec412e00703567f37d7b5e4d45809bd31 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 16:02:29 +0000
Subject: [PATCH 2861/4650] [2021-08-03T16:02:28+0000] e2e test


From a92920880e117317ff0227d0cfff829aaefeae05 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 17:11:54 +0000
Subject: [PATCH 2862/4650] [2021-08-03T17:11:54+0000] e2e test


From 2c0f18e289261edcabd1b548dd53deb5b510e040 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 18:02:27 +0000
Subject: [PATCH 2863/4650] [2021-08-03T18:02:27+0000] e2e test


From 5e397714341c552bd2a93ad56b92bb61c7ada772 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 19:03:57 +0000
Subject: [PATCH 2864/4650] [2021-08-03T19:03:57+0000] e2e test


From b1e33b8b67c461ff315bd405d597859f990d25f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 20:02:33 +0000
Subject: [PATCH 2865/4650] [2021-08-03T20:02:33+0000] e2e test


From 3d2c16db868fd82991404d9d1cf9875890da34ff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 21:02:26 +0000
Subject: [PATCH 2866/4650] [2021-08-03T21:02:26+0000] e2e test


From cf1fe3d709183d7b24ccf0c4d117e421bddd6ba3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 22:02:22 +0000
Subject: [PATCH 2867/4650] [2021-08-03T22:02:22+0000] e2e test


From 5d24b27fbdbc792daafdd0ab000b231f32b95da3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 3 Aug 2021 23:02:34 +0000
Subject: [PATCH 2868/4650] [2021-08-03T23:02:34+0000] e2e test


From c839aee55ffc884da69d5ce7aaf66b8564dccf00 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 00:05:23 +0000
Subject: [PATCH 2869/4650] [2021-08-04T00:05:23+0000] e2e test


From eb52a00ff11d3a2b820ff371480e9761db33ad57 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 01:24:02 +0000
Subject: [PATCH 2870/4650] [2021-08-04T01:24:01+0000] e2e test


From c31501f59cf23cbbc7cbfa330777e85bdbfd95b3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 02:13:42 +0000
Subject: [PATCH 2871/4650] [2021-08-04T02:13:42+0000] e2e test


From 21eee2943603111eb1b7e972808f1faf846adea7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 03:02:25 +0000
Subject: [PATCH 2872/4650] [2021-08-04T03:02:25+0000] e2e test


From 8c469d26cab4ea9dfb27c680540bb14643acc424 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 04:02:34 +0000
Subject: [PATCH 2873/4650] [2021-08-04T04:02:34+0000] e2e test


From ad988bc0adb399f0ff640285bb300cff65c7fac3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 05:02:19 +0000
Subject: [PATCH 2874/4650] [2021-08-04T05:02:19+0000] e2e test


From 1c1d8903c6c2dd16d5698abc961e6e78a57d98d8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 06:02:31 +0000
Subject: [PATCH 2875/4650] [2021-08-04T06:02:31+0000] e2e test


From 3b211003bfa5aac12889854945330e7afe2874ae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 07:02:27 +0000
Subject: [PATCH 2876/4650] [2021-08-04T07:02:27+0000] e2e test


From edd582547cc24b8af6084ee10746d78829b856a4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 08:03:00 +0000
Subject: [PATCH 2877/4650] [2021-08-04T08:03:00+0000] e2e test


From cdec574a58ee3d0a197463c42eb88186e6f4ddc4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 09:02:37 +0000
Subject: [PATCH 2878/4650] [2021-08-04T09:02:36+0000] e2e test


From eefe1b8a75733f8b40d898f5f5a8e437a3e0a004 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 10:02:28 +0000
Subject: [PATCH 2879/4650] [2021-08-04T10:02:28+0000] e2e test


From 9739429a08a38a7d23556332c9df7072bd56386c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 11:02:22 +0000
Subject: [PATCH 2880/4650] [2021-08-04T11:02:22+0000] e2e test


From 8b2ca2954bcfd24c925884fe8981e6d232ec71c4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 12:02:47 +0000
Subject: [PATCH 2881/4650] [2021-08-04T12:02:47+0000] e2e test


From 9f0e6a3965c570277ef75ea598e84e2365272996 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 13:07:41 +0000
Subject: [PATCH 2882/4650] [2021-08-04T13:07:41+0000] e2e test


From 4fe4b7a7a712e187eed557ba3aac8a012f5cbe55 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 14:02:34 +0000
Subject: [PATCH 2883/4650] [2021-08-04T14:02:33+0000] e2e test


From bebecbd1e40e98a0c519182826c010d26e3de60a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 15:02:55 +0000
Subject: [PATCH 2884/4650] [2021-08-04T15:02:55+0000] e2e test


From ddb5d2e33489f4f0d6f2be0f3bc2a274f98f41ff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 16:02:47 +0000
Subject: [PATCH 2885/4650] [2021-08-04T16:02:47+0000] e2e test


From 46e44fcb3ea90e3449519565caedcd41a1a4952f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 17:09:35 +0000
Subject: [PATCH 2886/4650] [2021-08-04T17:09:35+0000] e2e test


From 654b0ce7c6598c23876f673a7de2c0a1281d4656 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 18:02:26 +0000
Subject: [PATCH 2887/4650] [2021-08-04T18:02:26+0000] e2e test


From f81a517e7bebd87de2c1efd2a054f6cb222054c9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 19:05:22 +0000
Subject: [PATCH 2888/4650] [2021-08-04T19:05:22+0000] e2e test


From b27190513393579c8c06b121b4f4ebb83b58967b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 20:02:42 +0000
Subject: [PATCH 2889/4650] [2021-08-04T20:02:42+0000] e2e test


From c9d629f59e2f1b3a7ee4ca26574b3a942d97af1b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 21:02:19 +0000
Subject: [PATCH 2890/4650] [2021-08-04T21:02:19+0000] e2e test


From 1af427d2c726978fa076a79b51b1950c659aef97 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 22:02:42 +0000
Subject: [PATCH 2891/4650] [2021-08-04T22:02:42+0000] e2e test


From 1c8bd8580f22699706ccc81dff37776ae1b0ff41 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 4 Aug 2021 23:02:30 +0000
Subject: [PATCH 2892/4650] [2021-08-04T23:02:30+0000] e2e test


From 3a88111346b1557942d473d828b26b1e0e3a29c2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 00:04:11 +0000
Subject: [PATCH 2893/4650] [2021-08-05T00:04:11+0000] e2e test


From db8910992c58a41b06eadf88b8480b43e782f50d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 01:23:26 +0000
Subject: [PATCH 2894/4650] [2021-08-05T01:23:26+0000] e2e test


From 285fae8a30afadb21d1391fb1581f9fbe10c5323 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 02:11:12 +0000
Subject: [PATCH 2895/4650] [2021-08-05T02:11:12+0000] e2e test


From 88f821cacaa1fc71a8120f287beb360b25fd2317 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 03:02:32 +0000
Subject: [PATCH 2896/4650] [2021-08-05T03:02:32+0000] e2e test


From fcad4790a81f04c67daeee03825eb18157cb19d4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 04:02:39 +0000
Subject: [PATCH 2897/4650] [2021-08-05T04:02:39+0000] e2e test


From 979e32ca7c702b0a1a226eb53ab3aad0318fe9cb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 05:02:20 +0000
Subject: [PATCH 2898/4650] [2021-08-05T05:02:20+0000] e2e test


From dd70dfbbd37557d7c5bd1189496f82fd1d833c68 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 06:02:47 +0000
Subject: [PATCH 2899/4650] [2021-08-05T06:02:47+0000] e2e test


From a2ce71deec507324d5e41355807b6b6700f30696 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 07:02:23 +0000
Subject: [PATCH 2900/4650] [2021-08-05T07:02:23+0000] e2e test


From d17d3dbdf7abceb83521c1493fde1302d1d3dc4f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 08:02:56 +0000
Subject: [PATCH 2901/4650] [2021-08-05T08:02:56+0000] e2e test


From 187a7fbb051afcc9becd2c86269059dbf19e04ac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 09:02:21 +0000
Subject: [PATCH 2902/4650] [2021-08-05T09:02:21+0000] e2e test


From c431e5ab1d7717df23662547e4fa3ad7731eed33 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 10:02:37 +0000
Subject: [PATCH 2903/4650] [2021-08-05T10:02:37+0000] e2e test


From 0a0c184c82a81d511afce7e0c7238d8c66720f70 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 11:02:38 +0000
Subject: [PATCH 2904/4650] [2021-08-05T11:02:37+0000] e2e test


From 0232c424bdc6363e46e99043672598cc0f499abd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 12:02:49 +0000
Subject: [PATCH 2905/4650] [2021-08-05T12:02:48+0000] e2e test


From f324d4a7ce742f83a51e2651694298f0f9dd18d2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 13:08:20 +0000
Subject: [PATCH 2906/4650] [2021-08-05T13:08:20+0000] e2e test


From b59ecb75e60bb1edde454bd232aa3ec071a71d43 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 14:02:43 +0000
Subject: [PATCH 2907/4650] [2021-08-05T14:02:43+0000] e2e test


From 8b30225d3c114fa065401cd6608391b806f56570 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 15:02:39 +0000
Subject: [PATCH 2908/4650] [2021-08-05T15:02:39+0000] e2e test


From fd295927b8b394c77c5f0a3d2155bb5f520ae861 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 16:02:39 +0000
Subject: [PATCH 2909/4650] [2021-08-05T16:02:39+0000] e2e test


From a657fb4203376e31943742f6633ea40ac5b772b2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 17:07:39 +0000
Subject: [PATCH 2910/4650] [2021-08-05T17:07:39+0000] e2e test


From a83a097002e3c52eadc05c9865b4d4b041ced66b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 18:02:31 +0000
Subject: [PATCH 2911/4650] [2021-08-05T18:02:31+0000] e2e test


From c47791929e952cff7ebeb51306fd00b131ef9b29 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 19:02:38 +0000
Subject: [PATCH 2912/4650] [2021-08-05T19:02:38+0000] e2e test


From cc34e0ff47d4c92694235426ebe059bd4f9c5137 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 20:02:31 +0000
Subject: [PATCH 2913/4650] [2021-08-05T20:02:31+0000] e2e test


From baf5e91a159182e0cbbb4985ab3f7df4d7a1f235 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 21:02:24 +0000
Subject: [PATCH 2914/4650] [2021-08-05T21:02:24+0000] e2e test


From e39d875a5926beee1f515dee80f34a939c263fae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 22:02:25 +0000
Subject: [PATCH 2915/4650] [2021-08-05T22:02:25+0000] e2e test


From 6c072d744048b2302efa97a2374a092ef7e186fc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 5 Aug 2021 23:02:39 +0000
Subject: [PATCH 2916/4650] [2021-08-05T23:02:39+0000] e2e test


From 5bbce0e11e12e5718f3500b1ad86a6458b4e4b8f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 00:04:20 +0000
Subject: [PATCH 2917/4650] [2021-08-06T00:04:19+0000] e2e test


From 213ec1391de7d450ba16e68ceb5e5d92aeea27e5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 01:24:06 +0000
Subject: [PATCH 2918/4650] [2021-08-06T01:24:06+0000] e2e test


From 525f63af23d6ee11dfcabb85539492d912469a36 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 02:12:19 +0000
Subject: [PATCH 2919/4650] [2021-08-06T02:12:19+0000] e2e test


From 156e94d0bf0b6929a2edca1791e9ce923693e524 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 03:02:26 +0000
Subject: [PATCH 2920/4650] [2021-08-06T03:02:26+0000] e2e test


From 058f1eaf0411dbda3e941d32d5e9166a0a6d720a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 04:02:43 +0000
Subject: [PATCH 2921/4650] [2021-08-06T04:02:43+0000] e2e test


From 9c6accef417c2a5d9899cc5ab7103fadf1ef7be1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 05:02:26 +0000
Subject: [PATCH 2922/4650] [2021-08-06T05:02:26+0000] e2e test


From af9cd29313e19f9d2fe238b4ca56b6a3fce028d1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 06:02:34 +0000
Subject: [PATCH 2923/4650] [2021-08-06T06:02:34+0000] e2e test


From 645bf2c3227115bc9c8955c4531ca1c589e78f9d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 07:02:22 +0000
Subject: [PATCH 2924/4650] [2021-08-06T07:02:22+0000] e2e test


From f6a6ec2d8cca39cc8e97695ee98e33283a0c57bb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 08:02:54 +0000
Subject: [PATCH 2925/4650] [2021-08-06T08:02:54+0000] e2e test


From 2270116e7b3cd12a594726d78ac8338684d381a4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 09:02:36 +0000
Subject: [PATCH 2926/4650] [2021-08-06T09:02:36+0000] e2e test


From f21a8c2ecf2f4217820ec0262b5877d71b614197 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 10:02:31 +0000
Subject: [PATCH 2927/4650] [2021-08-06T10:02:31+0000] e2e test


From afa027007102d13f1d28e39495a0b8c2316dcec6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 11:02:39 +0000
Subject: [PATCH 2928/4650] [2021-08-06T11:02:39+0000] e2e test


From 596a03c4e61a15b533f326758b78ebf3b34d9d54 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 12:02:45 +0000
Subject: [PATCH 2929/4650] [2021-08-06T12:02:44+0000] e2e test


From 531c6d5e634454c30348741f6487fe19a8f659ee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 13:09:13 +0000
Subject: [PATCH 2930/4650] [2021-08-06T13:09:13+0000] e2e test


From e3c82c70e4981963f08b9e3c61b2bce3e5c82d63 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 14:02:47 +0000
Subject: [PATCH 2931/4650] [2021-08-06T14:02:47+0000] e2e test


From 45eaea541f87ae938b6b24121cad584c1df70788 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 15:02:32 +0000
Subject: [PATCH 2932/4650] [2021-08-06T15:02:32+0000] e2e test


From 481cbed63bcda0cb8664cf471811b3236efcd5d2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 16:02:46 +0000
Subject: [PATCH 2933/4650] [2021-08-06T16:02:46+0000] e2e test


From 775c446f3cfe36de7528c586fdc46d63a507f660 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 17:07:16 +0000
Subject: [PATCH 2934/4650] [2021-08-06T17:07:16+0000] e2e test


From 72bd9ba1be775af515b201be7b633ebfa3ce1781 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 18:02:30 +0000
Subject: [PATCH 2935/4650] [2021-08-06T18:02:30+0000] e2e test


From c4ad10b53adbff198c47bebf5a865fb2ef068596 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 19:02:22 +0000
Subject: [PATCH 2936/4650] [2021-08-06T19:02:22+0000] e2e test


From aa740bd661912b4405a83b7b34c17a9b18f5b5c8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 20:02:48 +0000
Subject: [PATCH 2937/4650] [2021-08-06T20:02:48+0000] e2e test


From ccc4806a057825ec62c9d3d3f75afdcd0451808a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 21:02:50 +0000
Subject: [PATCH 2938/4650] [2021-08-06T21:02:50+0000] e2e test


From 5cc6641737418366ca500bdc837ffeff2eb7d923 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 22:02:48 +0000
Subject: [PATCH 2939/4650] [2021-08-06T22:02:48+0000] e2e test


From 96671ed397b8243160c732e367328df62530e4cc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 6 Aug 2021 23:02:45 +0000
Subject: [PATCH 2940/4650] [2021-08-06T23:02:45+0000] e2e test


From 09e838ef78b6bf3976336193952da611ca98ae15 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 00:04:02 +0000
Subject: [PATCH 2941/4650] [2021-08-07T00:04:02+0000] e2e test


From 9c53af9a1900f883d301d6257cac6cd9ddcb0713 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 01:21:40 +0000
Subject: [PATCH 2942/4650] [2021-08-07T01:21:40+0000] e2e test


From 25dfac8481be6ff8836355381ef53c3fd90b0200 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 02:13:08 +0000
Subject: [PATCH 2943/4650] [2021-08-07T02:13:08+0000] e2e test


From f87530a59eee6a1eb93fd26bdde1061e6ebd3511 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 03:02:26 +0000
Subject: [PATCH 2944/4650] [2021-08-07T03:02:26+0000] e2e test


From cbb85edbf7b96d6a2ffdcce60228eb6d8a3e2b27 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 04:02:38 +0000
Subject: [PATCH 2945/4650] [2021-08-07T04:02:38+0000] e2e test


From c9fe339db0553f15d50faf851350717335af41bf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 05:02:21 +0000
Subject: [PATCH 2946/4650] [2021-08-07T05:02:21+0000] e2e test


From 54dc8373c6f0aa0cedc67995192401d5de3e62fb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 06:02:39 +0000
Subject: [PATCH 2947/4650] [2021-08-07T06:02:39+0000] e2e test


From 9959478e64ea795791cb69993b5b080437b776c4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 07:02:27 +0000
Subject: [PATCH 2948/4650] [2021-08-07T07:02:27+0000] e2e test


From 20529d3f09ade04de186fbdd939ea831b953f9a9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 08:02:39 +0000
Subject: [PATCH 2949/4650] [2021-08-07T08:02:38+0000] e2e test


From f0d355c99bfd8e9f9e772a79124bd50667f6b57b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 09:02:26 +0000
Subject: [PATCH 2950/4650] [2021-08-07T09:02:26+0000] e2e test


From 41c609f670ad12024e1b9fa9d3aafb900b83fc28 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 10:02:42 +0000
Subject: [PATCH 2951/4650] [2021-08-07T10:02:42+0000] e2e test


From 5eccd342c3c0bc8b84d45262f467da5df6b3eec8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 11:02:17 +0000
Subject: [PATCH 2952/4650] [2021-08-07T11:02:17+0000] e2e test


From 8593a87579083267c7e46d4c937e9bf9536722ee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 12:03:08 +0000
Subject: [PATCH 2953/4650] [2021-08-07T12:03:08+0000] e2e test


From 78362e6e85e07c7a181419a413b3b4a29931c02a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 13:06:08 +0000
Subject: [PATCH 2954/4650] [2021-08-07T13:06:08+0000] e2e test


From 47765350e2406604a8793d6cb68ed2f30e12ee47 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 14:02:35 +0000
Subject: [PATCH 2955/4650] [2021-08-07T14:02:35+0000] e2e test


From 678e775320d2305ce985e289f56e2c3816e3558c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 15:02:39 +0000
Subject: [PATCH 2956/4650] [2021-08-07T15:02:39+0000] e2e test


From 6be89dc34939a007fd04efd2275caea7c1dd9639 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 16:02:41 +0000
Subject: [PATCH 2957/4650] [2021-08-07T16:02:41+0000] e2e test


From 5277b3c5188b9b768f220b779f6c82a7c392721d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 17:06:13 +0000
Subject: [PATCH 2958/4650] [2021-08-07T17:06:13+0000] e2e test


From 5b955b7e74b8faf2157cd5247e948f98e5bbb0d4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 18:02:25 +0000
Subject: [PATCH 2959/4650] [2021-08-07T18:02:25+0000] e2e test


From c2a26c5522f581987c726968cea3b4e6d7faf512 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 19:02:16 +0000
Subject: [PATCH 2960/4650] [2021-08-07T19:02:16+0000] e2e test


From a0e9e92bde54210c199707a95ab09a8100f0f2e6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 20:02:44 +0000
Subject: [PATCH 2961/4650] [2021-08-07T20:02:44+0000] e2e test


From f871d18894e5d85b10c678f4772652afbfc1a9bb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 21:02:41 +0000
Subject: [PATCH 2962/4650] [2021-08-07T21:02:41+0000] e2e test


From 325e8425c8b4ad4b65bf81ec0501c839f6caa310 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 22:02:24 +0000
Subject: [PATCH 2963/4650] [2021-08-07T22:02:24+0000] e2e test


From fd28be9dc717f50c2c1d6b3527e5954b7c21d23b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 7 Aug 2021 23:02:48 +0000
Subject: [PATCH 2964/4650] [2021-08-07T23:02:48+0000] e2e test


From 3952505dc87f89d7108f230bba93e6aa47c27831 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 00:05:05 +0000
Subject: [PATCH 2965/4650] [2021-08-08T00:05:05+0000] e2e test


From 2dc18cd48755b3af81bb80285021683e5600c468 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 01:23:37 +0000
Subject: [PATCH 2966/4650] [2021-08-08T01:23:37+0000] e2e test


From e9e16d186aa7710977d566c541d51837a6634af1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 02:10:34 +0000
Subject: [PATCH 2967/4650] [2021-08-08T02:10:34+0000] e2e test


From e945b2ab146f406bb1c80bb17cba6a1a445ee82d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 03:02:30 +0000
Subject: [PATCH 2968/4650] [2021-08-08T03:02:30+0000] e2e test


From c96c07618711040205d517c4527d179aaf2bb5cf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 04:02:43 +0000
Subject: [PATCH 2969/4650] [2021-08-08T04:02:43+0000] e2e test


From ef42b6851e3f3697d0e9a6446f4faf78f6741784 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 05:02:22 +0000
Subject: [PATCH 2970/4650] [2021-08-08T05:02:22+0000] e2e test


From d8d300b1a8691e1f8403eb1b361d68dd991a7579 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 06:02:56 +0000
Subject: [PATCH 2971/4650] [2021-08-08T06:02:56+0000] e2e test


From f0cfebc6a0b108fc5681b8e0a137b382f3ab5971 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 07:02:24 +0000
Subject: [PATCH 2972/4650] [2021-08-08T07:02:23+0000] e2e test


From 2e507b92d61970b3033ef2a3cb20cb2d3024db44 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 08:02:44 +0000
Subject: [PATCH 2973/4650] [2021-08-08T08:02:44+0000] e2e test


From a4b4477bc09fe51fa56432a61050f534182be879 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 09:02:26 +0000
Subject: [PATCH 2974/4650] [2021-08-08T09:02:26+0000] e2e test


From 72fefd43dcf4d4cf15a44ecbd737d025b618f891 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 10:02:39 +0000
Subject: [PATCH 2975/4650] [2021-08-08T10:02:39+0000] e2e test


From aeedb00cb1b766d108994e31399e5dc0c2c176f2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 11:02:38 +0000
Subject: [PATCH 2976/4650] [2021-08-08T11:02:38+0000] e2e test


From 4995f07f0033c2a42db3e850c7c0f1b4c3d47cff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 12:02:39 +0000
Subject: [PATCH 2977/4650] [2021-08-08T12:02:39+0000] e2e test


From e75dbcb73e472edd0f730f5294a35f68748eba95 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 13:05:59 +0000
Subject: [PATCH 2978/4650] [2021-08-08T13:05:59+0000] e2e test


From d771846eb2d339e5157e777cf1f18088f9948496 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 14:02:26 +0000
Subject: [PATCH 2979/4650] [2021-08-08T14:02:26+0000] e2e test


From 27c14a760856d00a43ce0b68d0525d2167b35cd1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 15:02:26 +0000
Subject: [PATCH 2980/4650] [2021-08-08T15:02:26+0000] e2e test


From cc922420735d791f7c41b4ecc65e15a04502058b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 16:02:44 +0000
Subject: [PATCH 2981/4650] [2021-08-08T16:02:44+0000] e2e test


From 023db2c6dbf07301c03f93e8f2127dfd0003a096 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 17:06:02 +0000
Subject: [PATCH 2982/4650] [2021-08-08T17:06:02+0000] e2e test


From ae31ef226c5903691d55bb70a609abbb2012f403 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 18:02:28 +0000
Subject: [PATCH 2983/4650] [2021-08-08T18:02:28+0000] e2e test


From 7c5a55bb84657b1acfa8f764f9953bf87e7e4980 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 19:02:31 +0000
Subject: [PATCH 2984/4650] [2021-08-08T19:02:31+0000] e2e test


From efe9dc875f8451dee7ce3e22f65370d8a9d76ab8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 20:02:27 +0000
Subject: [PATCH 2985/4650] [2021-08-08T20:02:27+0000] e2e test


From 9d7cd943e3bb72edb8064a7c5233afb3487c9575 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 21:02:30 +0000
Subject: [PATCH 2986/4650] [2021-08-08T21:02:30+0000] e2e test


From 17b0dbe5aa717596fc818e840b02d80eb85970e6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 22:02:42 +0000
Subject: [PATCH 2987/4650] [2021-08-08T22:02:42+0000] e2e test


From 4dd91861838ab35e50a7b372785ba23b0ae828e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 8 Aug 2021 23:02:36 +0000
Subject: [PATCH 2988/4650] [2021-08-08T23:02:36+0000] e2e test


From 60c9ce0731c4d7fd20b615f5ed0f543baa1693c5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 00:04:26 +0000
Subject: [PATCH 2989/4650] [2021-08-09T00:04:26+0000] e2e test


From c9052f720e45313b8ff4bb7a59505952006b9370 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 01:23:37 +0000
Subject: [PATCH 2990/4650] [2021-08-09T01:23:37+0000] e2e test


From bebc2e94d67237ef18ac8b299c1207417f38677a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 02:11:34 +0000
Subject: [PATCH 2991/4650] [2021-08-09T02:11:34+0000] e2e test


From 7528c522720569adec83d9121368186b62d39a59 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 03:02:40 +0000
Subject: [PATCH 2992/4650] [2021-08-09T03:02:40+0000] e2e test


From 64413e3d9208b680a3d707fc2f7164982652fc8c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 04:02:46 +0000
Subject: [PATCH 2993/4650] [2021-08-09T04:02:45+0000] e2e test


From 228a48ac613609afc46aeec6a47b07e526c2d362 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 05:02:24 +0000
Subject: [PATCH 2994/4650] [2021-08-09T05:02:24+0000] e2e test


From ef50a0bd1d1d9fdac9ed298f21c468c8597af871 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 06:02:58 +0000
Subject: [PATCH 2995/4650] [2021-08-09T06:02:58+0000] e2e test


From 76b6a701da70b15dffd1a960aa4638a3026fb5c5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 07:02:31 +0000
Subject: [PATCH 2996/4650] [2021-08-09T07:02:30+0000] e2e test


From 6e9d054c604c8789ecc97f84381959b8d72a3818 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 08:02:43 +0000
Subject: [PATCH 2997/4650] [2021-08-09T08:02:43+0000] e2e test


From ecc91665bc566862de71cabd44d4a3cf34994459 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 09:02:36 +0000
Subject: [PATCH 2998/4650] [2021-08-09T09:02:36+0000] e2e test


From fe70a72dbdc7ff6ea4c74562d70bc8b40dba8620 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 10:02:35 +0000
Subject: [PATCH 2999/4650] [2021-08-09T10:02:35+0000] e2e test


From f098f5f5ea31d2d26e25d642086e9c92a3fd5a1a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 11:02:20 +0000
Subject: [PATCH 3000/4650] [2021-08-09T11:02:20+0000] e2e test


From f7b913191715e1c03ad75b3e8a86adec42734221 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 12:02:52 +0000
Subject: [PATCH 3001/4650] [2021-08-09T12:02:52+0000] e2e test


From 20c58f5857e6f21b0215d6af5a123eeff154ac59 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 13:07:18 +0000
Subject: [PATCH 3002/4650] [2021-08-09T13:07:18+0000] e2e test


From 7930067af4e76fc949620bce9e7547347eb14570 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 14:02:35 +0000
Subject: [PATCH 3003/4650] [2021-08-09T14:02:35+0000] e2e test


From f9d52d755860d8654543ec8118e5ec3baf2dee12 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 15:02:28 +0000
Subject: [PATCH 3004/4650] [2021-08-09T15:02:28+0000] e2e test


From c7c45d0a30451a976628a28357901c51896db2b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 16:02:51 +0000
Subject: [PATCH 3005/4650] [2021-08-09T16:02:51+0000] e2e test


From 12e85c39df72daa18eb1e25e7acafdd484ead680 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 17:07:09 +0000
Subject: [PATCH 3006/4650] [2021-08-09T17:07:09+0000] e2e test


From 77cfd789d8ae0e3941deb878028636f6ccba8d8a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 18:02:48 +0000
Subject: [PATCH 3007/4650] [2021-08-09T18:02:48+0000] e2e test


From 19fa5032946974afaec08a2f58c91c65d1568cfb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 19:02:14 +0000
Subject: [PATCH 3008/4650] [2021-08-09T19:02:14+0000] e2e test


From fbe011a3a90bbf20a1000e04afb5ff72c821e9b7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 20:02:34 +0000
Subject: [PATCH 3009/4650] [2021-08-09T20:02:34+0000] e2e test


From dbd78f5b7cd4a43d1e964aaa8152deee6d604c9c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 21:02:25 +0000
Subject: [PATCH 3010/4650] [2021-08-09T21:02:25+0000] e2e test


From b54f09b128460e806b35cd373310cbe6e2747183 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 22:02:31 +0000
Subject: [PATCH 3011/4650] [2021-08-09T22:02:31+0000] e2e test


From 8e3e649d8509f5facb6723421970cc975e8a0fc1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 9 Aug 2021 23:02:25 +0000
Subject: [PATCH 3012/4650] [2021-08-09T23:02:25+0000] e2e test


From 26fc41a6283acf57b75bf3b80340a07ec1e6c816 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 00:04:37 +0000
Subject: [PATCH 3013/4650] [2021-08-10T00:04:36+0000] e2e test


From 2481505fcd1d88579f8d0cae8366648c53d6b30d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 01:23:56 +0000
Subject: [PATCH 3014/4650] [2021-08-10T01:23:56+0000] e2e test


From 1c35b2ac746869386f0e8bd8ec1f94c6bd78f853 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 02:13:51 +0000
Subject: [PATCH 3015/4650] [2021-08-10T02:13:51+0000] e2e test


From 81ffa5310819d4298f5af64dab1b8ecb975667f1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 03:02:29 +0000
Subject: [PATCH 3016/4650] [2021-08-10T03:02:29+0000] e2e test


From b8910656c94a7fb342e7fc8236c90b7f295fd0e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 04:02:38 +0000
Subject: [PATCH 3017/4650] [2021-08-10T04:02:38+0000] e2e test


From 3a60ecc1e6be7e433d8313518f67fe2618864de4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 05:02:19 +0000
Subject: [PATCH 3018/4650] [2021-08-10T05:02:19+0000] e2e test


From 635deb1d6ad086c59e235a751e92f59b7a516ff3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 06:02:38 +0000
Subject: [PATCH 3019/4650] [2021-08-10T06:02:38+0000] e2e test


From f5fcd372548a06dc7eceabfecfc71a6a7db8d73a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 07:02:27 +0000
Subject: [PATCH 3020/4650] [2021-08-10T07:02:27+0000] e2e test


From 3d2433784b277ec8d05c0927860c411466cfa3ca Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 08:03:33 +0000
Subject: [PATCH 3021/4650] [2021-08-10T08:03:33+0000] e2e test


From fd841a753e9dd6ace0c399a1cd9bf9d741f104e5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 09:02:25 +0000
Subject: [PATCH 3022/4650] [2021-08-10T09:02:25+0000] e2e test


From 51f982436f8f9450261b1e09ca34918ce7ec72a3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 10:02:44 +0000
Subject: [PATCH 3023/4650] [2021-08-10T10:02:44+0000] e2e test


From 8badd51af65e2f899e4f6ef4a85d26b029d32ab2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 11:02:20 +0000
Subject: [PATCH 3024/4650] [2021-08-10T11:02:20+0000] e2e test


From 20a35bc7d0f8a3ca76b91904e661a55a7fb5f4ba Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 12:02:44 +0000
Subject: [PATCH 3025/4650] [2021-08-10T12:02:44+0000] e2e test


From d698736dbd680d44ba46cc350ddca722fc9c473e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 13:07:16 +0000
Subject: [PATCH 3026/4650] [2021-08-10T13:07:16+0000] e2e test


From 3583be9eb0b457cca3f05d36f8edc0e3b25eb530 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 14:02:22 +0000
Subject: [PATCH 3027/4650] [2021-08-10T14:02:22+0000] e2e test


From 128a7b5824732dc42cc4f94e89439a8a800b7c2e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 15:02:43 +0000
Subject: [PATCH 3028/4650] [2021-08-10T15:02:43+0000] e2e test


From 6f1f439868e413b8c09e152b1afefdb968afb255 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 17:06:43 +0000
Subject: [PATCH 3029/4650] [2021-08-10T17:06:43+0000] e2e test


From 4bdd30e08fdf9de3062f3b6a161d2c8f53782e52 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 18:02:45 +0000
Subject: [PATCH 3030/4650] [2021-08-10T18:02:45+0000] e2e test


From 1da538d81216700def5b5f75308c4320ed170f67 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 19:02:20 +0000
Subject: [PATCH 3031/4650] [2021-08-10T19:02:20+0000] e2e test


From 1b69087c03cf29c804889f6b9489160cb95405be Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 22:42:20 +0000
Subject: [PATCH 3032/4650] [2021-08-10T22:42:20+0000] e2e test


From 50ef6996d4da1598bbe2e493fca623ba0881b11b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 10 Aug 2021 23:29:50 +0000
Subject: [PATCH 3033/4650] [2021-08-10T23:29:50+0000] e2e test


From bec8e3fc0385ee8a4f2145bbddb404e0dc40d524 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 00:10:53 +0000
Subject: [PATCH 3034/4650] [2021-08-11T00:10:53+0000] e2e test


From 9fbe0f92f8606143f6ef5a35cef3a884e5b51429 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 01:22:45 +0000
Subject: [PATCH 3035/4650] [2021-08-11T01:22:45+0000] e2e test


From 6065f335840976552b24b4c2ae9af7eb8b5d53fa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 02:10:41 +0000
Subject: [PATCH 3036/4650] [2021-08-11T02:10:41+0000] e2e test


From cd1c579ace0e4460c6f69541ab0029c692752352 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 03:02:32 +0000
Subject: [PATCH 3037/4650] [2021-08-11T03:02:31+0000] e2e test


From 11162211dd136b77e05df866a572bc6189b01404 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 04:02:34 +0000
Subject: [PATCH 3038/4650] [2021-08-11T04:02:34+0000] e2e test


From cc00161c67613b05e3eac26d1ac4100e852f6e4b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 05:02:25 +0000
Subject: [PATCH 3039/4650] [2021-08-11T05:02:25+0000] e2e test


From 74738c933bf6cbfecaba71cca0663c74a36f7571 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 06:02:40 +0000
Subject: [PATCH 3040/4650] [2021-08-11T06:02:39+0000] e2e test


From 3ab0acab381822b84f8bb498facf2db8900c7ca4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 07:02:21 +0000
Subject: [PATCH 3041/4650] [2021-08-11T07:02:21+0000] e2e test


From 6c025e96ed17ba7678d4371c41b9ccb12d3cdc1c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 08:02:36 +0000
Subject: [PATCH 3042/4650] [2021-08-11T08:02:36+0000] e2e test


From 18926184effc2c3c4f65a77e82f75a6bf9e15a65 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 09:02:31 +0000
Subject: [PATCH 3043/4650] [2021-08-11T09:02:31+0000] e2e test


From ca2e4897fcfe26cefea2f21a245c26f5b5ba5c61 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 10:02:51 +0000
Subject: [PATCH 3044/4650] [2021-08-11T10:02:51+0000] e2e test


From 28dc82aab1d57a57864b8a20e9e7cf762024f9e4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 11:02:22 +0000
Subject: [PATCH 3045/4650] [2021-08-11T11:02:22+0000] e2e test


From 2324277a7896ba13513b063d6db172bc11a121df Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 12:02:42 +0000
Subject: [PATCH 3046/4650] [2021-08-11T12:02:42+0000] e2e test


From 01c189c39f294cac07a02c3c8bc9af03d056c4d7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 13:06:45 +0000
Subject: [PATCH 3047/4650] [2021-08-11T13:06:45+0000] e2e test


From 602063d1bda22568a44fafd304da06834df07392 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 14:02:35 +0000
Subject: [PATCH 3048/4650] [2021-08-11T14:02:34+0000] e2e test


From ae02def98d06ad7dfd3e3604253584b8d391aaef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 15:02:46 +0000
Subject: [PATCH 3049/4650] [2021-08-11T15:02:46+0000] e2e test


From 669f044af7539a79a250646dbbe50854c5feee4f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 16:02:33 +0000
Subject: [PATCH 3050/4650] [2021-08-11T16:02:33+0000] e2e test


From 57ae9fde82e2c3dc6cb83292a80f520ad54c5681 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 17:07:12 +0000
Subject: [PATCH 3051/4650] [2021-08-11T17:07:12+0000] e2e test


From 16025aa33890a0f0a75314517bdedc5392312f01 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 18:02:33 +0000
Subject: [PATCH 3052/4650] [2021-08-11T18:02:32+0000] e2e test


From eac89793f353f8cdb44b8d75cf1a55aa2876b168 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 19:02:18 +0000
Subject: [PATCH 3053/4650] [2021-08-11T19:02:18+0000] e2e test


From 52c52b3f5866c5c9a85a0fda3767eb48f7fd99a0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 20:02:31 +0000
Subject: [PATCH 3054/4650] [2021-08-11T20:02:31+0000] e2e test


From 5db40a7557e38e6b9c9332391442369d3cd437bf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 21:02:42 +0000
Subject: [PATCH 3055/4650] [2021-08-11T21:02:42+0000] e2e test


From d569e08cb4c33c994d32d6e213ed335f0a466c80 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 22:02:29 +0000
Subject: [PATCH 3056/4650] [2021-08-11T22:02:29+0000] e2e test


From cc237752f7cf09b3bb5a7e9114aec9ab4660b925 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 11 Aug 2021 23:02:47 +0000
Subject: [PATCH 3057/4650] [2021-08-11T23:02:47+0000] e2e test


From d9e517fe441c8ece6f9ce52297e6d49bc16767b7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 00:04:07 +0000
Subject: [PATCH 3058/4650] [2021-08-12T00:04:07+0000] e2e test


From d9d96cb7810bf44202978ce6d9dcd4e4c6473821 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 01:23:34 +0000
Subject: [PATCH 3059/4650] [2021-08-12T01:23:34+0000] e2e test


From 1ec20c7a55400845c6ec0ba830f9ba13de4b05b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 02:10:52 +0000
Subject: [PATCH 3060/4650] [2021-08-12T02:10:52+0000] e2e test


From 15434fe4d47f075f6b06b0713c5255d1d69d0943 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 03:02:26 +0000
Subject: [PATCH 3061/4650] [2021-08-12T03:02:26+0000] e2e test


From 3fd67b742aa5ef08e92d65ee82146019f4d6c927 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 04:02:42 +0000
Subject: [PATCH 3062/4650] [2021-08-12T04:02:42+0000] e2e test


From ffb489d831b29f99216df1bb8d5d97e5ce54c969 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 05:02:22 +0000
Subject: [PATCH 3063/4650] [2021-08-12T05:02:22+0000] e2e test


From c02ad776c46e4a9c4c40ec43409b53c4719ebc94 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 06:02:28 +0000
Subject: [PATCH 3064/4650] [2021-08-12T06:02:28+0000] e2e test


From 3eec96eda22f9d865a4b603400f261ec25707224 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 07:02:23 +0000
Subject: [PATCH 3065/4650] [2021-08-12T07:02:23+0000] e2e test


From 6a0964797e372ba948aa448992afaf4ba78ecd2c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 08:02:33 +0000
Subject: [PATCH 3066/4650] [2021-08-12T08:02:33+0000] e2e test


From 7c83a41544e99133d66ae0dd83e082483a50998e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 09:02:26 +0000
Subject: [PATCH 3067/4650] [2021-08-12T09:02:26+0000] e2e test


From 2963db672776829f6e1732d8373261a0ddb9e998 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 10:02:42 +0000
Subject: [PATCH 3068/4650] [2021-08-12T10:02:42+0000] e2e test


From 486ca360b3e50ef6b220b6ba5bef5e32d063b79d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 11:02:24 +0000
Subject: [PATCH 3069/4650] [2021-08-12T11:02:23+0000] e2e test


From 561477b24953d4b642753876a62d7222ce57882b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 12:02:59 +0000
Subject: [PATCH 3070/4650] [2021-08-12T12:02:59+0000] e2e test


From ef874e12c642549e45eb7df463251025d0cd8a2c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 13:07:15 +0000
Subject: [PATCH 3071/4650] [2021-08-12T13:07:14+0000] e2e test


From c2d94a7e17b647d76caff0fdb91c31ab541ec87a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 14:02:30 +0000
Subject: [PATCH 3072/4650] [2021-08-12T14:02:30+0000] e2e test


From b731d9a86129e24889fc5211a3baca651c97ccb1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 15:02:32 +0000
Subject: [PATCH 3073/4650] [2021-08-12T15:02:32+0000] e2e test


From 4ef8904c5d1a829d58d32ece49738a1b2c05d96c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 16:02:29 +0000
Subject: [PATCH 3074/4650] [2021-08-12T16:02:28+0000] e2e test


From 7d9b6dfd6f18c0c0047c79ad7668b0f704e4feb8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 17:06:43 +0000
Subject: [PATCH 3075/4650] [2021-08-12T17:06:43+0000] e2e test


From 0ffe9e564096e6257cc888bd33568396b1ceb7a0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 18:02:32 +0000
Subject: [PATCH 3076/4650] [2021-08-12T18:02:32+0000] e2e test


From ed445a1990373633e0687b33b85f7f3998f1c59a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 19:02:26 +0000
Subject: [PATCH 3077/4650] [2021-08-12T19:02:26+0000] e2e test


From 78c285eec58e7781f7a11bc2ba87896e13321598 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 20:02:40 +0000
Subject: [PATCH 3078/4650] [2021-08-12T20:02:40+0000] e2e test


From 7c8ed0374115641ca7a24508595f0fa18cad71b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 21:02:27 +0000
Subject: [PATCH 3079/4650] [2021-08-12T21:02:27+0000] e2e test


From 6a010647e04cbee5b9a654008a5a02ce88515554 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 22:02:35 +0000
Subject: [PATCH 3080/4650] [2021-08-12T22:02:35+0000] e2e test


From 632fdf330d4c27c190c9f24ef2a5d613a05f90ff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 12 Aug 2021 23:02:45 +0000
Subject: [PATCH 3081/4650] [2021-08-12T23:02:45+0000] e2e test


From 5077c683e8dd962a88bb8e847895d95e4db55b00 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 00:04:16 +0000
Subject: [PATCH 3082/4650] [2021-08-13T00:04:16+0000] e2e test


From 2f781ac4e9d707ff33e4033c99aedd1d070d0dd6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 01:23:34 +0000
Subject: [PATCH 3083/4650] [2021-08-13T01:23:34+0000] e2e test


From 565c2cc02f39a94a9ea213c02ba6231d4ca21ac4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 02:11:34 +0000
Subject: [PATCH 3084/4650] [2021-08-13T02:11:34+0000] e2e test


From 37c8331af02812258e948c8a31e7f605d766cd5a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 03:02:53 +0000
Subject: [PATCH 3085/4650] [2021-08-13T03:02:52+0000] e2e test


From 97089e16dfecb99e63dedd9ecacdc90372934d58 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 04:02:52 +0000
Subject: [PATCH 3086/4650] [2021-08-13T04:02:52+0000] e2e test


From fc13b6bb0c9fbf3a9b017d3f3f48fcecb763578b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 05:02:24 +0000
Subject: [PATCH 3087/4650] [2021-08-13T05:02:24+0000] e2e test


From 6ef107430258809cd9c6e7f8ba879c6cbe3aea23 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 06:02:52 +0000
Subject: [PATCH 3088/4650] [2021-08-13T06:02:52+0000] e2e test


From 1c556080386fef84c03ffaa15d6b3e097e0502cb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 07:02:25 +0000
Subject: [PATCH 3089/4650] [2021-08-13T07:02:25+0000] e2e test


From a53f19e0b67bed7d11bc5bd47ee5319447a8d208 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 08:02:35 +0000
Subject: [PATCH 3090/4650] [2021-08-13T08:02:35+0000] e2e test


From ecc0b6fc0a57557b33871483c4308f2a905212f9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 09:02:33 +0000
Subject: [PATCH 3091/4650] [2021-08-13T09:02:33+0000] e2e test


From a366dae6cf01980dc7d872a71c03d5849ec51d50 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 10:02:40 +0000
Subject: [PATCH 3092/4650] [2021-08-13T10:02:40+0000] e2e test


From eb2196d8092945c66f0273399118fd75033a0fd5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 11:02:22 +0000
Subject: [PATCH 3093/4650] [2021-08-13T11:02:21+0000] e2e test


From 7615a0fd1e6ae36a33190cae799a25317f828120 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 12:02:45 +0000
Subject: [PATCH 3094/4650] [2021-08-13T12:02:45+0000] e2e test


From 7d2267c3e0b9045ca6d6c3eba376eec41bd07b97 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 13:06:39 +0000
Subject: [PATCH 3095/4650] [2021-08-13T13:06:38+0000] e2e test


From bfe28d3286f1f9491014274d1b4fd58e642cb475 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 14:02:33 +0000
Subject: [PATCH 3096/4650] [2021-08-13T14:02:33+0000] e2e test


From 0de0012ca1c3f11a4c6c1c23c763cbf30e9c1079 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 15:02:35 +0000
Subject: [PATCH 3097/4650] [2021-08-13T15:02:35+0000] e2e test


From 51516d3666a4669778432fd4ac863d0a0396e0a5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 16:02:27 +0000
Subject: [PATCH 3098/4650] [2021-08-13T16:02:27+0000] e2e test


From 33dbca74eff693d2c119a72a185809def3b72cde Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 17:06:31 +0000
Subject: [PATCH 3099/4650] [2021-08-13T17:06:31+0000] e2e test


From 3ad5e0a8c26fd3fdbe2d235a8bca9c017a201a8c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 18:02:39 +0000
Subject: [PATCH 3100/4650] [2021-08-13T18:02:39+0000] e2e test


From 8ac097a355803776ee370a250304a3b04034e3f8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 19:02:18 +0000
Subject: [PATCH 3101/4650] [2021-08-13T19:02:18+0000] e2e test


From 3fe70cea128a782e65bde65b052799a70c02c004 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 20:02:26 +0000
Subject: [PATCH 3102/4650] [2021-08-13T20:02:26+0000] e2e test


From 8bcac722ee4dcfbc86b5f0601b85ab49f31f9acd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 21:02:19 +0000
Subject: [PATCH 3103/4650] [2021-08-13T21:02:19+0000] e2e test


From dcfa85c6846b6e1be006424bfe120bbc75c083b5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 22:02:41 +0000
Subject: [PATCH 3104/4650] [2021-08-13T22:02:40+0000] e2e test


From d7c32e65d7c3535cac09d100224a32819eb5e7f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 13 Aug 2021 23:02:42 +0000
Subject: [PATCH 3105/4650] [2021-08-13T23:02:42+0000] e2e test


From cc5173ebb4abc0fbf6885285a4e5bdf1bae1aae9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 00:03:52 +0000
Subject: [PATCH 3106/4650] [2021-08-14T00:03:51+0000] e2e test


From 796ed7304c79607929388be425d04e19824c905f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 01:21:41 +0000
Subject: [PATCH 3107/4650] [2021-08-14T01:21:41+0000] e2e test


From f8fa75b57c1b7667f9dac7618cfff778b4f43296 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 02:11:52 +0000
Subject: [PATCH 3108/4650] [2021-08-14T02:11:52+0000] e2e test


From ce869a53f123914d0fa17f502c8fe297d056ccd3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 03:02:30 +0000
Subject: [PATCH 3109/4650] [2021-08-14T03:02:30+0000] e2e test


From df9ba6244caf8574b0c7174625db4ea2e94eb37b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 04:02:40 +0000
Subject: [PATCH 3110/4650] [2021-08-14T04:02:40+0000] e2e test


From efd34fda5b33e9ad36e30501746e5269b9ac89f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 05:02:26 +0000
Subject: [PATCH 3111/4650] [2021-08-14T05:02:26+0000] e2e test


From eb753088bdeec9c7487a58ec38ac9eb3e8521887 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 06:02:30 +0000
Subject: [PATCH 3112/4650] [2021-08-14T06:02:30+0000] e2e test


From f69447c7bc64de1bf9eaf14ca592c268c47e8b8f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 07:02:37 +0000
Subject: [PATCH 3113/4650] [2021-08-14T07:02:37+0000] e2e test


From 7b5f86a6a8ef534519247e78602c06764318629b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 08:02:35 +0000
Subject: [PATCH 3114/4650] [2021-08-14T08:02:35+0000] e2e test


From cc3462311bb967c4fbe00a30603d8d171f143fd5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 09:02:21 +0000
Subject: [PATCH 3115/4650] [2021-08-14T09:02:21+0000] e2e test


From 73087669b6778ce94d9e20694027d7a4e0d1ca18 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 10:02:22 +0000
Subject: [PATCH 3116/4650] [2021-08-14T10:02:22+0000] e2e test


From aa03977f3a0b3e23bcfdd79c3ee63b8de646646f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 11:02:22 +0000
Subject: [PATCH 3117/4650] [2021-08-14T11:02:22+0000] e2e test


From 6dfee5e7a62176043dc937747ec1082fce4d94c8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 12:02:44 +0000
Subject: [PATCH 3118/4650] [2021-08-14T12:02:44+0000] e2e test


From 83dc3c8b1feb4f36673e2f2c442a2e64cdbf8e59 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 13:05:52 +0000
Subject: [PATCH 3119/4650] [2021-08-14T13:05:52+0000] e2e test


From afee1daa12937fc4a6a03f38ef1d78d711e6e161 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 14:02:27 +0000
Subject: [PATCH 3120/4650] [2021-08-14T14:02:27+0000] e2e test


From 744ef579156b62a8f4020377d48b8bc8214a8e8c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 15:02:24 +0000
Subject: [PATCH 3121/4650] [2021-08-14T15:02:24+0000] e2e test


From 3fe2421550f35e9b36baa7d0e4b7c4b5d4edb264 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 16:02:33 +0000
Subject: [PATCH 3122/4650] [2021-08-14T16:02:33+0000] e2e test


From 013b06e5f1eeac823b929738dba0bc39d7da1f56 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 17:05:53 +0000
Subject: [PATCH 3123/4650] [2021-08-14T17:05:53+0000] e2e test


From 458716d20ea40cd0806294145e48e6b6bd2b2794 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 18:02:32 +0000
Subject: [PATCH 3124/4650] [2021-08-14T18:02:32+0000] e2e test


From df66e3cf5919037bed5cea825592773a45703711 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 19:02:16 +0000
Subject: [PATCH 3125/4650] [2021-08-14T19:02:16+0000] e2e test


From 66ebfa2eccf36f0c9611720f1196aa0153c80e3e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 20:02:47 +0000
Subject: [PATCH 3126/4650] [2021-08-14T20:02:47+0000] e2e test


From b6300c4f332c8c045c3fb8caf33d865700cabf45 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 21:02:30 +0000
Subject: [PATCH 3127/4650] [2021-08-14T21:02:30+0000] e2e test


From 2d8b20cc7efc1f5046f32d6947f11e5158cc598f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 22:02:37 +0000
Subject: [PATCH 3128/4650] [2021-08-14T22:02:37+0000] e2e test


From 44dfa020cdbba98bee9d3ba81133054586f3a2a4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 14 Aug 2021 23:02:40 +0000
Subject: [PATCH 3129/4650] [2021-08-14T23:02:40+0000] e2e test


From ebf9bd6752913824f7da50a1c4f4f0ba7dc113b3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 00:04:22 +0000
Subject: [PATCH 3130/4650] [2021-08-15T00:04:22+0000] e2e test


From 718ede88aba3bfb2d16e3ddf6dbdbc3f04257d72 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 01:22:53 +0000
Subject: [PATCH 3131/4650] [2021-08-15T01:22:53+0000] e2e test


From 3f6339941a7db385c50fe17809e4ccbd793ed554 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 02:09:57 +0000
Subject: [PATCH 3132/4650] [2021-08-15T02:09:56+0000] e2e test


From fb9263ae8a85be915d9447b162ef64416b0c7d5b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 03:02:26 +0000
Subject: [PATCH 3133/4650] [2021-08-15T03:02:26+0000] e2e test


From b6a25a761c31ded1b0286860357a31eaac377845 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 04:02:48 +0000
Subject: [PATCH 3134/4650] [2021-08-15T04:02:48+0000] e2e test


From caef2c2933369c4b39df80fc26602224fb58b7db Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 05:02:26 +0000
Subject: [PATCH 3135/4650] [2021-08-15T05:02:26+0000] e2e test


From 2b89ca7c628a6fac220b107d8aeff10d2aa5de1a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 06:02:37 +0000
Subject: [PATCH 3136/4650] [2021-08-15T06:02:37+0000] e2e test


From 7f5db3ecc63451de726f2f00dba5417842508758 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 07:02:25 +0000
Subject: [PATCH 3137/4650] [2021-08-15T07:02:25+0000] e2e test


From ab9dc07d1ac66287dbb12b16a1187dcfc7ae27de Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 08:02:50 +0000
Subject: [PATCH 3138/4650] [2021-08-15T08:02:49+0000] e2e test


From 4a0ad01af0a7fa23f288841b58ddd878310ceb73 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 09:02:26 +0000
Subject: [PATCH 3139/4650] [2021-08-15T09:02:26+0000] e2e test


From 674cc7ce7796fb42ef602c21fc2bb773bf01fcac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 10:02:38 +0000
Subject: [PATCH 3140/4650] [2021-08-15T10:02:38+0000] e2e test


From 1698c1e48ef7ef2093b713cd27e8a60e94e5bb7f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 11:02:18 +0000
Subject: [PATCH 3141/4650] [2021-08-15T11:02:18+0000] e2e test


From ba3e55869f3b6b7b7afb1c109872e80f530617f8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 12:02:57 +0000
Subject: [PATCH 3142/4650] [2021-08-15T12:02:57+0000] e2e test


From 4b662bb7bc54a29018288c5b02f43026a66469ac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 13:05:48 +0000
Subject: [PATCH 3143/4650] [2021-08-15T13:05:48+0000] e2e test


From 1ea890bf4c74dc13d790611c2b11c192ef07ae50 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 14:02:36 +0000
Subject: [PATCH 3144/4650] [2021-08-15T14:02:36+0000] e2e test


From 1213b115116f71321e9bcdf687bd8d0f01d2cd90 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 15:02:45 +0000
Subject: [PATCH 3145/4650] [2021-08-15T15:02:44+0000] e2e test


From 6d658dfbf5b1b2c1ca381a7cb016453a7542d8f5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 16:02:34 +0000
Subject: [PATCH 3146/4650] [2021-08-15T16:02:34+0000] e2e test


From 87b860e0f67d15ec8b39ddb39323befd2d89f16a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 17:05:35 +0000
Subject: [PATCH 3147/4650] [2021-08-15T17:05:35+0000] e2e test


From da965265a919342ca3d1b509adc68fa0d7d6903a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 18:02:21 +0000
Subject: [PATCH 3148/4650] [2021-08-15T18:02:21+0000] e2e test


From cda11f2493387dd00a4452f8a723947f76ab9970 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 19:02:17 +0000
Subject: [PATCH 3149/4650] [2021-08-15T19:02:17+0000] e2e test


From 8f342c2852b484148755af50f52581ac8a6589d0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 20:02:43 +0000
Subject: [PATCH 3150/4650] [2021-08-15T20:02:42+0000] e2e test


From 008f91cbbc52b28c4fe2796a2cc4d68a82c0c95a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 21:02:25 +0000
Subject: [PATCH 3151/4650] [2021-08-15T21:02:25+0000] e2e test


From 553e1c2883ca71af06a7e8e4d9b0ec8a075e1524 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 22:02:23 +0000
Subject: [PATCH 3152/4650] [2021-08-15T22:02:23+0000] e2e test


From 4f6bf3345676e0f4825e4345b97a2721b0a48e9c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 15 Aug 2021 23:02:22 +0000
Subject: [PATCH 3153/4650] [2021-08-15T23:02:22+0000] e2e test


From efd761edca2758a31a94e5f61df88ee3f1b34c09 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 00:04:18 +0000
Subject: [PATCH 3154/4650] [2021-08-16T00:04:18+0000] e2e test


From 7da3c1078a42434366095d7be3c7740c827f0628 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 01:22:37 +0000
Subject: [PATCH 3155/4650] [2021-08-16T01:22:37+0000] e2e test


From b76cc14a899521407150a75002e6bfbd799c1ab0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 02:10:35 +0000
Subject: [PATCH 3156/4650] [2021-08-16T02:10:35+0000] e2e test


From 0e316f8e42f9ac6818fa4bef419be9a913f6c12c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 03:02:28 +0000
Subject: [PATCH 3157/4650] [2021-08-16T03:02:28+0000] e2e test


From 4db980da5d3c48cc4de844d26be148834d710098 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 04:02:40 +0000
Subject: [PATCH 3158/4650] [2021-08-16T04:02:40+0000] e2e test


From f66b406cb6a1197b96037c7bf69c1c1eb6ea9e3b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 05:02:18 +0000
Subject: [PATCH 3159/4650] [2021-08-16T05:02:18+0000] e2e test


From c1dd26ee45453a390425220a7dd959e9d65e7432 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 06:02:33 +0000
Subject: [PATCH 3160/4650] [2021-08-16T06:02:32+0000] e2e test


From 9721815974c1224c6d0a8b7a2f29e6c507a861b0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 07:02:29 +0000
Subject: [PATCH 3161/4650] [2021-08-16T07:02:29+0000] e2e test


From b597cf4b51294b74988d39f2e2c695ecfa9e9c4c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 08:02:37 +0000
Subject: [PATCH 3162/4650] [2021-08-16T08:02:37+0000] e2e test


From 0de8a19f608126013102e5616ecddbc9fbbc4792 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 09:02:44 +0000
Subject: [PATCH 3163/4650] [2021-08-16T09:02:44+0000] e2e test


From cec2aa7b1234d143d414af4193ee3759bdacb322 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 10:02:31 +0000
Subject: [PATCH 3164/4650] [2021-08-16T10:02:30+0000] e2e test


From e5bdde3e375d2845dd45a7d68cedd8e455e45ac6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 11:03:26 +0000
Subject: [PATCH 3165/4650] [2021-08-16T11:03:26+0000] e2e test


From d1fa0a3c5a78f837d4de8e21245b2fa65ce58def Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 12:02:58 +0000
Subject: [PATCH 3166/4650] [2021-08-16T12:02:58+0000] e2e test


From 82f37c44c52ba808fa20547a43c4d0f1375d8bb2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 13:16:04 +0000
Subject: [PATCH 3167/4650] [2021-08-16T13:16:04+0000] e2e test


From 4bbb4ae0a86feaa49b23bd7d0bdb86b751e44ce2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 14:10:49 +0000
Subject: [PATCH 3168/4650] [2021-08-16T14:10:49+0000] e2e test


From cd8ff0a82fa1b14a8be6515e55f043b7482cbeab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 15:02:30 +0000
Subject: [PATCH 3169/4650] [2021-08-16T15:02:30+0000] e2e test


From fd1673316d4132c7bbb86017a399d351079b4f0c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 16:02:32 +0000
Subject: [PATCH 3170/4650] [2021-08-16T16:02:32+0000] e2e test


From 7a91c6a41779fee00fda68476704da105841c549 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 17:07:27 +0000
Subject: [PATCH 3171/4650] [2021-08-16T17:07:26+0000] e2e test


From 1822908088a4c40263dce5b5886ea350fff7e13c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 18:02:39 +0000
Subject: [PATCH 3172/4650] [2021-08-16T18:02:39+0000] e2e test


From 7b535c7ac2db2c37ececfc175e9778f2f5cb16c3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 19:02:20 +0000
Subject: [PATCH 3173/4650] [2021-08-16T19:02:20+0000] e2e test


From 8341336ac042ca0e37b16b478c3a3b7418f85a1e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 20:02:49 +0000
Subject: [PATCH 3174/4650] [2021-08-16T20:02:49+0000] e2e test


From 4e3b07761e4677a82a1f93d5c5194b985a6a87d0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 21:02:32 +0000
Subject: [PATCH 3175/4650] [2021-08-16T21:02:32+0000] e2e test


From 2610fe0bd84e93aea2f080287d87d638ea46bad3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 22:02:30 +0000
Subject: [PATCH 3176/4650] [2021-08-16T22:02:30+0000] e2e test


From 299622ea93b86803f5ef304e9f984895677c8ff5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 16 Aug 2021 23:02:54 +0000
Subject: [PATCH 3177/4650] [2021-08-16T23:02:54+0000] e2e test


From 9b6f177a7e78891f241e275a9a25640a3eefb63e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 00:04:12 +0000
Subject: [PATCH 3178/4650] [2021-08-17T00:04:12+0000] e2e test


From 78e9cab163f9487c3143f51b5e031aef8e7db660 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 01:22:15 +0000
Subject: [PATCH 3179/4650] [2021-08-17T01:22:14+0000] e2e test


From ef66b748df3fa86ee7be2371790989ace2542771 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 02:10:38 +0000
Subject: [PATCH 3180/4650] [2021-08-17T02:10:38+0000] e2e test


From 1268bd7fb0465fad86b4aee88faf1b506154767a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 03:02:30 +0000
Subject: [PATCH 3181/4650] [2021-08-17T03:02:30+0000] e2e test


From 39d705a9db8dcd11e431a93747112c313ce695d4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 04:02:41 +0000
Subject: [PATCH 3182/4650] [2021-08-17T04:02:40+0000] e2e test


From d4a0e6c83bf9797987f403845e02b09d09224584 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 05:03:22 +0000
Subject: [PATCH 3183/4650] [2021-08-17T05:03:22+0000] e2e test


From 55c8b4b33a2a41e4a267f9c71dc0d3395c3d1c02 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 06:02:56 +0000
Subject: [PATCH 3184/4650] [2021-08-17T06:02:56+0000] e2e test


From fe06323d8e0aade482b3ed8bf6dc81fb20fb1970 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 07:02:36 +0000
Subject: [PATCH 3185/4650] [2021-08-17T07:02:36+0000] e2e test


From 8dd673c38a69ed40780af9211ee9237dc69b14bf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 08:02:43 +0000
Subject: [PATCH 3186/4650] [2021-08-17T08:02:43+0000] e2e test


From 5c273c36dbf5c88bc6999bb769a4fa823cafdcb7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 09:02:48 +0000
Subject: [PATCH 3187/4650] [2021-08-17T09:02:48+0000] e2e test


From 2c2c1fcafbc02c39845300e5248fe9777cc4cc4a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 10:02:29 +0000
Subject: [PATCH 3188/4650] [2021-08-17T10:02:29+0000] e2e test


From f78f451925e9a66e3597b637701c93a2777a5c8f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 11:02:30 +0000
Subject: [PATCH 3189/4650] [2021-08-17T11:02:29+0000] e2e test


From 63d6c4be2c3a92afe043773dd6cbed80a662efe5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 12:03:04 +0000
Subject: [PATCH 3190/4650] [2021-08-17T12:03:04+0000] e2e test


From ef8d9940862965caddcfcfe8661620a6fdb8b33f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 13:06:56 +0000
Subject: [PATCH 3191/4650] [2021-08-17T13:06:56+0000] e2e test


From 0e35a9a455ee9edf66ac2591c4690193a35067ef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 14:02:21 +0000
Subject: [PATCH 3192/4650] [2021-08-17T14:02:21+0000] e2e test


From 77f986b31f587df5bba9f94c365c1d2c26ac2124 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 15:02:28 +0000
Subject: [PATCH 3193/4650] [2021-08-17T15:02:28+0000] e2e test


From 5b0764dbe3bf4b7ece6d77a65e5890a8b1454594 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 16:02:43 +0000
Subject: [PATCH 3194/4650] [2021-08-17T16:02:42+0000] e2e test


From 66a7dee331616e03062e503b7f50853f1476ed93 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 17:06:06 +0000
Subject: [PATCH 3195/4650] [2021-08-17T17:06:06+0000] e2e test


From a0dceafca167cc91f240131d3f2e070f02198ec5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 18:02:30 +0000
Subject: [PATCH 3196/4650] [2021-08-17T18:02:30+0000] e2e test


From 213f2cf8583981904ae84b559b7d0c87f0282e06 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 19:02:17 +0000
Subject: [PATCH 3197/4650] [2021-08-17T19:02:17+0000] e2e test


From 9a6b8fc5ad9cdcf4678354225fde80c86df40b5a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 20:02:48 +0000
Subject: [PATCH 3198/4650] [2021-08-17T20:02:48+0000] e2e test


From 715d4d80cb4ccef69f2f38743239987b276d3c68 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 21:02:30 +0000
Subject: [PATCH 3199/4650] [2021-08-17T21:02:30+0000] e2e test


From 077a42128cf4e2b70f6f4e34b31eb3d6a24e114b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 22:02:25 +0000
Subject: [PATCH 3200/4650] [2021-08-17T22:02:25+0000] e2e test


From 97bafd5e8d1021301b74307c515c57966c42577a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 17 Aug 2021 23:02:45 +0000
Subject: [PATCH 3201/4650] [2021-08-17T23:02:45+0000] e2e test


From d5c9e4667d64928acd364eda5f838d7d605c2acb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 00:04:06 +0000
Subject: [PATCH 3202/4650] [2021-08-18T00:04:06+0000] e2e test


From fe54d2a8cfaa2d2a07a35fe82389276dcb5cc46e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 01:22:45 +0000
Subject: [PATCH 3203/4650] [2021-08-18T01:22:45+0000] e2e test


From 9392ac0e5271ebc25c9a5a27de376760c2e0d00e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 02:10:12 +0000
Subject: [PATCH 3204/4650] [2021-08-18T02:10:11+0000] e2e test


From 5541d3eb0ba4fb813304130611f813c16534acb3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 03:02:37 +0000
Subject: [PATCH 3205/4650] [2021-08-18T03:02:37+0000] e2e test


From b43a96fac5e3e2a652fa57e66185bf25aa71caf9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 04:02:50 +0000
Subject: [PATCH 3206/4650] [2021-08-18T04:02:50+0000] e2e test


From 1f3a677db6c97d0482d12e63ddffd9317d96c670 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 05:02:19 +0000
Subject: [PATCH 3207/4650] [2021-08-18T05:02:19+0000] e2e test


From 8738506c6943586f3afe73ff59fbdb8df8c74554 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 06:02:31 +0000
Subject: [PATCH 3208/4650] [2021-08-18T06:02:31+0000] e2e test


From 2a1898840519fec8f68d9f01b78271cf15ea7995 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 07:02:25 +0000
Subject: [PATCH 3209/4650] [2021-08-18T07:02:25+0000] e2e test


From 3c4b0d74ceff5a92357985455f76ec53369c9e77 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 08:02:46 +0000
Subject: [PATCH 3210/4650] [2021-08-18T08:02:46+0000] e2e test


From e5a3685681aa5c5eb1cf2536ec7460fda0a715f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 09:02:28 +0000
Subject: [PATCH 3211/4650] [2021-08-18T09:02:28+0000] e2e test


From 83074572c2da3d83d2424f69060937097d776695 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 10:02:39 +0000
Subject: [PATCH 3212/4650] [2021-08-18T10:02:39+0000] e2e test


From 571bc954f7a862030a52d9019f7a1e84b3da688d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 11:02:36 +0000
Subject: [PATCH 3213/4650] [2021-08-18T11:02:36+0000] e2e test


From 97ef73b86e5103e99715554da33c0a5fc42d84c7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 12:03:03 +0000
Subject: [PATCH 3214/4650] [2021-08-18T12:03:03+0000] e2e test


From 86e7e391b236cd1c5cf5c70df58a53ff3328cd0e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 13:07:06 +0000
Subject: [PATCH 3215/4650] [2021-08-18T13:07:06+0000] e2e test


From 6640aa230fbb5d5a0cc6ef98a1a3e61d8e0590fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 14:02:34 +0000
Subject: [PATCH 3216/4650] [2021-08-18T14:02:34+0000] e2e test


From cfe316bf7636ad82adedfae867711d1b60f19b70 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 15:02:41 +0000
Subject: [PATCH 3217/4650] [2021-08-18T15:02:41+0000] e2e test


From 11f7b8dd3a3525abf656ed27debacb346a3608a6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 16:02:54 +0000
Subject: [PATCH 3218/4650] [2021-08-18T16:02:54+0000] e2e test


From 991ac3aac7a9765bf91c3620c63d3748a5c86fc4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 17:08:28 +0000
Subject: [PATCH 3219/4650] [2021-08-18T17:08:28+0000] e2e test


From 7e342ea4a38712409af04f540d7e89b3e4498fb2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 18:02:34 +0000
Subject: [PATCH 3220/4650] [2021-08-18T18:02:34+0000] e2e test


From 6c9ceb18c9084e6cc70de22f4173da7e199c4e9c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 19:02:24 +0000
Subject: [PATCH 3221/4650] [2021-08-18T19:02:24+0000] e2e test


From 553e31cbde258c31b786c8b100848b42296e40d8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 20:02:29 +0000
Subject: [PATCH 3222/4650] [2021-08-18T20:02:29+0000] e2e test


From 581ecbf7c582990fd1fd9ff23cbba9caa4802dbe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 21:02:34 +0000
Subject: [PATCH 3223/4650] [2021-08-18T21:02:34+0000] e2e test


From a8e5a62eccebf0221b9380d9f301d0cd02bc8969 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 22:02:30 +0000
Subject: [PATCH 3224/4650] [2021-08-18T22:02:30+0000] e2e test


From 6bf4f3291e7c7026940b564b47a14edb409ae052 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 18 Aug 2021 23:02:24 +0000
Subject: [PATCH 3225/4650] [2021-08-18T23:02:23+0000] e2e test


From 905c2fe285b3192a37612803bfb836385b990dff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 00:03:29 +0000
Subject: [PATCH 3226/4650] [2021-08-19T00:03:29+0000] e2e test


From b7ced789e1be0275d9f9ab57748c2e8d66fef7ee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 01:19:34 +0000
Subject: [PATCH 3227/4650] [2021-08-19T01:19:34+0000] e2e test


From 1cbbc6dd20d29e10b09f7e7d4cee9baa99c8b665 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 02:10:32 +0000
Subject: [PATCH 3228/4650] [2021-08-19T02:10:32+0000] e2e test


From 88bc3a53d0e846e37b814d54c76d3ed47e16634e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 03:02:28 +0000
Subject: [PATCH 3229/4650] [2021-08-19T03:02:28+0000] e2e test


From a5923a1614993d19797a683854e7ad43e0bbdd2b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 04:02:40 +0000
Subject: [PATCH 3230/4650] [2021-08-19T04:02:40+0000] e2e test


From b469395cdf205957e77efd69f791e52d9108f42b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 05:02:27 +0000
Subject: [PATCH 3231/4650] [2021-08-19T05:02:26+0000] e2e test


From dc8f8885c1d4d1bda54ad0438d6d391996a65f1d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 06:02:30 +0000
Subject: [PATCH 3232/4650] [2021-08-19T06:02:30+0000] e2e test


From 636c795001820c46ab9f1d0e1e62cb018b628a2f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 07:02:30 +0000
Subject: [PATCH 3233/4650] [2021-08-19T07:02:30+0000] e2e test


From 340e0a750794f8bac8f069bb1607a07ccfb09a5d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 08:02:59 +0000
Subject: [PATCH 3234/4650] [2021-08-19T08:02:59+0000] e2e test


From 99e75b0cc8fd82c1285c16db3b9a37bcb389e87b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 09:02:39 +0000
Subject: [PATCH 3235/4650] [2021-08-19T09:02:39+0000] e2e test


From bf2e7d4f95e24174acbe853a9bb0dbcb830285ac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 10:02:34 +0000
Subject: [PATCH 3236/4650] [2021-08-19T10:02:34+0000] e2e test


From 5c8f02a5e6af8bfdc1b35c4abf67a21f87606c3e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 11:02:21 +0000
Subject: [PATCH 3237/4650] [2021-08-19T11:02:21+0000] e2e test


From ba3b06c574c2e56e96cfdb659db816e750d4ead9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 12:03:01 +0000
Subject: [PATCH 3238/4650] [2021-08-19T12:03:00+0000] e2e test


From aa218ad20b43d8d9c20e777aeb2b2c4843765533 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 13:07:20 +0000
Subject: [PATCH 3239/4650] [2021-08-19T13:07:19+0000] e2e test


From 9abf3090dedeb107d8eebde9c39b9b135ff94e01 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 14:02:21 +0000
Subject: [PATCH 3240/4650] [2021-08-19T14:02:21+0000] e2e test


From 55c2dd379f6655c9f8db1517299c5760d6a1c9a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 15:02:40 +0000
Subject: [PATCH 3241/4650] [2021-08-19T15:02:39+0000] e2e test


From 3644eb3d34c4675d57481f2f4e31e86d31e5b6e0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 16:02:40 +0000
Subject: [PATCH 3242/4650] [2021-08-19T16:02:40+0000] e2e test


From 0fd7b9f3fb9d9fb922e780a69a98657c7c710e47 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 17:06:50 +0000
Subject: [PATCH 3243/4650] [2021-08-19T17:06:50+0000] e2e test


From 5320ab0dd631d73d6c7ade25a3d320f54170d0c7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 18:02:51 +0000
Subject: [PATCH 3244/4650] [2021-08-19T18:02:51+0000] e2e test


From f9eb3f7cb832d3227e96524e32492dfa0f743aa6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 19:03:09 +0000
Subject: [PATCH 3245/4650] [2021-08-19T19:03:09+0000] e2e test


From dc8e214bebec4f8a27017e7e53a958d0a38238c1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 20:02:28 +0000
Subject: [PATCH 3246/4650] [2021-08-19T20:02:28+0000] e2e test


From 3f33450687c2af774e5ab7c59886e4606d116113 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 21:02:27 +0000
Subject: [PATCH 3247/4650] [2021-08-19T21:02:27+0000] e2e test


From c04b0ce40be4c06e06b99aab7c70ee96c5f52032 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 22:02:40 +0000
Subject: [PATCH 3248/4650] [2021-08-19T22:02:40+0000] e2e test


From ea0d32b84c05b1a0e06ccaf5172f8b38e8f2f51b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 19 Aug 2021 23:02:22 +0000
Subject: [PATCH 3249/4650] [2021-08-19T23:02:22+0000] e2e test


From b1139953d605c3b228047e22825fba7aa349ec90 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 00:03:59 +0000
Subject: [PATCH 3250/4650] [2021-08-20T00:03:59+0000] e2e test


From de90272fc7b5ddaf9549d51a84937fd806b656e8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 01:21:52 +0000
Subject: [PATCH 3251/4650] [2021-08-20T01:21:52+0000] e2e test


From ebf04d6883149b9df84340da7c06d1a4d344d0ed Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 02:10:32 +0000
Subject: [PATCH 3252/4650] [2021-08-20T02:10:32+0000] e2e test


From 115b0f9a77ce4b1d6118ec178307437ac2852208 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 03:02:32 +0000
Subject: [PATCH 3253/4650] [2021-08-20T03:02:31+0000] e2e test


From eeb40976cc75dcd446b63912278db8e37f63081d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 04:02:32 +0000
Subject: [PATCH 3254/4650] [2021-08-20T04:02:32+0000] e2e test


From 442d594ddd08b7b06b67185df8b81110d1766826 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 05:02:32 +0000
Subject: [PATCH 3255/4650] [2021-08-20T05:02:32+0000] e2e test


From 472a5f4e24b7476914be10561e62bd0b3501e40c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 06:02:49 +0000
Subject: [PATCH 3256/4650] [2021-08-20T06:02:48+0000] e2e test


From 83fe688b2c23bbc27c094f07b15c7d5867148617 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 07:02:30 +0000
Subject: [PATCH 3257/4650] [2021-08-20T07:02:30+0000] e2e test


From 5b58df490f6f7725071d630c31f8ab96e32b08f7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 08:02:57 +0000
Subject: [PATCH 3258/4650] [2021-08-20T08:02:56+0000] e2e test


From 16733299cac5acb6aedc9eb27c84054e934498d8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 09:02:39 +0000
Subject: [PATCH 3259/4650] [2021-08-20T09:02:39+0000] e2e test


From 7ac6b80e1f9cd371b07106787b4c65e8e5f91298 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 10:02:37 +0000
Subject: [PATCH 3260/4650] [2021-08-20T10:02:37+0000] e2e test


From 8c2751e9fb31fb217fcbcd78fbd7ec4e70d53b90 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 11:02:28 +0000
Subject: [PATCH 3261/4650] [2021-08-20T11:02:28+0000] e2e test


From bb5ca26ecded7b37609d9e48ed6c500a0c1e7e21 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 12:02:55 +0000
Subject: [PATCH 3262/4650] [2021-08-20T12:02:55+0000] e2e test


From 7181b2c85d23dd22437420359e55bd396bf0a11d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 13:07:11 +0000
Subject: [PATCH 3263/4650] [2021-08-20T13:07:11+0000] e2e test


From 72c3d6121978e5e8c63fd21f5d64a3d284d94144 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 14:02:26 +0000
Subject: [PATCH 3264/4650] [2021-08-20T14:02:26+0000] e2e test


From 3a62afee1d6b8b68e850204ea443d9c432739be6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 15:02:25 +0000
Subject: [PATCH 3265/4650] [2021-08-20T15:02:25+0000] e2e test


From b3f609a4d9640f454573fd4cd9ade35cd85c6ca2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 16:02:36 +0000
Subject: [PATCH 3266/4650] [2021-08-20T16:02:36+0000] e2e test


From 9faa7e5f4497800d4e61d5e0b1d2192f50b1ef22 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 17:06:27 +0000
Subject: [PATCH 3267/4650] [2021-08-20T17:06:27+0000] e2e test


From 6143f604dc794202e6af69564ac3b1193e5930d2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 18:02:32 +0000
Subject: [PATCH 3268/4650] [2021-08-20T18:02:32+0000] e2e test


From c1018556e001c245f07afbcd3c97b1480583e900 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 19:02:19 +0000
Subject: [PATCH 3269/4650] [2021-08-20T19:02:19+0000] e2e test


From 22c2e11a0ba0d3f4af12cef7b8a620f6f0ad0665 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 20:02:29 +0000
Subject: [PATCH 3270/4650] [2021-08-20T20:02:28+0000] e2e test


From b247404b951774eac7fcd844346460c62f139ef2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 21:02:28 +0000
Subject: [PATCH 3271/4650] [2021-08-20T21:02:28+0000] e2e test


From 44a902919a5a2fe25acedff1cf88494663204408 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 22:02:45 +0000
Subject: [PATCH 3272/4650] [2021-08-20T22:02:45+0000] e2e test


From 9fbd5df4626ba67901c51c87fd4a63ccd76652b8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 20 Aug 2021 23:02:46 +0000
Subject: [PATCH 3273/4650] [2021-08-20T23:02:46+0000] e2e test


From b811bdd12e117a7737ec9e7d4423fbb2613aebc3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 00:04:07 +0000
Subject: [PATCH 3274/4650] [2021-08-21T00:04:07+0000] e2e test


From 48d6f349a7a3621f9ac04b2ab0ea511e44147908 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 01:21:49 +0000
Subject: [PATCH 3275/4650] [2021-08-21T01:21:49+0000] e2e test


From a7603e03a95c7758ec3dee96f174d19a868771aa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 02:12:43 +0000
Subject: [PATCH 3276/4650] [2021-08-21T02:12:43+0000] e2e test


From 5a9b7ca628fbeee588a9d007bbcb265f98ad4cd4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 03:02:37 +0000
Subject: [PATCH 3277/4650] [2021-08-21T03:02:36+0000] e2e test


From d320489ac96318e9f8451f44770bc293a5efe6da Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 04:02:42 +0000
Subject: [PATCH 3278/4650] [2021-08-21T04:02:41+0000] e2e test


From a812ceb17398be044a2899f7d034b1a15c1915cc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 05:02:15 +0000
Subject: [PATCH 3279/4650] [2021-08-21T05:02:15+0000] e2e test


From a264247f2c3c0f8352e48963f14552c5c977d4ab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 06:02:44 +0000
Subject: [PATCH 3280/4650] [2021-08-21T06:02:43+0000] e2e test


From 1186f6e39aa22da62e40c09c70a33b58e5560029 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 07:02:27 +0000
Subject: [PATCH 3281/4650] [2021-08-21T07:02:27+0000] e2e test


From 7e915528323eaff1e7a1ec088da8559a28ecc944 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 08:02:41 +0000
Subject: [PATCH 3282/4650] [2021-08-21T08:02:41+0000] e2e test


From c9905ea8706262a4969a03fea1602ccf2c4505f9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 09:02:29 +0000
Subject: [PATCH 3283/4650] [2021-08-21T09:02:28+0000] e2e test


From 625a942502ae3dc7bde6a85620fdf147a2ac98c2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 10:02:52 +0000
Subject: [PATCH 3284/4650] [2021-08-21T10:02:51+0000] e2e test


From ea22bc0057b5f31a407bb356b34a39f1cdaff8e9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 11:02:17 +0000
Subject: [PATCH 3285/4650] [2021-08-21T11:02:17+0000] e2e test


From 3404a381aeb7bf2dbaacdbe127dbe6b29d52be6c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 12:02:41 +0000
Subject: [PATCH 3286/4650] [2021-08-21T12:02:41+0000] e2e test


From 9c2b8d6753f9501a3e390151ea65ef6133e98e0b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 13:06:06 +0000
Subject: [PATCH 3287/4650] [2021-08-21T13:06:05+0000] e2e test


From 2cc029ce76cc7ff53061a6fa082892fb990038bf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 14:02:28 +0000
Subject: [PATCH 3288/4650] [2021-08-21T14:02:28+0000] e2e test


From 9d8dc22e46612a07ea4f431dfcfbe639476b29de Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 15:02:36 +0000
Subject: [PATCH 3289/4650] [2021-08-21T15:02:36+0000] e2e test


From df4418e1f704a550192072c9f7f91ec3c96d7d6c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 16:02:38 +0000
Subject: [PATCH 3290/4650] [2021-08-21T16:02:37+0000] e2e test


From b5b920db95681128ef9b04e93f226ca9e3520837 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 17:05:44 +0000
Subject: [PATCH 3291/4650] [2021-08-21T17:05:44+0000] e2e test


From d74ac0e1b45e6ede33720418a8200f653c346743 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 18:02:30 +0000
Subject: [PATCH 3292/4650] [2021-08-21T18:02:30+0000] e2e test


From 28991cb9f04d0056b85798ce0734c730e9a8f717 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 19:02:22 +0000
Subject: [PATCH 3293/4650] [2021-08-21T19:02:22+0000] e2e test


From 6d6c5430a477f3dded5f99a66a87fcba8b58313f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 20:02:38 +0000
Subject: [PATCH 3294/4650] [2021-08-21T20:02:38+0000] e2e test


From ae812c42e2051ca56e1018bb0b6d3724ce287645 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 21:02:31 +0000
Subject: [PATCH 3295/4650] [2021-08-21T21:02:31+0000] e2e test


From b24bae4887c8466262245706b06adce6d74cc415 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 22:02:43 +0000
Subject: [PATCH 3296/4650] [2021-08-21T22:02:43+0000] e2e test


From 7da23d6d7c831fb48682ea87990780eb87bd94ff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 21 Aug 2021 23:02:35 +0000
Subject: [PATCH 3297/4650] [2021-08-21T23:02:35+0000] e2e test


From ce2fc22e3d62908905ec5d3d792f7872bb10a410 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 00:04:32 +0000
Subject: [PATCH 3298/4650] [2021-08-22T00:04:32+0000] e2e test


From cb555337124577e71a01b35d3559a71f4024f4b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 01:22:08 +0000
Subject: [PATCH 3299/4650] [2021-08-22T01:22:08+0000] e2e test


From 1ca15d8e577aa1f7a7498cdfac6dfd8b3186b836 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 02:10:29 +0000
Subject: [PATCH 3300/4650] [2021-08-22T02:10:29+0000] e2e test


From 5d7e7744de7bfb896e92222f23b8b0128de52868 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 03:02:36 +0000
Subject: [PATCH 3301/4650] [2021-08-22T03:02:36+0000] e2e test


From 8495c2dd6c5815208a86cfa5c022cb8d2b7b79f5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 04:02:32 +0000
Subject: [PATCH 3302/4650] [2021-08-22T04:02:32+0000] e2e test


From 78ab413e7ec938ab392b85662d9a860b7e728669 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 05:02:23 +0000
Subject: [PATCH 3303/4650] [2021-08-22T05:02:23+0000] e2e test


From 55be852ce0dcfaa94a862927bb52a1e687bc85a4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 06:02:51 +0000
Subject: [PATCH 3304/4650] [2021-08-22T06:02:51+0000] e2e test


From 37d87c9920d7d52d8af8a686d36ec93ab2d5c5fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 07:02:27 +0000
Subject: [PATCH 3305/4650] [2021-08-22T07:02:27+0000] e2e test


From 4584fa058e97d182b6f56c9a066a62eff6e68088 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 08:02:41 +0000
Subject: [PATCH 3306/4650] [2021-08-22T08:02:41+0000] e2e test


From a3e377992243f5611d643004980f9ffa93ffea29 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 09:02:27 +0000
Subject: [PATCH 3307/4650] [2021-08-22T09:02:27+0000] e2e test


From be13e77d243830ee2a2c6b3d749302fb59d11b0c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 10:02:33 +0000
Subject: [PATCH 3308/4650] [2021-08-22T10:02:33+0000] e2e test


From ea6ff59ca3023c6dbcbf247422e4f522ee14e22d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 11:02:19 +0000
Subject: [PATCH 3309/4650] [2021-08-22T11:02:19+0000] e2e test


From 3ec2f30712c6928677faf7f3523730b14a4e9d68 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 12:02:54 +0000
Subject: [PATCH 3310/4650] [2021-08-22T12:02:53+0000] e2e test


From 376a2a2f06c61df4e70387b1ac54bac427b4e103 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 13:06:24 +0000
Subject: [PATCH 3311/4650] [2021-08-22T13:06:24+0000] e2e test


From 3546f9fe4c1ad64dec194f3d94d8d1790ed12125 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 14:02:22 +0000
Subject: [PATCH 3312/4650] [2021-08-22T14:02:22+0000] e2e test


From 8b53f841c6d624bb314c72f5e01b42ebb7a01d69 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 15:02:27 +0000
Subject: [PATCH 3313/4650] [2021-08-22T15:02:27+0000] e2e test


From da6d71cf886f40839534287e0292a7611d679adb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 16:02:37 +0000
Subject: [PATCH 3314/4650] [2021-08-22T16:02:37+0000] e2e test


From a871bc7ae4e44a00247d23d8e9c9bc3efdc3c024 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 17:05:43 +0000
Subject: [PATCH 3315/4650] [2021-08-22T17:05:43+0000] e2e test


From 751515ea9988f4823713bea22a74a211be67c58f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 18:02:27 +0000
Subject: [PATCH 3316/4650] [2021-08-22T18:02:26+0000] e2e test


From 8d3e283d4834051ea1ebe403077603a2c706fa1c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 19:02:14 +0000
Subject: [PATCH 3317/4650] [2021-08-22T19:02:14+0000] e2e test


From ddc747a8eb714766652581d34409ddaffe513ae0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 20:02:30 +0000
Subject: [PATCH 3318/4650] [2021-08-22T20:02:30+0000] e2e test


From 63739c1e3a64ad8b51c959914bf5e29b2436e2c1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 21:02:40 +0000
Subject: [PATCH 3319/4650] [2021-08-22T21:02:40+0000] e2e test


From 49e450421e036e9bcba53f15708158b8e77341dc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 22:02:27 +0000
Subject: [PATCH 3320/4650] [2021-08-22T22:02:26+0000] e2e test


From 4d99cb2bdcabf532685e18a5d328808cba290f37 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 22 Aug 2021 23:02:23 +0000
Subject: [PATCH 3321/4650] [2021-08-22T23:02:23+0000] e2e test


From 8bb34180d35679d4f0146794fd50010ebabb606f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 00:04:51 +0000
Subject: [PATCH 3322/4650] [2021-08-23T00:04:51+0000] e2e test


From 499ed4f437991033d709bb9112ced2a196afda69 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 01:19:57 +0000
Subject: [PATCH 3323/4650] [2021-08-23T01:19:57+0000] e2e test


From 817893d413d3deae742f86f0742267af87de0952 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 02:10:23 +0000
Subject: [PATCH 3324/4650] [2021-08-23T02:10:23+0000] e2e test


From 14fe536d8da07cae5d326e85d00de913acdf35ca Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 03:02:29 +0000
Subject: [PATCH 3325/4650] [2021-08-23T03:02:29+0000] e2e test


From 19e39a86d644d7224afa107c4c67ca6af35423d9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 04:02:57 +0000
Subject: [PATCH 3326/4650] [2021-08-23T04:02:57+0000] e2e test


From 9d50b2fa71647bec1cee4b70860871bd906f8157 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 05:02:23 +0000
Subject: [PATCH 3327/4650] [2021-08-23T05:02:23+0000] e2e test


From 7baadb69a3933be3e7b59b368f2f1935e32f2bcf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 06:02:41 +0000
Subject: [PATCH 3328/4650] [2021-08-23T06:02:40+0000] e2e test


From 03d1c24a577bb0b44616dfd3a2b39da6f6f49a99 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 07:02:25 +0000
Subject: [PATCH 3329/4650] [2021-08-23T07:02:24+0000] e2e test


From afa9018013de4a7680151ff9eb34689fbdfb08cc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 08:03:03 +0000
Subject: [PATCH 3330/4650] [2021-08-23T08:03:03+0000] e2e test


From f6288a542d61ef4ff1ec7eb1f6b5488525f9984c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 09:02:37 +0000
Subject: [PATCH 3331/4650] [2021-08-23T09:02:37+0000] e2e test


From 2296aac2018526f3693a4fbea0ce63a82bbab1b5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 10:02:37 +0000
Subject: [PATCH 3332/4650] [2021-08-23T10:02:36+0000] e2e test


From d44716710385abe54e0870ac8e86eead46d84288 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 11:02:40 +0000
Subject: [PATCH 3333/4650] [2021-08-23T11:02:39+0000] e2e test


From 2c1351b2053963ebbc718f3871e8d475320fb017 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 12:02:52 +0000
Subject: [PATCH 3334/4650] [2021-08-23T12:02:52+0000] e2e test


From 2828614316e103e07eac87e704420e6f51c0f0a7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 13:06:42 +0000
Subject: [PATCH 3335/4650] [2021-08-23T13:06:42+0000] e2e test


From 318c33e8d59e88e11b39d9556578688492d9e61a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 14:02:31 +0000
Subject: [PATCH 3336/4650] [2021-08-23T14:02:31+0000] e2e test


From 238a4df82ca52cdbd64dcfe49aae89225c2d214e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 15:02:48 +0000
Subject: [PATCH 3337/4650] [2021-08-23T15:02:48+0000] e2e test


From ff9ebcf7ecbd304975b1124a9029054f1f791f34 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 16:02:46 +0000
Subject: [PATCH 3338/4650] [2021-08-23T16:02:46+0000] e2e test


From 5210db24ad0817e149e09dc697cfdc8ff4250cbd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 17:05:23 +0000
Subject: [PATCH 3339/4650] [2021-08-23T17:05:23+0000] e2e test


From 31934d025aa04f1c013b37da5730ad88b1c30248 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 18:02:41 +0000
Subject: [PATCH 3340/4650] [2021-08-23T18:02:41+0000] e2e test


From 20b08ddd6b1c5b2c9e8cb590c93982fe63868db0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 19:02:21 +0000
Subject: [PATCH 3341/4650] [2021-08-23T19:02:21+0000] e2e test


From 02852a669a1bc88483b29c81d728c0237d815604 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 20:02:44 +0000
Subject: [PATCH 3342/4650] [2021-08-23T20:02:44+0000] e2e test


From 708d3471b0040f4166e6e9b2858da0c8937df2f6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 21:02:26 +0000
Subject: [PATCH 3343/4650] [2021-08-23T21:02:26+0000] e2e test


From 97cd8080b7d0723e9832be424849f5699f1d1a87 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 22:02:34 +0000
Subject: [PATCH 3344/4650] [2021-08-23T22:02:33+0000] e2e test


From 329743706b92b631b6aa42aca615bb066e7deb8a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 23 Aug 2021 23:02:32 +0000
Subject: [PATCH 3345/4650] [2021-08-23T23:02:32+0000] e2e test


From 5e64bada3d8931de3270fa6633a02b4ab89941ef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 00:04:06 +0000
Subject: [PATCH 3346/4650] [2021-08-24T00:04:06+0000] e2e test


From b5bb0131350373368b8755a0b1120b000e0a853b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 01:21:31 +0000
Subject: [PATCH 3347/4650] [2021-08-24T01:21:31+0000] e2e test


From 0bf635de0a04bfb3b8d274118b927cfffb3ff0a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 02:10:01 +0000
Subject: [PATCH 3348/4650] [2021-08-24T02:10:01+0000] e2e test


From 39441e4948446e925cc9c1c4fc86e2871ed46ab1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 03:02:42 +0000
Subject: [PATCH 3349/4650] [2021-08-24T03:02:42+0000] e2e test


From 4e37920cd34423e7cd2d3665964c3a2ddd15f6fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 04:02:46 +0000
Subject: [PATCH 3350/4650] [2021-08-24T04:02:46+0000] e2e test


From 9fa548153b6f1bccc84c2aefeacff0b8ab4be4fe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 05:02:25 +0000
Subject: [PATCH 3351/4650] [2021-08-24T05:02:25+0000] e2e test


From 236bb7aca7058b4b772dc926e7b46089d23efb0a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 06:02:50 +0000
Subject: [PATCH 3352/4650] [2021-08-24T06:02:50+0000] e2e test


From 6c6dc48d71c351f3489933557b2fa42314376332 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 07:02:31 +0000
Subject: [PATCH 3353/4650] [2021-08-24T07:02:31+0000] e2e test


From c831ceced34f06122c1f93f9f5f7635f7c17df3a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 08:02:55 +0000
Subject: [PATCH 3354/4650] [2021-08-24T08:02:55+0000] e2e test


From 743c37db68252d4b4629aea35b2598389d8758a9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 09:02:28 +0000
Subject: [PATCH 3355/4650] [2021-08-24T09:02:28+0000] e2e test


From e35c07f4b0956020e135cf35f750e48c575a6162 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 10:02:46 +0000
Subject: [PATCH 3356/4650] [2021-08-24T10:02:45+0000] e2e test


From 6324d6b9383b6c45edf60c868d3488197d9bcdf2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 11:02:26 +0000
Subject: [PATCH 3357/4650] [2021-08-24T11:02:26+0000] e2e test


From 3131aa8f896978ea7a8c875a1341b4395752dd62 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 12:02:46 +0000
Subject: [PATCH 3358/4650] [2021-08-24T12:02:46+0000] e2e test


From 8e430519c254759313d9df11b731ef44031f6a8a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 13:06:18 +0000
Subject: [PATCH 3359/4650] [2021-08-24T13:06:18+0000] e2e test


From 873370221b984abce2503ed154fd0154c836accc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 14:02:33 +0000
Subject: [PATCH 3360/4650] [2021-08-24T14:02:33+0000] e2e test


From 5cf1846444cb365c88a695e8052789179d299318 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 15:02:23 +0000
Subject: [PATCH 3361/4650] [2021-08-24T15:02:23+0000] e2e test


From 603ee4e3ed9fcecab57dcff9ce710997879a954c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 16:02:31 +0000
Subject: [PATCH 3362/4650] [2021-08-24T16:02:31+0000] e2e test


From 2d9b5326b786fa31f9730c2632244312bc2c31a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 17:06:46 +0000
Subject: [PATCH 3363/4650] [2021-08-24T17:06:46+0000] e2e test


From 47a4074216156e2037b873d2fede39257742ff96 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 18:02:41 +0000
Subject: [PATCH 3364/4650] [2021-08-24T18:02:41+0000] e2e test


From d875932758e81a2e4338369e2def4d9f97052b01 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 19:02:26 +0000
Subject: [PATCH 3365/4650] [2021-08-24T19:02:26+0000] e2e test


From ccdda6009c7dbf27ff0c1dbf34cadb6430decca0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 20:02:37 +0000
Subject: [PATCH 3366/4650] [2021-08-24T20:02:37+0000] e2e test


From b5d111e0f22128bb23fd8c162960d4e020343798 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 21:02:20 +0000
Subject: [PATCH 3367/4650] [2021-08-24T21:02:20+0000] e2e test


From 0700ce2c24dfdac3446694c50a89ba88c875dca8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 22:02:30 +0000
Subject: [PATCH 3368/4650] [2021-08-24T22:02:30+0000] e2e test


From f3aa8875cb20ce51457f98a6c1272dc988310d76 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 24 Aug 2021 23:02:43 +0000
Subject: [PATCH 3369/4650] [2021-08-24T23:02:43+0000] e2e test


From 9880e31cb3436a54e32db354f8e7b8cbd7c5f4d7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 00:04:28 +0000
Subject: [PATCH 3370/4650] [2021-08-25T00:04:27+0000] e2e test


From acfc0fb4ecb8a4b5c74c53ec5b9195116b2e7d11 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 01:22:18 +0000
Subject: [PATCH 3371/4650] [2021-08-25T01:22:18+0000] e2e test


From 7b123188884cda5624bfe7ac27ec0135c4d64e0e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 02:10:33 +0000
Subject: [PATCH 3372/4650] [2021-08-25T02:10:33+0000] e2e test


From 31bd547084520414702037754afe94386bc54b0a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 03:02:32 +0000
Subject: [PATCH 3373/4650] [2021-08-25T03:02:32+0000] e2e test


From e08b78793ca6a4a8e7bb892cc9084204c207a716 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 04:02:29 +0000
Subject: [PATCH 3374/4650] [2021-08-25T04:02:29+0000] e2e test


From 37531f32ea183ce2d2ef8b170f10cdd004c438bf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 05:02:24 +0000
Subject: [PATCH 3375/4650] [2021-08-25T05:02:24+0000] e2e test


From 0eba17d86291c87d2ae3408dbf37e066c6bd18bd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 06:02:49 +0000
Subject: [PATCH 3376/4650] [2021-08-25T06:02:49+0000] e2e test


From 4a0266f70daf32a0836d333c77ce8a2d26057212 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 07:02:26 +0000
Subject: [PATCH 3377/4650] [2021-08-25T07:02:26+0000] e2e test


From 645631149bd8a9b5e91151a9678bd78511e6c502 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 08:02:51 +0000
Subject: [PATCH 3378/4650] [2021-08-25T08:02:51+0000] e2e test


From 9ad9ca13583cb9a5b8807463e878782a39ddff59 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 09:02:41 +0000
Subject: [PATCH 3379/4650] [2021-08-25T09:02:41+0000] e2e test


From 481e92aea4224afee72d26d551dde1468db66bdb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 10:02:25 +0000
Subject: [PATCH 3380/4650] [2021-08-25T10:02:25+0000] e2e test


From 66e45c6def593edcb7bdb3c4031e2f193f46b41f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 11:02:33 +0000
Subject: [PATCH 3381/4650] [2021-08-25T11:02:33+0000] e2e test


From 8448db1ffb3a48d2f6c1385daa8351c5e0f9b8a4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 12:03:05 +0000
Subject: [PATCH 3382/4650] [2021-08-25T12:03:05+0000] e2e test


From a00d071ed2c679f1f9b87975630e47399a45098e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 13:06:39 +0000
Subject: [PATCH 3383/4650] [2021-08-25T13:06:39+0000] e2e test


From b8e1d56e15d7ecac6bb45c522727a219b4a88a18 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 14:02:44 +0000
Subject: [PATCH 3384/4650] [2021-08-25T14:02:44+0000] e2e test


From fea315aa578740a9b8894bbc92d83121f153522f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 15:02:43 +0000
Subject: [PATCH 3385/4650] [2021-08-25T15:02:43+0000] e2e test


From e3860bf8db688e2f8367add60a8e0128d796a184 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 16:02:40 +0000
Subject: [PATCH 3386/4650] [2021-08-25T16:02:40+0000] e2e test


From 2ce96c2fa9f97b8f2977fb4d74488aa27a73c17b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 17:06:50 +0000
Subject: [PATCH 3387/4650] [2021-08-25T17:06:50+0000] e2e test


From 0dbd17163640ab52c93f3f39752465309bacb786 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 18:02:31 +0000
Subject: [PATCH 3388/4650] [2021-08-25T18:02:31+0000] e2e test


From ff2964977c41772b6d98640ddab18202e5d4b893 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 19:02:27 +0000
Subject: [PATCH 3389/4650] [2021-08-25T19:02:27+0000] e2e test


From e0375404a9991847b14161f494167b295eea0ea6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 20:02:32 +0000
Subject: [PATCH 3390/4650] [2021-08-25T20:02:32+0000] e2e test


From a49376b2ea9ba841194dd2aa6923a1b1623bbbe5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 21:02:24 +0000
Subject: [PATCH 3391/4650] [2021-08-25T21:02:23+0000] e2e test


From 7c904180461b77fd24b21d890ab6dbff2549b40c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 22:02:32 +0000
Subject: [PATCH 3392/4650] [2021-08-25T22:02:32+0000] e2e test


From 8b26ff99e35087352861b84970ae7548c77ae1c2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 25 Aug 2021 23:02:38 +0000
Subject: [PATCH 3393/4650] [2021-08-25T23:02:38+0000] e2e test


From cad6c491a0d40a3a1caf0d62663f2dc6b13d1739 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 00:04:18 +0000
Subject: [PATCH 3394/4650] [2021-08-26T00:04:18+0000] e2e test


From 155749ea6431e4ad3352d1d7ade4c6d267de47b3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 01:21:38 +0000
Subject: [PATCH 3395/4650] [2021-08-26T01:21:38+0000] e2e test


From 2d0eb13426b0ee784fafc399c646064986ea632f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 02:10:08 +0000
Subject: [PATCH 3396/4650] [2021-08-26T02:10:08+0000] e2e test


From 7eb1df3294eb8c77f3f2674a7e3b704e13297e60 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 03:02:37 +0000
Subject: [PATCH 3397/4650] [2021-08-26T03:02:37+0000] e2e test


From 95e86a34d8b12321d99137f2f3661b5e4371f87e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 04:02:46 +0000
Subject: [PATCH 3398/4650] [2021-08-26T04:02:46+0000] e2e test


From 8b189099f9f36f42e3ffdb6bb6a233328f5e6c6d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 05:02:28 +0000
Subject: [PATCH 3399/4650] [2021-08-26T05:02:27+0000] e2e test


From f28ebefc4a0857e25acdcb886d9dce95a779182e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 06:02:54 +0000
Subject: [PATCH 3400/4650] [2021-08-26T06:02:54+0000] e2e test


From fb922bb6b7b8db4177de5a34e372aa8d4b569817 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 07:02:26 +0000
Subject: [PATCH 3401/4650] [2021-08-26T07:02:25+0000] e2e test


From 4b42aeeac41c7f61c8be531a34dceaac70425028 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 08:02:43 +0000
Subject: [PATCH 3402/4650] [2021-08-26T08:02:43+0000] e2e test


From 8ba834f9a187eed38e158dbf8051a57e8ec8bc09 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 09:02:29 +0000
Subject: [PATCH 3403/4650] [2021-08-26T09:02:29+0000] e2e test


From 4e19751db4e846bd4d43f72469dcf8aa2ab218b1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 10:02:41 +0000
Subject: [PATCH 3404/4650] [2021-08-26T10:02:41+0000] e2e test


From aa32b6bf25139172c2311254f5a0d87ecf77d7ad Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 11:02:32 +0000
Subject: [PATCH 3405/4650] [2021-08-26T11:02:32+0000] e2e test


From df779a3136aa40c29c19a6c09cd58f76094b552a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 12:03:02 +0000
Subject: [PATCH 3406/4650] [2021-08-26T12:03:02+0000] e2e test


From 3c66bce7b025bf8ae6e0bb77906158c04392720d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 13:06:50 +0000
Subject: [PATCH 3407/4650] [2021-08-26T13:06:50+0000] e2e test


From c81e3bee54e2f5e83e82666029e5f3ebe3fcb548 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 14:02:25 +0000
Subject: [PATCH 3408/4650] [2021-08-26T14:02:25+0000] e2e test


From 8bb854d83ede2fbc186616c4c30d98699f230594 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 15:02:45 +0000
Subject: [PATCH 3409/4650] [2021-08-26T15:02:45+0000] e2e test


From acf4480e19f82ab6da26d863c3d44f234e57064b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 16:02:50 +0000
Subject: [PATCH 3410/4650] [2021-08-26T16:02:49+0000] e2e test


From 61cadd1a599c89e7f00bbfd5156789e1966c477e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 17:07:05 +0000
Subject: [PATCH 3411/4650] [2021-08-26T17:07:05+0000] e2e test


From 6e617e73cd1ea12b28ef528c8eb56dac77f15e54 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 18:02:31 +0000
Subject: [PATCH 3412/4650] [2021-08-26T18:02:30+0000] e2e test


From f0b4f1738ca0ef5d3e795eb976ade8d8ddbaf208 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 19:02:35 +0000
Subject: [PATCH 3413/4650] [2021-08-26T19:02:35+0000] e2e test


From 219e60df29137a36194c314212b4182df574dd4c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 20:02:29 +0000
Subject: [PATCH 3414/4650] [2021-08-26T20:02:29+0000] e2e test


From b47eba1245cfbea872d8487f5d150f76e66fbb8a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 21:02:20 +0000
Subject: [PATCH 3415/4650] [2021-08-26T21:02:20+0000] e2e test


From d4f561050b98fe9b28a28a99a25ca6c0c9c3516f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 22:02:49 +0000
Subject: [PATCH 3416/4650] [2021-08-26T22:02:49+0000] e2e test


From b2e376303aa3e612a74c9dc451186a8c91086490 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 26 Aug 2021 23:02:22 +0000
Subject: [PATCH 3417/4650] [2021-08-26T23:02:22+0000] e2e test


From 71a04d90ceb53be085240bcb492b473c4df6f71e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 00:04:18 +0000
Subject: [PATCH 3418/4650] [2021-08-27T00:04:17+0000] e2e test


From 961a75d5d6b2109b6e158578eeae6bf8cdc90baf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 01:24:28 +0000
Subject: [PATCH 3419/4650] [2021-08-27T01:24:28+0000] e2e test


From ce5615c455518d0e73a449e1712ee407378d7e3d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 02:13:26 +0000
Subject: [PATCH 3420/4650] [2021-08-27T02:13:26+0000] e2e test


From 91bfe258403b681005b27eab0a3d5fb71246dbfd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 03:02:35 +0000
Subject: [PATCH 3421/4650] [2021-08-27T03:02:34+0000] e2e test


From cc274b2a15d0a912e975301d2d4b8a9c200e800b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 04:02:40 +0000
Subject: [PATCH 3422/4650] [2021-08-27T04:02:40+0000] e2e test


From 7bfa8ce0efdf5cd165cb226173abd19377973d2a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 05:02:21 +0000
Subject: [PATCH 3423/4650] [2021-08-27T05:02:20+0000] e2e test


From 54670658d840886ef1f343fe00e2379611511344 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 06:02:50 +0000
Subject: [PATCH 3424/4650] [2021-08-27T06:02:50+0000] e2e test


From bc9fdec4bce5ec6f4685f7ce089f72f11df3a659 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 07:02:23 +0000
Subject: [PATCH 3425/4650] [2021-08-27T07:02:23+0000] e2e test


From b4025dedf6fa1eb918300a16ffa960ddc19655b5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 08:02:42 +0000
Subject: [PATCH 3426/4650] [2021-08-27T08:02:41+0000] e2e test


From 84b56430b4fabaa4d25e8bb0114257941739d8d5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 09:02:35 +0000
Subject: [PATCH 3427/4650] [2021-08-27T09:02:34+0000] e2e test


From 8378cee3a889c0b67e820d8f85bbe5435d38b09f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 10:02:40 +0000
Subject: [PATCH 3428/4650] [2021-08-27T10:02:39+0000] e2e test


From 6dc8ef452b7484eb951acdb3360237a8318cbdea Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 11:02:39 +0000
Subject: [PATCH 3429/4650] [2021-08-27T11:02:39+0000] e2e test


From 08f5f2dab1e55e2883e52641487aaa17c29f5355 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 12:02:46 +0000
Subject: [PATCH 3430/4650] [2021-08-27T12:02:46+0000] e2e test


From 51592937a20d3261f8c6f34504272c0210bfe8a9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 13:06:33 +0000
Subject: [PATCH 3431/4650] [2021-08-27T13:06:33+0000] e2e test


From 8b8aa299292c2b00f56df67fcb7855ab8f0c0f90 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 14:02:41 +0000
Subject: [PATCH 3432/4650] [2021-08-27T14:02:40+0000] e2e test


From f1a62b500ec61433d88c622d01501e3d7f1401b7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 15:02:32 +0000
Subject: [PATCH 3433/4650] [2021-08-27T15:02:32+0000] e2e test


From 5857d4a322ba7c8eb2702036242f8bc9d023a9e3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 16:02:38 +0000
Subject: [PATCH 3434/4650] [2021-08-27T16:02:38+0000] e2e test


From d0320c1949724d3c5e7bc655bf9322ca87c31db7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 17:06:24 +0000
Subject: [PATCH 3435/4650] [2021-08-27T17:06:24+0000] e2e test


From 54ec2e3815adc21a548a79db3beea1c15676b977 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 18:02:47 +0000
Subject: [PATCH 3436/4650] [2021-08-27T18:02:46+0000] e2e test


From acdf4b1b187f16850ee277b53093561eb90d8b8d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 19:02:21 +0000
Subject: [PATCH 3437/4650] [2021-08-27T19:02:20+0000] e2e test


From b4748b36d80a6a9480fed37b0f4519085e455e48 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 20:02:34 +0000
Subject: [PATCH 3438/4650] [2021-08-27T20:02:34+0000] e2e test


From 9bf9b6eb0415f6226d6dab79078a7dfb8afe9476 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 21:02:32 +0000
Subject: [PATCH 3439/4650] [2021-08-27T21:02:32+0000] e2e test


From e60744463c85f65a67bc70f6bb641a141b1c2053 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 22:02:26 +0000
Subject: [PATCH 3440/4650] [2021-08-27T22:02:26+0000] e2e test


From 8331c3de2ad33caace1ad729c8255d0a814c7492 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 27 Aug 2021 23:02:20 +0000
Subject: [PATCH 3441/4650] [2021-08-27T23:02:20+0000] e2e test


From d40146450fc39ebc421e2c197976aa9e96eca312 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 00:04:15 +0000
Subject: [PATCH 3442/4650] [2021-08-28T00:04:15+0000] e2e test


From ae1086e56fd9916234ae68ee96d48fa29fb440c7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 01:20:39 +0000
Subject: [PATCH 3443/4650] [2021-08-28T01:20:39+0000] e2e test


From 2440a9189fc9edc41c8055c6fa7c0711df182253 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 02:11:49 +0000
Subject: [PATCH 3444/4650] [2021-08-28T02:11:49+0000] e2e test


From 1d479733870f13864dd163f04888d466eb0cfae1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 03:06:16 +0000
Subject: [PATCH 3445/4650] [2021-08-28T03:06:16+0000] e2e test


From 6860de82d12691b25d9801d7d8a6c50657f632f6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 04:02:38 +0000
Subject: [PATCH 3446/4650] [2021-08-28T04:02:38+0000] e2e test


From 8b27b7e4ef2d220d460c951b3ea622d3321e98e4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 05:02:23 +0000
Subject: [PATCH 3447/4650] [2021-08-28T05:02:23+0000] e2e test


From 971e9c63a5a2146918c1bde6a8ea2158e3a666b0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 06:02:53 +0000
Subject: [PATCH 3448/4650] [2021-08-28T06:02:53+0000] e2e test


From 94d3b258ef82ce63bc3c330ba6409f1a4a2da152 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 07:02:28 +0000
Subject: [PATCH 3449/4650] [2021-08-28T07:02:28+0000] e2e test


From e5bed0e0dc8d3e309f282c9b23c6c4ed55ed5012 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 08:02:37 +0000
Subject: [PATCH 3450/4650] [2021-08-28T08:02:36+0000] e2e test


From cc0fe1f5e776df911278512a425d1fc15a338bd4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 09:02:39 +0000
Subject: [PATCH 3451/4650] [2021-08-28T09:02:38+0000] e2e test


From 8f6e07981107ddb4eabf302e5d2eded041a6f91c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 10:02:48 +0000
Subject: [PATCH 3452/4650] [2021-08-28T10:02:48+0000] e2e test


From 4ddc90bd63205b1ba92d3a7fc86e5e4eb3c84d3b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 11:02:30 +0000
Subject: [PATCH 3453/4650] [2021-08-28T11:02:30+0000] e2e test


From f34d2960a3a5e5b51047e842da0e753c3a277b68 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 12:02:33 +0000
Subject: [PATCH 3454/4650] [2021-08-28T12:02:33+0000] e2e test


From fe94f6b779e7f5a7b4e49b983ff674f035b15626 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 13:05:29 +0000
Subject: [PATCH 3455/4650] [2021-08-28T13:05:29+0000] e2e test


From 0c7ed7c879d05b9c7eaf98ae0347fe47ab36e839 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 14:02:33 +0000
Subject: [PATCH 3456/4650] [2021-08-28T14:02:33+0000] e2e test


From 44c3a524a5917301bb1aa4875d1ab41c70d00904 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 15:02:42 +0000
Subject: [PATCH 3457/4650] [2021-08-28T15:02:42+0000] e2e test


From 02f53e8f4b0fce8260a30aba2fcba96d4599034a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 16:02:54 +0000
Subject: [PATCH 3458/4650] [2021-08-28T16:02:54+0000] e2e test


From 04387cd601c14f468cf3bd257bef32c53fd331fe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 17:05:42 +0000
Subject: [PATCH 3459/4650] [2021-08-28T17:05:42+0000] e2e test


From 1791d88fef6a88f20627a25058a9fee643a43544 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 18:02:27 +0000
Subject: [PATCH 3460/4650] [2021-08-28T18:02:27+0000] e2e test


From fd3cd196196dc7e9045472fe3ac2499acd845ac9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 19:02:22 +0000
Subject: [PATCH 3461/4650] [2021-08-28T19:02:22+0000] e2e test


From dcbb20b0269bdec3a8131702a6e57a5992b5fe93 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 20:02:43 +0000
Subject: [PATCH 3462/4650] [2021-08-28T20:02:43+0000] e2e test


From b31fb9801f26fb73a8b942a870dc82fd3370ee80 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 21:02:45 +0000
Subject: [PATCH 3463/4650] [2021-08-28T21:02:45+0000] e2e test


From 4df5b5770aca93a0863193b26b42dd3258739b3c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 22:02:41 +0000
Subject: [PATCH 3464/4650] [2021-08-28T22:02:41+0000] e2e test


From a3a2ba3ef8a7878f3514490711694cbde8b1a453 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 28 Aug 2021 23:02:29 +0000
Subject: [PATCH 3465/4650] [2021-08-28T23:02:29+0000] e2e test


From 82ec196b2d6f733f6585a3dea7255bb7df427ad0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 00:04:44 +0000
Subject: [PATCH 3466/4650] [2021-08-29T00:04:44+0000] e2e test


From 8a101c082ddb7d2e3175719b63ca04b38b112efc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 01:23:49 +0000
Subject: [PATCH 3467/4650] [2021-08-29T01:23:49+0000] e2e test


From cb2833fc053d47df9a59bb5a6e429c7b06725f75 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 02:11:13 +0000
Subject: [PATCH 3468/4650] [2021-08-29T02:11:13+0000] e2e test


From 6610fb016f96ad463e21b700fcc2513174c69998 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 03:02:42 +0000
Subject: [PATCH 3469/4650] [2021-08-29T03:02:42+0000] e2e test


From 80167923425f14341455ceab900bd6902f9329f4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 04:02:37 +0000
Subject: [PATCH 3470/4650] [2021-08-29T04:02:37+0000] e2e test


From 59ade703c0600ccb405ec058f3ad18568fd10d91 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 05:02:51 +0000
Subject: [PATCH 3471/4650] [2021-08-29T05:02:51+0000] e2e test


From 585d806b4fd82687287af8a632755e5060139333 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 06:02:38 +0000
Subject: [PATCH 3472/4650] [2021-08-29T06:02:38+0000] e2e test


From 21626b91b96a547f757dea9337a7780ee3f9ec6b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 07:02:38 +0000
Subject: [PATCH 3473/4650] [2021-08-29T07:02:38+0000] e2e test


From 876e1ba79c01dbb137004e0dce9f324b05b00c2f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 08:02:34 +0000
Subject: [PATCH 3474/4650] [2021-08-29T08:02:34+0000] e2e test


From f1f9f3440e93c214f7e61f5294cb813eb27a8579 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 09:02:40 +0000
Subject: [PATCH 3475/4650] [2021-08-29T09:02:40+0000] e2e test


From 5de5f75f4f909e6e9c2fb428c05061af189f8717 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 10:02:44 +0000
Subject: [PATCH 3476/4650] [2021-08-29T10:02:44+0000] e2e test


From 8959107a8aef1429ace27bf1a73dab90329ea9c1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 11:02:30 +0000
Subject: [PATCH 3477/4650] [2021-08-29T11:02:29+0000] e2e test


From 9c71b6e33d44c6e3b1f2bab713b7de162798ba84 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 12:03:03 +0000
Subject: [PATCH 3478/4650] [2021-08-29T12:03:03+0000] e2e test


From ab2907f180a025f6d5bacef5cc9a2ff28f2299cf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 13:05:25 +0000
Subject: [PATCH 3479/4650] [2021-08-29T13:05:24+0000] e2e test


From df6218737232f6ac6cebb412d543e4ed63668e6b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 14:02:28 +0000
Subject: [PATCH 3480/4650] [2021-08-29T14:02:28+0000] e2e test


From 5a3185c37780584082a402fa54eaaea1b6bd201c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 15:02:41 +0000
Subject: [PATCH 3481/4650] [2021-08-29T15:02:40+0000] e2e test


From 2d7138cacafdf7a76510b65a304e53b6ff29b357 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 16:02:34 +0000
Subject: [PATCH 3482/4650] [2021-08-29T16:02:34+0000] e2e test


From 771d41952d8f6badaff68ca61905249998b4e4e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 17:05:40 +0000
Subject: [PATCH 3483/4650] [2021-08-29T17:05:40+0000] e2e test


From 94f45c61b99b02f4b9b54bf1d3a724c456afc571 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 18:02:29 +0000
Subject: [PATCH 3484/4650] [2021-08-29T18:02:29+0000] e2e test


From 3bef5f1bd8faa2faffd3693025753b28589c92cb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 19:02:29 +0000
Subject: [PATCH 3485/4650] [2021-08-29T19:02:29+0000] e2e test


From 3f01a67771d93e8557eb53358551e8dc3587aef3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 20:02:51 +0000
Subject: [PATCH 3486/4650] [2021-08-29T20:02:51+0000] e2e test


From 27d895fadfe406780cd51fc8d14ac293b1d23147 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 21:02:34 +0000
Subject: [PATCH 3487/4650] [2021-08-29T21:02:34+0000] e2e test


From b3def2eaa5d2bded12afbcf5a8790596f4544738 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 22:02:40 +0000
Subject: [PATCH 3488/4650] [2021-08-29T22:02:39+0000] e2e test


From c7b8e15668d7ec63ed914f8c5a12dba2b2e57341 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 29 Aug 2021 23:02:43 +0000
Subject: [PATCH 3489/4650] [2021-08-29T23:02:43+0000] e2e test


From 6e27562163b71d0ff02016d8e8640237d2c14325 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 00:04:17 +0000
Subject: [PATCH 3490/4650] [2021-08-30T00:04:17+0000] e2e test


From bda2963cdb2b0dd107ab5c7ad2256a85571303ef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 01:22:31 +0000
Subject: [PATCH 3491/4650] [2021-08-30T01:22:31+0000] e2e test


From e65f5cb7fdb0efc46c5b4fb8d34659c1c620a00c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 02:10:16 +0000
Subject: [PATCH 3492/4650] [2021-08-30T02:10:16+0000] e2e test


From 66d25f74a5c56fd667f7653064a02df4dff2d3ec Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 03:02:31 +0000
Subject: [PATCH 3493/4650] [2021-08-30T03:02:31+0000] e2e test


From eae1a3638147baa8cb1f1d52620578ab38b1b054 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 04:02:39 +0000
Subject: [PATCH 3494/4650] [2021-08-30T04:02:39+0000] e2e test


From 4f45aa815c549c92039e3bae388e3d93582c9a7f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 05:02:29 +0000
Subject: [PATCH 3495/4650] [2021-08-30T05:02:29+0000] e2e test


From e607e769f4d0965a96cffbd57b9d2a34db7a81a3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 06:02:57 +0000
Subject: [PATCH 3496/4650] [2021-08-30T06:02:57+0000] e2e test


From a4dc76bbda6c233c098e4a4cca8245e50d889a52 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 07:02:24 +0000
Subject: [PATCH 3497/4650] [2021-08-30T07:02:24+0000] e2e test


From 9e98d63c316753060b78a8aef6c64b1df1ccfb40 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 08:02:58 +0000
Subject: [PATCH 3498/4650] [2021-08-30T08:02:58+0000] e2e test


From 8731251f2c4a3c28f90c09f70a2d8dd65eb8c617 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 09:02:28 +0000
Subject: [PATCH 3499/4650] [2021-08-30T09:02:28+0000] e2e test


From d3c0f936b3881dca66fe53e6f71329bca8e3776c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 10:02:40 +0000
Subject: [PATCH 3500/4650] [2021-08-30T10:02:39+0000] e2e test


From 756851e31f00b1144d2de5db031b4dfe817eaf74 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 11:02:19 +0000
Subject: [PATCH 3501/4650] [2021-08-30T11:02:19+0000] e2e test


From e96930ac153a07a0de0a99c99cc6ecd325e1a780 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 12:03:01 +0000
Subject: [PATCH 3502/4650] [2021-08-30T12:03:01+0000] e2e test


From 2ba07098c6b59a0d0d98596e0d5c19267d3989e6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 13:06:38 +0000
Subject: [PATCH 3503/4650] [2021-08-30T13:06:38+0000] e2e test


From f7eeed17469aa64c66665a88fc5fe51fbb55123c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 14:02:37 +0000
Subject: [PATCH 3504/4650] [2021-08-30T14:02:36+0000] e2e test


From 9c809069b75c831a0dce90c7baff3e64c518e70b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 15:02:44 +0000
Subject: [PATCH 3505/4650] [2021-08-30T15:02:43+0000] e2e test


From 8dacf82d52c5902d0b7ff18197f7d323bbb1c38c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 16:02:53 +0000
Subject: [PATCH 3506/4650] [2021-08-30T16:02:52+0000] e2e test


From f410c005c022453a3097aa562e36d33656212cec Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 17:06:52 +0000
Subject: [PATCH 3507/4650] [2021-08-30T17:06:52+0000] e2e test


From 5f2e356bbf3fecbff81e59c5dd2d1f9b69cc768b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 18:02:30 +0000
Subject: [PATCH 3508/4650] [2021-08-30T18:02:30+0000] e2e test


From fff94fd9f3604745f864a239b29b0b3a65645493 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 19:02:24 +0000
Subject: [PATCH 3509/4650] [2021-08-30T19:02:24+0000] e2e test


From 39fff261d05947c8f3c5d9b0193039adf43ec992 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 20:02:43 +0000
Subject: [PATCH 3510/4650] [2021-08-30T20:02:43+0000] e2e test


From b98ba9a8e51adf3e54c420db861b0d6979ee2e0a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 21:02:23 +0000
Subject: [PATCH 3511/4650] [2021-08-30T21:02:23+0000] e2e test


From fb23fe1fd54c0314364ace2992a52c3c78b18254 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 22:02:39 +0000
Subject: [PATCH 3512/4650] [2021-08-30T22:02:39+0000] e2e test


From 7ba6f41f5d3be747b3b4704e8786c821a3ab7137 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 30 Aug 2021 23:02:39 +0000
Subject: [PATCH 3513/4650] [2021-08-30T23:02:38+0000] e2e test


From 52ac676b7510db1f0707a98964ee971a52edad62 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 00:04:14 +0000
Subject: [PATCH 3514/4650] [2021-08-31T00:04:14+0000] e2e test


From 36ef7d2d714df60a5afcecc50c984a8cda363a14 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 01:22:44 +0000
Subject: [PATCH 3515/4650] [2021-08-31T01:22:43+0000] e2e test


From f2fbdf84eed6765ad1133080225a1f9dea80a95a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 02:10:21 +0000
Subject: [PATCH 3516/4650] [2021-08-31T02:10:21+0000] e2e test


From 49361ad56b963f0fcf9a8a4a02ddafe20b9133ae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 03:06:17 +0000
Subject: [PATCH 3517/4650] [2021-08-31T03:06:17+0000] e2e test


From 3c45b4fe4c3005e062b3aa4cd723cda0f973417b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 04:02:40 +0000
Subject: [PATCH 3518/4650] [2021-08-31T04:02:40+0000] e2e test


From 27741aa120d1ee26636ace71500af24e8c230b68 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 05:02:31 +0000
Subject: [PATCH 3519/4650] [2021-08-31T05:02:31+0000] e2e test


From df75361d66f40bd58c47fed5a029d642321cf3ab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 06:02:45 +0000
Subject: [PATCH 3520/4650] [2021-08-31T06:02:45+0000] e2e test


From a054a0c053e2cd26181b02fc8adcdfe8c15da683 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 07:02:32 +0000
Subject: [PATCH 3521/4650] [2021-08-31T07:02:32+0000] e2e test


From 72c3ee6be885527eb64581b40017bb84abd9a2b3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 08:02:46 +0000
Subject: [PATCH 3522/4650] [2021-08-31T08:02:46+0000] e2e test


From a43ce2fc4c380ff1d56e8ecdab529428ca4ae02c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 09:02:39 +0000
Subject: [PATCH 3523/4650] [2021-08-31T09:02:38+0000] e2e test


From d125e583d3a1265ed0baa16d78bc5529af1afb65 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 10:03:06 +0000
Subject: [PATCH 3524/4650] [2021-08-31T10:03:06+0000] e2e test


From 5312cd8044ac836b6737f4f89cebb3f0b6e17dea Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 11:02:30 +0000
Subject: [PATCH 3525/4650] [2021-08-31T11:02:30+0000] e2e test


From 6ed550f62a57c6726bae28f353564f2c0f03c445 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 12:03:02 +0000
Subject: [PATCH 3526/4650] [2021-08-31T12:03:01+0000] e2e test


From 86209553e4582bbd7631bc8f5d995d5eb716e1c8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 13:07:36 +0000
Subject: [PATCH 3527/4650] [2021-08-31T13:07:36+0000] e2e test


From b1c29bec1e423e4aceea10e7d1b0852f97dc9843 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 14:02:39 +0000
Subject: [PATCH 3528/4650] [2021-08-31T14:02:39+0000] e2e test


From a3c35fe76bce9ae86d1828440ad69e0c70f16d75 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 15:02:29 +0000
Subject: [PATCH 3529/4650] [2021-08-31T15:02:29+0000] e2e test


From 865f1a41254858bfca5ec114849b4e6c54f59a7e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 16:02:41 +0000
Subject: [PATCH 3530/4650] [2021-08-31T16:02:41+0000] e2e test


From a0998334430f6e9d399f195a05ed2e84147ad05d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 17:06:39 +0000
Subject: [PATCH 3531/4650] [2021-08-31T17:06:38+0000] e2e test


From a135341b513b5dbe63b2dd954732e1cc7809f353 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 18:02:51 +0000
Subject: [PATCH 3532/4650] [2021-08-31T18:02:50+0000] e2e test


From b9b591ee58fc7440627bcdbe9ac1d4805cf70187 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 19:02:20 +0000
Subject: [PATCH 3533/4650] [2021-08-31T19:02:20+0000] e2e test


From bf26c18545251131f53c13ab69ab74fdfe52c39a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 20:02:44 +0000
Subject: [PATCH 3534/4650] [2021-08-31T20:02:44+0000] e2e test


From 118d210d086141d3fe37717f9180298d6828f9a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 21:02:21 +0000
Subject: [PATCH 3535/4650] [2021-08-31T21:02:21+0000] e2e test


From cc6c654432db930e1bdab3317c51cae8fce199a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 22:02:22 +0000
Subject: [PATCH 3536/4650] [2021-08-31T22:02:22+0000] e2e test


From 157c6b81c8bcf38f41fea2e005434afcc716d779 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 31 Aug 2021 23:02:26 +0000
Subject: [PATCH 3537/4650] [2021-08-31T23:02:26+0000] e2e test


From b4814a89905661a8d3a2019374684e73aa69a16c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 00:04:46 +0000
Subject: [PATCH 3538/4650] [2021-09-01T00:04:46+0000] e2e test


From b2e76b64dfbb43b44420672824716a5bdd1e18c9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 01:24:39 +0000
Subject: [PATCH 3539/4650] [2021-09-01T01:24:39+0000] e2e test


From ae65b4271fd447f23c96a6e0a9f39de2f75566f8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 02:14:04 +0000
Subject: [PATCH 3540/4650] [2021-09-01T02:14:04+0000] e2e test


From 181a55bc41847f613900b965659f8ec7decc4e1c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 03:02:27 +0000
Subject: [PATCH 3541/4650] [2021-09-01T03:02:27+0000] e2e test


From 06e08623b79ae66124a8b4da5bd95745eefb4ee8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 04:02:32 +0000
Subject: [PATCH 3542/4650] [2021-09-01T04:02:32+0000] e2e test


From e519f0411cff5272e5d805aedaaa7ef3d96e7c66 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 05:02:28 +0000
Subject: [PATCH 3543/4650] [2021-09-01T05:02:28+0000] e2e test


From d7999906f50b0793ae8bbf5fa7bb6b589ce789b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 06:02:44 +0000
Subject: [PATCH 3544/4650] [2021-09-01T06:02:44+0000] e2e test


From 584dfc11213fe117dcef52e58c775b9ebbdd570a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 07:02:27 +0000
Subject: [PATCH 3545/4650] [2021-09-01T07:02:27+0000] e2e test


From 3d1cb948e36d4ad852afe2e4f41973f15f155855 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 08:02:32 +0000
Subject: [PATCH 3546/4650] [2021-09-01T08:02:32+0000] e2e test


From f26baa1f68c892b493c0e98692a2999c5c1743e2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 09:02:52 +0000
Subject: [PATCH 3547/4650] [2021-09-01T09:02:52+0000] e2e test


From b8b0a0a8c943f15d83368b16c8788a0158fea6c4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 10:02:32 +0000
Subject: [PATCH 3548/4650] [2021-09-01T10:02:32+0000] e2e test


From 052c4471c4f84d9f29099d0e9c840ab86c6aa104 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 11:02:24 +0000
Subject: [PATCH 3549/4650] [2021-09-01T11:02:24+0000] e2e test


From 574476240d33c7b0bf666f9b111301a983816e69 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 12:02:40 +0000
Subject: [PATCH 3550/4650] [2021-09-01T12:02:40+0000] e2e test


From 6ada5960cc79119409ba9008ab3711b4e1090b8e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 13:06:44 +0000
Subject: [PATCH 3551/4650] [2021-09-01T13:06:44+0000] e2e test


From f988c715efdd513ed457832c47c2581cd0b0b959 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 14:02:28 +0000
Subject: [PATCH 3552/4650] [2021-09-01T14:02:28+0000] e2e test


From 7b3b1ba469d17c0fcdbd89c7df46c5c24b282f58 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 15:02:41 +0000
Subject: [PATCH 3553/4650] [2021-09-01T15:02:41+0000] e2e test


From 5cd1de33b55ad54573456742cf57277ccf6c9c72 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 16:02:32 +0000
Subject: [PATCH 3554/4650] [2021-09-01T16:02:32+0000] e2e test


From cfcf35e2d38dcfe396f24388eabafb1e627202a9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 17:07:18 +0000
Subject: [PATCH 3555/4650] [2021-09-01T17:07:18+0000] e2e test


From 329f5c2da1203c9d018e0c8e8102c2a18ad76bf0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 18:02:33 +0000
Subject: [PATCH 3556/4650] [2021-09-01T18:02:33+0000] e2e test


From 4a09248d0bc43484278e781477a56f8b326b6d55 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 19:02:32 +0000
Subject: [PATCH 3557/4650] [2021-09-01T19:02:32+0000] e2e test


From e99d559b948ae6fed66344802fec40532aefd4d1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 20:02:46 +0000
Subject: [PATCH 3558/4650] [2021-09-01T20:02:46+0000] e2e test


From dda220e757923e912f0b40381dc3cc413427519b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 21:02:41 +0000
Subject: [PATCH 3559/4650] [2021-09-01T21:02:41+0000] e2e test


From f801de3c97abb57c91b7dc4db82185871f639971 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 22:02:32 +0000
Subject: [PATCH 3560/4650] [2021-09-01T22:02:31+0000] e2e test


From b807250e66d8ab1f58e2c417600214c8f04248ba Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 1 Sep 2021 23:02:30 +0000
Subject: [PATCH 3561/4650] [2021-09-01T23:02:30+0000] e2e test


From f36989329a09e4b26359f174a2afc472580d193b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 00:04:28 +0000
Subject: [PATCH 3562/4650] [2021-09-02T00:04:28+0000] e2e test


From 64b7ff476406360120f96eeeadcbb076b0e00542 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 01:22:44 +0000
Subject: [PATCH 3563/4650] [2021-09-02T01:22:44+0000] e2e test


From 2da35ecd3ff9b873f8a3f7fe50afc6f9c3f35f44 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 02:10:24 +0000
Subject: [PATCH 3564/4650] [2021-09-02T02:10:24+0000] e2e test


From 5708ea55c1e20ed900b2c2f7b3bad8346c830482 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 03:02:39 +0000
Subject: [PATCH 3565/4650] [2021-09-02T03:02:39+0000] e2e test


From c677f2e063a79fea166d9bd2d0176a4d0eeb2f0b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 04:02:54 +0000
Subject: [PATCH 3566/4650] [2021-09-02T04:02:54+0000] e2e test


From ce0528305199fa1aec383b229cd350dc46d33b01 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 05:02:30 +0000
Subject: [PATCH 3567/4650] [2021-09-02T05:02:30+0000] e2e test


From 80a3e4be4dc518387e6e0c0ea094306bbcb3aca5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 06:02:34 +0000
Subject: [PATCH 3568/4650] [2021-09-02T06:02:34+0000] e2e test


From 86c4aaebbf84a99ad51d40c3f2f9f9ea74b90fe6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 07:02:29 +0000
Subject: [PATCH 3569/4650] [2021-09-02T07:02:29+0000] e2e test


From ad935371175a39c934a0496cc0f8c35e9ad50581 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 08:02:31 +0000
Subject: [PATCH 3570/4650] [2021-09-02T08:02:30+0000] e2e test


From 299d36ea675dc5b3fe0a9f06bff24e0b0c608a73 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 09:02:36 +0000
Subject: [PATCH 3571/4650] [2021-09-02T09:02:36+0000] e2e test


From 2386594e8c920ce2a255587302f72b4a2707eb7a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 10:02:32 +0000
Subject: [PATCH 3572/4650] [2021-09-02T10:02:32+0000] e2e test


From b78cfc618a2f1519b076ef455db99c5d8d203590 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 11:02:29 +0000
Subject: [PATCH 3573/4650] [2021-09-02T11:02:29+0000] e2e test


From 1a81d8804bf8b41f5afe675e89db8e349cecb14d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 12:02:46 +0000
Subject: [PATCH 3574/4650] [2021-09-02T12:02:46+0000] e2e test


From a8da24bcc860bf912f030f3b315d6c1c60840f3b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 13:06:54 +0000
Subject: [PATCH 3575/4650] [2021-09-02T13:06:54+0000] e2e test


From b76c051162f0c79894cc4a236e88c01274da765d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 14:02:33 +0000
Subject: [PATCH 3576/4650] [2021-09-02T14:02:33+0000] e2e test


From 2bd284b370d5ad3709d44cd7ee7938ea4df96523 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 15:02:56 +0000
Subject: [PATCH 3577/4650] [2021-09-02T15:02:56+0000] e2e test


From 390559bfb668804673fed71b0c6ee7bf1eda78b3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 16:02:31 +0000
Subject: [PATCH 3578/4650] [2021-09-02T16:02:30+0000] e2e test


From 59a1dc1437b7bf7089855ecb4722475602d58c4b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 17:07:35 +0000
Subject: [PATCH 3579/4650] [2021-09-02T17:07:35+0000] e2e test


From 82fe23170d66e07c2fdbf463bb37975a4c80d129 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 18:02:40 +0000
Subject: [PATCH 3580/4650] [2021-09-02T18:02:40+0000] e2e test


From 54338f5086efc07eeef14645958f96b2bcfd74ae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 19:02:20 +0000
Subject: [PATCH 3581/4650] [2021-09-02T19:02:20+0000] e2e test


From 3ec7e18b0da1f2a15c085e7b4292d4c1aea7d58f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 20:02:39 +0000
Subject: [PATCH 3582/4650] [2021-09-02T20:02:39+0000] e2e test


From 0a7887278c902b877a88cd6a69ebce3a6008c6db Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 21:02:42 +0000
Subject: [PATCH 3583/4650] [2021-09-02T21:02:41+0000] e2e test


From 187d38fbf27d6d4cc8a53fb58c27dd9b07d4e628 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 22:02:50 +0000
Subject: [PATCH 3584/4650] [2021-09-02T22:02:50+0000] e2e test


From 1f39738d47f99d16b5a6d4c24fe1f68b34e36f6f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 2 Sep 2021 23:02:24 +0000
Subject: [PATCH 3585/4650] [2021-09-02T23:02:23+0000] e2e test


From 8916337b23d3277b435dd142b049b5b2e0626811 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 00:04:25 +0000
Subject: [PATCH 3586/4650] [2021-09-03T00:04:25+0000] e2e test


From e132a4e054f4a9ef9dbf403f14d58fde52e44200 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 01:23:00 +0000
Subject: [PATCH 3587/4650] [2021-09-03T01:23:00+0000] e2e test


From f3c525d327dd003fde4fac210e312d77a3773225 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 02:10:59 +0000
Subject: [PATCH 3588/4650] [2021-09-03T02:10:59+0000] e2e test


From 834ae7f931e9d9edd6d21df0a08b3fb5810bdce3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 03:02:22 +0000
Subject: [PATCH 3589/4650] [2021-09-03T03:02:22+0000] e2e test


From 3806cdde863b264db3b7545c5e40faf53da1780c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 04:02:37 +0000
Subject: [PATCH 3590/4650] [2021-09-03T04:02:37+0000] e2e test


From 4a22faf1c57e2a0b6e0d09df94b6c24df55dbb8b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 05:02:24 +0000
Subject: [PATCH 3591/4650] [2021-09-03T05:02:24+0000] e2e test


From 39455ae277d9e0de3dbdfd724f31d6b974a9ca1c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 06:02:28 +0000
Subject: [PATCH 3592/4650] [2021-09-03T06:02:28+0000] e2e test


From 5adeb0ad4731662595b851186bef89f46fafcafb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 07:02:27 +0000
Subject: [PATCH 3593/4650] [2021-09-03T07:02:27+0000] e2e test


From 8a464bac0b39a189749e5f1d4a49329d3266afcb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 08:02:46 +0000
Subject: [PATCH 3594/4650] [2021-09-03T08:02:46+0000] e2e test


From 55cd04fec08fc7fb093fe285bb17a2bc01f7eefc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 09:02:49 +0000
Subject: [PATCH 3595/4650] [2021-09-03T09:02:49+0000] e2e test


From 58ca6356ad010325650eb6c58912be806373befa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 10:02:40 +0000
Subject: [PATCH 3596/4650] [2021-09-03T10:02:40+0000] e2e test


From eafe1a933e0fa59faddeb4b241d0f15bae773e04 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 11:02:29 +0000
Subject: [PATCH 3597/4650] [2021-09-03T11:02:29+0000] e2e test


From 40ed076fe537451eed04f826d6c7daad1b59df53 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 12:03:05 +0000
Subject: [PATCH 3598/4650] [2021-09-03T12:03:05+0000] e2e test


From 3004571d44fc505b791115c0bbce3d26ffd466e3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 13:06:45 +0000
Subject: [PATCH 3599/4650] [2021-09-03T13:06:45+0000] e2e test


From b2dcef2df620fda46d14c63afcd2c39affc2ea91 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 14:02:33 +0000
Subject: [PATCH 3600/4650] [2021-09-03T14:02:33+0000] e2e test


From 808fa32c8acc04a5ad6d6beb3957923aa8f3b4df Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 15:02:29 +0000
Subject: [PATCH 3601/4650] [2021-09-03T15:02:29+0000] e2e test


From 0408534db3e0e320aceff041a8a4ac64902ffc1c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 16:02:42 +0000
Subject: [PATCH 3602/4650] [2021-09-03T16:02:41+0000] e2e test


From 976fcae02578ab3f15d1c3a21fefcecde72dbccd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 17:06:36 +0000
Subject: [PATCH 3603/4650] [2021-09-03T17:06:36+0000] e2e test


From 8f3fa0e905a8ed0a9314dae609c1b18ec6d82902 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 18:02:35 +0000
Subject: [PATCH 3604/4650] [2021-09-03T18:02:35+0000] e2e test


From 5aceffd3885e1c4c0e0258432d2f5ecce02c7e6b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 19:02:31 +0000
Subject: [PATCH 3605/4650] [2021-09-03T19:02:31+0000] e2e test


From f8479f02dd64047a776d4dde450b381ea58ed0f4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 20:02:30 +0000
Subject: [PATCH 3606/4650] [2021-09-03T20:02:30+0000] e2e test


From 0fe457997509719e17dff1645b231630ad25cc32 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 21:02:28 +0000
Subject: [PATCH 3607/4650] [2021-09-03T21:02:28+0000] e2e test


From a952a8f83c5ae6aa103c9d4350dcb5cd7b11ef1e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 22:02:22 +0000
Subject: [PATCH 3608/4650] [2021-09-03T22:02:22+0000] e2e test


From f81ddc4a867e4872c1a811e6349b242cfd02017c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 3 Sep 2021 23:02:38 +0000
Subject: [PATCH 3609/4650] [2021-09-03T23:02:37+0000] e2e test


From 608da3a5dba15ca4984ef7795499539a424c317e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 00:04:22 +0000
Subject: [PATCH 3610/4650] [2021-09-04T00:04:22+0000] e2e test


From 8914575b575292ccc4b046e8637824fedc813724 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 01:23:15 +0000
Subject: [PATCH 3611/4650] [2021-09-04T01:23:14+0000] e2e test


From 39b849fa852d7d3e058bd2f06f7d02896374d46a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 02:13:26 +0000
Subject: [PATCH 3612/4650] [2021-09-04T02:13:25+0000] e2e test


From 6d8c65d268c62ce025c10b0d5e6e186f14a292cf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 03:02:28 +0000
Subject: [PATCH 3613/4650] [2021-09-04T03:02:28+0000] e2e test


From 877e443f64e648397e2109b6d03a1147d8af7b39 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 04:02:29 +0000
Subject: [PATCH 3614/4650] [2021-09-04T04:02:29+0000] e2e test


From 5ab4c97345cd9aab6d2a855eec0728a9484ddca4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 05:02:22 +0000
Subject: [PATCH 3615/4650] [2021-09-04T05:02:22+0000] e2e test


From 53506813c9184e761e14020d6db43b60fe324451 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 06:02:34 +0000
Subject: [PATCH 3616/4650] [2021-09-04T06:02:34+0000] e2e test


From 60cad99b22d741b0a05be44655640d82791c990c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 07:02:27 +0000
Subject: [PATCH 3617/4650] [2021-09-04T07:02:27+0000] e2e test


From 4f6bb60ba9f042c47ed6dc41a497e8dc2a6af903 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 08:02:40 +0000
Subject: [PATCH 3618/4650] [2021-09-04T08:02:39+0000] e2e test


From c0e7c35402e8584987915c4245df219ae03014d7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 09:03:01 +0000
Subject: [PATCH 3619/4650] [2021-09-04T09:03:00+0000] e2e test


From dd20ae24bca58f49ccf47cf3caf10231421521dd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 10:02:31 +0000
Subject: [PATCH 3620/4650] [2021-09-04T10:02:30+0000] e2e test


From d35ce44e0e36c564ad3e30bd1dd9fa8e33a00401 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 11:02:18 +0000
Subject: [PATCH 3621/4650] [2021-09-04T11:02:18+0000] e2e test


From a695337d9f451b443917d008adbb85a30289c52b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 12:03:09 +0000
Subject: [PATCH 3622/4650] [2021-09-04T12:03:09+0000] e2e test


From 7dff3c28141c17dd36ce56fe794ed21bfad65953 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 13:07:35 +0000
Subject: [PATCH 3623/4650] [2021-09-04T13:07:35+0000] e2e test


From 87c231050105503423ba391998f99d0c248bd5b3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 14:02:20 +0000
Subject: [PATCH 3624/4650] [2021-09-04T14:02:20+0000] e2e test


From 601a87649669c663f6f0a27981d38cee58361f1e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 15:02:38 +0000
Subject: [PATCH 3625/4650] [2021-09-04T15:02:38+0000] e2e test


From 824214cca4fd7b94f001c9d94ce76a2a6f2ef702 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 16:02:37 +0000
Subject: [PATCH 3626/4650] [2021-09-04T16:02:37+0000] e2e test


From 568cf610bef1b507c76bb49ad147cca2dd73492f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 17:05:54 +0000
Subject: [PATCH 3627/4650] [2021-09-04T17:05:54+0000] e2e test


From 5366f5aefac69537ee0f66b3c37b386f33fde665 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 18:02:39 +0000
Subject: [PATCH 3628/4650] [2021-09-04T18:02:39+0000] e2e test


From 8123bc83ce8bc9e5bee6c727009c4ca7ba497b47 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 19:02:14 +0000
Subject: [PATCH 3629/4650] [2021-09-04T19:02:14+0000] e2e test


From 238c683709acdde5071fc2a25625fa8cd660fa77 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 20:02:37 +0000
Subject: [PATCH 3630/4650] [2021-09-04T20:02:37+0000] e2e test


From c9d033656274b6b93df7abf7b510285572673a76 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 21:02:26 +0000
Subject: [PATCH 3631/4650] [2021-09-04T21:02:26+0000] e2e test


From f2c51f8d892559c786835e460330b203a7caea40 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 22:02:32 +0000
Subject: [PATCH 3632/4650] [2021-09-04T22:02:32+0000] e2e test


From ece41fd492f017cd9834ecfb68de2d88bfb5a166 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 4 Sep 2021 23:02:45 +0000
Subject: [PATCH 3633/4650] [2021-09-04T23:02:45+0000] e2e test


From d5a27ca1c3a530753ed56ce2b98e87e7fe3460e1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 00:04:38 +0000
Subject: [PATCH 3634/4650] [2021-09-05T00:04:38+0000] e2e test


From e8afaec47e46514dbd6847cbb96b3a5fbb8169ed Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 01:24:07 +0000
Subject: [PATCH 3635/4650] [2021-09-05T01:24:07+0000] e2e test


From 8bb53de1b1c4c760910b664f5643cd41dcf85dd9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 02:12:23 +0000
Subject: [PATCH 3636/4650] [2021-09-05T02:12:23+0000] e2e test


From a3b7e78b858a2c93ffa922d8d1a66d4281653717 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 03:02:26 +0000
Subject: [PATCH 3637/4650] [2021-09-05T03:02:26+0000] e2e test


From 28a3a46fe2269e33fd2bc07e761c1d2d38dc437c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 04:02:47 +0000
Subject: [PATCH 3638/4650] [2021-09-05T04:02:47+0000] e2e test


From 993a99354fa5ec462617522a57f1abf4d0d89636 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 05:02:26 +0000
Subject: [PATCH 3639/4650] [2021-09-05T05:02:26+0000] e2e test


From ca537fcf8b82555e8b7937b8133a35eacc2f177a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 06:02:55 +0000
Subject: [PATCH 3640/4650] [2021-09-05T06:02:55+0000] e2e test


From 443cec8722490ba11b58e436522f4ad80306e49f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 07:02:28 +0000
Subject: [PATCH 3641/4650] [2021-09-05T07:02:27+0000] e2e test


From f38472b02bb84f05c13b83fad2bade1268eb8bad Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 08:02:50 +0000
Subject: [PATCH 3642/4650] [2021-09-05T08:02:49+0000] e2e test


From 1351fdb7e9f15ea765047e05f31441aa352802dd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 09:02:30 +0000
Subject: [PATCH 3643/4650] [2021-09-05T09:02:30+0000] e2e test


From a0cea7730d9483d3c2a3e6b4b02ddafc15683e59 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 10:02:54 +0000
Subject: [PATCH 3644/4650] [2021-09-05T10:02:54+0000] e2e test


From e592ee89073e1421effa98c9f0429bcfde2d4e11 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 11:02:35 +0000
Subject: [PATCH 3645/4650] [2021-09-05T11:02:34+0000] e2e test


From 67ec1812b6bc76c4543818262248cbde48f7c3ff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 12:02:46 +0000
Subject: [PATCH 3646/4650] [2021-09-05T12:02:46+0000] e2e test


From e991507cf5912440d1108d40276a0001986cc825 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 13:06:14 +0000
Subject: [PATCH 3647/4650] [2021-09-05T13:06:14+0000] e2e test


From 6cd12e170c96672269d14a7e39058054741f2bb1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 14:02:28 +0000
Subject: [PATCH 3648/4650] [2021-09-05T14:02:27+0000] e2e test


From a34387b868322e2e5d8d1ab2fff60609d45e496a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 15:02:37 +0000
Subject: [PATCH 3649/4650] [2021-09-05T15:02:37+0000] e2e test


From ddc8001aefa026703a9018114f9ab0071b4c89b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 16:02:45 +0000
Subject: [PATCH 3650/4650] [2021-09-05T16:02:44+0000] e2e test


From a9abc4a8689d60c22e4f21d3ab93626606ef58b2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 17:05:59 +0000
Subject: [PATCH 3651/4650] [2021-09-05T17:05:58+0000] e2e test


From 276c56cca6e25aa7820bd81d5689b02502b630c0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 18:02:32 +0000
Subject: [PATCH 3652/4650] [2021-09-05T18:02:32+0000] e2e test


From eacf74e07731580e79684a3c8634279578da1c6a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 19:02:17 +0000
Subject: [PATCH 3653/4650] [2021-09-05T19:02:17+0000] e2e test


From d188c514f8910def2d74ff564ec0e270c1d59f9f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 20:02:26 +0000
Subject: [PATCH 3654/4650] [2021-09-05T20:02:26+0000] e2e test


From 6e87763010962b21cbc40769295deb61d6d99c1c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 21:02:26 +0000
Subject: [PATCH 3655/4650] [2021-09-05T21:02:26+0000] e2e test


From 71768f76ec7d95f3e5fb0e51dc2c3b9cbef01915 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 22:02:29 +0000
Subject: [PATCH 3656/4650] [2021-09-05T22:02:28+0000] e2e test


From 62c6a772badb7ceb37cef2630cbaec34f7639d8d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 5 Sep 2021 23:02:26 +0000
Subject: [PATCH 3657/4650] [2021-09-05T23:02:26+0000] e2e test


From 4941a6653e581b3bb7b17df087ac38cc62f25968 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 00:04:28 +0000
Subject: [PATCH 3658/4650] [2021-09-06T00:04:28+0000] e2e test


From fa2a9a111400c74e91aececea531d4c9fcc9179a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 01:24:52 +0000
Subject: [PATCH 3659/4650] [2021-09-06T01:24:52+0000] e2e test


From 7a27d249dd7cdf866b31d1173b71ad62c4d90149 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 02:14:05 +0000
Subject: [PATCH 3660/4650] [2021-09-06T02:14:05+0000] e2e test


From 2bbdbfd9d6e785ad2c298a096459ea0d660c57d1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 03:02:30 +0000
Subject: [PATCH 3661/4650] [2021-09-06T03:02:30+0000] e2e test


From c225ac11b24acf5ef32603aaf9f9e4be345e5cce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 04:02:42 +0000
Subject: [PATCH 3662/4650] [2021-09-06T04:02:42+0000] e2e test


From 4431a8ea9ebc914ca224867658982730bcccdb76 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 05:02:27 +0000
Subject: [PATCH 3663/4650] [2021-09-06T05:02:27+0000] e2e test


From 81fcd4861f9484314664dc823f3013f0f4589ec1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 06:02:45 +0000
Subject: [PATCH 3664/4650] [2021-09-06T06:02:45+0000] e2e test


From e36cc0ec69bff1554eb77cd9b0e9f828978419aa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 07:02:24 +0000
Subject: [PATCH 3665/4650] [2021-09-06T07:02:24+0000] e2e test


From 3bd94233d20445dfac39954837616f0a7a48609f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 08:02:44 +0000
Subject: [PATCH 3666/4650] [2021-09-06T08:02:43+0000] e2e test


From 47554d56793271cb08bb2c233d4d7223a1a18f0a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 09:02:42 +0000
Subject: [PATCH 3667/4650] [2021-09-06T09:02:42+0000] e2e test


From d5bb106e5855d622b08ad234aab585cc31faee57 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 10:03:46 +0000
Subject: [PATCH 3668/4650] [2021-09-06T10:03:46+0000] e2e test


From 6fd8df326e2db08b88edd3a6838420f8a707a655 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 11:02:36 +0000
Subject: [PATCH 3669/4650] [2021-09-06T11:02:36+0000] e2e test


From 3ce9c13f94eaa081d9aed6bacb489a4976d24b10 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 12:02:49 +0000
Subject: [PATCH 3670/4650] [2021-09-06T12:02:49+0000] e2e test


From eea093ed66d4bedf58944b3855e930c7e5c9522f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 13:07:18 +0000
Subject: [PATCH 3671/4650] [2021-09-06T13:07:17+0000] e2e test


From bc285ab48546ef63d142fd3d7171344f9aa7aa50 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 14:02:27 +0000
Subject: [PATCH 3672/4650] [2021-09-06T14:02:27+0000] e2e test


From 175549b46084b983fd0d1443019467fb5911963b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 15:02:27 +0000
Subject: [PATCH 3673/4650] [2021-09-06T15:02:26+0000] e2e test


From 67613b8b6719c10d4c054139e9dff14a8ad3362c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 16:02:34 +0000
Subject: [PATCH 3674/4650] [2021-09-06T16:02:34+0000] e2e test


From afaf55abe2faaffe85f9a6be2719263e4be1caab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 17:07:01 +0000
Subject: [PATCH 3675/4650] [2021-09-06T17:07:01+0000] e2e test


From 114cb0c4bd8d9439221febaa83d1d65e654748e1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 18:02:29 +0000
Subject: [PATCH 3676/4650] [2021-09-06T18:02:28+0000] e2e test


From f68a6c8c1e1a31eee6e5c9148b196e7e60ef2eb5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 19:02:32 +0000
Subject: [PATCH 3677/4650] [2021-09-06T19:02:32+0000] e2e test


From 125fe376babdfe7eafec85935f8685790889771c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 20:02:32 +0000
Subject: [PATCH 3678/4650] [2021-09-06T20:02:32+0000] e2e test


From 272d43e5c9889d087c428ae78d61ad5a6bbf7215 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 21:02:27 +0000
Subject: [PATCH 3679/4650] [2021-09-06T21:02:27+0000] e2e test


From 1b4b63fca3c02a1984818ec5620dac6b9eb379a6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 22:02:42 +0000
Subject: [PATCH 3680/4650] [2021-09-06T22:02:42+0000] e2e test


From baafd0e06543011d088f9ff7922c85702dec802b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 6 Sep 2021 23:02:48 +0000
Subject: [PATCH 3681/4650] [2021-09-06T23:02:48+0000] e2e test


From 5e6d96aa1d5f6a8b55b971a068415311dffccc34 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 00:04:25 +0000
Subject: [PATCH 3682/4650] [2021-09-07T00:04:24+0000] e2e test


From 975bb2a3f2f8b947d6cc03c3794e35bb4e45ceab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 01:21:57 +0000
Subject: [PATCH 3683/4650] [2021-09-07T01:21:57+0000] e2e test


From ab8ebc87867518314fa6c321b177bd5c7da48b51 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 02:10:51 +0000
Subject: [PATCH 3684/4650] [2021-09-07T02:10:51+0000] e2e test


From 040fcaaebfa91055944ce699f7fdbcb23cc19a1c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 03:02:38 +0000
Subject: [PATCH 3685/4650] [2021-09-07T03:02:38+0000] e2e test


From 60222094966498a0146c9aeb18e06b7d89896181 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 04:02:37 +0000
Subject: [PATCH 3686/4650] [2021-09-07T04:02:37+0000] e2e test


From 06e1ebb6ed3032109f05e1367fccafb864411db4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 05:02:24 +0000
Subject: [PATCH 3687/4650] [2021-09-07T05:02:24+0000] e2e test


From 554f1127e7617313de8e6da6ed742784adef5253 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 06:02:26 +0000
Subject: [PATCH 3688/4650] [2021-09-07T06:02:26+0000] e2e test


From b94dd803276e1b80cc45f49f611d466b88de4328 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 07:02:30 +0000
Subject: [PATCH 3689/4650] [2021-09-07T07:02:30+0000] e2e test


From 1e95be2134cb96f897ddab7a3101dfb1f3dc3ba8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 08:02:43 +0000
Subject: [PATCH 3690/4650] [2021-09-07T08:02:43+0000] e2e test


From 7a5a4d9106127959688b6a6bb831a7e3dce7b753 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 09:02:40 +0000
Subject: [PATCH 3691/4650] [2021-09-07T09:02:40+0000] e2e test


From f0efff15f5155eb12ccc5ec7967125900e357fcb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 10:02:51 +0000
Subject: [PATCH 3692/4650] [2021-09-07T10:02:51+0000] e2e test


From bf08c0eb23a240786b9bfdbaf85868e01e8e00e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 11:02:29 +0000
Subject: [PATCH 3693/4650] [2021-09-07T11:02:29+0000] e2e test


From 3140ee5fcf2e50b1f9c3ff4211da73753b88eb72 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 12:02:41 +0000
Subject: [PATCH 3694/4650] [2021-09-07T12:02:40+0000] e2e test


From b75ae4ea91ebffa95b3c46099fbc7ccee385b1cf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 13:06:44 +0000
Subject: [PATCH 3695/4650] [2021-09-07T13:06:44+0000] e2e test


From ee03e395c32e86ce615c93e1a5b0394c1f70e97d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 14:02:33 +0000
Subject: [PATCH 3696/4650] [2021-09-07T14:02:33+0000] e2e test


From b90073dd9fc7f08d173d9d5549add45228e0ebb2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 15:02:31 +0000
Subject: [PATCH 3697/4650] [2021-09-07T15:02:31+0000] e2e test


From 04e1a84144d252ff17f27d14a6b2210ae3c3c843 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 16:02:31 +0000
Subject: [PATCH 3698/4650] [2021-09-07T16:02:30+0000] e2e test


From 6afc08c141fa56f2d18fbcbafebc2a804295c97d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 17:06:53 +0000
Subject: [PATCH 3699/4650] [2021-09-07T17:06:53+0000] e2e test


From e225c3168be794ffa8d105287ec8a367c8660525 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 18:02:38 +0000
Subject: [PATCH 3700/4650] [2021-09-07T18:02:38+0000] e2e test


From 81215125d98379c4d6f0cc3f4c139758bb26650b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 19:02:18 +0000
Subject: [PATCH 3701/4650] [2021-09-07T19:02:18+0000] e2e test


From 2f574e94dbcfe6bca5fa5533b91c4b1d8f9e629a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 20:02:36 +0000
Subject: [PATCH 3702/4650] [2021-09-07T20:02:36+0000] e2e test


From 229a954c4264fa0570816b5ca55b63854d85c0e3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 21:02:38 +0000
Subject: [PATCH 3703/4650] [2021-09-07T21:02:38+0000] e2e test


From f61d34f3a5b5941a0b84c75b59bccb0b7ad1f715 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 22:02:35 +0000
Subject: [PATCH 3704/4650] [2021-09-07T22:02:34+0000] e2e test


From 99c9d1fdc4c91a8a42ae338f660b6001ed37e71b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 7 Sep 2021 23:02:39 +0000
Subject: [PATCH 3705/4650] [2021-09-07T23:02:39+0000] e2e test


From e26ebb8464c262d4f8945908b56471e0190619f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 00:03:43 +0000
Subject: [PATCH 3706/4650] [2021-09-08T00:03:43+0000] e2e test


From 803b44fe7070437f60372be4298338d084c8b40c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 01:22:47 +0000
Subject: [PATCH 3707/4650] [2021-09-08T01:22:47+0000] e2e test


From 34abd9c66145e2e0886ed75dff7f9e7c0b3ab4b7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 02:11:07 +0000
Subject: [PATCH 3708/4650] [2021-09-08T02:11:07+0000] e2e test


From ca7fc7c8f96c182e62735f51836ec6794b80d404 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 03:02:33 +0000
Subject: [PATCH 3709/4650] [2021-09-08T03:02:33+0000] e2e test


From 3ea7a7e0382742bfce52a731f528fcd3f3de9ed0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 04:02:53 +0000
Subject: [PATCH 3710/4650] [2021-09-08T04:02:53+0000] e2e test


From 9184ea39834c081c80e80e2b35c234d15466d0b3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 05:02:29 +0000
Subject: [PATCH 3711/4650] [2021-09-08T05:02:29+0000] e2e test


From 5f24b3e9ee6d7dc593eed872f9ce450947543ad2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 06:02:41 +0000
Subject: [PATCH 3712/4650] [2021-09-08T06:02:41+0000] e2e test


From e511a7bf48ee470786e5cc4162e2857971fa6553 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 07:02:39 +0000
Subject: [PATCH 3713/4650] [2021-09-08T07:02:39+0000] e2e test


From d983c8defd0632b81a3418058b45104a6fc5fd17 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 08:02:50 +0000
Subject: [PATCH 3714/4650] [2021-09-08T08:02:50+0000] e2e test


From 895def7890cd9016a93b363c40e73ae324b17c3f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 09:02:27 +0000
Subject: [PATCH 3715/4650] [2021-09-08T09:02:26+0000] e2e test


From 78d85500830d336868c65b860546e6d2681ce1ac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 10:02:57 +0000
Subject: [PATCH 3716/4650] [2021-09-08T10:02:57+0000] e2e test


From 3ab62273df31d9c50091bd541eee249c0dfd89bb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 11:02:23 +0000
Subject: [PATCH 3717/4650] [2021-09-08T11:02:23+0000] e2e test


From 2e22d14a169f4437170e467d13ee74dc1f9b46b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 12:03:05 +0000
Subject: [PATCH 3718/4650] [2021-09-08T12:03:05+0000] e2e test


From c23b33fdc74bfea18bc188b2b313f0a37c5fa827 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 13:06:56 +0000
Subject: [PATCH 3719/4650] [2021-09-08T13:06:55+0000] e2e test


From 03fbdd7d8ff1bfa365bfe68acd1a52276048a2c6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 14:02:35 +0000
Subject: [PATCH 3720/4650] [2021-09-08T14:02:35+0000] e2e test


From fa9f0b27dcb3c57697837eb06324a9fb863f2387 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 15:03:05 +0000
Subject: [PATCH 3721/4650] [2021-09-08T15:03:05+0000] e2e test


From 8ffbeed78c558db7816b8748ddd21938e137d0c4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 16:02:40 +0000
Subject: [PATCH 3722/4650] [2021-09-08T16:02:40+0000] e2e test


From 00101c1c33315908c3d3621c92a00c858895a6e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 17:06:40 +0000
Subject: [PATCH 3723/4650] [2021-09-08T17:06:40+0000] e2e test


From 7e503847a29f2704c26dd000cc7885cf5865a15f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 18:03:54 +0000
Subject: [PATCH 3724/4650] [2021-09-08T18:03:53+0000] e2e test


From 6e5e03eb6bdb836ad2a0800e62c1421cfeeaa0d6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 19:02:36 +0000
Subject: [PATCH 3725/4650] [2021-09-08T19:02:36+0000] e2e test


From 223e9702d1fd3c34ceeb1a0175115c1595fbd1a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 20:02:28 +0000
Subject: [PATCH 3726/4650] [2021-09-08T20:02:28+0000] e2e test


From cb3fb8380b4255ee90a73bf35e7b2deb2b214b16 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 21:02:54 +0000
Subject: [PATCH 3727/4650] [2021-09-08T21:02:54+0000] e2e test


From b640b22283097a509b9f8d28fb856556686604f1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 22:02:25 +0000
Subject: [PATCH 3728/4650] [2021-09-08T22:02:25+0000] e2e test


From 99c53036ccc346160261848cea3c95d45f86c39b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 8 Sep 2021 23:03:27 +0000
Subject: [PATCH 3729/4650] [2021-09-08T23:03:27+0000] e2e test


From 73b7878b3446e4de4769e0e7dbc93b04052834a7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 00:04:44 +0000
Subject: [PATCH 3730/4650] [2021-09-09T00:04:44+0000] e2e test


From 6395ae271b7201826c0e1d2f20b14a980fe33637 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 01:24:18 +0000
Subject: [PATCH 3731/4650] [2021-09-09T01:24:18+0000] e2e test


From 8cddec6f9e9955dec145bca35376ac6fb2a1a391 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 02:13:10 +0000
Subject: [PATCH 3732/4650] [2021-09-09T02:13:10+0000] e2e test


From 535ae46d242275adef22e98d469262f3c37bad69 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 03:02:32 +0000
Subject: [PATCH 3733/4650] [2021-09-09T03:02:32+0000] e2e test


From ee53de473b74f43755de8a3ee94a96f88ae0610d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 04:02:45 +0000
Subject: [PATCH 3734/4650] [2021-09-09T04:02:45+0000] e2e test


From 789c360985c3744dbf0cc21631153df81579c0d0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 05:02:29 +0000
Subject: [PATCH 3735/4650] [2021-09-09T05:02:29+0000] e2e test


From 1efd8cefdfc0c00007689a4fa5ba52b83291b12c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 06:02:34 +0000
Subject: [PATCH 3736/4650] [2021-09-09T06:02:34+0000] e2e test


From 576a614942c6575d575f4b02a1b7f9cfa253e586 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 07:07:45 +0000
Subject: [PATCH 3737/4650] [2021-09-09T07:07:44+0000] e2e test


From e6d26188b4ab7e4bf7971fa50f87e5c1cd04178d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 08:02:57 +0000
Subject: [PATCH 3738/4650] [2021-09-09T08:02:57+0000] e2e test


From 34bbbbbc8198372c684aeacc3e7f63c080fab999 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 09:02:46 +0000
Subject: [PATCH 3739/4650] [2021-09-09T09:02:46+0000] e2e test


From 64e0225a94cf7cd0228db7f0f2389ea004d5607e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 10:02:32 +0000
Subject: [PATCH 3740/4650] [2021-09-09T10:02:32+0000] e2e test


From b66d46f739cbab1b485bdaee802138f987e55ef6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 11:02:32 +0000
Subject: [PATCH 3741/4650] [2021-09-09T11:02:32+0000] e2e test


From 7331672463d56b90cfc1844db95d531b9cd59684 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 12:03:05 +0000
Subject: [PATCH 3742/4650] [2021-09-09T12:03:05+0000] e2e test


From eadce6243b0365a877e8673cd67b35e1c5ced80c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 13:07:06 +0000
Subject: [PATCH 3743/4650] [2021-09-09T13:07:06+0000] e2e test


From 7499558415fba4edcdaafd4c6112c2359c80beaf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 14:02:40 +0000
Subject: [PATCH 3744/4650] [2021-09-09T14:02:40+0000] e2e test


From 8682de08bd48d7fc320bbe01799f522fe5b25a03 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 15:02:44 +0000
Subject: [PATCH 3745/4650] [2021-09-09T15:02:44+0000] e2e test


From 7df8c5d77759a99e7647c804947ab9f58617e37c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 16:02:48 +0000
Subject: [PATCH 3746/4650] [2021-09-09T16:02:48+0000] e2e test


From 23a7d234c0c4526e33432d52c91c6fc7d5a6d12b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 17:06:35 +0000
Subject: [PATCH 3747/4650] [2021-09-09T17:06:35+0000] e2e test


From d9a0871dc694129a249da11860d95009b6938bf9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 18:02:29 +0000
Subject: [PATCH 3748/4650] [2021-09-09T18:02:28+0000] e2e test


From f1f7ae47305681deda2fcedde9c3316951d37609 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 19:02:19 +0000
Subject: [PATCH 3749/4650] [2021-09-09T19:02:19+0000] e2e test


From 80cfec23ea47ba6897f23d1f86cdb889c3906266 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 20:02:32 +0000
Subject: [PATCH 3750/4650] [2021-09-09T20:02:32+0000] e2e test


From 94aa373e2e42bac049963e76589a3dda9dcc05b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 21:02:38 +0000
Subject: [PATCH 3751/4650] [2021-09-09T21:02:38+0000] e2e test


From 0271aab3b70690f361aec62d24e54c6bb82a932f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 22:02:36 +0000
Subject: [PATCH 3752/4650] [2021-09-09T22:02:35+0000] e2e test


From d79a058fca61b1d426749e406954c97dabe83ede Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 9 Sep 2021 23:02:47 +0000
Subject: [PATCH 3753/4650] [2021-09-09T23:02:47+0000] e2e test


From e99b20144b237bfa533f34bff342ed668ab3cb8d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 00:04:33 +0000
Subject: [PATCH 3754/4650] [2021-09-10T00:04:33+0000] e2e test


From 1f019e5503839110a13338eb49b05464145cd320 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 01:24:16 +0000
Subject: [PATCH 3755/4650] [2021-09-10T01:24:16+0000] e2e test


From ac4616d460668499c9a63d47e39d3ddc49ffd2b4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 02:13:06 +0000
Subject: [PATCH 3756/4650] [2021-09-10T02:13:06+0000] e2e test


From efa36fc5abf0731f25b893788a1c1b0009a77779 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 03:02:39 +0000
Subject: [PATCH 3757/4650] [2021-09-10T03:02:39+0000] e2e test


From 24fc2c8d42adc28d754f7dd23de20d10f83f6fde Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 04:02:34 +0000
Subject: [PATCH 3758/4650] [2021-09-10T04:02:34+0000] e2e test


From e662c317c36b93e30f7954ae648fa4e1f391ae01 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 05:02:25 +0000
Subject: [PATCH 3759/4650] [2021-09-10T05:02:25+0000] e2e test


From 0a501c97921bc28e1b20b7fdb52cbb70d4b8b7b5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 06:02:50 +0000
Subject: [PATCH 3760/4650] [2021-09-10T06:02:49+0000] e2e test


From 7267d56f7d7ae0bfad1a8ba848698933fc68a9bf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 07:02:37 +0000
Subject: [PATCH 3761/4650] [2021-09-10T07:02:37+0000] e2e test


From 0bceb34c9bd1d5c6330b69026466d4793ec708fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 08:02:52 +0000
Subject: [PATCH 3762/4650] [2021-09-10T08:02:52+0000] e2e test


From 6069b013a02b51a2e219a26932ca38034107c7b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 09:02:52 +0000
Subject: [PATCH 3763/4650] [2021-09-10T09:02:52+0000] e2e test


From 3dccd5f55d34ded761f00fdba7530ee22f2a63ee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 10:02:46 +0000
Subject: [PATCH 3764/4650] [2021-09-10T10:02:46+0000] e2e test


From 0a8fdfd606751981c6f9f05beac3ddd123af318d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 11:02:42 +0000
Subject: [PATCH 3765/4650] [2021-09-10T11:02:42+0000] e2e test


From ea172b8e6730a8ae263c040762e7757c51a34cf4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 12:02:50 +0000
Subject: [PATCH 3766/4650] [2021-09-10T12:02:50+0000] e2e test


From e4ac8d9b39d602c9c1d365a4c90541357c73fd6d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 13:06:42 +0000
Subject: [PATCH 3767/4650] [2021-09-10T13:06:42+0000] e2e test


From 110b8a0ccb69519988a7500864725fa822da83d7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 14:02:31 +0000
Subject: [PATCH 3768/4650] [2021-09-10T14:02:31+0000] e2e test


From 2b4cd11bb20f00fcf1873eb1123fd7116ae588bc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 15:02:28 +0000
Subject: [PATCH 3769/4650] [2021-09-10T15:02:28+0000] e2e test


From eba18d6f6dcac7ea2f00da4d667c50df74a95819 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 16:02:44 +0000
Subject: [PATCH 3770/4650] [2021-09-10T16:02:44+0000] e2e test


From f58d38c750d9e2b97447c16887b75ae1fa0ae23f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 17:04:45 +0000
Subject: [PATCH 3771/4650] [2021-09-10T17:04:45+0000] e2e test


From 302cc2b475b11c01da51ef16c595d63aa00f1127 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 18:02:45 +0000
Subject: [PATCH 3772/4650] [2021-09-10T18:02:45+0000] e2e test


From 20110f658550da081c90eec3d67e139bfc9cdc1d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 19:02:22 +0000
Subject: [PATCH 3773/4650] [2021-09-10T19:02:22+0000] e2e test


From 1f73c4a645cc2639c6bdeeec2350e4a69d45a843 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 20:02:41 +0000
Subject: [PATCH 3774/4650] [2021-09-10T20:02:41+0000] e2e test


From 498a1eafed58ada9fc2a3c7ce5c3f0d747e08b9b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 21:02:40 +0000
Subject: [PATCH 3775/4650] [2021-09-10T21:02:40+0000] e2e test


From 2b93e0022fd6756af1fbaedf535644c601da2d5e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 22:02:48 +0000
Subject: [PATCH 3776/4650] [2021-09-10T22:02:48+0000] e2e test


From 408207cd23abdaa40ee69d98b1243b0c916d1beb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 10 Sep 2021 23:02:34 +0000
Subject: [PATCH 3777/4650] [2021-09-10T23:02:34+0000] e2e test


From 9819fe4ec70862d7c4f2bd0fbc1da3049619d4eb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 00:04:28 +0000
Subject: [PATCH 3778/4650] [2021-09-11T00:04:28+0000] e2e test


From 8d8f3c4f5296b11b16b7f73754843d6bd720dcc1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 01:22:30 +0000
Subject: [PATCH 3779/4650] [2021-09-11T01:22:30+0000] e2e test


From 8fc8b1f51fcf7a463978895d8bd06e8f563e9f73 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 02:12:25 +0000
Subject: [PATCH 3780/4650] [2021-09-11T02:12:25+0000] e2e test


From 85d4571b4fba76e70bd82356d2dafa37b82cb3b7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 03:02:26 +0000
Subject: [PATCH 3781/4650] [2021-09-11T03:02:26+0000] e2e test


From 3f4c3a0e6928dc96c4ddc67f4ddad752d579417c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 04:02:28 +0000
Subject: [PATCH 3782/4650] [2021-09-11T04:02:28+0000] e2e test


From e01d13e9c0be6fa126779f2755408fb07a57267e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 05:02:19 +0000
Subject: [PATCH 3783/4650] [2021-09-11T05:02:19+0000] e2e test


From 202af58cc757febcb38c71901a92b57edc6c5cc0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 06:02:28 +0000
Subject: [PATCH 3784/4650] [2021-09-11T06:02:28+0000] e2e test


From 1046d268a547941031eec7116a205eaa54b4b6b7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 07:02:38 +0000
Subject: [PATCH 3785/4650] [2021-09-11T07:02:38+0000] e2e test


From 67bd668259ee18ea41462d8dd0dec80988adf271 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 08:02:33 +0000
Subject: [PATCH 3786/4650] [2021-09-11T08:02:33+0000] e2e test


From c1221d6b608f4a3ffe27bff43549f8ecfec66582 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 09:02:21 +0000
Subject: [PATCH 3787/4650] [2021-09-11T09:02:21+0000] e2e test


From 8576e1dc9bb1db5038b36bfa5d88d6cb4a656e71 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 10:02:38 +0000
Subject: [PATCH 3788/4650] [2021-09-11T10:02:38+0000] e2e test


From 629bd97202745ec51d3fe8e3db020abceab92aa9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 11:02:30 +0000
Subject: [PATCH 3789/4650] [2021-09-11T11:02:30+0000] e2e test


From 53b988f48299a164dfa4871160a86f27e5e320f4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 12:02:46 +0000
Subject: [PATCH 3790/4650] [2021-09-11T12:02:45+0000] e2e test


From 929b09e5ae1fe79543fdf0ee9f6aa6bc5c7eb9f2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 13:05:51 +0000
Subject: [PATCH 3791/4650] [2021-09-11T13:05:51+0000] e2e test


From 86d849f36835f188c38c8d4e29492af1b7fdc13c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 14:02:29 +0000
Subject: [PATCH 3792/4650] [2021-09-11T14:02:29+0000] e2e test


From 30c6d3c9ffb53ebe14be81d8eb727b03f443af70 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 15:02:28 +0000
Subject: [PATCH 3793/4650] [2021-09-11T15:02:28+0000] e2e test


From 3d1d165056778c61f7e060cf450e5ec1735aa069 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 16:02:38 +0000
Subject: [PATCH 3794/4650] [2021-09-11T16:02:38+0000] e2e test


From 633144309a98ebc9dd40e04702aefaa4e6453ac8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 17:05:29 +0000
Subject: [PATCH 3795/4650] [2021-09-11T17:05:29+0000] e2e test


From c2d535a7158396e5eaf25f2b05971c1159690356 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 18:02:43 +0000
Subject: [PATCH 3796/4650] [2021-09-11T18:02:43+0000] e2e test


From 5e6e8286941ccb4eb8c8a7814755a703be62c71f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 19:02:22 +0000
Subject: [PATCH 3797/4650] [2021-09-11T19:02:22+0000] e2e test


From f066c1124f18211ca0fb359a552d6c4682cde17a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 20:02:29 +0000
Subject: [PATCH 3798/4650] [2021-09-11T20:02:29+0000] e2e test


From 3cb2bb43afb7bff716fff7a81e473d19e4e97a4f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 21:02:51 +0000
Subject: [PATCH 3799/4650] [2021-09-11T21:02:51+0000] e2e test


From 4f506ad620bec8a43a130bee37de2b359fd6e013 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 22:02:44 +0000
Subject: [PATCH 3800/4650] [2021-09-11T22:02:44+0000] e2e test


From 201f1b27bf7a05c9ad4d3595cc5461c368f2baab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 11 Sep 2021 23:02:37 +0000
Subject: [PATCH 3801/4650] [2021-09-11T23:02:37+0000] e2e test


From da4d9114593dd7f885d7ee768c3c9054f6844cea Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 00:05:00 +0000
Subject: [PATCH 3802/4650] [2021-09-12T00:05:00+0000] e2e test


From 91852e15457c48d4c6394bfd886449f7b1767ac9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 01:24:29 +0000
Subject: [PATCH 3803/4650] [2021-09-12T01:24:29+0000] e2e test


From a4ee3c3433ebbc7168d4cb22210bd06ebdd14a92 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 02:13:20 +0000
Subject: [PATCH 3804/4650] [2021-09-12T02:13:20+0000] e2e test


From 215b67461d928a794fef40028f84f7e99ec2e77f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 03:02:24 +0000
Subject: [PATCH 3805/4650] [2021-09-12T03:02:24+0000] e2e test


From 1cc04cc3d3bda2db2d2754dca1a686203c66c9cc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 04:02:34 +0000
Subject: [PATCH 3806/4650] [2021-09-12T04:02:34+0000] e2e test


From 1fea7ef46a652890e69be0740db64d6209aef602 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 05:02:26 +0000
Subject: [PATCH 3807/4650] [2021-09-12T05:02:26+0000] e2e test


From 0cc3542c1de1e899890701c7ba624cc79e72deeb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 06:02:38 +0000
Subject: [PATCH 3808/4650] [2021-09-12T06:02:37+0000] e2e test


From ee4c90ee95726bb37717d9da8d72b3e0cc05034f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 07:02:24 +0000
Subject: [PATCH 3809/4650] [2021-09-12T07:02:24+0000] e2e test


From 8960c3530103f57dcbc1d15efc4f7aed45aa7460 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 08:02:43 +0000
Subject: [PATCH 3810/4650] [2021-09-12T08:02:43+0000] e2e test


From 8e6b64f0fb09344e26d8d288b422011be0e751f1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 09:02:34 +0000
Subject: [PATCH 3811/4650] [2021-09-12T09:02:34+0000] e2e test


From dec8378f32ead8b17b0393c4da6846afd9d2754b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 10:02:42 +0000
Subject: [PATCH 3812/4650] [2021-09-12T10:02:42+0000] e2e test


From 7434ac008de5a17e3a55c4d1fe707c2861d4b181 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 11:02:35 +0000
Subject: [PATCH 3813/4650] [2021-09-12T11:02:35+0000] e2e test


From 7f75a04c8b518e6eb9a1da139f0d550fc4307700 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 12:02:53 +0000
Subject: [PATCH 3814/4650] [2021-09-12T12:02:52+0000] e2e test


From 900ee096ce58b5844322703cb787e8fd21566a38 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 13:05:53 +0000
Subject: [PATCH 3815/4650] [2021-09-12T13:05:53+0000] e2e test


From 9c73cd3d9dba003d2573f63c7f9897b1654f3f97 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 14:02:48 +0000
Subject: [PATCH 3816/4650] [2021-09-12T14:02:48+0000] e2e test


From bfeba8d576cf0fc831f585119d69878ce1b9f822 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 15:02:28 +0000
Subject: [PATCH 3817/4650] [2021-09-12T15:02:27+0000] e2e test


From 56b97f4df2b443e1ed6e13d6065cac5866f068cd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 16:02:30 +0000
Subject: [PATCH 3818/4650] [2021-09-12T16:02:30+0000] e2e test


From c309b4b9f2193f0e0eb98f00bfcb6954429252ab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 17:05:30 +0000
Subject: [PATCH 3819/4650] [2021-09-12T17:05:29+0000] e2e test


From efd8c8105009f7cd1bca21c2268475a7c3632510 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 18:02:51 +0000
Subject: [PATCH 3820/4650] [2021-09-12T18:02:50+0000] e2e test


From 3a86d23950586c5bac8a0b0d1676f716c982270a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 19:02:33 +0000
Subject: [PATCH 3821/4650] [2021-09-12T19:02:33+0000] e2e test


From 15989769a702c3acf47b6dde868172609a9d5d66 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 20:02:48 +0000
Subject: [PATCH 3822/4650] [2021-09-12T20:02:48+0000] e2e test


From 269123c29d72829006f750f61713faf2c693e76e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 21:02:26 +0000
Subject: [PATCH 3823/4650] [2021-09-12T21:02:26+0000] e2e test


From fc5f2c920ba105abe7f58163f2660c9eed710c2e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 22:02:44 +0000
Subject: [PATCH 3824/4650] [2021-09-12T22:02:44+0000] e2e test


From f85526385604c7c6b04bf85451c08b4a6c3e5a4f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 12 Sep 2021 23:02:21 +0000
Subject: [PATCH 3825/4650] [2021-09-12T23:02:21+0000] e2e test


From d43ba63a367892ad8f8ac0e8a16c74b1fb626fdd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 00:04:35 +0000
Subject: [PATCH 3826/4650] [2021-09-13T00:04:35+0000] e2e test


From dacf0b584136a105f0c6a646d7d0a6368016ed6b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 01:23:52 +0000
Subject: [PATCH 3827/4650] [2021-09-13T01:23:52+0000] e2e test


From 348f64bb3ef64b5f9787ad9407cd3eb0591c1c96 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 02:12:33 +0000
Subject: [PATCH 3828/4650] [2021-09-13T02:12:33+0000] e2e test


From 65eca6f65eea3b17c1057b8692b1208406883ed2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 03:02:28 +0000
Subject: [PATCH 3829/4650] [2021-09-13T03:02:28+0000] e2e test


From d53a977812552f01102c93a4bcd893cb0273d013 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 04:02:43 +0000
Subject: [PATCH 3830/4650] [2021-09-13T04:02:43+0000] e2e test


From 02301d684ac456109a42d94642c75ff9ff7b505d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 05:02:27 +0000
Subject: [PATCH 3831/4650] [2021-09-13T05:02:27+0000] e2e test


From ce0c86f39fb30fe4a65829661d61620ddfa51f19 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 06:02:45 +0000
Subject: [PATCH 3832/4650] [2021-09-13T06:02:45+0000] e2e test


From 4816edf051e9368e6a976c4a6fd8ed1211dd36b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 07:02:31 +0000
Subject: [PATCH 3833/4650] [2021-09-13T07:02:31+0000] e2e test


From acb107b0a793b2a8e902ce6fdc8dff119a2f6783 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 08:02:37 +0000
Subject: [PATCH 3834/4650] [2021-09-13T08:02:37+0000] e2e test


From f018d55458ca173c51aff41f204cda5453f87e75 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 09:02:29 +0000
Subject: [PATCH 3835/4650] [2021-09-13T09:02:29+0000] e2e test


From a55832636a37e6d530740fb9737c9570be58b4fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 10:02:32 +0000
Subject: [PATCH 3836/4650] [2021-09-13T10:02:32+0000] e2e test


From fb64c10b589f2740181d4bd2c13a306c16dfe0c9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 11:02:33 +0000
Subject: [PATCH 3837/4650] [2021-09-13T11:02:33+0000] e2e test


From 445f3085222726b4c5bd142a16a7f5d9e06c7c7e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 12:02:45 +0000
Subject: [PATCH 3838/4650] [2021-09-13T12:02:45+0000] e2e test


From cfc5c798ee01eae1db82b5dc0e7ebec30c0f55bd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 13:08:34 +0000
Subject: [PATCH 3839/4650] [2021-09-13T13:08:34+0000] e2e test


From cc62fab152b091ace13805beba5c8309953bb314 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 14:02:32 +0000
Subject: [PATCH 3840/4650] [2021-09-13T14:02:32+0000] e2e test


From 72ea33ecdf1e07f544d7c34420ee69881bb3996a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 15:02:28 +0000
Subject: [PATCH 3841/4650] [2021-09-13T15:02:28+0000] e2e test


From adc37ad005c3005446be86f9da139d353b2ac8ab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 16:07:46 +0000
Subject: [PATCH 3842/4650] [2021-09-13T16:07:46+0000] e2e test


From 160a1b77fcd0c2dd7d83aa967f90875c209c18e6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 17:06:06 +0000
Subject: [PATCH 3843/4650] [2021-09-13T17:06:06+0000] e2e test


From a6a19b995107a2b5a947c5da040fedce706d8a99 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 18:03:42 +0000
Subject: [PATCH 3844/4650] [2021-09-13T18:03:42+0000] e2e test


From bc2b5d8b4996302bfd84dcb49fb1436ee38bad52 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 19:07:29 +0000
Subject: [PATCH 3845/4650] [2021-09-13T19:07:29+0000] e2e test


From 8be3fe2e7c544a33b4afd79dc96ed53d5819c2c6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 20:02:36 +0000
Subject: [PATCH 3846/4650] [2021-09-13T20:02:36+0000] e2e test


From db4865f5f3f8260e2150f364c9b7178e63630441 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 21:02:25 +0000
Subject: [PATCH 3847/4650] [2021-09-13T21:02:24+0000] e2e test


From 26f1623fde1450a904afe3dca0763a9627c7b0b1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 22:02:34 +0000
Subject: [PATCH 3848/4650] [2021-09-13T22:02:34+0000] e2e test


From c5fb47cb0c94844d1867eb005d3f5c51789c767b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 13 Sep 2021 23:02:30 +0000
Subject: [PATCH 3849/4650] [2021-09-13T23:02:30+0000] e2e test


From 350a0e0e826a5be763d6608ead9125cd4ae7536a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 00:04:33 +0000
Subject: [PATCH 3850/4650] [2021-09-14T00:04:33+0000] e2e test


From db5d9761bbcc815f3eb0d921e83d4f0fa9a6b4d1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 01:24:09 +0000
Subject: [PATCH 3851/4650] [2021-09-14T01:24:09+0000] e2e test


From 9571753bd80b0d686aa76614c58da461d38151a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 02:12:05 +0000
Subject: [PATCH 3852/4650] [2021-09-14T02:12:05+0000] e2e test


From cdb6c37d63b213bee2528f38d3645cb19dc672af Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 03:02:39 +0000
Subject: [PATCH 3853/4650] [2021-09-14T03:02:39+0000] e2e test


From 9ecb575706d361f0856ddd580bbb3efabe5fd179 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 04:02:35 +0000
Subject: [PATCH 3854/4650] [2021-09-14T04:02:35+0000] e2e test


From 660db9ae9e91faffddcd3e4c5b0aa81d762ed294 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 05:02:19 +0000
Subject: [PATCH 3855/4650] [2021-09-14T05:02:19+0000] e2e test


From 1103d34e9d1c097a64dfa9ee0ede5fc22ba9be02 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 06:03:01 +0000
Subject: [PATCH 3856/4650] [2021-09-14T06:03:01+0000] e2e test


From b8238390c6bf6806e5e2c292e042a569eb366223 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 07:02:38 +0000
Subject: [PATCH 3857/4650] [2021-09-14T07:02:38+0000] e2e test


From fe03a029ec3b6b7330a570b94a0145e74fa69d4e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 08:02:57 +0000
Subject: [PATCH 3858/4650] [2021-09-14T08:02:57+0000] e2e test


From b47656d226971005b2aa88b1b33275c005c3a88b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 09:02:28 +0000
Subject: [PATCH 3859/4650] [2021-09-14T09:02:28+0000] e2e test


From 75ee8812ca2e06faf95c8de17af1536d4e7f7446 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 10:02:28 +0000
Subject: [PATCH 3860/4650] [2021-09-14T10:02:28+0000] e2e test


From 50c62dd69695c71c72ad791e0249978278759cef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 11:02:22 +0000
Subject: [PATCH 3861/4650] [2021-09-14T11:02:22+0000] e2e test


From 3f82002f38eb45a0d3ecfbfec5a8870816279828 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 12:02:48 +0000
Subject: [PATCH 3862/4650] [2021-09-14T12:02:47+0000] e2e test


From 46d361dc45f1b15a476f8b7179a43ede91367877 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 13:06:51 +0000
Subject: [PATCH 3863/4650] [2021-09-14T13:06:51+0000] e2e test


From e1c690c9bfedd7a99e5e95174b700eb5020e4f50 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 14:02:31 +0000
Subject: [PATCH 3864/4650] [2021-09-14T14:02:31+0000] e2e test


From a4e6fbabe45b097036f362ae3217b603d4363534 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 15:02:29 +0000
Subject: [PATCH 3865/4650] [2021-09-14T15:02:29+0000] e2e test


From a70fc1fc4b9d8f9ffa8788027b1a21ecffe66f8f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 16:02:40 +0000
Subject: [PATCH 3866/4650] [2021-09-14T16:02:40+0000] e2e test


From 914ee892c62da648d4bffcb0d0cd5458a011bfeb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 17:06:09 +0000
Subject: [PATCH 3867/4650] [2021-09-14T17:06:09+0000] e2e test


From eb5be1c66dc18ade5d1b35f62734ab1aa5e6b6f7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 18:06:45 +0000
Subject: [PATCH 3868/4650] [2021-09-14T18:06:45+0000] e2e test


From 8f01ba36d4f0fe2b2ea0784350a47560bcbdf071 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 19:02:28 +0000
Subject: [PATCH 3869/4650] [2021-09-14T19:02:28+0000] e2e test


From 721181938b38a674d8a42958fca54a7bda20a038 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 20:02:38 +0000
Subject: [PATCH 3870/4650] [2021-09-14T20:02:38+0000] e2e test


From 24466b5d82434a8a05595528c2688ab717684a07 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 21:02:31 +0000
Subject: [PATCH 3871/4650] [2021-09-14T21:02:31+0000] e2e test


From 7e1af3b08669208b82d240686f4e2c476773b25b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 22:02:43 +0000
Subject: [PATCH 3872/4650] [2021-09-14T22:02:43+0000] e2e test


From e4d3557d1ec99c92c16d62f8661ff0167b2945e3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 14 Sep 2021 23:02:38 +0000
Subject: [PATCH 3873/4650] [2021-09-14T23:02:38+0000] e2e test


From 1fb8bd57061069b6a6b07282428562d2c57527e3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 00:04:32 +0000
Subject: [PATCH 3874/4650] [2021-09-15T00:04:32+0000] e2e test


From 5e75b82dfb3652038fdb322daf86f3842f24dfee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 01:23:38 +0000
Subject: [PATCH 3875/4650] [2021-09-15T01:23:38+0000] e2e test


From 90d5a15e64eeb74f7fdf4d287f8f8ba9fd9269fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 02:11:52 +0000
Subject: [PATCH 3876/4650] [2021-09-15T02:11:51+0000] e2e test


From 9b313ed0c5648b0473dcab2ad623c7e08007bdf8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 03:02:35 +0000
Subject: [PATCH 3877/4650] [2021-09-15T03:02:35+0000] e2e test


From ec837892dc9f1752fc27e326c3dde7ca92a29c9c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 04:02:46 +0000
Subject: [PATCH 3878/4650] [2021-09-15T04:02:46+0000] e2e test


From 8be5fbb0c63444756196c04ebd86d8a5c7d25597 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 05:02:24 +0000
Subject: [PATCH 3879/4650] [2021-09-15T05:02:24+0000] e2e test


From 378fdd17b0047213ffabf788cceba6a8cef867db Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 06:02:48 +0000
Subject: [PATCH 3880/4650] [2021-09-15T06:02:48+0000] e2e test


From 50ca5337ba91c397d9f636f95e7bd5f12de9abf6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 07:02:45 +0000
Subject: [PATCH 3881/4650] [2021-09-15T07:02:45+0000] e2e test


From e9d01953ce7a7ddb50d9d5f1632555dfb9a6411f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 08:02:48 +0000
Subject: [PATCH 3882/4650] [2021-09-15T08:02:48+0000] e2e test


From 72ea22557d697a9cc394a25f316db067b0fbef83 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 09:02:46 +0000
Subject: [PATCH 3883/4650] [2021-09-15T09:02:46+0000] e2e test


From 76f82c57dfa29fdd79fb568e646fa9c74ffa1666 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 10:02:41 +0000
Subject: [PATCH 3884/4650] [2021-09-15T10:02:41+0000] e2e test


From 31b6106645d78563ea56d6edfc1126d7315ffbce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 11:02:26 +0000
Subject: [PATCH 3885/4650] [2021-09-15T11:02:26+0000] e2e test


From ca00b3f9919e67d3f6b5c2b27c08a4e8c559769c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 12:02:56 +0000
Subject: [PATCH 3886/4650] [2021-09-15T12:02:56+0000] e2e test


From ac1506ccc38d93957feed770bf0dfa2251f3a5a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 13:06:54 +0000
Subject: [PATCH 3887/4650] [2021-09-15T13:06:54+0000] e2e test


From a9ac2e2637752d8e219f287d8d99a2f2b6637420 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 14:02:38 +0000
Subject: [PATCH 3888/4650] [2021-09-15T14:02:38+0000] e2e test


From 74b8d863f1fbc321d934c9f4d1ff5e7304db49a5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 15:02:40 +0000
Subject: [PATCH 3889/4650] [2021-09-15T15:02:40+0000] e2e test


From 61a0f414b17aadcd8aaf255104f6b9c4296128c0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 16:02:32 +0000
Subject: [PATCH 3890/4650] [2021-09-15T16:02:32+0000] e2e test


From b383941b12ce4bbcbc250feabe08e8ce1972c211 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 17:04:47 +0000
Subject: [PATCH 3891/4650] [2021-09-15T17:04:47+0000] e2e test


From 72c9b7594b6b12a61f5900b7de954f55da28892b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 18:02:47 +0000
Subject: [PATCH 3892/4650] [2021-09-15T18:02:46+0000] e2e test


From f64c17d468d758655d25a10fe0ee097373eb21d0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 19:02:38 +0000
Subject: [PATCH 3893/4650] [2021-09-15T19:02:38+0000] e2e test


From cfb87206f5ae332c7471b38e572212ebfb5668a8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 20:02:38 +0000
Subject: [PATCH 3894/4650] [2021-09-15T20:02:38+0000] e2e test


From f07322eb74a485639b697bc53693c07101690325 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 21:02:19 +0000
Subject: [PATCH 3895/4650] [2021-09-15T21:02:19+0000] e2e test


From f4a64e36831e6f904829b1aa62458002f28f4a4c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 22:02:36 +0000
Subject: [PATCH 3896/4650] [2021-09-15T22:02:36+0000] e2e test


From a8480222ce7da4bd1550a6cfa6d222e2e758d096 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 15 Sep 2021 23:02:24 +0000
Subject: [PATCH 3897/4650] [2021-09-15T23:02:24+0000] e2e test


From 516be6c124fe23ffaa5f7225631094f829d9bea0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 00:04:27 +0000
Subject: [PATCH 3898/4650] [2021-09-16T00:04:27+0000] e2e test


From d47b56873851cc50d4ffe4ef3b8dc9dd00006703 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 01:25:03 +0000
Subject: [PATCH 3899/4650] [2021-09-16T01:25:03+0000] e2e test


From 41108c1c6d905f32fef3687d24e76c3a73f20d68 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 02:15:08 +0000
Subject: [PATCH 3900/4650] [2021-09-16T02:15:08+0000] e2e test


From c9113b9332e0749c606688be5ab6da2fb61b4247 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 03:02:24 +0000
Subject: [PATCH 3901/4650] [2021-09-16T03:02:24+0000] e2e test


From b69d586b94bb9af8c4ef06c06c18108726adadbc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 04:02:39 +0000
Subject: [PATCH 3902/4650] [2021-09-16T04:02:39+0000] e2e test


From 574e03431ca76a2551f1f80bc8a5246e0e606787 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 05:02:24 +0000
Subject: [PATCH 3903/4650] [2021-09-16T05:02:24+0000] e2e test


From fe3d1a31dc733622dc4c83bdb7b349cdb257e75c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 06:02:49 +0000
Subject: [PATCH 3904/4650] [2021-09-16T06:02:49+0000] e2e test


From fc88d7f310b473bfced635a164b78db2e0de8dfa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 07:02:33 +0000
Subject: [PATCH 3905/4650] [2021-09-16T07:02:32+0000] e2e test


From c3e886feeea61d1dc6d94d77fae5058379b44cb7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 08:07:39 +0000
Subject: [PATCH 3906/4650] [2021-09-16T08:07:38+0000] e2e test


From b6851cfbd68f77892c8b8579807f4ed79b5a91f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 09:02:38 +0000
Subject: [PATCH 3907/4650] [2021-09-16T09:02:38+0000] e2e test


From 7c5f497c6fea696ece1d61ea739a70748f8408de Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 10:02:42 +0000
Subject: [PATCH 3908/4650] [2021-09-16T10:02:42+0000] e2e test


From 07dbcea13e7f4065f166c0c220bfe6e16255a0c1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 11:02:38 +0000
Subject: [PATCH 3909/4650] [2021-09-16T11:02:38+0000] e2e test


From 473a0eae67a5096b901c61bbff21a148f0101881 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 12:02:56 +0000
Subject: [PATCH 3910/4650] [2021-09-16T12:02:56+0000] e2e test


From 3439a7ba0b211c82b581b8616f985c0dd474d439 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 13:07:13 +0000
Subject: [PATCH 3911/4650] [2021-09-16T13:07:13+0000] e2e test


From 1989861210782e6adcd30718fc61c01c7dd69db6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 14:02:31 +0000
Subject: [PATCH 3912/4650] [2021-09-16T14:02:31+0000] e2e test


From 909e974f345c595340c701acd9a3927fad1c0682 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 15:02:27 +0000
Subject: [PATCH 3913/4650] [2021-09-16T15:02:27+0000] e2e test


From a4775218c47c63125a988e661c9db5acea9c6775 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 16:02:46 +0000
Subject: [PATCH 3914/4650] [2021-09-16T16:02:46+0000] e2e test


From c0eeb052e4e60eceb05e63c0c7f20c27d59e0c17 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 17:05:39 +0000
Subject: [PATCH 3915/4650] [2021-09-16T17:05:39+0000] e2e test


From 15314c667728b90d7f0f372e1312adeaf7d0b8e3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 18:02:27 +0000
Subject: [PATCH 3916/4650] [2021-09-16T18:02:27+0000] e2e test


From e28f03f3374fb6a6bf72e72e340ae1714431b3f4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 19:02:15 +0000
Subject: [PATCH 3917/4650] [2021-09-16T19:02:15+0000] e2e test


From a51baa1f1ca803a30f9355eab7c0fde1e266f55f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 20:02:33 +0000
Subject: [PATCH 3918/4650] [2021-09-16T20:02:33+0000] e2e test


From 9b6454187fccd1f37751cf35d6198f41023074db Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 21:02:28 +0000
Subject: [PATCH 3919/4650] [2021-09-16T21:02:28+0000] e2e test


From b5a94a1f61d18a7318f5845408860e8bb2057820 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 22:02:23 +0000
Subject: [PATCH 3920/4650] [2021-09-16T22:02:23+0000] e2e test


From 8118b88bcbdd1b7d73dbec8a2f2e0f948e7ef937 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 16 Sep 2021 23:02:29 +0000
Subject: [PATCH 3921/4650] [2021-09-16T23:02:29+0000] e2e test


From 143de2b90be4a422b852ce10ddcb1c892ff12b1f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 00:04:15 +0000
Subject: [PATCH 3922/4650] [2021-09-17T00:04:15+0000] e2e test


From d2cf746332e622c35b3fa50e3ab7c743515c5d1a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 01:25:48 +0000
Subject: [PATCH 3923/4650] [2021-09-17T01:25:48+0000] e2e test


From 6bb55f5c1bbef876006e24c3c905b74b757d4ba9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 02:15:26 +0000
Subject: [PATCH 3924/4650] [2021-09-17T02:15:26+0000] e2e test


From 54321300cdeba5ef661adb8b5f5c0d33ca515c6e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 03:02:30 +0000
Subject: [PATCH 3925/4650] [2021-09-17T03:02:30+0000] e2e test


From e55d5f315651614e69c111635961ccb29ea855d5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 04:02:34 +0000
Subject: [PATCH 3926/4650] [2021-09-17T04:02:34+0000] e2e test


From ff2868dbf2a58d5d09bb00b4aed0658326121fbf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 05:02:21 +0000
Subject: [PATCH 3927/4650] [2021-09-17T05:02:21+0000] e2e test


From 7433fdd61005dea773f1311cd768dccada1a0f22 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 06:02:54 +0000
Subject: [PATCH 3928/4650] [2021-09-17T06:02:54+0000] e2e test


From fda53af0dfa82780456b846e18e0b48b96ca3faf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 07:02:30 +0000
Subject: [PATCH 3929/4650] [2021-09-17T07:02:29+0000] e2e test


From 942f249ca9d7d3df4cc357f4fb02606f830344e6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 08:02:38 +0000
Subject: [PATCH 3930/4650] [2021-09-17T08:02:38+0000] e2e test


From 174b18a909250cc12542ff8806fed9f4d484257c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 09:02:35 +0000
Subject: [PATCH 3931/4650] [2021-09-17T09:02:35+0000] e2e test


From ff40cb149a5c5f60829dfab551ae2f73072ce887 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 10:02:52 +0000
Subject: [PATCH 3932/4650] [2021-09-17T10:02:52+0000] e2e test


From a026640deefffbe0e21a57a12a40f10b0fd23dd9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 11:02:32 +0000
Subject: [PATCH 3933/4650] [2021-09-17T11:02:32+0000] e2e test


From b6bb970ee15127cc99bbcecb6ec8ec0f5d5116c8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 12:02:32 +0000
Subject: [PATCH 3934/4650] [2021-09-17T12:02:32+0000] e2e test


From 99bf0a62bffb7ebba40586beb87653091d2a82ad Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 13:06:43 +0000
Subject: [PATCH 3935/4650] [2021-09-17T13:06:43+0000] e2e test


From 4e4d53bdd2556d5a1d6822a8575cbc916385808b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 14:02:49 +0000
Subject: [PATCH 3936/4650] [2021-09-17T14:02:49+0000] e2e test


From be42e5e32ab0d54b2e05fa9b2cfe944001e4183b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 15:02:45 +0000
Subject: [PATCH 3937/4650] [2021-09-17T15:02:44+0000] e2e test


From 43d24e407e88f6a0013a4cb823770adc49a88aea Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 16:02:34 +0000
Subject: [PATCH 3938/4650] [2021-09-17T16:02:34+0000] e2e test


From 55117bc98a67345a8848289741ba4a684cc425fc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 17:06:27 +0000
Subject: [PATCH 3939/4650] [2021-09-17T17:06:27+0000] e2e test


From 9a48f6080673dc16e198e1bfc7de5d91ee0b4cf9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 18:02:42 +0000
Subject: [PATCH 3940/4650] [2021-09-17T18:02:42+0000] e2e test


From 47b87b349ab973ae1c1c0d4e5cd103c27c34c914 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 19:02:31 +0000
Subject: [PATCH 3941/4650] [2021-09-17T19:02:31+0000] e2e test


From 06c89d393afa5dde2876758930d6548d70b2fa0c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 20:02:43 +0000
Subject: [PATCH 3942/4650] [2021-09-17T20:02:42+0000] e2e test


From 7362f7f1aabf1d5e331858708110be3c8f5cbfcc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 21:02:29 +0000
Subject: [PATCH 3943/4650] [2021-09-17T21:02:29+0000] e2e test


From b153622272ddeaba3a6530d3a95b8d174b791758 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 22:02:44 +0000
Subject: [PATCH 3944/4650] [2021-09-17T22:02:44+0000] e2e test


From e7ef0609436063977d209c335602914998faad99 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 17 Sep 2021 23:02:24 +0000
Subject: [PATCH 3945/4650] [2021-09-17T23:02:24+0000] e2e test


From 64326f6d8df8f5bad96109d29b02314b4eb10b00 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 00:04:18 +0000
Subject: [PATCH 3946/4650] [2021-09-18T00:04:18+0000] e2e test


From f46f29caed5386c5a590d81285f087b77baaa065 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 01:24:09 +0000
Subject: [PATCH 3947/4650] [2021-09-18T01:24:08+0000] e2e test


From 6d0d4cb374dfa5bbad13e04dd9c7b683959d37b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 02:14:39 +0000
Subject: [PATCH 3948/4650] [2021-09-18T02:14:39+0000] e2e test


From 7121b82b9debc4a25d31414029787de5fd1e3c3f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 03:02:26 +0000
Subject: [PATCH 3949/4650] [2021-09-18T03:02:26+0000] e2e test


From e1d6ed79eac606d8ba2a0278e9c71c69dafbe65a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 04:02:30 +0000
Subject: [PATCH 3950/4650] [2021-09-18T04:02:30+0000] e2e test


From 2ecd1b3a18403166c44b4b377460b4679cf9580f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 05:02:23 +0000
Subject: [PATCH 3951/4650] [2021-09-18T05:02:23+0000] e2e test


From d6b3304dc86e8c61a231e1b1119051257cffba59 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 06:02:50 +0000
Subject: [PATCH 3952/4650] [2021-09-18T06:02:50+0000] e2e test


From 0b1650e363f84c163916545f4a6533fcf94b960f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 07:02:39 +0000
Subject: [PATCH 3953/4650] [2021-09-18T07:02:39+0000] e2e test


From 76425e686edcab567210e02bf8afcc8f83b183d4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 08:02:31 +0000
Subject: [PATCH 3954/4650] [2021-09-18T08:02:31+0000] e2e test


From bc2b5a0a3a4c2c4787c714662e5d4a96cf21ab32 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 09:02:27 +0000
Subject: [PATCH 3955/4650] [2021-09-18T09:02:27+0000] e2e test


From 57e8697a05f168eb136c046811c38924c5886d6a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 10:02:42 +0000
Subject: [PATCH 3956/4650] [2021-09-18T10:02:42+0000] e2e test


From 125c1204c750cc4abce229bad9b807f698b1da30 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 11:02:43 +0000
Subject: [PATCH 3957/4650] [2021-09-18T11:02:42+0000] e2e test


From e04b4915f073ddab6fd118fe003b8be9171d61fe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 12:02:56 +0000
Subject: [PATCH 3958/4650] [2021-09-18T12:02:56+0000] e2e test


From 68900c6aec286093a0be1e809e529f1d30e5b84b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 13:06:10 +0000
Subject: [PATCH 3959/4650] [2021-09-18T13:06:10+0000] e2e test


From 3967f613f32c7607b784f7140b6b198636864e8b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 14:02:31 +0000
Subject: [PATCH 3960/4650] [2021-09-18T14:02:31+0000] e2e test


From de2a6a001848415cd98bf0779d2325d9a3c43852 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 15:02:46 +0000
Subject: [PATCH 3961/4650] [2021-09-18T15:02:45+0000] e2e test


From 75d91b905cf56a39960f0d668a11cfc3a9a535ee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 16:02:40 +0000
Subject: [PATCH 3962/4650] [2021-09-18T16:02:39+0000] e2e test


From 35d563048f8cd910dd7542a7e2ba1523e1077be7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 17:04:45 +0000
Subject: [PATCH 3963/4650] [2021-09-18T17:04:45+0000] e2e test


From 77f4d8f8611eba11c6c685cdfbba810e7402123e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 18:02:25 +0000
Subject: [PATCH 3964/4650] [2021-09-18T18:02:25+0000] e2e test


From a9c325c20923bbb6cf36f59039bd637743a9487e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 19:02:20 +0000
Subject: [PATCH 3965/4650] [2021-09-18T19:02:19+0000] e2e test


From a30e3285410c66fb2dafec23551e90bd0c5ab013 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 20:02:36 +0000
Subject: [PATCH 3966/4650] [2021-09-18T20:02:36+0000] e2e test


From 0cef0b36a08cde95b2beb69b0949209cb724c988 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 21:02:19 +0000
Subject: [PATCH 3967/4650] [2021-09-18T21:02:18+0000] e2e test


From fc10e1e5a886b7b4b8982bfcb54a8b32a77f0090 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 22:02:33 +0000
Subject: [PATCH 3968/4650] [2021-09-18T22:02:33+0000] e2e test


From c90d6b9a413a996655e0498733a78d442348f469 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 18 Sep 2021 23:02:49 +0000
Subject: [PATCH 3969/4650] [2021-09-18T23:02:49+0000] e2e test


From 71764fb0ef98c56a37e93d5b754b59110598eef0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 00:04:53 +0000
Subject: [PATCH 3970/4650] [2021-09-19T00:04:53+0000] e2e test


From 633104ebcd6a98995ffdfefa12f00938df444928 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 01:25:01 +0000
Subject: [PATCH 3971/4650] [2021-09-19T01:25:01+0000] e2e test


From 13bec2202a953bfa66eb71ad738a6010bf62384f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 02:13:26 +0000
Subject: [PATCH 3972/4650] [2021-09-19T02:13:26+0000] e2e test


From e95f7c6e96783f9c8c233a9a96b00ea7a1126baf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 03:02:38 +0000
Subject: [PATCH 3973/4650] [2021-09-19T03:02:37+0000] e2e test


From 693ddb7729b1bce1c11663ad36b863e1709022ea Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 04:02:36 +0000
Subject: [PATCH 3974/4650] [2021-09-19T04:02:36+0000] e2e test


From dbae170fe4fad5e70bdd0c2366ab9f6e82f90964 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 05:02:25 +0000
Subject: [PATCH 3975/4650] [2021-09-19T05:02:25+0000] e2e test


From cd51eb25de04fc7223e17ecdf24abaf7f104364f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 06:02:43 +0000
Subject: [PATCH 3976/4650] [2021-09-19T06:02:43+0000] e2e test


From 9d5c7b2bf011a8d971ab7667a449996e13b7100a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 07:02:47 +0000
Subject: [PATCH 3977/4650] [2021-09-19T07:02:47+0000] e2e test


From 7c40877ca15332750c06669f61abf3449eef541f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 08:02:37 +0000
Subject: [PATCH 3978/4650] [2021-09-19T08:02:37+0000] e2e test


From b18e5334f3ac078f7c1463992adf60c458a4225d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 09:02:26 +0000
Subject: [PATCH 3979/4650] [2021-09-19T09:02:26+0000] e2e test


From bbd9c34f07594e3ec80b3fdba4cd6f8ad1d7d0d5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 10:02:49 +0000
Subject: [PATCH 3980/4650] [2021-09-19T10:02:49+0000] e2e test


From 9937e5956e0270aa3fe15d45d818ab3d4b2e7cdf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 11:02:44 +0000
Subject: [PATCH 3981/4650] [2021-09-19T11:02:43+0000] e2e test


From d5ce705ce68a38870e6aa032f9095c414177cce0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 12:03:00 +0000
Subject: [PATCH 3982/4650] [2021-09-19T12:03:00+0000] e2e test


From 63cc67ece8ac058dbbcaf45f67b77a882d276329 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 13:05:47 +0000
Subject: [PATCH 3983/4650] [2021-09-19T13:05:47+0000] e2e test


From f3307f910d4ee0a4aee9ca1629b5e2f1b6b807da Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 14:02:38 +0000
Subject: [PATCH 3984/4650] [2021-09-19T14:02:38+0000] e2e test


From 592d6ba344e71fa127a83651b8092431e6a0efc0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 15:02:47 +0000
Subject: [PATCH 3985/4650] [2021-09-19T15:02:46+0000] e2e test


From 7399c0065b36f21399ab21c46c02631aa21b5627 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 16:02:33 +0000
Subject: [PATCH 3986/4650] [2021-09-19T16:02:33+0000] e2e test


From bd22b370319ea3b72d0a910f42ea5365f2bb4bd8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 17:04:40 +0000
Subject: [PATCH 3987/4650] [2021-09-19T17:04:40+0000] e2e test


From 9ccef89e8331158acd676356e9cfd970a322d994 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 18:02:49 +0000
Subject: [PATCH 3988/4650] [2021-09-19T18:02:48+0000] e2e test


From 7bb35d870d2dae719dade98d96bef17c411e516e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 19:02:35 +0000
Subject: [PATCH 3989/4650] [2021-09-19T19:02:35+0000] e2e test


From 603e88b395ebc4510e77d1e04a12b1e92c2cb3ba Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 20:02:40 +0000
Subject: [PATCH 3990/4650] [2021-09-19T20:02:40+0000] e2e test


From 8b97ba069a6248ce9f091cfe09314d692b14625c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 21:02:45 +0000
Subject: [PATCH 3991/4650] [2021-09-19T21:02:45+0000] e2e test


From 128f6805982f12fef9e6ff69c8be504fb244a84e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 22:02:28 +0000
Subject: [PATCH 3992/4650] [2021-09-19T22:02:28+0000] e2e test


From 2a5e6efa21a8c94e9daa4b4daafb3e939e509ba1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 19 Sep 2021 23:02:43 +0000
Subject: [PATCH 3993/4650] [2021-09-19T23:02:42+0000] e2e test


From a44c0e8a48742e2a5e54b2858fe841c30ed724ab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 00:04:50 +0000
Subject: [PATCH 3994/4650] [2021-09-20T00:04:50+0000] e2e test


From 3ef5a6b0e7f4585c85c913bf4788b75b4550fbdb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 01:24:41 +0000
Subject: [PATCH 3995/4650] [2021-09-20T01:24:41+0000] e2e test


From d8460ff6bfa2692aa9e4d479958a8dc47f1a9c01 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 02:13:50 +0000
Subject: [PATCH 3996/4650] [2021-09-20T02:13:50+0000] e2e test


From f9917010c59042341e7ab047eb723703a7c25a37 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 03:02:29 +0000
Subject: [PATCH 3997/4650] [2021-09-20T03:02:29+0000] e2e test


From 3c759d87f341fc5e9811d2f80ad877cf8cb94277 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 04:02:26 +0000
Subject: [PATCH 3998/4650] [2021-09-20T04:02:26+0000] e2e test


From 2b99cb23ee2b1a40bf563b5cb0647a41f2b39471 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 05:02:22 +0000
Subject: [PATCH 3999/4650] [2021-09-20T05:02:22+0000] e2e test


From 08654450d59b644d03f35ad7d4d7783dc45d7927 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 06:02:45 +0000
Subject: [PATCH 4000/4650] [2021-09-20T06:02:45+0000] e2e test


From de7cd501359cade145663679edd235ef730bee6d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 07:02:36 +0000
Subject: [PATCH 4001/4650] [2021-09-20T07:02:36+0000] e2e test


From d7b85cca77a28861e3db599c5054ce8fb14716e0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 08:02:35 +0000
Subject: [PATCH 4002/4650] [2021-09-20T08:02:35+0000] e2e test


From 6d8135963fbb159aadfaa1079dfffb117ee6c004 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 09:02:44 +0000
Subject: [PATCH 4003/4650] [2021-09-20T09:02:44+0000] e2e test


From 2cdf794036ce82fadd85515372a51ca79228cb25 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 10:02:28 +0000
Subject: [PATCH 4004/4650] [2021-09-20T10:02:28+0000] e2e test


From 349a3674b92639dfb678ab398f51b2fb864c8a3a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 11:02:39 +0000
Subject: [PATCH 4005/4650] [2021-09-20T11:02:39+0000] e2e test


From 226687b5d10e838e76a9e699142a4cb9a9a88abd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 12:02:55 +0000
Subject: [PATCH 4006/4650] [2021-09-20T12:02:55+0000] e2e test


From e25685bd02d766b562ef9a3ee9bb14278e7e3d0d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 13:07:35 +0000
Subject: [PATCH 4007/4650] [2021-09-20T13:07:35+0000] e2e test


From d99a0a81c2d8e4916fd0cf6018f72fe29895490a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 14:02:33 +0000
Subject: [PATCH 4008/4650] [2021-09-20T14:02:33+0000] e2e test


From af0e3d4d51a255f4d3e3dfdac38742c53d36f92a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 15:02:37 +0000
Subject: [PATCH 4009/4650] [2021-09-20T15:02:37+0000] e2e test


From 0f6a7692c71c5cbf7f55f56c04819272c1470c3e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 16:07:32 +0000
Subject: [PATCH 4010/4650] [2021-09-20T16:07:32+0000] e2e test


From 9c48fc8ecdb6faf09019da702c5f00c4acb0e1ad Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 17:03:45 +0000
Subject: [PATCH 4011/4650] [2021-09-20T17:03:45+0000] e2e test


From 780812662b5b74c66222d6d05f700252d433bdfa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 18:02:33 +0000
Subject: [PATCH 4012/4650] [2021-09-20T18:02:33+0000] e2e test


From 72bc5a09db86e736d92bf4777f806856ba306754 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 19:02:31 +0000
Subject: [PATCH 4013/4650] [2021-09-20T19:02:31+0000] e2e test


From 400ba536947ed8e9d1c06faa6ab84d86adf0088b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 20:02:30 +0000
Subject: [PATCH 4014/4650] [2021-09-20T20:02:30+0000] e2e test


From ffcd4e386b4bccdbcbe8e06fa5cf3e73a66d986b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 21:02:30 +0000
Subject: [PATCH 4015/4650] [2021-09-20T21:02:30+0000] e2e test


From 9d5bfb6403971850dea37de41236440a2bbcdd9e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 22:02:51 +0000
Subject: [PATCH 4016/4650] [2021-09-20T22:02:51+0000] e2e test


From 157190f28f530c0f985bae40f32851212affb1d2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 20 Sep 2021 23:02:22 +0000
Subject: [PATCH 4017/4650] [2021-09-20T23:02:21+0000] e2e test


From 28e2940636b5d67a09e5023462f3249b539ec7b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 00:04:28 +0000
Subject: [PATCH 4018/4650] [2021-09-21T00:04:28+0000] e2e test


From 7675261d13b3de10a9b6e76912c5f0295e5b7e67 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 01:24:12 +0000
Subject: [PATCH 4019/4650] [2021-09-21T01:24:12+0000] e2e test


From b0af20a3d06d360fb2816d9c33fcc6e9d9e796bc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 02:13:18 +0000
Subject: [PATCH 4020/4650] [2021-09-21T02:13:17+0000] e2e test


From b63fb5473b00746d8f874ed92c9a71e115c6c63f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 03:02:38 +0000
Subject: [PATCH 4021/4650] [2021-09-21T03:02:37+0000] e2e test


From 6386d7938f91440c7d53aa5d3962d70f4afac925 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 04:02:30 +0000
Subject: [PATCH 4022/4650] [2021-09-21T04:02:30+0000] e2e test


From e7a21a62f0dd8d8156f9018ee86cb94c9ccb19d8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 05:02:22 +0000
Subject: [PATCH 4023/4650] [2021-09-21T05:02:22+0000] e2e test


From f69e21c948bbcf8f63e1bc525c42dd6f46081d00 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 06:02:29 +0000
Subject: [PATCH 4024/4650] [2021-09-21T06:02:29+0000] e2e test


From 6977f2e5f5d6f7275629ada7af8b8936b224f708 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 07:02:25 +0000
Subject: [PATCH 4025/4650] [2021-09-21T07:02:25+0000] e2e test


From a847fe9df6a7c298b8222917c29d6fc39b91c236 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 09:02:48 +0000
Subject: [PATCH 4026/4650] [2021-09-21T09:02:48+0000] e2e test


From 3edf61e574bd4ce986ad76df9eb74563ba02a569 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 10:02:46 +0000
Subject: [PATCH 4027/4650] [2021-09-21T10:02:46+0000] e2e test


From 5efa1bb96cd6c345cf99c9688d5f8766efe03525 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 11:02:36 +0000
Subject: [PATCH 4028/4650] [2021-09-21T11:02:36+0000] e2e test


From 4aa813e153bd5e382f7835a65b399a04a9876154 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 12:02:54 +0000
Subject: [PATCH 4029/4650] [2021-09-21T12:02:54+0000] e2e test


From 51c67e659160a25de29f5ea045b7b99078ab8dad Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 13:06:53 +0000
Subject: [PATCH 4030/4650] [2021-09-21T13:06:53+0000] e2e test


From 466551b7237f476837495b46f7f958abcdd42f2c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 14:02:28 +0000
Subject: [PATCH 4031/4650] [2021-09-21T14:02:28+0000] e2e test


From bbc7739a0a79b18a908dc1800cdcc94804b37bba Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 15:02:27 +0000
Subject: [PATCH 4032/4650] [2021-09-21T15:02:27+0000] e2e test


From 98ef50a9edf9ee74a01a14faeda4b4bb1018c1cd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 16:02:30 +0000
Subject: [PATCH 4033/4650] [2021-09-21T16:02:30+0000] e2e test


From f7e7d320b4835995122b1971d717d340a07a876b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 17:06:13 +0000
Subject: [PATCH 4034/4650] [2021-09-21T17:06:13+0000] e2e test


From 3705d402941d1a3284c44ca5b74e9e8ee2f43338 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 18:02:39 +0000
Subject: [PATCH 4035/4650] [2021-09-21T18:02:39+0000] e2e test


From 29da10c50cff050b66c6ca5f1a240aa382ca1a1b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 19:02:30 +0000
Subject: [PATCH 4036/4650] [2021-09-21T19:02:30+0000] e2e test


From 834f539f396d1bcabacb1190eb45a6a81c23cec6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 20:02:47 +0000
Subject: [PATCH 4037/4650] [2021-09-21T20:02:47+0000] e2e test


From f0635bdd2d35a3aee7a667b275206ec488ab843b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 21:02:25 +0000
Subject: [PATCH 4038/4650] [2021-09-21T21:02:25+0000] e2e test


From 888e951745a2395282ccb0b90f178403a1689ba7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 22:02:54 +0000
Subject: [PATCH 4039/4650] [2021-09-21T22:02:53+0000] e2e test


From 9c496ea6dc2c37fc9ca944183825ecb9b40345fe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 21 Sep 2021 23:02:26 +0000
Subject: [PATCH 4040/4650] [2021-09-21T23:02:26+0000] e2e test


From 7076890cb2395ac7639a45e808b75f5158af8112 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 00:04:43 +0000
Subject: [PATCH 4041/4650] [2021-09-22T00:04:43+0000] e2e test


From bb4dd924fb7b8505c9a2c31af966237d1342678b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 01:24:21 +0000
Subject: [PATCH 4042/4650] [2021-09-22T01:24:20+0000] e2e test


From aa455d036a515f63abef2a8dd1e24acd5177fa9a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 02:14:07 +0000
Subject: [PATCH 4043/4650] [2021-09-22T02:14:07+0000] e2e test


From e1c0d2a31bc8da458dac79c8e53cbba63cfc80f8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 03:02:31 +0000
Subject: [PATCH 4044/4650] [2021-09-22T03:02:31+0000] e2e test


From 77d6d88cc3a05ba0ff7591671eca296ddabb7206 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 04:02:50 +0000
Subject: [PATCH 4045/4650] [2021-09-22T04:02:50+0000] e2e test


From caea5eebf39de9b0ea1c9f6bfbd83cac01877abb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 05:02:36 +0000
Subject: [PATCH 4046/4650] [2021-09-22T05:02:35+0000] e2e test


From 66bf8f4f9ec570bb63d220f7dcbc84a405f01b96 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 06:02:37 +0000
Subject: [PATCH 4047/4650] [2021-09-22T06:02:37+0000] e2e test


From bf8345101ce3dc458e81f8b2c78278e55fcf0a4b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 07:02:30 +0000
Subject: [PATCH 4048/4650] [2021-09-22T07:02:29+0000] e2e test


From 457abb5e1df8314169f34e4768dabfc89dd440a7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 08:03:01 +0000
Subject: [PATCH 4049/4650] [2021-09-22T08:03:01+0000] e2e test


From 2d75ce216036e56e1c4303b99adc4c1d3b9e330f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 09:02:34 +0000
Subject: [PATCH 4050/4650] [2021-09-22T09:02:34+0000] e2e test


From e1a9bcf85cc9ea2bdda30bdebdc05512ef481941 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 10:02:44 +0000
Subject: [PATCH 4051/4650] [2021-09-22T10:02:44+0000] e2e test


From aa374b5630cc06e97825122cf9b9791616a876cd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 11:02:33 +0000
Subject: [PATCH 4052/4650] [2021-09-22T11:02:33+0000] e2e test


From eb323f76490e45544258b524161d762934a7710d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 12:02:49 +0000
Subject: [PATCH 4053/4650] [2021-09-22T12:02:49+0000] e2e test


From 1adc23d8ae7eeee1eda3993a9d82c4c8ea27e9a0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 13:07:08 +0000
Subject: [PATCH 4054/4650] [2021-09-22T13:07:08+0000] e2e test


From 104bc6800bfadaba7fa3c4b425a715115621b8d1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 14:02:24 +0000
Subject: [PATCH 4055/4650] [2021-09-22T14:02:24+0000] e2e test


From 466dc96a4448780d62bcf87a333997c98675ddf8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 15:02:38 +0000
Subject: [PATCH 4056/4650] [2021-09-22T15:02:38+0000] e2e test


From d45af436e4b026e4e42a7e7e57ca73037791fc75 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 16:02:48 +0000
Subject: [PATCH 4057/4650] [2021-09-22T16:02:48+0000] e2e test


From 4188c92d9bba9b2eaacfc524f111bcdc3c68d7fc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 17:06:32 +0000
Subject: [PATCH 4058/4650] [2021-09-22T17:06:32+0000] e2e test


From 284241dcf4523c34f83f7bf714d65e329bbf3993 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 18:02:30 +0000
Subject: [PATCH 4059/4650] [2021-09-22T18:02:30+0000] e2e test


From 0727e27cc631e3e70421ca514418aeb575f69dfd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 19:02:20 +0000
Subject: [PATCH 4060/4650] [2021-09-22T19:02:20+0000] e2e test


From 34f986f06c7194eacdb364895cfe6e738b354fd2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 20:02:40 +0000
Subject: [PATCH 4061/4650] [2021-09-22T20:02:40+0000] e2e test


From 0de7b3d8d4ebb7f7b2687231ad2d1e6530e9e9ea Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 21:02:38 +0000
Subject: [PATCH 4062/4650] [2021-09-22T21:02:38+0000] e2e test


From 0a6621b535192012be3900c52c159b38193312bf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 22:02:44 +0000
Subject: [PATCH 4063/4650] [2021-09-22T22:02:44+0000] e2e test


From a589704895efb7f20120a5220a72cb406f3fbed1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 22 Sep 2021 23:02:32 +0000
Subject: [PATCH 4064/4650] [2021-09-22T23:02:32+0000] e2e test


From 3acc4bff3577a63d64dca5b8db35b538b62092d2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 00:04:34 +0000
Subject: [PATCH 4065/4650] [2021-09-23T00:04:34+0000] e2e test


From 79d0cb213f27af9a470594af0472c511ebb61ab6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 01:25:24 +0000
Subject: [PATCH 4066/4650] [2021-09-23T01:25:24+0000] e2e test


From 363f0d5c5d7b23490b6e494f931c00a971255380 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 02:15:28 +0000
Subject: [PATCH 4067/4650] [2021-09-23T02:15:28+0000] e2e test


From 4c3d8114265e7d3e31a83ad4289a306a15991df3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 03:02:32 +0000
Subject: [PATCH 4068/4650] [2021-09-23T03:02:32+0000] e2e test


From 2a39d0375f1c515a94f7b2a664757b5920c2a738 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 04:02:30 +0000
Subject: [PATCH 4069/4650] [2021-09-23T04:02:30+0000] e2e test


From 76cf0bbb52fefd54d7896e105e0f2c4fc8f34aa3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 05:02:25 +0000
Subject: [PATCH 4070/4650] [2021-09-23T05:02:25+0000] e2e test


From a2492273d82a690c142bd9c74435da1bd3088d95 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 06:02:35 +0000
Subject: [PATCH 4071/4650] [2021-09-23T06:02:34+0000] e2e test


From 0e3d72e1f65c769d0e91a4ae95567c79251d6bdd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 07:02:26 +0000
Subject: [PATCH 4072/4650] [2021-09-23T07:02:26+0000] e2e test


From e2dd66c9ec9172bce3652c5fed70b2e0784d96f9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 08:02:38 +0000
Subject: [PATCH 4073/4650] [2021-09-23T08:02:38+0000] e2e test


From fae140585b8cb87faed7a3d43aedcc9e5d1d8240 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 09:02:45 +0000
Subject: [PATCH 4074/4650] [2021-09-23T09:02:45+0000] e2e test


From 060bc07ad17d7152b46a60c056713e6f0333fdfd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 10:02:35 +0000
Subject: [PATCH 4075/4650] [2021-09-23T10:02:35+0000] e2e test


From 06e55b22f18bbe9421841e41a1bfedfe24310e97 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 11:02:21 +0000
Subject: [PATCH 4076/4650] [2021-09-23T11:02:21+0000] e2e test


From d429b18896f841c59adc8c58021b67851cc23a73 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 12:02:47 +0000
Subject: [PATCH 4077/4650] [2021-09-23T12:02:47+0000] e2e test


From 8facaa09eb04fbe3fd767aff83aa024f33b93b13 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 13:07:39 +0000
Subject: [PATCH 4078/4650] [2021-09-23T13:07:39+0000] e2e test


From 979a04eb144c5d15113ee10c47abcde479992b45 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 14:02:28 +0000
Subject: [PATCH 4079/4650] [2021-09-23T14:02:28+0000] e2e test


From 720db11fc74a39e6030c373447221112bcd01b9d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 15:02:44 +0000
Subject: [PATCH 4080/4650] [2021-09-23T15:02:44+0000] e2e test


From 1ce0484798b59c698de7004b35adf56ea94d3a41 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 16:02:35 +0000
Subject: [PATCH 4081/4650] [2021-09-23T16:02:35+0000] e2e test


From cca588e8feb36d679665e78796ca98b989eaafee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 17:05:25 +0000
Subject: [PATCH 4082/4650] [2021-09-23T17:05:25+0000] e2e test


From 61e834c02d1ab497bd28f9949b8c6916e6201a3a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 18:02:35 +0000
Subject: [PATCH 4083/4650] [2021-09-23T18:02:35+0000] e2e test


From aee6e07f211b1ca2da438086063f0b73ef1fce6a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 19:02:28 +0000
Subject: [PATCH 4084/4650] [2021-09-23T19:02:28+0000] e2e test


From bb2ad2e3120af2df7bfeb821e0191648a4d8e431 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 20:02:32 +0000
Subject: [PATCH 4085/4650] [2021-09-23T20:02:32+0000] e2e test


From 49c1a5a103e8db5fa3ef2e9c554525c65af22aa8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 21:02:29 +0000
Subject: [PATCH 4086/4650] [2021-09-23T21:02:29+0000] e2e test


From 8e7a442d62be7a9dd15e257048c0bbb79f46d214 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 22:02:25 +0000
Subject: [PATCH 4087/4650] [2021-09-23T22:02:25+0000] e2e test


From 7a3b6586c89252642ed81d341769e4e9b5ba13c7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 23 Sep 2021 23:02:40 +0000
Subject: [PATCH 4088/4650] [2021-09-23T23:02:40+0000] e2e test


From 69b6a2e408914d301c8eed43b1ef50267698c585 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 00:04:18 +0000
Subject: [PATCH 4089/4650] [2021-09-24T00:04:18+0000] e2e test


From d0f99b8d6a6b007c021d345af0b567dc86986579 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 01:24:17 +0000
Subject: [PATCH 4090/4650] [2021-09-24T01:24:16+0000] e2e test


From 8d13e11b3595f77ed869ee4d8a608794bfa69add Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 02:12:51 +0000
Subject: [PATCH 4091/4650] [2021-09-24T02:12:50+0000] e2e test


From 0115a3dfad97d8bceaf20c265c7cd80f503fba0c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 03:02:35 +0000
Subject: [PATCH 4092/4650] [2021-09-24T03:02:34+0000] e2e test


From c9a2458e78395ea82f52f72837a464570680daaf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 04:02:43 +0000
Subject: [PATCH 4093/4650] [2021-09-24T04:02:43+0000] e2e test


From fda8b959e62de56f2e56bf0fc946e24fba40ba00 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 05:02:24 +0000
Subject: [PATCH 4094/4650] [2021-09-24T05:02:24+0000] e2e test


From 9b36c68aeb2d87608051b82456402f00aa54f49e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 06:02:34 +0000
Subject: [PATCH 4095/4650] [2021-09-24T06:02:34+0000] e2e test


From 62c7c99d60761cfe92cc4139cbfe043b5492bc6e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 07:02:26 +0000
Subject: [PATCH 4096/4650] [2021-09-24T07:02:26+0000] e2e test


From fb4a61188439962cdf52d42627632e32c25cc444 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 08:02:32 +0000
Subject: [PATCH 4097/4650] [2021-09-24T08:02:32+0000] e2e test


From 80ce7950f1b569c15dbd0e3126851198c9bd6b62 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 09:02:38 +0000
Subject: [PATCH 4098/4650] [2021-09-24T09:02:38+0000] e2e test


From 2dde46bba15b5dc992f7012b2f89c32768321714 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 10:02:53 +0000
Subject: [PATCH 4099/4650] [2021-09-24T10:02:53+0000] e2e test


From ea9f0e9165a681736e9b7b37c3cf7457af43a2cf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 11:02:28 +0000
Subject: [PATCH 4100/4650] [2021-09-24T11:02:28+0000] e2e test


From c7eca5a5d2b1cf8600b374697a50ff24d5740f45 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 12:03:06 +0000
Subject: [PATCH 4101/4650] [2021-09-24T12:03:06+0000] e2e test


From 0b684afd9ab19558227f55ed3ac59ecf82057289 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 13:06:33 +0000
Subject: [PATCH 4102/4650] [2021-09-24T13:06:33+0000] e2e test


From 259959a81d6d8974e7b8ead68d79d0cd8b4a04e2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 14:02:42 +0000
Subject: [PATCH 4103/4650] [2021-09-24T14:02:42+0000] e2e test


From ae7d9b59d2bdc8b0ada661c2314b46be9d240dff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 15:02:36 +0000
Subject: [PATCH 4104/4650] [2021-09-24T15:02:36+0000] e2e test


From 6496520863cf9adbad8215ee95364eb01e7bc76d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 16:02:43 +0000
Subject: [PATCH 4105/4650] [2021-09-24T16:02:43+0000] e2e test


From 8907086ea37d81222430c9f54d4ce4196e88bad4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 17:04:15 +0000
Subject: [PATCH 4106/4650] [2021-09-24T17:04:15+0000] e2e test


From fec5bf7830d1d990625a96ea669398b8d5835702 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 18:02:56 +0000
Subject: [PATCH 4107/4650] [2021-09-24T18:02:56+0000] e2e test


From 135a8d20dc93259d464fc93cb484634bc8745024 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 19:02:25 +0000
Subject: [PATCH 4108/4650] [2021-09-24T19:02:25+0000] e2e test


From 14e534e03735e4ed83850e611903dae70d5aa2fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 20:02:35 +0000
Subject: [PATCH 4109/4650] [2021-09-24T20:02:35+0000] e2e test


From d4366d5f8be1b9d9504a8c0b2f0b464b847457a4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 21:02:24 +0000
Subject: [PATCH 4110/4650] [2021-09-24T21:02:24+0000] e2e test


From 36d4316a045706206155b474fe4e8ec36dac13e6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 22:02:35 +0000
Subject: [PATCH 4111/4650] [2021-09-24T22:02:35+0000] e2e test


From f188761f34cf24843fe11215d4c3665c2970bd32 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 24 Sep 2021 23:02:52 +0000
Subject: [PATCH 4112/4650] [2021-09-24T23:02:52+0000] e2e test


From e9b8bf63b2608941377647a8a18e99d964aab76d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 00:04:31 +0000
Subject: [PATCH 4113/4650] [2021-09-25T00:04:31+0000] e2e test


From 762252edaf65727e6a40d35889a9ed51597a391e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 01:23:16 +0000
Subject: [PATCH 4114/4650] [2021-09-25T01:23:16+0000] e2e test


From de289a4f01d21fd72fa2e377f7f5d075df9c109d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 02:13:47 +0000
Subject: [PATCH 4115/4650] [2021-09-25T02:13:47+0000] e2e test


From 2992e06e16b729cf736c9870e16771d29fd32f06 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 03:02:26 +0000
Subject: [PATCH 4116/4650] [2021-09-25T03:02:25+0000] e2e test


From 32081adfd6a931e1af6c1bf6471f79b096d58e1b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 04:02:30 +0000
Subject: [PATCH 4117/4650] [2021-09-25T04:02:29+0000] e2e test


From ac793fa4dd1b947469ce47321e723b02eb0dfa7b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 05:02:23 +0000
Subject: [PATCH 4118/4650] [2021-09-25T05:02:23+0000] e2e test


From 32f66744de712990bef47bc034f15c3ef4c6753a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 06:02:36 +0000
Subject: [PATCH 4119/4650] [2021-09-25T06:02:36+0000] e2e test


From e4408b9a5eb46805ce3f816fc04a65e1ca0633c4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 07:02:25 +0000
Subject: [PATCH 4120/4650] [2021-09-25T07:02:25+0000] e2e test


From 67e71025eb0caa881bf2363dfe74bfbb777ccf81 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 08:02:36 +0000
Subject: [PATCH 4121/4650] [2021-09-25T08:02:36+0000] e2e test


From 55d61d3c94fda4df9b6f482d0f8b7d00384f89a0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 09:02:26 +0000
Subject: [PATCH 4122/4650] [2021-09-25T09:02:26+0000] e2e test


From f6b13be5b90c5dea8e5d1349aa00942276673b76 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 10:02:42 +0000
Subject: [PATCH 4123/4650] [2021-09-25T10:02:42+0000] e2e test


From d8aeaf51336b219f25f2dbe0c1ab3fc2ab7994ae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 11:02:37 +0000
Subject: [PATCH 4124/4650] [2021-09-25T11:02:37+0000] e2e test


From 5f23fea37fde0f4a99fd40a8e1aa96fa9396f6c5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 12:02:38 +0000
Subject: [PATCH 4125/4650] [2021-09-25T12:02:38+0000] e2e test


From e04af1191e7a107fa8c0d75f4640063c8ee5db32 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 13:05:52 +0000
Subject: [PATCH 4126/4650] [2021-09-25T13:05:52+0000] e2e test


From 1f2f6cf86dac06e38d6b400c849303ad5b3bb851 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 14:02:29 +0000
Subject: [PATCH 4127/4650] [2021-09-25T14:02:28+0000] e2e test


From 83cde3ba60cb4f207cc1f521d52028a892a4afd7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 15:02:35 +0000
Subject: [PATCH 4128/4650] [2021-09-25T15:02:35+0000] e2e test


From 6a9c729defa5a76da634a2e4f4643dc776a38ab5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 16:02:41 +0000
Subject: [PATCH 4129/4650] [2021-09-25T16:02:41+0000] e2e test


From 157a540c0c17abd88ca05ceb782e64933ca1c02b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 17:04:52 +0000
Subject: [PATCH 4130/4650] [2021-09-25T17:04:52+0000] e2e test


From a5cfd4becdabfed8e49f656f62d0b53a7d1ea1b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 18:02:35 +0000
Subject: [PATCH 4131/4650] [2021-09-25T18:02:35+0000] e2e test


From 262f56096d0ee41fa47f3b7c8d94c1b270a4eb2b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 19:02:29 +0000
Subject: [PATCH 4132/4650] [2021-09-25T19:02:29+0000] e2e test


From 8e700a0644e9273f4e0b98f80dc4556fbd3ea2c2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 20:02:31 +0000
Subject: [PATCH 4133/4650] [2021-09-25T20:02:30+0000] e2e test


From 971510a5a4f39ee9c4ea52dde1c17b663b85f5dc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 21:02:28 +0000
Subject: [PATCH 4134/4650] [2021-09-25T21:02:28+0000] e2e test


From 4f0f4add00acc525c2a07b9054d6fe0372662a6a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 22:02:27 +0000
Subject: [PATCH 4135/4650] [2021-09-25T22:02:26+0000] e2e test


From a97a6d25183168fbe92e8331d44761291b32d8e9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 25 Sep 2021 23:02:23 +0000
Subject: [PATCH 4136/4650] [2021-09-25T23:02:23+0000] e2e test


From 92d233a3c7e111af88b7579abec496429250a522 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 00:05:00 +0000
Subject: [PATCH 4137/4650] [2021-09-26T00:05:00+0000] e2e test


From ca31c0bff07cd126f84ab891764a1963d3f938a4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 01:24:22 +0000
Subject: [PATCH 4138/4650] [2021-09-26T01:24:22+0000] e2e test


From a6c2567b4700e35f300366066747579314a01137 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 02:12:33 +0000
Subject: [PATCH 4139/4650] [2021-09-26T02:12:33+0000] e2e test


From 1bae35ea6301a823ac759a6bff17d0f9a61ace75 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 03:02:28 +0000
Subject: [PATCH 4140/4650] [2021-09-26T03:02:28+0000] e2e test


From b9170d61a61b890d269af784cfbad5a6fdab0714 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 04:02:33 +0000
Subject: [PATCH 4141/4650] [2021-09-26T04:02:33+0000] e2e test


From b67c9bcb51dd4ea22e44ac53a1c6cf8984284b42 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 05:02:22 +0000
Subject: [PATCH 4142/4650] [2021-09-26T05:02:22+0000] e2e test


From 782187f70ca70c491df75fea0d52111b949cf5fb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 06:02:46 +0000
Subject: [PATCH 4143/4650] [2021-09-26T06:02:45+0000] e2e test


From c2739b6123552af1bc5694d7a4f5e23f6fbcc72a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 07:02:38 +0000
Subject: [PATCH 4144/4650] [2021-09-26T07:02:37+0000] e2e test


From 5f88383c8019fc0d7ee3d8a5ace43d57222b804a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 08:02:46 +0000
Subject: [PATCH 4145/4650] [2021-09-26T08:02:46+0000] e2e test


From 1709a4ab7363bee64242bb22ea00ad9beba38110 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 09:02:38 +0000
Subject: [PATCH 4146/4650] [2021-09-26T09:02:38+0000] e2e test


From c33cf7aec2203d1c28f55fe9912cff8fd87283c4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 10:02:46 +0000
Subject: [PATCH 4147/4650] [2021-09-26T10:02:46+0000] e2e test


From 7e749c589394abf219015e126e2b32bdea09e06f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 11:02:25 +0000
Subject: [PATCH 4148/4650] [2021-09-26T11:02:25+0000] e2e test


From 2598ccdac0bb449df0658ebaebb0a7949138845c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 12:02:47 +0000
Subject: [PATCH 4149/4650] [2021-09-26T12:02:47+0000] e2e test


From 67dd95b09fd6962d72ba5fc4a50db3155b0b7508 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 13:05:52 +0000
Subject: [PATCH 4150/4650] [2021-09-26T13:05:52+0000] e2e test


From a1af01958f810948c3d56d8aad6c9b154902025c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 14:02:28 +0000
Subject: [PATCH 4151/4650] [2021-09-26T14:02:28+0000] e2e test


From 5c331f75aa8ae5b08ab923893f2404e44ea5432f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 15:02:26 +0000
Subject: [PATCH 4152/4650] [2021-09-26T15:02:26+0000] e2e test


From 2550dae43cfcd18ba904e8666dfbd203427dc384 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 16:02:41 +0000
Subject: [PATCH 4153/4650] [2021-09-26T16:02:41+0000] e2e test


From 584df3dea50c23b81f0f8126a623adc1de72707b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 17:04:42 +0000
Subject: [PATCH 4154/4650] [2021-09-26T17:04:41+0000] e2e test


From 1d1684a1f835ff86a4b7a627f2bb92630aacadea Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 18:02:42 +0000
Subject: [PATCH 4155/4650] [2021-09-26T18:02:41+0000] e2e test


From 5e6827ccffadc3ad9e07ef7b798554d49f92c6df Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 19:02:27 +0000
Subject: [PATCH 4156/4650] [2021-09-26T19:02:27+0000] e2e test


From 56e0d74285f4c391fe2a49d214fa4a0252dcf4f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 20:02:43 +0000
Subject: [PATCH 4157/4650] [2021-09-26T20:02:43+0000] e2e test


From 52e45d8fa701bcc237c95280de2993f9acccd3cc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 21:02:28 +0000
Subject: [PATCH 4158/4650] [2021-09-26T21:02:28+0000] e2e test


From 203e312543be0cec566f9258151e4fe58c6ed4e7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 22:02:38 +0000
Subject: [PATCH 4159/4650] [2021-09-26T22:02:38+0000] e2e test


From dfc955928b25fadef8eb2ac0f7209120085067fe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 26 Sep 2021 23:02:39 +0000
Subject: [PATCH 4160/4650] [2021-09-26T23:02:39+0000] e2e test


From 95c1e8874481300e362c874194b58195a345bff3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 00:04:36 +0000
Subject: [PATCH 4161/4650] [2021-09-27T00:04:36+0000] e2e test


From 3747011a162e645151b3de87c45504bf1765ec16 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 01:23:31 +0000
Subject: [PATCH 4162/4650] [2021-09-27T01:23:31+0000] e2e test


From 19bb2a8191e47882571c8a41e77ee6f2b5faa409 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 02:13:11 +0000
Subject: [PATCH 4163/4650] [2021-09-27T02:13:11+0000] e2e test


From c70dd79062f1e67c7f316c31f52f39df7f27776a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 03:02:32 +0000
Subject: [PATCH 4164/4650] [2021-09-27T03:02:32+0000] e2e test


From f8d13393b12c0e895149124ebbdb45755ca1684d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 04:02:46 +0000
Subject: [PATCH 4165/4650] [2021-09-27T04:02:46+0000] e2e test


From 2f2e5684edc8769022506abae36bade022879c2d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 05:02:24 +0000
Subject: [PATCH 4166/4650] [2021-09-27T05:02:24+0000] e2e test


From ec7a74bace4d26af4a9b349f5bf19d46558005e2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 06:02:56 +0000
Subject: [PATCH 4167/4650] [2021-09-27T06:02:56+0000] e2e test


From 95c58b5d6e459688e0f3d8e2b7329921460f4bdb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 07:02:29 +0000
Subject: [PATCH 4168/4650] [2021-09-27T07:02:29+0000] e2e test


From e54457b12ee366aac06f159530bd6cd31bc146a2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 08:02:43 +0000
Subject: [PATCH 4169/4650] [2021-09-27T08:02:43+0000] e2e test


From 0c79afbb0029dcfe6cf5191eadbedf3460f2fa26 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 09:02:45 +0000
Subject: [PATCH 4170/4650] [2021-09-27T09:02:45+0000] e2e test


From ffd88abc70cd3c26a6782658b316ab0c3a6b100e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 10:02:59 +0000
Subject: [PATCH 4171/4650] [2021-09-27T10:02:59+0000] e2e test


From 64357a3260dd838b379a48cc878ab21fc0b3d200 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 11:02:34 +0000
Subject: [PATCH 4172/4650] [2021-09-27T11:02:34+0000] e2e test


From b16e82fb88d658dda5553b93067a511bb99b3510 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 12:03:09 +0000
Subject: [PATCH 4173/4650] [2021-09-27T12:03:08+0000] e2e test


From bacc34d7ae70d6d83e9955fb36a41fe6da3b94b7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 13:07:00 +0000
Subject: [PATCH 4174/4650] [2021-09-27T13:07:00+0000] e2e test


From 95483e92627398ac90aa2670c4062729e8500f36 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 14:02:29 +0000
Subject: [PATCH 4175/4650] [2021-09-27T14:02:29+0000] e2e test


From 9cef4bbb0cf5b011cc3ee50cf140fbea7bf2abaa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 15:02:27 +0000
Subject: [PATCH 4176/4650] [2021-09-27T15:02:27+0000] e2e test


From 2cd0beb3b237837a1f3883c22dc527e68df89538 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 16:02:35 +0000
Subject: [PATCH 4177/4650] [2021-09-27T16:02:35+0000] e2e test


From 0b7a348277f65c517be727ea2eb7c354f394f51e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 17:06:52 +0000
Subject: [PATCH 4178/4650] [2021-09-27T17:06:52+0000] e2e test


From 41cc595f734d06022038d6f74b305d6f9fd3b4df Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 18:02:28 +0000
Subject: [PATCH 4179/4650] [2021-09-27T18:02:28+0000] e2e test


From dbd4347127d68c140423e8461bdbfc5963721485 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 19:02:22 +0000
Subject: [PATCH 4180/4650] [2021-09-27T19:02:22+0000] e2e test


From dde6cb7453cfc736033da8d6a3f129be691b67b5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 20:02:48 +0000
Subject: [PATCH 4181/4650] [2021-09-27T20:02:48+0000] e2e test


From a4e496e3881a1898dddb002929ac2754693fd9a9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 21:02:24 +0000
Subject: [PATCH 4182/4650] [2021-09-27T21:02:24+0000] e2e test


From 5d179faac0e43435af80f981143894ec8f08a5e5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 22:02:48 +0000
Subject: [PATCH 4183/4650] [2021-09-27T22:02:47+0000] e2e test


From 9de0860d14ab239584005585d01cdb6a431c0d56 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 27 Sep 2021 23:02:29 +0000
Subject: [PATCH 4184/4650] [2021-09-27T23:02:29+0000] e2e test


From 830fff73c4fab5ad80171b933446e666b10f6627 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 00:04:43 +0000
Subject: [PATCH 4185/4650] [2021-09-28T00:04:43+0000] e2e test


From 397908d7da9db0417c0f00df73d456dd5dabd98c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 01:23:56 +0000
Subject: [PATCH 4186/4650] [2021-09-28T01:23:56+0000] e2e test


From 4dc7a6f7b7a41d133c764dae018064e366186ad4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 02:13:46 +0000
Subject: [PATCH 4187/4650] [2021-09-28T02:13:46+0000] e2e test


From aa4a1db8cf5cbcaac8906db46cc861b94aa7366e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 03:02:28 +0000
Subject: [PATCH 4188/4650] [2021-09-28T03:02:28+0000] e2e test


From b9fe4bca769b91675d4345405553663cbbc47b1c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 04:02:40 +0000
Subject: [PATCH 4189/4650] [2021-09-28T04:02:40+0000] e2e test


From 7c09463bfff6410adb9fd21f337eae0cc7758b1d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 05:02:27 +0000
Subject: [PATCH 4190/4650] [2021-09-28T05:02:27+0000] e2e test


From 1c4c0bdf197f3ca6ddd097e49f5f10df41ca854c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 06:02:49 +0000
Subject: [PATCH 4191/4650] [2021-09-28T06:02:49+0000] e2e test


From 15f1492fd7ae206390be289e286074b156e51fec Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 07:02:39 +0000
Subject: [PATCH 4192/4650] [2021-09-28T07:02:39+0000] e2e test


From ead6b8a9b5f80869a816346b3c63d6929727bd9c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 08:02:42 +0000
Subject: [PATCH 4193/4650] [2021-09-28T08:02:42+0000] e2e test


From b11e440ef52029de9734f16770c13d5884ec2526 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 09:02:32 +0000
Subject: [PATCH 4194/4650] [2021-09-28T09:02:31+0000] e2e test


From 326ac2b649ea5b80f878f8abd0b2ffff299ff5bf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 10:02:28 +0000
Subject: [PATCH 4195/4650] [2021-09-28T10:02:28+0000] e2e test


From 1c0aecee9a8b4232515954c932ca496defd1f21f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 11:02:22 +0000
Subject: [PATCH 4196/4650] [2021-09-28T11:02:22+0000] e2e test


From b046865e71ff3cf87e9cfc8c4786492d9e68add8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 12:03:03 +0000
Subject: [PATCH 4197/4650] [2021-09-28T12:03:03+0000] e2e test


From 30570b634bf5034630f1bbfebb952b281b156e39 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 13:06:43 +0000
Subject: [PATCH 4198/4650] [2021-09-28T13:06:43+0000] e2e test


From 3f4ba88f2c17bb9f18dbbe6af397efd5dcfc6c9e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 14:02:30 +0000
Subject: [PATCH 4199/4650] [2021-09-28T14:02:30+0000] e2e test


From cefd78ce57f4546c51c9be50329a4853d23761c7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 15:02:26 +0000
Subject: [PATCH 4200/4650] [2021-09-28T15:02:26+0000] e2e test


From 65a85318afcdec82a5803b741da2fd374b22725c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 16:02:34 +0000
Subject: [PATCH 4201/4650] [2021-09-28T16:02:34+0000] e2e test


From eb7a7987d9b254c595b30043317f1ccadcf5825a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 17:05:43 +0000
Subject: [PATCH 4202/4650] [2021-09-28T17:05:43+0000] e2e test


From fe7e258921806b72e46fec31148c1d1ed379bd58 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 18:02:28 +0000
Subject: [PATCH 4203/4650] [2021-09-28T18:02:28+0000] e2e test


From 5fbce6bbd0a1664d0f6b2d89f642fe65ced25c61 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 19:02:28 +0000
Subject: [PATCH 4204/4650] [2021-09-28T19:02:28+0000] e2e test


From b8be45cf6f145052360df7f6851db776b9048d48 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 20:02:43 +0000
Subject: [PATCH 4205/4650] [2021-09-28T20:02:43+0000] e2e test


From 543a328e3416fc7ff94c8ec69fe956f3d9393658 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 21:02:22 +0000
Subject: [PATCH 4206/4650] [2021-09-28T21:02:21+0000] e2e test


From a7bb038d320c28bdf526ff6a213649d3d42289a6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 22:02:47 +0000
Subject: [PATCH 4207/4650] [2021-09-28T22:02:47+0000] e2e test


From 4fbc8d48c8d15c9038635dcd8f3e37f4c749052f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 28 Sep 2021 23:02:46 +0000
Subject: [PATCH 4208/4650] [2021-09-28T23:02:46+0000] e2e test


From c7ff8314b714621f94fab5a19a79107dcd8c949b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 00:04:32 +0000
Subject: [PATCH 4209/4650] [2021-09-29T00:04:32+0000] e2e test


From 000be85e84e81e0f4c5ba33959b77de7a5a9c24e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 01:22:04 +0000
Subject: [PATCH 4210/4650] [2021-09-29T01:22:04+0000] e2e test


From 435d73c90164b344471af7f654190fe4a9582897 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 02:10:11 +0000
Subject: [PATCH 4211/4650] [2021-09-29T02:10:10+0000] e2e test


From 48ea2ce425a1c2f36c2ecb46447833f042a770b3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 03:02:52 +0000
Subject: [PATCH 4212/4650] [2021-09-29T03:02:52+0000] e2e test


From 7122d0ac4248f3996ef5184ebdfe51d5560f66f1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 04:02:36 +0000
Subject: [PATCH 4213/4650] [2021-09-29T04:02:36+0000] e2e test


From 4fc58144b13bd13a86021197c224244acf1a5abb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 05:02:28 +0000
Subject: [PATCH 4214/4650] [2021-09-29T05:02:28+0000] e2e test


From 6f107217ddb19577ca0c108a1c42e384acb12138 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 06:02:53 +0000
Subject: [PATCH 4215/4650] [2021-09-29T06:02:53+0000] e2e test


From b1cf7d56619ea73b3bd9beda41a1a900216ef0ef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 07:02:38 +0000
Subject: [PATCH 4216/4650] [2021-09-29T07:02:38+0000] e2e test


From 93b841a2713869974c175217838da40505db7221 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 08:02:42 +0000
Subject: [PATCH 4217/4650] [2021-09-29T08:02:42+0000] e2e test


From 83c0520038b32cebb14fb47895f8291d36a36c5d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 09:02:45 +0000
Subject: [PATCH 4218/4650] [2021-09-29T09:02:44+0000] e2e test


From aae26dff1ef80342c5da6962dbe2a6c898a18f77 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 10:02:35 +0000
Subject: [PATCH 4219/4650] [2021-09-29T10:02:35+0000] e2e test


From b8bb0cd4ece8a9714a1998d61c9aeb9c5f4e19b0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 11:02:21 +0000
Subject: [PATCH 4220/4650] [2021-09-29T11:02:21+0000] e2e test


From 9314ccc8acccd3cf8ab2987f73c9a8790b648d72 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 12:02:39 +0000
Subject: [PATCH 4221/4650] [2021-09-29T12:02:39+0000] e2e test


From 1cb7a29ad4c35de00f731ce76ce3bc30efbdfee8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 13:06:31 +0000
Subject: [PATCH 4222/4650] [2021-09-29T13:06:30+0000] e2e test


From 387f7fb5b90397adf4ede3ec700cb16bc20e1091 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 14:02:31 +0000
Subject: [PATCH 4223/4650] [2021-09-29T14:02:31+0000] e2e test


From 6aee75e5d2e7a392a5b139873a41afa72e6b84fd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 15:02:52 +0000
Subject: [PATCH 4224/4650] [2021-09-29T15:02:52+0000] e2e test


From 5345974ad637ff1378054b3f1ecc57f1c0ef54ed Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 16:02:31 +0000
Subject: [PATCH 4225/4650] [2021-09-29T16:02:31+0000] e2e test


From b710af6a22c2d26e3fe73bd640b537c5997ee968 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 17:06:05 +0000
Subject: [PATCH 4226/4650] [2021-09-29T17:06:04+0000] e2e test


From 43233c7d87d45f7ebc076fa5e9c266333e5b730f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 18:02:33 +0000
Subject: [PATCH 4227/4650] [2021-09-29T18:02:33+0000] e2e test


From 5fbe2b78685f6c5bc265e4ae587f12db6d69df57 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 19:02:20 +0000
Subject: [PATCH 4228/4650] [2021-09-29T19:02:20+0000] e2e test


From 1ad09463dde94bb316bc6e68b990b9675ccdd7f3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 20:02:46 +0000
Subject: [PATCH 4229/4650] [2021-09-29T20:02:46+0000] e2e test


From 69593e8b15ddb2b21feff4cd2f7d74b78c7acb21 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 21:02:36 +0000
Subject: [PATCH 4230/4650] [2021-09-29T21:02:36+0000] e2e test


From 8145e7e506dbec37255a33e6e84e78982c4e90bd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 22:02:29 +0000
Subject: [PATCH 4231/4650] [2021-09-29T22:02:28+0000] e2e test


From d67b882f51eb30385406e381169d2081fea159d0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 29 Sep 2021 23:02:24 +0000
Subject: [PATCH 4232/4650] [2021-09-29T23:02:24+0000] e2e test


From 3897c1e8b1310e92c54687ced0a7682af1c154d3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 00:04:41 +0000
Subject: [PATCH 4233/4650] [2021-09-30T00:04:41+0000] e2e test


From f0e3dcfb2876d174bddddeb1df72d5267bb5a4a9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 01:26:12 +0000
Subject: [PATCH 4234/4650] [2021-09-30T01:26:12+0000] e2e test


From c9f55acacedf99a895f2c816a8fe311385934577 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 02:16:04 +0000
Subject: [PATCH 4235/4650] [2021-09-30T02:16:04+0000] e2e test


From 358df6af20a44b70bfad70b7165e894ebbde9073 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 03:02:27 +0000
Subject: [PATCH 4236/4650] [2021-09-30T03:02:27+0000] e2e test


From e939cc47b982cc86aad718a227d414d046ab455f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 04:02:36 +0000
Subject: [PATCH 4237/4650] [2021-09-30T04:02:35+0000] e2e test


From 02bfbe108c251723b280e49381536e9e547e3d23 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 05:02:23 +0000
Subject: [PATCH 4238/4650] [2021-09-30T05:02:23+0000] e2e test


From d45cc2c82dab16fe603b111c9f967968f7b55a0b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 06:02:54 +0000
Subject: [PATCH 4239/4650] [2021-09-30T06:02:54+0000] e2e test


From 31c4325427005b5b5cedfecbf32636601a9c6f75 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 07:02:44 +0000
Subject: [PATCH 4240/4650] [2021-09-30T07:02:44+0000] e2e test


From 90dd5b035244e175a108d67d39041917e650b0fb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 08:02:36 +0000
Subject: [PATCH 4241/4650] [2021-09-30T08:02:36+0000] e2e test


From 48839d9613845a16797ab0ddfb0ca96f079b8785 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 09:02:40 +0000
Subject: [PATCH 4242/4650] [2021-09-30T09:02:40+0000] e2e test


From 01808b4d6b25a91bfd8a208da68222a7b995f45e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 10:02:36 +0000
Subject: [PATCH 4243/4650] [2021-09-30T10:02:36+0000] e2e test


From ff850400eb5a9bbee21390689564d4b35ee5a174 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 11:02:25 +0000
Subject: [PATCH 4244/4650] [2021-09-30T11:02:25+0000] e2e test


From cc18375341ede60fda8de3c42982bc8d1f254e50 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 12:07:56 +0000
Subject: [PATCH 4245/4650] [2021-09-30T12:07:56+0000] e2e test


From 71f73bda8ef4f81d7a08d3514d891c23e70a0eb8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 13:06:49 +0000
Subject: [PATCH 4246/4650] [2021-09-30T13:06:49+0000] e2e test


From 859a22276cff993f0242bd222a1416f99cda372a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 14:02:50 +0000
Subject: [PATCH 4247/4650] [2021-09-30T14:02:50+0000] e2e test


From a09a9b5447c946ef7317a8bb80a247c1a9db127e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 15:02:27 +0000
Subject: [PATCH 4248/4650] [2021-09-30T15:02:27+0000] e2e test


From d16eef4a7780152e76023945dd3c4664175ad5e9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 16:02:36 +0000
Subject: [PATCH 4249/4650] [2021-09-30T16:02:36+0000] e2e test


From 03bb33a9a60bc43b69dba9ed881d5af11b7c31a3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 17:05:36 +0000
Subject: [PATCH 4250/4650] [2021-09-30T17:05:35+0000] e2e test


From d925342639ab3fa8966d9792074e2e92f2213923 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 18:02:34 +0000
Subject: [PATCH 4251/4650] [2021-09-30T18:02:34+0000] e2e test


From 6f7d5681d121e4ea58b1cd8d9c8ed811d7a16ad6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 19:02:27 +0000
Subject: [PATCH 4252/4650] [2021-09-30T19:02:27+0000] e2e test


From 18c4de2955e4b826c3a0eac5f918d63551ff6519 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 20:02:48 +0000
Subject: [PATCH 4253/4650] [2021-09-30T20:02:48+0000] e2e test


From 78504ea23529c29d5cca8eadf287fdd81390c3b7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 21:02:43 +0000
Subject: [PATCH 4254/4650] [2021-09-30T21:02:43+0000] e2e test


From e5b6832308860d11aa0472b40af866e06d760f92 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 22:02:25 +0000
Subject: [PATCH 4255/4650] [2021-09-30T22:02:25+0000] e2e test


From 8e09ec2a0bbdb491eb2df288fe14c528b438bb99 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 30 Sep 2021 23:02:33 +0000
Subject: [PATCH 4256/4650] [2021-09-30T23:02:33+0000] e2e test


From eab773340c77c18f38e69f4977313a05bbc75266 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 00:04:51 +0000
Subject: [PATCH 4257/4650] [2021-10-01T00:04:51+0000] e2e test


From a4f3cb7171639a6a05b4d75413982e06afb9a5ec Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 01:25:17 +0000
Subject: [PATCH 4258/4650] [2021-10-01T01:25:16+0000] e2e test


From 213ab61ca841dceb80062ba5e08ee4d1c316cd95 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 02:17:37 +0000
Subject: [PATCH 4259/4650] [2021-10-01T02:17:37+0000] e2e test


From 64a8a0105783abb1c064998e94fbe20f34db5241 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 03:02:28 +0000
Subject: [PATCH 4260/4650] [2021-10-01T03:02:28+0000] e2e test


From bbf72da13375cf3997eda23cc7b4bf7627063595 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 04:02:32 +0000
Subject: [PATCH 4261/4650] [2021-10-01T04:02:32+0000] e2e test


From c745503961bb7eca4d7dea5a499570f60e1ff63d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 05:02:24 +0000
Subject: [PATCH 4262/4650] [2021-10-01T05:02:24+0000] e2e test


From acc8069bd14e943ed2a864547df621a85ef4bdff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 06:03:03 +0000
Subject: [PATCH 4263/4650] [2021-10-01T06:03:03+0000] e2e test


From decdf66f4c1be90489705f13df1ec5b13a0eaedd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 07:02:37 +0000
Subject: [PATCH 4264/4650] [2021-10-01T07:02:37+0000] e2e test


From a8f632bcf92e5daeaddc6fd8f8550d8dd342d5c5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 08:02:52 +0000
Subject: [PATCH 4265/4650] [2021-10-01T08:02:52+0000] e2e test


From 74cc1ebb02f5af2083dbb6d115d2f1790d48c847 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 09:02:35 +0000
Subject: [PATCH 4266/4650] [2021-10-01T09:02:35+0000] e2e test


From b8b631a04a5ea9bab8138b5ec70c80b65692b880 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 10:02:33 +0000
Subject: [PATCH 4267/4650] [2021-10-01T10:02:33+0000] e2e test


From 6fe0c97278d44256cae1f5208445a4017c06343e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 11:02:28 +0000
Subject: [PATCH 4268/4650] [2021-10-01T11:02:28+0000] e2e test


From b5f3f27e57898a792d8e6df36680a95c3ca1e965 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 12:02:58 +0000
Subject: [PATCH 4269/4650] [2021-10-01T12:02:58+0000] e2e test


From ac559e0ca1e579eb67a14d5372f9e6c329345866 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 13:06:34 +0000
Subject: [PATCH 4270/4650] [2021-10-01T13:06:34+0000] e2e test


From 29a2a1590c1847e9efa12009774190fd1e92adef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 14:02:44 +0000
Subject: [PATCH 4271/4650] [2021-10-01T14:02:44+0000] e2e test


From d2f1eb8245ab43b485ba4f221d2b3e7dde6abd8a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 15:02:35 +0000
Subject: [PATCH 4272/4650] [2021-10-01T15:02:35+0000] e2e test


From aa762e7c9fa1d19701561cda54fd6d57f71b4952 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 16:02:33 +0000
Subject: [PATCH 4273/4650] [2021-10-01T16:02:33+0000] e2e test


From d08cd4f4d1adbbef1c438b46a0626f5dcfb6070f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 17:06:33 +0000
Subject: [PATCH 4274/4650] [2021-10-01T17:06:33+0000] e2e test


From fb527a077c0aa48be637224e40dcca28b64d5b48 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 18:02:45 +0000
Subject: [PATCH 4275/4650] [2021-10-01T18:02:45+0000] e2e test


From 52490cc0283d43c61f53ccd7ec41bfa9bb2d06d1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 19:02:38 +0000
Subject: [PATCH 4276/4650] [2021-10-01T19:02:38+0000] e2e test


From 2be4e918f1586260cb46d5e5b79a3c978004a968 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 20:02:45 +0000
Subject: [PATCH 4277/4650] [2021-10-01T20:02:45+0000] e2e test


From f82ddd70cc924ed0d2965dbee57952cdb23f0871 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 21:02:23 +0000
Subject: [PATCH 4278/4650] [2021-10-01T21:02:23+0000] e2e test


From 7a5fa73e9a9adff8cfe09b9cfe9f2eb8e02b15d8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 22:02:46 +0000
Subject: [PATCH 4279/4650] [2021-10-01T22:02:46+0000] e2e test


From cf6d10bf26bcc0d82c257f1e92e0fd0f2f657a6a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 1 Oct 2021 23:02:38 +0000
Subject: [PATCH 4280/4650] [2021-10-01T23:02:38+0000] e2e test


From 15a38bf9e0fefb69bb4c9d400d876cffa6870cde Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 00:04:24 +0000
Subject: [PATCH 4281/4650] [2021-10-02T00:04:24+0000] e2e test


From 03bbb11491bdd9b8ed8d7b4d1df3e77768749a06 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 01:23:31 +0000
Subject: [PATCH 4282/4650] [2021-10-02T01:23:31+0000] e2e test


From 14961fc75e4b3323781969509ae086d29ab92854 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 02:13:39 +0000
Subject: [PATCH 4283/4650] [2021-10-02T02:13:39+0000] e2e test


From 0a480f6c594febf7c0abeaf0fc1e4ee0cb4c65d6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 03:02:24 +0000
Subject: [PATCH 4284/4650] [2021-10-02T03:02:23+0000] e2e test


From de4f34a9b5ee2828bce192745e688d712988b54d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 04:02:41 +0000
Subject: [PATCH 4285/4650] [2021-10-02T04:02:41+0000] e2e test


From 75f928e158b2549c5cf340513bbeb085570aafc8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 05:02:20 +0000
Subject: [PATCH 4286/4650] [2021-10-02T05:02:20+0000] e2e test


From 0bd6944c5de4fe0ccb09570b5d8512042a10d2ac Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 06:02:57 +0000
Subject: [PATCH 4287/4650] [2021-10-02T06:02:57+0000] e2e test


From 2b2f82e0deb64c9bc6e7481e2b1b61dde313bb91 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 07:02:54 +0000
Subject: [PATCH 4288/4650] [2021-10-02T07:02:54+0000] e2e test


From e1084bbcf4874d61390e64844342d8833be6f50c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 08:02:41 +0000
Subject: [PATCH 4289/4650] [2021-10-02T08:02:41+0000] e2e test


From d5363008d1bc9c0af69c5253860bc142311b8f7c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 09:02:35 +0000
Subject: [PATCH 4290/4650] [2021-10-02T09:02:35+0000] e2e test


From 18c3248cfd7d2802246fe20cd1183dd1d026c69e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 10:02:51 +0000
Subject: [PATCH 4291/4650] [2021-10-02T10:02:51+0000] e2e test


From 39dacca9ba502053e6c1729cc67c823e830d8838 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 11:02:25 +0000
Subject: [PATCH 4292/4650] [2021-10-02T11:02:25+0000] e2e test


From e7298a4024e204c1ea3d528e54b9ddb3f822e9f0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 12:02:33 +0000
Subject: [PATCH 4293/4650] [2021-10-02T12:02:33+0000] e2e test


From 6637994865a3cb6290aeb99400f35910b85374a4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 13:05:37 +0000
Subject: [PATCH 4294/4650] [2021-10-02T13:05:37+0000] e2e test


From a22150bedea0b89918481ea70714fe677f7052d7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 14:02:36 +0000
Subject: [PATCH 4295/4650] [2021-10-02T14:02:36+0000] e2e test


From 8d97e0b3164e575896d6334ce88ada9443f7c406 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 15:02:28 +0000
Subject: [PATCH 4296/4650] [2021-10-02T15:02:28+0000] e2e test


From fe71cabe8671399ecbe2fd55dc81ebac7c12ca2e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 16:02:41 +0000
Subject: [PATCH 4297/4650] [2021-10-02T16:02:41+0000] e2e test


From adc3a22c0d2d0ac2260842245ec25c9fc0e4adc6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 17:04:45 +0000
Subject: [PATCH 4298/4650] [2021-10-02T17:04:44+0000] e2e test


From 04262e2b8356415b5796e75cd17322d4c47c2ac9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 18:02:41 +0000
Subject: [PATCH 4299/4650] [2021-10-02T18:02:40+0000] e2e test


From 702ae6822170707397ac8a8851d06466b7c2af7f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 19:02:22 +0000
Subject: [PATCH 4300/4650] [2021-10-02T19:02:22+0000] e2e test


From ccbfc12213a530deaffbd72bb7697906e4627e33 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 20:02:38 +0000
Subject: [PATCH 4301/4650] [2021-10-02T20:02:38+0000] e2e test


From 2cca5fcb23c06cadaefcc2554a27b38abdcdc5a8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 21:02:46 +0000
Subject: [PATCH 4302/4650] [2021-10-02T21:02:46+0000] e2e test


From cfa3ddf3858c92e4c87a161cadc28a1c84243bcb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 22:02:26 +0000
Subject: [PATCH 4303/4650] [2021-10-02T22:02:26+0000] e2e test


From 6eaafb9e0eaca84ed3007f79ce61fc83a7c04a41 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 2 Oct 2021 23:02:24 +0000
Subject: [PATCH 4304/4650] [2021-10-02T23:02:24+0000] e2e test


From 670d5e7c5565a021974be57e763bfc0cde543686 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 00:05:01 +0000
Subject: [PATCH 4305/4650] [2021-10-03T00:05:01+0000] e2e test


From 6b611add059f9db86312a584338b668d66d30efc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 01:25:35 +0000
Subject: [PATCH 4306/4650] [2021-10-03T01:25:35+0000] e2e test


From 6cea3c15c6ec9e95e3af796a62b0a285535557c1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 02:14:11 +0000
Subject: [PATCH 4307/4650] [2021-10-03T02:14:11+0000] e2e test


From c2ee0fdb94822f6d7ffd5d01b38647c090d0d3a6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 03:02:30 +0000
Subject: [PATCH 4308/4650] [2021-10-03T03:02:30+0000] e2e test


From 2d327ce24f6fe34559b30dd25578a6d924a0dcfb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 04:02:34 +0000
Subject: [PATCH 4309/4650] [2021-10-03T04:02:34+0000] e2e test


From 99a2fb6ec7aaf80586b19c1c445578c9d8d243ce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 05:02:23 +0000
Subject: [PATCH 4310/4650] [2021-10-03T05:02:23+0000] e2e test


From 5441bb93f6efc9f28910651a0389e5c3b09a233d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 06:02:50 +0000
Subject: [PATCH 4311/4650] [2021-10-03T06:02:50+0000] e2e test


From d1abfa03509d2c5791d78b9484eb519e4c89e7da Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 07:02:36 +0000
Subject: [PATCH 4312/4650] [2021-10-03T07:02:36+0000] e2e test


From 7e0c3f967454c4973f2afae5898ed3b4f80fbd50 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 08:02:53 +0000
Subject: [PATCH 4313/4650] [2021-10-03T08:02:53+0000] e2e test


From 86c149dab6fcc218c9b0f4cf8808545303093bc9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 09:02:27 +0000
Subject: [PATCH 4314/4650] [2021-10-03T09:02:27+0000] e2e test


From 2c9ac2d92d32cc8ee9128715bdcd7f64fd829e2a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 10:02:43 +0000
Subject: [PATCH 4315/4650] [2021-10-03T10:02:43+0000] e2e test


From 5cf836824b2934f9dc3da4724a60d1f59edad4d7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 11:02:38 +0000
Subject: [PATCH 4316/4650] [2021-10-03T11:02:38+0000] e2e test


From de9e5de72f9f86cbd02e5fa9a4eaf05e9934b324 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 12:02:45 +0000
Subject: [PATCH 4317/4650] [2021-10-03T12:02:45+0000] e2e test


From 7e9a35f6e52a48dad56516705d1f2369c2abc691 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 13:05:27 +0000
Subject: [PATCH 4318/4650] [2021-10-03T13:05:27+0000] e2e test


From 0b8861f48ec07909a61a6a87411bfe1171e5ac7d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 14:02:27 +0000
Subject: [PATCH 4319/4650] [2021-10-03T14:02:27+0000] e2e test


From 9223c2ac53425a6c19baedb07876319800792fa1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 15:02:53 +0000
Subject: [PATCH 4320/4650] [2021-10-03T15:02:53+0000] e2e test


From 5dfbd38c06d74f1ee2be3e9a2997b898519ad39c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 16:02:45 +0000
Subject: [PATCH 4321/4650] [2021-10-03T16:02:45+0000] e2e test


From 3d9a4cdcf3fa21ca1345cabce9a5dcde14021fee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 17:04:38 +0000
Subject: [PATCH 4322/4650] [2021-10-03T17:04:38+0000] e2e test


From 9c55432f00ab6fdda426a6262f84cdf3c3d90aef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 18:02:37 +0000
Subject: [PATCH 4323/4650] [2021-10-03T18:02:37+0000] e2e test


From 770fdf03ae4fad38bf3bf8c52f8b69f6e1fb0584 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 19:02:25 +0000
Subject: [PATCH 4324/4650] [2021-10-03T19:02:24+0000] e2e test


From 9c65ab1e5b563f22dff931300cc1c2f57cff3d10 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 20:02:38 +0000
Subject: [PATCH 4325/4650] [2021-10-03T20:02:38+0000] e2e test


From 1d8704df599047bc935329f062cab111f6c9f361 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 21:02:27 +0000
Subject: [PATCH 4326/4650] [2021-10-03T21:02:27+0000] e2e test


From 58d99569ed9959539c20fe28743f7fb93a912875 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 22:02:23 +0000
Subject: [PATCH 4327/4650] [2021-10-03T22:02:23+0000] e2e test


From ac0dce4daadba88ea6499a8be4066c910612e996 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 3 Oct 2021 23:02:27 +0000
Subject: [PATCH 4328/4650] [2021-10-03T23:02:27+0000] e2e test


From 6b0d6068a03400db1b443e3243f47898cd524940 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 00:05:05 +0000
Subject: [PATCH 4329/4650] [2021-10-04T00:05:05+0000] e2e test


From a5c41efb6c4c553bbcee8f089205c34a74260f59 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 01:25:39 +0000
Subject: [PATCH 4330/4650] [2021-10-04T01:25:38+0000] e2e test


From 70c0e9550ac22fc73dad4261f646946abf8a4f8f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 02:16:29 +0000
Subject: [PATCH 4331/4650] [2021-10-04T02:16:28+0000] e2e test


From 508fba9d8217b7214e6e9c678e95469a5bdc41c0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 03:02:34 +0000
Subject: [PATCH 4332/4650] [2021-10-04T03:02:34+0000] e2e test


From a752dfddba55798d2d4a8c1535632b28907a662d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 04:02:43 +0000
Subject: [PATCH 4333/4650] [2021-10-04T04:02:43+0000] e2e test


From d39ace87fb6b12e02f33590681b6a24783297865 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 05:02:24 +0000
Subject: [PATCH 4334/4650] [2021-10-04T05:02:24+0000] e2e test


From 25fc4f07baf2285ed490794e69b5eea14d85e46c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 06:02:42 +0000
Subject: [PATCH 4335/4650] [2021-10-04T06:02:41+0000] e2e test


From 210cdd12288869ef88fd56d8220cea2ef6b8951c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 07:02:31 +0000
Subject: [PATCH 4336/4650] [2021-10-04T07:02:31+0000] e2e test


From b423b82d25b40ee3190405372f2db7938d965853 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 08:02:50 +0000
Subject: [PATCH 4337/4650] [2021-10-04T08:02:50+0000] e2e test


From 0a6fdc545946ccd4f8ab5c9d49bf7d250dbc95fb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 09:02:27 +0000
Subject: [PATCH 4338/4650] [2021-10-04T09:02:27+0000] e2e test


From 0b41874c03d0fd61d9b26b73851810143ac4d0d7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 10:02:42 +0000
Subject: [PATCH 4339/4650] [2021-10-04T10:02:42+0000] e2e test


From ba5aabbfad8c26b577cc874554fe0050ad3c4187 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 11:02:26 +0000
Subject: [PATCH 4340/4650] [2021-10-04T11:02:26+0000] e2e test


From e86f599ff415cfefc64959d6677e1c0da62966b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 12:02:54 +0000
Subject: [PATCH 4341/4650] [2021-10-04T12:02:54+0000] e2e test


From bca1f12f5916c6c52be76a535d0ae36c92a5ce81 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 13:06:20 +0000
Subject: [PATCH 4342/4650] [2021-10-04T13:06:20+0000] e2e test


From f584ec0d77666171cb6c985194f749a26b880b89 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 14:02:30 +0000
Subject: [PATCH 4343/4650] [2021-10-04T14:02:30+0000] e2e test


From 56103ee92749c3eef23aa72cfbaff8392443edfc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 15:02:41 +0000
Subject: [PATCH 4344/4650] [2021-10-04T15:02:41+0000] e2e test


From c5823d15dc4fed224af9749e1fe840871c242f05 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 16:02:44 +0000
Subject: [PATCH 4345/4650] [2021-10-04T16:02:44+0000] e2e test


From ef88c505e2fb03de9c25e9bcf7f1675e0e4eb806 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 17:06:54 +0000
Subject: [PATCH 4346/4650] [2021-10-04T17:06:54+0000] e2e test


From 39da921db1e689805e049b29ca8a97d5989ee800 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 18:02:41 +0000
Subject: [PATCH 4347/4650] [2021-10-04T18:02:41+0000] e2e test


From 2eb15ef2600f8f1655e04d42200f3881b2d844aa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 19:02:42 +0000
Subject: [PATCH 4348/4650] [2021-10-04T19:02:41+0000] e2e test


From 51e379d87680b82d5cd425b97fe42dc3deca2c43 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 20:02:36 +0000
Subject: [PATCH 4349/4650] [2021-10-04T20:02:36+0000] e2e test


From d919d4456a2baed4f60252e8478e988cca6fab5e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 21:02:21 +0000
Subject: [PATCH 4350/4650] [2021-10-04T21:02:21+0000] e2e test


From aa5b8241e070e5df48421bf1dc0e15380b41af00 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 22:02:26 +0000
Subject: [PATCH 4351/4650] [2021-10-04T22:02:26+0000] e2e test


From 29f79c99c31bb641e53fa9ea41834d5c6f6aeff9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 4 Oct 2021 23:02:25 +0000
Subject: [PATCH 4352/4650] [2021-10-04T23:02:25+0000] e2e test


From 518a89fa2611772e3fbf9b9d9742ead8f615aeca Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 00:04:42 +0000
Subject: [PATCH 4353/4650] [2021-10-05T00:04:42+0000] e2e test


From 6763e5b44aaea7b183e4f166761edc81deb382ee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 01:23:56 +0000
Subject: [PATCH 4354/4650] [2021-10-05T01:23:56+0000] e2e test


From 51a299f90c36d79e9b57ab326452291cf146c96e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 02:12:55 +0000
Subject: [PATCH 4355/4650] [2021-10-05T02:12:55+0000] e2e test


From 58722a16e20cba4444f9d928d6f359584cec3c7d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 03:02:38 +0000
Subject: [PATCH 4356/4650] [2021-10-05T03:02:38+0000] e2e test


From 339ea501e1b9dc929ec34524e0d91fabf012383b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 04:02:33 +0000
Subject: [PATCH 4357/4650] [2021-10-05T04:02:32+0000] e2e test


From 128b443ba4837badfdaf0a4491719a835d743dde Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 05:02:22 +0000
Subject: [PATCH 4358/4650] [2021-10-05T05:02:22+0000] e2e test


From 4defcd857e04bda00809376c4d8dc1360f62d8c8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 06:02:41 +0000
Subject: [PATCH 4359/4650] [2021-10-05T06:02:41+0000] e2e test


From e8461e396238b198b9911ec08e972199004777de Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 07:02:45 +0000
Subject: [PATCH 4360/4650] [2021-10-05T07:02:45+0000] e2e test


From fea12e184c0e6c36e3d44cc14b9308d6b7ad70cb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 08:02:39 +0000
Subject: [PATCH 4361/4650] [2021-10-05T08:02:39+0000] e2e test


From 695c48d7c0225d8fb42fafeacf20e59c2c4840c7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 09:02:36 +0000
Subject: [PATCH 4362/4650] [2021-10-05T09:02:36+0000] e2e test


From 4aebb8830ebb71236e2380d6790cc2ac88feb616 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 10:02:42 +0000
Subject: [PATCH 4363/4650] [2021-10-05T10:02:42+0000] e2e test


From b9c940ad7c043ba0347a07366f289dbec228a259 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 11:02:35 +0000
Subject: [PATCH 4364/4650] [2021-10-05T11:02:35+0000] e2e test


From 31b619bd90a1c4349c796c482291408d9244d303 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 12:02:44 +0000
Subject: [PATCH 4365/4650] [2021-10-05T12:02:44+0000] e2e test


From 49a25d6e91d1f5df385e2039bb11d1d603317ef6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 13:06:55 +0000
Subject: [PATCH 4366/4650] [2021-10-05T13:06:55+0000] e2e test


From f8349fcbaa7a063ae16875b1b7c77ad6a735f552 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 14:21:37 +0000
Subject: [PATCH 4367/4650] [2021-10-05T14:21:37+0000] e2e test


From c7bd140d8f34c8a30cd53efda961212802ae2972 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 15:12:23 +0000
Subject: [PATCH 4368/4650] [2021-10-05T15:12:23+0000] e2e test


From ba29b4b11b160110e2416eb17b9d2066fd3dfe10 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 16:02:53 +0000
Subject: [PATCH 4369/4650] [2021-10-05T16:02:53+0000] e2e test


From ebf9d5fcd40655fd06fa6e75af5a82d8b87a48a7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 17:06:13 +0000
Subject: [PATCH 4370/4650] [2021-10-05T17:06:13+0000] e2e test


From 065dae46e95cff67df207a03a34fd3b738ef4728 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 18:02:45 +0000
Subject: [PATCH 4371/4650] [2021-10-05T18:02:44+0000] e2e test


From 3c0d506d7c17d25159750d41593abb1eb5e478f3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 19:02:25 +0000
Subject: [PATCH 4372/4650] [2021-10-05T19:02:25+0000] e2e test


From f32cb419c83362c8e83d3eea4cee5bcef808517c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 20:02:52 +0000
Subject: [PATCH 4373/4650] [2021-10-05T20:02:52+0000] e2e test


From 47be22c058e2f2512e6ece4ca08c1e5caa2f4274 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 21:02:27 +0000
Subject: [PATCH 4374/4650] [2021-10-05T21:02:27+0000] e2e test


From e04aaeefbbaa787c96598d7b521af6c972790c83 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 22:02:55 +0000
Subject: [PATCH 4375/4650] [2021-10-05T22:02:55+0000] e2e test


From d5665e04902255b50fc538efeb24184be226aae8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 5 Oct 2021 23:02:29 +0000
Subject: [PATCH 4376/4650] [2021-10-05T23:02:29+0000] e2e test


From 8171210e9c557a8f63997777ffefae03c540014f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 00:04:42 +0000
Subject: [PATCH 4377/4650] [2021-10-06T00:04:42+0000] e2e test


From a63fa58cae5d39e2ab89904d52bcfd15c7104928 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 01:23:57 +0000
Subject: [PATCH 4378/4650] [2021-10-06T01:23:57+0000] e2e test


From fe933302b259b182bd3e7b27269666074a4306cb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 02:14:07 +0000
Subject: [PATCH 4379/4650] [2021-10-06T02:14:06+0000] e2e test


From d25c49d1c998dbddc9a16872817ad1b23b3282b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 03:02:35 +0000
Subject: [PATCH 4380/4650] [2021-10-06T03:02:35+0000] e2e test


From 7714321c19897c9f0fff04987bafd730802c8d01 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 04:02:36 +0000
Subject: [PATCH 4381/4650] [2021-10-06T04:02:36+0000] e2e test


From ace194084f222fa1a6cd4a7d5eaed9699145a71e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 05:02:26 +0000
Subject: [PATCH 4382/4650] [2021-10-06T05:02:26+0000] e2e test


From 0443cc20f40ef4d6e5e39296cc26cfc4f076df9a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 06:02:45 +0000
Subject: [PATCH 4383/4650] [2021-10-06T06:02:45+0000] e2e test


From fa8f3d3bebb52160fc79c6df392eb13d6882a0bf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 07:02:26 +0000
Subject: [PATCH 4384/4650] [2021-10-06T07:02:26+0000] e2e test


From 977590cdbe18067498dbbf400af0e1697639a174 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 08:02:39 +0000
Subject: [PATCH 4385/4650] [2021-10-06T08:02:39+0000] e2e test


From 329bada3b03745d1d54b620df854e7cd7b46d9e3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 09:02:32 +0000
Subject: [PATCH 4386/4650] [2021-10-06T09:02:32+0000] e2e test


From 71cefb680ff264f84f4f9da61f8ea7fc5fc5b5d5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 10:02:38 +0000
Subject: [PATCH 4387/4650] [2021-10-06T10:02:38+0000] e2e test


From fdd549c11e9cd49ee571586763b1024d88e0a425 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 11:02:28 +0000
Subject: [PATCH 4388/4650] [2021-10-06T11:02:28+0000] e2e test


From 567fb741af9c2fe0e6140b1d52613f035e194fc1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 12:03:05 +0000
Subject: [PATCH 4389/4650] [2021-10-06T12:03:05+0000] e2e test


From 66c274619aa9a31c8746e8959be55608d9dab4b6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 13:06:25 +0000
Subject: [PATCH 4390/4650] [2021-10-06T13:06:24+0000] e2e test


From f361c0cc302c9684f38ecbb1538f8a99a702e701 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 14:02:27 +0000
Subject: [PATCH 4391/4650] [2021-10-06T14:02:27+0000] e2e test


From 14b00522213a631c116843bd15163f9822c2a901 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 15:02:40 +0000
Subject: [PATCH 4392/4650] [2021-10-06T15:02:40+0000] e2e test


From 8fdf7c2c8bd27e5739c7790f6a5721c7f5d2a14f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 16:02:34 +0000
Subject: [PATCH 4393/4650] [2021-10-06T16:02:34+0000] e2e test


From 9c6556ee43ba88df988a6551bd81b3265e99d40b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 17:04:54 +0000
Subject: [PATCH 4394/4650] [2021-10-06T17:04:53+0000] e2e test


From 22eca64e925e7823024e2d4c44bb40fa538f7a74 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 18:02:51 +0000
Subject: [PATCH 4395/4650] [2021-10-06T18:02:51+0000] e2e test


From ffd9e3a73b7817ac26338ebfdafa93317d3abf20 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 19:02:19 +0000
Subject: [PATCH 4396/4650] [2021-10-06T19:02:19+0000] e2e test


From e2b10ce3b441fc3bb7cdd6deba508a91d30fc4d9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 20:02:25 +0000
Subject: [PATCH 4397/4650] [2021-10-06T20:02:25+0000] e2e test


From 01329fabcb5a261ac9cfd12390273a500f869559 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 21:02:28 +0000
Subject: [PATCH 4398/4650] [2021-10-06T21:02:28+0000] e2e test


From 991eaee60994829e436581e4fe7872587eb12615 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 22:02:42 +0000
Subject: [PATCH 4399/4650] [2021-10-06T22:02:42+0000] e2e test


From 14c04988c9d77f48be0de1d4d8366378c01e7a77 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 6 Oct 2021 23:02:42 +0000
Subject: [PATCH 4400/4650] [2021-10-06T23:02:42+0000] e2e test


From bb636f3307b8036a94f52e286ea1e2fe33e5bbf9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 00:03:52 +0000
Subject: [PATCH 4401/4650] [2021-10-07T00:03:52+0000] e2e test


From 922dbf7035bb14508778adb812e27b5549de0b90 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 01:24:37 +0000
Subject: [PATCH 4402/4650] [2021-10-07T01:24:37+0000] e2e test


From f802f6e85b9ca1da347ffac7bc3e1ee9c8e55235 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 02:15:46 +0000
Subject: [PATCH 4403/4650] [2021-10-07T02:15:46+0000] e2e test


From 1eb9cbc2d97cb8ecc94c1e12d8193fd9e95e320f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 03:02:32 +0000
Subject: [PATCH 4404/4650] [2021-10-07T03:02:32+0000] e2e test


From c096f5d6991e657b6a2d5efb599f8f6036eb1492 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 04:02:29 +0000
Subject: [PATCH 4405/4650] [2021-10-07T04:02:29+0000] e2e test


From a31a44f5e8ae82aba8b69e4da844c8ec4d5d9caf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 05:02:25 +0000
Subject: [PATCH 4406/4650] [2021-10-07T05:02:25+0000] e2e test


From 7d192cc692c9744b028f617b97f8f910f60acf26 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 06:03:00 +0000
Subject: [PATCH 4407/4650] [2021-10-07T06:03:00+0000] e2e test


From 3bbbb8e7707c95c2e38b9dd73dc24c6525f549b1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 07:02:26 +0000
Subject: [PATCH 4408/4650] [2021-10-07T07:02:26+0000] e2e test


From d3af65df66fdf52b98845268954da093c4b061bc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 08:02:39 +0000
Subject: [PATCH 4409/4650] [2021-10-07T08:02:39+0000] e2e test


From 920e9839f97a1dc2dbd4b4eba43755ef20df1b23 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 09:02:36 +0000
Subject: [PATCH 4410/4650] [2021-10-07T09:02:36+0000] e2e test


From bc7786dd907fcca6eb9836e5add4d3c1486d17dd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 10:02:41 +0000
Subject: [PATCH 4411/4650] [2021-10-07T10:02:40+0000] e2e test


From 8206b476be8e6777a795645374941d061bdebed3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 11:02:27 +0000
Subject: [PATCH 4412/4650] [2021-10-07T11:02:27+0000] e2e test


From 724dbd10c35f31c418455147f7a4dcc1a1abdecb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 12:02:39 +0000
Subject: [PATCH 4413/4650] [2021-10-07T12:02:39+0000] e2e test


From 4e577f797a508e92271d358cfa84456705c67569 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 13:08:40 +0000
Subject: [PATCH 4414/4650] [2021-10-07T13:08:40+0000] e2e test


From 9509913ddf854e2bf7eaa13d503e2dfc840c9698 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 14:02:31 +0000
Subject: [PATCH 4415/4650] [2021-10-07T14:02:31+0000] e2e test


From 89bd8f7bda8edcb2ee38f06664d328092dee6be6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 15:02:27 +0000
Subject: [PATCH 4416/4650] [2021-10-07T15:02:26+0000] e2e test


From 65463ec80712dccfc929358cbb408333a9fd2691 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 16:02:43 +0000
Subject: [PATCH 4417/4650] [2021-10-07T16:02:43+0000] e2e test


From 7e033ffba259d61d2ffdb16ec12470f77a3793e3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 17:02:44 +0000
Subject: [PATCH 4418/4650] [2021-10-07T17:02:44+0000] e2e test


From f2fcc12cede88eef08b9f838fcd2999eaeef6c68 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 18:02:37 +0000
Subject: [PATCH 4419/4650] [2021-10-07T18:02:36+0000] e2e test


From 0e323c43a7e038b1fe016ec2ef1d6f0d1a334982 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 19:02:39 +0000
Subject: [PATCH 4420/4650] [2021-10-07T19:02:39+0000] e2e test


From 669ac63218e68437600df324d75030fefd48f449 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 20:02:49 +0000
Subject: [PATCH 4421/4650] [2021-10-07T20:02:49+0000] e2e test


From dc9fc6cbd5e7b9e51a6fd255d33273dea027a07c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 21:02:32 +0000
Subject: [PATCH 4422/4650] [2021-10-07T21:02:32+0000] e2e test


From d3e3912a3da81523e284e2721e3931f66fea0882 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 22:02:40 +0000
Subject: [PATCH 4423/4650] [2021-10-07T22:02:40+0000] e2e test


From 8e8ddda670d18522897b36c001a61542e242ceea Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 7 Oct 2021 23:02:44 +0000
Subject: [PATCH 4424/4650] [2021-10-07T23:02:44+0000] e2e test


From 143873dc8053e4ba21604275fd41e66dbba1c266 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 00:05:05 +0000
Subject: [PATCH 4425/4650] [2021-10-08T00:05:05+0000] e2e test


From 579b2294777519f6539527953069137ecf0a0b47 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 01:25:44 +0000
Subject: [PATCH 4426/4650] [2021-10-08T01:25:44+0000] e2e test


From c799ec38157a3e17305753a2f17635035197e7d9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 02:15:48 +0000
Subject: [PATCH 4427/4650] [2021-10-08T02:15:48+0000] e2e test


From 3ce573fd6fcc403f0c91fc9cfa70ebd8b894a676 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 03:02:47 +0000
Subject: [PATCH 4428/4650] [2021-10-08T03:02:47+0000] e2e test


From 3d6cc8a023d3c8c6e91117a2069db90475b538aa Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 04:02:45 +0000
Subject: [PATCH 4429/4650] [2021-10-08T04:02:45+0000] e2e test


From f5c8ab6d8302b8cf6672443e8224999c94dfc2c8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 05:02:27 +0000
Subject: [PATCH 4430/4650] [2021-10-08T05:02:27+0000] e2e test


From 6be1295512e033b7920f5f35fb913b46c63de822 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 06:02:48 +0000
Subject: [PATCH 4431/4650] [2021-10-08T06:02:47+0000] e2e test


From 877c3e32cd975b9a20616057dc4329cf1a831cb6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 07:02:27 +0000
Subject: [PATCH 4432/4650] [2021-10-08T07:02:26+0000] e2e test


From 8a8d871164dbc503aacd8a5d49d020c84d5054af Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 08:02:43 +0000
Subject: [PATCH 4433/4650] [2021-10-08T08:02:43+0000] e2e test


From 95f5027c5d899aa9948cd3660791bf5bb9b5aabf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 09:02:29 +0000
Subject: [PATCH 4434/4650] [2021-10-08T09:02:29+0000] e2e test


From d1a26d60ac3013e7698f42ec1436174f2d7483c9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 10:02:26 +0000
Subject: [PATCH 4435/4650] [2021-10-08T10:02:25+0000] e2e test


From 6bea8b0b1c4bac635cc66a107cde950d382cbfad Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 11:02:59 +0000
Subject: [PATCH 4436/4650] [2021-10-08T11:02:59+0000] e2e test


From 06563f9ac339ae67862e192048d36452c72cd3df Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 12:02:59 +0000
Subject: [PATCH 4437/4650] [2021-10-08T12:02:59+0000] e2e test


From 9f9de580883b40a02443b384962f423705e80d2d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 13:06:24 +0000
Subject: [PATCH 4438/4650] [2021-10-08T13:06:24+0000] e2e test


From 4ae451cdae0ca753ca75592ee06ff60972b3582d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 14:02:37 +0000
Subject: [PATCH 4439/4650] [2021-10-08T14:02:37+0000] e2e test


From a481ad60e9411031be866a8e95ed0ad9c7a3cc16 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 15:02:42 +0000
Subject: [PATCH 4440/4650] [2021-10-08T15:02:42+0000] e2e test


From 7b640f9cc5601829cf4cbdd0e41f3551aa593975 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 16:02:40 +0000
Subject: [PATCH 4441/4650] [2021-10-08T16:02:40+0000] e2e test


From 701eecca030f0af18799872d7147ef506d90856f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 17:06:39 +0000
Subject: [PATCH 4442/4650] [2021-10-08T17:06:39+0000] e2e test


From 07f0efc20606e881943833cb63a1c8b891a72b7a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 18:02:50 +0000
Subject: [PATCH 4443/4650] [2021-10-08T18:02:50+0000] e2e test


From 6abd0831108554132100632325a04fdbc87cd09d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 19:02:31 +0000
Subject: [PATCH 4444/4650] [2021-10-08T19:02:31+0000] e2e test


From 4df2fc4c133d7659899aa56b064e156c0fd082bd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 20:02:31 +0000
Subject: [PATCH 4445/4650] [2021-10-08T20:02:31+0000] e2e test


From 350ef107b5d5b923676fe4701030f755964cc606 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 21:02:33 +0000
Subject: [PATCH 4446/4650] [2021-10-08T21:02:33+0000] e2e test


From ebe469d643791aa35a29b342e9b29fe2075e5d35 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 22:02:43 +0000
Subject: [PATCH 4447/4650] [2021-10-08T22:02:43+0000] e2e test


From b32e0d5a73a383431e60774ab1a4c5aee2846e1d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 8 Oct 2021 23:02:31 +0000
Subject: [PATCH 4448/4650] [2021-10-08T23:02:31+0000] e2e test


From ea0f8f9a5405fef07034246c9c51b8eed5a59ada Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 00:04:32 +0000
Subject: [PATCH 4449/4650] [2021-10-09T00:04:32+0000] e2e test


From c3aee4f811fc98df4103fd1ba460aace0a517000 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 01:22:16 +0000
Subject: [PATCH 4450/4650] [2021-10-09T01:22:16+0000] e2e test


From 7901ddc152595d8ec5c5df19b602ba6226f785d3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 02:12:32 +0000
Subject: [PATCH 4451/4650] [2021-10-09T02:12:32+0000] e2e test


From c4a3182c61b9c562ef31a31be43f5bfe8d6ca59b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 03:02:28 +0000
Subject: [PATCH 4452/4650] [2021-10-09T03:02:28+0000] e2e test


From 59863fab486a4eb09a0b446a6ce82328a6079f1d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 04:02:34 +0000
Subject: [PATCH 4453/4650] [2021-10-09T04:02:34+0000] e2e test


From e73fabfc3eca3b57bfef09de67eafc0fb372428c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 05:02:22 +0000
Subject: [PATCH 4454/4650] [2021-10-09T05:02:22+0000] e2e test


From f342df7d5564fa27a5f6a2675c16650c1c4ef072 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 06:02:46 +0000
Subject: [PATCH 4455/4650] [2021-10-09T06:02:46+0000] e2e test


From 7f3551f33205c13099a0537d61682a0c17e4071e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 07:02:48 +0000
Subject: [PATCH 4456/4650] [2021-10-09T07:02:48+0000] e2e test


From db357b66f68bf3a9c453f2e6d5c3ba480b4e0b08 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 08:02:37 +0000
Subject: [PATCH 4457/4650] [2021-10-09T08:02:37+0000] e2e test


From 7f7fbb1ad467ad1a937c8216ed7cca2edddd60ee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 09:02:35 +0000
Subject: [PATCH 4458/4650] [2021-10-09T09:02:35+0000] e2e test


From 79d133c638b81e9e1044572b110f639f177cffd2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 10:02:37 +0000
Subject: [PATCH 4459/4650] [2021-10-09T10:02:36+0000] e2e test


From 871f0d264d207b6a6cfaf3892d6f51e9777de29b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 11:02:32 +0000
Subject: [PATCH 4460/4650] [2021-10-09T11:02:32+0000] e2e test


From 6158b146fe2d20813eb1ac6cfb2c2c5b710a9c5d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 12:02:43 +0000
Subject: [PATCH 4461/4650] [2021-10-09T12:02:42+0000] e2e test


From d097777f840f5117185b0b09295d03c33926d174 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 13:05:26 +0000
Subject: [PATCH 4462/4650] [2021-10-09T13:05:26+0000] e2e test


From 266590f3db3043ad69a7f0b2275d24b1c5618bef Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 14:02:46 +0000
Subject: [PATCH 4463/4650] [2021-10-09T14:02:45+0000] e2e test


From 50b7a05532ff796ff74f6f2fc945017e3c2bdf49 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 15:02:40 +0000
Subject: [PATCH 4464/4650] [2021-10-09T15:02:40+0000] e2e test


From cfdce80311b3e564100f9e1a35a3141b527e2821 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 16:02:45 +0000
Subject: [PATCH 4465/4650] [2021-10-09T16:02:45+0000] e2e test


From 39a2a77f3d921d194270b563023df31ce3ae5e22 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 17:04:50 +0000
Subject: [PATCH 4466/4650] [2021-10-09T17:04:50+0000] e2e test


From 450c14bae1f8c4ef83680a2a65cb4346c3fe1c82 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 18:02:38 +0000
Subject: [PATCH 4467/4650] [2021-10-09T18:02:38+0000] e2e test


From 3300fcdbcdfb5c4407490127ba39d4e5f7c140c0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 19:02:23 +0000
Subject: [PATCH 4468/4650] [2021-10-09T19:02:23+0000] e2e test


From 6cf9bdaea335aae102213c6e7c3f154d8320d9f2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 20:02:24 +0000
Subject: [PATCH 4469/4650] [2021-10-09T20:02:24+0000] e2e test


From d96eb407f319927c907426d114c814a6ae602171 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 21:02:24 +0000
Subject: [PATCH 4470/4650] [2021-10-09T21:02:24+0000] e2e test


From b448cf18ce96752382d5d92fd84ffeb06b40c245 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 22:02:39 +0000
Subject: [PATCH 4471/4650] [2021-10-09T22:02:39+0000] e2e test


From 12a6c99bc59d1046b0d03d9d1167fe5ce4f48949 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 9 Oct 2021 23:02:46 +0000
Subject: [PATCH 4472/4650] [2021-10-09T23:02:46+0000] e2e test


From 6cc2a4a44d453215d0843413ad00d3dd81c53d42 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 00:05:18 +0000
Subject: [PATCH 4473/4650] [2021-10-10T00:05:18+0000] e2e test


From a658c200533ab7ec2c122c75eaf529b9c56ac215 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 01:24:24 +0000
Subject: [PATCH 4474/4650] [2021-10-10T01:24:24+0000] e2e test


From d23033b16d6b6183f40109600e1a44f26605ec78 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 02:13:18 +0000
Subject: [PATCH 4475/4650] [2021-10-10T02:13:18+0000] e2e test


From 873deaa7a52a4bf69f430fcf95836e49c319f92a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 03:02:35 +0000
Subject: [PATCH 4476/4650] [2021-10-10T03:02:35+0000] e2e test


From 330e2080e1ee12a3c9488c1c9bb964f8225b1997 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 04:02:38 +0000
Subject: [PATCH 4477/4650] [2021-10-10T04:02:38+0000] e2e test


From 5091b5f949a25b6474e6e58797107ab0ac5959bc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 05:02:27 +0000
Subject: [PATCH 4478/4650] [2021-10-10T05:02:27+0000] e2e test


From 6174df126d767dfbee81816ace8fecb34404fe49 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 06:02:47 +0000
Subject: [PATCH 4479/4650] [2021-10-10T06:02:47+0000] e2e test


From d3819cfeca7151b1d7429faaf8fba5b48bff20b2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 07:02:22 +0000
Subject: [PATCH 4480/4650] [2021-10-10T07:02:22+0000] e2e test


From 3bf5df454e9231b44d2475cf7623a310efb4a629 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 08:02:44 +0000
Subject: [PATCH 4481/4650] [2021-10-10T08:02:44+0000] e2e test


From 21a739e0ba99a8e239011444115afea795cd8e3f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 09:02:38 +0000
Subject: [PATCH 4482/4650] [2021-10-10T09:02:38+0000] e2e test


From 42a18ff54652cdb4349bc4c73847bbac79e8b399 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 10:02:47 +0000
Subject: [PATCH 4483/4650] [2021-10-10T10:02:47+0000] e2e test


From 158804537cc93e3800e0f53cff2f8972cbcec6ae Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 11:02:34 +0000
Subject: [PATCH 4484/4650] [2021-10-10T11:02:34+0000] e2e test


From 0f7a9c677d95ca3953710d9c4a75403e210075fe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 12:02:51 +0000
Subject: [PATCH 4485/4650] [2021-10-10T12:02:51+0000] e2e test


From 886a361ab897eed61f5d588031f06f83a597bbed Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 13:05:15 +0000
Subject: [PATCH 4486/4650] [2021-10-10T13:05:15+0000] e2e test


From 8e457659c536b9ad260702824a024fab98827528 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 14:02:44 +0000
Subject: [PATCH 4487/4650] [2021-10-10T14:02:44+0000] e2e test


From 8ca4f6d3e3b24aff9a584a9f12fe4f18e9292561 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 15:02:23 +0000
Subject: [PATCH 4488/4650] [2021-10-10T15:02:23+0000] e2e test


From 3fa15a78afcf950b5f1200d1a7cef2fbc75a1bf7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 16:02:48 +0000
Subject: [PATCH 4489/4650] [2021-10-10T16:02:48+0000] e2e test


From 54e1fc4a7d8350e31b263f7e5120756fed689703 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 17:04:50 +0000
Subject: [PATCH 4490/4650] [2021-10-10T17:04:50+0000] e2e test


From 20eba5f356a9ab31858f64d9efa21fca144af569 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 18:02:48 +0000
Subject: [PATCH 4491/4650] [2021-10-10T18:02:48+0000] e2e test


From 8556882f0274d8cb56636fee050430af77022b8a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 19:02:30 +0000
Subject: [PATCH 4492/4650] [2021-10-10T19:02:29+0000] e2e test


From b0083b46e07b2f2375cc05975a55bb405ff9231b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 20:02:55 +0000
Subject: [PATCH 4493/4650] [2021-10-10T20:02:55+0000] e2e test


From 65b9e5228890bd6c1f2722c95cabce3b057e5634 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 21:02:25 +0000
Subject: [PATCH 4494/4650] [2021-10-10T21:02:25+0000] e2e test


From 3cef04f28dbf8ce4226f21ef379b883884c5a275 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 22:02:43 +0000
Subject: [PATCH 4495/4650] [2021-10-10T22:02:42+0000] e2e test


From 5a6e9dfa897930d0e7284909cfa5e4ac1beb172d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 10 Oct 2021 23:02:56 +0000
Subject: [PATCH 4496/4650] [2021-10-10T23:02:56+0000] e2e test


From 808885805171a13d9da6e64a8d60f91fff55c6e1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 00:04:54 +0000
Subject: [PATCH 4497/4650] [2021-10-11T00:04:54+0000] e2e test


From 1d9970340328909e45dcdcf309142f7d087af21b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 01:24:55 +0000
Subject: [PATCH 4498/4650] [2021-10-11T01:24:55+0000] e2e test


From f44f20a67836760a4ffd4c67503471c0ca1b13f5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 02:15:38 +0000
Subject: [PATCH 4499/4650] [2021-10-11T02:15:38+0000] e2e test


From 5bf04c60b44b9689e8f38dd9e942b655b05ffce4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 03:02:31 +0000
Subject: [PATCH 4500/4650] [2021-10-11T03:02:31+0000] e2e test


From c7ed835d0c6752b7752074c81b284bd900cf46f4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 04:02:53 +0000
Subject: [PATCH 4501/4650] [2021-10-11T04:02:53+0000] e2e test


From a556e60a9b3928b102357a4128635cde1f55a2e0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 05:02:28 +0000
Subject: [PATCH 4502/4650] [2021-10-11T05:02:28+0000] e2e test


From 55d29d0ed2f0ee5bd2b5536e97f484a6abc8d18c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 06:02:39 +0000
Subject: [PATCH 4503/4650] [2021-10-11T06:02:39+0000] e2e test


From 525827b78816a1da1010e92ab4a4757ed236b412 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 07:02:39 +0000
Subject: [PATCH 4504/4650] [2021-10-11T07:02:39+0000] e2e test


From 15e174cd33534b77d28a857d11fbac33188033b9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 08:02:47 +0000
Subject: [PATCH 4505/4650] [2021-10-11T08:02:46+0000] e2e test


From 52d2d13b3239adee44b41ab1f9318de2587d121e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 09:02:29 +0000
Subject: [PATCH 4506/4650] [2021-10-11T09:02:29+0000] e2e test


From 9dcada4d06895ace18ad6c1169f01501baa8de6f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 10:02:57 +0000
Subject: [PATCH 4507/4650] [2021-10-11T10:02:57+0000] e2e test


From b1ff01455b1846970c50d25c98801f822ce917c2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 11:02:25 +0000
Subject: [PATCH 4508/4650] [2021-10-11T11:02:25+0000] e2e test


From 55afa3b6add7a50e7d077eb7194524969abfe478 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 12:02:52 +0000
Subject: [PATCH 4509/4650] [2021-10-11T12:02:52+0000] e2e test


From 6ca88ab8ccdad9f3333e068a78b4cddb1c24b2bd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 13:07:00 +0000
Subject: [PATCH 4510/4650] [2021-10-11T13:07:00+0000] e2e test


From d458ed150e38b278427365ea5b132b6535f9212c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 14:02:35 +0000
Subject: [PATCH 4511/4650] [2021-10-11T14:02:34+0000] e2e test


From 42ce1a52236ec6c1d7acd0cd3e28361b7b1ff3e6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 15:02:33 +0000
Subject: [PATCH 4512/4650] [2021-10-11T15:02:33+0000] e2e test


From 64e93b2630d134f29f94aa738756fc0dc7e2dc7c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 16:02:30 +0000
Subject: [PATCH 4513/4650] [2021-10-11T16:02:29+0000] e2e test


From 093b0347bdc116725bcc705e9153efca6cb5a54d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 17:05:48 +0000
Subject: [PATCH 4514/4650] [2021-10-11T17:05:48+0000] e2e test


From 74726f5d47cc3a327308ed12ed0393d169c86a2f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 18:02:39 +0000
Subject: [PATCH 4515/4650] [2021-10-11T18:02:39+0000] e2e test


From 0c6e1f0addd22cc7ca7a60253628db2cc25e3bbd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 19:02:22 +0000
Subject: [PATCH 4516/4650] [2021-10-11T19:02:21+0000] e2e test


From f7e5a8828c0e8e5c11d788b087536d2d3be04b80 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 20:02:44 +0000
Subject: [PATCH 4517/4650] [2021-10-11T20:02:44+0000] e2e test


From d0a625b72f6a44a0614be84dced9f174990ff339 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 21:02:40 +0000
Subject: [PATCH 4518/4650] [2021-10-11T21:02:40+0000] e2e test


From 29a91f3e279820d26136f3217088fbbe0ae279f6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 22:02:34 +0000
Subject: [PATCH 4519/4650] [2021-10-11T22:02:34+0000] e2e test


From d16611ee0032461aecb4aa6509ed7efbb72723bb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Mon, 11 Oct 2021 23:02:35 +0000
Subject: [PATCH 4520/4650] [2021-10-11T23:02:35+0000] e2e test


From a948f29d2aff907a15ed13d5f7b3aa30c1206b37 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 00:05:05 +0000
Subject: [PATCH 4521/4650] [2021-10-12T00:05:05+0000] e2e test


From 38dafa460cfc2241947263740f2abaea4486616f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 01:25:12 +0000
Subject: [PATCH 4522/4650] [2021-10-12T01:25:11+0000] e2e test


From b87084394f5002e8590530882c5d683e74847b50 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 02:15:03 +0000
Subject: [PATCH 4523/4650] [2021-10-12T02:15:03+0000] e2e test


From 3e4d6ae82acf1adc2d12acd04fc39b88be8c5259 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 03:02:25 +0000
Subject: [PATCH 4524/4650] [2021-10-12T03:02:25+0000] e2e test


From aaa372756782f3994902de177db7fdb3b28b0d08 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 04:02:42 +0000
Subject: [PATCH 4525/4650] [2021-10-12T04:02:42+0000] e2e test


From 58b3aa7dd2643dce193e3aded673e30619f0a19a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 05:02:24 +0000
Subject: [PATCH 4526/4650] [2021-10-12T05:02:24+0000] e2e test


From 8703dd5c9713bc5b5078575b921b32c94ceca73d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 06:02:56 +0000
Subject: [PATCH 4527/4650] [2021-10-12T06:02:56+0000] e2e test


From cbb736ac66809093715f39129e2be0f55099df17 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 07:02:34 +0000
Subject: [PATCH 4528/4650] [2021-10-12T07:02:34+0000] e2e test


From 85807997aee2ecf0443663cbeaa1704a72349319 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 08:02:56 +0000
Subject: [PATCH 4529/4650] [2021-10-12T08:02:56+0000] e2e test


From 121a5d40bb62061f018c651b18bf05dceba6ed61 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 09:02:30 +0000
Subject: [PATCH 4530/4650] [2021-10-12T09:02:30+0000] e2e test


From 0b43fc5cc1844d9467c95a13b01f5faed64be072 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 10:02:25 +0000
Subject: [PATCH 4531/4650] [2021-10-12T10:02:25+0000] e2e test


From dea727aa4956963a6003188f0a43d5bb1dcddf42 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 11:02:36 +0000
Subject: [PATCH 4532/4650] [2021-10-12T11:02:36+0000] e2e test


From 1018f665a1632a7af1cb1f1ec3d910fa56e3120c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 12:02:58 +0000
Subject: [PATCH 4533/4650] [2021-10-12T12:02:58+0000] e2e test


From 4c95dcc9b51df18169fca8f8ccf8c49827be5789 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 13:06:31 +0000
Subject: [PATCH 4534/4650] [2021-10-12T13:06:31+0000] e2e test


From 17bdbe7336d7866e81abbc2b59b23709c0e92094 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 14:02:36 +0000
Subject: [PATCH 4535/4650] [2021-10-12T14:02:36+0000] e2e test


From bb572c76af13cf449123370ca2b62a275b2a7e4f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 15:02:39 +0000
Subject: [PATCH 4536/4650] [2021-10-12T15:02:39+0000] e2e test


From 830ff2bbc696fade1db78a134a0fdb979d23cbb5 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 16:02:32 +0000
Subject: [PATCH 4537/4650] [2021-10-12T16:02:32+0000] e2e test


From 14ea00a41771726fead843274cb6df58bf461389 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 17:05:48 +0000
Subject: [PATCH 4538/4650] [2021-10-12T17:05:48+0000] e2e test


From 35d63193c18863fa8782b569688e7580f3385940 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 18:02:31 +0000
Subject: [PATCH 4539/4650] [2021-10-12T18:02:31+0000] e2e test


From b89602c4ee924847a14e3a11800c235fdaf6bdbe Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 19:02:20 +0000
Subject: [PATCH 4540/4650] [2021-10-12T19:02:20+0000] e2e test


From 1c96eccb03d4bec547f2152399dea61ee8506195 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 20:02:29 +0000
Subject: [PATCH 4541/4650] [2021-10-12T20:02:29+0000] e2e test


From be96eceaf63e2e8ec75ed1ff1cce457da0b5744c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 21:02:35 +0000
Subject: [PATCH 4542/4650] [2021-10-12T21:02:35+0000] e2e test


From 203d1d758e80636ac92f7ca0cb7b6012d3690c17 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 22:02:23 +0000
Subject: [PATCH 4543/4650] [2021-10-12T22:02:23+0000] e2e test


From 1cac6d435febc915976357c75bbe28dfa4dc2960 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Tue, 12 Oct 2021 23:02:34 +0000
Subject: [PATCH 4544/4650] [2021-10-12T23:02:34+0000] e2e test


From ab67a686c9a776b0a62b4cc0a94ebf9b17bf9afb Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 00:05:02 +0000
Subject: [PATCH 4545/4650] [2021-10-13T00:05:02+0000] e2e test


From 9af4b615063877737b59854a88fbc01a15f279b1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 01:24:48 +0000
Subject: [PATCH 4546/4650] [2021-10-13T01:24:48+0000] e2e test


From 660661a32c0476e8879e100b26fa553c6629845b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 02:15:46 +0000
Subject: [PATCH 4547/4650] [2021-10-13T02:15:46+0000] e2e test


From 431d8bbcbd3c293f12b07cfeac60a1277beb4acc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 03:02:31 +0000
Subject: [PATCH 4548/4650] [2021-10-13T03:02:31+0000] e2e test


From 93f17c37233666d9b71353a38f7dd43e31326b3d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 04:02:36 +0000
Subject: [PATCH 4549/4650] [2021-10-13T04:02:36+0000] e2e test


From 276e937c278797e7ba1ce086a58893dce7090186 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 05:02:22 +0000
Subject: [PATCH 4550/4650] [2021-10-13T05:02:22+0000] e2e test


From 9ca280ebe71a0797927a5402362a2106729e6bba Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 06:02:49 +0000
Subject: [PATCH 4551/4650] [2021-10-13T06:02:49+0000] e2e test


From f84d00b5ed22e2fb6dd8e7deb81ea77de74deebd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 07:02:26 +0000
Subject: [PATCH 4552/4650] [2021-10-13T07:02:26+0000] e2e test


From 6b26239b1497e97713670b26642e178b76f4d524 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 08:02:33 +0000
Subject: [PATCH 4553/4650] [2021-10-13T08:02:33+0000] e2e test


From acfe2293df491411f93ec37fa5076faa70c73e6c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 09:02:39 +0000
Subject: [PATCH 4554/4650] [2021-10-13T09:02:39+0000] e2e test


From d3dd060729491268ccb4b13069aaf1a661f56bfc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 10:02:45 +0000
Subject: [PATCH 4555/4650] [2021-10-13T10:02:45+0000] e2e test


From 4d8931f7f71b4b23827bfd788facc4232c8d5e5e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 11:02:23 +0000
Subject: [PATCH 4556/4650] [2021-10-13T11:02:23+0000] e2e test


From c16a39ee4f8db055e473627c8335221734699e94 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 12:02:55 +0000
Subject: [PATCH 4557/4650] [2021-10-13T12:02:55+0000] e2e test


From 0f7e0d76f3fb882d1adafa9094f66171b741e403 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 13:06:28 +0000
Subject: [PATCH 4558/4650] [2021-10-13T13:06:28+0000] e2e test


From 4cb43f6362b49245456d1a3e57664d94174103ab Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 14:02:41 +0000
Subject: [PATCH 4559/4650] [2021-10-13T14:02:41+0000] e2e test


From fb3a7484537fa7e55e661c47aa9355731948a9df Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 15:02:38 +0000
Subject: [PATCH 4560/4650] [2021-10-13T15:02:38+0000] e2e test


From 8a5f56b7022f791777098facfcdc1f26e578eef2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 16:02:51 +0000
Subject: [PATCH 4561/4650] [2021-10-13T16:02:51+0000] e2e test


From 4c79411b6b844d181b16e20feed24d4f92ed19e0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 17:05:36 +0000
Subject: [PATCH 4562/4650] [2021-10-13T17:05:36+0000] e2e test


From c6b59e14372aa3177995f64ccdc6042cfcb820e0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 18:02:36 +0000
Subject: [PATCH 4563/4650] [2021-10-13T18:02:36+0000] e2e test


From 4e155f72a781edd2f33f45c5b05479b8ef7ade6d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 19:02:22 +0000
Subject: [PATCH 4564/4650] [2021-10-13T19:02:21+0000] e2e test


From c0eea6ba8654f29db30a6d4c8dea3232a8f27386 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 20:02:31 +0000
Subject: [PATCH 4565/4650] [2021-10-13T20:02:31+0000] e2e test


From 916e16ad531857e5f333db8b238bd2127cd3dbe9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 21:02:20 +0000
Subject: [PATCH 4566/4650] [2021-10-13T21:02:20+0000] e2e test


From 7b8694ac4353afa83a5b42270362a1eb9b8cbf01 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 22:02:41 +0000
Subject: [PATCH 4567/4650] [2021-10-13T22:02:41+0000] e2e test


From 75a41d2c575b246bec64976a872b99aed76fd754 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Wed, 13 Oct 2021 23:02:46 +0000
Subject: [PATCH 4568/4650] [2021-10-13T23:02:46+0000] e2e test


From 99c7d07e982e9c9a1c55d5070ae4f25618e8aeb0 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 00:05:02 +0000
Subject: [PATCH 4569/4650] [2021-10-14T00:05:02+0000] e2e test


From b913ef9dc9f39c6c038952f22c9e903562ee96fc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 01:24:32 +0000
Subject: [PATCH 4570/4650] [2021-10-14T01:24:31+0000] e2e test


From 31cbe686324fcb5efe09faf371f3ffb6ecf10594 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 02:14:08 +0000
Subject: [PATCH 4571/4650] [2021-10-14T02:14:08+0000] e2e test


From d6ae37fb88ecf21594941886c80236ddb8141649 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 03:02:31 +0000
Subject: [PATCH 4572/4650] [2021-10-14T03:02:30+0000] e2e test


From 111a01208e4ef7b3287cba16df3734829da1ea6d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 04:02:54 +0000
Subject: [PATCH 4573/4650] [2021-10-14T04:02:54+0000] e2e test


From 36484776005720defed26da5d2ce36a9b24e0341 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 05:02:28 +0000
Subject: [PATCH 4574/4650] [2021-10-14T05:02:28+0000] e2e test


From 002b58b94a196fb561022438fa07a7877d55fbe9 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 06:02:36 +0000
Subject: [PATCH 4575/4650] [2021-10-14T06:02:36+0000] e2e test


From ed860b1ea7953c6d410b3b88562db36290a20c4a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 07:02:27 +0000
Subject: [PATCH 4576/4650] [2021-10-14T07:02:26+0000] e2e test


From 27cec0522cf3dabb9704e71f6da27d63e582c513 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 08:07:39 +0000
Subject: [PATCH 4577/4650] [2021-10-14T08:07:39+0000] e2e test


From bff14c1720bf3e4b65dd6e8d4607e2c8bd76c87c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 09:02:42 +0000
Subject: [PATCH 4578/4650] [2021-10-14T09:02:41+0000] e2e test


From 9b9cdca16fc75ccde243649b2be21bb29031e744 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 10:02:30 +0000
Subject: [PATCH 4579/4650] [2021-10-14T10:02:29+0000] e2e test


From aedc5adeb29ba1f7236e9ff1843341fef81dc427 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 11:02:30 +0000
Subject: [PATCH 4580/4650] [2021-10-14T11:02:30+0000] e2e test


From 00ecfdadd035bf8ed0669504a70d4cbb73de1be1 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 12:02:42 +0000
Subject: [PATCH 4581/4650] [2021-10-14T12:02:42+0000] e2e test


From f42f2e31f2d3cde85914ca65cd6c58f57880ea55 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 13:06:27 +0000
Subject: [PATCH 4582/4650] [2021-10-14T13:06:27+0000] e2e test


From 7971487a5e3a3d0bebdb9c5f8736adf9766354ee Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 14:02:33 +0000
Subject: [PATCH 4583/4650] [2021-10-14T14:02:33+0000] e2e test


From 65c345e1a7749a17ac53a295538f90185771654f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 15:02:26 +0000
Subject: [PATCH 4584/4650] [2021-10-14T15:02:26+0000] e2e test


From 8e3f69bbdcbc10fb1f06c4c4000a7e5f17f30f74 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 16:02:44 +0000
Subject: [PATCH 4585/4650] [2021-10-14T16:02:44+0000] e2e test


From cb17bdccaf90609f1a8bf4028279385068403a68 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 17:05:55 +0000
Subject: [PATCH 4586/4650] [2021-10-14T17:05:55+0000] e2e test


From 2167dd2573d12801852def5c2adf39badc053f8e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 18:02:37 +0000
Subject: [PATCH 4587/4650] [2021-10-14T18:02:37+0000] e2e test


From 1599cd3108a699ae40bb0b546e28a343802049c2 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 19:02:24 +0000
Subject: [PATCH 4588/4650] [2021-10-14T19:02:24+0000] e2e test


From d2409bf63bb94a8f5ff8522954d3574e85306854 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 20:02:55 +0000
Subject: [PATCH 4589/4650] [2021-10-14T20:02:55+0000] e2e test


From 383a2101c75638e80f26c4a0bc5e9488446f6b2e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 21:02:46 +0000
Subject: [PATCH 4590/4650] [2021-10-14T21:02:46+0000] e2e test


From 256937da38218a08530cd9e94aa14cab6bf121ad Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 22:02:38 +0000
Subject: [PATCH 4591/4650] [2021-10-14T22:02:38+0000] e2e test


From 237484c5d09919e4f41d70c661d40e5cd034eb37 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Thu, 14 Oct 2021 23:02:43 +0000
Subject: [PATCH 4592/4650] [2021-10-14T23:02:43+0000] e2e test


From b828c3c8f174f03c1ff21da0bdbaf494b2b829e8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 00:05:04 +0000
Subject: [PATCH 4593/4650] [2021-10-15T00:05:04+0000] e2e test


From 220e42df38391d062bec5109e4f986b8ed975846 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 01:24:58 +0000
Subject: [PATCH 4594/4650] [2021-10-15T01:24:58+0000] e2e test


From d2b12a363290ce9e95bb4ba8cddc656b748eea1b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 02:14:29 +0000
Subject: [PATCH 4595/4650] [2021-10-15T02:14:29+0000] e2e test


From 1828e2bd5cd469204dbb49c80bf4219d14059daf Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 03:02:41 +0000
Subject: [PATCH 4596/4650] [2021-10-15T03:02:41+0000] e2e test


From 0e6e40474c87b9c6bc7d03e490352a659273b410 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 04:02:35 +0000
Subject: [PATCH 4597/4650] [2021-10-15T04:02:35+0000] e2e test


From 876fddbd5727d7ec0391031b85a7ef255991be1b Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 05:02:22 +0000
Subject: [PATCH 4598/4650] [2021-10-15T05:02:22+0000] e2e test


From 821de9037c08b2dc42c745104e2ac9ea525d2ab6 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 06:03:00 +0000
Subject: [PATCH 4599/4650] [2021-10-15T06:03:00+0000] e2e test


From 9f915aca3cf01591d226ad60cd2d5cf2a30e7dff Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 07:02:42 +0000
Subject: [PATCH 4600/4650] [2021-10-15T07:02:42+0000] e2e test


From 68ede8bf392979dbc538c8bd7a94a14a586446f3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 08:02:39 +0000
Subject: [PATCH 4601/4650] [2021-10-15T08:02:38+0000] e2e test


From a04220e3d9134476a07259ac6f382d31d7f2a0a4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 09:02:44 +0000
Subject: [PATCH 4602/4650] [2021-10-15T09:02:44+0000] e2e test


From d95a2ccf4bca411615657234128e841746159e5d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 10:02:46 +0000
Subject: [PATCH 4603/4650] [2021-10-15T10:02:46+0000] e2e test


From 3d164279a11eefd876944d7e197e2df1a28ab433 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 11:02:23 +0000
Subject: [PATCH 4604/4650] [2021-10-15T11:02:23+0000] e2e test


From 03f915cd4a3e36e426f5773f1a9c88f7f6317cf3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 12:02:50 +0000
Subject: [PATCH 4605/4650] [2021-10-15T12:02:50+0000] e2e test


From adb8dda618f8ee369bc925c57e327169fae28901 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 13:06:33 +0000
Subject: [PATCH 4606/4650] [2021-10-15T13:06:33+0000] e2e test


From 4739f795f4aab903c4f630cbf32302e006404390 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 14:02:41 +0000
Subject: [PATCH 4607/4650] [2021-10-15T14:02:41+0000] e2e test


From ab27189750b2a48be8da2e5fb63845c97fd43008 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 15:02:30 +0000
Subject: [PATCH 4608/4650] [2021-10-15T15:02:30+0000] e2e test


From f8514207acc98a014458eeddac58844552089732 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 16:02:51 +0000
Subject: [PATCH 4609/4650] [2021-10-15T16:02:51+0000] e2e test


From a4fce4cba23f9b24ab86cc2e0887250fe6b9f826 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 17:05:49 +0000
Subject: [PATCH 4610/4650] [2021-10-15T17:05:48+0000] e2e test


From 6b17f73eae70913a07f579bddeb7d23d20e33c63 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 18:02:33 +0000
Subject: [PATCH 4611/4650] [2021-10-15T18:02:33+0000] e2e test


From 7520987d9c17db2049bf23630c83dc3314e706f3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 19:02:22 +0000
Subject: [PATCH 4612/4650] [2021-10-15T19:02:22+0000] e2e test


From 3e76f4ca9a88025c699b7f0a5699c87001c8c81d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 20:02:33 +0000
Subject: [PATCH 4613/4650] [2021-10-15T20:02:33+0000] e2e test


From c5ec0abd223226ea4636b12ad9676a1c8f60dc7f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 21:02:36 +0000
Subject: [PATCH 4614/4650] [2021-10-15T21:02:36+0000] e2e test


From 9087a714fa7d36ad0796b2331744f3996e31c66e Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 22:02:39 +0000
Subject: [PATCH 4615/4650] [2021-10-15T22:02:39+0000] e2e test


From 007fb7ec348fcfa6274e220bcf3d24d9a25caa59 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Fri, 15 Oct 2021 23:02:33 +0000
Subject: [PATCH 4616/4650] [2021-10-15T23:02:33+0000] e2e test


From b1a9831638b011f25d0c2bef83fc745ec7dec1cc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 00:05:00 +0000
Subject: [PATCH 4617/4650] [2021-10-16T00:04:59+0000] e2e test


From 92799c8911238177a4f67cf846609b0613c21578 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 01:26:03 +0000
Subject: [PATCH 4618/4650] [2021-10-16T01:26:03+0000] e2e test


From 1c626f140724175a3f64e59edbd44ee2a3738748 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 02:16:23 +0000
Subject: [PATCH 4619/4650] [2021-10-16T02:16:23+0000] e2e test


From 7eb8d58b2846605f0ca674c047aea7e204a71ddd Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 03:02:29 +0000
Subject: [PATCH 4620/4650] [2021-10-16T03:02:29+0000] e2e test


From 6d179a6ed691ca1c40f7f9487b62daa1dfa72b7a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 04:02:25 +0000
Subject: [PATCH 4621/4650] [2021-10-16T04:02:25+0000] e2e test


From e2892f3cc861a1fa90e3a5455cb79247ea63f524 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 05:02:21 +0000
Subject: [PATCH 4622/4650] [2021-10-16T05:02:21+0000] e2e test


From 4bb9a8c2550d47e14052b69dabd67ab4451afd90 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 06:02:43 +0000
Subject: [PATCH 4623/4650] [2021-10-16T06:02:43+0000] e2e test


From a5e0b0ed854658c4af6283b4bc96a4c35f183c21 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 07:02:28 +0000
Subject: [PATCH 4624/4650] [2021-10-16T07:02:28+0000] e2e test


From 2f9aeb65df32e509853a52174421b8952fcd80ce Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 08:02:44 +0000
Subject: [PATCH 4625/4650] [2021-10-16T08:02:44+0000] e2e test


From db2333b6ca5ddb20e5057bc943fced0446f6d176 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 09:02:45 +0000
Subject: [PATCH 4626/4650] [2021-10-16T09:02:45+0000] e2e test


From ac5801d7f311487f5d30af5ab8cc17d61109b89f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 10:02:39 +0000
Subject: [PATCH 4627/4650] [2021-10-16T10:02:39+0000] e2e test


From 560c208baa65d477212a470a3756eab5ac2cba36 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 11:02:34 +0000
Subject: [PATCH 4628/4650] [2021-10-16T11:02:33+0000] e2e test


From 659d58d576d3382066793f3cad2d4184ae7fa023 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 12:02:59 +0000
Subject: [PATCH 4629/4650] [2021-10-16T12:02:58+0000] e2e test


From 5b56c139395a23aec7d554a361b02de58340e46c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 13:05:31 +0000
Subject: [PATCH 4630/4650] [2021-10-16T13:05:30+0000] e2e test


From 5f54fbd31b45c627073cb30eb285828df0c1c2e4 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 14:02:24 +0000
Subject: [PATCH 4631/4650] [2021-10-16T14:02:24+0000] e2e test


From 053477f86efe6b91e9548899fb2ec4045e05cf60 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 15:02:49 +0000
Subject: [PATCH 4632/4650] [2021-10-16T15:02:49+0000] e2e test


From ccdf1c5999c787bc83a8d5469b55d3ee0f412764 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 16:02:45 +0000
Subject: [PATCH 4633/4650] [2021-10-16T16:02:45+0000] e2e test


From 0748ce510bea26fe3cb506cb183e68d6be107e8d Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 17:04:51 +0000
Subject: [PATCH 4634/4650] [2021-10-16T17:04:51+0000] e2e test


From c938e56f8c359eba059d99b6f238f876b8833117 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 18:02:32 +0000
Subject: [PATCH 4635/4650] [2021-10-16T18:02:32+0000] e2e test


From 50b9c3335d53fd5abadc1252dd327e38e945a343 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 19:02:28 +0000
Subject: [PATCH 4636/4650] [2021-10-16T19:02:28+0000] e2e test


From aafcd36c4ec10a7005cede45c4afa97f39eb06cc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 20:02:33 +0000
Subject: [PATCH 4637/4650] [2021-10-16T20:02:33+0000] e2e test


From 9cb6d149606a30f80ee1f7af8943f426cb88f04a Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 21:02:31 +0000
Subject: [PATCH 4638/4650] [2021-10-16T21:02:31+0000] e2e test


From 0904cc49e61f298c2e080a4dcd67fc8f66a6ebc8 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 22:02:48 +0000
Subject: [PATCH 4639/4650] [2021-10-16T22:02:48+0000] e2e test


From fae80f68275389fbf2d721761e1e45e792637c1c Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sat, 16 Oct 2021 23:02:32 +0000
Subject: [PATCH 4640/4650] [2021-10-16T23:02:32+0000] e2e test


From 43b9a409fdd15c9a5dcd314df50b21b5116a45c7 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 17 Oct 2021 00:05:51 +0000
Subject: [PATCH 4641/4650] [2021-10-17T00:05:51+0000] e2e test


From 5c7aefa912a742c5e4ca722609ce2579315def41 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 17 Oct 2021 01:24:55 +0000
Subject: [PATCH 4642/4650] [2021-10-17T01:24:54+0000] e2e test


From bd0ee376f6aa99b2189ad42a6fbbcc6c37407f74 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 17 Oct 2021 02:13:28 +0000
Subject: [PATCH 4643/4650] [2021-10-17T02:13:28+0000] e2e test


From e5b74bf9175f950cf85293b3aadd5fabeb308338 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 17 Oct 2021 03:02:27 +0000
Subject: [PATCH 4644/4650] [2021-10-17T03:02:27+0000] e2e test


From dac0adcce77a9c5390c3d72ed5f12ef77be07688 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 17 Oct 2021 04:02:57 +0000
Subject: [PATCH 4645/4650] [2021-10-17T04:02:57+0000] e2e test


From b44f0f29434e7172e87bd88da96cbd7617a42ba3 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 17 Oct 2021 05:02:23 +0000
Subject: [PATCH 4646/4650] [2021-10-17T05:02:23+0000] e2e test


From e388885b884e53c9e307f9211e5e7305c5d1094f Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 17 Oct 2021 06:02:42 +0000
Subject: [PATCH 4647/4650] [2021-10-17T06:02:42+0000] e2e test


From 3878cc9b06232e2a459d2931d5dd346c97e77e68 Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 17 Oct 2021 07:02:23 +0000
Subject: [PATCH 4648/4650] [2021-10-17T07:02:22+0000] e2e test


From 1c08f1be4e075886dfe06a9894e0b2d451f76bdc Mon Sep 17 00:00:00 2001
From: github-actions 
Date: Sun, 17 Oct 2021 08:02:47 +0000
Subject: [PATCH 4649/4650] [2021-10-17T08:02:47+0000] e2e test


From 191fbe0abf67e5f8faaf7382e57def125bffe438 Mon Sep 17 00:00:00 2001
From: Eyal Gerber <35224049+Novodes@users.noreply.github.com>
Date: Sun, 5 Dec 2021 09:43:20 +0200
Subject: [PATCH 4650/4650] updated readme file for testing

---
 README.md | 1 +
 1 file changed, 1 insertion(+)

diff --git a/README.md b/README.md
index ec2d441f..f8ceb17d 100755
--- a/README.md
+++ b/README.md
@@ -1,2 +1,3 @@
 README.md
 Loops Rule\!
+Testing